cb76e138d3
Fixe ARM NEON vrshl.
...
Signed-off-by: Paul Brook <paul@codesourcery.com>
2009-05-09 23:12:06 +01:00
0bf46a40a1
qemu: introduce qemu_init_vcpu (Marcelo Tosatti)
...
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7242 c046a42c-6fe2-441c-8c8c-71466251a162
2009-04-24 18:03:41 +00:00
6a4955a813
qemu: per-arch cpu_has_work (Marcelo Tosatti)
...
Blue Swirl: fix Sparc32 breakage
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7238 c046a42c-6fe2-441c-8c8c-71466251a162
2009-04-24 18:03:20 +00:00
37f9ba4600
target-arm: don't use T[x] in helper
...
(Torbjörn Andersson)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7034 c046a42c-6fe2-441c-8c8c-71466251a162
2009-04-07 22:48:36 +00:00
1b530a6dfc
Add new command line option -singlestep for tcg single stepping.
...
This replaces a compile time option for some targets and adds
this feature to targets which did not have a compile time option.
Add monitor command to enable or disable single step mode.
Modify monitor command "info status" to display single step mode.
Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7004 c046a42c-6fe2-441c-8c8c-71466251a162
2009-04-05 20:08:59 +00:00
cbbccffc7a
Fix ARM quadword VDUP (core register).
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6857 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-17 12:19:58 +00:00
66896cb803
tcg: rename bswap_i32/i64 functions
...
Rename bswap_i32 into bswap32_i32 and bswap_i64 into bswap64_i64
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6829 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-13 09:34:48 +00:00
533d177a98
Fix correct reset value for ARM CP15 c1 auxiliary control register
...
According to ARM Cortex A8 Technical Reference Manual, the reset value for CP15 c1 auxiliary control
register is 2, not zero (page 3.12).
Signed-off-by: Riku Voipio <riku.voipio@iki.fi>
Acked-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6771 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-07 22:10:28 +00:00
2b3ea3154d
clean build: Fix arm build warnings
...
Fix remaining arm warnings - except for the mess in the NetWinder FP
emulator.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6766 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-07 21:48:00 +00:00
c276471991
The _exit syscall is used for both thread termination in NPTL applications,
...
and process termination in legacy applications. Try to guess which we want
based on the presence of multiple threads.
Also implement locking when modifying the CPU list.
Signed-off-by: Paul Brook <paul@codesourcery.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6735 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-07 15:24:59 +00:00
84a031c68f
Fix cpu_arm_handle_mmu_fault warning
...
This patch fixes:
/scratch/froydnj/qemu.git/target-arm/helper.c:451: warning: no previous prototype for 'cpu_arm_handle_mmu_fault'
by moving the declaration of the function to cpu.h from exec.h. cpu.h
seems to be the place most other ports declare the corresponding
function.
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6550 c046a42c-6fe2-441c-8c8c-71466251a162
2009-02-07 15:19:20 +00:00
0d0266a53b
targets: remove error handling from qemu_malloc() callers (Avi Kivity)
...
Signed-off-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6530 c046a42c-6fe2-441c-8c8c-71466251a162
2009-02-05 22:06:11 +00:00
eca1bdf415
Log reset events (Jan Kiszka)
...
Original idea&code by Kevin Wolf, split-up in two patches and added more
archs.
This patch introduces a flag to log CPU resets. Useful for tracing
unexpected resets (such as those triggered by x86 triple faults).
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6452 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-26 19:54:31 +00:00
8fec2b8c45
global s/loglevel & X/qemu_loglevel_mask(X)/ (Eduardo Habkost)
...
These are references to 'loglevel' that aren't on a simple 'if (loglevel &
X) qemu_log()' statement.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6340 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-15 22:36:53 +00:00
93fcfe39a0
Convert references to logfile/loglevel to use qemu_log*() macros
...
This is a large patch that changes all occurrences of logfile/loglevel
global variables to use the new qemu_log*() macros.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6338 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-15 22:34:14 +00:00
fad6cb1a56
Update FSF address in GPL/LGPL boilerplate
...
The attached patch updates the FSF address in the GPL/LGPL boilerplate
in most GPL/LGPLed files, and also in COPYING.LIB.
Signed-off-by: Stuart Brady <stuart.brady@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6162 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-04 22:05:52 +00:00
fe76d97653
Implement flush-to-zero mode (denormal results are replaced with zero).
...
Signed-off-by: Paul Brook <paul@codesourcery.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6107 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-19 14:33:59 +00:00
5c7908ed23
Implement default-NaN mode.
...
Signed-off-by: Paul Brook <paul@codesourcery.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6106 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-19 13:53:37 +00:00
a49ea279c4
Implement ARMv7 cp15 cache ID registers.
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6105 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-19 13:37:53 +00:00
fe1479c3ad
Implement (very) basic Thumb2-EE support. This doesn't actually implement
...
EE state, just the associated system coprocessor registers. It is sufficient
to keep OS setup and context switching code happy.
Signed-off-by: Paul Brook <paul@codesourcery.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6104 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-19 13:18:36 +00:00
644ad8066d
Fix VFP fixed point conversion routines.
...
Signed-off-by: Paul Brook <paul@codesourcery.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6103 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-19 13:02:08 +00:00
d4934d18f3
Implement ARMv7 MMU access permissions.
...
Signed-off-by: Paul Brook <paul@codesourcery.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6099 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-19 12:39:00 +00:00
997641a84f
ARM: basic SX1-cellphone sysemu support (Jean-Christophe PLAGNIOL-VILLARD).
...
The TSC2102 chip is not included in documentation because a patch is
pending.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6038 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-15 02:05:00 +00:00
1d6198c3b0
Remove unnecessary trailing newlines
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6000 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-13 09:32:43 +00:00
db8d990204
Remove FORCE_RET() and RETURN()
...
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5923 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07 18:15:54 +00:00
955a7dd5e8
ARM: fix smmul and smmla/smmls usage of registers (Mans Rullgard).
...
This fixes the destination and accumulator registers for the smmul
and smmla instructions.
Signed-off-by: Mans Rullgard <mans@mansr.com>
Acked-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5913 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07 14:18:02 +00:00
ded9d29547
ARM: fix usad8 and usada8 usage of registers (Mans Rullgard).
...
This fixes the destination and accumulator registers for the usad8
and usada8 instructions.
Signed-off-by: Mans Rullgard <mans@mansr.com>
Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5912 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07 14:03:27 +00:00
4cc633c38b
Patch holes in ARM translation (Laurent Desnogues).
...
- gen_set_CF_bit31: use the right value to set carry flag
- shifter_out_im: remove a spurious semi-colon
- add a break for VSHRN, VRSHRN, VQSHRN, VQRSHRN
size 2 case
- sbfx, ubfx are v6t2 instructions
The correct cps user mode behaviour is unclear so it's left out from the
commit until ARM decides it.
Signed-off-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5908 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07 13:32:09 +00:00
aaf2d97dcb
ARM: cosmetics (Laurent Desnogues).
...
- remove macros that are not used
- remove disass structure is_mem field which value is never used
- correct a typo in a comment.
Signed-off-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5907 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07 13:20:16 +00:00
2cbd949d7a
Common cpu_loop_exit prototype
...
All archs use the same cpu_loop_exit, so move the prototype in a common
header. i386 was carrying a __hidden attribute, but that was empty for
this arch anyway.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5820 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-30 16:23:09 +00:00
c0ce998e94
Use sys-queue.h for break/watchpoint managment (Jan Kiszka)
...
This switches cpu_break/watchpoint_* to TAILQ wrappers, simplifying the
code and also fixing a use after release issue in
cpu_break/watchpoint_remove_all.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5799 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-25 22:13:57 +00:00
bfa50bc263
Remove premature memop TB terminations (Jan Kiszka)
...
Now that we can properly restore the pc on watchpoint hits, there is no
more need for prematurely terminating TBs if watchpoints are present.
Remove all related bits.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5742 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-18 20:26:41 +00:00
a1d1bb3101
Refactor and enhance break/watchpoint API (Jan Kiszka)
...
This patch prepares the QEMU cpu_watchpoint/breakpoint API to allow the
succeeding enhancements this series comes with.
First of all, it overcomes MAX_BREAKPOINTS/MAX_WATCHPOINTS by switching
to dynamically allocated data structures that are kept in linked lists.
This also allows to return a stable reference to the related objects,
required for later introduced x86 debug register support.
Breakpoints and watchpoints are stored with their full information set
and an additional flag field that makes them easily extensible for use
beyond pure guest debugging.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5738 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-18 20:07:32 +00:00
6b9175478e
Refactor translation block CPU state handling (Jan Kiszka)
...
This patch refactors the way the CPU state is handled that is associated
with a TB. The basic motivation is to move more arch specific code out
of generic files. Specifically the long #ifdef clutter in tb_find_fast()
has to be overcome in order to avoid duplicating it for the gdb
watchpoint fixes (patch "Restore pc on watchpoint hits").
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5736 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-18 19:46:41 +00:00
622ed3605b
Convert CPU_PC_FROM_TB to static inline (Jan Kiszka)
...
as macros should be avoided when possible.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5735 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-18 19:36:03 +00:00
a7812ae412
TCG variable type checking.
...
Signed-off-by: Paul Brook <paul@codesourcery.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5729 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-17 14:43:54 +00:00
c9fb531ab2
VFP fnmsc negative zero fix.
...
Signed-off-by: Paul Brook <paul@codesourcery.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5610 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-03 19:09:29 +00:00
b1d8e52e63
Fix undeclared symbol warnings from sparse
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5539 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-26 13:43:07 +00:00
a47f43d272
Additional exclusive load/store instruction are v6K, not v6T2.
...
Signed-off-by: Paul Brook <paul@codesourcery.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5518 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-22 21:42:54 +00:00
86753403b2
Fix ARMv6t2 strex instructions.
...
Signed-off-by: Paul Brook <paul@codesourcery.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5517 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-22 20:35:54 +00:00
b2fa17977f
Fix ARMv6 translation table base address calculation.
...
Signed-off-by: Paul Brook <paul@codesourcery.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5514 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-22 19:22:30 +00:00
4be27dbbde
Optimize redundant cp15 coprocessor access control register writes.
...
Signed-off-by: Paul Brook <paul@codesourcery.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5512 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-22 16:14:08 +00:00
56aebc8916
Add GDB XML register description support.
...
Signed-off-by: Paul Brook <paul@codesourcery.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5459 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-11 17:55:29 +00:00
3018f2598c
Fix ARM NEON vdup and vtbl bugs.
...
Signed-off-by: Paul Brook <paul@codesourcery.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5286 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-22 00:52:42 +00:00
e4b3861d15
Fix neon encoding comment.
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5285 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-21 23:15:38 +00:00
36aa55dcd9
Add concat_i32_i64 op.
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5280 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-21 13:48:32 +00:00
b40d0353b0
Fix QADD / QSUB decoding on ARM (Torbjörn Andersson).
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5273 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-20 03:18:07 +00:00
79383c9c08
Fix some warnings that would be generated by gcc -Wredundant-decls
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5115 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-30 09:51:20 +00:00
a87aa10b85
ARMv6: fix SIMD add/sub carry flags (Vincent Palatin).
...
After a quick code review, it seems to be a bad cut-n-paste between
16-bit and 8-bit UADD/USUB, indeed UADD8/USUB8 tries to set GE bits by
pair instead of one at a time.
Besides, the addition operations (UADD8/UADD16) set GE bits to "NOT
carry" instead of "carry" (probably once again due to a copy of the
substraction code which sets flags to "NOT borrow")
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4900 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-19 10:46:13 +00:00
7997d92f2c
ARM: fix CPS masks (Vincent Palatin).
...
According to ARM Reference Manual (DDI0100 A4.1.16),
bit 5 is fixed to 0 (bit 4 is the MSB of the mode), so the instruction mask
should be 0x0ff10020 not 0x0ff10010.
Besides, mmod flag is bit 17 (b14 is SBZ)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4899 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-19 10:34:35 +00:00
22478e79f2
Fix smlald, smlsld, pkhtp, pkhbt, ssat, usat, umul, smul... (Laurent Desnogues).
...
helper.c
- copy reference c0_c2 to runtime c0_c2 and not c0_c1
op_helper.c
- remove old code (PARAM1, probably some left over from old dyngen)
that broke do_[us]sat
translate.c
- gen_smul_dual should sign-extend from 16 bit to 32 bit and not from
8 to 32
- disas_arm_insn:
* smlalxy: that was completely wrong; now the addition is
performed as for smlald
* pkhtb: optional ASR not taken into account (similar
* to [us]sat)
* pkhtb/pkhbt: tmp2 is dead
* smlald, smlsld, smuad, smusd, smlad, smlsd: rd
* and rn swapped
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4898 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-19 10:12:22 +00:00
2cfc5f17d3
Small cleanup of gen_intermediate_code(_internal), by Laurent Desnogues.
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4891 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-18 18:01:29 +00:00
d60bb01cbb
Terminate TB immediately after v7-M exception return.
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4868 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-11 00:27:19 +00:00
551bd27f22
Convert remaining __builtin_expect to likely/unlikely, by Jan Kiszka.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4840 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-03 17:57:36 +00:00
06e80fc927
Silence compiler warning.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4839 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-03 16:40:06 +00:00
ab19b0ecfd
ARMv7-M interrupt stack alignment fix.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4823 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-02 16:44:09 +00:00
9656f324d2
Move interrupt_request and user_mode_only to common cpu state.
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Save and restore env->interrupt_request and env->halted.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4817 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-01 20:01:19 +00:00
bf20dc076b
Spelling fixes, spotted by Stuart Brady.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4809 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-30 17:22:19 +00:00
b3c7724cbc
Move CPU save/load registration to common code.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4808 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-30 16:31:04 +00:00
a50f5b9186
Suppress bogus compiler warnings.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4803 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-29 15:25:29 +00:00
2e70f6efa8
Add instruction counter.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4799 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-29 01:03:05 +00:00
a60de94777
Mark a dead_tmp as such in ARM msr.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4648 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-02 02:29:26 +00:00
89cdb6af04
Provide basic emulation for Sharp SL-6000 PDA (Tosa), Dmitry Baryshkov.
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This adds basic support for emulating Sharp Zaurus SL-6000 PDA (tosa).
Currently it provides only basic support: no kbd/lcd, sound, ts, etc.
But it's able at least to boot Linux from CF.
Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4643 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-02 01:33:11 +00:00
f8ed7070ea
Fix typo.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4624 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-30 17:54:15 +00:00
6e68e076e7
Move clone() register setup to target specific code. Handle fork-like clone.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4623 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-30 17:22:15 +00:00
9133e39b84
Push common interrupt variables to cpu-defs.h (Glauber Costa)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4612 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-29 10:08:06 +00:00
fbb4a2e371
Implement ARM magic kernel page and TLS register.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4610 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-29 00:20:44 +00:00
ce5232c5c2
moved halted field to CPU_COMMON
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4609 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-28 17:14:10 +00:00
9b7b85d260
Fix off-by-one unwinding error.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4570 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-25 00:36:06 +00:00
cb63669a54
Fix ARM conditional branch bug.
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Add tcg_gen_brcondi.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4552 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-24 02:22:00 +00:00
c30bb26499
Add N810 to allowed -M values, add documentation part for N8x0.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4490 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-18 13:01:40 +00:00
4aa9aca4c2
Remove arm's local not_i32 tcg op now that there's one in tcg.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4475 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-17 18:15:04 +00:00
390efc54fb
Add TCG native negation op.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4426 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-11 14:35:37 +00:00
868314358e
Add zero extension (pseudo-)ops.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4424 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-11 12:22:01 +00:00
8dd3dca351
remove target ifdefs from vl.c
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(Glauber Costa)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4327 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-04 13:11:44 +00:00
460a09c1fb
Fix incorrect argument types.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4291 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-01 12:04:35 +00:00
d2856f1ad4
Factorize code in translate.c
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(Glauber Costa)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4274 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-28 00:32:32 +00:00
601d70b9e5
Remove an unused field and fix some non-code typos.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4222 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-20 01:03:45 +00:00
66230e0dee
Correct more ARM VFP 32/64 and signed/unsigned typos.
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Fixes unreadable fonts in Maemo guest.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4221 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-20 00:58:01 +00:00
422ebf6979
Save the exact SWI return address in Thumb mode.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4217 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-16 23:17:02 +00:00
827df9f3c5
Add basic OMAP2 chip support.
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Add the OMAP242x (arm1136 core) initialisation with basic on-chip
peripherals and update OMAP1 peripherals which are re-used in OMAP2.
Make palmte.c and sd.c errors go to stderr.
Allow disabling SD chipselect.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4213 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-14 21:05:22 +00:00
f93eb9ff66
Move the excess of arm_load_kernel() parameters into a struct.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4212 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-14 20:27:51 +00:00
e22f8f39f3
Correctly restore pc after an exception occured in Thumb mode.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4211 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-14 19:14:06 +00:00
5b340b51fd
Fix ARM VFP related segfaults.
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The fconst change is partly a guess.
VFP_OP1 is still unused.
An ARMv6 target still won't boot.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4210 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-14 02:19:57 +00:00
6a0d8a1d23
Fix the offset in Thumb bl instruction.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4204 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-13 13:25:31 +00:00
2637a3beb9
Set an unset label in ARM strex.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4203 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-13 03:15:14 +00:00
72f1c62f7d
Fix ARM and Thumb ldlex/stlex.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4202 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-13 01:53:27 +00:00
6c95676b16
Store the right TCG temp (typo).
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Stops ARMv6 target from segfaulting early.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4201 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-13 00:57:49 +00:00
ca10f86763
Remove osdep.c/qemu-img code duplication
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(Kevin Wolf)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4191 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-11 21:35:42 +00:00
1654b2d6bf
Fix few spelling issues in comments
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(Stefan Weil)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4187 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-11 04:55:07 +00:00
3ebdd11939
Move target-arm/nwfpe into linux-user/arm/nwfpe
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4185 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-09 06:53:01 +00:00
6d9a42be17
Implement ARM floating point exception emulation
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4166 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-07 20:30:53 +00:00
6fbe23d50e
ARM N=Z=1 flag fix.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4156 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-01 17:19:11 +00:00
663715fbe2
ARM TCG conversion 16/16.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4153 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-31 03:49:36 +00:00
e677137d99
ARM TCG conversion 15/16.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4152 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-31 03:49:05 +00:00
ad69471ce5
ARM TCG conversion 14/16.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4151 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-31 03:48:30 +00:00
8f8e3aa451
ARM TCG conversion 13/16.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4150 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-31 03:48:01 +00:00
8984bd2e83
ARM TCG conversion 12/16.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4149 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-31 03:47:48 +00:00
5e3f878ad6
ARM TCG conversion 11/16.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4148 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-31 03:47:34 +00:00
4373f3ceeb
ARM TCG conversion 10/16.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4147 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-31 03:47:19 +00:00
b010980544
ARM TCG conversion 9/16.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4146 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-31 03:47:03 +00:00
d9ba48308d
ARM TCG conversion 8/16.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4145 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-31 03:46:50 +00:00
6ddbc6e4cf
ARM TCG conversion 7/16.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4144 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-31 03:46:33 +00:00
3670669ce2
ARM TCG conversion 6/16.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4143 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-31 03:46:19 +00:00
8f01245ee7
ARM TCG conversion 5/16.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4142 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-31 03:46:03 +00:00
1497c961af
ARM TCG conversion 4/16.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4141 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-31 03:45:50 +00:00
9a119ff6c1
ARM TCG conversion 3/16.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4140 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-31 03:45:35 +00:00
f51bbbfefe
ARM TCG conversion 2/16.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4139 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-31 03:45:13 +00:00
b26eefb68e
ARM TCG conversion 1/16.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4138 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-31 03:44:26 +00:00
57fec1fee9
use the TCG code generator
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3944 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-01 10:50:11 +00:00
01ba98161f
Handle cpu_model in copy_cpu(), by Kirill A. Shutemov.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3778 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-09 02:22:57 +00:00
2ad207d4a0
Thumb semihosting fixes.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3729 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-24 23:22:11 +00:00
f090c9d4ad
Add strict checking mode for softfp code.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3688 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-18 14:33:24 +00:00
2f6196984b
suppressed tgetx and tputx (initial patch by Thayne Harbaugh)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3653 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-16 10:46:05 +00:00
2f4a40e569
Prevent cpsr_write/_read be put out of line in op.o (fixes a segfault on some platforms).
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3633 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-13 01:50:15 +00:00
e160c51ccd
Fix msr_mask.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3584 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-11 14:36:36 +00:00
44f8625d23
fixed invalid type
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3582 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-11 12:35:55 +00:00
9ee6e8bb85
ARMv7 support.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3572 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-11 00:04:49 +00:00
aaed909a49
added cpu_model parameter to cpu_init()
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3562 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-10 15:15:54 +00:00
405ee3ad57
Invalidate TLBs when domains are changed (Matthew Warton).
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Legalise cp15 pid register writes (Matthew Warton).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3494 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-31 00:47:13 +00:00
273af66025
Adjust s390 addresses (the MSB is defined as "to be ignored").
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3486 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-29 14:39:49 +00:00
6ebbf39000
Replace is_user variable with mmu_idx in softmmu core,
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allowing support of more than 2 mmu access modes.
Add backward compatibility is_user variable in targets code when needed.
Implement per target cpu_mmu_index function, avoiding duplicated code
and #ifdef TARGET_xxx in softmmu core functions.
Implement per target mmu modes definitions. As an example, add PowerPC
hypervisor mode definition and Alpha executive and kernel modes definitions.
Optimize PowerPC case, precomputing mmu_idx when MSR register changes
and using the same definition in code translation code.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3384 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-14 07:07:08 +00:00
c732abe222
Unify '-cpu ?' option.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3380 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-12 06:47:46 +00:00
198a74de4c
Move get_sp_from_cpustate from cpu.h to target_signal.h.
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Enable sigaltstack processing for more architectures.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3253 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-27 16:44:32 +00:00
a04e134ad1
linux-user sigaltstack() syscall, by Thayne Harbaugh.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3252 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-27 13:57:58 +00:00
3b46e62427
find -type f | xargs sed -i 's/[\t ]*$//g' # Yes, again. Note the star in the regex.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3177 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-17 08:09:54 +00:00
5fafdf24ef
find -type f | xargs sed -i 's/[\t ]$//g' # on most files
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-16 21:08:06 +00:00
ce62e5ba09
Fix tb->size mishandling, by Daniel Jacobowitz.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3160 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-11 10:04:58 +00:00
2e23213f26
Special-case iWMMXt register transfer insns, which are in ARM LDC2/STC2 class.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3107 c046a42c-6fe2-441c-8c8c-71466251a162
2007-08-01 02:31:54 +00:00
330c4d61a6
Fix XScale MMU's extended small pages.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3093 c046a42c-6fe2-441c-8c8c-71466251a162
2007-07-29 22:21:45 +00:00
c3d2689d88
Basic OMAP310 support. Basic Palm Tungsten|E machine emulation.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3091 c046a42c-6fe2-441c-8c8c-71466251a162
2007-07-29 17:57:26 +00:00
82d179781b
Various reg offset shift typos.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3085 c046a42c-6fe2-441c-8c8c-71466251a162
2007-07-24 01:07:44 +00:00
aa268ea622
Thumb shifter carry flag fixes.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3083 c046a42c-6fe2-441c-8c8c-71466251a162
2007-07-22 18:16:42 +00:00
610c3c8afd
Reset ARM cp15.c1_sys to default values. Fix XScale cp15 accesses.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3013 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-24 12:09:48 +00:00
39524770b2
Fix "blx lr" (Lauro Venancio).
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2979 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-11 18:59:35 +00:00
7a774c875b
Use the same offset for all STR and STM instructions that store r15, as specified in ARM ARM (patch from Chris McNett).
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2970 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-10 13:53:18 +00:00
9467d44c4d
Move target-specific defines to the target directories.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2940 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-03 21:02:38 +00:00
bfed01fc79
Clean up of some target specifics in exec.c/cpu-exec.c.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2936 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-03 17:44:37 +00:00
1b1afeb95b
Don't touch carry flag in ASR <reg> with zero <reg>, submitted by Aurelien Jarno.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2843 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-21 17:48:01 +00:00
ce8198612e
ARM946 CPU support.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2783 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-08 02:30:40 +00:00
a90b7318ba
Implement power state changes (IDLE and SLEEP) for PXA.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2762 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-01 01:28:01 +00:00
9d55199763
Account for machine with RAM which is not mapped at 0x0 in arm_boot.c.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2757 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-30 02:24:42 +00:00
18c9b56060
Implement iwMMXt instruction set for the PXA270 cpu.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2752 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-30 02:02:17 +00:00
c1713132e0
Core features of ARM XScale processors. Main PXA270 and PXA255 peripherals.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2749 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-30 01:26:42 +00:00
c73c3aa081
Fix ARM fine pagetables.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2742 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-29 19:06:34 +00:00
9b3c35e0e6
cpu_get_phys_page_debug should return target_phys_addr_t
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instead of target_ulong to be consistent.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2633 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-07 11:21:28 +00:00
687fa640d4
Random bug fixes from code inspection, by Wang Cheng Yeh.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2580 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-02 08:18:36 +00:00
8294eba187
SPARC host fixes, by Ben Taylor.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2503 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-19 14:47:40 +00:00
5fd46862e5
ARM register index+writeback fix (Lauro Ramos Venancio).
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2481 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-17 01:43:01 +00:00
6658ffb81e
Watchpoint support (previous commit got eaten by Savannah server crash).
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2479 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-16 23:58:11 +00:00
f3d6b95e83
ARM reabbot support (orginal patch by Aurelien Jarno).
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2476 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-11 13:03:18 +00:00
5adb4839e3
Fix typo in help output.
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List ARM cpus.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2475 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-08 03:15:18 +00:00
3371d27293
Implement --cpu for ARM.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2474 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-08 03:04:12 +00:00
18acad9250
ARM doubleword post-modify fix (Daniel Jacobowitz).
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2424 c046a42c-6fe2-441c-8c8c-71466251a162
2007-02-14 20:17:03 +00:00
01d6a890b4
Sparc arm/mips/sparc register patch, by Martin Bochnig.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2377 c046a42c-6fe2-441c-8c8c-71466251a162
2007-02-02 01:03:34 +00:00
5a7b542bbd
siginfo fix for Darwin/Mac OS X, by Pierre d'Herbemont.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2369 c046a42c-6fe2-441c-8c8c-71466251a162
2007-01-31 12:16:51 +00:00
8e71621f78
Add ARM Angel semihosting to system emulation.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2340 c046a42c-6fe2-441c-8c8c-71466251a162
2007-01-20 17:12:09 +00:00
9042c0e20d
Check ELF binaries for machine type and endianness.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2274 c046a42c-6fe2-441c-8c8c-71466251a162
2006-12-23 14:18:40 +00:00
569f5d668c
compilation fix
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2205 c046a42c-6fe2-441c-8c8c-71466251a162
2006-10-29 15:10:09 +00:00
a94a6abff4
Fix ARM VFP debugging dumps.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2201 c046a42c-6fe2-441c-8c8c-71466251a162
2006-10-25 17:43:33 +00:00
d37aca6625
Fix comment typo.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2197 c046a42c-6fe2-441c-8c8c-71466251a162
2006-10-22 11:54:30 +00:00
78600320a8
Arm MMU fix (Justin Fletcher).
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2154 c046a42c-6fe2-441c-8c8c-71466251a162
2006-09-09 14:36:26 +00:00
d07edbfa00
Fix Arm cp15 c13 (Process ID) register writes.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2067 c046a42c-6fe2-441c-8c8c-71466251a162
2006-07-21 22:39:57 +00:00
567d4107a6
qsub fix (Wolfgang Schildbach)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2024 c046a42c-6fe2-441c-8c8c-71466251a162
2006-06-26 19:55:19 +00:00
26a76461f2
C99 64 bit printf
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2018 c046a42c-6fe2-441c-8c8c-71466251a162
2006-06-25 18:15:32 +00:00
191f9a93f4
ARM postincrememnt addressing fix.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1970 c046a42c-6fe2-441c-8c8c-71466251a162
2006-06-14 14:36:07 +00:00
159f366388
ARM undefined instruction execution (Jason Wessel)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1938 c046a42c-6fe2-441c-8c8c-71466251a162
2006-05-22 23:06:04 +00:00
358bf29e80
Thumb prefetch abort fix.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1805 c046a42c-6fe2-441c-8c8c-71466251a162
2006-04-09 14:38:57 +00:00
53a5960aad
Avoid accessing guest memory directly in usermode emulation.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1790 c046a42c-6fe2-441c-8c8c-71466251a162
2006-03-25 19:31:22 +00:00
8637c67fc5
Fix FIQ bank switching.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1786 c046a42c-6fe2-441c-8c8c-71466251a162
2006-03-14 14:20:32 +00:00
19b045dec9
Fix FPA condition codes (Ulrich Hecht).
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1784 c046a42c-6fe2-441c-8c8c-71466251a162
2006-03-11 21:03:16 +00:00
40f137e1ea
Add Arm926 core support.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1765 c046a42c-6fe2-441c-8c8c-71466251a162
2006-02-20 00:33:36 +00:00
2ae23e7504
Fix Arm msr spsr bug.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1761 c046a42c-6fe2-441c-8c8c-71466251a162
2006-02-11 16:20:39 +00:00
ce4defa062
Arm Linux EABI syscall support.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1756 c046a42c-6fe2-441c-8c8c-71466251a162
2006-02-09 16:49:55 +00:00
3aa22b4b53
Fix Thumb variable shift condition code bug.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1748 c046a42c-6fe2-441c-8c8c-71466251a162
2006-02-07 03:34:35 +00:00
191abaa2f0
Fix Arm interrupted ldm bug.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1743 c046a42c-6fe2-441c-8c8c-71466251a162
2006-02-04 21:50:36 +00:00
06c949e62a
Implement Arm BKPT instruction.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1740 c046a42c-6fe2-441c-8c8c-71466251a162
2006-02-04 19:35:26 +00:00
68998c5de3
cpu_reset() fix (Paul Brook)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1712 c046a42c-6fe2-441c-8c8c-71466251a162
2005-12-18 16:55:25 +00:00
6d7e63262c
switching to Arm mode in do_interrupt() (Paul Brook)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1711 c046a42c-6fe2-441c-8c8c-71466251a162
2005-12-18 16:54:08 +00:00
ee0971849e
Arm mulxy insn fix (Paul Brook)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1683 c046a42c-6fe2-441c-8c8c-71466251a162
2005-12-04 18:56:28 +00:00
9332f9dafa
ARM CPU suspend/halt (Paul Brook)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1663 c046a42c-6fe2-441c-8c8c-71466251a162
2005-11-26 10:46:39 +00:00
b5ff1b3127
ARM system emulation (Paul Brook)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1661 c046a42c-6fe2-441c-8c8c-71466251a162
2005-11-26 10:38:39 +00:00
173d6cfe51
cpu_exec_init() change
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1643 c046a42c-6fe2-441c-8c8c-71466251a162
2005-11-21 23:32:20 +00:00
a316d3353c
added CPU_COMMON and CPUState.tb_jmp_cache[]
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1630 c046a42c-6fe2-441c-8c8c-71466251a162
2005-11-20 10:32:34 +00:00
6e256c935c
use direct jump only for jumps in the same page
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1629 c046a42c-6fe2-441c-8c8c-71466251a162
2005-11-20 10:32:05 +00:00
2531fc7bc0
thumb BLX insn fix (Paul Brook)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1607 c046a42c-6fe2-441c-8c8c-71466251a162
2005-11-06 19:36:29 +00:00
c53be33474
suppressed JUMP_TB (Paul Brook)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1594 c046a42c-6fe2-441c-8c8c-71466251a162
2005-10-30 21:39:19 +00:00
a9049a07bb
moved common softmmu code to common header (Paul Brook)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1580 c046a42c-6fe2-441c-8c8c-71466251a162
2005-10-30 18:16:26 +00:00
1e8a7cfd11
Show thumb state in cpu dump (Paul Brook)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1555 c046a42c-6fe2-441c-8c8c-71466251a162
2005-08-21 10:14:28 +00:00
bc380d1719
ARM VFP dump fix (Paul Brook)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1432 c046a42c-6fe2-441c-8c8c-71466251a162
2005-05-13 22:50:47 +00:00
ff8263a951
ARM saturating arithmetic fixes (Paul Brook)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1431 c046a42c-6fe2-441c-8c8c-71466251a162
2005-05-13 22:45:23 +00:00
5899f386ba
ARM thumb fixes
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1418 c046a42c-6fe2-441c-8c8c-71466251a162
2005-04-27 20:25:20 +00:00
e50e6a2019
better arm conditionnal execution implementation (Paul Brook)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1399 c046a42c-6fe2-441c-8c8c-71466251a162
2005-04-26 20:36:11 +00:00
74c161bd17
Fix dumping of arm registers (Paul Brook)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1387 c046a42c-6fe2-441c-8c8c-71466251a162
2005-04-23 18:46:03 +00:00
8aaca4c0b4
ARM singlestep support (Paul Brook)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1384 c046a42c-6fe2-441c-8c8c-71466251a162
2005-04-23 18:27:52 +00:00
89344d5ad7
arm vfp fcmp and fcmpe instructions fix (Paul Brook)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1382 c046a42c-6fe2-441c-8c8c-71466251a162
2005-04-23 18:21:13 +00:00
1fddef4b1b
gdb support for user mode (Paul Brook)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1367 c046a42c-6fe2-441c-8c8c-71466251a162
2005-04-17 19:16:13 +00:00
8e96005d86
VFP register ordering (Paul Brook)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1355 c046a42c-6fe2-441c-8c8c-71466251a162
2005-04-07 19:42:46 +00:00
b7a100da9c
removed extern inline (Paul Brook)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1340 c046a42c-6fe2-441c-8c8c-71466251a162
2005-03-20 10:34:22 +00:00
53cd663792
soft float support
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1337 c046a42c-6fe2-441c-8c8c-71466251a162
2005-03-13 18:50:23 +00:00
2049521883
use the generic soft float code
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1333 c046a42c-6fe2-441c-8c8c-71466251a162
2005-03-13 16:55:58 +00:00
b7bcbe9524
ARM VFP support (Paul Brook)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1309 c046a42c-6fe2-441c-8c8c-71466251a162
2005-02-22 19:27:29 +00:00
b8a9e8f133
initial user mmu support
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1270 c046a42c-6fe2-441c-8c8c-71466251a162
2005-02-07 23:10:07 +00:00
a8d3431ae9
endianness fixes
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1268 c046a42c-6fe2-441c-8c8c-71466251a162
2005-02-07 12:43:57 +00:00
7ff4d2180b
CF generator for constant operands
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1267 c046a42c-6fe2-441c-8c8c-71466251a162
2005-02-07 12:42:35 +00:00
78573df6b2
SBCS fix (Paul Brook)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1264 c046a42c-6fe2-441c-8c8c-71466251a162
2005-02-02 20:43:01 +00:00
99c475abf1
armv5te support (Paul Brook)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1258 c046a42c-6fe2-441c-8c8c-71466251a162
2005-01-31 20:45:13 +00:00
0fa85d43d4
64 bit target support
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1195 c046a42c-6fe2-441c-8c8c-71466251a162
2005-01-03 23:43:32 +00:00
526ff7de82
removed warnings
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1193 c046a42c-6fe2-441c-8c8c-71466251a162
2005-01-03 23:41:14 +00:00
1e8d4eec48
more complete ARM shift fix
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1168 c046a42c-6fe2-441c-8c8c-71466251a162
2004-12-08 23:40:14 +00:00
88920f344d
ARM shift fix (Paul Brook)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1167 c046a42c-6fe2-441c-8c8c-71466251a162
2004-12-08 22:28:39 +00:00
0d1a29f9fc
correct handling of saved host registers
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1122 c046a42c-6fe2-441c-8c8c-71466251a162
2004-10-12 22:01:28 +00:00
7fe48483cd
monitor fixes
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1110 c046a42c-6fe2-441c-8c8c-71466251a162
2004-10-09 18:08:01 +00:00
7496f5266c
cpu_single_env init
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@967 c046a42c-6fe2-441c-8c8c-71466251a162
2004-06-22 10:56:50 +00:00
beddab753d
arm load/store half word fix (Ulrich Hecht)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@785 c046a42c-6fe2-441c-8c8c-71466251a162
2004-05-05 18:36:10 +00:00
d720b93d0b
precise self modifying code support
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@745 c046a42c-6fe2-441c-8c8c-71466251a162
2004-04-25 17:57:43 +00:00
e19e89a5d4
more log items
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@676 c046a42c-6fe2-441c-8c8c-71466251a162
2004-03-21 17:08:23 +00:00
537730b956
zero offset optimisation
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@635 c046a42c-6fe2-441c-8c8c-71466251a162
2004-02-22 13:40:57 +00:00
3d57da2a70
suppressed dummy FPU ops
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@610 c046a42c-6fe2-441c-8c8c-71466251a162
2004-02-16 21:47:14 +00:00
00406dff19
added arm nwfpe support (initial patch by Ulrich Hecht)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@609 c046a42c-6fe2-441c-8c8c-71466251a162
2004-02-16 21:43:58 +00:00
3cf1e035ba
added TARGET_LONG_BITS
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@580 c046a42c-6fe2-441c-8c8c-71466251a162
2004-01-24 15:19:09 +00:00
a6b025d37d
added cpu_get_phys_page_debug()
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@579 c046a42c-6fe2-441c-8c8c-71466251a162
2004-01-24 15:18:16 +00:00
bd49793889
use generic GenOpFunc
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@543 c046a42c-6fe2-441c-8c8c-71466251a162
2004-01-05 00:06:41 +00:00
163a7cb620
imull fix (suggested by Robert J. Harley)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@478 c046a42c-6fe2-441c-8c8c-71466251a162
2003-11-30 19:40:08 +00:00
2e134c9c55
64-bit multiplication fix (Ulrich Hecht)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@446 c046a42c-6fe2-441c-8c8c-71466251a162
2003-11-11 13:55:33 +00:00
e748ba4f53
ARM half word load/store fix (Ulrich Hecht)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@438 c046a42c-6fe2-441c-8c8c-71466251a162
2003-11-03 22:25:25 +00:00
2c0262afa7
new directory structure
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@385 c046a42c-6fe2-441c-8c8c-71466251a162
2003-09-30 20:34:21 +00:00
Paul Brook
aliguori
aurel32
pbrook
balrog
blueswir1
ths
bellard
j_mayer