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194 Commits

Author SHA1 Message Date
Richard Henderson 2c423fc070 target-s390: Convert subchannel instructions 
While we're at it, list all of the chapter 14 subchannel insns.
Which is easy since all merely need indicate non-operation.

Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:43 -08:00
Richard Henderson 5cc69c54f6 target-s390: Convert RRBE 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:43 -08:00
Richard Henderson 2bbde27f25 target-s390: Convert SSKE 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:43 -08:00
Richard Henderson 8026417c71 target-s390: Convert ISKE 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:43 -08:00
Richard Henderson cfef53e356 target-s390: Convert IPTE 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:43 -08:00
Richard Henderson 411fea3d84 target-s390: Convert STAP 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:43 -08:00
Richard Henderson e805a0d39e target-s390: Convert SPX, STPX 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:43 -08:00
Richard Henderson 0568d8aab0 target-s390: Convert PTLB 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:42 -08:00
Richard Henderson 28d5555667 target-s390: Convert SPKA 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:42 -08:00
Richard Henderson c4f0a863c3 target-s390: Convert SPT, STPT 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:42 -08:00
Richard Henderson dd3eb7b54f target-s390: Convert SCKC, STCKC 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:42 -08:00
Richard Henderson 434c91a5f4 target-s390: Convert STCK 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:42 -08:00
Richard Henderson 3528979951 target-s390: Convert SCK 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:42 -08:00
Richard Henderson 71bd666963 target-s390: Convert STIDP 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:42 -08:00
Richard Henderson 4600c994d9 target-s390: Convert SRST 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:42 -08:00
Richard Henderson aa31bf6031 target-s390: Convert CLST, MVST 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:42 -08:00
Richard Henderson ee6c38d5b1 target-s390: Convert MVPG 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:42 -08:00
Richard Henderson d62a4c97f2 target-s390: Convert EAR, SAR 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:42 -08:00
Richard Henderson 374724f91a target-s390: Convert CKSM 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:42 -08:00
Richard Henderson 6e2704e74d target-s390: Convert IPM 
Note that the previous placement of the PM field was incorrect.

Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:42 -08:00
Richard Henderson 8379bfdbca target-s390: Convert LFPC, SFPC 
Note that we were failing to set the rounding mode in fpu_status.

Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:41 -08:00
Richard Henderson 102bf2c635 target-s390: Convert FLOGR 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:41 -08:00
Richard Henderson 683bb9a888 target-s390: Convert CONVERT FROM FIXED 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:41 -08:00
Richard Henderson 68c8bd93cc target-s390: Convert CONVERT TO FIXED 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:41 -08:00
Richard Henderson 24db8412ec target-s390: Convert LOAD ZERO 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:41 -08:00
Richard Henderson 16d7b2a43b target-s390: Convert FP SQUARE ROOT 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:41 -08:00
Richard Henderson 5d7fd045ca target-s390: Convert FP LOAD COMPLIMENT, NEGATIVE, POSITIVE 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:41 -08:00
Richard Henderson 31aa97d1ed target-s390: Convert TEST DATA CLASS 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:41 -08:00
Richard Henderson 722bfec331 target-s390: Convert MULTIPLY AND ADD, SUBTRACT 
Use the new float*_muladd interface to softfloat.

Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:41 -08:00
Richard Henderson 83b00736f3 target-s390: Convert FP MULTIPLY 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:41 -08:00
Richard Henderson f08a5c311d target-s390: Convert FP DIVIDE 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:41 -08:00
Richard Henderson 1a800a2dce target-s390: Convert FP SUBTRACT 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:41 -08:00
Richard Henderson 587626f8da target-s390: Convert FP ADD, COMPARE, LOAD TEST/ROUND/LENGTHENED 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:40 -08:00
Richard Henderson 7691c23b1f target-s390: Convert LLGT 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:40 -08:00
Richard Henderson e025e52aba target-s390: Convert STORE REVERSED 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:40 -08:00
Richard Henderson d54f586541 target-s390: Convert LOAD REVERSED 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:40 -08:00
Richard Henderson 3e398cf9c2 target-s390: Convert LOAD CONTROL, part 2 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:40 -08:00
Richard Henderson 112bf0791d target-s390: Convert TPROT 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:40 -08:00
Richard Henderson 2ae6805906 target-s390: Convert STCM 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:40 -08:00
Richard Henderson 32a44d5882 target-s390: Convert CLM 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:40 -08:00
Richard Henderson f3de39c485 target-s390: Convert COMPARE AND SWAP 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:40 -08:00
Richard Henderson 504488b827 target-s390: Convert LCTL, STCTL 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:40 -08:00
Richard Henderson ea20490fdd target-s390: Convert EFPC, STFPC 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:40 -08:00
Richard Henderson 0c2400155b target-s390: Convert SIGP 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:39 -08:00
Richard Henderson d8fe4a9c28 target-s390: Convert LRA 
Note that truncating the store to r1 based on PSW_MASK_64
is incorrect.  We always modify the entire register.

Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:39 -08:00
Richard Henderson 97c3ab61c4 target-s390: Convert MVCP, MVCS 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:39 -08:00
Richard Henderson 4f7403d52b target-s390: Convert CLC 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:39 -08:00
Richard Henderson 0a94903959 target-s390: Convert NC, XC, OC, TR, UNPK 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:39 -08:00
Richard Henderson af9e5a04ea target-s390: Convert MVC 
The code that was in gen_op_mvc was a bit confused wrt what lengths
it wanted to handle.  I also disbelieve that the inline memset is
worthwhile.

Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:39 -08:00
Richard Henderson eb66e6a969 target-s390: Convert CLCLE, MVCLE 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:39 -08:00
Richard Henderson 7df3e93aa9 target-s390: Convert LAM, STAM 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:39 -08:00
Richard Henderson 145cdb4019 target-s390: Convert STNSM, STOSM 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:39 -08:00
Richard Henderson a05d2b6b83 target-s390: Convert NI, XI, OI 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:39 -08:00
Richard Henderson 6a04d76a81 target-s390: Convert MOVE 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:39 -08:00
Richard Henderson 77f8d6c3ed target-s390: Convert LOAD, STORE MULTIPLE 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:39 -08:00
Richard Henderson a79ba3398a target-s390: Convert SHIFT DOUBLE 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:38 -08:00
Richard Henderson cbe24bfa91 target-s390: Convert SHIFT, ROTATE SINGLE 
Note that we were missing the 32-bit SLA.

Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:38 -08:00
Richard Henderson 972e35b966 target-s390: Convert DIAGNOSE 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:38 -08:00
Richard Henderson 8b5ff57115 target-s390: Convert LOAD PSW 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:38 -08:00
Richard Henderson 7d30bb73db target-s390: Convert SET SYSTEM MASK 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:38 -08:00
Richard Henderson c49daa51a8 target-s390: Convert CONVERT TO DECIMAL 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:38 -08:00
Richard Henderson 00574261e1 target-s390: Convert FP STORE 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:38 -08:00
Richard Henderson 6e764e97ca target-s390: Convert EXECUTE 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:38 -08:00
Richard Henderson 58a9e35bcc target-s390: Convert INSERT CHARACTERS UNDER MASK 
Change the CC handling to be more like TEST UNDER MASK, with val & mask.
This lets us handle ICMH much more like ICM.

Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:38 -08:00
Richard Henderson afdc70bea0 target-s390: Convert INSERT CHARACTER 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:38 -08:00
Richard Henderson d764a8d12b target-s390: Convert FP LOAD 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:38 -08:00
Richard Henderson e1eaada955 target-s390: Convert MOVE LONG 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:37 -08:00
Richard Henderson b9836c1acd target-s390: Convert SUPERVISOR CALL 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:37 -08:00
Richard Henderson d9a3992799 target-s390: Convert SET ADDRESSING MODE 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:37 -08:00
Richard Henderson 00d2dc192f target-s390: Convert TEST UNDER MASK 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:37 -08:00
Richard Henderson 891452e5e2 target-s390: Convert DIVIDE 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:00:29 -08:00
Richard Henderson c61aad6943 target-s390: Convert BRANCH ON COUNT 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:00:29 -08:00
Richard Henderson 7233f2ed17 target-s390: Convert BRANCH ON CONDITION 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:00:29 -08:00
Richard Henderson 8ac33cdb8b target-s390: Convert BRANCH AND SAVE 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:00:29 -08:00
Richard Henderson 4e4bb43899 target-s390: Convert ADD LOGICAL CARRY and SUBTRACT LOGICAL BORROW 
I'm resonably certain that the carry/borrow-out condition for both
helpers was incorrect, failing to take into account the carry-in.
Adding the new CC_OP codes also allows removing the awkward interface
we used for the slb helpers.

Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:00:29 -08:00
Richard Henderson 2b280b9708 target-s390: Convert STORE 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:00:28 -08:00
Richard Henderson facfc86487 target-s390: Convert AND, OR, XOR, INSERT IMMEDIATE 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:00:28 -08:00
Richard Henderson b9bca3e57a target-s390: Convert LOAD COMPLIMENT, POSITIVE, NEGATIVE 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:00:28 -08:00
Richard Henderson ade9dea429 target-s390: Convert LOAD LOGICAL IMMEDIATE 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:00:28 -08:00
Richard Henderson 11bf2d73d0 target-s390: Convert LOAD AND TEST 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:00:28 -08:00
Richard Henderson c698d87687 target-s390: Convert LOAD (LOGICAL) BYTE, CHARACTER, HALFWORD 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:00:28 -08:00
Richard Henderson aedec19d62 target-s390: Convert LOAD ADDRESS 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:00:28 -08:00
Richard Henderson 22c37a08bd target-s390: Convert LOAD, LOAD LOGICAL 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:00:28 -08:00
Richard Henderson a7e836d5eb target-s390: Convert COMPARE, COMPARE LOGICAL 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:00:28 -08:00
Richard Henderson 3bbfbd1f95 target-s390: Convert AND, OR, XOR 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:00:28 -08:00
Richard Henderson 1ac5889f48 target-s390: Convert 64-bit MULTIPLY LOGICAL 
Use a new "retxl" member of CPUS290XState to return the "eXtra Low" part
of a 128-bit value.  That said, this will get used when two independent
values need returning (e.g. quotient+remainder) as well.

At the same time, shuffle the elements of CPUS390XState to get this new
space from existing padding in the structure.

Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:00:28 -08:00
Richard Henderson d87aaf934f target-s390: Convert 32-bit MULTIPLY, MULTIPLY LOGICAL 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:00:28 -08:00
Richard Henderson d1c04a2ba0 target-s390: Convert MULTIPLY HALFWORD, SINGLE 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:00:28 -08:00
Richard Henderson e272b3ace3 target-s390: Implement ADD LOGICAL WITH SIGNED IMMEDIATE 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:00:28 -08:00
Richard Henderson d82287dee9 target-s390: Convert ADD HALFWORD 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:00:28 -08:00
Richard Henderson d5a103cd6e target-s390: Reorg exception handling 
Make the user path more like the system path.  Prepare for more kinds
of runtime exceptions.  Rename ILC to ILEN to make it clear that we
want to pass around a full instruction length, rather than a "code"
that happens to be stored one bit left in a larger field.

Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:00:28 -08:00
Richard Henderson 3fde06f5fb target-s390: Split out disas_jcc 
Lots of duplicated code replaced with a couple of tables.  We no longer
attempt to manually invert the logic operation: the comments now match
the code.  In the fully general test, constant propagate (1 << (3 - cc))
into (8 >> cc).

The new function will be usable by non-branch insns as well.

Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:00:27 -08:00
Richard Henderson ad044d09de target-s390: Add format based disassassmbly infrastructure 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:00:27 -08:00
Richard Henderson 51855ecf1a target-s390: Fix PSW_MASK handling 
We were treating psw.mask as the 32-bit quantity it is in ESA mode.
In particular, the CC field was at the wrong place.

Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:00:27 -08:00
Richard Henderson 2f22e2ec79 target-s390: Tidy unconditional BRCL 
Yes, we're about to rewrite all of this, but having this unconditional
jump recompute cc_op is a large source of "false diff errors" when
trying to examine before and after dumps.

Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:00:27 -08:00
Richard Henderson 9d126faf42 target-s390: Fix BCR 
There were are two exit paths for which we forgot to
copy s->cc_op back to the tcg register.

Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:00:27 -08:00
Richard Henderson afd43fecfe target-s390: Fix SACF exit 
DISAS_EXCP is exit via exception; we wanted DISAS_JUMP.
This matters when we start cleaning up the TB exit paths.

Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:00:27 -08:00
Richard Henderson 7e68da2a9d target-s390: Register helpers 
Which highlights a lot of cc helpers that no longer exist.

Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:00:27 -08:00
Richard Henderson 431253c28f target-s390: Use TCG registers for FPR 
At the same time, tidy other usages of tcg_gen_deposit_i64.
In some cases we can "type cast" rather than extend, and in
others we can allow tcg_gen_deposit_i64 itself to optimize
the HOST_LONG_BITS==32 case.

Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:00:27 -08:00
Richard Henderson 063eb0f303 target-s390: Add missing temp_free in gen_op_calc_cc 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:00:27 -08:00