..
insn_trans
Sixth RISC-V PR for 8.0
2023-03-07 12:53:00 +00:00
arch_dump.c
bitmanip_helper.c
common-semi-target.h
cpu_bits.h
target/riscv: Add csr support for svadu
2023-03-01 17:28:15 -08:00
cpu_helper.c
Merge patch series "target/riscv: Add support for Svadu extension"
2023-03-01 17:30:34 -08:00
cpu_user.h
cpu_vendorid.h
RISC-V: Add initial support for T-Head C906
2023-02-07 08:19:23 +10:00
cpu-param.h
target/riscv: Remove NB_MMU_MODES
define
2023-03-13 06:44:37 -07:00
cpu.c
riscv: Introduce satp mode hw capabilities
2023-03-06 08:09:43 -08:00
cpu.h
riscv: Introduce satp mode hw capabilities
2023-03-06 08:09:43 -08:00
crypto_helper.c
csr.c
includes: move tb_flush into its own header
2023-03-07 17:06:33 +00:00
debug.c
target/riscv: set tval for triggered watchpoints
2023-02-07 08:19:23 +10:00
debug.h
target/riscv: Add itrigger support when icount is enabled
2023-01-06 10:42:55 +10:00
fpu_helper.c
target/riscv: Remove helper_set_rod_rounding_mode
2023-01-20 10:14:14 +10:00
gdbstub.c
gdbstub: move register helpers into standalone include
2023-03-07 20:44:08 +00:00
helper.h
target/riscv: implement Zicbom extension
2023-03-05 11:49:42 -08:00
insn16.decode
insn32.decode
target/riscv: add Zicbop cbo.prefetch{i, r, m} placeholder
2023-03-05 11:49:43 -08:00
instmap.h
internals.h
Kconfig
kvm_riscv.h
kvm-stub.c
kvm.c
target/riscv: fix SBI getchar handler for KVM
2023-02-07 08:19:23 +10:00
m128_helper.c
machine.c
target/riscv/cpu: remove CPUArchState::features and friends
2023-03-01 13:47:16 -08:00
meson.build
RISC-V: Adding XTheadCmo ISA extension
2023-02-07 08:19:23 +10:00
monitor.c
target/riscv: remove RISCV_FEATURE_MMU
2023-03-01 13:47:15 -08:00
op_helper.c
target/riscv: implement Zicbom extension
2023-03-05 11:49:42 -08:00
pmp.c
target/riscv: remove RISCV_FEATURE_MMU
2023-03-01 13:47:15 -08:00
pmp.h
target/riscv: Fix PMP propagation for tlb
2023-01-06 10:42:55 +10:00
pmu.c
pmu.h
riscv: Clean up includes
2023-02-08 07:28:05 +01:00
sbi_ecall_interface.h
time_helper.c
target/riscv: No need to re-start QEMU timer when timecmp == UINT64_MAX
2023-02-07 08:19:23 +10:00
time_helper.h
trace-events
trace.h
translate.c
Sixth RISC-V PR for 8.0
2023-03-07 12:53:00 +00:00
vector_helper.c
target/riscv/vector_helper.c: avoid env_archcpu() when reading RISCVCPUConfig
2023-03-01 18:09:45 -08:00
xthead.decode
RISC-V: Adding XTheadFmv ISA extension
2023-02-07 08:19:23 +10:00
XVentanaCondOps.decode