2014-10-15 10:21:25 +02:00
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2014-10-15 Tristan Gingold <gingold@adacore.com>
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* configure: Regenerate.
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2014-10-09 14:16:53 +02:00
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2014-10-09 Jose E. Marchesi <jose.marchesi@oracle.com>
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* sparc-opc.c (sparc-opcodes): Remove instructions `chkpt',
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`commit', `random', `wr r,r,%cps', `wr r,i,%cps' and `rd %cps,r'.
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Annotate table with HWCAP2 bits.
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Add instructions xmontmul, xmontsqr, xmpmul.
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(sparc-opcodes): Add the `mwait', `wr r,r,%mwait', `wr
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r,i,%mwait' and `rd %mwait,r' instructions.
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Add rd/wr instructions for accessing the %mcdper ancillary state
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register.
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(sparc-opcodes): Add sparc5/vis4.0 instructions:
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subxc, subxccc, fpadd8, fpadds8, fpaddus8, fpaddus16, fpcmple8,
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fpcmpgt8, fpcmpule16, fpcmpugt16, fpcmpule32, fpcmpugt32, fpmax8,
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fpmax16, fpmax32, fpmaxu8, fpmaxu16, fpmaxu32, fpmin8, fpmin16,
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fpmin32, fpminu8, fpminu16, fpminu32, fpsub8, fpsubs8, fpsubus8,
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fpsubus16, and faligndatai.
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* sparc-dis.c (v9a_asr_reg_names): Add the %mwait (%asr28)
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ancillary state register to the table.
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(print_insn_sparc): Handle the %mcdper ancillary state register.
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(print_insn_sparc): Handle new operand type '}'.
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2014-09-22 18:38:53 +02:00
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2014-09-22 H.J. Lu <hongjiu.lu@intel.com>
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* i386-dis.c (MOD_0F20): Removed.
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(MOD_0F21): Likewise.
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(MOD_0F22): Likewise.
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(MOD_0F23): Likewise.
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(dis386_twobyte): Replace MOD_0F20, MOD_0F21, MOD_0F22 and
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MOD_0F23 with "movZ".
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(mod_table): Remove MOD_0F20, MOD_0F21, MOD_0F22 and MOD_0F23.
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(OP_R): Check mod/rm byte and call OP_E_register.
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2014-09-10 03:46:32 +02:00
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2014-09-16 Kuan-Lin Chen <kuanlinchentw@gmail.com>
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* nds32-asm.c (nds32_opcodes, operand_fields, keyword_im5_i,
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keyword_im5_m, keyword_accumulator, keyword_aridx, keyword_aridx2,
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keyword_aridxi): Add audio ISA extension.
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(keyword_gpr, keyword_usr, keyword_sr, keyword_cp, keyword_cpr,
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keyword_fsr, keyword_fdr, keyword_abdim, keyword_abm, keyword_dpref_st,
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keyword_cctl_lv, keyword_standby_st, keyword_msync_st): Adjust scrope
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for nds32-dis.c using.
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(build_opcode_syntax): Remove dead code.
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(parse_re, parse_a30b20, parse_rt21, parse_rte_start, parse_rte_end,
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parse_rte69_start, parse_rte69_end, parse_im5_ip, parse_im5_mr,
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parse_im6_ip, parse_im6_iq, parse_im6_mr, parse_im6_ms): Add audio ISA
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operand parser.
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* nds32-asm.h: Declare.
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* nds32-dis.c: Use array nds32_opcodes to disassemble instead of
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decoding by switch.
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Add support for MIPS R6.
bfd/
* aoutx.h (NAME (aout, machine_type)): Add mips32r6 and mips64r6.
* archures.c (bfd_architecture): Likewise.
* bfd-in2.h (bfd_architecture): Likewise.
(bfd_reloc_code_real): Add relocs BFD_RELOC_MIPS_21_PCREL_S2,
BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3 and
BFD_RELOC_MIPS_19_PCREL_S2.
* cpu-mips.c (arch_info_struct): Add mips32r6 and mips64r6.
* elf32-mips.c: Define relocs R_MIPS_PC21_S2, R_MIPS_PC26_S2
R_MIPS_PC18_S3, R_MIPS_PC19_S2, R_MIPS_PCHI16 and R_MIPS_PCLO16.
(mips_reloc_map): Add entries for BFD_RELOC_MIPS_21_PCREL_S2,
BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3,
BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and
BFD_RELOC_LO16_PCREL.
* elf64-mips.c: Define REL, and RELA relocations R_MIPS_PC21_S2,
R_MIPS_PC26_S2, R_MIPS_PC18_S3, R_MIPS_PC19_S2, R_MIPS_PCHI16
and R_MIPS_PCLO16.
(mips_reloc_map): Add entries for BFD_RELOC_MIPS_21_PCREL_S2,
BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3,
BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and
BFD_RELOC_LO16_PCREL.
* elfn32-mips.c: Likewise.
* elfxx-mips.c (MIPSR6_P): New define.
(mipsr6_exec_plt_entry): New array.
(hi16_reloc_p): Add support for R_MIPS_PCHI16.
(lo16_reloc_p): Add support for R_MIPS_PCLO16.
(aligned_pcrel_reloc_p): New function.
(mips_elf_relocation_needs_la25_stub): Add support for relocs:
R_MIPS_PC21_S2 and R_MIPS_PC26_S2.
(mips_elf_calculate_relocation): Add support for relocs:
R_MIPS_PC21_S2, R_MIPS_PC26_S2, R_MIPS_PC18_S3, R_MIPS_PC19_S2,
R_MIPS_PCHI16 and R_MIPS_PCLO16.
(_bfd_elf_mips_mach): Add support for mips32r6 and mips64r6.
(mips_elf_add_lo16_rel_addend): Add support for R_MIPS_PCHI16.
(_bfd_mips_elf_check_relocs): Add support for relocs:
R_MIPS_PC21_S2 and R_MIPS_PC26_S2.
(_bfd_mips_elf_relocate_section): Add a check for unaligned
pc relative relocs.
(_bfd_mips_elf_finish_dynamic_symbol): Add support for MIPS r6
plt entry.
(mips_set_isa_flags): Add support for mips32r6 and mips64r6.
(_bfd_mips_elf_print_private_bfd_data): Likewise.
(mips_32bit_flags_p): Add support for mips32r6.
* libbfd.h (bfd_reloc_code_real_names): Add entries for
BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2,
BFD_RELOC_MIPS_18_PCREL_S3 and BFD_RELOC_MIPS_19_PCREL_S2.
* reloc.c: Document relocs BFD_RELOC_MIPS_21_PCREL_S2,
BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3 and
BFD_RELOC_MIPS_19_PCREL_S2.
binutils/
* readelf.c (get_machine_flags): Add support for mips32r6 and
mips64r6.
elfcpp/
* mips.h (E_MIPS_ARCH_32R6, E_MIPS_ARCH_64R6): New enum constants.
gas/
* config/tc-mips.c (mips_nan2008): New static global.
(mips_flag_nan2008): Removed.
(LL_SC_FMT): New define.
(COP12_FMT): Updated.
(ISA_IS_R6): New define.
(ISA_HAS_64BIT_REGS): Add mips64r6.
(ISA_HAS_DROR): Likewise.
(ISA_HAS_64BIT_FPRS): Add mips32r6 and mips64r6.
(ISA_HAS_ROR): Likewise.
(ISA_HAS_ODD_SINGLE_FPR): Likewise.
(ISA_HAS_MXHC1): Likewise.
(hilo_interlocks): Likewise.
(md_longopts): Likewise.
(ISA_HAS_LEGACY_NAN): New define.
(options): Add OPTION_MIPS32R6 and OPTION_MIPS64R6.
(mips_ase): Add field rem_rev.
(mips_ases): Updated to add which ISA an ASE was removed in.
(mips_isa_rev): Add support for mips32r6 and mips64r6.
(mips_check_isa_supports_ase): Add support to check if an ASE
has been removed in the specified MIPS ISA revision.
(validate_mips_insn): Skip '-' character.
(macro_build): Likewise.
(mips_check_options): Prevent R6 working with fp32, mips16,
micromips, or branch relaxation.
(file_mips_check_options): Set R6 floating point registers to
64 bit. Also deal with the nan2008 option.
(limited_pcrel_reloc_p): Add relocs: BFD_RELOC_MIPS_21_PCREL_S2,
BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3,
BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and
BFD_RELOC_LO16_PCREL.
(operand_reg_mask): Add support for OP_SAME_RS_RT, OP_CHECK_PREV
and OP_NON_ZERO_REG.
(match_check_prev_operand): New static function.
(match_same_rs_rt_operand): New static function.
(match_non_zero_reg_operand): New static function.
(match_operand): Added entries for: OP_SAME_RS_RT, OP_CHECK_PREV
and OP_NON_ZERO_REG.
(insns_between): Added case to deal with forbidden slots.
(append_insn): Added support for relocs: BFD_RELOC_MIPS_21_PCREL_S2
and BFD_RELOC_MIPS_26_PCREL_S2.
(match_insn): Add support for operands -A, -B, +' and +". Also
skip '-' character.
(mips_percent_op): Add entries for %pcrel_hi and %pcrel_lo.
(md_parse_option): Add support for mips32r6 and mips64r6. Also
update the nan option handling.
(md_pcrel_from): Add cases for relocs: BFD_RELOC_MIPS_21_PCREL_S2,
BFD_RELOC_MIPS_26_PCREL_S2.
(mips_force_relocation): Prevent forced relaxation for MIPS r6.
(md_apply_fix): Add support for relocs: BFD_RELOC_MIPS_21_PCREL_S2,
BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3,
BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and
BFD_RELOC_LO16_PCREL.
(s_mipsset): Add support for mips32r6 and mips64r6.
(s_nan): Update to support the new nan2008 framework.
(tc_gen_reloc): Add relocs: BFD_RELOC_MIPS_21_PCREL_S2,
BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3,
BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and
BFD_RELOC_LO16_PCREL.
(mips_elf_final_processing): Updated to use the mips_nan2008.
(mips_cpu_info_table): Add entries for mips32r6 and mips64r6.
(macro): Enable ldc2, sdc2, ll, lld, swc2, sc, scd, cache, pref
macros for R6.
(mips_fix_adjustable): Make PC relative R6 relocations relative
to the symbol and not the section.
* configure.ac: Add support for mips32r6 and mips64r6.
* configure: Regenerate.
* doc/c-mips.texi: Document the -mips32r6 and -mips64r6 command line
options.
* doc/as.texinfo: Likewise.
gas/testsuite/
* gas/mips/24k-triple-stores-1.s: If testing for r6 prevent
non-supported instructions from being tested.
* gas/mips/24k-triple-stores-2.s: Likewise.
* gas/mips/24k-triple-stores-3.s: Likewise.
* gas/mips/24k-triple-stores-6.s: Likewise.
* gas/mips/beq.s: Likewise.
* gas/mips/eva.s: Likewise.
* gas/mips/ld-zero-3.s: Likewise.
* gas/mips/mips32-cp2.s: Likewise.
* gas/mips/mips32.s: Likewise.
* gas/mips/mips4.s: Likewise.
* gas/mips/add.s: Don't test the add instructions if r6, and
add padding.
* gas/mips/add.d: Check for a triple dot not a nop at the end of the
disassembly output.
* gas/mips/micromips@add.d: Likewise.
* gas/mips/mipsr6@24k-branch-delay-1.d: New file.
* gas/mips/mipsr6@24k-triple-stores-1.d: New file.
* gas/mips/mipsr6@24k-triple-stores-2-llsc.d: New file.
* gas/mips/mipsr6@24k-triple-stores-2.d: New file.
* gas/mips/mipsr6@24k-triple-stores-3.d: New file.
* gas/mips/mipsr6@24k-triple-stores-6.d: New file.
* gas/mips/mipsr6@add.d: New file.
* gas/mips/mipsr6@attr-gnu-4-1-msingle-float.l: New file.
* gas/mips/mipsr6@attr-gnu-4-1-msingle-float.s: New file.
* gas/mips/mipsr6@attr-gnu-4-1-msoft-float.l: New file.
* gas/mips/mipsr6@attr-gnu-4-1-msoft-float.s: New file.
* gas/mips/mipsr6@attr-gnu-4-2-mdouble-float.l: New file.
* gas/mips/mipsr6@attr-gnu-4-2-mdouble-float.s: New file.
* gas/mips/mipsr6@beq.d: New file.
* gas/mips/mipsr6@bge.d: New file.
* gas/mips/mipsr6@bgeu.d: New file.
* gas/mips/mipsr6@blt.d: New file.
* gas/mips/mipsr6@bltu.d: New file.
* gas/mips/mipsr6@branch-misc-1.d: New file.
* gas/mips/mipsr6@branch-misc-2-64.d: New file.
* gas/mips/mipsr6@branch-misc-2pic-64.d: New file.
* gas/mips/mipsr6@branch-misc-4-64.d: New file.
* gas/mips/mipsr6@cache.d: New file.
* gas/mips/mipsr6@eva.d: New file.
* gas/mips/mipsr6@jal-svr4pic-noreorder.d: New file.
* gas/mips/mipsr6@jal-svr4pic.d: New file.
* gas/mips/mipsr6@ld-zero-2.d: New file.
* gas/mips/mipsr6@ld-zero-3.d: New file.
* gas/mips/mipsr6@loc-swap-dis.d: New file.
* gas/mips/mipsr6@mips32-cp2.d: New file.
* gas/mips/mipsr6@mips32-imm.d: New file.
* gas/mips/mipsr6@mips32.d: New file.
* gas/mips/mipsr6@mips32r2.d: New file.
* gas/mips/mipsr6@mips4-fp.d: New file.
* gas/mips/mipsr6@mips4-fp.l: New file.
* gas/mips/mipsr6@mips4-fp.s: New file.
* gas/mips/mipsr6@mips4.d: New file.
* gas/mips/mipsr6@mips5-fp.d: New file.
* gas/mips/mipsr6@mips5-fp.l: New file.
* gas/mips/mipsr6@mips5-fp.s: New file.
* gas/mips/mipsr6@mips64.d: New file.
* gas/mips/mipsr6@msa-branch.d: New file.
* gas/mips/mipsr6@msa.d: New file.
* gas/mips/mipsr6@pref.d: New file.
* gas/mips/mipsr6@relax-swap3.d: New file.
* gas/mips/r6-64-n32.d: New file.
* gas/mips/r6-64-n64.d: New file.
* gas/mips/r6-64-removed.l: New file.
* gas/mips/r6-64-removed.s: New file.
* gas/mips/r6-64.s: New file.
* gas/mips/r6-attr-none-double.d: New file.
* gas/mips/r6-n32.d: New file.
* gas/mips/r6-n64.d: New file.
* gas/mips/r6-removed.l: New file.
* gas/mips/r6-removed.s: New file.
* gas/mips/r6.d: New file.
* gas/mips/r6.s: New file.
* gas/mips/mipsr6@mips32-dsp.d: New file.
* gas/mips/mipsr6@mips32-dspr2.d: New file.
* gas/mips/mipsr6@mips32r2-ill.l: New file.
* gas/mips/mipsr6@mips32r2-ill.s: New file.
* gas/mips/cache.s: Add r6 instruction varients.
* gas/mips/mips.exp: Add support for the mips32r6 and mips64r6
architectures. Also prevent non r6 supported tests from running.
Finally, add in support for running the new r6 tests.
(run_dump_test_arch): Add support for mipsr6 tests.
(run_list_test_arch): Add support for using files of the
form arch@testname.l .
include/elf/
* mips.h: Add relocs: R_MIPS_PC21_S2, R_MIPS_PC26_S2, R_MIPS_PC18_S3,
R_MIPS_PC19_S2, R_MIPS_PCHI16 and R_MIPS_PCLO16.
(E_MIPS_ARCH_32R6): New define.
(E_MIPS_ARCH_64R6): New define.
include/opcode/
* mips.h (mips_operand_type): Add new entries: OP_SAME_RS_RT,
OP_CHECK_PREV and OP_NON_ZERO_REG. Add descriptions for the MIPS R6
instruction arguments: -a, -b, -d, -s, -t, -u, -v, -w, -x, -y, -A, -B,
+I, +O, +R, +:, +\, +", +;
(mips_check_prev_operand): New struct.
(INSN2_FORBIDDEN_SLOT): New define.
(INSN_ISA32R6): New define.
(INSN_ISA64R6): New define.
(INSN_UPTO32R6): New define.
(INSN_UPTO64R6): New define.
(mips_isa_table): Add INSN_UPTO32R6 and INSN_UPTO64R6.
(ISA_MIPS32R6): New define.
(ISA_MIPS64R6): New define.
(CPU_MIPS32R6): New define.
(CPU_MIPS64R6): New define.
(cpu_is_member): Add cases for CPU_MIPS32R6, and CPU_MIPS64R6.
ld/
* ldmain.c (get_emulation): Add support for -mips32r6 and -mips64r6.
opcodes/
* mips-dis.c (mips_arch_choices): Add entries for mips32r6 and
mips64r6.
(parse_mips_dis_option): Allow MSA and virtualization support for
mips64r6.
(mips_print_arg_state): Add fields dest_regno and seen_dest.
(mips_seen_register): New function.
(print_insn_arg): Refactored code to use mips_seen_register
function. Add support for OP_SAME_RS_RT, OP_CHECK_PREV and
OP_NON_ZERO_REG. Changed OP_REPEAT_DEST_REG case to print out
the register rather than aborting.
(print_insn_args): Add length argument. Add code to correctly
calculate the instruction address for pc relative instructions.
(validate_insn_args): New static function.
(print_insn_mips): Prevent jalx disassembling for r6. Use
validate_insn_args.
(print_insn_micromips): Use validate_insn_args.
all the arguments are valid.
* mips-formats.h (PREV_CHECK): New define.
* mips-opc.c (decode_mips_operand): Add support for -a, -b, -d, -s,
-t, -u, -v, -w, -x, -y, -A, -B, +I, +O, +R, +:, +\, +", +;
(RD_pc): New define.
(FS): New define.
(I37): New define.
(I69): New define.
(mips_builtin_opcodes): Add MIPS R6 instructions. Exclude recoded
MIPS R6 instructions from MIPS R2 instructions.
2014-09-10 12:32:01 +02:00
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2014-09-15 Andrew Bennett <andrew.bennett@imgtec.com>
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Matthew Fortune <matthew.fortune@imgtec.com>
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* mips-dis.c (mips_arch_choices): Add entries for mips32r6 and
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mips64r6.
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(parse_mips_dis_option): Allow MSA and virtualization support for
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mips64r6.
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(mips_print_arg_state): Add fields dest_regno and seen_dest.
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(mips_seen_register): New function.
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(print_insn_arg): Refactored code to use mips_seen_register
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function. Add support for OP_SAME_RS_RT, OP_CHECK_PREV and
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OP_NON_ZERO_REG. Changed OP_REPEAT_DEST_REG case to print out
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the register rather than aborting.
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(print_insn_args): Add length argument. Add code to correctly
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calculate the instruction address for pc relative instructions.
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(validate_insn_args): New static function.
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(print_insn_mips): Prevent jalx disassembling for r6. Use
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validate_insn_args.
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(print_insn_micromips): Use validate_insn_args.
|
|
|
|
|
|
all the arguments are valid.
|
|
|
|
|
|
* mips-formats.h (PREV_CHECK): New define.
|
|
|
|
|
|
* mips-opc.c (decode_mips_operand): Add support for -a, -b, -d, -s,
|
|
|
|
|
|
-t, -u, -v, -w, -x, -y, -A, -B, +I, +O, +R, +:, +\, +", +;
|
|
|
|
|
|
(RD_pc): New define.
|
|
|
|
|
|
(FS): New define.
|
|
|
|
|
|
(I37): New define.
|
|
|
|
|
|
(I69): New define.
|
|
|
|
|
|
(mips_builtin_opcodes): Add MIPS R6 instructions. Exclude recoded
|
|
|
|
|
|
MIPS R6 instructions from MIPS R2 instructions.
|
|
|
|
|
|
|
2014-09-10 18:38:31 +02:00
|
|
|
|
2014-09-10 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-dis.c (dis386): Replace "P" with "%LP" for iret and sysret.
|
|
|
|
|
|
(putop): Handle "%LP".
|
|
|
|
|
|
|
2014-09-03 15:45:26 +02:00
|
|
|
|
2014-09-03 Jiong Wang <jiong.wang@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* aarch64-tbl.h (aarch64_opcode_table): Update encoding for mrs/msr.
|
|
|
|
|
|
* aarch64-dis-2.c: Update auto-generated file.
|
|
|
|
|
|
|
2014-09-03 15:40:41 +02:00
|
|
|
|
2014-09-03 Jiong Wang <jiong.wang@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* aarch64-tbl.h (QL_R4NIL): New qualifiers.
|
|
|
|
|
|
(aarch64_feature_lse): New feature added.
|
|
|
|
|
|
(LSE): New Added.
|
|
|
|
|
|
(aarch64_opcode_table): New LSE instructions added. Improve
|
|
|
|
|
|
descriptions for ldarb/ldarh/ldar.
|
|
|
|
|
|
(aarch64_opcode_table): Describe PAIRREG.
|
|
|
|
|
|
* aarch64-opc.h (aarch64_field_kind): Add FLD_lse_sz.
|
|
|
|
|
|
* aarch64-opc.c (fields): Add entry for F_LSE_SZ.
|
|
|
|
|
|
(aarch64_print_operand): Recognize PAIRREG.
|
|
|
|
|
|
(operand_general_constraint_met_p): Check reg pair constraints for CASP
|
|
|
|
|
|
instructions.
|
|
|
|
|
|
* aarch64-dis.c (aarch64_ext_regno_pair): New extractor for paired reg.
|
|
|
|
|
|
(do_special_decoding): Recognize F_LSE_SZ.
|
|
|
|
|
|
* aarch64-asm.c (do_special_encoding): Recognize F_LSE_SZ.
|
|
|
|
|
|
|
2014-08-26 14:44:34 +02:00
|
|
|
|
2014-08-26 Maciej W. Rozycki <macro@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* micromips-opc.c (decode_micromips_operand): Rename `B' to `+J'.
|
|
|
|
|
|
(micromips_opcodes): Use "+J" in place of "B" for "hypcall",
|
|
|
|
|
|
"sdbbp", "syscall" and "wait".
|
|
|
|
|
|
|
2014-08-22 17:42:12 +02:00
|
|
|
|
2014-08-21 Nathan Sidwell <nathan@codesourcery.com>
|
|
|
|
|
|
Maciej W. Rozycki <macro@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* arm-dis.c (print_arm_address): Negate the GPR-relative offset
|
|
|
|
|
|
returned if the U bit is set.
|
|
|
|
|
|
|
2014-08-21 13:57:00 +02:00
|
|
|
|
2014-08-21 Maciej W. Rozycki <macro@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* micromips-opc.c (micromips_opcodes): Remove #ifdef-ed out
|
|
|
|
|
|
48-bit "li" encoding.
|
|
|
|
|
|
|
2014-08-19 16:42:13 +02:00
|
|
|
|
2014-08-19 Andreas Arnez <arnez@linux.vnet.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* s390-dis.c (s390_insn_length, s390_insn_matches_opcode)
|
|
|
|
|
|
(s390_print_insn_with_opcode, opcode_mask_more_specific): New
|
|
|
|
|
|
static functions, code was moved from...
|
|
|
|
|
|
(print_insn_s390): ...here.
|
|
|
|
|
|
(s390_extract_operand): Adjust comment. Change type of first
|
|
|
|
|
|
parameter from 'unsigned char *' to 'const bfd_byte *'.
|
|
|
|
|
|
(union operand_value): New.
|
|
|
|
|
|
(s390_extract_operand): Change return type to union operand_value.
|
|
|
|
|
|
Also avoid integer overflow in sign-extension.
|
|
|
|
|
|
(s390_print_insn_with_opcode): Adjust to changed return value from
|
|
|
|
|
|
s390_extract_operand(). Change "%i" printf format to "%u" for
|
|
|
|
|
|
unsigned values.
|
|
|
|
|
|
(init_disasm): Simplify initialization of opc_index[]. This also
|
|
|
|
|
|
fixes an access after the last element of s390_opcodes[].
|
|
|
|
|
|
(print_insn_s390): Simplify the opcode search loop.
|
|
|
|
|
|
Check architecture mask against all searched opcodes, not just the
|
|
|
|
|
|
first matching one.
|
|
|
|
|
|
(s390_print_insn_with_opcode): Drop function pointer dereferences
|
|
|
|
|
|
without effect.
|
|
|
|
|
|
(print_insn_s390): Likewise.
|
|
|
|
|
|
(s390_insn_length): Simplify formula for return value.
|
|
|
|
|
|
(s390_print_insn_with_opcode): Avoid special handling for the
|
|
|
|
|
|
separator before the first operand. Use new local variable
|
|
|
|
|
|
'flags' in place of 'operand->flags'.
|
|
|
|
|
|
|
2014-07-26 20:27:28 +02:00
|
|
|
|
2014-08-14 Mike Frysinger <vapier@gentoo.org>
|
|
|
|
|
|
|
|
|
|
|
|
* bfin-dis.c (struct private): Change int's to bfd_boolean's.
|
|
|
|
|
|
(decode_LOGI2op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
|
|
|
|
|
|
decode_dagMODik_0, decode_LDIMMhalf_0, decode_linkage_0):
|
|
|
|
|
|
Change assignment of 1 to priv->comment to TRUE.
|
|
|
|
|
|
(print_insn_bfin): Change legal to a bfd_boolean. Change
|
|
|
|
|
|
assignment of 0/1 with priv comment and parallel and legal
|
|
|
|
|
|
to FALSE/TRUE.
|
|
|
|
|
|
|
2013-12-04 01:17:03 +01:00
|
|
|
|
2014-08-14 Mike Frysinger <vapier@gentoo.org>
|
|
|
|
|
|
|
|
|
|
|
|
* bfin-dis.c (OUT): Define.
|
|
|
|
|
|
(decode_CC2stat_0): Declare new op_names array.
|
|
|
|
|
|
Replace multiple if statements with a single one.
|
|
|
|
|
|
|
2011-02-05 22:47:02 +01:00
|
|
|
|
2014-08-14 Mike Frysinger <vapier@gentoo.org>
|
|
|
|
|
|
|
|
|
|
|
|
* bfin-dis.c (struct private): Add iw0.
|
|
|
|
|
|
(_print_insn_bfin): Assign iw0 to priv.iw0.
|
|
|
|
|
|
(print_insn_bfin): Drop ifetch and use priv.iw0.
|
|
|
|
|
|
|
2011-02-05 22:37:39 +01:00
|
|
|
|
2014-08-13 Mike Frysinger <vapier@gentoo.org>
|
|
|
|
|
|
|
|
|
|
|
|
* bfin-dis.c (comment, parallel): Move from global scope ...
|
|
|
|
|
|
(struct private): ... to this new struct.
|
|
|
|
|
|
(decode_ProgCtrl_0, decode_CaCTRL_0, decode_PushPopReg_0,
|
|
|
|
|
|
decode_PushPopMultiple_0, decode_ccMV_0, decode_CCflag_0,
|
|
|
|
|
|
decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
|
|
|
|
|
|
decode_LOGI2op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
|
|
|
|
|
|
decode_dagMODik_0, decode_LoopSetup_0, decode_LDIMMhalf_0,
|
|
|
|
|
|
decode_CALLa_0, decode_linkage_0, decode_pseudoDEBUG_0,
|
|
|
|
|
|
decode_pseudoOChar_0, decode_pseudodbg_assert_0, _print_insn_bfin,
|
|
|
|
|
|
print_insn_bfin): Declare private struct. Use priv's comment and
|
|
|
|
|
|
parallel members.
|
|
|
|
|
|
|
2014-07-26 20:14:37 +02:00
|
|
|
|
2014-08-13 Mike Frysinger <vapier@gentoo.org>
|
|
|
|
|
|
|
|
|
|
|
|
* bfin-dis.c (ifetch): Do not align pc to 2 bytes.
|
|
|
|
|
|
(_print_insn_bfin): Add check for unaligned pc.
|
|
|
|
|
|
|
2011-02-05 07:42:19 +01:00
|
|
|
|
2014-08-13 Mike Frysinger <vapier@gentoo.org>
|
|
|
|
|
|
|
|
|
|
|
|
* bfin-dis.c (ifetch): New function.
|
|
|
|
|
|
(_print_insn_bfin, print_insn_bfin): Call new ifetch and return
|
|
|
|
|
|
-1 when it errors.
|
|
|
|
|
|
|
2014-07-29 14:18:07 +02:00
|
|
|
|
2014-07-29 Matthew Fortune <matthew.fortune@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
* micromips-opc.c (COD): Rename throughout to...
|
|
|
|
|
|
(CM): New define, update to use INSN_COPROC_MOVE.
|
|
|
|
|
|
(LCD): Rename throughout to...
|
|
|
|
|
|
(LC): New define, update to use INSN_LOAD_COPROC.
|
|
|
|
|
|
* mips-opc.c: Likewise.
|
|
|
|
|
|
|
[MIPS] Implement O32 FPXX, FP64 and FP64A ABI extensions
Specification:
https://dmz-portal.mips.com/wiki/MIPS_O32_ABI_-_FR0_and_FR1_Interlinking
include/
* elf/mips.h (PT_MIPS_ABIFLAGS, SHT_MIPS_ABIFLAGS): Define.
(Val_GNU_MIPS_ABI_FP_OLD_64): Rename from Val_GNU_MIPS_ABI_FP_64.
(Val_GNU_MIPS_ABI_FP_64): Redefine.
(Val_GNU_MIPS_ABI_FP_XX): Define.
(Elf_External_ABIFlags_v0, Elf_Internal_ABIFlags_v0): New structures.
(AFL_REG_NONE, AFL_REG_32, AFL_REG_64, AFL_REG_128): Define.
(AFL_ASE_DSP, AFL_ASE_DSPR2, AFL_ASE_EVA, AFL_ASE_MCU): Likewise.
(AFL_ASE_MDMX, AFL_ASE_MIPS3D, AFL_ASE_MT, AFL_ASE_SMARTMIPS): Likewise.
(AFL_ASE_VIRT, AFL_ASE_MSA, AFL_ASE_MIPS16): Likewise.
(AFL_ASE_MICROMIPS, AFL_ASE_XPA): Likewise.
(AFL_EXT_XLR, AFL_EXT_OCTEON2, AFL_EXT_OCTEONP): Likewise.
(AFL_EXT_LOONGSON_3A, AFL_EXT_OCTEON, AFL_EXT_5900): Likewise.
(AFL_EXT_4650, AFL_EXT_4010, AFL_EXT_4100, AFL_EXT_3900): Likewise.
(AFL_EXT_10000, AFL_EXT_SB1, AFL_EXT_4111, AFL_EXT_4120): Likewise.
(AFL_EXT_5400, AFL_EXT_5500, AFL_EXT_LOONGSON_2E): Likewise.
(AFL_EXT_LOONGSON_2F): Likewise.
(bfd_mips_elf_swap_abiflags_v0_in): Prototype.
(bfd_mips_elf_swap_abiflags_v0_out): Likewise.
(bfd_mips_isa_ext): Likewise.
bfd/
* elfxx-mips.c (ABI_O32_P, MIPS_ELF_ABIFLAGS_SECTION_NAME_P): New macro.
(mips_elf_obj_tdata): Add abiflags and abiflags_valid fields.
(bfd_mips_elf_swap_abiflags_v0_in): New function.
(bfd_mips_elf_swap_abiflags_v0_out): Likewise.
(_bfd_mips_elf_section_from_shdr): Handle SHT_MIPS_ABIFLAGS.
(_bfd_mips_elf_fake_sections): Likewise.
(_bfd_mips_elf_always_size_sections): Handle .MIPS.abiflags.
(_bfd_mips_elf_additional_program_headers): Account for new
PT_MIPS_ABIFLAGS program header.
(_bfd_mips_elf_modify_segment_map): Create PT_MIPS_ABIFLAGS segment and
associate with .MIPS.abiflags.
(_bfd_mips_elf_gc_mark_extra_sections): New function.
(bfd_mips_isa_ext, update_mips_abiflags_isa): New static function.
(infer_mips_abiflags): Likewise.
(_bfd_mips_elf_final_link): Handle .MIPS.abiflags.
(mips_32bit_flags_p): Moved higher.
(mips_elf_merge_obj_attributes, _bfd_mips_fp_abi_string): Error
checking for FP ABIs.
(_bfd_mips_elf_merge_private_bfd_data): Restructure and add abiflags
checks. Check EF_MIPS_FP64 flag consistency.
(print_mips_ases, print_mips_isa_ext): New static function.
(print_mips_fp_abi_value, get_mips_reg_size): Likewise.
(_bfd_mips_elf_print_private_bfd_data): Display abiflags data.
(_bfd_mips_post_process_headers): Set EI_ABIVERSION = 3 for
Val_GNU_MIPS_ABI_FP_64 or Val_GNU_MIPS_ABI_FP_64A.
* elfxx-mips.h (_bfd_mips_elf_gc_mark_extra_sections): New prototype.
* elf32-mips.c (elf_backend_gc_mark_extra_sections): Implement.
* elfn32-mips.c (elf_backend_gc_mark_extra_sections): Implement.
* elf64-mips.c (elf_backend_gc_mark_extra_sections): Implement.
binutils/
* readelf.c (get_mips_segment_type): Display name for PT_MIPS_ABIFLAGS.
(get_mips_section_type_name): Display name for SHT_MIPS_ABIFLAGS.
(display_mips_gnu_attribute): Abstracted fp abi printing to...
(print_mips_fp_abi_value): New static function. Handle new FP ABIs.
(print_mips_ases, print_mips_isa_ext): New static functions.
(get_mips_reg_size): Likewise.
(process_mips_specific): Display abiflags data.
elfcpp/
* elfcpp.h (PT_MIPS_ABIFLAGS): New program header type.
gas/
* config/tc-mips.c (mips_flags_frag): New static global.
(struct mips_set_options): Add oddspreg field.
(file_mips_opts, mips_opts): Initialize oddspreg.
(ISA_HAS_ODD_SINGLE_FPR): Add CPU argument and update for R5900 and
Loongson-3a.
(enum options, md_longopts, md_parse_option): Add -mfpxx, -modd-spreg
and -mno-odd-spreg options.
(md_begin): Create .MIPS.abiflags section.
(fpabi_incompatible_with, fpabi_requires): New static function.
(check_fpabi): Likewise.
(mips_check_options): Handle fp=xx and oddspreg restrictions.
(file_mips_check_options): Set oddspreg by default for fp=xx.
(mips_oddfpreg_ok): Re-write function.
(check_regno): Check odd numbered registers regardless of FPR size.
For fp != 32 use as_bad instead of as_warn.
(match_float_constant): Rewrite check regarding FP register width. Add
support for generating constants when MXHC1 is present. Handle fp=xx
to comply with the ABI.
(macro): Update M_LI_DD similarly to match_float_constant. Generate
MTHC1 when available. Check that correct code can be generated for
fp=xx and fp=64 ABIs.
(parse_code_option, s_mipsset): Add fp=xx, oddspreg and nooddspreg
options.
(mips_convert_ase_flags): New static function.
(mips_elf_final_processing): Use fpabi == Val_GNU_MIPS_ABI_FP_OLD_64
to determine when to add the EF_MIPS_FP64 flag. Populate the
.MIPS.abiflags section.
(md_mips_end): Update .gnu_attribute based on command line and .module
as applicable. Use check_fpabi to ensure .gnu.attribute and command
line/.module options are consistent.
* doc/as.texinfo: Add missing -mgp64/-mfp64 options and document new
-mfpxx, -modd-spreg and -mno-odd-spreg options.
* doc/c-mips.texi: Document -mfpxx, -modd-spreg, -mno-odd-spreg,
gnu_attribute values and FP ABIs.
ld/
* emulparams/elf32bmip.sh: Add .MIPS.abiflags.
* emulparams/elf32bmipn32-defs.sh: Likewise.
* emulparams/elf64bmip-defs.sh: Likewise.
opcodes/
* micromips-opc.c (COD, LCD) New macros.
(cfc1, ctc1): Remove FP_S attribute.
(dmfc1, mfc1, mfhc1): Add LCD attribute.
(dmtc1, mtc1, mthc1): Add COD attribute.
* mips-opc.c (cfc1, cftc1, ctc, cttc1): Remove FP_S attribute.
binutils/testsuite/
* binutils-all/readelf.s: Account for .MIPS.abiflags and
.gnu.attributes.
* binutils-all/readelf.ss-tmips: Likewise.
* binutils-all/strip-3.d: Likewise.
gas/testsuite/
* gas/mips/attr-gnu-4-0.d: New.
* gas/mips/attr-gnu-4-0.s: Likewise.
* gas/mips/attr-gnu-4-1-mfp32.l: Likewise.
* gas/mips/attr-gnu-4-1-mfp32.s: Likewise.
* gas/mips/attr-gnu-4-1-mfp64.l: Likewise.
* gas/mips/attr-gnu-4-1-mfp64.s: Likewise.
* gas/mips/attr-gnu-4-1-mfpxx.s: Likewise.
* gas/mips/attr-gnu-4-1-msingle-float.l: Likewise.
* gas/mips/attr-gnu-4-1-msingle-float.s: Likewise.
* gas/mips/attr-gnu-4-1-msoft-float.l: Likewise.
* gas/mips/attr-gnu-4-1-msoft-float.s: Likewise.
* gas/mips/attr-gnu-4-1.d: Likewise.
* gas/mips/attr-gnu-4-1.s: Likewise.
* gas/mips/attr-gnu-4-2-mdouble-float.l: Likewise.
* gas/mips/attr-gnu-4-2-mdouble-float.s: Likewise.
* gas/mips/attr-gnu-4-2-msoft-float.l: Likewise.
* gas/mips/attr-gnu-4-2-msoft-float.s: Likewise.
* gas/mips/attr-gnu-4-2.d: Likewise.
* gas/mips/attr-gnu-4-2.s: Likewise.
* gas/mips/attr-gnu-4-3-mhard-float.l: Likewise.
* gas/mips/attr-gnu-4-3-mhard-float.s: Likewise.
* gas/mips/attr-gnu-4-3.d: Likewise.
* gas/mips/attr-gnu-4-3.s: Likewise.
* gas/mips/attr-gnu-4-4.l: Likewise.
* gas/mips/attr-gnu-4-4.s: Likewise.
* gas/mips/attr-gnu-4-5-64.l: Likewise.
* gas/mips/attr-gnu-4-5-64.s: Likewise.
* gas/mips/attr-gnu-4-5.d: Likewise.
* gas/mips/attr-gnu-4-5.l: Likewise.
* gas/mips/attr-gnu-4-5.s: Likewise.
* gas/mips/attr-gnu-4-6-64.l: Likewise.
* gas/mips/attr-gnu-4-6-64.s: Likewise.
* gas/mips/attr-gnu-4-6.d: Likewise.
* gas/mips/attr-gnu-4-6.l: Likewise.
* gas/mips/attr-gnu-4-6.s: Likewise.
* gas/mips/attr-gnu-4-6-msingle-float.l: Likewise.
* gas/mips/attr-gnu-4-6-msingle-float.s: Likewise.
* gas/mips/attr-gnu-4-6-msoft-float.l: Likewise.
* gas/mips/attr-gnu-4-6-msoft-float.s: Likewise.
* gas/mips/attr-gnu-4-6-noodd.l: Likewise.
* gas/mips/attr-gnu-4-6-noodd.s: Likewise.
* gas/mips/attr-gnu-4-7-64.l: Likewise.
* gas/mips/attr-gnu-4-7-64.s: Likewise.
* gas/mips/attr-gnu-4-7-msingle-float.l: Likewise.
* gas/mips/attr-gnu-4-7-msingle-float.s: Likewise.
* gas/mips/attr-gnu-4-7-msoft-float.l: Likewise.
* gas/mips/attr-gnu-4-7-msoft-float.s: Likewise.
* gas/mips/attr-gnu-4-7-odd.l: Likewise.
* gas/mips/attr-gnu-4-7-odd.s: Likewise.
* gas/mips/attr-gnu-4-7.d: Likewise.
* gas/mips/attr-gnu-4-7.l: Likewise.
* gas/mips/attr-gnu-4-7.s: Likewise.
* gas/mips/attr-none-double.d: Likewise.
* gas/mips/attr-none-o32-fp64.d: Likewise.
* gas/mips/attr-none-o32-fp64-nooddspreg.d
* gas/mips/attr-none-o32-fpxx.d: Likewise.
* gas/mips/attr-none-single-float.d: Likewise.
* gas/mips/attr-none-soft-float.d: Likewise.
* gas/mips/elf_arch_mips32r3.d: Likewise.
* gas/mips/elf_arch_mips32r5.d: Likewise.
* gas/mips/elf_arch_mips64r3.d: Likewise.
* gas/mips/elf_arch_mips64r5.d: Likewise.
* gas/mips/li-d.d: Likewise.
* gas/mips/li-d.s: Likewise.
* gas/mips/module-check-warn.l: Likewise.
* gas/mips/module-check-warn.s: Likewise.
* gas/mips/module-check.d: Likewise.
* gas/mips/module-check.s: Likewise.
* gas/mips/module-mfp32.d: Likewise.
* gas/mips/module-mfp32.s: Likewise.
* gas/mips/module-mfp64.d: Likewise.
* gas/mips/module-mfp64.s: Likewise.
* gas/mips/module-mfp64-noodd.d: Likewise.
* gas/mips/module-mfp64-noodd.s: Likewise.
* gas/mips/module-mfpxx.d: Likewise.
* gas/mips/module-mfpxx.s: Likewise.
* gas/mips/module-msingle-float.d: Likewise.
* gas/mips/module-msingle-float.s: Likewise.
* gas/mips/module-msoft-float.d: Likewise.
* gas/mips/module-msoft-float.s: Likewise.
* gas/mips/module-set-mfpxx.d: Likewise.
* gas/mips/module-set-mfpxx.s: Likewise.
* gas/mips/fpxx-oddfpreg.d: Likewise.
* gas/mips/fpxx-oddfpreg.l: Likewise.
* gas/mips/fpxx-oddfpreg.s: Likewise.
* gas/mips/no-odd-spreg.d: Likewise.
* gas/mips/odd-spreg.d: Likewise.
* gas/elf/section2.e-mips: Adjust expected output.
* gas/mips/attr-gnu-abi-fp-1.d: Likewise.
* gas/mips/attr-gnu-abi-msa-1.d: Likewise.
* gas/mips/call-nonpic-1.d: Likewise.
* gas/mips/elf_arch_mips1.d: Likewise.
* gas/mips/elf_arch_mips2.d: Likewise.
* gas/mips/elf_arch_mips3.d: Likewise.
* gas/mips/elf_arch_mips32.d: Likewise.
* gas/mips/elf_arch_mips32r2.d: Likewise.
* gas/mips/elf_arch_mips4.d: Likewise.
* gas/mips/elf_arch_mips5.d: Likewise.
* gas/mips/elf_arch_mips64.d: Likewise.
* gas/mips/elf_arch_mips64r2.d: Likewise.
* gas/mips/elf_ase_micromips-2.d: Likewise.
* gas/mips/elf_ase_micromips.d: Likewise.
* gas/mips/elf_ase_mips16-2.d: Likewise.
* gas/mips/elf_ase_mips16.d: Likewise.
* gas/mips/module-defer-warn1.d: Likewise.
* gas/mips/module-override.d: Likewise.
* gas/mips/n32-consec.d: Likewise.
* gas/mips/nan-2008-1.d: Likewise.
* gas/mips/nan-2008-2.d: Likewise.
* gas/mips/nan-2008-3.d: Likewise.
* gas/mips/nan-2008-4.d: Likewise.
* gas/mips/nan-legacy-1.d: Likewise.
* gas/mips/nan-legacy-2.d: Likewise.
* gas/mips/nan-legacy-3.d: Likewise.
* gas/mips/nan-legacy-4.d: Likewise.
* gas/mips/nan-legacy-5.d: Likewise.
* gas/mips/tmips16-e.d: Likewise.
* gas/mips/tmips16-f.d: Likewise.
* gas/mips/tmipsel16-e.d: Likewise.
* gas/mips/tmipsel16-f.d: Likewise.
* gas/testsuite/gas/mips/mips.exp: Add new tests.
ld/testsuite/
* ld-mips-elf/abiflags-strip1-ph.d: New.
* ld-mips-elf/abiflags-strip2-ph.d: Likewise.
* ld-mips-elf/abiflags-strip3-ph.d: Likewise.
* ld-mips-elf/abiflags-strip4-ph.d: Likewise.
* ld-mips-elf/abiflags-strip5-ph.d: Likewise.
* ld-mips-elf/abiflags-strip6-ph.d: Likewise.
* ld-mips-elf/abiflags-strip7-ph.d: Likewise.
* ld-mips-elf/abiflags-strip8-ph.d: Likewise.
* ld-mips-elf/abiflags-strip9-ph.d: Likewise.
* ld-mips-elf/attr-gnu-4-0-n32-ph.d: Likewise.
* ld-mips-elf/attr-gnu-4-0-n64-ph.d: Likewise.
* ld-mips-elf/attr-gnu-4-0-ph.d: Likewise.
* ld-mips-elf/attr-gnu-4-06.d: Likewise.
* ld-mips-elf/attr-gnu-4-07.d: Likewise.
* ld-mips-elf/attr-gnu-4-08.d: Likewise.
* ld-mips-elf/attr-gnu-4-1-n32-ph.d: Likewise.
* ld-mips-elf/attr-gnu-4-1-n64-ph.d: Likewise.
* ld-mips-elf/attr-gnu-4-1-ph.d: Likewise.
* ld-mips-elf/attr-gnu-4-16.d: Likewise.
* ld-mips-elf/attr-gnu-4-17.d: Likewise.
* ld-mips-elf/attr-gnu-4-18.d: Likewise.
* ld-mips-elf/attr-gnu-4-2-n32-ph.d: Likewise.
* ld-mips-elf/attr-gnu-4-2-n64-ph.d: Likewise.
* ld-mips-elf/attr-gnu-4-2-ph.d: Likewise.
* ld-mips-elf/attr-gnu-4-26.d: Likewise.
* ld-mips-elf/attr-gnu-4-27.d: Likewise.
* ld-mips-elf/attr-gnu-4-28.d: Likewise.
* ld-mips-elf/attr-gnu-4-3-n32-ph.d: Likewise.
* ld-mips-elf/attr-gnu-4-3-n64-ph.d: Likewise.
* ld-mips-elf/attr-gnu-4-3-ph.d: Likewise.
* ld-mips-elf/attr-gnu-4-36.d: Likewise.
* ld-mips-elf/attr-gnu-4-37.d: Likewise.
* ld-mips-elf/attr-gnu-4-38.d: Likewise.
* ld-mips-elf/attr-gnu-4-4-ph.d: Likewise.
* ld-mips-elf/attr-gnu-4-46.d: Likewise.
* ld-mips-elf/attr-gnu-4-47.d: Likewise.
* ld-mips-elf/attr-gnu-4-48.d: Likewise.
* ld-mips-elf/attr-gnu-4-5-ph.d: Likewise.
* ld-mips-elf/attr-gnu-4-50.d: Likewise.
* ld-mips-elf/attr-gnu-4-52.d: Likewise.
* ld-mips-elf/attr-gnu-4-53.d: Likewise.
* ld-mips-elf/attr-gnu-4-54.d: Likewise.
* ld-mips-elf/attr-gnu-4-55.d: Likewise.
* ld-mips-elf/attr-gnu-4-56.d: Likewise.
* ld-mips-elf/attr-gnu-4-57.d: Likewise.
* ld-mips-elf/attr-gnu-4-58.d: Likewise.
* ld-mips-elf/attr-gnu-4-6-ph.d: Likewise.
* ld-mips-elf/attr-gnu-4-6.s: Likewise.
* ld-mips-elf/attr-gnu-4-60.d: Likewise.
* ld-mips-elf/attr-gnu-4-61.d: Likewise.
* ld-mips-elf/attr-gnu-4-62.d: Likewise.
* ld-mips-elf/attr-gnu-4-63.d: Likewise.
* ld-mips-elf/attr-gnu-4-64.d: Likewise.
* ld-mips-elf/attr-gnu-4-65.d: Likewise.
* ld-mips-elf/attr-gnu-4-66.d: Likewise.
* ld-mips-elf/attr-gnu-4-67.d: Likewise.
* ld-mips-elf/attr-gnu-4-68.d: Likewise.
* ld-mips-elf/attr-gnu-4-7-ph.d: Likewise.
* ld-mips-elf/attr-gnu-4-7.s: Likewise.
* ld-mips-elf/attr-gnu-4-70.d: Likewise.
* ld-mips-elf/attr-gnu-4-71.d: Likewise.
* ld-mips-elf/attr-gnu-4-72.d: Likewise.
* ld-mips-elf/attr-gnu-4-73.d: Likewise.
* ld-mips-elf/attr-gnu-4-74.d: Likewise.
* ld-mips-elf/attr-gnu-4-75.d: Likewise.
* ld-mips-elf/attr-gnu-4-76.d: Likewise.
* ld-mips-elf/attr-gnu-4-77.d: Likewise.
* ld-mips-elf/attr-gnu-4-78.d: Likewise.
* ld-mips-elf/attr-gnu-4-8.s: Likewise.
* ld-mips-elf/attr-gnu-4-81.d: Likewise.
* ld-mips-elf/empty.s: Likewise.
* ld-mips-elf/attr-gnu-4-00.d: Adjust expected output.
* ld-mips-elf/attr-gnu-4-01.d: Likewise.
* ld-mips-elf/attr-gnu-4-02.d: Likewise.
* ld-mips-elf/attr-gnu-4-03.d: Likewise.
* ld-mips-elf/attr-gnu-4-04.d: Likewise.
* ld-mips-elf/attr-gnu-4-05.d: Likewise.
* ld-mips-elf/attr-gnu-4-10.d: Likewise.
* ld-mips-elf/attr-gnu-4-11.d: Likewise.
* ld-mips-elf/attr-gnu-4-14.d: Likewise.
* ld-mips-elf/attr-gnu-4-15.d: Likewise.
* ld-mips-elf/attr-gnu-4-2.s: Likewise.
* ld-mips-elf/attr-gnu-4-20.d: Likewise.
* ld-mips-elf/attr-gnu-4-22.d: Likewise.
* ld-mips-elf/attr-gnu-4-24.d: Likewise.
* ld-mips-elf/attr-gnu-4-25.d: Likewise.
* ld-mips-elf/attr-gnu-4-3.s: Likewise.
* ld-mips-elf/attr-gnu-4-30.d: Likewise.
* ld-mips-elf/attr-gnu-4-33.d: Likewise.
* ld-mips-elf/attr-gnu-4-34.d: Likewise.
* ld-mips-elf/attr-gnu-4-35.d: Likewise.
* ld-mips-elf/attr-gnu-4-40.d: Likewise.
* ld-mips-elf/attr-gnu-4-41.d: Likewise.
* ld-mips-elf/attr-gnu-4-42.d: Likewise.
* ld-mips-elf/attr-gnu-4-43.d: Likewise.
* ld-mips-elf/attr-gnu-4-44.d: Likewise.
* ld-mips-elf/attr-gnu-4-45.d: Likewise.
* ld-mips-elf/attr-gnu-4-5.s: Likewise.
* ld-mips-elf/attr-gnu-4-51.d: Likewise.
* ld-mips-elf/attr-gnu-8-00.d: Likewise.
* ld-mips-elf/attr-gnu-8-01.d: Likewise.
* ld-mips-elf/attr-gnu-8-02.d: Likewise.
* ld-mips-elf/attr-gnu-8-10.d: Likewise.
* ld-mips-elf/attr-gnu-8-11.d: Likewise.
* ld-mips-elf/attr-gnu-8-20.d: Likewise.
* ld-mips-elf/attr-gnu-8-22.d: Likewise.
* ld-mips-elf/jalx-2.dd: Likewise.
* ld-mips-elf/mips16-pic-1.gd: Likewise.
* ld-mips-elf/mips16-pic-2.gd: Likewise.
* ld-mips-elf/mips16-pic-3.gd: Likewise.
* ld-mips-elf/mips16-pic-4a.gd: Likewise.
* ld-mips-elf/multi-got-no-shared.d: Likewise.
* ld-mips-elf/nan-2008.d: Likewise.
* ld-mips-elf/nan-legacy.d: Rework test.
* ld-mips-elf/pic-and-nonpic-3a.gd: Likewise.
* ld-mips-elf/pic-and-nonpic-3b.gd: Likewise.
* ld-mips-elf/pic-and-nonpic-5b.gd: Likewise.
* ld-mips-elf/pic-and-nonpic-6.ld: Likewise.
* ld-mips-elf/rel32-n32.d: Likewise.
* ld-mips-elf/rel32-o32.d: Likewise.
* ld-mips-elf/rel64.d: Likewise.
* ld-mips-elf/tls-multi-got-1.r: Likewise.
* ld-elf/group.ld: Discard .MIPS.abiflags and .gnu.attributes.
* ld-elf/orphan-region.ld: Likewise.
* ld-elf/orphan.ld: Likewise.
* ld-mips-elf/compressed-plt-1.ld: Likewise.
* ld-mips-elf/dyn-sec64.ld: Likewise.
* ld-mips-elf/got-dump-1.ld: Likewise.
* ld-mips-elf/got-dump-2.ld: Likewise.
* ld-mips-elf/got-page-1.ld: Likewise.
* ld-mips-elf/mips-dyn.ld: Likewise.
* ld-mips-elf/mips-lib.ld: Likewise.
* ld-mips-elf/pic-and-nonpic-3a.ld: Likewise.
* ld-mips-elf/pic-and-nonpic-3b.ld: Likewise.
* ld-mips-elf/pic-and-nonpic-4b.ld: Likewise.
* ld-mips-elf/pic-and-nonpic-5b.ld: Likewise.
* ld-mips-elf/region1.t: Likewise.
* ld-mips-elf/stub-dynsym-1.ld: Likewise.
* ld-mips-elf/tls-hidden3.ld: Likewise.
* ld-mips-elf/vxworks1.ld: Likewise.
* ld-scripts/overlay-size.t: Likewise.
* ld-mips-elf/elf-rel-got-n32-embed.d: Remove .MIPS.abiflags from
objects.
* ld-mips-elf/elf-rel-got-n32.d: Likewise.
* ld-mips-elf/elf-rel-got-n64-embed.d: Likewise.
* ld-mips-elf/elf-rel-got-n64-linux.d: Likewise.
* ld-mips-elf/elf-rel-got-n64.d: Likewise.
* ld-mips-elf/elf-rel-xgot-n32.d: Likewise.
* ld-mips-elf/elf-rel-xgot-n32-embed.d: Likewise.
* ld-mips-elf/elf-rel-xgot-n64.d: Likewise.
* ld-mips-elf/elf-rel-xgot-n64-linux.d: Likewise.
* ld-mips-elf/elf-rel-xgot-n64-embed.d: Likewise.
* ld-mips-elf/mips-elf.exp: Add new tests.
2014-07-29 12:27:59 +02:00
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2014-07-29 Matthew Fortune <matthew.fortune@imgtec.com>
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* micromips-opc.c (COD, LCD) New macros.
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(cfc1, ctc1): Remove FP_S attribute.
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(dmfc1, mfc1, mfhc1): Add LCD attribute.
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(dmtc1, mtc1, mthc1): Add COD attribute.
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* mips-opc.c (cfc1, cftc1, ctc, cttc1): Remove FP_S attribute.
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Add AVX512DQ instructions and their AVX512VL variants.
gas/
* config/tc-i386.c (cpu_arch): Add .avx512dq, CPU_AVX512DQ_FLAGS.
* doc/c-i386.texi: Document avx512dq/.avx512dq.
gas/testsuite/
* gas/i386/avx512dq-intel.d: New.
* gas/i386/avx512dq.d: New.
* gas/i386/avx512dq.s: New.
* gas/i386/avx512dq_vl-intel.d: New.
* gas/i386/avx512dq_vl.d: New.
* gas/i386/avx512dq_vl.s: New.
* gas/i386/i386.exp: Run new AVX-512 tests.
* gas/i386/x86-64-avx512dq-intel.d: New.
* gas/i386/x86-64-avx512dq.d: New.
* gas/i386/x86-64-avx512dq.s: New.
* gas/i386/x86-64-avx512dq_vl-intel.d: New.
* gas/i386/x86-64-avx512dq_vl.d: New.
* gas/i386/x86-64-avx512dq_vl.s: New.
opcodes/
* i386-dis-evex.h: Updated.
* i386-dis.c (PREFIX enum): Add PREFIX_EVEX_0F54, PREFIX_EVEX_0F55,
PREFIX_EVEX_0F56, PREFIX_EVEX_0F57, PREFIX_EVEX_0F3A16,
PREFIX_EVEX_0F3A22, PREFIX_EVEX_0F3A50, PREFIX_EVEX_0F3A51,
PREFIX_EVEX_0F3A56, PREFIX_EVEX_0F3A57, PREFIX_EVEX_0F3A66,
PREFIX_EVEX_0F3A67.
(VEX_LEN enum): Add VEX_LEN_0F92_P_2, VEX_LEN_0F93_P_2,
VEX_W_0F92_P_2_LEN_0, VEX_W_0F93_P_2_LEN_0.
(VEX_W enum): Add EVEX_W_0F54_P_0, EVEX_W_0F54_P_2, EVEX_W_0F55_P_0,
EVEX_W_0F55_P_2, EVEX_W_0F56_P_0, EVEX_W_0F56_P_2, EVEX_W_0F57_P_0,
EVEX_W_0F57_P_2, EVEX_W_0F78_P_2, EVEX_W_0F79_P_2, EVEX_W_0F7A_P_2,
EVEX_W_0F7B_P_2, EVEX_W_0F3838_P_1, EVEX_W_0F3839_P_1,
EVEX_W_0F3A16_P_2, EVEX_W_0F3A22_P_2, EVEX_W_0F3A50_P_2,
EVEX_W_0F3A51_P_2, EVEX_W_0F3A56_P_2, EVEX_W_0F3A57_P_2,
EVEX_W_0F3A66_P_2, EVEX_W_0F3A67_P_2.
(prefix_table): Add entries for new instructions.
(vex_len_table): Ditto.
(vex_w_table): Ditto.
(OP_E_memory): Update xmmq_mode handling.
* i386-gen.c (cpu_flag_init): Add CPU_AVX512DQ_FLAGS.
(cpu_flags): Add CpuAVX512DQ.
* i386-init.h: Regenerared.
* i386-opc.h (CpuAVX512DQ): New.
(i386_cpu_flags): Add cpuavx512dq.
* i386-opc.tbl: Add AVX512DQ instructions.
* i386-tbl.h: Regenerate.
2014-07-15 11:33:39 +02:00
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2014-07-22 Sergey Guriev <sergey.s.guriev@intel.com>
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Alexander Ivchenko <alexander.ivchenko@intel.com>
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Maxim Kuznetsov <maxim.kuznetsov@intel.com>
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Sergey Lega <sergey.s.lega@intel.com>
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Anna Tikhonova <anna.tikhonova@intel.com>
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Ilya Tocar <ilya.tocar@intel.com>
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Andrey Turetskiy <andrey.turetskiy@intel.com>
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Ilya Verbin <ilya.verbin@intel.com>
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Kirill Yukhin <kirill.yukhin@intel.com>
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Michael Zolotukhin <michael.v.zolotukhin@intel.com>
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* i386-dis-evex.h: Updated.
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* i386-dis.c (PREFIX enum): Add PREFIX_EVEX_0F54, PREFIX_EVEX_0F55,
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PREFIX_EVEX_0F56, PREFIX_EVEX_0F57, PREFIX_EVEX_0F3A16,
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PREFIX_EVEX_0F3A22, PREFIX_EVEX_0F3A50, PREFIX_EVEX_0F3A51,
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PREFIX_EVEX_0F3A56, PREFIX_EVEX_0F3A57, PREFIX_EVEX_0F3A66,
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PREFIX_EVEX_0F3A67.
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(VEX_LEN enum): Add VEX_LEN_0F92_P_2, VEX_LEN_0F93_P_2,
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VEX_W_0F92_P_2_LEN_0, VEX_W_0F93_P_2_LEN_0.
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(VEX_W enum): Add EVEX_W_0F54_P_0, EVEX_W_0F54_P_2, EVEX_W_0F55_P_0,
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EVEX_W_0F55_P_2, EVEX_W_0F56_P_0, EVEX_W_0F56_P_2, EVEX_W_0F57_P_0,
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EVEX_W_0F57_P_2, EVEX_W_0F78_P_2, EVEX_W_0F79_P_2, EVEX_W_0F7A_P_2,
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EVEX_W_0F7B_P_2, EVEX_W_0F3838_P_1, EVEX_W_0F3839_P_1,
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EVEX_W_0F3A16_P_2, EVEX_W_0F3A22_P_2, EVEX_W_0F3A50_P_2,
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EVEX_W_0F3A51_P_2, EVEX_W_0F3A56_P_2, EVEX_W_0F3A57_P_2,
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EVEX_W_0F3A66_P_2, EVEX_W_0F3A67_P_2.
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(prefix_table): Add entries for new instructions.
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(vex_len_table): Ditto.
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(vex_w_table): Ditto.
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(OP_E_memory): Update xmmq_mode handling.
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* i386-gen.c (cpu_flag_init): Add CPU_AVX512DQ_FLAGS.
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(cpu_flags): Add CpuAVX512DQ.
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* i386-init.h: Regenerared.
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* i386-opc.h (CpuAVX512DQ): New.
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(i386_cpu_flags): Add cpuavx512dq.
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* i386-opc.tbl: Add AVX512DQ instructions.
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* i386-tbl.h: Regenerate.
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Add support for AVX512BW instructions and their AVX512VL versions.
gas/
* config/tc-i386.c (cpu_arch): Add .avx512bw, CPU_AVX512BW_FLAGS.
* doc/c-i386.texi: Document avx512bw/.avx512bw.
gas/testsuite/
* gas/i386/avx512bw-intel.d: New.
* gas/i386/avx512bw-opts-intel.d: New.
* gas/i386/avx512bw-opts.d: New.
* gas/i386/avx512bw-opts.s: New.
* gas/i386/avx512bw-wig.s: New.
* gas/i386/avx512bw-wig1-intel.d: New.
* gas/i386/avx512bw-wig1.d: New.
* gas/i386/avx512bw.d: New.
* gas/i386/avx512bw.s: New.
* gas/i386/avx512bw_vl-intel.d: New.
* gas/i386/avx512bw_vl-opts-intel.d: New.
* gas/i386/avx512bw_vl-opts.d: New.
* gas/i386/avx512bw_vl-opts.s: New.
* gas/i386/avx512bw_vl-wig.s: New.
* gas/i386/avx512bw_vl-wig1-intel.d: New.
* gas/i386/avx512bw_vl-wig1.d: New.
* gas/i386/avx512bw_vl.d: New.
* gas/i386/avx512bw_vl.s: New.
* gas/i386/i386.exp: Run new AVX-512 tests.
* gas/i386/x86-64-avx512bw-intel.d: New.
* gas/i386/x86-64-avx512bw-opts-intel.d: New.
* gas/i386/x86-64-avx512bw-opts.d: New.
* gas/i386/x86-64-avx512bw-opts.s: New.
* gas/i386/x86-64-avx512bw-wig.s: New.
* gas/i386/x86-64-avx512bw-wig1-intel.d: New.
* gas/i386/x86-64-avx512bw-wig1.d: New.
* gas/i386/x86-64-avx512bw.d: New.
* gas/i386/x86-64-avx512bw.s: New.
* gas/i386/x86-64-avx512bw_vl-intel.d: New.
* gas/i386/x86-64-avx512bw_vl-opts-intel.d: New.
* gas/i386/x86-64-avx512bw_vl-opts.d: New.
* gas/i386/x86-64-avx512bw_vl-opts.s: New.
* gas/i386/x86-64-avx512bw_vl-wig.s: New.
* gas/i386/x86-64-avx512bw_vl-wig1-intel.d: New.
* gas/i386/x86-64-avx512bw_vl-wig1.d: New.
* gas/i386/x86-64-avx512bw_vl.d: New.
* gas/i386/x86-64-avx512bw_vl.s: New.
opcodes/
* i386-dis-evex.h: Add new instructions (prefixes bellow).
* i386-dis.c (fetch_data): Add EdqwS, Edb, Edw, MaskBDE.
(enum): Add dqw_swap_mode, db_mode, dw_mode, mask_bd_mode, REG_EVEX_0F71.
(PREFIX enum): Add PREFIX_VEX_0F4A, PREFIX_VEX_0F99, PREFIX_VEX_0F3A31,
PREFIX_VEX_0F3A33, PREFIX_EVEX_0F60, PREFIX_EVEX_0F61, PREFIX_EVEX_0F63,
PREFIX_EVEX_0F64, PREFIX_EVEX_0F65, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
PREFIX_EVEX_0F69, PREFIX_EVEX_0F6B, PREFIX_EVEX_0F71_REG_2, PREFIX_EVEX_0F71_REG_4,
PREFIX_EVEX_0F71_REG_6, PREFIX_EVEX_0F73_REG_3, PREFIX_EVEX_0F73_REG_7,
PREFIX_EVEX_0F74, PREFIX_EVEX_0F75, PREFIX_EVEX_0FC4, PREFIX_EVEX_0FC5,
PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5, PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9,
PREFIX_EVEX_0FDA, PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3, PREFIX_EVEX_0FE4,
PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8, PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA,
PREFIX_EVEX_0FEC, PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8, PREFIX_EVEX_0FF9,
PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD, PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804,
PREFIX_EVEX_0F380B, PREFIX_EVEX_0F3810, PREFIX_EVEX_0F381C, PREFIX_EVEX_0F381D,
PREFIX_EVEX_0F3820, PREFIX_EVEX_0F3826, PREFIX_EVEX_0F382B, PREFIX_EVEX_0F3830,
PREFIX_EVEX_0F3838, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E, PREFIX_EVEX_0F3866,
PREFIX_EVEX_0F3875, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879, PREFIX_EVEX_0F387A,
PREFIX_EVEX_0F387B, PREFIX_EVEX_0F387D, PREFIX_EVEX_0F388D, PREFIX_EVEX_0F3A0F,
PREFIX_EVEX_0F3A14, PREFIX_EVEX_0F3A15, PREFIX_EVEX_0F3A20, PREFIX_EVEX_0F3A3E,
PREFIX_EVEX_0F3A3F, PREFIX_EVEX_0F3A42.
(VEX_LEN enum): Add VEX_LEN_0F41_P_2, VEX_LEN_0F42_P_2, VEX_LEN_0F44_P_2,
VEX_LEN_0F45_P_2, VEX_LEN_0F46_P_2, VEX_LEN_0F47_P_2, VEX_LEN_0F4A_P_0,
VEX_LEN_0F4A_P_2, VEX_LEN_0F4B_P_0, VEX_LEN_0F90_P_2, VEX_LEN_0F91_P_2,
VEX_LEN_0F92_P_3, VEX_LEN_0F93_P_3, VEX_LEN_0F98_P_2, VEX_LEN_0F99_P_0,
VEX_LEN_0F99_P_2, VEX_LEN_0F3A31_P_2, VEX_LEN_0F3A33_P_2, VEX_W_0F41_P_2_LEN_1,
VEX_W_0F42_P_2_LEN_1, VEX_W_0F44_P_2_LEN_0, VEX_W_0F45_P_2_LEN_1,
VEX_W_0F46_P_2_LEN_1, VEX_W_0F47_P_2_LEN_1, VEX_W_0F4A_P_0_LEN_1,
VEX_W_0F4A_P_2_LEN_1, VEX_W_0F4B_P_0_LEN_1, VEX_W_0F90_P_2_LEN_0,
VEX_W_0F91_P_2_LEN_0, VEX_W_0F92_P_3_LEN_0, VEX_W_0F93_P_3_LEN_0,
VEX_W_0F98_P_2_LEN_0, VEX_W_0F99_P_0_LEN_0, VEX_W_0F99_P_2_LEN_0,
VEX_W_0F3A31_P_2_LEN_0, VEX_W_0F3A33_P_2_LEN_0.
(VEX_W enum): Add EVEX_W_0F6B_P_2, EVEX_W_0F6F_P_3, EVEX_W_0F7F_P_3,
EVEX_W_0F3810_P_1, EVEX_W_0F3810_P_2, EVEX_W_0F3811_P_2, EVEX_W_0F3812_P_2,
EVEX_W_0F3820_P_1, EVEX_W_0F3826_P_1, EVEX_W_0F3826_P_2, EVEX_W_0F3828_P_1,
EVEX_W_0F3829_P_1, EVEX_W_0F382B_P_2, EVEX_W_0F3830_P_1, EVEX_W_0F3866_P_2,
EVEX_W_0F3875_P_2, EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2, EVEX_W_0F387A_P_2,
EVEX_W_0F387B_P_2, EVEX_W_0F387D_P_2, EVEX_W_0F388D_P_2, EVEX_W_0F3A3E_P_2,
EVEX_W_0F3A3F_P_2, EVEX_W_0F3A42_P_2.
(prefix_table): Add entries for new instructions.
(vex_table) : Ditto.
(vex_len_table): Ditto.
(vex_w_table): Ditto.
(intel_operand_size): Add db_mode, dw_mode, dqw_swap_mode,
mask_bd_mode handling.
(OP_E_register): Add dqw_swap_mode, dw_mode, db_mode, mask_bd_mode
handling.
(OP_E_memory): Add dqw_mode, dw_mode, dqw_swap_mode, dqb_mode, db_mode
handling.
(OP_G): Add db_mode, dw_mode, dqw_swap_mode, mask_bd_mode handling.
(OP_EX): Add dqw_swap_mode handling.
(OP_VEX): Add mask_bd_mode handling.
(OP_Mask): Add mask_bd_mode handling.
* i386-gen.c (cpu_flag_init): Add CPU_AVX512BW_FLAGS.
(cpu_flags): Add CpuAVX512BW.
* i386-init.h: Regenerated.
* i386-opc.h (CpuAVX512BW): New.
(i386_cpu_flags): Add cpuavx512bw.
* i386-opc.tbl: Add AVX512BW instructions.
* i386-tbl.h: Regenerate.
2014-07-11 14:32:29 +02:00
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2014-07-22 Sergey Guriev <sergey.s.guriev@intel.com>
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Alexander Ivchenko <alexander.ivchenko@intel.com>
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Maxim Kuznetsov <maxim.kuznetsov@intel.com>
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Sergey Lega <sergey.s.lega@intel.com>
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Anna Tikhonova <anna.tikhonova@intel.com>
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Ilya Tocar <ilya.tocar@intel.com>
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Andrey Turetskiy <andrey.turetskiy@intel.com>
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Ilya Verbin <ilya.verbin@intel.com>
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Kirill Yukhin <kirill.yukhin@intel.com>
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Michael Zolotukhin <michael.v.zolotukhin@intel.com>
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* i386-dis-evex.h: Add new instructions (prefixes bellow).
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* i386-dis.c (fetch_data): Add EdqwS, Edb, Edw, MaskBDE.
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(enum): Add dqw_swap_mode, db_mode, dw_mode, mask_bd_mode, REG_EVEX_0F71.
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(PREFIX enum): Add PREFIX_VEX_0F4A, PREFIX_VEX_0F99, PREFIX_VEX_0F3A31,
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PREFIX_VEX_0F3A33, PREFIX_EVEX_0F60, PREFIX_EVEX_0F61, PREFIX_EVEX_0F63,
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PREFIX_EVEX_0F64, PREFIX_EVEX_0F65, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
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PREFIX_EVEX_0F69, PREFIX_EVEX_0F6B, PREFIX_EVEX_0F71_REG_2, PREFIX_EVEX_0F71_REG_4,
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PREFIX_EVEX_0F71_REG_6, PREFIX_EVEX_0F73_REG_3, PREFIX_EVEX_0F73_REG_7,
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PREFIX_EVEX_0F74, PREFIX_EVEX_0F75, PREFIX_EVEX_0FC4, PREFIX_EVEX_0FC5,
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PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5, PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9,
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PREFIX_EVEX_0FDA, PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
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PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3, PREFIX_EVEX_0FE4,
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PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8, PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA,
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PREFIX_EVEX_0FEC, PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
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PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8, PREFIX_EVEX_0FF9,
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PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD, PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804,
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PREFIX_EVEX_0F380B, PREFIX_EVEX_0F3810, PREFIX_EVEX_0F381C, PREFIX_EVEX_0F381D,
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PREFIX_EVEX_0F3820, PREFIX_EVEX_0F3826, PREFIX_EVEX_0F382B, PREFIX_EVEX_0F3830,
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PREFIX_EVEX_0F3838, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E, PREFIX_EVEX_0F3866,
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PREFIX_EVEX_0F3875, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879, PREFIX_EVEX_0F387A,
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PREFIX_EVEX_0F387B, PREFIX_EVEX_0F387D, PREFIX_EVEX_0F388D, PREFIX_EVEX_0F3A0F,
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PREFIX_EVEX_0F3A14, PREFIX_EVEX_0F3A15, PREFIX_EVEX_0F3A20, PREFIX_EVEX_0F3A3E,
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PREFIX_EVEX_0F3A3F, PREFIX_EVEX_0F3A42.
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(VEX_LEN enum): Add VEX_LEN_0F41_P_2, VEX_LEN_0F42_P_2, VEX_LEN_0F44_P_2,
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VEX_LEN_0F45_P_2, VEX_LEN_0F46_P_2, VEX_LEN_0F47_P_2, VEX_LEN_0F4A_P_0,
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VEX_LEN_0F4A_P_2, VEX_LEN_0F4B_P_0, VEX_LEN_0F90_P_2, VEX_LEN_0F91_P_2,
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VEX_LEN_0F92_P_3, VEX_LEN_0F93_P_3, VEX_LEN_0F98_P_2, VEX_LEN_0F99_P_0,
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VEX_LEN_0F99_P_2, VEX_LEN_0F3A31_P_2, VEX_LEN_0F3A33_P_2, VEX_W_0F41_P_2_LEN_1,
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VEX_W_0F42_P_2_LEN_1, VEX_W_0F44_P_2_LEN_0, VEX_W_0F45_P_2_LEN_1,
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VEX_W_0F46_P_2_LEN_1, VEX_W_0F47_P_2_LEN_1, VEX_W_0F4A_P_0_LEN_1,
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VEX_W_0F4A_P_2_LEN_1, VEX_W_0F4B_P_0_LEN_1, VEX_W_0F90_P_2_LEN_0,
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VEX_W_0F91_P_2_LEN_0, VEX_W_0F92_P_3_LEN_0, VEX_W_0F93_P_3_LEN_0,
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VEX_W_0F98_P_2_LEN_0, VEX_W_0F99_P_0_LEN_0, VEX_W_0F99_P_2_LEN_0,
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VEX_W_0F3A31_P_2_LEN_0, VEX_W_0F3A33_P_2_LEN_0.
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(VEX_W enum): Add EVEX_W_0F6B_P_2, EVEX_W_0F6F_P_3, EVEX_W_0F7F_P_3,
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EVEX_W_0F3810_P_1, EVEX_W_0F3810_P_2, EVEX_W_0F3811_P_2, EVEX_W_0F3812_P_2,
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EVEX_W_0F3820_P_1, EVEX_W_0F3826_P_1, EVEX_W_0F3826_P_2, EVEX_W_0F3828_P_1,
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EVEX_W_0F3829_P_1, EVEX_W_0F382B_P_2, EVEX_W_0F3830_P_1, EVEX_W_0F3866_P_2,
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EVEX_W_0F3875_P_2, EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2, EVEX_W_0F387A_P_2,
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EVEX_W_0F387B_P_2, EVEX_W_0F387D_P_2, EVEX_W_0F388D_P_2, EVEX_W_0F3A3E_P_2,
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EVEX_W_0F3A3F_P_2, EVEX_W_0F3A42_P_2.
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(prefix_table): Add entries for new instructions.
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(vex_table) : Ditto.
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(vex_len_table): Ditto.
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(vex_w_table): Ditto.
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(intel_operand_size): Add db_mode, dw_mode, dqw_swap_mode,
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mask_bd_mode handling.
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(OP_E_register): Add dqw_swap_mode, dw_mode, db_mode, mask_bd_mode
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handling.
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(OP_E_memory): Add dqw_mode, dw_mode, dqw_swap_mode, dqb_mode, db_mode
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handling.
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(OP_G): Add db_mode, dw_mode, dqw_swap_mode, mask_bd_mode handling.
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(OP_EX): Add dqw_swap_mode handling.
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(OP_VEX): Add mask_bd_mode handling.
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(OP_Mask): Add mask_bd_mode handling.
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* i386-gen.c (cpu_flag_init): Add CPU_AVX512BW_FLAGS.
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(cpu_flags): Add CpuAVX512BW.
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* i386-init.h: Regenerated.
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* i386-opc.h (CpuAVX512BW): New.
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(i386_cpu_flags): Add cpuavx512bw.
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* i386-opc.tbl: Add AVX512BW instructions.
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* i386-tbl.h: Regenerate.
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2014-07-10 12:21:48 +02:00
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2014-07-22 Sergey Guriev <sergey.s.guriev@intel.com>
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Alexander Ivchenko <alexander.ivchenko@intel.com>
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Maxim Kuznetsov <maxim.kuznetsov@intel.com>
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Sergey Lega <sergey.s.lega@intel.com>
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Anna Tikhonova <anna.tikhonova@intel.com>
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Ilya Tocar <ilya.tocar@intel.com>
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Andrey Turetskiy <andrey.turetskiy@intel.com>
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Ilya Verbin <ilya.verbin@intel.com>
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Kirill Yukhin <kirill.yukhin@intel.com>
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Michael Zolotukhin <michael.v.zolotukhin@intel.com>
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* i386-opc.tbl: Add AVX512VL and AVX512CD instructions.
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* i386-tbl.h: Regenerate.
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2014-07-18 12:59:54 +02:00
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2014-07-22 Sergey Guriev <sergey.s.guriev@intel.com>
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Alexander Ivchenko <alexander.ivchenko@intel.com>
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Maxim Kuznetsov <maxim.kuznetsov@intel.com>
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Sergey Lega <sergey.s.lega@intel.com>
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Anna Tikhonova <anna.tikhonova@intel.com>
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Ilya Tocar <ilya.tocar@intel.com>
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Andrey Turetskiy <andrey.turetskiy@intel.com>
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Ilya Verbin <ilya.verbin@intel.com>
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Kirill Yukhin <kirill.yukhin@intel.com>
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Michael Zolotukhin <michael.v.zolotukhin@intel.com>
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* i386-dis.c (intel_operand_size): Support 128/256 length in
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vex_vsib_q_w_dq_mode.
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(OP_E_memory): Add ymmq_mode handling, handle new broadcast.
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* i386-gen.c (cpu_flag_init): Add CPU_AVX512VL_FLAGS.
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(cpu_flags): Add CpuAVX512VL.
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* i386-init.h: Regenerated.
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* i386-opc.h (CpuAVX512VL): New.
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(i386_cpu_flags): Add cpuavx512vl.
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(BROADCAST_1TO4, BROADCAST_1TO2): Define.
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* i386-opc.tbl: Add AVX512VL instructions.
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|
* i386-tbl.h: Regenerate.
|
|
|
|
|
|
|
2014-07-20 19:26:09 +02:00
|
|
|
|
2014-07-20 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
|
|
|
|
|
|
|
|
|
|
|
|
* or1k-desc.c, * or1k-desc.h, * or1k-opc.c, * or1k-opc.h,
|
|
|
|
|
|
* or1k-opinst.c: Regenerate.
|
|
|
|
|
|
|
2014-07-08 11:45:43 +02:00
|
|
|
|
2014-07-08 Ilya Tocar <ilya.tocar@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-dis-evex.h (EVEX_W_0F10_P_1_M_1): Fix vmovss.
|
|
|
|
|
|
(EVEX_W_0F10_P_3_M_1): Fix vmovsd.
|
|
|
|
|
|
|
2014-07-04 05:29:42 +02:00
|
|
|
|
2014-07-04 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* configure.ac: Rename from configure.in.
|
|
|
|
|
|
* Makefile.in: Regenerate.
|
|
|
|
|
|
* config.in: Regenerate.
|
|
|
|
|
|
|
2014-07-04 04:05:16 +02:00
|
|
|
|
2014-07-04 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* configure.in: Include bfd/version.m4.
|
|
|
|
|
|
(AC_INIT, AM_INIT_AUTOMAKE): Use modern form.
|
|
|
|
|
|
(BFD_VERSION): Delete.
|
|
|
|
|
|
* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in.
|
|
|
|
|
|
* configure: Regenerate.
|
|
|
|
|
|
* Makefile.in: Regenerate.
|
|
|
|
|
|
|
2014-07-01 11:20:17 +02:00
|
|
|
|
2014-07-01 Barney Stratford <barney_stratford@fastmail.fm>
|
|
|
|
|
|
Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
|
|
|
|
|
|
Pitchumani Sivanupandi <pitchumani.s@atmel.com>
|
|
|
|
|
|
Soundararajan <Sounderarajan.D@atmel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* avr-dis.c (avr_operand): Handle constraint j for 16 bit lds/sts.
|
2014-07-04 04:05:16 +02:00
|
|
|
|
(print_insn_avr): Do not select opcode if insn ISA is avrtiny and
|
|
|
|
|
|
machine is not avrtiny.
|
2014-07-01 11:20:17 +02:00
|
|
|
|
|
2014-06-26 14:18:04 +02:00
|
|
|
|
2014-06-26 Philippe De Muyter <phdm@macqel.be>
|
|
|
|
|
|
|
|
|
|
|
|
* or1k-desc.h (spr_field_masks): Add U suffix to the end of long
|
|
|
|
|
|
constants.
|
|
|
|
|
|
|
2014-06-12 04:34:06 +02:00
|
|
|
|
2014-06-12 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* or1k-asm.c, * or1k-desc.c, * or1k-desc.h, * or1k-dis.c,
|
|
|
|
|
|
* or1k-ibld.c, * or1k-opc.c, * or1k-opc.h, * or1k-opinst.c: Regenerate.
|
|
|
|
|
|
|
2014-06-10 20:16:41 +02:00
|
|
|
|
2014-06-10 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-dis.c (fwait_prefix): New.
|
|
|
|
|
|
(ckprefix): Set fwait_prefix.
|
|
|
|
|
|
(print_insn): Properly print prefixes before fwait.
|
|
|
|
|
|
|
2014-06-07 04:39:04 +02:00
|
|
|
|
2014-06-07 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* ppc-opc.c (UISIGNOPT): Define and use with cmpli.
|
|
|
|
|
|
|
Make it easy to make --disable-werror the default for both binutils and gdb
The goal of this patch is to provide an easy way to make
--disable-werror the default when building binutils, or the parts
of binutils that need to get built when building GDB. In development
mode, we want to continue making -Werror the default with GCC.
But, when making releases, I think we want to make it as easy as
possible for regular users to successfully build from sources.
GDB already has this kind of feature to turn -Werror as well as
the use of the libmcheck library. As GDB Release Manager, I take
advantage of it to turn those off after having cut the branch.
I'd like to be able to do the same for the binutils bits. And
perhaps Tristan will want to do the same for his releases too
(not sure, binutils builders might be a little savvier than GDB
builders).
This patch introduces a new file, called development.sh, which
just sets a variable called $development. In our development branches
(Eg. "master"), it's set to true. But setting it to false would allow
us to change the default behavior of various development-related
features to be turned off; in this case, it turns off the use of
-Werror by default (use --enable-werror to turn it back on).
bfd/ChangeLog:
* development.sh: New file.
* warning.m4 (AM_BINUTILS_WARNINGS): Source bfd/development.sh.
Make -Werror the default with GCC only if DEVELOPMENT is true.
* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add
$(srcdir)/development.sh.
* Makefile.in, configure: Regenerate.
binutils/ChangeLog:
* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on
bfd's development.sh.
* Makefile.in, configure: Regenerate.
gas/ChangeLog:
* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on
bfd's development.sh.
* Makefile.in, configure: Regenerate.
gold/ChangeLog:
* Makefile.am (CONFIG_STATUS_DEPENDENCIES): New.
* Makefile.in, configure: Regenerate.
gprof/ChangeLog:
* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on
bfd's development.sh.
* Makefile.in, configure: Regenerate.
ld/ChangeLog:
* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on
bfd's development.sh.
* Makefile.in, configure: Regenerate.
opcodes/ChangeLog:
* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on
bfd's development.sh.
* Makefile.in, configure: Regenerate.
gdb/ChangeLog:
* development.sh: Delete.
* Makefile.in (config.status): Adjust dependency on development.sh.
* configure.ac: Adjust development.sh source call.
* configure: Regenerate.
gdb/gdbserver/ChangeLog:
* configure.ac: Adjust development.sh source call.
* Makefile.in (config.status): Adjust dependency on development.sh.
* configure: Regenerate.
Tested on x86_64-linux by building two ways: One with DEVELOPMENT
set to true, and one with DEVELOPMENT set to false. In the first
case, I could see the use of -Werror, while it disappeared in
the second case.
2014-05-19 23:46:01 +02:00
|
|
|
|
2014-06-05 Joel Brobecker <brobecker@adacore.com>
|
|
|
|
|
|
|
|
|
|
|
|
* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on
|
|
|
|
|
|
bfd's development.sh.
|
|
|
|
|
|
* Makefile.in, configure: Regenerate.
|
|
|
|
|
|
|
2014-06-03 09:54:04 +02:00
|
|
|
|
2014-06-03 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* msp430-dis.c (msp430_doubleoperand): Use extension_word to
|
|
|
|
|
|
decide when extended addressing is being used.
|
|
|
|
|
|
|
2014-06-02 13:11:17 +02:00
|
|
|
|
2014-06-02 Eric Botcazou <ebotcazou@adacore.com>
|
|
|
|
|
|
|
|
|
|
|
|
* sparc-opc.c (cas): Disable for LEON.
|
|
|
|
|
|
(casl): Likewise.
|
|
|
|
|
|
|
2014-05-20 05:45:18 +02:00
|
|
|
|
2014-05-20 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* m68k-dis.c: Don't include setjmp.h.
|
|
|
|
|
|
|
2014-05-09 19:58:00 +02:00
|
|
|
|
2014-05-09 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-dis.c (ADDR16_PREFIX): Removed.
|
|
|
|
|
|
(ADDR32_PREFIX): Likewise.
|
|
|
|
|
|
(DATA16_PREFIX): Likewise.
|
|
|
|
|
|
(DATA32_PREFIX): Likewise.
|
|
|
|
|
|
(prefix_name): Updated.
|
|
|
|
|
|
(print_insn): Simplify data and address size prefixes processing.
|
|
|
|
|
|
|
2014-05-08 07:53:09 +02:00
|
|
|
|
2014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
|
|
|
|
|
|
|
|
|
|
|
|
* or1k-desc.c: Regenerated.
|
|
|
|
|
|
* or1k-desc.h: Likewise.
|
|
|
|
|
|
* or1k-opc.c: Likewise.
|
|
|
|
|
|
* or1k-opc.h: Likewise.
|
|
|
|
|
|
* or1k-opinst.c: Likewise.
|
|
|
|
|
|
|
Add MIPS r3 and r5 support.
This patch firstly adds support for mips32r3 mips32r5, mips64r3
and mips64r5. Secondly it adds support for the eretnc instruction.
ChangeLog:
bfd/
* aoutx.h (NAME (aout, machine_type)): Add mips32r3, mips64r3,
mips32r5 and mips64r5.
* archures.c (bfd_architecture): Likewise.
* bfd-in2.h (bfd_architecture): Likewise.
* cpu-mips.c (arch_info_struct): Likewise.
* elfxx-mips.c (mips_set_isa_flags): Likewise.
gas/
* tc-mips.c (ISA_SUPPORTS_MIPS16E): Add mips32r3, mips32r5, mips64r3
and mips64r5.
(ISA_HAS_64BIT_FPRS): Likewise.
(ISA_HAS_ROR): Likewise.
(ISA_HAS_ODD_SINGLE_FPR): Likewise.
(ISA_HAS_MXHC1): Likewise.
(hilo_interlocks): Likewise.
(md_longopts): Likewise.
(ISA_HAS_64BIT_REGS): Add mips64r3 and mips64r5.
(ISA_HAS_DROR): Likewise.
(options): Add OPTION_MIPS32R3, OPTION_MIPS32R5, OPTION_MIPS64R3, and
OPTION_MIPS64R5.
(mips_isa_rev): Add support for mips32r3, mips32r5, mips64r3 and
mips64r5.
(md_parse_option): Likewise.
(s_mipsset): Likewise.
(mips_cpu_info_table): Add entries for mips32r3, mips32r5, mips64r3
and mips64r5. Also change p5600 entry to be mips32r5.
* configure.in: Add support for mips32r3, mips32r5, mips64r3 and
mips64r5.
* configure: Regenerate.
* doc/c-mips.texi: Document the -mips32r3, -mips32r5, -mips64r3 and
-mips64r5 command line options.
* doc/as.texinfo: Likewise.
gas/testsuite/
* gas/mips/mips.exp: Add MIPS32r5 tests. Also add the mips32r3,
mips32r5, mips64r3 and mips64r5 isas to the testsuite.
* gas/mips/r5.s: New test.
* gas/mips/r5.d: Likewise.
include/opcode/
* mips.h (INSN_ISA_MASK): Updated.
(INSN_ISA32R3): New define.
(INSN_ISA32R5): New define.
(INSN_ISA64R3): New define.
(INSN_ISA64R5): New define.
(INSN_ISA64, INSN_ISA64R2, INSN_ISA3_32, INSN_ISA3_32R2, INSN_ISA4_32
INSN_ISA4_32R2, INSN_ISA5_32R2): Renumbered.
(mips_isa_table): Add entries for mips32r3, mips32r5, mips64r3 and
mips64r5.
(INSN_UPTO32R3): New define.
(INSN_UPTO32R5): New define.
(INSN_UPTO64R3): New define.
(INSN_UPTO64R5): New define.
(ISA_MIPS32R3): New define.
(ISA_MIPS32R5): New define.
(ISA_MIPS64R3): New define.
(ISA_MIPS64R5): New define.
(CPU_MIPS32R3): New define.
(CPU_MIPS32R5): New define.
(CPU_MIPS64R3): New define.
(CPU_MIPS64R5): New define.
opcodes/
* mips-opc.c (mips_builtin_opcodes): Add MIPS32r5 eretnc instruction.
(I34): New define.
(I36): New define.
(I66): New define.
(I68): New define.
* mips-dis.c (mips_arch_choices): Add mips32r3, mips32r5, mips64r3 and
mips64r5.
(parse_mips_dis_option): Update MSA and virtualization support to
allow mips64r3 and mips64r5.
2014-05-02 15:12:48 +02:00
|
|
|
|
2014-05-07 Andrew Bennett <andrew.bennett@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
* mips-opc.c (mips_builtin_opcodes): Add MIPS32r5 eretnc instruction.
|
|
|
|
|
|
(I34): New define.
|
|
|
|
|
|
(I36): New define.
|
|
|
|
|
|
(I66): New define.
|
|
|
|
|
|
(I68): New define.
|
|
|
|
|
|
* mips-dis.c (mips_arch_choices): Add mips32r3, mips32r5, mips64r3 and
|
|
|
|
|
|
mips64r5.
|
|
|
|
|
|
(parse_mips_dis_option): Update MSA and virtualization support to
|
2014-06-03 09:54:04 +02:00
|
|
|
|
allow mips64r3 and mips64r5.
|
Add MIPS r3 and r5 support.
This patch firstly adds support for mips32r3 mips32r5, mips64r3
and mips64r5. Secondly it adds support for the eretnc instruction.
ChangeLog:
bfd/
* aoutx.h (NAME (aout, machine_type)): Add mips32r3, mips64r3,
mips32r5 and mips64r5.
* archures.c (bfd_architecture): Likewise.
* bfd-in2.h (bfd_architecture): Likewise.
* cpu-mips.c (arch_info_struct): Likewise.
* elfxx-mips.c (mips_set_isa_flags): Likewise.
gas/
* tc-mips.c (ISA_SUPPORTS_MIPS16E): Add mips32r3, mips32r5, mips64r3
and mips64r5.
(ISA_HAS_64BIT_FPRS): Likewise.
(ISA_HAS_ROR): Likewise.
(ISA_HAS_ODD_SINGLE_FPR): Likewise.
(ISA_HAS_MXHC1): Likewise.
(hilo_interlocks): Likewise.
(md_longopts): Likewise.
(ISA_HAS_64BIT_REGS): Add mips64r3 and mips64r5.
(ISA_HAS_DROR): Likewise.
(options): Add OPTION_MIPS32R3, OPTION_MIPS32R5, OPTION_MIPS64R3, and
OPTION_MIPS64R5.
(mips_isa_rev): Add support for mips32r3, mips32r5, mips64r3 and
mips64r5.
(md_parse_option): Likewise.
(s_mipsset): Likewise.
(mips_cpu_info_table): Add entries for mips32r3, mips32r5, mips64r3
and mips64r5. Also change p5600 entry to be mips32r5.
* configure.in: Add support for mips32r3, mips32r5, mips64r3 and
mips64r5.
* configure: Regenerate.
* doc/c-mips.texi: Document the -mips32r3, -mips32r5, -mips64r3 and
-mips64r5 command line options.
* doc/as.texinfo: Likewise.
gas/testsuite/
* gas/mips/mips.exp: Add MIPS32r5 tests. Also add the mips32r3,
mips32r5, mips64r3 and mips64r5 isas to the testsuite.
* gas/mips/r5.s: New test.
* gas/mips/r5.d: Likewise.
include/opcode/
* mips.h (INSN_ISA_MASK): Updated.
(INSN_ISA32R3): New define.
(INSN_ISA32R5): New define.
(INSN_ISA64R3): New define.
(INSN_ISA64R5): New define.
(INSN_ISA64, INSN_ISA64R2, INSN_ISA3_32, INSN_ISA3_32R2, INSN_ISA4_32
INSN_ISA4_32R2, INSN_ISA5_32R2): Renumbered.
(mips_isa_table): Add entries for mips32r3, mips32r5, mips64r3 and
mips64r5.
(INSN_UPTO32R3): New define.
(INSN_UPTO32R5): New define.
(INSN_UPTO64R3): New define.
(INSN_UPTO64R5): New define.
(ISA_MIPS32R3): New define.
(ISA_MIPS32R5): New define.
(ISA_MIPS64R3): New define.
(ISA_MIPS64R5): New define.
(CPU_MIPS32R3): New define.
(CPU_MIPS32R5): New define.
(CPU_MIPS64R3): New define.
(CPU_MIPS64R5): New define.
opcodes/
* mips-opc.c (mips_builtin_opcodes): Add MIPS32r5 eretnc instruction.
(I34): New define.
(I36): New define.
(I66): New define.
(I68): New define.
* mips-dis.c (mips_arch_choices): Add mips32r3, mips32r5, mips64r3 and
mips64r5.
(parse_mips_dis_option): Update MSA and virtualization support to
allow mips64r3 and mips64r5.
2014-05-02 15:12:48 +02:00
|
|
|
|
|
2014-05-06 16:43:13 +02:00
|
|
|
|
2014-05-07 Andrew Bennett <andrew.bennett@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
* mips-opc.c (G3): Remove I4.
|
|
|
|
|
|
|
2014-05-02 20:22:04 +02:00
|
|
|
|
2014-05-05 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR binutils/16893
|
|
|
|
|
|
* i386-dis.c (twobyte_has_mandatory_prefix): New variable.
|
|
|
|
|
|
(end_codep): Likewise.
|
|
|
|
|
|
(mandatory_prefix): Likewise.
|
|
|
|
|
|
(active_seg_prefix): Likewise.
|
|
|
|
|
|
(ckprefix): Set active_seg_prefix to the active segment register
|
|
|
|
|
|
prefix.
|
|
|
|
|
|
(seg_prefix): Removed.
|
|
|
|
|
|
(get_valid_dis386): Use the last of PREFIX_REPNZ and PREFIX_REPZ
|
|
|
|
|
|
for prefix index. Ignore the index if it is invalid and the
|
|
|
|
|
|
mandatory prefix isn't required.
|
|
|
|
|
|
(print_insn): Set mandatory_prefix if the PREFIX_XXX prefix is
|
|
|
|
|
|
mandatory. Don't set PREFIX_REPZ/PREFIX_REPNZ/PREFIX_LOCK bits
|
|
|
|
|
|
in used_prefixes here. Don't print unused prefixes. Check
|
|
|
|
|
|
active_seg_prefix for the active segment register prefix.
|
|
|
|
|
|
Restore the DFLAG bit in sizeflag if the data size prefix is
|
|
|
|
|
|
unused. Check the unused mandatory PREFIX_XXX prefixes
|
|
|
|
|
|
(append_seg): Only print the segment register which gets used.
|
|
|
|
|
|
(OP_E_memory): Check active_seg_prefix for the segment register
|
|
|
|
|
|
prefix.
|
|
|
|
|
|
(OP_OFF): Likewise.
|
|
|
|
|
|
(OP_OFF64): Likewise.
|
|
|
|
|
|
(OP_DSreg): Set active_seg_prefix to PREFIX_DS if it is unset.
|
|
|
|
|
|
|
2014-05-02 17:27:16 +02:00
|
|
|
|
2014-05-02 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR binutils/16886
|
|
|
|
|
|
* config.in: Regenerated.
|
|
|
|
|
|
* configure: Likewise.
|
|
|
|
|
|
* configure.in: Check if sigsetjmp is available.
|
|
|
|
|
|
* h8500-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
|
|
|
|
|
|
(fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
|
|
|
|
|
|
(print_insn_h8500): Replace setjmp with OPCODES_SIGSETJMP.
|
|
|
|
|
|
* i386-dis.c (dis_private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
|
|
|
|
|
|
(fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
|
|
|
|
|
|
(print_insn): Replace setjmp with OPCODES_SIGSETJMP.
|
|
|
|
|
|
* ns32k-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
|
|
|
|
|
|
(fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
|
|
|
|
|
|
(print_insn_ns32k): Replace setjmp with OPCODES_SIGSETJMP.
|
|
|
|
|
|
* sysdep.h (OPCODES_SIGJMP_BUF): New macro.
|
|
|
|
|
|
(OPCODES_SIGSETJMP): Likewise.
|
|
|
|
|
|
(OPCODES_SIGLONGJMP): Likewise.
|
|
|
|
|
|
* vax-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
|
|
|
|
|
|
(fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
|
|
|
|
|
|
(print_insn_vax): Replace setjmp with OPCODES_SIGSETJMP.
|
|
|
|
|
|
* xtensa-dis.c (dis_private): Replace jmp_buf with
|
|
|
|
|
|
OPCODES_SIGJMP_BUF.
|
|
|
|
|
|
(fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
|
|
|
|
|
|
(print_insn_xtensa): Replace setjmp with OPCODES_SIGSETJMP.
|
|
|
|
|
|
* z8k-dis.c(instr_data_s): Replace jmp_buf with OPCODES_SIGJMP_BUF.
|
|
|
|
|
|
(fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
|
|
|
|
|
|
(print_insn_z8k): Replace setjmp with OPCODES_SIGSETJMP.
|
|
|
|
|
|
|
2014-05-01 18:39:51 +02:00
|
|
|
|
2014-05-01 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR binutils/16891
|
|
|
|
|
|
* i386-dis.c (print_insn): Handle prefixes before fwait.
|
|
|
|
|
|
|
2014-04-26 15:30:09 +02:00
|
|
|
|
2014-04-26 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* po/POTFILES.in: Regenerate.
|
|
|
|
|
|
|
2014-04-23 12:24:30 +02:00
|
|
|
|
2014-04-23 Andrew Bennett <andrew.bennett@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
* mips-dis.c (mips_arch_choices): Update mips32r2 and mips64r2
|
|
|
|
|
|
to allow the MIPS XPA ASE.
|
|
|
|
|
|
(parse_mips_dis_option): Process the -Mxpa option.
|
|
|
|
|
|
* mips-opc.c (XPA): New define.
|
|
|
|
|
|
(mips_builtin_opcodes): Add MIPS XPA instructions and move the
|
|
|
|
|
|
locations of the ctc0 and cfc0 instructions.
|
|
|
|
|
|
|
2014-04-22 16:57:47 +02:00
|
|
|
|
2014-04-22 Christian Svensson <blue@cmd.nu>
|
|
|
|
|
|
|
|
|
|
|
|
* Makefile.am: Remove openrisc and or32 support. Add support for or1k.
|
|
|
|
|
|
* configure.in: Likewise.
|
|
|
|
|
|
* disassemble.c: Likewise.
|
|
|
|
|
|
* or1k-asm.c: New file.
|
|
|
|
|
|
* or1k-desc.c: New file.
|
|
|
|
|
|
* or1k-desc.h: New file.
|
|
|
|
|
|
* or1k-dis.c: New file.
|
|
|
|
|
|
* or1k-ibld.c: New file.
|
|
|
|
|
|
* or1k-opc.c: New file.
|
|
|
|
|
|
* or1k-opc.h: New file.
|
|
|
|
|
|
* or1k-opinst.c: New file.
|
|
|
|
|
|
* Makefile.in: Regenerate.
|
|
|
|
|
|
* configure: Regenerate.
|
|
|
|
|
|
* openrisc-asm.c: Delete.
|
|
|
|
|
|
* openrisc-desc.c: Delete.
|
|
|
|
|
|
* openrisc-desc.h: Delete.
|
|
|
|
|
|
* openrisc-dis.c: Delete.
|
|
|
|
|
|
* openrisc-ibld.c: Delete.
|
|
|
|
|
|
* openrisc-opc.c: Delete.
|
|
|
|
|
|
* openrisc-opc.h: Delete.
|
|
|
|
|
|
* or32-dis.c: Delete.
|
|
|
|
|
|
* or32-opc.c: Delete.
|
|
|
|
|
|
|
2014-04-03 14:40:04 +02:00
|
|
|
|
2014-04-04 Ilya Tocar <ilya.tocar@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-dis.c (rm_table): Add encls, enclu.
|
|
|
|
|
|
* i386-gen.c (cpu_flag_init): Add CPU_SE1_FLAGS,
|
|
|
|
|
|
(cpu_flags): Add CpuSE1.
|
|
|
|
|
|
* i386-opc.h (enum): Add CpuSE1.
|
|
|
|
|
|
(i386_cpu_flags): Add cpuse1.
|
|
|
|
|
|
* i386-opc.tbl: Add encls, enclu.
|
|
|
|
|
|
* i386-init.h: Regenerated.
|
|
|
|
|
|
* i386-tbl.h: Likewise.
|
|
|
|
|
|
|
2014-04-03 02:04:23 +02:00
|
|
|
|
2014-04-02 Anthony Green <green@moxielogic.com>
|
|
|
|
|
|
|
|
|
|
|
|
* moxie-opc.c (moxie_form1_opc_info): Add sign-extension
|
|
|
|
|
|
instructions, sex.b and sex.s.
|
|
|
|
|
|
|
2014-03-26 19:44:27 +01:00
|
|
|
|
2014-03-26 Jiong Wang <jiong.wang@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* aarch64-dis.c (aarch64_ext_ldst_elemlist): Check H/S undefined
|
|
|
|
|
|
instructions.
|
|
|
|
|
|
|
Fix memory size for gather/scatter instructions
For gathers with indices larger than elements (e. g.)
vpgatherqd ymm6{k1}, ZMMWORD PTR [ebp+zmm7*8-123]
We currently treat memory size as a size of index register, while it is
actually should be size of destination register:
vpgatherqd ymm6{k1}, YMMWORD PTR [ebp+zmm7*8-123]
This patch fixes it.
opcodes/
* i386-opc.tbl: Change memory size for vgatherpf0qps, vgatherpf1qps,
vscatterpf0qps, vscatterpf1qps, vgatherqps, vpgatherqd, vpscatterqd,
vscatterqps.
* i386-tbl.h: Regenerate.
gas/testsuite/
* gas/i386/avx512pf-intel.d: Change memory size for vgatherpf0qps,
vgatherpf1qps, vscatterpf0qps, vscatterpf1qps.
* gas/i386/avx512pf.s: Ditto.
* gas/i386/x86-64-avx512pf-intel.d: Ditto.
* gas/i386/x86-64-avx512pf.s: Ditto.
* gas/i386/avx512f-intel.d: Change memory size for vgatherqps,
vpgatherqd, vpscatterqd, vscatterqps.
* gas/i386/avx512f.s: Ditto.
* gas/i386/x86-64-avx512f-intel.d: Ditto.
* gas/i386/x86-64-avx512f.s: Ditto.
2014-03-20 10:12:16 +01:00
|
|
|
|
2014-03-20 Ilya Tocar <ilya.tocar@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-opc.tbl: Change memory size for vgatherpf0qps, vgatherpf1qps,
|
|
|
|
|
|
vscatterpf0qps, vscatterpf1qps, vgatherqps, vpgatherqd, vpscatterqd,
|
|
|
|
|
|
vscatterqps.
|
|
|
|
|
|
* i386-tbl.h: Regenerate.
|
|
|
|
|
|
|
2014-03-19 17:43:41 +01:00
|
|
|
|
2014-03-19 Jose E. Marchesi <jose.marchesi@oracle.com>
|
|
|
|
|
|
|
|
|
|
|
|
* sparc-dis.c (v9_hpriv_reg_names): Names for %hstick_offset and
|
|
|
|
|
|
%hstick_enable added.
|
|
|
|
|
|
|
2014-03-19 10:38:25 +01:00
|
|
|
|
2014-03-19 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* rx-decode.opc (bwl): Allow for bogus instructions with a size
|
|
|
|
|
|
field of 3.
|
2014-03-19 10:40:21 +01:00
|
|
|
|
(sbwl, ubwl, SCALE): Likewise.
|
2014-03-19 10:38:25 +01:00
|
|
|
|
* rx-decode.c: Regenerate.
|
|
|
|
|
|
|
2014-03-12 05:32:00 +01:00
|
|
|
|
2014-03-12 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* Makefile.in: Regenerate.
|
|
|
|
|
|
|
2014-03-05 12:46:15 +01:00
|
|
|
|
2014-03-05 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
Update copyright years.
|
|
|
|
|
|
|
2014-03-04 22:30:39 +01:00
|
|
|
|
2014-03-04 Heiher <r@hev.cc>
|
2014-03-04 22:18:02 +01:00
|
|
|
|
|
|
|
|
|
|
* mips-dis.c (mips_arch_choices): Usee ISA_MIPS64R2 for Loongson-3A.
|
|
|
|
|
|
|
2014-03-04 22:16:38 +01:00
|
|
|
|
2014-03-04 Richard Sandiford <rdsandiford@googlemail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* mips-opc.c (mips_builtin_opcodes): Move the udi* instructions
|
|
|
|
|
|
so that they come after the Loongson extensions.
|
|
|
|
|
|
|
2014-03-01 12:25:26 +01:00
|
|
|
|
2014-03-03 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-gen.c (process_copyright): Emit copyright notice on one line.
|
|
|
|
|
|
|
2014-02-28 05:02:26 +01:00
|
|
|
|
2014-02-28 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* msp430-decode.c: Regenerate.
|
|
|
|
|
|
|
2014-02-27 16:06:56 +01:00
|
|
|
|
2014-02-27 Jiong Wang <jiong.wang@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* aarch64-tbl.h (aarch64_opcode_table): Replace IMM0 with
|
|
|
|
|
|
FPIMM0 for fcmeq, fcmgt, fcmge, fcmlt and fcmle.
|
|
|
|
|
|
|
2014-02-27 15:55:46 +01:00
|
|
|
|
2014-02-27 Yufeng Zhang <yufeng.zhang@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* aarch64-opc.c (print_register_offset_address): Call
|
|
|
|
|
|
get_int_reg_name to prepare the register name.
|
|
|
|
|
|
|
2014-02-20 16:08:13 +01:00
|
|
|
|
2014-02-25 Ilya Tocar <ilya.tocar@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-opc.tbl: Remove wrong variant of vcvtps2ph
|
|
|
|
|
|
* i386-tbl.h: Regenerate.
|
|
|
|
|
|
|
|
|
|
|
|
2014-02-20 Ilya Tocar <ilya.tocar@intel.com>
|
2014-02-20 15:57:31 +01:00
|
|
|
|
|
|
|
|
|
|
* i386-gen.c (cpu_flag_init): Add CPU_PREFETCHWT1_FLAGS/
|
|
|
|
|
|
(cpu_flags): Add CpuPREFETCHWT1.
|
|
|
|
|
|
* i386-init.h: Regenerate.
|
|
|
|
|
|
* i386-opc.h (CpuPREFETCHWT1): New.
|
|
|
|
|
|
(i386_cpu_flags): Add cpuprefetchwt1.
|
|
|
|
|
|
* i386-opc.tbl: Cahnge CPU of prefetchwt1 from CpuAVX512PF to CpuPREFETCHWT1.
|
|
|
|
|
|
* i386-tbl.h: Regenerate.
|
|
|
|
|
|
|
2014-02-20 15:31:11 +01:00
|
|
|
|
2014-02-20 Ilya Tocar <ilya.tocar@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-opc.tbl: Change CPU of vptestnmq, vptestnmd from CpuAVX512CD,
|
|
|
|
|
|
to CpuAVX512F.
|
|
|
|
|
|
* i386-tbl.h: Regenerate.
|
|
|
|
|
|
|
2014-02-19 21:53:27 +01:00
|
|
|
|
2014-02-19 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-gen.c (output_cpu_flags): Don't output trailing space.
|
|
|
|
|
|
(output_opcode_modifier): Likewise.
|
|
|
|
|
|
(output_operand_type): Likewise.
|
|
|
|
|
|
* i386-init.h: Regenerated.
|
|
|
|
|
|
* i386-tbl.h: Likewise.
|
|
|
|
|
|
|
Add clflushopt, xsaves, xsavec, xrstors
gas/
2014-02-12 Ilya Tocar <ilya.tocar@intel.com>
* config/tc-i386.c (cpu_arch): Add .clflushopt, .xsavec, .xsaves.
* doc/c-i386.texi: Document .xsavec/xsavec/.xsaves/xsaves/
clflushopt/.clfushopt.
gas/testsuite/
2014-02-12 Ilya Tocar <ilya.tocar@intel.com>
* gas/i386/clflushopt-intel.d: New.
* gas/i386/clflushopt.d: Ditto.
* gas/i386/clflushopt.s: Ditto.
* gas/i386/i386.exp: Run new tests.
* gas/i386/x86-64-clflushopt-intel.d: New.
* gas/i386/x86-64-clflushopt.d: Ditto.
* gas/i386/x86-64-clflushopt.s: Ditto.
* gas/i386/x86-64-xsavec-intel.d: Ditto.
* gas/i386/x86-64-xsavec.d: Ditto.
* gas/i386/x86-64-xsavec.s: Ditto.
* gas/i386/x86-64-xsaves-intel.d: Ditto.
* gas/i386/x86-64-xsaves.d: Ditto.
* gas/i386/x86-64-xsaves.s: Ditto.
* gas/i386/xsavec-intel.d: Ditto.
* gas/i386/xsavec.d: Ditto.
* gas/i386/xsavec.s: Ditto.
* gas/i386/xsaves-intel.d: Ditto.
* gas/i386/xsaves.d: Ditto.
* gas/i386/xsaves.s: Ditto.
opcodes/
2014-02-12 Ilya Tocar <ilya.tocar@intel.com>
* i386-dis.c (MOD enum): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4,
MOD_0FC7_REG_5.
(PREFIX enum): Add PREFIX_0FAE_REG_7.
(reg_table): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4 MOD_0FC7_REG_5.
(prefix_table): Add clflusopt.
(mod_table): Add xrstors, xsavec, xsaves.
* i386-gen.c (cpu_flag_init): Add CPU_CLFLUSHOPT_FLAGS,
CPU_XSAVES_FLAGS, CPU_XSAVEC_FLAGS.
(cpu_flags): Add CpuClflushOpt, CpuXSAVES, CpuXSAVEC.
* i386-init.h: Regenerate.
* i386-opc.tbl: Add clflushopt, xrstors, xrstors64, xsaves,
xsaves64, xsavec, xsavec64.
* i386-tbl.h: Regenerate.
2013-11-25 13:35:42 +01:00
|
|
|
|
2014-02-12 Ilya Tocar <ilya.tocar@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-dis.c (MOD enum): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4,
|
|
|
|
|
|
MOD_0FC7_REG_5.
|
|
|
|
|
|
(PREFIX enum): Add PREFIX_0FAE_REG_7.
|
|
|
|
|
|
(reg_table): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4 MOD_0FC7_REG_5.
|
|
|
|
|
|
(prefix_table): Add clflusopt.
|
|
|
|
|
|
(mod_table): Add xrstors, xsavec, xsaves.
|
|
|
|
|
|
* i386-gen.c (cpu_flag_init): Add CPU_CLFLUSHOPT_FLAGS,
|
|
|
|
|
|
CPU_XSAVES_FLAGS, CPU_XSAVEC_FLAGS.
|
|
|
|
|
|
(cpu_flags): Add CpuClflushOpt, CpuXSAVES, CpuXSAVEC.
|
|
|
|
|
|
* i386-init.h: Regenerate.
|
|
|
|
|
|
* i386-opc.tbl: Add clflushopt, xrstors, xrstors64, xsaves,
|
|
|
|
|
|
xsaves64, xsavec, xsavec64.
|
|
|
|
|
|
* i386-tbl.h: Regenerate.
|
|
|
|
|
|
|
2014-02-10 00:29:35 +01:00
|
|
|
|
2014-02-10 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* po/POTFILES.in: Regenerate.
|
|
|
|
|
|
* po/opcodes.pot: Regenerate.
|
|
|
|
|
|
|
2014-01-30 16:38:09 +01:00
|
|
|
|
2014-01-30 Michael Zolotukhin <michael.v.zolotukhin@gmail.com>
|
|
|
|
|
|
Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR binutils/16490
|
|
|
|
|
|
* i386-dis.c (OP_E_memory): Fix shift computation for
|
|
|
|
|
|
vex_vsib_q_w_dq_mode.
|
|
|
|
|
|
|
2014-01-09 19:13:10 +01:00
|
|
|
|
2014-01-09 Bradley Nelson <bradnelson@google.com>
|
|
|
|
|
|
Roland McGrath <mcgrathr@google.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-dis.c (print_insn): Do not touch all_prefixes[-1] when
|
|
|
|
|
|
last_rex_prefix is -1.
|
|
|
|
|
|
|
2014-01-08 14:48:12 +01:00
|
|
|
|
2014-01-08 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-gen.c (process_copyright): Update copyright year to 2014.
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2014-01-06 03:40:48 +01:00
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2014-01-03 Maciej W. Rozycki <macro@codesourcery.com>
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* nds32-asm.c (parse_operand): Fix out-of-range integer constant.
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2014-01-08 14:32:12 +01:00
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For older changes see ChangeLog-2013
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1999-05-03 09:29:11 +02:00
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2014-01-08 14:32:12 +01:00
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Copyright (C) 2014 Free Software Foundation, Inc.
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2012-12-10 13:48:03 +01:00
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Copying and distribution of this file, with or without modification,
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are permitted in any medium without royalty provided the copyright
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notice and this notice are preserved.
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1999-05-03 09:29:11 +02:00
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Local Variables:
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2001-01-11 20:01:42 +01:00
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mode: change-log
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left-margin: 8
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fill-column: 74
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1999-05-03 09:29:11 +02:00
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version-control: never
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End:
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