(TC_ADJUST_RELOC_COUNT): Tweak param name.
(TC_FORCE_RELOCATION, TC_FORCE_RELOCATION_SECTION): Likewise.
(TC_FIX_ADJUSTABLE, MD_PCREL_FROM_SECTION): Likewise.
(RELOC_ENUM): Define.
(fix_new_internal): Use RELOC_ENUM.
(fix_new, fix_new_exp): Likewise.
(adjust_reloc_syms): Comment. Remove unnecessary tests on sym != NULL.
Replace gotos with continue.
(write_relocs): Formatting. Avoid symbol loops in
RELOC_EXPANSION_POSSIBLE case too. Report bfd_reloc_outofrange
errors, and error number in other cases.
(fixup_segment): Remove param names from prototype. Rename
"this_segment_type" to "this_segment". Update linkrelax comment.
Remove "size, "place" and "where" local vars. Formatting. Update
"no symbol" comment. Remove #if 0 and #if 1.
* config/tc-ppc.c (ppc_cleanup): Do something only if format
is ELF.
(ppc_apuinfo_section_add): Define only if format is ELF.
(md_assemble): Emit APUinfo section only if format is ELF.
Fix formatting.
* config/tc-mips.c (macro2): Implement rotates by zero using shifts
by zero.
[gas/testsuite]
* gas/mips/rol.s: Add rotate by zero tests.
* gas/mips/rol.d: Update accordingly.
* gas/mips/rol64.d: Expect rotates by zero to use dsrl.
From matthew green <mrg@redhat.com>
* config/tc-ppc.c (PPC_OPCODE_CLASSIC): Enable this everywhere
PPC_OPCODE_PPC is, except for BookE architectures.
(md_parse_option): Add support for -mspe.
(md_show_usage): Add -mspe.
(md_parse_option): Add support for -me500 and
-me500x2 to generate code for Motorola e500 core complex.
(md_show_usage): Add -me500 and -me500x2.
(PPC_APUINFO_ISEL, PPC_APUINFO_PMR, PPC_APUINFO_RFMCI,
PPC_APUINFO_CACHELCK, PPC_APUINFO_SPE, PPC_APUINFO_EFS,
PPC_APUINFO_BRLOCK): New macros.
(ppc_cleanup): New function.
(ppc_apuinfo_section_add): New function.
(APUID): New macro.
(md_assemble): Collect info and write the APUinfo section.
* config/tc-ppc.h (md_cleanup): Define.
(ppc_cleanup): Export.
(ELF_TC_SPECIAL_SECTIONS): Add .PPC.EMB.apuinfo section.
the fix-up against on the right frag.
(s_cpsetup): Likewise. Parse third argument as expression, to
handle global symbols and forward/backward labels correctly.
* gas/d30v/guard-debug.d: Use -gstabs rather than -g.
* gas/elf/ehopt0.s: Don't use "$" in labels.
* gas/ieee-fp/x930509a.exp: Don't test c30.
* gas/m68hc11/malis.d: Adjust -I so that test runs when not building
in source dir.
* gas/mri/mri.exp: Don't run on "m68hc*".
* gas/sh/basic.exp (do_fp): Match LE too.
(pcrel-coff): Run this version for "sh*-pe*" and rename "sh*-hms" to
"sh*-rtems".
* gas/sh/pcrel-coff.d: Add -EB to objdump flags.
* gas/vtable/vtable.exp: Don't run on linuxecoff. setup_xfail in
preference to not running on ELF targets that might one day pass.
Add more xfails. Add more targets to the REL list.
* gas/m68hc11/insns12.s: New file to test specific 68HC12 insns.
* gas/m68hc11/insns12.d: New file.
* gas/m68hc11/branchs12.s: New test.
* gas/m68hc11/branchs12.d: New test.
* gas/m68hc11/all_insns.d: Dump the relocs to verify that they
are against symbols and not sections (for linker relaxation).
* gas/m68hc11/insns-dwarf2.d: Likewise.
* gas/m68hc11/insns.d: Likewise.
* gas/m68hc11/lbranch.d: Likewise.
* gas/m68hc11/lbranch-dwarf2.d: Likewise.
* gas/m68hc11/opers12.d: Likewise.
* gas/m68hc11/opers12-dwarf2.d: Likewise.
(TC_HANDLES_FX_DONE): Define to let md_apply_fix3 set fx_done flag
according to the reloc.
(tc_fix_adjustable, tc_m68hc11_fix_adjustable): Define.
(TC_FORCE_RELOCATION): Define.
(tc_m68hc11_force_relocation): Declare.
* config/tc-m68hc11.c (md_pseudo_table): Add relax command.
(s_m68hc11_relax): New function for relax group.
(build_insn, build_jump_insn): Emit a M68HC11_RL_JUMP reloc at
beginning of jump instruction.
(md_pcrel_from): Rename from md_pcrel_from_section and fix
address computation.
(tc-gen_reloc): Update.
(md_estimate_size_before_relax): Create the BFD_RELOC_16_PCREL as
PC-relative fixup.
(tc_m68hc11_force_relocation): New function, handle new relocs.
(tc_m68hc11_fix_adjustable): New to make sure there are enough
reloc for the linker relax pass.
(md_apply_fix3): Handle M68HC11_RL_JUMP, M68HC11_RL_GROUP
and VTABLE relocs.
(md_pseudo_table): Add .mode, .far and .interrupt pseudo op.
(s_m68hc11_mode): New function for .mode pseudo op.
(s_m68hc11_mark_symbol): New function for .far and .interrupt
pseudo op.
* config/tc-m68hc11.h (elf_tc_final_processing): Define.
(m68hc11_elf_final_processing): Declare.
page operand for call instruction.
(print_opcode_format): Likewise.
(check_range): Likewise for page range checking.
(get_operand): Don't skip a possible comma in operands.
(fixup8): Generate BFD_RELOC_M68HC11_PAGE reloc.
(fixup16): Likwise with BFD_RELOC_M68HC11_LO16.
(fixup24): New to handle call reloc.
(build_insn): Handle missing page operand for call instruction.
(find): Likewise.
(md_apply_fix3): Take into account new relocs.
(get_operand): Fix the mode for indexed indirect addressing.
(build_indexed_byte): Fix post index byte for indexed indirect mode.
* config/tc-mips.c (mips_ip): Don't work out the value of
constant %hi()s here.
[gas/testsuite/]
* gas/mips/elf-consthilo.[sd]: New test.
* gas/mips/mips.exp: Run it.
for ELF, and don't bother checking ELF relocs when non-ELF.
(i386_immediate): Allow absolute_section expressions for aout.
(i386_displacement): Likewise. Also test bfd_is_com_section.
(md_estimate_size_before_relax): Test OUTPUT_FLAVOR for ELF.
(md_apply_fix3): Hack for bfd_install_relocation when fx_pcrel,
not when fx_addsy. Remove dead code.
immediate offset in "dla" and "la" expansions.
* gas/mips/empic.d: Treat "addiu" and "daddiu" as equivalent when
$0 is source.
* mips-opc.c (mips_builtin_opcodes): Remove "dla" and "la" as
aliases to "daddiu" and "addiu".
at start of insn, pass it to output_disp and output_imm.
(output_disp): Added arguments. If _GLOBAL_OFFSET_TABLE_ is seen
in displacement for R_386_32 reloc, use R_386_GOTPC and compute
properly addend.
(output_imm): Added arguments. Compute properly addend for
R_386_GOTPC.
(md_apply_fix3): Remove R_386_GOTPC handling.
* testsuite/gas/i386/gotpc.s: New.
* testsuite/gas/i386/gotpc.d: New.
* testsuite/gas/i386/i386.exp: Add gotpc test.
* config/tc-mips.c (tc_gen_reloc): Extend GP-relative addend
handling to BFD_RELOC_MIPS16_GPREL.
[gas/testsuite/]
* gas/mips/elf-rel6.[sd]: New test.
* gas/mips/mips.exp: Run it.
2002-07-26 Chris Demetriou <cgd@broadcom.com>
* gas/mips/elf_ase_mips16.d: New file to test ELF MIPS16 ASE marking.
* gas/mips/elf_ase_mips16.s: Likewise.
* gas/mips/mips.exp: Run the new test.
[ ld/testsuite/ChangeLog ]
2002-07-26 Chris Demetriou <cgd@broadcom.com>
* ld-mips-elf/mips16-1.d: Check that ASE flag is actually set.
* doc/c-mips.texi: Remove -mcpu. Document -mabi.
* configure.in (MIPS_CPU_STRING_DEFAULT): New configuration macro.
(USE_E_MIPS_ABI_O32, MIPS_DEFAULT_64BIT): New configuration macros.
* configure, config.in: Regenerate.
* config/tc-mips.c (file_mips_abi): Rename to mips_abi.
(mips_set_options): Remove "abi" field.
(mips_opts): Update accordingly. Replace all uses of mips_opts.abi
with mips_abi.
(mips_cpu): Remove.
(mips_arch_string, mips_arch_info): New vars.
(mips_tune_string, mips_tune_info): New vars.
(ABI_NEEDS_32BIT_REGS, ABI_NEEDS_64BIT_REGS): New macros.
(HAVE_32BIT_GPRS, HAVE_32BIT_FPRS): Don't check the ABI.
(mips_isa_to_str, mips_cpu_to_str): Remove.
(mips_ip): If the selected architecture is a generic ISA rather
than a processor, only mention the ISA level in error messages.
(OPTION_MCPU): Remove.
(OPTION_FP64): New.
(md_longopts): Add -mfp64, remove -mcpu.
(mips_set_option_string): New fn.
(md_parse_option): Make -mipsN update file_mips_isa rather than
mips_opts.isa. Use mips_set_option_string to set -march or -mtune.
Don't let -mgp32 and -mfp32 change the ABI.
(show): Move to end of file. Constify string argument.
(md_show_usage): Move to the end of the file. Read available
architectures from mips_cpu_info_table.
(mips_set_architecture): New fn.
(mips_after_parse_args): Rework. Remove -mcpu handling. -mipsN
is an alias for -march=mipsN. Don't change the ABI based on other
flags. Infer the register size from the ABI as well as the
architecture. Complain about more conflicting arguments.
Unify logic with GCC.
(s_mipsset): Don't change the ABI.
(mips_elf_final_processing): Check USE_E_MIPS_ABI_O32.
(mips_cpu_info_table): Remove Generic-MIPS* entries, keeping just
"mipsN"-type entries. Remove entries that vary only in the
manufacturer's prefix, or that have "000" replaced by "k".
Remove TARGET_CPU entries. Make r2000 entry use CPU_R3000.
(mips_strict_matching_cpu_name_p, mips_matching_cpu_name_p): New fns.
(mips_parse_cpu): New fn.
(mips_cpu_info_from_name, mips_cpu_info_from_cpu): Remove.
(mips_cpu_info_from_isa): Minor formatting tweak.
[gas/testsuite]
* gas/mips/mips-gp32-fp64.d,
* gas/mips/mips-gp32-fp64-pic.d: Add -mfp64.
(ppc_cpu): Make it unsigned long to agree with struct powerpc_opcode
flags.
(ppc_size): Delete.
(ppc_xcoff64): Rename to ppc_obj64.
(md_parse_option <m>): Encode old ppc_size value in ppc_cpu.
(ppc_set_cpu): Set PPC_OPCODE_32 too.
(ppc_arch): Use ppc_obj64 instead of ppc_size to select bfd_mach_ppc64
or bfd_mach_ppc.
(ppc_target_format): Use ppc_obj64 to select format.
(md_begin): Adjust for PPC_OPCODE_32/64 in ppc_cpu.
(ppc_insert_operand): Use ppc_obj64 instead of ppc_size.
(ppc_elf_suffix): Likewise. Don't depend on BFD_DEFAULT_TARGET_SIZE.
(tc_frob_symbol): Likewise.
(md_assemble): Use ppc_obj64 instead of ppc_size. Don't depend on
BFD_DEFAULT_TARGET_SIZE.
(ppc_tc): Likewise.
(ppc_is_toc_sym): Likewise.
(md_apply_fix3): Likewise.
* config/tc-ppc.h (TC_FORCE_RELOCATION): Don't depend on
BFD_DEFAULT_TARGET_SIZE.
(ELF_TC_SPECIAL_SECTIONS): Likewise.
(tc_frob_symbol): Likewise.
(mips_ip): Likewise.
* mips.h (INSN_MIPS16): New define.
* mips-dis.c (mips_isa_type): Add MIPS16 insn handling.
* mips-opc.c (I16): New define.
(mips_builtin_opcodes): Make jalx an I16 insn.
From Catherine Moore, Michael Meissner, Richard Sandiford, Dave Brolley:
* po/POTFILES.in: Add tc-frv.c, tc-frv.h.
* configure.in: Support frv-*-*.
* Makefile.am (CPU_TYPES): Add frv.
(TARGET_CPU_CFILES): Add tc-frv.c.
(TARGET_CPU_HFILES): Add tc-frv.h.
(DEPTC_frv_coff): New variable.
(DEPTC_frv_elf): New variable.
(DEPOBJ_frv_coff): New variable.
(DEPOBJ_frv_elf): New variable.
(DEP_frv_coff): New variable.
(DEP_frv_elf): New variable.
* tc-frv.c: New file.
* tc-frv.h: New file.
* configure.in (vax-*-netbsdelf*, vax-*-netbsdaout*)
(vax-*-netbsd*): New targets.
* configure: Regenerate.
* config/aout_gnu.h (enum machine_type): Add M_VAX4K_NETBSD.
* config/tc-vax.c: Add support for ELF and PIC.
(flag_want_pic): New flag.
(float_cons): Fix prototype.
(md_apply_fix3): Adjust for BFD_ASSEMBLER.
(md_assemble): Introduce a new is_absolute local, and use it
rather than repeating the test. Make fatal errors actually
fatal by using as_fatal as appropriate. Adjust for BFD_ASSEMBLER.
Add support for ELF. Add support for PIC.
(md_convert_frag): Adjust for BFD_ASSEMBLER.
(tc_aout_fix_to_chars): Only include if OBJ_AOUT and not
BFD_ASSEMBLER.
(vax_reg_parse): Make the % register prefix mandatory for ELF,
optional for a.out, and not allowed for VMS. Adjust all callers.
(md_create_short_jump): Add ATTRIBUTE_UNUSED to unused arguments.
(md_create_long_jump): Likewise.
(md_undefined_symbol): Likewise.
(md_section_align): Likewise.
(md_shortopts): Allow -k and -K for ELF.
(md_parse_option): Set flag_want_pic if -k or -K.
(tc_headers_hook): New function if OBJ_AOUT and not BFD_ASSEMBLER.
(tc_gen_reloc): New function if BFD_ASSEMBLER.
* config/tc-vax.h (tc_headers_hook): Remove.
(TARGET_FORMAT): Set according to object format and target
environment.
(BFD_ARCH, TARGET_ARCH): Define.
(NO_RELOC): Adjust for BFD_ASSEMBLER.
(TC_RELOC_RTSYM_LOC_FIXUP, TC_FIX_ADJUSTABLE)
(tc_fix_adjustable): Define if BFD_ASSEMBLER.
* config/vax-inst.h (VAX_JSB, VAX_CALLS, VAX_CALLG): Define.
Based on patch from Matt Green:
* config/obj-elf.h (ECOFF_DEBUGGING): Make configurable.
* config/tc-mips.c (s_mips_file): Renamed from s_file.
(s_mips_loc): New function.
(mips_nonecoff_pseudo_table): Call them.
(append_insn): Call dwarf2_emit_insn.
Based on patch from Matt Green:
* config/obj-elf.h (ECOFF_DEBUGGING): Make configurable.
* config/tc-mips.c (s_mips_file): Renamed from s_file.
(s_mips_loc): New function.
(mips_nonecoff_pseudo_table): Call them.
(append_insn): Call dwarf2_emit_insn.
to -1.
(file_ase_mips16): New veriable.
(mips_eabi64): Remove.
(CPU_HAS_MIPS16): New define.
(CPU_HAS_MDMX): Fix data type.
(md_begin): Code cleanup. Use file_ase_mips16.
(mips_elf_final_processing): Handle mips16 header flag.
Handle EABI flag without intermediate variable.
(md_begin): Add $zero as alias name for $0.
(insn_uses_reg): Use ZERO define.
(mips_ip): Add $zero as alias name for $0.
(mips16_ip): Likewise.
(s_cplocal): Demand empty rest of input line.
(tc_get_register): Likewise. Add support for $kt0, kt1 register
names. Use ZERO define. Fix input_line_pointer progress.
(symbol_find_exact): Split out from..
(symbol_find_base): ..here.
* symbols.h: Replace CONST by const throughout.
(symbol_find_exact): Declare.
* config/obj-elf.c: #include "struc-symbol.h".
(elf_frob_file): If group name matches an exported symbol, use that
symbol for the signature and ".group" as the section name.
linkonce flag. Print all warnings.
(obj_elf_section): Parse ",comdat" for groups.
(elf_frob_file): Set SEC_LINK_ONCE on COMDAT groups. Check
consistency of comdat flag.
Nick Clifton
Jakub Jelinek
Jeff Law
Ben Elliston
Alan Modra
Hans-Peter Nilsson
Elena Zannoni
Richard Sandiford
Stan Cox
Stephen Clarke
Alexandre Oliva
H.J. Lu
Stephane Carrez
Maciej W. Rozycki
Richard Henderson
Daniel Jacobowitz
Chris Demetriou
Thiemo Seufer
Denis Chertykov
Jan Hubicka
Martin Schwidefsky
David O'Brien
Joern Rennecke
Dave Brolley
Catherine Moore
Tom Rix
Marek Michalkiewicz
Jason Thorpe