Commit Graph

3671 Commits

Author SHA1 Message Date
H.J. Lu 72f4393d8c Remove leading/trailing white spaces in ChangeLog 2015-07-24 04:16:47 -07:00
Nick Clifton 454de2ee15 Remove extraneous whitespace from ARM sim sources.
* armcopro.c: Remove extraneous whitespace.
	* armdefs.h: Likewise.
	* armfpe.h: Likewise.
	* arminit.c: Likewise.
	* armopts.h: Likewise.
	* armos.c: Likewise.
	* armos.h: Likewise.
	* armrdi.c: Likewise.
	* armsupp.c: Likewise.
	* armvirt.c: Likewise.
	* bag.c: Likewise.
	* bag.h: Likewise.
	* communicate.c: Likewise.
	* communicate.h: Likewise.
	* dbg_conf.h: Likewise.
	* dbg_cp.h: Likewise.
	* dbg_hif.h: Likewise.
	* dbg_rdi.h: Likewise.
	* gdbhost.c: Likewise.
	* gdbhost.h: Likewise.
	* iwmmxt.c: Likewise.
	* iwmmxt.h: Likewise.
	* kid.c: Likewise.
	* main.c: Likewise.
	* maverick.c: Likewise.
	* parent.c: Likewise.
	* thumbemu.c: Likewise.
	* wrapper.c: Likewise.
2015-07-14 12:06:33 +01:00
Nick Clifton db49d3d041 Fix snafu with latest addition to the ARM sim.
* Makefile.in (SIM_EXTRA_CFLAGS): Revert previous delta.
	(SIM_EXTRA_LIBS): Add -lm.
2015-07-02 16:19:09 +01:00
Nick Clifton 73cb0348b2 Add support for ARM v6 instructions.
* Makefile.in (SIM_EXTRA_CFLAGS): Add -lm.
	* armdefs.h (ARMdval, ARMfval): New types.
	(ARM_VFP_reg): New union.
	(struct ARMul_State): Add VFP_Reg and FPSCR fields.
	(VFP_fval, VFP_uword, VFP_sword, VFP_dval, VFP_dword): Accessor
	macros for the new VFP_Reg field.
	* armemu.c (handle_v6_insn): Add code to handle MOVW, MOVT,
	QADD16, QASX, QSAX, QSUB16, QADD8, QSUB8, UADD16, USUB16, UADD8,
	USUB8, SEL, REV, REV16, RBIT, BFC, BFI, SBFX and UBFX
	instructions.
	(handle_VFP_move): New function.
	(ARMul_Emulate16): Add checks for newly supported v6
	instructions.  Add support for VMRS, VMOV and MRC instructions.
	(Multiply64): Allow nRdHi == nRm and/or nRdLo == nRm when
	operating in v6 mode.
	* armemu.h (t_resolved): Define.
	* armsupp.c: Include math.h.
	(handle_VFP_xfer): New function.  Handles VMOV, VSTM, VSTR, VPUSH,
	VSTM, VLDM and VPOP instructions.
	(ARMul_LDC): Test for co-processor 10 or 11 and pass call to the
	new handle_VFP_xfer function.
	(ARMul_STC): Likewise.
	(handle_VFP_op): New function.  Handles VMLA, VMLS, VNMLA, VNMLS,
	VNMUL, VMUL, VADD, VSUB, VDIV, VMOV, VABS, VNEG, VSQRT, VCMP,
	VCMPE and VCVT instructions.
	(ARMul_CDP): Test for co-processor 10 or 11 and pass call to the
	new handle_VFP_op function.
	* thumbemu.c (tBIT, tBITS, ntBIT, ntBITS): New macros.
	(test_cond): New function.  Tests a condition and returns non-zero
	if the condition has been met.
	(handle_IT_block): New function.
	(in_IT_block): New function.
	(IT_block_allow): New function.
	(ThumbExpandImm): New function.
	(handle_T2_insn): New function.  Handles T2 thumb instructions.
	(handle_v6_thumb_insn): Add next_instr and pc parameters.
	(ARMul_ThumbDecode): Add support for IT blocks.  Add support for
	v6 instructions.
	* wrapper.c (sim_create_inferior): Detect a thumb address and call
	SETT appropriately.
2015-06-28 19:14:36 +01:00
Mike Frysinger 602a67cbea sim: trace: drop unused trace_one_insn
Everyone has migrated to the split functions (trace_prefix + trace_generic)
a while ago, so we can drop this one now.
2015-06-24 11:10:30 -04:00
Mike Frysinger 9b6025d169 sim: trace: rename debug_printf fully
Rather than redirect using a define, just rename the symbol fully.
2015-06-24 11:04:43 -04:00
Mike Frysinger fa8f87e53b sim: trace: add a basic cpu register class
The bfin/msp430 ports already had trace logic set up for reading/writing
cpu registers, albeit using different unrelated levels (core & vpu).  Add
a proper register class for these and for other ports.
2015-06-24 10:40:17 -04:00
Mike Frysinger cf304b56ca sim: trace: add set of system helpers
Some code paths trace on a system instance and not a cpu instance (like
the events code), so add some helpers for those cases.
2015-06-24 10:40:17 -04:00
Mike Frysinger 8371bf0cd9 sim: trace: document alu/fpu/vpu trace options better
Make the acronyms clear for people.
2015-06-24 10:16:45 -04:00
Mike Frysinger e750549018 sim: common: replace SIM_FILTER_PATH with lbasename
This helper macro has largely the same behavior as libiberty's lbasename.
There is a slight nuance related to colons, but it's not clear what the
point of that is, and the code implies that it just wants the basename.
2015-06-23 15:07:38 -04:00
Mike Frysinger 8d0978fb4b sim: use AS_HELP_STRING everywhere
This helps standardize the configure --help output.
2015-06-23 15:02:08 -04:00
Mike Frysinger 4953dc2094 sim: trace: do not enable internal debug by default
Since --trace-debug is for people hacking on the sim sources rather than
people just using the sim, default it to off.  This matches the behavior
of other debug knobs we have.
2015-06-23 14:05:38 -04:00
Mike Frysinger b50a153264 sim: assume recentish compiler/systems
Assume the build system supports stdint.h/stdarg.h as those have been
around long enough and we don't care about pre-stdc compilers anymore.
2015-06-23 14:04:49 -04:00
Mike Frysinger ccd4b2953b sim: common: add basic model assert
If the configured in default doesn't match a known value, throw an
assertion failure rather than segfaulting deeper down.
2015-06-21 13:56:24 -04:00
Mike Frysinger f55b33d51b sim: common: use standard intXX_t types for signedXX
Let's assume that the system supports the POSIX int8/16/32/64_t types
as this collapses the logic significantly.
2015-06-21 13:38:12 -04:00
Mike Frysinger 618b526e31 sim: common: standardize multiple include defines
We use SIM_xxx_H in most headers, so convert _SIM_xxx_H_ over to it.
2015-06-21 13:33:27 -04:00
Mike Frysinger 57b42d6489 sim: syscall: simplify unknown syscall trace
Since we always include the raw syscall number when tracing, also
including it in the name when it's unknown is redundant.  Simplify
the code by using a constant string.
2015-06-18 04:07:42 -04:00
Mike Frysinger 7aec3bb968 sim: callback: fix sentinel testing when walking maps
The new helpers for walking the maps tested the wrong value for exiting
the for loop.  This caused crashes when looking up entries that were not
in the map.
2015-06-18 04:02:26 -04:00
Mike Frysinger 7d5c6c43ca sim: syscall: add common sim_syscall helpers
Many ports have the same sim syscall logic, so add some helpers to handle
all the common details.  The arches still have to deal with the unpacking
and packing of the syscall arguments, but the rest of the sim<->callback
glue is now shared.
2015-06-17 13:19:51 -04:00
Mike Frysinger 61a0c964e6 sim: syscall: unify memory helpers
Almost every port implements these two callbacks in the same way, so
unify them in the common layer.
2015-06-17 13:19:51 -04:00
Mike Frysinger 6362a3f875 sim: callback: add human readable strings for debugging to maps
When tracing, we often want to display the human readable name for the
various syscall/errno values.  Rather than make each target duplicate
the lookup, extend the existing maps to include the string directly,
and add helper functions to look up the constants.

While most targets are autogenerated (from libgloss), the bfin/cris
targets have custom maps for the Linux ABI which need to be updated
by hand.
2015-06-17 13:19:51 -04:00
Mike Frysinger aaa9dc0170 sim: bfin: expand CB_SYS_xxx comment 2015-06-12 12:12:52 -04:00
Mike Frysinger 306f4178ef sim: update configure.in->configure.ac docs
A few places still refer to the configure.in file; update them.
2015-06-12 12:11:21 -04:00
Mike Frysinger a348708291 sim: drop -DTRACE from configure
No code uses this anymore and the symbol conflicts with the new TRACE
helper.  Punt it from configure.
2015-06-12 10:40:46 -04:00
Mike Frysinger 5b064994f0 sim: msp430: use new common trace print helpers
Replace the "if (TRACE_xxx_P) trace_generic" form with "TRACE_xxx".
The output is the same, but the code is nicer to read.
2015-06-12 10:14:00 -04:00
Mike Frysinger 0054dcd7b6 sim: moxie: use new common trace defines
Now that there's common helpers for printing trace data, switch to that
to restore the insn tracing support for this target.
2015-06-12 06:57:44 -04:00
Mike Frysinger bb11f3ed2b sim: trace: add common macros for logging info
The Blackfin port had some TRACE_xxx macros for easily logging trace data.
Use these as a base for common ones that have a simple form and match the
existing sets of helper macros.
2015-06-12 06:34:20 -04:00
Mike Frysinger 29bc024d07 sim: mips: switch to common WITH_TRACE_ANY_P
We want to add new common trace helpers including "TRACE", so change the
mips one to the new WITH_TRACE_ANY_P macro since they do the same thing.
2015-06-12 06:28:17 -04:00
Mike Frysinger bffcfec8c3 sim: trace: add WITH_TRACE_ANY_P helper
We have STRACE_ANY_P and TRACE_ANY_P, so add WITH_TRACE_ANY_P to fill
out the API.  This lets us wrap the internal configure symbol.
2015-06-12 06:21:38 -04:00
Mike Frysinger 53d2389fd0 sim: moxie: rename TRACE to MOXIE_TRACE_INSN
We want to add new common trace helpers including "TRACE", so rename the
moxie one to MOXIE_TRACE_INSN.  This also matches what the code is doing.
2015-06-12 06:16:39 -04:00
Mike Frysinger db7858e227 sim: cgen: namespace custom trace functions
The cgen code declares some macros/funcs using the trace_xxx prefix, but
the code isn't generic and only works with cgen targets.  This is blocking
the creation of new common trace functions.

Let's blindly add cgen_xxx prefixes to all these symbols.  Some already
use this convention to avoid conflicts, so it makes sense to align them.
In the future we might want to move some to the common trace core, but
one thing at a time.
2015-06-12 04:19:45 -04:00
Mike Frysinger c1d8560ea5 sim: msp430: delete unused trace macros
These macros were copied from the Blackfin port but never used, so delete
them as part of the trace unification work.
2015-06-11 12:52:20 -04:00
Mike Frysinger 83034798de sim: trace: centralize the system tracing
First we convert the ETRACE_P to STRACE_EVENTS_P.  This means we move from
using the sim_events.trace storage to the common sim_state_base.trace_data
array.  With that deleted, the common trace init code can be simplified so
the sim state works the same as the sim cpu.
2015-06-11 10:39:43 -04:00
Mike Frysinger ce4eda4a58 sim: trace: add STRACE_xxx_P macros
These are the parallel to the TRACE_xxx_P macros and fill out the full
set to match the existing debug one.
2015-06-11 10:37:15 -04:00
Mike Frysinger a6c2a374e0 sim: trace: use existing defines for the useful mask
No point in duplicating the shift logic when we have macros already to
keep that all unified.
2015-06-11 10:29:44 -04:00
Mike Frysinger 9b9c712ceb sim: trace: create a common WITH_TRACE_P macro
This way we can use the IDX macros everywhere and not worry about the
encoding of the WITH_TRACE define in multiple places.
2015-06-11 10:28:58 -04:00
Mike Frysinger 66a19e2f81 sim: frv: drop custom debug mask
This is the only sim that sets up its own WITH_TRACE mask and it conflicts
with the user setting their own list at configure time.  Drop it to match
all the other sims.
2015-06-11 10:22:44 -04:00
Mike Frysinger 09896bd223 sim: m68hc11: delete unused interrupt_names
The interrupts.c file has a static/fuller definition that is used,
so drop this copy in interp.c.
2015-06-11 10:21:32 -04:00
Mike Frysinger a84f8df0e2 sim: m68hc11: switch to common sim_resume
This code already matched the common sim reusme logic, so we can simply
drop it and pull in the common code.
2015-06-11 10:17:54 -04:00
Mike Frysinger 926b1cd8cf sim: mn10300: delete unused memory code
Only one place used get_word/put_word, so inline the usage there.
All the rest is dead code so trim it.
2015-06-11 10:13:49 -04:00
Mike Frysinger 2cc78d4dd7 sim: mn10300: add missing static markings 2015-06-11 07:35:32 -04:00
Mike Frysinger 96eaf29ec4 sim: mn10300: delete unused exception/exited/debug state
The syscall path was the only code checking the custom exception state
after recent cleanups.  Once we change that to the common engine halt
function, we can delete that state entirely.

This also helps highlight some other dead code that we can cull.
2015-06-11 07:29:16 -04:00
Mike Frysinger b0e4c8a581 sim: mn10300: use common size types
No point in open coding this logic here when we have common size types
already that give the right answer.
2015-06-11 07:20:57 -04:00
Mike Frysinger 5d19c36612 sim: m68hc11/mn10300/v850: delete redundant INLINE defines
The sim-inline.h header already takes care of this for us, so punt
the local definitions.
2015-06-11 07:17:12 -04:00
Mike Frysinger 31557eccb2 sim: microblaze: switch to common sim_resume/sim_stop_reason
This allows us to use the common code for all exception handling.
2015-06-11 07:13:22 -04:00
Joel Brobecker bb9e16d4bb Fix latest sim/common/ChangeLog entry. 2015-06-09 14:29:09 -04:00
Joel Brobecker f419f52b9b Remove unnecessary empty line in sim/common/ChangeLog 2015-06-09 14:27:58 -04:00
Mike Stump 509c2f329a Fix spelling mistakes in sim/common/sim-events.c error messages.
sim/common/ChangeLog:

        * sim-events.c (sim_events_schedule_after_signal): Fix spelling
        mistake in call to sim_engine_abort.
        (sim_events_schedule_after_signal): Likewise.
2015-06-09 14:27:46 -04:00
Mike Frysinger 296730a52b sim: erc32: restore attribution 2015-05-17 17:15:36 +08:00
Joel Brobecker 17d88f73c0 Switch erc32 simulator copyright headers to FSF.
Permission was granted by Jiri Gaisler, who has a copyright assignment
on file for GDB.

sim/erc32/ChangeLog:

        * configure.ac: Add copyright header.
        * erc32.c: Change copyright holder to FSF.  Reformat.
        * exec.c, float.c, func.c, interf.c, sis.c, sis.h: Likewise.
        * help.c, startsim: Add copyright header.
2015-05-08 07:23:15 -07:00
DJ Delorie 0952813b0b Make RL78 disassembler and simulator respect ISA for mul/div
[gas]
	* config/rl78-defs.h (rl78_isa_g10): New.
	(rl78_isa_g13): New.
	(rl78_isa_g14): New.
	* config/rl78-parse.y (ISA_G10): New.
	(ISA_G13): New.
	(ISA_G14): New.
	(MULHU, MULH, MULU, DIVHU, DIVWU, MACHU, MACH): Use them.
	* config/tc-rl78.c (rl78_isa_g10): New.
	(rl78_isa_g13): New.
	(rl78_isa_g14): New.

[gdb]
	* rl78-tdep.c (rl78_analyze_prologue): Pass RL78_ISA_DEFAULT to
	rl78_decode_opcode

[include]
	* dis-asm.h (print_insn_rl78_g10): New.
	(print_insn_rl78_g13): New.
	(print_insn_rl78_g14): New.
	(rl78_get_disassembler): New.
	* opcode/rl78.h (RL78_Dis_Isa): New.
	(rl78_decode_opcode): Add ISA parameter.

[opcodes]
	* disassemble.c (disassembler): Choose suitable disassembler based
	on E_ABI.
	* rl78-decode.opc (rl78_decode_opcode): Take ISA parameter.  Use
	it to decode mul/div insns.
	* rl78-decode.c: Regenerate.
	* rl78-dis.c (print_insn_rl78): Rename to...
	(print_insn_rl78_common): ...this, take ISA parameter.
	(print_insn_rl78): New.
	(print_insn_rl78_g10): New.
	(print_insn_rl78_g13): New.
	(print_insn_rl78_g14): New.
	(rl78_get_disassembler): New.

[sim]
	* rl78/cpu.c (g14_multiply): New.
	* rl78/cpu.h (g14_multiply): New.
	* rl78/load.c (rl78_load): Decode ISA completely.
	* rl78/main.c (main): Expand -M to include other ISAs.
	* rl78/rl78.c (decode_opcode): Decode based on ISA.
	* rl78/trace.c (rl78_disasm_fn): New.
	(sim_disasm_init): Reset it.
	(sim_disasm_one): Get correct disassembler for ISA.
2015-04-30 15:25:49 -04:00
Nick Clifton 0a13382c8e Fix problems in the sim sources discovered by running the cppcheck static analysis tool.
erc32	PR 18273
	* sis.c (main): Remove unreachable code.

m68hc11	* gencode.c (gen_fetch_operands): Remove unreachable code.

ppc	* hw_htab.c (htab_map_binary): Fix overlap check.

common	* sim-fpu.c (INLINE_SIM_FPU): Fix static analysis warning by
	increasing parenthesis around casts to signed values.
2015-04-29 16:02:02 +01:00
Senthil Kumar Selvaraj 180d40b903 sim: avr: Fix 'multiple definition of sim_{read,write}'
This patch does whatever was done in
https://sourceware.org/ml/gdb-patches/2015-04/msg00437.html to fix
broken gdb build for the AVR target.
2015-04-27 09:54:37 -04:00
Nick Clifton de7669bfa5 Fix typos in sim sources exposed by static analysis.
bfin	PR 18273
	* bfin-sim.c (decode_dsp32alu_0): Remove spurious check for
	s == 1.

erc32	PR 18273
	* exec.c (add32): Fix typo in check for overflow.

igen	PR 18273
	* misc.c (a2i): Fix typos checking for uppercase letters.
2015-04-24 15:43:21 +01:00
Nick Clifton 63c72d1ae4 Fix typo in check for valid register number in RX sim.
PR sim/18273
	* reg.c (put_reg): Fix check for valid register number.
2015-04-24 15:31:36 +01:00
Mike Frysinger 43236bb255 sim: mcore: clean up printf warnings
These printf statements are showing "word" objects which are typedefed
from long, so make sure to use l with %x when printing them to avoid
warnings from gcc.
2015-04-21 03:10:16 -04:00
Mike Frysinger f63036b811 sim: mcore: convert to common memory/verbose functions
Re-use the existing memory core that handles reads/writes.

The verbose command is converted to the common --verbose flag
since only a few call sites use it now.
2015-04-21 03:10:16 -04:00
Mike Frysinger e53e5aab53 sim: mcore: drop watchpoint/dumpmem/clearstats support
In preparation for converting to the common memory framework, the custom
commands get in our way.  But when we realize that gdb support has been
dropped for mcore, it makes things a bit easier: the main runner does not
let you run arbitrary commands once simulation starts.

So lets disable watchpoint support until it can be converted to the common
watchpoint logic.  There's already an ifdef to let us do that.

We straight up drop support for the dumpmem command (no other sim supports
this, and if it's a feature people want, we can add a common func) and the
clearstats command (not a big deal -- just restart your simulation).

We leave in place the verbose check points as a follow up commit will cut
that over to common logic.
2015-04-21 03:10:16 -04:00
Mike Frysinger 767e68f1b9 sim: mcore: switch to common syscall handling
Now that libgloss has a header tracking the syscalls for this arch, we
can update the database to include it for the symbolic constants/maps.
Then we can switch the mcore syscall callbacks over to the common ones.
2015-04-21 03:10:16 -04:00
Mike Frysinger 248d23e82b sim: gennltvals.sh: handle split out newlib source tree
Since newlib no longer shares the same repo as binutils/gdb, we have to go
searching further afield to locate the sources.  We still look at the top
level for newlib, but if that is not found, we also try up one dir outside
of this source tree.  It sucks, but better than the status quo (no workie).
2015-04-21 03:10:16 -04:00
Jiri Gaisler d3e9b40afb sim/erc32: Switched emulated memory to host endian order.
Change data ordering in emulated memory from target order (big endian)
to host order. Improves performance and simplifies most memory
operations. Requires some byte twisting during stores on little
endian hosts (intel). Also removed support for little-endian binaries.
2015-04-19 02:29:44 -04:00
Mike Frysinger 3ebe2863f7 sim: clean up duplicate sim-engine hooks
Now that we've unified sim-cpu, we can delete the duplicate sim-engine
hooks -- these targets defined these only because they didn't fully
implement the sim-cpu callbacks.
2015-04-18 04:40:27 -04:00
Mike Frysinger e8d3a34fee sim: trim old USING_SIM_BASE_H define
This doesn't appear to have been used since 1998, but wasn't cleaned
up since.  So much for being "quick" ;).
2015-04-18 04:32:56 -04:00
Mike Frysinger 20bca71d82 sim: unify SIM_CPU definition
Since every target typedefs this the same way, move it to the common code.

We have to leave Blackfin behind here for now because of inter-dependencies
on types and headers: sim-base.h includes sim-model.h which needs types in
machs.h which needs types in bfim-sim.h which needs SIM_CPU.
2015-04-18 04:31:36 -04:00
Mike Frysinger 7e83aa92f2 sim: unify sim_cia definition
Almost every target defines sim_cia the same way -- either using the
address_word type directly, or a type of equivalent size.  The only
odd one out is sh64 (who has 32bit address_word and 64bit cia), and
even that case doesn't seem to make sense.  We'll put off clean up
though of sh64 and at least set up a sensible default for everyone.
2015-04-18 04:14:38 -04:00
Mike Frysinger c85fc61074 sim: microblaze: switch to common memory functions
Re-use the existing memory core that handles reads/writes.

This drops support for the dumpmem command, but gdb itself has
support for dumping memory regions.

The verbose command is converted to the common --verbose flag
since only two call sites use it now.

Support for the clearstats command is dropped entirely, but no
other sim really does this, and the same thing can be done by
reloading.  If it's important (clearing cycle stats) to someone,
we can add a common function for it.
2015-04-17 03:15:43 -04:00
Mike Frysinger 034685f9ce sim: replace CIA_{GET,SET} with CPU_PC_{GET,SET}
The CIA_{GET,SET} macros serve the same function as CPU_PC_{GET,SET}
except the latter adds a layer of indirection via the sim state.  This
lets models set up different functions at runtime and doesn't reach so
directly into the arch-specific cpu state.

It also doesn't make sense to have two sets of macros that do exactly
the same thing, so lets standardize on the one that gets us more.
2015-04-17 02:44:30 -04:00
Mike Frysinger 27b97b40bc sim: arm/cr16/d10v/h8300/microblaze/sh: fill out sim-cpu pc fetch/store helpers
This makes the common sim-cpu logic work.
2015-04-17 02:22:16 -04:00
Mike Frysinger 4c0cab1e21 sim: avr/mcore/moxie: fill out sim-cpu pc fetch/store helpers
This makes the common sim-cpu logic work.
2015-04-16 02:13:50 -04:00
Mike Frysinger 78e9aa70fe sim: unify sim-cpu usage
Now that all the targets are utilizing CPU_PC_{FETCH,STORE}, and the
cpu state is multicore, and the STATE_CPU defines match, we can move
it all to the common code.
2015-04-15 02:19:52 -04:00
Mike Frysinger f95f4ed2c4 sim: cris/frv/h8300/iq2000/lm32/m32r/sh64: standardize cpu state
This sets up the sim_state structure and the cpu member to match what we
do in most other sims, and what the common code suggests.  This is a step
to unifying on the sim-cpu.o object.
2015-04-15 01:25:32 -04:00
Mike Frysinger 887bddbcad sim: ppc: fix up version script
The common sim code has switched to using gdb directly; update the
ppc copy too.
2015-04-13 23:17:53 -04:00
Mike Frysinger bf12d44ee0 sim: fix the PKGVERSION define
This should be SIM, not GDB.
2015-04-13 02:41:10 -04:00
Mike Frysinger a542beff94 sim: options: add --version support
The old run frontend had a --version option, but the new common
sim-options file does not.  Restore support for that so we can
get version info out of `run` when using the new frontend.
2015-04-13 02:35:26 -04:00
Mike Frysinger 8c32ba2233 sim: switch to gdb version script
Since the local create-version.sh already points directly into the gdb
source tree, we might as well use the gdb script directly too.
2015-04-13 02:32:58 -04:00
Mike Frysinger 64f14c9707 sim: mn10300: convert to sim-cpu
Make cpu allocation fully dynamic so we can leverage the common
sim-cpu and its APIs.
2015-04-13 02:13:48 -04:00
Mike Frysinger 14c9ad2edb sim: v850: convert to sim-cpu
Make cpu allocation fully dynamic so we can leverage the common
sim-cpu and its APIs.
2015-04-13 02:11:50 -04:00
Mike Frysinger 7bebb329bb sim: mips: convert to sim-cpu
Make cpu allocation fully dynamic so we can leverage the common
sim-cpu and its APIs.
2015-04-13 02:09:55 -04:00
Mike Frysinger bea3f671c5 sim: m68hc11: convert to sim-cpu
Make cpu allocation fully dynamic so we can leverage the common
sim-cpu and its APIs.
2015-04-13 02:07:23 -04:00
Mike Frysinger 8ac57fbde4 sim: mips: fix prototype warnings
Convert a bunch of old style prototypes and tweak various casts
to match the function signatures.
2015-04-13 02:01:11 -04:00
Mike Frysinger 65f9096890 sim: ft32: fix ft32_pc_get logic 2015-04-13 01:54:33 -04:00
Hans-Peter Nilsson a9d9677441 Do unset_currtarget_info ldscript for all simulator testsuites.
sim/testsuite:
	* sim-defs.exp (sim_init): Unset target ldscript here.

sim/testsuite/sim/mips:
	* basic.exp: Don't unset target ldscript here.
2015-04-13 01:56:04 +02:00
Mike Frysinger e787f858a4 sim: arm/mips: fix sim_read/sim_write linkage errors
With sim-hrw.o being built & linked in the common list, some people are
getting linking errors now for these targets.  Move the main objects that
provide these functions before the common list to avoid that.
2015-04-12 05:47:39 -04:00
Mike Frysinger 29f1a5934a sim: ft32: delete sim_read/sim_write funcs
The common sim-hrw.o provides both of these, so simply use them.
2015-04-12 05:13:23 -04:00
Mike Frysinger 122bbfb52a sim: move sim-engine.o/sim-hrw.o to the common list
This makes these two objects available to all sims by default.
2015-04-06 23:56:47 -04:00
Mike Frysinger 20cc975360 sim: moxie: fix running after nrun conversion
The nrun conversion was slightly incorrect in how it stopped when an
exception occurred.  We still set cpu.asregs.exception, but nothing
was checking it anymore.  Convert all of that to sim_engine_halt.

To keep things from regressing again, add a basic testsuite too.
2015-04-05 04:37:44 -04:00
Mike Frysinger 024305f7f2 sim: mn10300: add a basic testsuite 2015-04-05 03:52:08 -04:00
Mike Frysinger aad84fa6ae sim: m68hc11: add a basic testsuite 2015-04-05 03:17:44 -04:00
Mike Frysinger eed64ce675 sim: iq2000: add a basic testsuite 2015-04-05 02:28:44 -04:00
Mike Frysinger e56dbbb92f sim: lm32: add a basic testsuite 2015-04-05 01:58:00 -04:00
Mike Frysinger b366059a5b sim: d10v: fix signal updates
Way back in aba6488e0b, a bunch of signal
defines were changed to TARGET_SIGNAL_xxx.  For d10v, the transition was
incomplete which lead to sim_stop_reason using the new set but sim_resume
still using the old set.  Which meant in some cases, the sim would never
actually stop.

Convert all the remaining SIGxxx defines in here to TARGET_SIGNAL_xxx.
This has the nice side effect of fixing the testsuite.
2015-04-02 20:40:11 -04:00
H.J. Lu 7fed4b0be6 Regenerate configure in sim
* arm/configure: Regenerated.
	* avr/configure: Likewise.
	* bfin/configure: Likewise.
	* common/configure: Likewise.
	* cr16/configure: Likewise.
	* cris/configure: Likewise.
	* d10v/configure: Likewise.
	* erc32/configure: Likewise.
	* frv/configure: Likewise.
	* ft32/configure: Likewise.
	* h8300/configure: Likewise.
	* igen/configure: Likewise.
	* iq2000/configure: Likewise.
	* lm32/configure: Likewise.
	* m32c/configure: Likewise.
	* m32r/configure: Likewise.
	* m68hc11/configure: Likewise.
	* mcore/configure: Likewise.
	* microblaze/configure: Likewise.
	* mips/configure: Likewise.
	* mn10300/configure: Likewise.
	* moxie/configure: Likewise.
	* msp430/configure: Likewise.
	* ppc/configure: Likewise.
	* rl78/configure: Likewise.
	* rx/configure: Likewise.
	* sh/configure: Likewise.
	* sh64/configure: Likewise.
	* v850/configure: Likewise.
2015-04-02 05:43:07 -07:00
Mike Frysinger 1a8faa2aa6 sim: clean up SIM_EXTRA_OBJS references
This variable was deleted in previous commits and is not used anymore.
Prune any stray references to it.
2015-04-02 00:51:40 -04:00
H.J. Lu 79730a3b26 Fix sim build
* common/Make-common.in (CSEARCH): Remove $(ZLIBINC).
	(BFD_LIB): Remove $(ZLIB).
	(CONFIG_LIBS): Add $(ZLIB).
	* ppc/Makefile.in (ZLIBINC): Removed.
	(INCLUDES): Remove $(ZLIBINC).
	(BFD_LIB): Remove $(ZLIB).
2015-04-01 10:27:43 -07:00
H.J. Lu 0ceaf1ec96 Regenerate configure in sim
* arm/configure: Regenerated.
	* avr/configure: Likewise.
	* bfin/configure: Likewise.
	* common/configure: Likewise.
	* cr16/configure: Likewise.
	* cris/configure: Likewise.
	* d10v/configure: Likewise.
	* erc32/configure: Likewise.
	* frv/configure: Likewise.
	* ft32/configure: Likewise.
	* h8300/configure: Likewise.
	* igen/configure: Likewise.
	* iq2000/configure: Likewise.
	* lm32/configure: Likewise.
	* m32c/configure: Likewise.
	* m32r/configure: Likewise.
	* m68hc11/configure: Likewise.
	* mcore/configure: Likewise.
	* microblaze/configure: Likewise.
	* mips/configure: Likewise.
	* mn10300/configure: Likewise.
	* moxie/configure: Likewise.
	* msp430/configure: Likewise.
	* ppc/configure: Likewise.
	* rl78/configure: Likewise.
	* rx/configure: Likewise.
	* sh/configure: Likewise.
	* sh64/configure: Likewise.
	* v850/configure: Likewise.
2015-04-01 10:15:13 -07:00
Mike Frysinger 269e9c185f sim: m32c: enable warnings & clean up a bunch
This doesn't clean up all the warnings, just most of them.
The ones that are left will require some care to unravel.
2015-04-01 02:22:58 -04:00
Mike Frysinger 0fe84f3fbe sim: run: punt!
Now that all targets have been converted to nrun, we can finally punt
this old inconsistent interface.

A few stray references to the old run were sprinkled about; clean them
up in the process.

We leave behind the run(1) man page mostly so that we get it updated for
the new nrun interface.
2015-04-01 01:22:44 -04:00
Mike Frysinger aadc9410ba sim: update zlib handling
With zlib being mandatory, and the updated m4 configs, we need to regen
and use the new settings w/bfd to avoid linkage errors.
2015-04-01 01:07:57 -04:00
Mike Frysinger b38f7f340b sim: cr16/d10v: restore generated headers dep
While cleaning up stale make rules, one too many were deleted.  The
build system autogenerates static rules, but not generated files.
2015-03-31 01:59:44 -04:00
Mike Frysinger 5a394431de common: cgen-mem/cgen-ops: fix extern inline handling
With newer versions of gcc (5.x), the extern inline we're using with the
cgen-{mem,ops} modules no longer work.  Since this code really wants the
gnu inline semantics, use that attribute explicitly.
2015-03-31 01:58:01 -04:00