Michael Eager
0db4b3260c
Add stack high register and stack low register for MicroBlaze
...
hardware assisted stack protection, stores stack low / stack high limits
for detecting stack overflow / underflow
binutils/opcodes
* microblaze-opcm.h: Add REG_SLR_MASK, REG_SHR_MASK, REG_SHR and REG_SLR
* microblaze-dis.c (get_field_special): Handle REG_SLR_MASK and REG_SHR_MASK
binutils/gas
* config/tc-microblaze.c (parse_reg): Parse REG_SLR, REG_SHR
binutils/gas
* gas/microblaze/allinsn.s: Test use of SHR, SLR
* gas/microblaze/allinsn.d: Likewise
2012-11-21 17:34:14 +00:00
H.J. Lu
9b30cccca9
Fix opcode for 64-bit jecxz
...
gas/testsuite/
PR gas/14859
* gas/i386/x86-64-opcode.s: Add jecxz.
* gas/i386/x86-64-opcode.d: Updated.
opcodes/
PR gas/14859
* i386-opc.tbl: Fix opcode for 64-bit jecxz.
* i386-tbl.h: Regenerated.
2012-11-20 14:21:33 +00:00
Andreas Krebbel
0b7fe784ac
2012-11-20 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
...
* s390-opc.txt: Fix srstu and strag opcodes.
2012-11-20 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* gas/s390/zarch-z9-109.d: Fix srstu opcode.
* gas/s390/zarch-z900.d: Replace lasp with strag.
2012-11-20 11:58:30 +00:00
Michael Eager
d3da77419a
opcodes/
...
* microblaze-opc.h: Define new instruction type INST_TYPE_IMM5,
update OPCODE_MASK_H13S, add OPCODE_MASK_HN, define MIN_IMM5 / MAX_IMM5,
and increase MAX_OPCODES.
(op_code_struct): add mbar and sleep
* microblaze-opcm.h (microblaze_instr): add mbar
Define IMM_MBAR and IMM5_MBAR_MASK
* microblaze-dis.c: Add get_field_imm5_mbar
(print_insn_microblaze): Add support for INST_TYPE_IMM5 and INST_TYPE_NONE
gas/
* config/tc-microblaze.c (md_assemble): Add support for INST_TYPE_IMM5
gas/testsuite/
* gas/microblaze/allinsn.s: Add mbar and sleep
* gas/microblaze/allinsn.d: Likewise
2012-11-14 17:05:24 +00:00
Michael Eager
ed8ec0ec78
Add clz opcode.
...
opcodes/
* microblaze-opc.h: Increase MAX_OPCODES (op_code_struct): add clz insn
* microblaze-opcm.h (microblaze_instr): add clz
gas/testsuite/
* gas/microblaze/allinsn.s: Add clz insn
* gas/microblaze/allinsn.d: Likewise
2012-11-14 16:45:01 +00:00
Michael Eager
e692c2171e
Add the endian reversing versions of load/store instructions;
...
2012-11-14 Edgar E. Iglesias <edgar.iglesias@gmail.com>
* microblaze-opc.h: Increase MAX_OPCODES (op_code_struct): add lbur,
lhur, lwr, sbr, shr, swr
* microblaze-opcm.h (microblaze_instr): add lbur, lhur, lwr, sbr, shr,
swr
2012-11-14 David Holsgrove <david.holsgrove@xilinx.com>
* gas/microblaze/allinsn.exp: New file - test newly added opcodes
* gas/microblaze/allinsn.s: Likewise
* gas/microblaze/allinsn.d: Likewise
2012-11-14 16:19:30 +00:00
Nick Clifton
de863c7475
2012-11-09 Nick Clifton <nickc@redhat.com>
...
* Makefile.am (ALL_MACHINES): Add cpu-v850-rh850.lo.
(ALL_MACHINES_CFILES): Add cpu-v850-rh850.c.
* archures.c (bfd_arch_info): Add bfd_v850_rh850_arch.
* config.bfd: Likewise.
* configure.in: Add bfd_elf32_v850_rh850_vec.
* cpu-v850.c: Update printed description.
* cpu-v850_rh850.c: New file.
* elf32-v850.c (v850_elf_check_relocs): Add support for RH850 ABI
relocs.
(v850_elf_perform_relocation): Likewise.
(v850_elf_final_link_relocate): Likewise.
(v850_elf_relocate_section): Likewise.
(v850_elf_relax_section): Likewise.
(v800_elf_howto_table): New.
(v850_elf_object_p): Add support for RH850 ABI values.
(v850_elf_final_write_processing): Likewise.
(v850_elf_merge_private_bfd_data): Likewise.
(v850_elf_print_private_bfd_data): Likewise.
(v800_elf_reloc_map): New.
(v800_elf_reloc_type_lookup): New.
(v800_elf_reloc_name_lookup): New.
(v800_elf_info_to_howto): New.
(bfd_elf32_v850_rh850_vec): New.
(bfd_arch_v850_rh850): New.
* targets.c (_bfd_targets): Add bfd_elf32_v850_rh850_vec.
* Makefile.in: Regenerate.
* bfd-in2.h: Regenerate.
* configure: Regenerate.
* readelf.c (get_machine_flags): Add support for E_FLAG_RX_ABI.
(guess_is_rela): Add EM_V800.
(dump_relocations): Likewise.
(get_machine_name): Update EM_V800.
(get_machine_flags): Add support for RH850 ABI flags.
(is_32bit_abs_reloc): Add support for RH850 ABI reloc.
* config/tc-v850.c (v850_target_arch): New.
(v850_target_format): New.
(set_machine): Use v850_target_arch.
(md_begin): Likewise.
(md_show_usage): Document new switches.
(md_parse_option): Add -mgcc-abi, -mrh850-abi, -m8byte-align and
-m4byte-align.
* config/tc-v850.c (TARGET_ARCH) Use v850_target_arch.
(TARGET_FORMAT): Use v850_target_format.
* doc/c-v850.texi: Document new options.
* v850.h: Add RH850 ABI values.
* Makefile.am: (ALL_EMULATION_SOURCES): Add ev850_rh850.c.
* Makefile.in: Regenerate.
* configure.tgt (v850*-*-*): Make v850_rh850 the default
emulation. Add vanilla v850 as an extra emulation.
* emulparams/v850_rh850.sh: New file.
* scripttempl/v850_rh850.sc: New file.
* configure.in: Add bfd_v850_rh850_arch.
* configure: Regenerate.
* disassemble.c (disassembler): Likewise.
2012-11-09 17:36:19 +00:00
H.J. Lu
5bb3703f01
Remove trailing redundant `;'
...
bfd/
* aout-tic30.c (MY_final_link_callback): Remove trailing
redundant `;'.
* coff-h8500.c (extra_case): Likewise.
(bfd_coff_reloc16_get_value): Likewise.
* dwarf2.c (_bfd_dwarf2_cleanup_debug_info): Likewise.
* elf.c (_bfd_elf_slurp_version_tables): Likewise.
* elf32-frv.c (elf32_frv_relocate_section): Likewise.
* elf32-v850.c (v850_elf_perform_relocation): Likewise.
* opncls.c (bfd_calc_gnu_debuglink_crc32): Likewise.
* plugin.c (add_symbols): Likewise.
* reloc.c (bfd_check_overflow): Likewise.
* vms-lib.c (_bfd_vms_lib_archive_p): Likewise.
binutils/
* coffgrok.c (coff_grok): Remove trailing redundant `;'.
* resrc.c (open_input_stream): Likewise.
gas/
* config/atof-ieee.c (gen_to_words): Remove trailing redundant
`;'.
* config/atof-vax.c (flonum_gen2vax): Likewise.
* config/tc-d10v.c (write_2_short): Likewise.
* config/tc-i386-intel.c (i386_intel_simplify): Likewise.
* config/tc-s390.c (tc_s390_force_relocation): Likewise.
* config/tc-v850.c (md_parse_option): Likewise.
* config/tc-xtensa.c (find_address_of_next_align_frag): Likewise.
* dwarf2dbg.c (out_header): Likewise.
* symbols.c (dollar_label_name): Likewise.
(fb_label_name): Likewise.
ld/
* testplug.c (record_add_file): Remove trailing redundant `;'.
opcodes/
* aarch64-opc.h (gen_mask): Remove trailing redundant `;'.
* ia64-gen.c (fetch_insn_class): Likewise.
2012-11-09 08:29:34 +00:00
Alan Modra
6febeb7413
Regenerate.
2012-11-08 03:03:26 +00:00
Alan Modra
d17dce5567
* configure.in: Apply 2012-09-10 change to config.in here.
2012-11-05 10:45:32 +00:00
Andreas Krebbel
aac129d776
2012-10-26 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
...
* s390-mkopc.c: Accept empty lines in s390-opc.txt.
* s390-opc.c: Add M_20OPT field. New instruction formats RRF_RURR2 and RRF_RMRR.
* s390-opc.txt: Add new instructions. New instruction type for lptea.
2012-10-26 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* gas/testsuite/gas/s390/zarch-z10.d: Refreshed.
* gas/testsuite/gas/s390/zarch-z10.s: Refreshed.
* gas/testsuite/gas/s390/zarch-z196.d: Refreshed.
* gas/testsuite/gas/s390/zarch-z196.s: Refreshed.
* gas/testsuite/gas/s390/zarch-z9-109.d: Refreshed.
* gas/testsuite/gas/s390/zarch-z990.d: Refreshed.
* gas/testsuite/gas/s390/zarch-z990.s: Refreshed.
* gas/testsuite/gas/s390/zarch-zEC12.d: Refreshed.
* gas/testsuite/gas/s390/zarch-zEC12.s: Refreshed.
2012-10-26 09:41:55 +00:00
Christian Groessler
747a4ac1f4
gas/testsuite:
...
* gas/z8k/z8k.exp: Run translate-ops test.
* gas/z8k/translate-ops.s: New file.
* gas/z8k/translate-ops.d: New file.
opcodes:
* z8kgen.c (struct op): Fix encoding for translate opcodes (trdb,
trdrb, trib, trirb, trtdb, trtdrb, trtib, trtirb). Remove
non-existing opcode trtrb.
* z8k-opc.h: Regenerate.
2012-10-26 08:14:07 +00:00
Alan Modra
62082a42b9
* ppc-opc (powerpc_opcodes): "lfdp" and "stfdp" use DS offset.
2012-10-26 03:38:20 +00:00
Roland McGrath
6c067bbb1a
gas/testsuite/
...
* gas/i386/rex.s: Add test of REX prefix before fsave (i.e. fwait).
* gas/i386/rex.d: Update.
opcodes/
* i386-dis.c (ckprefix): When bailing out for fwait with prefixes,
set rex_used to rex.
2012-10-24 21:41:33 +00:00
Peter Bergner
ab4437c322
opcodes/
...
* ppc-opc.c (powerpc_opcodes) <vcfpsxws>: Fix opcode spelling.
gas/testsuite/
* gas/ppc/altivec.s <vcfpsxws>: Fix opcode spelling.
2012-10-22 16:04:28 +00:00
Tom Tromey
9a176a4afc
* tic54x-dis.c (print_instruction): Don't use K&R style.
...
(print_parallel_instruction, sprint_dual_address)
(sprint_indirect_address, sprint_direct_address, sprint_mmr)
(sprint_cc2, sprint_condition): Likewise.
2012-10-18 15:28:06 +00:00
Kai Tietz
4ad3b7ef02
* aarch64-asm.c (aarch64_ins_ldst_reglist): Initialize
...
value with a default.
(do_special_encoding): Likewise.
(aarch64_ins_ldst_elemlist): Pre-initialize QSsize, and opcodeh2
variables with default.
* arc-dis.c (write_comments_): Don't use strncat due
size of state->commentBuffer pointer isn't predictable.
2012-10-18 06:53:16 +00:00
Yufeng Zhang
b7a54b5525
Updated the system register table.
...
opcodes/
* aarch64-opc.c (aarch64_sys_regs): Add rmr_el1, rmr_el2 and
rmr_el3; remove daifset and daifclr.
gas/testsuite/
* gas/aarch64/sysreg-1.s: Add tests of rmr_el1, rmr_el2 and rmr_el3.
* gas/aarch64/sysreg-1.d: Update.
* gas/aarch64/illegal.s: Add tests of daifset and daifclr.
* gas/aarch64/illegal.d: Update.
2012-10-15 15:07:49 +00:00
Yufeng Zhang
9b61754a3f
Added the changelog for the previous commit.
2012-10-15 14:57:31 +00:00
Yufeng Zhang
9de794e148
Added missing alignment check to load/store uimm12 immediate offset.
...
opcodes/
* aarch64-opc.c (operand_general_constraint_met_p): Change to check
the alignment of addr.offset.imm instead of that of shifter.amount for
operand type AARCH64_OPND_ADDR_UIMM12.
gas/testsuite/
* gas/aarch64/illegal-2.s: Add test case.
* gas/aarch64/illegal-2.l: Likewise.
2012-10-15 14:52:06 +00:00
Richard Earnshaw
f8ece37fb1
2012-10-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
...
* arm-dis.c: Use preferred form of vrint instruction variants
for disassembly.
2012-10-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* gas/arm/armv8-a+fp.d: Use preferred form of vrint instruction
variants for disassembly.
* gas/arm/armv8-a+fp.s: Likewise.
* gas/arm/armv8-a+simd.d: Likewise.
* gas/arm/armv8-a+simd.s: Likewise.
2012-10-11 15:33:08 +00:00
Nagajyothi Eggone
5e5c50d37b
Add AMD bdver3 support.
...
gas/
* config/tc-i386.c (cpu_arch): Add CPU_BDVER3_FLAGS.
* doc/c-i386.texi: Add -march=bdver3 option.
gas/testsuite/
* gas/i386/i386.exp: Run bdver3 test cases.
* gas/i386/nops-1-bdver3.d: New.
* gas/i386/arch-10-bdver3.d: New.
* gas/i386/x86-64-nops-1-bdver3.d: New.
* gas/i386/x86-64-arch-2-bdver3.d: New.
opcodes/
* i386-gen.c (cpu_flag_init): Add CPU_BDVER3_FLAGS.
* i386-init.h: Regenerated.
2012-10-09 08:43:06 +00:00
Peter Bergner
c7a5aa9c64
opcodes/
...
* ppc-dis.c (ppc_opts) <altivec>: Use PPC_OPCODE_ALTIVEC2;
* ppc-opc.c (VBA): New define.
(powerpc_opcodes) <vcuxwfp, vcsxwfp, vcfpuxws, vcfpsxsw, vmr, vnot,
mfppr, mfppr32, mtppr, mtppr32>: New extended mnemonics.
gas/testsuite/
* gas/ppc/power7.d: Add tests for mfppr, mfppr32, mtppr and mtppr32.
* gas/ppc/power7.s: Likewise.
* gas/ppc/altivec.d: Add tests for all legacy Altivec instructions.
* gas/ppc/altivec.s: Likewise.
* gas/ppc/altivec2.d: New test file.
* gas/ppc/altivec2.s: Likewise.
* gas/ppc/ppc.exp: Run it.
2012-10-05 14:06:20 +00:00
Nick Clifton
04ee5257d6
* v850-dis.c (disassemble): Place square parentheses around second
...
register operand of clr1, not1, set1 and tst1 instructions.
* config/tc-v850.c (v850_insert_operand): Use a static buffer for
the error message.
* gas/v850/v850e1.d: Fix expected disassembly of clr1, not1, set1
and tst1 insns.
2012-10-04 10:30:06 +00:00
Andreas Krebbel
cfc7277920
2012-10-04 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
...
* config/tc-s390.c (s390_parse_cpu): Add new option zEC12.
* doc/as.texinfo: Document new option zEC12.
* doc/c-s390.texi: Likewise.
2012-10-04 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* gas/s390/s390.exp: Run zEC12 tests.
* gas/s390/zarch-zEC12.d: New file.
* gas/s390/zarch-zEC12.s: New file.
2012-10-04 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* s390-mkopc.c: Support new option zEC12.
* s390-opc.c: Add new instruction formats.
* s390-opc.txt: Add new instructions for zEC12.
2012-10-04 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* s390.h (s390_opcode_cpu_val): Add S390_OPCODE_ZEC12.
2012-10-04 08:47:36 +00:00
Anthony Green
1415a2a767
Don't abort() when disassembling bad moxie instructions.
2012-09-28 03:53:39 +00:00
H.J. Lu
160a30bb92
Add missing Cpu flags in bd and bt cores
...
gas/testsuite/
2012-09-25 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
* gas/i386/arch-10-bdver1.d: New file to test bdver1 core.
* gas/i386/x86-64-arch-2-bdver1.d: Likewise.
* gas/i386/i386.exp: Run bdver1 testcases.
* gas/i386/arch-10-bdver2.d: Updated -march flags.
* gas/i386/arch-10-btver1.d: Likewise.
* gas/i386/arch-10-btver2.d: Likewise.
* gas/i386/x86-64-arch-2-bdver2.d: Likewise.
* gas/i386/x86-64-arch-2-btver1.d: Likewise.
* gas/i386/x86-64-arch-2-btver2.d: Likewise.
opcodes/
2012-09-25 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
* gas/i386/arch-10-bdver1.d: New file to test bdver1 core.
* gas/i386/x86-64-arch-2-bdver1.d: Likewise.
* gas/i386/i386.exp: Run bdver1 testcases.
* gas/i386/arch-10-bdver2.d: Updated -march flags.
* gas/i386/arch-10-btver1.d: Likewise.
* gas/i386/arch-10-btver2.d: Likewise.
* gas/i386/x86-64-arch-2-bdver2.d: Likewise.
* gas/i386/x86-64-arch-2-btver1.d: Likewise.
* gas/i386/x86-64-arch-2-btver2.d: Likewise.
2012-09-25 13:12:34 +00:00
H.J. Lu
60aa667ec4
Replace CpuSSE3 with CpuCX16 for cmpxchg16b
...
gas/
* config/tc-i386.c (cpu_arch): Add .cx16.
* doc/c-i386.texi: Document .cx16.
gas/testsuite/
* gas/i386/x86-64-arch-2.s: Add test for cmpxchg16b.
* gas/i386/x86-64-arch-2.d: Update correspondingly.
* gas/i386/x86-64-arch-2-bdver2.d: Likewise.
* gas/i386/x86-64-arch-2-btver1.d: Likewise.
* gas/i386/x86-64-arch-2-btver2.d: Likewise.
* gas/i386/x86-64-arch-2-lzcnt.d: Likewise.
* gas/i386/x86-64-arch-2-prefetchw.d: Likewise.
* gas/i386/ilp32/x86-64-arch-2.d: Likewise.
opcodes/
* i386-gen.c (cpu_flag_init): Add CpuCX16 to CPU_NOCONA_FLAGS,
CPU_CORE_FLAGS, CPU_CORE2_FLAGS, CPU_COREI7_FLAGS,
CPU_BDVER1_FLAGS, CPU_BDVER2_FLAGS, CPU_BTVER1_FLAGS,
CPU_BTVER2_FLAGS. Add CPU_CX16_FLAGS.
(cpu_flags): Add CpuCX16.
* i386-opc.h (CpuCX16): New.
(i386_cpu_flags): Add cpucx16.
* i386-opc.tbl: Replace CpuSSE3 with CpuCX16 for cmpxchg16b.
* i386-tbl.h: Regenerate.
* i386-init.h: Likewise.
2012-09-20 11:53:33 +00:00
Richard Earnshaw
4b8c8c02e9
2012-09-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
...
opcodes:
* arm-dis.c: Changed ldra and strl-form mnemonics
to lda and stl-form.
gas:
* config/tc-arm.c: Changed ldra and strl-form mnemonics
to lda and stl-form for armv8.
gas/testsuite:
* gas/arm/armv8-a-bad.l: Updated for changed mnemonics.
* gas/arm/armv8-a-bad.s: Likewise.
* gas/arm/armv8-a.d: Likewise.
* gas/arm/armv8-a.s: Likewise.
* gas/arm/inst.s: Added test for ldrt encoding compatibly with ldralt.
* gas/arm/inst.d: Updated.
2012-09-18 14:52:43 +00:00
Maciej W. Rozycki
83ea18d0a3
opcodes/
...
* micromips-opc.c (micromips_opcodes): Correct the encoding of
the "swxc1" instruction.
gas/testsuite/
* gas/mips/micromips.d: Correct the disassembly of SWXC1.
* gas/mips/micromips-trap.d: Likewise.
* gas/mips/micromips@24k-triple-stores-1.d: Likewise.
* gas/mips/micromips@mips4-fp.d: Likewise.
2012-09-18 14:19:04 +00:00
Richard Earnshaw
062f38fa2f
2012-09-17 Yufeng Zhang <yufeng.zhang@arm.com>
...
* aarch64-asm.c (aarch64_ins_imm_half): Remove ATTRIBUTE_UNUSED from
the parameter 'inst'.
(aarch64_ins_addr_simm): Add ATTRIBUTE_UNUSED to the parameter 'inst'.
(convert_mov_to_movewide): Change to assert (0) when
aarch64_wide_constant_p returns FALSE.
2012-09-17 17:43:42 +00:00
David Edelsohn
b132a67daa
* configure: Regenerate.
2012-09-15 00:07:05 +00:00
Anthony Green
1f9b75dde1
Fix moxie disassembly for new branch semantics
2012-09-14 10:49:03 +00:00
Anthony Green
e202fa84e7
Bi-endian patches for moxie
2012-09-13 22:24:51 +00:00
Alan Modra
1d43092daf
missed from 2012-08-15 change
2012-09-10 23:57:09 +00:00
Alan Modra
00716ab174
* config.in: Disable sanity check for kfreebsd.
2012-09-10 22:30:57 +00:00
H.J. Lu
6d2920c847
Regenerate binutils configure
...
bfd/
2012-09-10 H.J. Lu <hongjiu.lu@intel.com>
* configure: Regenerated.
binutils/
2012-09-10 H.J. Lu <hongjiu.lu@intel.com>
* configure: Regenerated.
etc/
2010-11-20 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
* Makefile.in (install-strip): New target.
gas/
2012-09-10 H.J. Lu <hongjiu.lu@intel.com>
* configure: Regenerated.
gold/
2012-09-09 Alan Modra <amodra@gmail.com>
* target.h (Target::gc_mark_symbol, do_gc_mark_symbol): New functions.
gprof/
2012-09-10 H.J. Lu <hongjiu.lu@intel.com>
* configure: Regenerated.
intl/
2010-06-27 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
PR bootstrap/44621
ld/
2012-09-10 H.J. Lu <hongjiu.lu@intel.com>
* configure: Regenerated.
libiberty/
2011-08-28 H.J. Lu <hongjiu.lu@intel.com>
* argv.c (dupargv): Replace malloc with xmalloc. Don't check
opcodes/
2012-09-10 H.J. Lu <hongjiu.lu@intel.com>
* configure: Regenerated.
2012-09-10 17:00:44 +00:00
H.J. Lu
b3e14edafc
Add Intel Itanium Series 9500 support
...
bfd/
2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
* cpu-ia64-opc.c (ins_cnt6a): New function.
(ext_cnt6a): Ditto.
(ins_strd5b): Ditto.
(ext_strd5b): Ditto.
(elf64_ia64_operands): Add new operand types.
gas/
2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
* config/tc-ia64.c (reg_symbol): Add a new register.
(indirect_reg): Ditto.
(pseudo_func): Add new symbolic constants.
(operand_match): Add new operand types recognition.
(operand_insn): Add new register recognition.
(md_begin): Add new register definition.
(specify_resource): Add new register recognition.
gas/testsuite/
2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
* gas/testsuite/gas/ia64/psn.d: New file.
* gas/testsuite/gas/ia64/psn.s: New file.
* gas/testsuite/gas/ia64/ia64.exp: Add new testcase.
* gas/testsuite/gas/ia64/opc-i.d: Fixed failing tests.
* gas/testsuite/gas/ia64/opc-m.d: Ditto.
include/opcode/
2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
* ia64.h (ia64_opnd): Add new operand types.
opcodes/
2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
* ia64-asmtab.h (completer_index): Extend bitfield to full uint.
* ia64-gen.c: Promote completer index type to longlong.
(irf_operand): Add new register recognition.
(in_iclass_mov_x): Add an entry for the new mov_* instruction type.
(lookup_specifier): Add new resource recognition.
(insert_bit_table_ent): Relax abort condition according to the
changed completer index type.
(print_dis_table): Fix printf format for completer index.
* ia64-ic.tbl: Add a new instruction class.
* ia64-opc-i.c (ia64_opcodes_i): Define new I-instructions.
* ia64-opc-m.c (ia64_opcodes_m): Define new M-instructions.
* ia64-opc.h: Define short names for new operand types.
* ia64-raw.tbl: Add new RAW resource for DAHR register.
* ia64-waw.tbl: Add new WAW resource for DAHR register.
* ia64-asmtab.c: Regenerate.
2012-09-04 13:52:06 +00:00
Peter Bergner
382c72e904
* ppc-opc.c (VXASHB_MASK): New define.
...
(powerpc_opcodes) <vsldoi>: Use VXASHB_MASK.
2012-08-29 22:34:04 +00:00
Peter Bergner
fb048c26f1
* ppc-opc.c (UIMM4, UIMM3, UIMM2, VXVA_MASK, VXVB_MASK, VXVAVB_MASK,
...
VXVDVA_MASK, VXUIMM4_MASK, VXUIMM3_MASK, VXUIMM2_MASK): New defines.
(powerpc_opcodes) <vexptefp, vlogefp, vrefp, vrfim, vrfin, vrfip,
vrfiz, vrsqrtefp, vupkhpx, vupkhsb, vupkhsh, vupklpx, vupklsb,
vupklsh>: Use VXVA_MASK.
<vspltisb, vspltish, vspltisw>: Use VXVB_MASK.
<mfvscr>: Use VXVAVB_MASK.
<mtvscr>: Use VXVDVA_MASK.
<vspltb>: Use VXUIMM4_MASK.
<vsplth>: Use VXUIMM3_MASK.
<vspltw>: Use VXUIMM2_MASK.
2012-08-28 16:41:07 +00:00
Matthew Gretton-Dann
3c9017d250
* gas/config/tc-arm.c (ARM_ENC_TAB): Add sha1h and sha2op entries.
...
(do_sha1h): New function.
(do_sha1su1): Likewise.
(do_sha256su0): Likewise.
(insns): Add 2 operand SHA instructions.
* gas/testsuite/gas/arm/armv8-a+crypto.s: Update testcase.
* gas/testsuite/gas/arm/armv8-a+crypto.d: Likewise.
* opcodes/arm-dis.c (neon_opcodes): Add 2 operand sha instructions.
2012-08-24 08:14:40 +00:00
Matthew Gretton-Dann
48adcd8ed5
* gas/config/tc-arm.c (NEON_ENC_TAB): Add sha3op entry.
...
(do_crypto_3op_1): New function.
(do_sha1c): Likewise.
(do_sha1p): Likewise.
(do_sha1m): Likewise.
(do_sha1su0): Likewise.
(do_sha256h): Likewise.
(do_sha256h2): Likewise.
(do_sha256su1): Likewise.
(insns): Add SHA 3 operand instructions.
* gas/testsuite/gas/arm/armv8-a+crypto.d: Update testcase.
* gas/testsuite/gas/arm/armv8-a+crypto.s: Likewise.
* opcodes/arm-dis.c (neon_opcodes): Add SHA 3-operand instructions.
2012-08-24 08:14:04 +00:00
Matthew Gretton-Dann
4f51b4bdbb
* gas/config/tc-arm.c (neon_type_mask): Add P64 type.
...
(type_chk_of_el_type): Handle P64 type.
(el_type_of_type_chk): Likewise.
(do_neon_vmull): Handle VMULL.P64.
* gas/testsuite/gas/arm/armv8-a+crypto.d: Update testcase.
* gas/testsuite/gas/arm/armv8-a+crypto.s: Likewise.
* opcodes/arm-dis.c (neon_opcodes): Handle VMULL.P64.
2012-08-24 08:13:24 +00:00
Matthew Gretton-Dann
91ff78946d
* gas/config/tc-arm.c (NEON_ENC_TAB): Add aes entry.
...
(neon_type_mask): Add N_UNT.
(neon_check_type): Don't always decay typed to untyped sizes.
(do_crypto_2op_1): New function.
(do_aese): Likewise.
(do_aesd): Likewise.
(do_aesmc.8): Likewise.
(do_aesimc.8): Likewise.
(insns): Add AES instructions.
* gas/testsuite/gas/arm/armv8-a+crypto.d: New testcase.
* gas/testsuite/gas/arm/armv8-a+crypto.s: Likewise.
* opcodes/arm-dis.c (neon_opcodes): Add support for AES instructions.
2012-08-24 08:12:45 +00:00
Matthew Gretton-Dann
c70a898785
* gas/config/tc-arm.c (el_type_type_check): Add handling for 16-bit
...
floating point types.
(do_neon_cvttb_2): New function.
(do_neon_cvttb_1): Likewise.
(do_neon_cvtb): Refactor to use do_neon_cvttb_1.
(do_neon_cvtt): Likewise.
* gas/testsuite/gas/arm/armv8-a+fp.d: Update testcase.
* gas/testsuite/gas/arm/armv8-a+fp.s: Likewise.
* gas/testsuite/gas/arm/half-prec-vfpv3.s: Likewise.
* opcodes/arm-dis.c (coprocessor_opcodes): Add support for HP/DP
conversions.
2012-08-24 08:11:44 +00:00
Matthew Gretton-Dann
30bdf75259
* gas/config/tc-arm.c (NEON_ENC_TAB): Add vrint entries.
...
(neon_cvt_mode): Add neon_cvt_mode_r.
(do_vrint_1): New function.
(do_vrint_x): Likewise.
(do_vrint_z): Likewise.
(do_vrint_r): Likewise.
(do_vrint_a): Likewise.
(do_vrint_n): Likewise.
(do_vrint_p): Likewise.
(do_vrint_m): Likewise.
(insns): Add VRINT instructions.
* gas/testsuite/gas/arm/armv8-a+fpv5.d: Update testcase.
* gas/testsuite/gas/arm/armv8-a+fpv5.s: Likewise.
* gas/testsuite/gas/arm/armv8-a+simdv3.d: Likewise.
* gas/testsuite/gas/arm/armv8-a+simdv3.s: Likewise.
* opcodes/arm-dis.c (coprocessor_opcodes): Add VRINT.
(neon_opcodes): Likewise.
2012-08-24 08:11:13 +00:00
Matthew Gretton-Dann
7e8e678496
* gas/config/tc-arm.c (NEON_ENC_TAB): Add vcvta entry.
...
(neon_cvt_mode): New enumeration.
(do_vfp_nsyn_cvt_fpv8): New function.
(do_neon_cvt_1): Add support for new conversions.
(do_neon_cvtr): Use neon_cvt_mode enumerator.
(do_neon_cvt): Likewise.
(do_neon_cvta): New function.
(do_neon_cvtn): Likewise.
(do_neon_cvtp): Likewise.
(do_neon_cvtm): Likewise.
(insns): Add new VCVT instructions.
* gas/testsuite/gas/arm/armv8-a+fp.d: Update testcase.
* gas/testsuite/gas/arm/armv8-a+fp.s: Likewise.
* gas/testsuite/gas/arm/armv8-a+simd.d: Likewise.
* gas/testsuite/gas/arm/armv8-a+simd.s: Likewise.
* opcodes/arm-dis.c (coprocessor_opcodes): Add support for new VCVT
variants.
(neon_opcodes): Likewise.
2012-08-24 08:09:50 +00:00
Matthew Gretton-Dann
73924fbcf8
* gas/config/tc-arm.c (NEON_ENC_TAB): Add vmaxnm, vminnm entries.
...
(vfp_or_neon_is_neon_bits): Add NEON_CHECK_ARCH8 enumerator.
(vfp_or_neon_is_neon): Add check for SIMD for ARMv8.
(do_maxnm): New function.
(insns): Add vmaxnm, vminnm entries.
* gas/testsuite/gas/testsuite/gas/armv8-a+fp.d: Update testcase.
* gas/testsuite/gas/testsuite/gas/armv8-a+fp.s: Likewise.
* gas/testsuite/gas/testsuite/gas/armv8-a+simd.d: New testcase.
* gas/testsuite/gas/testsuite/gas/armv8-a+simd.s: Likewise.
* opcodes/arm-dis.c (coprocessor_opcodes): Add VMAXNM/VMINNM.
(neon_opcodes): Likewise.
2012-08-24 08:07:36 +00:00
Matthew Gretton-Dann
33399f071c
* gas/config/tc-arm.c (NEON_ENC_TAB): Add entries for VSEL.
...
(NEON_ENC_FPV8_): New define.
(do_vfp_nsyn_fpv8): New function.
(do_vsel): Likewise.
(insns): Add VSEL instructions.
* gas/testsuite/gas/arm/armv8-a+fp.d: New testcase.
* gas/testsuite/gas/arm/armv8-a+fp.s: Likewise.
* opcodes/arm-dis.c (coprocessor_opcodes): Add VSEL.
(print_insn_coprocessor): Add new %<>c bitfield format
specifier.
2012-08-24 08:06:36 +00:00
Matthew Gretton-Dann
9eb6c0f132
* gas/config/tc-arm.c (do_rm_rn): New function.
...
(do_strlex): Likewise.
(do_t_strlex): Likewise.
(insns): Add support for LDRA/STRL instructions.
* gas/testsuite/gas/arm/armv8-a-bad.l: Update testcase.
* gas/testsuite/gas/arm/armv8-a-bad.s: Likewise.
* gas/testsuite/gas/arm/armv8-a.d: Likewise.
* gas/testsuite/gas/arm/armv8-a.s: Likewise.
* opcodes/arm-dis.c (arm_opcodes): Add LDRA/STRL instructions.
(thumb32_opcodes): Likewise.
(print_arm_insn): Add support for %<>T formatter.
2012-08-24 08:03:39 +00:00
Matthew Gretton-Dann
8884b7208b
* gas/config/tc-arm.c (do_t_bkpt_hlt1): New function.
...
(do_t_hlt): New function.
(do_t_bkpt): Use do_t_bkpt_hlt1.
(insns): Add HLT.
* gas/testsuite/gas/arm/armv8-a-bad.l: Update for HLT.
* gas/testsuite/gas/arm/armv8-a-bad.s: Likewise.
* gas/testsuite/gas/arm/armv8-a.d: Likewise.
* gas/testsuite/gas/arm/armv8-a.s: Likewise.
* opcodes/arm-dis.c (arm_opcodes): Add HLT.
(thumb_opcodes): Likewise.
2012-08-24 08:02:51 +00:00
Matthew Gretton-Dann
b79f7053dd
* gas/config/tc-arm.c (insns): Add DCPS instruction.
...
* gas/testsuite/gas/arm/armv8-a.d: Update.
* gas/testsuite/gas/arm/armv8-a.s: Likewise.
* opcodes/arm-dis.c (thumb32_opcodes): Add DCPS instruction.
2012-08-24 08:02:09 +00:00
Matthew Gretton-Dann
53c4b28b4f
* gas/config/tc-arm.c (T16_32_TAB): Add _sevl.
...
(insns): Add SEVL.
* gas/testsuite/gas/arm/armv8-a.s: New testcase.
* gas/testsuite/gas/arm/armv8-a.d: Likewise.
* opcodes/arm-dis.c (arm_opcodes): Add SEVL.
(thumb_opcodes): Likewise.
(thumb32_opcodes): Likewise.
2012-08-24 08:01:18 +00:00
Matthew Gretton-Dann
e797f7e0b2
* gas/config/tc-arm.c (asm_barrier_opt): Add arch field.
...
(mark_feature_used): New function.
(parse_barrier): Check specified option is valid for the
specified architecture.
(UL_BARRIER): New macro.
(barrier_opt_names): Update for new barrier options.
* gas/testsuite/gas/arm/armv8-a-barrier.s: New testcase.
* gas/testsuite/gas/arm/armv8-a-barrier-arm.d: Likewise.
* gas/testsuite/gas/arm/armv8-a-barrier-thumb.d: Likewise.
* opcodes/arm-dis.c (data_barrier_option): New function.
(print_insn_arm): Use data_barrier_option.
(print_insn_thumb32): Use data_barrier_option.
2012-08-24 08:00:20 +00:00
Matthew Gretton-Dann
e2efe87d8a
* opcodes/arm-dis.c (COND_UNCOND): New constant.
...
(print_insn_coprocessor): Add support for %u format specifier.
(print_insn_neon): Likewise.
2012-08-24 07:59:05 +00:00
David S. Miller
2c63854f55
Fix sparc opcode encoding for 4-arg crypto instructions.
...
include/opcode
* sparc.h (F3F4): New macro.
opcodes
* sparc-opc.c (4-argument crypto instructions): Fix encoding using
F3F4 macro.
gas/testsuite
* gas/sparc/crypto.d: Fix opcodes for 4-arg crypto instructions.
2012-08-21 23:00:36 +00:00
Alan Modra
e67ed0e885
opcodes/ChangeLog
...
* ppc-opc.c (powerpc_opcodes): Changed opcode for vabsdub,
vabsduh, vabsduw, mviwsplt.
gas/testsuite/ChangeLog
* gas/ppc/e6500.d: Changed opcode for vabsdub, vabsduh, vabsduw,
mviwsplt.
2012-08-20 03:20:24 +00:00
H.J. Lu
7b458c12dc
Add AMD btver1 and btver2 support
...
gas/
2012-08-17 Nagajyothi Eggone <nagajyothi.eggone@amd.com>
* config/tc-i386.c (cpu_arch): Add CPU_BTVER1_FLAGS and
CPU_BTVER2_FLAGS.
(i386_align_code): Add case for PROCESSOR_BT.
* config/tc-i386.h (enum processor_type): Add PROCESSOR_BT.
* doc/c-i386.texi: Add -march={btver1, btver2} options.
gas/testsuite/
2012-08-17 Nagajyothi Eggone <nagajyothi.eggone@amd.com>
* gas/i386/i386.exp: Run btver1 and btver2 test cases.
* gas/i386/nops-1-btver1.d: New.
* gas/i386/nops-1-btver2.d: New.
* gas/i386/arch-10-btver1.d: New.
* gas/i386/arch-10-btver2.d: New.
* gas/i386/x86-64-nops-1-btver1.d: New.
* gas/i386/x86-64-nops-1-btver2.d: New.
* gas/i386/x86-64-arch-2-btver1.d: New.
* gas/i386/x86-64-arch-2-btver2.d: New.
opcodes/
2012-08-17 Nagajyothi Eggone <nagajyothi.eggone@amd.com>
* i386-gen.c (cpu_flag_init): Add CPU_BTVER1_FLAGS and
CPU_BTVER2_FLAGS.
* i386-opc.h: Update CpuPRFCHW comment.
* i386-opc.tbl: Enable prefetch instruction for CpuPRFCHW.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2012-08-17 17:12:36 +00:00
Nick Clifton
eb80cb8751
* po/vi.po: Updated Vietnamese translation.
...
* po/uk.po: New Ukranian translation.
* configure.in (ALL_LINGUAS): Add uk.
* configure: Regenerate.
2012-08-17 14:33:27 +00:00
Peter Bergner
8baf7b78b5
* ppc-opc.c (powerpc_opcodes) <"lswx">: Use RAX for the second and
...
RBX for the third operand.
<"lswi">: Use RAX for second and NBI for the third operand.
2012-08-16 18:12:38 +00:00
DJ Delorie
3d557b4cce
* rl78-decode.opc (rl78_decode_opcode): Merge %e and %[01]
...
operands, so that data addresses can be corrected when not
ES-overridden.
* rl78-decode.c: Regenerate.
* rl78-dis.c (print_insn_rl78): Make order of modifiers
irrelevent. When the 'e' specifier is used on an operand and no
ES prefix is provided, adjust address to make it absolute.
2012-08-15 22:37:56 +00:00
Peter Bergner
588925d065
opcodes/
...
* ppc-opc.c <RSQ, RTQ>: Use PPC_OPERAND_GPR.
gas/testsuite/
* gas/ppc/power4.s <lq, stq>: Add more tests.
* gas/ppc/power4.d: Likewise.
2012-08-15 21:25:21 +00:00
Peter Bergner
9f6a6cc022
opcodes/
...
* ppc-opc.c <xnop, yield, mdoio, mdoom>: New extended mnemonics.
gas/testsuite/
* gas/ppc/common.d ("nop", "xnop"): Add tests.
* gas/ppc/common.s: Likewise.
* gas/ppc/power7.d ("yield", "mdoio", "mdoom"): Add tests.
* gas/ppc/power7.s: Likewise.
2012-08-15 15:33:25 +00:00
Maciej W. Rozycki
fc8c4fd1b2
* mips-dis.c (print_insn_args): Add GET_OP and GET_OP_S local
...
macros, use local variables for info struct member accesses,
update the type of the variable used to hold the instruction
word.
(print_insn_mips, print_mips16_insn_arg): Likewise.
(print_insn_mips16): Add GET_OP and GET_OP_S local macros, use
local variables for info struct member accesses.
(print_insn_micromips): Add GET_OP_S local macro.
(_print_insn_mips): Update the type of the variable used to hold
the instruction word.
2012-08-14 22:00:05 +00:00
Nick Clifton
a06ea96464
Add support for 64-bit ARM architecture: AArch64
2012-08-13 14:52:54 +00:00
Maciej W. Rozycki
35d0a16941
include/opcode/
...
* mips.h (mips_opcode): Add the exclusions field.
(OPCODE_IS_MEMBER): Remove macro.
(cpu_is_member): New inline function.
(opcode_is_member): Likewise.
opcodes/
* micromips-opc.c (micromips_opcodes): Update comment.
* mips-opc.c (mips_builtin_opcodes): Likewise. Mark coprocessor
instructions for IOCT as appropriate.
* mips-dis.c (print_insn_mips): Replace OPCODE_IS_MEMBER with
opcode_is_member.
* configure.in: Substitute NO_WMISSING_FIELD_INITIALIZERS with
the result of a check for the -Wno-missing-field-initializers
GCC option.
* Makefile.am (NO_WMISSING_FIELD_INITIALIZERS): New variable.
(mips-opc.lo): Pass $(NO_WMISSING_FIELD_INITIALIZERS) to
compilation.
(mips16-opc.lo): Likewise.
(micromips-opc.lo): Likewise.
* aclocal.m4: Regenerate.
* configure: Regenerate.
* Makefile.in: Regenerate.
gas/
* config/tc-mips.c (NO_ISA_COP, COP_INSN): Remove macros.
(is_opcode_valid): Remove coprocessor instruction exclusions.
Replace OPCODE_IS_MEMBER with opcode_is_member.
(is_opcode_valid_16): Replace OPCODE_IS_MEMBER with
opcode_is_member.
(macro): Remove coprocessor instruction exclusions.
2012-08-13 14:26:14 +00:00
H.J. Lu
5c5acbbddf
Enable FMA instructions for bdver2
...
gas/testsuite/
PR gas/14423
* gas/i386/arch-10-bdver2.d: New file.
* gas/i386/x86-64-arch-2-bdver2.d: Likewise.
* gas/i386/i386.exp: Run new test
opcodes/
2012-08-11 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
PR gas/14423
* i386-gen.c (cpu_flag_init): Add CpuFMA in CPU_BDVER2_FLAGS.
* i386-init.h: Regenerated.
2012-08-10 21:19:40 +00:00
Nick Clifton
3c892704a9
Updated Vietnamese translation.
2012-08-09 14:46:44 +00:00
Roland McGrath
d7189fa58e
gas/testsuite/
...
* gas/i386/prefetch.s: New file.
* gas/i386/prefetch.d: New file.
* gas/i386/prefetch-intel.d: New file.
* gas/i386/x86-64-prefetch.d: New file.
* gas/i386/x86-64-prefetch-intel.d: New file.
* gas/i386/i386.exp: Run them.
opcodes/
* i386-dis.c (reg_table): Fill out REG_0F0D table with
AMD-reserved cases as "prefetch".
(MOD_0F18_REG_4, MOD_0F18_REG_5): New enum constants.
(MOD_0F18_REG_6, MOD_0F18_REG_7): Likewise.
(reg_table): Use those under REG_0F18.
(mod_table): Add those cases as "nop/reserved".
2012-08-07 18:22:04 +00:00
Jan Beulich
4c692bc7aa
There were several cases where the registers in the REX encoded range
...
got treated identically to the ones in the base range, due to not
paying attention to the fact that reg_entry's reg_num field doesn't
fully specify the register number (reg_flags also needs to be checked
for RegRex). This patch introduces and uses a new (inline) function to
obtain the full register number, and uses it to fix all those cases.
It additionally adds the missing operand checks for SVME instructions
(which match the monitor/mwait ones).
gas/
2012-08-07 Jan Beulich <jbeulich@suse.com>
* config/tc-i386.c (register_number): New function.
(build_vex_prefix, process_immext, process_operands,
build_modrm_byte, i386_index_check): Use it.
gas/testsuite/
2012-08-07 Jan Beulich <jbeulich@suse.com>
* gas/i386/x86-64-specific-reg.{s,l}: New.
* gas/i386/i386.exp: Run new test.
opcodes/
2012-08-07 Jan Beulich <jbeulich@suse.com>
* i386-opc.tbl: Remove "FIXME" comments from SVME instructions.
2012-08-07 16:51:34 +00:00
Roland McGrath
de88229846
gas/testsuite/
...
* gas/i386/x86-64-stack.s: Add cases for push segment register.
* gas/i386/x86-64-stack.d: Updated.
* gas/i386/x86-64-stack-suffix.d: Updated.
* gas/i386/x86-64-stack-intel.d: Updated.
* gas/i386/ilp32/x86-64-stack.d: Updated.
* gas/i386/ilp32/x86-64-stack-suffix.d: Updated.
* gas/i386/ilp32/x86-64-stack-intel.d: Updated.
opcodes/
* i386-dis.c (print_insn): Print spaces between multiple excess
prefixes. Return actual number of excess prefixes consumed,
not always one.
* i386-dis.c (OP_REG): Ignore REX_B for segment register cases.
2012-08-06 22:08:25 +00:00
Roland McGrath
7bb15c6f21
gas/testsuite/
...
* gas/i386/x86-64-stack.s: Add cases for push immediate.
* gas/testsuite/gas/i386/ilp32/x86-64-stack-intel.d: Updated.
* gas/testsuite/gas/i386/ilp32/x86-64-stack-suffix.d: Updated.
* gas/testsuite/gas/i386/ilp32/x86-64-stack.d: Updated.
* gas/testsuite/gas/i386/x86-64-stack-intel.d: Updated.
* gas/testsuite/gas/i386/x86-64-stack-suffix.d: Updated.
* gas/testsuite/gas/i386/x86-64-stack.d: Updated.
opcodes/
* i386-dis.c (OP_sI): In b_T_mode and v_mode, REX_W trumps DFLAG.
(putop): For 'T', 'U', and 'V', treat REX_W like DFLAG.
(intel_operand_size): For stack_v_mode, treat REX_W like DFLAG.
(OP_E_register): Likewise.
(OP_REG): For low 8 whole registers, treat REX_W like DFLAG.
2012-08-06 20:19:34 +00:00
Jan-Benedict Glaw
3843081d42
* configure.in: Formatting.
...
* configure: Regenerate.
2012-08-02 08:13:48 +00:00
Alan Modra
488916061e
* h8300-dis.c: Fix printf arg warnings.
...
* i960-dis.c: Likewise.
* mips-dis.c: Likewise.
* pdp11-dis.c: Likewise.
* sh-dis.c: Likewise.
* v850-dis.c: Likewise.
* configure.in: Formatting.
* configure: Regenerate.
* rl78-decode.c: Regenerate.
* po/POTFILES.in: Regenerate.
2012-08-01 00:41:35 +00:00
Maciej W. Rozycki
03f66e8a8f
include/opcode/
...
* mips.h: Document microMIPS DSP ASE usage.
(MICROMIPSOP_MASK_DSPACC, MICROMIPSOP_SH_DSPACC): Update for
microMIPS DSP ASE support.
(MICROMIPSOP_MASK_DSPSFT, MICROMIPSOP_SH_DSPSFT): Likewise.
(MICROMIPSOP_MASK_SA3, MICROMIPSOP_SH_SA3): Likewise.
(MICROMIPSOP_MASK_SA4, MICROMIPSOP_SH_SA4): Likewise.
(MICROMIPSOP_MASK_IMM8, MICROMIPSOP_SH_IMM8): Likewise.
(MICROMIPSOP_MASK_IMM10, MICROMIPSOP_SH_IMM10): Likewise.
(MICROMIPSOP_MASK_WRDSP, MICROMIPSOP_SH_WRDSP): Likewise.
(MICROMIPSOP_MASK_BP, MICROMIPSOP_SH_BP): Likewise.
gas/
* config/tc-mips.c (macro_build) <'2'>: Handle microMIPS.
(macro) <M_BALIGN>: Update error handling.
(validate_micromips_insn) <'2', '3', '4', '5', '6'>: New cases.
<'7', '8', '0', '@', '^'>: Likewise.
(mips_ip) <'2', '3', '4', '5', '6', '7', '8'>: Handle microMIPS.
<'9'>: Fix formatting.
<'0', '@'>: Handle microMIPS.
<'^'>: New case.
gas/testsuite/
* gas/mips/micromips@mips32-dsp.d: New.
* gas/mips/micromips@mips32-dspr2.d: New.
* gas/mips/mips32-dsp.d: Remove -mips32r2.
* gas/mips/mips32-dspr2.d: Likewise.
* gas/mips/mips.exp: (mips_create_arch): Use -mips64r2
for micromips. Use run_dump_test_arches to run dsp tests.
opcodes/
* micromips-opc.c (WR_a, RD_a, MOD_a): New macros.
(DSP_VOLA): Likewise.
(D32, D33): Likewise.
(micromips_opcodes): Add DSP ASE instructions.
* micromips-dis.c (print_insn_micromips) <'2', '3'>: New cases.
<'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
2012-07-31 21:38:54 +00:00
Jan Beulich
94948e646e
VMOVNTDQA was both misplaced and improperly tagged as being an AVX
...
instruction (instead of AVX2).
2012-07-31 Jan Beulich <jbeulich@suse.com>
* i386-opc.tbl (vmovntdqa): Move up into 256-bit integer AVX2
instruction group. Mark as requiring AVX2.
* i386-tbl.h: Re-generate.
2012-07-31 07:38:42 +00:00
Sean Keys
416cf80afb
2012-07-05 Sean Keys <skeys@ipdatasys.com>
...
* xgate-dis.c: Removed an IF statement that will
always be false due to overlapping operand masks.
* xgate-opc.c: Corrected 'com' opcode entry and
fixed spacing.
2012-07-30 21:49:06 +00:00
Nick Clifton
a6dc81d2ab
Updated translations
2012-07-30 08:43:46 +00:00
Mike Frysinger
c4dd807e7b
bfd: update to AC_INIT
...
Move the package name/version from AM_INIT_AUTOMAKE to AC_INIT per recent
autotools guidelines. We use recent versions of both, so it shouldn't be
a problem.
This sets PACKAGE_xxx variables correctly, and makes the output of:
./configure --version
actually useful:
bfd configure 2.22.52
Changing the other dirs to use AC_INIT would require a bit of m4 trickery
that I don't feel like getting into, and they all use BFD_VERSION anyways,
so there isn't much point.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-07-27 16:30:57 +00:00
Nick Clifton
63d08c6844
Fix attributation of PR 13135 patch.
2012-07-26 14:05:38 +00:00
James Lemke
03edbe3bfb
2012-07-25 James Lemke <jwlemke@codesourcery.com>
...
* ppc-opc.c (powerpc_opcodes): Add/remove PPCVLE for some 32-bit insns.
2012-07-25 13:08:55 +00:00
Nick Clifton
d908c8af5a
PR binutils/13135
...
* arm-dis.c: Add necessary casts for printing integer values.
Use %s when printing string values.
* hppa-dis.c: Likewise.
* m68k-dis.c: Likewise.
* microblaze-dis.c: Likewise.
* mips-dis.c: Likewise.
* ppc-dis.c: Likewise.
* sparc-dis.c: Likewise.
* dis-asm.h (fprintf_ftype): Add ATTRIBUTE_FPTR_PRINTF_2.
2012-07-24 12:56:47 +00:00
H.J. Lu
ff688e1f8e
Use vex_len_table in xop_table
...
PR binutils/14355
* i386-dis.c (VEX_LEN_0FXOP_08_CC): New.
(VEX_LEN_0FXOP_08_CD): Likewise.
(VEX_LEN_0FXOP_08_CE): Likewise.
(VEX_LEN_0FXOP_08_CF): Likewise.
(VEX_LEN_0FXOP_08_EC): Likewise.
(VEX_LEN_0FXOP_08_ED): Likewise.
(VEX_LEN_0FXOP_08_EE): Likewise.
(VEX_LEN_0FXOP_08_EF): Likewise.
(xop_table): Fix entries for vpcomb, vpcomw, vpcomd, vpcomq,
vpcomub, vpcomuw, vpcomud, vpcomuq.
(vex_len_table): Add entries for VEX_LEN_0FXOP_08_CC,
VEX_LEN_0FXOP_08_CD, VEX_LEN_0FXOP_08_CE, VEX_LEN_0FXOP_08_CF,
VEX_LEN_0FXOP_08_EC, VEX_LEN_0FXOP_08_ED, VEX_LEN_0FXOP_08_EE,
VEX_LEN_0FXOP_08_EF.
2012-07-19 13:41:03 +00:00
H.J. Lu
e2e1fcde62
Implement RDRSEED, ADX and PRFCHW instructions
...
gas/
* config/tc-i386.c: Add ADX, RDSEED and PRFCHW asm directives.
* doc/c-i386.texi: Document the new directives.
gas/testsuite/
* gas/i386/i386.exp: Run adx, rdseed and prefetchw tests.
* gas/i386/x86-64-arch-2.s: Use prefetchw as 3dnow and Prfchw tests.
* gas/i386/arch-10.s: Likewise.
* gas/i386/arch-10-1.l: Changed correspondingly.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/arch-10.d: Likewise.
* gas/i386/arch-10-lzcnt.d: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
* gas/i386/x86-64-arch-2-lzcnt.d: Likewise.
* gas/i386/ilp32/x86-64-arch-2.d: Likewise.
* gas/i386/arch-10-prefetchw.d: New file.
* gas/i386/x86-64-arch-2-prefetchw.d: Likewise.
* gas/i386/rdseed.s: Likewise.
* gas/i386/rdseed.d: Likewise.
* gas/i386/rdseed-intel.d: Likewise.
* gas/i386/adx.s: Likewise.
* gas/i386/adx.d: Likewise.
* gas/i386/adx-intel.d: Likewise.
* gas/i386/x86-64-rdseed.s: Likewise.
* gas/i386/x86-64-rdseed.d: Likewise.
* gas/i386/x86-64-rdseed-intel.d: Likewise.
* gas/i386/x86-64-adx.s: Likewise.
* gas/i386/x86-64-adx.d: Likewise.
* gas/i386/x86-64-adx-intel.d: Likewise.
opcodes/
* i386-dis.c (PREFIX_0F38F6): New.
(prefix_table): Add adcx, adox instructions.
(three_byte_table): Use PREFIX_0F38F6.
(mod_table): Add rdseed instruction.
* i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW.
(cpu_flags): Likewise.
* i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW.
(i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw.
* i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend
prefetchw.
* i386-tbl.h: Regenerate.
* i386-init.h: Likewise.
2012-07-16 12:58:29 +00:00
Sean Keys
3879925e69
gas/config/
...
* tc-xgate.c: Revised assembler so that operands
are collected before the addressing mode is
determined.
include/opcode/
* xgate.h: Changed the format string for mode
XGATE_OP_DYA_MON.
opcodes/
* xgate-dis.c: Removed an IF statement that will
always be false due to overlapping operand masks.
* xgate-opc.c: Corrected 'com' opcode entry and
fixed spacing.
2012-07-05 19:37:52 +00:00
Thomas Schwinge
f4263ca2cd
Typo fix.
2012-07-05 08:28:22 +00:00
Thomas Schwinge
8b99bf0bbe
opcodes/
...
* mips-dis: Remove gratuitous newline.
2012-07-05 08:18:43 +00:00
Roland McGrath
9fa0f14a97
gas/testsuite/
...
* gas/i386/rep-suffix.s: Add 'rep nop' case.
* gas/i386/x86-64-rep-suffix.s: Likewise.
* gas/i386/rep-suffix.d: Updated.
* gas/i386/x86-64-rep-suffix.d: Likewise.
* gas/i386/ilp32/x86-64-rep-suffix.d: Likewise.
opcodes/
* i386-opc.tbl: Add RepPrefixOk to nop.
* i386-tbl.h: Regenerate.
2012-07-02 18:12:28 +00:00
Nick Clifton
4c6a93d362
* po/vi.po: Updated Vietnamese translation.
...
* po/uk.po: New Ukranian translation.
* configure.in (ALL_LINGUAS): Add uk.
* configure: Regenerate.
2012-06-28 14:36:01 +00:00
Roland McGrath
fe13e45b9a
gas/
...
* NEWS: Mention 'rep ret' too.
gas/testsuite/
* gas/i386/rep-ret.d: New file.
* gas/i386/rep-ret.s: New file.
* gas/i386/i386.exp: Add the new test.
opcodes/
* i386-opc.tbl: Add RepPrefixOk to ret.
* i386-tbl.h: Regenerate.
2012-06-22 21:54:06 +00:00
Roland McGrath
29c048b696
gas/
...
* config/tc-i386.c (parse_insn): Don't complain about REP prefix
when the template has opcode_modifier.repprefixok set.
* NEWS: Mention the change.
gas/testsuite/
* gas/i386/rep-bsf.d: New file.
* gas/i386/rep-bsf.s: New file.
* gas/i386/i386.exp: Add the new test.
opcodes/
* i386-opc.h (RepPrefixOk): New enum constant.
(i386_opcode_modifier): New bitfield 'repprefixok'.
* i386-gen.c (opcode_modifiers): Add RepPrefixOk.
* i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
instructions that have IsString.
* i386-tbl.h: Regenerate.
2012-06-22 16:42:08 +00:00
Andreas Schwab
c7a8dbf91f
opcodes/
...
* ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx)
(iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx)
(lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls)
(stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst)
(dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep)
(dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls)
(stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x)
(tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx)
(stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0.
gas/testsuite/
* gas/ppc/e500mc.d: Update.
* gas/ppc/476.d: Update.
2012-06-11 08:20:43 +00:00
Alan Modra
94caa96637
bfd/
...
* elf32-ppc.h (has_vle_insns, is_ppc_vle): Delete.
(has_tls_reloc, has_tls_get_addr_call): Move back to..
* elf32-ppc.c: ..here.
(ppc_elf_section_flags, elf_backend_section_flags): Delete.
(ppc_elf_modify_segment_map): Use ELF sh_flags to detect VLE sections.
opcodes/
* ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
(get_powerpc_dialect): Detect VLE sections from ELF sh_flags.
ld/testsuite/
* ld-powerpc/vle.ld: New.
* ld-powerpc/powerpc.exp (vle reloc tests): Link using vle.ld.
2012-05-19 06:58:48 +00:00
Alan Modra
71fe7babab
* ia64-opc.c: Remove #include "ansidecl.h".
...
* z8kgen.c: Include sysdep.h first.
2012-05-18 05:31:15 +00:00
Alan Modra
5eb3690ee9
* arc-dis.c: Include sysdep.h first, remove some redundant includes.
...
* bfin-dis.c: Likewise.
* i860-dis.c: Likewise.
* ia64-dis.c: Likewise.
* ia64-gen.c: Likewise.
* m68hc11-dis.c: Likewise.
* mmix-dis.c: Likewise.
* msp430-dis.c: Likewise.
* or32-dis.c: Likewise.
* rl78-dis.c: Likewise.
* rx-dis.c: Likewise.
* tic4x-dis.c: Likewise.
* tilegx-opc.c: Likewise.
* tilepro-opc.c: Likewise.
* rx-decode.c: Regenerate.
2012-05-18 01:59:38 +00:00
Alan Modra
a4ebc835cb
* ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
2012-05-18 00:39:28 +00:00
Alan Modra
98c76446ea
* ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
2012-05-18 00:30:47 +00:00
Nick Clifton
df7b86aa4c
PR 14072
...
* configure.in: Add check that sysdep.h has been included before
any system header files.
* configure: Regenerate.
* config.in: Regenerate.
* sysdep.h: Generate an error if included before config.h.
* alpha-opc.c: Include sysdep.h before any other header file.
* alpha-dis.c: Likewise.
* avr-dis.c: Likewise.
* cgen-opc.c: Likewise.
* cr16-dis.c: Likewise.
* cris-dis.c: Likewise.
* crx-dis.c: Likewise.
* d10v-dis.c: Likewise.
* d10v-opc.c: Likewise.
* d30v-dis.c: Likewise.
* d30v-opc.c: Likewise.
* h8500-dis.c: Likewise.
* i370-dis.c: Likewise.
* i370-opc.c: Likewise.
* m10200-dis.c: Likewise.
* m10300-dis.c: Likewise.
* micromips-opc.c: Likewise.
* mips-opc.c: Likewise.
* mips61-opc.c: Likewise.
* moxie-dis.c: Likewise.
* or32-opc.c: Likewise.
* pj-dis.c: Likewise.
* ppc-dis.c: Likewise.
* ppc-opc.c: Likewise.
* s390-dis.c: Likewise.
* sh-dis.c: Likewise.
* sh64-dis.c: Likewise.
* sparc-dis.c: Likewise.
* sparc-opc.c: Likewise.
* spu-dis.c: Likewise.
* tic30-dis.c: Likewise.
* tic54x-dis.c: Likewise.
* tic80-dis.c: Likewise.
* tic80-opc.c: Likewise.
* tilegx-dis.c: Likewise.
* tilepro-dis.c: Likewise.
* v850-dis.c: Likewise.
* v850-opc.c: Likewise.
* vax-dis.c: Likewise.
* w65-dis.c: Likewise.
* xgate-dis.c: Likewise.
* xtensa-dis.c: Likewise.
* rl78-decode.opc: Likewise.
* rl78-decode.c: Regenerate.
* rx-decode.opc: Likewise.
* rx-decode.c: Regenerate.
* configure.in: Add check that sysdep.h has been included before
any system header files.
* configure: Regenerate.
* config.in: Regenerate.
* sysdep.h: Generate an error if included before config.h.
* configure.in: Add check that sysdep.h has been included before
any system header files.
* configure: Regenerate.
* config.in: Regenerate.
* aclocal.m4: Regenerate.
* bfd-in.h: Generate an error if included before config.h.
* sysdep.h: Likewise.
* bfd-in2.h: Regenerate.
* compress.c: Remove #include "config.h".
* plugin.c: Likewise.
* elf32-m68hc1x.c: Include sysdep.h before alloca-conf.h.
* elf64-hppa.c: Likewise.
* som.c: Likewise.
* xsymc.c: Likewise.
* configure.in: Add check that sysdep.h has been included before
any system header files.
* configure: Regenerate.
* config.in: Regenerate.
* configure.in: Add check that sysdep.h has been included before
any system header files.
* configure: Regenerate.
* config.in: Regenerate.
* aclocal.m4: Regenerate.
* Makefile.am: Use wrappers around C files generated by flex.
* Makefile.in: Regenerate.
* doc/Makefile.in: Regenerate.
* itbl-lex-wrapper.c: New file.
* config/bfin-lex-wrapper.c: New file.
* cgen.c: Include as.h before setjmp.h.
* config/tc-dlx.c: Include as.h before any other header.
* config/tc-h8300.c: Likewise.
* config/tc-lm32.c: Likewise.
* config/tc-mep.c: Likewise.
* config/tc-microblaze.c: Likewise.
* config/tc-mmix.c: Likewise.
* config/tc-msp430.c: Likewise.
* config/tc-or32.c: Likewise.
* config/tc-tic4x.c: Likewise.
* config/tc-tic54x.c: Likewise.
* config/tc-xtensa.c: Likewise.
* configure.in: Add check that sysdep.h has been included before
any system header files.
* configure: Regenerate.
* config.in: Regenerate.
* unwind-ia64.h: Include config.h.
2012-05-17 15:13:28 +00:00
Alan Modra
e1dad58d73
bfd/
...
* elf32-ppc.c (has_tls_reloc, has_tls_get_addr_call, has_vle_insns,
is_ppc_vle): Move to..
* elf32-ppc.h: ..here, making is_ppc_vle a macro.
opcodes/
* ppc_dis.c: Don't include elf/ppc.h.
2012-05-17 02:24:50 +00:00
Nick Clifton
101af531fe
* arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
...
to PUSH/POP {reg}.
* binutils-all/arm/objdump.exp:
STMFD/LDMIA sp!, {reg} don't disassemble to PUSH/POP {reg} any longer.
* gas/arm/stm-ldm.d: STMFD/LDMIA sp!, {reg} don't disassemble to
PUSH/POP {reg} any longer. Some new test cases have been added as well.
* gas/arm/stm-ldm.s: Likewise.
2012-05-16 10:53:49 +00:00