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Author SHA1 Message Date
Joern Rennecke 6a5709a5a1 2004-02-23 Andrew Stubbs <andrew.stubbs@superh.com> 
gas:
	* tc-sh.c (build_Mytes): Add REG_N_D and REG_N_B01
	nibble types to assembler.
opcodes:
	* sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
	ensure that double registers have even numbers.
	Add REG_N_B01 for nn01 (binary 01) nibble to ensure
	that reserved instruction 0xfffd does not decode the same
	as 0xfdfd (ftrv).
	* sh-opc.h: Add REG_N_D nibble type and use it whereever
	REG_N refers to a double register.
	Add REG_N_B01 nibble type and use it instead of REG_NM
	in ftrv.
	Adjust the bit patterns in a few comments.
 2004-02-26 16:14:42 +00:00
Aldy Hernandez e5d2b64f53 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst. 2004-02-26 03:24:44 +00:00
Aldy Hernandez 1f04b05ff5 2004-02-20 Aldy Hernandez <aldyh@redhat.com> 
* ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
 2004-02-20 05:10:13 +00:00
Aldy Hernandez 2f3b870051 2004-02-20 Aldy Hernandez <aldyh@redhat.com> 
* ppc-opc.c (powerpc_opcodes): Add m*ivor35.
 2004-02-20 04:56:34 +00:00
Aldy Hernandez f0b26da617 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34, 
mtivor32, mtivor33, mtivor34.
 2004-02-20 04:45:37 +00:00
Aldy Hernandez 23d59c56c9 2004-02-19 Aldy Hernandez <aldyh@redhat.com> 
* ppc-opc.c: Add mfmcar.
 2004-02-20 00:17:23 +00:00
Nick Clifton 34920d91a5 Apply fixes for Maverick Crunch 2004-02-18 16:28:18 +00:00
Ben Elliston 44d8648176 * m32r-dis.c: Regenerate. 2004-02-13 03:21:49 +00:00
Michael Snyder 17707c23a8 2004-01-27 Michael Snyder <msnyder@redhat.com> 
* sh-opc.h (sh_table): "fsrra", not "fssra".
 2004-01-28 00:05:47 +00:00
Nick Clifton fe3a9bc403 Tighten constaints on a few sparc instructions 2004-01-23 12:08:24 +00:00
Jakub Jelinek ff24f1246e * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args. 2004-01-18 23:46:32 +00:00
Alan Modra a02a862a31 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not 
1.  Don't print scale factor on AT&T mode when index missing.
 2004-01-18 23:12:47 +00:00
Alexandre Oliva d164ea7f0f * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended 
when loaded into XR registers.
 2004-01-16 03:16:00 +00:00
Richard Sandiford cb10e79a50 cpu/ 
* frv.cpu (UNIT): Add IACC.
	(iacc-multiply-r-r): Use it.
	* frv.opc (fr400_unit_mapping): Add entry for IACC.
	(fr500_unit_mapping, fr550_unit_mapping): Likewise.

opcodes/
	* frv-desc.h: Regenerate.
	* frv-desc.c: Regenerate.
	* frv-opc.c: Regenerate.
 2004-01-14 10:05:00 +00:00
Michael Snyder f532f3fa70 2004-01-13 Michael Snyder <msnyder@redhat.com> 
* sh-dis.c (print_insn_sh): Allocate 4	bytes for insn.
 2004-01-13 19:56:46 +00:00
Paul Brook e45d06306f * gas/config/tc-arm.c (do_vfp_reg2_from_sp2): Rename from 
do_vfp_sp_reg2.
	(do_vfp_sp2_from_reg2): New function.
	(insns): Use them.
	(do_vfp_dp_from_reg2): Check return values properly.
	* opcodes/arm-opc.h (arm_opcodes): Move generic mcrr after known
	specific opcodes.
	* gas/testsuite/gas/arm/vfp2.s, gas/arm/vfp2.d: New test.
	* gas/testsuite/gas/arm/arm.exp: Add them.
 2004-01-09 11:53:16 +00:00
Daniel Jacobowitz 3ba7a1aacf * Makefile.am (libopcodes_la_DEPENDENCIES) 
(libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
	comment about the problem.
	* Makefile.in: Regenerate.
 2004-01-07 18:39:40 +00:00
Alexandre Oliva ba2d3f07f2 2003-12-19 Alexandre Oliva <aoliva@redhat.com> 
* frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
cut&paste errors in shifting/truncating numerical operands.
2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
* frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
(parse_uslo16): Likewise.
(parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
(parse_d12): Parse gotoff12 and gotofffuncdesc12.
(parse_s12): Likewise.
2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
* frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
(parse_uslo16): Likewise.
(parse_uhi16): Parse gothi and gotfuncdeschi.
(parse_d12): Parse got12 and gotfuncdesc12.
(parse_s12): Likewise.
 2004-01-06 19:18:43 +00:00
Nick Clifton 3ab4893121 Catch a bug in the msp430 disassembler where an add instruction was confused 
with an rla instruction.  Add a test for this to the testsuite.
 2004-01-02 17:26:11 +00:00
Alan Modra c9e214e571 Split ChangeLog files. 2004-01-02 11:16:21 +00:00
Christian Groessler a0bd404eac * z8k-dis.c (intr_names): Removed. 
(print_intr, print_flags): New functions.
	(unparse_instr): Use new functions.
 2003-12-15 22:01:43 +00:00
Nick Clifton a711c44f29 Add PIPE_O attribute to "pop" instruction. 2003-12-15 12:19:13 +00:00
Mark Mitchell 1ea5b9f8d1 * arm-opc.h (arm_opcodes): Put V6 instructions before XScale 
instructions.
 2003-12-15 05:01:41 +00:00
Hans-Peter Nilsson 8b1ddfd7d1 * mmix-opc.c (mmix_opcodes): Use GO_INSN_BYTE, PUSHGO_INSN_BYTE, 
SETL_INSN_BYTE, INCH_INSN_BYTE, INCMH_INSN_BYTE, INCML_INSN_BYTE
	and SWYM_INSN_BYTE instead of raw numbers.
 2003-12-13 14:56:24 +00:00
Zack Weinberg 1f6c9eb084 opcodes: 
* ppc-opc.c (MO): Make optional.
	(RAO, RSO, SHO): New optional forms of RA, RS, SH operands.
	(tlbwe): Accept for both PPC403 and BOOKE.  Make all operands optional.
gas:
	* tc-ppc.c (md_assemble): Rewrite comment about optional operands
	to indicate that 'all or none' is also handled.  Pluralize a
	word in another comment.
gas/testsuite:
	* gas/ppc/booke.s: Add two more forms of the mbar instruction
	and three forms of the tlbwe instruction.
	* gas/ppc/booke.d: Update to match.
 2003-12-10 22:12:50 +00:00
Mark Mitchell 09d92015d3 * gas/arm/arm.exp: Add archv6 and thumbv6. 
* gas/arm/archv6.d: New file.
	* gas/arm/archv6.s: Likewise.
	* gas/arm/thumbv6.d: Likewise.
	* gas/arm/thumbv6.s: Likewise.

	Add V6 support.
	* config/tc-arm.c (ARM_EXT_V6): New macro.
	(ARM_ARCH_V6): Likewise.
	(SHIFT_IMMEDIATE): Likewise.
	(SHIFT_LSL_OR_ASR_IMMEDIATE): Likewise.
	(SHIFT_ASR_IMMEDIATE): Likewise.
	(SHIFT_LSL_IMMMEDIATE): Likewise.
	(do_cps): New function.
	(do_cpsi): Likewise.
	(do_ldrex): Likewise.
	(do_pkhbt): Likewise.
	(do_pkhtb): Likewise.
	(do_qadd16): Likewise.
	(do_rev): Likewise.
	(do_rfe): Likewise.
	(do_sxtah): Likewise.
	(do_sxth): Likewise.
	(do_setend): Likewise.
	(do_smlad): Likewise.
	(do_smlald): Likewise.
	(do_smmul): Likewise.
	(do_ssat): Likewise.
	(do_usat): Likewise.
	(do_srs): Likewise.
	(do_ssat16): Likewise.
	(do_usat16): Likewise.
	(do_strex): Likewise.
	(do_umaal): Likewise.
	(do_cps_mode): Likewise.
	(do_cps_flags): Likewise.
	(do_endian_specifier): Likewise.
	(do_pkh_core): Likewise.
	(do_sat): Likewise.
	(do_sat16): Likewise.
	(insns): Add V6 instructions.
	(do_t_cps): New function.
	(do_t_cpy): Likewise.
	(do_t_setend): Likewise.
	(THUMB_CPY): New macro.
	(tinsns): Add V6 instructions.
	(decode_shift): Handle V6 restricted-shift options.
	(thumb_mov_compare): Support CPY.
	(arm_cores): Add arm1136js and arm1136jfs.
	(arm_archs): Add armv6.
	(arm_fpus): Add arm1136jfs.
	* doc/c-arm.texi (ARM Options): Mention arm1136js, arm1136jfs, and
	armv6 options.

	* gas/arm/arm.exp: Add archv6 and thumbv6.
	* gas/arm/archv6.d: New file.
	* gas/arm/archv6.s: Likewise.
	* gas/arm/thumbv6.d: Likewise.
	* gas/arm/thumbv6.s: Likewise.

	* arm-dis.c (print_arm_insn): Add 'W' macro.
	* arm-opc.h (arm_opcodes): Add V6 instructions.
	(thumb_opcodes): Likewise.
 2003-12-06 01:25:29 +00:00
Michael Snyder 2469ef8b79 2003-12-02 Alexandre Oliva <aoliva@redhat.com> 
* sh-opc.h: Add support for sh4a and no-fpu variants.
        * sh-dis.c: Ditto.
 2003-12-05 22:16:11 +00:00
Michael Snyder aeadede63f 2003-12-02 Alexandre Oliva <aoliva@redhat.com> 
* sh-opc.h: Add support for sh4a and no-fpu variants.
	* sh-dis.c: Ditto.
 2003-12-05 02:02:32 +00:00
Alan Modra 8f8077465d * openrisc-asm.c: Regenerate. 
* pj-opc.c: Update copyright date.
 2003-12-04 11:07:22 +00:00
Nick Clifton 8884595866 Add support for the M32R2 processor. 2003-12-03 17:38:48 +00:00
Kazu Hirata e0ab682bec * alpha-opc.c: Remove ARGSUSED. 
* i370-opc.c: Likewise.
	* ppc-opc.c: Likewise.
 2003-12-03 03:15:14 +00:00
Alan Modra 9fa06c65f0 make "dep-am" 2003-12-02 08:14:35 +00:00
Christian Groessler c8fd013cc2 * z8k-dis.c: Convert to ISO C90. 
* z8kgen.c: Convert to ISO C90.
	(opt): Move long opcode for "ldb rdb,imm8" after short one, now
	the short one is created when assembling.
	* z8k-opc.h: Regenerate with new z8kgen.c.
 2003-11-28 20:12:17 +00:00
Kazu Hirata 122d081a38 * h8300-dis.c (print_colon_thingie): Remove. 2003-11-19 19:44:58 +00:00
Maciej W. Rozycki 1abe91b1db * config/tc-mips.c (macro): Handle new macros: "lca" and "dlca" 
for loading addresses using CALL relocations.
Don't emit CALL relocations when a base register is used.

* gas/mips/lca-svr4pic.d: New test for the "lca" macro.
* gas/mips/lca-xgot.d: Likewise.
* gas/mips/lca.s: Source for the new tests.
* gas/mips/mips.exp: Run the new tests.

* opcode/mips.h: Define new enum members, M_LCA_AB and M_DLCA_AB.

* mips-opc.c (mips_builtin_opcodes): Handle new macros: "lca" and
"dlca".
 2003-11-18 21:22:57 +00:00
Nick Clifton 22a398e190 Add new field to disassemble_info structure: symbol_is_valid() and use it to 
skip displaying arm elf mapping symbols in disassembly output.
 2003-11-14 15:12:44 +00:00
H.J. Lu f4fa50da5d 2003-11-05 H.J. Lu <hongjiu.lu@intel.com> 
* m68k-opc.c (m68k_opcodes): Reorder "fmovel".
 2003-11-06 04:32:07 +00:00
Daniel Jacobowitz 8e6446ff53 * arm-dis.c (print_arm_insn): Print "-" after "#". 2003-11-03 14:47:22 +00:00
Nick Clifton f46a9fbb7a Add second argument to rcpp instruction. 2003-10-30 10:03:03 +00:00
Stephane Carrez fde8b63277 * m68hc11-dis.c: Convert to ISO C90 prototypes. 2003-10-27 09:26:13 +00:00
Nick Clifton 3e60263266 Add ColfFire v4 support 2003-10-21 13:28:59 +00:00
Michael Snyder d43ff6d27f 2003-06-03 Michael Snyder <msnyder@redhat.com> 
and Bernd Schmidt   <bernds@redhat.com>
        and Alexandre Oliva <aoliva@redhat.com>

        * disassemble.c (disassembler): Add support for h8300sx.
 2003-10-10 22:13:49 +00:00
Dave Brolley f7c541f680 2003-10-10 Dave Brolley <brolley@redhat.com> 
* frv-asm.c,frv-desc.c,frv-opc.c: Regenerated.
 2003-10-10 19:30:02 +00:00
Dave Brolley d576f161dd 2003-10-08 Dave Brolley <brolley@redhat.com> 
* frv-desc.[ch], frv-opc.[ch]: Regenerated.
 2003-10-08 18:26:01 +00:00
Bob Wilson 118fecd307 * xtensa-dis.c (fetch_data): Remove numBytes parameter. 
(print_insn_xtensa): Fix call to fetch_data.
 2003-10-01 00:40:22 +00:00
Chris Demetriou 5f74bc130d [ bfd/ChangeLog ] 
2003-09-30  Chris Demetriou  <cgd@broadcom.com>

	* archures.c (bfd_mach_mipsisa64r2): New define.
	* bfd-in2.h: Regenerate.
	* aoutx.h (NAME(aout,machine_type)): Handle bfd_mach_mipsisa64r2.
	* cpu-mips.c (I_mipsisa64r2): New enum value.
	(arch_info_struct): Add entry for I_mipsisa64r2.
	* elfxx-mips.c (_bfd_elf_mips_mach)
	(_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_64R2.
	(mips_set_isa_flags): Add bfd_mach_mipsisa64r2 case.
	(mips_mach_extensions): Add entry for bfd_mach_mipsisa64r2.

[ binutils/ChangeLog ]
2003-09-30  Chris Demetriou  <cgd@broadcom.com>

	* readelf.c (get_machine_flags): Handle E_MIPS_ARCH_64R2.

[ gas/Changelog ]
2003-09-30  Chris Demetriou  <cgd@broadcom.com>

	* configure.in (mipsisa64r2, mipsisa64r2el, mipsisa64r2*): New CPUs.
	* configure: Regenerate.
	* config/tc-mips.c (imm2_expr): New variable.
	(md_assemble, mips16_ip): Initialize imm2_expr.
	(ISA_HAS_64BIT_REGS, ISA_HAS_DROR, ISA_HAS_ROR): Add ISA_MIPS64R2.
	(macro_build): Handle +A, +B, +C, +E, +F, +G, and +H format operands.
	(macro): Handle M_DEXT and M_DINS.
	(validate_mips_insn): Handle +E, +F, +G, +H, and +I format operands.
	(mips_ip): Likewise.
	(OPTION_MIPS64R2): New define.
	(md_longopts): New entry for -mips64r2 (OPTION_MIPS64R2).
	OPTION_ASE_BASE): Increase to compensate for OPTION_MIPS64R2.
	(md_parse_option): Handle OPTION_MIPS64R2.
	(s_mipsset): Handle setting "mips64r2" ISA.
	(mips_cpu_info_table): Add mips64r2.
	(md_show_usage): Document -mips64r2 option.
	* doc/as.texinfo: Docuemnt -mips64r2 option.
	* doc/c-mips.texi: Likewise.

[ gas/testsuite/ChangeLog ]
2003-09-30  Chris Demetriou  <cgd@broadcom.com>

	* gas/mips/cp0-names-mips64r2.d: New file.
	* gas/mips/cp0sel-names-mips64r2.d: New file.
	* gas/mips/elf_arch_mips64r2.d: New file.
	* gas/mips/hwr-names-mips64r2.d: New file.
	* gas/mips/mips32r2-ill-fp64.l: New file.
	* gas/mips/mips32r2-ill-fp64.s: New file.
	* gas/mips/mips64r2-ill.l: New file.
	* gas/mips/mips64r2-ill.s: New file.
	* gas/mips/mips64r2.d: New file.
	* gas/mips/mips64r2.s: New file.
	* gas/mips/mips.exp: Define "mips64r2" arch, and run new tests.

[ include/elf/ChangeLog ]
2003-09-30  Chris Demetriou  <cgd@broadcom.com>

	* mips.h (E_MIPS_ARCH_64R2): New define.

[ include/opcode/ChangeLog ]
2003-09-30  Chris Demetriou  <cgd@broadcom.com>

	* mips.h: Document +E, +F, +G, +H, and +I operand types.
	Update documentation of I, +B and +C operand types.
	(INSN_ISA64R2, ISA_MIPS64R2, CPU_MIPS64R2): New defines.
	(M_DEXT, M_DINS): New enum values.

[ ld/ChangeLog ]
2003-09-30  Chris Demetriou  <cgd@broadcom.com>

	* ldmain.c (get_emulation): Ignore "-mips64r2".

[ ld/testsuite/ChangeLog ]
2003-09-30  Chris Demetriou  <cgd@broadcom.com>

	* ld-mips-elf/mips-elf-flags.exp: Add tests for combinations
	with MIPS64r2.

[ opcodes/ChangeLog ]
2003-09-30  Chris Demetriou  <cgd@broadcom.com>

	* mips-dis.c (mips_arch_choices): Add entry for "mips64r2"
	(print_insn_args): Add handing for +E, +F, +G, and +H.
	* mips-opc.c (I65): New define for MIPS64r2.
	(mips_builtin_opcodes): Add "dext", "dextm", "dextu", "dins",
	"dinsm", "dinsu", "drotl", "drotr", "drotr32", "drotrv", "dsbh",
	and "dshd" for MIPS64r2.  Adjust "dror", "dror32", and "drorv" to
	be supported on MIPS64r2.
 2003-09-30 16:17:15 +00:00
Dave Brolley e74d091b9a 2003-09-24 Dave Brolley <brolley@redhat.com> 
* frv-desc.c, frv-opc.c, frv-opc.h: Regenerated.
 2003-09-24 19:10:48 +00:00
Andreas Jaeger 26ca545091 * i386-dis.c: Convert to ISO C90 prototypes. 
* i370-dis.c: Likewise.
	* i370-opc.c: Likewiwse.
	* i960-dis.c: Likewise.
	* ia64-opc.c: Likewise.
 2003-09-14 15:16:57 +00:00
Dave Brolley f7df6a7927 2003-09-09 Dave Brolley <brolley@redhat.com> 
* frv-desc.c: Regenerated.
 2003-09-09 22:29:42 +00:00
Dave Brolley 9c2de72926 2003-09-08 Dave Brolley <brolley@redhat.com> 
On behalf of Doug Evans <dje@sebabeach.org>
        * Makefile.am (run-cgen): Pass new args archfile and opcfile
        to cgen.sh.
        (stamp-ip2k,stamp-m32r,stamp-fr30,stamp-frv,stamp-openrisc,
        stamp-iq2000,stamp-xstormy16): Pass paths of .cpu and .opc files
        to cgen.sh.
        (stamp-frv): Delete hardcoded path spec workaround.
        * Makefile.in: Regenerate.
        * cgen.sh: New args archfile and opcfile.  Pass on to cgen.
 2003-09-08 17:24:05 +00:00
Nick Clifton 8ad30312ff Add binutils support for v850e1 processor 2003-09-04 11:04:38 +00:00
Alan Modra 661bd698e4 * ppc-dis.c (struct dis_private): New. 
(powerpc_dialect): Make static.  Accept -Many in addition to existing
	options.  Save dialect in dis_private.
	(print_insn_big_powerpc): Retrieve dialect from dis_private.
	(print_insn_little_powerpc): Likewise.
	(print_insn_powerpc): Call powpc_dialect here.  Remove unnecessary
	efs/altivec check.  Try harder to disassemble if given -Many.
	* ppc-opc.c (insert_fxm): Expand comment.
	(PPC, PPCCOM, PPC32, PPC64, PPCVEC): Remove PPC_OPCODE_ANY.
	(POWER, POWER2, PPCPWR2, POWER32, COM, COM32, M601, PWRCOM): Likewise.
	(POWER4): Remove PPCCOM.
	(PPCONLY): Don't define.  Update all occurrences to PPC.
 2003-09-04 01:51:37 +00:00
Andrew Cagney 92c2346c02 Index: opcodes/ChangeLog 
2003-09-03  Andrew Cagney  <cagney@redhat.com>

	* dis-init.c (init_disassemble_info): New file and function.
	* Makefile.am (CFILES): Add "dis-init.c".
	(libopcodes_la_SOURCES): Add "dis-init.c".
	(dis-init.lo): Specify dependencies.
	* Makefile.in: Regenerate.

Index: include/ChangeLog
2003-08-27  Andrew Cagney  <cagney@redhat.com>

	* dis-asm.h (init_disassemble_info): Declare.
	(INIT_DISASSEMBLE_INFO): Redefine as a call to
	init_disassemble_info.
	(INIT_DISASSEMBLE_INFO_NO_ARCH): Ditto.

Index: binutils/ChangeLog
2003-09-03  Andrew Cagney  <cagney@redhat.com>

	* objdump.c: Refer to init_disassemble_info in comments.
	(disassemble_data): Replace INIT_DISASSEMBLE_INFO with
	init_disassemble_info.
 2003-09-03 23:43:18 +00:00
Dave Brolley ecd51ad39f 2003-09-03 Dave Brolley <brolley@redhat.com> 
* frv-*: Regenerated.
 2003-09-03 23:09:56 +00:00
Alan Modra 823bbe9d95 * ppc-opc.c (powerpc_opcodes): Combine identical PPC403/BOOKE entries. 
Move duplicate mnemonic entries together.  Use RS instead of RT on
	all mt*.
	* ppc-dis.c: Convert to ISO C.
 2003-09-02 04:15:29 +00:00
Dave Brolley 5272d2012d 2003-08-29 Dave Brolley <brolley@redhat.com> 
* Makefile.am (stamp-frv): Copy frv.cpu and frv.opc from
        $(srcdir)/../cpu temporarily when regenerating source files.
        * Makefile.in: Regenerated.
 2003-08-29 19:14:54 +00:00
Nick Clifton f02232aaa3 Add support for unindexed form of Addressing Mode 5 2003-08-19 13:05:42 +00:00
Alan Modra 7d5b217e2c * ppc-opc.c (PPC440): Define. 
(powerpc_opcodes): Allow mac*, mul*, nmac*, dccci, dcread, iccci,
	icread instructions when PPC440.  Add dlmzb instruction.
 2003-08-19 07:09:10 +00:00
Alan Modra f860738999 * dep-in.sed: Remove libintl.h. 
* Makefile.am (POTFILES.in): Unset LC_COLLATE.
	Run "make dep-am".
	* Makefile.in: Regenerate.
 2003-08-14 07:03:18 +00:00
Michael Meissner 90e3a20cfe fix typo in ChangeLog 2003-08-09 00:46:53 +00:00
Michael Meissner ffead7aece regenerate cgen files after prototype fix 2003-08-09 00:39:21 +00:00
Michael Meissner 44d221f0b8 Fix typos in last change 2003-08-08 23:01:28 +00:00
Michael Meissner 209e303302 fix changelog date 2003-08-08 21:22:41 +00:00
Michael Meissner 10e05405ac Convert cgen to C-90 2003-08-08 21:21:24 +00:00
Nick Clifton 9e7d479d74 Updated French translations 2003-08-06 10:15:16 +00:00
Nick Clifton 3d3d3d639b Add new Dutch translation. 2003-08-05 09:39:31 +00:00
Jason Eckhardt 7f8a68cd19 2003-07-30 Jason Eckhardt <jle@rice.edu> 
* i860-dis.c: Convert to ISO C90.  Remove superflous prototypes.
 2003-07-30 21:10:12 +00:00
Nick Clifton 52f20b276f Updated Romanian translation 2003-07-30 15:53:12 +00:00
Jakub Jelinek 0deb7ac528 * ppc-opc.c (insert_mbe, extract_mbe): Shift 1L instead of 1 up. 2003-07-29 08:29:56 +00:00
Nick Clifton 834d807bb8 Updated French translations 2003-07-24 11:16:05 +00:00
Nick Clifton 31e0f3cd45 * objdump.c (main) :Accept multiple -M switch. 
* doc/binutils.texi: Document that multiple -M switches are accepted and that
  a single -M switch can contain comma separated options.
* arm-dis.c (parse_arm_disassembler_option): Do not expect option string to be
  NUL terminated.
  (parse_disassembler_options): Allow options to be space or comma separated.
 2003-07-18 11:34:41 +00:00
Nick Clifton 6c37ac4d15 Update translations 2003-07-17 14:22:45 +00:00
Richard Sandiford 5a7ea74950 include/opcode/ 
* mips.h (CPU_RM7000): New macro.
	(OPCODE_IS_MEMBER): Match CPU_RM7000 against 4650 insns.

bfd/
	* archures.c (bfd_mach_mips7000): New.
	* bfd-in2.h: Regenerated.
	* cpu-mips.c (arch_info_struct): Add an entry for mips:7000.
	* elfxx-mips.c (mips_set_isa_flags): Handle bfd_mach_mips7000.
	(mips_mach_extensions): Add an entry for it.

opcodes/
	* mips-dis.c (mips_arch_choices): Add rm7000 and rm9000 entries.

gas/
	* config/tc-mips.c (hilo_interlocks): True for CPU_RM7000.
	(mips_cpu_info_table): Add rm7000 and rm9000 entries.

gas/testsuite/
	* gas/mips/rm7000.[sd]: New test.
	* gas/mips/mips.exp: Run it.
 2003-07-15 07:50:39 +00:00
Nick Clifton 76bff7057c Update Turkish translation files for bfd, gas and opcodes 2003-07-14 11:18:13 +00:00
Alan Modra fce0080055 Update pot files. 2003-07-11 05:10:21 +00:00
Alexandre Oliva 40fa02078b 2000-05-25 Alexandre Oliva <aoliva@cygnus.com> 
* m10300-dis.c (disassemble): Negate negative accumulator's shift.
2000-05-24  Alexandre Oliva  <aoliva@cygnus.com>
* m10300-dis.c (disassemble, case FSREG, FDREG): Don't assume
32-bit longs when sign-extending operands.
2000-04-20  Alexandre Oliva  <aoliva@cygnus.com>
* m10300-opc.c: Remove MN10300_OPERAND_RELAX from all FSREGs.
* m10300-dis.c (HAVE_AM33_2): Define.
(disassemble): Use it.
(HAVE_AM33): Redefine.
(print_insn_mn10300): Fix mask for 5-byte extended insns.
2000-04-01  Alexandre Oliva  <aoliva@cygnus.com>
* m10300-opc.c: Renamed AM332 to AM33_2.
2000-03-31  Alexandre Oliva  <aoliva@cygnus.com>
* m10300-opc.c: Defined AM33 2.0 register operands.  Added support
for AM33 2.0 `imm8,(abs16)' addressing mode for btst, bset and
bclr.  Implemented `fbCC', `flCC', `dcpf' and all FP insns.
* m10300-dis.c (print_insn_mn10300): Recognize 5byte extended
insn code of AM33 2.0.
(disassemble): Recognize FMT_D3.  Print out FP register names.
 2003-07-10 02:53:27 +00:00
Chris Demetriou fec0654638 2003-07-09 Chris Demetriou <cgd@broadcom.com> 
* mips-dis.c (set_default_mips_dis_options): Get BFD from
        the disassembler_info's section, rather than from the
        disassembler_info's symbols pointer.
 2003-07-09 22:53:52 +00:00
Alan Modra 8427c42425 * ppc-opc.c: Remove NULL pointer checks. Formatting. Remove 
extraneous ATTRIBUTE_UNUSED.
	* ppc-dis.c (print_insn_powerpc): Always pass a valid address to
	operand->extract.
 2003-07-07 01:34:04 +00:00
Alan Modra 2fbfdc41e7 * ppc-opc.c: Convert to C90, removing unnecessary prototypes and 
casts.  Formatting.
 2003-07-04 15:27:25 +00:00
Alan Modra c168870a29 * ppc-opc.c: Remove PARAMS from prototypes. 
(FXM4): Define.
	(insert_fxm): New function, used by both FXM and FXM4.
	(extract_fxm): Likewise.
	(XFXFXM_MASK): Remove 1 << 20 term.
	(powerpc_opcodes): Add Power4 version of "mfcr".  Simplify "mtcr" mask.
 2003-07-04 13:06:21 +00:00
Martin Schwidefsky bac0268913 * s390-dis.c (s390_extract_operand): Add support for long displacements. 
* s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z990.
        * s390-opc.c (D20_20): Add define for 20 bit displacements.
        (INSTR_RRF_R0RR, INSTR_RSL_R0RD, INSTR_RSY_RRRD, INSTR_RSY_RURD,
        INSTR_RSY_AARD, INSTR_RXY_RRRD, INSTR_RXY_FRRD, INSTR_SIY_URD): Add
        new instruction formats.
        (MASK_RRF_R0RR, MASK_RSL_R0RD, MASK_RSY_RRRD, MASK_RSY_RURD,
        MASK_RSY_AARD, MASK_RXY_RRRD, MASK_RXY_FRRD, MASK_SIY_URD): Likewise.
        (s390_opformats): Likewise.
        * s390-opc.txt: Add new instructions for cpu type z990. Add missing
        hfp instructions. Add missing instructions pgin, pgout and xsch.
 2003-07-01 14:47:58 +00:00
H.J. Lu ca164297eb gas/ 
2003-06-23  H.J. Lu <hongjiu.lu@intel.com>

	* gas/config/tc-i386.c (md_assemble): Support Intel Precott New
	Instructions.

	* gas/config/tc-i386.h (CpuPNI): New.
	(CpuUnknownFlags): Add CpuPNI.

gas/testsuite/

2003-06-23  H.J. Lu <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Add prescott.

	* gas/i386/prescott.d: New file.
	* gas/i386/prescott.s: Likewise.

include/opcode/

2003-06-23  H.J. Lu <hongjiu.lu@intel.com>

	* i386.h (i386_optab): Support Intel Precott New Instructions.

opcodes/

2003-06-23  H.J. Lu <hongjiu.lu@intel.com>

	* i386-dis.c (PNI_Fixup): New. Fix up "mwait" and "monitor" in
	Intel Precott New Instructions.
	(PREGRP27): New. Added for "addsubpd" and "addsubps".
	(PREGRP28): New. Added for "haddpd" and "haddps".
	(PREGRP29): New. Added for "hsubpd" and "hsubps".
	(PREGRP30): New. Added for "movsldup" and "movddup".
	(PREGRP31): New. Added for "movshdup" and "movhpd".
	(PREGRP32): New. Added for "lddqu".
	(dis386_twobyte): Use PREGRP30 to replace the "movlpX" entry.
	Use PREGRP31 to replace the "movhpX" entry. Use PREGRP28 for
	entry 0x7c. Use PREGRP29 for entry 0x7d. Use PREGRP27 for
	entry 0xd0. Use PREGRP32 for entry 0xf0.
	(twobyte_has_modrm): Updated.
	(twobyte_uses_SSE_prefix): Likewise.
	(grps): Use PNI_Fixup in the "sidtQ" entry.
	(prefix_user_table): Add PREGRP27, PREGRP28, PREGRP29, PREGRP30,
	PREGRP31 and PREGRP32.
	(float_mem): Use "fisttp{l||l|}" in entry 1 in opcode 0xdb.
	Use "fisttpll" in entry 1 in opcode 0xdd.
	Use "fisttp" in entry 1 in opcode 0xdf.
 2003-06-23 20:15:34 +00:00
Christian Groessler 6ddfd88c72 * z8k-dis.c (instr_data_s): Change tabl_index from long to int. 
(print_insn_z8k): Correctly check return value from
	z8k_lookup_instr call.
	(unparse_instr): Handle CLASS_IRO case.
	* z8kgen.c: Fix function definitions.  Fix formatting.
	(opt): Add brk opcode alias for non-simulator breakpoint.  Add
	missing and fix existing in/out and sin/sout opcode definitions.
	(args): "@ri", "@ro" - add CLASS_IRO register usage for in/out
	opcodes.
	(internal): Check p->flags for non-zero before dereferencing it.
	(gas): Add CLASS_IRO line.  Insert new OPC_xxx lines for the added
	opcodes and renumber the remaining lines repectively.
	(main): Remove "-d" command line switch.
	* z8k-opc.h: Regenerate with new z8kgen.c.
 2003-06-19 13:46:37 +00:00
H.J. Lu 3b4433739c bfd/ 
2003-06-06  H.J. Lu <hongjiu.lu@intel.com>

	* po/Make-in (DESTDIR): New.
	(install-data-yes): Support $(DESTDIR).
	(uninstall): Likewise.

binutils/

2003-06-06  H.J. Lu <hongjiu.lu@intel.com>

	* po/Make-in (DESTDIR): New.
	(install-data-yes): Support $(DESTDIR).
	(uninstall): Likewise.

gas/

2003-06-06  H.J. Lu <hongjiu.lu@intel.com>

	* po/Make-in (DESTDIR): New.
	(install-data-yes): Support $(DESTDIR).
	(uninstall): Likewise.

gprof/

2003-06-06  H.J. Lu <hongjiu.lu@intel.com>

	* po/Make-in (DESTDIR): New.
	(install-data-yes): Support $(DESTDIR).
	(uninstall): Likewise.

ld/

2003-06-06  H.J. Lu <hongjiu.lu@intel.com>

	* po/Make-in (DESTDIR): New.
	(install-data-yes): Support $(DESTDIR).
	(uninstall): Likewise.

opcodes/

2003-06-06  H.J. Lu <hongjiu.lu@intel.com>

	* po/Make-in (DESTDIR): New.
	(install-data-yes): Support $(DESTDIR).
	(uninstall): Likewise.
 2003-06-11 01:32:08 +00:00
Alan Modra 795bb480ca * bfd/Makefile.am (config.status): Depend on version.h. 
Run "make dep-am" in bfd/ and elsewhere, and regen files.
 2003-06-10 23:44:42 +00:00
Doug Evans b11dcf4e7f opcodes: 
* cgen-asm.in (@arch@_cgen_assemble_insn): CGEN_INSN_RELAX renamed to
	CGEN_INSN_RELAXED.
	* fr30-asm.c,fr30-desc.c,fr30-desc.h: Regenerate.
	* frv-asm.c,frv-desc.c,frv-desc.h: Regenerate.
	* ip2k-asm.c,ip2k-desc.c,ip2k-desc.h: Regenerate.
	* iq2000-asm.c,iq2000-desc.c,iq2000-desc.h: Regenerate.
	* m32r-asm.c,m32r-desc.c,m32r-desc.h,m32r-opc.c: Regenerate.
	* openrisc-asm.c,openrisc-desc.c,openrisc-desc.h: Regenerate.
	* xstormy16-asm.c,xstormy16-desc.c,xstormy16-desc.h: Regenerate.
gas:
	* cgen.c (gas_cgen_finish_insn): CGEN_INSN_RELAX renamed to
	CGEN_INSN_RELAXED.
	* config/tc-fr30.c (md_estimate_size_before_relax): Ditto.
	* config/tc-m32r.c (md_estimate_size_before_relax): Ditto.
	* config/tc-openrisc.c (md_estimate_size_before_relax): Ditto.
 2003-06-10 22:08:45 +00:00
Alan Modra adadcc0cc9 Add "attn", "lq" and "stq" power4 insns. 2003-06-10 07:44:11 +00:00
Richard Sandiford 0613284fd4 opcodes/ 
* h8300-dis.c (bfd_h8_disassemble): Don't print brackets round
	rts/l and rte/l register lists.

gas/
	* config/tc-h8300.c (get_rtsl_operands): Accept unbracketed register
	lists.  Allow single-register ranges.

testsuite/
	* gas/h8300/h8sx_rtsl.[sd]: New test.
	* gas/h8300/h8300.exp: Run it.
 2003-06-10 07:27:56 +00:00
Nick Clifton 36c3ae2457 Add code to handle even-numbered only register operands 2003-06-05 16:04:20 +00:00
Michael Snyder 20dc5b5ae3 2003-06-03 Michael Snyder <msnyder@redhat.com> 
and Bernd Schmidt   <bernds@redhat.com>
	and Alexandre Oliva <aoliva@redhat.com>
	* disassemble.c (disassembler): Add support for h8300sx.
	* h8300-dis.c: Ditto.
 2003-06-03 21:32:52 +00:00
Nick Clifton 7579829884 FRV: Use a signed 6-bit immediate value not unsigned for mdrotli insn. 
Use maintainer mode to regenerate ports.
 2003-06-03 17:15:25 +00:00
Jason Eckhardt 14218d5f24 2003-05-23 Jason Eckhardt <jle@rice.edu> 
gas:
        * config/tc-i860.c (target_xp): Declare variable.
        (OPTION_XP): Declare macro.
        (md_longopts): Add option -mxp.
        (md_parse_option): Set target_xp.
        (md_show_usage): Add -mxp usage.
        (i860_process_insn): Recognize XP registers bear, ccr, p0-p3.
        (md_assemble): Don't try expansions if XP_ONLY is set.
        * doc/c-i860.texi: Document -mxp option.

gas/testsuite:
        * gas/i860/xp.s: New file.
        * gas/i860/xp.d: New file.

include/opcode:
        * i860.h (expand_type): Add XP_ONLY.
        (scyc.b): New XP instruction.
        (ldio.l): Likewise.
        (ldio.s): Likewise.
        (ldio.b): Likewise.
        (ldint.l): Likewise.
        (ldint.s): Likewise.
        (ldint.b): Likewise.
        (stio.l): Likewise.
        (stio.s): Likewise.
        (stio.b): Likewise.
        (pfld.q): Likewise.

opcodes:
        * i860-dis.c (crnames): Add bear, ccr, p0, p1, p2, p3.
        (print_insn_i860): Grab 4 bits of the control register field
        instead of 3.
 2003-05-24 04:22:23 +00:00
Andreas Jaeger 08c6618845 Regenerate - forgot to commit with last commit 2003-05-20 09:34:19 +00:00
Jason Eckhardt b645cb1726 2003-05-18 Jason Eckhardt <jle@rice.edu> 
gas:
        * config/tc-i860.c (i860_process_insn): Initialize fc after
        each opcode mismatch.

include/opcode:
        * i860.h (form, pform): Add missing .dd suffix.

opcodes:
        * i860-dis.c (print_insn_i860): Instruction shrd has a dual bit,
        print it.

bfd:
        * elf32-i860.c (elf32_i860_relocate_highadj): Simplify calculation.
 2003-05-18 21:24:33 +00:00
Andreas Jaeger dd4b5cc0c0 * Makefile.am (libopcodes_la_LIBADD): Add libbfd.la. 
(libopcodes_la_DEPENDENCIES): Add libbfd.la.
        * Makefile.in: Regenerated.
 2003-05-17 07:27:24 +00:00
Nick Clifton 71bee782bf New Romanian translation 2003-05-16 09:39:56 +00:00
Nick Clifton 049f8936e9 Add support for h8300hn and h8300sn 2003-05-12 11:57:32 +00:00
Alan Modra 8373f9713f * i386-dis.c (print_insn): Test intel_syntax against (char) -1 in 
case char is unsigned.
 2003-05-09 11:36:43 +00:00
Christian Groessler 13e10c0a01 * z8k-dis.c (z8k_lookup_instr): Optimize FETCH_DATA calls. 
(unpack_instr): Fix representation of segmented addresses.
	(intr_name): Added, contains names of the parameters to the EI/DI
	instructions.
	(unparse_instr): Fix display of EI/DI parameters.
 2003-05-01 20:08:55 +00:00
Christian Groessler 7f31df7cab * expr.h: Fix comments in operatorT typedef. 
* config/tc-z8k.c: Add 2003 to copyright message.
	Fold s_segm() and s_unseg() into one function s_segm(parm) which
	decides by the parameter.
	(md_begin): Don't set linkrelax.  Only set Z8002 default if no
	command line argument was given to select the intended
	architecure.
	(get_interrupt_operand): Warn if NOP type code is emitted.
	(newfix): New parameter 'size', forward it to 'fix_new_exp'.
	(apply_fix): Call newfix with additional 'size' parameter.
	(build_bytes): Remove unused variable 'nib'.  Detect overflow in
	4 bit immediate arguments.
	(md_longopts): Add 'linkrelax' option.
	(md_parse_option): Adapt to new s_segm function.  Set 'linkrelax'
	variable when 'linkrelax' command line option is specified.
	(md_show_usage): Display 'linkrelax' option.
	(md_apply_fix3): Fix cases R_IMM4L, R_JR, and R_IMM8.  Add cases
	R_CALLR and R_REL16.
	* config/tc-z8k.h: Undef WARN_SIGNED_OVERFLOW_WORD.
 2003-05-01 19:59:33 +00:00