8729a6f6a5
Add vmfunc
...
gas/
2012-01-13 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (cpu_arch): Add ".vmfunc".
* doc/c-i386.texi: Document vmfunc.
gas/testsuite/
2012-01-13 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run vmfunc and x86-64-vmfunc.
* gas/i386/vmfunc.d: New.
* gas/i386/vmfunc.s: Likewise.
* gas/i386/x86-64-vmfunc.d: Likewise.
opcodes/
2012-01-13 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (mod_table): Add vmfunc.
* i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
(cpu_flags): CpuVMFUNC.
* i386-opc.h (CpuVMFUNC): New.
(i386_cpu_flags): Add cpuvmfunc.
* i386-opc.tbl: Add vmfunc.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2012-01-13 22:19:32 +00:00
00f51a41a8
Add Disp32S to 64bit call.
...
gas/testsuite/
2011-08-01 H.J. Lu <hongjiu.lu@intel.com>
PR gas/13046
* gas/i386/x86-64-branch.s: Add tests for direct branch.
* gas/i386/x86-64-branch.d: Updated.
* gas/i386/ilp32/x86-64-branch.d: Likewise.
opcodes/
2011-08-01 H.J. Lu <hongjiu.lu@intel.com>
PR gas/13046
* i386-opc.tbl: Add Disp32S to 64bit call.
* i386-tbl.h: Regenerated.
2011-08-01 19:25:48 +00:00
7a9068fe16
Add initial Intel K1OM support.
...
bfd/
2011-07-22 H.J. Lu <hongjiu.lu@intel.com>
* Makefile.am (ALL_MACHINES): Add cpu-k1om.lo.
(ALL_MACHINES_CFILES): Add cpu-k1om.c.
* Makefile.in: Regenerated.
* archures.c (bfd_architecture): Add bfd_arch_k1om.
(bfd_k1om_arch): New.
(bfd_archures_list): Add &bfd_k1om_arch.
* bfd-in2.h: Regenerated.
* config.bfd (targ64_selvecs): Add bfd_elf64_k1om_vec if
bfd_elf64_x86_64_vec is supported. Add bfd_elf64_k1om_freebsd_vec
if bfd_elf64_x86_64_freebsd_vec is supported.
(targ_selvecs): Likewise.
* configure.in: Support bfd_elf64_k1om_vec and
bfd_elf64_k1om_freebsd_vec.
* configure: Regenerated.
* cpu-k1om.c: New.
* elf64-x86-64.c (elf64_k1om_elf_object_p): New.
(bfd_elf64_k1om_vec): Likewise.
(bfd_elf64_k1om_freebsd_vec): Likewise.
* targets.c (bfd_elf64_k1om_vec): New.
(bfd_elf64_k1om_freebsd_vec): Likewise.
(_bfd_target_vector): Add bfd_elf64_k1om_vec and
bfd_elf64_k1om_freebsd_vec.
binutils/
2011-07-22 H.J. Lu <hongjiu.lu@intel.com>
* dwarf.c (init_dwarf_regnames): Handle EM_K1OM.
* elfedit.c (elf_machine): Support EM_K1OM.
(elf_class): Likewise.
* readelf.c (guess_is_rela): Handle EM_K1OM.
(dump_relocations): Likewise.
(get_machine_name): Likewise.
(get_section_type_name): Likewise.
(get_elf_section_flags): Likewise.
(process_section_headers): Likewise.
(get_symbol_index_type): Likewise.
(is_32bit_abs_reloc): Likewise.
(is_32bit_pcrel_reloc): Likewise.
(is_64bit_abs_reloc): Likewise.
(is_64bit_pcrel_reloc): Likewise.
(is_none_reloc): Likewise.
* doc/binutils.texi: Mention K1OM for elfedit.
binutils/testsuite/
2011-07-22 H.J. Lu <hongjiu.lu@intel.com>
* binutils-all/elfedit.exp: Run elfedit-4.
* binutils-all/elfedit-4.d: New.
gas/
2011-07-22 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (cpu_arch): Add k1om.
(i386_align_code): Handle PROCESSOR_K1OM.
(check_cpu_arch_compatible): Check EM_K1OM.
(i386_arch): Handle Intel K1OM.
(i386_mach): Return bfd_mach_k1om for Intel K1OM.
(i386_target_format): Return ELF_TARGET_K1OM_FORMAT for Intel
K1OM.
* config/tc-i386.h (ELF_TARGET_K1OM_FORMAT): New.
(processor_type): Add PROCESSOR_K1OM.
* doc/c-i386.texi: Document k1om.
gas/testsuite/
2011-07-22 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/k1om.d: New.
* gas/i386/k1om-inval.l: Likewise.
* gas/i386/k1om-inval.s: Likewise.
* gas/i386/i386.exp: Run k1om-inval and k1om.
include/elf/
2011-07-22 H.J. Lu <hongjiu.lu@intel.com>
* common.h (EM_K1OM): New.
ld/
2011-07-22 H.J. Lu <hongjiu.lu@intel.com>
* Makefile.am (ALL_64_EMULATIONS): Add eelf_k1om.o and
eelf_k1om_fbsd.o
(eelf_k1om.c): New.
(eelf_k1om_fbsd.c): Likewise.
* Makefile.in: Regenerated.
* configure.tgt (targ64_extra_emuls): Add elf_k1om if elf_x86_64
is supported. Add elf_k1om_fbsd if elf_x86_64_fbsd is supported.
(targ_extra_emuls): Likewise.
* emulparams/elf_k1om.sh: New.
* emulparams/elf_k1om_fbsd.sh: Likewise.
ld/testsuite/
2011-07-22 H.J. Lu <hongjiu.lu@intel.com>
* ld-x86-64/abs-k1om.d: New.
* ld-x86-64/protected2-k1om.d: Likewise.
* ld-x86-64/protected3-k1om.d: Likewise.
* ld-x86-64/x86-64.exp: Run abs-k1om, protected2-k1om and
protected3-k1om.
opcodes/
2011-07-22 H.J. Lu <hongjiu.lu@intel.com>
* configure.in: Handle bfd_k1om_arch.
* configure: Regenerated.
* disassemble.c (disassembler): Handle bfd_k1om_arch.
* i386-dis.c (print_insn): Handle bfd_mach_k1om and
bfd_mach_k1om_intel_syntax.
* i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to
~(CpuL1OM|CpuK1OM). Add CPU_K1OM_FLAGS.
(cpu_flags): Add CpuK1OM.
* i386-opc.h (CpuK1OM): New.
(i386_cpu_flags): Add cpuk1om.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2011-07-22 20:22:38 +00:00
4cb0953da2
Fix rorx in BMI2.
...
gas/testsuite/
2011-06-30 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2011)
* gas/i386/bmi2.s: Correct rorx tests.
* gas/i386/x86-64-bmi2.s: Likewise.
* gas/i386/bmi2-intel.d: Updated.
* gas/i386/bmi2.d: Likewise.
* gas/i386/x86-64-bmi2-intel.d: Likewise.
* gas/i386/x86-64-bmi2.d: Likewise.
opcodes/
2011-06-30 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2011)
* i386-dis.c (vex_len_table): Correct rorxS.
* i386-opc.tbl: Correct rorx.
* i386-tbl.h: Regenerated.
2011-06-30 15:44:55 +00:00
6c30d220f1
Support AVX Programming Reference (June, 2011).
...
gas/
2011-06-10 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2011)
* config/tc-i386.c (i386_error): Add invalid_vsib_address and
unsupported_vector_index_register.
(cpu_arch): Add .avx2, .bmi2, .lzcnt and .invpcid.
(check_VecOperands): New.
(match_template): Call check_VecOperands. Handle
invalid_vsib_address and unsupported_vector_index_register.
(build_modrm_byte): Support VecSIB. Check register-only source
operand when two source operands are swapped.
(i386_index_check): Allow Xmm/Ymm index registers.
* doc/c-i386.texi: Document avx2/.avx2, bmi2/.bmi2, lzcnt/.lzcnt
and invpcid./invpcid.
gas/testsuite/
2011-06-10 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2011)
* gas/i386/arch-10-1.l: Updated.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/arch-10.s: Add LZCNT to comments.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/arch-10-lzcnt.d: New.
* gas/i386/avx-gather-intel.d: Likewise.
* gas/i386/avx-gather.d: Likewise.
* gas/i386/avx-gather.s: Likewise.
* gas/i386/avx2-intel.d: Likewise.
* gas/i386/avx2.d: Likewise.
* gas/i386/avx2.s: Likewise
* gas/i386/avx256int-intel.d: Likewise.
* gas/i386/avx256int.d: Likewise.
* gas/i386/avx256int.s: Likewise.
* gas/i386/bmi2-intel.d: Likewise.
* gas/i386/bmi2.d: Likewise.
* gas/i386/bmi2.s: Likewise.
* gas/i386/inval-invpcid.l:Likewise.
* gas/i386/inval-invpcid.s: Likewise.
* gas/i386/invpcid-intel.d: Likewise.
* gas/i386/invpcid.d: Likewise.
* gas/i386/invpcid.s: Likewise.
* gas/i386/x86-64-arch-2-lzcnt.d: Likewise.
* gas/i386/x86-64-avx-gather-intel.d: Likewise.
* gas/i386/x86-64-avx-gather.d: Likewise.
* gas/i386/x86-64-avx-gather.s: Likewise.
* gas/i386/x86-64-avx2-intel.d: Likewise.
* gas/i386/x86-64-avx2.d: Likewise.
* gas/i386/x86-64-avx2.s: Likewise.
* gas/i386/x86-64-avx256int-intel.d: Likewise.
* gas/i386/x86-64-avx256int.d: Likewise.
* gas/i386/x86-64-avx256int.s: Likewise.
* gas/i386/x86-64-bmi2-intel.d: Likewise.
* gas/i386/x86-64-bmi2.d: Likewise.
* gas/i386/x86-64-bmi2.s: Likewise.
* gas/i386/x86-64-inval-invpcid.l: Likewise.
* gas/i386/x86-64-inval-invpcid.s: Likewise.
* gas/i386/x86-64-invpcid-intel.d: Likewise.
* gas/i386/x86-64-invpcid.d: Likewise.
* gas/i386/x86-64-invpcid.s: Likewise.
opcodes/
2011-06-10 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2011)
* i386-dis.c (XMGatherQ): New.
* i386-dis.c (EXxmm_mb): New.
(EXxmm_mb): Likewise.
(EXxmm_mw): Likewise.
(EXxmm_md): Likewise.
(EXxmm_mq): Likewise.
(EXxmmdw): Likewise.
(EXxmmqd): Likewise.
(VexGatherQ): Likewise.
(MVexVSIBDWpX): Likewise.
(MVexVSIBQWpX): Likewise.
(xmm_mb_mode): Likewise.
(xmm_mw_mode): Likewise.
(xmm_md_mode): Likewise.
(xmm_mq_mode): Likewise.
(xmmdw_mode): Likewise.
(xmmqd_mode): Likewise.
(ymmxmm_mode): Likewise.
(vex_vsib_d_w_dq_mode): Likewise.
(vex_vsib_q_w_dq_mode): Likewise.
(MOD_VEX_0F385A_PREFIX_2): Likewise.
(MOD_VEX_0F388C_PREFIX_2): Likewise.
(MOD_VEX_0F388E_PREFIX_2): Likewise.
(PREFIX_0F3882): Likewise.
(PREFIX_VEX_0F3816): Likewise.
(PREFIX_VEX_0F3836): Likewise.
(PREFIX_VEX_0F3845): Likewise.
(PREFIX_VEX_0F3846): Likewise.
(PREFIX_VEX_0F3847): Likewise.
(PREFIX_VEX_0F3858): Likewise.
(PREFIX_VEX_0F3859): Likewise.
(PREFIX_VEX_0F385A): Likewise.
(PREFIX_VEX_0F3878): Likewise.
(PREFIX_VEX_0F3879): Likewise.
(PREFIX_VEX_0F388C): Likewise.
(PREFIX_VEX_0F388E): Likewise.
(PREFIX_VEX_0F3890..PREFIX_VEX_0F3893): Likewise.
(PREFIX_VEX_0F38F5): Likewise.
(PREFIX_VEX_0F38F6): Likewise.
(PREFIX_VEX_0F3A00): Likewise.
(PREFIX_VEX_0F3A01): Likewise.
(PREFIX_VEX_0F3A02): Likewise.
(PREFIX_VEX_0F3A38): Likewise.
(PREFIX_VEX_0F3A39): Likewise.
(PREFIX_VEX_0F3A46): Likewise.
(PREFIX_VEX_0F3AF0): Likewise.
(VEX_LEN_0F3816_P_2): Likewise.
(VEX_LEN_0F3819_P_2): Likewise.
(VEX_LEN_0F3836_P_2): Likewise.
(VEX_LEN_0F385A_P_2_M_0): Likewise.
(VEX_LEN_0F38F5_P_0): Likewise.
(VEX_LEN_0F38F5_P_1): Likewise.
(VEX_LEN_0F38F5_P_3): Likewise.
(VEX_LEN_0F38F6_P_3): Likewise.
(VEX_LEN_0F38F7_P_1): Likewise.
(VEX_LEN_0F38F7_P_2): Likewise.
(VEX_LEN_0F38F7_P_3): Likewise.
(VEX_LEN_0F3A00_P_2): Likewise.
(VEX_LEN_0F3A01_P_2): Likewise.
(VEX_LEN_0F3A38_P_2): Likewise.
(VEX_LEN_0F3A39_P_2): Likewise.
(VEX_LEN_0F3A46_P_2): Likewise.
(VEX_LEN_0F3AF0_P_3): Likewise.
(VEX_W_0F3816_P_2): Likewise.
(VEX_W_0F3818_P_2): Likewise.
(VEX_W_0F3819_P_2): Likewise.
(VEX_W_0F3836_P_2): Likewise.
(VEX_W_0F3846_P_2): Likewise.
(VEX_W_0F3858_P_2): Likewise.
(VEX_W_0F3859_P_2): Likewise.
(VEX_W_0F385A_P_2_M_0): Likewise.
(VEX_W_0F3878_P_2): Likewise.
(VEX_W_0F3879_P_2): Likewise.
(VEX_W_0F3A00_P_2): Likewise.
(VEX_W_0F3A01_P_2): Likewise.
(VEX_W_0F3A02_P_2): Likewise.
(VEX_W_0F3A38_P_2): Likewise.
(VEX_W_0F3A39_P_2): Likewise.
(VEX_W_0F3A46_P_2): Likewise.
(MOD_VEX_0F3818_PREFIX_2): Removed.
(MOD_VEX_0F3819_PREFIX_2): Likewise.
(VEX_LEN_0F60_P_2..VEX_LEN_0F6D_P_2): Likewise.
(VEX_LEN_0F70_P_1..VEX_LEN_0F76_P_2): Likewise.
(VEX_LEN_0FD1_P_2..VEX_LEN_0FD5_P_2): Likewise.
(VEX_LEN_0FD7_P_2_M_1..VEX_LEN_0F3819_P_2_M_0): Likewise.
(VEX_LEN_0F381C_P_2..VEX_LEN_0F3840_P_2): Likewise.
(VEX_LEN_0F3A0E_P_2): Likewise.
(VEX_LEN_0F3A0F_P_2): Likewise.
(VEX_LEN_0F3A42_P_2): Likewise.
(VEX_LEN_0F3A4C_P_2): Likewise.
(VEX_W_0F3818_P_2_M_0): Likewise.
(VEX_W_0F3819_P_2_M_0): Likewise.
(prefix_table): Updated.
(three_byte_table): Likewise.
(vex_table): Likewise.
(vex_len_table): Likewise.
(vex_w_table): Likewise.
(mod_table): Likewise.
(putop): Handle "LW".
(intel_operand_size): Handle xmm_mb_mode, xmm_mw_mode,
xmm_md_mode, xmm_mq_mode, xmmdw_mode, xmmqd_mode, ymmxmm_mode,
vex_vsib_d_w_dq_mode, vex_vsib_q_w_dq_mode.
(OP_EX): Likewise.
(OP_E_memory): Handle vex_vsib_d_w_dq_mode and
vex_vsib_q_w_dq_mode.
(OP_XMM): Handle vex_vsib_q_w_dq_mode.
(OP_VEX): Likewise.
* i386-gen.c (cpu_flag_init): Add CpuAVX2 to CPU_ANY_SSE_FLAGS
and CPU_ANY_AVX_FLAGS. Add CPU_BMI2_FLAGS, CPU_LZCNT_FLAGS,
CPU_INVPCID_FLAGS and CPU_AVX2_FLAGS.
(cpu_flags): Add CpuAVX2, CpuBMI2, CpuLZCNT and CpuINVPCID.
(opcode_modifiers): Add VecSIB.
* i386-opc.h (CpuAVX2): New.
(CpuBMI2): Likewise.
(CpuLZCNT): Likewise.
(CpuINVPCID): Likewise.
(VecSIB128): Likewise.
(VecSIB256): Likewise.
(VecSIB): Likewise.
(i386_cpu_flags): Add cpuavx2, cpubmi2, cpulzcnt and cpuinvpcid.
(i386_opcode_modifier): Add vecsib.
* i386-opc.tbl: Add invpcid, AVX2 and BMI2 instructions.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2011-06-10 21:27:40 +00:00
752573b292
opcodes/
...
* i386-init.h: Regenerated.
* i386-tbl.h: Regenerated.
2011-01-18 14:14:46 +00:00
f12dc42220
Implement BMI instructions.
2011-01-05 00:16:57 +00:00
553d0a7447
Remove CheckRegSize from movq.
...
2010-10-14 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.tbl: Remove CheckRegSize from movq.
* i386-tbl.h: Regenerated.
2010-10-14 23:16:19 +00:00
cfc08d490e
Remove CheckRegSize from instructions with 0, 1 or fixed operands.
...
2010-10-14 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.tbl: Remove CheckRegSize from instructions with
0, 1 or fixed operands.
* i386-tbl.h: Regenerated.
2010-10-14 21:37:30 +00:00
56ffb74112
Add CheckRegSize to instructions which require register size check.
...
gas/
2010-10-14 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (match_template): Check checkregsize
instead of w for register size check.
gas/testsuite/
2010-10-14 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run inval-reg.
* gas/i386/inval-reg.l: New.
* gas/i386/inval-reg.s: Likewise.
opcodes/
2010-10-14 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Add CheckRegSize.
* i386-opc.h (CheckRegSize): New.
(i386_opcode_modifier): Add checkregsize.
* i386-opc.tbl: Add CheckRegSize to instructions which
require register size check.
* i386-tbl.h: Regenerated.
2010-10-14 18:45:10 +00:00
2210942396
Don't generate multi-byte NOPs for i686.
...
gas/
2010-08-06 Quentin Neill <quentin.neill@amd.com>
* config/tc-i386.c (arch_entry): Add negated bit to
disambiguate flag names starting with "no".
(cpu_arch): Add negated bit definitions. Add
".nop" CPU extension.
(i386_align_code): Use new .cpunop bit to decide
when to generate alignment using nops.
(set_cpu_arch): Use negated bit instead to decide
when to use cpu_flags or vs. cpu_flags_and_not.
(md_parse_option): Likewise.
gas/testsuite/
2010-08-06 Quentin Neill <quentin.neill@amd.com>
* gas/i386/arch-10-1.l: Add nopl instruction.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/arch-10.s: Likewise.
* gas/i386/arch-10.d: Add nopl instruction, and +nopl extension
flag to as flags.
* gas/i386/nops-5-i686.d: Change alignment code generated for
-mtune=i686.
* gas/i386/nops-5.d: Change alignment code generated for
.arch i686.
* gas/i386/x86-64-nops-5-k8.d: Likewise.
* gas/i386/x86-64-nops-5.d: Likewise.
opcodes/
2010-08-06 Quentin Neill <quentin.neill@amd.com>
* i386-gen.c (cpu_flag_init): Define CpuNop extension flag, add
to processor flags for PENTIUMPRO processors and later.
* i386-opc.h (enum): Add CpuNop.
(i386_cpu_flags): Add cpunop bit.
* i386-opc.tbl: Change nop cpu_flags.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2010-08-06 18:22:50 +00:00
92d4d42efb
Add Cpu186 to ud1/ud2/ud2a/ud2b.
...
2010-08-05 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.tbl: Add Cpu186 to ud1/ud2/ud2a/ud2b.
* i386-tbl.h: Regenerated.
2010-08-06 01:03:17 +00:00
b414985b9e
Add ud1 to x86.
...
gas/testsuite/
2010-08-05 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run arch-4.
* gas/i386/arch-4.d: New.
* gas/i386/arch-4.s: Likewise.
* gas/i386/intel.d: Replace ud2a/ud2b with ud2/ud1.
* gas/i386/opcode-intel.d: Likewise.
* gas/i386/opcode-suffix.d: Likewise.
* gas/i386/opcode.d: Likewise.
opcodes/
2010-08-05 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (dis386_twobyte): Replace ud2a/ud2b with ud2/ud1.
* i386-opc.tbl: Add ud1. Remove Cpu686 from ud2/ud2a/ud2b.
* i386-tbl.h: Regenerated.
2010-08-06 00:52:57 +00:00
d7d9a9f820
Replace rdrnd with rdrand.
...
gas/testsuite/
2010-07-05 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2010)
* gas/i386/rdrnd.s: Replace rdrnd with rdrand.
* gas/i386/rdrnd-intel.d: Likewise.
* gas/i386/rdrnd.d: Likewise.
* gas/i386/x86-64-rdrnd-intel.d: Likewise.
* gas/i386/x86-64-rdrnd.d: Likewise.
* gas/i386/x86-64-rdrnd.s: Likewise.
opcodes/
2010-07-05 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2010)
* i386-dis.c (mod_table): Replace rdrnd with rdrand.
* i386-opc.tbl: Likewise.
* i386-tbl.h: Regenerated.
2010-07-05 17:14:22 +00:00
c7b8aa3a72
Support AVX Programming Reference (June, 2010)
...
gas/
2010-07-01 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2010)
* config/tc-i386.c (cpu_arch): Add .xsaveopt, .fsgsbase, .rdrnd
and .f16c.
* doc/c-i386.texi: Document xsaveopt, fsgsbase, rdrnd and f16c.
gas/testsuite/
2010-07-01 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2010)
* gas/i386/arch-10.s: Add xsaveopt.
* gas/i386/x86-64-arch-2.s: Likwise.
* gas/i386/arch-10.d: Updated.
* gas/i386/arch-10-1.l: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
* gas/i386/f16c-intel.d: New.
* gas/i386/f16c.d: Likewise.
* gas/i386/f16c.s: Likewise.
* gas/i386/fsgs-intel.d: Likewise.
* gas/i386/fsgs.d: Likewise.
* gas/i386/fsgs.s: Likewise.
* gas/i386/rdrnd-intel.d: Likewise.
* gas/i386/rdrnd.d: Likewise.
* gas/i386/rdrnd.s: Likewise.
* gas/i386/x86-64-f16c-intel.d: Likewise.
* gas/i386/x86-64-f16c.d: Likewise.
* gas/i386/x86-64-f16c.s: Likewise.
* gas/i386/x86-64-fsgs-intel.d: Likewise.
* gas/i386/x86-64-fsgs.d: Likewise.
* gas/i386/x86-64-fsgs.s: Likewise.
* gas/i386/x86-64-rdrnd-intel.d: Likewise.
* gas/i386/x86-64-rdrnd.d: Likewise.
* gas/i386/x86-64-rdrnd.s: Likewise.
* gas/i386/i386.exp: Run f16c, f16c-intel, fsgs, fsgs-intel,
rdrnd, rdrnd-intel, x86-64-f16c, x86-64-f16c-intel, x86-64-fsgs,
x86-64-fsgs-intel, x86-64-rdrnd, x86-64-rdrnd-intel.
* gas/i386/x86-64-xsave.s: Add tests for xsaveopt64.
* gas/i386/x86-64-xsave-intel.d: Updated.
* gas/i386/x86-64-xsave.d: Likewise.
opcodes/
2010-07-01 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2010)
* i386-dis.c (PREFIX_0FAE_REG_0): New.
(PREFIX_0FAE_REG_1): Likewise.
(PREFIX_0FAE_REG_2): Likewise.
(PREFIX_0FAE_REG_3): Likewise.
(PREFIX_VEX_3813): Likewise.
(PREFIX_VEX_3A1D): Likewise.
(prefix_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3, PREFIX_VEX_3813 and
PREFIX_VEX_3A1D.
(vex_table): Add PREFIX_VEX_3813 and PREFIX_VEX_3A1D.
(mod_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3 xsaveopt and rdrnd.
* i386-gen.c (cpu_flag_init): Add CPU_XSAVEOPT_FLAGS,
CPU_FSGSBASE_FLAGS, CPU_RDRND_FLAGS and CPU_F16C_FLAGS.
(cpu_flags): Add CpuXsaveopt, CpuFSGSBase, CpuRdRnd and CpuF16C.
* i386-opc.h (CpuXsaveopt): New.
(CpuFSGSBase):Likewise.
(CpuRdRnd): Likewise.
(CpuF16C): Likewise.
(i386_cpu_flags): Add cpuxsaveopt, cpufsgsbase, cpurdrnd and
cpuf16c.
* i386-opc.tbl: Add xsaveopt, rdfsbase, rdgsbase, rdrnd,
wrfsbase, wrgsbase, vcvtph2ps and vcvtps2ph.
2010-07-01 21:55:02 +00:00
ce7d077ec0
2010-03-22 Sebastian Pop <sebastian.pop@amd.com>
...
Quentin Neill <quentin.neill@amd.com>
opcodes/
* i386-dis.c (OP_LWP_I): Removed.
(reg_table): Do not use OP_LWP_I, use Iq.
(OP_LWPCB_E): Remove use of names16.
(OP_LWP_E): Same.
* i386-opc.tbl: Removed 16bit LWP insns. 32bit LWP insns
should not set the Vex.length bit.
* i386-tbl.h: Regenerated.
gas/
* testsuite/gas/i386/x86-64-lwp.s: Remove use of 16bit LWP insns.
* testsuite/gas/i386/lwp.s: Same.
* testsuite/gas/i386/x86-64-lwp.d: Updated.
* testsuite/gas/i386/lwp.d: Updated.
2010-03-23 02:56:24 +00:00
a683cc34e4
2010-02-10 Quentin Neill <quentin.neill@amd.com>
...
Sebastian Pop <sebastian.pop@amd.com>
gas:
* config/tc-i386.c (vec_imm4) New operand type.
(fits_in_imm4): New.
(VEX_check_operands): New.
(check_reverse): Call VEX_check_operands.
(build_modrm_byte): Reintroduce code for 5
operand insns. Fix whitespace.
gas/testsuite:
* gas/i386/x86-64-xop.d: Add vpermil2p[sd] tests.
* gas/i386/x86-64-xop.s: Likewise.
* gas/i386/xop.d: Likewise.
* gas/i386/xop.s: Likewise.
opcodes:
* i386-dis.c (OP_EX_VexImmW): Reintroduced
function to handle 5th imm8 operand.
(PREFIX_VEX_3A48): Added.
(PREFIX_VEX_3A49): Added.
(VEX_W_3A48_P_2): Added.
(VEX_W_3A49_P_2): Added.
(prefix table): Added entries for PREFIX_VEX_3A48
and PREFIX_VEX_3A49.
(vex table): Added entries for VEX_W_3A48_P_2 and
and VEX_W_3A49_P_2.
* i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
for Vec_Imm4 operands.
* i386-opc.h (enum): Added Vec_Imm4.
(i386_operand_type): Added vec_imm4.
* i386-opc.tbl: Add entries for vpermilp[ds].
* i386-init.h: Regenerated.
* i386-tbl.h: Regenerated.
2010-02-11 05:06:14 +00:00
712366da0a
Replace "Vex" with "Vex=3" on AVX scalar instructions.
...
2010-01-23 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.h (VEXScalar): New.
* i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
instructions.
* i386-tbl.h: Regenerated.
2010-01-24 00:59:13 +00:00
73bb672904
Add xsave64 and xrstor64.
...
gas/testsuite/
2010-02-21 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/x86-64-xsave.s: Add tests for xsave64 and xrstor64.
* gas/i386/x86-64-xsave-intel.d: Updated.
* gas/i386/x86-64-xsave.d: Likewise.
opcodes/
2010-02-21 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
* i386-opc.tbl: Add xsave64 and xrstor64.
* i386-tbl.h: Regenerated.
2010-01-21 17:30:14 +00:00
a6461c0251
2010-01-15 Sebastian Pop <sebastian.pop@amd.com>
...
gas/
* config/tc-i386.c (md_assemble): Before accessing the IMM field
check that it's not an XOP insn.
gas/testsuite/
* gas/i386/x86-64-xop.d: Add missing patterns.
* gas/i386/x86-64-xop.s: Same.
* gas/i386/xop.d: Same.
* gas/i386/xop.s: Same.
opcodes/
* i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
* i386-tbl.h: Regenerated.
2010-01-15 21:24:13 +00:00
2426c15ff8
Replace VexNDS, VexNDD and VexLWP with VexVVVV.
...
gas/
2009-12-19 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (process_operands): Check vexvvvv instead
of vexnds and vexndd.
(build_modrm_byte): Check vexvvvv instead of vexnds, vexndd
and vexlwp.
opcodes/
2009-12-19 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Remove VexNDS, VexNDD and
VexLWP. Add VexVVVV.
* i386-opc.h (VexNDS): Removed.
(VexNDD): Likewise.
(VexLWP): Likewise.
(VEXXDS): New.
(VEXNDD): Likewise.
(VEXLWP): Likewise.
(VexVVVV): Likewise.
(i386_opcode_modifier): Remove vexnds, vexndd and vexlwp.
Add vexvvvv.
* i386-opc.tbl: Replace VexNDS with VexVVVV=1, VexNDD with
VexVVVV=2 and VexLWP with VexVVVV=3.
* i386-tbl.h: Regenerated.
2009-12-19 18:36:27 +00:00
2eb952a4d9
Remove ByteOkIntel.
...
gas/
2009-12-16 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (process_suffix): Set i.suffix to 0 in
Intel syntax if size is ignored and b/l/w suffixes are
illegal.
(check_byte_reg): Remove byteokintel check.
opcodes/
2009-12-16 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Remove ByteOkIntel.
* i386-opc.h (ByteOkIntel): Removed.
(i386_opcode_modifier): Remove byteokintel.
* i386-opc.tbl: Remove ByteOkIntel.
* i386-tbl.h: Regenerated.
2009-12-16 20:08:32 +00:00
7f399153c6
Replace Vex0F, Vex0F38, Vex0F3A, XOP08, XOP09 and XOP0A with VexOpcode.
...
gas/
2009-12-16 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (build_vex_prefix): Replace vex0f, vex0f38,
vex0f3a, xop08, xop09 and xop0a with vexopcode.
opcodes/
2009-12-16 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Remove Vex0F, Vex0F38,
Vex0F3A, XOP08, XOP09 and XOP0A. Add VexOpcode.
* i386-opc.h (Vex0F): Removed.
(Vex0F38): Likewise.
(Vex0F3A): Likewise.
(VexOpcode): New.
(VEX0F): Likewise.
(VEX0F38): Likewise.
(VEX0F3A): Likewise.
(XOP08): Defined as a macro.
(XOP09): Likewise.
(XOP0A): Likewise.
(i386_opcode_modifier): Remove vex0f, vex0f38, vex0f3a, xop08,
xop09 and xop0a. Add vexopcode.
* i386-opc.tbl: Replace Vex0F with VexOpcode=0, Vex0F38 with
VexOpcode=1, Vex0F3A with VexOpcode=2, XOP08 with VexOpcode=3,
XOP09 with VexOpcode=4 and XOP0A with VexOpcode=5.
* i386-tbl.h: Regenerated.
2009-12-16 15:43:16 +00:00
8cd7925b45
Replace Vex2Sources and Vex3Sources with VexSources.
...
gas/
2009-12-15 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (process_operands): Check vexsources
instead of vex3sources.
(build_modrm_byte): Check vexsources instead of vex2sources
and vex3sources.
opcodes/
2009-12-15 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Remove Vex3Sources and
Vex2Sources. Add VexSources.
* i386-opc.h ()Vex2Sources: Removed.
(Vex3Sources): Likewise.
(VEX2SOURCES): New.
(VEX3SOURCES): Likewise.
(VexSources): Likewise.
(i386_opcode_modifier): Remove vex2sources and vex3sources.
Add vexsources.
* i386-opc.tbl: Replace Vex2Sources with VexSources=1 and
Vex3Sourceswith VexSources=2.
* i386-tbl.h: Regenerated.
2009-12-16 04:00:35 +00:00
1ef99a7be9
Remove VexW0 and VexW1. Add VexW.
...
gas/
2009-12-15 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (build_vex_prefix): Replace vexw0/vexw1
with vexw.
(build_modrm_byte): Likewise.
opcodes/
2009-12-15 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Remove VexW0 and VexW1. Add
VexW.
* i386-opc.h (VexW0): Removed.
(VexW1): Likewise.
(VEXW0): New.
(VEXW1): Likewise.
(VexW): Likewise.
(i386_opcode_modifier): Remove vexw0 and vexw1. Add vexw.
* i386-opc.tbl: Replace VexW0 with VexW=1 and VexW1 with
Vex=2.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2009-12-16 02:10:45 +00:00
9e30b8e093
Add USE_VEX_W_TABLE, VEX_W_TABLE and VEX_W_XXX.
...
2009-12-15 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (USE_VEX_W_TABLE): New.
(VEX_W_TABLE): Likewise.
(VEX_W_XXX): Likewise.
(vex_w_table): Likewise.
(prefix_table): Use VEX_W_XXX.
(vex_table): Likewise.
(vex_len_table): Likewise.
(mod_table): Likewise.
(get_valid_dis386): Handle USE_VEX_W_TABLE.
* i386-opc.tbl: Add VexW0 to AVX instructions where the VEX.W bit
isn't used.
* i386-tbl.h: Regenerated.
2009-12-15 18:56:09 +00:00
eacc9c891d
Support fxsave64 and fxrstor64.
...
gas/testsuite/
2009-12-03 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run x86-64-fxsave and x86-64-fxsave-intel.
* gas/i386/rex.d: Updated for fxsave64.
* gas/i386/x86-64-fxsave-intel.d: New.
* gas/i386/x86-64-fxsave.d: Likewise.
* gas/i386/x86-64-fxsave.s: Likewise.
opcodes/
2009-12-03 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (FXSAVE_Fixup): New.
(FXSAVE): Likewise.
(mod_table): Use FXSAVE on fxsave and fxrstor.
* i386-opc.tbl: Add fxsave64 and fxrstor64.
* i386-tbl.h: Regenerated.
2009-12-04 07:51:41 +00:00
18d0c96eb9
Allow lock on cmpxch16b.
...
gas/testsuite/
2009-11-19 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/lock-1.s: Add cmpxchg16b test.
* gas/i386/lock-1-intel.d: Updated.
* gas/i386/lock-1.d: Likewise.
opcodes/
2009-11-19 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.tbl: Add IsLockable to cmpxch16b.
* i386-tbl.h: Regenerated.
2009-11-19 15:26:42 +00:00
f0ae4a24b0
2009-11-18 Sebastian Pop <sebastian.pop@amd.com>
...
gas/
* config/tc-i386.c (cpu_arch): Remove cvt16.
(md_show_usage): Same.
* doc/c-i386.texi: Same.
gas/testsuite/
* gas/i386/cvt16.d: Removed.
* gas/i386/cvt16.s: Removed.
* gas/i386/x86-64-cvt16.d: Removed.
* gas/i386/x86-64-cvt16.s: Removed.
* gas/i386/i386.exp: Remove cvt16 and x86-64-cvt16 tests.
opcodes/
* i386-dis.c (VEX_LEN_XOP_08_A0): Removed.
(VEX_LEN_XOP_08_A1): Removed.
(xop_table): Remove entries for VEX_LEN_XOP_08_A0 and
VEX_LEN_XOP_08_A1.
(vex_len_table): Same.
* i386-gen.c (CPU_CVT16_FLAGS): Removed.
(cpu_flags): Remove field for CpuCVT16.
* i386-opc.h (CpuCVT16): Removed.
(i386_cpu_flags): Remove bitfield cpucvt16.
(i386-opc.tbl): Remove CVT16 instructions.
* i386-init.h: Regenerated.
* i386-tbl.h: Regenerated.
2009-11-18 20:28:59 +00:00
5dd85c9970
2009-11-17 Sebastian Pop <sebastian.pop@amd.com>
...
Quentin Neill <quentin.neill@amd.com>
gas/
* config/tc-i386.c (cpu_arch): Added .xop and .cvt16.
(build_vex_prefix): Handle xop08.
(md_assemble): Don't special case the constant 3 for insns using MODRM.
(build_modrm_byte): Handle vex2sources.
(md_show_usage): Add xop and cvt16.
* doc/c-i386.texi: Document fma4, xop, and cvt16.
gas/testsuite/
* gas/i386/i386.exp: Run xop and cvt16 in 32-bit mode.
Run x86-64-xop and x86-64-cvt16 in 64-bit mode.
* gas/i386/lwp.d: Update name of the testcase.
* gas/i386/x86-64-xop.d: New.
* gas/i386/x86-64-xop.s: New.
* gas/i386/xop.d: New.
* gas/i386/xop.s: New.
* gas/i386/cvt16.d: New.
* gas/i386/cvt16.s: New.
opcodes/
* i386-dis.c (OP_Vex_2src_1): New.
(OP_Vex_2src_2): New.
(Vex_2src_1): New.
(Vex_2src_2): New.
(XOP_08): Added.
(VEX_LEN_XOP_08_A0): Added.
(VEX_LEN_XOP_08_A1): Added.
(VEX_LEN_XOP_09_80): Added.
(VEX_LEN_XOP_09_81): Added.
(xop_table): Added an entry for XOP_08. Handle xop instructions.
(vex_len_table): Added entries for VEX_LEN_XOP_08_A0,
VEX_LEN_XOP_08_A1, VEX_LEN_XOP_09_80, VEX_LEN_XOP_09_81.
(get_valid_dis386): Handle XOP_08.
(OP_Vex_2src): New.
* i386-gen.c (cpu_flag_init): Add CPU_XOP_FLAGS and CPU_CVT16_FLAGS.
(cpu_flags): Add CpuXOP and CpuCVT16.
(opcode_modifiers): Add XOP08, Vex2Sources.
* i386-opc.h (CpuXOP): Added.
(CpuCVT16): Added.
(i386_cpu_flags): Add cpuxop and cpucvt16.
(XOP08): Added.
(Vex2Sources): Added.
(i386_opcode_modifier): Add xop08, vex2sources.
* i386-opc.tbl: Add entries for XOP and CVT16 instructions.
* i386-init.h: Regenerated.
* i386-tbl.h: Regenerated.
2009-11-18 04:04:17 +00:00
20efc68957
2009-11-12 H.J. Lu <hongjiu.lu@intel.com>
...
* i386-opc.tbl: Remove IsLockable from add, adc, and, dec, inc,
or, sbb, sub, xor and xchg with register only operands.
* i386-tbl.h: Regenerated.
2009-11-12 19:15:18 +00:00
c32fa91d70
gas/
...
2009-11-12 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (LOCKREP_PREFIX): Removed.
(REP_PREFIX): New.
(LOCK_PREFIX): Likewise.
(PREFIX_GROUP): Likewise.
(REX_PREFIX): Updated.
(MAX_PREFIXES): Likewise.
(add_prefix): Updated. Return enum PREFIX_GROUP.
(md_assemble): Check for lock without a lockable instruction.
(parse_insn): Updated.
(output_insn): Likewise.
gas/testsuite/
2009-11-12 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run lock-1, lock-1-intel, lockbad-1,
x86-64-lock-1, x86-64-lock-1-intel and x86-64-lockbad-1.
* gas/i386/lock-1-intel.d: New.
* gas/i386/lock-1.d: Likewise.
* gas/i386/lock-1.s: Likewise.
* gas/i386/lockbad-1.l: Likewise.
* gas/i386/lockbad-1.s: Likewise.
* gas/i386/x86-64-lock-1-intel.d: Likewise.
* gas/i386/x86-64-lock-1.d: Likewise.
* gas/i386/x86-64-lock-1.s: Likewise.
* gas/i386/x86-64-lockbad-1.l: Likewise.
* gas/i386/x86-64-lockbad-1.s: Likewise.
opcodes/
2009-11-12 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Add IsLockable.
* i386-opc.h (IsLockable): New.
(i386_opcode_modifier): Add islockable.
* i386-opc.tbl: Add IsLockable to add, adc, and, btc, btr,
bts, cmpxchg, cmpxch8b, dec, inc, neg, not, or, sbb, sub,
xor, xadd and xchg.
* i386-tbl.h: Regenerated.
2009-11-12 18:57:14 +00:00
f88c9eb030
2009-11-05 Sebastian Pop <sebastian.pop@amd.com>
...
Quentin Neill <quentin.neill@amd.com>
* gas/config/tc-i386.c (cpu_arch): Add CPU_LWP_FLAGS.
(build_vex_prefix): Handle xop09 and xop0a.
(build_modrm_byte): Handle vexlwp.
(md_show_usage): Add lwp.
* gas/doc/c-i386.texi (i386-LWP): New section.
* gas/testsuite/gas/i386/i386.exp: Run x86-64-lwp in 64-bit mode,
run lwp in 32-bit mode.
* gas/testsuite/gas/i386/x86-64-lwp.d: New.
* gas/testsuite/gas/i386/x86-64-lwp.s: New.
* gas/testsuite/gas/i386/lwp.d: New.
* gas/testsuite/gas/i386/lwp.s: New.
* opcodes/i386-dis.c (OP_LWPCB_E): New.
(OP_LWP_E): New.
(OP_LWP_I): New.
(USE_XOP_8F_TABLE): New.
(XOP_8F_TABLE): New.
(REG_XOP_LWPCB): New.
(REG_XOP_LWP): New.
(XOP_09): New.
(XOP_0A): New.
(reg_table): Redirect REG_8F to XOP_8F_TABLE.
Add entries for REG_XOP_LWPCB and REG_XOP_LWP.
(xop_table): New.
(get_valid_dis386): Handle USE_XOP_8F_TABLE.
Use the offsets VEX_0F, VEX_0F38, and VEX_0F3A instead of their values
to access to the vex_table.
(OP_LWPCB_E): New.
(OP_LWP_E): New.
(OP_LWP_I): New.
* opcodes/i386-gen.c (cpu_flag_init): Add CPU_LWP_FLAGS, CpuLWP.
(cpu_flags): Add CpuLWP.
(opcode_modifiers): Add VexLWP, XOP09, and XOP0A.
* opcodes/i386-opc.h (CpuLWP): New.
(i386_cpu_flags): Add bit cpulwp.
(VexLWP): New.
(XOP09): New.
(XOP0A): New.
(i386_opcode_modifier): Add vexlwp, xop09, and xop0a.
* opcodes/i386-opc.tbl (llwpcb): Added.
(lwpval): Added.
(lwpins): Added.
2009-11-05 23:40:05 +00:00
f98fa53424
2009-10-02 H.J. Lu <hongjiu.lu@intel.com>
...
* i386-opc.tbl: Drop Disp64 on jump and loop instructions.
* i386-tbl.h: Regenerated.
2009-10-02 19:03:40 +00:00
2bf05e5730
gas/
...
2009-09-24 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (build_vex_prefix): Check vex == 2 instead
of vex256.
opcodes/
2009-09-24 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Remove Vex256.
(set_bitfield): Handle XXX=V.
* i386-opc.h (Vex): Update comments.
(Vex256): Removed.
(VexNDS): Updated.
(i386_opcode_modifier): Change vex to 2 bits. Remove vex256.
* i386-opc.tbl: Replace "Vex|Vex256" with Vex=2.
* i386-tbl.h: Regenerated.
2009-09-24 16:37:09 +00:00
d3ce72d070
Updated sources to avoid using the identifier name "new", which is a
...
keyword in c++.
* bfd/aoutx.h (NAME (aout, make_empty_symbol)): Rename variable
new to new_symbol.
* bfd/coffgen.c (coff_make_empty_symbol)
(coff_bfd_make_debug_symbol): Rename variable new to new_symbol.
* bfd/cpu-ia64-opc.c (ext_reg, ins_imms_scaled): Rename variable
new to new_insn.
* bfd/doc/chew.c (newentry, add_intrinsic): Rename variable new to
new_d.
* bfd/ecoff.c (_bfd_ecoff_make_empty_symbol): Rename variable new
to new_symbol.
* bfd/elf32-m68k.c (elf_m68k_get_got_entry_type): Rename argument
new to new_reloc.
* bfd/hash.c (bfd_hash_lookup): Rename variable new to new_string.
* bfd/ieee.c (ieee_make_empty_symbol): Rename variable new to
new_symbol.
* bfd/linker.c (bfd_new_link_order): Rename variable new to
new_lo.
* bfd/mach-o.c (bfd_mach_o_sizeof_headers): Rename variable new to
symbol.
* bfd/oasys.c (oasys_make_empty_symbol): Rename variable new to
new_symbol_type.
* bfd/pdp11.c (NAME (aout, make_empty_symbol)): Rename variable
new to new_symbol_type.
* bfd/plugin.c (bfd_plugin_make_empty_symbol): Rename variable new
to new_symbol.
* bfd/rs6000-core.c (CoreHdr, VmInfo): Rename union member new to
new_dump.
(read_hdr, rs6000coff_core_p)
(rs6000coff_core_file_matches_executable_p)
(rs6000coff_core_file_failing_command)
(rs6000coff_core_file_failing_signal): Updated function to use new
union member name.
* bfd/som.c (som_make_empty_symbol): Rename variable new to
new_symbol_type.
* bfd/syms.c (_bfd_generic_make_empty_symbol): Rename variable new
to new_symbol.
* bfd/tekhex.c (first_phase, tekhex_make_empty_symbol): Rename
variable new to new_symbol.
* binutils/nlmconv.c (main): Rename variable new to new_name.
* gas/config/tc-arm.c (insert_reg_alias): Rename variable new to
new_reg.
* gas/config/tc-dlx.c (parse_operand): Rename variable new to
new_pos.
* gas/config/tc-ia64.c (ia64_gen_real_reloc_type): Rename variable
new to newr.
* gas/config/tc-mcore.c (parse_exp, parse_imm): Rename variable
new to new_pointer.
* gas/config/tc-microblaze.c (parse_exp, parse_imm, check_got):
Change name from new to new_pointer.
* gas/config/tc-or32.c (parse_operand): Rename variable new to
new_pointer.
* gas/config/tc-pdp11.c (md_assemble): Rename variable new to
new_pointer.
* gas/config/tc-pj.c (alias): Change argument new to new_name.
* gas/config/tc-score.c (s3_build_score_ops_hsh): Rename variable
new to new_opcode. (s3_build_dependency_insn_hsh) Rename variable
new to new_i2n. (s3_convert): Rename variables old and new to
r_old and r_new.
* gas/config/tc-score7.c (s7_build_score_ops_hsh): Rename variable
new to new_opcode. (s7_build_dependency_insn_hsh): Rename variable
new to new_i2d. (s7_b32_relax_to_b16, s7_convert_frag): Rename
variables old and new to r_old and r_new.
* gas/config/tc-sh.c (parse_exp): Rename variable new to
new_pointer.
* gas/config/tc-sh64.c (shmedia_parse_exp): Rename variable new to
new_pointer.
* gas/config/tc-tic4x.c (tic4x_operand_parse): Rename variable new
to new_pointer.
* gas/config/tc-z8k.c (parse_exp): Rename variable new to
new_pointer.
* gas/listing.c (listing_newline): Rename variable new to new_i.
* ld/ldexp.c (exp_intop, exp_bigintop, exp_relop, exp_binop)
(exp_trinop, exp_unop, exp_nameop, exp_assop): Rename variable new
to new_e.
* ld/ldfile.c (ldfile_add_library_path): Rename variable new to
new_dirs. (ldfile_add_arch): Rename variable new to new_arch.
* ld/ldlang.c (new_statement, lang_final, lang_add_wild)
(lang_target, lang_add_fill, lang_add_data, lang_add_assignment)
(lang_add_insert): Rename variable new to new_stmt. (new_afile):
Added missing cast. (lang_memory_region_lookup): Rename variable
new to new_region. (init_os): Rename variable new to
new_userdata. (lang_add_section): Rename variable new to
new_section. (ldlang_add_undef): Rename variable new to
new_undef. (realsymbol): Rename variable new to new_name.
* opcodes/z8kgen.c (internal, gas): Rename variable new to new_op.
Updated sources to avoid using the identifier name "template",
which is a keyword in c++.
* bfd/elf32-arm.c (struct stub_def): Rename member template to
template_sequence. (arm_build_one_stub,
find_stub_size_and_template, arm_size_one_stub, arm_map_one_stub):
Rename variable template to template_sequence.
* bfd/elfxx-ia64.c (elfNN_ia64_relax_br, elfNN_ia64_relax_brl):
Rename variable template to template_val.
* gas/config/tc-arm.c (struct asm_cond, struct asm_psr, struct
asm_barrier_opt): Change member template to
template_name. (md_begin): Update code to reflect new member
names.
* gas/config/tc-i386.c (struct templates, struct _i386_insn)
(match_template, cpu_flags_match, match_reg_size, match_mem_size)
(operand_size_match, md_begin, i386_print_statistics, pi)
(build_vex_prefix, md_assemble, parse_insn, optimize_imm)
(optimize_disp): Updated code to use new names. (parse_insn):
Added casts.
* gas/config/tc-ia64.c (dot_template, emit_one_bundle): Updated
code to use new names.
* gas/config/tc-score.c (struct s3_asm_opcode): Renamed member
template to template_name. (s3_parse_16_32_inst, s3_parse_48_inst,
s3_do_macro_ldst_label, s3_build_score_ops_hsh): Update code to
use new names.
* gas/config/tc-score7.c (struct s7_asm_opcode): Renamed member
template to template_name. (s7_parse_16_32_inst,
s7_do_macro_ldst_label, s7_build_score_ops_hsh): Update code to
use new names.
* gas/config/tc-tic30.c (md_begin, struct tic30_insn)
(md_assemble): Update code to use new names.
* gas/config/tc-tic54x.c (struct _tic54x_insn, md_begin)
(optimize_insn, tic54x_parse_insn, next_line_shows_parallel):
Update code to use new names.
* include/opcode/tic30.h (template): Rename type template to
insn_template. Updated code to use new name.
* include/opcode/tic54x.h (template): Rename type template to
insn_template.
* opcodes/cris-dis.c (bytes_to_skip): Update code to use new name.
* opcodes/i386-dis.c (putop): Update code to use new name.
* opcodes/i386-gen.c (process_i386_opcodes): Update code to use
new name.
* opcodes/i386-opc.h (struct template): Rename struct template to
insn_template. Update code accordingly.
* opcodes/i386-tbl.h (i386_optab): Update type to use new name.
* opcodes/ia64-dis.c (print_insn_ia64): Rename variable template
to template_val.
* opcodes/tic30-dis.c (struct instruction, get_tic30_instruction):
Update code to use new name.
* opcodes/tic54x-dis.c (has_lkaddr, get_insn_size)
(print_parallel_instruction, print_insn_tic54x, tic54x_get_insn):
Update code to use new name.
* opcodes/tic54x-opc.c (tic54x_unknown_opcode, tic54x_optab):
Update type to new name.
2009-08-29 22:11:02 +00:00
8a9036a406
bfd/
...
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* archures.c (bfd_architecture): Add bfd_arch_l1om.
(bfd_l1om_arch): New.
(bfd_archures_list): Add &bfd_l1om_arch.
* bfd-in2.h: Regenerated.
* config.bfd (targ64_selvecs): Add bfd_elf64_l1om_vec if
bfd_elf64_x86_64_vec is supported. Add bfd_elf64_l1om_freebsd_vec
if bfd_elf64_x86_64_freebsd_vec is supported.
(targ_selvecs): Likewise.
* configure.in: Support bfd_elf64_l1om_vec and
bfd_elf64_l1om_freebsd_vec.
* configure: Regenerated.
* cpu-l1om.c: New.
* elf64-x86-64.c (elf64_l1om_elf_object_p): New.
(bfd_elf64_l1om_vec): Likewise.
(bfd_elf64_l1om_freebsd_vec): Likewise.
* Makefile.am (ALL_MACHINES): Add cpu-l1om.lo.
(ALL_MACHINES_CFILES): Add cpu-l1om.c.
* Makefile.in: Regenerated.
* targets.c (bfd_elf64_l1om_vec): New.
(bfd_elf64_l1om_freebsd_vec): Likewise.
(_bfd_target_vector): Add bfd_elf64_l1om_vec and
bfd_elf64_l1om_freebsd_vec.
binutils/
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* readelf.c (guess_is_rela): Handle EM_L1OM.
(dump_relocations): Likewise.
(get_machine_name): Likewise.
(get_section_type_name): Likewise.
(get_elf_section_flags): Likewise.
(get_symbol_index_type): Likewise.
(is_32bit_abs_reloc): Likewise.
(is_32bit_pcrel_reloc): Likewise.
(is_64bit_abs_reloc): Likewise.
(is_64bit_pcrel_reloc): Likewise.
(is_none_reloc): Likewise.
gas/
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (cpu_arch): Add l1om.
(check_cpu_arch_compatible): New.
(set_cpu_arch): Use it.
(i386_arch): New.
(i386_mach): Return bfd_mach_l1om for Intel L1OM.
(md_show_usage): Display l1om.
(i386_target_format): Return ELF_TARGET_L1OM_FORMAT if
cpu_arch_isa_flags.bitfield.cpul1om is set.
* config/tc-i386.h (TARGET_ARCH): Use (i386_arch ()).
(i386_arch): New.
(ELF_TARGET_L1OM_FORMAT): Likewise.
* doc/c-i386.texi: Document l1om.
gas/testsuite/
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/l1om.d: New.
* gas/i386/l1om-inval.l: Likewise.
* gas/i386/l1om-inval.s: Likewise.
* gas/i386/i386.exp: Run l1om-inval and l1om.
include/elf/
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* common.h (EM_L1OM): New.
ld/
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* configure.tgt (targ64_extra_emuls): Add elf_l1om if elf_x86_64
is supported. Add elf_l1om_fbsd if elf_x86_64_fbsd is supported.
(targ_extra_emuls): Likewise.
* Makefile.am (ALL_64_EMULATIONS): Add eelf_l1om.o and
eelf_l1om_fbsd.o
(eelf_l1om.c): New.
(eelf_l1om_fbsd.c): Likewise.
* Makefile.in: Regenerated.
* emulparams/elf_l1om.sh: New.
* emulparams/elf_l1om_fbsd.sh: Likewise.
ld/testsuite/
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* ld-x86-64/abs-l1om.d: New.
* ld-x86-64/protected2-l1om.d: Likewise.
* ld-x86-64/protected3-l1om.d: Likewise.
* ld-x86-64/x86-64.exp: Run abs-l1om, protected2-l1om and
protected3-l1om.
opcodes/
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* configure.in: Handle bfd_l1om_arch.
* disassemble.c (disassembler): Likewise.
* configure: Regenerated.
* i386-dis.c (print_insn): Handle bfd_mach_l1om and
bfd_mach_l1om_intel_syntax. Use 8 bytes per line for Intel L1OM.
* i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~CpuL1OM.
Add CPU_L1OM_FLAGS.
(cpu_flags): Add CpuL1OM.
(set_bitfield): Take an argument to set the value field.
(process_i386_cpu_flag): Support ~CpuXXX and ~(CpuXXX|CpuYYY).
(process_i386_opcode_modifier): Updated.
(process_i386_operand_type): Likewise.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
* i386-opc.h (CpuL1OM): New.
(CpuXsave): Updated.
(i386_cpu_flags): Add cpul1om.
2009-07-25 14:58:58 +00:00
309d33736f
gas/
...
2009-07-24 Jan Beulich <jbeulich@novell.com>
* tc-i386.c (cpu_arch): Add .8087, .287, .387, .no87, .nommx,
.nosse, and .noavx.
(cpu_flags_and_not): New.
(set_cpu_arch): Check whether sub-architecture specified is a
feature disable.
(md_parse_option): Likewise.
(parse_real_register): Don't return floating point register
when x87 functionality is disabled.
(md_show_usage): Add new sub-options.
* doc/c-i386.texi: Update with new command line sub-options.
gas/testsuite/
2009-07-24 Jan Beulich <jbeulich@novell.com>
* gas/i386/8087.[ds]: New.
* gas/i386/287.[ds]: New.
* gas/i386/387.[ds]: New.
* gas/i386/no87.[ls]: New.
* gas/i386/no87-2.[ls]: New.
* gas/i386/i386.exp: Run new tests.
* gas/i386/att-regs.s: Also check FPU register access.
* gas/i386/intel-regs.s: Likewise.
* gas/i386/att-regs.d: Adjust expectations.
* gas/i386/intel-regs.d: Likewise.
opcodes/
2009-07-24 Jan Beulich <jbeulich@novell.com>
* i386-dis.c (fgrps): Correct annotation for feni/fdisi. Add
frstpm.
* i386-gen.c (cpu_flag_init): Add FP enabling flags where needed.
(cpu_flags): Add Cpu8087, Cpu287, Cpu387, Cpu687, and CpuFISTTP.
(set_bitfield): Expand CpuFP to Cpu8087|Cpu287|Cpu387.
* i386-opc.h (Cpu8087, Cpu287, Cpu387, Cpu687, CpuFISTTP):
Define.
(union i386_cpu_flags): Add cpu8087, cpu287, cpu387, cpu687,
and cpufisttp.
* i386-opc.tbl: Qualify floating point instructions by their
respective CpuXXX flag. Fix fucom{,p,pp}, fprem1, fsin, fcos,
and fsincos to be avilable only on 387. Fix fstsw ax to be
available only on 287+. Add f{,n}eni, f{,n}disi, f{,n}setpm,
and frstpm.
* i386-init.h, i386-tbl.h: Regenerate.
2009-07-24 15:41:20 +00:00
922d8de8c1
<gas changes>
...
2009-07-06 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
* config/tc-i386.c (cpu_arch): Add .fma4 and CPU_FMA4_FLAGS.
(build_modrm_byte): Add support to handle FMA4 instructions.
(md_show_usage): Add fma4.
<gas/testsuite changes>
2009-07-06 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
* gas/i386/i386.exp: Add FMA4 tests.
* gas/i386/x86-64-fma4.d: Ditto.
* gas/i386/fma4.d: Ditto.
* gas/i386/x86-64-fma4.s: Ditto.
* gas/i386/fma4.s: Ditto.
<opcodes changes>
2009-07-06 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
* i386-opc.h (CpuFMA4): Add CpuFMA4.
(i386_cpu_flags): New.
* i386-gen.c: Add CPU_FMA4_FLAGS.
* i386-opc.tbl: Add FMA4 instructions.
* i386-tbl.h: Regenerate.
* i386-init.h: Regenerate.
* i386-dis.c (OP_VEX_FMA): New. Handle FMA4.
(OP_XMM_VexW): Ditto.
(OP_EX_VexW): Ditto.
(VEXI4_Fixup): Ditto.
(VexI4, VexFMA, Vex128FMA, EXVexW, EXdVexW, XMVexW): New Macros.
(PREFIX_VEX_3A5C, PREFIX_VEX_3A5D, PREFIX_VEX_3A5E): New.
(PREFIX_VEX_3A5F, PREFIX_VEX_3A60): New.
(PREFIX_VEX_3A68, PREFIX_VEX_3A69, PREFIX_VEX_3A6A): New.
(PREFIX_VEX_3A6B, PREFIX_VEX_3A6C, PREFIX_VEX_3A6D): New.
(PREFIX_VEX_3A6E, PREFIX_VEX_3A6F, PREFIX_VEX_3A7A): New.
(PREFIX_VEX_3A7B, PREFIX_VEX_3A7C, PREFIX_VEX_3A7D): New.
(PREFIX_VEX_3A7E, PREFIX_VEX_3A7F): New.
(VEX_LEN_3A6A_P_2,VEX_LEN_3A6B_P_2, VEX_LEN_3A6E_P_2): New.
(VEX_LEN_3A6F_P_2,VEX_LEN_3A7A_P_2, VEX_LEN_3A7B_P_2): New.
(VEX_LEN_3A7E_P_2,VEX_LEN_3A7F_P_2): New.
(get_vex_imm8): New. handle FMA4.
(OP_EX_VexReg): Ditto.
2009-07-06 19:34:30 +00:00
c1e679ec0a
<gas changes>
...
2009-05-22 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
* config/tc-i386.c (process_drex): Delete. Remove SSE5 support.
(build_modrm_byte): Remove DREX handling support.
(DREX_*): Delete.
(drex_byte): Delete.
(md_assemble): Remove DREX handling support.
(process_operands): Remove DREX, SSE5 support.
(i386_insn): Remove DREX.
<gas/testsuite changes>
2009-05-22 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
* gas/i386/i386.exp: Remove SSE5 tests.
* gas/i386/x86-64-sse5.s: Delete. Remove SSE5 tests.
* gas/i386/x86-64-sse5.d: Ditto.
* gas/i386/arch-10-1.l: Remove SSE5 tests.
* gas/i386/arch-10-2.l: Ditto.
* gas/i386/arch-10-3.l: Ditto.
* gas/i386/arch-10-4.l: Ditto.
* gas/i386/arch-10.d: Ditto.
* gas/i386/arch-10.s: Ditto.
* gas/i386/arch-4.s: Delete. Remove SSE5 tests.
* gas/i386/arch-4.d: Ditto.
* gas/i386/arch-8.s: Ditto.
* gas/i386/arch-8.d: Ditto.
* gas/i386/arch-2.s: Remove SSE5 tests.
* gas/i386/arch-2.d: Remove SSE5 tests.
* gas/i386/x86-64-arch-2.s: Ditto.
<opcodes changes>
2009-05-22 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
* i386-opc.h (Cpusse5): Delete.
(i386_cpu_flags): Delete.
* i386-gen.c: Remove CpuSSE5, Drex, Drexv and Drexc.
* i386-opc.tbl: Remove SSE5 instructions.
* i386-tbl.h: Regenerate.
* i386-init.h: Regenerate.
* i386-dis.c (OP_E_memeory, OP_E_extended): Remove drex handling.
(print_drex_arg): Delete.
(OP_DREX4): Delete.
(OP_DREX3): Delete.
(OP_DREX_ICMP): Delete.
(OP_DREX_FCMP): Delete.
(DREX_*): Delete.
(THREE_BYTE_0F24, THREE_BYTE_0F25, THREE_BYTE_0f7B): Delete.
2009-05-22 15:57:25 +00:00
ac5c19e6ba
gas/testsuite/
...
2009-04-15 Jan Beulich <jbeulich@novell.com>
* gas/i386/x86-64-sse5.s: Add test of protd.
* gas/i386/x86-64-sse5.d: Adjust expectations to match input.
opcodes/
2009-04-15 Jan Beulich <jbeulich@novell.com>
* i386-opc.tbl (protb, protw, protd, protq): Set opcode
extension to None.
(pshab, pshaw, pshad, pshaq): Likewise.
* i386-tbl.h: Re-generate.
2009-04-15 13:31:28 +00:00
4c664d7bf7
gas/
...
2009-02-23 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (vex_imm4): Removed.
(VEX_check_operands): Likewise.
(match_template): Updated.
opcodes/
2009-02-23 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (operand_type_init): Remove OPERAND_TYPE_VEX_IMM4.
(operand_types): Remove Vex_Imm4.
* i386-opc.h (Vex_Imm4): Removed.
(OTMax): Updated.
(i386_operand_type): Remove vex_imm4.
* i386-opc.tbl: Remove Vex_Imm4 comments.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2009-02-23 20:41:46 +00:00
ce2f5b3ce7
gas/
...
2009-02-04 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (January, 2009)
* config/tc-i386.c (CPU_FLAGS_PCLMUL_MATCH): New.
(CPU_FLAGS_AVX_MATCH): Updated.
(CPU_FLAGS_32BIT_MATCH): Likewise.
(cpu_flags_match): Likewise.
gas/testsuite/
2009-02-04 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (January, 2009)
* gas/i386/arch-avx-1-3.l: New.
* gas/i386/arch-avx-1-3.s: Likewise.
* gas/i386/arch-avx-1-4.l: Likewise.
* gas/i386/arch-avx-1-4.s: Likewise.
* gas/i386/arch-avx-1-5.l: Likewise.
* gas/i386/arch-avx-1-5.s: Likewise.
* gas/i386/arch-avx-1-6.l: Likewise.
* gas/i386/arch-avx-1-6.s: Likewise.
* gas/i386/arch-10.s: Add vpclmul instructions.
* gas/i386/arch-avx-1.s: Likewise.
* gas/i386/avx.s: Likewise.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/x86-64-avx.s: Likewise.
* gas/i386/sse2avx.s: Add pclmul instructions.
* gas/i386/x86-64-sse2avx.s: Likewise.
* gas/i386/arch-10.d: Updated.
* gas/i386/arch-10-1.l: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/arch-avx-1.d: Likewise.
* gas/i386/arch-avx-1-1.l: Likewise.
* gas/i386/arch-avx-1-2.l: Likewise.
* gas/i386/avx.d: Likewise.
* gas/i386/avx-intel.d: Likewise.
* gas/i386/sse2avx.d: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
* gas/i386/x86-64-avx.d: Likewise.
* gas/i386/x86-64-avx-intel.d: Likewise.
* gas/i386/x86-64-sse2avx.d: Likewise.
* gas/i386/i386.exp: Run arch-avx-1-3, arch-avx-1-4,
arch-avx-1-5 and arch-avx-1-6.
opcodes/
2009-02-04 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (January, 2009)
* i386-dis.c (PREFIX_VEX_3A44): New.
(VEX_LEN_3A44_P_2): Likewise.
(PREFIX_VEX_3A48): Updated.
(VEX_LEN_3A4C_P_2): Likewise.
(prefix_table): Add PREFIX_VEX_3A44.
(vex_table): Likewise.
(vex_len_table): Add VEX_LEN_3A44_P_2.
* i386-opc.tbl: Add PCLMUL + AVX instructions.
* i386-tbl.h: Regenerated.
2009-02-04 16:03:31 +00:00
c1ec187589
gas/testsuite/
...
2009-01-12 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/sse-noavx.s: Add tests for lfence, mfence and movnti.
* gas/i386/x86-64-sse-noavx.s: Likewise.
* gas/i386/sse-noavx.d: Updated.
* gas/i386/x86-64-sse-noavx.d: Likewise.
opcodes/
2009-01-12 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.tbl: Add NoAVX to movnti, lfence and mfence.
* i386-tbl.h: Regenerated.
2009-01-13 00:00:35 +00:00
bd5295b282
gas/
...
2009-01-10 H.J. Lu <hongjiu.lu@intel.com>
* gas/config/tc-i386.c (cpu_arch): Add corei7, .clflush and
.syscall.
(i386_align_code): Handle PROCESSOR_COREI7.
(md_show_usage): Add corei7, clflush and syscall.
(i386_target_format): Replace cpup4 with cpuclflush.
* gas/config/tc-i386.h (processor_type): Add PROCESSOR_COREI7.
* doc/c-i386.texi: Document corei7, clflush and syscall.
gas/testsuite/
2009-01-10 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/arch-10.s: Add clflush and syscall.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/arch-10.d: Updated.
* gas/i386/arch-10-1.l: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
opcodes/
2009-01-10 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (cpu_flag_init): Replace CpuP4 and CpuK6 with
CpuClflush and CpuSYSCALL, respectively. Remove CpuK8. Add
CPU_COREI7_FLAGS, CPU_CLFLUSH_FLAGS and CPU_SYSCALL_FLAGS.
(cpu_flags): Remove CpuP4, CpuK6 and CpuK8. Add CpuClflush
and CpuSYSCALL.
(lineno): Removed.
(set_bitfield): Take an argument, lineno. Don't report lineno
on error if it is -1.
(process_i386_cpu_flag): Take an argument, lineno.
(process_i386_opcode_modifier): Likewise.
(process_i386_operand_type): Likewise.
(output_i386_opcode): Likewise.
(opcode_hash_entry): Add lineno.
(process_i386_opcodes): Updated.
(process_i386_registers): Likewise.
(process_i386_initializers): Likewise.
* i386-opc.h (CpuP4): Removed.
(CpuK6): Likewise.
(CpuK8): Likewise.
(CpuClflush): New.
(CpuSYSCALL): Likewise.
(CpuMMX): Updated.
(i386_cpu_flags): Remove cpup4, cpuk6 and cpuk8. Add
cpuclflush and cpusyscall.
* i386-opc.tbl: Update movnti, clflush, lfence, mfence, pause,
syscall and sysret.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2009-01-10 17:25:52 +00:00
1b7f3fb0dd
gas/
...
2009-01-09 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (cpu_arch): Add .rdtscp.
(md_show_usage): Display rdtscp.
* doc/c-i386.texi: Document rdtscp.
gas/testsuite/
2009-01-09 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/arch-10.s: Add rdtscp.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/arch-10.d: Updated.
* gas/i386/arch-10-1.l: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
opcodes/
2009-01-09 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (cpu_flag_init): Add CpuRdtscp to CPU_K8_FLAGS
and CPU_AMDFAM10_FLAGS. Add CPU_RDTSCP_FLAGS.
(cpu_flags): Add CpuRdtscp.
(set_bitfield): Remove CpuSledgehammer check.
* i386-opc.h (CpuRdtscp): New.
(CpuLM): Updated.
(i386_cpu_flags): Add cpurdtscp.
* i386-opc.tbl: Replace CpuSledgehammer with CpuRdtscp.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2009-01-09 20:32:32 +00:00
168e309712
gas/testsuite/
...
2009-01-06 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (December, 2008)
* gas/i386/avx.s: Add tests for 256bit vmovntdq, vmovntpd and
vmovntps.
* gas/i386/x86-64-avx.s: Likewise.
* gas/i386/avx.d: Updated.
* gas/i386/avx-intel.d: Likewise.
* gas/i386/x86-64-avx.d: Likewise.
* gas/i386/x86-64-avx-intel.d: Likewise.
opcodes/
2009-01-06 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (December, 2008)
* i386-dis.c (VEX_LEN_2B_M_0): Removed.
(VEX_LEN_E7_P_2_M_0): Likewise.
(VEX_LEN_2C_P_1): Updated.
(VEX_LEN_E8_P_2): Likewise.
(vex_len_table): Remove VEX_LEN_2B_M_0 and VEX_LEN_E7_P_2_M_0.
(mod_table): Likewise.
* i386-opc.tbl: Add 256bit vmovntdq, vmovntpd and vmovntps.
* i386-tbl.h: Regenerated.
2009-01-06 17:15:28 +00:00
22da050bbf
2009-01-05 H.J. Lu <hongjiu.lu@intel.com>
...
* i386-gen.c (process_copyright): Update for 2009.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2009-01-06 01:14:45 +00:00
0bfee64967
gas/
...
2009-01-05 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (December, 2008)
* config/tc-i386.c (build_modrm_byte): Remove 5 operand instruction
support. Don't swap REG and NDS for FMA.
gas/testsuite/
2009-01-05 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (December, 2008)
* gas/i386/arch-10.s: Replace vfmaddpd with vfmadd132pd.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/arch-10.d: Updated.
* gas/i386/arch-10-1.l: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/avx.d: Likewise.
* gas/i386/avx-intel.d: Likewise.
* gas/i386/inval-avx.l: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
* gas/i386/x86-64-avx.d: Likewise.
* gas/i386/x86-64-avx-intel.d: Likewise.
* gas/i386/x86-64-inval-avx.l: Likewise.
* gas/i386/avx.s: Remove vpermil2ps/vpermil2pd and FMA
instructions. Update tests.
* gas/i386/inval-avx.s: Likewise.
* gas/i386/x86-64-avx.s: Likewise.
* gas/i386/x86-64-inval-avx.s: Likewise.
* gas/i386/fma.d: New.
* gas/i386/fma.s: Likewise.
* gas/i386/fma-intel.d: Likewise.
* gas/i386/x86-64-fma.d: Likewise.
* gas/i386/x86-64-fma.s: Likewise.
* gas/i386/x86-64-fma-intel.d: Likewise.
* gas/i386/i386.exp: Run fma, fma-intel, x86-64-fma and
x86-64-fma-intel.
opcodes/
2009-01-05 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (December, 2008)
* i386-dis.c (OP_VEX_FMA): Removed.
(OP_EX_VexW): Likewise.
(OP_EX_VexImmW): Likewise.
(OP_XMM_VexW): Likewise.
(VEXI4_Fixup): Likewise.
(VPERMIL2_Fixup): Likewise.
(VexI4): Likewise.
(VexFMA): Likewise.
(Vex128FMA): Likewise.
(EXVexW): Likewise.
(EXdVexW): Likewise.
(EXqVexW): Likewise.
(EXVexImmW): Likewise.
(XMVexW): Likewise.
(VPERMIL2): Likewise.
(PREFIX_VEX_3A48...PREFIX_VEX_3A4A): Likewise.
(PREFIX_VEX_3A5C...PREFIX_VEX_3A5F): Likewise.
(PREFIX_VEX_3A68...PREFIX_VEX_3A6F): Likewise.
(PREFIX_VEX_3A78...PREFIX_VEX_3A7F): Likewise.
(VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2): Likewise.
(VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2): Likewise.
(get_vex_imm8): Likewise.
(OP_EX_VexReg): Likewise.
vpermil2_op): Likewise.
(EXVexWdq): New.
(vex_w_dq_mode): Likewise.
(PREFIX_VEX_3896...PREFIX_VEX_389F): Likewise.
(PREFIX_VEX_38A6...PREFIX_VEX_38AF): Likewise.
(PREFIX_VEX_38B6...PREFIX_VEX_38BF): Likewise.
(es_reg): Updated.
(PREFIX_VEX_38DB): Likewise.
(PREFIX_VEX_3A4A): Likewise.
(PREFIX_VEX_3A60): Likewise.
(PREFIX_VEX_3ADF): Likewise.
(VEX_LEN_3ADF_P_2): Likewise.
(prefix_table): Remove PREFIX_VEX_3A48...PREFIX_VEX_3A4A,
PREFIX_VEX_3A5C...PREFIX_VEX_3A5F,
PREFIX_VEX_3A68...PREFIX_VEX_3A6F and
PREFIX_VEX_3A78...PREFIX_VEX_3A7F. Add
PREFIX_VEX_3896...PREFIX_VEX_389F,
PREFIX_VEX_38A6...PREFIX_VEX_38AF and
PREFIX_VEX_38B6...PREFIX_VEX_38BF.
(vex_table): Likewise.
(vex_len_table): Remove VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2
and VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2.
(putop): Support "%XW".
(intel_operand_size): Handle vex_w_dq_mode.
* i386-opc.h (VexNDS): Add a comment for VEX NDS and VEX DDS.
* i386-opc.tbl: Remove vpermil2pd/vpermil2ps and old FMA
instructions. Add new FMA instructions.
* i386-tbl.h: Regenerated.
2009-01-06 01:03:27 +00:00
fa99fab222
gas/
...
2008-12-23 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (match_template): Changed to return
const template *. Handle i.swap_operand for 3 operands.
(build_vex_prefix): Take const template *. Swap operand for
2-byte VEX prefix if possible.
(md_assemble): Updated.
(build_modrm_byte): Handle RegMem bit for SSE2AVX.
gas/testsuite/
2008-12-23 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run x86-64-avx-swap and x86-64-avx-swap-intel.
* gas/i386/opts.s: Add tests for movsd, movss, vmovsd and
vmovss.
* gas/i386/x86-64-opts.s: Likewise.
* gas/i386/opts.d: Updated.
* gas/i386/opts-intel.d: Likewise.
* gas/i386/sse2avx-opts.d: Likewise.
* gas/i386/sse2avx-opts-intel.d: Likewise.
* gas/i386/x86-64-opts.d: Likewise.
* gas/i386/x86-64-opts-intel.d: Likewise.
* gas/i386/x86-64-sse2avx-opts.d: Likewise.
* gas/i386/x86-64-sse2avx-opts-intel.d: Likewise.
* gas/i386/x86-64-avx-swap.d: New.
* gas/i386/x86-64-avx-swap.s: Likewise.
* gas/i386/x86-64-avx-swap-intel.d: Likewise.
opcodes/
2008-12-23 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (EXdS): New.
(EXdVexS): Likewise.
(EXqVexS): Likewise.
(d_swap_mode): Likewise.
(q_mode): Updated.
(prefix_table): Use EXdS on movss and EXqS on movsd.
(vex_len_table): Use EXdVexS on vmovss and EXqVexS on vmovsd.
(intel_operand_size): Handle d_swap_mode.
(OP_EX): Likewise.
* i386-opc.h (S): Update comments.
* i386-opc.tbl: Add S to movss, movsd, vmovss and vmovsd.
* i386-tbl.h: Regenerated.
2008-12-23 15:14:15 +00:00
H.J. Lu
Jan Kratochvil
Sebastian Pop
Nick Clifton
Jan Beulich
Dwarakanath Rajagopal