Add base microMIPS Release 5 ISA support and the ERETNC instruction in
particular, as per the architecture specifications[1][2].
Most of this change by Andrew Bennett.
References:
[1] "MIPS Architecture for Programmers Volume II-B: The microMIPS32
Instruction Set", MIPS Technologies, Inc., Document Number: MD00582,
Revision 5.04, January 15, 2014, Section 5.5 "Recoded 32-Bit
Instructions", pp. 266-267
[2] "MIPS Architecture for Programmers Volume II-B: The microMIPS64
Instruction Set", MIPS Technologies, Inc., Document Number: MD00594,
Revision 5.04, January 15, 2014, Section 5.5 "Recoded 32-Bit
Instructions", pp. 326-327
binutils/
* NEWS: Mention microMIPS Release 5 ISA support.
opcodes/
* micromips-opc.c (I36): New macro.
(micromips_opcodes): Add "eretnc".
gas/
* testsuite/gas/mips/micromips@r5.d: New test.
* testsuite/gas/mips/mips.exp: Run the new test.
Correct a commit 7d64c587c1 ("Add support for the MIPS eXtended
Physical Address (XPA) ASE.") bug, causing XPA base and Virtualization
ASE instructions to be wrongly always enabled with the selection of the
MIPS32r2 or higher ISA.
For example this source assembles successfully as shown below:
$ cat xpa.s
mfhc0 $2, $1
$ as -32 -mips32 -o xpa.o xpa.s
xpa.s: Assembler messages:
xpa.s:1: Error: opcode not supported on this processor: mips32 (mips32) `mfhc0 $2,$1'
$ as -32 -mips32r2 -o xpa.o xpa.s
$ objdump -d xpa.o
xpa.o: file format elf32-tradbigmips
Disassembly of section .text:
00000000 <.text>:
0: 40420800 mfhc0 v0,c0_random
...
$
To address this issue remove the I33 (INSN_ISA32R2) marking from all XPA
instructions in the opcode table. Additionally, for XPA Virtualization
ASE instructions implement an XPAVZ (ASE_XPA_VIRT) combination ASE flag
and use it in place of IVIRT|XPA (ASE_VIRT|ASE_XPA).
Now the same source is correctly rejected unless the `-mxpa' option is
also used:
$ as -32 -mips32r2 -o xpa.o xpa.s
xpa.s: Assembler messages:
xpa.s:1: Error: opcode not supported on this processor: mips32r2 (mips32r2) `mfhc0 $2,$1'
$ as -32 -mips32r2 -mxpa -o xpa.o xpa.s
$
Add test cases for XPA base and XPA Virtualization ASE instructions.
Parts of this change by Andrew Bennett.
include/
* opcode/mips.h (ASE_XPA_VIRT): New macro.
opcodes/
* mips-dis.c (mips_calculate_combination_ases): Handle the
ASE_XPA_VIRT flag.
(parse_mips_ase_option): New function.
(parse_mips_dis_option): Factor out ASE option handling to the
new function. Call `mips_calculate_combination_ases'.
* mips-opc.c (XPAVZ): New macro.
(mips_builtin_opcodes): Correct ISA and ASE flags for "mfhc0",
"mfhgc0", "mthc0" and "mthgc0".
gas/
* config/tc-mips.c (mips_set_ase): Handle the ASE_XPA_VIRT flag.
* testsuite/gas/mips/xpa.d: Remove `xpa' from `-M' in `objdump'
flags. Add `-mvirt' to `as' flags.
* testsuite/gas/mips/xpa-err.d: New test.
* testsuite/gas/mips/xpa-virt-err.d: New test.
* testsuite/gas/mips/xpa-err.l: New stderr output.
* testsuite/gas/mips/xpa-virt-err.l: New stderr output.
* testsuite/gas/mips/xpa-err.s: New test source.
* testsuite/gas/mips/xpa-virt-err.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new tests.
binutils/
* testsuite/binutils-all/mips/mips-xpa-virt-1.d: New test.
* testsuite/binutils-all/mips/mips-xpa-virt-2.d: New test.
* testsuite/binutils-all/mips/mips-xpa-virt-3.d: New test.
* testsuite/binutils-all/mips/mips-xpa-virt-4.d: New test.
* testsuite/binutils-all/mips/mips-xpa-virt.s: New test source.
* testsuite/binutils-all/mips/mips.exp: Run the new tests.
Correct a commit 25499ac7ee ("MIPS16e2: Add MIPS16e2 ASE support")
disassembler bug with the handling of the ASE_MIPS16E2_MT combination
ASE flag, where the calculation uses MIPS ABI Flags directly rather than
calculated internal ASE flags. Consequently code does not correctly set
the ASE_MIPS16E2_MT flag when the MIPS16e2 ASE flag and the MT ASE flag
come from different sources, i.e. one from the BFD chosen and the other
one from MIPS ABI Flags.
Fix this by using internal ASE_MT and ASE_MIPS16E2 flags in a separate
subsequent step, factored out to a dedicated function for use with
future combination ASE flags. Adjust the `mips16e2@mips16e2-mt-sub.d'
test case accordingly, where the MT flag comes from the BFD selected for
the disassembler and the MIPS16e2 flag comes from the ELF binary itself.
opcodes/
* mips-dis.c (mips_calculate_combination_ases): New function.
(mips_convert_abiflags_ases): Factor out ASE_MIPS16E2_MT
calculation to the new function.
(set_default_mips_dis_options): Call the new function.
gas/
* testsuite/gas/mips/mips16e2@mips16e2-mt-sub.d: Adjust for the
ASE_MIPS16E2_MT flag disassembler fix.
* testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16e2-mt-sub.d:
Likewise.
Correct a commit 25499ac7ee ("MIPS16e2: Add MIPS16e2 ASE support") GAS
bug with the handling of the ASE_MIPS16E2_MT combination ASE flag, which
is not correctly calculated as `.set nomips16e2' and `.set nomt'
pseudo-ops are processed. This leads to code like:
$ cat foo.s
.set nomt
evpe
.align 4, 0
$ cat bar.s
.set nomips16e2
dvpe
.align 4, 0
$
to successfully assemble where it should not:
$ as -32 -mips32r3 -mmt -mips16 -mmips16e2 -o foo.o foo.s
$ as -32 -mips32r3 -mmt -mips16 -mmips16e2 -o bar.o bar.s
$ objdump -m mips:16 -d foo.o
foo.o: file format elf32-tradbigmips
Disassembly of section .text:
00000000 <.text>:
0: f027 6700 evpe
...
bar.o: file format elf32-tradbigmips
Disassembly of section .text:
00000000 <.text>:
0: f026 6700 dvpe
...
$
This happens because ASE_MIPS16E2_MT once set in `mips_set_ase' is never
cleared. Fix the problem by clearing it there before it is calculated
based on the ASE_MT and ASE_MIPS16E2 flags, making assembly fail as
expected:
$ as -32 -mips32r3 -mmt -mips16 -mmips16e2 -o foo.o foo.s
foo.s: Assembler messages:
foo.s:2: Error: opcode not supported on this processor: mips32r3 (mips32r3) `evpe'
$ as -32 -mips32r3 -mmt -mips16 -mmips16e2 -o bar.o bar.s
bar.s: Assembler messages:
bar.s:2: Error: opcode not supported on this processor: mips32r3 (mips32r3) `dvpe'
$
gas/
* config/tc-mips.c (mips_set_ase): Clear the ASE_MIPS16E2_MT
flag before recalculating.
* testsuite/gas/mips/mips16e2-mt-err.d: New test.
* testsuite/gas/mips/mips16e2-mt-err.l: New stderr output.
* testsuite/gas/mips/mips16e2-mt-err.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new test.
The dynrelro introduction wasn't implemented quite right for RISC-V,
as it didn't consider TLS copy relocs.
bfd/ChangeLog
2017-06-29 Andrew Waterman <andrew@sifive.com>
* elfnn-riscv.c (riscv_elf_adjust_dynamic_symbol): Fix TLS copy
relocs.
This commit fixes a mismatch between what "print" command completer
thinks the command understands, and what the command actually
understands.
The explicit location options are understood by commands that take
(linespecs and) explicit locations as argument. I.e, breakpoint
commands, and "list". For example:
(gdb) b -source file.c -function my_func
So for those commands, it makes sense that the completer
completes:
"b -sour[TAB]" -> "b -source "
"b -functi[TAB]" -> "b -function "
etc.
However, completion for commands that take expressions (not
linespecs/locations) as arguments, such as the "print" command, also
completes the explicit location options, even though those switches
aren't really understood by these commands. Instead, "-foo" is
understood as an expression applying unary minus on a symbol named
"foo" (think "print -1"):
(gdb) p -func[TAB]
(gdb) p -function [RET]
No symbol "function" in current context.
The patch fixes this by having the expression_completer function
bypass the function that completes explicit locations.
New regression tests included.
gdb/ChangeLog:
2017-06-29 Pedro Alves <palves@redhat.com>
* completer.c (expression_completer): Call
linespec_location_completer instead of location_completer.
gdb/testsuite/ChangeLog:
2017-06-29 Pedro Alves <palves@redhat.com>
* gdb.base/printcmds.exp: Add tests.
The code in question was introduced by:
https://sourceware.com/ml/gdb-patches/2008-06/msg00143.html
"The fix is to make sure that the entire expression is passed to
expression_completer, then duplicate some logic there in the case
where location_completer is called."
The logic that was duplicated was much later on removed by the
original explicit locations patch:
commit 87f0e72047
Author: Keith Seitz <keiths@redhat.com>
AuthorDate: Tue Aug 11 17:09:36 2015 -0700
Commit: Keith Seitz <keiths@redhat.com>
CommitDate: Tue Aug 11 17:09:36 2015 -0700
Explicit locations: add UI features for CLI
@@ -688,16 +880,6 @@ complete_line_internal (const char *text,
rl_completer_word_break_characters =
gdb_completer_file_name_break_characters;
}
- else if (c->completer == location_completer)
- {
- /* Commands which complete on locations want to
- see the entire argument. */
- for (p = word;
- p > tmp_command
- && p[-1] != ' ' && p[-1] != '\t';
- p--)
- ;
- }
However this case in expression_completer was left behind.
I couldn't come up with a test where this currently makes any
difference.
gdb/ChangeLog:
2017-06-29 Pedro Alves <palves@redhat.com>
* completer.c (expression_completer): Remove code that recomputes
'text' from 'word'.
This patch updates arc-dis.c:parse_disassembler_options to use a macro
FOR_EACH_DISASSEMBLER_OPTION, which has been introduced in [1], instead of a
homegrown solution to split option string.
[1] https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=65b48a81
opcodes/ChangeLog:
yyyy-mm-dd Anton Kolesov <Anton.Kolesov@synopsys.com>
* arc-dis.c (parse_disassembler_options): Use
FOR_EACH_DISASSEMBLER_OPTION.
There is a bug in handling of cpu=... disassembler option in case there are
other options after it, for example, `cpu=EM,dsp'. In this case `EM,dsp' is
treated as an option value, and strcasecmp reports is as non-equal to "EM".
This is fixed by using disassembler_options_cmp function, which compares string
treating `,' the same way as `\0'.
This function also solves a problem with option order in parse_option.
Previously, if several option had same prefix (e.g. fpud, fpuda), then the
longer one should have been compared first, otherwise when longer option is
passed it would be treated as a short one, because
CONST_STRNEQ ("fpud", "fpuda")
would be true. The order of options was correct for ARC, so there were no
bugs per se, but with disassembler_option_cmp there is no risk of such a bug
being introduced in the future.
opcodes/ChangeLog:
yyyy-mm-dd Anton Kolesov <Anton.Kolesov@synopsys.com>
* arc-dis.c (parse_option): Use disassembler_options_cmp to compare
disassembler option strings.
(parse_cpu_option): Likewise.
binutils/ChangeLog
yyyy-mm-dd Anton Kolesov <Anton.Kolesov@synopsys.com>
* testsuite/binutils-all/arc/double_store.s: New file.
* testsuite/binutils-all/arc/objdump.exp: Tests for disassembler
options.
(do_objfile): New function.
(check_assembly): Likewise.
struct target_desc is used by both GDBserver and IPA, but fields
expedite_regs and xmltarget are only used in GDBserver, so this patch wraps
these two fields by ifndef IN_PROCESS_AGENT. This patch also changes
regformats/regdat.sh to generate .c files in this way too.
gdb/gdbserver:
2017-06-29 Yao Qi <yao.qi@linaro.org>
* tdesc.h (struct target_desc) [IN_PROCESS_AGENT] <expedite_regs>:
Remove.
[IN_PROCESS_AGENT] <xmltarget>: Likewise.
gdb:
2017-06-29 Yao Qi <yao.qi@linaro.org>
* regformats/regdat.sh: Generate code with
"ifndef IN_PROCESS_AGENT".
Prevent sparc backend making symbols dynamic unless they are undefined
weak. Use R_SPARC_RELATIVE for the symbols which are not dynamic in PIC.
This patch is tested on sparc64-unknown-linux-gnu, no regressions are
found.
bfd/ChangeLog:
2017-06-29 Egeyar Bagcioglu <egeyar.bagcioglu@oracle.com>
* elfxx-sparc.c (allocate_dynrelocs): Don't make a symbol dynamic
unless it is undefined weak.
* elfxx-sparc.c (_bfd_sparc_elf_relocate_section): Set the flag
relative_reloc to direct non-dynamic symbols to R_SPARC_RELATIVE
relocation.
* elfxx-sparc.c (_bfd_sparc_elf_finish_dynamic_symbol): If symbol
is not dynamic in PIC, abort.
This fix is an adaption of the x86-64 PR ld/21402 fix to AArch64.
After the generic code deciding one symbol is not dynamic, AArch64 backend
only overrides the decision on undefined weak symbols.
bfd/
PR ld/21402
* elfnn-aarch64.c (elfNN_aarch64_allocate_dynrelocs): Only make
undefined weak symbols into dynamic.
(elfNN_aarch64_final_link_relocate): Generate runtime RELATIVE
relocation for non-dynamic symbols.
(elfNN_aarch64_finish_dynamic_symbol): Add sanity check.
There are quite a few duplicated code supporting several GP based
relocation types. They are:
BFD_RELOC_AARCH64_LD64_GOTOFF_LO15
BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC
BFD_RELOC_AARCH64_MOVW_GOTOFF_G1
These relocation types are supposed to be used for large memory model PIC/pic
mode under which we will have an initialized GP register points to the base of
GOT table, then these relocations are supposed to put the distance between GOT
entry and GOT table base address into the related instructions.
So, the parameters required to calculate the relocation should be the same as
BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15 etc, all of them are require the GOT entry
address and GOT table base address to perform the relocation.
This patch has removed those duplicated code when handling above listed
relocation types, grouped them with others as relocation types that are
require GOT table base address during performing relocation, reused the
existed GOT handling code.
The relocation calculation for these types before and after this patch should be
identical.
bfd/
* elfnn-aarch64.c (aarch64_relocation_aginst_gp_p): New function.
(elfNN_aarch64_final_link_relocate): Delete duplicated code for
BFD_RELOC_AARCH64_LD64_GOTOFF_LO15, BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC,
BFD_RELOC_AARCH64_MOVW_GOTOFF_G1.
* elfxx-aarch64.c (_bfd_aarch64_elf_resolve_relocation): Optimize the
support for them.
Newer Linux kernel versions offer two new register sets in support of the
z/Architecture's guarded storage facility: NT_S390_GS_CB, the
"guarded-storage registers", and NT_S390_GS_BC, the "guarded-storage
broadcast control block". This patch adds support for the respective core
notes sections to binutils.
bfd/ChangeLog:
* elf-bfd.h (elfcore_write_s390_gs_cb): Add prototype.
(elfcore_write_s390_gs_bc): Likewise.
* elf.c (elfcore_grok_s390_gs_cb): New function.
(elfcore_grok_s390_gs_bc): New function.
(elfcore_grok_note): Call them.
(elfcore_write_s390_gs_cb): New function.
(elfcore_write_s390_gs_bc): New function.
(elfcore_write_register_note): Call them.
binutils/ChangeLog:
* readelf.c (get_note_type): Add NT_S390_GS_CB and NT_S390_GS_BC.
include/ChangeLog:
* elf/common.h (NT_S390_GS_CB): New macro.
(NT_S390_GS_BC): Likewise.
Since it is impossible to read beyond the end of normal files, we only
need to check archive element size in _bfd_generic_get_section_contents
* libbfd.c (_bfd_generic_get_section_contents): Don't call
bfd_get_file_size. Check archive element size.
(_bfd_generic_get_section_contents_in_window): Likewise.
bfd_get_size and bfd_get_file_size should return the unsigned file
size. Otherwise they return negative values for file >= 2GB with
32-bit ufile_ptr.
bfd/
* bfd-in2.h: Regenerated.
* bfdio.c (bfd_get_size): Change return type to ufile_ptr.
(bfd_get_file_size): Likewise.
binutils/
* objdump.c (dump_relocs_in_section): Cast to ufile_ptr when
comparing against bfd_get_file_size return.
command.h depends on scoped_restore:
extern scoped_restore_tmpl<int> prevent_dont_repeat (void);
But doesn't include the corresponding header
("common/scoped_restore.h"). We haven't noticed a problem because
utils.h includes scoped_restore.h, and defs.h includes utils.h.
However, a patch that makes "symtab.h" include "completer.h", exposed
the issue:
https://sourceware.org/ml/gdb-patches/2017-06/msg00023.html.
Without this fix that would break building all .o files like this:
In file included from src/gdb/completer.h:21:0,
from src/gdb/symtab.h:28,
from src/gdb/language.h:26,
from src/gdb/frame.h:72,
from src/gdb/gdbarch.h:39,
from src/gdb/defs.h:636,
from src/gdb/top.c:20:
src/gdb/command.h:434:8: error: ‘scoped_restore_tmpl’ does not name a type
extern scoped_restore_tmpl<int> prevent_dont_repeat (void);
^
Makefile:1911: recipe for target 'top.o' failed
because defs.h includes gdbarch.h before it includes utils.h.
gdb/ChangeLog:
2017-06-28 Pedro Alves <palves@redhat.com>
* command.h: Include "common/scoped_restore.h".
We already have macro obstack_grow_str, which is helpful to shorten the
code.
gdb:
2017-06-28 Yao Qi <yao.qi@linaro.org>
* mi/mi-cmd-break.c (mi_argv_to_format): Use obstack_grow_str
instead of obstack_grow.
This patch add assembler and disassembler support for new Dot Product
Extension.
The support can be enabled through the new "+dotprod" extension.
include/
* opcode/arm.h (FPU_NEON_EXT_DOTPROD): New macro.
(FPU_ARCH_DOTPROD_NEON_VFP_ARMV8): New macro.
gas/
* config/tc-arm.c (fpu_neon_ext_dotprod): New variable.
(neon_scalar_for_mul): Improve comments.
(do_neon_dotproduct): New function to encode Dot Product instructions.
(do_neon_dotproduct_s): Wrapper function for signed Dot Product
instructions.
(do_neon_dotproduct_u): Wrapper function for unsigned Dot Product
instructions.
(insns): New entries for vsdot and vudot.
(arm_extensions): New entry for "dotprod".
* doc/c-arm.texi: Document new "dotprod" extension.
* testsuite/gas/arm/dotprod.s: New test source.
* testsuite/gas/arm/dotprod-illegal.s: New test source.
* testsuite/gas/arm/dotprod.d: New test.
* testsuite/gas/arm/dotprod-thumb2.d: New test.
* testsuite/gas/arm/dotprod-illegal.d: New test.
* testsuite/gas/arm/dotprod-legacy-arch.d: New test.
* testsuite/gas/arm/dotprod-illegal.l: New error file.
* testsuite/gas/arm/dotprod-legacy-arch.l: New error file.
opcodes/
* arm-dis.c (coprocessor_opcodes): New entries for vsdot and vudot.
Fix issue exposed by commit 3e29f34.
The basic issue is that section data referenced through an objfile
pointer can also be referenced via the program-space data pointer,
although via a separate mapping mechanism, which is set up by
update_section_map. Thus once section data attached to an objfile
pointer is released, the section map associated with the program-space
data pointer must be marked dirty to ensure that update_section_map is
called to prevent stale data being referenced. For the matter at hand
this marking is being done via a call to objfiles_changed.
Before commit 3e29f34 objfiles_changed could be called after all of
the objfile pointers were processed in reread_symbols since section
data references via the program-space data pointer would not occur in
the calls of read_symbols performed by reread_symbols.
With commit 3e29f34 MIPS target specific calls to find_pc_section were
added to the code for DWARF information processing, which is called
via read_symbols. Thus in reread_symbols the call to objfiles_changed
needs to be called before calling read_symbols, otherwise stale
section data can be referenced.
Thanks to Luis Machado for providing text for the main comment
associated with the change.
gdb/
2017-06-28 Doug Gilmore <Doug.Gilmore@imgtec.com>
PR gdb/21337
* symfile.c (reread_symbols): Call objfiles_changed just before
read_symbols.
gdb/testsuite/
2017-06-28 Doug Gilmore <Doug.Gilmore@imgtec.com>
PR gdb/21337
* gdb.base/reread-readsym.exp: New file.
* gdb.base/reread-readsym.c: New file.
Add GAS tests to verify Imagination interAptiv MR2 instruction assembly,
disassembly and ELF object file flags.
Add LD tests to verify Imagination interAptiv MR2 ELF object file
link-time compatibility and flag merging/propagation. Use the framework
enhancement added with commit 7575e6a752 ("MIPS/LD/testsuite:
mips-elf-flags: Add MIPS ABI Flags handling").
gas/
* testsuite/gas/mips/elf_mach_interaptiv-mr2.d: New test.
* testsuite/gas/mips/save-err.d: New test.
* testsuite/gas/mips/save-sub.d: New test.
* testsuite/gas/mips/interaptiv-mr2@save.d: New test.
* testsuite/gas/mips/mips1@save-sub.d: New test.
* testsuite/gas/mips/mips2@save-sub.d: New test.
* testsuite/gas/mips/mips3@save-sub.d: New test.
* testsuite/gas/mips/mips4@save-sub.d: New test.
* testsuite/gas/mips/mips5@save-sub.d: New test.
* testsuite/gas/mips/mips32@save-sub.d: New test.
* testsuite/gas/mips/mips64@save-sub.d: New test.
* testsuite/gas/mips/mips16@save-sub.d: New test.
* testsuite/gas/mips/mips16e@save-sub.d: New test.
* testsuite/gas/mips/r3000@save-sub.d: New test.
* testsuite/gas/mips/r3900@save-sub.d: New test.
* testsuite/gas/mips/r4000@save-sub.d: New test.
* testsuite/gas/mips/vr5400@save-sub.d: New test.
* testsuite/gas/mips/interaptiv-mr2@save-sub.d: New test.
* testsuite/gas/mips/sb1@save-sub.d: New test.
* testsuite/gas/mips/octeon2@save-sub.d: New test.
* testsuite/gas/mips/octeon3@save-sub.d: New test.
* testsuite/gas/mips/xlr@save-sub.d: New test.
* testsuite/gas/mips/r5900@save-sub.d: New test.
* testsuite/gas/mips/mips16e2-copy.d: New test.
* testsuite/gas/mips/mips16e2-copy-err.d: New test.
* testsuite/gas/mips/save.d: Remove `MIPS16e' from the `name'
option. Adjust for trailing padding change.
* testsuite/gas/mips/mips16e2-copy-err.l: New stderr output.
* testsuite/gas/mips/save-sub.s: New test source.
* testsuite/gas/mips/mips16e2-copy.s: New test source.
* testsuite/gas/mips/mips16e2-copy-err.s: New test source.
* testsuite/gas/mips/save.s: Update description, change trailing
padding and remove trailing white space.
* testsuite/gas/mips/mips.exp: Expand `save' and `save-err'
tests across the regular MIPS interAptiv MR2 architecture. Run
the new tests.
ld/
* testsuite/ld-mips-elf/mips-elf-flags.exp: Add interAptiv MR2
tests.
Define a new regular MIPS and MIPS16 interAptiv MR2 test architecture
and adjust existing tests now run against these architectures
accordingly.
This change causes new test failures:
FAIL: MIPS jal-svr4pic (interaptiv-mr2)
FAIL: MIPS jal-svr4pic noreorder (interaptiv-mr2)
with the `mips-sgi-irix5' and `mips-sgi-irix6' targets, which are
consistent with the remaining architecture results for these cases, that
do not take into account the lack of R_MIPS_JALR relocations produced by
GAS for these targets. As a preexisting issue these failures are not
addressed with this change.
gas/
* testsuite/gas/mips/mips.exp (interaptiv-mr2): New architecture.
(mips16e2-interaptiv-mr2): Likewise.
* testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-macro.d: New
test.
* testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-macro-t.d:
New test.
* testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-macro-e.d:
New test.
* testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-insn-t.d:
New test.
* testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-insn-e.d:
New test.
* testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16e-64.d: New
test.
* testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-sub.d: New
test.
* testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16e-sub.d: New
test.
* testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16e-64-sub.d:
New test.
* testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16e2-mt-sub.d:
New test.
* testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-asmacro.d:
New test.
* testsuite/gas/mips/interaptiv-mr2@mcu.d: New test.
* testsuite/gas/mips/interaptiv-mr2@isa-override-1.d: New test.
* testsuite/gas/mips/interaptiv-mr2@isa-override-2.d: New test.
* testsuite/gas/mips/attr-gnu-4-5.d: Ignore any number of ASE
flag lines present rather than just one.
* testsuite/gas/mips/attr-gnu-4-6.d: Likewise.
* testsuite/gas/mips/attr-gnu-4-7.d: Likewise.
* testsuite/gas/mips/attr-none-o32-fp64-nooddspreg.d: Likewise.
* testsuite/gas/mips/attr-none-o32-fp64.d: Likewise.
* testsuite/gas/mips/attr-none-o32-fpxx.d: Likewise.
* testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-macro.l: New
stderr output.
* testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-macro-t.l:
New stderr output.
* testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-macro-e.l:
New stderr output.
* testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-insn-t.l:
New stderr output.
* testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-insn-e.l:
New stderr output.
* testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-sub.l: New
stderr output.
* testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16e-sub.l: New
stderr output.
* testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16e-64-sub.l:
New stderr output.
* testsuite/gas/mips/interaptiv-mr2@isa-override-1.l: New stderr
output.
* testsuite/gas/mips/interaptiv-mr2@isa-override-2.l: New stderr
output.
Add support for the Imagination interAptiv MR2 MIPS32r3 processor with
the MIPS16e2 ASE as per documentation, including in particular:
1. Support for implementation-specific interAptiv MR2 COPYW and UCOPYW
MIPS16e2 instructions[1], for assembly and disassembly,
2. Support for implementation-specific interAptiv MR2 SAVE and RESTORE
regular MIPS instructions[2], for assembly and disassembly,
3. ELF binary file annotation for the interAptiv MR2 MIPS architecture
extension.
4. Support for interAptiv MR2 architecture selection for assembly, in
the form of the `-march=interaptiv-mr2' command-line option and its
corresponding `arch=interaptiv-mr2' setting for the `.set' and
`.module' pseudo-ops.
5. Support for interAptiv MR2 architecture selection for disassembly,
in the form of the `mips:interaptiv-mr2' target architecture, for
use e.g. with the `-m' command-line option for `objdump'.
Parts of this change by Matthew Fortune and Andrew Bennett.
References:
[1] "MIPS32 interAptiv Multiprocessing System Software User's Manual",
Imagination Technologies Ltd., Document Number: MD00904, Revision
02.01, June 15, 2016, Section 24.3 "MIPS16e2 Implementation Specific
Instructions", pp. 878-883
[2] same, Chapter 25 "Implementation-specific Instructions", pp. 911-917
include/
* elf/mips.h (E_MIPS_MACH_IAMR2): New macro.
(AFL_EXT_INTERAPTIV_MR2): Likewise.
* opcode/mips.h: Document new operand codes defined.
(INSN_INTERAPTIV_MR2): New macro.
(INSN_CHIP_MASK): Adjust accordingly.
(CPU_INTERAPTIV_MR2): New macro.
(cpu_is_member) <CPU_INTERAPTIV_MR2>: New case.
(MIPS16_ALL_ARGS): Rename to...
(MIPS_SVRS_ALL_ARGS): ... this.
(MIPS16_ALL_STATICS): Rename to...
(MIPS_SVRS_ALL_STATICS): ... this.
bfd/
* archures.c (bfd_mach_mips_interaptiv_mr2): New macro.
* cpu-mips.c (I_interaptiv_mr2): New enum value.
(arch_info_struct): Add "mips:interaptiv-mr2" entry.
* elfxx-mips.c (_bfd_elf_mips_mach) <E_MIPS_MACH_IAMR2>: New
case.
(mips_set_isa_flags) <bfd_mach_mips_interaptiv_mr2>: Likewise.
(bfd_mips_isa_ext) <bfd_mach_mips_interaptiv_mr2>: Likewise.
(print_mips_isa_ext) <AFL_EXT_INTERAPTIV_MR2>: Likewise.
(mips_mach_extensions): Add `bfd_mach_mipsisa32r3' and
`bfd_mach_mips_interaptiv_mr2' entries.
* bfd-in2.h: Regenerate.
opcodes/
* mips-formats.h (INT_BIAS): New macro.
(INT_ADJ): Redefine in INT_BIAS terms.
* mips-dis.c (mips_arch_choices): Add "interaptiv-mr2" entry.
(mips_print_save_restore): New function.
(print_insn_arg) <OP_SAVE_RESTORE_LIST>: Update comment.
(validate_insn_args) <OP_SAVE_RESTORE_LIST>: Remove `abort'
call.
(print_insn_args): Handle OP_SAVE_RESTORE_LIST.
(print_mips16_insn_arg): Call `mips_print_save_restore' for
OP_SAVE_RESTORE_LIST handling, factored out from here.
* mips-opc.c (decode_mips_operand) <'-'> <'m'>: New case.
(RD_31, RD_SP, WR_SP, MOD_SP, IAMR2): New macros.
(mips_builtin_opcodes): Add "restore" and "save" entries.
* mips16-opc.c (decode_mips16_operand) <'n', 'o'>: New cases.
(IAMR2): New macro.
(mips16_opcodes): Add "copyw" and "ucopyw" entries.
binutils/
* readelf.c (get_machine_flags) <E_MIPS_MACH_IAMR2>: New case.
(print_mips_isa_ext) <AFL_EXT_INTERAPTIV_MR2>: Likewise.
* NEWS: Mention Imagination interAptiv MR2 processor support.
gas/
* config/tc-mips.c (validate_mips_insn): Handle
OP_SAVE_RESTORE_LIST specially.
(mips_encode_save_restore, mips16_encode_save_restore): New
functions.
(match_save_restore_list_operand): Factor out SAVE/RESTORE
operand insertion into the instruction word or halfword to these
new functions.
(mips_cpu_info_table): Add "interaptiv-mr2" entry.
* doc/c-mips.texi (MIPS Options): Add `interaptiv-mr2' to the
`-march=' argument list.
A following patch will want to add a std::vector to
objfile_per_bfd_storage. That makes it non-trivially
constructible/destructible. Since objfile_per_bfd_storage objects are
allocated on an obstack, we need to call their ctors/dtors manually.
This is what this patch does. And then since we can now rely on
ctors/dtors being run, make objfile_per_bfd_storage::storage_obstack
be an auto_obstack.
gdb/ChangeLog:
2017-06-27 Pedro Alves <palves@redhat.com>
* objfiles.c (get_objfile_bfd_data): Call bfd_alloc instead of
bfd_zalloc. Call objfile_per_bfd_storage's ctor.
(free_objfile_per_bfd_storage): Call objfile_per_bfd_storage's
dtor.
* objfiles.h (objfile_per_bfd_storage): Add ctor. Make
'storage_obstack' field an auto_obstack. In-class initialize all
non-bitfield fields. Make minsyms_read bool.
* symfile.c (read_symbols): Adjust.
This commit eliminates make_cleanup_obstack_free, replacing it with a
new auto_obstack type that inherits obstack to add cdtors.
These changes in the parsers may not be obvious:
- obstack_init (&name_obstack);
- make_cleanup_obstack_free (&name_obstack);
+ name_obstack.clear ();
Here, the 'name_obstack' variable is a global. The change means that
the obstack's contents from a previous parse will stay around until
the next parsing starts. I.e., memory won't be reclaimed until then.
I don't think that's a problem, these objects don't really grow much
at all.
The other option I tried was to add a separate type that is like
auto_obstack but manages an external obstack, just for those cases. I
like the current approach better as that other approach adds more
boilerplate and yet another type to learn.
gdb/ChangeLog:
2017-06-27 Pedro Alves <palves@redhat.com>
* c-exp.y (name_obstack): Now an auto_obstack.
(yylex): Use auto_obstack::clear.
(c_parse): Use auto_obstack::clear instead of reinitializing and
freeing the obstack.
* c-lang.c (evaluate_subexp_c): Use auto_obstack.
* d-exp.y (name_obstack): Now an auto_obstack.
(yylex): Use auto_obstack::clear.
(d_parse): Use auto_obstack::clear instead of reinitializing and
freeing the obstack.
* dwarf2loc.c (fetch_const_value_from_synthetic_pointer): Use
auto_obstack.
* dwarf2read.c (create_addrmap_from_index)
(dwarf2_build_psymtabs_hard)
(update_enumeration_type_from_children): Likewise.
* gdb_obstack.h (auto_obstack): New type.
* go-exp.y (name_obstack): Now an auto_obstack.
(build_packaged_name): Use auto_obstack::clear.
(go_parse): Use auto_obstack::clear instead of reinitializing and
freeing the obstack.
* linux-tdep.c (linux_make_mappings_corefile_notes): Use
auto_obstack.
* printcmd.c (printf_wide_c_string, ui_printf): Use auto_obstack.
* rust-exp.y (work_obstack): Now an auto_obstack.
(rust_parse, rust_lex_tests): Use auto_obstack::clear instead of
reinitializing and freeing the obstack.
* utils.c (do_obstack_free, make_cleanup_obstack_free): Delete.
(host_char_to_target): Use auto_obstack.
* utils.h (make_cleanup_obstack_free): Delete declaration.
* valprint.c (generic_emit_char, generic_printstr): Use
auto_obstack.
Fix incorrect adjustment of diff relocs when relaxing, and thus the
resulting source line to address mismatch.
Fix two issues when adjusting diff relocs to account for
deleted bytes.
1. Don't adjust the difference if the end address is the shrinked
insn's address i.e. use < instead of <=. The relaxation code deletes
count bytes from or after shrinked_insn_address, so the difference
between start_address and end_address should remain unchanged in this
case.
2. Adjust the reloc addend if the difference is to be adjusted and
symval + reloc addend is past the shrinked insn address. This is
because for a typical sym1 - sym2 diff reloc, sym1 is .text +
irel->r_addend, and the addend should be reduced to account for the
shrinked insn.
For example, assume the reloc value is .text + 0x8 with .text = 0, the
diff value in the object file = 0x4, and shrinked_insn_address = 0x4
with count = 0x2. Then the existing code writes 0x2 into the object
file to account for the deleted bytes, as shrinked_insn_address lies
between 0x8 and 0x8 - 0x4 = 0x4, but leaves the addend as is. The next
time the reloc is looked at, the code sees if a shrinked_insn_address
lies between 0x8 and 0x8 - 0x2 = 0x6, instead of 0x6 and 0x4. If there
happens to be one, then the diff value in the object file ends up
getting reduced again.
bfd/
2017-06-27 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
PR ld/13402
* elf32-avr.c (elf32_avr_adjust_diff_reloc_value): Adjust
reloc addend if necessary. Adjust diff only if
shrinked_insn_address < end_address.
ld/
2017-06-27 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
PR ld/13402
* testsuite/ld-avr/pr13402.d: New test.
* testsuite/ld-avr/pr13402.s: New test.
Starting a process on macOS/Darwin currently leads to this error:
/Users/simark/src/binutils-gdb/gdb/darwin-nat.c:383: internal-error: void darwin_check_new_threads(struct inferior *): Assertion `tp' failed.
with the corresponding partial backtrace (sorry, taken with lldb,
because well, gdb is broken :)):
frame #9: 0x000000010004605a gdb`darwin_check_new_threads(inf=0x0000000100edf670) at darwin-nat.c:383
frame #10: 0x0000000100045848 gdb`darwin_init_thread_list(inf=0x0000000100edf670) at darwin-nat.c:1710
frame #11: 0x00000001000452f8 gdb`darwin_ptrace_him(pid=8375) at darwin-nat.c:1792
frame #12: 0x0000000100041d95 gdb`fork_inferior(...) at fork-inferior.c:440
frame #13: 0x0000000100043f82 gdb`darwin_create_inferior(...) at darwin-nat.c:1841
frame #14: 0x000000010034ac32 gdb`run_command_1(args=0x0000000000000000, from_tty=1, tbreak_at_main=1) at infcmd.c:611
The issue was introduced by commit
"Share fork_inferior et al with gdbserver"
because it changed the place where the dummy thread (pid, 0, 0) is added,
relative to the call to the init_trace_fun callback. In this callback, darwin
checks for new threads in the program (there should be exactly one) in order to
update this dummy thread with the right tid. Previously, things happened in
this order:
- fork_inferior calls fork()
- fork_inferior adds dummy thread
- fork_inferior calls init_trace_fun callback, which updates the dummy
thread info
Following the commit mentioned above, the new thread is added in the
darwin-nat code, after having called fork_inferior (in
darwin_create_inferior). So gdb tries to do things in this order:
- fork_inferior calls fork()
- fork_inferior calls init_trace_fun callback, which tries to update
the dummy thread info
- darwin_create_inferior adds the dummy thread
The error happens while trying to update the dummy thread that has not
been added yet.
I don't think this dummy thread is necessary for darwin. Previously, it
was fork_inferior that was adding this thread, for all targets, so
darwin had to deal with it. Now that it's done by targets themselves,
we can just skip that on darwin. darwin_check_new_threads called
indirectly by init_trace_fun/darwin_ptrace_him will simply notice the
new thread and add it with the right information.
My level of testing was: try to start a process and try to attach to a
process, and it seems to work somewhat like it did before. I tried to
run the testsuite, but it leaves a huge amount of zombie processes that
launchd doesn't seem to reap, leading to exhaustion of system resources
(number of processes).
gdb/ChangeLog:
* darwin-nat.c (darwin_check_new_threads): Don't handle dummy
thread.
(darwin_init_thread_list): Don't update dummy thread.
(darwin_create_inferior, darwin_attach): Don't add a dummy thread.
Complement commit 351cdf24d2 ("[MIPS] Implement O32 FPXX, FP64 and
FP64A ABI extensions") and add optional MIPS ABI Flags handling to
`good_combination' in the `mips-elf-flags.exp' test script. This lets
callers of this procedure request to examine MIPS ABI Flags in addition
to the `e_flags' member of the ELF file header so as to verify that
flags are merged correctly by LD. The presence of further arguments
triggers this verification, in which case `readelf' is called with the
`-A' option additionally specified and the ISA member, the ISA Extension
member and the ASEs member will be examined as per the arguments.
Unlike with `readelf -h' output consider a failure to retrieve the
member requested a test case failure rather than an unresolved result.
This is because unlike with the `e_flags' member of the ELF file header
which is always there in any valid ELF file the MIPS ABI Flags structure
is optional in LD output and the absence of this structure when expected
is surely a bug in LD.
ld/
* testsuite/ld-mips-elf/mips-elf-flags.exp (good_combination):
Add an `args' final argument and examination code for `readelf
-A' output. Update procedure description accordingly.
For ELF file header flag verification done in `good_combination' in the
`mips-elf-flags.exp' test script the version of `readelf' built along
with the rest of binutils has to be used rather than any such executable
already present on the build system, so that flags recognized by the
tool match those supported by LD being tested. Use `remote_exec' as
elsewhere in the LD test framework and also with GAS and LD used here,
getting and arranging for extra reporting of `readelf' calls included in
test logs on this occasion as well.
ld/
* testsuite/ld-mips-elf/mips-elf-flags.exp (good_combination):
Use `remote_exec' to call `readelf'. Log the command issued.
For the purpose of link-time object compatibility handling verification
code in the `good_combination' procedure from the `mips-elf-flags.exp'
test script only examines the `e_flags' member of the ELF file header
and ignores data from any ELF program or section headers present. Use
`readelf -h' rather than `readelf --headers' then to obtain data for
examination, avoiding unnecessary processing to extract this extraneous
information.
ld/
* testsuite/ld-mips-elf/mips-elf-flags.exp (good_combination):
Use `readelf -h' rather than `readelf --headers'.
The symbol address in .eh_frame may be adjusted in
_bfd_elf_discard_section_eh_frame, and the content of .eh_frame will be
adjusted in _bfd_elf_write_section_eh_frame. Therefore, we cannot insert
a relocation whose addend symbol is in .eh_frame. Othrewise, the value
may be adjusted twice.
bfd/ChangeLog
2017-06-26 Kuan-Lin Chen <rufus@andestech.com>
* elfnn-riscv.c (perform_relocation): Support the new
R_RISCV_32_PCREL relocation.
(riscv_elf_relocate_section): Likewise.
* elfxx-riscv.c (howto_table): Likewise.
(riscv_reloc_map): Likewise.
* bfd-in2.h (BFD_RELOC_RISCV_32_PCREL): New relocation.
* libbfd.h: Regenerate.
gas/ChangeLog
2017-06-26 Kuan-Lin Chen <rufus@andestech.com>
* config/tc-riscv.c (md_apply_fix) [BFD_RELOC_32]: Convert to a
R_RISCV_32_PCREL relocation.
include/ChangeLog
2017-06-26 Kuan-Lin Chen <rufus@andestech.com>
* elf/riscv.h (R_RISCV_32_PCREL): New.
Make BFD agree with GAS and mark the LSI MiniRISC CW4010 processor core
(for an odd reason referred to as LSI R4010 across our code base) as a
MIPS II processor in BFD as well, fixing a bug that has been there since
forever and addressing linker warnings like:
$ as -m4010 empty.s -o 4010.o
$ ld -r 4010.o -o 4010-r.o
ld: 4010.o: warning: Inconsistent ISA between e_flags and .MIPS.abiflags
$
due to the ISA level being recorded as MIPS III in ELF file header's
`e_flags' vs MIPS II in the MIPS ABI Flags section:
$ readelf -Ah 4010.o
ELF Header:
Magic: 7f 45 4c 46 01 02 01 00 00 00 00 00 00 00 00 00
Class: ELF32
Data: 2's complement, big endian
Version: 1 (current)
OS/ABI: UNIX - System V
ABI Version: 0
Type: REL (Relocatable file)
Machine: MIPS R3000
Version: 0x1
Entry point address: 0x0
Start of program headers: 0 (bytes into file)
Start of section headers: 348 (bytes into file)
Flags: 0x20821000, 4010, o32, mips3
Size of this header: 52 (bytes)
Size of program headers: 0 (bytes)
Number of program headers: 0
Size of section headers: 40 (bytes)
Number of section headers: 11
Section header string table index: 10
Attribute Section: gnu
File Attributes
Tag_GNU_MIPS_ABI_FP: Hard float (double precision)
MIPS ABI Flags Version: 0
ISA: MIPS2
GPR size: 32
CPR1 size: 32
CPR2 size: 0
FP ABI: Hard float (double precision)
ISA Extension: LSI R4010
ASEs:
None
FLAGS 1: 00000000
FLAGS 2: 00000000
$
Available documentation[1][2] clearly indicates the LSI CW4010 processor
is only backwards compatible with the MIPS R4000 processor as far as the
latter's 32-bit instructions are concerned and consequently can only be
considered a MIPS II ISA implementation (with vendor extensions).
This fixes an LD testsuite failure:
FAIL: MIPS incompatible objects: "-march=r4010 -32" "-march=r4650 -32"
triggered for the `mips-sgi-irix5' and `mips-sgi-irix6' targets.
References:
[1] Paul Cobb, Bob Caulk, Joe Cesana, "The MiniRISC CW4010: A
Superscalar MIPS Processor ASIC Core", LSI Logic, July 1995,
presented at Hot Chips VII, Stanford University, Stanford,
California, August 1995
[2] "MiniRISC MR4010 Superscalar Microprocessor Reference Device", LSI
Logic, November 1996, Doc. No. DB09-000028-00, Order No. C15017
bfd/
* cpu-mips.c (arch_info_struct): Mark the 4010 32-bit.
* elfxx-mips.c (mips_set_isa_flags) <bfd_mach_mips4010>: Set
E_MIPS_ARCH_2 rather than E_MIPS_ARCH_3 in `e_flags'.
(mips_mach_extensions): Mark `bfd_mach_mips4010' as extending
`bfd_mach_mips6000' rather than `bfd_mach_mips4000'.
ld/
* testsuite/ld-mips-elf/lsi-4010-isa.d: New test.
* ld/testsuite/ld-mips-elf/mips-elf.exp: Run the new test.
Don't check the section size in bfd_get_full_section_contents since
the size of a decompressed section may be larger than the file size.
Instead, check file size in _bfd_generic_get_section_contents.
PR binutils/21665
* compress.c (bfd_get_full_section_contents): Don't check the
file size here.
* libbfd.c (_bfd_generic_get_section_contents): Check for and
reject a section whoes size + offset is greater than the size
of the entire file.
(_bfd_generic_get_section_contents_in_window): Likewise.
Maciej W. Rozycki
GDB Administrator
Andrew Waterman
Pedro Alves
Anton Kolesov
Yao Qi
Egeyar Bagcioglu
Jiong Wang
Andreas Arnez
H.J. Lu
Nick Clifton
Tamar Christina
Doug Gilmore
Alan Hayward
Senthil Kumar Selvaraj
Simon Marchi
Alan Modra
Kuan-Lin Chen