Commit Graph

97639 Commits

Author SHA1 Message Date
Jose E. Marchesi
fd0de36e27 bfd: add support for eBPF
This patch adds support to BFD for elf64-bpf, in both little-endian
and big-endian variants.

bfd/ChangeLog:

2019-05-23  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* configure.ac: Add bpf_elf64_le_vec and bpf_elf64_be_vec.
	* configure: Regenerated.
	* Makefile.am (ALL_MACHINES): Add cpu-bpf.lo.
	(ALL_MACHINES_CFILES): Add cpu-bpf.c.
	(BFD64_BACKENDS): Add elf64-bpf.lo.
	(BFD64_BACKENDS_CFILES): Add elf64-bpf.c.
	* Makefile.in (SOURCE_HFILES): Regenerate.
	* config.bfd (targ_cpu): Handle bpf-*-* targets.
	* cpu-bpf.c: New file.
	* elf64-bpf.c: Likewise.
	* targets.c (_bfd_target_vector): Add bpf_elf64_be_vec and
	bpf_elf64_le_vec.
	* archures.c: Define architecture bfd_arch_bpf and machine
	bfd_arch_bpf.
	* reloc.c: Define BFD relocations used by the BPF target.
	* bfd-in2.h: Regenerated.
	* libbfd.h: Likewise.
2019-05-23 19:33:41 +02:00
Jose E. Marchesi
8ebe621240 include: add elf/bpf.h
This patch adds a header file with BPF-specific ELF definitions.  In
particular, the architecture relocations.

include/ChangeLog:

2019-05-23  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* elf/bpf.h: New file.
2019-05-23 19:32:58 +02:00
Jose E. Marchesi
2376c3702e config.guess,config.sub: synchronize with config project master sources
This is to bring in the newly introduced support for bpf-*-* targets.

ChangeLog:

2019-05-23  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* config.guess: Synchronize with config project master sources.
	* config.sub: Likewise.
	* readline/support/config.guess: Likewise.
	* readline/support/config.sub: Likewise.
2019-05-23 18:19:56 +02:00
Alan Modra
82d7a6f4e3 Re: Have the linker report an error if the same script is used twice
git commit 6ec6968b1b results in
... error: linker script file '/usr/local/lib64/libgcc_s.so' appears multiple times
collect2: error: ld returned 1 exit status
FAIL: bootstrap

This patch changes things so that an error is given only when a -T
script or the default script is invoked more than once.  I'm still a
little nervous that we match script file names, not the entire path.

	PR 24576
	* ldfile.c (enum script_open_style): New.
	(struct script_name_list): New.
	(ldfile_open_command_file_1): Take a script_open_style param
	rather than booleans.  Adjust callers.  Only fail when -T or
	default -T script is invoked twice.
	(ldfile_try_open_bfd): Revert last change.
2019-05-23 10:38:45 +09:30
GDB Administrator
016181423b Automatic date update in version.in 2019-05-23 00:00:14 +00:00
Tom Tromey
4ca51187d2 Constify target_ops::follow_exec
I noticed that target_ops::follow_exec took a "char *" parameter,
where "const char *" would be more correct.  This patch changes this
(and related functions) to be constified.

Tested by rebuilding.

gdb/ChangeLog
2019-05-22  Tom Tromey  <tromey@adacore.com>

	* target.c (target_follow_exec): Constify parameter.
	* target-delegates.c: Rebuild.
	* remote.c (remote_target::follow_exec): Constify parameter.
	* infrun.c (follow_exec): Constify parameter.
	* target.h (struct target_ops) <follow_exec>: Constify parameter.
	(target_follow_exec): Likewise.
2019-05-22 15:41:28 -04:00
Tom Tromey
18125b1639 Add "style" proc to the test suite
This adds a "style" helper proc to the test suite, and updates
existing style tests to use it.  Thanks to Sergio for the idea.

Tested on x86-64 Fedora 29.

gdb/testsuite/ChangeLog
2019-05-22  Tom Tromey  <tromey@adacore.com>

	* gdb.base/info-shared.exp (check_info_shared): Use "style".
	* gdb.base/style.exp: Use "style".
	* lib/gdb-utils.exp (style): New proc.
2019-05-22 13:59:52 -04:00
Tom de Vries
af1a8d0387 [gdb/testsuite] Require c++11 for gdb.base/align.exp
When building gdb on ubuntu 16.04 with gcc 5.4.0, and running the gdb
testsuite we run into a failure due align.exp requiring at least c++11.

Fix this by adding -std=c++11.

Tested on x86_64-linux.

gdb/testsuite/ChangeLog:

2019-05-22  Tom de Vries  <tdevries@suse.de>

	* gdb.base/align.exp: Require c++11.
2019-05-22 18:13:04 +02:00
Tom de Vries
e7fe496b1b [gdb/testsuite] Add missing mi_skip_python_tests to py-mi-var-info-path-expression.exp
Fix gdb.python/py-mi-var-info-path-expression.exp for a gdb build without
python support.

gdb/testsuite/ChangeLog:

2019-05-22  Tom de Vries  <tdevries@suse.de>

	PR testsuite/24586
	* gdb.python/py-mi-var-info-path-expression.exp: Call
	mi_skip_python_tests to check if python is supported.
2019-05-22 17:55:44 +02:00
Nick Clifton
6ec6968b1b Have the linker report an error if the same script is used twice.
PR 24576
	* ld/ldfile.c: (ldfile_open_command_file_1): Add new parameter -
	is_script.  If true check that the file has not already been
	parsed as a linker script.
	(ldfile_open_script_file): New function.
	(ldfile_try_open_bfd): Use the new function in place of
	ldfile_open_command_line.
	* ldmain.c (main): Likewise.
	* lexsup.c (parse_args): Use the new function for opening linker
	scripts with the -T option.
	* ldfile.h (ldfile_open_script_file): Add prototype.
2019-05-22 15:58:57 +01:00
Alan Hayward
8fca4da075 AArch64: Treat pauth ops as nops on non-pauth systems
Running an address signed binary through GDB on a non pauth system
gives the following error:
Call Frame Instruction op 45 in vendor extension space is not handled on this architecture.

Instead GDB should ignore the op, treating it as a nop.

Add test case for pauth binaries, regardless of whether the target
supports it.

gdb/ChangeLog:

	* aarch64-tdep.c (aarch64_execute_dwarf_cfa_vendor_op): Treat
	DW_CFA_AARCH64_negate_ra_state as nop on non pauth targets.

gdb/testsuite/ChangeLog:

	* gdb.arch/aarch64-pauth.c: New test.
	* gdb.arch/aarch64-pauth.exp: New file.
2019-05-22 14:35:25 +01:00
Alan Hayward
b706061469 Document gdb.in/gdb.cmd files and debugredirect cli command
Add missing documentation for the debugredirect setting.

Add description and uses of gdb.in/gdb.cmd to the testsuite README.

Mention this in the NEWS file.

gdb/ChangeLog:

	* NEWS: Add debugredirect and testsuite sections.

gdb/doc/ChangeLog:

	* gdb.texinfo (Shell Commands): Add debugredirect.

gdb/testsuite/ChangeLog:

	* README (Re-running Tests Outside The Testsuite): New section.
2019-05-22 13:40:20 +01:00
Simon Cook
0a5954bd5f gdb/riscv: Improve flen length determination
This solves an assertion failure when a remote provides a target
description which only refers to floating point registers by their
hardware name (e.g. f0), rather than their ABI name (e.g. ft0). GDB
assumed that should the floating point register feature be presented,
it would contain a register called ft0.

The floating point length is now instead determined by searching for
the same register, but looking for any of its aliases.

gdb/ChangeLog:

	* riscv-tdep.c (riscv_gdbarch_init): Support determining flen from
	target descriptions using exclusively floating point register name
	aliases.
2019-05-22 13:02:51 +01:00
Jan Vrany
7166f90a77 gdb/doc: Minor formatting fixes in documentation of -complete
gdb/doc/Changelog:

	* gdb.texinfo: Minor formatting fixes.
2019-05-22 12:48:26 +01:00
Alan Modra
b0f4fbf81a ARM STM32L4XX erratum test failure with MALLOC_PERTURB_
* elf32-arm.c (arm_allocate_glue_section_space): Clear section
	contents.
2019-05-22 18:33:39 +09:30
Alan Modra
9ec2f606ce vms-alpha gas segfault
* vms-alpha.c (_bfd_vms_write_etir): Don't attempt further
	processing on "size error in section".
2019-05-22 18:33:39 +09:30
Alan Modra
4decd602d8 bfdtest1 segfaults on hppa-hp-hpux10
The archive element cache needs tidying when closing an archive element.
This patch fixes these failures:
-FAIL: ar long file names (bfdtest1)
-FAIL: ar thin archive (bfdtest1)
-FAIL: ar thin archive with nested archive (bfdtest1)

	* som.c (som_bfd_free_cached_info): Call
	_bfd_generic_close_and_cleanup.
2019-05-22 18:33:39 +09:30
John Darrington
22c6ccb89e S12Z: GAS: New option --mdollar-hex.
This option (also implied by --traditional) causes '$' to introduce
literal hexadecimal constants, rather than the modern convention '0x'.

gas/
	* config/tc-s12z.c (s12z_strtol): New function. (md_show_usage): Update.
	(md_parse_option): new case OPTION_DOLLAR_HEX. (s12z_init_after_args):
	(<global>): Use s12z_strtol instead of strtol.
	* doc/c-s12z.texi (S12Z Options): Document new option -mdollar-hex.
	* testsuite/gas/s12z/dollar-hex.d: New file.
	* testsuite/gas/s12z/dollar-hex.s: New file.
	* testsuite/gas/s12z/s12z.exp: Add them.
2019-05-22 08:13:36 +02:00
GDB Administrator
a7df56e5f8 Automatic date update in version.in 2019-05-22 00:00:17 +00:00
Andrew Burgess
dc42e902cc gdb/fortran: Handle gdbarch_floatformat_for_type returning nullptr
In this commit:

  commit 34d11c682f
  Date:   Fri May 3 15:23:55 2019 +0100

      gdb/fortran: Use floatformats_ia64_quad for fortran 16-byte floats

GDB was changed such that the Fortran's 16-byte float format was
obtained by calling gdbarch_floatformat_for_type instead of just using
gdbarch_long_double_format as it was before.

The problem with this default_floatformat_for_type can return NULL in
some cases, and the code introduced in 34d11c682f didn't consider
this.

This commit introduces several alternative strategies for finding a
suitable 16-byte floating point type.  First GDB calls
gdbarch_floatformat_for_type (this was what 34d11c682f added), if this
returns null GDB will use gdbarch_long_double_format if it is the
correct size (this was the format used before 34d11c682f).  Finally,
if neither of the above provides a suitable type then GDB will create
a new dummy type.

This final dummy type is unlikely to provide an correct debug
experience as far as examining the 16-byte floats, but it should
prevent GDB crashing.

gdb/ChangeLog:

	PR gdb/18644:
	* f-lang.c (build_fortran_types): Handle the case where
	gdbarch_floatformat_for_type returns a nullptr.
2019-05-21 23:46:07 +01:00
Faraz Shahbazker
b474a2022d MIPS/LD: Reject tprel_hi and tprel_lo relocations in shared library
bfd/
	* elfxx-mips.c (_bfd_mips_elf_check_relocs): Generate error
	for TLS_TPREL_HI16(/LO16) relocations in shared library.

ld/
	* testsuite/ld-mips-elf/pic-reloc-5.s: Add tests for
	%tprel_hi and %tprel_lo relocations.
	* testsuite/ld-mips-elf/pic-reloc-6.s: Likewise.
	* testsuite/ld-mips-elf/pic-reloc-5.d: Update accordingly.
	* testsuite/ld-mips-elf/pic-reloc-6.d: Likewise.
	* testsuite/ld-mips-elf/pic-reloc-tls.ld: New test linker
	script file.
2019-05-21 11:55:08 -07:00
Faraz Shahbazker
304f09d0d4 MIPS/LD: Fix memory fault linking non-PIC object in to shared library
bfd/
	* elfxx-mips.c (_bfd_mips_elf_check_relocs): Add NULL pointer
	checks.  Search the RELA table for n64 relocations.

ld/
	* testsuite/ld-mips-elf/pic-reloc-5.d: New test.
	* testsuite/ld-mips-elf/pic-reloc-6.d: New test.
	* testsuite/ld-mips-elf/pic-reloc-7.d: New test.
	* testsuite/ld-mips-elf/pic-reloc-5.s: New test source.
	* testsuite/ld-mips-elf/pic-reloc-6.s: New test source.
	* testsuite/ld-mips-elf/pic-reloc-7.s: New test source.
	* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
2019-05-21 11:55:08 -07:00
Sudakshina Das
ba6cd17f0a [binutils, ARM] <spec_reg> changes for VMRS and VMSR instructions
This patch makes changes to the <spec_reg> operand for VMRS and VMSR
instructions as per the Armv8.1-M Mainline.
New <spec_reg> options to support are:

0b0010: FPSCR_nzcvqc, access to FPSCR condition and saturation flags.
0b1100: VPR, privileged only access to the VPR register.
0b1101: P0, access to VPR.P0 predicate fields
0b1110: FPCXT_NS, enables saving and restoring of Non-secure floating
point context.
0b1111: FPCXT_S, enables saving and restoring of Secure floating point
context

*** gas/ChangeLog ***

2019-05-21  Sudakshina Das  <sudi.das@arm.com>

	* config/tc-arm.c (parse_operands): Update case OP_RVC to
	parse p0 and P0.
	(do_vmrs): Add checks for valid operands with respect to
	cpu and fpu options.
	(do_vmsr): Likewise.
	(reg_names): New reg_names for FPSCR_nzcvqc, VPR, FPCXT_NS
	and FPCXT_S.
	* testsuite/gas/arm/armv8_1-m-spec-reg.d: New.
	* testsuite/gas/arm/armv8_1-m-spec-reg.s: New.
	* testsuite/gas/arm/armv8_1-m-spec-reg-bad1.d: New.
	* testsuite/gas/arm/armv8_1-m-spec-reg-bad2.d: New.
	* testsuite/gas/arm/armv8_1-m-spec-reg-bad3.d: New.
	* testsuite/gas/arm/armv8_1-m-spec-reg-bad1.l: New.
	* testsuite/gas/arm/armv8_1-m-spec-reg-bad2.l: New.
	* testsuite/gas/arm/armv8_1-m-spec-reg-bad3.l: New.
	* testsuite/gas/arm/vfp1xD.d: Updated to allow new valid values.
	* testsuite/gas/arm/vfp1xD_t2.d: Likewise.

*** opcodes/ChangeLog ***

2019-05-21  Sudakshina Das  <sudi.das@arm.com>

	* arm-dis.c (coprocessor_opcodes): New instructions for VMRS
	and VMSR with the new operands.
2019-05-21 18:20:48 +01:00
Sudakshina Das
e39c1607a2 [binutils, Arm] Add support for conditional instructions in Armv8.1-M Mainline
This patch adds the following instructions which are part of the
Armv8.1-M Mainline:
CINC
CINV
CNEG
CSINC
CSINV
CSNEG
CSET
CSETM
CSEL

gas/ChangeLog:

2019-05-21  Sudakshina Das  <sudi.das@arm.com>

	* config/tc-arm.c (TOGGLE_BIT): New.
	(T16_32_TAB): New entries for cinc, cinv, cneg, csinc,
	csinv, csneg, cset, csetm and csel.
	(operand_parse_code): New OP_RR_ZR.
	(parse_operand): Handle case for OP_RR_ZR.
	(do_t_cond): New.
	(insns): New instructions for cinc, cinv, cneg, csinc,
	csinv, csneg, cset, csetm, csel.
	* testsuite/gas/arm/armv8_1-m-cond-bad.d: New test.
	* testsuite/gas/arm/armv8_1-m-cond-bad.l: New test.
	* testsuite/gas/arm/armv8_1-m-cond-bad.s: New test.
	* testsuite/gas/arm/armv8_1-m-cond.d: New test.
	* testsuite/gas/arm/armv8_1-m-cond.s: New test.

opcodes/ChangeLog:

2019-05-21  Sudakshina Das  <sudi.das@arm.com>

	* arm-dis.c (enum mve_instructions): New enum
	for csinc, csinv, csneg, csel, cset, csetm, cinv, cinv
	and cneg.
	(mve_opcodes): New instructions as above.
	(is_mve_encoding_conflict): Add cases for csinc, csinv,
	csneg and csel.
	(print_insn_mve): Accept new %<bitfield>c and %<bitfield>C.
2019-05-21 18:15:13 +01:00
Sudakshina Das
23d00a419f [binutils, Arm] Add support for shift instructions in MVE
This patch adds the following instructions which are part of
Armv8.1-M MVE:
ASRL (imm)
ASRL (reg)
LSLL (imm)
LSLL (reg)
LSRL
SQRSHRL
SRQSHR
SQSHLL
SQSHL
SRSHRL
SRSHR
UQRSHLL
UQRSHL
UQSHLL
UQSHL
URSHLL
URSHL

*** gas/ChangeLog ***

2019-05-21  Sudakshina Das  <sudi.das@arm.com>

	* config/tc-arm.c (operand_parse_code): New entries for
	OP_RRnpcsp_I32 (register or integer operands).
	(do_mve_scalar_shift): New.
	(insns): New instructions for asrl, lsll, lsrl, sqrshrl, sqrshr, sqshl
	sqshll, srshr, srshrl, uqrshll, uqrshl, uqshll, uqshl, urshrl and urshr.
	* testsuite/gas/arm/mve-shift.d: New.
	* testsuite/gas/arm/mve-shift.s: New.
	* testsuite/gas/arm/mve-shift-bad.d: New.
	* testsuite/gas/arm/mve-shift-bad.s: New.
	* testsuite/gas/arm/mve-shift-bad.l: New.

*** opcodes/ChangeLog ***

2019-05-21  Sudakshina Das  <sudi.das@arm.com>

	* arm-dis.c (emun mve_instructions): Updated for new instructions.
	(mve_opcodes): New instructions for asrl, lsll, lsrl, sqrshrl,
	sqrshr, sqshl, sqshll, srshr, srshrl, uqrshll, uqrshl, uqshll,
	uqshl, urshrl and urshr.
	(is_mve_okay_in_it): Add new instructions to TRUE list.
	(is_mve_unpredictable): Add cases for UNPRED_R13 and UNPRED_R15.
	(print_insn_mve): Updated to accept new %j,
	%<bitfield>m and %<bitfield>n patterns.
2019-05-21 18:11:08 +01:00
Faraz Shahbazker
cd4797ee05 MIPS/gas: Reject $0 as source register for DAUI instruction
The MIPS64R6 TRM requires that the source register for DAUI
not be r0.

[1] "MIPS Architecture for Programmers Volume II-A: The MIPS64
    Instruction Set Manual", Imagination Technologies Ltd., Document
    Number: MD00087, Revision 6.06, December 15, 2016, Section 3.2
    "Alphabetical List of Instructions", pp. 67-68.

gas/
	* testsuite/gas/mips/r6-branch-constraints.s: Rename to ...
	* testsuite/gas/mips/r6-reg-constraints.s: this and add test
	case for DAUI.
	* testsuite/gas/mips/r6-branch-constraints.l: Rename to ...
	* testsuite/gas/mips/r6-reg-constraints.l: this and add test
	for DAUI.
	* testsuite/gas/mips/mips.exp: Rename test from
	r6-branch-constraints to r6-reg-constraints.

opcodes/
	* mips-opc.c (mips_builtin_opcodes): Change source register
	constraint for DAUI.
2019-05-21 09:28:24 -07:00
Matthew Fortune
3734320dc0 [MIPS] Add generation of PLT entries with compact jumps for MIPS R6
Add a new option to get the linker to emit PLTs that use compact
branches instead of delay slot branches.

bfd/
	* elfxx-mips.c (LA25_BC): New macro.
	(mips_elf_link_hash_table)<compact_branches>: New field.
	(STUB_JALRC): New macro.
	(mipsr6_o32_exec_plt0_entry_compact): New array.
	(mipsr6_n32_exec_plt0_entry_compact): Likewise.
	(mipsr6_n64_exec_plt0_entry_compact): Likewise.
	(mipsr6_exec_plt_entry_compact): Likewise.
	(mips_elf_create_la25_stub): Use BC instead of J for stubs
	when compact_branches is true.
	(_bfd_mips_elf_finish_dynamic_symbol): Choose the compact
	PLT for MIPSR6 with compact_branches.  Do not reorder the
	compact branches PLT.  Switch the lazy stub for MIPSR6
	with compact_branches to use JALRC.
	(mips_finish_exec_plt): Choose the compact PLT0 for MIPSR6
	when compact_branches is true.
	(_bfd_mips_elf_compact_branches): New function.
	* elfxx-mips.h (_bfd_mips_elf_compact_branches): New prototype.

ld/
	* emultempl/mipself.em (compact_branches): New static variable.
	(mips_create_output_section_statements): Call
	_bfd_mips_elf_compact_branches.
	(PARSE_AND_LIST_PROLOGUE): Add OPTION_COMPACT_BRANCHES and
	OPTION_NO_COMPACT_BRANCHES.
	(PARSE_AND_LIST_LONGOPTS): Add compact-branches,
	no-compact-branches.
	(PARSE_AND_LIST_OPTIONS): Add --compact-branches,
	--no-compact-branches.
	(PARSE_AND_LIST_ARGS_CASES): Handle the above.
	* ld.texinfo: Document --compact-branches, --no-compact-branches.
	* testsuite/ld-mips-elf/pic-and-nonpic-1-r6.dd: New test.
	* testsuite/ld-mips-elf/pic-and-nonpic-1-r6.nd: New test.
	* testsuite/ld-mips-elf/pic-and-nonpic-3a-r6.dd: New test.
	* testsuite/ld-mips-elf/pic-and-nonpic-3a-r6.gd: New test.
	* testsuite/ld-mips-elf/pic-and-nonpic-1a-r6.s: New test source.
	* testsuite/ld-mips-elf/pic-and-nonpic-3a-r6.s: New test source.
	* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
2019-05-21 09:22:28 -07:00
Tamar Christina
6467207116 AArch64: Fix -Werror on build
This patch fixes a hardcoded `l` specifier on a `bfd_signed_vma`.
Instead this now uses BFD_VMA_FMT which fixes the build on 32 bit
hosts.

Committed under the obvious rule.

bfd/ChangeLog:

	PR ld/24373
	* elfnn-aarch64.c (_bfd_aarch64_erratum_843419_branch_to_stub):
	Fix print formatter.
2019-05-21 17:16:09 +01:00
Tom de Vries
fb7806c7a4 [gdb/cli] Fix use of uninitialized variable in complete_command
When building gdb on ubuntu 16.04 with gcc 5.4.0, and running the gdb
testsuite we run into:
...
FAIL: gdb.linespec/explicit.exp: complete after -line: \
  cmd complete "b -line argument " (timeout)
...

The failure is reproducible outside the testsuite like this:
...
$ gdb -q build/gdb/testsuite/outputs/gdb.linespec/explicit/explicit \
  -ex "complete b -line argument"
Reading symbols from \
  build/gdb/testsuite/outputs/gdb.linespec/explicit/explicit...
terminate called after throwing an instance of 'std::length_error'
  what():  basic_string::_M_create
  Aborted (core dumped)
...

The problem is here in complete_command:
...
  completion_result result = complete (arg, &word, &quote_char);

  std::string arg_prefix (arg, word - arg);

  if (result.number_matches != 0)
...
The problem is that the word variable is not initialized when
result.number_matches == 0, but the variable is still used in the arg_prefix
initialization.

Fix this by guarding the arg_prefix initialization with the
'result.number_matches != 0' test.

Build and tested on x86_64-linux.

gdb/ChangeLog:

2019-05-21  Tom de Vries  <tdevries@suse.de>

	PR cli/24587
	* cli/cli-cmds.c (complete_command): Fix use of unitialized variable.
2019-05-21 16:32:41 +02:00
Tom de Vries
669d046839 [gdb/testsuite] Require c++11 where necessary
When building gdb on ubuntu 16.04 with gcc 5.4.0, and running the gdb
testsuite we run into failures due test-cases requiring at least c++1.

Fix this by adding -std=c++11 to those test-cases.

Tested on x86_64-linux.

gdb/testsuite/ChangeLog:

2019-05-21  Tom de Vries  <tdevries@suse.de>

	* gdb.arch/amd64-eval.exp: Require c++11.
	* gdb.base/max-depth.exp: Same.
	* gdb.compile/compile-cplus-array-decay.exp: Same.
	* gdb.cp/meth-typedefs.exp: Same.
	* gdb.cp/subtypes.exp: Same.
	* gdb.cp/temargs.exp: Same.
2019-05-21 16:32:41 +02:00
Andre Vieira
8fe9a076ad [GAS, Arm] PR24559: Fix pseudo load-operations for Armv8-M Baseline
gas/ChangeLog:
2019-05-21  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	PR 24559
	* config/tc-arm.c (move_or_literal_pool): Set size_req to 0
	for MOVW replacement.
	* testsuite/gas/arm/load-pseudo.s: New test input.
	* testsuite/gas/arm/m0-load-pseudo.d: New test.
	* testsuite/gas/arm/m23-load-pseudo.d: New test.
	* testsuite/gas/arm/m33-load-pseudo.d: New test.
2019-05-21 14:53:49 +01:00
Andre Vieira
e6f65e7573 [binutils][Arm] Fix Branch Future relocation handling and testisms
bfd/ChangeLog:
2019-05-21  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	PR/target 24460
	* elf32-arm.c (get_value_helper): Remove.
	(elf32_arm_final_link_relocate): Fix branch future relocations.

gas/ChangeLog:
2019-05-21  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	* testsuite/gas/arm/armv8_1-m-bf.d: Allow different branch target naming
	conventions.
	* testsuite/gas/arm/armv8_1-m-bfl.d: Likewise.
	* testsuite/gas/arm/armv8_1-m-bfcsel.d: Likewise.
	* testsuite/gas/arm/armv8_1-m-loloop.d: Likewise.
	* testsuite/gas/arm/armv8_1-m-bf-rel.d: Skip for vxworks.
	* testsuite/gas/arm/armv8_1-m-bf-rela.d: New test.
	* testsuite/gas/arm/armv8_1-m-bfl-rel.d: Skip for vxworks.
	* testsuite/gas/arm/armv8_1-m-bfl-rela.d: New test.

ld/ChangeLog:
2019-05-21  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	* testsuite/ld-arm/arm-elf.exp: Add tests
	* testsuite/ld-arm/bfs-0.s: New test.
	* testsuite/ld-arm/bfs-1.s: New test.
	* testsuite/ld-arm/branch-futures.d: New test.
2019-05-21 14:53:49 +01:00
Tamar Christina
739b5c9c77 AArch64: Implement choice between Cortex-A53 erratum workarounds. (PR ld/24373)
The Cortex-A53 erratum currently has two ways it can resolve the erratum when
using the flag --fix-cortex-a53-843419:

1) If the address is within the range of an ADR instruction it rewrites the ADRP
   into an ADR, and those doesn't need the use of a veneer.

2) If the address is not within range, it adds a branch to a veneer which will
   execute the final bit of the erratum workaround and branch back to the call
   site.

When we do this we always generate the veneers and we always align the size of
the text section to 4KB.  This is because we only know which workaround we can
use after all linking has finished and all addresses are known.  This means even
though the veneers are not used, we still generate the section and we still
change the size of the input section.

This is problematic for small memory devices as this would require the user to
take about a ~4KB hit in memory even though it's not even used.

Since there's no real way to restart the linking process from the final write
phase this patch solves the issue by allowing the user more control over which
erratum workaround gets used.

Concretely this changes the option --fix-cortex-a53-843419 to take optional
arguments --fix-cortex-a53-843419[=full|adr|adrp]

- full (default): Use both ADRP and ADR workaround. This is equivalent to not
		  specifying any options and is the default behavior before this
		  patch.

- adr: Only use the ADR workaround, this will not cause any increase in binary
       size but linking will fail if the referenced address is out of range of
       an ADR instruction.

- adrp: Use only the ADRP workaround, this will never rewrite your ADRP.

In the cases where the user knows how big their binaries are the `adr` option
would prevent the unneeded overhead.

bfd/ChangeLog:

	PR ld/24373
	* bfd-in.h (enum erratum_84319_opts): New
	(bfd_elf64_aarch64_set_options, bfd_elf32_aarch64_set_options): Change
	int to enum erratum_84319_opts.
	* bfd-in2.h: Regenerate.
	* elfnn-aarch64.c (struct elf_aarch64_link_hash_table): Change
	fix_erratum_843419 to use new enum, remove fix_erratum_843419_adr.
	(_bfd_aarch64_add_stub_entry_after): Conditionally create erratum stub.
	(aarch64_size_one_stub): Conditionally size erratum 843419 stubs.
	(_bfd_aarch64_resize_stubs): Amend comment.
	(elfNN_aarch64_size_stubs): Don't generate stubs when no workaround
	requested.
	(bfd_elfNN_aarch64_set_options): Use new fix_erratum_843419 enum.
	(_bfd_aarch64_erratum_843419_branch_to_stub): Implement selection of
	erratum workaround.
	(clear_erratum_843419_entry): Update erratum conditional.

ld/ChangeLog:

	PR ld/24373
	* emultempl/aarch64elf.em (PARSE_AND_LIST_LONGOPTS): Add optional args
	to flags.
	* NEWS: Add changes to flag.
	(PARSE_AND_LIST_OPTIONS): Update help descriptions.
	(PARSE_AND_LIST_ARGS_CASES): Add new options to parser.
	* testsuite/ld-aarch64/aarch64-elf.exp: Add new run_dump_tests.
	* testsuite/ld-aarch64/erratum843419-adr.d: New test.
	* testsuite/ld-aarch64/erratum843419-adrp.d: New test.
	* testsuite/ld-aarch64/erratum843419-far-adr.d: New test.
	* testsuite/ld-aarch64/erratum843419-far-full.d: New test.
	* testsuite/ld-aarch64/erratum843419-far.s: New test.
	* testsuite/ld-aarch64/erratum843419-full.d: New test.
	* testsuite/ld-aarch64/erratum843419-near.s: New test.
	* testsuite/ld-aarch64/erratum843419-no-args.d: New test.
2019-05-21 13:05:22 +01:00
Tamar Christina
fab7c86ea4 AArch64: Add SVE DWARF registers
The SVE DRAWF register names are missing from binutils, this may cause objdump
and readelf to ignore certain DRAWF output as the registers are unknown (most
notably CIEs).

This patch adds the registers in accordance to the "DWARF for ARM(r) 64-bit
Architecture (AARch64) with SVE support" documentation [1].

[1] https://developer.arm.com/docs/100985/latest/dwarf-for-the-arm-64-bit-architecture-aarch64-with-sve-support

binutils/ChangeLog:

	* dwarf.c (dwarf_regnames_aarch64): Add SVE registers.
	* testsuite/binutils-all/aarch64/sve-dwarf-registers.d: New test.
	* testsuite/binutils-all/aarch64/sve-dwarf-registers.s: New test.
2019-05-21 11:05:22 +01:00
Alan Hayward
ce3ebcaae3 testsuite: Mark the kill in gdbserver_run as optional
This matches the kill in gdb_file_cmd, and ensures that the command is not
sent to the gdb.in file.

When gdb.in is used as a batch file, any kill commands run before the target
is started will cause gdb to stop processing commands.

gdb/testsuite/ChangeLog:

	* lib/gdbserver-support.exp (gdbserver_run): Mark kill as optional.
2019-05-21 10:42:24 +01:00
John Darrington
e2d1595531 GAS: Replace macro LITERAL_PREFIXDOLLAR_HEX with a runtime value.
In an upcoming commit, I need to be able to set the prefix used
to introduce hexadecimal literal constants using a command line
flag.   This is not currently possible, because the switch which
determines this (LITERAL_PREFIXDOLLAR_HEX) is a macro set at
build time.

This change substitutes it for a variable to be set at start up.

gas/ChangeLog:
    * expr.c (literal_prefix_dollar_hex): New variable.
    (operand)[case '$']: Use the new variable instead of the old macro.
    Also, move this instance of "case '$'" next to the other one, and
    enable it only in the complementary proprocessor case.
    * expr.h (literal_prefix_dollar_hex): Declare it.
    * config/tc-epiphany.c (md_begin): Assign literal_prefix_dollar_hex.
    * config/tc-ip2k.c:      ditto
    * config/tc-mt.c:        ditto
    * config/tc-epiphany.h (LITERAL_PREFIXDOLLAR_HEX): Remove macro definition.
    * config/tc-ip2k.h:      ditto
    * config/tc-mt.h:        ditto
2019-05-21 10:29:15 +02:00
Senthil Kumar Selvaraj
7622049e0b Fix PR 24571 - Relaxation does not shorten jmp or call to target at pc-relative range boundary
The range check done to transform an absolute call/jump to a pc-relative one is
off-by-one, and that causes this shortening optimization to be missed if the
branch target is right at the range boundary.

In the non-shrinkable case, the range is what is mentioned in the ISA - -4094
bytes in the backward direction, and 4096 bytes in the positive direction.

In the shrinkable case, the forward jump range increases by two bytes (deleted
because of the shortening from call/jmp to rcall/rjmp), and therefore, the
range is -4094 in the reverse, and 4098 in the positive direction.

Fix the ranges for !shrinkable and shrinkable cases, and add a test caes to
ensure jumps to max forward and backward ranges get relaxed to rjmp.
2019-05-21 12:48:06 +05:30
Senthil Kumar Selvaraj
338ba75534 Fix PR 24564 - link fails for some rcalls/rjmps with wraparound
The current code to compute relative distance in the wrap around case does not
handle the edge case of the target (after adjusting for implicit PC increment)
being exactly half of the wrap around distance. This patch fixes that and adds a
testcase.

The range for a forward relative jump call is 4096 bytes ((2 * 2047) + (2 bytes
for the implicit PC increment)). If the target of the jump is at a distance of
4098 bytes, it is out of range for a forward jump - however, a backward jump can
still reach that address if pmem-wrap-around is 8192.

Assume address 0 has rjmp to address 4098. With a wrap around of 8192 and
*without* adjusting for the implicit PC increment of 2 bytes, rjmp .-4096 will
jump to address 4096 (wrap around at 8192 and decreasing addresses from then
on). Adjusting 2 bytes for the implicit PC increment, the actual target is 4098.

avr_relative_distance_considering_wrap_around though, does the wrap around only
if the passed in distance is less than half of the wrap around distance. In this
case, it is exactly equal to half (original distance 4098, adjusted distance of
4096 and wraparound of 8192), and the bypassed wrap around causes the reloc
overflow error.

Fix by wrapping around even if adjusted distance is equal to half of wrap around
distance.
2019-05-21 12:34:22 +05:30
John Darrington
da0523c666 Revert "GAS: Replace macro LITERAL_PREFIXDOLLAR_HEX with a runtime value."
This reverts commit cffc205c9e.
2019-05-21 07:30:05 +02:00
GDB Administrator
302d65e0b2 Automatic date update in version.in 2019-05-21 00:00:28 +00:00
Faraz Shahbazker
d87343802b [MIPS] PR gas/14798: Limit IRIX5 specific default typing to IRIX targets
On IRIX 5, every global symbol that is not explicitly labelled as
being a function is assumed to be an object.  There is no reason
why IRIX behaviour should extend to all MIPS targets, so limit this
to only IRIX targets.

gas/
	PR 14798
	* config/tc-mips.c (s_mips_globl): Only treat symbols that are
	not explicitly labelled as BSF_OBJECTs for IRIX targets.
	* testsuite/gas/mips/pr14798.s: New test source.
	* testsuite/gas/mips/pr14798-irix.d: New test.
	* testsuite/gas/mips/pr14798.d: Likewise.
	* testsuite/gas/mips/mips.exp: Run the new tests.

binutils/
	PR 14798
	* testsuite/binutils-all/readelf.ss-mips: Update reference output.
	* testsuite/binutils-all/readelf.ss-tmips: Likewise.

ld/
	PR 14798
	* testsuite/ld-mips-elf/reloc-6a.s: Specify .text section for
	global code symbols.
	* testsuite/ld-mips-elf/reloc-6b.s: Likewise.
2019-05-20 11:08:23 -07:00
John Darrington
cffc205c9e GAS: Replace macro LITERAL_PREFIXDOLLAR_HEX with a runtime value.
In an upcoming commit, I need to be able to set the prefix used
to introduce hexadecimal literal constants using a command line
flag.   This is not currently possible, because the switch which
determines this (LITERAL_PREFIXDOLLAR_HEX) is a macro set at
build time.

This change substitutes it for a variable to be set at start up.

gas/ChangeLog:
* expr.c (literal_prefix_dollar_hex): New variable.
(operand)[case '$']: Use the new variable instead of the old macro.
* expr.h (literal_prefix_dollar_hex): Declare it.
* config/tc-epiphany.c (md_begin): Assign literal_prefix_dollar_hex.
* config/tc-ip2k.c:      ditto
* config/tc-mt.c:        ditto
* config/tc-epiphany.h (LITERAL_PREFIXDOLLAR_HEX): Remove macro definition.
* config/tc-ip2k.h:      ditto
* config/tc-mt.h:        ditto
2019-05-20 19:54:31 +02:00
Nick Clifton
efa9760914 Correct the alpha sorting of the short options in the usage description of the gprof program.
PR 24569
	* gprof.c (usage): Restore alphabetical sorting to short options
	list.  Add -r, -R and -t short options to the list.
	(main): Add comment about -g and -G possibly being deprecated.
	* gprof.texi: Update usage example in line with changes above.
2019-05-20 17:17:24 +01:00
Nick Clifton
999b073bdb Updated translations for various binutils subdirectories.
bfd	* po/fr.po: Updated French translation.
binutils* po/ca.po: Updated Catalan translation.
gprof	* po/de.po: Updated German translation.
opcodes	* po/fr.po: Updated French translation.
2019-05-20 16:18:19 +01:00
GDB Administrator
2a912e42d7 Automatic date update in version.in 2019-05-20 00:00:22 +00:00
GDB Administrator
1aea5580c4 Automatic date update in version.in 2019-05-19 00:01:13 +00:00
Andrew Burgess
34d11c682f gdb/fortran: Use floatformats_ia64_quad for fortran 16-byte floats
PR gdb/18644 is caused by GDB using the wrong floating point format
for gfortran's 16-byte floating point type, including when the 16-byte
float is used as the component of a 32-byte complex type.

This commit addresses the issue in two places, first in i386-tdep.c,
there is already some code to force the use of floatformats_ia64_quad
for specific named types, this is extended to include the type names
that gfortran uses for its 16-byte floats.

Second, the builtin 16-byte float type (in f-lang.c) is changed so it
no longer uses gdbarch_long_double_format.  On i386 this type is not
16-bytes, but is smaller, this is not what gfortran is expecting.
Instead we now use gdbarch_floatformat_for_type and ask for a
16-byte (128 bit) type using the common gfortran type name.  This is
then spotted in i386-tdep.c (thanks to the first change above) and we
again get floatformats_ia64_quad returned.

This patch was tested on X86-64/GNU-Linux using '--target_board=unix'
and '--target_board=unix/-m32', and resolves all of the known failures
associated with PR gdb/18644.  I've also added the test case from the
original bug report.

gdb/ChangeLog:

	PR gdb/18644:
	* f-lang.c (build_fortran_types): Use floatformats_ia64_quad for
	16-byte floats.
	* i386-tdep.c (i386_floatformat_for_type): Use
	floatformats_ia64_quad for the 16-byte floating point component
	within a fortran 32-byte complex number.

gdb/testsuite/ChangeLog:

	PR gdb/18644
	* gdb.fortran/complex.exp: Remove setup_kfail calls.
	* gdb.fortran/printing-types.exp: Add new test.
	* gdb.fortran/printing-types.f90: Add 16-byte real variable for
	testing.
	* gdb.fortran/type-kinds.exp (test_cast_1_to_type_kind): Remove
	setup_kfail call.
2019-05-18 09:49:02 +01:00
Andrew Burgess
122cf0f2d9 gdb: Add constructor to struct cu_partial_die_info
Adds a constructor to 'struct cu_partial_die_info' and disables the
default constructor, preventing partially initialised instances from
being created.

Update 'find_partial_die' to return a const struct.

Users of 'find_partial_die' are updated to take account of the above
two changes.

There should be no user visible changes after this commit.

gdb/ChangeLog:

	* dwarf2read.c (struct cu_partial_die_info): Add constructor,
	delete default constructor.
	(find_partial_die): Update to return const struct.
	(partial_die_parent_scope): Move variable declaration into scope
	of its use and change its type to auto.
	(guess_partial_die_structure_name): Likewise.
	(partial_die_info::fixup): Likewise.
2019-05-18 09:46:29 +01:00
John Darrington
3e2cf42fe5 S12Z (doc): Minor improvements to text and formatting.
gas/
	* doc/c-s12z.texi: Miscellaneous adjustments.
2019-05-18 08:35:18 +02:00
GDB Administrator
1c8ce0ebbe Automatic date update in version.in 2019-05-18 00:00:20 +00:00