The -march=armv5 and armv5e options have been deprecated in GCC 7 [1].
This patch removes support for them.
It's mostly mechanical stuff. The functionality that was previously
gated on arm_arch5 is now gated on arm_arch5t and the functionality
that was gated on arm_arch5e is now gated on arm_arch5te.
A path in TARGET_OS_CPP_BUILTINS for VxWorks is now unreachable and
therefore is deleted.
References to armv5 and armv5e are deleted/updated throughout the
source tree and testsuite.
Bootstrapped and tested on arm-none-linux-gnueabihf.
Also built a cc1 for arm-wrs-vxworks as a sanity check.
* config/arm/arm-cpus.in (armv5, armv5e): Delete features.
(armv5t, armv5te): New features.
(ARMv5, ARMv5e): Delete fgroups.
(ARMv5t, ARMv5te): Adjust for above changes.
(ARMv6m): Likewise.
(armv5, armv5e): Delete arches.
* config/arm/arm.md (*call_reg_armv5): Use arm_arch5t instead of
arm_arch5.
(*call_reg_arm): Likewise.
(*call_value_reg_armv5): Likewise.
(*call_value_reg_arm): Likewise.
(*call_symbol): Likewise.
(*call_value_symbol): Likewise.
(*sibcall_insn): Likewise.
(*sibcall_value_insn): Likewise.
(clzsi2): Likewise.
(prefetch): Likewise.
(define_split and define_peephole2 dependent on arm_arch5):
Likewise.
* config/arm/arm.h (TARGET_LDRD): Use arm_arch5te instead of
arm_arch5e.
(TARGET_ARM_QBIT): Likewise.
(TARGET_DSP_MULTIPLY): Likewise.
(enum base_architecture): Delete BASE_ARCH_5, BASE_ARCH_5E.
(arm_arch5, arm_arch5e): Delete.
(arm_arch5t, arm_arch5te): Declare.
* config/arm/arm.c (arm_arch5, arm_arch5e): Delete.
(arm_arch5t): Declare.
(arm_option_reconfigure_globals): Update for the above.
(arm_options_perform_arch_sanity_checks): Update comment, replace
use of arm_arch5 with arm_arch5t.
(use_return_insn): Likewise.
(arm_emit_call_insn): Likewise.
(output_return_instruction): Likewise.
(arm_final_prescan_insn): Likewise.
(arm_coproc_builtin_available): Likewise.
* config/arm/arm-c.c (arm_cpu_builtins): Replace arm_arch5 and
arm_arch5e with arm_arch5t and arm_arch5te.
* config/arm/arm-protos.h (arm_arch5, arm_arch5e): Delete.
(arm_arch5t, arm_arch5te): Declare.
* config/arm/arm-tables.opt: Regenerate.
* config/arm/t-arm-elf: Remove references to armv5, armv5e.
* config/arm/t-multilib: Likewise.
* config/arm/thumb1.md (*call_reg_thumb1_v5): Check arm_arch5t
instead of arm_arch5.
(*call_reg_thumb1): Likewise.
(*call_value_reg_thumb1_v5): Likewise.
(*call_value_reg_thumb1): Likewise.
* config/arm/vxworks.h (TARGET_OS_CPP_BUILTINS): Remove now
unreachable path.
* doc/invoke.texi (ARM Options): Remove references to armv5, armv5e.
* gcc.target/arm/pr40887.c: Update comment.
* lib/target-supports.exp: Don't generate effective target checks
and related helpers for armv5. Update comment.
* gcc.target/arm/armv5_thumb_isa.c: Delete.
* gcc.target/arm/di-longlong64-sync-withhelpers.c: Update effective
target check and options.
* config/arm/libunwind.S: Update comment relating to armv5.
From-SVN: r260362
[libgcc]
2018-04-20 Michael Meissner <meissner@linux.ibm.com>
PR target/85456
* config/rs6000/_powikf2.c: New file. Add support for the
__builtin_powil function when long double is IEEE 128-bit floating
point.
* config/rs6000/float128-ifunc.c (__powikf2_resolve): Add
__powikf2 support.
(__powikf2): Likewise.
* config/rs6000/quad-float128.h (__powikf2_sw): Likewise.
(__powikf2_hw): Likewise.
(__powikf2): Likewise.
* config/rs6000/t-float128 (fp128_ppc_funcs): Likewise.
* config/rs6000/t-float128-hw (fp128_hw_func): Likewise.
(_powikf2-hw.c): Likewise.
[gcc]
2018-04-20 Michael Meissner <meissner@linux.ibm.com>
PR target/85456
* config/rs6000/rs6000.c (init_float128_ieee): Add support to call
__powikf2 when long double is IEEE 128-bit.
[gcc/testsuite]
2018-04-20 Michael Meissner <meissner@linux.ibm.com>
PR target/85456
* gcc.target/powerpc/pr85456.c: New test.
From-SVN: r259533
When -fcf-protection -mcet is used, I got
FAIL: g++.dg/eh/sighandle.C
(gdb) bt
#0 _Unwind_RaiseException (exc=exc@entry=0x416ed0)
at /export/gnu/import/git/sources/gcc/libgcc/unwind.inc:140
#1 0x00007ffff7d9936b in __cxxabiv1::__cxa_throw (obj=<optimized out>,
tinfo=0x403dd0 <typeinfo for int@@CXXABI_1.3>, dest=0x0)
at /export/gnu/import/git/sources/gcc/libstdc++-v3/libsupc++/eh_throw.cc:90
#2 0x0000000000401255 in sighandler (signo=11, si=0x7fffffffd6f8,
uc=0x7fffffffd5c0)
at /export/gnu/import/git/sources/gcc/gcc/testsuite/g++.dg/eh/sighandle.C:9
#3 <signal handler called> <<<< Signal frame which isn't on shadow stack
#4 dosegv ()
at /export/gnu/import/git/sources/gcc/gcc/testsuite/g++.dg/eh/sighandle.C:14
#5 0x00000000004012e3 in main ()
at /export/gnu/import/git/sources/gcc/gcc/testsuite/g++.dg/eh/sighandle.C:30
(gdb) p frames
$6 = 5
(gdb)
frame count should be 4, not 5. This patch skips signal frames when
unwinding shadow stack.
gcc/testsuite/
PR libgcc/85334
* g++.dg/torture/pr85334.C: New test.
libgcc/
PR libgcc/85334
* unwind-generic.h (_Unwind_Frames_Increment): New.
* config/i386/shadow-stack-unwind.h (_Unwind_Frames_Increment):
Likewise.
* unwind.inc (_Unwind_RaiseException_Phase2): Increment frame
count with _Unwind_Frames_Increment.
(_Unwind_ForcedUnwind_Phase2): Likewise.
From-SVN: r259502
Program received signal SIGSEGV, Segmentation fault.
__stack_split_initialize ()
at /export/gnu/import/git/sources/gcc/libgcc/config/i386/morestack.S:751
751 leaq -16000(%rsp),%rax # We should have at least 16K.
Missing separate debuginfos, use: dnf debuginfo-install libgcc-8.0.1-0.21.0.fc28.x86_64
(gdb) disass
Dump of assembler code for function __stack_split_initialize:
=> 0x0000000000402858 <+0>: lea -0x3e80(%rsp),%rax
0x0000000000402860 <+8>: mov %rax,%fs:0x70
0x0000000000402869 <+17>: sub $0x8,%rsp
0x000000000040286d <+21>: mov %rsp,%rdi
0x0000000000402870 <+24>: mov $0x3e80,%esi
0x0000000000402875 <+29>: callq 0x401810 <__generic_morestack_set_initial_sp>
0x000000000040287a <+34>: add $0x8,%rsp
0x000000000040287e <+38>: retq
End of assembler dump.
(gdb)
This patch adds the missing ENDBR to __stack_split_initialize.
PR libgcc/85379
* config/i386/morestack.S (__stack_split_initialize): Add
_CET_ENDBR.
From-SVN: r259497
* config/cet.m4 (GCC_CET_FLAGS): Default to --disable-cet, replace
--enable-cet=default with --enable-cet=auto.
* doc/install.texi: Document --disable-cet being the default and
--enable-cet=auto.
* configure: Regenerated.
From-SVN: r259487
PR jit/85384
* acx.m4 (GCC_BASE_VER): Remove \$\$ from sed expression.
* configure.ac (gcc-driver-name.h): Honor --with-gcc-major-version
by using gcc_base_ver to generate a gcc_driver_version, and use
it when generating GCC_DRIVER_NAME.
* configure: Regenerate.
* configure: Regenerate.
From-SVN: r259462
PR target/84945
* config/i386/cpuinfo.c (set_feature): Wrap into do while (0) to avoid
-Wdangling-else warnings. Mask shift counts to avoid
-Wshift-count-negative and -Wshift-count-overflow false positives.
From-SVN: r259398
Enable AVX and AVX512 features only if their states are supported by
OSXSAVE.
PR target/85100
* config/i386/cpuinfo.c (XCR_XFEATURE_ENABLED_MASK): New.
(XSTATE_FP): Likewise.
(XSTATE_SSE): Likewise.
(XSTATE_YMM): Likewise.
(XSTATE_OPMASK): Likewise.
(XSTATE_ZMM): Likewise.
(XSTATE_HI_ZMM): Likewise.
(XCR_AVX_ENABLED_MASK): Likewise.
(XCR_AVX512F_ENABLED_MASK): Likewise.
(get_available_features): Enable AVX and AVX512 features only
if their states are supported by OSXSAVE.
From-SVN: r258954
PR target/84945
* config/i386/i386.c (fold_builtin_cpu): For features above 31
use __cpu_features2 variable instead of __cpu_model.__cpu_features[0].
Use 1U instead of 1. Formatting fixes.
* gcc.target/i386/pr84945.c: New test.
* config/i386/cpuinfo.h (__cpu_features2): Declare.
* config/i386/cpuinfo.c (__cpu_features2): New variable for
ifndef SHARED only.
(set_feature): Define.
(get_available_features): Use set_feature macro. Set __cpu_features2
to the second word of features ifndef SHARED.
From-SVN: r258673
PR debug/83917
* configure.ac (AS_HIDDEN_DIRECTIVE): AC_DEFINE_UNQUOTED this to
$asm_hidden_op if visibility ("hidden") attribute works.
(HAVE_AS_CFI_SECTIONS): New AC_DEFINE.
* config/i386/i386-asm.h: Don't include auto-host.h.
(PACKAGE_VERSION, PACKAGE_NAME, PACKAGE_STRING, PACKAGE_TARNAME,
PACKAGE_URL): Don't undefine.
(USE_GAS_CFI_DIRECTIVES): Don't use nor define this macro, instead
guard cfi_startproc only on ifdef __GCC_HAVE_DWARF2_CFI_ASM.
(FN_HIDDEN): Change guard from #ifdef HAVE_GAS_HIDDEN to
#ifdef AS_HIDDEN_DIRECTIVE, use AS_HIDDEN_DIRECTIVE macro in the
definition instead of hardcoded .hidden.
* config/i386/cygwin.S: Include i386-asm.h first before .cfi_sections
directive. Use #ifdef HAVE_AS_CFI_SECTIONS rather than
#ifdef HAVE_GAS_CFI_SECTIONS_DIRECTIVE to guard .cfi_sections.
(USE_GAS_CFI_DIRECTIVES): Don't define.
* configure: Regenerated.
* config.in: Likewise.
From-SVN: r258057
PR debug/83917
* config/i386/i386-asm.h (PACKAGE_VERSION, PACKAGE_NAME,
PACKAGE_STRING, PACKAGE_TARNAME, PACKAGE_URL): Undefine between
inclusion of auto-target.h and auto-host.h.
(USE_GAS_CFI_DIRECTIVES): Define if not defined already based on
__GCC_HAVE_DWARF2_CFI_ASM.
(cfi_startproc, cfi_endproc, cfi_adjust_cfa_offset,
cfi_def_cfa_register, cfi_def_cfa, cfi_register, cfi_offset, cfi_push,
cfi_pop): Define.
* config/i386/cygwin.S: Don't include auto-host.h here, just
define USE_GAS_CFI_DIRECTIVES to 1 or 0 and include i386-asm.h.
(cfi_startproc, cfi_endproc, cfi_adjust_cfa_offset,
cfi_def_cfa_register, cfi_register, cfi_push, cfi_pop): Remove.
* config/i386/resms64fx.h: Add cfi_* directives.
* config/i386/resms64x.h: Likewise.
From-SVN: r258010
ENDBR32 and RDSSPD are multi-byte NOPs on x86-64 processors and
newer x86 processors, starting Pentium Pro. They are UD on older
32-bit processors. Detect this at configure time and adjust the
default value for enable_cet. GCC will enable CET in 32-bit run-time
libraries in any case if --enable-cet is used to configure GCC.
PR target/84148
* config/cet.m4: Check if target support multi-byte NOPS (SSE).
* libatomic/configure: Regenerate.
* libbacktrace/configure: Likewise.
* libgcc/configure: Likewise.
* libgfortran/configure: Likewise.
* libgomp/configure: Likewise.
* libitm/configure: Likewise.
* libmpx/configure: Likewise.
* libobjc/configure: Likewise.
* libquadmath/configure: Likewise.
* libsanitizer/configure: Likewise.
* libssp/configure: Likewise.
* libstdc++-v3/configure: Likewise.
* libvtv/configure: Likewise.
From-SVN: r257809
Introduce a couple of new CET intrinsics for reading and updating a
shadow stack pointer (_get_ssp and _inc_ssp). They replace the existing
_rdssp[d|q] and _incssp[d|q] instrinsics.
PR target/84239
* gcc/config/i386/cetintrin.h: Remove _rdssp[d|q] and
add _get_ssp intrinsics. Remove argument from
__builtin_ia32_rdssp[d|q].
* gcc/config/i386/i386-builtin-types.def: Add UINT_FTYPE_VOID.
* gcc/config/i386/i386-builtin.def: Remove argument from
__builtin_ia32_rdssp[d|q].
* gcc/config/i386/i386.c: Use UINT_FTYPE_VOID. Use
ix86_expand_special_args_builtin for _rdssp[d|q].
* gcc/config/i386/i386.md: Remove argument from rdssp[si|di] insn.
Clear register before usage.
* doc/extend.texi: Remove argument from __builtin_ia32_rdssp[d|q].
Add documentation for new _get_ssp and _inc_ssp intrinsics.
* testsuite/gcc.target/i386/cet-intrin-3.c: Use new _get_ssp and
_inc_ssp intrinsics.
* testsuite/gcc.target/i386/cet-intrin-4.c: Likewise.
* testsuite/gcc.target/i386/cet-rdssp-1.c: Remove argument from
__builtin_ia32_rdssp[d|q].
* libgcc/config/i386/shadow-stack-unwind.hi (_Unwind_Frames_Extra):
Use new _get_ssp and _inc_ssp intrinsics.
From-SVN: r257660
libgcc/
2018-01-23 Max Filippov <jcmvbkbc@gmail.com>
* config/xtensa/ieee754-df.S (__addsf3, __subsf3, __mulsf3)
(__divsf3): Make NaN return value quiet.
* config/xtensa/ieee754-sf.S (__adddf3, __subdf3, __muldf3)
(__divdf3): Make NaN return value quiet.
From-SVN: r257002
This patch adds support for unwinding frames that use the SVE
pseudo VG register. We want this register to act like a normal
register if the CFI explicitly sets it, but want to provide a
default value otherwise. Computing the default value requires
an SVE target, so we only want to compute it on demand.
aarch64_vg uses a hard-coded .inst in order to avoid a build
dependency on binutils 2.28 or later.
2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* doc/tm.texi.in (DWARF_LAZY_REGISTER_VALUE): Document.
* doc/tm.texi: Regenerate.
libgcc/
* config/aarch64/value-unwind.h (aarch64_vg): New function.
(DWARF_LAZY_REGISTER_VALUE): Define.
* unwind-dw2.c (_Unwind_GetGR): Use DWARF_LAZY_REGISTER_VALUE
to provide a fallback register value.
gcc/testsuite/
* g++.target/aarch64/sve/aarch64-sve.exp: New harness.
* g++.target/aarch64/sve/catch_1.C: New test.
* g++.target/aarch64/sve/catch_2.C: Likewise.
* g++.target/aarch64/sve/catch_3.C: Likewise.
* g++.target/aarch64/sve/catch_4.C: Likewise.
* g++.target/aarch64/sve/catch_5.C: Likewise.
* g++.target/aarch64/sve/catch_6.C: Likewise.
Reviewed-by: James Greenhalgh <james.greenhalgh@arm.com>
From-SVN: r256615
2018-01-08 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/quad-float128.h (IBM128_TYPE): Explicitly use
__ibm128, instead of trying to use long double.
(CVT_FLOAT128_TO_IBM128): Use TFtype instead of __float128 to
accomidate -mabi=ieeelongdouble multilibs.
(CVT_IBM128_TO_FLOAT128): Likewise.
* config/rs6000/ibm-ldouble.c (IBM128_TYPE): New macro to define
the appropriate IBM extended double type.
(__gcc_qadd): Change all occurances of long double to IBM128_TYPE.
(__gcc_qsub): Likewise.
(__gcc_qmul): Likewise.
(__gcc_qdiv): Likewise.
(pack_ldouble): Likewise.
(__gcc_qneg): Likewise.
(__gcc_qeq): Likewise.
(__gcc_qne): Likewise.
(__gcc_qge): Likewise.
(__gcc_qle): Likewise.
(__gcc_stoq): Likewise.
(__gcc_dtoq): Likewise.
(__gcc_itoq): Likewise.
(__gcc_utoq): Likewise.
(__gcc_qunord): Likewise.
* config/rs6000/_mulkc3.c (toplevel): Include soft-fp.h and
quad-float128.h for the definitions.
(COPYSIGN): Use the f128 version instead of the q version.
(INFINITY): Likewise.
(__mulkc3): Use TFmode/TCmode for float128 scalar/complex types.
* config/rs6000/_divkc3.c (toplevel): Include soft-fp.h and
quad-float128.h for the definitions.
(COPYSIGN): Use the f128 version instead of the q version.
(INFINITY): Likewise.
(FABS): Likewise.
(__divkc3): Use TFmode/TCmode for float128 scalar/complex types.
* config/rs6000/extendkftf2-sw.c (__extendkftf2_sw): Likewise.
* config/rs6000/trunctfkf2-sw.c (__trunctfkf2_sw): Likewise.
From-SVN: r256354
2018-01-08 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/quad-float128.h (IBM128_TYPE): Explicitly use
__ibm128, instead of trying to use long double.
(CVT_FLOAT128_TO_IBM128): Use TFtype instead of __float128 to
accomidate -mabi=ieeelongdouble multilibs.
(CVT_IBM128_TO_FLOAT128): Likewise.
* config/rs6000/ibm-ldouble.c (IBM128_TYPE): New macro to define
the appropriate IBM extended double type.
(__gcc_qadd): Change all occurances of long double to IBM128_TYPE.
(__gcc_qsub): Likewise.
(__gcc_qmul): Likewise.
(__gcc_qdiv): Likewise.
(pack_ldouble): Likewise.
(__gcc_qneg): Likewise.
(__gcc_qeq): Likewise.
(__gcc_qne): Likewise.
(__gcc_qge): Likewise.
(__gcc_qle): Likewise.
(__gcc_stoq): Likewise.
(__gcc_dtoq): Likewise.
(__gcc_itoq): Likewise.
(__gcc_utoq): Likewise.
(__gcc_qunord): Likewise.
* config/rs6000/_mulkc3.c (toplevel): Include soft-fp.h and
quad-float128.h for the definitions.
(COPYSIGN): Use the f128 version instead of the q version.
(INFINITY): Likewise.
(__mulkc3): Use TFmode/TCmode for float128 scalar/complex types.
* config/rs6000/_divkc3.c (toplevel): Include soft-fp.h and
quad-float128.h for the definitions.
(COPYSIGN): Use the f128 version instead of the q version.
(INFINITY): Likewise.
(FABS): Likewise.
(__divkc3): Use TFmode/TCmode for float128 scalar/complex types.
* config/rs6000/extendkftf2-sw.c (__extendkftf2_sw): Likewise.
* config/rs6000/trunctfkf2-sw.c (__trunctfkf2_sw): Likewise.
From-SVN: r256353
2017-11-30 Michael Meissner <meissner@linux.vnet.ibm.com>
PR libgcc/83112
* config/rs6000/float128-ifunc.c (__addkf3_resolve): Use the
correct type for all ifunc resolvers to silence -Wattribute-alias
warnings. Eliminate the forward declaration of the resolver
functions which is no longer needed.
(__subkf3_resolve): Likewise.
(__mulkf3_resolve): Likewise.
(__divkf3_resolve): Likewise.
(__negkf2_resolve): Likewise.
(__eqkf2_resolve): Likewise.
(__nekf2_resolve): Likewise.
(__gekf2_resolve): Likewise.
(__gtkf2_resolve): Likewise.
(__lekf2_resolve): Likewise.
(__ltkf2_resolve): Likewise.
(__unordkf2_resolve): Likewise.
(__extendsfkf2_resolve): Likewise.
(__extenddfkf2_resolve): Likewise.
(__trunckfsf2_resolve): Likewise.
(__trunckfdf2_resolve): Likewise.
(__fixkfsi_resolve): Likewise.
(__fixkfdi_resolve): Likewise.
(__fixunskfsi_resolve): Likewise.
(__fixunskfdi_resolve): Likewise.
(__floatsikf_resolve): Likewise.
(__floatdikf_resolve): Likewise.
(__floatunsikf_resolve): Likewise.
(__floatundikf_resolve): Likewise.
(__extendkftf2_resolve): Likewise.
(__trunctfkf2_resolve): Likewise.
PR libgcc/83103
* config/rs6000/quad-float128.h (TF): Don't define if long double
is IEEE 128-bit floating point.
(TCtype): Define as either TCmode or KCmode, depending on whether
long double is IEEE 128-bit floating point.
(__mulkc3_sw): Add declarations for software/hardware versions of
complex multiply/divide.
(__divkc3_sw): Likewise.
(__mulkc3_hw): Likewise.
(__divkc3_hw): Likewise.
* config/rs6000/_mulkc3.c (_mulkc3): If we are building ifunc
handlers to switch between using software emulation and hardware
float128 instructions, build the complex multiply/divide functions
for both software and hardware support.
* config/rs6000/_divkc3.c (_divkc3): Likewise.
* config/rs6000/float128-ifunc.c (__mulkc3_resolve): Likewise.
(__divkc3_resolve): Likewise.
(__mulkc3): Likewise.
(__divkc3): Likewise.
* config/rs6000/t-float128-hw (fp128_hardfp_src): Likewise.
(fp128_hw_src): Likewise.
(fp128_hw_static_obj): Likewise.
(fp128_hw_shared_obj): Likewise.
(_mulkc3-hw.c): Create _mulkc3-hw.c and _divkc3-hw.c from
_mulkc3.c and _divkc3.c, changing the function name.
(_divkc3-hw.c): Likewise.
* config/rs6000/t-float128 (clean-float128): Delete _mulkc3-hw.c
and _divkc3-hw.c.
From-SVN: r255282
Control-flow Enforcement Technology (CET), published by Intel,
introduces the Shadow Stack feature, which ensures a return from a
function is done to exactly the same location from where the function
was called. When EH is present the control-flow transfer may skip some
stack frames and the shadow stack has to be adjusted not to signal a
violation of a control-flow transfer. It's done by counting a number
of skiping frames and adjasting shadow stack pointer by this number.
Having new semantic of the 'ret' instruction if CET is supported in HW
the 'ret' instruction cannot be generated in ix86_expand_epilogue when
we are returning after EH is processed. Added a code in
ix86_expand_epilogue to adjust Shadow Stack pointer and to generate an
indirect jump instead of 'ret'. As sp register is used during this
adjustment thus the argument in pro_epilogue_adjust_stack is changed
to update cfa_reg based on whether control-flow instrumentation is set.
Without updating the cfa_reg field there is an assert later in dwarf2
pass related to mismatch the stack register and cfa_reg value.
gcc/
* config/i386/i386.c (ix86_expand_epilogue): Change simple
return to indirect jump for EH return if control-flow protection
is enabled. Change explicit 'false' argument in
pro_epilogue_adjust_stack with a value of flag_cf_protection.
* config/i386/i386.md (simple_return_indirect_internal): Remove
SImode restriction to support 64-bit.
libgcc/
* config/i386/linux-unwind.h: Include
config/i386/shadow-stack-unwind.h.
* config/i386/shadow-stack-unwind.h: New file.
* unwind-dw2.c: (uw_install_context): Add a frame parameter and
pass it to _Unwind_Frames_Extra.
* unwind-generic.h (_Unwind_Frames_Extra): New.
* unwind.inc (_Unwind_RaiseException_Phase2): Add frames_p
parameter. Add local variable frames to count number of frames.
(_Unwind_ForcedUnwind_Phase2): Likewise.
(_Unwind_RaiseException): Add local variable frames to count
number of frames, pass it to _Unwind_RaiseException_Phase2 and
uw_install_context.
(_Unwind_ForcedUnwind): Likewise.
(_Unwind_Resume): Likewise.
(_Unwind_Resume_or_Rethrow): Likewise.
From-SVN: r254876
Enable building libgcc with CET options by default on Linux/x86 if
binutils supports CET v2.0. It can be disabled with --disable-cet.
It is an error to configure GCC with --enable-cet if bintuiils
doesn't support CET v2.0.
ENDBR instruction is added to __morestack_large_model since it is
called indirectly.
2017-11-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
config/
* cet.m4: New file.
gcc/
* config.gcc (extra_headers): Add cet.h for x86 targets.
* config/i386/cet.h: New file.
* doc/install.texi: Add --enable-cet/--disable-cet.
libgcc/
* Makefile.in (configure_deps): Add $(srcdir)/../config/cet.m4.
(CET_FLAGS): New.
* config/i386/morestack.S: Include <cet.h>.
(__morestack_large_model): Add _CET_ENDBR at function entrance.
* config/i386/resms64.h: Include <cet.h>.
* config/i386/resms64f.h: Likewise.
* config/i386/resms64fx.h: Likewise.
* config/i386/resms64x.h: Likewise.
* config/i386/savms64.h: Likewise.
* config/i386/savms64f.h: Likewise.
* config/i386/t-linux (HOST_LIBGCC2_CFLAGS): Add $(CET_FLAGS).
(CRTSTUFF_T_CFLAGS): Likewise.
* configure.ac: Include ../config/cet.m4.
Set and substitute CET_FLAGS.
* configure: Regenerated.
From-SVN: r254868
2017-11-07 Tom de Vries <tom@codesourcery.com>
* config/rs6000/aix-unwind.h (REGISTER_CFA_OFFSET_FOR): Remove semicolon
after "do {} while (0)".
From-SVN: r254491
2017-11-04 Andreas Tobler <andreast@gcc.gnu.org>
PR libgcc/82635
* config/i386/freebsd-unwind.h (MD_FALLBACK_FRAME_STATE_FOR): Use a
sysctl to determine whether we're in a trampoline.
Keep the pattern matching method for systems without
KERN_PROC_SIGTRAMP sysctl.
From-SVN: r254411
Forgot to add the new file :-P
2017-10-13 Sebastian Perta <sebastian.perta@renesas.com>
* config/rl78/adddi3.S: New assembly file.
* config/rl78/t-rl78: Added adddi3.S to LIB2ADD.
From-SVN: r254016
PR target/82274
* internal-fn.c (expand_mul_overflow): If both operands have
the same highpart of -1 or 0 and the topmost bit of lowpart
is different, overflow is if res <= 0 rather than res < 0.
* libgcc2.c (__mulvDI3): If both operands have
the same highpart of -1 and the topmost bit of lowpart is 0,
multiplication overflows even if both lowparts are 0.
* gcc.dg/pr82274-1.c: New test.
* gcc.dg/pr82274-2.c: New test.
From-SVN: r253734
Building glibc for many different configurations and running the
compilation parts of the testsuite runs into failures of the
elf/check-execstack test for hppa and microblaze. Those
configurations default to executable stacks in the Linux kernel
because of VM_DATA_DEFAULT_FLAGS definitions including VM_EXEC
(VM_DATA_DEFAULT_FLAGS being the default definition of
VM_STACK_DEFAULT_FLAGS).
This fails because those configurations are not generating
.note.GNU-stack sections to indicate that programs do not need an
executable stack. This patch fixes GCC to generate those sections on
those architectures (when configured for a target using the Linux
kernel), as it does on other architectures, together with adding that
section to libgcc .S sources, with the same code as used on other
architectures (or a variant using "#ifdef __linux__" instead of the
usual "#if defined(__ELF__) && defined(__linux__)" for microblaze, as
that configuration doesn't use elfos.h and so doesn't define __ELF__).
This suffices to eliminate that glibc test failure. (For hppa, the
compilation parts of the glibc testsuite still fail because of the
separate elf/check-textrel failure.)
gcc:
* config/microblaze/linux.h (TARGET_ASM_FILE_END): Likewise.
* config/pa/pa.h (NEED_INDICATE_EXEC_STACK): Likewise.
* config/pa/pa-linux.h (NEED_INDICATE_EXEC_STACK): Likewise.
* config/pa/pa.c (pa_hpux_file_end): Rename to pa_file_end.
Define unconditionally, with [ASM_OUTPUT_EXTERNAL_REAL]
conditionals inside the function instead of around it. Call
file_end_indicate_exec_stack if NEED_INDICATE_EXEC_STACK.
(TARGET_ASM_FILE_END): Define unconditionally to pa_file_end.
libgcc:
* config/microblaze/crti.S, config/microblaze/crtn.S,
config/microblaze/divsi3.S, config/microblaze/moddi3.S,
config/microblaze/modsi3.S, config/microblaze/muldi3_hard.S,
config/microblaze/mulsi3.S,
config/microblaze/stack_overflow_exit.S,
config/microblaze/udivsi3.S, config/microblaze/umodsi3.S,
config/pa/milli64.S: Add .note.GNU-stack section.
From-SVN: r253204
gcc:
config/i386/i386.c: (xlogue_layout::STUB_NAME_MAX_LEN): Increase to 20
bytes.
(xlogue_layout::s_stub_names): Add an additional size-2 diminsion.
(xlogue_layout::get_stub_name): Modify to select the appropairate sse
or avx version of the stub.
gcc/testsuite:
gcc.target/i386/pr82196-1.c: New test.
gcc.target/i386/pr82196-2.c: Likewise.
libgcc:
config/i386/i386-asm.h (PASTE2): New macro.
(ASMNAME): Modify to use PASTE2.
(MS2SYSV_STUB_PREFIX): New macro for isa prefix.
(MS2SYSV_STUB_BEGIN, MS2SYSV_STUB_END): New macros for stub headers.
config/i386/resms64.S: Rename to a header file, use MS2SYSV_STUB_BEGIN
instead of HIDDEN_FUNC and MS2SYSV_STUB_END instead of FUNC_END.
config/i386/resms64f.S: Likewise.
config/i386/resms64fx.S: Likewise.
config/i386/resms64x.S: Likewise.
config/i386/savms64.S: Likewise.
config/i386/savms64f.S: Likewise.
config/i386/avx_resms64.S: New file that only defines a macro and
includes it's corresponding header file.
config/i386/avx_resms64f.S: Likewise.
config/i386/avx_resms64fx.S: Likewise.
config/i386/avx_resms64x.S: Likewise.
config/i386/avx_savms64.S: Likewise.
config/i386/avx_savms64f.S: Likewise.
config/i386/sse_resms64.S: Likewise.
config/i386/sse_resms64f.S: Likewise.
config/i386/sse_resms64fx.S: Likewise.
config/i386/sse_resms64x.S: Likewise.
config/i386/sse_savms64.S: Likewise.
config/i386/sse_savms64f.S: Likewise.
config/i386/t-msabi: Modified to add avx and sse versions of stubs.
From-SVN: r252896
This patch is in use by Cygwin for years, upstream to GCC.
* gcc/config/i386/mingw.opt (fset-stack-executable): Removed.
* gcc/config/i386/cygming.opt (fset-stack-executable): Moved
from mingw.opt.
* gcc/config/i386/cygwin.h: Define CHECK_EXECUTE_STACK_ENABLED.
* ligcc/config.host (*-cygwin): Include file from mingw
config/i386/enable-execute-stack-mingw32.c
From-SVN: r250914
2017-08-01 Jerome Lambourg <lambourg@adacore.com>
Doug Rupp <rupp@adacore.com>
Olivier Hainque <hainque@adacore.com>
gcc/
* config.gcc (arm-wrs-vxworks*): Rework to handle arm-wrs-vxworks7 as
well as arm-wrs-vxworks. Update target_cpu_name from arm6 (arch v3) to
arm8 (arch v4).
* config/arm/vxworks.h (MAYBE_TARGET_BPABI_CPP_BUILTINS): New, helper
for TARGET_OS_CPP_BUILTIN.
(TARGET_OS_CPP_BUILTIN): Invoke MAYBE_TARGET_BPABI_CPP_BUILTINS(),
refine CPU definitions for arm_arch5 and add those for arm_arch6 and
arm_arch7.
(MAYBE_ASM_ABI_SPEC): New, helper for SUBTARGET_EXTRA_ASM_SPEC,
passing required abi options to the assembler for EABI configurations.
(EXTRA_CC1_SPEC): New macro, to help prevent the implicit production
of .text.hot and .text.unlikely sections for kernel modules when
using ARM style exceptions.
(CC1_SPEC): Remove obsolete attempt at mimicking Diab toolchain
options. Add EXTRA_CC1_SPEC.
(VXWORKS_ENDIAN_SPEC): Adjust comment and remove handling of Diab
toolchain options.
(DWARF2_UNWIND_INFO): Redefine to handle the pre/post VxWorks 7
transition.
(ARM_TARGET2_DWARF_FORMAT): Define.
* config/arm/t-vxworks: Adjust multilib control to removal of the
Diab command line options.
libgcc/
* config.host (arm-wrs-vxworks*): Rework to handle arm-wrs-vxworks7
as well as arm-wrs-vxworks.
* config/arm/t-vxworks7: New file. Add unwind-arm-vxworks.c to
LIB2ADDEH.
* config/arm/unwind-arm-vxworks.c: New file. Provide dummy
__exidx_start and __exidx_end for downloadable modules.
Co-Authored-By: Doug Rupp <rupp@adacore.com>
Co-Authored-By: Olivier Hainque <hainque@adacore.com>
From-SVN: r250781
2017-07-24 Daniel Santos <daniel.santos@pobox.com>
PR testsuite/80759
* config.host: include i386/t-msabi for darwin and solaris.
* config/i386/i386-asm.h
(ELFFN): Rename to FN_TYPE.
(FN_SIZE): New macro.
(FN_HIDDEN): Likewise.
(ASMNAME): Likewise.
(FUNC_START): Rename to FUNC_BEGIN, use ASMNAME, replace .global with
.globl.
(HIDDEN_FUNC): Use ASMNAME and .globl instead of .global.
(SSE_SAVE): Convert to cpp macro, hard-code offset (always 0x60).
* config/i386/resms64.S: Use SSE_SAVE as cpp macro instead of gas
.macro.
* config/i386/resms64f.S: Likewise.
* config/i386/resms64fx.S: Likewise.
* config/i386/resms64x.S: Likewise.
* config/i386/savms64.S: Likewise.
* config/i386/savms64f.S: Likewise.
From-SVN: r250488
[gcc]
2017-07-12 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/81193
* config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): If GLIBC
provides the hardware capability bits, define the macro
__BUILTIN_CPU_SUPPORTS__.
* config/rs6000/rs6000.c (cpu_expand_builtin): Generate a warning
if GLIBC does not provide the hardware capability bits. Add a
gcc_unreachable call if the built-in cpu function is neither
__builtin_cpu_is nor __builtin_cpu_supports.
(rs6000_get_function_versions_dispatcher): Change the warning
that an old GLIBC is used which does not export the capability
bits to be an error.
* doc/extend.texi (target_clones attribute): Document the
restriction that GLIBC 2.23 or newer is needed on the PowerPC.
(PowerPC built-in functions): Document that GLIBC 2.23 or newer is
needed by __builtin_cpu_is and __builtin_cpu_supports. Document
the macros defined by GCC if the newer GLIBC is available.
[gcc/testsuite]
2017-07-12 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/81193
* gcc.target/powerpc/bmi-andn-1.c: Add guard against using
__builtin_cpu_supports with old GLIBC's.
* gcc.target/powerpc/bmi-andn-2.c: Likewise.
* gcc.target/powerpc/bmi-bextr-1.c: Likewise.
* gcc.target/powerpc/bmi-bextr-2.c: Likewise.
* gcc.target/powerpc/bmi-bextr-4.c: Likewise.
* gcc.target/powerpc/bmi-bextr-5.c: Likewise.
* gcc.target/powerpc/bmi-blsi-1.c: Likewise.
* gcc.target/powerpc/bmi-blsi-2.c: Likewise.
* gcc.target/powerpc/bmi-blsmsk-1.c: Likewise.
* gcc.target/powerpc/bmi-blsmsk-2.c: Likewise.
* gcc.target/powerpc/bmi-blsr-1.c: Likewise.
* gcc.target/powerpc/bmi-blsr-2.c: Likewise.
* gcc.target/powerpc/bmi-tzcnt-1.c: Likewise.
* gcc.target/powerpc/bmi-tzcnt-2.c: Likewise.
* gcc.target/powerpc/bmi2-bzhi32-1.c: Likewise.
* gcc.target/powerpc/bmi2-bzhi64-1.c: Likewise.
* gcc.target/powerpc/bmi2-mulx32-1.c: Likewise.
* gcc.target/powerpc/bmi2-mulx32-2.c: Likewise.
* gcc.target/powerpc/bmi2-mulx64-1.c: Likewise.
* gcc.target/powerpc/bmi2-mulx64-2.c: Likewise.
* gcc.target/powerpc/bmi2-pdep32-1.c: Likewise.
* gcc.target/powerpc/bmi2-pdep64-1.c: Likewise.
* gcc.target/powerpc/bmi2-pext32-1.c: Likewise.
* gcc.target/powerpc/bmi2-pext64-1.c: Likewise.
* gcc.target/powerpc/cpu-builtin-1.c: Likewise.
[libgcc]
2017-07-12 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/81193
* configure.ac (PowerPC float128 hardware support): Test whether
we can use __builtin_cpu_supports before enabling the ifunc
handler.
* configure: Regenerate.
From-SVN: r250165
2017-06-27 Olivier Hainque <hainque@adacore.com>
* config/t-vxworks7: New file.
New file mistakenly omitted from previous commit referencing it.
From-SVN: r249938
Current glibc no longer gives the ucontext_t type the tag struct
ucontext, to conform with POSIX namespace rules. This requires
various linux-unwind.h files in libgcc, that were previously using
struct ucontext, to be fixed to use ucontext_t instead. This is
similar to the removal of the struct siginfo tag from siginfo_t some
years ago.
This patch changes those files to use ucontext_t instead. As the
standard name that should be unconditionally safe, so this is not
restricted to architectures supported by glibc, or conditioned on the
glibc version.
Tested compilation together with current glibc with glibc's
build-many-glibcs.py.
* config/aarch64/linux-unwind.h (aarch64_fallback_frame_state),
config/alpha/linux-unwind.h (alpha_fallback_frame_state),
config/bfin/linux-unwind.h (bfin_fallback_frame_state),
config/i386/linux-unwind.h (x86_64_fallback_frame_state,
x86_fallback_frame_state), config/m68k/linux-unwind.h (struct
uw_ucontext), config/nios2/linux-unwind.h (struct nios2_ucontext),
config/pa/linux-unwind.h (pa32_fallback_frame_state),
config/riscv/linux-unwind.h (riscv_fallback_frame_state),
config/sh/linux-unwind.h (sh_fallback_frame_state),
config/tilepro/linux-unwind.h (tile_fallback_frame_state),
config/xtensa/linux-unwind.h (xtensa_fallback_frame_state): Use
ucontext_t instead of struct ucontext.
From-SVN: r249731
gcc/
2017-06-22 Matt Turner <mattst88@gmail.com>
* config/i386/driver-i386.c (host_detect_local_cpu): Add Kaby
Lake models to skylake case. Assume skylake for unknown
models with clflushopt.
gcc/testsuite/
2017-06-22 Matt Turner <mattst88@gmail.com>
* gcc.target/i386/builtin_target.c: Add Kaby Lake models to
skylake check.
libgcc/
2017-06-22 Matt Turner <mattst88@gmail.com>
* config/i386/cpuinfo.c (get_intel_cpu): Add Kaby Lake models to
skylake case.
From-SVN: r249574
2017-06-21 Richard Biener <rguenther@suse.de>
PR gcov-profile/81080
* configure.ac: Add AC_SYS_LARGEFILE.
* libgcov.h: Include auto-target.h before tsystem.h to pick
up _FILE_OFFSET_BITS which might differ for multilibs.
* config.in: Regenerate.
* configure: Likewise.
From-SVN: r249435
This file is missing a .fpu directive and was relying on the compiler
driver passing through a -mfpu= command line option. When the FPU is
auto, that will not be passed through correctly, so set something
suitable within the file itself.
libgcc:
* config/arm/cmse_nonsecure_call.S: Explicitly set the FPU.
From-SVN: r249297
2017-06-09 Martin Liska <mliska@suse.cz>
* tree-profile.c (gimple_gen_ic_profiler): Update comment.
(gimple_gen_ic_func_profiler): Emit direct comparison
of __gcov_indirect_call_callee with NULL.
(gimple_gen_time_profiler): Change probability from
PROB_VERY_UNLIKELY to PROB_UNLIKELY.
2017-06-09 Martin Liska <mliska@suse.cz>
* libgcov-profiler.c (__gcov_indirect_call_profiler_v2):
Reset __gcov_indirect_call_callee to NULL.
From-SVN: r249058
2017-06-08 Olivier Hainque <hainque@adacore.com>
* config/t-vxworks (LIBGCC2_INCLUDES): Add path to wrn/coreip to
the set of -I options, support for direct inclusions of net/uio.h
by VxWorks header files via ioLib.h.
From-SVN: r249016
2017-05-17 Andreas Tobler <andreast@gcc.gnu.org>
* config/arm/unwind-arm.h: Make _Unwind_GetIP, _Unwind_GetIPInfo and
_Unwind_SetIP available as functions for arm*-*-freebsd*.
* config/arm/unwind-arm.c: Implement the above.
From-SVN: r248173
gcc/ChangeLog:
* config/i386/i386.opt: Add option -mcall-ms2sysv-xlogues.
* config/i386/i386.h
(x86_64_ms_sysv_extra_clobbered_registers): Change type to unsigned.
(NUM_X86_64_MS_CLOBBERED_REGS): New macro.
(struct machine_function): Add new members call_ms2sysv,
call_ms2sysv_pad_in, call_ms2sysv_pad_out and call_ms2sysv_extra_regs.
(struct machine_frame_state): New fields sp_realigned and
sp_realigned_offset.
* config/i386/i386.c
(enum xlogue_stub): New enum.
(enum xlogue_stub_sets): New enum.
(class xlogue_layout): New class.
(struct ix86_frame): New fields stack_realign_allocate_offset,
stack_realign_offset and outlined_save_offset. Modify comments to
detail stack layout when using out-of-line stubs.
(ix86_target_string): Add -mcall-ms2sysv-xlogues option.
(ix86_option_override_internal): Add sorry() for TARGET_SEH and
-mcall-ms2sysv-xlogues.
(stub_managed_regs): New static variable.
(ix86_save_reg): Add new parameter ignore_outlined to optionally omit
registers managed by out-of-line stub.
(disable_call_ms2sysv_xlogues): New function.
(ix86_compute_frame_layout): Modify re-alignment calculations, disable
m->call_ms2sysv when appropriate and compute frame layout for
out-of-line stubs.
(sp_valid_at, fp_valid_at): New inline functions.
(choose_basereg): New function.
(choose_baseaddr): Add align parameter, use choose_basereg and modify
all callers.
(ix86_emit_save_reg_using_mov, ix86_emit_restore_sse_regs_using_mov):
Use align parameter of choose_baseaddr to generated aligned SSE movs
when possible.
(pro_epilogue_adjust_stack): Modify to track
machine_frame_state::sp_realigned.
(ix86_nsaved_regs): Modify to accommodate changes to ix86_save_reg.
(ix86_nsaved_sseregs): Likewise.
(ix86_emit_save_regs): Likewise.
(ix86_emit_save_regs_using_mov): Likewise.
(ix86_emit_save_sse_regs_using_mov): Likewise.
(get_scratch_register_on_entry): Likewise.
(gen_frame_set): New function.
(gen_frame_load): Likewise.
(gen_frame_store): Likewise.
(emit_outlined_ms2sysv_save): Likewise.
(emit_outlined_ms2sysv_restore): Likewise.
(ix86_expand_prologue): Modify stack re-alignment code and call
emit_outlined_ms2sysv_save when appropriate.
(ix86_emit_leave): Clear machine_frame_state::sp_realigned. Add
parameter rtx_insn *insn, which allows the function to be used to only
generate the notes.
(ix86_expand_epilogue): Modify validity checks of frame and stack
pointers, and call emit_outlined_ms2sysv_restore when appropriate.
(ix86_expand_call): Modify to enable m->call_ms2sysv when appropriate.
* config/i386/predicates.md
(save_multiple): New predicate.
(restore_multiple): Likewise.
* config/i386/sse.md
(save_multiple<mode>): New pattern.
(save_multiple_realign<mode>): Likewise.
(restore_multiple<mode>): Likewise.
(restore_multiple_and_return<mode>): Likewise.
(restore_multiple_leave_return<mode>): Likewise.
* Makefile.in: Export HOSTCXX and HOSTCXXFLAGS to site.exp
gcc/testsuite/ChangeLog:
* gcc.target/x86_64/abi/ms-sysv/do-test.S: New file.
* gcc.target/x86_64/abi/ms-sysv/gen.cc: Likewise.
* gcc.target/x86_64/abi/ms-sysv/ms-sysv.c: Likewise.
* gcc.target/x86_64/abi/ms-sysv/ms-sysv.exp: Likewise.
libgcc/ChangeLog:
* config.host: Add i386/t-msabi to i386/t-linux file list.
* config/i386/i386-asm.h: New file.
* config/i386/resms64.S: New file.
* config/i386/resms64f.S: New file.
* config/i386/resms64fx.S: New file.
* config/i386/resms64x.S: New file.
* config/i386/savms64.S: New file.
* config/i386/savms64f.S: New file.
* config/i386/t-msabi: New file.
From-SVN: r248029
2017-05-09 Andreas Tobler <andreast@gcc.gnu.org>
* config.host: Use the generic FreeBSD t-slibgcc-elf-ver for
arm*-*-freebsd* instead of the t-slibgcc-libgcc.
From-SVN: r247812
2017-04-19 Martin Liska <mliska@suse.cz>
PR gcov-profile/80435
* Makefile.in: Install gcov.h.
* gcov.h: New file.
* libgcov.h: Use the header and make __gcov_flush publicly
visible.
From-SVN: r246990
2017-04-18 Martin Liska <mliska@suse.cz>
PR gcov-profile/78783
* libgcov-driver.c (gcov_get_filename): New function.
2017-04-18 Martin Liska <mliska@suse.cz>
PR gcov-profile/78783
* gcov-tool.c (gcov_output_files): Validate that destination
file is either removed by the tool or by a user.
From-SVN: r246961
* Makefile.in: Swap definition of LIBGCC_LINKS and inclusion of
target makefile fragment.
* config/sh/t-sh (unwind-dw2-Os-4-200.o): Depend on LIBGCC_LINKS.
From-SVN: r246766
These files won't build on targets that do not have AltiVec enabled,
breaking the build, unless we tell GAS that Altivec insns are fine.
The alternative is to not build these files in that case, which is much
more complicated.
libgcc/
* config/rs6000/crtrestvr.s: Use .machine altivec.
* config/rs6000/crtsavevr.s: Ditto.
From-SVN: r246051
This fixes float128 on BE and on 32-bit.
The configure tests need to use -mabi=altivec for 32-bit, since it is
not the default there. That also enables the "vector" keyword, used by
the tests. To do this it temporarily adds a few flags to the CFLAGS
variable.
It also fixes a syntax error in the libgcc_cv_powerpc_float128_hw test
(the function name was missing in the function declaration).
Regenerating config.in (via autoreconf) removed the duplicate definition
of HAVE_SOLARIS_CRTS.
Finally, this adds a "-mfloat128-hardware requires -m64" test to
rs6000.c: all the current patterns need 64-bit registers. Maybe we'll
want to add float128 hardware support to 32-bit some day, but certainly
not today.
* config/rs6000/rs6000.c (rs6000_option_override_internal): Disallow
-mfloat128-hardware without -m64.
libgcc/
* configure.ac (test for libgcc_cv_powerpc_float128): Temporarily
modify CFLAGS. Add -mabi=altivec -mvsx -mfloat128.
(test for libgcc_cv_powerpc_float128_hw): Add -mpower9-vector and
-mfloat128-hardware to the CFLAGS. Fix syntax error in the C snippet.
* configure: Regenerate.
* config.in: Regenerate.
From-SVN: r246043
libgcc/
* config/aarch64/aarch64-unwind.h: New file.
(DWARF_REGNUM_AARCH64_RA_STATE): Define.
(MD_POST_EXTRACT_ROOT_ADDR): New target marcro and define it on AArch64.
(MD_POST_EXTRACT_FRAME_ADDR): Likewise.
(MD_POST_FROB_EH_HANDLER_ADDR): Likewise.
(MD_FROB_UPDATE_CONTEXT): Define it on AArch64.
(aarch64_post_extract_frame_addr): New function.
(aarch64_post_frob_eh_handler_addr): New function.
(aarch64_frob_update_context): New function.
* config/aarch64/linux-unwind.h: Include aarch64-unwind.h
* config.host (aarch64*-*-elf, aarch64*-*-rtems*,
aarch64*-*-freebsd*):
Initialize md_unwind_header to include aarch64-unwind.h.
* unwind-dw2.c (struct _Unwind_Context): Define "RA_A_SIGNED_BIT".
(execute_cfa_program): Multiplex DW_CFA_GNU_window_save for
__aarch64__.
(uw_update_context): Honor MD_POST_EXTRACT_FRAME_ADDR.
(uw_init_context_1): Honor MD_POST_EXTRACT_ROOT_ADDR.
(uw_frob_return_addr): New function.
(uw_install_context): Use uw_frob_return_addr.
From-SVN: r244673
PR other/79046
* configure: Regenerated.
config/
* acx.m4 (GCC_BASE_VER): New m4 function.
(ACX_TOOL_DIRS): Require GCC_BASE_VER, for
--with-gcc-major-version-only use just major number from BASE-VER.
gcc/
* configure.ac: Add GCC_BASE_VER.
* Makefile.in (version): Use @get_gcc_base_ver@ instead of cat to get
version from BASE-VER file.
(CFLAGS-gcc.o): Add -DBASEVER=$(BASEVER_s).
(gcc.o): Depend on $(BASEVER).
* common.opt (dumpfullversion): New option.
* gcc.c (driver_handle_option): Handle OPT_dumpfullversion.
* doc/invoke.texi: Document -dumpfullversion.
* doc/install.texi: Document --with-gcc-major-version-only.
* configure: Regenerated.
libatomic/
* configure.ac: Add GCC_BASE_VER.
* Makefile.am (gcc_version): Use @get_gcc_base_ver@ instead of cat to
get version from BASE-VER file.
* testsuite/Makefile.in: Regenerated.
* configure: Regenerated.
* Makefile.in: Regenerated.
libgomp/
* configure.ac: Add GCC_BASE_VER.
* Makefile.am (gcc_version): Use @get_gcc_base_ver@ instead of cat to
get version from BASE-VER file.
* testsuite/Makefile.in: Regenerated.
* configure: Regenerated.
* Makefile.in: Regenerated.
libgcc/
* configure.ac: Add GCC_BASE_VER.
* Makefile.in (version): Use @get_gcc_base_ver@ instead of cat to get
version from BASE-VER file.
* configure: Regenerated.
libssp/
* configure.ac: Add GCC_BASE_VER.
* Makefile.am (gcc_version): Use @get_gcc_base_ver@ instead of cat to
get version from BASE-VER file.
* configure: Regenerated.
* Makefile.in: Regenerated.
liboffloadmic/
* configure.ac: Add GCC_BASE_VER.
* Makefile.am (gcc_version): Use @get_gcc_base_ver@ instead of cat to
get version from BASE-VER file.
* aclocal.m4: Include ../config/acx.m4.
* configure: Regenerated.
* Makefile.in: Regenerated.
libquadmath/
* configure.ac: Add GCC_BASE_VER.
* Makefile.am (gcc_version): Use @get_gcc_base_ver@ instead of cat to
get version from BASE-VER file.
* configure: Regenerated.
* Makefile.in: Regenerated.
libmpx/
* configure.ac: Add GCC_BASE_VER.
* Makefile.am (gcc_version): Use @get_gcc_base_ver@ instead of cat to
get version from BASE-VER file.
* configure: Regenerated.
* Makefile.in: Regenerated.
libada/
* configure.ac: Add GCC_BASE_VER.
* Makefile.in (version): Use @get_gcc_base_ver@ instead of cat to get
version from BASE-VER file.
* configure: Regenerated.
lto-plugin/
* configure.ac: Add GCC_BASE_VER.
* Makefile.am (gcc_version): Use @get_gcc_base_ver@ instead of cat to
get version from BASE-VER file.
* configure: Regenerated.
* Makefile.in: Regenerated.
libitm/
* configure.ac: Add GCC_BASE_VER.
* Makefile.am (gcc_version): Use @get_gcc_base_ver@ instead of cat to
get version from BASE-VER file.
* testsuite/Makefile.in: Regenerated.
* configure: Regenerated.
* Makefile.in: Regenerated.
fixincludes/
* configure.ac: Add GCC_BASE_VER.
* Makefile.in (gcc_version): Use @get_gcc_base_ver@ instead of cat to
get version from BASE-VER file.
* configure: Regenerated.
libcilkrts/
* configure.ac: Add GCC_BASE_VER.
* Makefile.am (gcc_version): Use @get_gcc_base_ver@ instead of cat to
get version from BASE-VER file.
* aclocal.m4: Include ../config/acx.m4.
* configure: Regenerated.
* Makefile.in: Regenerated.
libcc1/
* configure.ac: Add GCC_BASE_VER. For --with-gcc-major-version-only
use just major number from BASE-VER.
* configure: Regenerated.
* Makefile.in: Regenerated.
libobjc/
* configure.ac: Add GCC_BASE_VER.
* Makefile.in (gcc_version): Use @get_gcc_base_ver@ instead of cat to
get version from BASE-VER file.
* configure: Regenerated.
libstdc++-v3/
* configure.ac: Add GCC_BASE_VER.
* fragment.am (gcc_version): Use @get_gcc_base_ver@ instead of cat to
get version from BASE-VER file.
* po/Makefile.in: Regenerated.
* libsupc++/Makefile.in: Regenerated.
* testsuite/Makefile.in: Regenerated.
* src/Makefile.in: Regenerated.
* configure: Regenerated.
* Makefile.in: Regenerated.
* include/Makefile.in: Regenerated.
* doc/Makefile.in: Regenerated.
* python/Makefile.in: Regenerated.
* src/c++11/Makefile.in: Regenerated.
* src/c++98/Makefile.in: Regenerated.
* src/filesystem/Makefile.in: Regenerated.
libvtv/
* configure.ac: Add GCC_BASE_VER.
* Makefile.am (gcc_version): Use @get_gcc_base_ver@ instead of cat to
get version from BASE-VER file.
* testsuite/Makefile.in: Regenerated.
* configure: Regenerated.
* Makefile.in: Regenerated.
libsanitizer/
* configure.ac: Add GCC_BASE_VER.
* Makefile.am (gcc_version): Use @get_gcc_base_ver@ instead of cat to
get version from BASE-VER file.
* libbacktrace/Makefile.in: Regenerated.
* interception/Makefile.in: Regenerated.
* asan/Makefile.in: Regenerated.
* ubsan/Makefile.in: Regenerated.
* configure: Regenerated.
* sanitizer_common/Makefile.in: Regenerated.
* lsan/Makefile.in: Regenerated.
* Makefile.in: Regenerated.
* tsan/Makefile.in: Regenerated.
libgfortran/
* configure.ac: Add GCC_BASE_VER.
* Makefile.am (gcc_version): Use @get_gcc_base_ver@ instead of cat to
get version from BASE-VER file.
* configure: Regenerated.
* Makefile.in: Regenerated.
From-SVN: r244521
The MIPS sfp-machine.h has an _FP_CHOOSENAN implementation which
emulates hardware semantics of not preserving signaling NaN payloads
for an operation with two NaN arguments (although that doesn't suffice
to avoid sNaN payload preservation in any case with just one NaN
argument).
However, those are only hardware semantics in the legacy NaN case; in
the NAN2008 case, the architecture documentation says hardware
preserves payloads in such cases. Furthermore, this implementation
assumes legacy NaN semantics, so in the NAN2008 case the
implementation actually has the effect of preserving sNaN payloads but
not preserving qNaN payloads, when both should be preserved.
This patch fixes the code just to copy from the first argument (at the
level of libgcc, it's not meaningful which argument is the first and
which is the second).
Tested for mips64-linux-gnu (soft float, NAN2008) with the glibc math/
tests.
* config/mips/sfp-machine.h (_FP_CHOOSENAN): Always preserve NaN
payload if [__mips_nan2008].
From-SVN: r244059
Also fix a stray changelog entry. Some of the regen here is due to
previous changes not being regenerated properly, in part due to the
missing configure dependencies.
* configure: Regenerate.
config/
* picflag.m4: Remove stray \xA0 in comment.
gcc/
* Makefile.in (aclocal_deps): Update and order as per aclocal.m4.
* configure: Regenerate.
* config.in: Regenerate.
libada/
* Makefile.in (configure_deps): Update and order as per
configure.ac sinclude.
* configure: Regenerate.
libgcc/
* Makefile.in (configure_deps): Update.
* configure: Regenerate.
libiberty/
* Makefile.in (configure_deps): Update.
* configure: Regenerate.
libitm/
* Makefile.in: Regenerate.
* testsuite/Makefile.in: Regenerate.
From-SVN: r244049
libgcc/
2016-12-12 George Spelvin <linux@sciencehorizons.net>
* config/avr/lib1funcs.S (__ashldi3): Use __tmp_reg__ to restore
R16 instead of push + pop.
(__ashrdi3, __lshrdi3): Same. And use __zero_reg__ for signs.
From-SVN: r243545
gcc/
2016-12-05 Cupertino Miranda <cmiranda@synopsys.com>
* config/arc/arc.h (STARTFILE_SPEC): Use default linux specs.
(ENDFILE_SPEC): Likewise.
libgcc/
2016-12-05 Cupertino Miranda <cmiranda@synopsys.com>
* config.host (arc*-*-linux-uclibc*): Use default extra
objects. Include linux-android header.
* config/arc/crti.S (_init): Declare symbol as function.
(_fini): Likewise.
From-SVN: r243245
PR gcc/74748
* libgcc/config/bfin/libgcc-glibc.ver, libgcc/config/bfin/t-linux:
use generic linker version information on Blackfin.
2016-11-27 Iain Sandoe <iain@codesourcery.com>
From-SVN: r242934
A/ Newer versions of ld64 check the min_version command, and newer versions of
the system assembler inserts this in response to "-mmacosx-version-min=" on
the assembler line. Unless one makes sensible versions, some object is bound
to conflict.
B/ Additionally, there's a difference in behaviour between "as" and "ld" when
presented with xx.yy.zz (ld truncates to xx.yy, as doesn't); net result is
that one needs to pass a truncated version to "as".
So (if the assembler supports minversion commands)
(a) provide a truncated minversion (as asm_macosx_version_min, which is a
driver-only var).
(b) pass this to "as"
(c) Update tests to determine 'HAVE_AS_MMACOSX_VERSION_MIN_OPTION'
(Rainer's patch)
(d) For some reason the testcases are "run" (it's not obvious they need to be,
they are checking compile-time issues)
- anyway, to preserve the status quo, I've left them as exec. However, the
minimum version that can be code-gened for is target-dependent (there are no
released x86 versions before 10.4, for example). To avoid conflicts where
the "as" is assuming some minimum, I've set the testversion to 10.5 (which
is supported by all the archs we have)
(e) We need to ensure that libgcc and crts are generated with a sufficiently
old minversion not to conflict.
gcc/
2016-11-27 Iain Sandoe <iain@codesourcery.com>
Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
PR target/67710
* config.in: Regenerate
* config/darwin-driver.c (darwin_driver_init): Emit a version string
for the assembler.
* config/darwin.h(ASM_MMACOSX_VERSION_MIN_SPEC): New, new tests.
* config/darwin.opt(asm_macosx_version_min): New.
* config/i386/darwin.h: Handle ASM_MMACOSX_VERSION_MIN_SPEC.
* configure: Regenerate
* configure.ac: Check for mmacosx-version-min handling.
gcc/testsuite/
2016-11-27 Iain Sandoe <iain@codesourcery.com>
Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
Dominique d'Humieres <dominiq@lps.ens.fr>
PR target/67710
* gcc.dg/darwin-minversion-1.c: Update min version check.
* gcc.dg/darwin-minversion-2.c: Likewise.
* gcc.dg/darwin-minversion-3.c: Likewise.
libgcc/
2016-11-27 Iain Sandoe <iain@codesourcery.com>
Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
PR target/67710
* config/t-darwin: Default builds to 10.5 codegen.
Co-Authored-By: Dominique d'Humieres <dominiq@lps.ens.fr>
Co-Authored-By: Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
From-SVN: r242898
libgcc/
* config/arm/fp16.c (struct format): New.
(binary32): New.
(__gnu_float2h_internal): New. Body moved from
__gnu_f2h_internal and generalize.
(_gnu_f2h_internal): Move body to function __gnu_float2h_internal.
Call it with binary32.
Co-Authored-By: Matthew Wahab <matthew.wahab@arm.com>
From-SVN: r242781
The __cpu_indicator_init and __cpu_model symbols are not safe to use
from shared libgcc_s.so from ifunc resolvers, so since gcc-6, only
the definitions from static libgcc.a are used, however the symbols
are kept in libgcc_s as well for backward compatibility (with
appropriate symbol version). On targets without such backward
compatibility concern add cpuinfo to the static library only (this
avoids running the ctor, reduces libgcc_s size and elf abi concerns
about the versioned symbols).
libgcc/
2016-11-11 Szabolcs Nagy <szabolcs.nagy@arm.com>
* config.host (i[3456]86-*-musl*, x86_64-*-musl*): Use
i386/t-cpuinfo-static instead of i386/t-cpuinfo.
* config/i386/t-cpuinfo-static: New.
From-SVN: r242268
Define LIB2ADDEH_XTENSA_UNWIND_DW2_FDE to unwind-dw2-fde.c in
xtensa/t-elf and to unwind-dw2-fde-dip.c in xtensa/t-linux and use
LIB2ADDEH_XTENSA_UNWIND_DW2_FDE in LIB2ADDEH definition.
This fixes build for elf target with windowed xtensa core that currently
breaks with the following error message:
unwind-dw2-fde-dip.c:36:40: fatal error: elf.h: No such file or directory
2016-10-18 Max Filippov <jcmvbkbc@gmail.com>
libgcc/
* config/xtensa/t-elf (LIB2ADDEH_XTENSA_UNWIND_DW2_FDE): New
definition.
* config/xtensa/t-linux (LIB2ADDEH_XTENSA_UNWIND_DW2_FDE): New
definition.
* config/xtensa/t-windowed (LIB2ADDEH): Use
LIB2ADDEH_XTENSA_UNWIND_DW2_FDE defined by either xtensa/t-elf
or xtensa/t-linux.
From-SVN: r241313
Use new FPU instruction sequences documented in the ISA book to
implement __divsf3, __divdf3, __recipsf2, __recipdf2, __rsqrtsf2,
__rsqrtdf2 and __ieee754_sqrtf and __ieee754_sqrt.
2016-10-18 Ding-Kai Chen <dkchen@cadence.com>
libgcc/
* config/xtensa/ieee754-df.S (__recipdf2, __rsqrtdf2,
__ieee754_sqrt): New functions.
(__divdf3): Add implementation with new FPU instructions under
#if XCHAL_HAVE_DFP_DIV.
* config/xtensa/ieee754-sf.S (__recipsf2, __rsqrtsf2,
__ieee754_sqrtf): New functions.
(__divsf3): Add implementation with new FPU instructions under
#if XCHAL_HAVE_FP_DIV.
* config/xtensa/t-xtensa (LIB1ASMFUNCS): Add _sqrtf, _recipsf2
_rsqrtsf2, _sqrt, _recipdf2 and _rsqrtdf2.
From-SVN: r241312
Bug 77586, and previously
<https://gcc.gnu.org/ml/gcc-bugs/2016-08/msg03233.html>, reports
ia64-elf failing to build because of float128_type_node being NULL,
but being used by the back end for __float128.
The global float128_type_node is only available conditionally, if
target hooks indicate TFmode is not only available as a scalar mode
and of the right format, but also supported in libgcc. The back-end
support, however, expects the type always to be available for
__float128 even if the libgcc support is missing.
Although a target-specific node could be restored in the case where
libgcc support is missing, it seems better to address the missing
libgcc support. Thus, this patch enables TFmode soft-fp in libgcc
globally for all ia64 targets. Support for XFmode in libgcc (that is,
for libgcc2.c XFmode functions, not soft-fp) is also enabled for all
ia64 targets so that ia64 no longer needs to define the
TARGET_LIBGCC_FLOATING_MODE_SUPPORTED_P hook.
I've confirmed that ia64-elf builds cc1 with this patch and it passes
-fself-test. I have not otherwise tested the patch. It's plausible
that ia64-elf and ia64-freebsd might work as-is, but ia64-vms probably
needs further changes, by someone familiar with VMS shared libraries,
to implement an equivalent of ia64/t-softfp-compat in that case
(avoiding conflicts between __divtf3 from soft-fp and the old alias
for __divxf3).
PR target/77586
gcc:
* config/ia64/ia64.c (ia64_libgcc_floating_mode_supported_p)
(TARGET_LIBGCC_FLOATING_MODE_SUPPORTED_P): Remove.
* config/ia64/elf.h (IA64_NO_LIBGCC_TFMODE): Likewise.
* config/ia64/freebsd.h (IA64_NO_LIBGCC_TFMODE): Likewise.
* config/ia64/vms.h (IA64_NO_LIBGCC_XFMODE)
(IA64_NO_LIBGCC_TFMODE): Likewise.
libgcc:
* config.host (ia64*-*-elf*, ia64*-*-freebsd*, ia64-hp-*vms*): Use
soft-fp.
From-SVN: r240955
PR gcov-profile/7970
PR gcov-profile/16855
PR gcov-profile/44779
* g++.dg/gcov/pr16855.C: New test.
* coverage.c (build_gcov_exit_decl): New function.
(coverage_obj_init): Call the function and generate __gcov_exit
destructor.
* doc/gcov.texi: Document when __gcov_exit function is called.
* libgcov-driver.c (__gcov_init): Do not register a atexit
handler.
(__gcov_exit): Rename from gcov_exit.
* libgcov.h (__gcov_exit): Declare.
From-SVN: r240529
* configure.ac: Do not create links, only substitute the filenames.
* configure: Regenerate.
* Makefile.in: Assign the substitution results to variables.
(LIBGCC_LINKS): Define.
(enable-execute-stack.c): New rule.
(unwind.h): Likewise.
(md-unwind-support.h): Likewise.
(sfp-machine.h): Likewise.
(gthr-default.h): Likewise.
Add $(LIBGCC_LINKS) to the prerequisites of all object files and
unwind.h as prerequisite of install-unwind_h-forbuild.
From-SVN: r240312
PR libgcc/71744
* unwind-dw2-fde.c (ATOMIC_FDE_FAST_PATH): Define if __register_frame*
is not the primary registry and atomics are available.
(any_objects_registered): New variable.
(__register_frame_info_bases, __register_frame_info_table_bases):
Atomically store 1 to any_objects_registered after registering first
unwind info.
(_Unwind_Find_FDE): Return early if any_objects_registered is 0.
From-SVN: r240193
This patch arranges for half-precision complex multiply and divide
routines to be built if __LIBGCC_HAS_HF_MODE__. This will be true
if the target supports the _Float16 type.
libgcc/
PR target/63250
* Makefile.in (lib2funcs): Build _mulhc3 and _divhc3.
* libgcc2.h (LIBGCC_HAS_HF_MODE): Conditionally define.
(HFtype): Likewise.
(HCtype): Likewise.
(__divhc3): Likewise.
(__mulhc3): Likewise.
* libgcc2.c: Support _mulhc3 and _divhc3.
From-SVN: r240043
libgcc complex multiply is meant to eliminate excess
precision from certain internal values by forcing them to memory in
exactly those cases where the type has excess precision. But in
https://gcc.gnu.org/ml/gcc-patches/2014-09/msg01894.html I
accidentally inverted the logic so that values get forced to memory in
exactly the cases where it's not needed. (This is a pessimization in
the no-excess-precision case, in principle could lead to bad results
depending on code generation in the excess-precision case. Note: I do
not have a test demonstrating bad results.)
Bootstrapped with no regressions on x86_64-pc-linux-gnu. Code size
went down on x86_64 as expected; old sizes:
text data bss dec hex filename
887 0 0 887 377 _muldc3.o
810 0 0 810 32a _mulsc3.o
2032 0 0 2032 7f0 _multc3.o
983 0 0 983 3d7 _mulxc3.o
New sizes:
847 0 0 847 34f _muldc3.o
770 0 0 770 302 _mulsc3.o
2032 0 0 2032 7f0 _multc3.o
951 0 0 951 3b7 _mulxc3.o
PR libgcc/77519
* libgcc2.c (NOTRUNC): Invert settings.
From-SVN: r240033
In <https://gcc.gnu.org/ml/gcc-bugs/2016-08/msg03233.html>, Nick
reported i386-elf and ia64-elf failing to build because of
float128_type_node being NULL, but being used by the back end for
__float128.
The global float128_type_node is only available conditionally, if
target hooks indicate TFmode is not only available as a scalar mode
and of the right format, but also supported in libgcc. The back-end
support, however, expects the type always to be available for
__float128 even if the libgcc support is missing.
Although a target-specific node could be restored in the case where
libgcc support is missing, it seems better to address the missing
libgcc support. Thus, this patch enables TFmode soft-fp in libgcc
globally for all x86 targets - the only special cases needed being for
targets that use soft-fp for SFmode and DFmode, one of which already
had the support for TFmode as well (so I based the i[34567]86-*-rtems*
configuration on that present for i[34567]86-*-elfiamcu). The i386
implementation of TARGET_LIBGCC_FLOATING_MODE_SUPPORTED_P is then
removed as no longer needed.
I can provide such a patch for ia64 if useful, but am not in a
position to test it (and while I'm reasonably confident that enabling
this support would be right for ia64-elf and ia64-freebsd, I've no
real idea if enabling libgcc support for TFmode, with or without also
enabling it for XFmode, would be safe for ia64-vms).
Bootstrapped with no regressions on x86_64-pc-linux-gnu.
gcc:
* config/i386/i386.c (ix86_libgcc_floating_mode_supported_p)
(TARGET_LIBGCC_FLOATING_MODE_SUPPORTED_P): Remove.
* config/i386/i386elf.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Likewise.
* config/i386/lynx.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Likewise.
* config/i386/netbsd-elf.h (IX86_MAYBE_NO_LIBGCC_TFMODE):
Likewise.
* config/i386/netbsd64.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Likewise.
* config/i386/nto.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Likewise.
* config/i386/openbsd.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Likewise.
* config/i386/rtemself.h (IX86_NO_LIBGCC_TFMODE): Likewise.
* config/i386/vxworks.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Likewise.
libgcc:
* config.host (i[34567]86-*-* | x86_64-*-*): Enable TFmode soft-fp
where not already enabled.
From-SVN: r239775
* doc/gcov.texi: Change _gcov_dump to __gcov_dump and
_gcov_reset to __gcov_reset.
* doc/gcov-tool.texi: Fix typo.
* libgcov-util.c: Fix typo and GNU coding style.
From-SVN: r239307
* Makefile.in: Remove __gcov_indirect_call_profiler.
* libgcov-profiler.c (__gcov_indirect_call_profiler): Remove
function.
* libgcov.h: And the declaration of the function.
From-SVN: r239306
* gcc.dg/tree-prof/val-prof-8.c: New test.
* value-prof.c (dump_histogram_value): Swap pow2 and non-pow2
values.
* libgcov-profiler.c (__gcov_pow2_profiler): Consider 0 as not
power of two.
From-SVN: r239304
For Aurelien Jarno <aurelien@aurel32.net>
On ARM soft-float, the float to double conversion doesn't convert a sNaN
to qNaN as the IEEE Std 754 standard mandates:
"Under default exception handling, any operation signaling an invalid
operation exception and for which a floating-point result is to be
delivered shall deliver a quiet NaN."
Given the soft float ARM code ignores exceptions and always provides a
result, a float to double conversion of a signaling NaN should return a
quiet NaN. Fix this in extendsfdf2.
gcc/ChangeLog:
PR target/59833
* config/arm/ieee754-df.S (extendsfdf2): Convert sNaN to qNaN.
gcc/testsuite/ChangeLog:
* gcc.dg/pr59833.c: New testcase.
From-SVN: r238584
2016-07-11 Hale Wang <hale.wang@arm.com>
Andre Vieira <andre.simoesdiasvieira@arm.com>
* config/arm/lib1funcs.S: Add new wrapper.
Co-Authored-By: Andre Vieira <andre.simoesdiasvieira@arm.com>
From-SVN: r238215
2016-07-07 Thomas Preud'homme <thomas.preudhomme@arm.com>
gcc/
* config/arm/arm-arches.def (armv8-m.base): Define new architecture.
(armv8-m.main): Likewise.
(armv8-m.main+dsp): Likewise.
* config/arm/arm-protos.h (FL_FOR_ARCH8M_BASE): Define.
(FL_FOR_ARCH8M_MAIN): Likewise.
* config/arm/arm-tables.opt: Regenerate.
* config/arm/bpabi.h: Add armv8-m.base, armv8-m.main and
armv8-m.main+dsp to BE8_LINK_SPEC.
* config/arm/arm.h (TARGET_HAVE_LDACQ): Exclude ARMv8-M.
(enum base_architecture): Add BASE_ARCH_8M_BASE and BASE_ARCH_8M_MAIN.
* config/arm/arm.c (arm_arch_name): Increase size to work with ARMv8-M
Baseline and Mainline.
(arm_option_override_internal): Also disable arm_restrict_it when
!arm_arch_notm. Update comment for -munaligned-access to also cover
ARMv8-M Baseline.
(arm_file_start): Increase buffer size for printing architecture name.
* doc/invoke.texi: Document architectures armv8-m.base, armv8-m.main
and armv8-m.main+dsp.
(mno-unaligned-access): Clarify that this is disabled by default for
ARMv8-M Baseline architectures as well.
gcc/testsuite/
* lib/target-supports.exp: Generate add_options_for_arm_arch_FUNC and
check_effective_target_arm_arch_FUNC_multilib for ARMv8-M Baseline and
ARMv8-M Mainline architectures.
libgcc/
* config/arm/lib1funcs.S (__ARM_ARCH__): Define to 8 for ARMv8-M.
From-SVN: r238081
2016-07-07 Thomas Preud'homme <thomas.preudhomme@arm.com>
libgcc/
* config/arm/lib1funcs.S (HAVE_ARM_CLZ): Define for ARMv6* or later
and ARMv5t* rather than for a fixed list of architectures.
From-SVN: r238080
2016-07-07 Thomas Preud'homme <thomas.preudhomme@arm.com>
gcc/
* config/arm/elf.h: Use __ARM_ARCH_ISA_THUMB and __ARM_ARCH_ISA_ARM to
decide whether to prevent some libgcc routines being included for some
multilibs rather than __ARM_ARCH_6M__ and add comment to indicate the
link between this condition and the one in
libgcc/config/arm/lib1func.S.
gcc/testsuite/
* lib/target-supports.exp (check_effective_target_arm_cortex_m): Use
__ARM_ARCH_ISA_ARM to test for Cortex-M devices.
libgcc/
* config/arm/bpabi-v6m.S: Clarify what architectures is the
implementation suitable for.
* config/arm/lib1funcs.S (__prefer_thumb__): Define among other cases
for all Thumb-1 only targets.
(NOT_ISA_TARGET_32BIT): Define for Thumb-1 only targets.
(THUMB_LDIV0): Test for NOT_ISA_TARGET_32BIT rather than
__ARM_ARCH_6M__.
(EQUIV): Likewise.
(ARM_FUNC_ALIAS): Likewise.
(umodsi3): Add check to __ARM_ARCH_ISA_THUMB != 1 to guard the idiv
version.
(modsi3): Likewise.
(clzsi2): Test for NOT_ISA_TARGET_32BIT rather than __ARM_ARCH_6M__.
(clzdi2): Likewise.
(ctzsi2): Likewise.
(L_interwork_call_via_rX): Test for __ARM_ARCH_ISA_ARM rather than
__ARM_ARCH_6M__ in guard for checking whether it is defined.
(final includes): Test for NOT_ISA_TARGET_32BIT rather than
__ARM_ARCH_6M__ and add comment to indicate the connection between
this condition and the one in gcc/config/arm/elf.h.
* config/arm/libunwind.S: Test for __ARM_ARCH_ISA_THUMB and
__ARM_ARCH_ISA_ARM rather than __ARM_ARCH_6M__.
* config/arm/t-softfp: Likewise.
From-SVN: r238079
The last target to use this was i386-interix, so since that is gone we
don't need this anymore.
libgcc/ChangeLog:
2016-07-06 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* libgcc2.c (SYMBOL__MAIN): Remove checks for
CTOR_LISTS_DEFINED_EXTERNALLY.
From-SVN: r238067
gcc/ChangeLog
* config/tilegx/linux.h: Do not include arch/icache.h
(CLEAR_INSN_CACHE): Provide inlined definition directly.
* config/tilepro/linux.h: Do not include arch/icache.h
(CLEAR_INSN_CACHE): Provide inlined definition directly.
libgcc/ChangeLog
* config/tilepro/atomic.h: Do not include arch/spr_def.h and
asm/unistd.h.
(SPR_CMPEXCH_VALUE): Define for tilegx.
(__NR_FAST_cmpxchg): Define for tilepro.
(__NR_FAST_atomic_update): Define for tilepro.
(__NR_FAST_cmpxchg64): Define for tilepro.
From-SVN: r237824
