Commit Graph

321 Commits

Author SHA1 Message Date
ths
4e9f853731 Fix [ls][wd][lr] instructions, by Aurelien Jarno.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3372 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-09 03:12:08 +00:00
ths
540635ba65 Code provision for n32/n64 mips userland emulation. Not functional yet.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3284 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-30 01:58:33 +00:00
ths
a09d88b86a Update TODO.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3278 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-30 00:45:51 +00:00
ths
671880e651 Supervisor mode implementation, by Aurelien Jarno.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3267 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-29 19:21:36 +00:00
ths
544540979c Less magic constants.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3266 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-29 19:19:59 +00:00
ths
418d7c7169 Fix MIPS FP underflow handling, spotted by Daniel Jacobowitz.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3255 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-28 19:30:36 +00:00
ths
198a74de4c Move get_sp_from_cpustate from cpu.h to target_signal.h.
Enable sigaltstack processing for more architectures.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3253 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-27 16:44:32 +00:00
ths
a04e134ad1 linux-user sigaltstack() syscall, by Thayne Harbaugh.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3252 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-27 13:57:58 +00:00
ths
08fa4bab83 hflags computation cleanup, by Aurelien Jarno.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3243 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-26 23:52:06 +00:00
ths
fe253235b2 Wrap a few often used tests with unlikely(), by Aurelien Jarno.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3242 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-26 23:50:39 +00:00
ths
42532189df Timer start/stop implementation, by Aurelien Jarno.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3237 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-25 16:53:15 +00:00
ths
387a8fe505 Optimise instructions accessing CP0, by Aurelien Jarno.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3235 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-25 14:49:47 +00:00
ths
e189e74868 Per-CPU instruction decoding implementation, by Aurelien Jarno.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3228 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-24 12:48:00 +00:00
ths
2337fdc208 Fix mips usermode emulation.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3212 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-23 17:54:29 +00:00
j_mayer
c068688b03 Extend TB flags to 64 bits (Alexander Graf).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3198 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-20 22:47:42 +00:00
ths
3b46e62427 find -type f | xargs sed -i 's/[\t ]*$//g' # Yes, again. Note the star in the regex.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3177 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-17 08:09:54 +00:00
ths
5fafdf24ef find -type f | xargs sed -i 's/[\t ]$//g' # on most files
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-16 21:08:06 +00:00
ths
ce62e5ba09 Fix tb->size mishandling, by Daniel Jacobowitz.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3160 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-11 10:04:58 +00:00
ths
ead9360e2f Partial support for 34K multithreading, not functional yet.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3156 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-06 00:18:15 +00:00
ths
3ddf0b5cde Disable 64-bit instructions on 32-bit CPU, by Aurelien Jarno.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3146 c046a42c-6fe2-441c-8c8c-71466251a162
2007-08-26 17:37:23 +00:00
ths
ae5d8053a1 Fix MIPS cache configuration, by Aurelien Jarno.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3092 c046a42c-6fe2-441c-8c8c-71466251a162
2007-07-29 22:11:46 +00:00
ths
475d91106d Update TODO list.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3057 c046a42c-6fe2-441c-8c8c-71466251a162
2007-07-11 10:25:04 +00:00
ths
5e4ef64cfd Simplify round/ceil/floor implementation, spotted by Fabrice Bellard.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3031 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-28 14:07:05 +00:00
ths
e3b60f1d9e Fix computation for ceil, floor and round instructions.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3028 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-27 19:01:46 +00:00
ths
8dfdb87c8d Implement recip1/recip2/rsqrt1/rsqrt2.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3026 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-26 20:26:03 +00:00
ths
996ba2ccf5 MIPS64 improvements, based on a patch by Aurelien Jarno.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3021 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-25 17:34:33 +00:00
ths
e034e2c39a Handle MIPS64 SEGBITS value correctly.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3011 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-23 18:04:12 +00:00
ths
17044c06b8 Allow emulation of 32bit targets in the MIPS64 capable qemu version.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3007 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-22 23:50:19 +00:00
ths
7bfd934a13 Fix write to K0 bits in Config0, by Aurelien Jarno.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3006 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-22 11:50:17 +00:00
ths
bd04c6feb9 Change 20Kc PRID to a later version.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2980 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-12 12:43:47 +00:00
ths
70cf0b63f1 R5k has PX implemented.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2963 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-09 12:29:32 +00:00
ths
9467d44c4d Move target-specific defines to the target directories.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2940 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-03 21:02:38 +00:00
ths
bfed01fc79 Clean up of some target specifics in exec.c/cpu-exec.c.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2936 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-03 17:44:37 +00:00
ths
3a95e3a7d9 Check for R2 instructions, and throw RI if we don't emulate R2.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2921 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-02 00:25:12 +00:00
ths
1e3d0552f5 Update some comments, 64bit FPU support is functional regardless of
funny non-standard fcr0 bits on earlier CPUs.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2919 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-01 21:57:32 +00:00
ths
8487327a1d Make sure hflags are updated for CP0_Status changes.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2918 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-01 17:47:07 +00:00
ths
c13af1ef6c Update TODO.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2911 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-01 15:18:04 +00:00
ths
c9c1a06457 Add support for 5Kc/5Kf/20Kc, based on a patch by Aurelien Jarno.
Note that the F64 flag isn't usable on any of those (and the R4000),
so all our 64bit FPU goodness goes out of the window until a shadow
capability flag is implemented. :-(


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2910 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-01 14:58:56 +00:00
ths
a7037b2950 Allow again FPU for usermode emulation.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2905 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-01 11:47:24 +00:00
ths
278d070272 Simplify code.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2904 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-31 23:42:46 +00:00
ths
33ac7f1630 Don't kill the registered irqs on reset.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2903 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-31 16:18:58 +00:00
ths
924b2c07cd Add proper float*_is_nan prototypes.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2902 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-31 16:17:52 +00:00
ths
51b2772f28 Fix CPU (re-)selection on reset.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2900 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-30 20:46:02 +00:00
ths
78749ba859 Fix usermode check, thanks Aurelien Jarno.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2897 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-29 18:55:34 +00:00
ths
5e755519ac Don't check the FPU state for each FPU instruction, use hflags to
handle this per-tb.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2896 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-29 16:52:57 +00:00
ths
6e473128b6 Handle PX/UX status flags correctly, by Aurelien Jarno.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2892 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-28 20:36:48 +00:00
ths
12a4b2aa1d Fix ddivu for 32bit hosts, by Aurelien Jarno.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2890 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-28 17:36:30 +00:00
ths
c811cf2c03 Do not sign extend lwu, by Aurelien Jarno.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2889 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-28 17:09:41 +00:00
ths
9b9e4393dd MIPS64 addressing fixes, by Aurelien Jarno.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2888 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-28 17:03:28 +00:00
ths
fd88b6abab The 24k wants more watch and srsmap registers.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2849 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-23 08:24:25 +00:00
ths
df1561e22d The previous patch to make breakpoints work was a performance
disaster, use a similiar hack as ARM does instead.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2848 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-23 08:18:27 +00:00
ths
3a5b360dac Catch more MIPS FPU cornercases, fix addr.ps and mulr.ps instructions.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2841 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-20 13:27:58 +00:00
ths
93b12ccc62 Fix indexed FP load/store instructions.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2837 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-20 01:36:29 +00:00
ths
57fa1fb31c More MIPS 64-bit FPU support.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2834 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-19 20:29:41 +00:00
ths
f469b9db01 Fix slti/sltiu for MIPS64, by Aurelien Jarno.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2833 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-19 17:45:43 +00:00
ths
5d46d55d4b Fix ldl/ldr implementation, by Aurelien Jarno.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2832 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-19 17:44:33 +00:00
ths
fd4a04ebb2 - Move FPU exception handling into helper functions, since they are big.
- Fix FP-conditional branches.
- Check FPU register mode at runtime, not translation time, as the F64
  status bit can change.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2828 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-18 11:55:54 +00:00
ths
34ae7b51f5 Work around the lack of proper handling for self-modifying code.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2827 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-18 01:13:09 +00:00
ths
69d357286d More generic 64 bit multiplication support, by Aurelien Jarno.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2821 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-16 11:59:40 +00:00
ths
100ce98812 Full MIPS64 MMU implementation, by Aurelien Jarno.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2820 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-13 19:22:13 +00:00
ths
f1b0aa5de7 Fix mfc0 and dmtc0 instructions on MIPS64, by Aurelien Jarno.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2819 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-13 18:39:10 +00:00
ths
7b62f20c08 Delete misleading comment.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2814 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-13 15:29:26 +00:00
ths
703eaf379e Don't decode CP0 XContext on 32bit MIPS.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2812 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-13 14:42:18 +00:00
ths
f2e9ebef12 MMU code improvements, by Aurelien Jarno.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2811 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-13 14:07:26 +00:00
ths
388bb21af6 MIPS linux-user update.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2810 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-13 13:58:00 +00:00
ths
29929e3490 MIPS TLB style selection at runtime, by Herve Poussineau.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2809 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-13 13:49:44 +00:00
ths
5a1e8ffbe7 Implemented cabs FP instructions, and improve exception handling for
trunc/floor/ceil/round.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2804 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-11 17:08:26 +00:00
ths
287c4b84f4 Another bit of nicer debug output.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2803 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-11 10:43:55 +00:00
ths
fbcc68286a Implement FP madd/msub, wire up bc1any[24][ft].
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2802 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-11 09:59:10 +00:00
ths
923617a396 Improved debug output for the MIPS opcode decoder.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2801 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-11 00:16:06 +00:00
ths
4759513bd9 Fix missing status ro mask initialization, thanks Stefan Weil.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2800 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-11 00:02:14 +00:00
ths
beebb570f4 Fix for the scd instruction, by Aurelien Jarno.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2799 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-10 00:51:01 +00:00
ths
b4ab4b4e1b Preliminary MIPS 64-bit MMU implementation, by Aurelien Jarno.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2794 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-09 09:34:30 +00:00
ths
a6763a5881 Fix MIPS64 address computation specialcase, by Aurelien Jarno.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2793 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-09 09:33:33 +00:00
ths
09c69c5b23 Work around gcc's mips define, spotted by Stefan Weil.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2786 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-08 20:51:26 +00:00
ths
5a5012ecbd MIPS 64-bit FPU support, plus some collateral bugfixes in the
conditional branch handling.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2779 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-07 13:55:33 +00:00
ths
8b4af70527 Update TODO.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2778 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-07 12:52:18 +00:00
ths
0a6de75002 Clear BD slot on next exception if appropriate.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2777 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-07 12:46:25 +00:00
ths
9aca99a06d Fix a really stupid bug in the [ls]d[lr] emulation, by Herve Poussineau.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2773 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-05 20:13:13 +00:00
ths
01179c382b Kill broken host register definitions, thanks to Paul Brook and Herve
Poussineau for debugging this.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2747 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-29 21:26:37 +00:00
ths
c631c88cee Revert last checkin.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2746 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-29 21:19:03 +00:00
ths
bc8191fce9 Hopefully the final fix for LUI sign extensions.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2745 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-29 20:13:19 +00:00
ths
509b8ab2cc Update TODO.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2739 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-28 21:44:04 +00:00
ths
d6929309b6 Next attempt to get the lui sign extension right.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2727 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-25 16:41:11 +00:00
ths
7bc45061ee Fix lui sign extension.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2726 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-25 13:58:52 +00:00
ths
19221bdaf8 Update comment. We can't easily adhere to the architecture spec because
it would involve counting the actually executed instructions.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2708 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-19 16:35:09 +00:00
ths
fcb4a419f5 Choose number of TLBs at runtime, by Herve Poussineau.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2693 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-17 15:26:47 +00:00
ths
9898128f55 Simplify branch likely handling.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2676 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-16 01:35:29 +00:00
ths
171b31e7c7 Don't use T2 for INS, it conflicts with branch delay slot handling.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2674 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-15 21:26:37 +00:00
ths
80c27194a7 Fix qemu SIGFPE caused by division-by-zero due to underflow.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2673 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-15 21:21:33 +00:00
ths
a85427b147 Small code generation optimization.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2672 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-15 19:52:12 +00:00
ths
fff739ccd5 Delete unused define.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2671 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-15 17:27:07 +00:00
ths
16c00cb2c2 Restart interrupts after an exception.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2664 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-14 12:56:46 +00:00
ths
744e091596 Nicer Log formatting.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2659 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-13 22:30:36 +00:00
ths
e58c8ba5f6 Another fix for CP0 Cause register handling.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2658 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-13 20:17:54 +00:00
ths
2f6445458e Make SYNCI_Step and CCRes CPU-specific.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2651 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-11 20:34:23 +00:00
ths
b48cfdffd9 Throw RI for invalid MFMC0-class instructions. Introduce optional
MIPS_STRICT_STANDARD define to adhere more to the spec than it makes
sense in normal operation.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2650 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-11 02:24:14 +00:00
ths
2423f6601a Code formatting fix.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2649 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-11 02:15:08 +00:00
ths
534ce69ff0 More Context/Xcontext fixes. Ifdef some 64bit-only ops, they may
end up empty for 32bit mips, which dyngen trips over.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2648 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-11 02:13:00 +00:00
ths
c090a8f440 Fix CP0_IntCtl handling.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2645 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-09 14:17:31 +00:00
ths
c50da3df61 Proper handling of reserved bits in the context register.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2644 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-09 14:16:30 +00:00
ths
4e7a4a4e84 Mark watchpoint features as unimplemented.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2643 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-09 14:15:41 +00:00
ths
62c5609aa5 Catch unaligned sc/scd.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2642 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-09 14:14:21 +00:00
ths
97428a4d84 Fix exception handling cornercase for rdhwr.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2641 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-09 14:13:40 +00:00
ths
dac9321024 Remove bogus mtc0 handling.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2640 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-09 12:31:31 +00:00
pbrook
d537cf6c86 Unify IRQ handling.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2635 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-07 18:14:41 +00:00
j_mayer
9b3c35e0e6 cpu_get_phys_page_debug should return target_phys_addr_t
instead of target_ulong to be consistent.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2633 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-07 11:21:28 +00:00
ths
e0c84da78c Implement prefx.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2630 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-07 01:11:39 +00:00
ths
cbeb0857da Set proper BadVAddress value for unaligned instruction fetch.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2629 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-07 01:11:15 +00:00
ths
e04bcc691b Actually skip over delay slot for a non-taken branch likely.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2628 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-07 01:10:22 +00:00
ths
f757d6ff29 Fix ins/ext cornercase.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2627 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-07 01:09:17 +00:00
ths
beb811bdd6 Fix handling of ADES exceptions.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2623 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-06 19:31:06 +00:00
ths
f41c52f170 Save state for all CP0 instructions, they may throw a CPU exception.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2622 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-06 18:46:01 +00:00
ths
c53f4a62e3 fix branch delay slot cornercases.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2615 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-05 23:21:37 +00:00
ths
5a63bcb2d2 Fix rotr immediate ops, mask shift/rotate arguments to their allowed
size.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2614 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-05 23:20:05 +00:00
ths
acd858d91f Handle EBase properly.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2613 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-05 23:18:13 +00:00
ths
1579a72ec5 Fix RDHWR handling. Code formatting. Don't use *_direct versions to raise
exceptions.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2611 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-05 23:16:25 +00:00
ths
f7cfb2a176 64bit MIPS FPUs have 32 registers.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2610 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-05 23:14:23 +00:00
ths
876d4b0783 Fix code formatting.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2595 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-04 21:07:17 +00:00
ths
38121543c7 MIPS32R2 needs RDPGPR/WRPGPR instructions even when no shadow registers
are implemented.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2589 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-02 17:28:07 +00:00
ths
2d0e944d1c Build fix for 64bit machines. (This is still not correct mul/div handling.)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2587 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-02 15:54:05 +00:00
ths
60aa19abef Actually enable 64bit configuration.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2565 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-01 12:36:18 +00:00
ths
fbe4f65b28 MIPS64 configurations.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2564 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-01 11:16:48 +00:00
ths
a4bc3afc09 Malta CBUS UART support.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2557 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-31 16:54:14 +00:00
ths
7246bb21ba Update mips TODO.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2549 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-30 18:56:19 +00:00
ths
36bb244bd3 Fix typo, suggested by Ben Taylor.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2548 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-30 18:42:21 +00:00
ths
5efbfeddac Squash logic bugs while they are fresh...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2547 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-30 17:48:00 +00:00
ths
24c7b0e330 Sanitize mips exception handling.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2546 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-30 16:44:54 +00:00
ths
34ee2edebb One more bit of mips CPU configuration, and support for early 4KEc
which implemented only MIPS32R1. Thanks to Stefan Weil to insist he's
right on that. :-)


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2533 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-24 23:36:18 +00:00
ths
e397ee3382 Fix enough FPU/R2 support to get 24Kf going.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2528 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-23 00:43:28 +00:00
ths
3953d78687 Move mips CPU specific initialization to translate_init.c.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2522 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-21 11:04:42 +00:00
ths
3ad4bb2d3d Barf on branches/jumps in branch delay slots. Spotted by Stefan Weil.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2513 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-19 22:15:30 +00:00
ths
820e00f252 Define gen_intermediate_code_internal as "static inline".
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2512 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-19 21:46:06 +00:00
ths
8294eba187 SPARC host fixes, by Ben Taylor.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2503 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-19 14:47:40 +00:00
ths
39d51eb8bc Fix BD flag handling, cause register contents, implement some more bits
for R2 interrupt handling.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2493 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-18 12:43:40 +00:00
ths
33d68b5f00 MIPS -cpu selection support, by Herve Poussineau.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2491 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-18 00:30:29 +00:00
ths
60a9f9ecd9 Note FPU enable/disable issue.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2489 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-17 15:39:48 +00:00
ths
6f5b89a07c MIPS Userland TLS register emulation, by Daniel Jacobowitz.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2465 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-02 20:48:00 +00:00
ths
36d2395873 MIPS FPU dynamic activation, part 1, by Herve Poussineau.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2463 c046a42c-6fe2-441c-8c8c-71466251a162
2007-02-28 22:37:42 +00:00
ths
00a709c7b9 Fix mips FPU emulation, 32 bit data types are allowed to use odd registers.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2454 c046a42c-6fe2-441c-8c8c-71466251a162
2007-02-27 19:27:51 +00:00
ths
3594c77487 Replace TLSZ with TARGET_FMT_lx.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2444 c046a42c-6fe2-441c-8c8c-71466251a162
2007-02-20 23:37:21 +00:00
ths
925fd0f202 Fix sign-extension of VPN field in TLB, by Herve Poussineau.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2433 c046a42c-6fe2-441c-8c8c-71466251a162
2007-02-18 00:19:08 +00:00
ths
4a109bfbca Update MIPS TODO.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2378 c046a42c-6fe2-441c-8c8c-71466251a162
2007-02-02 02:56:33 +00:00
ths
01d6a890b4 Sparc arm/mips/sparc register patch, by Martin Bochnig.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2377 c046a42c-6fe2-441c-8c8c-71466251a162
2007-02-02 01:03:34 +00:00
ths
b29a0341d7 EBase is limited to KSEG0/KSEG1 even on 64bit CPUs.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2351 c046a42c-6fe2-441c-8c8c-71466251a162
2007-01-24 18:01:23 +00:00
ths
4de9b249d3 Reworking MIPS interrupt handling, by Aurelien Jarno.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2350 c046a42c-6fe2-441c-8c8c-71466251a162
2007-01-24 01:47:51 +00:00
ths
9c2149c8e0 Implementing dmfc/dmtc.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2348 c046a42c-6fe2-441c-8c8c-71466251a162
2007-01-23 22:45:22 +00:00
ths
81e1e20979 Update TODO.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2346 c046a42c-6fe2-441c-8c8c-71466251a162
2007-01-22 20:57:17 +00:00
ths
3b1c8be4f4 Fix PageMask handling, second part.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2345 c046a42c-6fe2-441c-8c8c-71466251a162
2007-01-22 20:50:42 +00:00
ths
72f341ed1e TLB address wraparound hopefully fixed now.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2342 c046a42c-6fe2-441c-8c8c-71466251a162
2007-01-21 03:13:58 +00:00