2006-08-15 01:45:59 +02:00
|
|
|
|
2006-08-04 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
|
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|
* i386-dis.c (MXC,EMC): Define.
|
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|
|
(OP_MXC): New function to handle cvt* (convert instructions) between
|
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|
|
|
|
%xmm and %mm register correctly.
|
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|
(OP_EMC): ditto.
|
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|
|
(prefix_user_table): Modified cvtpi2pd,cvtpd2pi and cvttpd2pi
|
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|
|
instruction operands in PREGRP2,PREGRP3,PREGRP4 appropriately
|
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|
with EMC/MXC.
|
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|
2006-07-29 10:55:38 +02:00
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|
2006-07-29 Richard Sandiford <richard@codesourcery.com>
|
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|
|
* m68k-opc.c (m68k_opcodes): Fix operand specificer in the Coldfire
|
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|
|
|
"fdaddl" entry.
|
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|
|
2006-07-19 14:53:33 +02:00
|
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|
2006-07-19 Paul Brook <paul@codesourcery.com>
|
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|
|
* armd-dis.c (arm_opcodes): Fix rbit opcode.
|
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|
2006-07-18 22:25:41 +02:00
|
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|
2006-07-18 H.J. Lu <hongjiu.lu@intel.com>
|
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* i386-dis.c (grps): Change "sldtQ", "strQ" and "smswQ" to
|
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|
|
"sldt", "str" and "smsw".
|
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|
2006-07-15 18:58:36 +02:00
|
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|
2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
|
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|
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|
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|
|
PR binutils/2829
|
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|
|
* i386-dis.c (GRP11_C6): NEW.
|
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|
|
(GRP11_C7): Likewise.
|
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|
|
(GRP12): Updated.
|
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|
(GRP13): Likewise.
|
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|
(GRP14): Likewise.
|
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|
(GRP15): Likewise.
|
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|
(GRP16): Likewise.
|
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|
|
(GRPAMD): Likewise.
|
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|
(GRPPADLCK1): Likewise.
|
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|
(GRPPADLCK2): Likewise.
|
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|
|
(dis386): Use GRP11_C6 and GRP11_C7 for entres 0xc6 and 0xc7,
|
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|
respectively.
|
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|
(grps): Add entries for GRP11_C6 and GRP11_C7.
|
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|
|
2006-07-14 00:25:48 +02:00
|
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|
|
2006-07-10 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
|
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|
|
|
|
Michael Meissner <michael.meissner@amd.com>
|
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|
|
|
|
|
|
|
|
* i386-dis.c (dis386): Add support for 4 operand instructions. Add
|
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|
|
|
|
support for amdfam10 SSE4a/ABM instructions. Modify all
|
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|
|
|
|
initializer macros to have additional arguments. Disallow REP
|
|
|
|
|
|
prefix for non-string instructions.
|
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|
|
(print_insn): Ditto.
|
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|
2006-07-05 19:08:47 +02:00
|
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|
|
2006-07-05 Julian Brown <julian@codesourcery.com>
|
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|
|
|
|
|
|
|
|
|
* arm-dis.c (coprocessor): Alter fmsrr disassembly syntax.
|
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|
|
2006-06-12 20:59:37 +02:00
|
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|
|
2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
|
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|
|
* i386-dis.c (dis386_twobyte): Use "nopQ" for 0x1f.
|
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|
|
(twobyte_has_modrm): Set 1 for 0x1f.
|
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|
|
gas/
2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (process_suffix): Don't add rex64 for
"xchg %rax,%rax".
gas/testsuite/
2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/opcode.s: Add "xchg %ax,%ax".
* gas/i386/opcode.d: Updated.
* gas/i386/x86-64-opcode.s: Add xchg %ax,%ax, xchg %eax,%eax,
xchg %rax,%rax, rex64 xchg %rax,%rax and xchg %rax,%r8.
* gas/i386/x86-64-opcode.d: Updated.
include/opcode/
2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (i386_optab): Update comment for 64bit NOP.
opcodes/
2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (NOP_Fixup): Removed.
(NOP_Fixup1): New.
(NOP_Fixup2): Likewise.
(dis386): Use NOP_Fixup1 and NOP_Fixup2 on 0x90.
2006-06-12 20:55:44 +02:00
|
|
|
|
2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-dis.c (NOP_Fixup): Removed.
|
|
|
|
|
|
(NOP_Fixup1): New.
|
|
|
|
|
|
(NOP_Fixup2): Likewise.
|
|
|
|
|
|
(dis386): Use NOP_Fixup1 and NOP_Fixup2 on 0x90.
|
|
|
|
|
|
|
2006-06-12 17:31:28 +02:00
|
|
|
|
2006-06-12 Julian Brown <julian@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* arm-dis.c (print_insn_neon): Disassemble 32-bit immediates as signed
|
|
|
|
|
|
on 64-bit hosts.
|
|
|
|
|
|
|
2006-06-10 20:20:39 +02:00
|
|
|
|
2006-06-10 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386.c (GRP10): Renamed to ...
|
|
|
|
|
|
(GRP12): This.
|
|
|
|
|
|
(GRP11): Renamed to ...
|
|
|
|
|
|
(GRP13): This.
|
|
|
|
|
|
(GRP12): Renamed to ...
|
|
|
|
|
|
(GRP14): This.
|
|
|
|
|
|
(GRP13): Renamed to ...
|
|
|
|
|
|
(GRP15): This.
|
|
|
|
|
|
(GRP14): Renamed to ...
|
|
|
|
|
|
(GRP16): This.
|
|
|
|
|
|
(dis386_twobyte): Updated.
|
|
|
|
|
|
(grps): Likewise.
|
|
|
|
|
|
|
2006-06-09 15:40:51 +02:00
|
|
|
|
2006-06-09 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* po/fi.po: Updated Finnish translation.
|
|
|
|
|
|
|
2006-06-07 17:38:01 +02:00
|
|
|
|
2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* po/Make-in (pdf, ps): New dummy targets.
|
|
|
|
|
|
|
2006-06-07 16:08:19 +02:00
|
|
|
|
2006-06-06 Paul Brook <paul@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* arm-dis.c (coprocessor_opcodes): Add %c to unconditional arm
|
|
|
|
|
|
instructions.
|
|
|
|
|
|
(neon_opcodes): Add conditional execution specifiers.
|
|
|
|
|
|
(thumb_opcodes): Ditto.
|
|
|
|
|
|
(thumb32_opcodes): Ditto.
|
|
|
|
|
|
(arm_conditional): Change 0xe to "al" and add "" to end.
|
|
|
|
|
|
(ifthen_state, ifthen_next_state, ifthen_address): New.
|
|
|
|
|
|
(IFTHEN_COND): Define.
|
|
|
|
|
|
(print_insn_coprocessor, print_insn_neon): Print thumb conditions.
|
|
|
|
|
|
(print_insn_arm): Change %c to use new values of arm_conditional.
|
|
|
|
|
|
(print_insn_thumb16): Print thumb conditions. Add %I.
|
|
|
|
|
|
(print_insn_thumb32): Print thumb conditions.
|
|
|
|
|
|
(find_ifthen_state): New function.
|
|
|
|
|
|
(print_insn): Track IT block state.
|
|
|
|
|
|
|
2006-06-07 07:23:59 +02:00
|
|
|
|
2006-06-06 Ben Elliston <bje@au.ibm.com>
|
|
|
|
|
|
Anton Blanchard <anton@samba.org>
|
|
|
|
|
|
Peter Bergner <bergner@vnet.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* ppc-dis.c (powerpc_dialect): Handle power6 option.
|
|
|
|
|
|
(print_ppc_disassembler_options): Mention power6.
|
|
|
|
|
|
|
2006-06-06 12:49:48 +02:00
|
|
|
|
2006-06-06 Thiemo Seufer <ths@mips.com>
|
|
|
|
|
|
Chao-ying Fu <fu@mips.com>
|
|
|
|
|
|
|
|
|
|
|
|
* mips-dis.c: Disassemble DSP64 instructions for MIPS64R2.
|
|
|
|
|
|
* mips-opc.c: Add DSP64 instructions.
|
|
|
|
|
|
|
2006-06-06 04:48:34 +02:00
|
|
|
|
2006-06-06 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
|
|
|
|
|
* m68hc11-dis.c (print_insn): Warning fix.
|
|
|
|
|
|
|
2006-06-05 16:04:05 +02:00
|
|
|
|
2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* po/Make-in (top_builddir): Define.
|
|
|
|
|
|
|
2006-06-05 14:28:18 +02:00
|
|
|
|
2006-06-05 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
|
|
|
|
|
* Makefile.am: Run "make dep-am".
|
|
|
|
|
|
* Makefile.in: Regenerate.
|
|
|
|
|
|
* config.in: Regenerate.
|
|
|
|
|
|
|
2006-05-31 17:14:46 +02:00
|
|
|
|
2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* Makefile.am (INCLUDES): Use @INCINTL@.
|
|
|
|
|
|
* acinclude.m4: Include new gettext macros.
|
|
|
|
|
|
* configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
|
|
|
|
|
|
Remove local code for po/Makefile.
|
|
|
|
|
|
* Makefile.in, aclocal.m4, configure: Regenerated.
|
|
|
|
|
|
|
2006-05-30 13:01:59 +02:00
|
|
|
|
2006-05-30 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* po/es.po: Updated Spanish translation.
|
|
|
|
|
|
|
2006-05-25 10:09:03 +02:00
|
|
|
|
2006-05-25 Richard Sandiford <richard@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* m68k-opc.c (m68k_opcodes): Fix the masks of the Coldfire fmovemd
|
|
|
|
|
|
and fmovem entries. Put register list entries before immediate
|
|
|
|
|
|
mask entries. Use "l" rather than "L" in the fmovem entries.
|
|
|
|
|
|
* m68k-dis.c (match_insn_m68k): Remove the PRIV argument and work it
|
|
|
|
|
|
out from INFO.
|
|
|
|
|
|
(m68k_scan_mask): New function, split out from...
|
|
|
|
|
|
(print_insn_m68k): ...here. If no architecture has been set,
|
|
|
|
|
|
first try printing an m680x0 instruction, then try a Coldfire one.
|
|
|
|
|
|
|
2006-05-24 09:54:45 +02:00
|
|
|
|
2006-05-24 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* po/ga.po: Updated Irish translation.
|
|
|
|
|
|
|
2006-05-22 10:40:09 +02:00
|
|
|
|
2006-05-22 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* crx-dis.c (EXTRACT): Make macro work on 64-bit hosts.
|
|
|
|
|
|
|
2006-05-22 10:33:35 +02:00
|
|
|
|
2006-05-22 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* po/nl.po: Updated translation.
|
|
|
|
|
|
|
2006-05-18 01:44:58 +02:00
|
|
|
|
2006-05-18 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
|
|
|
|
|
* avr-dis.c: Formatting fix.
|
|
|
|
|
|
|
2006-05-14 17:35:22 +02:00
|
|
|
|
2006-05-14 Thiemo Seufer <ths@mips.com>
|
|
|
|
|
|
|
|
|
|
|
|
* mips16-opc.c (I1, I32, I64): New shortcut defines.
|
|
|
|
|
|
(mips16_opcodes): Change membership of instructions to their
|
|
|
|
|
|
lowest baseline ISA.
|
|
|
|
|
|
|
2006-05-09 18:05:40 +02:00
|
|
|
|
2006-05-09 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-dis.c (grps): Update sgdt/sidt for 64bit.
|
|
|
|
|
|
|
2006-05-05 20:56:01 +02:00
|
|
|
|
2006-05-05 Julian Brown <julian@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* arm-dis.c (coprocessor_opcodes): Don't interpret fldmx/fstmx as
|
|
|
|
|
|
vldm/vstm.
|
|
|
|
|
|
|
2006-05-05 17:41:23 +02:00
|
|
|
|
2006-05-05 Thiemo Seufer <ths@mips.com>
|
|
|
|
|
|
David Ung <davidu@mips.com>
|
|
|
|
|
|
|
|
|
|
|
|
* mips-opc.c: Add macro for cache instruction.
|
|
|
|
|
|
|
[ gas/testsuite/ChangeLog ]
2006-05-04 Thiemo Seufer <ths@mips.com>
Nigel Stephens <nigel@mips.com>
* gas/mips/mips.exp: Run mips32-dsp tests only for mips32r2.
* gas/mips/set-arch.d: Adjust according to opcode table changes.
[ include/opcode/ChangeLog ]
2006-05-04 Thiemo Seufer <ths@mips.com>
Nigel Stephens <nigel@mips.com>
David Ung <davidu@mips.com>
* mips.h: Add INSN_SMARTMIPS define.
[ opcodes/ChangeLog ]
2006-05-04 Thiemo Seufer <ths@mips.com>
Nigel Stephens <nigel@mips.com>
David Ung <davidu@mips.com>
* mips-dis.c (mips_arch_choices): Add smartmips instruction
decoding to MIPS32 and MIPS32R2. Limit DSP decoding to release
2 ISAs. Add MIPS3D decoding to MIPS32R2. Add MT decoding to
MIPS64R2.
* mips-opc.c: fix random typos in comments.
(INSN_SMARTMIPS): New defines.
(mips_builtin_opcodes): Add paired single support for MIPS32R2.
Move bc3f, bc3fl, bc3t, bc3tl downwards. Move flushi, flushd,
flushid, wb upwards. Move cfc3, ctc3 downwards. Rework the
FP_S and FP_D flags to denote single and double register
accesses separately. Move dmfc3, dmtc3, mfc3, mtc3 downwards.
Allow jr.hb and jalr.hb for release 1 ISAs. Allow luxc1, suxc1
for MIPS32R2. Add SmartMIPS instructions. Add two-argument
variants of bc2f, bc2fl, bc2t, bc2tl. Add mfhc2, mthc2 to
release 2 ISAs.
* mips16-opc.c (mips16_opcodes): Add sdbbp instruction.
2006-05-04 12:47:05 +02:00
|
|
|
|
2006-05-04 Thiemo Seufer <ths@mips.com>
|
|
|
|
|
|
Nigel Stephens <nigel@mips.com>
|
|
|
|
|
|
David Ung <davidu@mips.com>
|
|
|
|
|
|
|
|
|
|
|
|
* mips-dis.c (mips_arch_choices): Add smartmips instruction
|
|
|
|
|
|
decoding to MIPS32 and MIPS32R2. Limit DSP decoding to release
|
|
|
|
|
|
2 ISAs. Add MIPS3D decoding to MIPS32R2. Add MT decoding to
|
|
|
|
|
|
MIPS64R2.
|
|
|
|
|
|
* mips-opc.c: fix random typos in comments.
|
|
|
|
|
|
(INSN_SMARTMIPS): New defines.
|
|
|
|
|
|
(mips_builtin_opcodes): Add paired single support for MIPS32R2.
|
|
|
|
|
|
Move bc3f, bc3fl, bc3t, bc3tl downwards. Move flushi, flushd,
|
|
|
|
|
|
flushid, wb upwards. Move cfc3, ctc3 downwards. Rework the
|
|
|
|
|
|
FP_S and FP_D flags to denote single and double register
|
|
|
|
|
|
accesses separately. Move dmfc3, dmtc3, mfc3, mtc3 downwards.
|
|
|
|
|
|
Allow jr.hb and jalr.hb for release 1 ISAs. Allow luxc1, suxc1
|
|
|
|
|
|
for MIPS32R2. Add SmartMIPS instructions. Add two-argument
|
|
|
|
|
|
variants of bc2f, bc2fl, bc2t, bc2tl. Add mfhc2, mthc2 to
|
|
|
|
|
|
release 2 ISAs.
|
|
|
|
|
|
* mips16-opc.c (mips16_opcodes): Add sdbbp instruction.
|
|
|
|
|
|
|
2006-05-03 22:59:20 +02:00
|
|
|
|
2006-05-03 Thiemo Seufer <ths@mips.com>
|
|
|
|
|
|
|
|
|
|
|
|
* mips-opc.c (mips_builtin_opcodes): Fix mftr argument order.
|
|
|
|
|
|
|
2006-05-02 13:12:41 +02:00
|
|
|
|
2006-05-02 Thiemo Seufer <ths@mips.com>
|
|
|
|
|
|
Nigel Stephens <nigel@mips.com>
|
|
|
|
|
|
David Ung <davidu@mips.com>
|
|
|
|
|
|
|
|
|
|
|
|
* mips-dis.c (print_insn_args): Force mips16 to odd addresses.
|
|
|
|
|
|
(print_mips16_insn_arg): Force mips16 to odd addresses.
|
|
|
|
|
|
|
2006-04-30 20:34:39 +02:00
|
|
|
|
2006-04-30 Thiemo Seufer <ths@mips.com>
|
|
|
|
|
|
David Ung <davidu@mips.com>
|
|
|
|
|
|
|
|
|
|
|
|
* mips-opc.c (mips_builtin_opcodes): Add udi instructions
|
|
|
|
|
|
"udi0" to "udi15".
|
|
|
|
|
|
* mips-dis.c (print_insn_args): Adds udi argument handling.
|
|
|
|
|
|
|
2006-04-29 05:11:31 +02:00
|
|
|
|
2006-04-28 James E Wilson <wilson@specifix.com>
|
|
|
|
|
|
|
|
|
|
|
|
* m68k-dis.c (match_insn_m68k): Restore fprintf_func before printing
|
|
|
|
|
|
error message.
|
|
|
|
|
|
|
2006-04-28 15:17:00 +02:00
|
|
|
|
2006-04-28 Thiemo Seufer <ths@mips.com>
|
|
|
|
|
|
David Ung <davidu@mips.com>
|
2006-04-28 15:38:49 +02:00
|
|
|
|
Nigel Stephens <nigel@mips.com>
|
2006-04-28 15:17:00 +02:00
|
|
|
|
|
|
|
|
|
|
* mips-dis.c (mips_cp0sel_names_mips3264r2): Add MT register
|
|
|
|
|
|
names.
|
|
|
|
|
|
|
2006-04-28 14:59:30 +02:00
|
|
|
|
2006-04-28 Thiemo Seufer <ths@mips.com>
|
2006-04-28 15:38:49 +02:00
|
|
|
|
Nigel Stephens <nigel@mips.com>
|
2006-04-28 14:59:30 +02:00
|
|
|
|
David Ung <davidu@mips.com>
|
|
|
|
|
|
|
|
|
|
|
|
* mips-dis.c (print_insn_args): Add mips_opcode argument.
|
|
|
|
|
|
(print_insn_mips): Adjust print_insn_args call.
|
|
|
|
|
|
|
2006-04-28 14:19:31 +02:00
|
|
|
|
2006-04-28 Thiemo Seufer <ths@mips.com>
|
2006-04-28 15:38:49 +02:00
|
|
|
|
Nigel Stephens <nigel@mips.com>
|
2006-04-28 14:19:31 +02:00
|
|
|
|
|
|
|
|
|
|
* mips-dis.c (print_insn_args): Print $fcc only for FP
|
|
|
|
|
|
instructions, use $cc elsewise.
|
|
|
|
|
|
|
2006-04-28 13:42:28 +02:00
|
|
|
|
2006-04-28 Thiemo Seufer <ths@mips.com>
|
2006-04-28 15:38:49 +02:00
|
|
|
|
Nigel Stephens <nigel@mips.com>
|
2006-04-28 13:42:28 +02:00
|
|
|
|
|
|
|
|
|
|
* opcodes/mips-dis.c (mips16_to_32_reg_map, mips16_reg_names):
|
|
|
|
|
|
Map MIPS16 registers to O32 names.
|
|
|
|
|
|
(print_mips16_insn_arg): Use mips16_reg_names.
|
|
|
|
|
|
|
2006-04-26 18:02:07 +02:00
|
|
|
|
2006-04-26 Julian Brown <julian@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* arm-dis.c (print_insn_neon): Disassemble floating-point constant
|
|
|
|
|
|
VMOV.
|
|
|
|
|
|
|
2006-04-26 17:40:55 +02:00
|
|
|
|
2006-04-26 Nathan Sidwell <nathan@codesourcery.com>
|
|
|
|
|
|
Julian Brown <julian@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k, convert
|
|
|
|
|
|
%<code>[zy] into %[zy]<code>. Expand meaning of %<bitfield>['`?].
|
|
|
|
|
|
Add unified load/store instruction names.
|
|
|
|
|
|
(neon_opcode_table): New.
|
|
|
|
|
|
(arm_opcodes): Expand meaning of %<bitfield>['`?].
|
|
|
|
|
|
(arm_decode_bitfield): New.
|
|
|
|
|
|
(print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
|
|
|
|
|
|
Use arm_decode_bitfield and adjust numeric specifiers. Adjust %z & %y.
|
|
|
|
|
|
(print_insn_neon): New.
|
|
|
|
|
|
(print_insn_arm): Adjust print_insn_coprocessor call. Call
|
|
|
|
|
|
print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
|
|
|
|
|
|
(print_insn_thumb32): Likewise.
|
|
|
|
|
|
|
2006-04-19 14:10:21 +02:00
|
|
|
|
2006-04-19 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
|
|
|
|
|
* Makefile.am: Run "make dep-am".
|
|
|
|
|
|
* Makefile.in: Regenerate.
|
|
|
|
|
|
|
2006-04-19 04:06:15 +02:00
|
|
|
|
2006-04-19 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
2006-04-19 04:15:05 +02:00
|
|
|
|
* avr-dis.c (avr_operand): Warning fix.
|
|
|
|
|
|
|
2006-04-19 04:06:15 +02:00
|
|
|
|
* configure: Regenerate.
|
|
|
|
|
|
|
2006-04-16 20:25:11 +02:00
|
|
|
|
2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* po/POTFILES.in: Regenerated.
|
|
|
|
|
|
|
2006-04-12 15:09:10 +02:00
|
|
|
|
2006-04-12 Hochstein <hochstein@algo.informatik.tu-darmstadt.de>
|
|
|
|
|
|
|
|
|
|
|
|
PR binutils/2454
|
|
|
|
|
|
* avr-dis.c (avr_operand): Arrange for a comment to appear before
|
|
|
|
|
|
the symolic form of an address, so that the output of objdump -d
|
|
|
|
|
|
can be reassembled.
|
|
|
|
|
|
|
2006-04-10 23:19:14 +02:00
|
|
|
|
2006-04-10 DJ Delorie <dj@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* m32c-asm.c: Regenerate.
|
|
|
|
|
|
|
2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
* Makefile.tpl: Add install-html target.
* Makefile.def: Add install-html target.
* Makefile.in: Regenerate.
* configure.in: Add --with-datarootdir, --with-docdir,
and --with-htmldir options.
* configure: Regenerate.
bfd/
2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
* po/Make-in: Add install-html target.
* Makefile.am: Rename docdir to bfddocdir. Add datarootdir, docdir
htmldir. Add install-html and install-html-recursive targets.
* Makefile.in: Regenerate.
* configure.in: AC_SUBST for datarootdir, docdir and htmldir.
* configure: Regenerate.
bfd/doc/
2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
* Makefile.am: Add install-html and install-html-am targets.
Define datarootdir, docdir and htmldir.
* Makefile.in: Regenerate.
binutils/
2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
* po/Make-in: Add install-html target.
* Makefile.am: Add install-html and install-html-recursive targets.
* Makefile.in: Regenerate.
* configure.in: AC_SUBST datarootdir, docdir and htmldir.
* configure: Regenerate.
* doc/Makefile.am: Add install-html and install-html-am targets.
* doc/Makefile.in: Regenerate.
etc/
2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
* Makefile.in: Add install-html target. Add htmldir,
docdir and datarootdir.
* configure.texi: Document install-html target.
* configure.in: AC_SUBST datarootdir, docdir, htmldir.
* configure: Regenerate.
gas/
2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
* po/Make-in: Add install-html target.
* Makefile.am: Add install-html and install-html-recursive targets.
* Makefile.in: Regenerate.
* configure.in: AC_SUBST datarootdir, docdir, htmldir.
* configure: Regenerate.
* doc/Makefile.am: Add install-html and install-html-am targets.
* doc/Makefile.in: Regenerate.
gprof/
2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
* po/Make-in: Add install-html target.
* Makefile.am: Add install-html, install-html-am and
install-html-recursive targets.
* Makefile.in: Regenerate.
* configure.in: AC_SUBST datarootdir, docdir, htmldir.
* configure: Regenerate.
intl/
2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
* intl/Makefile.in: Add html info and dvi and install-html to .PHONY
Add install-html target.
ld/
2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
* Makefile.am: Add install-html, install-html-am, and
install-html-recursive targets.
* Makefile.in: Regenerate.
* configure.in: AC_SUBST datarootdir, docdir, htmldir.
* configure: Regenerate.
* po/Make-in: Add install-html target.
opcodes/
2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
* Makefile.am: Add install-html target.
* Makefile.in: Regenerate.
2006-04-06 23:49:35 +02:00
|
|
|
|
2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* Makefile.am: Add install-html target.
|
|
|
|
|
|
* Makefile.in: Regenerate.
|
|
|
|
|
|
|
2006-04-06 12:09:41 +02:00
|
|
|
|
2006-04-06 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* po/vi/po: Updated Vietnamese translation.
|
|
|
|
|
|
|
2006-03-31 13:43:14 +02:00
|
|
|
|
2006-03-31 Paul Koning <ni1d@arrl.net>
|
|
|
|
|
|
|
|
|
|
|
|
* pdp11-opc.c (pdp11_opcodes): Fix opcode for SEC instruction.
|
|
|
|
|
|
|
2006-03-16 20:09:48 +01:00
|
|
|
|
2006-03-16 Bernd Schmidt <bernd.schmidt@analog.com>
|
|
|
|
|
|
|
|
|
|
|
|
* bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the
|
|
|
|
|
|
logic to identify halfword shifts.
|
|
|
|
|
|
|
2006-03-16 16:08:48 +01:00
|
|
|
|
2006-03-16 Paul Brook <paul@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* arm-dis.c (arm_opcodes): Rename swi to svc.
|
|
|
|
|
|
(thumb_opcodes): Ditto.
|
|
|
|
|
|
|
2006-03-14 01:30:59 +01:00
|
|
|
|
2006-03-13 DJ Delorie <dj@redhat.com>
|
|
|
|
|
|
|
2006-03-14 05:23:52 +01:00
|
|
|
|
* m32c-asm.c: Regenerate.
|
|
|
|
|
|
* m32c-desc.c: Likewise.
|
|
|
|
|
|
* m32c-desc.h: Likewise.
|
|
|
|
|
|
* m32c-dis.c: Likewise.
|
|
|
|
|
|
* m32c-ibld.c: Likewise.
|
2006-03-14 01:30:59 +01:00
|
|
|
|
* m32c-opc.c: Likewise.
|
|
|
|
|
|
* m32c-opc.h: Likewise.
|
|
|
|
|
|
|
2006-03-11 03:23:19 +01:00
|
|
|
|
2006-03-10 DJ Delorie <dj@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* m32c-desc.c: Regenerate with mul.l, mulu.l.
|
|
|
|
|
|
* m32c-opc.c: Likewise.
|
|
|
|
|
|
* m32c-opc.h: Likewise.
|
|
|
|
|
|
|
|
|
|
|
|
|
2006-03-09 18:28:11 +01:00
|
|
|
|
2006-03-09 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* po/sv.po: Updated Swedish translation.
|
|
|
|
|
|
|
2006-03-07 21:18:06 +01:00
|
|
|
|
2006-03-07 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR binutils/2428
|
|
|
|
|
|
* i386-dis.c (REP_Fixup): New function.
|
|
|
|
|
|
(AL): Remove duplicate.
|
|
|
|
|
|
(Xbr): New.
|
|
|
|
|
|
(Xvr): Likewise.
|
|
|
|
|
|
(Ybr): Likewise.
|
|
|
|
|
|
(Yvr): Likewise.
|
|
|
|
|
|
(indirDXr): Likewise.
|
|
|
|
|
|
(ALr): Likewise.
|
|
|
|
|
|
(eAXr): Likewise.
|
|
|
|
|
|
(dis386): Updated entries of ins, outs, movs, lods and stos.
|
|
|
|
|
|
|
2006-03-05 09:38:53 +01:00
|
|
|
|
2006-03-05 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* cgen-ibld.in (insert_normal): Cope with attempts to insert a
|
|
|
|
|
|
signed 32-bit value into an unsigned 32-bit field when the host is
|
|
|
|
|
|
a 64-bit machine.
|
|
|
|
|
|
* fr30-ibld.c: Regenerate.
|
|
|
|
|
|
* frv-ibld.c: Regenerate.
|
|
|
|
|
|
* ip2k-ibld.c: Regenerate.
|
|
|
|
|
|
* iq2000-asm.c: Regenerate.
|
|
|
|
|
|
* iq2000-ibld.c: Regenerate.
|
|
|
|
|
|
* m32c-ibld.c: Regenerate.
|
|
|
|
|
|
* m32r-ibld.c: Regenerate.
|
|
|
|
|
|
* openrisc-ibld.c: Regenerate.
|
|
|
|
|
|
* xc16x-ibld.c: Regenerate.
|
|
|
|
|
|
* xstormy16-ibld.c: Regenerate.
|
|
|
|
|
|
|
2006-03-03 16:57:43 +01:00
|
|
|
|
2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
|
|
|
|
|
|
|
|
|
|
|
|
* xc16x-asm.c: Regenerate.
|
|
|
|
|
|
* xc16x-dis.c: Regenerate.
|
|
|
|
|
|
|
2006-02-27 17:26:26 +01:00
|
|
|
|
2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* po/Make-in: Add html target.
|
|
|
|
|
|
|
2006-02-27 16:35:37 +01:00
|
|
|
|
2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
|
|
|
|
|
|
Intel Merom New Instructions.
|
|
|
|
|
|
(THREE_BYTE_0): Likewise.
|
|
|
|
|
|
(THREE_BYTE_1): Likewise.
|
|
|
|
|
|
(three_byte_table): Likewise.
|
|
|
|
|
|
(dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
|
|
|
|
|
|
THREE_BYTE_1 for entry 0x3a.
|
|
|
|
|
|
(twobyte_has_modrm): Updated.
|
|
|
|
|
|
(twobyte_uses_SSE_prefix): Likewise.
|
|
|
|
|
|
(print_insn): Handle 3-byte opcodes used by Intel Merom New
|
|
|
|
|
|
Instructions.
|
|
|
|
|
|
|
2006-02-25 02:33:24 +01:00
|
|
|
|
2006-02-24 David S. Miller <davem@sunset.davemloft.net>
|
|
|
|
|
|
|
|
|
|
|
|
* sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
|
|
|
|
|
|
(v9_hpriv_reg_names): New table.
|
|
|
|
|
|
(print_insn_sparc): Allow values up to 16 for '?' and '!'.
|
|
|
|
|
|
New cases '$' and '%' for read/write hyperprivileged register.
|
|
|
|
|
|
* sparc-opc.c (sparc_opcodes): Add new entries for UA2005
|
|
|
|
|
|
window handling and rdhpr/wrhpr instructions.
|
|
|
|
|
|
|
[include/elf]
* m32c.h: Add relax relocs.
[cpu]
* m32c.cpu (RL_TYPE): New attribute, with macros.
(Lab-8-24): Add RELAX.
(unary-insn-defn-g, binary-arith-imm-dst-defn,
binary-arith-imm4-dst-defn): Add 1ADDR attribute.
(binary-arith-src-dst-defn): Add 2ADDR attribute.
(jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
attribute.
(jsri16, jsri32): Add 1ADDR attribute.
(jsr32.w, jsr32.a): Add JUMP attribute.
[opcodes]
* m32c-desc.c: Regenerate with linker relaxation attributes.
* m32c-desc.h: Likewise.
* m32c-dis.c: Likewise.
* m32c-opc.c: Likewise.
[gas]
* config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
(tc_gen_reloc): Don't define.
* config/tc-m32c.c (rl_for, relaxable): New convenience macros.
(OPTION_LINKRELAX): New.
(md_longopts): Add it.
(m32c_relax): New.
(md_parse_options): Set it.
(md_assemble): Emit relaxation relocs as needed.
(md_convert_frag): Emit relaxation relocs as needed.
(md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
(m32c_apply_fix): New.
(tc_gen_reloc): New.
(m32c_force_relocation): Force out jump relocs when relaxing.
(m32c_fix_adjustable): Return false if relaxing.
[bfd]
* elf32-m32c.c (m32c_elf_howto_table): Add relaxation relocs.
(m32c_elf_relocate_section): Don't relocate them.
(compare_reloc): New.
(relax_reloc): Remove.
(m32c_offset_for_reloc): New.
(m16c_addr_encodings): New.
(m16c_jmpaddr_encodings): New.
(m32c_addr_encodings): New.
(m32c_elf_relax_section): Relax jumps and address displacements.
(m32c_elf_relax_delete_bytes): Adjust for internal syms. Fix up
short jumps.
* reloc.c: Add m32c relax relocs.
* libbfd.h: Regenerate.
2006-02-24 23:10:36 +01:00
|
|
|
|
2006-02-24 DJ Delorie <dj@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* m32c-desc.c: Regenerate with linker relaxation attributes.
|
|
|
|
|
|
* m32c-desc.h: Likewise.
|
|
|
|
|
|
* m32c-dis.c: Likewise.
|
|
|
|
|
|
* m32c-opc.c: Likewise.
|
|
|
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|
|
|
2006-02-24 Paul Brook <paul@codesourcery.com>
gas/
* config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
(struct asm_barrier_opt): Define.
(arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
(parse_psr): Accept V7M psr names.
(parse_barrier): New function.
(enum operand_parse_code): Add OP_oBARRIER.
(parse_operands): Implement OP_oBARRIER.
(do_barrier): New function.
(do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
(do_t_cpsi): Add V7M restrictions.
(do_t_mrs, do_t_msr): Validate V7M variants.
(md_assemble): Check for NULL variants.
(v7m_psrs, barrier_opt_names): New tables.
(insns): Add V7 instructions. Mark V6 instructions absent from V7M.
(md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
(arm_cpu_option_table): Add Cortex-M3, R4 and A8.
(arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
(struct cpu_arch_ver_table): Define.
(cpu_arch_ver): New.
(aeabi_set_public_attributes): Use cpu_arch_ver. Set
Tag_CPU_arch_profile.
* doc/c-arm.texi: Document new cpu and arch options.
gas/testsuite/
* gas/arm/thumb32.d: Fix expected msr and mrs output.
* gas/arm/arch7.d: New test.
* gas/arm/arch7.s: New test.
* gas/arm/arch7m-bad.l: New test.
* gas/arm/arch7m-bad.d: New test.
* gas/arm/arch7m-bad.s: New test.
include/opcode/
* arm.h: Add V7 feature bits.
opcodes/
* arm-dis.c (arm_opcodes): Add V7 instructions.
(thumb32_opcodes): Ditto. Handle V7M MSR/MRS variants.
(print_arm_address): New function.
(print_insn_arm): Use it. Add 'P' and 'U' cases.
(psr_name): New function.
(print_insn_thumb32): Add 'U', 'C' and 'D' cases.
2006-02-24 16:36:36 +01:00
|
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|
2006-02-24 Paul Brook <paul@codesourcery.com>
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|
* arm-dis.c (arm_opcodes): Add V7 instructions.
|
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|
(thumb32_opcodes): Ditto. Handle V7M MSR/MRS variants.
|
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|
(print_arm_address): New function.
|
|
|
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|
(print_insn_arm): Use it. Add 'P' and 'U' cases.
|
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|
|
(psr_name): New function.
|
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|
(print_insn_thumb32): Add 'U', 'C' and 'D' cases.
|
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|
2006-02-23 22:36:18 +01:00
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|
2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
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|
* ia64-opc-i.c (bXc): New.
|
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|
(mXc): Likewise.
|
|
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|
|
(OpX2TaTbYaXcC): Likewise.
|
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|
(TF). Likewise.
|
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|
|
(TFCM). Likewise.
|
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|
|
(ia64_opcodes_i): Add instructions for tf.
|
|
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|
* ia64-opc.h (IMMU5b): New.
|
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|
* ia64-asmtab.c: Regenerated.
|
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|
2006-02-23 15:49:32 +01:00
|
|
|
|
2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
|
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* ia64-gen.c: Update copyright years.
|
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|
* ia64-opc-b.c: Likewise.
|
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|
2006-02-23 01:17:24 +01:00
|
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|
2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
|
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|
* ia64-gen.c (lookup_regindex): Handle ".vm".
|
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|
(print_dependency_table): Handle '\"'.
|
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|
* ia64-ic.tbl: Updated from SDM 2.2.
|
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|
* ia64-raw.tbl: Likewise.
|
|
|
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|
|
* ia64-waw.tbl: Likewise.
|
|
|
|
|
|
* ia64-asmtab.c: Regenerated.
|
|
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|
* ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
|
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|
2006-02-17 15:36:28 +01:00
|
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|
|
2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
|
|
|
|
|
|
Anil Paranjape <anilp1@kpitcummins.com>
|
|
|
|
|
|
Shilin Shakti <shilins@kpitcummins.com>
|
|
|
|
|
|
|
|
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|
|
* xc16x-desc.h: New file
|
|
|
|
|
|
* xc16x-desc.c: New file
|
|
|
|
|
|
* xc16x-opc.h: New file
|
|
|
|
|
|
* xc16x-opc.c: New file
|
|
|
|
|
|
* xc16x-ibld.c: New file
|
|
|
|
|
|
* xc16x-asm.c: New file
|
|
|
|
|
|
* xc16x-dis.c: New file
|
|
|
|
|
|
* Makefile.am: Entries for xc16x
|
|
|
|
|
|
* Makefile.in: Regenerate
|
|
|
|
|
|
* cofigure.in: Add xc16x target information.
|
|
|
|
|
|
* configure: Regenerate.
|
|
|
|
|
|
* disassemble.c: Add xc16x target information.
|
|
|
|
|
|
|
2006-02-11 19:08:35 +01:00
|
|
|
|
2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-dis.c (dis386_twobyte): Use "movZ" for debug register
|
|
|
|
|
|
moves.
|
|
|
|
|
|
|
2006-02-11 18:00:59 +01:00
|
|
|
|
2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-dis.c ('Z'): Add a new macro.
|
|
|
|
|
|
(dis386_twobyte): Use "movZ" for control register moves.
|
|
|
|
|
|
|
2006-02-10 13:05:12 +01:00
|
|
|
|
2006-02-10 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* iq2000-asm.c: Regenerate.
|
|
|
|
|
|
|
* bfd/archures.c (bfd_mach_mcf5200, bfd_mach_mcf5206e,
bfd_mach_mcf5307, bfd_mach_mcf5407, bfd_mach_mcf528x,
bfd_mach_mcfv4e, bfd_mach_mcf521x, bfd_mach_mcf5249,
bfd_mach_mcf547x, bfd_mach_mcf548x): Remove.
(bfd_mach_mcf_isa_a, bfd_mach_mcf_isa_a_div,
bfd_mach_mcf_isa_a_div_mac, bfd_mach_mcf_isa_a_div_emac,
bfd_mach_mcf_isa_aplus, bfd_mach_mcf_isa_aplus_mac,
bfd_mach_mcf_isa_aplus_emac, bfd_mach_mcf_isa_aplus_usp,
bfd_mach_mcf_isa_aplus_usp_mac, bfd_mach_mcf_isa_aplus_usp_emac,
bfd_mach_mcf_isa_b, bfd_mach_mcf_isa_b_mac, bfd_mach_mcf_isa_b_emac,
bfd_mach_mcf_isa_b_usp_float, bfd_mach_mcf_isa_b_usp_float_mac,
bfd_mach_mcf_isa_b_usp_float_emac): New.
(bfd_default_scan): Update coldfire mapping.
* bfd/bfd-in.h (bfd_m68k_mach_to_features,
bfd_m68k_features_to_mach): Declare.
* bfd/bfd-in2.h: Rebuilt.
* bfd/cpu-m68k.c (arch_info_struct): Add new coldfire machines,
adjust legacy names.
(m68k_arch_features): New.
(bfd_m68k_mach_to_features,
bfd_m68k_features_to_mach): Define.
* bfd/elf32-m68k.c (elf32_m68k_object_p): New.
(elf32_m68k_merge_private_bfd_data): Merge the CF EF flags.
(elf32_m68k_print_private_bfd_data): Print the CF EF flags.
(elf_backend_object_p): Define.
* bfd/ieee.c (ieee_write_processor): Update coldfire machines.
* bfd/libbfd.h: Rebuilt.
* gas/config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
mcf5329_control_regs): New.
(not_current_architecture, selected_arch, selected_cpu): New.
(m68k_archs, m68k_extensions): New.
(archs): Renamed to ...
(m68k_cpus): ... here. Adjust.
(n_arches): Remove.
(md_pseudo_table): Add arch and cpu directives.
(find_cf_chip, m68k_ip): Adjust table scanning.
(no_68851, no_68881): Remove.
(md_assemble): Lazily initialize.
(select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
(md_init_after_args): Move functionality to m68k_init_arch.
(mri_chip): Adjust table scanning.
(md_parse_option): Reimplement 'm' processing to add -march & -mcpu
options with saner parsing.
(m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
m68k_init_arch): New.
(s_m68k_cpu, s_m68k_arch): New.
(md_show_usage): Adjust.
(m68k_elf_final_processing): Set CF EF flags.
* gas/config/tc-m68k.h (m68k_init_after_args): Remove.
(tc_init_after_args): Remove.
* gas/doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
(M68k-Directives): Document .arch and .cpu directives.
* gas/testsuite/gas/m68k/all.exp: Add arch-cpu-1 test.
* gas/testsuite/gas/m68k/arch-cpu-1.[sd]: New.
* include/elf/m68k.h (EF_CPU32, EF_M68000, EF_CFV4E): Rename to ...
(EF_M68K_CPU32, EF_M68K_M68000, EF_M68K_CFV4E): ... here.
(EF_M68K_ISA_MASK, EF_M68K_ISA_A, EF_M68K_M68K_ISA_A_PLUS,
EF_M68K_ISA_B, EF_M68K_HW_DIV, EF_M68K_MAC_MASK, EF_M68K_MAC,
EF_M68K_EMAC, EF_M68K_USP, EF_M68K_FLOAT): New.
* include/opcode/m68k.h (m68008, m68ec030, m68882): Remove.
(m68k_mask): New.
(cpu_m68k, cpu_cf): New.
(mcf5200, mcf5206e, mcf521x, mcf5249, mcf528x, mcf5307, mcf5407,
mcf5470, mcf5480): Rename to cpu_<foo>. Add m680x0 variants.
* opcodes/m68k-dis.c (print_insn_m68k): Use
bfd_m68k_mach_to_features.
* binutils/readelf.c (get_machine_flags): Add logic for EF_M68K flags.
2006-02-07 20:01:10 +01:00
|
|
|
|
2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features.
|
|
|
|
|
|
|
* mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.
2006-01-26 16:14:57 +01:00
|
|
|
|
2006-01-26 David Ung <davidu@mips.com>
|
|
|
|
|
|
|
|
|
|
|
|
* mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
|
|
|
|
|
|
ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
|
|
|
|
|
|
floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
|
|
|
|
|
|
nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
|
|
|
|
|
|
rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.
|
|
|
|
|
|
|
2006-01-18 14:48:46 +01:00
|
|
|
|
2006-01-18 Arnold Metselaar <arnoldm@sourceware.org>
|
|
|
|
|
|
|
|
|
|
|
|
* z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d,
|
|
|
|
|
|
ld_d_r, pref_xd_cb): Use signed char to hold data to be
|
|
|
|
|
|
disassembled.
|
|
|
|
|
|
* z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes
|
|
|
|
|
|
buffer overflows when disassembling instructions like
|
|
|
|
|
|
ld (ix+123),0x23
|
|
|
|
|
|
* z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed
|
|
|
|
|
|
operand, if the offset is negative.
|
|
|
|
|
|
|
2006-01-17 22:15:56 +01:00
|
|
|
|
2006-01-17 Arnold Metselaar <arnoldm@sourceware.org>
|
|
|
|
|
|
|
|
|
|
|
|
* z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use
|
|
|
|
|
|
unsigned char to hold data to be disassembled.
|
|
|
|
|
|
|
2006-01-17 18:39:20 +01:00
|
|
|
|
2006-01-17 Andreas Schwab <schwab@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
PR binutils/1486
|
|
|
|
|
|
* disassemble.c (disassemble_init_for_target): Set
|
|
|
|
|
|
disassembler_needs_relocs for bfd_arch_arm.
|
|
|
|
|
|
|
2006-01-16 17:23:30 +01:00
|
|
|
|
2006-01-16 Paul Brook <paul@codesourcery.com>
|
|
|
|
|
|
|
2006-01-17 00:15:07 +01:00
|
|
|
|
* m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss,
|
2006-01-16 17:23:30 +01:00
|
|
|
|
f?add?, and f?sub? instructions.
|
|
|
|
|
|
|
2006-01-16 17:15:17 +01:00
|
|
|
|
2006-01-16 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* po/zh_CN.po: New Chinese (simplified) translation.
|
|
|
|
|
|
* configure.in (ALL_LINGUAS): Add "zh_CH".
|
|
|
|
|
|
* configure: Regenerate.
|
|
|
|
|
|
|
2006-01-15 17:35:21 +01:00
|
|
|
|
2006-01-05 Paul Brook <paul@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.
|
|
|
|
|
|
|
2006-01-07 00:25:36 +01:00
|
|
|
|
2006-01-06 DJ Delorie <dj@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* m32c-desc.c: Regenerate.
|
|
|
|
|
|
* m32c-opc.c: Regenerate.
|
|
|
|
|
|
* m32c-opc.h: Regenerate.
|
|
|
|
|
|
|
2006-01-03 23:06:18 +01:00
|
|
|
|
2006-01-03 DJ Delorie <dj@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* cgen-ibld.in (extract_normal): Avoid memory range errors.
|
|
|
|
|
|
* m32c-ibld.c: Regenerated.
|
|
|
|
|
|
|
2006-01-17 00:15:07 +01:00
|
|
|
|
For older changes see ChangeLog-2005
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
|
|
|
|
|
Local Variables:
|
2001-01-11 20:01:42 +01:00
|
|
|
|
mode: change-log
|
|
|
|
|
|
left-margin: 8
|
|
|
|
|
|
fill-column: 74
|
1999-05-03 09:29:11 +02:00
|
|
|
|
version-control: never
|
|
|
|
|
|
End:
|