a5dabbb023
gas/testsuite/
...
2008-05-30 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/x86-64-avx.s: Add tests for vmovd on 64bit operands.
* gas/i386/x86-64-sse2avx.s: Add tests for movd on 64bit
operands.
* gas/testsuite/gas/i386/x86-64-avx.d: Updated.
* gas/testsuite/gas/i386/x86-64-avx-intel.d: Likewise.
* gas/testsuite/gas/i386/x86-64-sse2avx.d: Likewise.
opcodes/
2008-05-30 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.tbl: Add vmovd with 64bit operand.
* i386-tbl.h: Regenerated.
2008-05-30 19:49:18 +00:00
725a9891bc
2008-05-27 Martin Schwidefsky <schwidefsky@de.ibm.com>
...
* s390-opc.c (INSTR_RRF_R0RR): Fix RRF_R0RR operand format.
2008-05-27 Martin Schwidefsky <schwidefsky@de.ibm.com>
* gas/s390/zarch-z990.d (idte): Fix operand format.
2008-05-27 12:52:44 +00:00
cbc80391d0
gas/testsuite/
...
2008-05-22 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/sse-noavx.s: Add tests for cvtpd2pi, cvtpi2pd and
cvttpd2pi.
* gas/i386/x86-64-sse-noavx.s: Likewise.
* gas/i386/sse-noavx.d: Updated.
* gas/i386/x86-64-sse-noavx.d: Likewise.
opcodes/
2008-05-22 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.tbl: Add NoAVX to cvtpd2pi, cvtpi2pd and cvttpd2pi.
* i386-tbl.h: Regenerated.
2008-05-23 00:18:52 +00:00
116615c5f7
gas/testsuite/
...
2008-05-22 H.J. Lu <hongjiu.lu@intel.com>
PR gas/6517
* gas/i386/avx.s: Add tests for unspecified memory operand
size in Intel syntax.
* gas/i386/x86-64-avx.s: Likewise.
* gas/i386/simd.s: Add tests for cvtsi2ss and cvtsi2sd with
unspecified memory operand size in Intel syntax.
* gas/i386/avx.d: Updated.
* gas/i386/avx-intel.d: Likewise.
* gas/i386/simd.d: Likewise.
* gas/i386/simd-intel.d: Likewise.
* gas/i386/simd-suffix.d: Likewise.
* gas/i386/x86-64-avx.d: Likewise.
* gas/i386/x86-64-avx-intel.d: Likewise.
opcodes/
2008-05-22 H.J. Lu <hongjiu.lu@intel.com>
PR gas/6517
* i386-opc.tbl: Break cvtsi2ss/cvtsi2sd/vcvtsi2sd/vcvtsi2ss
into 32bit and 64bit. Remove Reg64|Qword and add
IgnoreSize|No_qSuf on 32bit version.
* i386-tbl.h: Regenerated.
2008-05-22 20:52:54 +00:00
d9479f2d8d
gas/testsuite/
...
2008-05-21 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/sse-noavx.s: Add tests for movdq2q and movq2dq.
* gas/i386/x86-64-sse-noavx.s: Likewise.
* gas/i386/sse-noavx.d: Updated.
* gas/i386/x86-64-sse-noavx.d: Likewise.
opcodes/
2008-05-21 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.tbl: Add NoAVX to movdq2q and movq2dq.
* i386-tbl.h: Regenerated.
2008-05-21 21:40:57 +00:00
3ce6fddb77
* cr16-dis.c (build_mask): Adjust the mask for 32-bit bcond.
2008-05-21 07:50:55 +00:00
8944f3c277
update dependencies
2008-05-14 06:45:42 +00:00
f1f8f695c0
gas/
...
2008-05-02 H.J. Lu <hongjiu.lu@intel.com>
* NEWS: Mention XSAVE, EPT and MOVBE.
* config/tc-i386.c (cpu_arch): Add .movbe and .ept.
(md_show_usage): Add .movbe and .ept.
* doc/c-i386.texi: Add movbe and ept to -march=. Document
.movbe and .ept.
gas/testsuite/
2008-05-02 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run movbe, movbe-intel, inval-movbe, ept,
ept-intel, inval-ept, x86-64-movbe, x86-64-movbe-intel,
x86-64-inval-movbe. x86-64-ept, x86-64-ept-intel and
x86-64-inval-ept.
* gas/i386/arch-10.s: Add movbe and invept.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/ept.d: New file
* gas/i386/ept-intel.d: Likewise.
* gas/i386/ept.s: Likewise.
* gas/i386/inval-ept.l: Likewise.
* gas/i386/inval-ept.s: Likewise.
* gas/i386/inval-movbe.l: Likewise.
* gas/i386/inval-movbe.s: Likewise.
* gas/i386/movbe.d: Likewise.
* gas/i386/movbe-intel.d: Likewise.
* gas/i386/movbe.s: Likewise.
* gas/i386/x86-64-inval-ept.l: Likewise.
* gas/i386/x86-64-inval-ept.s: Likewise.
* gas/i386/x86-64-inval-movbe.l: Likewise.
* gas/i386/x86-64-inval-movbe.s: Likewise.
* gas/i386/x86-64-ept.d: Likewise.
* gas/i386/x86-64-ept-intel.d: Likewise.
* gas/i386/x86-64-ept.s: Likewise.
* gas/i386/x86-64-movbe.d: Likewise.
* gas/i386/x86-64-movbe-intel.d: Likewise.
* gas/i386/x86-64-movbe.s: Likewise.
* gas/i386/arch-10.d: Updated.
* gas/i386/arch-10-1.l: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
opcodes/
2008-05-02 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (MOVBE_Fixup): New.
(Mo): Likewise.
(PREFIX_0F3880): Likewise.
(PREFIX_0F3881): Likewise.
(PREFIX_0F38F0): Updated.
(prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881. Update
PREFIX_0F38F0 and PREFIX_0F38F1 for movbe.
(three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881.
* i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and
CPU_EPT_FLAGS.
(cpu_flags): Add CpuMovbe and CpuEPT.
* i386-opc.h (CpuMovbe): New.
(CpuEPT): Likewise.
(CpuLM): Updated.
(i386_cpu_flags): Add cpumovbe and cpuept.
* i386-opc.tbl: Add entries for movbe and EPT instructions.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-05-02 16:53:40 +00:00
89aa3097c2
* mips-opc.c (mips_builtin_opcodes): Set field `match' to 0 for
...
the two drem and the two dremu macros.
2008-04-29 23:27:01 +00:00
39c5c16818
* mips-opc.c (mips_builtin_opcodes): Mark prefx and c1
...
instructions FP_S. Mark l.s, li.s, lwc1, swc1, s.s, trunc.w.s and
cop1 macros INSN2_M_FP_S. Mark l.d, li.d, ldc1 and sdc1 macros
INSN2_M_FP_D. Mark trunc.w.d macro INSN2_M_FP_S and INSN2_M_FP_D.
2008-04-28 17:03:58 +00:00
f04d18b76a
gas/
...
* config/tc-sparc.c: Accept 'softint_clear' and 'softint_set'
%asr aliases.
* doc/c-sparc.texi: Consistently refer to architecture 'versions',
rather than occaisionally 'levels'. Consistently refer to Sun's
UNIX variant as SunOS, every version of Solaris is also SunOS.
Document new 'softint_clear' and 'softint_set' aliases. Clarify
which architecture versions support '%dcr', '%cq', and '%gl'. Add
section on 32-bit/64-bit opcode translations.
opcodes/
* sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr
instead of %sys_tick_cmpr, as suggested in architecture manuals.
2008-04-25 19:58:03 +00:00
6194aaaba7
bfd/
...
2008-04-23 Paolo Bonzini <bonzini@gnu.org>
* aclocal.m4: Regenerate.
* configure: Regenerate.
binutils/
2008-04-23 Paolo Bonzini <bonzini@gnu.org>
* aclocal.m4: Regenerate.
* configure: Regenerate.
gas/
2008-04-23 Paolo Bonzini <bonzini@gnu.org>
* aclocal.m4: Regenerate.
* configure: Regenerate.
gold/
2008-04-23 Paolo Bonzini <bonzini@gnu.org>
* aclocal.m4: Regenerate.
* configure: Regenerate.
gprof/
2008-04-23 Paolo Bonzini <bonzini@gnu.org>
* aclocal.m4: Regenerate.
* configure: Regenerate.
ld/
2008-04-23 Paolo Bonzini <bonzini@gnu.org>
* aclocal.m4: Regenerate.
* configure: Regenerate.
opcodes/
2008-04-23 Paolo Bonzini <bonzini@gnu.org>
* aclocal.m4: Regenerate.
* configure: Regenerate.
2008-04-23 16:11:47 +00:00
1a6b486f73
opcodes/
...
* sparc-opc.c (asi_table): Add UltraSPARC and Niagara
extended values.
(prefetch_table): Add missing values.
gas/
* config/tc-sparc.c (v9a_asr_table): Add missing
'stick' and 'stick_cmpr', and document ordering rules
of table.
(tc_gen_reloc): Accept BFD_RELOC_SPARC_PC22 and
BFD_RELOC_SPARC_PC10.
* doc/c-sparc.texi: New section on Sparc constants.
Add documentation for %stick and %stick_cmpr.
gas/testsuite/
* gas/sparc/pc2210.d: New file.
* gas/sparc/pc2210.d: Likewise.
* gas/sparc/sparc.exp: Run new %pc22/%pc10 relocation test.
2008-04-23 07:49:33 +00:00
81f8a9131a
gas/
...
2008-04-22 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (md_assemble): Don't check SSE instructions
if noavx is 0.
opcodes/
2008-04-22 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Add NoAVX.
* i386-opc.h (NoAVX): New.
(OldGcc): Updated.
(i386_opcode_modifier): Add noavx.
* i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3
instructions which don't have AVX equivalent.
* i386-tbl.h: Regenerated.
2008-04-22 22:27:13 +00:00
dae39accc2
gas/
...
2008-04-18 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (build_modrm_byte): Swap REG and NDS for
FMA.
gas/testsuite/
2008-04-18 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/arch-10.d: Updated.
* gas/i386/avx.d: Likewise.
* gas/i386/avx-intel.d: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
* gas/i386/x86-64-avx.d: Likewise.
* gas/i386/x86-64-avx-intel.d: Likewise.
opcodes/
2008-04-18 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (OP_VEX_FMA): New.
(OP_EX_VexImmW): Likewise.
(VexFMA): Likewise.
(Vex128FMA): Likewise.
(EXVexImmW): Likewise.
(get_vex_imm8): Likewise.
(OP_EX_VexReg): Likewise.
(vex_i4_done): Renamed to ...
(vex_w_done): This.
(prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps
and vpermil2pd. Replace Vex/Vex128 with VexFMA/Vex128FMA on
FMA instructions.
(print_insn): Updated.
(OP_EX_VexW): Rewrite to swap register in VEX with EX.
(OP_REG_VexI4): Check invalid high registers.
2008-04-18 13:10:32 +00:00
ce886ab1f8
<opcode changes>
...
2008-04-16 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
Michael Meissner <michael.meissner@amd.com>
* i386-opc.tbl: Fix protX to allow memory in the middle operand.
* i386-tbl.h: Regenerate from i386-opc.tbl.
<gas/testsuite changes>
2008-04-16 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
Michael Meissner <michael.meissner@amd.com>
* gas/i386/x86-64-sse5.s: Add protX tests to allow memory in the middle
operand.
* gas/i386/x86-64-sse5.d: Likewise.
2008-04-16 15:31:33 +00:00
19a6653ce8
ppc e500mc support
2008-04-14 11:01:38 +00:00
112b7c5071
2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
...
* s390-dis.c (init_disasm): Evaluate disassembler_options.
(print_s390_disassembler_options): New function.
* disassemble.c (disassembler_usage): Invoke
print_s390_disassembler_options.
2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
* dis-asm.h (print_s390_disassembler_options):
Prototype added.
2008-04-10 13:36:43 +00:00
7ff4264847
2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
...
* s390-mkopc.c (insertExpandedMnemonic): Expand string sizes
of local variables used for mnemonic parsing: prefix, suffix and
number.
2008-04-10 13:05:07 +00:00
45a5551e74
2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
...
* s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic
extensions for conditional jumps (o, p, m, nz, z, nm, np, no).
(s390_crb_extensions): New extensions table.
(insertExpandedMnemonic): Handle '$' tag.
* s390-opc.txt: Remove conditional jump variants which can now
be expanded automatically.
Replace '*' tag with '$' in the compare and branch instructions.
2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
* gas/s390/zarch-z10.d: Map the compare and branch variants
with odd condition code mask to version with an even mask.
2008-04-10 08:59:46 +00:00
06c8514ace
2008-04-07 H.J. Lu <hongjiu.lu@intel.com>
...
* i386-dis.c (PREFIX_VEX_38XX): Add a tab.
(PREFIX_VEX_3AXX): Likewis.
2008-04-07 21:29:50 +00:00
b122c2853a
2008-04-07 H.J. Lu <hongjiu.lu@intel.com>
...
* i386-opc.tbl: Remove 4 extra blank lines.
2008-04-07 17:35:12 +00:00
594ab6a333
gas/
...
2008-04-04 H.J. Lu <hongjiu.lu@intel.com>
* NEWS: Mention XSAVE. Change CLMUL to PCLMUL.
* config/tc-i386.c (cpu_arch): Add .pclmul.
(md_show_usage): Replace clmul with pclmul.
* doc/c-i386.texi: Likewise.
gas/testsuite/
2008-04-04 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/arch-10-1.l: Replace CLMUL with PCLMUL.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/arch-10.s: Likewise.
* gas/i386/clmul-intel.d: Likewise.
* gas/i386/clmul.d: Likewise.
* gas/i386/clmul.s: Likewise.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/x86-64-clmul-intel.d: Likewise.
* gas/i386/x86-64-clmul.d: Likewise.
* gas/i386/x86-64-clmul.s: Likewise.
* gas/i386/arch-10.d: Replace clmul with pclmul.
* gas/i386/x86-64-arch-2.d: Likewise.
opcodes/
2008-04-04 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
with CPU_PCLMUL_FLAGS/CpuPCLMUL.
(cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
* i386-opc.tbl: Likewise.
* i386-opc.h (CpuCLMUL): Renamed to ...
(CpuPCLMUL): This.
(CpuFMA): Updated.
(i386_cpu_flags): Replace cpuclmul with cpupclmul.
* i386-init.h: Regenerated.
2008-04-04 16:34:23 +00:00
c0f3af977b
binutils/
...
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* dwarf.c (dwarf_regnames_i386): Add AVX registers.
(dwarf_regnames_x86_64): Likewise.
gas/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* NEWS: Mention AES, CLMUL, AVX/FMA and -msse2avx.
* doc/c-i386.texi: Add avx, aes, clmul and fma to -march=.
Document -msse2avx, .avx, .aes, .clmul and .fma.
* config/tc-i386.c (YMMWORD_MNEM_SUFFIX): New.
(vex_prefix): Likewise.
(sse2avx): Likewise.
(CPU_FLAGS_ARCH_MATCH): Likewise.
(CPU_FLAGS_64BIT_MATCH): Likewise.
(CPU_FLAGS_32BIT_MATCH): Likewise.
(CPU_FLAGS_PERFECT_MATCH): Likewise.
(regymm): Likewise.
(vex_imm4): Likewise.
(fits_in_imm4): Likewise.
(build_vex_prefix): Likewise.
(VEX_check_operands): Likewise.
(bad_implicit_operand): Likewise.
(OPTION_MSSE2AVX): Likewise.
(T_YMMWORD): Likewise.
(_i386_insn): Add vex.
(cpu_arch): Add .avx, .aes, .clmul and .fma.
(cpu_flags_match): Changed to take a pointer to const template.
Enable encoding SSE instructions with VEX prefix for -msse2avx.
(match_mem_size): Also check ymmword.
(operand_type_match): Clear ymmword.
(md_begin): Allow '_' in mnemonic.
(type_names): Add OPERAND_TYPE_VEX_IMM4.
(process_immext): Update assert.
(md_assemble): Don't call process_immext if sse2avx and immext
are true. Call build_vex_prefix if vex is true.
(parse_insn): Updated for cpu_flags_match.
(swap_operands): Handle 5 operands.
(match_template): Handle 5 operands. Updated for cpu_flags_match.
Check regymm. Call VEX_check_operands. Handle YMMWORD_MNEM_SUFFIX.
(process_suffix): Handle YMMWORD_MNEM_SUFFIX.
(check_byte_reg): Check regymm.
(process_operands): Duplicate the destination register for
-msse2avx if needed.
(build_modrm_byte): Updated for instructions with VEX encoding.
(output_insn): Output VEX prefix if needed.
(md_longopts): Add msse2avx.
(md_parse_option): Handle OPTION_MSSE2AVX.
(md_show_usage): Add avx, aes, clmul, fma and -msse2avx.
(intel_e09): Support YMMWORD.
(intel_e11): Likewise.
(intel_get_token): Likewise.
gas/testsuite/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run aes, aes-intel, x86-64-aes,
x86-64-aes-intel, avx, avx-intel, inval-avx, x86-64-avx,
x86-64-avx-intel and x86-64-inval-avx.
* gas/cfi/cfi-i386.s: Add tests for AVX register maps.
* gas/cfi/cfi-x86_64.s: Likewise.
* gas/i386/aes.d: New.
* gas/i386/aes.s: Likewise.
* gas/i386/aes-intel.d: Likewise.
* gas/i386/avx.d: Likewise.
* gas/i386/avx.s: Likewise.
* gas/i386/avx-intel.d: Likewise.
* gas/i386/clmul.d: Likewise.
* gas/i386/clmul-intel.d: Likewise.
* gas/i386/clmul.s: Likewise.
* gas/i386/i386.exp: Likewise.
* gas/i386/inval-avx.l: Likewise.
* gas/i386/inval-avx.s: Likewise.
* gas/i386/sse2avx.d: Likewise.
* gas/i386/sse2avx.s: Likewise.
* gas/i386/x86-64-aes.d: Likewise.
* gas/i386/x86-64-aes.s: Likewise.
* gas/i386/x86-64-aes-intel.d: Likewise.
* gas/i386/x86-64-avx.d: Likewise.
* gas/i386/x86-64-avx.s: Likewise.
* gas/i386/x86-64-avx-intel.d: Likewise.
* gas/i386/x86-64-clmul.d: Likewise.
* gas/i386/x86-64-clmul-intel.d: Likewise.
* gas/i386/x86-64-clmul.s: Likewise.
* gas/i386/x86-64-inval-avx.l: Likewise.
* gas/i386/x86-64-inval-avx.s: Likewise.
* gas/i386/x86-64-sse2avx.d: Likewise.
* gas/i386/x86-64-sse2avx.s: Likewise.
* gas/i386/arch-10.s: Add tests for AVX, AES, CLMUL and FMA.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/rexw.s: Add AVX tests.
* gas/i386/x86-64-opcode-inval.s: Remove lds/les test.
* gas/cfi/cfi-i386.d: Updated.
* gas/cfi/cfi-x86_64.d: Likewise.
* gas/i386/arch-10.d: Likewise.
* gas/i386/arch-10-1.l: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/rexw.d: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
* gas/i386/x86-64-opcode-inval.d: Likewise.
* gas/i386/x86-64-opcode-inval-intel.d: Likewise.
include/opcode/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (MAX_OPERANDS): Set to 5.
(MAX_MNEM_SIZE): Changed to 20.
opcodes/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (OP_E_register): New.
(OP_E_memory): Likewise.
(OP_VEX): Likewise.
(OP_EX_Vex): Likewise.
(OP_EX_VexW): Likewise.
(OP_XMM_Vex): Likewise.
(OP_XMM_VexW): Likewise.
(OP_REG_VexI4): Likewise.
(PCLMUL_Fixup): Likewise.
(VEXI4_Fixup): Likewise.
(VZERO_Fixup): Likewise.
(VCMP_Fixup): Likewise.
(VPERMIL2_Fixup): Likewise.
(rex_original): Likewise.
(rex_ignored): Likewise.
(Mxmm): Likewise.
(XMM): Likewise.
(EXxmm): Likewise.
(EXxmmq): Likewise.
(EXymmq): Likewise.
(Vex): Likewise.
(Vex128): Likewise.
(Vex256): Likewise.
(VexI4): Likewise.
(EXdVex): Likewise.
(EXqVex): Likewise.
(EXVexW): Likewise.
(EXdVexW): Likewise.
(EXqVexW): Likewise.
(XMVex): Likewise.
(XMVexW): Likewise.
(XMVexI4): Likewise.
(PCLMUL): Likewise.
(VZERO): Likewise.
(VCMP): Likewise.
(VPERMIL2): Likewise.
(xmm_mode): Likewise.
(xmmq_mode): Likewise.
(ymmq_mode): Likewise.
(vex_mode): Likewise.
(vex128_mode): Likewise.
(vex256_mode): Likewise.
(USE_VEX_C4_TABLE): Likewise.
(USE_VEX_C5_TABLE): Likewise.
(USE_VEX_LEN_TABLE): Likewise.
(VEX_C4_TABLE): Likewise.
(VEX_C5_TABLE): Likewise.
(VEX_LEN_TABLE): Likewise.
(REG_VEX_XX): Likewise.
(MOD_VEX_XXX): Likewise.
(PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
(PREFIX_0F3A44): Likewise.
(PREFIX_0F3ADF): Likewise.
(PREFIX_VEX_XXX): Likewise.
(VEX_OF): Likewise.
(VEX_OF38): Likewise.
(VEX_OF3A): Likewise.
(VEX_LEN_XXX): Likewise.
(vex): Likewise.
(need_vex): Likewise.
(need_vex_reg): Likewise.
(vex_i4_done): Likewise.
(vex_table): Likewise.
(vex_len_table): Likewise.
(OP_REG_VexI4): Likewise.
(vex_cmp_op): Likewise.
(pclmul_op): Likewise.
(vpermil2_op): Likewise.
(m_mode): Updated.
(es_reg): Likewise.
(PREFIX_0F38F0): Likewise.
(PREFIX_0F3A60): Likewise.
(reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
(prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
and PREFIX_VEX_XXX entries.
(x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
(three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
PREFIX_0F3ADF.
(mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
Add MOD_VEX_XXX entries.
(ckprefix): Initialize rex_original and rex_ignored. Store the
REX byte in rex_original.
(get_valid_dis386): Handle the implicit prefix in VEX prefix
bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
(print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
calling get_valid_dis386. Use rex_original and rex_ignored when
printing out REX.
(putop): Handle "XY".
(intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
ymmq_mode.
(OP_E_extended): Updated to use OP_E_register and
OP_E_memory.
(OP_XMM): Handle VEX.
(OP_EX): Likewise.
(XMM_Fixup): Likewise.
(CMP_Fixup): Use ARRAY_SIZE.
* i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
CPU_FMA_FLAGS and CPU_AVX_FLAGS.
(operand_type_init): Add OPERAND_TYPE_REGYMM and
OPERAND_TYPE_VEX_IMM4.
(cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
(opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
VexImmExt and SSE2AVX.
(operand_types): Add RegYMM, Ymmword and Vex_Imm4.
* i386-opc.h (CpuAVX): New.
(CpuAES): Likewise.
(CpuCLMUL): Likewise.
(CpuFMA): Likewise.
(Vex): Likewise.
(Vex256): Likewise.
(VexNDS): Likewise.
(VexNDD): Likewise.
(VexW0): Likewise.
(VexW1): Likewise.
(Vex0F): Likewise.
(Vex0F38): Likewise.
(Vex0F3A): Likewise.
(Vex3Sources): Likewise.
(VexImmExt): Likewise.
(SSE2AVX): Likewise.
(RegYMM): Likewise.
(Ymmword): Likewise.
(Vex_Imm4): Likewise.
(Implicit1stXmm0): Likewise.
(CpuXsave): Updated.
(CpuLM): Likewise.
(ByteOkIntel): Likewise.
(OldGcc): Likewise.
(Control): Likewise.
(Unspecified): Likewise.
(OTMax): Likewise.
(i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
(i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
vex3sources, veximmext and sse2avx.
(i386_operand_type): Add regymm, ymmword and vex_imm4.
* i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
* i386-reg.tbl: Add AVX registers, ymm0..ymm15.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-04-03 14:03:21 +00:00
086134ec0e
gas/testsuite/:
...
From Robin Getz <rgetz@blackfin.uclinux.org>
* gas/bfin/arithmetic.d: Update to reflect spaces/capitalization in
recent changes in opcodes/bfin-dis.c.
gas/bfin/arithmetic.s: Likewise.
gas/bfin/bit.d: Likewise.
gas/bfin/bit2.d: Likewise.
gas/bfin/control_code.d: Likewise.
gas/bfin/control_code2.d: Likewise.
gas/bfin/event.d: Likewise.
gas/bfin/event2.d: Likewise.
gas/bfin/flow.d: Likewise.
gas/bfin/flow2.d: Likewise.
gas/bfin/load.d: Likewise.
gas/bfin/logical.d: Likewise.
gas/bfin/logical2.d: Likewise.
gas/bfin/move.d: Likewise.
gas/bfin/move2.d: Likewise.
gas/bfin/parallel.d: Likewise.
gas/bfin/parallel2.d: Likewise.
gas/bfin/parallel3.d: Likewise.
gas/bfin/parallel4.d: Likewise.
gas/bfin/shift.d: Likewise.
gas/bfin/shift2.d: Likewise.
gas/bfin/stack.d: Likewise.
gas/bfin/stack2.d: Likewise.
gas/bfin/store.d: Likewise.
gas/bfin/vector.d: Likewise.
gas/bfin/vector2.d: Likewise.
gas/bfin/video.d: Likewise.
gas/bfin/video2.d: Likewise.
opcodes/:
* bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
c_imm32, c_huimm32e): Define.
(constant_formats): Add flags for printing decimal, leading spaces, and
exact symbols.
(comment, parallel): Add global flags in all disassembly.
(fmtconst): Take advantage of new flags, and print default in hex.
(fmtconst_val): Likewise.
(decode_macfunc): Be consistant with spaces, tabs, comments,
capitalization in disassembly, fix minor coding style issues.
(reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
(decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
_print_insn_bfin, print_insn_bfin): Likewise.
2008-03-26 16:48:32 +00:00
ee171c8f94
gas/
...
* config/bfin-parse.y (check_macfunc_option): Allow (IU)
option for multiply and multiply-accumulate to data register
instruction.
(check_macfuncs): Don't check if accumulator matches the data register
here.
(assign_macfunc): Check if accumulator matches the
data register in each rule that moves to the data
register.
gas/testsuite/
* gas/bfin/arithmetic.s, gas/bfin/arithmetic.d: Add check
for IU option.
* gas/bfin/expected_errors.l, gas/bfin/expected_errors.s:
Add check for mismatch of accumulator and data register.
opcodes/
* bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
multiply and multiply-accumulate to data register instruction.
2008-03-26 16:21:10 +00:00
b21c9cb440
opcodes:
...
From Robin Getz <robin.getz@analog.com>
* bfin-dis.c (bu32): Typedef.
(enum const_forms_t): Add c_uimm32 and c_huimm32.
(constant_formats[]): Add uimm32 and huimm16.
(fmtconst_val): New.
(uimm32): Define.
(huimm32): Define.
(imm16_val): Define.
(luimm16_val): Define.
(struct saved_state): Define.
(GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
(get_allreg): New.
(decode_LDIMMhalf_0): Print out the whole register value.
gas/testsuite:
From Jie Zhang <jie.zhang@analog.com>
* gas/bfin/load.d: Update.
2008-03-26 14:50:52 +00:00
5746fb46c8
2008-03-19 Andreas Krebbel <krebbel1@de.ibm.com>
...
* opcodes/s390-mkopc.c (s390_opcode_cpu_val): S390_OPCODE_Z10 added.
(s390_cond_extensions): Reduced extensions to the compare related.
(main): z10 cpu type option added.
(expandConditionalJump): Renamed to ...
(insertExpandedMnemonic): ... this.
* opcodes/s390-opc.c: Re-group the operand format makros.
(INSTR_RIE_RRPU, INSTR_RIE_RRP0, INSTR_RIE_RUPI,
INSTR_RIE_R0PI, INSTR_RIE_RUPU, INSTR_RIE_R0PU, INSTR_RIE_R0IU,
INSTR_RIE_R0I0, INSTR_RIE_R0UU, INSTR_RIE_R0U0,
INSTR_RIE_RRUUU, INSTR_RIS_RURDI, INSTR_RIS_R0RDI, INSTR_RIS_RURDU,
INSTR_RIS_R0RDU, INSTR_RRF_U0RR, INSTR_RRF_00RR, INSTR_RRS_RRRDU,
INSTR_RRS_RRRD0, INSTR_RXY_URRD, INSTR_SIY_IRD, INSTR_SIL_RDI,
INSTR_SIL_RDU): New instruction formats added.
(MASK_RIE_RRPU, MASK_RIE_RRP0, MASK_RIE_RUPI, MASK_RIE_R0PI,
MASK_RIE_RUPU, MASK_RIE_R0PU, MASK_RIE_R0IU, MASK_RIE_R0I0,
MASK_RIE_R0UU, MASK_RIE_R0U0, MASK_RIE_RRUUU, MASK_RIS_RURDI,
MASK_RIS_R0RDI, MASK_RIS_RURDU, MASK_RIS_R0RDU, MASK_RRF_U0RR,
MASK_RRF_00RR, MASK_RRS_RRRDU, MASK_RRS_RRRD0, MASK_RXY_URRD,
MASK_SIY_IRD, MASK_SIL_RDI, MASK_SIL_RDU): New instruction format
masks added.
(s390_opformats): New formats added "ris", "rrs", "sil".
* opcodes/s390-opc.txt: Add the conditional jumps with the
extensions removed from automatic expansion in s390-mkopc.c manually.
(asi - trtre): Add new System z10 EC instructions.
* include/opcode/s390.h (s390_opcode_cpu_val): S390_OPCODE_Z10 added.
2008-03-19 Andreas Krebbel <krebbel1@de.ibm.com>
* config/tc-s390.c (md_parse_option): z10 option added.
2008-03-19 Andreas Krebbel <krebbel1@de.ibm.com>
* gas/s390/zarch-z10.d: New file.
* gas/s390/zarch-z10.s: New file.
* gas/s390/s390.exp: Run the z10 testcases.
2008-03-19 10:29:18 +00:00
58c85be758
* configure.ac: m4_include config/proginstall.m4.
...
* configure: Regenerate.
config/
* proginstall.m4: New file, with fixed AC_PROG_INSTALL.
bfd/
* aclocal.m4: Regenerate.
* configure: Likewise.
* Makefile.in: Likewise.
bfd/doc/
* Makefile.in: Regenerate.
intl/
* aclocal.m4: Regenerate.
* configure: Likewise.
gas/
* aclocal.m4: Regenerate.
* configure: Likewise.
* Makefile.in: Likewise.
* doc/Makefile.in: Likewise.
ld/
* aclocal.m4: Regenerate.
* configure: Likewise.
* Makefile.in: Likewise.
opcodes/
* aclocal.m4: Regenerate.
* configure: Likewise.
* Makefile.in: Likewise.
binutils/
* aclocal.m4: Regenerate.
* configure: Likewise.
* Makefile.in: Likewise.
* doc/Makefile.in: Likewise.
gprof/
* aclocal.m4: Regenerate.
* configure: Likewise.
* Makefile.in: Likewise.
2008-03-17 22:17:33 +00:00
50e7d84b42
bfd/
...
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
* po/SRC-POTFILES.in: Regenerate.
bfd/doc/
* Makefile.in: Regenerate.
binutils/
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
* doc/Makefile.in: Regenerate.
* configure: Regenerate.
gas/
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
* configure: Regenerate.
gprof/
* configure: Regenerate.
ld/
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
* configure: Regenerate.
opcodes/
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
* configure: Regenerate.
2008-03-13 02:05:23 +00:00
de866fccd8
* ppc-opc.c (powerpc_opcodes): Order and format.
2008-03-06 23:00:34 +00:00
98c3d90597
2008-03-06 Florian Krohm <fkrohm@us.ibm.com>
...
* s390-opc.c (INSTR_RSL_R0RD): Fix operands.
* s390-opc.txt (cmpsc): Duplicate entry removed.
(dxr, sqdr, sqer, cxfbr, cdfbr, cefbr, lzer, lzdr, lzxr,
cegbr, cdgbr, cxgbr, cegr, cdgr, cxgr, cxfr, cdfr, cefr, fixr, fidr,
fier, cu42, cu41): Fix operand format.
2008-03-06 Andreas Krebbel <krebbel1@de.ibm.com>
* gas/s390/esa-g5.d (cdfbr, cdfr, cefbr, cefr, cxfbr, cxfr,
dxr, fidr, fier, fixr, lzdr, lzer, lzxr, sqdr, sqer, tp): Fix
operand format.
* gas/s390/esa-g5.s: Likewise.
* gas/s390/zarch-z900.d (cdgbr, cdgr, cegbr, cegr, cxgbr,
cxgr): Likewise.
* gas/s390/zarch-z900.s: Likewise.
* gas/s390/zarch-z9-109.d (cu41, cu42): Remove mask operand.
* gas/s390/zarch-z9-109.s: Likewise.
2008-03-06 12:01:13 +00:00
28dbc07952
gas/testsuite/
...
2008-03-01 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/x86-64-branch.s: Add tests for 16-bit near indirect
branches.
* gas/i386/x86-64-inval.s: Remove tests for 16-bit near indirect
branches.
* gas/i386/x86-64-branch.d: Updated.
* gas/i386/x86-64-inval.l: Likewise.
opcodes/
2008-03-01 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
* i386-tbl.h: Regenerated.
2008-03-01 23:30:51 +00:00
849830bdfb
gas/testsuite/
...
2008-02-23 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/jump.s: Add tests for far branches.
* gas/i386/jump16.s: Likewise.
* gas/i386/jump.d: Updated.
* gas/i386/jump16.d: Likewise.
* gas/i386/x86-64-inval.l: Likewise.
* gas/i386/x86-64-inval.s: Add tests for 16-bit near indirect
branches.
opcodes/
2008-02-23 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.tbl: Disallow 16-bit near indirect branches for
x86-64.
* i386-tbl.h: Regenerated.
2008-02-23 17:29:17 +00:00
743ddb6b3d
opcodes/
...
2008-02-21 Jan Beulich <jbeulich@novell.com>
* i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
and Fword for far indirect jmp. Allow Reg16 and Word for near
indirect jmp on x86-64. Disallow Fword for lcall.
* i386-tbl.h: Re-generate.
2008-02-21 16:18:04 +00:00
796d53134a
* cr16.h (cr16_num_optab): Declared.
...
* cr16-opc.c (cr16_num_optab): Defined
2008-02-18 13:46:45 +00:00
65da13b5e0
gas/
...
2008-02-16 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (inoutportreg): New.
(process_immext): New.
(md_assemble): Use it.
(update_imm): Use imm16 and imm32s.
(i386_att_operand): Use inoutportreg.
opcodes/
2008-02-16 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
* i386-init.h: Regenerated.
2008-02-16 16:16:48 +00:00
0e3361806e
PR binutils/5524
...
* configure.in (SHARED_LIBADD): Select the correct host specific
file extension for shared libraries.
* configure: Regenerate.
2008-02-14 12:33:17 +00:00
b7240065b3
gas/
...
2008-02-13 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (parse_real_register): Don't return 'FLAT'
if not in Intel mode.
(i386_intel_operand): Ignore segment overrides in immediate and
offset operands.
(intel_e11): Range-check i.mem_operands before use as array
index. Filter out FLAT for uses other than as segment override.
(intel_get_token): Remove broken promotion of "FLAT:" to mean
"offset FLAT:".
gas/testsuite/
2008-02-13 Jan Beulich <jbeulich@novell.com>
* gas/i386/intelok.s: Replace invalid offset expression with
valid ones.
* gas/i386/x86_64.s: Likewise.
opcodes/
2008-02-13 Jan Beulich <jbeulich@novell.com>
* i386-opc.h (RegFlat): New.
* i386-reg.tbl (flat): Add.
* i386-tbl.h: Re-generate.
2008-02-13 13:41:26 +00:00
34b772a651
gas/
...
2008-02-13 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (intel_e09): Also special-case 'bound'.
gas/testsuite/
2008-02-13 Jan Beulich <jbeulich@novell.com>
* gas/i386/intelbad.s, gas/i386/intelok.s: Add 'bound' tests.
* gas/i386/intelbad.l, gas/i386/intelok.l, gas/i386/intelok.e,
gas/i386/opcode-intel.d: Adjust.
opcodes/
2008-02-13 Jan Beulich <jbeulich@novell.com>
* i386-dis.c (a_mode): New.
(cond_jump_mode): Adjust.
(Ma): Change to a_mode.
(intel_operand_size): Handle a_mode.
* i386-opc.tbl: Allow Dword and Qword for bound.
* i386-tbl.h: Re-generate.
2008-02-13 13:29:31 +00:00
a60de03c61
gas/
...
2008-02-13 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (allow_pseudo_reg): New.
(parse_real_register): Check for NULL just once. Allow all
register table entries when allow_pseudo_reg is non-zero.
Don't allow any registers without type when allow_pseudo_reg
is zero.
(tc_x86_regname_to_dw2regnum): Replace with ...
(tc_x86_parse_to_dw2regnum): ... this.
(tc_x86_frame_initial_instructions): Adjust for above change.
* config/tc-i386.h (tc_regname_to_dw2regnum): Remove.
(tc_parse_to_dw2regnum): New.
(tc_x86_regname_to_dw2regnum): Replace with ...
(tc_x86_parse_to_dw2regnum): ... this.
* dw2gencfi.c (tc_parse_to_dw2regnum): New, broken out of ...
(cfi_parse_reg): ... this. Use tc_parse_to_dw2regnum. Adjust
error handling.
gas/testsuite/
2008-02-13 Jan Beulich <jbeulich@novell.com>
* gas/cfi/cfi-i386.s: Add code testing use of all registers.
Fix a few comments.
* gas/cfi/cfi-x86_64.s: Likewise.
* gas/cfi/cfi-i386.d, gas/cfi/cfi-x86_64.d: Adjust.
opcodes/
2008-02-13 Jan Beulich <jbeulich@novell.com>
* i386-gen.c (process_i386_registers): Process new fields.
* i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
unsigned char. Add dw2_regnum and Dw2Inval.
* i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
register names.
* i386-tbl.h: Re-generate.
2008-02-13 10:14:40 +00:00
4b6bc8ebeb
Correct last 2 ChangeLog entries.
2008-02-12 17:22:02 +00:00
f03fe4c110
gas/
...
2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (cpu_arch): Add .xsave.
(md_show_usage): Add .xsave.
* doc/c-i386.texi: Add xsave to -march=.
gas/testsuite/
2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/arch-10.s: Add xgetbv.
* gas/i386/arch-10.d: Updated.
* gas/i386/arch-10-1.l: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/x86-64-arch-10.d: Likewise.
opcodes/
2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
* i386-init.h: Updated.
2008-02-12 05:35:36 +00:00
475a2301db
gas/testsuite/
...
2002-02-11 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run xsave, xsave-intel, x86-64-xsave
and x86-64-xsave-intel.
* gas/i386/x86-64-xsave-intel.d: New file.
* gas/i386/x86-64-xsave.d: Likewise.
* gas/i386/x86-64-xsave.s: Likewise.
* gas/i386/xsave-intel.d: Likewise.
* gas/i386/xsave.d: Likewise.
* gas/i386/xsave.s: Likewise.
opcodes/
2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (cpu_flags): Add CpuXsave.
* i386-opc.h (CpuXsave): New.
(Cpu64): Updated.
(i386_cpu_flags): Add cpuxsave.
* i386-dis.c (MOD_0FAE_REG_4): New.
(RM_0F01_REG_2): Likewise.
(MOD_0FAE_REG_5): Updated.
(RM_0F01_REG_3): Likewise.
(reg_table): Use MOD_0FAE_REG_4.
(mod_table): Use RM_0F01_REG_2. Add MOD_0FAE_REG_4. Updated
for xrstor.
(rm_table): Add RM_0F01_REG_2.
* i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-02-12 00:04:45 +00:00
041179fc63
Fix formatting of most recent entry.
2008-02-11 22:56:13 +00:00
595785c698
opcodes/
...
2008-02-11 Jan Beulich <jbeulich@novell.com>
* i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
* i386-tbl.h: Re-generate.
2008-02-11 15:11:06 +00:00
bb8541b9c4
bfd/
...
2008-02-04 Kai Tietz <kai.tietz@onevision.com>
H.J. Lu <hongjiu.lu@intel.com>
PR 5715
* warning.m4: Enable -Wno-format by default when using gcc on
mingw.
* configure: Regenerated.
binutils/
2008-02-04 H.J. Lu <hongjiu.lu@intel.com>
PR 5715
* configure: Regenerated.
gas/
2008-02-04 H.J. Lu <hongjiu.lu@intel.com>
PR 5715
* configure: Regenerated.
ld/
2008-02-04 H.J. Lu <hongjiu.lu@intel.com>
PR 5715
* configure: Regenerated.
opcodes/
2008-02-04 H.J. Lu <hongjiu.lu@intel.com>
PR 5715
* configure: Regenerated.
2008-02-04 19:43:51 +00:00
57b592a36d
* mips-dis.c: Update copyright.
...
(mips_arch_choices): Add Octeon.
* mips-opc.c: Update copyright.
(IOCT): New macro.
(mips_builtin_opcodes): Add Octeon instruction synciobdma.
2008-02-04 19:26:11 +00:00
930bb4cfae
* ppc-opc.c: Support optional L form mtmsr.
2008-01-29 08:24:43 +00:00
82c18208b8
gas/testsuite/
...
2008-01-24 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/x86-64-sib.s: Add tests for r12.
* gas/i386/x86-64-sib-intel.d: Updated.
* gas/i386/x86-64-sib.d: Likewise.
opcodes/
2008-01-24 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (OP_E_extended): Handle r12 like rsp.
2008-01-24 15:11:35 +00:00
H.J. Lu
Martin Schwidefsky
Nick Clifton
Alan Modra
Adam Nemet
David S. Miller
Dwarakanath Rajagopal
Andreas Krebbel
Bernd Schmidt
Ralf Wildenhues
Jan Beulich
Ben Elliston