Commit Graph

7252 Commits

Author SHA1 Message Date
H.J. Lu bf150a0bad Set BFD_DECOMPRESS to decompress debug sections
We should set BFD_DECOMPRESS to decompress debug sections when reading in
DWARF debug sections.

bfd/

	PR binutils/19523
	* dwarf2.c (_bfd_dwarf2_slurp_debug_info): Set BFD_DECOMPRESS to
	decompress debug sections.

binutils/

	PR binutils/19523
	* Makefile.am (check-DEJAGNU): Pass CC and CC_FOR_BUILD to
	runtest.
	* Makefile.in: Regenerated.
	* testsuite/binutils-all/compress.exp (test_gnu_debuglink): New
	proc.
	Run test_gnu_debuglink for native ELF build.
2016-01-28 13:29:53 -08:00
Maciej W. Rozycki 840855c5ed ARC/BFD: Fix a build error from `index' shadowing a global declaration
bfd/
	* elf32-arc.c (elf_arc_finish_dynamic_symbol): Rename `index' to
	`dynindx'.
2016-01-25 16:06:46 +00:00
Nick Clifton cf466c2ac5 Fix memory corruption on Mach-O systems by suppressing a memory tidy up.
PR target/19435
	* mach-o.c (bfd_mach_o_close_and_cleanup): Suppress code to free
	dsym filename buffer.
2016-01-25 09:35:33 +00:00
Maciej W. Rozycki eb6b0cf45d MIPS/BFD: Simplify register index calculation in BZ16_REG_FIELD
Just mask higher bits off, which returns the same set of 3-bit register
encodings of { 0, 1, 2, 3, 4, 5, 6, 7 } for the allowed 5-bit encodings
of { 16, 17, 2, 3, 4, 5, 6, 7 }.  Input has already been validated with
OP16_VALID_REG.

	bfd/
	* elfxx-mips.c (BZ16_REG_FIELD): Simplify calculation.
2016-01-24 01:01:15 +00:00
Maciej W. Rozycki e67f83e590 MIPS/BFD: Correct register index calculation in BZ16_REG
For the 3-bit register encodings of { 0, 1, 2, 3, 4, 5, 6, 7 } return
the 5-bit encodings of { 16, 17, 2, 3, 4, 5, 6, 7 } respectively rather
than { 24, 25, 2, 3, 4, 5, 6, 7 }.

	bfd/
	* elfxx-mips.c (BZ16_REG): Correct calculation.
2016-01-24 01:01:14 +00:00
Nick Clifton 23a4208915 Fix compile time errors building ARC target on a 32-bit host.
* elf32-arc.c (ADD_RELA): Fix compile time warning errors by
	changing the type of _loc to be bfd_byte *.
	(elf_arc_finish_dynamic_symbol): Likewise.
2016-01-21 13:54:11 +00:00
Nick Clifton aebf9be708 Fix unexpected failures in the linker testsuite for ARM VxWorks targets.
PR ld/19455
	* elf32-arm.c (elf32_arm_create_dynamic_sections): Set the ELF
	class of the linker stub bfd.
	(elf32_arm_check_relocs): Skip check for pic format after
	processing a vxWorks R_ARM_ABS12 reloc.
	* elflink.c (bfd_elf_final_link): Check for ELFCLASSNONE when
	reporting a class mismatch.

	* testsuite/ld-arm/vxworks1-lib.dd: Update for current
	disassmebler output.
	* testsuite/ld-arm/vxworks1-lib.rd: Likewise.
	* testsuite/ld-arm/vxworks1.dd: Likewise.
	* testsuite/ld-arm/vxworks1.rd: Likewise.
	* testsuite/ld-arm/vxworks1.ld: Set the output format.
2016-01-21 10:51:25 +00:00
Jiong Wang 2f340668a9 [AArch64] Relax long branch veneer insertion for non STT_FUNC symbol
As defined at AArch64 ELF Specification (4.6.7 Call and Jump
  relocations), symbol with type of non STT_FUNC but in different input
  section with relocation place should insert long branch veneer also.

  Meanwhile the current long branch veneer infrastructure havn't considered
  the situation where the branch destination is "sym_value + rela->addend".

  This was OK because we only insert veneer for long call destination is
  STT_FUNC symbol for which the addend is always zero. But as we relax the
  support to other situations by this patch, we need to handle addend be
  non-zero value. For example, for static function, relocation against
  "local symbol" are turned into relocation against "section symbol + offset"
  where there is a valid addend.

  bfd/
	* elfnn-aarch64.c (aarch64_type_of_stub): Allow insert long branch
	veneer for sym_sec != input_sec.
	(elfNN_aarch64_size_stub): Support STT_SECTION symbol.
	(elfNN_aarch64_final_link_relocate): Take rela addend into account when
	calculation destination.

  ld/
	* testsuite/ld-aarch64/farcall-section.d: Delete.
	* testsuite/ld-aarch64/farcall-section.s: Delete.
	* testsuite/ld-aarch64/farcall-b-section.d: New expectation file.
	* testsuite/ld-aarch64/farcall-bl-section.d: Likewise.
	* testsuite/ld-aarch64/farcall-b-section.s: New testcase.
	* testsuite/ld-aarch64/farcall-bl-section.s: Likewise.
	* testsuite/ld-aarch64/aarch64-elf.exp: Likewise.
2016-01-21 09:57:09 +00:00
Alan Modra aeb7056972 Convert macros in elf-linux-core.h to inline functions
Besides changing some macros into inline functions, this removes
redundant memsets and uses bfd_put_* rather than H_PUT_*.

	* elf-linux-core.h (swap_linux_prpsinfo32_out): New function.
	(swap_linux_prpsinfo64_out): New function.
	(LINUX_PRPSINFO32_SWAP_FIELDS): Delete.
	(LINUX_PRPSINFO64_SWAP_FIELDS): Delete.
	* elf.c (elfcore_write_linux_prpsinfo32): Adjust.  Don't memset.
	(elfcore_write_linux_prpsinfo64): Likewise.
	* elf32-ppc.c (swap_ppc_linux_prpsinfo32_out): New function.
	(PPC_LINUX_PRPSINFO32_SWAP_FIELDS): Delete.
	(elfcore_write_ppc_linux_prpsinfo32): Adjust.  Don't memset.
2016-01-21 19:59:33 +10:30
Alan Modra de64ce13a7 Rename elf-linux-psinfo.h to elf-linux-core.h
Since it will sometime have more than just prpsinfo.  Also,
elf32-ppc.c needlessly includes this header.

	* elf-linux-core.h: Rename from elf-linux-psinfo.h.
	* elf.c: Adjust #include.
	* elf32-ppc.c: Don't #include elf-linux-psinfo.h
	* Makefile.am (SOURCE_HFILES): Update.
	* Makefile.in: Regenerate.
	* po/SRC-PORFILES.in: Regenerate.
2016-01-21 19:59:33 +10:30
Alan Modra c603b11bec bfd/configure reorganisation
Corefile code should be moved after running config.bfd, because it
uses want64.

	* configure.ac: Move corefile selection later in file.  Move
	tdefaults code immediately after other target vector code.
	* configure: Regenerate.
2016-01-21 19:59:33 +10:30
Mickael Guene 91f68a68f9 Add support for an ARM specific 'y' section attribute flag to mark the section as NOREAD.
bfd/ChangeLog:
      * elf32-arm.c ((elf32_arm_special_sections): Remove catch of noread
      section using '.text.noread' pattern.

gas/ChangeLog:
      * config/obj-elf.c (obj_elf_change_section) : Allow arm section with
      SHF_ARM_NOREAD section flag.
      * config/tc-arm.h (md_elf_section_letter) : Implement this hook to
      handle letter 'y'.
     (arm_elf_section_letter) : Declare it.
      * config/tc-arm.c (arm_elf_section_letter): Handle letter 'y' to set
      SHF_ARM_NOREAD section flag.
      * doc/c-arm.texi (ARM section attribute 'y'): Document it.

gas/testsuite/ChangeLog:
      * gas/arm/section-execute-only.s: New test case.
      * gas/arm/section-execute-only.d: Expected output.

ld/testsuite/ChangeLog:
      * ld-arm/thumb1-noread-not-present-mixing-two-section.s: Add 'y'
      attribute usage.
      * ld-arm/thumb1-noread-present-one-section.s: Likewise.
      * ld-arm/thumb1-noread-present-two-section.s: Likewise.
      * ld-arm/thumb1-input-section-flag-match.s: Likewise.

binutils/ChangeLog:
      * readelf.c (get_elf_section_flags): Display y letter for section
      with SHF_ARM_NOREAD section flag in readelf section output.
      (process_section_headers): Add y letter in readelf section output
      key mapping for ARM architecture.
2016-01-20 12:53:50 +00:00
John Baldwin 5b2c414df1 Add a pseudosection for the NT_FREEBSD_THRMISC note.
bfd/ChangeLog:

	* elf.c (elfcore_grok_note): Recognize NT_FREEBSD_THRMISC notes.
2016-01-19 08:15:08 -08:00
Miranda Cupertino 34e967a5f3 Add PIC and TLS support to the ARC target.
bfd/ChangeLog:
	* arc-plt.def: New file.
	* arc-plt.h: Likewise.
	* elf32-arc.c (elf_arc_abs_plt0_entry, elf_arc_abs_pltn_entry,
		       elf_arcV2_abs_plt0_entry, elf_arcV2_abs_pltn_entry,
		       elf_arc_pic_plt0_entry, elf_arc_pic_pltn_entry,
		       elf_arcV2_pic_plt0_entry, elf_arcV2_pic_pltn_entry): Remove.
	(name_for_global_symbol): Added.
	(ADD_RELA): Helper to create dynamic relocs.
	(new_got_entry_to_list): Create a new got entry in linked list.
	(symbol_has_entry_of_type): Search for specific type of entry in
	list.
	(is_reloc_for_GOT): return FALSE for any TLS related relocs.
	(is_reloc_for_TLS, arc_elf_set_private_flags)
	(arc_elf_print_private_bfd_data, arc_elf_copy_private_bfd_data)
	(arc_elf_merge_private_bfd_data): New functions.
	(debug_arc_reloc): Cleaned debug info printing.
	(PDATA reloc): Changed not to perform address alignment.
	(reverse_me): Added. Fix for ARC_32 relocs.
	(arc_do_relocation): Return bfd_reloc_of when no relocation should
	occur.
	(arc_get_local_got_ents): Renamed from arc_get_local_got_offsets.
	Changed function to access an array of list of GOT entries instead
	of just an array of offsets.
	(elf_arc_relocate_section): Added support for PIC and TLS related relocations.
	(elf_arc_check_relocs): Likewise.
	(elf_arc_adjust_dynamic_symbol, elf_arc_finish_dynamic_symbol,
	(elf_arc_finish_dynamic_sections): Likewise
	(arc_create_dynamic_sections): Modified conditions to create
	dynamic sections.
	(ADD_SYMBOL_REF_SEC_AND_RELOC): New macro.
	(plt_do_relocs_for_symbol, relocate_plt_for_symbol)
	(relocate_plt_for_entry): Changed to support new way to define PLT
	related code.
	(add_symbol_to_plt): Likewise.
	(arc_elf_link_hash_table_create): New function.

include/ChangeLog:
	* elf/arc-reloc.def (ARC_32, ARC_GOTPC, ARC_TLS_GD_GOT)
	(ARC_TLS_IE_GOT, ARC_TLS_DTPOFF, ARC_TLS_DTPOFF_S9, ARC_TLS_LE_S9)
	(ARC_TLS_LE_32): Fixed formula.
	(ARC_TLS_GD_LD): Use new special function.
	* opcode/arc-func.h: Changed all the replacement
	functions to clear the patching bits before doing an or it with the value
	argument.
2016-01-19 15:25:58 +00:00
Nick Clifton 9ae678af99 Use a 32-bit value to hold the section number in the internal COFF symbol structure.
PR ld/19440
inc	* coff/internal.h (internal_syment): Use int to hold section
	number.
	(N_UNDEF): Cast to int not short.
	(N_ABS): Likewise.
	(N_DEBUG): Likewise.
	(N_TV): Likewise.
	(P_TV): Likewise.

bfd	PR ld/19440
	* coff-rs6000.c (_bfd_xcoff_swap_sym_in): Sign extend external
	section number into internal section number.
	* coff64-rs6000.c (_bfd_xcoff64_swap_sym_in): Likewise.
	* coffswap.h (coff_swap_sym_in): Likewise.
	* peXXigen.c (_bfd_XXi_swap_sym_in): Likewise.
	* coffcode.h (_coff_bigobj_swap_sym_in): Make sure that internal
	section number field is big enough to hold the external value.
2016-01-18 15:58:47 +00:00
Alan Modra 5c14705fb3 Regen configure
Picks up 2016-01-12 libtool.m4 change.

bfd/
	* configure: Regenerate.
binutils/
	* configure: Regenerate.
gas/
	* configure: Regenerate.
gprof/
	* configure: Regenerate.
ld/
	* configure: Regenerate.
opcodes/
	* configure: Regenerate.
2016-01-17 12:28:14 +10:30
Yury Usishchev ac06903dcf Add cantunwind when unwind info does not match start of section.
bfd     * elf32-arm.c (elf32_arm_fix_exidx_coverage): Insert cantunwind when
        address in first unwind entry does not match start of section.

tests   * ld-arm/arm-elf.exp: New test.
        * ld-arm/unwind-mix.d: New file.
        * ld-arm/unwind-mix1.s: New file.
        * ld-arm/unwind-mix2.s: New file.
2016-01-12 16:35:49 +00:00
Jiong Wang 109575d7eb [ARM] PR ld/19368: Add missing relocation type class for R_ARM_IRELATIVE
2016-01-08  Richard Sandiford  <richard.sandiford@arm.com>
	    Jiong Wang  <jiong.wang@arm.com>

	PR ld/19368
	bfd/
	* elf32-arm.c (elf32_arm_reloc_type_class): Map R_ARM_IRELATIVE to
	reloc_class_ifunc.

	ld/
	* testsuite/ld-arm/ifunc-3.rd: Update expected result.
	* testsuite/ld-arm/ifunc-4.rd: Likewise.
	* testsuite/ld-arm/ifunc-9.rd: Likewise.
	* testsuite/ld-arm/ifunc-10.rd: Likewise.
	* testsuite/ld-arm/ifunc-12.rd: Likewise.
	* testsuite/ld-arm/ifunc-13.rd: Likewise.
2016-01-08 09:49:03 +00:00
Andrew Burgess b05a65d0ad bfd/arc: Add R_ prefix to all relocation names
The convention within for relocation names is that they start with the
string "R_", however, this is not so for ARC for the display names of
relocations, however, internally, the names for the relocations types do
have the 'R_' prefix.  I suspect that the missing 'R_' on the output
strings was an oversight, as I can't see any comment to the contrary.

To bring ARC into line with other targets, this commit adds the 'R_'
prefix to the output strings used for relocation names, and updates all
of the assembler tests where this was exposed.

bfd/ChangeLog:

	* elf32-arc.c (reloc_type_to_name): Change ARC_RELOC_HOWTO to
	place 'R_' before the reloc name returned.
	(elf_arc_howto_table): Change ARC_RELOC_HOWTO to place 'R_' before
	the relocation string.

gas/ChangeLog:

	* testsuite/gas/arc/adc.d: Add 'R_' prefix to relocation names.
	* testsuite/gas/arc/add.d: Likewise.
	* testsuite/gas/arc/and.d: Likewise.
	* testsuite/gas/arc/asl.d: Likewise.
	* testsuite/gas/arc/asr.d: Likewise.
	* testsuite/gas/arc/bic.d: Likewise.
	* testsuite/gas/arc/extb.d: Likewise.
	* testsuite/gas/arc/extw.d: Likewise.
	* testsuite/gas/arc/j.d: Likewise.
	* testsuite/gas/arc/jl.d: Likewise.
	* testsuite/gas/arc/ld2.d: Likewise.
	* testsuite/gas/arc/lsr.d: Likewise.
	* testsuite/gas/arc/mov.d: Likewise.
	* testsuite/gas/arc/or.d: Likewise.
	* testsuite/gas/arc/pcl-relocs.d: Likewise.
	* testsuite/gas/arc/pcrel-relocs.d: Likewise.
	* testsuite/gas/arc/pic-relocs.d: Likewise.
	* testsuite/gas/arc/plt-relocs.d: Likewise.
	* testsuite/gas/arc/rlc.d: Likewise.
	* testsuite/gas/arc/ror.d: Likewise.
	* testsuite/gas/arc/rrc.d: Likewise.
	* testsuite/gas/arc/sbc.d: Likewise.
	* testsuite/gas/arc/sda-relocs.d: Likewise.
	* testsuite/gas/arc/sda-relocs2.d: Likewise.
	* testsuite/gas/arc/sexb.d: Likewise.
	* testsuite/gas/arc/sexw.d: Likewise.
	* testsuite/gas/arc/st.d: Likewise.
	* testsuite/gas/arc/sub.d: Likewise.
	* testsuite/gas/arc/tls-relocs.d: Likewise.
	* testsuite/gas/arc/xor.d: Likewise.
2016-01-06 14:15:22 +00:00
Maciej W. Rozycki a3dc0a7f65 MIPS/BFD: Factor out ABI flag merging
Factor out the parts of `_bfd_mips_elf_merge_private_bfd_data'
responsible for ABI flag merging to `mips_elf_merge_obj_abiflags'.  No
functional change.

	bfd/
	* elfxx-mips.c (mips_elf_merge_obj_abiflags): New function,
	factored out from...
	(_bfd_mips_elf_merge_private_bfd_data): ... here.
2016-01-04 23:32:34 +00:00
Maciej W. Rozycki d537eeb527 MIPS/BFD: Move attribute check after ELF file header flag check
We have a problem in that in making compatibility checks while merging
private BFD data on the MIPS target we give priority to the attribute
check, which may fail and cause the function to abort early on.  The
problem with this is the ABI compatibility aspect recorded in the
attributes is relatively minor compared to aspects recorded in the ELF
file header.  However the premature exit causes any more important
compatibility aspect violated to be masked and not reported to the user
once a problem with attributes has been noticed.

So move the attribute check after the ELF file header flag check in
`_bfd_mips_elf_merge_private_bfd_data', and do not return prematurely
there.  Take advantage of the resulting grouping of ELF file header
handling together and remove the premature success return point for the
first input object being handled, letting the code later on figure out
output ABI flags even for this object.

Update LD test cases according to messages from ELF file header checks
now preceding ones from attribute checks.

	bfd/
	* elfxx-mips.c (_bfd_mips_elf_merge_private_bfd_data): Move
	attribute check after ELF file header flag check.

	ld/
	* testsuite/ld-mips-elf/attr-gnu-4-14.d: Update the order of
	messages expected according to MIPS BFD private data merge
	changes.
	* testsuite/ld-mips-elf/attr-gnu-4-24.d: Likewise.
	* testsuite/ld-mips-elf/attr-gnu-4-34.d: Likewise.
	* testsuite/ld-mips-elf/attr-gnu-4-41.d: Likewise.
	* testsuite/ld-mips-elf/attr-gnu-4-42.d: Likewise.
	* testsuite/ld-mips-elf/attr-gnu-4-43.d: Likewise.
	* testsuite/ld-mips-elf/attr-gnu-4-45.d: Likewise.
	* testsuite/ld-mips-elf/attr-gnu-4-46.d: Likewise.
	* testsuite/ld-mips-elf/attr-gnu-4-47.d: Likewise.
	* testsuite/ld-mips-elf/attr-gnu-4-48.d: Likewise.
	* testsuite/ld-mips-elf/attr-gnu-4-49.d: Likewise.
	* testsuite/ld-mips-elf/attr-gnu-4-54.d: Likewise.
	* testsuite/ld-mips-elf/attr-gnu-4-64.d: Likewise.
	* testsuite/ld-mips-elf/attr-gnu-4-74.d: Likewise.
2016-01-04 23:30:00 +00:00
Maciej W. Rozycki 43d223b543 MIPS/BFD: Propagate the return status in attribute merging
Fix the issue of any failure from `_bfd_elf_merge_object_attributes' not
being propagated by `mips_elf_merge_obj_attributes'.

	bfd/
	* elfxx-mips.c (mips_elf_merge_obj_attributes): Propagate the
	return status from `_bfd_elf_merge_object_attributes'.
2016-01-04 23:16:45 +00:00
Maciej W. Rozycki b2e9744f80 MIPS/BFD: Factor out ELF file header flag checks
Factor out the parts of `_bfd_mips_elf_merge_private_bfd_data'
responsible for ELF file header flag compatibility checks to
`mips_elf_merge_obj_e_flags'.  As a side effect remove a premature
return point from `_bfd_mips_elf_merge_private_bfd_data'.  No functional
change otherwise.

	bfd/
	* elfxx-mips.c (mips_elf_merge_obj_e_flags): New function,
	factored out from...
	(_bfd_mips_elf_merge_private_bfd_data): ... here.
2016-01-04 23:15:03 +00:00
Maciej W. Rozycki 28d45e28be MIPS/BFD: Fold the handling of input MIPS ABI flags together
Fold the handling of input MIPS ABI flags in private BFD data merging
together, moving the attribute check afterwards, and consequently making
input vs output compatibility checks only start once all input ABI flag
data has been gathered, checked for inconsistencies and put in order.

Consequently also address the issue of input ABI flag inconsistencies
being masked by a failing attribute check, which currently makes
`_bfd_mips_elf_merge_private_bfd_data' exit prematurely and therefore
prevent input ABI flag inconsistencies from being reported.  Such
inconsistencies need to be reported as they may be the very cause of an
attribute check failure.

	bfd/
	* elfxx-mips.c (_bfd_mips_elf_merge_private_bfd_data): Fold the
	handling of input MIPS ABI flags together.
2016-01-04 23:13:10 +00:00
Maciej W. Rozycki 23ba6f1807 MIPS/BFD: Suppress attribute checks for null input
We currently special-case the handling of attribute checks on input
objects and make them even before we check a given input object actually
contains any sections.  This does not add value as empty objects do not
cause a compatibility concern and we already make this observation for
other properties such as ELF file header flags.  Moreover the attributes
themselves are stored in a `.gnu.attributes' section so the absence of
any section (except from a few special cases) implies there have been no
attributes provided either.  Therefore it is safe to move the attribute
checks later on, after the null-section check has been made.

	bfd/
	* elfxx-mips.c (_bfd_mips_elf_merge_private_bfd_data): Suppress
	attribute checks for null input.
2016-01-04 23:00:24 +00:00
Maciej W. Rozycki cf8502c131 MIPS/BFD: Use local pointers to target data in private data merge
Use local pointers to target data to reduce the amount of indirection
and improve the readability of `_bfd_mips_elf_merge_private_bfd_data'.

	bfd/
	* elfxx-mips.c (_bfd_mips_elf_merge_private_bfd_data): Use local
	pointers to target data.
2016-01-04 22:49:59 +00:00
Maciej W. Rozycki dcb1c79659 MIPS/BFD: Correct an FP ABI warning
Correct a warning produced on any FP ABI mismatch observed.  Unlike the
other settings, which in the presence of `.MIPS.abiflags' are duplicated
in the `e_flags' member of the ELF file header, information on the FP
ABI in use is duplicated in `.gnu.attributes' rather than in the former
place.  Update the warning message accordingly.

	bfd/
	* elfxx-mips.c (_bfd_mips_elf_merge_private_bfd_data): Correct
	an FP ABI warning.
2016-01-04 22:48:14 +00:00
Alan Modra 6f2750feaf Copyright update for binutils 2016-01-01 23:00:01 +10:30
Alan Modra 3499769a6a New 2016 binutils ChangeLog files
Note that this does not create bfd/doc/ChangeLog, */testsuite/ChangeLog
and include/*/ChangeLog files.
2016-01-01 22:59:42 +10:30
Alan Modra 4120fa118f binutils ChangeLog rotation 2016-01-01 22:59:17 +10:30
Alan Modra 331e61312e Fix assorted ChangeLog errors 2015-12-30 11:44:35 +10:30
Sandra Loosemore a7be2893a6 Correct nios2 _gp address computation.
2015-12-27  Sandra Loosemore  <sandra@codesourcery.com>

	bfd/
	* elf32-nios2.c (nios2_elf_assign_gp): Correct computation of _gp
	address.
	(nios2_elf32_relocate_section): Tidy code for R_NIOS2_GPREL error
	messages.
2015-12-27 12:30:26 -08:00
Thomas Preud'homme 2fd158eb7b Add support for linking ARMv8-M object files
2015-12-24  Thomas Preud'homme  <thomas.preudhomme@arm.com>

bfd/
    * elf32-arm.c (using_thumb_only): Check that profile is 'M' and update
    logic around Tag_CPU_arch values to return TRUE for ARMv8-M
    architectures.
    (tag_cpu_arch_combine): Define v8m_baseline and v8m_mainline and update
    v4t_plus_v6_m and comb to deal with ARMv8-M Tag_CPU_arch merging logic.
    (elf32_arm_merge_eabi_attributes): Add Tag_CPU_name values for
    ARMv8-M.

bfd/testsuite/
    * ld-arm/arm-elf.exp (armeabitests_common): Run new tests
    "Thumb-Thumb farcall v8-M", "EABI attribute merging 8",
    "EABI attribute merging 9" and "EABI attribute merging 10".
    (Thumb-Thumb farcall v8-M): Renamed to ...
    (Thumb-Thumb farcall v8-M Mainline): This.
    (Thumb-Thumb farcall v8-M Baseline): New test.
    * ld-arm/attr-merge-8a.s: New file.
    * ld-arm/attr-merge-8b.s: Likewise.
    * ld-arm/attr-merge-8.attr: Likewise.
    * ld-arm/attr-merge-9a.s: Likewise.
    * ld-arm/attr-merge-9b.s: Likewise.
    * ld-arm/attr-merge-9.out: Likewise.
    * ld-arm/attr-merge-10a.s: Likewise.
    * ld-arm/attr-merge-10b.s: Likewise.
    * ld-arm/attr-merge-10.attr: Likewise.
2015-12-24 17:33:17 +08:00
Thomas Preud'homme ff8646eef8 Add assembler support for ARMv8-M Baseline
2015-12-24  Thomas Preud'homme  <thomas.preudhomme@arm.com>

bfd/
    (tag_cpu_arch_combine): Adjust comment in v4t_plus_v6_m with regards
    to merging with ARMv8-M Baseline.

binutils/
    * readelf.c (arm_attr_tag_CPU_arch): Add ARMv8-M Baseline Tag_CPU_arch
    value.

gas/
    * config/tc-arm.c (arm_ext_v6t2_v8m): New feature for instructions
    shared between ARMv6T2 and ARMv8-M.
    (move_or_literal_pool): Check mov.w/mvn and movw availability against
    arm_ext_v6t2 and arm_ext_v6t2_v8m respectively instead of checking
    arm_arch_t2.
    (do_t_branch): Error out for wide conditional branch instructions if
    targetting ARMv8-M Baseline.
    (non_v6t2_wide_only_insn): Add the logic for new wide-only instructions
    in ARMv8-M Baseline.
    (wide_insn_ok): New function.
    (md_assemble): Use wide_insn_ok instead of non_v6t2_wide_only_insn and
    adapt error message for unsupported wide instruction to ARMv8-M
    Baseline.
    (insns): Reorganize instructions shared by ARMv8-M Baseline and
    ARMv6t2 architecture.
    (arm_cpus): Set feature bit ARM_EXT2_V6T2_V8M for marvell-pj4 and
    marvell-whitney cores.
    (arm_archs): Define armv8-m.base architecture.
    (cpu_arch_ver): Define ARM_ARCH_V8M_BASE architecture version.
    (aeabi_set_public_attributes): Add logic to set Tag_CPU_arch to 17 for
    ARMv8-M Mainline.  Set Tag_DIV_use for ARMv8-M Baseline as well.

gas/testsuite/
    * gas/arm/archv8m-base.d: New file.
    * gas/arm/attr-march-armv8m.base.d: Likewise.
    * gas/arm/armv8m.base-idiv.d: Likewise.
    * gas/arm/any-armv8m.d: Adapt to deal with ARMv8-M Baseline.

include/elf/
    * arm.h (TAG_CPU_ARCH_V8M_BASE): Declare.

include/opcode/
    * arm.h (ARM_EXT2_V6T2_V8M): New extension bit.
    (ARM_AEXT2_V8A): New architecture extension bitfield.
    (ARM_AEXT2_V8_1A): Use ARM_AEXT2_V8A instead of ARM_EXT2_ATOMICS.
    (ARM_AEXT_V8M_BASE): New architecture extension bitfield.
    (ARM_AEXT2_V8M): Add extension bit ARM_EXT2_V6T2_V8M.
    (ARM_ARCH_V6T2): Use ARM_EXT2_V6T2_V8M for the second extension
    bitfield.
    (ARM_ARCH_V6KT2): Likewise.
    (ARM_ARCH_V6ZT2): Likewise.
    (ARM_ARCH_V6KZT2): Likewise.
    (ARM_ARCH_V7): Likewise.
    (ARM_ARCH_V7A): Likewise.
    (ARM_ARCH_V7VE): Likewise.
    (ARM_ARCH_V7R): Likewise.
    (ARM_ARCH_V7M): Likewise.
    (ARM_ARCH_V7EM): Likewise.
    (ARM_ARCH_V8A): Likewise.
    (ARM_ARCH_V8M_BASE): New architecture bitfield.
    (ARM_ARCH_THUMB2): Include instructions shared by ARMv6t2 and ARMv8-M.
    (ARM_ARCH_V7A_SEC): Use ARM_EXT2_V6T2_V8M for the second extension
    bitfield and reindent.
    (ARM_ARCH_V7A_MP_SEC): Likewise.
    (ARM_ARCH_V7R_IDIV): Likewise.
    (ARM_ARCH_V8A_FP): Use ARM_AEXT2_V8A instead of ARM_EXT2_ATOMICS.
    (ARM_ARCH_V8A_SIMD): Likewise.
    (ARM_ARCH_V8A_CRYPTOV1): Likewise.

opcodes/
    * arm-dis.c (arm_opcodes): Guard movw, movt cbz, cbnz, clrex, ldrex,
    ldrexb, ldrexh, strex, strexb, strexh shared by ARMv6T2 and ARMv8-M by
    ARM_EXT2_V6T2_V8M instead of ARM_EXT_V6T2.
2015-12-24 17:27:21 +08:00
Thomas Preud'homme 4ed7ed8db2 Add assembler support for ARMv8-M Mainline
2015-12-24  Thomas Preud'homme  <thomas.preudhomme@arm.com>

bfd/
    (tag_cpu_arch_combine): Adjust v4t_plus_v6_m and comb array to account
    for new TAG_CPU_ARCH_V4T_PLUS_V6_M value.  Deal with NULL values in
    comb array.

binutils/
    * readelf.c (arm_attr_tag_CPU_arch): Add ARMv8-M Mainline Tag_CPU_arch
    value.
    (arm_attr_tag_THUMB_ISA_use): Add ARMv8-M Mainline Tag_THUMB_ISA_use
    value.

gas/
    * config/tc-arm.c (arm_ext_m): Include ARMv8-M.
    (arm_ext_v8m): New feature for ARMv8-M.
    (arm_ext_atomics): New feature for ARMv8 atomics.
    (do_tt): New encoding function for TT* instructions.
    (insns): Add new entries for ARMv8-M specific instructions and
    reorganize the ones shared by ARMv8-M Mainline and ARMv8-A.
    (arm_archs): Define armv8-m.main architecture.
    (cpu_arch_ver): Define ARM_ARCH_V8M_MAIN architecture version and
    clarify the ordering rule.
    (aeabi_set_public_attributes): Use TAG_CPU_ARCH_* macro to refer to
    Tag_CPU_arch values for ARMv7e-M detection.  Add logic to keep setting
    Tag_CPU_arch to ARMv8-A for -march=all.  Also set Tag_CPU_arch_profile
    to 'A' if extension bit for atomic instructions is set, unless it is
    ARMv8-M.  Set Tag_THUMB_ISA_use to 3 for ARMv8-M.  Set Tag_DIV_use to 0
    for ARMv8-M Mainline.

gas/testsuite/
    * gas/arm/archv8m.s: New file.
    * gas/arm/archv8m-main.d: Likewise.
    * gas/arm/attr-march-armv8m.main.d: Likewise.
    * gas/arm/any-armv8m.s: Likewise.
    * gas/arm/any-armv8m.d: Likewise.

include/elf/
    * arm.h (TAG_CPU_ARCH_V8M_MAIN): Declare.
    (MAX_TAG_CPU_ARCH): Define to TAG_CPU_ARCH_V8M_MAIN.
    (TAG_CPU_ARCH_V4T_PLUS_V6_M): Define to unused value 15.

include/opcode/
    * arm.h (ARM_EXT2_ATOMICS): New extension bit.
    (ARM_EXT2_V8M): Likewise.
    (ARM_EXT_V8): Adjust comment with regards to atomics and remove
    mention of legacy use for that bit.
    (ARM_AEXT2_V8_1A): New architecture extension bitfield.
    (ARM_AEXT2_V8_2A): Likewise.
    (ARM_AEXT_V8M_MAIN): Likewise.
    (ARM_AEXT2_V8M): Likewise.
    (ARM_ARCH_V8A): Use ARM_EXT2_ATOMICS for features in second bitfield.
    (ARM_ARCH_V8_1A): Likewise with ARM_AEXT2_V8_1A.
    (ARM_ARCH_V8_2A): Likewise with ARM_AEXT2_V8_2A.
    (ARM_ARCH_V8M_MAIN): New architecture feature bitfield.
    (ARM_ARCH_V8A_FP): Use ARM_EXT2_ATOMICS for features in second bitfield
    and reindent.
    (ARM_ARCH_V8A_SIMD): Likewise.
    (ARM_ARCH_V8A_CRYPTOV1): Likewise.
    (ARM_ARCH_V8_1A_FP): Use ARM_AEXT2_V8_1A to set second bitfield of
    feature bits.
    (ARM_ARCH_V8_1A_SIMD): Likewise.
    (ARM_ARCH_V8_1A_CRYPTOV1): Likewise.

opcodes/
    * arm-dis.c (arm_opcodes): Guard lda, ldab, ldaex, ldaexb, ldaexh, stl,
    stlb, stlh, stlex, stlexb and stlexh by ARM_EXT2_ATOMICS instead of
    ARM_EXT_V8.
    (thumb32_opcodes): Add entries for wide ARMv8-M instructions.
2015-12-24 17:26:54 +08:00
Yury Usishchev 491d01d3da ARM: Fix exidx coverage for relocatable builds.
bfd  * elf-bfd.h: Add callback to count additional relocations.
     * elf32-arm.c (_arm_elf_section_data): Add new counter.
     (insert_cantunwind_after): Increment relocations counter.
     (elf32_arm_fix_exidx_coverage): Remove exidx entries and add
     terminating CANTUNWIND entry only in final builds.
     (elf32_arm_add_relocation): New function.
     (elf32_arm_write_section): Add relocations in relocatable builds.
     (elf32_arm_count_additional_relocs): New function.
     (elf_backend_count_additional_relocs): New define.
     * bfd/elflink.c (bfd_elf_final_link): Use callback and adjust size of
     .rel section.
     * bfd/elfxx-target.h (elf_backend_count_additional_relocs): New define.

ld   * emultempl/armelf.em (gld${EMULATION_NAME}_after_allocation): Call
     elf32_arm_fix_exidx_coverage for relocatable builds.

ld/testsuite
     * ld-arm/arm-elf.exp: New test.
     * ld-arm/unwind-rel.d: New file.
     * ld-arm/unwind-rel1.s: New file.
     * ld-arm/unwind-rel2.s: New file.
     * ld-arm/unwind-rel3.s: New file.
2015-12-22 15:50:13 +00:00
Yoshinori Sato 239efab164 RXv2 support update
2015-12-22  Yoshinori Sato <ysato@users.sourceforge.jp>

opcodes/
	* rx-decode.opc (movco): Use uniqe id.
	(movli): Likewise.
	(stnz): Condition fix.
	(mvtacgu): Destination fix.
	* rx-decode.c: Regenerate.

bfd/
	* archures.c: Add bfd_mach_rx_v2.
	* bfd-in2.h: Regenerate.
	* cpu-rx.c (arch_info_struct): Add v2 information.
	* elf32-rx.c (elf32_rx_machine): Add v2 support.
2015-12-22 23:26:39 +09:00
Mickael Guene ac4c9b0459 Add support for ARM's NOREAD section flag.
include/elf
     * arm.h: Add arm SHF_ARM_NOREAD section flag.

bfd  * bfd-in2.h: Regenerate.
     * section.c: Add SEC_ELF_NOREAD.
     * elf32-arm.c (elf32_arm_post_process_headers): Only set
     PF_X attribute if a segment only contains section with
     SHF_ARM_NOREAD flag.
     (elf32_arm_fake_sections): Add SEC_ELF_NOREAD conversion.
     (elf32_arm_section_flags): New function to convert SHF_ARM_NOREAD
     to bfd flag.
     (elf32_arm_lookup_section_flags): New function to allow
     INPUT_SECTION_FLAGS directive with SHF_ARM_NOREAD flag.
     (elf32_arm_special_sections): Add special sections array
     to catch section prefix by '.text.noread' pattern.

ld/testsuite
     * ld-arm/arm-elf.exp: New tests.
     * ld-arm/thumb1-input-section-flag-match.d: New
     * ld-arm/thumb1-input-section-flag-match.s: New
     * ld-arm/thumb1-noread-not-present-mixing-two-section.d: New
     * ld-arm/thumb1-noread-not-present-mixing-two-section.s: New
     * ld-arm/thumb1-noread-present-one-section.d: New
     * ld-arm/thumb1-noread-present-one-section.s: New
     * ld-arm/thumb1-noread-present-two-section.d: New
     * ld-arm/thumb1-noread-present-two-section.s: New

binutils
	* readelf.c (get_elf_section_flags): Add support for ARM specific
	section flags.
2015-12-22 14:12:35 +00:00
H.J. Lu c9f203207d Fix formatting in coff-x86_64.c
* coff-x86_64.c (coff_amd64_reloc): Fix formatting.
2015-12-18 08:15:27 -08:00
Nick Clifton ec70be9f61 Fix formatting of coff-i386.c
* coff-i386.c (coff_i386_reloc): Fix formatting.
2015-12-18 08:49:02 +00:00
Christophe Lyon 0bef041426 Add forgotten ChangeLog updates for 72d98d16ed09584660d0cbb759d90f8dfeef2343:
2015-12-16  Mickael Guene <mickael.guene@st.com>

	bfd/
	* bfd-in2.h: Regenerate.
	* reloc.c: Add new relocations.
	* libbfd.h (bfd_reloc_code_real_names): Add new relocations
	display names.
	* elf32-arm.c (elf32_arm_howto_table_1): Add HOWTO for new
	relocations.
	(elf32_arm_reloc_map): Add bfd/arm mapping for new relocations.
	(elf32_arm_final_link_relocate): Implement new relocations
	resolution.

	gas/
	* doc/c-arm.texi: Add documentation about new directives
	* config/tc-arm.c (group_reloc_table): Add mapping between gas
	syntax and new relocations.
	(do_t_add_sub): Keep new relocations for add operand.
	(do_t_mov_cmp): Keep new relocations for mov operand.
	(insns): Use 'shifter operand with possible group relocation'
	operand parse code for movs operand.
	(md_apply_fix): Implement mov and add encoding when new
	relocations on them.
	(tc_gen_reloc): Add new relocations.
	(arm_fix_adjustable): Since offset has a limited range ([0:255])
	we disable adjust_reloc_syms() for new relocations.

	gas/testsuite/
	* gas/arm/adds-thumb1-reloc-local.d: New
	* gas/arm/adds-thumb1-reloc-local.s: New
	* gas/arm/movs-thumb1-reloc-local.d: New
	* gas/arm/movs-thumb1-reloc-local.s: New

	include/
	* elf/arm.h: Add new arm relocations.

	ld/testsuite/
	* ld-arm/arm-elf.exp (armelftests_common): Add new relocations
	tests.
	* ld-arm/thumb1-adds.d: New
	* ld-arm/thumb1-adds.s: New
	* ld-arm/thumb1-movs.d: New
	* ld-arm/thumb1-movs.s: New
2015-12-17 11:14:37 +01:00
Jan Beulich 270f824531 bfd: don't produce corrupt COFF symbol table due to long ELF file name symbols
The re-writing logic in _bfd_coff_final_link() overwrote the ".file"
part of the symbol table entry, due to not coping with the auxiliary
entry generated in all cases.

Note that while I would have wanted to add a test case,
(a) I didn't spot any one testing the base functionality here, and
(b) I wasn't able to figure out proper conditionals to use in e.g.
    ld-elf/elf.exp to check for the necessary PE/PE+ support (which
    varies by target).
2015-12-15 14:31:25 +01:00
Nick Clifton 08832196ac Update the copyright notices in the affected files.
PR 19339
	* elf-vxworks.h: Update copyright notice.
	* elf-vxworks.c: Update copyright notice.
	* elf-nacl.h: Update copyright notice.
	* elf-nacl.c: Update copyright notice.
2015-12-15 12:28:38 +00:00
H.J. Lu c5847ba726 ld -r doesn't need plugin for slim lto object
Plugin isn't required on slim lto object for relocatable link.

bfd/

	PR ld/19317
	* linker.c (_bfd_generic_link_add_one_symbol): Don't complain
	plugin needed to handle slim lto object for relocatable link.

ld/testsuite/

	PR ld/19317
	* ld-plugin/lto.exp (lto_no_fat): New.
	(lto_link_tests): Add a test for PR ld/19317.
	(lto_run_tests): Likewise.
	(run_ld_link_tests): Likewise.
2015-12-10 12:35:50 -08:00
Sandra Loosemore 33d4099fc8 Fix GOT address computations in initial PLT entries for nios2.
2015-12-09  Sandra Loosemore  <sandra@codesourcery.com>

	bfd/
	* elf32-nios2.c (nios2_elf32_finish_dynamic_sections): Correct
	%hiadj/%lo computations for _GLOBAL_OFFSET_TABLE_ in initial
	PLT entries.  Assert alignment requirements.
2015-12-09 16:13:58 -08:00
DJ Delorie e896287c16 rl78: relaxation fixes
Various fixes to linker relaxation.  In general, we need to support
relaxing every branch, even if we don't relax it in the assembler,
so we can optionally defer relaxation to the linker.

* elf32-rl78.c (rl78_offset_for_reloc): Add more relocs.
(rl78_elf_relax_section): Add bc/bz/bnc/bnz/bh/bnh.  Fix reloc
choices.

* config/rl78-parse.y: Make all branches relaxable via
rl78_linkrelax_branch().
* config/tc-rl78.c (rl78_linkrelax_branch): Mark all relaxable
branches with relocs.
(options): Add OPTION_NORELAX.
(md_longopts): Add -mnorelax.
(md_parse_option): Support OPTION_NORELAX.
(op_type_T): Add bh, sk, call, and br.
(rl78_opcode_type): Likewise.
(rl78_relax_frag): Fix not-relaxing logic.  Add sk.
(md_convert_frag): Fix relocation handling.
(tc_gen_reloc): Strip relax relocs when not linker relaxing.
(md_apply_fix): Defer overflow handling for anything that needs a
PLT, to the linker.
* config/tc-rl78.h (TC_FORCE_RELOCATION): Force all relocations to
the linker when linker relaxing.
* doc/c-rl78.texi (norelax): Add.
2015-12-08 01:29:25 -05:00
DJ Delorie 7859afc4fa rx: Fix p_vaddr reconstruction logic.
* elf32-rx.c (rx_elf_object_p): Ignore empty and nobits sections.
2015-12-08 01:15:58 -05:00
Nick Clifton 6056244624 oops - accidentally omittde from previous delta. 2015-12-07 14:44:46 +00:00
Alan Modra cbf9597294 PowerPC ifunc with local symbols
This fixes some cases where the linker would incorrectly error on plt
relocs to local ifunc symbols.  I've also tidied plt and ifunc
handling for ppc64, where check_relocs was allowing for the
possibility of plt calls via addr14/addr24 relocs but relocate_section
was not.

	* elf32-ppc.c (ppc_elf_check_relocs): Don't error on local ifunc
	plt call.  Wrap long lines.
	(ppc_elf_relocate_section): Wrap long lines.
	* elf64-ppc.c (ppc64_elf_check_relocs): Don't error on local ifunc
	plt calls.  Move __tls_get_addr checks later.  Don't create plt
	for addr14/addr24 relocs.
	(ppc64_elf_gc_sweep_hook): Adjust to suit check_relocs changes.
	(ppc64_elf_relocate_section): Correct local ifunc handling for
	PLT64, PLT32 and PLT16 relocs.
2015-12-07 13:52:01 +10:30
Alan Modra c20f6f63ed PR19323 memory allocation greater than 4G
On 32-bit targets, memory requested for program/section headers on a
fuzzed binary can wrap to 0.  A bfd_alloc of zero bytes actually
returns a one byte allocation rather than a NULL pointer.  This then
leads to buffer overflows.

Making this check unconditional triggers an extremely annoying gcc-5
warning.

	PR19323
	* elfcode.h (elf_object_p): Check for ridiculous e_shnum and
	e_phnum values.
2015-12-07 13:42:23 +10:30
Alan Modra 006589cfa1 R_PPC64_ENTRY
Add a new relocation that marks large-model entry code, for edit back
to medium-model.

include/elf/
	* ppc64.h (R_PPC64_ENTRY): Define.
bfd/
	* reloc.c (BFD_RELOC_PPC64_ENTRY): New.
	* elf64-ppc.c (reloc_howto_type ppc64_elf_howto_raw): Add
	entry for R_PPC64_ENTRY.
	(LD_R2_0R12, ADD_R2_R2_R12, LIS_R2, ADDIS_R2_R12): Define.
	(ppc64_elf_reloc_type_lookup): Handle R_PPC64_ENTRY.
	(ppc64_elf_relocate_section): Edit code at R_PPC64_ENTTY.  Use
	new insn defines.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Regenerate.
2015-12-07 13:14:53 +10:30
Kaz Kojima 2b213129c5 bfd: Mark sh5*-*-* and sh64*-*-* targets as obsolete. 2015-12-07 10:01:02 +09:00
H.J. Lu 02e2aef89b Optimize R_386_GOT32/R_386_GOT32X only if addend is 0
Linker can't optimize R_386_GOT32 and R_386_GOT32X relocations if addend
isn't 0.  It isn't valid to convert

movl	foo@GOT+1(%ecx), %eax

to

leal	foo@GOTOFF+1(%ecx), %eax

nor to convert

movq	foo@GOTPCREL+1(%rip), %rax

to

leaq	foo(%rip), %rax

for x86-64.  We should check if addend is 0 before optimizing R_386_GOT32
and R_386_GOT32X relocations.  Testcases are added for i386 and x86-64.

bfd/

	* elf32-i386.c (elf_i386_convert_load): Skip if addend isn't 0.
	(elf_i386_relocate_section): Skip R_386_GOT32X optimization if
	addend isn't 0.

ld/testsuite/

	* ld-i386/i386.exp: Run mov2a, mov2b and mov3.
	* ld-i386/mov2.s: New file.
	* ld-i386/mov2a.d: Likewise.
	* ld-i386/mov2b.d: Likewise.
	* ld-i386/mov3.d: Likewise.
	* ld-i386/mov3.s: Likewise.
	* ld-x86-64/mov2.s: Likewise.
	* ld-x86-64/mov2a.d: Likewise.
	* ld-x86-64/mov2b.d: Likewise.
	* ld-x86-64/mov2c.d: Likewise.
	* ld-x86-64/mov2d.d: Likewise.
	* ld-x86-64/x86-64.exp: Run mov2a, mov2b, mov2c and mov2d.
2015-12-04 09:03:04 -08:00
Tristan Gingold 461c4b2ede Remove useless loop in elf.c 2015-12-04 12:51:03 +01:00
Alan Modra 923b198a84 addr2line vs. inlined C functions called from C++
In this case the inlined function doesn't have DW_AT_linkage_name in
.debug_info, but the language is C++ so find_nearest_line goes looking
in the symbol table.  Since the function is inlined the enclosing
non-inline function symbol is returned from _bfd_elf_find_function,
which is wrong.  This patch only uses a symbol if its address matches.

	PR binutils/19315
	* dwarf2.c (_bfd_elf_find_function): Return symbol matched.
	(_bfd_dwarf2_find_nearest_line): Check symbol returned above
	against dwarf range.
	* elf-bfd.h (_bfd_elf_find_function): Update prototype.
2015-12-02 23:55:51 +10:30
Alan Modra c27b8c2aeb Fix powerpc64 segfault caused by zero r_symndx relocs.
Fixes a segfault in ppc64_elf_tls_optimize found when testing
R_PPC64_ENTRY, and potential for trouble in other places found by
code inspection.

	* elf64-ppc.c (ppc64_elf_tls_optimize): Don't segfault on NULL
	symbol section or output section.
	(ppc64_elf_edit_toc): Similarly for ld -R objects.
	(ppc64_elf_size_stubs): Likewise.
2015-12-02 19:18:27 +10:30
H.J. Lu ead3d5427a Properly check symbol defined by assignment in linker script
Symbol defined by a linker assignment may have type bfd_link_hash_new
or bfd_link_hash_undefined.  And h->def_regular is always set.
elf_i386_convert_load and elf_x86_64_convert_load should check
h->def_regular as well as bfd_link_hash_undefined and bfd_link_hash_new
to see if a symbol is defined by a linker script.

bfd/

	PR ld/19319
	* elf32-i386.c (elf_i386_convert_load): Check h->def_regular
	instead of bfd_link_hash_new.
	* elf64-x86-64.c (elf_x86_64_convert_load): Likewise.  Skip
	relocation overflow for bfd_link_hash_undefined and
	bfd_link_hash_new if h->def_regular is set.

ld/testsuite/

	PR ld/19319
	* ld-i386/i386.exp: Run pr19319 test.
	* ld-x86-64/x86-64.exp: Likewise.
	* ld-i386/pr19319.dd: New file.
	* ld-i386/pr19319a.S: Likewise.
	* ld-i386/pr19319b.S: Likewise.
	* ld-x86-64/pr19319.dd: Likewise.
	* ld-x86-64/pr19319a.S: Likewise.
	* ld-x86-64/pr19319b.S: Likewise.
2015-12-01 14:45:51 -08:00
Alan Modra 3a8c4a5b42 Trim unused params from aout adjust_sizes_and_vmas
* aoutx.h (adjust_sizes_and_vmas): Remove unused text_size and
	text_end parameters.  Update callers.
	* aout-tic30.c: Update adjust_sizes_and_vmas callers.
	* hp300hpux.c: Likewise.
	* i386lynx.c: Likewise.
	* libaout.h: Likewise.
	* netbsd.h: Likewise.
	* pdp11.c: Likewise.
	* riscix.c: Likewise.
2015-12-01 14:00:33 +10:30
Alan Modra bbb1afc89b Invoke aout N_* macros with pointer to struct internal_exec
No functional changes here.

BTW, some of these headers don't seem to be used anywhere:
include/aout/dynix3.h, include/aout/encap.h, include/aout/hp.h,
gas/config/aout_gnu.h

bfd/
	* aout-adobe.c: Invoke aout N_* macros with pointer to
	struct internal_exec.
	* aout-arm.c: Likewise.
	* aout-cris.c: Likewise.
	* aout-target.h: Likewise.
	* aout-tic30.c: Likewise.
	* aoutf1.h: Likewise.
	* aoutx.h: Likewise.
	* bout.c: Likewise.
	* freebsd.h: Likewise.
	* gen-aout.c: Likewise.
	* hp300hpux.c: Likewise.
	* i386aout.c: Likewise.
	* i386linux.c: Likewise.
	* i386lynx.c: Likewise.
	* i386mach3.c: Likewise.
	* i386os9k.c: Likewise.
	* libaout.h: Likewise.
	* m68klinux.c: Likewise.
	* m88kmach3.c: Likewise.
	* mipsbsd.c: Likewise.
	* netbsd.h: Likewise.
	* pc532-mach.c: Likewise.
	* pdp11.c: Likewise.
	* riscix.c: Likewise.
	* sparclinux.c: Likewise.
	* sparclynx.c: Likewise.
gas/
	* config/aout_gnu.h: Invoke aout N_* macros with pointer to
	struct internal_exec.
include/
	* bout.h: Invoke aout N_* macros with pointer to
	struct internal_exec.
	* os9k.h: Likewise.
include/aout/
	* adobe.h: Invoke aout N_* macros with pointer to
	struct internal_exec.
	* aout64.h: Likewise.
	* dynix3.h: Likewise.
	* encap.h: Likewise.
	* hp.h: Likewise.
	* hp300hpux.h: Likewise.
	* sun4.h: Likewise.
2015-12-01 13:40:05 +10:30
Alan Modra b560e2acdd Don't use BFD_TRADITIONAL_FORMAT flag in COFF support
info->traditional_format is available, or can be easily made
available.  This relegates BFD_TRADITIONAL_FORMAT to AOUT use only.

	* coff-rs6000.c (_bfd_xcoff_put_symbol_name): Replace abfd param
	with info param.  Test info->traditional_format rather than
	BFD_TRADITIONAL_FORMAT flag.
	* coff64-rs6000.c (_bfd_xcoff64_put_symbol_name): Likewise.
	* libxcoff.h (struct xcoff_backend_data_rec): Update
	_xcoff_put_symbol_name prototype.
	(bfd_xcoff_put_symbol_name): Add info param.
	* xcofflink.c (xcoff_find_tc0): Update bfd_xcoff_put_symbol_name call.
	(xcoff_write_global_symbol): Likewise.
	(xcoff_link_input_bfd): Test info->traditional_format rather than
	BFD_TRADITIONAL_FORMAT flag.
	* cofflink.c (_bfd_coff_final_link): Likewise.
	(_bfd_coff_link_input_bfd, _bfd_coff_write_global_sym): Likewise.
2015-12-01 13:40:04 +10:30
Alan Modra 44c2e68082 SRC-POTFILES.in update
* po/SRC-POTFILES.in: Regenerate.
2015-12-01 13:40:01 +10:30
Alan Modra f26dd30880 Re: ARC port broken reloc processing
* elf32-arc.c (ARC_ELF_HOWTO): Delete.
	(arc_elf_howto): New function.
	(bfd_elf32_bfd_reloc_type_lookup): Use it in place of existing
	init code.
	(bfd_elf32_bfd_reloc_name_lookup): Use arc_elf_howto.
	(arc_info_to_howto_rel, elf_arc_relocate_section): Likwise.
	(elf_arc_check_relocs): Likewise.
2015-12-01 13:39:19 +10:30
Alan Modra 0a5ff21b13 ARC port broken reloc processing
This initialises howto.dst_mask so that relocations in debug sections
are applied by the generic reloc processing used by objdump to display
debug sections.

	* elf32-arc.c (arc_elf_howto_init): Init dst_mask.
2015-12-01 11:15:02 +10:30
Stefan Teleman 0b1fa2880c Fix a problem with the maximum number of open files held in the cache when running on a 32-bit Solaris host.
PR ld/19260
	* cache.c (bfd_cache_max_open): Avoid using getrlimit on 32-bit
	Solaris as the result is unreliable.
2015-11-20 15:28:40 +00:00
Tristan Gingold 9b334a2ccd Fix missing update in previous patch.
bfd/
	* mach-o-x86-64.c (x86_64_howto_table): Change name here too.
2015-11-20 15:15:24 +01:00
Tristan Gingold f075eb5e6b binutils: add support for arm-*-darwin and aarch64-*-darwin.
Currently only in bfd and binutils.

ChangeLog/
	* configure.ac: Add aarch64-*-darwin* and arm-*-darwin*.
	* configure: Regenerate.

bfd/ChangeLog/
	* targets.c (aarch64_mach_o_vec, arm_mach_o_vec): Declare.
	(_bfd_target_vector): Add new vectors.
	* reloc.c (BFD_RELOC_MACH_O_SUBTRACTOR32)
	(BFD_RELOC_MACH_O_SUBTRACTOR64, BFD_RELOC_MACH_O_ARM64_ADDEND)
	(BFD_RELOC_MACH_O_ARM64_GOT_LOAD_PAGE21)
	(BFD_RELOC_MACH_O_ARM64_GOT_LOAD_PAGEOFF12)
	(BFD_RELOC_MACH_O_ARM64_POINTER_TO_GOT): New relocations.
	(BFD_RELOC_MACH_O_X86_64_SUBTRACTOR32)
	(BFD_RELOC_MACH_O_X86_64_SUBTRACTOR64): Remove.
	* mach-o-x86-64.c (bfd_mach_o_x86_64_swap_reloc_out): Change
	name of subtractor relocations.
	* config.bfd: Handle aarch64-*-darwin*, arm-*-darwin*.
	* Makefile.am (BFD32_BACKENDS): Add mach-o-arm.lo.
	(BFD32_BACKENDS_CFILES): Add mach-o-arm.c.
	(BFD64_BACKENDS): Add mach-o-aarch64.lo.
	(BFD64_BACKENDS_CFILES): Add mach-o-aarch64.c.
	* configure.ac: Handle aarch64_mach_o_vec and arm_mach_o_vec.
	* mach-o-aarch64.c: New file.
	* mach-o-arm.c: New file.
	* Makefile.in: Regenerate.
	* bfd-in2.h: Regenerate.
	* configure: Regenerate.
	* libbfd.h: Regenerate.
2015-11-20 14:53:06 +01:00
David Bridgham 11b8aeb881 Synchronize PDP11 page size between BFD and LD.
* pdp11.c (TARGET_PAGE_SIZE): Set to 256 to match definition in
	ld/emulparams/pdp11.sh.
2015-11-20 12:58:16 +00:00
Andreas Krebbel d47b13e0e2 [S/390] Add null ptr check + port GOTOFF handling from 32 bit over to 64 bit
bfd/ChangeLog:

2015-11-19  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

	PR ld/19263
	* elf32-s390.c (elf_s390_gc_sweep_hook): Add null ptr check.
	* elf64-s390.c (elf_s390_check_relocs): Port the GOTOFF handling
	over from the 32 bit code.
	(elf_s390_relocate_section): Likewise.
2015-11-19 11:10:06 +01:00
Tristan Gingold bcb51645d3 mach-o: use a per-target reloc canonicalize function.
bfd/
	* mach-o.h (bfd_mach_o_swap_in_non_scattered_reloc)
	(bfd_mach_o_canonicalize_non_scattered_reloc)
	(bfd_mach_o_pre_canonicalize_one_reloc): Declare.
	(bfd_mach_o_backend_data): Rename field
	_bfd_mach_o_swap_reloc_in to _bfd_mach_o_canonicalize_one_reloc.
	* mach-o.c (bfd_mach_o_swap_in_non_scattered_reloc): Now public.
	(bfd_mach_o_canonicalize_non_scattered_reloc): Renames from
	bfd_mach_o_canonicalize_one_reloc.
	(bfd_mach_o_pre_canonicalize_one_reloc): New function.
	(bfd_mach_o_canonicalize_relocs): Adjust.
	(bfd_mach_o_canonicalize_relocs): Rename define from
	bfd_mach_o_swap_reloc_in.
	* mach-o-target.c (TARGET_NAME_BACKEND): Use
	bfd_mach_o_canonicalize_one_reloc instead of
	bfd_mach_o_swap_reloc_in.
	* mach-o-i386.c (bfd_mach_o_i386_canonicalize_one_reloc): Renames
	from bfd_mach_o_i386_swap_reloc_in and adjust.
	(bfd_mach_o_canonicalize_one_reloc): Renames from
	bfd_mach_o_i386_canonicalize_one_reloc.
	* mach-o-x86_64.c (bfd_mach_o_x86_64_canonicalize_one_reloc): Renames
	from bfd_mach_o_x86_64_swap_reloc_in and adjust.
	(bfd_mach_o_canonicalize_one_reloc): Renames from
	bfd_mach_o_x86_64_canonicalize_one_reloc.
2015-11-18 15:47:56 +01:00
Alan Modra 4978e369fb Prevent looping in archives
PR 19256
	* archive.c (bfd_generic_openr_next_archived_file): Don't allow
	backward file movement via "negative" sizes.
	* coff-alpha.c (alpha_ecoff_openr_next_archived_file): Likewise.
2015-11-18 22:16:24 +10:30
Tristan Gingold 47daa70fe0 mach-o cleanup: remove useless calls to bfd_seek.
Also support new commands.

bfd/
	* mach-o.h (struct mach_o_data_struct): Add hdr_offset field.
	(bfd_mach_o_fat_archive_p): Renames prototype.
	(bfd_mach_o_fat_openr_next_archived_file): Renames.
	(bfd_mach_o_header_p): Add argument.
	* mach-o.c (bfd_mach_o_read_header): Add hdr_off argument and
	use it.
	(bfd_mach_o_read_section_32, bfd_mach_o_read_section_64)
	(bfd_mach_o_read_section): Remove offset argument.
	(bfd_mach_o_read_dylinker): Remove bfd_seek call.
	(bfd_mach_o_read_dylib, bfd_mach_o_read_prebound_dylib)
	(bfd_mach_o_read_prebind_cksum, bfd_mach_o_read_twolevel_hints)
	(bfd_mach_o_read_fvmlib, bfd_mach_o_read_dysymtab)
	(bfd_mach_o_read_symtab, bfd_mach_o_read_uuid)
	(bfd_mach_o_read_linkedit, bfd_mach_o_read_str)
	(bfd_mach_o_read_dyld_info, bfd_mach_o_read_version_min)
	(bfd_mach_o_read_encryption_info): Likewise.
	(bfd_mach_o_read_encryption_info_64): New function.
	(bfd_mach_o_read_main, bfd_mach_o_read_source_version)
	(bfd_mach_o_read_segment): Remove call to bfd_seek.
	(bfd_mach_o_read_command): Use hdr_offset in bfd_seek.
	Handle BFD_MACH_O_LC_LINKER_OPTIMIZATION_HINT,
	BFD_MACH_O_LC_ENCRYPTION_INFO_64, BFD_MACH_O_LC_VERSION_MIN_WATCHOS.
	(bfd_mach_o_header_p): Add hdr_off argument.
	(bfd_mach_o_gen_object_p, bfd_mach_o_gen_core_p): Adjust calls.
	(bfd_mach_o_fat_archive_p): Renames.
	(bfd_mach_o_fat_openr_next_archived_file): Renames.
	(bfd_mach_o_close_and_cleanup): Remove useless code.
	(bfd_mach_o_close_and_cleanup): Define.
	* mach-o-x86-64.c (bfd_mach_o_x86_64_object_p)
	(bfd_mach_o_x86_64_core_p): Adjust calls.
	* mach-o-target.c: Move defines for archive from mach-o.c.
	Remove check on TARGET_ARCHIVE.
	* mach-o-i386.c (bfd_mach_o_i386_object_p)
	(bfd_mach_o_i386_core_p): Adjust calls.
2015-11-18 11:48:56 +01:00
Christophe Lyon eee926f28e Fix a problematic message with the STM32L4XX fixup on 32-bit hosts.
* elf32-arm.c (elf32_arm_write_section): Force offset output as
	long (%ld).
2015-11-17 11:37:14 +00:00
Tristan Gingold d8bd95efd8 Bump version to 2.26.51
bfd/
2015-11-13  Tristan Gingold  <gingold@adacore.com>

	* version.m4: Bump version to 2.26.51
	* configure: Regenerate.

binutils/
2015-11-13  Tristan Gingold  <gingold@adacore.com>

	* configure: Regenerate.

gas/
2015-11-13  Tristan Gingold  <gingold@adacore.com>

	* configure: Regenerate.

gprof/
2015-11-13  Tristan Gingold  <gingold@adacore.com>

	* configure: Regenerate.

ld/
2015-11-13  Tristan Gingold  <gingold@adacore.com>

	* configure: Regenerate.

opcodes/
2015-11-13  Tristan Gingold  <gingold@adacore.com>

	* configure: Regenerate.
2015-11-14 16:24:39 -08:00
Marcus Shawcroft 06d2788cef Revert "[LD][AARCH64]Add TLSIE relaxation support under large memory model."
This reverts commit 3ebe65c0ff.

Reverted due to PR19188
2015-11-12 15:16:40 +00:00
Peter Bergner a680de9a98 Add assembler, disassembler and linker support for power9.
include/opcode/
	* ppc.h (PPC_OPCODE_POWER9): New define.
	(PPC_OPCODE_VSX3): Likewise.

opcodes/
	* ppc-dis.c (ppc_opts): Add "power9" and "pwr9" entries.
	Add PPC_OPCODE_VSX3 to the vsx entry.
	(powerpc_init_dialect): Set default dialect to power9.
        * ppc-opc.c (insert_dcmxs, extract_dcmxs, insert_dxd, extract_dxd,
        insert_dxdn, extract_dxdn, insert_l0, extract_l0, insert_l1,
        extract_l1 insert_xtq6, extract_xtq6): New static functions.
        (insert_esync): Test for illegal L operand value.
	(DCMX, DCMXS, DXD, NDXD, L0, L1, RC, FC, UIM6, X_R, RIC, PRS, XSQ6,
	XTQ6, LRAND, IMM8, DQX, DQX_MASK, DX, DX_MASK, VXVAPS_MASK, VXVA,XVA,
	XX2VA, XVARC, XBF_MASK, XX2UIM4_MASK, XX2BFD_MASK, XX2DCMXS_MASK,
	XVA_MASK, XRLA_MASK, XBFRARB_MASK, XLRAND_MASK, POWER9, PPCVEC3,
	PPCVSX3): New defines.
	(powerpc_opcodes) <ps_cmpu0, ps_cmpo0, ps_cmpu1, ps_cmpo1, fcmpu,
	fcmpo, ftdiv, ftsqrt>: Use XBF_MASK.
	<mcrxr>: Use XBFRARB_MASK.
	<addpcis, bcdcfn., bcdcfsq., bcdcfz., bcdcpsgn., bcdctn., bcdctsq.,
	bcdctz., bcds., bcdsetsgn., bcdsr., bcdtrunc., bcdus., bcdutrunc.,
	cmpeqb, cmprb, cnttzd, cnttzd., cnttzw, cnttzw., copy, copy_first,
	cp_abort, darn, dtstsfi, dtstsfiq, extswsli, extswsli., ldat, ldmx,
	lwat, lxsd, lxsibzx, lxsihzx, lxssp, lxv, lxvb16x, lxvh8x, lxvl, lxvll,
	lxvwsx, lxvx, maddhd, maddhdu, maddld, mcrxrx, mfvsrld, modsd, modsw,
	modud, moduw, msgsync, mtvsrdd, mtvsrws, paste, paste., paste_last,
	rmieg, setb, slbieg, slbsync, stdat, stop, stwat, stxsd, stxsibx,
	stxsihx, stxssp, stxv, stxvb16x, stxvh8x, stxvl, stxvll, stxvx,
	subpcis, urfid, vbpermd, vclzlsbb, vcmpneb, vcmpneb., vcmpneh,
	vcmpneh., vcmpnew, vcmpnew., vcmpnezb, vcmpnezb., vcmpnezh, vcmpnezh.,
	vcmpnezw, vcmpnezw., vctzb, vctzd, vctzh, vctzlsbb, vctzw, vextractd,
	vextractub, vextractuh, vextractuw, vextsb2d, vextsb2w, vextsh2d,
	vextsh2w, vextsw2d, vextublx, vextubrx, vextuhlx, vextuhrx, vextuwlx,
	vextuwrx, vinsertb, vinsertd, vinserth, vinsertw, vmul10cuq,
	vmul10ecuq, vmul10euq, vmul10uq, vnegd, vnegw, vpermr, vprtybd,
	vprtybq, vprtybw, vrldmi, vrldnm, vrlwmi, vrlwnm, vslv, vsrv, wait,
	xsabsqp, xsaddqp, xsaddqpo, xscmpeqdp, xscmpexpdp, xscmpexpqp,
	xscmpgedp, xscmpgtdp, xscmpnedp, xscmpoqp, xscmpuqp, xscpsgnqp,
	xscvdphp, xscvdpqp, xscvhpdp, xscvqpdp, xscvqpdpo, xscvqpsdz,
	xscvqpswz, xscvqpudz, xscvqpuwz, xscvsdqp, xscvudqp, xsdivqp,
	xsdivqpo, xsiexpdp, xsiexpqp, xsmaddqp, xsmaddqpo, xsmaxcdp,
	xsmaxjdp, xsmincdp, xsminjdp, xsmsubqp, xsmsubqpo, xsmulqp, xsmulqpo,
	xsnabsqp, xsnegqp, xsnmaddqp, xsnmaddqpo, xsnmsubqp, xsnmsubqpo,
	xsrqpi, xsrqpix, xsrqpxp, xssqrtqp, xssqrtqpo, xssubqp, xssubqpo,
	xststdcdp, xststdcqp, xststdcsp, xsxexpdp, xsxexpqp, xsxsigdp,
	xsxsigqp, xvcmpnedp, xvcmpnedp., xvcmpnesp, xvcmpnesp., xvcvhpsp,
	xvcvsphp, xviexpdp, xviexpsp, xvtstdcdp, xvtstdcsp, xvxexpdp,
	xvxexpsp, xvxsigdp, xvxsigsp, xxbrd, xxbrh, xxbrq, xxbrw, xxextractuw,
	xxinsertw, xxperm, xxpermr, xxspltib>: New instructions.
	<doze, nap, sleep, rvwinkle, waitasec, lxvx, stxvx>: Disable on POWER9.
	<tlbiel, tlbie, sync, slbmfev, slbmfee>: Add additional operands.

include/elf/
	* ppc.h (R_PPC_REL16DX_HA): New reloction.
	* ppc64.h (R_PPC64_REL16DX_HA): Likewise.

bfd/
	* elf32-ppc.c (ppc_elf_howto_raw): Add R_PPC_REL16DX_HA.
	(ppc_elf_reloc_type_lookup): Handle R_PPC_REL16DX_HA.
	(ppc_elf_addr16_ha_reloc): Likewise.
	(ppc_elf_check_relocs): Likewise.
	(ppc_elf_relocate_section): Likewise.
	(is_insn_dq_form): Handle lxv and stxv instructions.
	* elf64-ppc.c (ppc64_elf_howto_raw): Add R_PPC64_REL16DX_HA.
	(ppc64_elf_reloc_type_lookup): Handle R_PPC64_REL16DX_HA.
	(ppc64_elf_ha_reloc): Likewise.
	(ppc64_elf_check_relocs): Likewise.
	(ppc64_elf_relocate_section): Likewise.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Likewise.
	* reloc.c (BFD_RELOC_PPC_REL16DX_HA): New.

elfcpp/
	* powerpc.h (R_POWERPC_REL16DX_HA): Define.

gas/
	* doc/as.texinfo (Target PowerPC): Document -mpower9 and -mpwr9.
	* doc/c-ppc.texi (PowerPC-Opts):  Likewise.
	* config/tc-ppc.c (md_show_usage): Likewise.
	(md_assemble): Handle BFD_RELOC_PPC_REL16DX_HA.
	(md_apply_fix): Likewise.
	(ppc_handle_align): Handle power9's group ending nop.

gas/testsuite/
	* gas/ppc/altivec3.s: New test.
	* gas/ppc/altivec3.d: Likewise.
	* gas/ppc/vsx3.s: Likewise.
	* gas/ppc/vsx3.d: Likewise.
	* gas/ppc/power9.s: Likewise.
	* gas/ppc/power9.d: Likewise.
	* gas/ppc/ppc.exp: Run them.
	* gas/ppc/power8.s <lxvx, lxvd2x, stxvx, stxvd2x>: Add new tests.
	* gas/ppc/power8.d: Likewise.
	* gas/ppc/vsx.s: <lxvx, stxvx>: Rename invalid mnemonics ...
	<lxvd2x, stxvd2x>: ...to this.
	* gas/ppc/vsx.d: Likewise.

gold/
	* gold/powerpc.cc (Powerpc_relocate_functions::addr16_dq): New function.
	(Powerpc_relocate_functions::addr16dx_ha): Likewise.
	(Target_powerpc::Scan::local): Handle R_POWERPC_REL16DX_HA.
	(Target_powerpc::Scan::global): Likewise.
	(Target_powerpc::Relocate::relocate): Likewise.

ld/testsuite/
	* ld-powerpc/addpcis.d: New test.
	* ld-powerpc/addpcis.s: New test.
	* ld-powerpc/powerpc.exp: Run it.
2015-11-11 19:52:52 -06:00
H.J. Lu 18954b29a1 Handle x86 VTINHERIT/VTENTRY relocs when deleting relocations
* elf32-i386.c (elf_i386_relocate_section): Handle VTINHERIT
	and VTENTRY relocations when deleting relocations.
	* elf64-x86-64.c (elf_x86_64_relocate_section): Likewise.
2015-11-10 04:27:51 -08:00
H.J. Lu 2d5da47320 Properly move kept relocations when deleting relocations
* elf32-i386.c (elf_i386_relocate_section): Properly move
	kept relocations when deleting relocations.
	* elf64-x86-64.c (elf_x86_64_relocate_section): Likewise.
2015-11-10 00:17:59 -08:00
H.J. Lu 60f2e42e00 Fix performance regression on x86 with ld -r
Similar fix to "commit c316a17c40e44e8798b34ff84130904f2e7a53de".

	* elf32-i386.c (elf_i386_relocate_section): Use read and write
	pointers to reloc array, rather than memmove when deleting a
	reloc.  Don't use RELOC_AGAINST_DISCARDED_SECTION.  Adjust
	reloc counts at end of loop.
	* elf64-x86-64.c (elf_x86_64_relocate_section): Likewise.
2015-11-10 00:00:04 -08:00
Alan Modra c316a17c40 Fix performance regression due to ld -r memmove
The idea here is that instead of using memmove to shuffle the relocs
array every time one is deleted, to add a "wrel" pointer and copy from
rel[0] to wrel[0] as we go.

	* elf64-ppc.c (ppc64_elf_relocate_section): Use read and write
	pointers to reloc array, rather than memmove when deleting a
	reloc.  Don't use RELOC_AGAINST_DISCARDED_SECTION.  Adjust
	reloc counts at end of loop.
	* elf32-ppc.c (ppc_elf_relocate_section): Likewise.
2015-11-10 17:14:41 +10:30
Dominik Vogt 29f628db88 bfd: Fix left shift of negative value.
This patch fixes all occurences of left-shifting negative constants in C code
which is undefined by the C standard.

bfd/ChangeLog:

        * elf64-ppc.c (ppc64_elf_size_stubs, ppc64_elf_build_stubs): Fix left
        shift of negative value.
        * libbfd.c (safe_read_leb128): Likewise.
        * dwarf2.c (place_sections): Likewise.
        * bfd-in.h (align_power): Likewise.
        * bfd-in2.h (align_power): Likewise.
2015-11-09 17:12:56 +01:00
Nick Clifton 26f187cd16 Updated (simplified) Chinese translations for ld, bfd, binutils and gold.
* po/zh_CN.po: Updated (simplified) Chinese translation.
2015-10-30 12:50:27 +00:00
Catherine Moore ca9584fb9b 2015-10-29 Catherine Moore <clm@codesourcery.com>
bfd/
    	* elfxx-mips.c (mips_elf_check_mips16_stubs): Set a stub's output
    	section to bfd_abs_section_ptr if the stub is discarded.

    	ld/testsuite/
    	* ld-mips-elf/mips16-fp-stub-1.s: New.
    	* ld-mips-elf/mips16-fp-stub-2.s: New.
    	* ld-mips-elf/mips16-fp-stub.d: New.
    	* ld-mips-elf/mips-elf.exp: Run new tests.
    	* ld-mips-elf/mips16-intermix.d: Update expected output.

	https://sourceware.org/ml/binutils/2015-10/msg00137.html
2015-10-29 06:58:16 -07:00
Ed Schouten a75cf613fd Add support for AArch64 CloudABI binaries.
ld	* Makefile.am (ALL_64_EMULATION_SOURCES): Add support for
	CloudABI on aarch64. For this target we have to make sure we use
	ELFOSABI_CLOUDABI instead of ELFOSABI_NONE.
	* configure.tgt (targ_emul): Likewise.
	* emulparams/aarch64cloudabi.sh: New file.
	* emulparams/aarch64cloudabib.sh: New file.
	* Makefile.in: Regenerate.

bfd	* config.bfd (targ_defvec): Add support for CloudABI on aarch64.
	For this target we have to make sure we use ELFOSABI_CLOUDABI
	instead of ELFOSABI_NONE.
	* configure.ac (tb): Likewise.
	* elfnn-aarch64.c: Likewise.
	* targets.c (_bfd_target_vector): Likewise.
	* configure: Regenerate.

gas	* config/tc-aarch64.c (elf64_aarch64_target_format): Select the
	cloudabi format if the TARGET_OS is cloudabi.
2015-10-29 13:49:03 +00:00
Pedro Alves 968bc5cc86 bfd/libhppa.h: Make C++ compatible
Fixes this when GDB is built in C++ mode:

 In file included from /home/pedro/gdb/mygit/src/gdb/../bfd/som.h:27:0,
		  from /home/pedro/gdb/mygit/src/gdb/somread.c:31:
 /home/pedro/gdb/mygit/src/gdb/../bfd/libhppa.h: In function ‘int bfd_hppa_insn2fmt(bfd*, int)’:
 /home/pedro/gdb/mygit/src/gdb/../bfd/libhppa.h:380:42: error: invalid conversion from ‘int’ to ‘hppa_opcode_type’ [-fpermissive]
  #define get_opcode(insn) (((insn) >> 26) & 0x3f)
					   ^
 /home/pedro/gdb/mygit/src/gdb/../bfd/libhppa.h:465:30: note: in expansion of macro ‘get_opcode’
    enum hppa_opcode_type op = get_opcode (insn);
			       ^

bfd/ChangeLog:
2015-10-29  Pedro Alves  <palves@redhat.com>

	* libhppa.h (bfd_hppa_insn2fmt): Add cast.
2015-10-29 12:56:27 +00:00
H.J. Lu a3718e9efd Fix a typo in comment in elf32-i386.c
* elf32-i386.c (elf_i386_relocate_section): Fix a typo in
	comment.
2015-10-28 09:15:40 -07:00
Nick Clifton 82188b295d Fix recent STM324LXX patch to compile on 32-bit hosts.
* elf32-arm.c (create_instruction_branch_absolute): Replace
	pointer parameters with a simple integer parameter.
	(stm32l4xx_create_replacing_stub_ldmia): Update calls to
	create_instruction_branch_absolute.
	(stm32l4xx_create_replacing_stub_ldmdb): Likewise.
	(stm32l4xx_create_replacing_stub_vldm): Likewise.
	(elf32_arm_write_section): Use pointer type for veneer addresses.
2015-10-28 13:52:11 +00:00
Cupertino Miranda 6f4b1afcdc Fix errors in the gas testsuite for the ARC target.
bfd	* reloc.c (BFD_RELOC_ARC_32_PCREL): New entry.
	(ARC_TLS_DTPOFF): Arrange it in order.
	* elf32-arc.c (arc_elf_howto_ini): Update formula.
	(get_middle_endian_relocation): New function.
	(PDATA): Define.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Likewise.

elf	* arc-reloc.def (ARC_32_PCREL): New definition.

gas	* config/tc-arc.c (tokenize_arguments): Avoid creating unused
	symbols when parsing relocation types.
	(md_apply_fix): Handle TLS relocations. Fix BFD_RELOC_ARC_32_PCREL
	relocation.
	(arc_check_reloc): Emit BFD_RELOC_ARC_32_PCREL relocation.
2015-10-28 13:48:00 +00:00
Alan Modra 199af15039 Orphan output section with multiple input sections
If given input sections with differing flags, we'd like to place the
section according to the final output section flags.

bfd/
	PR ld/19162
	* elflink.c (_bfd_elf_gc_mark_reloc): Move code iterating over
	linker input bfds..
	* section.c (bfd_get_next_section_by_name): ..to here.  Add ibfd param.
	(bfd_get_linker_section): Adjust bfd_get_next_section_by_name call.
	* tekhex.c (first_phase): Likewise.
	* elflink.c (bfd_elf_gc_sections): Likewise.
	* bfd-in2.h: Regenerate.
ld/
	PR ld/19162
	* emultempl/elf32.em (gld${EMULATION_NAME}_place_orphan): Check flags
	before calling _bfd_elf_match_sections_by_type.  Merge flags for
	any other input sections that might match a new output section to
	decide placement.
2015-10-28 17:51:10 +10:30
Laurent Alfonsi a504d23a83 Add --fix-stm32l4xx-629360 to the ARM linker to enable a link-time workaround for a bug in the bus matrix / memory controller for some of the STM32 Cortex-M4 based products (STM32L4xx).
bfd  * bfd-in2.h: Regenerate.
     * bfd-in.h (bfd_arm_stm32l4xx_fix): New enum. Specify how
     STM32L4XX instruction scanning should be done.
     (bfd_elf32_arm_set_stm32l4xx_fix)
     (bfd_elf32_arm_stm32l4xx_erratum_scan)
     (bfd_elf32_arm_stm32l4xx_fix_veneer_locations): Add prototypes.
     (bfd_elf32_arm_set_target_relocs): Add stm32l4xx fix type argument
     to prototype.
     * elf32-arm.c (STM32L4XX_ERRATUM_VENEER_SECTION_NAME)
     (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME): Define macros.
     (elf32_stm32l4xx_erratum_type): New enum.
     (elf32_stm32l4xx_erratum_list): New struct. List of veneers or
     jumps to veneers.
     (_arm_elf_section_data): Add stm32l4xx_erratumcount,
     stm32l4xx_erratumlist.
     (elf32_arm_link_hash_table): Add stm32l4xx_erratum_glue_size,
     stm32l4xx_fix and num_stm32l4xx_fixes fields.
     (ctz): New function.
     (popcount): New function.
     (elf32_arm_link_hash_table_create): Initialize stm32l4xx_fix.
     (put_thumb2_insn): New function.
     (STM32L4XX_ERRATUM_LDM_VENEER_SIZE): Define. Size of a veneer for
     LDM instructions.
     (STM32L4XX_ERRATUM_VLDM_VENEER_SIZE): Define. Size of a veneer for
     VLDM instructions.
     (bfd_elf32_arm_allocate_interworking_sections): Initialise erratum
     glue section.
     (record_stm32l4xx_erratum_veneer) : New function. Create a single
     veneer, and its associated symbols.
     (bfd_elf32_arm_add_glue_sections_to_bfd): Add STM32L4XX erratum glue.
     (bfd_elf32_arm_set_stm32l4xx_fix): New function. Set the type of
     erratum workaround required.
     (bfd_elf32_arm_stm32l4xx_fix_veneer_locations): New function. Find
     out where veneers and branches to veneers have been placed in
     virtual memory after layout.
     (is_thumb2_ldmia): New function.
     (is_thumb2_ldmdb): Likewise.
     (is_thumb2_vldm ): Likewise.
     (stm32l4xx_need_create_replacing_stub): New function. Decide if a
     veneer must be emitted.
     (bfd_elf32_arm_stm32l4xx_erratum_scan): Scan the sections of an
     input BFD for potential erratum-triggering insns. Record results.
     (bfd_elf32_arm_set_target_relocs): Set stm32l4xx_fix field in
     global hash table.
     (elf32_arm_size_dynamic_sections): Collect glue information.
     (create_instruction_branch_absolute): New function.
     (create_instruction_ldmia): Likewise.
     (create_instruction_ldmdb): Likewise.
     (create_instruction_mov): Likewise.
     (create_instruction_sub): Likewise.
     (create_instruction_vldmia): Likewise.
     (create_instruction_vldmdb): Likewise.
     (create_instruction_udf_w): Likewise.
     (create_instruction_udf): Likewise.
     (push_thumb2_insn32): Likewise.
     (push_thumb2_insn16): Likewise.
     (stm32l4xx_fill_stub_udf): Likewise.
     (stm32l4xx_create_replacing_stub_ldmia): New function. Expands the
     replacing stub for ldmia instructions.
     (stm32l4xx_create_replacing_stub_ldmdb): Likewise for ldmdb.
     (stm32l4xx_create_replacing_stub_vldm): Likewise for vldm.
     (stm32l4xx_create_replacing_stub): New function. Dispatches the
     stub emission to the appropriate functions.
     (elf32_arm_write_section): Output veneers, and branches to veneers.

ld   * ld.texinfo: Description of the STM32L4xx erratum workaround.
     * emultempl/armelf.em (stm32l4xx_fix): New.
     (arm_elf_before_allocation): Choose the type of fix, scan for
     erratum.
     (gld${EMULATION_NAME}_finish): Fix veneer locations.
     (arm_elf_create_output_section_statements): Propagate
     stm32l4xx_fix value.
     (PARSE_AND_LIST_PROLOGUE): Define OPTION_STM32L4XX_FIX.
     (PARSE_AND_LIST_LONGOPTS): Add entry for handling
     --fix-stm32l4xx-629360.
     (PARSE_AND_LIST_OPTION): Add entry for helping on
     --fix-stm32l4xx-629360.
     (PARSE_AND_LIST_ARGS_CASES): Treat OPTION_STM32L4XX_FIX.

tests * ld-arm/arm-elf.exp (armelftests_common): Add STM32L4XX
       tests.
     * ld-arm/stm32l4xx-cannot-fix-far-ldm.d: New.
     * ld-arm/stm32l4xx-cannot-fix-far-ldm.s: Likewise.
     * ld-arm/stm32l4xx-cannot-fix-it-block.d: Likewise.
     * ld-arm/stm32l4xx-cannot-fix-it-block.s: Likewise.
     * ld-arm/stm32l4xx-fix-all.d: Likewise.
     * ld-arm/stm32l4xx-fix-all.s: Likewise.
     * ld-arm/stm32l4xx-fix-it-block.d: Likewise.
     * ld-arm/stm32l4xx-fix-it-block.s: Likewise.
     * ld-arm/stm32l4xx-fix-ldm.d: Likewise.
     * ld-arm/stm32l4xx-fix-ldm.s: Likewise.
     * ld-arm/stm32l4xx-fix-vldm.d: Likewise.
     * ld-arm/stm32l4xx-fix-vldm.s: Likewise.
2015-10-27 13:20:33 +00:00
Sangamesh Mallayya d6867a7559 Add support for 32-bit and 64-bit PowerPC AIX core files.
* configure.ac (powerpc64-*-aix[5-9].*): Match powerpc64 running
	aix for core file support.
	* configure: Regenerate.
	* rs6000-core.c: Check for __ld_info64 if compiling 64-bit gdb.
	Added BFD64 check if we are using old core file format for 32-bit gdb.
	Set sizeof CORE_COMMONSZ appropriately in case of either new or
	old core file format.
	(read_hdr): Added BFD64 check for 64-bit support.
	(rs6000coff_core_p): Likewise.
	(rs6000coff_core_file_matches_executable_p): Likewise.
	(rs6000coff_core_file_failing_command): Likewise.
	(rs6000coff_core_file_failing_signal): Likewise.
	Add support for debugging core files generated by binaries in
	Large Memory model.
	(rs6000coff_core_p): If Large Memory Model is used, then the .data
	segment should start from BDATAORG which has been defined in the
	system header files.
2015-10-27 10:30:29 +00:00
H.J. Lu 7b7e7f1da2 Check symbol defined by assignment in linker script
Symbol symbol defined by an assignment in a linker script has type
bfd_link_hash_new.  elf_i386_convert_load and elf_x86_64_convert_load
should check bfd_link_hash_new to see if a symbol is defined by a linker
script.

bfd/

	PR ld/19175
	* elf32-i386.c (elf_i386_convert_load): Check bfd_link_hash_new
	instead of calling bfd_link_get_defined_symbol.
	* elf64-x86-64.c (elf_x86_64_convert_load): Likewise.  Skip
	relocation overflow for bfd_link_hash_new.
	* linker.c (bfd_link_get_defined_symbol): Removed.
	* bfd-in2.h: Regenerated.

ld/testsuite/

	PR ld/19175
	* ld-i386/i386.exp: Run pr19175.
	* ld-x86-64/x86-64.exp: Likewise.
	* ld-i386/pr19175.d: New file.
	* ld-i386/pr19175.s: Likewise.
	* ld-i386/pr19175.t: Likewise.
	* ld-x86-64/pr19175.d: Likewise.
	* ld-x86-64/pr19175.s: Likewise.
	* ld-x86-64/pr19175.t: Likewise.
2015-10-26 16:32:55 -07:00
H.J. Lu a6af384b19 Properly convert address load of __start_XXX/__stop_XXX
Since __start_XXX and __stop_XXX symbols aren't defined when address
load is being converted, we need to check if there is an XXX output
section to get their section and value.  This patch adds a new function,
bfd_link_get_defined_symbol, to search for the XXX output section to
check if __start_XXX and __stop_XXX symbols are defined.

bfd/

	PR ld/19171
	* elf32-i386.c (elf_i386_convert_load): Call
	bfd_link_get_defined_symbol to check if a symbol is defined.
	* elf64-x86-64.c (elf_x86_64_convert_load): Call
	bfd_link_get_defined_symbol to get defined symbol section and
	value.
	* linker.c (bfd_link_get_defined_symbol): New function.
	* bfd-in2.h: Regenerated.

ld/testsuite/

	PR ld/19171
	* ld-i386/lea1.s: Add tests for address load of __start_XXX
	and __stop_XXX.
	* ld-i386/mov1.s: Likewise.
	* ld-x86-64/lea1.s: Likewise.
	* ld-x86-64/mov1.s: Likewise.
	* ld-i386/lea1a.d: Updated.
	* ld-i386/lea1b.d: Likewise.
	* ld-i386/lea1c.d: Likewise.
	* ld-i386/mov1a.d: Likewise.
	* ld-i386/mov1b.d: Likewise.
	* ld-x86-64/lea1a.d: Likewise.
	* ld-x86-64/lea1b.d: Likewise.
	* ld-x86-64/lea1c.d: Likewise.
	* ld-x86-64/lea1d.d: Likewise.
	* ld-x86-64/lea1e.d: Likewise.
	* ld-x86-64/lea1f.d: Likewise.
	* ld-x86-64/mov1a.d: Likewise.
	* ld-x86-64/mov1b.d: Likewise.
	* ld-x86-64/mov1c.d: Likewise.
	* ld-x86-64/mov1d.d: Likewise.
2015-10-26 08:11:55 -07:00
Alan Modra 1cce69b9dc Handle __start_* and __stop_* symbols in --gc-sections
PR ld/11133
	PR ld/19161
	PR ld/19167
	* elflink.c (_bfd_elf_gc_mark_hook): Delete code handling __start_*
	and __stop_* symbol refs.
	(_bfd_elf_gc_mark_rsec): Add start_stop parameter.  Handle __start_*
	and __stop_* symbol refs here..
	(_bfd_elf_gc_mark_reloc): ..and here.
	* elf-bfd.h (_bfd_elf_gc_mark_hook): Update prototype.
	* elf-eh-frame.c (_bfd_elf_parse_eh_frame): Update
	_bfd_elf_gc_mark_rsec call.
2015-10-23 22:26:25 +10:30
Alan Modra 1e7eae0dcc Re: Always keep sections marked with SEC_KEEP
Revert bba037e0, it breaks the gc-sections model.  Instead fix the
underlying problem which is that _bfd_elf_gc_mark_hook is too late to
be setting SEC_KEEP.

	PR ld/11133
	PR ld/19161
	* elflink.c (elf_gc_sweep): Revert last patch.
	(_bfd_elf_gc_mark_hook): Don't set SEC_KEEP here.
2015-10-23 10:22:26 +10:30
H.J. Lu bba037e0ae Always keep sections marked with SEC_KEEP
SEC_KEEP check in elf_gc_sweep was missing in commit:

commit bde6f3eb6d
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Fri Jan 8 01:43:23 2010 +0000

    Set SEC_KEEP on section XXX for undefined __start_XXX/__stop_XXX

    bfd/

    2010-01-07  H.J. Lu  <hongjiu.lu@intel.com>

      PR ld/11133
      * elflink.c (_bfd_elf_gc_mark_hook): Check section XXX for
      undefined __start_XXX/__stop_XXX in all input files and set
      SEC_KEEP.

This patch adds SEC_KEEP check to elf_gc_sweep.

bfd/

	PR ld/19161
	* elflink.c (elf_gc_sweep): Always keep sections marked with
	SEC_KEEP.

ld/testsuite/

	PR ld/19161
	* ld-gc/gc.exp: Run pr19161 test.
	* ld-gc/pr19161-1.c: New file.
	* ld-gc/pr19161-2.c: Likewise.
	* ld-gc/pr19161.d: Likewise.
2015-10-22 12:23:03 -07:00
Hans-Peter Nilsson c287bfe429 bfd/mmo.c: handle "objcopy --extract-symbols" generating and reading back.
bfd:
	* mmo.c (struct mmo_data_struct): New members
	symbol_consistency_override_calculated and ignore_symbol_consistency.
	(mmo_section_has_contents, mmo_ignore_symbol_consistency): New
	functions.
	(mmo_create_symbol): Check with mmo_ignore_symbol_consistency if to
	report an error for unexpected value of Main.
	(mmo_write_symbols_and_terminator): Similar.
2015-10-22 16:17:32 +02:00
H.J. Lu caa65211bb Add "-z call-nop=PADDING" option to ld
The ld linker can transform indirect call to a locally defined function,
foo, via its GOT slot, to either "NOP call foo" or "call foo NOP" where
NOP is a 1-byte NOP padding.  This patch adds a "-z call-nop=PADDING"
option to x86 ld to control 1-byte NOP padding for x86 call instruction.
PADDING is one of prefix-addr, prefix-nop, suffix-nop, prefix-NUMBER or
suffix-NUMBER.

bfd/

	* elf32-i386.c (elf_i386_convert_load): Use call_nop_byte and
	check call_nop_as_suffix for 1-byte NOP padding to pad call.
	* elf64-x86-64.c (elf_x86_64_convert_load): Likewise.

include/

	* bfdlink.h (bfd_link_info): Add call_nop_as_suffix and
	call_nop_byte.

ld/

	* ld/ld.texinfo: Document "-z call-nop=PADDING" option.
	* emulparams/call_nop.sh: New file.
	* emulparams/elf_i386_be.sh: Source
	${srcdir}/emulparams/call_nop.sh.
	* emulparams/elf_i386_chaos.sh: Likewise.
	* emulparams/elf_i386_ldso.sh: Likewise.
	* emulparams/elf_i386_vxworks.sh: Likewise.
	* emulparams/elf_iamcu.sh: Likewise.
	* emulparams/elf_k1om.sh: Likewise.
	* emulparams/elf_l1om.sh: Likewise.
	* emulparams/elf_x86_64.sh: Likewise.
	* emultempl/elf32.em (gld${EMULATION_NAME}_before_parse): Set
	link_info.call_nop_byte if $CALL_NOP_BYTE isn't empty.

ld/testsuite/

	* ld-i386/call3.s: New file.
	* ld-i386/call3a.d: Likewise.
	* ld-i386/call3b.d: Likewise.
	* ld-i386/call3c.d: Likewise.
	* ld-i386/call3d.d: Likewise.
	* ld-i386/call3e.d: Likewise.
	* ld-i386/call3f.d: Likewise.
	* ld-i386/call3g.d: Likewise.
	* ld-i386/call3h.d: Likewise.
	* ld-i386/load1-nacl.d: Likewise.
	* ld-x86-64/call1.s: Likewise.
	* ld-x86-64/call1a.d: Likewise.
	* ld-x86-64/call1b.d: Likewise.
	* ld-x86-64/call1c.d: Likewise.
	* ld-x86-64/call1d.d: Likewise.
	* ld-x86-64/call1e.d: Likewise.
	* ld-x86-64/call1f.d: Likewise.
	* ld-x86-64/call1g.d: Likewise.
	* ld-x86-64/call1h.d: Likewise.
	* ld-x86-64/call1i.d: Likewise.
	* ld-x86-64/load1a-nacl.d: Likewise.
	* ld-x86-64/load1b-nacl.d: Likewise.
	* ld-x86-64/load1c-nacl.d: Likewise.
	* ld-x86-64/load1d-nacl.d: Likewise.
2015-10-22 04:56:39 -07:00
H.J. Lu 56ceb5b540 Add R_X86_64_[REX_]GOTPCRELX support to gas and ld
This patch adds support for the R_X86_64_GOTPCRELX and
R_X86_64_REX_GOTPCRELX relocations proposed in

https://groups.google.com/forum/#!topic/x86-64-abi/n9AWHogmVY0

to gas and ld.  It updates gas to generate R_X86_64_GOTPCRELX,
R_X86_64_REX_GOTPCRELX if there is a REX prefix, relocation for memory
operand, foo@GOTPCREL(%rip).  With the locally defined symbol, foo, we
convert

  mov foo@GOTPCREL(%rip), %reg

to

   lea foo(%rip), %reg

and convert

   call/jmp *foo@GOTPCREL(%rip)
to

   nop call foo/jmp foo nop

When PIC is false, convert

   test %reg, foo@GOTPCREL(%rip)
to

test $foo, %reg

and convert

   binop foo@GOTPCREL(%rip), %reg

to

   binop $foo, %reg

where binop is one of adc, add, and, cmp, or, sbb, sub, xor instructions.

bfd/

	* elf64-x86-64.c: Include opcode/i386.h.
	(x86_64_elf_howto_table): Add R_X86_64_GOTPCRELX and
	R_X86_64_REX_GOTPCRELX.
	(R_X86_64_standard): Replace R_X86_64_PLT32_BND with
	R_X86_64_REX_GOTPCRELX.
	(x86_64_reloc_map): Add BFD_RELOC_X86_64_GOTPCRELX and
	BFD_RELOC_X86_64_REX_GOTPCRELX.
	(need_convert_mov_to_lea): Renamed to ...
	(need_convert_load): This.
	(elf_x86_64_check_relocs): Handle R_X86_64_GOTPCRELX and
	R_X86_64_REX_GOTPCRELX.  Replace need_convert_mov_to_lea with
	need_convert_load.
	(elf_x86_64_gc_sweep_hook): Handle R_X86_64_GOTPCRELX and
	R_X86_64_REX_GOTPCRELX.
	(elf_x86_64_size_dynamic_sections): Likewise.
	(elf_x86_64_relocate_section): Likewise.
	(elf_x86_64_convert_mov_to_lea): Renamed to ...
	(elf_x86_64_convert_load): This.  Replace need_convert_mov_to_lea
	with need_convert_load.  Support R_X86_64_GOTPCRELX and
	R_X86_64_REX_GOTPCRELX transformations.
	* reloc.c (BFD_RELOC_X86_64_GOTPCRELX): New.
	(BFD_RELOC_X86_64_REX_GOTPCRELX): Likewise.
	* bfd-in2.h: Regenerated.
	* libbfd.h: Likewise.

gas/

	* config/tc-i386.c (tc_i386_fix_adjustable): Handle
	BFD_RELOC_X86_64_GOTPCRELX and BFD_RELOC_X86_64_REX_GOTPCRELX.
	(tc_gen_reloc): Likewise.
	(i386_validate_fix): Generate BFD_RELOC_X86_64_GOTPCRELX or
	BFD_RELOC_X86_64_REX_GOTPCRELX if fx_tcbit2 is set.
	* config/tc-i386.h (TC_FORCE_RELOCATION_LOCAL): Also return
	true for BFD_RELOC_X86_64_GOTPCRELX and
	BFD_RELOC_X86_64_REX_GOTPCRELX.

gas/testsuite/

	* gas/i386/i386.exp: Run x86-64-gotpcrel.
	* gas/i386/x86-64-gotpcrel.d: New file.
	* gas/i386/x86-64-gotpcrel.s: Likewise.
	* gas/i386/ilp32/x86-64-gotpcrel.d: Likewise.
	* gas/i386/x86-64-localpic.d: Replace R_X86_64_GOTPCREL with
	R_X86_64_REX_GOTPCRELX.
	* gas/i386/ilp32/x86-64-localpic.d: Likewise.

include/elf/

	* x86-64.h (R_X86_64_GOTPCRELX): New.
	(R_X86_64_REX_GOTPCRELX): Likewise.

ld/testsuite/

	* ld-ifunc/ifunc-5r-local-x86-64.d: Replace R_X86_64_GOTPCREL
	with R_X86_64_REX_GOTPCRELX.
	* ld-x86-64/plt-main1.rd: Likewise.
	* ld-x86-64/plt-main3.rd: Likewise.
	* ld-x86-64/plt-main4.rd: Likewise.
	* ld-x86-64/gotpcrel1.dd: New file.
	* ld-x86-64/gotpcrel1.out: Likewise.
	* ld-x86-64/gotpcrel1a.S: Likewise.
	* ld-x86-64/gotpcrel1b.c: Likewise.
	* ld-x86-64/gotpcrel1c.c: Likewise.
	* ld-x86-64/gotpcrel1d.S: Likewise.
	* ld-x86-64/load1.s: Likewise.
	* ld-x86-64/load1a.d: Likewise.
	* ld-x86-64/load1b.d: Likewise.
	* ld-x86-64/load1c.d: Likewise.
	* ld-x86-64/load1d.d: Likewise.
	* ld-x86-64/x86-64.exp: Run load1a, load1b, load1c and load1d
	tests.  Run gotpcrel1 test.
2015-10-22 04:49:38 -07:00
H.J. Lu 02a866936d Add R_386_GOT32X support to gas and ld
This patch adds support for the R_386_GOT32X relocation proposed in

https://groups.google.com/forum/#!topic/ia32-abi/GbJJskkid4I

to gas and ld.  It updates gas to generate R_386_GOT32X relocation for
memory operand, foo@GOT[(%reg)].  We must encode "mov foo@GOT, %eax"
with the 0x8b opcode, instead of the 0xb8 opcode, so that it can be
transformed to "lea foo, %eax".  With the locally defined symbol, foo,
we convert

   mov foo@GOT[(%reg1)], %reg2
to
   lea foo[@GOTOFF(%reg1)], %reg2

and convert

   call/jmp *foo@GOT[(%reg)]
to

   nop call foo/jmp foo nop

When PIC is false, convert

   test %reg1, foo@GOT[(%reg2)]
to
   test $foo, %reg1

and convert

binop foo@GOT[(%reg1)], %reg2

to

binop $foo, %reg2

where binop is one of adc, add, and, cmp, or, sbb, sub, xor instructions.

bfd/

	* elf32-i386.c: Include opcode/i386.h.
	(elf_howto_table): Add R_386_GOT32X.
	(R_386_ext2): Replace R_386_IRELATIVE with R_386_GOT32X.
	(elf_i386_reloc_type_lookup): Handle BFD_RELOC_386_GOT32X.
	(need_convert_mov_to_lea): Renamed to ...
	(need_convert_load): This.
	(elf_i386_check_relocs): Handle R_386_GOT32X.  Replace
	need_convert_mov_to_lea with need_convert_load.
	(elf_i386_gc_sweep_hook): Handle R_386_GOT32X.
	(elf_i386_size_dynamic_sections): Likewise.
	(elf_i386_relocate_section): Likewise.
	(elf_i386_convert_mov_to_lea): Renamed to ...
	(elf_i386_convert_load): This.  Replace need_convert_mov_to_lea
	with need_convert_load.  Support R_386_GOT32X transformations.
	* reloc.c (BFD_RELOC_386_GOT32X): New.
	* bfd-in2.h: Regenerated.
	* libbfd.h: Likewise.

gas/

	* config/tc-i386.c (tc_i386_fix_adjustable): Handle
	BFD_RELOC_386_GOT32X.
	(tc_gen_reloc): Likewise.
	(match_template): Force 0x8b encoding for "mov foo@GOT, %eax".
	(output_disp): Check for "call/jmp *mem", "mov mem, %reg",
	"test %reg, mem" and "binop mem, %reg" where binop is one of
	adc, add, and, cmp, or, sbb, sub, xor instructions.  Set
	fx_tcbit if the REX prefix is generated.  Set fx_tcbit2 if
	BFD_RELOC_386_GOT32X should be generated.
	(i386_validate_fix): Generate BFD_RELOC_386_GOT32X if fx_tcbit2
	is set.

gas/testsuite/

	* gas/i386/got.d: New file.
	* gas/i386/got.s: Likewise.
	* gas/i386/i386.exp: Run got.
	* gas/i386/localpic.d: Replace R_386_GOT32 with R_386_GOT32X.
	* gas/i386/mixed-mode-reloc32.d: Likewise.
	* gas/i386/reloc32.d: Likewise.

include/elf/

	* i386.h (R_386_GOT32X): New relocation.

ld/testsuite/

	* ld-i386/branch1.d: New file.
	* ld-i386/branch1.s: Likewise.
	* ld-i386/call1.d: Likewise.
	* ld-i386/call1.s: Likewise.
	* ld-i386/call2.d: Likewise.
	* ld-i386/call2.s: Likewise.
	* ld-i386/got1.dd: Likewise.
	* ld-i386/got1.out: Likewise.
	* ld-i386/got1a.S: Likewise.
	* ld-i386/got1b.c: Likewise.
	* ld-i386/got1c.c: Likewise.
	* ld-i386/got1d.S: Likewise.
	* ld-i386/jmp1.d: Likewise.
	* ld-i386/jmp1.s: Likewise.
	* ld-i386/jmp2.d: Likewise.
	* ld-i386/jmp2.s: Likewise.
	* ld-i386/load1.d: Likewise.
	* ld-i386/load1.s: Likewise.
	* ld-i386/load2.d: Likewise.
	* ld-i386/load2.s: Likewise.
	* ld-i386/load3.d: Likewise.
	* ld-i386/load3.s: Likewise.
	* ld-i386/load4.s: Likewise.
	* ld-i386/load4a.d: Likewise.
	* ld-i386/load4b.d: Likewise.
	* ld-i386/load5.s: Likewise.
	* ld-i386/load5a.d: Likewise.
	* ld-i386/load5b.d: Likewise.
	* ld-i386/load6.d: Likewise.
	* ld-i386/load6.s: Likewise.
	* ld-i386/i386.exp: Run branch1, call1, call2, jmp1, jmp2,
	load1, load2, load3, load4a, load4b, load5a, load5b and load6
	tests.  Run got1 test.
2015-10-22 04:47:07 -07:00
Andreas Krebbel 99ba512554 S/390: ifunc: Redirect local function calls to the IPLT.
bfd/ChangeLog:

	* elf32-s390.c (elf_s390_check_relocs): Set the non_got_ref marker
	only when linking an executable.
	(elf_s390_relocate_section): Redirect PC-relative relocs to a IPLT
	slot.
	* elf64-s390.c (elf_s390_check_relocs): Set the non_got_ref marker
	only when linking an executable.
	(elf_s390_relocate_section): Redirect PC-relative relocs to a IPLT
	slot.
2015-10-22 10:14:15 +02:00
Andreas Krebbel d8ee9e44cc S/390: ifunc: Fix function pointers to hidden ifunc symbols.
bfd/ChangeLog:
	* elf32-s390.c (elf_s390_adjust_dynamic_symbol): Set the PLT
	reference counters for local IFUNC calls.
	* elf64-s390.c (elf_s390_adjust_dynamic_symbol): Likewise.
2015-10-22 10:13:22 +02:00
Andreas Krebbel 01a5358479 S/390: ifunc: Handle GOTOFF relocs on ifunc symbols.
Normally a GOTOFF reloc only uses the GOT pointer to address something
relativ to it without actually requiring a GOT or PLT slot.  Things
change if the target is an ifunc symbol though.

bfd/ChangeLog:

	* elf32-s390.c (elf_s390_check_relocs): Fallthrough to the PLT
	slot allocating code for GOTOFF relocs on ifunc symbols.
	(elf_s390_gc_sweep_hook): Decrement plt refcount for GOTOFF relocs
	on ifunc symbols.
	(elf_s390_relocate_section): Redirect a GOTOFF reloc to an iplt
	slot.
2015-10-22 10:11:57 +02:00
Andreas Krebbel 0f042c67a0 S/390: ifunc: Fix PR18841.
In order to get the ifunc relocs properly sorted the correct class
needs to be returned.  The code mimics what has been done for x86.

bfd/ChangeLog:

	PR ld/18841
	* elf32-s390.c (elf_s390_reloc_type_class): Return
	reloc_class_ifunc for ifunc symbols.
	* elf64-s390.c (elf_s390_reloc_type_class): Likewise.
2015-10-22 10:11:07 +02:00
Andreas Krebbel 0a511368e2 S/390: ifunc: Fix for undefined ifunc symbols.
bfd/ChangeLog:

	* elf32-s390.c (elf_s390_finish_dynamic_symbol): Call
	elf_s390_finish_ifunc_symbol only for actually defined symbols.
	* elf64-s390.c (elf_s390_finish_dynamic_symbol): Likewise.
2015-10-22 10:02:38 +02:00
Andreas Krebbel 61643fbadb S/390: Get rid of superfluous parameter to s390_elf_allocate_ifunc_dyn_relocs.
bfd/ChangeLog:
	* elf-s390-common.c (s390_elf_allocate_ifunc_dyn_relocs): Remove
	`head' parameter.
	* elf32-s390.c (allocate_dynrelocs): Don't use last parameter.
	* elf64-s390.c (allocate_dynrelocs): Don't use last parameter.
2015-10-22 09:59:40 +02:00
Hans-Peter Nilsson f9c62303d8 Correct printed value of Main in mmo.c consistency error message. 2015-10-20 06:56:33 +02:00
Doug Evans 434d28e01b targets.c (bfd_flavour_name): "MMO" is spelled "mmo".
bfd/ChangeLog:

	* targets.c (bfd_flavour_name): "MMO" is spelled "mmo".
2015-10-18 13:13:07 -07:00
Alan Modra 9f08fa5c12 Correct powerpc64le __glink_PLTresolve .eh_frame FDE
* elf64-ppc.c (ppc64_elf_size_stubs): Correct __glink_PLTresolve
	eh_frame FDE for ELFv1.
2015-10-17 20:17:58 +10:30
H.J. Lu 75a06c790f Check if symbol is defined when converting mov to lea
We need to check if symbol is defined when converting mov to lea since
SYMBOL_REFERENCES_LOCAL may return true on hidden undefined symbols.

	* elf32-i386.c (elf_i386_convert_mov_to_lea): Check if symbol
	is defined.
	* elf64-x86-64.c (elf_x86_64_convert_mov_to_lea): Likewise.
2015-10-16 04:21:03 -07:00
H.J. Lu b31bcacc48 Convert mov to lea for loading address of local common symbol
There is no need to check def_regular when converting mov to lea for
loading address of local symbols since def_regular may be false for
common symbols and SYMBOL_REFERENCES_LOCAL is sufficient.

bfd/

	* elf32-i386.c (elf_i386_convert_mov_to_lea): Don't check
	def_regular.
	* elf64-x86-64.c (elf_x86_64_convert_mov_to_lea): Likewise.

ld/testsuite/

	* ld-i386/lea1.s: Add a test for loading address of local common
	symbol.
	* ld-x86-64/lea1.s: Likewise.
	* ld-i386/lea1a.d: Updated.
	* ld-i386/lea1b.d: Likewise.
	* ld-i386/lea1c.d: Likewise.
	* ld-x86-64/lea1a.d: Likewise.
	* ld-x86-64/lea1b.d: Likewise.
	* ld-x86-64/lea1c.d: Likewise.
	* ld-x86-64/lea1d.d: Likewise.
	* ld-x86-64/lea1e.d: Likewise.
	* ld-x86-64/lea1f.d: Likewise.
2015-10-16 03:14:40 -07:00
H.J. Lu ae7683d238 Fix typos in comments in _bfd_elf_merge_symbol
* elflink.c (_bfd_elf_merge_symbol): Fix typos in comments
2015-10-15 11:01:39 -07:00
Alan Modra e43fb83166 objcopy --extract-symbol
Calling bfd_copy_private_bfd_data is necessary to copy ELF file header
info.

binutils/
	* objcopy.c (copy_object): Don't omit bfd_copy_private_bfd_data
	call when extract_symbol.
bfd/
	* elf32-v850.c (v850_elf_copy_private_bfd_data): Remove assertion
	that input and output .note.renesas sections are same size.
	Instead, only copy input to output if they are.
2015-10-15 23:38:29 +10:30
Riku Voipio b32a5c16f1 Use the file_ptr type when calling bfd_seek.
PR ld/19123
	* elfcore.h (elf_core_file_p): Use the file_ptr type to hold the
	offset for bfd_seek.
	* elfcode.h (elf_object_p): Likewise.
2015-10-15 12:56:55 +01:00
Rich Felker b4b0e149fa bfd: [SH] Emit DT_PLTGOT for FDPIC output unconditionally
PR ld/19091
* elf32-sh.c (sh_elf_size_dynamic_sections): Always emit DT_PLTGOT for FDPIC output.
2015-10-15 07:14:43 +09:00
Alan Modra 341b8ee719 Tidy code setting PT_GNU_RELRO p_flags
No functional changes here.

	* elf.c (_bfd_elf_map_sections_to_segments): Don't set
	PT_GNU_RELRO p_flags.
	(assign_file_positions_for_non_load_sections): Set PT_GNU_RELRO
	flags to PF_R here.
2015-10-13 16:23:13 +10:30
H.J. Lu 4373f8af3d Skip the unversioned definition after the default version
We may see an unversioned definition after the default version.  We
should skip the unversioned definition in this case.

bfd/

	PR ld/19073
	* elflink.c (_bfd_elf_add_default_symbol): Skip the unversioned
	definition after the default version.

ld/testsuite/

	PR ld/19073
	* ld-elf/pr19073.map: New file.
	* ld-elf/pr19073.rd: Likewise.
	* ld-elf/pr19073.s: Likewise.
	* ld-elf/shared.exp (build_tests): Add tests for PR ld/19073.
2015-10-12 04:57:16 -07:00
Andreas Krebbel ef05be83b7 PR19083 S/390: Fix garbage collection of some GOT relocs.
bfd/ChangeLog:

2015-10-12  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

	PR ld/19083
	* elf32-s390.c (elf_s390_gc_sweep_hook): Do not reduce got
	refcount for relocs not really requiring a got slot.
	* elf64-s390.c (elf_s390_gc_sweep_hook): Likewise.
2015-10-12 10:22:49 +02:00
John David Anglin da6e19a926 Ignore references with relocs to discarded sections in .data.rel.ro.local on hppa-linux. 2015-10-11 19:08:54 -04:00
Nick Clifton 886a250647 New ARC implementation.
bfd	* archures.c: Remove support for older ARC. Added support for new
	ARC cpus (ARC600, ARC601, ARC700, ARCV2).
	* bfd-in2.h: Likewise.
	* config.bfd: Likewise.
	* cpu-arc.c: Likewise.
	* elf32-arc.c: Totally changed file with a refactored
	inplementation of the ARC port.
	* libbfd.h: Added ARC specific relocation types.
	* reloc.c: Likewise.

gas     * config/tc-arc.c: Revamped file for ARC support.
        * config/tc-arc.h: Likewise.
        * doc/as.texinfo: Add new ARC options.
        * doc/c-arc.texi: Likewise.

ld	* configure.tgt: Added target arc-*-elf* and arc*-*-linux-uclibc*.
	* emulparams/arcebelf_prof.sh: New file
	* emulparams/arcebelf.sh: Likewise.
	* emulparams/arceblinux_prof.sh: Likewise.
	* emulparams/arceblinux.sh: Likewise.
	* emulparams/arcelf_prof.sh: Likewise.
	* emulparams/arcelf.sh: Likewise.
	* emulparams/arclinux_prof.sh: Likewise.
	* emulparams/arclinux.sh: Likewise.
	* emulparams/arcv2elfx.sh: Likewise.
	* emulparams/arcv2elf.sh: Likewise.
	* emultempl/arclinux.em: Likewise.
	* scripttempl/arclinux.sc: Likewise.
	* scripttempl/elfarc.sc: Likewise.
	* scripttempl/elfarcv2.sc: Likewise
	* Makefile.am: Add new ARC emulations.
	* Makefile.in: Regenerate.
	* NEWS: Mention the new feature.

opcodes * arc-dis.c: Revamped file for ARC support
	* arc-dis.h: Likewise.
	* arc-ext.c: Likewise.
	* arc-ext.h: Likewise.
	* arc-opc.c: Likewise.
	* arc-fxi.h: New file.
	* arc-regs.h: Likewise.
	* arc-tbl.h: Likewise.

binutils * readelf.c (get_machine_name): Remove A5 reference. Add ARCompact
	and ARCv2.
	(get_machine_flags): Handle EM_ARCV2 and EM_ARCOMPACT.
	(guess_is_rela): Likewise.
	(dump_relocations): Likewise.
	(is_32bit_abs_reloc): Likewise.
	(is_16bit_abs_reloc): Likewise.
	(is_none_reloc): Likewise.
	* NEWS: Mention the new feature.

include	* dis-asm.h (arc_get_disassembler): Correct declaration.
	* arc-reloc.def: Macro file with definition of all relocation
	types.
	* arc.h: Changed macros for the newly supported ARC cpus.  Altered
	enum defining the supported relocations.
	* common.h: Changed EM_ARC_A5 definition to EM_ARC_COMPACT. Added
	macro for EM_ARC_COMPACT2.
        * arc-func.h: New file.
        * arc.h: Likewise.
2015-10-07 14:20:19 +01:00
H.J. Lu 8c6da3dfbc Clear the ch_reserved field in 64-bit output
It is better to clear the ch_reserved field of Elf64_External_Chdr
in 64-bit output.

	* bfd.c (bfd_update_compression_header): Clear the ch_reserved
	field in 64-bit output.
	(bfd_convert_section_contents): Likewise.
2015-10-06 14:34:17 -07:00
H.J. Lu a0d49154d4 Don't re-export common symbols
For ELF linker, a common symbol isn't a definition.  When we decide if a
symbol should be re-exported, we should check if the symbol isn't
undefined, not if it is a definition.

bfd/

	PR ld/18914
	* elflink.c (elf_link_add_object_symbols): Don't re-export a
	symbol if it isn't undefined.

ld/testsuite/

	PR ld/18914
	* ld-elf/exclude.exp: Also check exclude_common.
	* ld-elf/exclude2.s: Add exclude_common.
2015-10-05 14:45:17 -07:00
H.J. Lu d00c2bc9c0 Enable IAMCU and PEI for Solaris2/x86
bfd/

	* config.bfd (targ_selvecs, targ64_selvecs): Add iamcu_elf32_vec,
	i386_pei_vec and x86_64_pei_vec for Solaris2/x86.

ld/

	* configure.tgt (targ_extra_emuls): Add elf_iamcu for Solaris2/x86.
2015-10-04 07:42:43 -07:00
Renlin Li 3ebe65c0ff [LD][AARCH64]Add TLSIE relaxation support under large memory model.
bfd/
2015-10-02  Renlin Li <renlin.li@arm.com>

	* elfnn-aarch64.c (IS_AARCH64_TLS_RELAX_RELOC): Add
	TLSIE_MOVW_GOTTPREL_G1.
	(aarch64_tls_transition_without_check): Add
	TLSIE_MOVW_GOTTPREL_G1 to TLSLE_MOVW_TPREL_G2
	transition for local symbol.
	(elfNN_aarch64_tls_relax): Add a argument to pass tp offset.
	Add TLSIE_MOVW_GOTTPREL_G1 relaxation.
	(elfNN_aarch64_relocate_section): Call elfNN_aarch64_tls_relax
	with new argument.

ld/testsuite/
2015-10-02  Renlin Li <renlin.li@arm.com>

	* ld-aarch64/aarch64-elf.exp (tls-relax-large-le-ie): Run new test.
	* ld-aarch64/tls-relax-large-ie-le.d: New.
	* ld-aarch64/tls-relax-large-ie-le.s: New.
2015-10-02 17:56:09 +01:00
Renlin Li 0484b4549e [LD][AARCH64]Add TLSDESC support for large memory model.
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* elfnn-aarch64.c (aarch64_tls_transition_without_check):  Add
	relax transitions for TLSDESC_ADD, TLSDESC_LDR, TLSDESC_OFF_G0_NC,
	TLSDESC_OFF_G1.
	(aarch64_tls_transition_without_check): Add relaxation support.
	(aarch64_reloc_got_type): Add support.
	(elfNN_aarch64_final_link_relocate): Likewise.
	(elfNN_aarch64_tls_relax): Likewise.
	(elfNN_aarch64_relocate_section): Likewise.
	(elfNN_aarch64_gc_sweep_hook): Likewise.
	(elfNN_aarch64_check_relocs): Likewise.
	* elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
	(_bfd_aarch64_elf_resolve_relocation): Likewise.

ld/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* ld-aarch64/aarch64-elf.exp: Run new test.
	* ld-aarch64/tls-large-desc.d: New.
	* ld-aarch64/tls-large-desc.s: New.
	* ld-aarch64/tls-relax-large-desc-ie.d: New.
	* ld-aarch64/tls-relax-large-desc-ie.s: New.
	* ld-aarch64/tls-relax-large-desc-le.d: New.
	* ld-aarch64/tls-relax-large-desc-le.s: New.
2015-10-02 17:56:09 +01:00
Renlin Li 43a357f99f [GAS][AARCH64]Add TLSDESC large memory model support.
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* elfnn-aarch64.c (elfNN_aarch64_howto_table): Check overflow for
	BFD_RELOC_AARCH64_TLSDESC_OFF_G1.

gas/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* config/tc-aarch64.c (s_tlsdescadd): New.
	(s_tlsdescldr): New.
	(md_pseudo_table): Handle tlsdescadd and tlsdescldr pseudo ops.
	(reloc_table): Add entries for BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC and
	BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC.
	(process_movw_reloc_info): Support AARCH64_TLSDESC_OFF_G1 and
	    AARCH64_TLSDESC_OFF_G0_NC.
	(md_apply_fix): Likewise.
	(aarch64_force_relocation): Likewise.

gas/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* gas/aarch64/reloc-tlsdesc_off_g0_nc.d: New.
	* gas/aarch64/reloc-tlsdesc_off_g0_nc.s: New.
	* gas/aarch64/reloc-tlsdesc_off_g1.d: New.
	* gas/aarch64/reloc-tlsdesc_off_g1.s: New.
	* gas/aarch64/tls-desc.d: New.
	* gas/aarch64/tls-desc.s: New.
2015-10-02 17:56:09 +01:00
Renlin Li ac73473248 [BFD][AARCH64]Add TLSGD relaxation support under large memory model.
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* elfnn-aarch64.c(IS_AARCH64_TLS_RELAX_RELOC):
	Add relaxation support for TLSGD_MOVW_G0_NC and TLSGD_MOVW_G1.
	(aarch64_tls_transition_without_check): Likewise
	(elfNN_aarch64_tls_relax): Likwise.

ld/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* ld-aarch64/aarch64-elf.exp: run new test
	* ld-aarch64/tls-relax-large-gd-ie.d: New.
	* ld-aarch64/tls-relax-large-gd-ie.s: New.
	* ld-aarch64/tls-relax-large-gd-le.d: New.
	* ld-aarch64/tls-relax-large-gd-le.s: New.
2015-10-02 17:56:09 +01:00
Renlin Li b7a944fea3 [BFD][AARCH64]Create GOT section for TLSLE_MOVW_TPREL_G(1, 1_NC, 2).
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* elfnn-aarch64.c (elfNN_aarch64_check_relocs): Create GOT section
	for TLSLE_MOVW_TPREL_G(1, 1_NC, 2) relocation.
2015-10-02 17:56:09 +01:00
Renlin Li 3b957e5b07 [Binutils][AARCH64]Add TLS IE large memory support.
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* reloc.c: Make AARCH64_TLSIE_MOVW_GOTTPREL_G1 and
	AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC defined in alphabetical order.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Likewise.
	* elfnn-aarch64.c (elfNN_aarch64_howto_table): Make
	TLSIE_MOVW_GOTTPREL_G1 check overflow.
	(aarch64_reloc_got_type): Add support for TLSIE_MOVW_GOTTPREL_G1
	and TLSIE_MOVW_GOTTPREL_G0_NC.
	(elfNN_aarch64_final_link_relocate): Likewise.
	(elfNN_aarch64_relocate_section): Likewise.
	(elfNN_aarch64_gc_sweep_hook): Likewise.
	(elfNN_aarch64_check_relocs): Likewise.
	* elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
	(_bfd_aarch64_elf_resolve_relocation): Likewise.

gas/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* config/tc-aarch64.c (reloc_table): Add two entries for
	gottprel_g0_nc and gottprel_g1.
	(process_movw_reloc_info): Add support.
	(md_apply_fix): Likewise.
	(aarch64_force_relocation): Likewise.

gas/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* gas/aarch64/reloc-gottprel_g0_nc.d: New.
	* gas/aarch64/reloc-gottprel_g0_nc.s: New.
	* gas/aarch64/reloc-gottprel_g1.d: New.
	* gas/aarch64/reloc-gottprel_g1.s: New.

ld/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* ld-aarch64/tls-large-ie.d: New.
	* ld-aarch64/tls-large-ie.s: New.
	* ld-aarch64/aarch64-elf.exp: Run new test.
2015-10-02 17:56:08 +01:00
Renlin Li 7ba7cfe431 [LD][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC support.
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* elfnn-aarch64.c (aarch64_reloc_got_type): Add
	BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC support.
	(elfNN_aarch64_final_link_relocate): Likewise.
	(elfNN_aarch64_relocate_section): Likewise.
	(elfNN_aarch64_gc_sweep_hook): Likewise.
	(elfNN_aarch64_check_relocs): Likewise.
	* elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
	(_bfd_aarch64_elf_resolve_relocation): Likewise.

ld/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* ld-aarch64/emit-relocs-516.d: New.
	* ld-aarch64/emit-relocs-516.s: New.
	* ld-aarch64/aarch64-elf.exp: Run new test.
2015-10-02 17:56:08 +01:00
Renlin Li 3e8286c0d2 [GAS][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC support.
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* reloc.c (BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC): New entry.
	* elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
	BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Likewise

gas/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* config/tc-aarch64.c (reloc_table): New relocation modifier tlsgd_g0_nc.
	(process_movw_reloc_info): Support BFD_RELOC_AARCH64_TLSGD_MOVW_G1.
	(md_apply_fix): Likewise.
	(aarch64_force_relocation): Likewise.

gas/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* gas/aarch64/reloc-tlsgd_g0_nc.d: New.
	* gas/aarch64/reloc-tlsgd_g0_nc.s: New.
2015-10-02 17:56:08 +01:00
Renlin Li 94facae337 [LD][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G1 support.
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* elfnn-aarch64.c (aarch64_reloc_got_type): Add
	BFD_RELOC_AARCH64_TLSGD_MOVW_G1 support.
	(elfNN_aarch64_final_link_relocate): Likewise.
	(elfNN_aarch64_relocate_section): Likewise.
	(elfNN_aarch64_gc_sweep_hook): Likewise.
	(elfNN_aarch64_check_relocs): Likewise.
	* elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
	(_bfd_aarch64_elf_resolve_relocation): Likewise.

ld/testsuite

2015-10-02  Renlin Li <renlin.li@arm.com>

	* ld-aarch64/emit-relocs-515.d: New.
	* ld-aarch64/emit-relocs-515.s: New.
	* ld-aarch64/aarch64-elf.exp: Run new test.
2015-10-02 17:56:08 +01:00
Renlin Li 1aa66fb152 [GAS][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G1 support.
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* reloc.c (BFD_RELOC_AARCH64_TLSGD_MOVW_G1): New entry.
	* elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
	BFD_RELOC_AARCH64_TLSGD_MOVW_G1.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Likewise.

gas/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* config/tc-aarch64.c (reloc_table): New relocation modifier tlsgd_g1.
	(process_movw_reloc_info): Support BFD_RELOC_AARCH64_TLSGD_MOVW_G1.
	(md_apply_fix): Likewise.
	(aarch64_force_relocation): Likewise.

gas/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* gas/aarch64/reloc-tlsgd_g1.s: New.
	* gas/aarch64/reloc-tlsgd_g1.s: New.
2015-10-02 17:56:08 +01:00
Renlin Li dc8008f508 [LD][AARCH64]Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC Support.
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* elfnn-aarch64.c (aarch64_reloc_got_type): Add
	BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC support.
	(elfNN_aarch64_final_link_relocate): Likewise.
	(elfNN_aarch64_gc_sweep_hook): Likewise.
	(elfNN_aarch64_check_relocs): Likewise.
	* elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
	(_bfd_aarch64_elf_resolve_relocation): Likewise.

ld/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* ld-aarch64/aarch64-elf.exp: Run new test.
	* ld-aarch64/emit-relocs-301.d: New.
	* ld-aarch64/emit-relocs-301.s: New.
2015-10-02 17:56:07 +01:00
Renlin Li ca632371ce [GAS][AARCH64]Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC Support.
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* reloc.c (BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC): New.
	* elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry
	MOVW_GOTOFF_G0_NC.
	* libbfd.h: Regnerate.
	* bfd-in2.h: Regenerate.

gas/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* config/tc-aarch64.c (reloc_table): New relocation modifier
	gotoff_g0_nc.
	(process_movw_reloc_info): Support gotoff_g0_nc.
	(md_apply_fix): Likewise.

gas/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* gas/aarch64/reloc-gotoff_g0_nc.s: New.
	* gas/aarch64/reloc-gotoff_g0_nc.d: New.
2015-10-02 17:56:07 +01:00
Renlin Li 74a1bfe1d6 [LD][AARCH64]Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G1 Support.
bfd/

2015-10-02  Renlin Li  <renlin.li@arm.com>

	* elfnn-aarch64.c (aarch64_reloc_got_type): Add support
	for BFD_RELOC_AARCH64_MOVW_GOTOFF_G1.
	(elfNN_aarch64_gc_sweep_hook): Likewise.
	(elfNN_aarch64_check_relocs): Likewise
	* elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
	(_bfd_aarch64_elf_resolve_relocation): Likewise
	(elfNN_aarch64_final_link_relocate): Calculate offset within GOT.

ld/testsuite/

2015-10-02  Renlin Li  <renlin.li@arm.com>

	* ld-aarch64/emit-relocs-302.d: New.
	* ld-aarch64/emit-relocs-302.s: New.
	* ld-aarch64/aarch64-elf.exp: Run the new test.
2015-10-02 17:56:07 +01:00
Renlin Li 654248e7f7 [GAS][AARCH64]Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G1 Support.
bfd/

2015-10-02  Renlin Li  <renlin.li@arm.com>

	* reloc.c (BFD_RELOC_AARCH64_MOVW_GOTOFF_G1): New.
	* elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
	MOVW_GOTOFF_G1.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Regenerate.

gas/

2015-10-02  Renlin Li  <renlin.li@arm.com>

	* config/tc-aarch64.c (reloc_table): New relocation modifier
	gotoff_g1.
	(process_movw_reloc_info): Support newly added modifier.
	(md_apply_fix): Likewise.

gas/testsuite/

2015-10-02  Renlin Li  <renlin.li@arm.com>

	* gas/aarch64/reloc-gotoff_g1.s: New.
	* gas/aarch64/reloc-gotoff_g1.d: New.
2015-10-02 17:56:07 +01:00
Renlin Li a2e1db00c7 [LD][AARCH64]Add BFD_RELOC_AARCH64_LD64_GOTOFF_LO15 Support.
bfd/

2015-10-02  Renlin Li  <renlin.li@arm.com>

	* elfnn-aarch64.c (aarch64_reloc_got_type): Add
	BFD_RELOC_AARCH64_LD_64_GOTOFF_LO15 support.
	(elfNN_aarch64_gc_sweep_hook): Likewise.
	(elfNN_aarch64_check_relocs): Likewise
	* elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
	(_bfd_aarch64_elf_resolve_relocation): Likewise
	(elfNN_aarch64_final_link_relocate): Calculate offset within GOT.

ld/testsuite/

2015-10-02  Renlin Li  <renlin.li@arm.com>

	* ld-aarch64/emit-relocs-310.d: New.
	* ld-aarch64/emit-relocs-310.s: New.
	* ld-aarch64/aarch64-elf.exp: Run the test.
2015-10-02 17:56:07 +01:00
Renlin Li a0becb8948 [BFD][AARCH64]Refactor to facilitate further large memory model support patches.
bfd/

2015-10-02  Renlin Li  <renlin.li@arm.com>

	* elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Change if to
	switch statement.
2015-10-02 17:56:07 +01:00
H.J. Lu 5db4f0d383 Create a PLT entry for R_X86_64_PC32 in non-code sections
Since something like ".long foo - ." may be used as pointer, we make
sure that PLT is used if foo is a function defined in a shared library.

bfd/

	PR ld/19031
	* elf64-x86-64.c (elf_x86_64_check_relocs): Set
	pointer_equality_needed for R_X86_64_PC32 reloc in non-code
	sections.

ld/testsuite/

	PR ld/19031
	* ld-x86-64/x86-64.exp: Run PR ld/19031 test.
	* ld-x86-64/pr19031.out: New file.
	* ld-x86-64/pr19031a.c: Likewise.
	* ld-x86-64/pr19031b.S: Likewise.
	* ld-x86-64/pr19031c.c: Likewise.
2015-10-01 10:49:33 -07:00
Renlin Li 73524045d3 [BFD][AARCH64]Emit single AARCH64_MAP_INSN symbol for the whole plt.
bfd/

2015-10-01  Renlin Li  <renlin.li@arm.com>

	* elfnn-aarch64.c (elfNN_aarch64_output_plt_map): Remove.
	(elfNN_aarch64_output_arch_local_syms): Emit AARCH64_MAP_INSN once.

ld/testsuite/

2015-10-01  Renlin Li  <renlin.li@arm.com>

	* ld-aarch64/plt_mapping_symbol.d: New.
	* ld-aarch64/plt_mapping_symbol.s: New.
	* ld-aarch64/aarch64-elf.exp: Run the new test.
2015-10-01 14:27:56 +01:00
Kaz Kojima de48f481b1 bfd/config.bfd: Drop non-linux non-fdpic stuff from the last change of targ_selvecs of sh*-linux cases 2015-10-01 14:13:26 +09:00
Alan Modra 017e6bceee Revert "Also check e_machine when merging sections"
Commit 9865bd0d added a bogus check in _bfd_elf_merge_sections.

bfd/
	PR ld/19013
	* elflink.c (_bfd_elf_merge_sections): Revert last change.
ld/testsuite/
	* ld-x86-64/pr19013-x32.d: Update.
2015-10-01 07:41:28 +09:30
H.J. Lu 4b627c1844 Create a PLT entry for R_386_PC32 in non-code sections
Since something like ".long foo - ." may be used as pointer, we make
sure that PLT is used if foo is a function defined in a shared library.

bfd/

	PR ld/19031
	* elf32-i386.c (elf_i386_check_relocs): Set
	pointer_equality_needed for R_386_PC32 reloc in non-code
	sections.

ld/testsuite/

	PR ld/19031
	* ld-i386/i386.exp: Run PR ld/19031 test.
	* ld/testsuite/ld-i386/pr19031.out: New file.
	* ld/testsuite/ld-i386/pr19031a.c: Likewise.
	* ld/testsuite/ld-i386/pr19031b.S: Likewise.
	* ld/testsuite/ld-i386/pr19031c.c: Likewise.
2015-09-30 08:45:13 -07:00
H.J. Lu 9865bd0da6 Also check e_machine when merging sections
When we check consistency for merge ELF sections, we should not only
check EI_CLASS, but also compatible e_machine.

bfd/

	PR ld/19013
	* elflink.c (_bfd_elf_merge_sections): Only merge input bfds
	that have the compatible ELF machine code with the output bfd.

ld/testsuite/

	PR ld/19013
	* ld-x86-64/pr19013-nacl.d: New file.
	* ld-x86-64/pr19013-x32.d: Likewise.
	* ld-x86-64/pr19013.d: Likewise.
	* ld-x86-64/pr19013.s: Likewise.
	* ld-x86-64/x86-64.exp: Run PR ld/19013 tests.
2015-09-30 05:37:49 -07:00
Alan Modra 630993ec93 Consistency check for merge sections
We can't allow sections to be merged and sized by the ELF linker
backend and then later be output by the generic linker backend.  The
generic linker backend doesn't understand merge sections.

	PR ld/19013
	* elflink.c (_bfd_elf_merge_sections): Only merge input bfds that
	will be handled by elf_link_input_bfd.  Rename abfd param to obfd.
2015-09-30 16:06:09 +09:30
Rich Felker 6c4f2328ab Add fdpic and misc targets to config.bfd for sh*-*-linux* 2015-09-30 14:32:07 +09:00
H.J. Lu cbd44e247e Don't use the output section size to copy input section
We can't use the output section size to copy input section since
--interleave will shrink the output section.  Instead, we change
bfd_convert_section_contents to return the updated input section
size.  When we do that, we don't need to adjust the output section
size to skip gap fills.

bfd/

	PR binutils/19020
	* bfd.c (bfd_convert_section_contents): Add ptr_size parameter.
	* bfd-in2.h: Regenerated.

binutils/

	PR binutils/19020
	* objcopy.c (copy_object): Don't adjust the output section size
	when copying from input sections.
	(copy_section): Use input section size for the copy.  Get the
	updated section size from bfd_convert_section_contents.

binutils/testsuite/

	PR binutils/19020
	* binutils-all/objcopy.exp: Run pr19020a and pr19020b.
	* lib/utils-lib.exp (run_dump_test): Support binary input.
	* binutils-all/pr19020.in: New file.
	* binutils-all/pr19020a.d: Likewise.
	* binutils-all/pr19020b.d: Likewise.
2015-09-29 13:31:57 -07:00
Peter Zotov 8a9e7a9121 Correct the generation of OR1K pc-relative relocations.
gas	PR ld/18759
	* config/tc-or1k.c (tc_gen_reloc): Correct computation of PC
	relative relocs.
	* config/tc-or1k.h (GAS_CGEN_PRCEL_R_TYPE): Delete.

bfd	* elf32-or1k.c (R_OR1K_32_PCREL): Set pcrel_offset to TRUE.
	(R_OR1K_16_PCREL): Likewise.
	(R_OR1K_8_PCREL): Likewise.

ld/tests * ld-elf/eh-frame-hdr: Expect to pass on the or1k-linux target.
2015-09-25 15:21:14 +01:00
Nick Clifton b6518b3871 Fix compile time warnings generated when compiling with clang.
bfd	* bout.c (b_out_slurp_reloc_table): Cast constant to unsigned in
	order to avoid problems with left shifting negative values.
	(abs32code): Likewise.
	* mach-o.c (FILE_ALIGN): Likewise.
	* coff-rs6000.c (xcoff_debug_sections): Delete unused static
	array.
	* elf32-visium.c (visium_reloc_map): Likewise.
	* elf32-arm.c (elf32_arm_final_link_relocate): Remove useless
	calls to abs function.
	* elf32-frv.c (_frvfdpic_relax_tls_entries): Likewise.
	* elf32-score.c (score_elf_final_link_relocate): Likewise.
	* elf32-score7.c (score_elf_final_link_relocate): Likewise.
	* elf32-i860.c (i860_howto_pc26_reloc): Use multiplication instead
	of shifting to create a negative mask.
	* elf32-msp430.c (elf_backend_special_sections): Define.
	* elfxx-mips.c (got_ofst_reloc_p): Delete unused function.
	(got_hi16_reloc_p): Delete unused function.
	* ppcboot.c (ppcboot_bfd_print_private_bfd_data): Fix test of
	partition name.

gas	* config/tc-ppc.c (insn_validate): Cast PPC_OPSHIFT_INV to an int.

opcode	* ppc.h (PPC_OPSHIFT_INV): Use an unsigned constant when left
	shifting.

ld	* emultempl/elf32.em (ehdr_start_empty): New static variable.
	(before_allocation): Use it to initialise ehdr_start_save.
	* emultempl/pe.em (write_build_id): Remove useless double
	parenthesis.
	* emultempl/pep.em (write_build_id): Likewise.

opcodes	* bfin-dis.c (fmtconst): Remove unnecessary call to the abs
	function.
	* tic30-dis.c (print_branch): Likewise.
	* cgen-asm.c (cgen_parse_signed_integer): Cast integer to signed
	value before left shifting.
	* fr30-ibld.c (fr30_cgen_extract_operand): Likewise.
	* hppa-dis.c (print_insn_hppa): Likewise.
	* mips-dis.c (mips_cp0sel_names_mipsr5900): Delete unused static
	array.
	* msp430-dis.c (msp430_singleoperand): Likewise.
	(msp430_doubleoperand): Likewise.
	(print_insn_msp430): Likewise.
	* nds32-asm.c (parse_operand): Likewise.
	* sh-opc.h (MASK): Likewise.
	* v850-dis.c (get_operand_value): Likewise.
2015-09-23 18:05:16 +01:00
Nick Clifton 6a40cf0c5c Add support for files that contain multiple symbol index tables. Fixes PR 15835
binutils	PR binutils/15835
	* readelf.c (struct elf_section_list): New structure.
	(symtab_shndx_hdr): Replace with symtab_shndx_list.
	(get_32bit_elf_symbols): Scan for a symbol index table matching
	the symbol table in use.
	(get_64bit_elf_symbols): Likewise.
	(process_section_headers): Handle multiple symbol index sections.

bfd	* elf-bfd.h (struct elf_section_list): New structure.
	(struct elf_obj_tdata): Replace symtab_shndx_hdr with
	symtab_shndx_list.  Delete symtab_shndx_section.
	(elf_symtab_shndx): Replace macro with elf_symtab_shndx_list.
	* elf.c (bfd_elf_get_syms): If symtab index sections are present,
	scan them for the section that matches the provided symbol table.
	(bfd_section_from_shdr): Record all SHT_SYMTAB_SHNDX sections.
	(assign_section_numbers): Use the first symtab index table in the
	list.
	(_bfd_elf_compute_section_file_positions): Replace use of
	symtab_shndx_hdr with use of symtab_shndx_list.
	(find_section_in_list): New function.
	(assign_file_postions_except_relocs): Use new function.
	(_bfd_elf_copy_private_symbol_data): Likewise.
	(swap_out_syms): Handle multiple symbol table index sections.
	* elf32-m32c.c (m32c_elf_relax_section): Replace use of
	symtab_shndx_hdr with use of symtab_shndx_list.
	* elf32-rl78.c (rl78_elf_relax_section): Likewise.
	* elf32-rx.c (rx_relax_section): Likewise.
	* elf32-v850.c (v850_elf_relax_delete_bytes): Likewise.
	* elflink.c (bfd_elf_final_link): Likewise.
2015-09-23 17:23:58 +01:00
H.J. Lu c8b187ea07 Use bfd_get_32 and bfd_put_32 to access ch_type
The ch_type field in Elf64_External_Chdr is 4 bytes.  We should use
bfd_get_32 and bfd_put_32 to access it.

	* bfd.c (bfd_update_compression_header): Use bfd_put_32 on
	ch_type.
	(bfd_check_compression_header): Use bfd_get_32 on ch_type.
	(bfd_convert_section_contents): Use bfd_get_32 and bfd_put_32
	on ch_type.
2015-09-21 19:38:40 -07:00
Rich Felker 9b8b325a1f Add --no-dynamic-linker option to ld, for static PIE use
Inhibits output of .interp section in ELF executables.

include/
	* bfdlink.h (struct bfd_link_info): Add "nointerp" field.
bfd/
	* elflink.c (_bfd_elf_link_create_dynamic_sections): Don't create
	.interp when info->nointerp.
	(bfd_elf_size_dynamic_sections): Adjust assert.
	* elf32-arm.c (elf32_arm_size_dynamic_sections): Don't size .interp
	when info->nointerp.
	* elf32-bfin.c (elf32_bfinfdpic_size_dynamic_sections): Likewise.
	* elf32-cr16.c (_bfd_cr16_elf_size_dynamic_sections): Likewise.
	* elf32-cris.c (elf_cris_size_dynamic_sections): Likewise.
	* elf32-frv.c (elf32_frvfdpic_size_dynamic_sections): Likewise.
	* elf32-hppa.c (elf32_hppa_size_dynamic_sections): Likewise.
	* elf32-i370.c (i370_elf_size_dynamic_sections): Likewise.
	* elf32-i386.c (elf_i386_size_dynamic_sections): Likewise.
	* elf32-lm32.c (lm32_elf_size_dynamic_sections): Likewise.
	* elf32-m32r.c (m32r_elf_size_dynamic_sections): Likewise.
	* elf32-m68k.c (elf_m68k_size_dynamic_sections): Likewise.
	* elf32-metag.c (elf_metag_size_dynamic_sections): Likewise.
	* elf32-nds32.c (nds32_elf_size_dynamic_sections): Likewise.
	* elf32-nios2.c (nios2_elf32_size_dynamic_sections): Likewise.
	* elf32-or1k.c (or1k_elf_size_dynamic_sections): Likewise.
	* elf32-ppc.c (ppc_elf_size_dynamic_sections): Likewise.
	* elf32-s390.c (elf_s390_size_dynamic_sections): Likewise.
	* elf32-score.c (s3_bfd_score_elf_size_dynamic_sections): Likewise.
	* elf32-score7.c (s7_bfd_score_elf_size_dynamic_sections): Likewise.
	* elf32-sh.c (sh_elf_size_dynamic_sections): Likewise.
	* elf32-tic6x.c (elf32_tic6x_size_dynamic_sections): Likewise.
	* elf32-tilepro.c (tilepro_elf_size_dynamic_sections): Likewise.
	* elf32-vax.c (elf_vax_size_dynamic_sections): Likewise.
	* elf32-xtensa.c (elf_xtensa_size_dynamic_sections): Likewise.
	* elf64-alpha.c (elf64_alpha_size_dynamic_sections): Likewise.
	* elf64-hppa.c (elf64_hppa_size_dynamic_sections): Likewise.
	* elf64-ppc.c (ppc64_elf_size_dynamic_sections): Likewise.
	* elf64-s390.c (elf_s390_size_dynamic_sections): Likewise.
	* elf64-sh64.c (sh64_elf64_size_dynamic_sections): Likewise.
	* elf64-x86-64.c (elf_x86_64_size_dynamic_sections): Likewise.
	* elfnn-aarch64.c (elfNN_aarch64_size_dynamic_sections): Likewise.
	* elfnn-ia64.c (elfNN_ia64_size_dynamic_sections): Likewise.
	* elfxx-mips.c (_bfd_mips_elf_size_dynamic_sections): Likewise.
	* elfxx-sparc.c (_bfd_sparc_elf_size_dynamic_sections): Likewise.
	* elfxx-tilegx.c (tilegx_elf_size_dynamic_sections): Likewise.
ld/
	* ld.texinfo (--no-dynamic-linker): Document.
	* ldlex.h (enum option_values): Add OPTION_NO_DYNAMIC_LINKER.
	* lexsup.c (ld_options, parse_args): Handle --no-dynamic-linker.
2015-09-20 15:52:27 +09:30
Doug Evans 015d2e7e49 default_read_var_value <LOC_UNRESOLVED>: Include minsym kind in error message.
bfd/ChangeLog:

	* targets.c (enum bfd_flavour): Add comment.
	(bfd_flavour_name): New function.
	* bfd-in2.h: Regenerate.

gdb/ChangeLog:

	* findvar.c (default_read_var_value) <LOC_UNRESOLVED>: Include the
	kind of minimal symbol in the error message.
	* objfiles.c (objfile_flavour_name): New function.
	* objfiles.h (objfile_flavour_name): Declare.

gdb/testsuite/ChangeLog:

	* gdb.dwarf2/dw2-bad-unresolved.c: New file.
	* gdb.dwarf2/dw2-bad-unresolved.exp: New file.
2015-09-18 21:43:38 -07:00
Alan Modra 7c9cf41584 Add PowerPC64 ld --tls-get-addr-optimize.
Sometimes it may be of benefit to force use of the __tls_get_addr_opt
call stub even when the glibc being used during linking does not
advertise __tls_get_addr_opt.

bfd/
	* elf64-ppc.h (struct ppc64_elf_params <tls_get_addr_opt>): Rename
	from no_tls_get_addr_opt.
	* elf64-ppc.c: Update for rename and inversion of tls_get_addr_opt.
	(ppc64_elf_tls_setup): Set tls_get_addr_opt to 0 only when at
	default of -1.
ld/
	* emultempl/ppc64elf.em (params): Init tls_get_addr_opt field to -1.
	(OPTION_TLS_GET_ADDR_OPT): Define.
	(PARSE_AND_LIST_LONGOPTS): Handle --tls-get-addr-opt.
	(PARSE_AND_LIST_OPTIONS, PARSE_AND_LIST_ARGS_CASES): Likewise.
	* ld.texinfo: Document --tls-get-addr-optimize and
	--no-tls-get-addr-optimize.
2015-09-18 16:38:03 +09:30
Alan Modra b29b8669ad Remove one unnecessary iteration in insertion sort
PR 18867
	* elflink.c (elf_link_adjust_relocs): Correct start of insertion
	sort main loop.
2015-09-18 12:39:16 +09:30
Alan Modra bca6d0e319 Fix slowdown in ld -r for most common case of out-of-order relocs
I chose insertion sort since relocs are mostly sorted, but there is a
common case we can handle better;  A run of relocs put out of order
due to not linking input files in order.

	PR 18867
	* elflink.c (elf_link_adjust_relocs): Modify insertion sort to
	insert a run.  Return status in case of malloc failure.
	Adjust callers.
2015-09-16 21:53:21 +09:30
Max Filippov 92b3f00826 xtensa: generate PLT entries for call0 ABI
2015-09-15  Max Filippov  <jcmvbkbc@gmail.com>
bfd/
	* elf32-xtensa.c (elf_xtensa_be_plt_entry)
	(elf_xtensa_le_plt_entry): Emit 'entry' instruction only for
	windowed ABI.
	(elf_xtensa_create_plt_entry): Generate 'l32r' offsets and fix
	up instructions according to ABI.
2015-09-15 22:18:51 +03:00
Rich Felker fbedb42d07 Fix the SH behavior for EF_SH_PIC flag in FDPIC ABI
Fix it so that it's compatible with the kernel and other FDPIC targets.

* elf32-sh.c (sh_elf_relocate_section): Set EF_SH_PIC flag
instead of clearing it on cross-section relocations.
(sh_elf_merge_private_data): Clear EF_SH_PIC flag by default.
2015-09-15 08:34:12 +09:00
John David Anglin f3c3938c1c Set .plt entry size to 0 in elf32-hppa.c 2015-09-12 12:50:55 -04:00
Jiong Wang 4af68b9c78 [AArch64] Sort IS_AARCH64_TLS_RELAX_RELOC in alphabetic order
This can also speedup the check as TLSDESC is the default model for
global/local dynamic that the big "||" check can finish more quickly
than putting them at the bottom.

2015-09-09  Jiong. Wang  <jiong.wang@arm.com>

bfd/
  * elfnn-aarch64.c (IS_AARCH64_TLS_RELAX_RELOC): Sort alphabetically.
2015-09-09 14:25:33 +01:00
Jiong Wang 259364adb8 [AArch64] Relax TLS local dynamic traditional into local executable
The linker relaxation logic will be:

Code sequence I (tiny):

    0x00 adr  x0, :tlsldm:x
    0x04 bl   __tls_get_addr
         |
         V
    0x00 mrs  x0, tpidr_el0
    0x04 add  x0, x0, TCB_SIZE

Code sequence II (small):

    0x00 adrp a0, :tlsldm:x
    0x04 add  a0, #:tlsldm_lo12:x
    0x08 bl   __tls_get_addr
         |
         V
    0x00 mrs  x0, tpidr_el0
    0x04 add  x0, x0, TCB_SIZE
    0x08 nop

2015-09-09  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * elfnn-aarch64.c (aarch64_tls_transition_without_check): Support
  three TLS local dynamic traditional relocations types.
  (elfNN_aarch64_tls_relax): Support TLS local dynamic traditional to
  local executable relaxation.

ld/testsuite/
  * ld-aarch64/tls-relax-ld-le-tiny.s: New testcase.
  * ld-aarch64/tls-relax-ld-le-small.s: Likewise.
  * ld-aarch64/tls-relax-ld-le-tiny.d: New expectation file.
  * ld-aarch64/tls-relax-ld-le-small.d: Likewise.
  * ld-aarch64/aarch64-elf.exp: Run new testcases.
2015-09-09 14:19:28 +01:00
H.J. Lu 77697d411e Remove convert_mov_to_lea
* elf64-x86-64.c (elf_x86_64_convert_mov_to_lea): Remove
	convert_mov_to_lea.
2015-09-03 04:17:05 -07:00
H.J. Lu c74be520ba Rename R_386_irelative to R_386_ext2
* elf32-i386.c (R_386_irelative): Renamed to ...
	(R_386_ext2): This.
	(R_386_vt_offset): Updated.
	(elf_i386_rtype_to_howto): Likewise.
	(elf_i386_relocate_section): Likewise.
2015-09-02 05:13:08 -07:00
H.J. Lu 04ebc307f9 Skip PLT for function pointer initialization
We use its PLT entry to initialize function pointer at run-time.  If
there is no other usage for the PLT entry, we can generate run-time
function pointer relocations in read-write section, which can be
resolved by dynamic linker, to initialize function pointers.  It avoids
the extra indirect branch overhead in PLT.

bfd/

	PR ld/18900
	* elf32-i386.c (elf_i386_link_hash_entry): Add
	func_pointer_refcount.
	(elf_i386_link_hash_newfunc): Clear func_pointer_refcount.
	(elf_i386_get_local_sym_hash): Likewise.
	(elf_i386_copy_indirect_symbol): Also copy
	func_pointer_refcount.
	(elf_i386_check_relocs): Increment func_pointer_refcount.
	(elf_i386_gc_sweep_hook): Decrement func_pointer_refcount.
	(elf_i386_allocate_dynrelocs): Don't create the PLT entry if
	there are only function pointer relocations which can be
	resolved at run-time.  Keep dynanamic relocations for run-time
	function pointer initialization.
	(elf_i386_relocate_section): Copy dynamic function pointer
	relocations.
	* elf64-x86-64.c (elf_x86_64_link_hash_entry): Add
	func_pointer_refcount.
	(elf_x86_64_link_hash_newfunc): Clear func_pointer_refcount.
	(elf_x86_64_get_local_sym_hash): Likewise.
	(elf_x86_64_copy_indirect_symbol): Also copy
	func_pointer_refcount.
	(elf_x86_64_check_relocs): Increment func_pointer_refcount.
	(elf_x86_64_gc_sweep_hook): Decrement func_pointer_refcount.
	(elf_x86_64_allocate_dynrelocs): Don't create the PLT entry if
	there are only function pointer relocations which can be
	resolved at run-time.  Keep dynanamic relocations for run-time
	function pointer initialization.
	(elf_x86_64_relocate_section): Copy dynamic function pointer
	relocations.

ld/testsuite/

	PR ld/18900
	* ld-i386/i386.exp: Run tests for PR ld/18900.
	* ld-x86-64/x86-64.exp: Likewise.
	* ld-i386/pr18900.out: New file.
	* ld-i386/pr18900a.c: Likewise.
	* ld-i386/pr18900a.c: Likewise.
	* ld-i386/pr18900a.rd: Likewise.
	* ld-i386/pr18900b.c: Likewise.
	* ld-i386/pr18900b.rd: Likewise.
	* ld-i386/pr18900c.c: Likewise.
	* ld-x86-64/pr18900.out: Likewise.
	* ld-x86-64/pr18900a.c: Likewise.
	* ld-x86-64/pr18900a.rd: Likewise.
	* ld-x86-64/pr18900b.c: Likewise.
	* ld-x86-64/pr18900b.rd: Likewise.
	* ld-x86-64/pr18900c.c: Likewise.
	* ld-x86-64/mpx3.dd: Updated.
2015-09-01 05:06:33 -07:00
Alan Modra b07bca4ecd Wrong function reported for linker error message
OPD lookup goes awry when .opd has been shuffled to remove unused
functions.

	* elf64-ppc.c (ppc64_elf_maybe_function_sym): Adjust symbol value
	if .opd section has been edited.
2015-09-01 17:44:33 +09:30
Alan Modra a4b6fadd50 ppc64 out-of-line register save/restore functions
Don't emit long branch or plt branch stubs to save/restore functions.
Copy them instead.  The problem is that plt branch stubs currently
trash r12, one of the parameters to some of the save/restore
functions, and there is no free register available to use instead of
r12.

6f20ed8a is prerequisite for this patch.

	PR 18878
	* elf64-ppc.c (ARRAY_SIZE): Define.  Use throughout.
	(enum ppc_stub_type): Add ppc_stub_save_res.
	(struct map_stub): Add "next" and "needs_save_res".
	(struct ppc_link_hash_entry): Add "save_res" flag.
	(struct ppc_link_hash_table): Add "group".
	(sfpr_define): Add stub_sec param.  Define symbol in stub_sec if
	stub_sec is non-null.  Set "save_res".
	(save_res_funcs): Make file scope, rename from funcs.  Adjust uses.
	(ppc64_elf_adjust_dynamic_symbol): Prohibit plt call to save_res syms.
	(ppc_build_one_stub): Handle ppc_stub_save_res.
	(ppc_size_one_stub): Set stub type to ppc_size_one_stub on finding
	stub for linker defined save_res sym.
	(group_sections): Init new fields of struct map_stub.
	(ppc64_elf_size_stubs): Reserve space for save/restore func copy.
	(ppc64_elf_build_stubs): Copy save/restore funcs to groups.  Emit
	alias syms too.
	(ppc64_elf_relocate_section): Set destination for ppc_stub_save_res.
2015-09-01 17:42:32 +09:30
Alan Modra a7c4979727 Optimise PowerPC64 r2 adjusting stubs
Sometimes these stubs don't need to change the low 16-bits of r2, so in
that case omit a useless addi r2,r2,0 insn.  Also, change the get_r2off
error return from 0 to -1 since 0 is a valid return for ELFv2 -R objects.

	* elf64-ppc.c (get_r2off): Return -1 on error.
	(ppc_build_one_stub): Adjust for get_r2off change.  Don't emit
	addi r2,r2,0 on r2off stubs when the low 16-bit delta is zero.
	(ppc_size_one_stub): Corresponding size changes for r2off stubs.
	Add condition in test for -R objects.
2015-08-31 22:54:23 +09:30
Alan Modra 6f20ed8a6b ppc64 section group handling
Two organizational changes to the array of additional info kept for
sections.
1) Move group info into a per-group allocated struct, in preparation
for future changes that need per-group accounting.
2) Expand the array to include output sections, which simplifies
sizing and removes the need for a separate output section array.

	* section.c (section_id): Make file scope.
	(bfd_get_next_section_id): New function.
	* elf64-ppc.c (struct map_stub): Remove toc_off field.  Move decl.
	(struct ppc_stub_hash_entry): Delete stub_sec and id_sec.  Add
	group.  Update all uses.
	(struct ppc_link_hash_table): Delete top_id, top_index, and
	input_list.  Add sec_info_arr_size.  Rename stub_group to
	sec_info, and make group info indirect.  Update stub_group refs
	throughout file.
	(ppc_add_stub): Don't look for stub_sec on link_sec stub_group
	entry.
	(ppc_build_one_stub): Delete FIXME.
	(ppc64_elf_setup_section_lists): Size htab->sec_info for all
	sections, not just input sections.  Don't create htab->input_list.
	(ppc64_elf_next_input_section): Update to use sec_info union as
	list pointer.
	(PREV_SEC): Delete.
	(group_sections): Pass "info" param rather than "htab".  Iterate
	over output sections rather than input_list.  Use sec_info union
	as list pointers.  Alloc atruct map_stub, and return fail status.
	* bfd-in2.h: Regenerate.
2015-08-31 22:54:06 +09:30
Alan Modra d3435ae8dd More "Make asection->id and asection->index unsigned"
Fixes regressions introduced by 7292b3ac.

	* elflink.c (elf_sort_symbol): Use correctly sized type for
	calculating signed section->id difference.
	(elf_link_add_object_symbols): Likewise.
	* pef.c (bfd_pef_scan_start_address): Warning fix.
	* vms-alpha.c (vms_new_section_hook): Likewise.
2015-08-31 16:26:10 +09:30
Alan Modra 6cae483a9d NDS32 build fixes
* elf32-nds32.c (nds32_convert_32_to_16_alu1): Warning fix.
	(find_relocs_at_address_addr): Make "reloc_type" an enum.
	(nds32_elf_relax_delete_blanks): Warning fix.
	(nds32_elf_relax_loadstore): Correct loop bound.
2015-08-31 13:01:59 +09:30
Alan Modra 7292b3ac74 Make asection->id and asection->index unsigned
These int vars are really unsigned, so make them so.

	* section.c (struct bfd_section): Make "id" and "index" unsigned.
	* coff-rs6000.c (_bfd_xcoff_sizeof_headers): Adjust local var to suit.
	* elf.c (elf_map_symbols): Likewise.
	* elf64-ppc.c (sym_exists_at): Make "id" param unsigned.
	(struct ppc_link_hash_table): Make "top_id" and "top_index" unsigned.
	(ppc64_elf_setup_section_lists): Ditto for local vars.
	* elf32-arm.c: Similarly to elf64-ppc.c.
	* elf32-avr.c: Likewise.
	* elf32-hppa.c: Likewise.
	* elf32-m68hc1x.c: Likewise.
	* elf32-metag.c: Likewise.
	* elf32-nios2.c: Likewise.
	* elfnn-aarch64.c: Likewise.
	* simple.c (struct saved_offsets): Make "section_count" unsigned.
	* bfd-in2.h: Regenerate.
2015-08-31 12:37:36 +09:30
Alan Modra a40d44c44e Add missing pr reference 2015-08-27 11:00:01 +09:30
Alan Modra 6fc5bb5718 Don't sort ld -r output relocs on alpha
LITERAL/LITUSE relocs must be kept together.

	* elf64-alpha.c (elf64_alpha_sort_relocs_p): New function.
	(elf_backend_sort_relocs_p): Define.
2015-08-27 10:56:51 +09:30
Alan Modra 0e28778672 Use stable sort for ld -r relocs
A number of targets emit multiple relocs at a given r_offset, and
depend on those relocs staying in their original order.

	PR 18867
	* elflink.c (cmp_ext32l_r_offset, cmp_ext32b_r_offset): Delete.
	(cmp_ext64l_r_offset, cmp_ext64b_r_offset): Delete.
	(ext32l_r_offset, ext32b_r_offset, ext64l_r_offset, ext64b_r_offset):
	New functions.
	(elf_link_adjust_relocs): Use an insertion sort to sort relocs.
2015-08-26 23:34:10 +09:30
Matthew Fortune c97c330ba8 Select MIPS ABi based upon abiflags rather than e_flags.
bfd	PR ld/18401
	* elfxx-mips.c (bfd_mips_isa_ext_mach): New function: Converts an
	ISA value to a bfd machine number.
	(bfd_mips_isa_ext): Update the ISA level and revision if
	necessary.  Use mips_mach_extends_p to decide if the ISA extension
	needs to be set.
	(_bfd_mips_elf_merge_private_bfd_data): Allow the ISA extension to
	be inferred from the ABI setting.  Set the ISA level from the
	maximum of the incoming and outgoing ISA levels.

tests
	* ld-mips-elf/mips-elf-flags.exp: Add more ISA conflict tests.
2015-08-26 14:42:56 +01:00
Nick Clifton 16ad13eca4 Replace assertions with warning messages about ELF binaries containing multiple symbol tables.
PR binutils/18854
	* elf.c (bfd_section_from_shdr): Replace assertions with warnings
	about multiple symbol tables.
2015-08-25 17:48:20 +01:00
Renlin Li 7c2bea1ad1 [AArch64] Fix a typo in the comment for BFD_RELOC_AARCH64_LD64_GOT_LO12_NC
2015-08-25  Renlin Li  <renlin.li@arm.com>

bfd/
  * reloc.c (BFD_RELOC_AARCH64_LD64_GOTOFF_LO15): Use LP64 instead of
  ILP64.
  * bfd-in2.h: Regenerate.
2015-08-25 12:37:21 +01:00
Alan Modra 595bce7595 Uninitialized vd_nodename
Belt and braces fix.  Either of the changes here is sufficient to
ensure vd_nodename is initialized properly.

	* elf.c (_bfd_elf_slurp_version_tables): Always init vd_nodename.
	Don't copy fields not set by _bfd_elf_swap_verdef_in.
2015-08-22 16:24:52 +09:30
Jiong Wang 07c9aa07cd [AArch64][6/6] LD support TLSLD load/store relocation types
2015-08-19  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize new relocation
  types, including BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC,
  BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC,
  BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC,
  BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC.
  (elfNN_aarch64_final_link_relocate): Likewise.
  * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
  (_bfd_aarch64_elf_resolve_relocation): Likewise.

ld/testsuite/
  * ld-aarch64/emit-relocs-531.s: New testcase.
  * ld-aarch64/emit-relocs-531-overflow.s: Likewise.
  * ld-aarch64/emit-relocs-532.s: Likewise.
  * ld-aarch64/emit-relocs-533.s: Likewise.
  * ld-aarch64/emit-relocs-533-overflow.s: Likewise.
  * ld-aarch64/emit-relocs-534.s: Likewise.
  * ld-aarch64/emit-relocs-535.s: Likewise.
  * ld-aarch64/emit-relocs-535-overflow.s: Likewise.
  * ld-aarch64/emit-relocs-536.s: Likewise.
  * ld-aarch64/emit-relocs-537.s: Likewise.
  * ld-aarch64/emit-relocs-537-overflow.s: Likewise.
  * ld-aarch64/emit-relocs-538.s: Likewise.
  * ld-aarch64/emit-relocs-531.d: New expectation file.
  * ld-aarch64/emit-relocs-531-overflow.d: Likewise.
  * ld-aarch64/emit-relocs-532.d: Likewise.
  * ld-aarch64/emit-relocs-533.d: Likewise.
  * ld-aarch64/emit-relocs-533-overflow.d: Likewise.
  * ld-aarch64/emit-relocs-534.d: Likewise.
  * ld-aarch64/emit-relocs-535.d: Likewise.
  * ld-aarch64/emit-relocs-535-overflow.d: Likewise.
  * ld-aarch64/emit-relocs-536.d: Likewise.
  * ld-aarch64/emit-relocs-537.d: Likewise.
  * ld-aarch64/emit-relocs-537-overflow.d: Likewise.
  * ld-aarch64/emit-relocs-538.d: Likewise.
  * ld-aarch64/aarch64-elf.exp: Run new testcases.
2015-08-19 16:57:38 +01:00
Jiong Wang 4c5625238c [AArch64][5/6] GAS support TLSLD load/store relocation types
2015-08-19  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * reloc.c: New entries, including
  BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC,
  BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC,
  BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC.
  BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): Likewise.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation types support for
  dtprel_lo12.
  (ldst_lo12_determine_real_reloc_type): Support
  BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC,
  BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC,
  BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC,
  BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC.
  (parse_operands): Likewise.
  (md_apply_fix): Likewise
  (aarch64_force_relocation): Likewise.
  (process_movw_reloc_info): Likewise.

gas/testsuite/
  * gas/aarch64/reloc-dtprel_lo12-ldst8.s: New testcase.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldstc.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12-ldst16.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldst16.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12-ldst32.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldst32.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12-ldst64.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldst64.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12-ldst8.d: New expectation file.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldst8.d: Likewise.
  * gas/aarch64/reloc-dtprel_lo12-ldst16.d: Likewise.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldst16.d: Likewise.
  * gas/aarch64/reloc-dtprel_lo12-ldst32.d: Likewise.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldst32.d: Likewise.
  * gas/aarch64/reloc-dtprel-lo12-ldst64.d: Likewise.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldst64.d: Likewise.
2015-08-19 16:54:39 +01:00
Jiong Wang 6ffe9a1ba3 [AArch64][4/6] LD support TLSLD move/add relocation types
2015-08-19  Jiong Wang  <jiong.wang@arm.com>

bfd/
  PR ld/18276
  * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize new relocation
  types, including BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2.
  (elfNN_aarch64_final_link_relocate): Likewise.
  * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
  (_bfd_aarch64_elf_resolve_relocation): Likewise.

ld/testsuite/
  * ld-aarch64/emit-relocs-87.s: New testcase.
  * ld-aarch64/emit-relocs-88.s: Likewise.
  * ld-aarch64/emit-relocs-88-overflow.s: Likewise.
  * ld-aarch64/emit-relocs-89.s: Likewise.
  * ld-aarch64/emit-relocs-90.s: Likewise.
  * ld-aarch64/emit-relocs-90-overflow.s: Likewise.
  * ld-aarch64/emit-relocs-523.s: Likewise.
  * ld-aarch64/emit-relocs-524.s: Likewise.
  * ld-aarch64/emit-relocs-525.s: Likewise.
  * ld-aarch64/emit-relocs-527.s: Likewise.
  * ld-aarch64/emit-relocs-526.s: Likewise.
  * ld-aarch64/emit-relocs-528.s: Likewise.
  * ld-aarch64/emit-relocs-528-overflow.s: Likewise.
  * ld-aarch64/emit-relocs-87.d: New expectation file.
  * ld-aarch64/emit-relocs-88.d: Likewise.
  * ld-aarch64/emit-relocs-88-overflow.d: Likewise.
  * ld-aarch64/emit-relocs-89.d: Likewise.
  * ld-aarch64/emit-relocs-90.d: Likewise.
  * ld-aarch64/emit-relocs-90-overflow.d: Likewise.
  * ld-aarch64/emit-relocs-91.d: Likewise.
  * ld-aarch64/emit-relocs-523.d: Likewise.
  * ld-aarch64/emit-relocs-524.d: Likewise.
  * ld-aarch64/emit-relocs-525.d: Likewise.
  * ld-aarch64/emit-relocs-526.d: Likewise.
  * ld-aarch64/emit-relocs-527.d: Likewise.
  * ld-aarch64/emit-relocs-528.d: Likewise.
  * ld-aarch64/emit-relocs-528-overflow.d: Likewise.
  * ld-aarch64/aarch64-elf.exp: Run new testcases.
2015-08-19 16:40:18 +01:00
Jiong Wang 49df5539f9 [AArch64][3/6] GAS support TLSLD move/add relocation types
2015-08-19  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2): New entries.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): Likewise.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation modifiers,
  "dtprel_hi12", "dtprel_g0", "dtprel_g0_nc", "dtprel_g1",
  "dtprel_g1_nc", "dtprel_g2".
  (md_apply_fix): Support new relocation types.
  (aarch64_force_relocation): Likewise.
  (process_movw_reloc_info): Likewise.

gas/testsuite/
  * gas/aarch64/reloc-dtprel_g0.s: New testcase.
  * gas/aarch64/reloc-dtprel_g0-ilp32.s: Likewise.
  * gas/aarch64/reloc-dtprel_g0_nc.s: Likewise.
  * gas/aarch64/reloc-dtprel_g0_nc-ilp32.s: Likewise.
  * gas/aarch64/reloc-dtprel_g1.s: Likewise.
  * gas/aarch64/reloc-dtprel_g1-ilp32.s: Likewise.
  * gas/aarch64/reloc-dtprel_g1_nc.s: Likewise.
  * gas/aarch64/reloc-dtprel_g2.s: Likewise.
  * gas/aarch64/reloc-dtprel_hi12.s: Likewise.
  * gas/aarch64/reloc-dtprel_hi12-ilp32.s: Likewise.
  * gas/aarch64/reloc-dtprel_g0.d: New expectation file.
  * gas/aarch64/reloc-dtprel_g0-ilp32.d: Likewise.
  * gas/aarch64/reloc-dtprel_g0_nc.d: Likewise.
  * gas/aarch64/reloc-dtprel_g0_nc-ilp32.d: Likewise.
  * gas/aarch64/reloc-dtprel_g1.d: Likewise.
  * gas/aarch64/reloc-dtprel_g1-ilp32.d: Likewise.
  * gas/aarch64/reloc-dtprel_g1_nc.d: Likewise.
  * gas/aarch64/reloc-dtprel_g2.d: Likewise.
  * gas/aarch64/reloc-dtprel_hi12.d: Likewise.
  * gas/aarch64/reloc-dtprel_hi12-ilp32.d: Likewise.
2015-08-19 16:36:22 +01:00
Jiong Wang 753999c1ec [AArch64][2/6] LD support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC
2015-08-19  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize
  BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC.
  (aarch64_reloc_got_type): Likewise.
  (elfNN_aarch64_final_link_relocate): Likewise.
  (elfNN_aarch64_relocate_section): Likewise.
  * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
  (_bfd_aarch64_elf_resolve_relocation): Likewise.

ld/testsuite/
  * ld-aarch64/emit-relocs-530.s: New testcase.
  * ld-aarch64/emit-relocs-92.s: Likewise.
  * ld-aarch64/emit-relocs-530.d: New expectation file.
  * ld-aarch64/emit-relocs-92.d: Likewise.
  * ld-aarch64/aarch64-elf.exp: Run new testcases.
2015-08-19 16:30:47 +01:00
Jiong Wang 13289c10e2 [AArch64][1/6] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC
2015-08-19  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC): New entry.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
  BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation modifiers.
  (md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC.
  (aarch64_force_relocation): Likewise.

gas/testsuite/
  * gas/aarch64/reloc-dtprel_lo12_nc.s: New testcase.
  * gas/aarch64/reloc-dtprel_lo12_nc-ilp32.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12_nc.d: New expectation file.
  * gas/aarch64/reloc-dtprel_lo12_nc-ilp32.d: Likewise.
2015-08-19 16:28:08 +01:00
Alan Modra 3cbc1e5e68 Add bfd_link_pde, and simplify some tests of link_info.type
include/
	* bfdlink.h (bfd_link_pde): Define.
bfd/
	* elf-s390-common.c: Simplify expressions using
	bfd_linke_executable, bfd_link_pie and bfd_link_pic.
	* elf32-arm.c: Likewise.
	* elf32-bfin.c: Likewise.
	* elf32-frv.c: Likewise.
	* elf32-m68k.c: Likewise.
	* elf32-nios2.c: Likewise.
	* elf32-ppc.c: Likewise.
	* elf32-s390.c: Likewise.
	* elf32-sh.c: Likewise.
	* elf64-alpha.c: Likewise.
	* elf64-ppc.c: Likewise.
	* elf64-s390.c: Likewise.
	* elflink.c: Likewise.
2015-08-19 12:51:06 +09:30
H.J. Lu cae1fbbb7e Return reloc_class_ifunc for reloc against IFUNC
elf_XXX_reloc_type_class should return reloc_class_ifunc for relocation
against STT_GNU_IFUNC symbol.

bfd/

	PR ld/18841
	* elf-bfd.h (elf_link_hash_table): Add dynsym.
	* elf32-i386.c (elf_i386_reloc_type_class): Return
	reloc_class_ifunc for relocation against STT_GNU_IFUNC symbol.
	* elf64-x86-64.c (elf_x86_64_reloc_type_class): Likewise.
	* elflink.c (_bfd_elf_link_create_dynamic_sections): Set dynsym.
	(bfd_elf_size_dynsym_hash_dynstr): Use dynsym.
	(elf_final_link_info): Remove dynsym_sec.
	(elf_link_output_extsym): Replace dynsym_sec with dynsym.
	(bfd_elf_final_link): Remove reference to dynsym_sec.  Replace
	dynsym_sec with dynsym.

ld/testsuite/

	PR ld/18841
	* ld-ifunc/ifunc.exp: Add a test for PR ld/18841.
	* ld-ifunc/pr18841.out: New file.
	* ld-ifunc/pr18841a.c: Likewise.
	* ld-ifunc/pr18841b.c: Likewise.
2015-08-18 09:50:08 -07:00
Jiong Wang 44b4145b72 [AArch64] Cleanup TLS relocation types which don't go through GOT table
This patch done two types of cleanup:

  * in aarch64_reloc_got_type and elfNN_aarch64_relocate_section

    We don't need those redundant "case" check, as they can be merged
    with the "default" which just "break".

  * in elfNN_aarch64_gc_sweep_hook and elfNN_aarch64_check_relocs

    All TLS local executable relocations and some local dynamic
    relocations (those calculate module offset) actually don't need GOT
    entry, so remove them from GOT entry counting.

2015-08-18  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * elfnn-aarch64.c (aarch64_reloc_got_type): Delete useless check.
  (elfNN_aarch64_relocate_section): Likewise.
  (elfNN_aarch64_gc_sweep_hook): Likewise.
  (elfNN_aarch64_check_relocs): Likewise.
2015-08-18 16:50:56 +01:00
H.J. Lu 0e1862bb40 Add output_type to bfd_link_info
The "shared" field in bfd_link_info is set for both DSO and and PIE.
There are separate fields for executable and relocatable outputs.  This
patch adds an "output_type" field:

enum output_type
{
  type_unknown = 0,
  type_executable,
  type_dll,
  type_relocatable
};

and a "pic" field to bfd_link_info to replace shared, executable and
relocatable fields so that we can use the "output_type" field to check
for output type and the "pic" field check if output is PIC.  Macros,
bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic
and bfd_link_pie, are provided to check for output features.

bfd/

	* bfd/aoutx.h: Replace shared, executable, relocatable and pie
	fields with bfd_link_executable, bfd_link_dll,
	bfd_link_relocatable, bfd_link_pic and bfd_link_pie.
	* bfd/bout.c: Likewise.
	* bfd/coff-alpha.c: Likewise.
	* bfd/coff-arm.c: Likewise.
	* bfd/coff-i386.c: Likewise.
	* bfd/coff-i960.c: Likewise.
	* bfd/coff-m68k.c: Likewise.
	* bfd/coff-mcore.c: Likewise.
	* bfd/coff-mips.c: Likewise.
	* bfd/coff-ppc.c: Likewise.
	* bfd/coff-rs6000.c: Likewise.
	* bfd/coff-sh.c: Likewise.
	* bfd/coff-tic80.c: Likewise.
	* bfd/coff-x86_64.c: Likewise.
	* bfd/coff64-rs6000.c: Likewise.
	* bfd/coffgen.c: Likewise.
	* bfd/cofflink.c: Likewise.
	* bfd/ecoff.c: Likewise.
	* bfd/ecofflink.c: Likewise.
	* bfd/elf-bfd.h: Likewise.
	* bfd/elf-eh-frame.c: Likewise.
	* bfd/elf-ifunc.c: Likewise.
	* bfd/elf-m10200.c: Likewise.
	* bfd/elf-m10300.c: Likewise.
	* bfd/elf-s390-common.c: Likewise.
	* bfd/elf-vxworks.c: Likewise.
	* bfd/elf.c: Likewise.
	* bfd/elf32-arm.c: Likewise.
	* bfd/elf32-avr.c: Likewise.
	* bfd/elf32-bfin.c: Likewise.
	* bfd/elf32-cr16.c: Likewise.
	* bfd/elf32-cr16c.c: Likewise.
	* bfd/elf32-cris.c: Likewise.
	* bfd/elf32-crx.c: Likewise.
	* bfd/elf32-d10v.c: Likewise.
	* bfd/elf32-dlx.c: Likewise.
	* bfd/elf32-epiphany.c: Likewise.
	* bfd/elf32-fr30.c: Likewise.
	* bfd/elf32-frv.c: Likewise.
	* bfd/elf32-ft32.c: Likewise.
	* bfd/elf32-h8300.c: Likewise.
	* bfd/elf32-hppa.c: Likewise.
	* bfd/elf32-i370.c: Likewise.
	* bfd/elf32-i386.c: Likewise.
	* bfd/elf32-i860.c: Likewise.
	* bfd/elf32-ip2k.c: Likewise.
	* bfd/elf32-iq2000.c: Likewise.
	* bfd/elf32-lm32.c: Likewise.
	* bfd/elf32-m32c.c: Likewise.
	* bfd/elf32-m32r.c: Likewise.
	* bfd/elf32-m68hc11.c: Likewise.
	* bfd/elf32-m68hc1x.c: Likewise.
	* bfd/elf32-m68k.c: Likewise.
	* bfd/elf32-mcore.c: Likewise.
	* bfd/elf32-mep.c: Likewise.
	* bfd/elf32-metag.c: Likewise.
	* bfd/elf32-microblaze.c: Likewise.
	* bfd/elf32-moxie.c: Likewise.
	* bfd/elf32-msp430.c: Likewise.
	* bfd/elf32-mt.c: Likewise.
	* bfd/elf32-nds32.c: Likewise.
	* bfd/elf32-nios2.c: Likewise.
	* bfd/elf32-or1k.c: Likewise.
	* bfd/elf32-ppc.c: Likewise.
	* bfd/elf32-rl78.c: Likewise.
	* bfd/elf32-rx.c: Likewise.
	* bfd/elf32-s390.c: Likewise.
	* bfd/elf32-score.c: Likewise.
	* bfd/elf32-score7.c: Likewise.
	* bfd/elf32-sh-symbian.c: Likewise.
	* bfd/elf32-sh.c: Likewise.
	* bfd/elf32-sh64.c: Likewise.
	* bfd/elf32-spu.c: Likewise.
	* bfd/elf32-tic6x.c: Likewise.
	* bfd/elf32-tilepro.c: Likewise.
	* bfd/elf32-v850.c: Likewise.
	* bfd/elf32-vax.c: Likewise.
	* bfd/elf32-visium.c: Likewise.
	* bfd/elf32-xc16x.c: Likewise.
	* bfd/elf32-xstormy16.c: Likewise.
	* bfd/elf32-xtensa.c: Likewise.
	* bfd/elf64-alpha.c: Likewise.
	* bfd/elf64-hppa.c: Likewise.
	* bfd/elf64-ia64-vms.c: Likewise.
	* bfd/elf64-mmix.c: Likewise.
	* bfd/elf64-ppc.c: Likewise.
	* bfd/elf64-s390.c: Likewise.
	* bfd/elf64-sh64.c: Likewise.
	* bfd/elf64-x86-64.c: Likewise.
	* bfd/elflink.c: Likewise.
	* bfd/elfnn-aarch64.c: Likewise.
	* bfd/elfnn-ia64.c: Likewise.
	* bfd/elfxx-mips.c: Likewise.
	* bfd/elfxx-sparc.c: Likewise.
	* bfd/elfxx-tilegx.c: Likewise.
	* bfd/i386linux.c: Likewise.
	* bfd/linker.c: Likewise.
	* bfd/m68klinux.c: Likewise.
	* bfd/pdp11.c: Likewise.
	* bfd/pe-mips.c: Likewise.
	* bfd/peXXigen.c: Likewise.
	* bfd/reloc.c: Likewise.
	* bfd/reloc16.c: Likewise.
	* bfd/sparclinux.c: Likewise.
	* bfd/sunos.c: Likewise.
	* bfd/vms-alpha.c: Likewise.
	* bfd/xcofflink.c: Likewise.

include/

	* include/bfdlink.h (output_type): New enum.
	(bfd_link_executable): New macro.
	(bfd_link_dll): Likewise.
	(bfd_link_relocatable): Likewise.
	(bfd_link_pic): Likewise.
	(bfd_link_pie): Likewise.
	(bfd_link_info): Remove shared, executable, pie and relocatable.
	Add output_type and pic.

ld/

	* ld/ldctor.c: Replace shared, executable, relocatable and pie
	fields with bfd_link_executable, bfd_link_dll,
	bfd_link_relocatable, bfd_link_pic and bfd_link_pie.
	* ld/ldemul.c: Likewise.
	* ld/ldfile.c: Likewise.
	* ld/ldlang.c: Likewise.
	* ld/ldmain.c: Likewise.
	* ld/ldwrite.c: Likewise.
	* ld/lexsup.c: Likewise.
	* ld/pe-dll.c: Likewise.
	* ld/plugin.c: Likewise.
	* ld/emultempl/aarch64elf.em: Likewise.
	* ld/emultempl/aix.em: Likewise.
	* ld/emultempl/alphaelf.em: Likewise.
	* ld/emultempl/armcoff.em: Likewise.
	* ld/emultempl/armelf.em: Likewise.
	* ld/emultempl/avrelf.em: Likewise.
	* ld/emultempl/beos.em: Likewise.
	* ld/emultempl/cr16elf.em: Likewise.
	* ld/emultempl/elf-generic.em: Likewise.
	* ld/emultempl/elf32.em: Likewise.
	* ld/emultempl/genelf.em: Likewise.
	* ld/emultempl/generic.em: Likewise.
	* ld/emultempl/gld960.em: Likewise.
	* ld/emultempl/gld960c.em: Likewise.
	* ld/emultempl/hppaelf.em: Likewise.
	* ld/emultempl/irix.em: Likewise.
	* ld/emultempl/linux.em: Likewise.
	* ld/emultempl/lnk960.em: Likewise.
	* ld/emultempl/m68hc1xelf.em: Likewise.
	* ld/emultempl/m68kcoff.em: Likewise.
	* ld/emultempl/m68kelf.em: Likewise.
	* ld/emultempl/metagelf.em: Likewise.
	* ld/emultempl/mipself.em: Likewise.
	* ld/emultempl/mmo.em: Likewise.
	* ld/emultempl/msp430.em: Likewise.
	* ld/emultempl/nds32elf.em: Likewise.
	* ld/emultempl/needrelax.em: Likewise.
	* ld/emultempl/nios2elf.em: Likewise.
	* ld/emultempl/pe.em: Likewise.
	* ld/emultempl/pep.em: Likewise.
	* ld/emultempl/ppc32elf.em: Likewise.
	* ld/emultempl/ppc64elf.em: Likewise.
	* ld/emultempl/sh64elf.em: Likewise.
	* ld/emultempl/solaris2.em: Likewise.
	* ld/emultempl/spuelf.em: Likewise.
	* ld/emultempl/sunos.em: Likewise.
	* ld/emultempl/tic6xdsbt.em: Likewise.
	* ld/emultempl/ticoff.em: Likewise.
	* ld/emultempl/v850elf.em: Likewise.
	* ld/emultempl/vms.em: Likewise.
	* ld/emultempl/vxworks.em: Likewise.
2015-08-18 05:51:19 -07:00
Alan Modra fe875424a0 Use $SED in bfd Makefile
PR 18667
	* Makefile.am: Use $(SED) in place of sed throughout.
	* Makefile.in: Regenerate.
2015-08-18 16:44:48 +09:30
Alan Modra 43417696fe PPC64: Allow .TOC. in linker script to override backend calculated value
bfd/
	* elf64-ppc.c (ppc64_elf_func_desc_adjust): Don't redefine .TOC.
	if already defined, and set linker_def.
	(ppc64_elf_set_toc): Use .TOC. value if defined other than by
	the backend.
ld/
	* ldexp.c (exp_fold_tree_1): Clear linker_def on symbol assignment.
2015-08-18 16:43:18 +09:30
Alan Modra 9b57267f4f Revert "Fix encoding or OpenRisk1000 PC relative relocations."
This reverts commit dbac553d28.

	PR ld/18759
	* elf32-or1k.c: Revert 2015-08-11 change.
2015-08-14 11:02:59 +09:30
H.J. Lu 8efa2874ab Issue an error for read-only segment with dynamic IFUNC relocations
To load an ELF binary with DT_TEXTREL tag, the dynamic linker calls
__mprotect on the read-only segment with PROT_READ|PROT_WRITE before
applying dynamic relocation.  It leads to segfault when performing
IFUNC relocations since the read-only segment has no execute permission.
This patch changes x86 linker to issue an error for read-only segment
with dynamic IFUNC relocations.  Other backends with IFUNC support
may need a similar change.

bfd/

	PR ld/18801
	* elf32-i386.c (elf_i386_size_dynamic_sections): Issue an error
	for read-only segment with dynamic IFUNC relocations.
	* elf64-x86-64.c (elf_x86_64_size_dynamic_sections): Likewise.

ld/testsuite/

	PR ld/18801
	* ld-i386/i386.exp: Run pr18801.
	* ld-x86-64/x86-64.exp: Likewise.
	* ld-i386/pr18801.d: New file.
	* ld-i386/pr18801.s: Likewise.
	* ld-x86-64/pr18801.d: Likewise.
	* ld-x86-64/pr18801.s: Likewise.
2015-08-13 04:31:38 -07:00
Simon Dardis 40fc1451c6 [MIPS] Map 'move' to 'or'.
The MIPS assembly idiom 'move' now maps to the 'or' machine instruction. This
change affects microMIPS, MIPS32, MIPS64.

2015-08-12  Simon Dardis  <simon.dardis@imgtec.com>

opcodes/

	* micromips-opc.c (micromips_opcodes): Re-order table so that move
	based on 'or' is first.
	* mips-opc.c (mips_builtin_opcodes): Ditto.

bfd/

	* elfxx-mips.c (STUB_MOVE): Change to use 'or' only.
	(mips_o32_exec_plt0_entry, mips_n32_exec_plt0_entry,
	mips_n64_exec_plt0_entry, micromips_insn32_o32_exec_plt0_entry):
	Update to use 'or' instead of 'addu/daddu'.
	(_bfd_mips_elf_finish_dynamic_symbol): Update usage of STUB_MOVE.
	(move_insns_32): Reorder table.

gas/

	* config/tc-mips.c (move_register): Change to use 'or' only.
	(s_cpload, s_cpsetup, s_cprestore, s_cpreturn): Update to
	use or for move.

gas/testsuite/

	* gas/mips/elf-rel23.d: Update test.
	* gas/mips/elf-rel23.d: Ditto.
	* gas/mips/elf-rel23a.d: Ditto.
	* gas/mips/elf-rel23b.d: Ditto.
	* gas/mips/elf_e_flags1.d: Ditto.
	* gas/mips/elf_e_flags2.d: Ditto.
	* gas/mips/elf_e_flags3.d: Ditto.
	* gas/mips/elf_e_flags4.d: Ditto.
	* gas/mips/loc-swap-dis.d: Ditto.
	* gas/mips/micromips-insn32.d: Ditto.
	* gas/mips/micromips-noinsn32.d: Ditto.
	* gas/mips/micromips-trap.d: Ditto.
	* gas/mips/micromips.d: Ditto.
	* gas/mips/mips-abi32-pic.d: Ditto.
	* gas/mips/mips-abi32.d: Ditto.
	* gas/mips/mips-gp32-fp32-pic.d: Ditto.
	* gas/mips/mips-gp32-fp32.d: Ditto.
	* gas/mips/mips-gp32-fp64-pic.d: Ditto.
	* gas/mips/mips-gp32-fp64.d: Ditto.
	* gas/mips/mips-gp64-fp32-pic.d: Ditto.
	* gas/mips/mips-gp64-fp32.d: Ditto.
	* gas/mips/mips-gp64-fp64-pic.d: Ditto.
	* gas/mips/mips-gp64-fp64.d: Ditto.
	* gas/mips/mipsr6@loc-swap-dis.d: Ditto.
	* gas/mips/tls-o32.d: Ditto.
	* gas/mips/uld2-eb.d: Ditto.
	* gas/mips/uld2-el.d: Ditto.
	* gas/mips/ulw2-eb-ilocks.d: Ditto.
	* gas/mips/ulw2-eb.d: Ditto.
	* gas/mips/ulw2-el-ilocks.d: Ditto.
	* gas/mips/ulw2-el.d: Ditto.
	* gas/mips/move.d: New test.
	* gas/mips/move.s: Ditto.
	* gas/mips/micromips32-move.d: Ditto.
	* gas/mips/micromips32-move.s: Ditto.
	* gas/mips/mips.exp: Run the new tests.

gold/

	* mips.cc (plt0_entry_o32, plt0_entry_n32, plt0_entry_n64,
	lazy_stub_normal_1, lazy_stub_normal_1_n64,
	lazy_stub_normal_2, lazy_stub_normal_2_n64, lazy_stub_big,
	lazy_stub_big_n64, lazy_stub_micromips32_normal_1_n64,
	lazy_stub_micromips32_normal_2_n64, lazy_stub_micromips32_big,
	lazy_stub_micromips32_big_n64): Update to use 'or' for move instead
	of 'addu/daddu'.

ld/testsuite/

	* ld-mips-elf/compressed-plt-1-n32-mips16.od: Update test.
	* ld-mips-elf/compressed-plt-1-n32-umips.od: Ditto.
	* ld-mips-elf/compressed-plt-1-o32-mips16-got.od: Ditto.
	* ld-mips-elf/compressed-plt-1-o32-mips16-only.od: Ditto.
	* ld-mips-elf/compressed-plt-1-o32-mips16-word.od: Ditto.
	* ld-mips-elf/compressed-plt-1-o32-mips16.od: Ditto.
	* ld-mips-elf/compressed-plt-1-o32-se.od: Ditto.
	* ld-mips-elf/compressed-plt-1-o32-umips-got.od: Ditto.
	* ld-mips-elf/compressed-plt-1-o32-umips-word.od: Ditto.
	* ld-mips-elf/compressed-plt-1-o32-umips.od: Ditto.
	* ld-mips-elf/jalx-2.dd: Ditto.
	* ld-mips-elf/mips16-pic-3.dd: Ditto.
	* ld-mips-elf/pic-and-nonpic-3a.dd: Ditto.
	* ld-mips-elf/pic-and-nonpic-3b.dd: Ditto.
	* ld-mips-elf/pic-and-nonpic-5b.dd: Ditto.
	* ld-mips-elf/pic-and-nonpic-6-n32.dd: Ditto.
	* ld-mips-elf/pic-and-nonpic-6-o32.dd: Ditto.
	* ld-mips-elf/stub-dynsym-1-10000.d: Ditto.
	* ld-mips-elf/stub-dynsym-1-2fe80.d: Ditto.
	* ld-mips-elf/stub-dynsym-1-7fff.d: Ditto.
	* ld-mips-elf/stub-dynsym-1-8000.d: Ditto.
	* ld-mips-elf/stub-dynsym-1-fff0.d: Ditto.
	* ld-mips-elf/tlsbin-o32.d: Ditto.
	* ld-mips-elf/tlsdyn-o32-1.d: Ditto.
	* ld-mips-elf/tlsdyn-o32-2.d: Ditto.
	* ld-mips-elf/tlsdyn-o32-3.d: Ditto.
	* ld-mips-elf/tlsdyn-o32.d: Ditto.
	* ld-mips-elf/tlslib-o32.d: Ditto.
2015-08-12 17:10:22 +01:00
H.J. Lu 0eace2105d Properly skip IFUNC relocations in debug sections
Use "continue" instead of "break" to skip IFUNC relocations in debug
sections.

	* elf32-i386.c (elf_i386_relocate_section): Properly skip IFUNC
	relocations in debug sections.
	* elf64-x86-64.c (elf_x86_64_relocate_section): Likewise.
2015-08-11 19:04:38 -07:00
Jiong Wang c674f5cd3f [AArch64] Improve BFD overflow warning message for -fpic
2015-08-11  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * elfnn-aarch64.c (elfNN_aarch64_relocate_section): Improve warning
  message for R_AARCH64_LD64_GOTPAGE_LO15/R_AARCH64_LD32_GOTPAGE_LO14.
2015-08-11 22:12:41 +01:00
Jiong Wang 9331eea1f8 [AArch64]Speed up linking speed by skipping unncessary TLS reloc type check
2015-08-11  Jiong Wang  <jiong.wang@arm.com>

bfd/
   * elfnn-aarch64.c (IS_AARCH64_TLS_RELAX_RELOC): New.
  (aarch64_can_relax_tls): Use the new IS_AARCH64_TLS_RELAX_RELOC.
2015-08-11 22:05:39 +01:00
Jiong Wang f678ded748 [AArch64] Long branch veneer support far symbol defined by --defsym
2015-08-11  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * bfd/elfnn-aarch64.c (aarch64_type_of_stub): New parameter "sym_sec".
  Loose the check for symbol from ABS section.
  (elfNN_aarch64_size_stubs): Pass sym_sec.

ld/testsuite/
  * ld-aarch64/farcall-b-defsym.s: New test.
  * ld-aarch64/farcall-bl-defsym.s: Likewise.
  * ld-aarch64/farcall-b-defsym.d: New expectation.
  * ld-aarch64/farcall-bl-defsym.d: Likewise.
2015-08-11 21:55:52 +01:00
Jiong Wang 07f9ddfeba [AArch64] PR18668, repair long branch veneer for plt stub
2015-08-11  Jiong Wang  <jiong.wang@arm.com>
bfd/
   PR ld/18668
   * elfnn-aarch64.c (aarch64_type_of_stub): Update destination for
   calls go through plt stub.
   (elfNN_aarch64_final_link_relocate): Adjust code logic for CALL26,
   JUMP26 relocation to support inserting veneer for call to plt stub.

ld/testsuite/
   * ld-aarch64/farcall-b-gsym.s: New test.
   * ld-aarch64/farcall-b-plt.s: Likewise.
   * ld-aarch64/farcall-bl-plt.s: Likewise.
   * ld-aarch64/farcall-b-gsym.d: New expect file.
   * ld-aarch64/farcall-b-plt.d: Likewise.
   * ld-aarch64/farcall-bl-plt.d: Likewise.
2015-08-11 21:44:31 +01:00
Jiong Wang 40fbed8481 [AArch64][8/8] LD support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12
2015-08-11  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize
  BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12.
  (aarch64_reloc_got_type): Likewise.
  (elfNN_aarch64_final_link_relocate): Likewise.
  (elfNN_aarch64_relocate_section): Likewise.
  * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
  (_bfd_aarch64_elf_resolve_relocation): Likewise.

ld/testsuite/
  * ld-aarch64/emit-relocs-529.s: New testcase.
  * ld-aarch64/emit-relocs-529-overflow.s: Likewise.
  * ld-aarch64/emit-relocs-86.s: Likewise.
  * ld-aarch64/emit-relocs-86-overflow.s: Likewise.
  * ld-aarch64/emit-relocs-529.d: New expectation file.
  * ld-aarch64/emit-relocs-529-overflow.d: Likewise.
  * ld-aarch64/emit-relocs-86.d: Likewise.
  * ld-aarch64/emit-relocs-86-overflow.d: Likewise.
  * ld-aarch64/aarch64-elf.exp: Run new testcases.
2015-08-11 21:26:41 +01:00
Jiong Wang 70151fb54a [AArch64][7/8] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12
2015-08-11  Jiong Wang  <jiong.wang@arm.com>

include/elf/
  * aarch64.h (R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12): Define.

bfd/
  * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12): New entry.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
  BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation modifiers
  "dtprel_lo12".
  (md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12.
  (aarch64_force_relocation): Likewise.

gas/testsuite/
  * gas/aarch64/reloc-dtprel_lo12-1.s: New testcase.
  * gas/aarch64/reloc-dtprel_lo12-ilp32-1.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12-1.d: New expectation file.
  * gas/aarch64/reloc-dtprel_lo12-ilp32-1.d: Likewise.
2015-08-11 21:26:31 +01:00
Jiong Wang 73f925cc20 [AArch64][6/8] LD support BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC
2015-08-11  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize
  BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC.
  (aarch64_reloc_got_type): Likewise.
  (elfNN_aarch64_final_link_relocate): Likewise.
  (elfNN_aarch64_relocate_section): Likewise.
  (elfNN_aarch64_gc_sweep_hook): Likewise.
  (elfNN_aarch64_check_relocs): Likewise.
  * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
  (_bfd_aarch64_elf_resolve_relocation): Likewise.

ld/testsuite/
  * ld-aarch64/tls-small-ld.s: Update testcase.
2015-08-11 21:26:13 +01:00
Jiong Wang a12fad50d2 [AArch64][5/8] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC
2015-08-11  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC): New entry.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
  BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation modifiers.
  (md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC.
  (aarch64_force_relocation): Likewise.

gas/testsuite/
  * gas/aarch64/reloc-tlsldm_lo12_nc-1.s: New testcase.
  * gas/aarch64/reloc-tlsldm_lo12_nc-ilp32-1.s: Likewise.
  * gas/aarch64/reloc-tlsldm_lo12_nc-1.d: New expectation file.
  * gas/aarch64/reloc-tlsldm_lo12_nc-ilp32-1.d: Likewise.
2015-08-11 21:25:51 +01:00
Jiong Wang f69e49203b [AArch64][3/8] LD support BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21
2015-08-11  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize
  BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21.
  (aarch64_reloc_got_type): Likewise.
  (elfNN_aarch64_final_link_relocate): Likewise.
  (elfNN_aarch64_relocate_section): Likewise.
  (elfNN_aarch64_gc_sweep_hook): Likewise.
  (elfNN_aarch64_check_relocs): Likewise.
  * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
  (_bfd_aarch64_elf_resolve_relocation): Likewise.

ld/testsuite/
  * ld-aarch64/tls-small-ld.s: New file.
  * ld-aarch64/tls-small-ld.d: Likewise.
  * ld-aarch64/aarch64-elf.exp: Run new test.
2015-08-11 21:25:04 +01:00
Jiong Wang 1107e076cf [AArch64][2/8] GAS support BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21
2015-08-11  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21): New entry.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
  BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation modifiers.
  (md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21.
  (aarch64_force_relocation): Likewise.

gas/testsuite/
  * gas/aarch64/reloc-tlsldm-page-1.s: New testcase.
  * gas/aarch64/reloc-tlsldm-page-ilp32-1.s: Likewise.
  * gas/aarch64/reloc-tlsldm-page-1.d: New expectation file.
  * gas/aarch64/reloc-tlsldm-page-ilp32-1.d: Likewise.
2015-08-11 21:24:38 +01:00
H.J. Lu 97dc35c88d Skip IFUNC relocations in debug sections
Skip IFUNC relocations in debug sections ignored by ld.so.

bfd/

	PR ld/18808
	* elf32-i386.c (elf_i386_relocate_section): Skip IFUNC
	relocations in debug sections.
	* elf64-x86-64.c (elf_x86_64_relocate_section): Likewise.

ld/testsuite/

	PR ld/18808
	* ld-ifunc/ifunc.exp: Add a test for PR ld/18808.
	* ld-ifunc/pr18808.out: New file.
	* ld-ifunc/pr18808a.c: Likewise.
	* ld-ifunc/pr18808b.c: Likewise.
2015-08-11 12:59:11 -07:00
Peter Zotov dbac553d28 Fix encoding or OpenRisk1000 PC relative relocations.
PR ld/18759
	* elf32-or1k.c (R_OR1K_32_PCREL): Set pcrel_offset to TRUE.
	(R_OR1K_16_PCREL): Likewise.
	(R_OR1K_8_PCREL): Likewise.
2015-08-11 17:12:21 +01:00
Nick Clifton 4c0160b8e2 Fix typo in coff-sh.c.
PR binutils/18747
	* coff-sh.c (_bfd_sh_align_load_span): Fix typo when setting
	opcode count.
2015-08-11 17:02:25 +01:00
Nick Clifton 4b0e8a5f80 Fix memory access problems discovered when running some binary tools on corrupt files.
PR binutils/18758
	* elf.c (_bfd_elf_setup_sections): Add checks for corrupt section
	group information.
	* peicode.h (pe_ILF_make_a_section): Ensure alignment of the
	used_by_bfd pointer.
	(pe_ILF_build_a_bfd): Ensure alignment of vars.data pointer.
2015-08-11 11:57:09 +01:00
H.J. Lu 64140f86ab Fix a typo in _bfd_elf_copy_private_bfd_data
* elf.c (_bfd_elf_copy_private_bfd_data): Fix a typo.
2015-08-11 03:50:17 -07:00
H.J. Lu 422f11824b Replace hidden with versioned in elf_link_hash_entry
This patch replaces the "hidden" field with the "versioned" field in
elf_link_hash_entry so that we can avoid calling strchr and strrchr if
the symbol is unversioned.

	* elf-bfd.h (elf_symbol_version): New enum.
	(elf_link_hash_entry): Replace hidden with versioned.
	* elflink.c (_bfd_elf_merge_symbol): Don't look for symbol
	version if the symbol is unversioned.  Initialize versioned.
	(_bfd_elf_add_default_symbol): Don't look for symbol version
	if the symbol is unversioned or hidden.  Initialize versioned.
	(elf_collect_hash_codes): Don't look for symbol version if the
	symbol is unversioned.
	(elf_collect_gnu_hash_codes): Likewise.
	(bfd_elf_gc_mark_dynamic_ref_symbol): Likewise.
	(_bfd_elf_link_hash_copy_indirect): Check versioned instead of
	hidden.
	(elf_link_output_extsym): Likewise.
2015-08-10 07:57:57 -07:00
H.J. Lu d4ac1f878e Check sh_type/sh_flags/sh_addralign/sh_entsize when copying sh_link/sh_info
When copying the sh_link and sh_info fields in stripped section headers,
we also check if the sh_type, sh_flags, /sh_addralign and sh_entsize
fields of the output section match the output.  Since --only-keep-debug
turns all non-debug sections into SHT_NOBITS sections, the output
SHT_NOBITS type matches any input type.

bfd/

	PR binutils/18785
	* elf.c (_bfd_elf_copy_private_bfd_data): When copying the
	sh_link and sh_info fields in stripped section headers, we also
	check if the sh_type, sh_flags, /sh_addralign and sh_entsize
	fields of the output section match the output.  Since
	--only-keep-debug turns all non-debug sections into SHT_NOBITS
	sections, the output SHT_NOBITS type matches any input type.

binutils/testsuite/

	PR binutils/18785
	* binutils-all/objcopy.exp: Run strip-12.
	* binutils-all/strip-12.d: New file.
	* binutils-all/strip-12.s: Likewise.
2015-08-07 10:35:58 -07:00
H.J. Lu 6e33951edc Properly merge hidden versioned symbol
The hidden versioned symbol can only be merged with the versioned
symbol with the same symbol version.  _bfd_elf_merge_symbol should
check the symbol version before merging the new hidden versioned
symbol with the existing symbol.  _bfd_elf_link_hash_copy_indirect can't
copy any references to the hidden versioned symbol.   We need to
bind a symbol locally when linking executable if it is locally defined,
hidden versioned, not referenced by shared library and not exported.

bfd/

	PR ld/18720
	* elflink.c (_bfd_elf_merge_symbol): Add a parameter to indicate
	if the new symbol matches the existing one.  The new hidden
	versioned symbol matches the existing symbol if they have the
	same symbol version. Update the existing symbol only if they
	match.
	(_bfd_elf_add_default_symbol): Update call to
	_bfd_elf_merge_symbol.
	(_bfd_elf_link_assign_sym_version): Don't set the hidden field
	here.
	(elf_link_add_object_symbols): Override a definition only if the
	new symbol matches the existing one.
	(_bfd_elf_link_hash_copy_indirect): Don't copy any references to
	the hidden versioned symbol.
	(elf_link_output_extsym): Bind a symbol locally when linking
	executable if it is locally defined, hidden versioned, not
	referenced by shared library and not exported.  Turn on
	VERSYM_HIDDEN only if the hidden vesioned symbol is defined
	locally.

ld/testsuite/

	PR ld/18720
	* ld-elf/indirect.exp: Run tests for PR ld/18720.
	* ld-elf/pr18720.out: New file.
	* ld-elf/pr18720a.c: Likewise.
	* ld-elf/pr18720b.c: Likewise.
	* ld-elf/pr18720c.c: Likewise.
2015-08-07 05:04:35 -07:00
Nick Clifton 63b9bbb7d7 Change the behaviour of the --only-keep-debug option to objcopy and strip so that the sh_link and sh_info fields in stripped section headers are preserved.
bfd	* elf.c (_bfd_elf_copy_private_bfd_data): Copy the sh_link and
	sh_info fields of sections whose type has been changed to
	SHT_NOBITS.

bin	* doc/binutils.texi: Document that the --only-keep-debug option
	to strip and objcopy preserves the section headers of stripped
	sections.

tests	* binutils-all/objcopy.exp (keep_debug_symbols_and_check_links):
	New proc.  Checks that debug-info-only binaries retain the
	sh_link field in stripped sections.
2015-08-05 16:16:39 +01:00
Yuriy M. Kaminskiy 7e27a9d5f2 Fix stack buffer overflows when parsing corrupt ihex files.
PR binutils/18750
	* ihex.c (ihex_scan): Fixes incorrect escape sequence in error message
	and stack overflow when char is signed and \200-\376 was in place of hex
	digit; also fixes \377 was handled as EOF instead of "incorrect character".
	(ihex_read_section): Changed for consistency.
	(ihex_bad_byte): Prevent (now impossible to trigger) stack
	overflow and incorrect escape sequence handling.
	* srec.c (srec_bad_byte): Likewise.

	* readelf.c (process_mips_specific): Fix incorrect escape
	sequence handling.
2015-08-04 16:51:53 +01:00
Hans-Peter Nilsson 4122b41366 Fix ChangeLog for "FAIL: -Bsymbolic-functions" for cris-linux in ld
It's bfd_link_info, not elf_link_hash_entry, for the old reference:

	* elf32-cris.c (cris_elf_relocate_section)
	(elf_cris_finish_dynamic_symbol, cris_elf_check_relocs)
	(elf_cris_discard_excess_dso_dynamics): Use SYMBOLIC_BIND, not
	just bfd_link_info->symbolic, to check if a symbol should be bound
	symbolically.
2015-08-03 20:44:05 +02:00
Hans-Peter Nilsson cb1c8103f1 Fix "FAIL: -Bsymbolic-functions" for cris-linux in ld
* elf32-cris.c (cris_elf_relocate_section)
	(elf_cris_finish_dynamic_symbol, cris_elf_check_relocs)
	(elf_cris_discard_excess_dso_dynamics): Use SYMBOLIC_BIND, not
	just h->symbolic, to check if a symbol should be bound
	symbolically.
2015-08-03 20:34:51 +02:00
H.J. Lu c6e8a9a802 Don't change the default symbol for relocatable link
We should change the default symbol for the versioned symbol only when
not performing a relocatable link.

bfd/

	PR ld/18735
	* elflink.c (_bfd_elf_add_default_symbol): Add the default
	symbol if not performing a relocatable link.
	(elf_link_add_object_symbols): Adjust the default symbol if
	not performing a relocatable link.

ld/testsuite/

	PR ld/18735
	* ld-elf/pr18735.d: New file.
	* ld-elf/pr18735.s: Likewise.
2015-07-30 03:28:00 -07:00
H.J. Lu e77e648e93 Don't set link_info.executable for "ld -r"
This patch changes "ld -r" not to set link_info.executable.  It
removes !info->relocatable check for info->executable and adds it
for !info->executable in elflink.c.

bfd/

	* elflink.c (elf_link_add_object_symbols): Remove
	!info->relocatable check for info->executable.  Add
	!info->relocatable check for !info->executable.
	(elf_link_output_extsym): Remove
	!info->relocatable check for info->executable.

ld/

	* lexsup.c (parse_args): Don't set link_info.executable to
	TRUE for link_info.relocatable.
2015-07-29 09:14:05 -07:00
Hans-Peter Nilsson 11509220a0 bfd/mmo.c (MMIX): Fix massive gcc LTO testsuite failures.
* mmo.c (mmo_write_symbols_and_terminator): Skip symbol-type
	assignment loop for bfd plugin objects.
2015-07-29 05:40:30 +02:00
Alan Modra e5654c0f84 Fallout from "Reorder more powerpc64 sections for -z relro"
Commit 23283c1b changed the layout of some bss style sections on
powerpc64, but neglected to add a page gap before the third PT_LOAD
segment created by this reording.  Without a page gap we get two
PT_LOAD headers that overlap by one page in memory.  That shouldn't be
allowed because the dynamic loader will load garbage from the first
page of the last segment over the last page of the previous segment.

bfd/
	* elf.c (_bfd_elf_map_sections_to_segments): Do not make a new
	segment for loaded sections after nonloaded sections if the
	sections are on the same page.
ld/testsuite/
	* ld-powerpc/elfv2so.d: Update
2015-07-28 18:42:43 +09:30
Iain Buclaw d6f1bafa2c Check for asprintf and vasprintf during configure stage.
This should fix some build errors seen on AIX, MinGW, and possibly other
non-GNU systems too due to missing asprintf().

bfd/

	* configure.in: Add asprintf and vasprintf to AC_CHECK_DECLS.
	* config.in, configure: Regenerate.
2015-07-28 09:57:32 +02:00
H.J. Lu 37a42ee9ad Regenerate configure files
bfd/

	* configure: Regenerated.

binutils/

	* configure: Regenerated.

gas/

	* configure: Regenerated.

gold/

	* configure: Regenerated.

gprof/

	* configure: Regenerated.

ld/

	* configure: Regenerated.

opcodes/

	* configure: Regenerated.
2015-07-27 07:56:32 -07:00
Nick Clifton 79559014b2 Fix the address size computation for the MSP430 port.
* elf32-msp430.c (uses_large_model): New function.
	(msp430_elf_eh_frame_address_size): New function.
	(elf_backend_eh_frame_address_size): Define.
2015-07-27 15:15:28 +01:00
Szabolcs Nagy 32f573bcb3 [AArch64] Fix extern protected data handling
Emit *GLOB_DAT instead of *RELATIVE relocs for protected data
in shared objects.

This is needed for the fix of glibc bug 17711:
https://sourceware.org/bugzilla/show_bug.cgi?id=17711

bfd:
	PR ld/18705
	* elfnn-aarch64.c (elf_backend_extern_protected_data): Define.

ld/testsuite:
	PR ld/18705
	* ld-aarch64/protected-data.d: New.
	* ld-aarch64/protected-data.s: New.
	* ld-aarch64/aarch64-elf.exp: Add new test.
2015-07-27 11:48:48 +01:00
Szabolcs Nagy b68a20d667 [ARM] Fix extern protected data handling
Emit *GLOB_DAT instead of *RELATIVE relocs for protected data
in shared objects.

This is needed for the fix of glibc bug 17711:
https://sourceware.org/bugzilla/show_bug.cgi?id=17711

bfd:
	PR ld/18705
	* elf32-arm.c (elf_backend_extern_protected_data): Define.

ld/testsuite:
	PR ld/18705
	* ld-arm/protected-data.d: New.
	* ld-arm/protected-data.s: New.
	* ld-arm/arm-elf.exp: Add new test.
2015-07-27 11:45:27 +01:00
H.J. Lu 18d9555c6e Add missing ChangeLog files 2015-07-25 08:10:51 -07:00
Alan Modra a496fbc880 Fix broken -Bsymbolic-functions
For selected targets.  The testcase reveals a number of targets that
still need fixing.

bfd/
	* elf32-arm.c (elf32_arm_final_link_relocate): Use SYMBOLIC_BIND to
	check if a symbol should be bound symbolically.
	* elf32-hppa.c (elf32_hppa_check_relocs,
	elf32_hppa_adjust_dynamic_symbol, elf32_hppa_relocate_section,
	elf32_hppa_finish_dynamic_symbol): Likewise.
	* elf32-m68k.c (elf_m68k_check_relocs,
	elf_m68k_relocate_section): Likewise.
	* elf32-nios2.c (nios2_elf32_relocate_section,
	nios2_elf32_check_relocs, allocate_dynrelocs): Likewise.
	* elf32-tic6x.c (elf32_tic6x_finish_dynamic_symbol,
	elf32_tic6x_relocate_section): Likewise.
ld/testsuite/
	* ld-elf/symbolic-func.s,
	* ld-elf/symbolic-func.r: New test.
	* ld-elf/elf.exp: Run it.
2015-07-25 20:41:04 +09:30
Alan Modra 91cb26dac4 Correct reloc section name
* elf.c (_bfd_elf_assign_file_positions_for_non_load): Use .rela
	prefix for reloc section corresponding to rela section associated
	with renamed debug section.
2015-07-24 14:48:55 +09:30
Alan Modra 2fb9328d8d bfd_get_section_by_name_if hash chain traversal
This function stops too soon, as I found when the hash chain happened
to contain two .debug_macro sections and a .bss section:
.debug_macro -> .bss -> .debug_macro

	* section.c (bfd_get_section_by_name_if): Iterate over entire hash
	chain.
2015-07-24 14:48:35 +09:30
Joseph Myers d5cff5df74 Fix DT_MIPS_RLD_MAP_REL tag for n64 target and 32-bit host.
For the case of MIPS n64 target and 32-bit host, the computation of
the DT_MIPS_RLD_MAP_REL tag involves sdyn->output_section->vma +
sdyn->output_offset (64-bit) being added to b (32-bit host pointer),
so losing the high part and resulting in an incorrect
DT_MIPS_RLD_MAP_REL tag, and all dynamically linked glibc tests
failing for n64.  This patch fixes this (spot-tested with glibc tests;
however, I don't have a self-contained testcase for this bug).

	* elfxx-mips.c (_bfd_mips_elf_finish_dynamic_sections)
	<DT_MIPS_RLD_MAP_REL>: Add target address to host address
	difference, not to host pointer.
2015-07-23 21:52:04 +00:00
Alan Modra bb854a36d1 Fix ppc64 ELFv1 assertion failure
Bogus assembly can hit an assertion in opd_entry_value when the symbol
referenced by a function descriptor is undefined.  Worse, the code
after the assert copies unitialised memory to return the code section.
This uninitialised pointer can later be dereferencd, possibly causing
a linker segmentation fault.

	* elf64-ppc.c (opd_entry_value): Remove assertion.  Instead,
	return -1 if symbol referenced is not defined.  Tidy.
2015-07-22 19:20:38 +09:30
Alan Modra f2d7e0f450 Regen two files
bfd/
	* po/SRC-POTFILES.in: Regenerate.
binutils/
	* doc/Makefile.in: Regenerate.
2015-07-20 14:31:23 +09:30
Jiong Wang 4c0a9a6fa1 [AArch64] Sort TLS reloc types alphabetically 2015-07-17 13:03:26 +01:00
Jiong Wang 77a69ff840 [AArch64][3/3] LD support BFD_RELOC_AARCH64_TLSLD_ADR_PREL21 2015-07-16 15:46:21 +01:00
Jiong Wang 6c37fedc41 [AArch64][2/3] GAS support BFD_RELOC_AARCH64_TLSLD_ADR_PREL21 2015-07-16 15:43:21 +01:00
H.J. Lu 889884731e Properly convert objects between different ELF classes
The output SHF_COMPRESSED section size is different from input if
ELF classes of input and output aren't the same.  We must adjust
the section sizes as well as the compression headers in
SHF_COMPRESSED sections when converting objects between different
ELF classes.

bfd/

	 PR binutils/18656
	 * bfd.c (bfd_convert_section_size): New function.
	 (bfd_convert_section_contents): Likewise.
	 * bfd-in2.h: Regenerated.

binutils/

2015-07-10  H.J. Lu  <hongjiu.lu@intel.com>

	 PR binutils/18656
	 * objcopy.c (setup_section): Call bfd_convert_section_size
	 to get the output section size.
	 (copy_section): Get the section size from the output section
	 and call bfd_get_full_section_contents to convert section
	 contents for output.

binutils/testsuite/

	 PR binutils/18656
	 * binutils-all/compress.exp (convert_test): New proc.
	 Run conversion tests between x86-64 and x32.
2015-07-10 14:27:39 -07:00
Catherine Moore de231f2015 2015-07-09 Catherine Moore <clm@codesourcery.com>
* elflink.c (bfd_elf_size_dynamic_sections): Call to
        _bfd_elf_maybe_strip_eh_frame_hdr should be before
        bed->elf_backend_size_dynamic_sections.
2015-07-09 08:07:47 -07:00
Denis Chertykov 328e7bfdde Define DIFF_EXPR_OK for avr target to allow PC relative difference relocation.
When generating relocation (tc_gen_reloc) 32 bit relocation fixup
is changed to new 32 bit PC relative relocation if the fixup has pc-relative
flag set.

bfd/ChangeLog

2015-07-06  Pitchumani Sivanupandi <pitchumani.s@atmel.com>

    * elf32-avr.c: Add 32 bit PC relative relocation for AVR target.

gas/ChangeLog

2015-07-06  Pitchumani Sivanupandi <pitchumani.s@atmel.com>

    * config/tc-avr.c (tc_gen_reloc): Change 32 bit relocation to
    32 bit PC relative and update offset if the fixup is pc-relative.
    * config/tc-avr.h (DIFF_EXPR_OK): Define to enable PC relative diff
    relocs.

gas/testsuite/ChangeLog

2015-07-06  Pitchumani Sivanupandi <pitchumani.s@atmel.com>

    * gas/avr/pc-relative-reloc.d: New test for 32 bit pc relative reloc.
    * gas/avr/per-function-debugline.s: New test source.

include/ChangeLog

2015-07-06  Pitchumani Sivanupandi <pitchumani.s@atmel.com>

    * elf/avr.h: Add new 32 bit PC relative relocation.

ld/testsuite/ChangeLog

2015-07-06  Pitchumani Sivanupandi <pitchumani.s@atmel.com>

    * ld-avr/gc-section-debugline.d: New test.
    * ld-avr/per-function-debugline.s: Source for new test.
2015-07-08 21:41:52 +03:00
H.J. Lu 1a617dc351 Remove the merge conflict introduced by
commit 2f0c68f23b
Author: Catherine Moore <clm@codesourcery.com>
Date:   Thu May 28 14:50:36 2015 -0700

    Compact EH Support
2015-07-06 12:03:01 -07:00
Richard Sandiford 92a9c616e4 Fix an opd->append index in elf64-ppc.c
bfd/
	* elf64-ppc.c (toc_adjusting_stub_needed): Use the symbol value
	plus addend rather than the original st_value when looking up
	entries in opd->adjust.

ld/testsuite/
	* ld-powerpc/tocopt6-inc.s, ld-powerpc/tocopt6a.s,
	ld-powerpc/tocopt6b.s, ld-powerpc/tocopt6c.s,
	ld-powerpc/tocopt6.d: New test.
	* ld-powerpc/powerpc.exp (ppc64elftests): Add it.
2015-07-05 19:57:07 +01:00
Kai Tietz 0f088b2a94 Add experimental support for --gc-sections with COFF and PE based targets.
PR ld/11539
bfd	* coffcode.h (coff_bfd_gc_sections): Define default
	to bfd_coff_gc_sections function.
	* cofflink.c (init_reloc_cookie): Copy and adjust coff
	related code about gc-sections from elflink.c to here.
	(fini_reloc_cookie): Likewise.
	(init_reloc_cookie_rels): Likewise.
	(fini_reloc_cookie_rels): Likewise.
	(init_reloc_cookie_for_section): Likewise.
	(fini_reloc_cookie_for_section): Likewise.
	(_bfd_coff_gc_mark_hook): Likewise.
	(_bfd_coff_gc_mark_rsec): Likewise.
	(_bfd_coff_gc_mark_reloc): Likewise.
	(_bfd_coff_gc_mark): Likewise.
	(_bfd_coff_gc_mark_extra_sections): Likewise.
	(coff_gc_sweep_symbol_info): Likewise.
	(coff_gc_sweep_symbol): Likewise.
	(gc_sweep_hook_fn): Likewise.
	(coff_gc_sweep): Likewise.
	(bfd_coff_gc_sections): Likewise.
	(_bfd_coff_gc_keep): Likewise.
	* libcoff.h (coff_reloc_cookie): New struct.
	(bfd_coff_gc_sections): New prototype.
	(coff_gc_mark_hook_fn): New type.

ld	* scripttempl/pep.sc: Mark .idata*, .CRT*, .tls*,
	.rsrc*, .init, .ctor*, .dtor*, .fini, .jcr,
	.eh_frame, .pdata. .xdata, and .gcc_except_table sections
	as KEEP.
	* scripttempl/pe.sc: Likewise.
2015-07-03 15:50:29 +01:00
Sandra Loosemore 8c163c5a87 Relocations for Nios II R2
2015-07-01  Sandra Loosemore  <sandra@codesourcery.com>
	    Cesar Philippidis  <cesar@codesourcery.com>

	bfd/
	* bfd-in2.h: Regenerated.
	* elf32-nios2.c (elf_nios2_howto_table_rel): Rename to...
	(elf_nios2_r1_howto_table_rel): This.
	(elf_nios2_r2_howto_table_rel): New.
	(BFD_IS_R2): New.
	(lookup_howto): Add ABFD parameter.  Adjust to look up in either
	the R1 or R2 relocation table, as determined by ABFD.
	(nios2_reloc_map): Add R2 relocations.
	(nios2_elf32_bfd_reloc_type_lookup): Do lookup using lookup_howto.
	Pass it the ABFD parameter.
	(nios2_elf32_bfd_reloc_name_lookup): Use ABFD to decide whether to
	return an R1 or R2 relocation.
	(nios2_elf32_info_to_howto): Do lookup using lookup_howto.
	Pass it the ABFD parameter.
	(nios2_elf32_do_call26_relocate): Check for alignment on a 4-byte
	boundary.
	(nios2_elf32_relocate_section): Adjust call to lookup_howto.
	* libbfd.h: Regenerated.
	* reloc.c (BFD_RELOC_NIOS2_R2_S12): New.
	(BFD_RELOC_NIOS2_R2_I10_1_PCREL): New.
	(BFD_RELOC_NIOS2_R2_T1I7_1_PCREL): New.
	(BFD_RELOC_NIOS2_R2_T1I7_2): New.
	(BFD_RELOC_NIOS2_R2_T2I4): New.
	(BFD_RELOC_NIOS2_R2_T2I4_1): New.
	(BFD_RELOC_NIOS2_R2_T2I4_2): New.
	(BFD_RELOC_NIOS2_R2_X1I7_2): New.
	(BFD_RELOC_NIOS2_R2_X2L5): New.
	(BFD_RELOC_NIOS2_R2_F1I5_2): New.
	(BFD_RELOC_NIOS2_R2_L5I4X1): New.
	(BFD_RELOC_NIOS2_R2_T1X1I6): New.
	(BFD_RELOC_NIOS2_R2_T1X1I6_2): New.

	include/elf/
	* nios2.h (R_NIOS2_R2_S12): New.
	(R_NIOS2_R2_I10_1_PCREL): New.
	(R_NIOS2_R2_T1I7_1_PCREL): New.
	(R_NIOS2_R2_T1I7_2): New.
	(R_NIOS2_R2_T2I4): New.
	(R_NIOS2_R2_T2I4_1): New.
	(R_NIOS2_R2_T2I4_2): New.
	(R_NIOS2_R2_X1I7_2): New.
	(R_NIOS2_R2_X2L5): New.
	(R_NIOS2_R2_F1I5_2): New.
	(R_NIOS2_R2_L5I4X1): New.
	(R_NIOS2_R2_T1X1I6): New.
	(R_NIOS2_R2_T1X1I6_2): New.
	(R_NIOS2_ILLEGAL): Renumber.
2015-07-01 16:02:09 -07:00
Sandra Loosemore 965b1d8083 Add Nios II arch flags and compatibility tests
2015-07-01  Sandra Loosemore  <sandra@codesourcery.com>
	    Cesar Philippidis  <cesar@codesourcery.com>

	bfd/
	* archures.c (bfd_mach_nios2r1, bfd_mach_nios2r2): New.
	* bfd-in2.h: Regenerated.
	* cpu-nios2.c (nios2_compatible): New.
	(N): Use nios2_compatible instead of bfd_default_compatible.
	(NIOS2R1_NEXT, NIOS2R2_NEXT): Define.
	(arch_info_struct): New.
	(bfd_nios2_arch): Chain to NIOS2R1_NEXT.
	* elf32-nios2.c (is_nios2_elf): New.
	(nios2_elf32_merge_private_bfd_data): New.
	(nios2_elf32_object_p): New.
	(bfd_elf32_bfd_merge_private_bfd_data): Define.
	(elf_backend_object_p): Define.

	gas/
	* config/tc-nios2.c: Adjust includes.
	(OPTION_MARCH): Define.
	(md_longopts): Add -march option.
	(nios2_architecture): New.
	(nios2_use_arch): New.
	(md_parse_option): Handle OPTION_MARCH.
	(md_show_usage): Document -march.
	(md_begin): Set arch in BFD.
	(nios2_elf_final_processing): New.
	* config/tc-nios2.h (elf_tc_final_processing): Define.
	(nios2_elf_final_processing): New.
	* doc/c-nios2.texi (-march): Add documentation.

	include/elf/
	* nios2.h (EF_NIOS2_ARCH_R1, EF_NIOS2_ARCH_R2): Define.

	ld/testsuite/
	* ld-nios2/mixed1a.d: New.
	* ld-nios2/mixed1a.s: New.
	* ld-nios2/mixed1b.d: New.
	* ld-nios2/mixed1b.s: New.
	* ld-nios2/nios2.exp: Build the new compatibility tests.
2015-07-01 15:55:28 -07:00
H.J. Lu dfc87947b5 Refactor elf_x86_64_convert_mov_to_lea
* elf64-x86-64.c (elf_x86_64_convert_mov_to_lea): Refactor.
2015-07-01 09:33:27 -07:00
Nick Clifton 5ee4a1ca16 This fixes parsing a file containing ELF attributes with very large tag values.
PR binutils/18570
	* elf-attrs.c (obj_attr_size): Use an unsigned int type for the tag.
	(write_obj_attribute): Likewise.
	(elf_new_obj_attr): Likewise.
	(bfd_elf_get_obj_attr_int): Likewise.
	(bfd_elf_add_obj_attr_int): Likewise.
	(bfd_elf_add_obj_attr_string): Likewise.
	(bfd_elf_add_obj_attr_int_string): Likewise.
	(gnu_obj_attrs_arg_type): Likewise.
	(_bfd_elf_obj_attrs_arg_type): Likewise.
	(_bfd_elf_parse_attributes): Likewise.
	(_bfd_elf_merge_unknown_attribute_list): Likewise.
	* elf-bfd.h (struct obj_attribute_list): Likewise.
	Update prototypes.
2015-06-30 17:12:47 +01:00
H.J. Lu ee0c0c503d Remove COMPRESS_DEBUG_ZLIB
COMPRESS_DEBUG_ZLIB isn't needed.  This patch removes COMPRESS_DEBUG_ZLIB
and replace COMPRESS_DEBUG_ZLIB with COMPRESS_DEBUG_GNU_ZLIB.

bfd/

	* bfd-in.h (compressed_debug_section_type): Remove
	COMPRESS_DEBUG_ZLIB.
	* bfd-in2.h : Regenerated.
gas/

	* as.c (parse_args): Replace COMPRESS_DEBUG_ZLIB with
	COMPRESS_DEBUG_GNU_ZLIB.
	* config/tc-i386.c (flag_compress_debug): Likewise.

ld/

	* emultempl/elf32.em  (gld${EMULATION_NAME}_handle_option):
	Replace COMPRESS_DEBUG_ZLIB with COMPRESS_DEBUG_GNU_ZLIB.
2015-06-28 06:30:10 -07:00
Matthew Fortune a5499fa464 Add support for DT_MIPS_RLD_MAP_REL.
This tag makes it possible to access the debug map when debugging position
independent executables.

bfd/

	* elfxx-mips.c (_bfd_mips_elf_create_dynamic_sections): Use executable
	instead of !shared to indicate an application vs shared library.
	(_bfd_mips_elf_size_dynamic_sections): Likewise.
	(_bfd_mips_elf_finish_dynamic_sections): Handle DT_MIPS_RLD_MAP_REL.
	(_bfd_mips_elf_get_target_dtag): Likewise.

binutils/

	* readelf.c (get_mips_dynamic_type): Handle DT_MIPS_RLD_MAP_REL.

include/

	* elf/mips.h (DT_MIPS_RLD_MAP_REL): New macro.

ld/testsuite/

	* ld-mips-elf/pic-and-nonpic-3b.ad: Adjust for extra dynamic tag.
	* ld-mips-elf/pic-and-nonpic-4b.ad: Likewise.
	* ld-mips-elf/pic-and-nonpic-5b.ad: Likewise.
	* ld-mips-elf/pic-and-nonpic-6-n32.ad: Likewise.
	* ld-mips-elf/pic-and-nonpic-6-n64.ad: Likewise.
	* ld-mips-elf/pic-and-nonpic-6-o32.ad: Likewise.
	* ld-mips-elf/tlsdyn-o32-1.d: Likewise.
	* ld-mips-elf/tlsdyn-o32-1.got: Likewise.
	* ld-mips-elf/tlsdyn-o32-2.d: Likewise.
	* ld-mips-elf/tlsdyn-o32-2.got: Likewise.
	* ld-mips-elf/tlsdyn-o32-3.d: Likewise.
	* ld-mips-elf/tlsdyn-o32-3.got: Likewise.
	* ld-mips-elf/tlsdyn-o32.d: Likewise.
	* ld-mips-elf/tlsdyn-o32.got: Likewise.
	* ld-mips-elf/pie-n32.d: New file.
	* ld-mips-elf/pie-n64.d: Likewise.
	* ld-mips-elf/pie-o32.d: Likewise.
	* ld-mips-elf/pie.s: Likewise.
	* ld-mips-elf/mips-elf.exp: Add new tests.
2015-06-26 11:53:33 +01:00
DJ Delorie 3f3070745b Fix REL handling for MSP430
* elf32-msp430.c (msp430_final_link_relocate): Fix comments.  Fix
REL loads to match RELA stores.
2015-06-25 17:20:15 -04:00
H.J. Lu 946748d5ed Don't set sh_size for .shstrtab twice
_bfd_elf_assign_file_positions_for_non_load will set the sh_size
field for .shstrtab section.  There is need to initialize it in
_bfd_elf_compute_section_file_positions.

	* elf.c (_bfd_elf_compute_section_file_positions): Don't
	initialize sh_size for .shstrtab here.
2015-06-25 13:04:07 -07:00
H.J. Lu ef10c3ace0 Use strtab with GC and suffix merging for .strtab
This patch uses ELF strtab with GC and suffix merging support to create
ELF .strtab section.  There is some small memory overhead to use ELF
strtab:

==14928== HEAP SUMMARY:
==14928==     in use at exit: 3,276,318 bytes in 679 blocks
==14928==   total heap usage: 1,544 allocs, 865 frees, 15,259,146 bytes allocated

vs.

==14936== HEAP SUMMARY:
==14936==     in use at exit: 3,276,318 bytes in 679 blocks
==14936==   total heap usage: 1,532 allocs, 853 frees, 15,026,402 bytes allocated

when running:

./ld-new -m elf_x86_64 -o tmpdir/ld-partial.o -r ldgram.o ldlex-wrapper.o lexsup.o ldlang.o mri.o ldctor.o ldmain.o plugin.o ldwrite.o ldexp.o ldemul.o ldver.o ldmisc.o ldfile.o ldcref.o eelf_x86_64.o eelf32_x86_64.o eelf_i386.o eelf_iamcu.o ei386linux.o eelf_l1om.o eelf_k1om.o ldbuildid.o

The results are

  [32] .strtab STRTAB 0+ 3beff8 00407a 00 0 0 1

vs

  [32] .strtab STRTAB 0+ 3beff8 0041d8 00 0 0 1

It reduces the .strtab size by 350 bytes, about 2%

Saving on libc.so from glibc is much more since libc.so has many alias
symbols with the same suffix.  For x32 glibc,

 [82] .strtab STRTAB 0+ 81b348 0159e7 00 0 0 1

vs

 [82] .strtab STRTAB 0+ 81b8bc 019e72 00 0 0 1

It reduces the .strtab size by 17547 bytes, about 16%.

bfd/

	PR gas/18451
	* elf-bfd.h (elf_sym_strtab): New.
	(elf_link_hash_table): Add strtabcount, strtabsize and
	strtab.
	(_bfd_elf_stringtab_init): Removed.
	* elf.c (_bfd_elf_stringtab_init): Removed.
	(_bfd_elf_compute_section_file_positions): Replace
	bfd_strtab_hash/_bfd_elf_stringtab_init/_bfd_stringtab_free/
	_bfd_stringtab_size with
	elf_strtab_hash/_bfd_elf_strtab_init/_bfd_elf_strtab_free/
	_bfd_elf_strtab_size.  Use _bfd_elf_strtab_add,
	_bfd_elf_strtab_finalize and _bfd_elf_strtab_offset to get
	st_name.
	(swap_out_syms): Likewise.
	* elflink.c (elf_final_link_info): Replace bfd_strtab_hash
	with elf_strtab_hash.  Remove symbuf, symbuf_count,
	symbuf_size and shndxbuf_size.
	(elf_link_flush_output_syms): Removed.
	(elf_link_output_sym): Renamed to ...
	(elf_link_output_symstrtab): This.  Replace _bfd_stringtab_add
	with _bfd_elf_strtab_add.  Don't flush symbols to the file nor
	swap out symbols.
	(elf_link_swap_symbols_out): New.
	(elf_link_output_extsym): Replace elf_link_output_sym with
	elf_link_output_symstrtab.
	(elf_link_input_bfd): Likewise.
	(elf_final_link_free): Replace _bfd_stringtab_free with
	_bfd_elf_strtab_free.  Remove symbuf.
	(bfd_elf_final_link): Replace _bfd_elf_stringtab_init with
	_bfd_elf_strtab_init.  Don't set symbuf, symbuf_count,
	symbuf_size nor shndxbuf_size.  Initialize strtabsize and
	strtab.  Initialize symshndxbuf to -1 when number of sections
	>= 64K.  Replace elf_link_output_sym/elf_link_output_sym with
	elf_link_output_symstrtab/elf_link_output_symstrtab. Don't
	call elf_link_flush_output_syms.  Call _bfd_elf_strtab_finalize
	and elf_link_swap_symbols_out.  Replace _bfd_stringtab_size
	and _bfd_stringtab_emit with _bfd_elf_strtab_size and
	_bfd_elf_strtab_emit.

gas/testsuite/

	PR gas/18451
	* gas/elf/elf.exp: Run strtab.
	* gas/elf/strtab.d: New file.
	* gas/elf/strtab.s: Likewise.

ld/testsuite/

	PR gas/18451
	* ld-elf/strtab.d: New file.
	* ld-elf/strtab.s: Likewise.
2015-06-25 08:16:14 -07:00