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Author SHA1 Message Date
Frank Ch. Eigler
6c9e0292a3 * memory corruption fix 
Wed Mar 22 15:24:21 2000  glen mccready  <gkm@pobox.com>

	* wrapper.c (sim_open,sim_close): Copy into myname, free myname.
 2000-03-23 23:28:43 +00:00
Frank Ch. Eigler
cb7450ea08 * simplify eCos testing 
2000-03-21  Frank Ch. Eigler  <fche@redhat.com>

	* interp.c (sim_open): Sort & extend dummy memory regions for
	--board=jmr3904 for eCos.
 2000-03-21 20:45:43 +00:00
Jeff Johnston
0f831eb384 2000-03-13 Jeff Johnston <jjohnstn@cygnus.com> 
* cgen-ops.h: Added TRUNCSISI.
 2000-03-13 23:51:48 +00:00
Frank Ch. Eigler
e88acae792 * extension 
2000-03-08  Dave Brolley  <brolley@redhat.com>

	* cgen-par.h (cgen_write_queue_kind): Add CGEN_FN_SF_WRITE.
	(CGEN_WRITE_QUEUE_ELEMENT): Add fn_sf_write.
	(sim_queue_fn_si_write): Last argument is has type USI.
	(sim_queue_fn_sf_write): New function.
	* cgen-par.c (sim_queue_fn_si_write): Declare 'value' as USI.
	(sim_queue_fn_sf_write): New function.
	(cgen_write_queue_element_execute): Handle CGEN_FN_SF_WRITE.
 2000-03-08 21:09:41 +00:00
Frank Ch. Eigler
a05391975e * build fix 
2000-03-07  Frank Ch. Eigler  <fche@redhat.com>

	From John Dallaway  <jld@redhat.co.uk>:
	* Makefile.in (install-sis): Add $(EXEEXT) for Windows host.
 2000-03-07 15:32:49 +00:00
Frank Ch. Eigler
8ae7f924f3 * moved misplaced ChangeLog entry 2000-03-04 12:46:44 +00:00
Andrew Cagney
7158fd7f9b Transfer SIM maintainership to Frank. 2000-03-04 06:27:00 +00:00
Frank Ch. Eigler
a9e3a73989 * build fix 
2000-03-03  Alexandre Oliva  <oliva@lsd.ic.unicamp.br>

	* Makefile.in (IGEN_INSN): Added am33.igen.
 2000-03-03 23:25:10 +00:00
Frank Ch. Eigler
0ef33cd05d * build patch 
2000-03-03  Jonathan Larmour  <jlarmour@redhat.co.uk>

	* func.c (buffer_read_memory): Change type of size to unsigned to
	match prototype
 2000-03-03 15:00:58 +00:00
Frank Ch. Eigler
4cd9361480 * comment tweaks 2000-03-02 22:42:51 +00:00
Frank Ch. Eigler
d018757450 * adding forgotten entry 2000-03-02 21:53:51 +00:00
Frank Ch. Eigler
a3027dd748 * autoconf correction 
* merge from internal repo -> sourceware

2000-03-02  Frank Ch. Eigler  <fche@redhat.com>

	* configure: Regenerated.

Tue Feb  8 18:35:01 2000  Donald Lindsay  <dlindsay@hound.cygnus.com>

	* interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
	calls, conditional on the simulator being in verbose mode.
 2000-03-02 18:14:02 +00:00
Frank Ch. Eigler
58fddbac5a * whitespace correction 2000-03-02 18:12:44 +00:00
Andrew Cagney
baa7ae6f10 When SIM_HAVE_ENVIRONMENT: use sim_set_trace() to enable tracing 
instead of sim_trace() to run the program; include support for ``-o''
option (operating environment); when a signal occurs, only continue
execution when operating environment mode.
Update d10v.
 2000-02-22 08:52:21 +00:00
Nick Clifton
3dfcd3c614 Fix fclose() emulation 2000-02-14 19:49:48 +00:00
Nick Clifton
63a027a3fb Add support for M340 processor 2000-02-10 21:59:03 +00:00
Andrew Cagney
7fc5b5adca Report SIGBUS and halt simulation when ld/st detect a misaligned address. 2000-02-09 05:08:42 +00:00
Jason Molenda
25c1c39719 2000-02-08 Jason Molenda (jsm@bugshack.cygnus.com) 
* sim/ChangeLog:  Dummy whitespace change to kick off a test
	cvs commit message.
 2000-02-09 00:07:53 +00:00
Nick Clifton
6d358e869b Fix compile time warning messages. 2000-02-08 20:54:27 +00:00
Jason Molenda
a9e0ce2c0c 2000-02-06 Jason Molenda (jsm@bugshack.cygnus.com) 
* gdb/ChangeLog:  Whitespace change to test cvs logging.
	* sim/ChangeLog:  Ditto, but in a separate dir.
 2000-02-07 02:14:29 +00:00
Jason Molenda
dfcd3bfb6f import gdb-2000-02-04 snapshot 2000-02-05 07:30:26 +00:00
Jason Molenda
f743149ecb import gdb-2000-01-26 snapshot 2000-01-26 21:49:14 +00:00
Jason Molenda
0fda6bd286 import gdb-2000-01-24 snapshot 2000-01-25 02:40:50 +00:00
Jason Molenda
c5394b80ae import gdb-2000-01-17 snapshot 2000-01-18 00:55:13 +00:00
Jason Molenda
c3f6f71df3 import gdb-2000-01-05 snapshot 2000-01-06 03:07:20 +00:00
Jason Molenda
ed9a39ebf9 import gdb-1999-12-21 snapshot 1999-12-22 21:45:38 +00:00
Jason Molenda
c4093a6ab3 import gdb-1999-12-13 snapshot 1999-12-14 01:06:04 +00:00
Jason Molenda
de57eccd12 import gdb-1999-12-07 snapshot 1999-12-08 02:51:13 +00:00
Jason Molenda
c2d11a7da0 import gdb-1999-12-06 snapshot 1999-12-07 03:56:43 +00:00
Jason Molenda
4ce44c668d import gdb-1999-11-16 snapshot 1999-11-17 02:31:06 +00:00
Jason Molenda
11cf874164 import gdb-1999-11-08 snapshot 1999-11-09 01:23:30 +00:00
Jason Molenda
5c44784c11 import gdb-1999-11-01 snapshot 1999-11-02 04:44:47 +00:00
Jason Molenda
e514a9d642 import gdb-1999-10-25 snapshot 1999-10-26 03:43:48 +00:00
Jason Molenda
917317f4c6 import gdb-1999-10-18 snapshot 1999-10-19 02:47:02 +00:00
Jason Molenda
2df3850c7b import gdb-1999-10-11 snapshot 1999-10-12 04:37:53 +00:00
Jason Molenda
2acceee218 import gdb-1999-10-04 snapshot 1999-10-05 23:13:56 +00:00
Jason Molenda
6426a772a2 import gdb-1999-09-28 snapshot 1999-09-28 21:55:21 +00:00
Jason Molenda
c2c6d25f0d import gdb-1999-09-21 1999-09-22 03:28:34 +00:00
Jason Molenda
cff3e48be7 import gdb-1999-09-13 snapshot 1999-09-13 21:40:00 +00:00
Stan Shebs
d4f3574e77 import gdb-1999-09-08 snapshot 1999-09-09 00:02:17 +00:00
Jason Molenda
104c1213b4 import gdb-1999-08-30 snapshot 1999-08-31 01:14:27 +00:00
Jason Molenda
53a5351d90 import gdb-1999-08-23 snapshot 1999-08-23 22:40:00 +00:00
Jason Molenda
96baa820df import gdb-1999-08-09 snapshot 1999-08-09 21:36:23 +00:00
Jason Molenda
a0b3c4fd32 import gdb-1999-08-02 snapshot 1999-08-02 23:48:37 +00:00
Jason Molenda
adf40b2e16 import gdb-1999-07-19 snapshot 1999-07-19 23:30:11 +00:00
Jason Molenda
43e526b9b4 import gdb-1999-07-12 snapshot 1999-07-12 11:15:22 +00:00
Jason Molenda
9846de1bb5 import gdb-1999-07-07 pre reformat 1999-07-07 17:31:57 +00:00
Jason Molenda
3535ad499b import gdb-1999-07-05 snapshot 1999-07-06 00:58:41 +00:00
Jason Molenda
43ff13b418 import gdb-1999-07-05 snapshot 1999-07-05 17:58:44 +00:00
Jason Molenda
085dd6e638 import gdb-1999-06-28 snapshot 1999-06-28 16:06:02 +00:00
Jason Molenda
ac9a91a77c import gdb-1999-06-01 snapshot 1999-06-01 15:44:41 +00:00
Jason Molenda
392a587b05 import gdb-1999-05-25 snapshot 1999-05-25 18:09:09 +00:00
Jason Molenda
9e086581c7 import gdb-1999-0519 1999-05-19 19:58:41 +00:00
Stan Shebs
cd0fc7c3eb import gdb-1999-05-10 1999-05-11 13:35:55 +00:00
Stan Shebs
b83266a0e1 import gdb-19990504 snapshot 1999-05-05 14:45:51 +00:00
Stan Shebs
2d514e6f36 import gdb-19990422 snapshot 1999-04-27 01:33:01 +00:00
Stan Shebs
7a292a7adf import gdb-19990422 snapshot 1999-04-26 18:34:20 +00:00
Stan Shebs
c906108c21 Initial creation of sourceware repository 1999-04-16 01:35:26 +00:00
Stan Shebs
071ea11e85 Initial creation of sourceware repository 1999-04-16 01:34:07 +00:00
Doug Evans
8d3b723419 * sparc-desc.c: New file. 
* sparc-desc.h: New file.
	* sparc-opc.h: New file.
	* decode64.c: New file.
	* decode64.h: New file.
	* sem64.c: New file.
	* cpu64.c: New file.
	* cpu64.h: New file.
	* model64.h: New file.
	* mloop64.in: New file.
	* regs64.h: New file.
	* trap64.c: New file.
	* cpu32.h,decode32.c,decode32.h,model32.c,sem32.c: Rebuild.
 1999-02-10 23:39:09 +00:00
Doug Evans
c14d22a7a7 * Makefile.in (SPARC64_OBJS): Add dev64.o. 
(CPU_OBJS): New variable.
	(SIM_OBJS): Add sparc-desc.o.
	(SIM_EXTRA_DEPS): Replace cpu-opc.h with sparc-desc.h.
	(sim-core.o): Add dev64.h dependency.
	(dev64.o): Add rule.
	(stamp-arch,stamp-cpu32): Update FLAGS variable, option syntax changed.
	(stamp-cpu64): Ditto.
	(stamp-desc): New rule.
	* configure.in (sim_link_files,sim_link_links): Delete.
	Set cpu_objs to one of SPARC32_OBJS,SPARC64_OBJS.
	* configure: Rebuild.
	* acconfig.h: Rebuild.
	* config.in: Rebuild.
	* dev64.c: New file.
	* dev64.h: New file.
	* sparc64.c: New file.
	* trap64.h: New file.
	* arch.c,arch.h,cpuall.h: Rebuild.
	* cpu32.c,decode32.c,decode32.h,model32.c,sem32.c: Rebuild.
	* sim-if.c (sparc_disassemble_insn): New function.
	(sim_open): sparc_cgen_cpu_open renamed from sparc_cgen_opcode_open.
	Set disassembler.
	(sim_close): sparc_cgen_cpu_open renamed from sparc_cgen_opcode_open.
	* sim-main.h: Don't include cpu-opc.h,cpu-sim.h. Include
	sparc-desc.h,sparc-opc.h,sparc-sim.h.
 1999-02-10 09:42:33 +00:00
Doug Evans
9aa2d8ddaf * Makefile.in (SIM_EXTRA_DEPS): Add m32r-desc.h, delete cpu-opc.h. 
(stamp-arch,stamp-cpu): Update FLAGS variable, option syntax changed.
	(stamp-xmloop): s/-parallel/-parallel-write/.
	(stamp-xcpu): Update FLAGS variable, option syntax changed.
	* configure.in (sim_link_files,sim_link_links): Delete.
	* configure: Rebuild.
	* decode.c,decode.h,model.c,sem-switch.c,sem.c: Rebuild.
	* decodex.c,decodex.h,modelx.c,semx-switch.c: Rebuild.
	* mloop.in (execute): CGEN_INSN_ATTR renamed to CGEN_INSN_ATTR_VALUE.
	* sim-if.c (sim_open): m32r_cgen_cpu_open renamed from
	m32r_cgen_opcode_open.  Set disassembler.
	(sim_close): m32r_cgen_cpu_open renamed from m32r_cgen_opcode_open.
	* sim-main.h: Don't include cpu-opc.h,cpu-sim.h. Include
	m32r-desc.h,m32r-opc.h,m32r-sim.h.
 1999-02-10 09:23:35 +00:00
Doug Evans
2d84b54332 * configure.in (sparc*): Configure sparc subdir if --with-cgen or 
--with-cgen-sim.
	* configure: Rebuild.
 1999-02-10 08:56:15 +00:00
Nick Clifton
4145dbc306 Add support for StrongARM target 1999-02-08 12:44:13 +00:00
DJ Delorie
944014510b oops, wrong branch - cvs mistake 1999-02-06 01:14:52 +00:00
DJ Delorie
a76051d231 merge from main branch for danlite/sparc86x merge 1999-02-06 01:08:02 +00:00
Jeff Law
579d9a9749 m32rx -> cygnus sanitization change. 1999-02-05 17:39:42 +00:00
Frank Ch. Eigler
e346625314 * Fix for PR 17794, brought over from ecc-98r1-branch. 
1999-02-05  Frank Ch. Eigler  <fche@cygnus.com>
	* dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
 	CPU, start periodic background I/O polls.
	(tx3904sio_poll): New function: periodic I/O poller.
 1999-02-05 13:55:16 +00:00
Doug Evans
c2ebe6b880 * cpux.h,decodex.c,modelx.c,semx-switch.c: Regenerate. 
Plus s/sanitize-m32rx/sanitize-cygnus/
 1999-02-05 00:15:14 +00:00
Gavin Romig-Koch
d0d495f601 improve sanitation 1999-02-04 21:23:37 +00:00
Doug Evans
8ad50a7304 cgen generated files for sparc simulator 1999-02-02 21:50:12 +00:00
Doug Evans
cac2f51851 configure sparc subdir if --with-cgen 1999-02-02 20:40:33 +00:00
Doug Evans
cd6245ce70 sparc cgen port 1999-02-02 19:38:43 +00:00
Doug Evans
27a9a44af7 lose sparc for now 1999-02-02 19:17:42 +00:00
Nick Clifton
a21a12e39e Remove v850e sanitization 1999-02-01 11:21:32 +00:00
Doug Evans
eb2346970a * cpu.h,decode.c,model.c,sem-switch.c,sem.c: Rebuild. 
* cpux.h,decodex.c,modelx.c,semx-switch.c: Rebuild.
 1999-01-28 06:51:00 +00:00
Doug Evans
988e60c43b * cgen-engine.h (EXTRACT_LSB0_{INT,UINT}): Fix. 1999-01-28 01:37:10 +00:00
Doug Evans
89b1cfbbd5 * sim-profile.h: Make like sim-trace.h. 
(PROFILE_USEFUL_MASK): New macro.
	* sim-profile.c (profile_options): Make like trace_options, allow
	optional on|off arg where applicable.
	(set_profile_option_mask): New function.
	(sim_profile_set_option): New function.
	(profile_option_handler): Simplify.
	Have -p only enable selected things, not everything.
	Add missing break to OPTION_PROFILE_PC_RANGE.
	* cgen-scache.c (scache_options): Allow optional on|off arg to
	--profile-scache.
	(scache_option_handler): Use sim_profile_set_option.
 1999-01-28 01:28:03 +00:00
Jason Molenda
df59058c91 1999-01-26 Jason Molenda (jsm@bugshack.cygnus.com) 
* simops.c (OP_5605): Sign extend MIN32 and MAX32 before saturation
        comparison.
        (OP_5607): Ditto.
        (OP_2A00): Ditto.
        (OP_2800): Ditto.

PRs 18435 18436 18437 18439.
 1999-01-27 01:51:26 +00:00
Jeff Law
1ec21625d0 am33 is now kept with --keep-cygnus. 1999-01-26 14:02:27 +00:00
Frank Ch. Eigler
a07304dfa3 * Update copyright year. 1999-01-26 11:34:10 +00:00
Frank Ch. Eigler
37bb465135 * Implement --memory-fill and fix --memory-clear options, 
for internal PR 18869 and 18870.
1999-01-26  Frank Ch. Eigler  <fche@cygnus.com>
	* sim-memopt.c (memory_options): Add MEMORY_FILL option.
	(memory_option_handler): Implement MEMORY_FILL option.  Make
 	MEMORY_CLEAR an alias for MEMORY_FILL=0.
	(parse_ulong_value): New function.
	(do_memopt_add): Allocate all buffers.  Optionally fill them.
 1999-01-26 11:29:17 +00:00
James Lemke
b5a10831c4 Initial implementation of fixes for MPC860 version C0 & earlier. 1999-01-22 21:53:57 +00:00
Doug Evans
363e6264be sanitize last entry 1999-01-15 08:29:15 +00:00
Doug Evans
ddfae34d82 * Makefile.in (stamp-arch): Pass FLAGS to cgen. 
* arch.c,arch.h,cpuall.h: Regenerate.
	* cpu.c,cpu.h,decode.c,decode.h,model.c,sem-switch.c,sem.c: Regenerate.
	* traps.c (sim_engine_invalid_insn): PCADDR->IADDR.
	* cpux.c,cpux.h,decodex.c,decodex.h,modelx.c,semx-switch.c: Regenerate.
 1999-01-15 07:27:00 +00:00
Doug Evans
976a48e6c3 * cgen-defs.h (PCADDR,CIA): Define in terms of IADDR. 
(sim_disassemble_insn): Update prototype.
	(sim_engine_invalid_insn): Ditto.
	* cgen-engine.h (SEMANTIC_FN): Add !WITH_SCACHE version.
	(SEM_BRANCH_INIT): PCADDR->IADDR.
	(SEM_NBRANCH_FINI): New macro for !WITH_SCACHE case.
	* cgen-scache.c (scache_lookup,scache_lookup_or_alloc): PCADDR->IADDR.
	* cgen-scache.h (*): Ditto.
	* cgen-trace.c (*): Ditto.
	* cgen-trace.h (*): Ditto.
	* cgen-utils.c (*): Ditto.
	* cgen-types.h (integer modes): Use signedNN/unsignedNN types.
	(insn_t): Delete.
	* genmloop.sh (@cpu@_fill_argbuf): Add !WITH_SCACHE support.
	(simple engine framework): Rewrite.
	* sim-module.c (modules): Install model module sooner (and in
	particular before the profile module).
 1999-01-15 07:02:30 +00:00
Jason Molenda
984b70f0c8 1999-01-13 Jason Molenda (jsm@bugshack.cygnus.com) 
* t-sadd.s: New file.
	* Makefile.in (TESTS): Add t-sadd.

PR 18438.
 1999-01-14 00:46:01 +00:00
Doug Evans
9e507b690e * cgen-trace.c (trace_insn): Pass pc to trace_prefix for virtual insns. 1999-01-12 21:46:47 +00:00
Doug Evans
cee25b7cb8 * sim-model.h (sim_mach_lookup_bfd_name): Add prototype. 
* sim-model.c (sim_mach_lookup_bfd_name): New function.
	(sim_model_init): Call it.
 1999-01-12 21:25:21 +00:00
Dave Brolley
e1ef54a703 Add new test cases to the list of files to be kept. 1999-01-12 16:27:49 +00:00
Doug Evans
533a502faf * Makefile.in (m32r-clean): rm eng.h. 1999-01-12 00:37:47 +00:00
Doug Evans
e64b6cd434 * sim-main.h: Delete inclusion of ansidecl.h. 
* cpu.h: Regenerate.
	* cpux.h: Regenerate.
 1999-01-12 00:25:41 +00:00
Doug Evans
e5e95c7d80 keep fr30 1999-01-11 23:16:57 +00:00
Doug Evans
b83dc7fc11 keep fr30-elf 1999-01-11 23:15:16 +00:00
Doug Evans
5759b13198 fix typo in comment 1999-01-11 23:14:23 +00:00
Frank Ch. Eigler
6402c01cc2 * gx sim prototype tweaks 
start-sanitize-gxsim
1999-01-11  Frank Ch. Eigler  <fche@cygnus.com>
	* sim-gx-run.c (sim_engine_run): Allay warnings.  Write out updated
	gx block list after each successful compilation job.
	* sim-gx.c (sim_gx_compiled_block_f): dlopen the main executable
	image, to allow gx block DLLs to resolve symbols there.
	(sim_gx_{read,write}_block_list): Allay warnings.
	(sim_gx_block_translate): Allay warnings.  Add $GX_FLAGS to
	gx compilation/link jobs.
	* sim-gx.h: Allay warnings.
end-sanitize-gxsim
 1999-01-11 15:06:11 +00:00
Frank Ch. Eigler
11f9c65f91 * build tweak for gx prototype 1999-01-11 15:04:33 +00:00
Frank Ch. Eigler
3372836e0d * Test for PR 18288 and its predecessors. 
1999-01-11  Frank Ch. Eigler  <fche@cygnus.com>
	* do-flags.S: New test for parallel PSW update conflicts.
	* Makefile.in (TESTS): Run it.
 1999-01-11 14:48:48 +00:00
Frank Ch. Eigler
0e854a2019 * Removing last known memories of tx3904 and am30 sanitization. 1999-01-07 13:06:14 +00:00
Frank Ch. Eigler
0d320ebfc9 * Test for PR 18679. 
1999-01-07  Frank Ch. Eigler  <fche@cygnus.com>
	* do-2wordops.S: New test for sign-extension by ld2h.
 1999-01-07 08:55:49 +00:00
Doug Evans
e0eaa63837 * cpu.h: Regenerate. 
* cpux.h: Regenerate.
 1999-01-07 00:08:46 +00:00
Doug Evans
368fc7dba8 * Makefile.in (MAIN_INCLUDE_DEPS): Delete. 
(INCLUDE_DEPS,OPS_INCLUDE_DEPS): Delete.
	(sim-if.o): Use SIM_MAIN_DEPS.
	(arch.o,traps.o,devices.o): Ditto.
	(M32RBF_INCLUDE_DEPS): Use CGEN_MAIN_CPU_DEPS.
	(m32r.o,mloop.o,cpu.o,decode.o,sem.o,model.o): Simplify dependencies.
	(m32rx.o,mloopx.o,cpux.o,decodex.o,semx.o,modelx.o): Ditto.
	(stamp-arch): Pass mach=all to cgen-arch.
	* cpu.c,cpu.h,decode.c,model.c,sem-switch.c,sem.c: Regenerate.
	* m32r-sim.h (fr30bf_h_cr_[gs]et_handler): Declare.
	([GS]ET_H_CR): Define.
	(fr30bf_h_psw_[gs]et_handler): Declare.
	([GS]ET_H_PSW): Define.
	(fr30bf_h_accum_[gs]et_handler): Declare.
	([GS]ET_H_ACCUM): Define.
	(fr30xf_h_{cr,psw,accum}_[gs]et_handler): Declare.
	(fr30bf_h_accums_[gs]et_handler): Declare.
	([GS]ET_H_ACCUMS): Define.
	* sim-if.c (sim_open): Model probing code moved to sim-model.c.
	* m32r.c (WANT_CPU): Define as m32rbf.
	(all register access fns): Rename to ..._handler.
	* cpux.c,cpux.h,decodex.c,modelx.c,semx.c: Regenerate.
	* m32rx.c (WANT_CPU): Define as m32rxf.
	(all register access fns): Rename to ..._handler.
 1999-01-06 03:04:25 +00:00
Doug Evans
f5cd4d758c * Make-common.in (CGEN_INCLUDE_DEPS): Add cgen-defs.h, cgen-engine.h. 
(CGEN_MAIN_SCM): Add rtx-funcs.scm.
	(cgen-arch): Pass $(mach) to cgen.sh.
	* cgen-engine.h (SEM_BRANCH_FINI): New arg pcvar, all uses updated.
	(SEM_BRANCH_INIT_EXTRACT): New macro.
	(SEM_BRANCH_INIT): Add taken_p.
	(TARGET_SEM_BRANCH_FINI): Provide default definition.
	(SEM_BRANCH_FINI): Use it.
	(SEM_INSN): Update.
	* cgen-run.c (sim_resume): Handle tracing of last insn.
	* cgen-scache.h (WITH_SCACHE): Define as 0 if not defined.
	* cgen-trace.c (current_abuf): New static global.
	(trace_insn_init): Initialize it.
	(trace_insn_fini): Use it.
	(trace_insn): Set it.
	* cgen.sh (arch case): Pass -m ${mach} to cgen.
	* genmloop.sh (@cpu@_emit_before): Only define if WITH_SCACHE_PBB.
	(@cpu@_emit_after): Ditto.
	(simple @cpu@_engine_run_full): New local `pc'.  Initialize semantic
	labels if WITH_SEM_SWITCH_FULL.
	* sim-model.c: Include bfd.h.
	(sim_model_init): New function.
	(sim_model_install): Record init fn.
	* sim-model.h (MACH): New member bfd_name.
	* sim-module.c (modules): Initialize model before scache.
 1999-01-06 00:42:34 +00:00
Jason Molenda
d5159c2520 1999-01-04 Jason Molenda (jsm@bugshack.cygnus.com) 
* configure.in: Require autoconf 2.12.1 or higher.
 1999-01-05 00:27:19 +00:00
Frank Ch. Eigler
ba50f16ab7 * sky test case updates for MTIR insn PR 
1998-12-31  Frank Ch. Eigler  <fche@cygnus.com>
	* sim/sky/t-cop2.s: Adjust vmtir instruction tests for new syntax.
	* sim/sky/t-cop2.vuexpect: Matching changes.
 1998-12-31 06:00:29 +00:00
Felix Lee
d98ee4f5af * sim/sky/sky-defs.tcl: various changes for remote host testing. 
* sim/sky/mload.exp: ditto.
        * sim/sky/sky_sce.exp: ditto.
        * sim/sky/sky_sce_accurate.exp: ditto.
        * sim/sky/sky_sce_fast.exp: ditto.
        * sim/sky/mload.exp: mark as unresolved on error.
 1998-12-31 01:07:51 +00:00
Frank Ch. Eigler
08f758df94 * resolution of eCos-vs.-sky merge conflict! 
[ChangeLog]
1998-12-30  Frank Ch. Eigler  <fche@cygnus.com>
	* mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
start-sanitize-sky
	* interp.c (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook.
 	Call sim_engine_halt on BreakPoint.
end-sanitize-sky
[ChangeLog.sky]
1998-12-30  Frank Ch. Eigler  <fche@cygnus.com>
	* sky-gdb.c (sky_sim_engine_halt): Do not set CIA here.
 1998-12-30 21:16:14 +00:00
Stan Shebs
bd164e2835 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE> 
* configure.in, configure (mips64vr5*-*-*): Added missing ;; in
 	case statement.
(actually a sanitize-cygnus mistake, but Rainer doesn't know that)
 1998-12-30 21:16:13 +00:00
Frank Ch. Eigler
86df8e79fc * build / debug improvements for gx JIT sim prototype 1998-12-30 18:30:48 +00:00
Frank Ch. Eigler
14bbac6609 * eCos->devo merge; tx3904 sanitize tags removed 
1998-12-29  Frank Ch. Eigler  <fche@cygnus.com>
	* interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
	(load_word): Call SIM_CORE_SIGNAL hook on error.
	(signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
	starting.  For exception dispatching, pass PC instead of NULL_CIA.
	(decode_coproc): Use COP0_BADVADDR to store faulting address.
	* sim-main.h (COP0_BADVADDR): Define.
	(SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
	(SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
	(_sim_cpu): Add exc_* fields to store register value snapshots.
	* mips.igen (*): Replace memory-related SignalException* calls
	with references to SIM_CORE_SIGNAL hook.
	* dv-tx3904irc.c (tx3904irc_port_event): printf format warning
	fix.
	* sim-main.c (*): Minor warning cleanups.
 1998-12-30 12:21:43 +00:00
Frank Ch. Eigler
a714374d5e * ChangeLog tweak 1998-12-30 12:17:11 +00:00
Frank Ch. Eigler
9b27cf7bbb * eCos->devo merge; am30 sanitization tags removed 
1998-12-29  Frank Ch. Eigler  <fche@cygnus.com>
	* Makefile.in (WITH_COMMON_OBJS): Build also dv-sockser.o.
	* interp.c (sim_open): Add stub mn103002 cache control memory regions.
	Set OPERATING_ENVIRONMENT on "stdeval1" board.
	(mn10300_core_signal): New function to intercept memory errors.
	(program_interrupt): New function to dispatch to exception vector
	(mn10300_exception_*): New functions to snapshot pre/post exception
	state.
	* sim-main.h (SIM_CORE_SIGNAL): Define hook - call mn10300_core_signal.
	(SIM_ENGINE_HALT_HOOK): Do nothing.
	(SIM_CPU_EXCEPTION*): Define hooks to call mn10300_cpu_exception*().
	(_sim_cpu): Add exc_* fields to store register value snapshots.
	* dv-mn103ser.c (*): Support dv-sockser backend for UART I/O.
	Various endianness and warning fixes.
	* mn10300.igen (illegal): Call program_interrupt on error.
	(break): Call program_interrupt on breakpoint
	Several changes from <janczyn@cygnus.com> and <cagney@cygnus.com>
	merged in:
	* dv-mn103int.c (mn103int_ioctl): New function for NMI
	generation. (mn103int_finish): Install it as ioctl handler.
	* dv-mn103tim.c: Support timer 6 specially.  Endianness fixes.
 1998-12-30 12:17:10 +00:00
Frank Ch. Eigler
617ca17ed2 * eCos->devo merge 
1998-12-24  Frank Ch. Eigler  <fche@cygnus.com>
	* dv-sockser.c (DEFAULT_TIMEOUT): Increase to 1 ms.
	* nrun.c (main): Remain in simulation loop for traps and
 	exceptions when in operating environment mode.
	(ui_loop_hook): New stub hook for standalone use.
	* sim-events.c (sim_events_process): Call ui_loop_hook
	periodically on CYGWIN host.
	* sim-reason.c (sim_stop_reason): Return host signal numbers
	to gdb on sim_stopped and sim_signalled cases.
	* sim-engine.c (sim_engine_halt): Call SIM_CPU_EXCEPTION_SUSPEND
 	hook just before longjmp.
	* sim-resume.c (sim_resume): Call SIM_CPU_EXCEPTION_RESUME
 	hook just before sim_engine_run.
	* sim-n-core.h (sim_core_trace_M): Allay const warning.
	* sim-trace.h (trace_generic): Ditto.
	* sim-trace.c (trace_generic): Ditto.
 1998-12-30 12:09:13 +00:00
Gavin Romig-Koch
35d6075ac2 m16.igen (DADDIU5): Correct type-o. 1998-12-24 05:55:42 +00:00
Dave Brolley
27f6ea6995 New testcase. 1998-12-18 22:22:55 +00:00
Dave Brolley
f45ee50714 Fri Dec 18 17:09:34 1998 Dave Brolley <brolley@cygnus.com> 
* sim/fr30/ldres.cgs: New testcase.
	* sim/fr30/stres.cgs: New testcase.
	* sim/fr30/copop.cgs: New testcase.
	* sim/fr30/copld.cgs: New testcase.
	* sim/fr30/copst.cgs: New testcase.
	* sim/fr30/copsv.cgs: New testcase.
	* sim/fr30/nop.cgs: New testcase.
	* sim/fr30/andccr.cgs: New testcase.
	* sim/fr30/orccr.cgs: New testcase.
	* sim/fr30/addsp.cgs: New testcase.
	* sim/fr30/stilm.cgs: New testcase.
	* sim/fr30/extsb.cgs: New testcase.
	* sim/fr30/extub.cgs: New testcase.
	* sim/fr30/extsh.cgs: New testcase.
	* sim/fr30/extuh.cgs: New testcase.
	* sim/fr30/enter.cgs: New testcase.
	* sim/fr30/leave.cgs: New testcase.
	* sim/fr30/xchb.cgs: New testcase.
	* sim/fr30/dmovb.cgs: New testcase.
	* sim/fr30/dmov.cgs: New testcase.
	* sim/fr30/dmovh.cgs: New testcase.
 1998-12-18 22:15:44 +00:00
Dave Brolley
de6fb7e775 Thu Dec 17 17:18:43 1998 Dave Brolley <brolley@cygnus.com> 
* sim/fr30/testutils.inc (take_branch{_d},no_branch{_d}): New macros.
	* sim/fr30/ret.cgs: Add tests fir ret:d.
	* sim/fr30/inte.cgs: New testcase.
	* sim/fr30/reti.cgs: New testcase.
	* sim/fr30/bra.cgs: New testcase.
	* sim/fr30/bno.cgs: New testcase.
	* sim/fr30/beq.cgs: New testcase.
	* sim/fr30/bne.cgs: New testcase.
	* sim/fr30/bc.cgs: New testcase.
	* sim/fr30/bnc.cgs: New testcase.
	* sim/fr30/bn.cgs: New testcase.
	* sim/fr30/bp.cgs: New testcase.
	* sim/fr30/bv.cgs: New testcase.
	* sim/fr30/bnv.cgs: New testcase.
	* sim/fr30/blt.cgs: New testcase.
	* sim/fr30/bge.cgs: New testcase.
	* sim/fr30/ble.cgs: New testcase.
	* sim/fr30/bgt.cgs: New testcase.
	* sim/fr30/bls.cgs: New testcase.
	* sim/fr30/bhi.cgs: New testcase.
 1998-12-17 22:25:05 +00:00
Doug Evans
f7fb02ba10 More sce_testNN cases updated, pr 18402. 1998-12-17 22:21:31 +00:00
Doug Evans
331a809018 * sim/sky/sce_test58.vuasm: Update syntax of MTIR insn. 
PR 18402
 1998-12-17 21:29:06 +00:00
Frank Ch. Eigler
0615cacf10 * Sanitization fixes to retain new files. 1998-12-16 16:10:16 +00:00
Gavin Romig-Koch
f87366ec28 New 'hack' generator 1998-12-16 05:07:34 +00:00
Felix Lee
db48d8218f vr4run.c, keep-if vr4xxx 1998-12-16 02:12:41 +00:00
Gavin Romig-Koch
7d2ec607de missing *vr4320: 1998-12-15 03:31:39 +00:00
Doug Evans
985fe43632 * configure.in: --enable-cgen-maint support moved to common/aclocal.m4. 
(SIM_AC_OPTION_ALIGNMENT): Make strict.
	* configure: Regenerate.

	* sem-switch.c,sem.c,semx-switch.c: Regenerate.
	* sim-main.h (SIM_ENGINE_HALT_HOOK,SIM_ENGINE_RESTART_HOOK): Define.
	* traps.c (m32r_core_signal): Handle --environment=operating.
 1998-12-15 01:06:46 +00:00
Doug Evans
b58ffc7b4e * sim/m32r/uread16.ms: New testcase. 
* sim/m32r/uread32.ms: New testcase.
	* sim/m32r/uwrite16.ms: New testcase.
	* sim/m32r/uwrite32.ms: New testcase.
 1998-12-14 23:31:28 +00:00
Doug Evans
71d0d0a788 * sim/fr30/hello.ms: Add trailing \n to expected output. 
* sim/m32r/hello.ms: Ditto.
	* sim/m32r/hw-trap.ms: Ditto.
 1998-12-14 23:28:41 +00:00
Doug Evans
ebc5ff70a2 lib/sim-defs.exp (sim_run): Look for board_info sim,options. 1998-12-14 23:22:25 +00:00
Doug Evans
d4dd077a94 * lib/sim-defs.exp (run_sim_test): New option xerror, for expected 
errors.  Translate \n sequences in expected output to newline char.
	(slurp_options): Make parentheses optional.
 1998-12-14 23:17:02 +00:00
Dave Brolley
ecbc0c5533 1998-12-14 Dave Brolley <brolley@cygnus.com> 
* sim/fr30/call.cgs: Test ret here as well.
	* sim/fr30/ld.cgs: Remove bogus comment.
	* sim/fr30/testutils.inc (save_rp,restore_rp): New macros.
	* sim/fr30/div.ms: New testcase.
	* sim/fr30/st.cgs: New testcase.
	* sim/fr30/sth.cgs: New testcase.
	* sim/fr30/stb.cgs: New testcase.
	* sim/fr30/mov.cgs: New testcase.
	* sim/fr30/jmp.cgs: New testcase.
	* sim/fr30/ret.cgs: New testcase.
	* sim/fr30/int.cgs: New testcase.
 1998-12-14 20:06:17 +00:00
Gavin Romig-Koch
bff2d36890 5xxx and el 1998-12-14 15:14:24 +00:00
Gavin Romig-Koch
f14397f057 for bfd: 
* archures.c,bfd-in2.h (bfd_mach_mips4121): New.
	* cpu-mips.c: Added vr4121.
	* elf32-mips.c (elf_mips_mach): Same.
	(_bfd_mips_elf_final_write_processing): Same.

for gas:
	* config/tc-mips.c (mips_4121): New.
	(md_begin,mips_ip,md_longopts,md_parse_option): Add vr4121.

for gcc:
	* config/mips/mips.c (override_options): Add vr4121.
	* config/mips/t-vr4xxx (MULTILIB_MATCHES): Same.

for include/elf:
	* mips.h (E_MIPS_MACH_4121): New.

for include/opcode:
	* mips.h (INSN_4121): New.

for opcodes:
	* mips-dis.c (set_mips_isa_type): Add bfd_mach_mips4121.
	(_print_insn_mips): Same.
	* mips-opc.c: Add vr4121.

for sim/mips:
	* configure.in,mips.igen,vr.igen: Add vr4121.
	* configure: Rebuilt.
 1998-12-13 16:14:24 +00:00
Gavin Romig-Koch
82aeada70c * configure.in (mips64vr4xxx): Enable TARGET_ENABLE_FR. 
Set mips_fpu, and mips_fpu_bitsize.
	Set sim_gen, and sim_igen_machine.
	* configure: Rebuild.
	* mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
	* sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
 1998-12-12 22:43:54 +00:00
Gavin Romig-Koch
eac6dec56e Cleanups. 1998-12-11 15:18:54 +00:00
Andrew Cagney
94a4ff1901 Compare with ZERO not NULL. 1998-12-11 06:00:55 +00:00
Dave Brolley
d8d144a0ab Thu Dec 10 18:46:25 1998 Dave Brolley <brolley@cygnus.com> 
* sim/fr30/div0s.cgs: New testcase.
	* sim/fr30/div0u.cgs: New testcase.
	* sim/fr30/div1.cgs: New testcase.
	* sim/fr30/div2.cgs: New testcase.
	* sim/fr30/div3.cgs: New testcase.
	* sim/fr30/div4s.cgs: New testcase.
	* sim/fr30/testutils.inc (mvi_h_dr,set_dbits,test_dbits): New Macros.
 1998-12-10 23:48:37 +00:00
Jeff Law
312de19bdd Fixes. 1998-12-10 23:36:40 +00:00
Frank Ch. Eigler
c426ee5dd0 * Fix for endianness bugs in tx39 sio sim. 
1998-12-10  Frank Ch. Eigler  <fche@cygnus.com>
	* dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
	(tx3904sio_tickle): fflush after a stdout character output.
 1998-12-10 23:20:48 +00:00
Jeff Law
3314a50ac8 Add missing sanitize markers. 1998-12-10 23:20:47 +00:00
Andrew Cagney
51ecd1580c Include "sim-assert.h". 1998-12-10 06:54:36 +00:00
Doug Evans
cca1ad81d6 * cpu.h,decode.c,sem-switch.c,sem.c: Regenerate. 
* cpux.h,decodex.c,semx-switch.c: Regenerate.
 1998-12-09 20:44:30 +00:00
Doug Evans
4883439b08 * sim-if.c: Include string.h or strings.h if present. 1998-12-09 18:18:15 +00:00
Doug Evans
8784e470ad * cgen-scache.c (scache_flush): Delete unused locals i,sc. 1998-12-09 18:09:55 +00:00
Doug Evans
fdaac1332c * sim-trace.c: Include stdlib.h if present. 1998-12-09 18:07:26 +00:00
Doug Evans
590d592f87 * sim-arange.c: Include libiberty.h, and stdlib.h if present. 1998-12-09 18:03:24 +00:00
Doug Evans
2a939996f6 * dv-sockser.c: Include unistd.h if present. 
(dv_sockser_init): Add missing arg to call to sim_io_eprintf.
 1998-12-09 17:56:41 +00:00
Jim Wilson
b2248e122a i960 simulator. 
* configure.in (i960-*-*): Add.
	* configure: Rebuild.
 1998-12-09 06:52:14 +00:00
Jim Wilson
f956caa7e7 Add i960 support to sim/common. 
* gennltvals.sh: Add i960.
	* nltvals.def: Rebuild.
 1998-12-09 06:41:29 +00:00
Jeff Law
e49538049b Fixes. 1998-12-09 01:02:26 +00:00
Dave Brolley
18e45ca1b3 Tue Dec 8 13:16:53 1998 Dave Brolley <brolley@cygnus.com> 
* sim/fr30/testutils.inc (set_s_user): Correct Mask.
	(set_s_system): Correct Mask.
	* sim/fr30/ld.cgs (ld): Move previously failing test back
	into place.
	* sim/fr30/ldm0.cgs: New testcase.
	* sim/fr30/ldm1.cgs: New testcase.
	* sim/fr30/stm0.cgs: New testcase.
	* sim/fr30/stm1.cgs: New testcase.
 1998-12-08 18:22:44 +00:00
Dave Brolley
11a2d92065 Tue Dec 8 13:16:53 1998 Dave Brolley <brolley@cygnus.com> 
* sim/fr30/ldm0.cgs: New testcase.
	* sim/fr30/ldm1.cgs: New testcase.
	* sim/fr30/stm0.cgs: New testcase.
	* sim/fr30/stm1.cgs: New testcase.
 1998-12-08 18:22:25 +00:00