Commit Graph

7260 Commits

Author SHA1 Message Date
Andreas Krebbel 485f23cf5c Add missing changelog entries 2015-10-14 12:19:39 +02:00
Andreas Krebbel c46eb7b88a S/390: Fix instruction type of troo, trot, trto, and trtt.
opcodes/ChangeLog:

2015-10-14  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

	* s390-opc.c: Fix comment.
	* s390-opc.txt: Change instruction type for troo, trot, trto, and
	trtt to RRF_U0RER since the second parameter does not need to be a
	register pair.

gas/testsuite/ChangeLog:

2015-10-14  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

	* gas/s390/esa-g5.d: Use odd GPR for the second operand.
	* gas/s390/esa-g5.s: Likewise.
	* gas/s390/esa-z9-109.d: Likewise.
	* gas/s390/esa-z9-109.s: Likewise.
2015-10-14 10:58:41 +02:00
Nick Clifton ede77e6963 Update list of known MSP430 MCU names.
* config/tc-msp430.c (msp430_mcu_names): Rename to
	msp430_mcu_data.  Add fields for the ISA and hardware multiply
	support.  Update with information from the latest devices.csv
	file.
	(md_parse_option): Make use of the new array.
2015-10-12 11:51:05 +01:00
Andrew Burgess 431ff0756a avr: Fix bugs in org/align tracking.
This commit fixes a few issues in the mechanism for passing information
about ".org" and ".align" directives from the assembler to the linker,
used by the avr target.

In the original commit fdd410ac7a, there
were some mistakes when writing out information about ".align"
directives:
  - An align with fill does not write out its information correctly, the
    fill data overwrites the alignment data.
  - Each alignment directive is recorded at the location where the
    previous alignment directive should be recorded, the first alignment
    directive is discarded.

In commit 137c83d69f, the data produced by
objdump is not correct:
   - It's miss-aligned due to a missing whitespace.
   - The fill data for align with fill records is not displayed
     correctly.

All of the above issues are addressed in this commit, and the test is
improved to cover these cases.

binutils/ChangeLog:

	* od-elf32_avr.c (elf32_avr_dump_avr_prop): Fix printing of align
	specific data, fix formatting for align and org data.

gas/ChangeLog:

	* config/tc-avr.c (avr_output_property_record): Fix overwrite bug
	for align and fill records.
	(avr_handle_align): Record fill information for align frags.
	(create_record_for_frag): Add next frag assertion, use correct
	address for align records.

gas/testsuite/ChangeLog:

	* gas/avr/avr-prop-1.s: Use fill in some cases.
	* gas/avr/avr-prop-1.d: Update expected results.
2015-10-12 09:43:11 +01:00
Alan Modra d980077618 Bug 19113 - read.c stringer assertion
Fails due to signed char promotion.

	PR gas/19113
	* read.c (next_char_of_string): Mask char after escape.  Use
	CHAR_MASK rather than 0xff.
2015-10-10 10:51:20 +10:30
Yao Qi 875880c661 Avoid using 'template' C++ keyword
'template' is used in include/opcode/aarch64.h as below,

 typedef struct
 {
   const char *template;
   uint32_t value;
   int has_xt;
 } aarch64_sys_ins_reg;

and it triggers compilation errors when GDB is built in C++ mode.

In file included from git/gdb/aarch64-tdep.c:62:0:
git/gdb/../include/opcode/aarch64.h:651:15: error: expected unqualified-id before 'template'
   const char *template;

This patch is to rename field template to name.

gas/

	* config/tc-aarch64.c (md_begin): Access field 'name' rather
	than 'template'.

include/opcode/

	* aarch64.h (aarch64_sys_ins_reg) <template>: Removed.
	<name>: New field.

opcodes/

	* aarch64-dis.c (aarch64_ext_sysins_op): Access field
	'name' rather than 'template'.
	* aarch64-opc.c (aarch64_print_operand): Likewise.
2015-10-07 15:22:47 +01:00
Nick Clifton 886a250647 New ARC implementation.
bfd	* archures.c: Remove support for older ARC. Added support for new
	ARC cpus (ARC600, ARC601, ARC700, ARCV2).
	* bfd-in2.h: Likewise.
	* config.bfd: Likewise.
	* cpu-arc.c: Likewise.
	* elf32-arc.c: Totally changed file with a refactored
	inplementation of the ARC port.
	* libbfd.h: Added ARC specific relocation types.
	* reloc.c: Likewise.

gas     * config/tc-arc.c: Revamped file for ARC support.
        * config/tc-arc.h: Likewise.
        * doc/as.texinfo: Add new ARC options.
        * doc/c-arc.texi: Likewise.

ld	* configure.tgt: Added target arc-*-elf* and arc*-*-linux-uclibc*.
	* emulparams/arcebelf_prof.sh: New file
	* emulparams/arcebelf.sh: Likewise.
	* emulparams/arceblinux_prof.sh: Likewise.
	* emulparams/arceblinux.sh: Likewise.
	* emulparams/arcelf_prof.sh: Likewise.
	* emulparams/arcelf.sh: Likewise.
	* emulparams/arclinux_prof.sh: Likewise.
	* emulparams/arclinux.sh: Likewise.
	* emulparams/arcv2elfx.sh: Likewise.
	* emulparams/arcv2elf.sh: Likewise.
	* emultempl/arclinux.em: Likewise.
	* scripttempl/arclinux.sc: Likewise.
	* scripttempl/elfarc.sc: Likewise.
	* scripttempl/elfarcv2.sc: Likewise
	* Makefile.am: Add new ARC emulations.
	* Makefile.in: Regenerate.
	* NEWS: Mention the new feature.

opcodes * arc-dis.c: Revamped file for ARC support
	* arc-dis.h: Likewise.
	* arc-ext.c: Likewise.
	* arc-ext.h: Likewise.
	* arc-opc.c: Likewise.
	* arc-fxi.h: New file.
	* arc-regs.h: Likewise.
	* arc-tbl.h: Likewise.

binutils * readelf.c (get_machine_name): Remove A5 reference. Add ARCompact
	and ARCv2.
	(get_machine_flags): Handle EM_ARCV2 and EM_ARCOMPACT.
	(guess_is_rela): Likewise.
	(dump_relocations): Likewise.
	(is_32bit_abs_reloc): Likewise.
	(is_16bit_abs_reloc): Likewise.
	(is_none_reloc): Likewise.
	* NEWS: Mention the new feature.

include	* dis-asm.h (arc_get_disassembler): Correct declaration.
	* arc-reloc.def: Macro file with definition of all relocation
	types.
	* arc.h: Changed macros for the newly supported ARC cpus.  Altered
	enum defining the supported relocations.
	* common.h: Changed EM_ARC_A5 definition to EM_ARC_COMPACT. Added
	macro for EM_ARC_COMPACT2.
        * arc-func.h: New file.
        * arc.h: Likewise.
2015-10-07 14:20:19 +01:00
Renlin Li 43a357f99f [GAS][AARCH64]Add TLSDESC large memory model support.
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* elfnn-aarch64.c (elfNN_aarch64_howto_table): Check overflow for
	BFD_RELOC_AARCH64_TLSDESC_OFF_G1.

gas/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* config/tc-aarch64.c (s_tlsdescadd): New.
	(s_tlsdescldr): New.
	(md_pseudo_table): Handle tlsdescadd and tlsdescldr pseudo ops.
	(reloc_table): Add entries for BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC and
	BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC.
	(process_movw_reloc_info): Support AARCH64_TLSDESC_OFF_G1 and
	    AARCH64_TLSDESC_OFF_G0_NC.
	(md_apply_fix): Likewise.
	(aarch64_force_relocation): Likewise.

gas/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* gas/aarch64/reloc-tlsdesc_off_g0_nc.d: New.
	* gas/aarch64/reloc-tlsdesc_off_g0_nc.s: New.
	* gas/aarch64/reloc-tlsdesc_off_g1.d: New.
	* gas/aarch64/reloc-tlsdesc_off_g1.s: New.
	* gas/aarch64/tls-desc.d: New.
	* gas/aarch64/tls-desc.s: New.
2015-10-02 17:56:09 +01:00
Renlin Li 3b957e5b07 [Binutils][AARCH64]Add TLS IE large memory support.
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* reloc.c: Make AARCH64_TLSIE_MOVW_GOTTPREL_G1 and
	AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC defined in alphabetical order.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Likewise.
	* elfnn-aarch64.c (elfNN_aarch64_howto_table): Make
	TLSIE_MOVW_GOTTPREL_G1 check overflow.
	(aarch64_reloc_got_type): Add support for TLSIE_MOVW_GOTTPREL_G1
	and TLSIE_MOVW_GOTTPREL_G0_NC.
	(elfNN_aarch64_final_link_relocate): Likewise.
	(elfNN_aarch64_relocate_section): Likewise.
	(elfNN_aarch64_gc_sweep_hook): Likewise.
	(elfNN_aarch64_check_relocs): Likewise.
	* elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
	(_bfd_aarch64_elf_resolve_relocation): Likewise.

gas/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* config/tc-aarch64.c (reloc_table): Add two entries for
	gottprel_g0_nc and gottprel_g1.
	(process_movw_reloc_info): Add support.
	(md_apply_fix): Likewise.
	(aarch64_force_relocation): Likewise.

gas/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* gas/aarch64/reloc-gottprel_g0_nc.d: New.
	* gas/aarch64/reloc-gottprel_g0_nc.s: New.
	* gas/aarch64/reloc-gottprel_g1.d: New.
	* gas/aarch64/reloc-gottprel_g1.s: New.

ld/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* ld-aarch64/tls-large-ie.d: New.
	* ld-aarch64/tls-large-ie.s: New.
	* ld-aarch64/aarch64-elf.exp: Run new test.
2015-10-02 17:56:08 +01:00
Renlin Li 3e8286c0d2 [GAS][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC support.
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* reloc.c (BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC): New entry.
	* elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
	BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Likewise

gas/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* config/tc-aarch64.c (reloc_table): New relocation modifier tlsgd_g0_nc.
	(process_movw_reloc_info): Support BFD_RELOC_AARCH64_TLSGD_MOVW_G1.
	(md_apply_fix): Likewise.
	(aarch64_force_relocation): Likewise.

gas/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* gas/aarch64/reloc-tlsgd_g0_nc.d: New.
	* gas/aarch64/reloc-tlsgd_g0_nc.s: New.
2015-10-02 17:56:08 +01:00
Renlin Li 1aa66fb152 [GAS][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G1 support.
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* reloc.c (BFD_RELOC_AARCH64_TLSGD_MOVW_G1): New entry.
	* elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
	BFD_RELOC_AARCH64_TLSGD_MOVW_G1.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Likewise.

gas/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* config/tc-aarch64.c (reloc_table): New relocation modifier tlsgd_g1.
	(process_movw_reloc_info): Support BFD_RELOC_AARCH64_TLSGD_MOVW_G1.
	(md_apply_fix): Likewise.
	(aarch64_force_relocation): Likewise.

gas/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* gas/aarch64/reloc-tlsgd_g1.s: New.
	* gas/aarch64/reloc-tlsgd_g1.s: New.
2015-10-02 17:56:08 +01:00
Renlin Li ca632371ce [GAS][AARCH64]Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC Support.
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* reloc.c (BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC): New.
	* elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry
	MOVW_GOTOFF_G0_NC.
	* libbfd.h: Regnerate.
	* bfd-in2.h: Regenerate.

gas/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* config/tc-aarch64.c (reloc_table): New relocation modifier
	gotoff_g0_nc.
	(process_movw_reloc_info): Support gotoff_g0_nc.
	(md_apply_fix): Likewise.

gas/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* gas/aarch64/reloc-gotoff_g0_nc.s: New.
	* gas/aarch64/reloc-gotoff_g0_nc.d: New.
2015-10-02 17:56:07 +01:00
Renlin Li 654248e7f7 [GAS][AARCH64]Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G1 Support.
bfd/

2015-10-02  Renlin Li  <renlin.li@arm.com>

	* reloc.c (BFD_RELOC_AARCH64_MOVW_GOTOFF_G1): New.
	* elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
	MOVW_GOTOFF_G1.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Regenerate.

gas/

2015-10-02  Renlin Li  <renlin.li@arm.com>

	* config/tc-aarch64.c (reloc_table): New relocation modifier
	gotoff_g1.
	(process_movw_reloc_info): Support newly added modifier.
	(md_apply_fix): Likewise.

gas/testsuite/

2015-10-02  Renlin Li  <renlin.li@arm.com>

	* gas/aarch64/reloc-gotoff_g1.s: New.
	* gas/aarch64/reloc-gotoff_g1.d: New.
2015-10-02 17:56:07 +01:00
Alan Modra 2ec6d9e621 Revise new e500 invalid opcode test
.machine isn't available on all powerpc targets.

	* gas/ppc/ppc.exp (e500-ill): Pass -me500.
	* gas/ppc/e500-ill.s: Remove .machine.
	* gas/ppc/e500-ill.l: Remove line numbers.
2015-09-30 18:32:32 +09:30
Dominik Vogt 7ecc513a44 Add support for extensions in the .machine pseudoop on S/390, e.g. ".machine zEC12+nohtm+vx"
gas	* doc/c-s390.texi: Add documentation.
	Add missing code markup.
	* config/tc-s390.c (current_flags): New static variable.
	(s390_parse_cpu): Parse cpu flags a la "+nohtm" etc.
	(s390_setup_opcodes): Use cpu flags to determine the set of opcodes.
	Fix indentation.
	(md_parse_option): Call s390_parse_cpu with the new signature.
	(s390_machine): Likewise.
	Keep track of current_flags.
	Simplify code a bit.
	undefine MAX_HISTORY at end of function.
	(s390_machinemode): undefine MAX_HISTORY at end of function.
	Update an error message.

tests	* gas/s390/s390.exp: Add new tests.
	* gas/s390/machine-parsing-1.s: New test file.
	* gas/s390/machine-parsing-1.l: Likewise.
	* gas/s390/machine-parsing-2.s: Likewise.
	* gas/s390/machine-parsing-2.l: Likewise.
	* gas/s390/machine-parsing-3.s: Likewise.
	* gas/s390/machine-parsing-3.l: Likewise.
	* gas/s390/machine-parsing-4.s: Likewise.
	* gas/s390/machine-parsing-4.l: Likewise.
	* gas/s390/machine-parsing-5.s: Likewise.
	* gas/s390/machine-parsing-5.l: Likewise.
	* gas/s390/machine-parsing-6.s: Likewise.
	* gas/s390/machine-parsing-6.l: Likewise.

opcode	* s390.h (S390_INSTR_FLAG_HTM): New flag.
	(S390_INSTR_FLAG_VX): New flag.
	(S390_INSTR_FLAG_FACILITY_MASK): New flag mask.

opcodes	* s390-mkopc.c (main): Parse htm and vx flag.
	* s390-opc.txt: Mark instructions from the hardware transactional
	memory and vector facilities with the "htm"/"vx" flag.
2015-09-29 13:22:07 +01:00
Tom Rix 36f7a9411d Patches for illegal ppc 500 instructions
This change marks a few opcodes as invalid for ppc e500 as well as adds
a test to verify the change.
2015-09-28 12:09:51 +09:30
Peter Zotov 8a9e7a9121 Correct the generation of OR1K pc-relative relocations.
gas	PR ld/18759
	* config/tc-or1k.c (tc_gen_reloc): Correct computation of PC
	relative relocs.
	* config/tc-or1k.h (GAS_CGEN_PRCEL_R_TYPE): Delete.

bfd	* elf32-or1k.c (R_OR1K_32_PCREL): Set pcrel_offset to TRUE.
	(R_OR1K_16_PCREL): Likewise.
	(R_OR1K_8_PCREL): Likewise.

ld/tests * ld-elf/eh-frame-hdr: Expect to pass on the or1k-linux target.
2015-09-25 15:21:14 +01:00
Ryo ONODERA 6cd8405efd POSIX shell compatibility of gas/configure.ac
* configure.ac (nds32): Don't use bash == in tests.
	* configure: Regenerate.
2015-09-25 11:45:51 +09:30
Nick Clifton b6518b3871 Fix compile time warnings generated when compiling with clang.
bfd	* bout.c (b_out_slurp_reloc_table): Cast constant to unsigned in
	order to avoid problems with left shifting negative values.
	(abs32code): Likewise.
	* mach-o.c (FILE_ALIGN): Likewise.
	* coff-rs6000.c (xcoff_debug_sections): Delete unused static
	array.
	* elf32-visium.c (visium_reloc_map): Likewise.
	* elf32-arm.c (elf32_arm_final_link_relocate): Remove useless
	calls to abs function.
	* elf32-frv.c (_frvfdpic_relax_tls_entries): Likewise.
	* elf32-score.c (score_elf_final_link_relocate): Likewise.
	* elf32-score7.c (score_elf_final_link_relocate): Likewise.
	* elf32-i860.c (i860_howto_pc26_reloc): Use multiplication instead
	of shifting to create a negative mask.
	* elf32-msp430.c (elf_backend_special_sections): Define.
	* elfxx-mips.c (got_ofst_reloc_p): Delete unused function.
	(got_hi16_reloc_p): Delete unused function.
	* ppcboot.c (ppcboot_bfd_print_private_bfd_data): Fix test of
	partition name.

gas	* config/tc-ppc.c (insn_validate): Cast PPC_OPSHIFT_INV to an int.

opcode	* ppc.h (PPC_OPSHIFT_INV): Use an unsigned constant when left
	shifting.

ld	* emultempl/elf32.em (ehdr_start_empty): New static variable.
	(before_allocation): Use it to initialise ehdr_start_save.
	* emultempl/pe.em (write_build_id): Remove useless double
	parenthesis.
	* emultempl/pep.em (write_build_id): Likewise.

opcodes	* bfin-dis.c (fmtconst): Remove unnecessary call to the abs
	function.
	* tic30-dis.c (print_branch): Likewise.
	* cgen-asm.c (cgen_parse_signed_integer): Cast integer to signed
	value before left shifting.
	* fr30-ibld.c (fr30_cgen_extract_operand): Likewise.
	* hppa-dis.c (print_insn_hppa): Likewise.
	* mips-dis.c (mips_cp0sel_names_mipsr5900): Delete unused static
	array.
	* msp430-dis.c (msp430_singleoperand): Likewise.
	(msp430_doubleoperand): Likewise.
	(print_insn_msp430): Likewise.
	* nds32-asm.c (parse_operand): Likewise.
	* sh-opc.h (MASK): Likewise.
	* v850-dis.c (get_operand_value): Likewise.
2015-09-23 18:05:16 +01:00
Nick Clifton e3ec6cc681 Change 7-byte NOP instruction for RX target, so that it only takes 1 cycle to excute.
* config/tc-rx.c (nop_7): Recode using MAX.
2015-09-22 17:32:28 +01:00
Andreas Krebbel be62444771 S/390: Fix instruction format of crj*, clrj*, and clgrj*.
This fixes the instruction format for 3 of the compare and branch
extended mnemonics.  That way the extended mnemonics are actually
being found by objdump.

gas/testsuite/ChangeLog:

2015-09-10  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

	* gas/s390/zarch-z10.d: Fix testcase for some of the compare and
	branch extended mnemonics.

opcodes/ChangeLog:

2015-09-10  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

	* s390-opc.txt: Fix instruction format of crj*, clrj*, and clgrj*.
2015-09-10 15:26:35 +02:00
Andreas Krebbel 9c1c2a0bb1 S/390: Fix MASK_RIE_R0PI and MASK_RIE_R0PU.
This makes objdump to be able to recognize some of the extended
mnemonics more often.  It does not lead to wrong being generated.

opcodes/ChangeLog:

2015-09-10  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

	* s390-opc.c: Fix MASK_RIE_R0PI and MASK_RIE_R0PU.

gas/testsuite/ChangeLog:

2015-09-10  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

	* gas/s390/zarch-z10.d: Fix testcase for compare and branch
	extended mnemonics.
2015-09-10 15:25:55 +02:00
Andreas Krebbel c694bafc0b S/390: Fix opcode of ppno.
opcodes/ChangeLog:

2015-09-09  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

	* s390-opc.txt: Fix opcode of ppno instruction.

gas/testsuite/ChangeLog:

2015-09-09  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

	* gas/s390/zarch-z13.d: Fix opcode of ppno instruction.
2015-09-09 14:10:13 +02:00
Chen Gang dce55a03c1 config/tc-avr.c (md_section_align): Append UL for -1 to avoid the latest gcc's warning
The related warning is:

  gcc -DHAVE_CONFIG_H -I. -I../../binutils-gdb/gas  -I. -I../../binutils-gdb/gas -I../bfd -I../../binutils-gdb/gas/config -I../../binutils-gdb/gas/../include -I../../binutils-gdb/gas/.. -I../../binutils-gdb/gas/../bfd -DLOCALEDIR="\"/upstream/release-avr32/share/locale\""  -W -Wall -Wstrict-prototypes -Wmissing-prototypes -Wshadow -Werror -I../../binutils-gdb/gas/../zlib -g -O2 -MT tc-avr.o -MD -MP -MF .deps/tc-avr.Tpo -c -o tc-avr.o `test -f 'config/tc-avr.c' || echo '../../binutils-gdb/gas/'`config/tc-avr.c
../../binutils-gdb/gas/config/tc-avr.c: In function ‘md_section_align’:
../../binutils-gdb/gas/config/tc-avr.c:1233:43: error: left shift of negative value [-Werror=shift-negative-value]
     return ((addr + (1 << align) - 1) & (-1 << align));
                                             ^

2015-09-05  Chen Gang  <gang.chen.5i5j@gmail.com>

	* config/tc-avr.c (md_section_align): Append UL for -1 to avoid
	the latest gcc's warning.
2015-09-08 21:43:35 +08:00
Alan Modra 2e57ce7b14 More fallout from "Allow symbol and label names to be enclosed in double quotes"
Some of the TC_START_LABEL implementations need to adjust the end of
the symbol, when a colon doesn't mean a label definition.  That means
they need access to nul_char both the restore the NUL location (it may
be a quote rather than a colon) and to store the new nul_char.  Others
need adjusting to step over a potential trailing quote.

	PR gas/18581
	* config/tc-aarch64.h (TC_START_LABEL): Redefine.
	* config/tc-arm.c (tc_start_label_without_colon): Delete params.
	Use input_line_pointer directly.
	* config/tc-arm.h (TC_START_LABEL): Redefine.
	(TC_START_LABEL_WITHOUT_COLON): Redefine.
	(tc_start_label_without_colon): Update prototype.
	* config/tc-bfin.c (bfin_start_label): Delete ptr param.  Check
	for NUL instead.
	* config/tc-bfin.h (bfin_start_label): Update prototype.
	(TC_START_LABEL): Redefine.
	* config/tc-d30v.h (TC_START_LABEL): Redefine.
	* config/tc-fr30.c (restore_colon): Rewrite.
	(fr30_is_colon_insn): Add nul_char param.  Return int.  Bump
	i_l_p over quote.  Update restore_colon calls.
	* config/tc-fr30.h (TC_START_LABEL): Redefine.
	(fr30_is_colon_insn): Update prototype.
	* config/tc-m32c.c (restore_colon, m32c_is_colon_insn): As above.
	* config/tc-m32c.h (TC_START_LABEL): Redefine.
	(m32c_is_colon_insn): Update prototype.
	* config/tc-m32r.h (TC_START_LABEL): Redefine.
	* config/tc-mep.h (TC_START_LABEL): Redefine.
	* config/tc-nds32.h (TC_START_LABEL): Redefine.
	* config/tc-tic54x.c (tic54x_start_label): Replace params with
	nul_char and next_char.  Step over trailing quote.
	* config/tc-tic54x.h (TC_START_LABEL_WITHOUT_COLON): Redefine.
	(tic54x_start_label): Update prototype.
	* read.c (TC_START_LABEL): Redefine.  Update invocation.
	(TC_START_LABEL_WITHOUT_COLON): Update invocation.
	* config/tc-nios2.c (s_nios2_set): Save initial input_line_pointer
	and restore if calling s_set.  Don't restore delim again.
2015-08-27 23:19:59 +09:30
Alan Modra 2d011dc169 Fallout from "Allow symbol and label names to be enclosed in double quotes"
PR gas/18581
	* config/tc-mn10200.c (md_assemble <mdr>): Move restore_line_pointer
	call to where input line used to be restored.
	* config/tc-mn10300.c (md_assemble <usp>): Remove redundant input
	line restore.
	* config/tc-tilepro.c (parse_reg_expression): Add regname var.
2015-08-26 23:07:24 +09:30
Nick Clifton 2a7f4fa91f Add asprintf to the list of functions whose decls are checked at configure time.
PR gas/18842
	* configure.ac (AS_CHECK_DECLS): Add asprintf.
	* configure: Regenerate.
	* config.in: Regenerate.
2015-08-26 10:56:26 +01:00
Simon Dardis cdbfb88617 Update MIPS tests for test failures on some configurations.
* gas/mips/micromips32-move.d: Update expected disassembly.
	* gas/mips/move.d: Likewise.
	* gas/mips/move.s: Fix for some MIPS configurations.
2015-08-25 17:06:49 +01:00
Jose E. Marchesi 3807431192 Support for the sparc %pmcdper privileged register.
opcodes/ChangeLog:

2015-08-25  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* sparc-dis.c (print_insn_sparc): Handle the privileged register
	%pmcdper.

gas/ChangeLog:

2015-08-25  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* config/tc-sparc.c (priv_reg_table): New privileged register
	%pmcdper.

gas/testsuite/ChangeLog:

2015-08-25  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* gas/sparc/wrpr.s: Test writing to the privileged %pmcdper
	register.
	* gas/sparc/wrpr.d: ...and the expected result.
	* gas/sparc/rdpr.s: Test reading from the privileged %pmcdper
	register.
	* gas/sparc/rdpr.d: ...and the expected result.
2015-08-25 17:16:34 +02:00
Jan Stancek 5f40e14d76 Fix the partial disassembly of a broken three byte instruction at the end of a function.
opcodes	* i386-dis.c (print_insn): Fix decoding of three byte operands.

tests	* gas/i386/intel.s: Add test of disassembly of a potential
	three byte instuction at the end of a function.
	* gas/i386/intel.d: Update expected disassembly.
2015-08-24 14:50:15 +01:00
Nick Clifton d02603dc20 Allow symbol and label names to be enclosed in double quotes.
gas	PR gas/18581
	* expr.c (get_symbol_end): Rename to get_symbol_name.  Add a
	return parameter pointing to the start of the symbol.  Allow
	symbol names enclosed in double quotes.
	(restore_line_pointer): New function.  Replace the NUL character
	inserted into the input stream with the given character.  If the
	character was a double quote, advance the input pointer.
	* expr.h (get_symbol_end): Delete.
	(get_symbol_name): Add prototype.
	(restore_line_pointer): Prototype.
	* read.h (SKIP_WHITESPACE_AFTER_NAME): New macro.
	* doc/as.texinfo (Symbol Intro): Document that symbol names can
	now be enclosed in double quotes.
	* cond.c (s_ifdef): Replace get_symbol_end with get_symbol_name.
	Use restore_line_pointer to replace the NUL in the input stream.
	Use SKIP_WHITESPACE_AFTER_NAME to skip past the end of a symbol.
	Check for the use of double quoted symbol names.
	* expr.c: Likewise.
	* config/obj-aout.c: Likewise.
	* config/obj-coff-seh.c: Likewise.
	* config/obj-coff.c: Likewise.
	* config/obj-elf.c: Likewise.
	* config/obj-evax.c: Likewise.
	* config/obj-macho.c: Likewise.
	* config/obj-som.c: Likewise.
	* config/tc-alpha.c: Likewise.
	* config/tc-arc.c: Likewise.
	* config/tc-arm.c: Likewise.
	* config/tc-dlx.c: Likewise.
	* config/tc-h8300.c: Likewise.
	* config/tc-hppa.c: Likewise.
	* config/tc-i370.c: Likewise.
	* config/tc-i386-intel.c: Likewise.
	* config/tc-i386.c: Likewise.
	* config/tc-i960.c: Likewise.
	* config/tc-ia64.c: Likewise.
	* config/tc-iq2000.c: Likewise.
	* config/tc-m32r.c: Likewise.
	* config/tc-m68hc11.c: Likewise.
	* config/tc-m68k.c: Likewise.
	* config/tc-microblaze.c: Likewise.
	* config/tc-mips.c: Likewise.
	* config/tc-mmix.c: Likewise.
	* config/tc-mn10200.c: Likewise.
	* config/tc-mn10300.c: Likewise.
	* config/tc-nios2.c: Likewise.
	* config/tc-ppc.c: Likewise.
	* config/tc-s390.c: Likewise.
	* config/tc-score.c: Likewise.
	* config/tc-score7.c: Likewise.
	* config/tc-sparc.c: Likewise.
	* config/tc-tic4x.c: Likewise.
	* config/tc-tic54x.c: Likewise.
	* config/tc-tic6x.c: Likewise.
	* config/tc-tilegx.c: Likewise.
	* config/tc-tilepro.c: Likewise.
	* config/tc-v850.c: Likewise.
	* config/tc-xtensa.c: Likewise.
	* config/tc-z80.c: Likewise.
	* dw2gencfi.c: Likewise.
	* dwarf2dbgc.: Likewise.
	* ecoff.c: Likewise.
	* read.c: Likewise.
	* stabs.c: Likewise.

tests	PR gas/18581
	* gas/all/byte.d: Disable this test.  Quoted expressions
	are now allowed in .byte directives.
	* gas/all/quoted-sym-names.s: New test.
	* gas/all/quoted-sym-names.d: Expected output.
	* gas/all/gas.exp: Run the new test.
2015-08-21 16:42:14 +01:00
Alexander Fomin ab4e4ed5da PR binutils/18257: Properly decode x86/Intel mask instructions.
opcodes/

	PR binutils/18257
	* i386-dis.c: Use MOD_TABLE for most of mask instructions.
	(MOD enum): Add MOD_VEX_W_0_0F41_P_0_LEN_1, MOD_VEX_W_1_0F41_P_0_LEN_1,
	MOD_VEX_W_0_0F41_P_2_LEN_1, MOD_VEX_W_1_0F41_P_2_LEN_1,
	MOD_VEX_W_0_0F42_P_0_LEN_1, MOD_VEX_W_1_0F42_P_0_LEN_1,
	MOD_VEX_W_0_0F42_P_2_LEN_1, MOD_VEX_W_1_0F42_P_2_LEN_1,
	MOD_VEX_W_0_0F44_P_0_LEN_1, MOD_VEX_W_1_0F44_P_0_LEN_1,
	MOD_VEX_W_0_0F44_P_2_LEN_1, MOD_VEX_W_1_0F44_P_2_LEN_1,
	MOD_VEX_W_0_0F45_P_0_LEN_1, MOD_VEX_W_1_0F45_P_0_LEN_1,
	MOD_VEX_W_0_0F45_P_2_LEN_1, MOD_VEX_W_1_0F45_P_2_LEN_1,
	MOD_VEX_W_0_0F46_P_0_LEN_1, MOD_VEX_W_1_0F46_P_0_LEN_1,
	MOD_VEX_W_0_0F46_P_2_LEN_1, MOD_VEX_W_1_0F46_P_2_LEN_1,
	MOD_VEX_W_0_0F47_P_0_LEN_1, MOD_VEX_W_1_0F47_P_0_LEN_1,
	MOD_VEX_W_0_0F47_P_2_LEN_1, MOD_VEX_W_1_0F47_P_2_LEN_1,
	MOD_VEX_W_0_0F4A_P_0_LEN_1, MOD_VEX_W_1_0F4A_P_0_LEN_1,
	MOD_VEX_W_0_0F4A_P_2_LEN_1, MOD_VEX_W_1_0F4A_P_2_LEN_1,
	MOD_VEX_W_0_0F4B_P_0_LEN_1, MOD_VEX_W_1_0F4B_P_0_LEN_1,
	MOD_VEX_W_0_0F4B_P_2_LEN_1, MOD_VEX_W_0_0F91_P_0_LEN_0,
	MOD_VEX_W_1_0F91_P_0_LEN_0, MOD_VEX_W_0_0F91_P_2_LEN_0,
	MOD_VEX_W_1_0F91_P_2_LEN_0, MOD_VEX_W_0_0F92_P_0_LEN_0,
	MOD_VEX_W_0_0F92_P_2_LEN_0, MOD_VEX_W_0_0F92_P_3_LEN_0,
	MOD_VEX_W_1_0F92_P_3_LEN_0, MOD_VEX_W_0_0F93_P_0_LEN_0,
	MOD_VEX_W_0_0F93_P_2_LEN_0, MOD_VEX_W_0_0F93_P_3_LEN_0,
	MOD_VEX_W_1_0F93_P_3_LEN_0, MOD_VEX_W_0_0F98_P_0_LEN_0,
	MOD_VEX_W_1_0F98_P_0_LEN_0, MOD_VEX_W_0_0F98_P_2_LEN_0,
	MOD_VEX_W_1_0F98_P_2_LEN_0, MOD_VEX_W_0_0F99_P_0_LEN_0,
	MOD_VEX_W_1_0F99_P_0_LEN_0, MOD_VEX_W_0_0F99_P_2_LEN_0,
	MOD_VEX_W_1_0F99_P_2_LEN_0, MOD_VEX_W_0_0F3A30_P_2_LEN_0,
	MOD_VEX_W_1_0F3A30_P_2_LEN_0, MOD_VEX_W_0_0F3A31_P_2_LEN_0,
	MOD_VEX_W_1_0F3A31_P_2_LEN_0, MOD_VEX_W_0_0F3A32_P_2_LEN_0,
	MOD_VEX_W_1_0F3A32_P_2_LEN_0, MOD_VEX_W_0_0F3A33_P_2_LEN_0,
	MOD_VEX_W_1_0F3A33_P_2_LEN_0.
	(vex_w_table): Replace terminals with MOD_TABLE entries for
	most of mask instructions.

gas/testsuite

	PR binutils/18257
	* gas/i386/disassem.s: Add mask instructions with invalid ModR/M byte.
	* gas/i386/x86-64-disassem.s: Likewise.
	* gas/i386/disassem.d: Updated.
	* gas/i386/x86-64-disassem.d: Likewise.
2015-08-21 14:48:05 +03:00
Jiong Wang 4c5625238c [AArch64][5/6] GAS support TLSLD load/store relocation types
2015-08-19  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * reloc.c: New entries, including
  BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC,
  BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC,
  BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC.
  BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): Likewise.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation types support for
  dtprel_lo12.
  (ldst_lo12_determine_real_reloc_type): Support
  BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC,
  BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC,
  BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC,
  BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC.
  (parse_operands): Likewise.
  (md_apply_fix): Likewise
  (aarch64_force_relocation): Likewise.
  (process_movw_reloc_info): Likewise.

gas/testsuite/
  * gas/aarch64/reloc-dtprel_lo12-ldst8.s: New testcase.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldstc.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12-ldst16.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldst16.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12-ldst32.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldst32.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12-ldst64.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldst64.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12-ldst8.d: New expectation file.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldst8.d: Likewise.
  * gas/aarch64/reloc-dtprel_lo12-ldst16.d: Likewise.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldst16.d: Likewise.
  * gas/aarch64/reloc-dtprel_lo12-ldst32.d: Likewise.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldst32.d: Likewise.
  * gas/aarch64/reloc-dtprel-lo12-ldst64.d: Likewise.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldst64.d: Likewise.
2015-08-19 16:54:39 +01:00
Jiong Wang 49df5539f9 [AArch64][3/6] GAS support TLSLD move/add relocation types
2015-08-19  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2): New entries.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): Likewise.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation modifiers,
  "dtprel_hi12", "dtprel_g0", "dtprel_g0_nc", "dtprel_g1",
  "dtprel_g1_nc", "dtprel_g2".
  (md_apply_fix): Support new relocation types.
  (aarch64_force_relocation): Likewise.
  (process_movw_reloc_info): Likewise.

gas/testsuite/
  * gas/aarch64/reloc-dtprel_g0.s: New testcase.
  * gas/aarch64/reloc-dtprel_g0-ilp32.s: Likewise.
  * gas/aarch64/reloc-dtprel_g0_nc.s: Likewise.
  * gas/aarch64/reloc-dtprel_g0_nc-ilp32.s: Likewise.
  * gas/aarch64/reloc-dtprel_g1.s: Likewise.
  * gas/aarch64/reloc-dtprel_g1-ilp32.s: Likewise.
  * gas/aarch64/reloc-dtprel_g1_nc.s: Likewise.
  * gas/aarch64/reloc-dtprel_g2.s: Likewise.
  * gas/aarch64/reloc-dtprel_hi12.s: Likewise.
  * gas/aarch64/reloc-dtprel_hi12-ilp32.s: Likewise.
  * gas/aarch64/reloc-dtprel_g0.d: New expectation file.
  * gas/aarch64/reloc-dtprel_g0-ilp32.d: Likewise.
  * gas/aarch64/reloc-dtprel_g0_nc.d: Likewise.
  * gas/aarch64/reloc-dtprel_g0_nc-ilp32.d: Likewise.
  * gas/aarch64/reloc-dtprel_g1.d: Likewise.
  * gas/aarch64/reloc-dtprel_g1-ilp32.d: Likewise.
  * gas/aarch64/reloc-dtprel_g1_nc.d: Likewise.
  * gas/aarch64/reloc-dtprel_g2.d: Likewise.
  * gas/aarch64/reloc-dtprel_hi12.d: Likewise.
  * gas/aarch64/reloc-dtprel_hi12-ilp32.d: Likewise.
2015-08-19 16:36:22 +01:00
Jiong Wang 13289c10e2 [AArch64][1/6] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC
2015-08-19  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC): New entry.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
  BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation modifiers.
  (md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC.
  (aarch64_force_relocation): Likewise.

gas/testsuite/
  * gas/aarch64/reloc-dtprel_lo12_nc.s: New testcase.
  * gas/aarch64/reloc-dtprel_lo12_nc-ilp32.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12_nc.d: New expectation file.
  * gas/aarch64/reloc-dtprel_lo12_nc-ilp32.d: Likewise.
2015-08-19 16:28:08 +01:00
Alan Modra db2ed2e0b9 Rationalize ARM .align
* gas/config/tc-arm.c (s_align): Delete.
	(md_pseudo_table): Use s_align_ptwo for "align".
	* gas/config/tc-arm.h (TC_ALIGN_ZERO_IS_DEFAULT): Define.
	* read.c (s_align): Modify for TC_ALIGN_ZERO_IS_DEFAULT.
2015-08-17 09:05:54 +09:30
Andre Vieira 4ab90a7a90 Fixes for unpredictable nops and 26-bit versions of teq,tst,cmn,cmp.
opcodes * arm-dis.c (print_insn_arm): Disassembling for all targets V6
	and higher with ARM instruction set will now mark the 26-bit
	versions of teq,tst,cmn and cmp as UNPREDICTABLE.
	(arm_opcodes): Fix for unpredictable nop being recognized as a teq.

test    * gas/arm/nops.d: New.
	* gas/arm/nops.s: New.
	* gas/arm/inst.d: Changed expectation file for 26-bit  teq,
	tst, cmn and cmp.
2015-08-13 11:39:08 +01:00
Alan Modra 19c2883a9b gas 0f handling
_start:
 .byte 0f-_start
0:

Fixes
..:2: Error: floating point number invalid
..:2: Error: junk at end of line, first unrecognized character is `_'

	* expr.c (operand): Rewrite handling of operands starting with "0f".
	If atof_generic only parses "-" or "+", treat as expression.
2015-08-13 16:06:20 +09:30
Alan Modra c14c7a8a61 gas 0b vs 0b0 vs 00b
* expr.c (integer_constant): Return O_absent expression if eol.
	(operand): For targets with both LOCAL_LABELS_FB and
	NUMBERS_WITH_SUFFIX set, treat "0b" not followed by binary
	digits as a local label reference.  Correct handling of 0b prefix.
	If a suffix is not allowed, error on 0B.
2015-08-13 15:59:40 +09:30
Alan Modra 9791c25049 Correct local label doc
* doc/as.texinfo (Local Labels): Allowed range of N in local
	labels is non-negative integers, not positive integers.
2015-08-13 15:53:49 +09:30
Max Filippov b46824bd49 xtensa: add --auto-litpools option
Auto-litpools is the automated version of text-section-literals: literal
pool candidate frags are planted every N frags and during relaxation
they are turned into actual literal pools where literals are moved to
become reachable for their first reference by L32R instruction.

2015-08-12  David Weatherford  <weath@cadence.com>
gas/
	* config/tc-xtensa.c (struct litpool_frag, struct litpool_seg):
	New structures.
	(xtensa_maybe_create_literal_pool_frag): New function.
	(litpool_seg_list, auto_litpools, auto_litpool_limit)
	(litpool_buf, litpool_slotbuf): New static variables.
	(option_auto_litpools, option_no_auto_litpools)
	(option_auto_litpool_limit): New enum identifiers.
	(md_longopts): Add entries for auto-litpools, no-auto-litpools
	and auto-litpool-limit.
	(md_parse_option): Handle option_auto_litpools,
	option_no_auto_litpools and option_auto_litpool_limit.
	(md_show_usage): Add help for --[no-]auto-litpools and
	--auto-litpool-limit.
	(xtensa_mark_literal_pool_location): Record a place for literal
	pool with a call to xtensa_maybe_create_literal_pool_frag.
	(get_literal_pool_location): Find highest priority literal pool
	or convert candidate to literal pool when auto-litpools are used.
	(xg_assemble_vliw_tokens): Create literal pool after jump
	instruction.
	(xtensa_check_frag_count): Create candidate literal pool every
	auto_litpool_limit frags.
	(xtensa_relax_frag): Add jump around literals to non-empty
	literal pool.
	(xtensa_move_literals): Estimate literal pool addresses and move
	unreachable literals closer to their users, converting candidate
	to literal pool if needed.
	(xtensa_switch_to_non_abs_literal_fragment): Only emit error
	about missing .literal_position in case auto-litpools are not
	used.
	* config/tc-xtensa.h (xtensa_relax_statesE): New relaxation
	state: RELAX_LITERAL_POOL_CANDIDATE_BEGIN.
	* doc/as.texinfo (Xtensa options):  Document --auto-litpools and
	--no-auto-litpools options.
	* doc/c-xtensa.texi (Xtensa options): Likewise.

2015-08-12  Max Filippov  <jcmvbkbc@gmail.com>
gas/testsuite/
	* gas/xtensa/all.exp: Add auto-litpools to the list of xtensa
	tests.
	* gas/xtensa/auto-litpools.s: New file: auto-litpools test.
	* gas/xtensa/auto-litpools.s: New file: auto-litpools test
	result pattern.
2015-08-12 20:19:58 +03:00
Simon Dardis 40fc1451c6 [MIPS] Map 'move' to 'or'.
The MIPS assembly idiom 'move' now maps to the 'or' machine instruction. This
change affects microMIPS, MIPS32, MIPS64.

2015-08-12  Simon Dardis  <simon.dardis@imgtec.com>

opcodes/

	* micromips-opc.c (micromips_opcodes): Re-order table so that move
	based on 'or' is first.
	* mips-opc.c (mips_builtin_opcodes): Ditto.

bfd/

	* elfxx-mips.c (STUB_MOVE): Change to use 'or' only.
	(mips_o32_exec_plt0_entry, mips_n32_exec_plt0_entry,
	mips_n64_exec_plt0_entry, micromips_insn32_o32_exec_plt0_entry):
	Update to use 'or' instead of 'addu/daddu'.
	(_bfd_mips_elf_finish_dynamic_symbol): Update usage of STUB_MOVE.
	(move_insns_32): Reorder table.

gas/

	* config/tc-mips.c (move_register): Change to use 'or' only.
	(s_cpload, s_cpsetup, s_cprestore, s_cpreturn): Update to
	use or for move.

gas/testsuite/

	* gas/mips/elf-rel23.d: Update test.
	* gas/mips/elf-rel23.d: Ditto.
	* gas/mips/elf-rel23a.d: Ditto.
	* gas/mips/elf-rel23b.d: Ditto.
	* gas/mips/elf_e_flags1.d: Ditto.
	* gas/mips/elf_e_flags2.d: Ditto.
	* gas/mips/elf_e_flags3.d: Ditto.
	* gas/mips/elf_e_flags4.d: Ditto.
	* gas/mips/loc-swap-dis.d: Ditto.
	* gas/mips/micromips-insn32.d: Ditto.
	* gas/mips/micromips-noinsn32.d: Ditto.
	* gas/mips/micromips-trap.d: Ditto.
	* gas/mips/micromips.d: Ditto.
	* gas/mips/mips-abi32-pic.d: Ditto.
	* gas/mips/mips-abi32.d: Ditto.
	* gas/mips/mips-gp32-fp32-pic.d: Ditto.
	* gas/mips/mips-gp32-fp32.d: Ditto.
	* gas/mips/mips-gp32-fp64-pic.d: Ditto.
	* gas/mips/mips-gp32-fp64.d: Ditto.
	* gas/mips/mips-gp64-fp32-pic.d: Ditto.
	* gas/mips/mips-gp64-fp32.d: Ditto.
	* gas/mips/mips-gp64-fp64-pic.d: Ditto.
	* gas/mips/mips-gp64-fp64.d: Ditto.
	* gas/mips/mipsr6@loc-swap-dis.d: Ditto.
	* gas/mips/tls-o32.d: Ditto.
	* gas/mips/uld2-eb.d: Ditto.
	* gas/mips/uld2-el.d: Ditto.
	* gas/mips/ulw2-eb-ilocks.d: Ditto.
	* gas/mips/ulw2-eb.d: Ditto.
	* gas/mips/ulw2-el-ilocks.d: Ditto.
	* gas/mips/ulw2-el.d: Ditto.
	* gas/mips/move.d: New test.
	* gas/mips/move.s: Ditto.
	* gas/mips/micromips32-move.d: Ditto.
	* gas/mips/micromips32-move.s: Ditto.
	* gas/mips/mips.exp: Run the new tests.

gold/

	* mips.cc (plt0_entry_o32, plt0_entry_n32, plt0_entry_n64,
	lazy_stub_normal_1, lazy_stub_normal_1_n64,
	lazy_stub_normal_2, lazy_stub_normal_2_n64, lazy_stub_big,
	lazy_stub_big_n64, lazy_stub_micromips32_normal_1_n64,
	lazy_stub_micromips32_normal_2_n64, lazy_stub_micromips32_big,
	lazy_stub_micromips32_big_n64): Update to use 'or' for move instead
	of 'addu/daddu'.

ld/testsuite/

	* ld-mips-elf/compressed-plt-1-n32-mips16.od: Update test.
	* ld-mips-elf/compressed-plt-1-n32-umips.od: Ditto.
	* ld-mips-elf/compressed-plt-1-o32-mips16-got.od: Ditto.
	* ld-mips-elf/compressed-plt-1-o32-mips16-only.od: Ditto.
	* ld-mips-elf/compressed-plt-1-o32-mips16-word.od: Ditto.
	* ld-mips-elf/compressed-plt-1-o32-mips16.od: Ditto.
	* ld-mips-elf/compressed-plt-1-o32-se.od: Ditto.
	* ld-mips-elf/compressed-plt-1-o32-umips-got.od: Ditto.
	* ld-mips-elf/compressed-plt-1-o32-umips-word.od: Ditto.
	* ld-mips-elf/compressed-plt-1-o32-umips.od: Ditto.
	* ld-mips-elf/jalx-2.dd: Ditto.
	* ld-mips-elf/mips16-pic-3.dd: Ditto.
	* ld-mips-elf/pic-and-nonpic-3a.dd: Ditto.
	* ld-mips-elf/pic-and-nonpic-3b.dd: Ditto.
	* ld-mips-elf/pic-and-nonpic-5b.dd: Ditto.
	* ld-mips-elf/pic-and-nonpic-6-n32.dd: Ditto.
	* ld-mips-elf/pic-and-nonpic-6-o32.dd: Ditto.
	* ld-mips-elf/stub-dynsym-1-10000.d: Ditto.
	* ld-mips-elf/stub-dynsym-1-2fe80.d: Ditto.
	* ld-mips-elf/stub-dynsym-1-7fff.d: Ditto.
	* ld-mips-elf/stub-dynsym-1-8000.d: Ditto.
	* ld-mips-elf/stub-dynsym-1-fff0.d: Ditto.
	* ld-mips-elf/tlsbin-o32.d: Ditto.
	* ld-mips-elf/tlsdyn-o32-1.d: Ditto.
	* ld-mips-elf/tlsdyn-o32-2.d: Ditto.
	* ld-mips-elf/tlsdyn-o32-3.d: Ditto.
	* ld-mips-elf/tlsdyn-o32.d: Ditto.
	* ld-mips-elf/tlslib-o32.d: Ditto.
2015-08-12 17:10:22 +01:00
H.J. Lu 3739860c11 Remove trailing spaces in gas 2015-08-12 04:40:42 -07:00
Jiong Wang 70151fb54a [AArch64][7/8] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12
2015-08-11  Jiong Wang  <jiong.wang@arm.com>

include/elf/
  * aarch64.h (R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12): Define.

bfd/
  * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12): New entry.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
  BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation modifiers
  "dtprel_lo12".
  (md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12.
  (aarch64_force_relocation): Likewise.

gas/testsuite/
  * gas/aarch64/reloc-dtprel_lo12-1.s: New testcase.
  * gas/aarch64/reloc-dtprel_lo12-ilp32-1.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12-1.d: New expectation file.
  * gas/aarch64/reloc-dtprel_lo12-ilp32-1.d: Likewise.
2015-08-11 21:26:31 +01:00
Jiong Wang a12fad50d2 [AArch64][5/8] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC
2015-08-11  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC): New entry.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
  BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation modifiers.
  (md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC.
  (aarch64_force_relocation): Likewise.

gas/testsuite/
  * gas/aarch64/reloc-tlsldm_lo12_nc-1.s: New testcase.
  * gas/aarch64/reloc-tlsldm_lo12_nc-ilp32-1.s: Likewise.
  * gas/aarch64/reloc-tlsldm_lo12_nc-1.d: New expectation file.
  * gas/aarch64/reloc-tlsldm_lo12_nc-ilp32-1.d: Likewise.
2015-08-11 21:25:51 +01:00
Jiong Wang 1107e076cf [AArch64][2/8] GAS support BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21
2015-08-11  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21): New entry.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
  BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation modifiers.
  (md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21.
  (aarch64_force_relocation): Likewise.

gas/testsuite/
  * gas/aarch64/reloc-tlsldm-page-1.s: New testcase.
  * gas/aarch64/reloc-tlsldm-page-ilp32-1.s: Likewise.
  * gas/aarch64/reloc-tlsldm-page-1.d: New expectation file.
  * gas/aarch64/reloc-tlsldm-page-ilp32-1.d: Likewise.
2015-08-11 21:24:38 +01:00
Nick Clifton eff0bc54a3 Fix compile time warning messages about constant expressions where a value is being shifted into bit 31.
PR gas/18765
	* config/tc-arm.c (move_or_literal_pool): Use U suffix to remove
	compile time warnings about constant expressions being shifted
	into bit 31.
	(do_iwmmxt_wldstd): Likewise.
	(do_iwmmxt_wrwrwr_or_imm5): Likewise.
	(md_assemble): Likewise.
2015-08-11 10:07:21 +01:00
Nick Clifton e66c3c2568 Convert 'A && (!A || B)' to 'A || B' in various places.
PR gas/18574
	* config/tc-msp430.c (msp430_operands): Rewrite if statements to
	remove redundant checks.
	(md_apply_fix): Likewise.
2015-08-11 09:49:18 +01:00
Nick Clifton d29b2a1ece Fix typo checking MMIX operands.
PR gas/18677
	* config/tc-mmix.c (md_assemble): Fix typo checking operands with
	a numeric constant value.
2015-08-11 09:43:16 +01:00
Nick Clifton 88fd0449a3 Fix typo checking number of operands.
PR gas/18678
	* config/tc-tic4x.c (tic4x_insn_check): Fix typo.
2015-08-11 09:40:02 +01:00
Nick Clifton 2b29bb41d5 Fix a typo where the same name was checked twice.
PR gas/18679
	* config/xtensa-relax.c (same_operand_name): Fix typo.
2015-08-11 09:36:57 +01:00
Robert Suchanek 75fb7498c2 Add SIGRIE instruction for MIPS R6
opcodes/

	* mips-opc.c (mips_builtin_opcodes): Add "sigrie".

gas/testsuite/

	* gas/mips/r6.s: Add tests for "sigrie".
	* gas/mips/r6.d: Check for "sigrie".
	* gas/mips/r6-n32.d: Likewise.
	* gas/mips/r6-n64.d: Likewise.
2015-08-10 09:14:07 +01:00
Hans-Peter Nilsson 8fe3f3d6af tc-arm.c: Append ULL to 0xFFFFFFFFFFFFF to avoid errors on 32-bit hosts. 2015-08-08 22:44:37 +02:00
Thomas Preud'homme edc66de9a5 2015-08-04 Thomas Preud'homme <thomas.preudhomme@arm.com>
* doc/c-aarch64.texi (.xword): Document directive.
2015-08-04 09:39:42 +08:00
Nick Clifton d60646b958 Fix thinkos in the description of the --hash-size command line option for GAS.
* doc/as.texinfo (Overview): Add --hash-size to the synopsis and
	fix typo in its entry: @kindex -> @item.
2015-08-03 09:19:00 +01:00
H.J. Lu a8484f9612 Properly disassemble movnti in Intel mode
gas/testsuite/

	PR binutils/13571
	* gas/i386/i386.exp: Run i386-intel and x86_64-intel.
	* gas/i386/i386-intel.d: New file.
	* gas/i386/x86_64-intel.d: Likewise.

opcodes/

	PR binutils/13571
	* i386-dis.c (MOD_0FC3): New.
	(PREFIX_0FC3): Renamed to ...
	(PREFIX_MOD_0_0FC3): This.
	(dis386_twobyte): Replace PREFIX_0FC3 with MOD_0FC3.
	(prefix_table): Replace Ma with Ev on movntiS.
	(mod_table): Add MOD_0FC3.
2015-07-30 04:17:02 -07:00
Robert Suchanek c6e5c03a2c Add cores for M5100 series
gas/

	* config/tc-mips.c (mips_cpu_info_table): Add m5100 and m5101 entries.
	* doc/c-mips.texi: Document m5100 and m5101 for -march=.
2015-07-28 11:26:39 +01:00
Robert Suchanek 77403ce966 Add -march=interaptiv
gas/

	* config/tc-mips.c (mips_cpu_info_table): Add interaptiv entry.
	* doc/c-mips.text: Document -march=interaptiv.
2015-07-28 11:26:31 +01:00
H.J. Lu 37a42ee9ad Regenerate configure files
bfd/

	* configure: Regenerated.

binutils/

	* configure: Regenerated.

gas/

	* configure: Regenerated.

gold/

	* configure: Regenerated.

gprof/

	* configure: Regenerated.

ld/

	* configure: Regenerated.

opcodes/

	* configure: Regenerated.
2015-07-27 07:56:32 -07:00
Nick Clifton aff1a65ecb Fix the evaluation of RL78 complex relocs, by making immediate values be computed relative to a new absolute symbol.
gas	* config/tc-rl78.c (rl78_abs_sym): New local variable.
	(md_begin): Initialise the new symbol.
	(OPIMM): Define the value to be relative to the new symbol and not
	the absolute section symbol.

ld	* emulparams/elf32rl78.sh (OTHER_SECTIONS): Provide a value for
	the _-rl78_abs__ symbol.

tests	* gas/all/struct.d: Allow for extra symbols in the output.
	* gas/macros/test1.d: Likewise.
	* gas/elf/elf.exp: Add an rl78 machine.
	* gas/elf/sections2e-rl78: New file.

tests	* binutils-all/localize-hidden-1.d: Allow for extra symbols in the
	output.
        * binutils-all/strip-11.d: Skip for the RL78.
2015-07-24 16:44:27 +01:00
H.J. Lu 72f4393d8c Remove leading/trailing white spaces in ChangeLog 2015-07-24 04:16:47 -07:00
H.J. Lu 20c2a61587 Fix memory operand size for vcvtt?ps2u?qq instructions
When disassembling AVX512 vcvtt?ps2u?q instructions with data
broadcasting enabled, memory operand size should be DWORD.

gas/testsuite/

	PR binutils/18631
	* gas/i386avx512dq-intel.d: Replace "QWORD" with "DWORD" in
	vcvtt?ps2u?qq instructions disassembly regexes.
	Add disassembly regex for new test.
	* gas/i386/avx512dq.d: Likewise.
	* gas/i386/avx512dq_vl-intel.d: Likewise.
	* gas/i386/avx512dq_vl.d: Likewise.
	* gas/i386/x86-64-avx512dq-intel.d: Likewise.
	* gas/i386/x86-64-avx512dq.d: Likewise.
	* gas/i386/x86-64-avx512dq_vl-intel.d: Likewise.
	* gas/i386/x86-64-avx512dq_vl.d: Likewise.
	* gas/i386/avx512dq.s: Add new test for Intel syntax with memory
	operand and broadcasting enabled.
	* gas/i386/avx512dq_vl.s: Likewise.
	* gas/i386/x86-64-avx512dq.s: Likewise.
	* gas/i386/x86-64-avx512dq_vl.s: Likewise.

opcodes/

	PR binutils/18631
	* i386-dis-evex.h (EVEX_W_0F78_P_2): Replace "EXxmmq" with
	"EXEvexHalfBcstXmmq" for the second operand.
	(EVEX_W_0F79_P_2): Likewise.
	(EVEX_W_0F7A_P_2): Likewise.
	(EVEX_W_0F7B_P_2): Likewise.
2015-07-22 13:26:21 -07:00
Alan Modra 511b1657d2 gas line buffer handling
This fixes a segfault when macro definitions end on the last line of a
file, and that line isn't properly terminated with a newline.  gas
used to throw away the last line in cases like this, whereas in other
cases gas added the missing newline.  So I've also made gas
consistently provide a missing newline.

	PR gas/18687
	* input-scrub.c (input_scrub_next_buffer): Rearrange and simplify
	loop.  Don't drop lines at end of file lacking a newline, add a
	newline instead.  Ensure partial_size is zero whenever
	partial_where is NULL.  Adjust buffer size for extra char.
	(input_scrub_push, input_scrub_begin): Adjust buffer size here too.
2015-07-22 22:04:28 +09:30
Matthew Wahab f33026a965 [ARM] Support correctly spelled ARMv6KZ architecture names
2015-07-20  Matthew Wahab  <matthew.wahab@arm.com>

gas/
    * NEWS: Mention corrected spelling of armv6kz.
    * config/tc-arm.c (arm_cpus): Replace ARM_ARCH_V6ZK with
    ARM_ARCH_V6KZ.
    (arm_archs): Likewise. Also add "armv6kz" and "armv6kzt2".
    * doc/c-arm.texi: Replace "armv6zk" with "armv6kz".

gas/testsuite

    * gas/arm/attr-march-armv6kz.d: New.
    * gas/arm/attr-march-armv6kzt2.d: New.

include/opcode

    * arm.h (ARM_AEXT_V6ZK): Rename to ARM_AEXT_V6KZ.
    (ARM_AEXT_V6ZKT2): Rename to ARM_AEXT_V6KZT2.
    (ARM_ARCH_V6ZK): Rename to ARM_ARCH_V6KZ.
    (ARM_ARCH_V6ZKT2): Rename to ARM_ARCH_V6KZT2.
2015-07-21 09:43:35 +01:00
H.J. Lu 7ac018954b Make binutils abort message GDB friendly
We used to generate abort messages like:

internal error, aborting at .../bfd/elf64-x86-64.c line 1554 in elf_x86_64_check_relocs

We can't cut and paste "file line ???" to GDB.  This patch changes those
abort messages to

internal error, aborting at .../bfd/elf64-x86-64.c:1554 in elf_x86_64_check_relocs

so that we can cut and paste "file:???" to GDB.

bfd/

	* bfd.c (_bfd_abort): Replace " line " with ":" in output
	message.

gas/

	* messages.c (as_assert): Replace " line " with ":" in output
	message.
	(as_abort): Likewise.

ld/

	* ldmisc.c (ld_abort): Replace " line " with ":" in output
	message.
2015-07-20 05:53:31 -07:00
Alessandro Marzocchi 6f1c214259 Updates the ARM disassembler's output of floating point constants to include the actual floating point value.
opcodes	* arm-dis.c (print_insn_coprocessor): Added support for quarter
	float bitfield format.
	(coprocessor_opcodes): Changed VFP vmov reg,immediate to use new
	quarter float bitfield format.

tests	* gas/arm/vfpv3-const-conv.d: Update expected result due to change
	of comment for vmov reg,immediate with VFP coprocessor.
2015-07-16 16:43:16 +01:00
Jiong Wang 6c37fedc41 [AArch64][2/3] GAS support BFD_RELOC_AARCH64_TLSLD_ADR_PREL21 2015-07-16 15:43:21 +01:00
Matthew Wahab 081e4c7d67 [ARM] Add crypto-neon-fp-armv8.1 as an fpu option
2015-07-16  Matthew Wahab  <matthew.wahab@arm.com>

gas/
  * config/tc-arm.c (arm_fpus): Add crypto-neon-fp-armv8.1.
  * doc/c-arm.texi (-mfpu=): Likewise.  Correct the entry for
  neon-fp-armv8.1.
2015-07-16 15:11:30 +01:00
James Greenhalgh 84b52b6651 [ARM] Make human parsing of "processor does not support instruction in mode" error messages easier
2015-07-16  James Greenhalgh  <james.greenhalgh@arm.com>

      gas/
	* config/tc-arm.c (md_assemble): Rephrase the "selected processor does
	not support ARM mode" error messages.

      gas/testsuite/
	* gas/arm/arch7em-bad.l: Update expected errors.
	* gas/arm/arch7m-bad.l: Likewise.
	* gas/arm/arm-idiv-bad.l: Likewise.
	* gas/arm/arm7-bad.l: Likewise.
	* gas/arm/armv1-bad.l: Likewise.
	* gas/arm/thumb-w-bad.l: Likewise.
2015-07-16 14:43:00 +01:00
H.J. Lu 189ebcf915 Make x86 Linux assembler default to gABI compliant
The default compression is gABI compliant now.  This patch makes the
x86 Linux assembler default to gABI compliant.

	* config/tc-i386.c (flag_compress_debug): Replace
	COMPRESS_DEBUG_GNU_ZLIB with COMPRESS_DEBUG_GABI_ZLIB.
2015-07-15 07:31:55 -07:00
H.J. Lu 19a7fe52ae Make default compression gABI compliant
All programs in binutils+gdb git repo now support gABI compression
with the SHF_COMPRESSED bit.  This patch makes the zlib-gabi option
as compression default for gas, gold, ld and objcopy, instead of the
zlib-gnu option whose outputs are incompatible with gABI.

binutils/

	* objcopy.c (copy_file): Set BFD_COMPRESS_GABI if not
	zlib-gnu.
	* doc/binutils.texi: Change --compress-debug-sections and
	--compress-debug-sections=zlib to zlib-gabi.

binutils/testsuite/

	* binutils-all/compress.exp: Update.

gas/

	* as.c (parse_args): Make --compress-debug-sections and
	--compress-debug-sections=zlib the same as
	--compress-debug-sections=zlib-gabi.
	* doc/as.texinfo: Change --compress-debug-sections and
	--compress-debug-sections=zlib to zlib-gabi.

gold/

	* compressed_output.cc (Output_compressed_section::set_final_data_size):
	Make --compress-debug-sections=zlib the same as
	--compress-debug-sections=zlib-gabi.
	* testsuite/Makefile.am (flagstest_compress_debug_sections.check):
	Expect ".debug_.*" with the SHF_COMPRESSED bit, instead of
	".zdebug_".
	* testsuite/Makefile.in: Regenerated.

ld/

	* emultempl/elf32.em (gld${EMULATION_NAME}_handle_option): Make
	--compress-debug-sections=zlib the same as
	--compress-debug-sections=zlib-gabi.
	* ld.texinfo: Change --compress-debug-sections=zlib to zlib-gabi.

ld/testsuite/

	* ld-elf/zlibbegin.rS: Updated to .debug_.* with the
	SHF_COMPRESSED bit.
	* ld-elf/zlibnormal.rS: Likewise.
2015-07-14 10:26:23 -07:00
H.J. Lu 209ce4c2de Updated to accept .debug_* sections
* gas/i386/dw2-compress-1.d: Updated to accept .debug_* sections.
2015-07-10 08:41:10 -07:00
Alan Modra 40f77f827b Add missing changelog entries 2015-07-10 20:08:55 +09:30
Catherine Moore 3350cc01de 2015-07-09 Catherine Moore <clm@codesourcery.com>
include/
        * elf/mips/mips.h (Val_GNU_MIPS_ABI_FP_NAN2008): New.

        gas/
        * config/tc-mips.c (check_fpabi):  Handle
        VAL_GNU_MIPS_ABI_FP_NAN2008.

        binutils/
        * readelf.c (print_mips_fp_abi_value): Handle
        Val_GNU_MIPS_ABI_FP_NAN2008.

        ld/testsuite/
        * ld-mips-elf/attr-gnu-4-08.d: Update expected output.
        * ld-mips-elf/attr-gnu-4-09.d: New.
        * ld-mips-elf/attr-gnu-4-19.d: New.
        * ld-mips-elf/attr-gnu-4-29.d: New.
        * ld-mips-elf/attr-gnu-4-39.d: New.
        * ld-mips-elf/attr-gnu-4-49.d: New.
        * ld-mips-elf/attr-gnu-4-59.d: New.
        * ld-mips-elf/attr-gnu-4-69.d: New.
        * ld-mips-elf/attr-gnu-4-79.d: New.
        * ld-mips-elf/attr-gnu-4-89.d: New.
        * ld-mips-elf/attr-gnu-4-9.s: New.
        * ld-mips-elf/mips-elf.exp: Run new tests.
2015-07-09 08:26:10 -07:00
Richard Sandiford 7e30235281 Clarify case requirements for gas pseudo-ops
gas/
2015-07-08  Ciro Santilli  <ciro.santilli@gmail.com>

	* doc/as.texinfo: Clarify case requirements for pseudo ops.
2015-07-08 20:11:06 +01:00
Denis Chertykov 328e7bfdde Define DIFF_EXPR_OK for avr target to allow PC relative difference relocation.
When generating relocation (tc_gen_reloc) 32 bit relocation fixup
is changed to new 32 bit PC relative relocation if the fixup has pc-relative
flag set.

bfd/ChangeLog

2015-07-06  Pitchumani Sivanupandi <pitchumani.s@atmel.com>

    * elf32-avr.c: Add 32 bit PC relative relocation for AVR target.

gas/ChangeLog

2015-07-06  Pitchumani Sivanupandi <pitchumani.s@atmel.com>

    * config/tc-avr.c (tc_gen_reloc): Change 32 bit relocation to
    32 bit PC relative and update offset if the fixup is pc-relative.
    * config/tc-avr.h (DIFF_EXPR_OK): Define to enable PC relative diff
    relocs.

gas/testsuite/ChangeLog

2015-07-06  Pitchumani Sivanupandi <pitchumani.s@atmel.com>

    * gas/avr/pc-relative-reloc.d: New test for 32 bit pc relative reloc.
    * gas/avr/per-function-debugline.s: New test source.

include/ChangeLog

2015-07-06  Pitchumani Sivanupandi <pitchumani.s@atmel.com>

    * elf/avr.h: Add new 32 bit PC relative relocation.

ld/testsuite/ChangeLog

2015-07-06  Pitchumani Sivanupandi <pitchumani.s@atmel.com>

    * ld-avr/gc-section-debugline.d: New test.
    * ld-avr/per-function-debugline.s: Source for new test.
2015-07-08 21:41:52 +03:00
Alan Modra ef5a96d564 Remove ppc860, ppc750cl, ppc7450 insns from common ppc.
Back in the day support for these processors was added, we probably
didn't want to waste PPC_OPCODE bits on minor variations.  I've had a
complaint that disassembly of mfspr/mtspr was wrong for power8.  This
patch fixes that problem.

Note that since -m860/-m850/-m821 are new gas options enabling the
mpc8xx specific mfspr/mtspr variants it is possible that this change
will break some mpc8xx assembly code.  ie. you might need to modify
makefiles to pass -m860 to gas.

include/opcode/
	* ppc.h (PPC_OPCODE_750, PPC_OPCODE_7450, PPC_OPCODE_860): Define.
opcodes/
	* ppc-opc.c (PPC750, PPC7450, PPC860): Define using PPC_OPCODE_*.
	* ppc-dis.c (ppc_opts): Add 821, 850 and 860 entries.  Add
	PPC_OPCODE_7450 to 7450 entry.  Add PPC_OPCODE_750 to 750cl entry.
gas/
	* config/tc-ppc.c (md_show_usage): Add -m821, -m850, -m860.
	* doc/c-ppc.texi (PowerPC-Opts): Likewise.
gas/testsuite/
	* gas/ppc/titan.d: Correct mfmcsrr0 disassembly.
2015-07-03 10:57:14 +09:30
Sandra Loosemore 0cb5a38a5b Assembler tests for Nios II R2
2015-07-01  Sandra Loosemore  <sandra@codesourcery.com>
	    Cesar Philippidis  <cesar@codesourcery.com>

	gas/testsuite/
	* gas/nios2/add-r2.d: New.
	* gas/nios2/align_fill-r2.d: New.
	* gas/nios2/align_text-r2.d: New.
	* gas/nios2/aligned_text-r2.d: New.
	* gas/nios2/and-r2.d: New.
	* gas/nios2/andc.d: New.
	* gas/nios2/andc.s: New.
	* gas/nios2/bmx.d: New.
	* gas/nios2/bmx.s: New.
	* gas/nios2/branch-r2.d: New.
	* gas/nios2/break-r2.d: New.
	* gas/nios2/bret-r2.d: New.
	* gas/nios2/cache-r2.d: New.
	* gas/nios2/cache-r2.s: New.
	* gas/nios2/call-r2.d: New.
	* gas/nios2/call26-r2.d: New.
	* gas/nios2/call26_noat-r2.d: New.
	* gas/nios2/call_noat-r2.d: New.
	* gas/nios2/cdx_add.d: New.
	* gas/nios2/cdx_add.s: New.
	* gas/nios2/cdx_and.d: New.
	* gas/nios2/cdx_and.s: New.
	* gas/nios2/cdx_break.d: New.
	* gas/nios2/cdx_break.s: New.
	* gas/nios2/cdx_callr.d: New.
	* gas/nios2/cdx_callr.s: New.
	* gas/nios2/cdx_jmpr.d: New.
	* gas/nios2/cdx_jmpr.s: New.
	* gas/nios2/cdx_ldbu.d: New.
	* gas/nios2/cdx_ldbu.s: New.
	* gas/nios2/cdx_ldhu.d: New.
	* gas/nios2/cdx_ldhu.s: New.
	* gas/nios2/cdx_ldw.d: New.
	* gas/nios2/cdx_ldw.s: New.
	* gas/nios2/cdx_ldwsp.d: New.
	* gas/nios2/cdx_ldwsp.s: New.
	* gas/nios2/cdx_mov.d: New.
	* gas/nios2/cdx_mov.s: New.
	* gas/nios2/cdx_neg.d: New.
	* gas/nios2/cdx_neg.s: New.
	* gas/nios2/cdx_not.d: New.
	* gas/nios2/cdx_not.s: New.
	* gas/nios2/cdx_or.d: New.
	* gas/nios2/cdx_or.s: New.
	* gas/nios2/cdx_pop.d: New.
	* gas/nios2/cdx_pop.s: New.
	* gas/nios2/cdx_push.d: New.
	* gas/nios2/cdx_push.s: New.
	* gas/nios2/cdx_relax.d: New.
	* gas/nios2/cdx_relax.s: New.
	* gas/nios2/cdx_ret.d: New.
	* gas/nios2/cdx_ret.s: New.
	* gas/nios2/cdx_sll.d: New.
	* gas/nios2/cdx_sll.s: New.
	* gas/nios2/cdx_spaddi.d: New.
	* gas/nios2/cdx_spaddi.s: New.
	* gas/nios2/cdx_spdeci.d: New.
	* gas/nios2/cdx_spdeci.s: New.
	* gas/nios2/cdx_srl.d: New.
	* gas/nios2/cdx_srl.s: New.
	* gas/nios2/cdx_stb.d: New.
	* gas/nios2/cdx_stb.s: New.
	* gas/nios2/cdx_sth.d: New.
	* gas/nios2/cdx_sth.s: New.
	* gas/nios2/cdx_stw.d: New.
	* gas/nios2/cdx_stw.s: New.
	* gas/nios2/cdx_stwsp.d: New.
	* gas/nios2/cdx_stwsp.s: New.
	* gas/nios2/cdx_sub.d: New.
	* gas/nios2/cdx_sub.s: New.
	* gas/nios2/cdx_trap.d: New.
	* gas/nios2/cdx_trap.s: New.
	* gas/nios2/cdx_xor.d: New.
	* gas/nios2/cdx_xor.s: New.
	* gas/nios2/cmp-r2.d: New.
	* gas/nios2/comments-r2.d: New.
	* gas/nios2/complex-r2.d: New.
	* gas/nios2/ctl-r2.d: New.
	* gas/nios2/custom-r2.d: New.
	* gas/nios2/eni.d: New.
	* gas/nios2/eni.s: New.
	* gas/nios2/etbt-r2.d: New.
	* gas/nios2/flushda-r2.d: New.
	* gas/nios2/jmp-r2.d: New.
	* gas/nios2/ldb-r2.d: New.
	* gas/nios2/ldb-r2.s: New.
	* gas/nios2/ldh-r2.d: New.
	* gas/nios2/ldh-r2.s: New.
	* gas/nios2/ldw-r2.d: New.
	* gas/nios2/ldw-r2.s: New.
	* gas/nios2/ldwm.d: New.
	* gas/nios2/ldwm.s: New.
	* gas/nios2/lineseparator-r2.d: New.
	* gas/nios2/movia-r2.d: New.
	* gas/nios2/mpx.d: New.
	* gas/nios2/mpx.s: New.
	* gas/nios2/mul-r2.d: New.
	* gas/nios2/nop-r2.d: New.
	* gas/nios2/nop-r2.s: New.
	* gas/nios2/nor-r2.d: New.
	* gas/nios2/or-r2.d: New.
	* gas/nios2/rdprs-r2.d: New.
	* gas/nios2/rdprs-r2.s: New.
	* gas/nios2/registers-r2.d: New.
	* gas/nios2/ret-r2.d: New.
	* gas/nios2/rotate-r2.d: New.
	* gas/nios2/stb-r2.d: New.
	* gas/nios2/stb-r2.s: New.
	* gas/nios2/sth-r2.d: New.
	* gas/nios2/sth-r2.s: New.
	* gas/nios2/stw-r2.d: New.
	* gas/nios2/stw-r2.s: New.
	* gas/nios2/stwm.d: New.
	* gas/nios2/stwm.s: New.
	* gas/nios2/sub-r2.d: New.
	* gas/nios2/sync-r2.d: New.
	* gas/nios2/trap-r2.d: New.
	* gas/nios2/tret-r2.d: New.
	* gas/nios2/wrpie.d: New.
	* gas/nios2/wrpie.s: New.
	* gas/nios2/wrprs-r2.d: New.
	* gas/nios2/xor-r2.d: New.
2015-07-01 16:11:47 -07:00
Sandra Loosemore c8c8175b62 Opcodes and assembler support for Nios II R2
2015-07-01  Sandra Loosemore  <sandra@codesourcery.com>
	    Cesar Philippidis  <cesar@codesourcery.com>

	gas/
	* config/tc-nios2.c (nios2_min_align): New.
	(nop): Replace with....
	(nop_r1, nop_r2, nop_r2_cdx, nop32, nop16): New.
	(nios2_align): Handle alignment on 2-byte boundaries when CDX
	instructions may be present.
	(s_nios2_align): Adjust reference to nop.
	(CDXBRANCH, IS_CDXBRANCH): New.
	(CDX_UBRANCH_SUBTYPE, CDX_CBRANCH_SUBTYPE): New.
	(nios2_relax_subtype_size): Handle 2-byte CDX branches.
	(nios2_relax_frag): Likewise.
	(md_convert_frag): Handle R2 encodings.
	(nios2_check_overflow): Check that low-order bits are zero
	before applying rightshift from howto.
	(nios2_check_overflow): Correct negative overflow calculation.
	(nios2_diagnose_overflow): Handle signed_immed12_overflow.  Issue
	generic overflow messages for miscellaneous instruction formats.
	(md_apply_fix): Recognize new R2 relocations.  For pc_relative
	relocations, store fixup in *valP.
	(nios2_reglist_mask, nios2_reglist_dir): New.
	(nios2_parse_reglist): New.
	(nios2_parse_base_register): New.
	(nios2_assemble_expression): Handle constant expressions designated
	by BFD_RELOC_NONE.
	(nios2_assemble_reg3): New.
	(nios2_assemble_arg_c): Handle R2 instruction formats.
	(nios2_assemble_arg_d): Likewise.
	(nios2_assemble_arg_s): Likewise.
	(nios2_assemble_arg_t): Likewise.
	(nios2_assemble_arg_D): New.
	(nios2_assemble_arg_S): New.
	(nios2_assemble_arg_T): New.
	(nios2_assemble_arg_i): Handle R2 instruction formats.
	(nios2_assemble_arg_I): New.
	(nios2_assemble_arg_u): Handle R2 instruction formats.
	(nios2_assemble_arg_U): New.
	(nios2_assemble_arg_V): New.
	(nios2_assemble_arg_W): New.
	(nios2_assemble_arg_X): New.
	(nios2_assemble_arg_Y): New.
	(nios2_assemble_arg_o): Handle R2 instruction formats.
	(nios2_assemble_arg_O): New.
	(nios2_assemble_arg_P): New.
	(nios2_assemble_arg_j): Handle R2 instruction formats.
	(nios2_assemble_arg_k): New.
	(nios2_assemble_arg_l): Handle R2 instruction formats.
	(nios2_assemble_arg_m): Likewise.
	(nios2_assemble_arg_M): New.
	(nios2_assemble_arg_N): New.
	(nios2_assemble_arg_e): New.
	(nios2_assemble_arg_f): New.
	(nios2_assemble_arg_g): New.
	(nios2_assemble_arg_h): New.
	(nios2_assemble_arg_R): New.
	(nios2_assemble_arg_B): New.
	(nios2_assemble_args): Handle new argument letters.
	(nios2_consume_arg): Likewise.
	(nios2_translate_pseudo_insn): Avoid dereferencing null pointer
	in error message.
	(nios2_ps_insn_info_structs): Add nop.n.
	(output_ubranch): Handle CDX branches.
	(output_cbranch): Likewise.
	(output_call): Handle R2 encodings.
	(output_movia): Likewise.
	(md_begin): Initialize nios2_min_align.
	(md_assemble): Align to nios2_min_align.  Adjust nios2_min_align
	if a 16-bit instruction is seen.
	(nios2_cons_align): Use appropriate nop pattern.

	include/opcode/
	* nios2.h (enum iw_format_type): Add R2 formats.
	(enum overflow_type): Add signed_immed12_overflow and
	enumeration_overflow for R2.
	(struct nios2_opcode): Document new argument letters for R2.
	(REG_3BIT, REG_LDWM, REG_POP): Define.
	(includes): Include nios2r2.h.
	(nios2_r2_opcodes, nios2_num_r2_opcodes): Declare.
	(nios2_r2_asi_n_mappings, nios2_num_r2_asi_n_mappings): Declare.
	(nios2_r2_shi_n_mappings, nios2_num_r2_shi_n_mappings): Declare.
	(nios2_r2_andi_n_mappings, nios2_num_r2_andi_n_mappings): Declare.
	(nios2_r2_reg3_mappings, nios2_num_r2_reg3_mappings): Declare.
	(nios2_r2_reg_range_mappings, nios2_num_r2_reg_range_mappings):
	Declare.
	* nios2r2.h: New file.

	opcodes/
	* nios2-dis.c (nios2_extract_opcode): New.
	(nios2_disassembler_state): New.
	(nios2_find_opcode_hash): Use mach parameter to select correct
	disassembler state.
	(nios2_print_insn_arg): Extend to support new R2 argument letters
	and formats.
	(print_insn_nios2): Check for 16-bit instruction at end of memory.
	* nios2-opc.c (nios2_builtin_regs): Add R2 register attributes.
	(NIOS2_NUM_OPCODES): Rename to...
	(NIOS2_NUM_R1_OPCODES): This.
	(nios2_r2_opcodes): New.
	(NIOS2_NUM_R2_OPCODES): New.
	(nios2_num_r2_opcodes): New.
	(nios2_r2_asi_n_mappings, nios2_num_r2_asi_n_mappings): New.
	(nios2_r2_shi_n_mappings, nios2_num_r2_shi_n_mappings): New.
	(nios2_r2_andi_n_mappings, nios2_num_r2_andi_n_mappings): New.
	(nios2_r2_reg3_mappings, nios2_num_r2_reg3_mappings): New.
	(nios2_r2_reg_range_mappings, nios2_num_r2_reg_range_mappings):	New.
2015-07-01 16:08:03 -07:00
Sandra Loosemore 965b1d8083 Add Nios II arch flags and compatibility tests
2015-07-01  Sandra Loosemore  <sandra@codesourcery.com>
	    Cesar Philippidis  <cesar@codesourcery.com>

	bfd/
	* archures.c (bfd_mach_nios2r1, bfd_mach_nios2r2): New.
	* bfd-in2.h: Regenerated.
	* cpu-nios2.c (nios2_compatible): New.
	(N): Use nios2_compatible instead of bfd_default_compatible.
	(NIOS2R1_NEXT, NIOS2R2_NEXT): Define.
	(arch_info_struct): New.
	(bfd_nios2_arch): Chain to NIOS2R1_NEXT.
	* elf32-nios2.c (is_nios2_elf): New.
	(nios2_elf32_merge_private_bfd_data): New.
	(nios2_elf32_object_p): New.
	(bfd_elf32_bfd_merge_private_bfd_data): Define.
	(elf_backend_object_p): Define.

	gas/
	* config/tc-nios2.c: Adjust includes.
	(OPTION_MARCH): Define.
	(md_longopts): Add -march option.
	(nios2_architecture): New.
	(nios2_use_arch): New.
	(md_parse_option): Handle OPTION_MARCH.
	(md_show_usage): Document -march.
	(md_begin): Set arch in BFD.
	(nios2_elf_final_processing): New.
	* config/tc-nios2.h (elf_tc_final_processing): Define.
	(nios2_elf_final_processing): New.
	* doc/c-nios2.texi (-march): Add documentation.

	include/elf/
	* nios2.h (EF_NIOS2_ARCH_R1, EF_NIOS2_ARCH_R2): Define.

	ld/testsuite/
	* ld-nios2/mixed1a.d: New.
	* ld-nios2/mixed1a.s: New.
	* ld-nios2/mixed1b.d: New.
	* ld-nios2/mixed1b.s: New.
	* ld-nios2/nios2.exp: Build the new compatibility tests.
2015-07-01 15:55:28 -07:00
Amit Pawar 9916071f8d Add support for monitorx/mwaitx instructions
gas/

	* config/tc-i386.c (cpu_arch): Add .mwaitx.
	(process_immext): Check operands for monitorx/mwaitx instructions.
	* doc/c-i386.texi: Document mwaitx.

gas/testsuite/

	* gas/i386/i386.exp: Add new mwaitx test cases.
	* gas/i386/mwaitx.s: New.
	* gas/i386/mwaitx-bdver4.d: New.
	* gas/i386/x86-64-mwaitx.s: New.
	* gas/i386/x86-64-mwaitx-bdver4.d: New.
	* gas/i386/mwaitx-reg.s: New.
	* gas/i386/mwaitx-reg.l: New.
	* gas/i386/x86-64-mwaitx-reg.l: New.
	* gas/i386/x86-64-mwaitx-reg.s: New.
	* gas/i386/arch-13.s: Updated.
	* gas/i386/arch-13.d: Updated.
	* gas/i386/arch-13-znver1.d: Updated.
	* gas/i386/x86-64-arch-3.s: Updated.
	* gas/i386/x86-64-arch-3.d: Updated.
	* gas/i386/x86-64-arch-3-znver1.d: Updated.

opcodes/

	* i386-dis.c (OP_Mwaitx): New.
	(rm_table): Add monitorx/mwaitx.
	* i386-gen.c (cpu_flag_init): Add CpuMWAITX to CPU_BDVER4_FLAGS
	and CPU_ZNVER1_FLAGS.  Add CPU_MWAITX_FLAGS.
	(operand_type_init): Add CpuMWAITX.
	* i386-opc.h (CpuMWAITX): New.
	(i386_cpu_flags): Add cpumwaitx.
	* i386-opc.tbl: Add monitorx and mwaitx.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
2015-06-30 07:50:12 -07:00
Nick Clifton 54f66250d7 Add support for SADDR addressing to the RL78 port.
gas	* config/rl78-parse.y: Tag all saddr expressions throughout.
	(SET_SA): New.
	(expr_is_saddr): Allow symbolic expressions.
	* config/tc-rl78.c (md_apply_fix): Handle SADDR.

bfd	* elf32-rl78.c (rl78_elf_howto_table): Add RH_SADDR.
        (rl78_reloc_map): Add R_RL78_RH_SADDR.
	* reloc.c: Add BFD_RELOC_RL78_SADDR.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Regenerate.
2015-06-30 11:25:18 +01:00
H.J. Lu ee0c0c503d Remove COMPRESS_DEBUG_ZLIB
COMPRESS_DEBUG_ZLIB isn't needed.  This patch removes COMPRESS_DEBUG_ZLIB
and replace COMPRESS_DEBUG_ZLIB with COMPRESS_DEBUG_GNU_ZLIB.

bfd/

	* bfd-in.h (compressed_debug_section_type): Remove
	COMPRESS_DEBUG_ZLIB.
	* bfd-in2.h : Regenerated.
gas/

	* as.c (parse_args): Replace COMPRESS_DEBUG_ZLIB with
	COMPRESS_DEBUG_GNU_ZLIB.
	* config/tc-i386.c (flag_compress_debug): Likewise.

ld/

	* emultempl/elf32.em  (gld${EMULATION_NAME}_handle_option):
	Replace COMPRESS_DEBUG_ZLIB with COMPRESS_DEBUG_GNU_ZLIB.
2015-06-28 06:30:10 -07:00
H.J. Lu 216cb5839a Update ia64 gas tests
* gas/ia64/psn.d: Updated.
	* gas/ia64/xdata-ilp32.d: Likewise.
2015-06-27 16:43:43 -07:00
H.J. Lu 4a677ba724 Update .strtab section sizes in mmix tests
Since commit ef10c3ace0 may reduce .strtab
section size, we need to adjust expected .strtab section sizes in mmix
tests.

gas/testsuite/

	* gas/mmix/loc-3.d: Updated.
	* gas/mmix/loc-5.d: Likewise.

ld/testsuite/

	* ld-mmix/bspec1.d: Updated.
	* ld-mmix/bspec2.d: Likewise.
	* ld-mmix/undef-3.d: Likewise.
2015-06-25 10:07:53 -07:00
H.J. Lu ef10c3ace0 Use strtab with GC and suffix merging for .strtab
This patch uses ELF strtab with GC and suffix merging support to create
ELF .strtab section.  There is some small memory overhead to use ELF
strtab:

==14928== HEAP SUMMARY:
==14928==     in use at exit: 3,276,318 bytes in 679 blocks
==14928==   total heap usage: 1,544 allocs, 865 frees, 15,259,146 bytes allocated

vs.

==14936== HEAP SUMMARY:
==14936==     in use at exit: 3,276,318 bytes in 679 blocks
==14936==   total heap usage: 1,532 allocs, 853 frees, 15,026,402 bytes allocated

when running:

./ld-new -m elf_x86_64 -o tmpdir/ld-partial.o -r ldgram.o ldlex-wrapper.o lexsup.o ldlang.o mri.o ldctor.o ldmain.o plugin.o ldwrite.o ldexp.o ldemul.o ldver.o ldmisc.o ldfile.o ldcref.o eelf_x86_64.o eelf32_x86_64.o eelf_i386.o eelf_iamcu.o ei386linux.o eelf_l1om.o eelf_k1om.o ldbuildid.o

The results are

  [32] .strtab STRTAB 0+ 3beff8 00407a 00 0 0 1

vs

  [32] .strtab STRTAB 0+ 3beff8 0041d8 00 0 0 1

It reduces the .strtab size by 350 bytes, about 2%

Saving on libc.so from glibc is much more since libc.so has many alias
symbols with the same suffix.  For x32 glibc,

 [82] .strtab STRTAB 0+ 81b348 0159e7 00 0 0 1

vs

 [82] .strtab STRTAB 0+ 81b8bc 019e72 00 0 0 1

It reduces the .strtab size by 17547 bytes, about 16%.

bfd/

	PR gas/18451
	* elf-bfd.h (elf_sym_strtab): New.
	(elf_link_hash_table): Add strtabcount, strtabsize and
	strtab.
	(_bfd_elf_stringtab_init): Removed.
	* elf.c (_bfd_elf_stringtab_init): Removed.
	(_bfd_elf_compute_section_file_positions): Replace
	bfd_strtab_hash/_bfd_elf_stringtab_init/_bfd_stringtab_free/
	_bfd_stringtab_size with
	elf_strtab_hash/_bfd_elf_strtab_init/_bfd_elf_strtab_free/
	_bfd_elf_strtab_size.  Use _bfd_elf_strtab_add,
	_bfd_elf_strtab_finalize and _bfd_elf_strtab_offset to get
	st_name.
	(swap_out_syms): Likewise.
	* elflink.c (elf_final_link_info): Replace bfd_strtab_hash
	with elf_strtab_hash.  Remove symbuf, symbuf_count,
	symbuf_size and shndxbuf_size.
	(elf_link_flush_output_syms): Removed.
	(elf_link_output_sym): Renamed to ...
	(elf_link_output_symstrtab): This.  Replace _bfd_stringtab_add
	with _bfd_elf_strtab_add.  Don't flush symbols to the file nor
	swap out symbols.
	(elf_link_swap_symbols_out): New.
	(elf_link_output_extsym): Replace elf_link_output_sym with
	elf_link_output_symstrtab.
	(elf_link_input_bfd): Likewise.
	(elf_final_link_free): Replace _bfd_stringtab_free with
	_bfd_elf_strtab_free.  Remove symbuf.
	(bfd_elf_final_link): Replace _bfd_elf_stringtab_init with
	_bfd_elf_strtab_init.  Don't set symbuf, symbuf_count,
	symbuf_size nor shndxbuf_size.  Initialize strtabsize and
	strtab.  Initialize symshndxbuf to -1 when number of sections
	>= 64K.  Replace elf_link_output_sym/elf_link_output_sym with
	elf_link_output_symstrtab/elf_link_output_symstrtab. Don't
	call elf_link_flush_output_syms.  Call _bfd_elf_strtab_finalize
	and elf_link_swap_symbols_out.  Replace _bfd_stringtab_size
	and _bfd_stringtab_emit with _bfd_elf_strtab_size and
	_bfd_elf_strtab_emit.

gas/testsuite/

	PR gas/18451
	* gas/elf/elf.exp: Run strtab.
	* gas/elf/strtab.d: New file.
	* gas/elf/strtab.s: Likewise.

ld/testsuite/

	PR gas/18451
	* ld-elf/strtab.d: New file.
	* ld-elf/strtab.s: Likewise.
2015-06-25 08:16:14 -07:00
H.J. Lu 68c3545dc3 Remove the extra @section .cfi_lsda
Commit 2f0c68f23b added an extra @section
.cfi_lsda:

 @subsection @code{.cfi_lsda @var{encoding} [, @var{exp}]}
+@section @code{.cfi_lsda @var{encoding} [, @var{exp}]}
 @code{.cfi_lsda} defines LSDA and its encoding.

It shouldn't be there.

	* doc/as.texinfo (.cfi_lsda): Remove the extra @section.
2015-06-24 15:30:11 -07:00
Peter Bergner 7b9341139a PPC sync instruction accepts invalid and incompatible operands
ISA 2.07 added a new category called Elemental Memory Barriers that modifies
the sync instruction to accept an additional operand ESYNC.  Edmar added
support for this insruction varient here:

    https://sourceware.org/ml/binutils/2012-02/msg00221.html

Looking at this closer, I see that the insert_ls() function is misnamed
(since it's attached to the ESYNC operand, not the LS operand) but more
importantly, it is silently modifying the LS operand value behind the
users back when the LS operand is either invalid or is incompatible with
the new ESYNC operand.  The ISA 2.07 doc has an Assembler Note that clearly
states that assemblers that support the ESYNC operand should report all
invalid uses of LS and ESYNC.  This patch changes the assembler to
error out on invalid and incompatible operand usage.

opcodes/
	* ppc-opc.c (insert_ls): Test for invalid LS operands.
	(insert_esync): New function.
	(LS, WC): Use insert_ls.
	(ESYNC): Use insert_esync.

gas/testsuite/
	* gas/ppc/e6500.s <sync>: Fix invalid test.
	* gas/ppc/e6500.d: Likewise.
2015-06-22 14:55:24 -05:00
Nick Clifton bdc4de1b24 Stop "objdump -d" from disassembling past a symbolic address.
include	* dis-asm.h (struct disassemble_info): Add stop_vma field.

binuti  * objdump.c (disassemble_bytes): Set the stop_vma field in the
	disassemble_info structure when disassembling code sections with
	-d.
	* doc/binutils.texi (objdump): Document the discrepancy between -d
	and -D.

opcodes	* dis-buf.c (buffer_read_memory): Fail is stop_vma is set and the
	requested region lies beyond it.
	* bfin-dis.c (print_insn_bfin): Ignore sysop instructions when
	looking for 32-bit insns.
	* mcore-dis.c (print_insn_mcore): Disable stop_vma when reading
	data.
	* sh-dis.c (print_insn_sh): Likewise.
	* tic6x-dis.c (print_insn_tic6x): Disable stop_vma when reading
	blocks of instructions.
	* vax-dis.c (print_insn_vax): Check that the requested address
	does not clash with the stop_vma.

tests	* gas/arm/backslash-at.s: Add extra .byte directives so that the
	foo symbol does not appear to point half way through an
	instruction.
	* gas/arm/backslash-at.d: Update expected disassembly.
	* gas/i386/ilp32/x86-64-opcode-inval-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-opcode-inval.d: Likewise.
	* gas/i386/x86-64-opcode-inval-intel.d: Likewise.
	* gas/i386/x86-64-opcode-inval.d: Likewise.
2015-06-22 16:53:27 +01:00
Peter Bergner 11a0cf2ec0 Allow for optional operands with non-zero default values.
ISA 2.07 (ie, POWER8) added the rfebb instruction which takes one operand
with the value of either a 0 or 1.  It also defines an extended mnemonic
with no operands (ie, "rfebb") that is supposed to be equivalent to "rfebb 1".
I implemented rfebb's lone operand with PPC_OPERAND_OPTIONAL, but the
problem is, optional operands that are ommitted always default to the
value 0, which is wrong in this case.  I have added support for allowing
non-zero default values by adding an additional flag PPC_OPERAND_OPTIONAL_VALUE
that specifies that the default operand value to be used is stored in the
SHIFT field of the operand field immediately following this one.

This fixes the rfebb issue.  I also fixed the mftb and mfcr instructions
so they use the same mechanism.  This allows us to flag invalid uses of
mfcr where we explicitly pass in a zero FXM value, like the use in a2.[sd].

include/opcode/

	* ppc.h (PPC_OPERAND_OPTIONAL_VALUE): New.
	(ppc_optional_operand_value): New inline function.

opcodes/
	* ppc-dis.h (skip_optional_operands): Use ppc_optional_operand_value.
	* ppc-opc.c (FXM4): Add non-zero optional value.
	(TBR): Likewise.
	(SXL): Likewise.
	(insert_fxm): Handle new default operand value.
	(extract_fxm): Likewise.
	(insert_tbr): Likewise.
	(extract_tbr): Likewise.

gas/
	* config/tc-ppc.c (md_assemble): Use ppc_optional_operand_value.
	Allow for optional operands without insert functions.

gas/testsuite/
	* gas/ppc/power8.d: Fixup rfebb test results.
	* gas/ppc/a2.s: Fix invalid mfcr test.
	* gas/ppc/a2.d: Likewise.
2015-06-19 17:17:07 -05:00
Nick Clifton c12d2c9d48 Add support for using the ADR alias in Thumb mode against nearby symbols.
PR gas/18541
gas	* config/tc-arm.c (md_apply_fix): Add support for ADR in thumb
	mode against a nearby symbol.

tests	* gas/arm/thumb.s: Add test of ADR against a nearby symbol.
	* gas/arm/thumb.d: Update expected output.
	* gas/arm/thumb-eabi.d: Likewise.
2015-06-18 10:23:16 +01:00
Nick Clifton 75c1199967 Fix the computation of the addends for an ARM_TLS_LE32 reloc.
PR gas/18481
bfd	* elf32-arm.c (R_ARM_TLS_LE32): Set the special function to NULL.

gas	* config/tc-arm.c (tc_gen_reloc): Include BFD_RELOC_ARM_TLS_LE32
	in the same case as BFD_RELOC_ARM_TLS_IS32.

tests	* gas/arm/tls.s: Add tests of the tpoff pseudo with a local
	symbol.
	* gas/arm/tls.d: Update expected output.
2015-06-18 10:18:42 +01:00
Nick Clifton 5fc177c895 Fix compile warnings building previous delta in a 32-bit environment.
* config/tc-arm.c (is_double_a_single): Make conditional upon the
	availablity of a 64-bit type.  Use this type for the argument and
	mantissa.
	(double_to_single): Likewise.
	* config/tc-arm.c (move_or_literal_pool): Use a 64-bit type for
	the constant value, if available.  Generate a 64-bit value from a
	bignum if supported.  Only perform the second optimization for
	PR 18500 if the 64-bit type is available.
2015-06-17 16:10:36 +01:00
Alessandro Marzocchi 1256987795 Add support for converting LDR Rx,=<imm> to MOV or MVN in Thumb2 mode.
PR gas/18499
gas	* config/tc-arm.c (move_or_literal_pool): Add support for LDR Rx,=
	to MOV.w or MVN.w for Thumb2.

tests	* gas/arm/thumb2_ldr_immediate_armv6.s: New test case.
	* gas/arm/thumb2_ldr_immediate_armv6.d: Expected disassembly.
	* gas/arm/thumb2_ldr_immediate_armv6t2.s: New test case.
	* gas/arm/thumb2_ldr_immediate_armv6t2.d: Expected disassembly.
2015-06-17 13:50:52 +01:00
Alessandro Marzocchi ba592044bc Add support for converting VLDR <reg>,=<constant> to a VMOV instruction when appropriate.
PR gas/18500
gas	* config/tc-arm.c (is_double_a_single): New function.
	(double_to_single): New function.
	(move_or_literal_pool): Add support for	converting VLDR to VMOV.

tests	* gas/arm/vfpv2-ldr_immediate.s: New test case.
	* gas/arm/vfpv2-ldr_immediate.d: Expected disassembly.
	* gas/arm/vfpv3-ldr_immediate.s: New test case.
	* gas/arm/vfpv3-ldr_immediate.d: Expected disassembly.
	* gas/arm/vfpv3xd-ldr_immediate.s: New test case.
	* gas/arm/vfpv3xd-ldr_immediate.d: Expected disassembly.
2015-06-17 12:56:17 +01:00
Nicolas Pitre 451133cefa gas: section name substitution sequence
This patch adds the ability to automatically construct a section name
based on the prior section.

When gas is invoked with --sectname-subst, the occurrence of %S in a
section name will be substituted by the name of the current section. For
example:

	.macro exception_code
	.pushsection %S.exception
	[exception code here]
	.popsection
	.endm

	.text
	[code]
	exception_code
	[...]

	.section .init
	[init code]
	exception_code
	[...]

The first and second exception_code invocations create the
.text.exception and the .init.exception sections respectively.  This is
useful e.g. to discriminate between anciliary sections that are tied to
.init code and can be discarded at run time when initialization is over
vs anciliary sections tied to .text sections that need to stay resident.

	* as.c (show_usage): Document --sectname-subst.
	(parse_args): Add --sectname-subst.
	* as.h (flag_sectname_subst): New.
	* config/obj-elf.c (obj_elf_section_name): Add %S substitution.
	* doc/as.texinfo: Document it.
2015-06-17 08:52:00 +09:30
Matthew Wahab bdfa8b951b [AArch64] Support id_mmfr4 system register
2015-06-16  Matthew Wahab  <matthew.wahab@arm.com>
opcodes/
  * aarch64-opc.c (aarch64_sys_regs): Add "id_mmfr4_el1".

gas/testsuite
  * sysreg.d: Add id_mmfr4_el1, update expected output.
  * sysreg.s: Add id_mmfr4_el1.
2015-06-16 14:17:34 +01:00
Renlin Li 87f5fbcc7a [AArch64] Gas add BFD_RELOC_AARCH64_LD64_GOTOFF_LO15 support
2015-06-15  Renlin Li <renlin.li@arm.com>
bfd/
    * reloc.c (BFD_RELOC_AARCH64_LD64_GOTOFF_LO15): New entry.
    * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
    BFD_RELOC_AARCH64_LD64_GOTOFF_LO15.
    * bfd-in2.h: Regenerate.
    * libbfd.h: Regenerate.

gas/
    * config/tc-aarch64.c (reloc_table): New relocation modifier.
    (md_apply_fix): Support BFD_RELOC_AARCH64_LD64_GOTOFF_LO15.
    (aarch64_force_relocation): Ditto

gas/testsuite/
    * gas/aarch64/reloc-insn.s: Update test
    * gas/aarch64/reloc-insn.d: Update expected result.
2015-06-15 11:07:37 +01:00
Mark Wielaard d025d5e5b5 gas: Don't use frag_align but use plain padding to align .debug_aranges.
out_debug_aranges uses frag_align to make sure the addresses start
out aligned. Using frag_align will call frag_var[_init], which will
end up calling TC_FRAG_INIT. On arm and aarch64 TC_FRAG_INIT will
generate a $d mapping symbol for the .debug_aranges to show that at
that point a sequence of data items starts.

Such a symbol pointing into a non-allocated debug section will confuse
eu-strip -g. And it seems inefficient and wrong in general to have
additional mapping symbols for debug sections, which won't contain
actual code in the first place.

Just keep track of the aranges header size and use plain padding to
align the addresses which avoids generating any mapping symbols on
aarch64 and arm.

Includes a testcase for aarch64 that PASS with this patch and shows
the extra $d mapping symbol in .debug_aranges before.

gas/ChangeLog

       * dwarf2dbg.c (out_header): Document EXPR->X_add_number value,
       out_debug_aranges depends on it.
       (out_debug_aranges): Track size of header to properly pad header
       for address alignment.

gas/testsuite/ChangeLog

       * gas/aarch64/dwarf.d: New.
       * gas/aarch64/dwarf.s: New.
2015-06-15 09:25:21 +02:00
John David Anglin 18c208b229 tc-hppa.c: Speed up search for last label 2015-06-11 18:50:39 -04:00