2007-01-04 21:08:36 +01:00
|
|
|
|
2007-01-04 Paul Brook <paul@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* arm-dis.c (arm_opcodes): Fix cpsie and cpsid entries.
|
|
|
|
|
|
|
2007-01-04 18:14:50 +01:00
|
|
|
|
2007-01-04 Andreas Schwab <schwab@suse.de>
|
|
|
|
|
|
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|
|
|
|
|
* m68k-opc.c: Fix encoding of signed bit in the cpu32 tbls insns.
|
|
|
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|
|
2007-01-04 16:33:12 +01:00
|
|
|
|
2007-01-04 Julian Brown <julian@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* arm-dis.c (neon_opcode): Fix disassembly for vshl, vqshl, vrshl,
|
|
|
|
|
|
vqrshl instructions.
|
|
|
|
|
|
|
2006-12-27 08:15:02 +01:00
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|
2006-12-27 Kazu Hirata <kazu@codesourcery.com>
|
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|
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|
|
|
|
* m68k-dis.c (print_insn_arg): Add support for cac and mbb.
|
|
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|
|
2006-12-27 08:10:10 +01:00
|
|
|
|
2006-12-27 Kazu Hirata <kazu@codesourcery.com>
|
|
|
|
|
|
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|
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|
|
* m68k-opc.c (m68k_opcodes): Add sleep and trapx.
|
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|
2006-12-15 14:11:56 +01:00
|
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|
2006-12-15 H.J. Lu <hongjiu.lu@intel.com>
|
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|
|
|
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|
|
|
|
|
|
* i386-dis.c (o_mode): New for 16-byte operand.
|
|
|
|
|
|
(intel_operand_size): Generate "OWORD PTR " for o_mode.
|
|
|
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|
|
(CMPXCHG8B_Fixup): Set bytemode to o_mode instead of x_mode.
|
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|
2006-12-14 21:13:28 +01:00
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|
2006-12-14 H.J. Lu <hongjiu.lu@intel.com>
|
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|
|
|
|
|
|
* i386-dis.c (CMPXCHG8B_Fixup): New.
|
|
|
|
|
|
(grps): Use CMPXCHG8B_Fixup for cmpxchg8b.
|
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|
|
2006-12-11 19:11:13 +01:00
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|
2006-12-11 H.J. Lu <hongjiu.lu@intel.com>
|
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|
|
|
|
|
|
|
|
* i386-dis.c (Eq): Replaced by ...
|
|
|
|
|
|
(Mq): New. This.
|
|
|
|
|
|
(Ma): Defined with OP_M instead of OP_E.
|
|
|
|
|
|
(grps): Updated cmpxchg8b and vmptrst for Eq -> Mq.
|
|
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|
|
(OP_M): Added bound, cmpxchg8b and vmptrst to bad modrm list.
|
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|
|
2006-12-11 16:09:46 +01:00
|
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|
|
2006-12-11 Daniel Jacobowitz <dan@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* po/Make-in (.po.gmo): Put gmo files in objdir.
|
|
|
|
|
|
|
2006-12-10 03:50:53 +01:00
|
|
|
|
2006-12-09 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-dis.c (X86_64_1): New.
|
|
|
|
|
|
(X86_64_2): Likewise.
|
|
|
|
|
|
(X86_64_3): Likewise.
|
|
|
|
|
|
(dis386): Replace 0x60, 0x61 and 0x62 entries with x86-64
|
|
|
|
|
|
tables.
|
|
|
|
|
|
(x86_64_table): Add entries for 0x60, 0x61 and 0x62.
|
|
|
|
|
|
|
2006-12-09 22:06:13 +01:00
|
|
|
|
2006-12-09 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
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|
|
|
|
|
* i386-dis.c: Adjust white spaces.
|
|
|
|
|
|
|
2006-12-04 09:53:29 +01:00
|
|
|
|
2006-12-04 Jan Beulich <jbeulich@novell.com>
|
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|
|
|
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|
|
* i386-dis.c (OP_J): Update used_prefixes in v_mode.
|
|
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|
|
2006-12-01 16:17:32 +01:00
|
|
|
|
2006-11-30 Jan Beulich <jbeulich@novell.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-dis.c (SEG_Fixup): Delete.
|
|
|
|
|
|
(Sv): Use OP_SEG.
|
|
|
|
|
|
(putop): New suffix character 'D'.
|
|
|
|
|
|
(dis386): Use it.
|
|
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|
|
|
(grps): Likewise.
|
|
|
|
|
|
(OP_SEG): Handle bytemode other than w_mode.
|
|
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|
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|
|
2006-12-01 16:00:12 +01:00
|
|
|
|
2006-11-30 Jan Beulich <jbeulich@novell.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-dis.c (zAX): New.
|
|
|
|
|
|
(Xz): New.
|
|
|
|
|
|
(Yzr): New.
|
|
|
|
|
|
(z_mode): New.
|
|
|
|
|
|
(z_mode_ax_reg): New.
|
|
|
|
|
|
(putop): New suffix character 'G'.
|
|
|
|
|
|
(dis386): Use it for in, out, ins, and outs.
|
|
|
|
|
|
(intel_operand_size): Handle z_mode.
|
|
|
|
|
|
(OP_REG): Delete unreachable case indir_dx_reg.
|
|
|
|
|
|
(OP_IMREG): Fix Intel syntax output for case indir_dx_reg. Handle
|
|
|
|
|
|
z_mode_ax_reg.
|
|
|
|
|
|
(OP_ESreg): Fix Intel syntax operand size handling.
|
|
|
|
|
|
(OP_DSreg): Likewise.
|
|
|
|
|
|
|
2006-12-01 15:56:11 +01:00
|
|
|
|
2006-11-30 Jan Beulich <jbeulich@novell.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-dis.c (dis386): Use 'R' and 'O' for cbw/cwd unconditionally.
|
|
|
|
|
|
(putop): For 'O' suffix, print 'q' in Intel mode, and mark data prefix
|
|
|
|
|
|
used. For 'R' and 'W' suffix, simplify and fix Intel mode.
|
|
|
|
|
|
|
2006-11-29 17:26:56 +01:00
|
|
|
|
2006-11-29 Paul Brook <paul@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* arm-dis.c (coprocessor_opcodes): Fix bitfields for fconstd/fconstd.
|
|
|
|
|
|
|
2006-11-22 18:45:57 +01:00
|
|
|
|
2006-11-22 Daniel Jacobowitz <dan@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* arm-dis.c (last_is_thumb): Delete.
|
|
|
|
|
|
(enum map_type, last_type): New.
|
|
|
|
|
|
(print_insn_data): New.
|
|
|
|
|
|
(get_sym_code_type): Take MAP_TYPE argument. Check the type of
|
|
|
|
|
|
the right symbol. Handle $d.
|
|
|
|
|
|
(print_insn): Check for mapping symbols even without a normal
|
|
|
|
|
|
symbol. Adjust searching. If $d is found see how much data
|
|
|
|
|
|
to print. Handle data.
|
|
|
|
|
|
|
2006-11-16 08:22:25 +01:00
|
|
|
|
2006-11-16 Nathan Sidwell <nathan@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* m68k-opc.c (m68k_opcodes): Place trap instructions before set
|
|
|
|
|
|
conditionals. Add tpf coldfire instruction as alias for trapf.
|
|
|
|
|
|
|
2006-11-10 04:54:11 +01:00
|
|
|
|
2006-11-09 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-dis.c (print_insn): Check PREFIX_REPNZ before
|
|
|
|
|
|
PREFIX_DATA when prefix user table is used.
|
|
|
|
|
|
|
2006-11-10 03:13:40 +01:00
|
|
|
|
2006-11-09 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-dis.c (twobyte_uses_SSE_prefix): Renamed to ...
|
|
|
|
|
|
(twobyte_uses_DATA_prefix): This.
|
|
|
|
|
|
(twobyte_uses_REPNZ_prefix): New.
|
|
|
|
|
|
(twobyte_uses_REPZ_prefix): Likewise.
|
|
|
|
|
|
(threebyte_0x38_uses_DATA_prefix): Likewise.
|
|
|
|
|
|
(threebyte_0x38_uses_REPNZ_prefix): Likewise.
|
|
|
|
|
|
(threebyte_0x38_uses_REPZ_prefix): Likewise.
|
|
|
|
|
|
(threebyte_0x3a_uses_DATA_prefix): Likewise.
|
|
|
|
|
|
(threebyte_0x3a_uses_REPNZ_prefix): Likewise.
|
|
|
|
|
|
(threebyte_0x3a_uses_REPZ_prefix): Likewise.
|
|
|
|
|
|
(print_insn): Updated checking usages of DATA/REPNZ/REPZ
|
|
|
|
|
|
prefixes.
|
|
|
|
|
|
|
2006-11-06 01:46:07 +01:00
|
|
|
|
2006-11-06 Troy Rollo <troy@corvu.com.au>
|
|
|
|
|
|
|
|
|
|
|
|
* ppc-opc.c: Restore COM to mfcr wrongly removed 2003-07-04.
|
|
|
|
|
|
|
2006-11-01 11:29:49 +01:00
|
|
|
|
2006-11-01 Mei Ligang <ligang@sunnorth.com.cn>
|
|
|
|
|
|
|
|
|
|
|
|
* score-opc.h (score_opcodes): Delete modifier '0x'.
|
|
|
|
|
|
|
2006-10-31 21:21:57 +01:00
|
|
|
|
2006-10-30 Paul Brook <paul@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* arm-dis.c (last_is_thumb, last_mapping_sym, last_mapping_addr): New.
|
|
|
|
|
|
(get_sym_code_type): New function.
|
|
|
|
|
|
(print_insn): Search for mapping symbols.
|
|
|
|
|
|
|
2006-10-31 10:54:41 +01:00
|
|
|
|
2006-10-31 Mei Ligang <ligang@sunnorth.com.cn>
|
|
|
|
|
|
|
|
|
|
|
|
* score-dis.c (print_insn): Correct the error code to print
|
|
|
|
|
|
correct PCE instruction disassembly.
|
|
|
|
|
|
|
2006-10-26 Ben Elliston <bje@au.ibm.com>
Anton Blanchard <anton@samba.org>
Peter Bergner <bergner@vnet.ibm.com>
* ppc-opc.c (A_L, DCM, DGM, TE, RMC, R, SP, S, SH16, XRT_L, EH,
AFRALFRC_MASK, Z, ZRC, Z_MASK, XLRT_MASK, XEH_MASK): Define.
(POWER6): Define.
(powerpc_opcodes): Extend "lwarx", "ldarx", "dcbf", "fres", "fres.",
"frsqrtes", "frsqrtes." "fre", "fre.", "frsqrte" and "frsqrte.".
Add "doze", "nap", "sleep", "rvwinkle", "dcbfl", "prtyw", "prtyd",
"mfcfar", "cmpb", "lfdpx", "stfdpx", "mtcfar", "mffgpr", "mftgpr",
"lwzcix", "lhzcix", "lbzcix", "ldcix", "lfiwax", "stwcix", "sthcix",
"stbcix", "stdcix", "lfdp", "dadd", "dadd.", "dqua", "dqua.", "dmul",
"dmul.", "drrnd", "drrnd.", "dscli", "dscli.", "dquai", "dquai.",
"dscri", "dscri.", "drintx", "drintx.", "dcmpo", "dtstex", "dtstdc",
"dtstdg", "dtstsf", "drintn", "drintn.", "dctdp", "dctdp.", "dctfix",
"dctfix.", "ddedpd", "ddedpd.", "dxex", "dxex.", "dsub", "dsub.",
"ddiv", "ddiv.", "dcmpu", "drsp", "drsp.", "dcffix", "dcffix.",
"denbcd", "denbcd.", "diex", "diex.", "stfdp", "daddq", "daddq.",
"dquaq", "dquaq.", "fcpsgn", "fcpsgn.", "dmulq", "dmulq.",
"drrndq", "drrndq.", "dscliq", "dscliq.", "dquaiq", "dquaiq.",
"dscriq", "dscriq.", "drintxq", "drintxq.", "dcmpoq", "dtstexq",
"dtstdcq", "dtstdgq", "dtstsfq", "drintnq", "drintnq.",
"dctqpq", "dctqpq.", "dctfixq", "dctfixq.", "ddedpdq", "ddedpdq.",
"dxexq", "dxexq.", "dsubq", "dsubq.", "ddivq", "ddivq.", "dcmpuq",
"drdpq", "drdpq.", "dcffixq", "dcffixq.", "denbcdq", "denbcdq.",
"diexq" and "diexq." opcodes.
2006-10-26 19:37:26 +02:00
|
|
|
|
2006-10-26 Ben Elliston <bje@au.ibm.com>
|
|
|
|
|
|
Anton Blanchard <anton@samba.org>
|
|
|
|
|
|
Peter Bergner <bergner@vnet.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* ppc-opc.c (A_L, DCM, DGM, TE, RMC, R, SP, S, SH16, XRT_L, EH,
|
|
|
|
|
|
AFRALFRC_MASK, Z, ZRC, Z_MASK, XLRT_MASK, XEH_MASK): Define.
|
|
|
|
|
|
(POWER6): Define.
|
|
|
|
|
|
(powerpc_opcodes): Extend "lwarx", "ldarx", "dcbf", "fres", "fres.",
|
|
|
|
|
|
"frsqrtes", "frsqrtes." "fre", "fre.", "frsqrte" and "frsqrte.".
|
|
|
|
|
|
Add "doze", "nap", "sleep", "rvwinkle", "dcbfl", "prtyw", "prtyd",
|
|
|
|
|
|
"mfcfar", "cmpb", "lfdpx", "stfdpx", "mtcfar", "mffgpr", "mftgpr",
|
|
|
|
|
|
"lwzcix", "lhzcix", "lbzcix", "ldcix", "lfiwax", "stwcix", "sthcix",
|
|
|
|
|
|
"stbcix", "stdcix", "lfdp", "dadd", "dadd.", "dqua", "dqua.", "dmul",
|
|
|
|
|
|
"dmul.", "drrnd", "drrnd.", "dscli", "dscli.", "dquai", "dquai.",
|
|
|
|
|
|
"dscri", "dscri.", "drintx", "drintx.", "dcmpo", "dtstex", "dtstdc",
|
|
|
|
|
|
"dtstdg", "dtstsf", "drintn", "drintn.", "dctdp", "dctdp.", "dctfix",
|
|
|
|
|
|
"dctfix.", "ddedpd", "ddedpd.", "dxex", "dxex.", "dsub", "dsub.",
|
|
|
|
|
|
"ddiv", "ddiv.", "dcmpu", "drsp", "drsp.", "dcffix", "dcffix.",
|
|
|
|
|
|
"denbcd", "denbcd.", "diex", "diex.", "stfdp", "daddq", "daddq.",
|
|
|
|
|
|
"dquaq", "dquaq.", "fcpsgn", "fcpsgn.", "dmulq", "dmulq.",
|
|
|
|
|
|
"drrndq", "drrndq.", "dscliq", "dscliq.", "dquaiq", "dquaiq.",
|
|
|
|
|
|
"dscriq", "dscriq.", "drintxq", "drintxq.", "dcmpoq", "dtstexq",
|
|
|
|
|
|
"dtstdcq", "dtstdgq", "dtstsfq", "drintnq", "drintnq.",
|
|
|
|
|
|
"dctqpq", "dctqpq.", "dctfixq", "dctfixq.", "ddedpdq", "ddedpdq.",
|
|
|
|
|
|
"dxexq", "dxexq.", "dsubq", "dsubq.", "ddivq", "ddivq.", "dcmpuq",
|
|
|
|
|
|
"drdpq", "drdpq.", "dcffixq", "dcffixq.", "denbcdq", "denbcdq.",
|
|
|
|
|
|
"diexq" and "diexq." opcodes.
|
|
|
|
|
|
|
2006-10-26 17:37:21 +02:00
|
|
|
|
2006-10-26 Daniel Jacobowitz <dan@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* h8300-dis.c (bfd_h8_disassemble): Add missing consts.
|
|
|
|
|
|
|
2006-10-25 08:49:21 +02:00
|
|
|
|
2006-10-25 Trevor Smigiel <Trevor_Smigiel@playstation.sony.com>
|
|
|
|
|
|
Yukishige Shibata <shibata@rd.scei.sony.co.jp>
|
|
|
|
|
|
Nobuhisa Fujinami <fnami@rd.scei.sony.co.jp>
|
|
|
|
|
|
Takeaki Fukuoka <fukuoka@rd.scei.sony.co.jp>
|
|
|
|
|
|
Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
|
|
|
|
|
* spu-dis.c: New file.
|
|
|
|
|
|
* spu-opc.c: New file.
|
|
|
|
|
|
* configure.in: Add SPU support.
|
|
|
|
|
|
* disassemble.c: Likewise.
|
|
|
|
|
|
* Makefile.am: Likewise. Run "make dep-am".
|
|
|
|
|
|
* Makefile.in: Regenerate.
|
|
|
|
|
|
* configure: Regenerate.
|
|
|
|
|
|
* po/POTFILES.in: Regenerate.
|
|
|
|
|
|
|
2006-10-24 03:27:29 +02:00
|
|
|
|
2006-10-24 Andrew Pinski <andrew_pinski@playstation.sony.com>
|
|
|
|
|
|
|
|
|
|
|
|
* ppc-opc.c (CELL): New define.
|
|
|
|
|
|
(powerpc_opcodes): Enable hrfid for Cell. Add ldbrx and stdbrx,
|
|
|
|
|
|
cell specific instructions. Add {st,l}x{r,l}{,l} cell specific
|
|
|
|
|
|
VMX instructions.
|
|
|
|
|
|
* ppc-dis.c (powerpc_dialect): Handle cell.
|
|
|
|
|
|
|
2006-10-24 00:53:29 +02:00
|
|
|
|
2006-10-23 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-dis.c (dis386): Add support for the change in POPCNT opcode in
|
|
|
|
|
|
amdfam10 architecture.
|
|
|
|
|
|
(PREGRP37): NEW.
|
|
|
|
|
|
(print_insn): Disallow REP prefix for POPCNT.
|
|
|
|
|
|
|
2006-10-20 16:47:05 +02:00
|
|
|
|
2006-10-20 Andrew Stubbs <andrew.stubbs@st.com>
|
|
|
|
|
|
|
|
|
|
|
|
* sh-dis.c (print_insn_sh): Remove 0x from output to prevent GDB
|
|
|
|
|
|
duplicating it.
|
|
|
|
|
|
|
2006-10-18 20:18:26 +02:00
|
|
|
|
2006-10-18 Dave Brolley <brolley@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* configure.in (BFD_MACHINES): Add cgen-bitset.lo for bfd_sh_arch.
|
|
|
|
|
|
* configure: Regenerated.
|
|
|
|
|
|
|
2006-09-29 10:05:35 +02:00
|
|
|
|
2006-09-29 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
|
|
|
|
|
* po/POTFILES.in: Regenerate.
|
|
|
|
|
|
|
bfd/
2006-09-26 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Ian Lance Taylor <ian@wasabisystems.com>
Ben Elliston <bje@wasabisystems.com>
* archures.c: Add definition for bfd_mach_arm_iWMMXt2.
* cpu-arm.c (processors): Add bfd_mach_arm_iWMMXt2.
(arch_info_struct, bfd_arm_update_notes): Likewise.
(architectures): Likewise.
(bfd_arm_merge_machines): Check for iWMMXt2.
* bfd-in2.h: Rebuild.
gas/
2006-09-26 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Ian Lance Taylor <ian@wasabisystems.com>
Ben Elliston <bje@wasabisystems.com>
* config/tc-arm.c (arm_cext_iwmmxt2): New.
(enum operand_parse_code): New code OP_RIWR_I32z.
(parse_operands): Handle OP_RIWR_I32z.
(do_iwmmxt_wmerge): New function.
(do_iwmmxt_wldstd): Handle iwmmxt2 case where second operand is
a register.
(do_iwmmxt_wrwrwr_or_imm5): New function.
(insns): Mark instructions as RIWR_I32z as appropriate.
Also add torvsc<b,h,w>, wabs<b,h,w>, wabsdiff<b,h,w>,
waddbhus<l,m>, waddhc, waddwc, waddsubhx, wavg4{r}, wmaddu{x,n},
wmadds{x,n}, wmerge, wmiaxy{n}, wmiawxy{n}, wmul<sm,um>{r},
wmulw<um,sm,l>{r}, wqmiaxy{n}, wqmulm{r}, wqmulwm{r}, wsubaddhx.
(md_begin): Handle IWMMXT2.
(arm_cpus): Add iwmmxt2.
(arm_extensions): Likewise.
(arm_archs): Likewise.
gas/testsuite/
2006-09-26 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Ian Lance Taylor <ian@wasabisystems.com>
Ben Elliston <bje@wasabisystems.com>
* gas/arm/iwmmxt2.s: New file.
* gas/arm/iwmmxt2.d: New file.
include/opcode/
2006-09-26 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Ian Lance Taylor <ian@wasabisystems.com>
Ben Elliston <bje@wasabisystems.com>
* arm.h (ARM_CEXT_IWMMXT2, ARM_ARCH_IWMMXT2): Define.
opcodes/
2006-09-26 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Ian Lance Taylor <ian@wasabisystems.com>
Ben Elliston <bje@wasabisystems.com>
* arm-dis.c (coprocessor_opcodes): The X-qualifier to WMADD may
only be used with the default multiply-add operation, so if N is
set, don't bother printing X. Add new iwmmxt instructions.
(IWMMXT_INSN_COUNT): Update.
(iwmmxt_wwssnames): Qualify "wwss" names at index 2, 6, 10 and 14
with a 'c' suffix.
(print_insn_coprocessor): Check for iWMMXt2. Handle format
specifiers 'r', 'i'.
2006-09-26 14:04:45 +02:00
|
|
|
|
2006-09-26 Mark Shinwell <shinwell@codesourcery.com>
|
|
|
|
|
|
Joseph Myers <joseph@codesourcery.com>
|
|
|
|
|
|
Ian Lance Taylor <ian@wasabisystems.com>
|
|
|
|
|
|
Ben Elliston <bje@wasabisystems.com>
|
|
|
|
|
|
|
|
|
|
|
|
* arm-dis.c (coprocessor_opcodes): The X-qualifier to WMADD may
|
|
|
|
|
|
only be used with the default multiply-add operation, so if N is
|
|
|
|
|
|
set, don't bother printing X. Add new iwmmxt instructions.
|
|
|
|
|
|
(IWMMXT_INSN_COUNT): Update.
|
|
|
|
|
|
(iwmmxt_wwssnames): Qualify "wwss" names at index 2, 6, 10 and 14
|
|
|
|
|
|
with a 'c' suffix.
|
|
|
|
|
|
(print_insn_coprocessor): Check for iWMMXt2. Handle format
|
|
|
|
|
|
specifiers 'r', 'i'.
|
|
|
|
|
|
|
2006-09-24 19:25:47 +02:00
|
|
|
|
2006-09-24 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR binutils/3100
|
|
|
|
|
|
* i386-dis.c (prefix_user_table): Fix the second operand of
|
|
|
|
|
|
maskmovdqu instruction to allow only %xmm register instead of
|
|
|
|
|
|
both %xmm register and memory.
|
|
|
|
|
|
|
2006-09-24 01:10:14 +02:00
|
|
|
|
2006-09-23 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR binutils/3235
|
|
|
|
|
|
* i386-dis.c (OP_OFF64): Get 32bit offset if there is an
|
|
|
|
|
|
address size prefix.
|
|
|
|
|
|
|
2006-09-17 01:51:50 +02:00
|
|
|
|
2006-09-17 Mei Ligang <ligang@sunnorth.com.cn>
|
|
|
|
|
|
|
|
|
|
|
|
* score-dis.c: New file.
|
|
|
|
|
|
* score-opc.h: New file.
|
|
|
|
|
|
* Makefile.am: Add Score files.
|
|
|
|
|
|
* Makefile.in: Regenerate.
|
|
|
|
|
|
* configure.in: Add support for Score target.
|
|
|
|
|
|
* configure: Regenerate.
|
|
|
|
|
|
* disassemble.c: Add support for Score target.
|
|
|
|
|
|
|
2006-09-16 20:12:17 +02:00
|
|
|
|
2006-09-16 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
Pedro Alves <pedro_alves@portugalmail.pt>
|
|
|
|
|
|
|
|
|
|
|
|
* arm-dis.c: Make use of new STRING_COMMA_LEN and CONST_STRNEQ
|
|
|
|
|
|
macros defined in bfd.h.
|
|
|
|
|
|
* cris-dis.c: Likewise.
|
|
|
|
|
|
* h8300-dis.c: Likewise.
|
|
|
|
|
|
* i386-dis.c: Likewise.
|
|
|
|
|
|
* ia64-gen.c: Likewise.
|
|
|
|
|
|
* mips-dis: Likewise.
|
|
|
|
|
|
|
2006-09-05 16:07:22 +02:00
|
|
|
|
2006-09-04 Paul Brook <paul@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* arm-dis.c (neon_opcode): Fix suffix on VMOVN.
|
|
|
|
|
|
|
2006-08-23 16:48:49 +02:00
|
|
|
|
2006-08-23 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-dis.c (three_byte_table): Expand to 256 elements.
|
|
|
|
|
|
|
|
|
|
|
|
2006-08-04 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
|
2006-08-15 01:45:59 +02:00
|
|
|
|
|
2006-09-24 19:13:59 +02:00
|
|
|
|
PR binutils/3000
|
2006-08-15 01:45:59 +02:00
|
|
|
|
* i386-dis.c (MXC,EMC): Define.
|
|
|
|
|
|
(OP_MXC): New function to handle cvt* (convert instructions) between
|
|
|
|
|
|
%xmm and %mm register correctly.
|
|
|
|
|
|
(OP_EMC): ditto.
|
2006-08-23 16:48:49 +02:00
|
|
|
|
(prefix_user_table): Modified cvtpi2pd,cvtpd2pi and cvttpd2pi
|
2006-08-15 01:45:59 +02:00
|
|
|
|
instruction operands in PREGRP2,PREGRP3,PREGRP4 appropriately
|
|
|
|
|
|
with EMC/MXC.
|
|
|
|
|
|
|
2006-07-29 10:55:38 +02:00
|
|
|
|
2006-07-29 Richard Sandiford <richard@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* m68k-opc.c (m68k_opcodes): Fix operand specificer in the Coldfire
|
|
|
|
|
|
"fdaddl" entry.
|
|
|
|
|
|
|
2006-07-19 14:53:33 +02:00
|
|
|
|
2006-07-19 Paul Brook <paul@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* armd-dis.c (arm_opcodes): Fix rbit opcode.
|
|
|
|
|
|
|
2006-07-18 22:25:41 +02:00
|
|
|
|
2006-07-18 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-dis.c (grps): Change "sldtQ", "strQ" and "smswQ" to
|
|
|
|
|
|
"sldt", "str" and "smsw".
|
|
|
|
|
|
|
2006-07-15 18:58:36 +02:00
|
|
|
|
2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR binutils/2829
|
|
|
|
|
|
* i386-dis.c (GRP11_C6): NEW.
|
|
|
|
|
|
(GRP11_C7): Likewise.
|
|
|
|
|
|
(GRP12): Updated.
|
|
|
|
|
|
(GRP13): Likewise.
|
|
|
|
|
|
(GRP14): Likewise.
|
|
|
|
|
|
(GRP15): Likewise.
|
|
|
|
|
|
(GRP16): Likewise.
|
|
|
|
|
|
(GRPAMD): Likewise.
|
|
|
|
|
|
(GRPPADLCK1): Likewise.
|
|
|
|
|
|
(GRPPADLCK2): Likewise.
|
|
|
|
|
|
(dis386): Use GRP11_C6 and GRP11_C7 for entres 0xc6 and 0xc7,
|
|
|
|
|
|
respectively.
|
|
|
|
|
|
(grps): Add entries for GRP11_C6 and GRP11_C7.
|
|
|
|
|
|
|
2006-07-14 00:25:48 +02:00
|
|
|
|
2006-07-10 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
|
|
|
|
|
|
Michael Meissner <michael.meissner@amd.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-dis.c (dis386): Add support for 4 operand instructions. Add
|
|
|
|
|
|
support for amdfam10 SSE4a/ABM instructions. Modify all
|
|
|
|
|
|
initializer macros to have additional arguments. Disallow REP
|
|
|
|
|
|
prefix for non-string instructions.
|
|
|
|
|
|
(print_insn): Ditto.
|
|
|
|
|
|
|
2006-07-05 19:08:47 +02:00
|
|
|
|
2006-07-05 Julian Brown <julian@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* arm-dis.c (coprocessor): Alter fmsrr disassembly syntax.
|
|
|
|
|
|
|
2006-06-12 20:59:37 +02:00
|
|
|
|
2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-dis.c (dis386_twobyte): Use "nopQ" for 0x1f.
|
|
|
|
|
|
(twobyte_has_modrm): Set 1 for 0x1f.
|
|
|
|
|
|
|
gas/
2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (process_suffix): Don't add rex64 for
"xchg %rax,%rax".
gas/testsuite/
2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/opcode.s: Add "xchg %ax,%ax".
* gas/i386/opcode.d: Updated.
* gas/i386/x86-64-opcode.s: Add xchg %ax,%ax, xchg %eax,%eax,
xchg %rax,%rax, rex64 xchg %rax,%rax and xchg %rax,%r8.
* gas/i386/x86-64-opcode.d: Updated.
include/opcode/
2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (i386_optab): Update comment for 64bit NOP.
opcodes/
2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (NOP_Fixup): Removed.
(NOP_Fixup1): New.
(NOP_Fixup2): Likewise.
(dis386): Use NOP_Fixup1 and NOP_Fixup2 on 0x90.
2006-06-12 20:55:44 +02:00
|
|
|
|
2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-dis.c (NOP_Fixup): Removed.
|
|
|
|
|
|
(NOP_Fixup1): New.
|
|
|
|
|
|
(NOP_Fixup2): Likewise.
|
|
|
|
|
|
(dis386): Use NOP_Fixup1 and NOP_Fixup2 on 0x90.
|
|
|
|
|
|
|
2006-06-12 17:31:28 +02:00
|
|
|
|
2006-06-12 Julian Brown <julian@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* arm-dis.c (print_insn_neon): Disassemble 32-bit immediates as signed
|
|
|
|
|
|
on 64-bit hosts.
|
|
|
|
|
|
|
2006-06-10 20:20:39 +02:00
|
|
|
|
2006-06-10 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386.c (GRP10): Renamed to ...
|
|
|
|
|
|
(GRP12): This.
|
|
|
|
|
|
(GRP11): Renamed to ...
|
|
|
|
|
|
(GRP13): This.
|
|
|
|
|
|
(GRP12): Renamed to ...
|
|
|
|
|
|
(GRP14): This.
|
|
|
|
|
|
(GRP13): Renamed to ...
|
|
|
|
|
|
(GRP15): This.
|
|
|
|
|
|
(GRP14): Renamed to ...
|
|
|
|
|
|
(GRP16): This.
|
|
|
|
|
|
(dis386_twobyte): Updated.
|
|
|
|
|
|
(grps): Likewise.
|
|
|
|
|
|
|
2006-06-09 15:40:51 +02:00
|
|
|
|
2006-06-09 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* po/fi.po: Updated Finnish translation.
|
|
|
|
|
|
|
2006-06-07 17:38:01 +02:00
|
|
|
|
2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* po/Make-in (pdf, ps): New dummy targets.
|
|
|
|
|
|
|
2006-06-07 16:08:19 +02:00
|
|
|
|
2006-06-06 Paul Brook <paul@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* arm-dis.c (coprocessor_opcodes): Add %c to unconditional arm
|
|
|
|
|
|
instructions.
|
|
|
|
|
|
(neon_opcodes): Add conditional execution specifiers.
|
|
|
|
|
|
(thumb_opcodes): Ditto.
|
|
|
|
|
|
(thumb32_opcodes): Ditto.
|
|
|
|
|
|
(arm_conditional): Change 0xe to "al" and add "" to end.
|
|
|
|
|
|
(ifthen_state, ifthen_next_state, ifthen_address): New.
|
|
|
|
|
|
(IFTHEN_COND): Define.
|
|
|
|
|
|
(print_insn_coprocessor, print_insn_neon): Print thumb conditions.
|
|
|
|
|
|
(print_insn_arm): Change %c to use new values of arm_conditional.
|
|
|
|
|
|
(print_insn_thumb16): Print thumb conditions. Add %I.
|
|
|
|
|
|
(print_insn_thumb32): Print thumb conditions.
|
|
|
|
|
|
(find_ifthen_state): New function.
|
|
|
|
|
|
(print_insn): Track IT block state.
|
|
|
|
|
|
|
2006-06-07 07:23:59 +02:00
|
|
|
|
2006-06-06 Ben Elliston <bje@au.ibm.com>
|
|
|
|
|
|
Anton Blanchard <anton@samba.org>
|
|
|
|
|
|
Peter Bergner <bergner@vnet.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* ppc-dis.c (powerpc_dialect): Handle power6 option.
|
|
|
|
|
|
(print_ppc_disassembler_options): Mention power6.
|
|
|
|
|
|
|
2006-06-06 12:49:48 +02:00
|
|
|
|
2006-06-06 Thiemo Seufer <ths@mips.com>
|
|
|
|
|
|
Chao-ying Fu <fu@mips.com>
|
|
|
|
|
|
|
|
|
|
|
|
* mips-dis.c: Disassemble DSP64 instructions for MIPS64R2.
|
|
|
|
|
|
* mips-opc.c: Add DSP64 instructions.
|
|
|
|
|
|
|
2006-06-06 04:48:34 +02:00
|
|
|
|
2006-06-06 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
|
|
|
|
|
* m68hc11-dis.c (print_insn): Warning fix.
|
|
|
|
|
|
|
2006-06-05 16:04:05 +02:00
|
|
|
|
2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* po/Make-in (top_builddir): Define.
|
|
|
|
|
|
|
2006-06-05 14:28:18 +02:00
|
|
|
|
2006-06-05 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
|
|
|
|
|
* Makefile.am: Run "make dep-am".
|
|
|
|
|
|
* Makefile.in: Regenerate.
|
|
|
|
|
|
* config.in: Regenerate.
|
|
|
|
|
|
|
2006-05-31 17:14:46 +02:00
|
|
|
|
2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
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|
|
* Makefile.am (INCLUDES): Use @INCINTL@.
|
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|
* acinclude.m4: Include new gettext macros.
|
|
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|
|
* configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
|
|
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|
|
Remove local code for po/Makefile.
|
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|
|
* Makefile.in, aclocal.m4, configure: Regenerated.
|
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|
2006-05-30 13:01:59 +02:00
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|
2006-05-30 Nick Clifton <nickc@redhat.com>
|
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|
* po/es.po: Updated Spanish translation.
|
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2006-05-25 10:09:03 +02:00
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|
2006-05-25 Richard Sandiford <richard@codesourcery.com>
|
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|
|
* m68k-opc.c (m68k_opcodes): Fix the masks of the Coldfire fmovemd
|
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|
and fmovem entries. Put register list entries before immediate
|
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|
|
mask entries. Use "l" rather than "L" in the fmovem entries.
|
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|
* m68k-dis.c (match_insn_m68k): Remove the PRIV argument and work it
|
|
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|
|
out from INFO.
|
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|
(m68k_scan_mask): New function, split out from...
|
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|
(print_insn_m68k): ...here. If no architecture has been set,
|
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|
|
first try printing an m680x0 instruction, then try a Coldfire one.
|
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|
2006-05-24 09:54:45 +02:00
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|
2006-05-24 Nick Clifton <nickc@redhat.com>
|
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|
* po/ga.po: Updated Irish translation.
|
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2006-05-22 10:40:09 +02:00
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2006-05-22 Nick Clifton <nickc@redhat.com>
|
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* crx-dis.c (EXTRACT): Make macro work on 64-bit hosts.
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|
2006-05-22 10:33:35 +02:00
|
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|
|
2006-05-22 Nick Clifton <nickc@redhat.com>
|
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|
|
* po/nl.po: Updated translation.
|
|
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|
2006-05-18 01:44:58 +02:00
|
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|
2006-05-18 Alan Modra <amodra@bigpond.net.au>
|
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|
|
* avr-dis.c: Formatting fix.
|
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|
2006-05-14 17:35:22 +02:00
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|
2006-05-14 Thiemo Seufer <ths@mips.com>
|
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|
|
* mips16-opc.c (I1, I32, I64): New shortcut defines.
|
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|
(mips16_opcodes): Change membership of instructions to their
|
|
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|
lowest baseline ISA.
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|
2006-05-09 18:05:40 +02:00
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|
2006-05-09 H.J. Lu <hongjiu.lu@intel.com>
|
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|
* i386-dis.c (grps): Update sgdt/sidt for 64bit.
|
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|
2006-05-05 20:56:01 +02:00
|
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|
2006-05-05 Julian Brown <julian@codesourcery.com>
|
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|
* arm-dis.c (coprocessor_opcodes): Don't interpret fldmx/fstmx as
|
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|
|
vldm/vstm.
|
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|
2006-05-05 17:41:23 +02:00
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2006-05-05 Thiemo Seufer <ths@mips.com>
|
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|
David Ung <davidu@mips.com>
|
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* mips-opc.c: Add macro for cache instruction.
|
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|
[ gas/testsuite/ChangeLog ]
2006-05-04 Thiemo Seufer <ths@mips.com>
Nigel Stephens <nigel@mips.com>
* gas/mips/mips.exp: Run mips32-dsp tests only for mips32r2.
* gas/mips/set-arch.d: Adjust according to opcode table changes.
[ include/opcode/ChangeLog ]
2006-05-04 Thiemo Seufer <ths@mips.com>
Nigel Stephens <nigel@mips.com>
David Ung <davidu@mips.com>
* mips.h: Add INSN_SMARTMIPS define.
[ opcodes/ChangeLog ]
2006-05-04 Thiemo Seufer <ths@mips.com>
Nigel Stephens <nigel@mips.com>
David Ung <davidu@mips.com>
* mips-dis.c (mips_arch_choices): Add smartmips instruction
decoding to MIPS32 and MIPS32R2. Limit DSP decoding to release
2 ISAs. Add MIPS3D decoding to MIPS32R2. Add MT decoding to
MIPS64R2.
* mips-opc.c: fix random typos in comments.
(INSN_SMARTMIPS): New defines.
(mips_builtin_opcodes): Add paired single support for MIPS32R2.
Move bc3f, bc3fl, bc3t, bc3tl downwards. Move flushi, flushd,
flushid, wb upwards. Move cfc3, ctc3 downwards. Rework the
FP_S and FP_D flags to denote single and double register
accesses separately. Move dmfc3, dmtc3, mfc3, mtc3 downwards.
Allow jr.hb and jalr.hb for release 1 ISAs. Allow luxc1, suxc1
for MIPS32R2. Add SmartMIPS instructions. Add two-argument
variants of bc2f, bc2fl, bc2t, bc2tl. Add mfhc2, mthc2 to
release 2 ISAs.
* mips16-opc.c (mips16_opcodes): Add sdbbp instruction.
2006-05-04 12:47:05 +02:00
|
|
|
|
2006-05-04 Thiemo Seufer <ths@mips.com>
|
|
|
|
|
|
Nigel Stephens <nigel@mips.com>
|
|
|
|
|
|
David Ung <davidu@mips.com>
|
|
|
|
|
|
|
|
|
|
|
|
* mips-dis.c (mips_arch_choices): Add smartmips instruction
|
|
|
|
|
|
decoding to MIPS32 and MIPS32R2. Limit DSP decoding to release
|
|
|
|
|
|
2 ISAs. Add MIPS3D decoding to MIPS32R2. Add MT decoding to
|
|
|
|
|
|
MIPS64R2.
|
|
|
|
|
|
* mips-opc.c: fix random typos in comments.
|
|
|
|
|
|
(INSN_SMARTMIPS): New defines.
|
|
|
|
|
|
(mips_builtin_opcodes): Add paired single support for MIPS32R2.
|
|
|
|
|
|
Move bc3f, bc3fl, bc3t, bc3tl downwards. Move flushi, flushd,
|
|
|
|
|
|
flushid, wb upwards. Move cfc3, ctc3 downwards. Rework the
|
|
|
|
|
|
FP_S and FP_D flags to denote single and double register
|
|
|
|
|
|
accesses separately. Move dmfc3, dmtc3, mfc3, mtc3 downwards.
|
|
|
|
|
|
Allow jr.hb and jalr.hb for release 1 ISAs. Allow luxc1, suxc1
|
|
|
|
|
|
for MIPS32R2. Add SmartMIPS instructions. Add two-argument
|
|
|
|
|
|
variants of bc2f, bc2fl, bc2t, bc2tl. Add mfhc2, mthc2 to
|
|
|
|
|
|
release 2 ISAs.
|
|
|
|
|
|
* mips16-opc.c (mips16_opcodes): Add sdbbp instruction.
|
|
|
|
|
|
|
2006-05-03 22:59:20 +02:00
|
|
|
|
2006-05-03 Thiemo Seufer <ths@mips.com>
|
|
|
|
|
|
|
|
|
|
|
|
* mips-opc.c (mips_builtin_opcodes): Fix mftr argument order.
|
|
|
|
|
|
|
2006-05-02 13:12:41 +02:00
|
|
|
|
2006-05-02 Thiemo Seufer <ths@mips.com>
|
|
|
|
|
|
Nigel Stephens <nigel@mips.com>
|
|
|
|
|
|
David Ung <davidu@mips.com>
|
|
|
|
|
|
|
|
|
|
|
|
* mips-dis.c (print_insn_args): Force mips16 to odd addresses.
|
|
|
|
|
|
(print_mips16_insn_arg): Force mips16 to odd addresses.
|
|
|
|
|
|
|
2006-04-30 20:34:39 +02:00
|
|
|
|
2006-04-30 Thiemo Seufer <ths@mips.com>
|
|
|
|
|
|
David Ung <davidu@mips.com>
|
|
|
|
|
|
|
|
|
|
|
|
* mips-opc.c (mips_builtin_opcodes): Add udi instructions
|
|
|
|
|
|
"udi0" to "udi15".
|
|
|
|
|
|
* mips-dis.c (print_insn_args): Adds udi argument handling.
|
|
|
|
|
|
|
2006-04-29 05:11:31 +02:00
|
|
|
|
2006-04-28 James E Wilson <wilson@specifix.com>
|
|
|
|
|
|
|
|
|
|
|
|
* m68k-dis.c (match_insn_m68k): Restore fprintf_func before printing
|
|
|
|
|
|
error message.
|
|
|
|
|
|
|
2006-04-28 15:17:00 +02:00
|
|
|
|
2006-04-28 Thiemo Seufer <ths@mips.com>
|
|
|
|
|
|
David Ung <davidu@mips.com>
|
2006-04-28 15:38:49 +02:00
|
|
|
|
Nigel Stephens <nigel@mips.com>
|
2006-04-28 15:17:00 +02:00
|
|
|
|
|
|
|
|
|
|
* mips-dis.c (mips_cp0sel_names_mips3264r2): Add MT register
|
|
|
|
|
|
names.
|
|
|
|
|
|
|
2006-04-28 14:59:30 +02:00
|
|
|
|
2006-04-28 Thiemo Seufer <ths@mips.com>
|
2006-04-28 15:38:49 +02:00
|
|
|
|
Nigel Stephens <nigel@mips.com>
|
2006-04-28 14:59:30 +02:00
|
|
|
|
David Ung <davidu@mips.com>
|
|
|
|
|
|
|
|
|
|
|
|
* mips-dis.c (print_insn_args): Add mips_opcode argument.
|
|
|
|
|
|
(print_insn_mips): Adjust print_insn_args call.
|
|
|
|
|
|
|
2006-04-28 14:19:31 +02:00
|
|
|
|
2006-04-28 Thiemo Seufer <ths@mips.com>
|
2006-04-28 15:38:49 +02:00
|
|
|
|
Nigel Stephens <nigel@mips.com>
|
2006-04-28 14:19:31 +02:00
|
|
|
|
|
|
|
|
|
|
* mips-dis.c (print_insn_args): Print $fcc only for FP
|
|
|
|
|
|
instructions, use $cc elsewise.
|
|
|
|
|
|
|
2006-04-28 13:42:28 +02:00
|
|
|
|
2006-04-28 Thiemo Seufer <ths@mips.com>
|
2006-04-28 15:38:49 +02:00
|
|
|
|
Nigel Stephens <nigel@mips.com>
|
2006-04-28 13:42:28 +02:00
|
|
|
|
|
|
|
|
|
|
* opcodes/mips-dis.c (mips16_to_32_reg_map, mips16_reg_names):
|
|
|
|
|
|
Map MIPS16 registers to O32 names.
|
|
|
|
|
|
(print_mips16_insn_arg): Use mips16_reg_names.
|
|
|
|
|
|
|
2006-04-26 18:02:07 +02:00
|
|
|
|
2006-04-26 Julian Brown <julian@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* arm-dis.c (print_insn_neon): Disassemble floating-point constant
|
|
|
|
|
|
VMOV.
|
|
|
|
|
|
|
2006-04-26 17:40:55 +02:00
|
|
|
|
2006-04-26 Nathan Sidwell <nathan@codesourcery.com>
|
|
|
|
|
|
Julian Brown <julian@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k, convert
|
|
|
|
|
|
%<code>[zy] into %[zy]<code>. Expand meaning of %<bitfield>['`?].
|
|
|
|
|
|
Add unified load/store instruction names.
|
|
|
|
|
|
(neon_opcode_table): New.
|
|
|
|
|
|
(arm_opcodes): Expand meaning of %<bitfield>['`?].
|
|
|
|
|
|
(arm_decode_bitfield): New.
|
|
|
|
|
|
(print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
|
|
|
|
|
|
Use arm_decode_bitfield and adjust numeric specifiers. Adjust %z & %y.
|
|
|
|
|
|
(print_insn_neon): New.
|
|
|
|
|
|
(print_insn_arm): Adjust print_insn_coprocessor call. Call
|
|
|
|
|
|
print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
|
|
|
|
|
|
(print_insn_thumb32): Likewise.
|
|
|
|
|
|
|
2006-04-19 14:10:21 +02:00
|
|
|
|
2006-04-19 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
|
|
|
|
|
* Makefile.am: Run "make dep-am".
|
|
|
|
|
|
* Makefile.in: Regenerate.
|
|
|
|
|
|
|
2006-04-19 04:06:15 +02:00
|
|
|
|
2006-04-19 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
2006-04-19 04:15:05 +02:00
|
|
|
|
* avr-dis.c (avr_operand): Warning fix.
|
|
|
|
|
|
|
2006-04-19 04:06:15 +02:00
|
|
|
|
* configure: Regenerate.
|
|
|
|
|
|
|
2006-04-16 20:25:11 +02:00
|
|
|
|
2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* po/POTFILES.in: Regenerated.
|
|
|
|
|
|
|
2006-04-12 15:09:10 +02:00
|
|
|
|
2006-04-12 Hochstein <hochstein@algo.informatik.tu-darmstadt.de>
|
|
|
|
|
|
|
|
|
|
|
|
PR binutils/2454
|
|
|
|
|
|
* avr-dis.c (avr_operand): Arrange for a comment to appear before
|
|
|
|
|
|
the symolic form of an address, so that the output of objdump -d
|
|
|
|
|
|
can be reassembled.
|
|
|
|
|
|
|
2006-04-10 23:19:14 +02:00
|
|
|
|
2006-04-10 DJ Delorie <dj@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* m32c-asm.c: Regenerate.
|
|
|
|
|
|
|
2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
* Makefile.tpl: Add install-html target.
* Makefile.def: Add install-html target.
* Makefile.in: Regenerate.
* configure.in: Add --with-datarootdir, --with-docdir,
and --with-htmldir options.
* configure: Regenerate.
bfd/
2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
* po/Make-in: Add install-html target.
* Makefile.am: Rename docdir to bfddocdir. Add datarootdir, docdir
htmldir. Add install-html and install-html-recursive targets.
* Makefile.in: Regenerate.
* configure.in: AC_SUBST for datarootdir, docdir and htmldir.
* configure: Regenerate.
bfd/doc/
2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
* Makefile.am: Add install-html and install-html-am targets.
Define datarootdir, docdir and htmldir.
* Makefile.in: Regenerate.
binutils/
2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
* po/Make-in: Add install-html target.
* Makefile.am: Add install-html and install-html-recursive targets.
* Makefile.in: Regenerate.
* configure.in: AC_SUBST datarootdir, docdir and htmldir.
* configure: Regenerate.
* doc/Makefile.am: Add install-html and install-html-am targets.
* doc/Makefile.in: Regenerate.
etc/
2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
* Makefile.in: Add install-html target. Add htmldir,
docdir and datarootdir.
* configure.texi: Document install-html target.
* configure.in: AC_SUBST datarootdir, docdir, htmldir.
* configure: Regenerate.
gas/
2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
* po/Make-in: Add install-html target.
* Makefile.am: Add install-html and install-html-recursive targets.
* Makefile.in: Regenerate.
* configure.in: AC_SUBST datarootdir, docdir, htmldir.
* configure: Regenerate.
* doc/Makefile.am: Add install-html and install-html-am targets.
* doc/Makefile.in: Regenerate.
gprof/
2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
* po/Make-in: Add install-html target.
* Makefile.am: Add install-html, install-html-am and
install-html-recursive targets.
* Makefile.in: Regenerate.
* configure.in: AC_SUBST datarootdir, docdir, htmldir.
* configure: Regenerate.
intl/
2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
* intl/Makefile.in: Add html info and dvi and install-html to .PHONY
Add install-html target.
ld/
2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
* Makefile.am: Add install-html, install-html-am, and
install-html-recursive targets.
* Makefile.in: Regenerate.
* configure.in: AC_SUBST datarootdir, docdir, htmldir.
* configure: Regenerate.
* po/Make-in: Add install-html target.
opcodes/
2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
* Makefile.am: Add install-html target.
* Makefile.in: Regenerate.
2006-04-06 23:49:35 +02:00
|
|
|
|
2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* Makefile.am: Add install-html target.
|
|
|
|
|
|
* Makefile.in: Regenerate.
|
|
|
|
|
|
|
2006-04-06 12:09:41 +02:00
|
|
|
|
2006-04-06 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* po/vi/po: Updated Vietnamese translation.
|
|
|
|
|
|
|
2006-03-31 13:43:14 +02:00
|
|
|
|
2006-03-31 Paul Koning <ni1d@arrl.net>
|
|
|
|
|
|
|
|
|
|
|
|
* pdp11-opc.c (pdp11_opcodes): Fix opcode for SEC instruction.
|
|
|
|
|
|
|
2006-03-16 20:09:48 +01:00
|
|
|
|
2006-03-16 Bernd Schmidt <bernd.schmidt@analog.com>
|
|
|
|
|
|
|
|
|
|
|
|
* bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the
|
|
|
|
|
|
logic to identify halfword shifts.
|
|
|
|
|
|
|
2006-03-16 16:08:48 +01:00
|
|
|
|
2006-03-16 Paul Brook <paul@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* arm-dis.c (arm_opcodes): Rename swi to svc.
|
|
|
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|
|
(thumb_opcodes): Ditto.
|
|
|
|
|
|
|
2006-03-14 01:30:59 +01:00
|
|
|
|
2006-03-13 DJ Delorie <dj@redhat.com>
|
|
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|
|
|
|
2006-03-14 05:23:52 +01:00
|
|
|
|
* m32c-asm.c: Regenerate.
|
|
|
|
|
|
* m32c-desc.c: Likewise.
|
|
|
|
|
|
* m32c-desc.h: Likewise.
|
|
|
|
|
|
* m32c-dis.c: Likewise.
|
|
|
|
|
|
* m32c-ibld.c: Likewise.
|
2006-03-14 01:30:59 +01:00
|
|
|
|
* m32c-opc.c: Likewise.
|
|
|
|
|
|
* m32c-opc.h: Likewise.
|
|
|
|
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|
|
2006-03-11 03:23:19 +01:00
|
|
|
|
2006-03-10 DJ Delorie <dj@redhat.com>
|
|
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|
|
|
|
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|
|
* m32c-desc.c: Regenerate with mul.l, mulu.l.
|
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|
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|
|
* m32c-opc.c: Likewise.
|
|
|
|
|
|
* m32c-opc.h: Likewise.
|
|
|
|
|
|
|
|
|
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|
|
2006-03-09 18:28:11 +01:00
|
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|
|
2006-03-09 Nick Clifton <nickc@redhat.com>
|
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|
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|
|
* po/sv.po: Updated Swedish translation.
|
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|
2006-03-07 21:18:06 +01:00
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|
2006-03-07 H.J. Lu <hongjiu.lu@intel.com>
|
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|
|
PR binutils/2428
|
|
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|
|
* i386-dis.c (REP_Fixup): New function.
|
|
|
|
|
|
(AL): Remove duplicate.
|
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|
|
|
|
(Xbr): New.
|
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|
|
(Xvr): Likewise.
|
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|
(Ybr): Likewise.
|
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|
|
(Yvr): Likewise.
|
|
|
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|
|
(indirDXr): Likewise.
|
|
|
|
|
|
(ALr): Likewise.
|
|
|
|
|
|
(eAXr): Likewise.
|
|
|
|
|
|
(dis386): Updated entries of ins, outs, movs, lods and stos.
|
|
|
|
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|
|
2006-03-05 09:38:53 +01:00
|
|
|
|
2006-03-05 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* cgen-ibld.in (insert_normal): Cope with attempts to insert a
|
|
|
|
|
|
signed 32-bit value into an unsigned 32-bit field when the host is
|
|
|
|
|
|
a 64-bit machine.
|
|
|
|
|
|
* fr30-ibld.c: Regenerate.
|
|
|
|
|
|
* frv-ibld.c: Regenerate.
|
|
|
|
|
|
* ip2k-ibld.c: Regenerate.
|
|
|
|
|
|
* iq2000-asm.c: Regenerate.
|
|
|
|
|
|
* iq2000-ibld.c: Regenerate.
|
|
|
|
|
|
* m32c-ibld.c: Regenerate.
|
|
|
|
|
|
* m32r-ibld.c: Regenerate.
|
|
|
|
|
|
* openrisc-ibld.c: Regenerate.
|
|
|
|
|
|
* xc16x-ibld.c: Regenerate.
|
|
|
|
|
|
* xstormy16-ibld.c: Regenerate.
|
|
|
|
|
|
|
2006-03-03 16:57:43 +01:00
|
|
|
|
2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
|
|
|
|
|
|
|
|
|
|
|
|
* xc16x-asm.c: Regenerate.
|
|
|
|
|
|
* xc16x-dis.c: Regenerate.
|
|
|
|
|
|
|
2006-02-27 17:26:26 +01:00
|
|
|
|
2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* po/Make-in: Add html target.
|
|
|
|
|
|
|
2006-02-27 16:35:37 +01:00
|
|
|
|
2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
|
|
|
|
|
|
Intel Merom New Instructions.
|
|
|
|
|
|
(THREE_BYTE_0): Likewise.
|
|
|
|
|
|
(THREE_BYTE_1): Likewise.
|
|
|
|
|
|
(three_byte_table): Likewise.
|
|
|
|
|
|
(dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
|
|
|
|
|
|
THREE_BYTE_1 for entry 0x3a.
|
|
|
|
|
|
(twobyte_has_modrm): Updated.
|
|
|
|
|
|
(twobyte_uses_SSE_prefix): Likewise.
|
|
|
|
|
|
(print_insn): Handle 3-byte opcodes used by Intel Merom New
|
|
|
|
|
|
Instructions.
|
|
|
|
|
|
|
2006-02-25 02:33:24 +01:00
|
|
|
|
2006-02-24 David S. Miller <davem@sunset.davemloft.net>
|
|
|
|
|
|
|
|
|
|
|
|
* sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
|
|
|
|
|
|
(v9_hpriv_reg_names): New table.
|
|
|
|
|
|
(print_insn_sparc): Allow values up to 16 for '?' and '!'.
|
|
|
|
|
|
New cases '$' and '%' for read/write hyperprivileged register.
|
|
|
|
|
|
* sparc-opc.c (sparc_opcodes): Add new entries for UA2005
|
|
|
|
|
|
window handling and rdhpr/wrhpr instructions.
|
|
|
|
|
|
|
[include/elf]
* m32c.h: Add relax relocs.
[cpu]
* m32c.cpu (RL_TYPE): New attribute, with macros.
(Lab-8-24): Add RELAX.
(unary-insn-defn-g, binary-arith-imm-dst-defn,
binary-arith-imm4-dst-defn): Add 1ADDR attribute.
(binary-arith-src-dst-defn): Add 2ADDR attribute.
(jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
attribute.
(jsri16, jsri32): Add 1ADDR attribute.
(jsr32.w, jsr32.a): Add JUMP attribute.
[opcodes]
* m32c-desc.c: Regenerate with linker relaxation attributes.
* m32c-desc.h: Likewise.
* m32c-dis.c: Likewise.
* m32c-opc.c: Likewise.
[gas]
* config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
(tc_gen_reloc): Don't define.
* config/tc-m32c.c (rl_for, relaxable): New convenience macros.
(OPTION_LINKRELAX): New.
(md_longopts): Add it.
(m32c_relax): New.
(md_parse_options): Set it.
(md_assemble): Emit relaxation relocs as needed.
(md_convert_frag): Emit relaxation relocs as needed.
(md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
(m32c_apply_fix): New.
(tc_gen_reloc): New.
(m32c_force_relocation): Force out jump relocs when relaxing.
(m32c_fix_adjustable): Return false if relaxing.
[bfd]
* elf32-m32c.c (m32c_elf_howto_table): Add relaxation relocs.
(m32c_elf_relocate_section): Don't relocate them.
(compare_reloc): New.
(relax_reloc): Remove.
(m32c_offset_for_reloc): New.
(m16c_addr_encodings): New.
(m16c_jmpaddr_encodings): New.
(m32c_addr_encodings): New.
(m32c_elf_relax_section): Relax jumps and address displacements.
(m32c_elf_relax_delete_bytes): Adjust for internal syms. Fix up
short jumps.
* reloc.c: Add m32c relax relocs.
* libbfd.h: Regenerate.
2006-02-24 23:10:36 +01:00
|
|
|
|
2006-02-24 DJ Delorie <dj@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* m32c-desc.c: Regenerate with linker relaxation attributes.
|
|
|
|
|
|
* m32c-desc.h: Likewise.
|
|
|
|
|
|
* m32c-dis.c: Likewise.
|
|
|
|
|
|
* m32c-opc.c: Likewise.
|
|
|
|
|
|
|
2006-02-24 Paul Brook <paul@codesourcery.com>
gas/
* config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
(struct asm_barrier_opt): Define.
(arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
(parse_psr): Accept V7M psr names.
(parse_barrier): New function.
(enum operand_parse_code): Add OP_oBARRIER.
(parse_operands): Implement OP_oBARRIER.
(do_barrier): New function.
(do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
(do_t_cpsi): Add V7M restrictions.
(do_t_mrs, do_t_msr): Validate V7M variants.
(md_assemble): Check for NULL variants.
(v7m_psrs, barrier_opt_names): New tables.
(insns): Add V7 instructions. Mark V6 instructions absent from V7M.
(md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
(arm_cpu_option_table): Add Cortex-M3, R4 and A8.
(arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
(struct cpu_arch_ver_table): Define.
(cpu_arch_ver): New.
(aeabi_set_public_attributes): Use cpu_arch_ver. Set
Tag_CPU_arch_profile.
* doc/c-arm.texi: Document new cpu and arch options.
gas/testsuite/
* gas/arm/thumb32.d: Fix expected msr and mrs output.
* gas/arm/arch7.d: New test.
* gas/arm/arch7.s: New test.
* gas/arm/arch7m-bad.l: New test.
* gas/arm/arch7m-bad.d: New test.
* gas/arm/arch7m-bad.s: New test.
include/opcode/
* arm.h: Add V7 feature bits.
opcodes/
* arm-dis.c (arm_opcodes): Add V7 instructions.
(thumb32_opcodes): Ditto. Handle V7M MSR/MRS variants.
(print_arm_address): New function.
(print_insn_arm): Use it. Add 'P' and 'U' cases.
(psr_name): New function.
(print_insn_thumb32): Add 'U', 'C' and 'D' cases.
2006-02-24 16:36:36 +01:00
|
|
|
|
2006-02-24 Paul Brook <paul@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* arm-dis.c (arm_opcodes): Add V7 instructions.
|
|
|
|
|
|
(thumb32_opcodes): Ditto. Handle V7M MSR/MRS variants.
|
|
|
|
|
|
(print_arm_address): New function.
|
|
|
|
|
|
(print_insn_arm): Use it. Add 'P' and 'U' cases.
|
|
|
|
|
|
(psr_name): New function.
|
|
|
|
|
|
(print_insn_thumb32): Add 'U', 'C' and 'D' cases.
|
|
|
|
|
|
|
2006-02-23 22:36:18 +01:00
|
|
|
|
2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* ia64-opc-i.c (bXc): New.
|
|
|
|
|
|
(mXc): Likewise.
|
|
|
|
|
|
(OpX2TaTbYaXcC): Likewise.
|
|
|
|
|
|
(TF). Likewise.
|
|
|
|
|
|
(TFCM). Likewise.
|
|
|
|
|
|
(ia64_opcodes_i): Add instructions for tf.
|
|
|
|
|
|
|
|
|
|
|
|
* ia64-opc.h (IMMU5b): New.
|
|
|
|
|
|
|
|
|
|
|
|
* ia64-asmtab.c: Regenerated.
|
|
|
|
|
|
|
2006-02-23 15:49:32 +01:00
|
|
|
|
2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* ia64-gen.c: Update copyright years.
|
|
|
|
|
|
* ia64-opc-b.c: Likewise.
|
|
|
|
|
|
|
2006-02-23 01:17:24 +01:00
|
|
|
|
2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* ia64-gen.c (lookup_regindex): Handle ".vm".
|
|
|
|
|
|
(print_dependency_table): Handle '\"'.
|
|
|
|
|
|
|
|
|
|
|
|
* ia64-ic.tbl: Updated from SDM 2.2.
|
|
|
|
|
|
* ia64-raw.tbl: Likewise.
|
|
|
|
|
|
* ia64-waw.tbl: Likewise.
|
|
|
|
|
|
* ia64-asmtab.c: Regenerated.
|
|
|
|
|
|
|
|
|
|
|
|
* ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
|
|
|
|
|
|
|
2006-02-17 15:36:28 +01:00
|
|
|
|
2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
|
|
|
|
|
|
Anil Paranjape <anilp1@kpitcummins.com>
|
|
|
|
|
|
Shilin Shakti <shilins@kpitcummins.com>
|
|
|
|
|
|
|
|
|
|
|
|
* xc16x-desc.h: New file
|
|
|
|
|
|
* xc16x-desc.c: New file
|
|
|
|
|
|
* xc16x-opc.h: New file
|
|
|
|
|
|
* xc16x-opc.c: New file
|
|
|
|
|
|
* xc16x-ibld.c: New file
|
|
|
|
|
|
* xc16x-asm.c: New file
|
|
|
|
|
|
* xc16x-dis.c: New file
|
|
|
|
|
|
* Makefile.am: Entries for xc16x
|
|
|
|
|
|
* Makefile.in: Regenerate
|
|
|
|
|
|
* cofigure.in: Add xc16x target information.
|
|
|
|
|
|
* configure: Regenerate.
|
|
|
|
|
|
* disassemble.c: Add xc16x target information.
|
|
|
|
|
|
|
2006-02-11 19:08:35 +01:00
|
|
|
|
2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-dis.c (dis386_twobyte): Use "movZ" for debug register
|
|
|
|
|
|
moves.
|
|
|
|
|
|
|
2006-02-11 18:00:59 +01:00
|
|
|
|
2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-dis.c ('Z'): Add a new macro.
|
|
|
|
|
|
(dis386_twobyte): Use "movZ" for control register moves.
|
|
|
|
|
|
|
2006-02-10 13:05:12 +01:00
|
|
|
|
2006-02-10 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* iq2000-asm.c: Regenerate.
|
|
|
|
|
|
|
* bfd/archures.c (bfd_mach_mcf5200, bfd_mach_mcf5206e,
bfd_mach_mcf5307, bfd_mach_mcf5407, bfd_mach_mcf528x,
bfd_mach_mcfv4e, bfd_mach_mcf521x, bfd_mach_mcf5249,
bfd_mach_mcf547x, bfd_mach_mcf548x): Remove.
(bfd_mach_mcf_isa_a, bfd_mach_mcf_isa_a_div,
bfd_mach_mcf_isa_a_div_mac, bfd_mach_mcf_isa_a_div_emac,
bfd_mach_mcf_isa_aplus, bfd_mach_mcf_isa_aplus_mac,
bfd_mach_mcf_isa_aplus_emac, bfd_mach_mcf_isa_aplus_usp,
bfd_mach_mcf_isa_aplus_usp_mac, bfd_mach_mcf_isa_aplus_usp_emac,
bfd_mach_mcf_isa_b, bfd_mach_mcf_isa_b_mac, bfd_mach_mcf_isa_b_emac,
bfd_mach_mcf_isa_b_usp_float, bfd_mach_mcf_isa_b_usp_float_mac,
bfd_mach_mcf_isa_b_usp_float_emac): New.
(bfd_default_scan): Update coldfire mapping.
* bfd/bfd-in.h (bfd_m68k_mach_to_features,
bfd_m68k_features_to_mach): Declare.
* bfd/bfd-in2.h: Rebuilt.
* bfd/cpu-m68k.c (arch_info_struct): Add new coldfire machines,
adjust legacy names.
(m68k_arch_features): New.
(bfd_m68k_mach_to_features,
bfd_m68k_features_to_mach): Define.
* bfd/elf32-m68k.c (elf32_m68k_object_p): New.
(elf32_m68k_merge_private_bfd_data): Merge the CF EF flags.
(elf32_m68k_print_private_bfd_data): Print the CF EF flags.
(elf_backend_object_p): Define.
* bfd/ieee.c (ieee_write_processor): Update coldfire machines.
* bfd/libbfd.h: Rebuilt.
* gas/config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
mcf5329_control_regs): New.
(not_current_architecture, selected_arch, selected_cpu): New.
(m68k_archs, m68k_extensions): New.
(archs): Renamed to ...
(m68k_cpus): ... here. Adjust.
(n_arches): Remove.
(md_pseudo_table): Add arch and cpu directives.
(find_cf_chip, m68k_ip): Adjust table scanning.
(no_68851, no_68881): Remove.
(md_assemble): Lazily initialize.
(select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
(md_init_after_args): Move functionality to m68k_init_arch.
(mri_chip): Adjust table scanning.
(md_parse_option): Reimplement 'm' processing to add -march & -mcpu
options with saner parsing.
(m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
m68k_init_arch): New.
(s_m68k_cpu, s_m68k_arch): New.
(md_show_usage): Adjust.
(m68k_elf_final_processing): Set CF EF flags.
* gas/config/tc-m68k.h (m68k_init_after_args): Remove.
(tc_init_after_args): Remove.
* gas/doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
(M68k-Directives): Document .arch and .cpu directives.
* gas/testsuite/gas/m68k/all.exp: Add arch-cpu-1 test.
* gas/testsuite/gas/m68k/arch-cpu-1.[sd]: New.
* include/elf/m68k.h (EF_CPU32, EF_M68000, EF_CFV4E): Rename to ...
(EF_M68K_CPU32, EF_M68K_M68000, EF_M68K_CFV4E): ... here.
(EF_M68K_ISA_MASK, EF_M68K_ISA_A, EF_M68K_M68K_ISA_A_PLUS,
EF_M68K_ISA_B, EF_M68K_HW_DIV, EF_M68K_MAC_MASK, EF_M68K_MAC,
EF_M68K_EMAC, EF_M68K_USP, EF_M68K_FLOAT): New.
* include/opcode/m68k.h (m68008, m68ec030, m68882): Remove.
(m68k_mask): New.
(cpu_m68k, cpu_cf): New.
(mcf5200, mcf5206e, mcf521x, mcf5249, mcf528x, mcf5307, mcf5407,
mcf5470, mcf5480): Rename to cpu_<foo>. Add m680x0 variants.
* opcodes/m68k-dis.c (print_insn_m68k): Use
bfd_m68k_mach_to_features.
* binutils/readelf.c (get_machine_flags): Add logic for EF_M68K flags.
2006-02-07 20:01:10 +01:00
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2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
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* m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features.
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* mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.
2006-01-26 16:14:57 +01:00
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2006-01-26 David Ung <davidu@mips.com>
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* mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
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ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
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floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
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nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
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rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.
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2006-01-18 14:48:46 +01:00
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2006-01-18 Arnold Metselaar <arnoldm@sourceware.org>
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* z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d,
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ld_d_r, pref_xd_cb): Use signed char to hold data to be
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disassembled.
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* z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes
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buffer overflows when disassembling instructions like
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ld (ix+123),0x23
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* z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed
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operand, if the offset is negative.
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2006-01-17 22:15:56 +01:00
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2006-01-17 Arnold Metselaar <arnoldm@sourceware.org>
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* z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use
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unsigned char to hold data to be disassembled.
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2006-01-17 18:39:20 +01:00
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2006-01-17 Andreas Schwab <schwab@suse.de>
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PR binutils/1486
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* disassemble.c (disassemble_init_for_target): Set
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disassembler_needs_relocs for bfd_arch_arm.
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2006-01-16 17:23:30 +01:00
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2006-01-16 Paul Brook <paul@codesourcery.com>
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2006-01-17 00:15:07 +01:00
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* m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss,
|
2006-01-16 17:23:30 +01:00
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f?add?, and f?sub? instructions.
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2006-01-16 17:15:17 +01:00
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2006-01-16 Nick Clifton <nickc@redhat.com>
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* po/zh_CN.po: New Chinese (simplified) translation.
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* configure.in (ALL_LINGUAS): Add "zh_CH".
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* configure: Regenerate.
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2006-01-15 17:35:21 +01:00
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2006-01-05 Paul Brook <paul@codesourcery.com>
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* m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.
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2006-01-07 00:25:36 +01:00
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2006-01-06 DJ Delorie <dj@redhat.com>
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* m32c-desc.c: Regenerate.
|
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* m32c-opc.c: Regenerate.
|
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* m32c-opc.h: Regenerate.
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2006-01-03 23:06:18 +01:00
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2006-01-03 DJ Delorie <dj@redhat.com>
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* cgen-ibld.in (extract_normal): Avoid memory range errors.
|
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* m32c-ibld.c: Regenerated.
|
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2006-01-17 00:15:07 +01:00
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|
For older changes see ChangeLog-2005
|
1999-05-03 09:29:11 +02:00
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Local Variables:
|
2001-01-11 20:01:42 +01:00
|
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mode: change-log
|
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|
left-margin: 8
|
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fill-column: 74
|
1999-05-03 09:29:11 +02:00
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version-control: never
|
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End:
|