2008-08-24 05:13:05 +02:00
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|
2008-08-24 Alan Modra <amodra@bigpond.net.au>
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|
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* configure.in: Update a number of obsolete autoconf macros.
|
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|
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* configure: Regenerate.
|
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|
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|
|
* aclocal.m4: Regenerate.
|
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|
2008-08-22 19:05:40 +02:00
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|
|
2008-08-22 Nick Clifton <nickc@redhat.com>
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|
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* config/tc-mcore.c (md_assemble): Increase length of name array
|
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|
to include terminating NUL.
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2008-08-22 09:21:49 +02:00
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2008-08-22 Jie Zhang <jie.zhang@analog.com>
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|
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* config/bfin-lex.l (NUMBER): Protect special `.'.
|
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2008-08-22 08:07:45 +02:00
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|
2008-08-22 Alan Modra <amodra@bigpond.net.au>
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* symbols.c (symbol_clone): Ensure clones are not external.
|
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|
2008-08-22 02:41:37 +02:00
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|
2008-08-22 Alan Modra <amodra@bigpond.net.au>
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* config/tc-hppa.c (md_begin): Set BSF_KEEP for "dummy_symbol".
|
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|
2008-08-21 21:49:22 +02:00
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|
2008-08-21 Richard Henderson <rth@redhat.com>
|
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|
|
* dw2gencfi.c (DWARF2_FDE_RELOC_SIZE): New.
|
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|
|
(output_cie, output_fde): Use it.
|
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|
(DWARF2_EH_FRAME_READ_ONLY): New.
|
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|
(cfi_finish): Use it.
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* config/tc-hppa.h (DWARF2_FDE_RELOC_SIZE): Set to 8 for 64-bit.
|
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|
|
(DWARF2_CIE_DATA_ALIGNMENT): Change sign.
|
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|
|
(DWARF2_EH_FRAME_READ_ONLY): New.
|
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|
|
* config/tc-hppa.c (tc_gen_reloc): Generate pc-relative relocations
|
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|
|
from the results of DIFF_EXPR_OK manipulation.
|
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|
2008-08-21 19:10:24 +02:00
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|
|
2008-08-21 Sterling Augustine <sterling@tensilica.com>
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|
|
* config/xtensa-istack.h (MAX_INSN_ARGS): Increase to 64.
|
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|
|
2008-08-20 Bob Wilson <bob.wilson@acm.org>
bfd/
* elf-bfd.h (elf_object_id): Add XTENSA_ELF_TDATA.
* elf32-xtensa.c (elf_howto_table): Add TLS relocations.
(elf_xtensa_reloc_type_lookup): Likewise.
(TCB_SIZE): Define.
(elf_xtensa_link_hash_entry): New.
(GOT_UNKNOWN, GOT_NORMAL, GOT_TLS_GD, GOT_TLS_IE, GOT_TLS_ANY): Define.
(elf_xtensa_hash_entry): Define.
(elf_xtensa_obj_tdata): New.
(elf_xtensa_tdata): Define.
(elf_xtensa_local_got_tls_type): Define.
(elf_xtensa_local_tlsfunc_refcounts): Define.
(is_xtensa_elf): Define.
(elf_xtensa_mkobject): New.
(elf_xtensa_link_hash_table): Add tlsbase field.
(elf_xtensa_link_hash_newfunc): New.
(elf_xtensa_link_hash_table_create): Use elf_xtensa_link_hash_newfunc.
Create an entry for "_TLS_MODULE_BASE_" and save it in tlsbase field.
(elf_xtensa_copy_indirect_symbol): New.
(elf_xtensa_check_relocs): Rewrite to handle TLS relocations.
(elf_xtensa_gc_sweep_hook): Likewise.
(elf_xtensa_allocate_dynrelocs): Optimize away GOT entries for
TLSDESC_FN relocations when an IE reference is seen.
(elf_xtensa_allocate_local_got_size): Likewise.
(elf_xtensa_always_size_sections): New.
(dtpoff_base, tpoff): New.
(elf_xtensa_do_reloc): Handle TLS relocations.
(replace_tls_insn): New.
(IS_XTENSA_TLS_RELOC): Define.
(elf_xtensa_relocate_section): Handle TLS relocations.
(get_indirect_call_dest_reg): New.
(bfd_elf32_mkobject): Define.
(elf_backend_always_size_sections): New.
(elf_backend_copy_indirect_symbol): New.
* reloc.c (BFD_RELOC_XTENSA_TLSDESC_FN, BFD_RELOC_XTENSA_TLSDESC_ARG)
(BFD_RELOC_XTENSA_TLS_DTPOFF, BFD_RELOC_XTENSA_TLS_TPOFF)
(BFD_RELOC_XTENSA_TLS_FUNC, BFD_RELOC_XTENSA_TLS_ARG)
(BFD_RELOC_XTENSA_TLS_CALL): New.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
gas/
* config/tc-xtensa.c (O_tlsfunc, O_tlsarg, O_tlscall): Define.
(O_tpoff, O_dtpoff): Define.
(suffix_relocs): Add entries for TLS suffixes.
(xtensa_elf_cons): Check for invalid use of TLS relocations.
(map_operator_to_reloc): Add is_literal parameter and use it to
control translating TLS instruction relocations to the corresponding
literal relocations.
(xg_valid_literal_expression): Allow TLS operators.
(xg_build_to_insn): Copy TLS operators from pseudo-instruction
operands to generated literals.
(xg_assemble_literal): Handle TLS operators. Update call to
map_operator_to_reloc.
(md_assemble): Handle CALLXn.TLS pseudo-instruction.
(md_apply_fix): Handle TLS relocations.
(emit_single_op): Handle TLS operators.
(convert_frag_immed): Update call to map_operator_to_reloc.
(vinsn_to_insnbuf): Emit relocations for TLS-related instructions.
* config/xtensa-istack.h (tinsn_struct): Add tls_reloc field.
* config/xtensa-relax.c (append_literal_op): Add src_op parameter
to initialize the op_data field of the BuildOp.
(build_transition): Use it here to record the source operand
corresponding to a generated literal.
* config/xtensa-relax.h (build_op): Comment op_data use for literals.
include/elf/
* xtensa.h (R_XTENSA_TLSDESC_FN, R_XTENSA_TLSDESC_ARG)
(R_XTENSA_TLS_DTPOFF, R_XTENSA_TLS_TPOFF, R_XTENSA_TLS_FUNC)
(R_XTENSA_TLS_ARG, R_XTENSA_TLS_CALL): New.
ld/testsuite/
* ld-xtensa/tlsbin.dd, ld-xtensa/tlsbin.rd, ld-xtensa/tlsbin.s,
ld-xtensa/tlsbin.sd, ld-xtensa/tlsbin.td, ld-xtensa/tlslib.s,
ld-xtensa/tlspic.dd, ld-xtensa/tlspic.rd, ld-xtensa/tlspic.sd,
ld-xtensa/tlspic.td, ld-xtensa/tlspic1.s, ld-xtensa/tlspic2.s: New.
* ld-xtensa/xtensa.exp: Run them.
2008-08-21 01:28:59 +02:00
|
|
|
|
2008-08-20 Bob Wilson <bob.wilson@acm.org>
|
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|
|
* config/tc-xtensa.c (O_tlsfunc, O_tlsarg, O_tlscall): Define.
|
|
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|
|
|
(O_tpoff, O_dtpoff): Define.
|
|
|
|
|
|
(suffix_relocs): Add entries for TLS suffixes.
|
|
|
|
|
|
(xtensa_elf_cons): Check for invalid use of TLS relocations.
|
|
|
|
|
|
(map_operator_to_reloc): Add is_literal parameter and use it to
|
|
|
|
|
|
control translating TLS instruction relocations to the corresponding
|
|
|
|
|
|
literal relocations.
|
|
|
|
|
|
(xg_valid_literal_expression): Allow TLS operators.
|
|
|
|
|
|
(xg_build_to_insn): Copy TLS operators from pseudo-instruction
|
|
|
|
|
|
operands to generated literals.
|
|
|
|
|
|
(xg_assemble_literal): Handle TLS operators. Update call to
|
|
|
|
|
|
map_operator_to_reloc.
|
|
|
|
|
|
(md_assemble): Handle CALLXn.TLS pseudo-instruction.
|
|
|
|
|
|
(md_apply_fix): Handle TLS relocations.
|
|
|
|
|
|
(emit_single_op): Handle TLS operators.
|
|
|
|
|
|
(convert_frag_immed): Update call to map_operator_to_reloc.
|
|
|
|
|
|
(vinsn_to_insnbuf): Emit relocations for TLS-related instructions.
|
|
|
|
|
|
* config/xtensa-istack.h (tinsn_struct): Add tls_reloc field.
|
|
|
|
|
|
* config/xtensa-relax.c (append_literal_op): Add src_op parameter
|
|
|
|
|
|
to initialize the op_data field of the BuildOp.
|
|
|
|
|
|
(build_transition): Use it here to record the source operand
|
|
|
|
|
|
corresponding to a generated literal.
|
|
|
|
|
|
* config/xtensa-relax.h (build_op): Comment op_data use for literals.
|
2008-08-22 02:41:37 +02:00
|
|
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|
|
2008-08-20 20:48:09 +02:00
|
|
|
|
2008-08-20 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
AVX Programming Reference (August, 2008)
|
|
|
|
|
|
* config/tc-i386.c (CPU_FLAGS_AES_MATCH): New.
|
|
|
|
|
|
(CPU_FLAGS_AVX_MATCH): Likewise.
|
|
|
|
|
|
(CPU_FLAGS_32BIT_MATCH): Updated.
|
|
|
|
|
|
(cpu_flags_match): Likewise.
|
|
|
|
|
|
|
2008-08-20 15:43:32 +02:00
|
|
|
|
2008-08-20 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
|
|
|
|
|
PR 6848
|
|
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|
|
* write.c (install_reloc): Check that reloc symbols have been
|
|
|
|
|
|
written.
|
|
|
|
|
|
(set_symtab): Mark symbols with BSF_KEEP.
|
|
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|
|
2008-08-18 20:21:15 +02:00
|
|
|
|
2008-08-18 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (i386_align_code): Fix a comment typo.
|
|
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|
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|
|
2008-08-15 10:31:52 +02:00
|
|
|
|
2008-08-15 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
|
|
|
|
|
PR 6526
|
|
|
|
|
|
* configure.in: Invoke AC_USE_SYSTEM_EXTENSIONS.
|
|
|
|
|
|
* Makefile.in: Regenerate.
|
|
|
|
|
|
* aclocal.m4: Regenerate.
|
|
|
|
|
|
* config.in: Regenerate.
|
|
|
|
|
|
* configure: Regenerate.
|
|
|
|
|
|
* doc/Makefile.in: Regenerate.
|
|
|
|
|
|
|
2008-08-14 16:54:40 +02:00
|
|
|
|
2008-08-14 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-tic4x.c (tic4x_operands_parse): Make static.
|
|
|
|
|
|
|
2008-08-13 04:50:41 +02:00
|
|
|
|
2008-08-13 Ben Elliston <bje@au.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* doc/as.texinfo (Align): Document the PowerPC behaviour.
|
|
|
|
|
|
|
2008-08-13 01:39:31 +02:00
|
|
|
|
2008-08-13 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
|
|
|
|
|
* as.c, as.h, ecoff.c, hash.c, macro.c, symbols.c, config/obj-evax.c,
|
|
|
|
|
|
config/obj-som.c, config/tc-alpha.c, config/tc-arm.c, config/tc-bfin.c,
|
|
|
|
|
|
config/tc-bfin.h, config/tc-crx.c, config/tc-frv.c, config/tc-frv.h,
|
|
|
|
|
|
config/tc-hppa.h, config/tc-i386.c, config/tc-i860.c, config/tc-i960.h,
|
|
|
|
|
|
config/tc-ia64.c, config/tc-ia64.h, config/tc-m32c.c, config/tc-m32c.h,
|
|
|
|
|
|
config/tc-m68k.c, config/tc-maxq.c, config/tc-s390.c, config/tc-s390.h,
|
|
|
|
|
|
config/tc-sparc.c, config/tc-sparc.h, config/tc-spu.c, config/tc-spu.h,
|
|
|
|
|
|
config/tc-tic4x.c, config/tc-tic4x.h, config/tc-tic54x.c,
|
|
|
|
|
|
config/tc-tic54x.h, config/tc-vax.c, doc/internals.texi: Banish PARAMS
|
|
|
|
|
|
and PTR. Convert to ISO C. Delete unnecessary forward declarations.
|
|
|
|
|
|
|
2008-08-12 11:58:34 +02:00
|
|
|
|
2008-08-12 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (s_unreq): Adjust hash_delete call.
|
|
|
|
|
|
* config/tc-ia64.c (dot_rot): Likewise.
|
|
|
|
|
|
|
2008-08-11 09:40:22 +02:00
|
|
|
|
2008-08-11 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
|
|
|
|
|
PR 6575
|
|
|
|
|
|
* hash.c: Expand PTR to void *.
|
|
|
|
|
|
(hash_delete): Add "freeme" parameter. Call obstack_free.
|
|
|
|
|
|
* hash.h: Expand PTR to void *.
|
|
|
|
|
|
(hash_delete): Update prototype.
|
|
|
|
|
|
* macro.c (macro_expand_body): hash_delete LOCALs from formal_hash.
|
|
|
|
|
|
* config/tc-tic54x.c (tic54x_remove_local_label): Update hash_delete
|
|
|
|
|
|
call.
|
|
|
|
|
|
(subsym_substitute): Likewise.
|
|
|
|
|
|
* doc/internals.texi (hash_delete): Update.
|
|
|
|
|
|
|
Add AVR architectures avr25, avr31, avr35, and avr51 to match GCC.
bfd/
* archures.c (bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35,
bfd_mach_avr51): New.
* bfd-in2.h: Regenerate.
* cpu-avr.c (arch_info_struct): Add avr25, avr31, avr35, and avr51
architectures. Change comments to match architecture comments in GCC.
(compatible): Add test for new AVR architectures.
* elf32-avr.c (bfd_elf_avr_final_write_processing): Recognize
bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35 and bfd_mach_avr51.
(elf32_avr_object_p): Recognize E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
E_AVR_MACH_AVR35 and E_AVR_MACH_AVR51.
gas/
* config/tc-avr.c (mcu_types): Add avr25, avr31, avr35, and avr51
architectures. Reorganize list to put mcu types in correct architectures
and to order list same as in GCC. Use new ISA definitions in
include/opcode/avr.h.
* doc/c-avr.texi: Add avr25, avr31, avr35, and avr51 architecture
descriptions. Reorganize descriptions to put mcu types in correct
architectures and to order lists same as in GCC.
include/
* elf/avr.h (E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
E_AVR_MACH_AVR35, E_AVR_MACH_AVR51): Define.
(EF_AVR_MACH): Redefine to 0x7F.
* opcode/avr.h (AVR_ISA_TINY3, AVR_ISA_ALL, AVR_ISA_USB162): Remove.
(AVR_ISA_AVR3): Redefine.
(AVR_ISA_AVR1, AVR_ISA_AVR2, AVR_ISA_AVR31, AVR_ISA_AVR35,
AVR_ISA_AVR3_ALL, AVR_ISA_AVR4, AVR_ISA_AVR5, AVR_ISA_AVR51,
AVR_ISA_AVR6): Define.
ld/
* Makefile.am (ALL_EMULATIONS): Add eavr25.o, eavr31.o, eavr35.o,
and eavr51.o.
Add rules for eavr25.c, eavr31.c, eavr35.c, eavr51.c.
* Makefile.in: Regenerate.
* configure.tgt (avr-*-*, targ_extra_emuls): Add avr25, avr31, avr35
and avr51.
* emulparams/avr25.sh: New file.
* emulparams/avr31.sh: New file.
* emulparams/avr35.sh: New file.
* emulparams/avr51.sh: New file.
2008-08-09 07:35:13 +02:00
|
|
|
|
2008-08-08 Anatoly Sokolov <aesok@post.ru>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-avr.c (mcu_types): Add avr25, avr31, avr35, and avr51
|
2008-08-11 09:40:22 +02:00
|
|
|
|
architectures. Reorganize list to put mcu types in correct
|
|
|
|
|
|
architectures and to order list same as in GCC. Use new ISA
|
|
|
|
|
|
definitions in include/opcode/avr.h.
|
Add AVR architectures avr25, avr31, avr35, and avr51 to match GCC.
bfd/
* archures.c (bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35,
bfd_mach_avr51): New.
* bfd-in2.h: Regenerate.
* cpu-avr.c (arch_info_struct): Add avr25, avr31, avr35, and avr51
architectures. Change comments to match architecture comments in GCC.
(compatible): Add test for new AVR architectures.
* elf32-avr.c (bfd_elf_avr_final_write_processing): Recognize
bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35 and bfd_mach_avr51.
(elf32_avr_object_p): Recognize E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
E_AVR_MACH_AVR35 and E_AVR_MACH_AVR51.
gas/
* config/tc-avr.c (mcu_types): Add avr25, avr31, avr35, and avr51
architectures. Reorganize list to put mcu types in correct architectures
and to order list same as in GCC. Use new ISA definitions in
include/opcode/avr.h.
* doc/c-avr.texi: Add avr25, avr31, avr35, and avr51 architecture
descriptions. Reorganize descriptions to put mcu types in correct
architectures and to order lists same as in GCC.
include/
* elf/avr.h (E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
E_AVR_MACH_AVR35, E_AVR_MACH_AVR51): Define.
(EF_AVR_MACH): Redefine to 0x7F.
* opcode/avr.h (AVR_ISA_TINY3, AVR_ISA_ALL, AVR_ISA_USB162): Remove.
(AVR_ISA_AVR3): Redefine.
(AVR_ISA_AVR1, AVR_ISA_AVR2, AVR_ISA_AVR31, AVR_ISA_AVR35,
AVR_ISA_AVR3_ALL, AVR_ISA_AVR4, AVR_ISA_AVR5, AVR_ISA_AVR51,
AVR_ISA_AVR6): Define.
ld/
* Makefile.am (ALL_EMULATIONS): Add eavr25.o, eavr31.o, eavr35.o,
and eavr51.o.
Add rules for eavr25.c, eavr31.c, eavr35.c, eavr51.c.
* Makefile.in: Regenerate.
* configure.tgt (avr-*-*, targ_extra_emuls): Add avr25, avr31, avr35
and avr51.
* emulparams/avr25.sh: New file.
* emulparams/avr31.sh: New file.
* emulparams/avr35.sh: New file.
* emulparams/avr51.sh: New file.
2008-08-09 07:35:13 +02:00
|
|
|
|
* doc/c-avr.texi: Add avr25, avr31, avr35, and avr51 architecture
|
|
|
|
|
|
descriptions. Reorganize descriptions to put mcu types in correct
|
|
|
|
|
|
architectures and to order lists same as in GCC.
|
|
|
|
|
|
|
2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
Daniel Jacobowitz <dan@codesourcery.com>
Catherine Moore <clm@codesourcery.com>
Mark Shinwell <shinwell@codesourcery.com>
Maxim Kuvyrkov <maxim@codesourcery.com>
* elf32-mips.c (mips_vxworks_copy_howto_rela): Replace with...
(elf_mips_copy_howto): ...this howto. Clear the size fields.
(mips_vxworks_jump_slot_howto_rela): Replace with...
(elf_mips_jump_slot_howto): ...this howto.
(bfd_elf32_bfd_reloc_type_lookup): Handle BFD_RELOC_MIPS_COPY
and BFD_RELOC_MIPS_JUMP_SLOT.
(bfd_elf32_bfd_reloc_name_lookup): Handle "R_MIPS_COPY" and
"R_MIPS_JUMP_SLOT".
(mips_elf32_rtype_to_howto): Handle R_MIPS_COPY and R_MIPS_JUMP_SLOT.
(elf_backend_plt_readonly): Define.
(elf_backend_plt_sym_val): Define for non-VxWorks targets.
(mips_vxworks_bfd_reloc_type_lookup): Delete.
(mips_vxworks_bfd_reloc_name_lookup): Likewise.
(mips_vxworks_rtype_to_howto): Likewise.
(elf_backend_want_dynbss): Don't define for VxWorks.
(elf_backend_plt_readonly): Likewise.
(bfd_elf32_bfd_reloc_type_lookup): Likewise.
(bfd_elf32_bfd_reloc_name_lookup): Likewise.
(elf_backend_mips_rtype_to_howto): Likewise.
(elf_backend_adjust_dynamic_symbol): Likewise.
(elf_backend_got_symbol_offset): Don't define.
* elfn32-mips.c (elf_mips_copy_howto, elf_mips_jump_slot_howto): New.
(bfd_elf32_bfd_reloc_type_lookup): Handle BFD_RELOC_MIPS_COPY
and BFD_RELOC_MIPS_JUMP_SLOT.
(bfd_elf32_bfd_reloc_name_lookup): Handle "R_MIPS_COPY" and
"R_MIPS_JUMP_SLOT".
(mips_elf32_n32_rtype_to_howto): Handle R_MIPS_COPY and
R_MIPS_JUMP_SLOT.
(elf_backend_rela_plts_and_copies_p, elf_backend_plt_readonly)
(elf_backend_plt_sym_val): Define.
* elf64-mips.c (elf_mips_copy_howto, elf_mips_jump_slot_howto): New.
(bfd_elf64_bfd_reloc_type_lookup): Handle BFD_RELOC_MIPS_COPY
and BFD_RELOC_MIPS_JUMP_SLOT.
(bfd_elf64_bfd_reloc_name_lookup): Handle "R_MIPS_COPY" and
"R_MIPS_JUMP_SLOT".
(mips_elf64_rtype_to_howto): Handle R_MIPS_COPY and R_MIPS_JUMP_SLOT.
(elf_backend_rela_plts_and_copies_p, elf_backend_plt_readonly)
(elf_backend_plt_sym_val): Define.
* elfxx-mips.h (_bfd_mips_vxworks_adjust_dynamic_symbol): Delete.
(_bfd_mips_elf_use_plts_and_copy_relocs, _bfd_mips_elf_init_stubs)
(_bfd_mips_elf_plt_sym_val, _bfd_mips_post_process_headers): Declare.
* elfxx-mips.c (mips_elf_la25_stub): New structure.
(LA25_LUI, LA25_J, LA25_ADDIU): New macros.
(mips_elf_link_hash_entry): Add "la25_stubs", "has_static_relocs"
and "has_nonpic_branches" fields. Remove "is_relocation_target" and
"is_branch_target".
(mips_elf_link_hash_table): Add blank lines. Add
"use_plts_and_copy_relocs", "reserved_gotno", "strampoline",
"la25_stubs" and "add_stub_section" fields.
(mips_htab_traverse_info): New structure.
(PIC_OBJECT_P, MIPS_ELF_LOAD_WORD): New macros.
(MIPS_RESERVED_GOTNO): Delete.
(mips_o32_exec_plt0_entry, mips_n32_exec_plt0_entry)
(mips_n64_exec_plt0_entry, mips_exec_plt_entry): New tables.
(mips_elf_link_hash_newfunc): Update after the changes to
mips_elf_link_hash_entry.
(mips_elf_check_mips16_stubs): Replace the DATA parameter with
an INFO parameter. Don't look through warnings symbols here;
do it in mips_elf_check_symbols instead.
(mips_elf_create_stub_symbol): New function.
(mips_elf_la25_stub_hash, mips_elf_la25_stub_eq): New functions.
(_bfd_mips_elf_init_stubs, mips_elf_local_pic_function_p): Likewise.
(mips_elf_add_la25_intro, mips_elf_add_la25_trampoline): Likewise.
(mips_elf_add_la25_stub, mips_elf_check_symbols): New functions.
(mips_elf_gotplt_index): Check for VxWorks.
(mips_elf_output_dynamic_relocation): Take the relocation index
as an extra parameter. Do not increment reloc_count here.
(mips_elf_initialize_tls_slots): Update the calls to
mips_elf_output_dynamic_relocation accordingly.
(mips_elf_multi_got): Use htab->reserved_gotno instead of
MIPS_RESERVED_GOTNO.
(mips_elf_create_got_section): Don't allocate reserved GOT
entries here. Unconditionally create .got.plt, but don't
set its alignment here.
(mips_elf_relocation_needs_la25_stub): New function.
(mips_elf_calculate_relocation): Redirect branches and jumps to
a non-PIC stub if one exists. Check !h->has_static_relocs instead
of !htab->is_vxworks when deciding whether to create dynamic
relocations for R_MIPS_32, R_MIPS_REL32 and R_MIPS_64.
(_bfd_mips_elf_create_dynamic_sections): Unconditionally call
_bfd_elf_create_dynamic_sections. Unconditionally set up
htab->splt and htab->sdynbss. Set htab->srelplt to ".rel.plt"
if !htab->is_vxworks. Add non-VxWorks values of
htab->plt_header_size and htab->plt_entry_size.
(_bfd_mips_elf_check_relocs): Set pointer_equality_needed for
non-branch static relocations. Set has_nonpic_branches when an la25
stub might be required. Set can_make_dynamic_p to TRUE if R_MIPS_32,
R_MIPS_REL32 and R_MIPS_64 relocations can be made dynamic,
rather than duplicating the condition. Do not make them dynamic
for read-only sections in non-PIC executable objects.
Do not protect this code with dynobj == NULL || htab->sgot == NULL;
handle each group of cases separately. Add a default case that
sets has_static_relocs for non-GOT relocations that cannot be
made dynamic. Don't set is_relocation_target and is_branch_target.
Reject non-PIC static relocations in shared objects.
(_bfd_mips_vxworks_adjust_dynamic_symbol): Fold into...
(_bfd_mips_elf_adjust_dynamic_symbol): ...here, using
htab->use_plts_and_copy_relocs instead of htab->is_vxworks
to select PLT and copy-reloc handling. Set the alignment of
.plt and .got.plt when allocating the first entry. Generalize
code to handle REL as well as RELA sections and 64-bit as well as
32-bit GOT entries. Complain if we find a static-only reloc
against an externally-defined symbol and if we cannot create
dynamic relocations for it. Allocate copy relocs using
mips_elf_allocate_dynamic_relocations on non-VxWorks targets.
Set possibly_dynamic_relocs to 0 when using PLTs or copy relocs.
Skip reserved .got.plt entries.
(_bfd_mips_elf_always_size_sections): Use mips_elf_check_symbols
instead of mips_elf_check_mips16_stubs to process each symbol.
Do the traversal for relocatable objects too.
(mips_elf_lay_out_got): Use htab->reserved_gotno instead of
MIPS_RESERVED_GOTNO.
(_bfd_mips_elf_size_dynamic_sections): Exclude sdynbss if it
is empty. Extend the DT_PLTREL, DT_JMPREL and DT_PLTRELSZ handling
to non-VxWorks targets. Only add DT_REL{,A}, DT_REL{,A}SZ and
DT_REL{,A}ENT if .rel.dyn is nonempty. Create a symbol for the
PLT. Allocate a nop at the end of the PLT. Allocate DT_MIPS_PLTGOT.
(mips_elf_create_la25_stub_info): New function.
(_bfd_mips_elf_finish_dynamic_symbol): Write out PLT entries
and copy relocs where necessary. Check pointer_equality_needed.
(mips_finish_exec_plt): New function.
(_bfd_mips_elf_finish_dynamic_sections): Always set DT_PLTGOT
to the beginning of htab->sgot. Use htab->reserved_gotno instead
of MIPS_RESERVED_GOTNO. Assert htab->use_plts_and_copy_relocs
instead of htab->is_vxworks for DT_PLTREL, DT_PLTRELSZ and DT_JMPREL.
Set DT_PLTREL to DT_REL instead of DT_RELA on non-VxWorks targets.
Use mips_finish_exec_plt to create non-VxWorks PLT headers. Set
DT_MIPS_PLTGOT.
(_bfd_mips_elf_copy_indirect_symbol): Copy has_static_relocs
from the indirect symbol to the direct symbol. Also copy
has_nonpic_branches for indirect symbols.
(_bfd_mips_elf_get_target_dtag): Handle DT_MIPS_PLTGOT and
DT_MIPS_RWPLT.
(_bfd_mips_elf_link_hash_table_create): Initialize the new
mips_elf_link_hash_table fields.
(_bfd_mips_vxworks_link_hash_table_create): Set
use_plts_and_copy_relocs to TRUE. Use TRUE rather than 1
when setting is_vxworks.
(_bfd_mips_elf_use_plts_and_copy_relocs): New function.
(_bfd_mips_elf_final_link): Call mips_elf_create_la25_stub for
each la25_stub.
(_bfd_mips_elf_merge_private_bfd_data): Treat dynamic objects
as PIC. Generalize message about linking PIC and non-PIC.
(_bfd_mips_elf_plt_sym_val, _bfd_mips_post_process_headers): New
functions.
* reloc.c: Update comment near BFD_RELOC_MIPS_JUMP_SLOT.
* bfd-in2.h: Regenerated.
2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
Daniel Jacobowitz <dan@codesourcery.com>
Catherine Moore <clm@codesourcery.com>
Mark Shinwell <shinwell@codesourcery.com>
* readelf.c (get_mips_symbol_other): Handle STO_MIPS_PLT and
STO_MIPS_PIC.
(slurp_rela_relocs, slurp_rel_relocs): Handle MIPS ELF64 here.
(dump_relocations, debug_apply_relocations): Don't handle it here.
(get_mips_dynamic_type): Handle DT_MIPS_PLTGOT and DT_MIPS_RWPLT.
(print_mips_pltgot_entry): New function.
(process_mips_specific): Dump the PLT GOT.
2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
Daniel Jacobowitz <dan@codesourcery.com>
* config/tc-mips.c (OPTION_CALL_NONPIC): New macro.
(OPTION_NON_SHARED, OPTION_XGOT, OPTION_MABI, OPTION_32)
(OPTION_N32, OPTION_64, OPTION_MDEBUG, OPTION_NO_MDEBUG)
(OPTION_PDR, OPTION_NO_PDR, OPTION_MVXWORKS_PIC): Bump by 1.
(md_longopts): Add -call_nonpic.
(md_parse_option): Handle OPTION_CALL_NONPIC.
(md_show_usage): Add -call_nonpic.
2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
* gas/mips/call-nonpic-1.s, gas/mips/call-nonpic-1.d: New test.
* gas/mips/mips.exp: Run it.
2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
Daniel Jacobowitz <dan@codesourcery.com>
Catherine Moore <clm@codesourcery.com>
Mark Shinwell <shinwell@codesourcery.com>
* mips.h (STO_MIPS_PLT, ELF_ST_IS_MIPS_PLT, ELF_ST_SET_MIPS_PLT)
(STO_MIPS_PIC, DT_MIPS_PLTGOT, DT_MIPS_RWPLT): New macros.
2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
Daniel Jacobowitz <dan@codesourcery.com>
* emulparams/elf32bmip.sh (GOT): Define, moving .got.plt to...
(OTHER_RELRO_SECTIONS, OTHER_READWRITE_SECTIONS): ...one of these
two variables.
* emulparams/elf32bmipn32-defs.sh: Likewise.
* emultempl/mipself.em: Include ldctor.h, elf/mips.h and elfxx-mips.h.
(is_mips_elf): New macro.
(stub_file, stub_bfd): New variables.
(hook_stub_info): New structure.
(hook_in_stub): New function.
(mips_add_stub_section): Likewise.
(mips_create_output_section_statements): Likewise.
(mips_before_allocation): Likewise.
(real_func): New variable.
(mips_for_each_input_file_wrapper): New function.
(mips_lang_for_each_input_file): Likewise.
(lang_for_each_input_file): Define.
(LDEMUL_BEFORE_ALLOCATION): Likewise.
(LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS): Likewise.
2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
Daniel Jacobowitz <dan@codesourcery.com>
* ld-mips-elf/mips16-pic-3a.s,
ld-mips-elf/mips16-pic-3b.s,
ld-mips-elf/mips16-pic-3.dd,
ld-mips-elf/mips16-pic-3.gd,
ld-mips-elf/mips16-pic-3.rd,
ld-mips-elf/mips16-pic-3.inc,
ld-mips-elf/pic-and-nonpic-1a.s,
ld-mips-elf/pic-and-nonpic-1b.s,
ld-mips-elf/pic-and-nonpic-1.ld,
ld-mips-elf/pic-and-nonpic-1.dd,
ld-mips-elf/pic-and-nonpic-1.nd,
ld-mips-elf/pic-and-nonpic-1-rel.dd,
ld-mips-elf/pic-and-nonpic-1-rel.nd,
ld-mips-elf/pic-and-nonpic-2a.s,
ld-mips-elf/pic-and-nonpic-2b.s,
ld-mips-elf/pic-and-nonpic-2.d,
ld-mips-elf/pic-and-nonpic-3a.s,
ld-mips-elf/pic-and-nonpic-3a.ld,
ld-mips-elf/pic-and-nonpic-3a.dd,
ld-mips-elf/pic-and-nonpic-3a.gd,
ld-mips-elf/pic-and-nonpic-3a.sd,
ld-mips-elf/pic-and-nonpic-3b.s,
ld-mips-elf/pic-and-nonpic-3b.ld,
ld-mips-elf/pic-and-nonpic-3b.ad,
ld-mips-elf/pic-and-nonpic-3b.dd,
ld-mips-elf/pic-and-nonpic-3b.gd,
ld-mips-elf/pic-and-nonpic-3b.nd,
ld-mips-elf/pic-and-nonpic-3b.pd,
ld-mips-elf/pic-and-nonpic-3b.rd,
ld-mips-elf/pic-and-nonpic-3b.sd,
ld-mips-elf/pic-and-nonpic-3-error.d,
ld-mips-elf/pic-and-nonpic-4a.s,
ld-mips-elf/pic-and-nonpic-4b.s,
ld-mips-elf/pic-and-nonpic-4b.ld,
ld-mips-elf/pic-and-nonpic-4b.ad,
ld-mips-elf/pic-and-nonpic-4b.dd,
ld-mips-elf/pic-and-nonpic-4b.gd,
ld-mips-elf/pic-and-nonpic-4b.nd,
ld-mips-elf/pic-and-nonpic-4b.rd,
ld-mips-elf/pic-and-nonpic-4b.sd,
ld-mips-elf/pic-and-nonpic-4-error.d,
ld-mips-elf/pic-and-nonpic-5a.s,
ld-mips-elf/pic-and-nonpic-5b.s,
ld-mips-elf/pic-and-nonpic-5b.ld,
ld-mips-elf/pic-and-nonpic-5b.ad,
ld-mips-elf/pic-and-nonpic-5b.dd,
ld-mips-elf/pic-and-nonpic-5b.gd,
ld-mips-elf/pic-and-nonpic-5b.nd,
ld-mips-elf/pic-and-nonpic-5b.rd,
ld-mips-elf/pic-and-nonpic-5b.sd,
ld-mips-elf/pic-and-nonpic-5b.pd,
ld-mips-elf/pic-and-nonpic-6.ld,
ld-mips-elf/pic-and-nonpic-6-o32a.s,
ld-mips-elf/pic-and-nonpic-6-o32b.s,
ld-mips-elf/pic-and-nonpic-6-o32c.s,
ld-mips-elf/pic-and-nonpic-6-o32.ad,
ld-mips-elf/pic-and-nonpic-6-o32.dd,
ld-mips-elf/pic-and-nonpic-6-o32.gd,
ld-mips-elf/pic-and-nonpic-6-o32.nd,
ld-mips-elf/pic-and-nonpic-6-o32.pd,
ld-mips-elf/pic-and-nonpic-6-o32.rd,
ld-mips-elf/pic-and-nonpic-6-o32.sd,
ld-mips-elf/pic-and-nonpic-6-n32a.s,
ld-mips-elf/pic-and-nonpic-6-n32b.s,
ld-mips-elf/pic-and-nonpic-6-n32c.s,
ld-mips-elf/pic-and-nonpic-6-n32.ad,
ld-mips-elf/pic-and-nonpic-6-n32.dd,
ld-mips-elf/pic-and-nonpic-6-n32.gd,
ld-mips-elf/pic-and-nonpic-6-n32.nd,
ld-mips-elf/pic-and-nonpic-6-n32.pd,
ld-mips-elf/pic-and-nonpic-6-n32.rd,
ld-mips-elf/pic-and-nonpic-6-n32.sd,
ld-mips-elf/pic-and-nonpic-6-n64a.s,
ld-mips-elf/pic-and-nonpic-6-n64b.s,
ld-mips-elf/pic-and-nonpic-6-n64c.s,
ld-mips-elf/pic-and-nonpic-6-n64.ad,
ld-mips-elf/pic-and-nonpic-6-n64.dd,
ld-mips-elf/pic-and-nonpic-6-n64.gd,
ld-mips-elf/pic-and-nonpic-6-n64.nd,
ld-mips-elf/pic-and-nonpic-6-n64.pd,
ld-mips-elf/pic-and-nonpic-6-n64.rd,
ld-mips-elf/pic-and-nonpic-6-n64.sd: New tests.
* ld-mips-elf/mips-elf.exp: Run them.
2008-08-08 21:24:49 +02:00
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2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
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Daniel Jacobowitz <dan@codesourcery.com>
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* config/tc-mips.c (OPTION_CALL_NONPIC): New macro.
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(OPTION_NON_SHARED, OPTION_XGOT, OPTION_MABI, OPTION_32)
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(OPTION_N32, OPTION_64, OPTION_MDEBUG, OPTION_NO_MDEBUG)
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(OPTION_PDR, OPTION_NO_PDR, OPTION_MVXWORKS_PIC): Bump by 1.
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(md_longopts): Add -call_nonpic.
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(md_parse_option): Handle OPTION_CALL_NONPIC.
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(md_show_usage): Add -call_nonpic.
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2008-08-08 20:21:26 +02:00
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2008-08-08 Sterling Augustine <sterling@tensilica.com>
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2008-08-11 09:40:22 +02:00
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2008-08-08 20:21:26 +02:00
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* config/tc-xtensa.c (exclude_section_from_property_tables): New.
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(xtensa_create_property_segments): Use it.
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(xtensa_create_xproperty_segments): Likewise.
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2008-08-11 09:40:22 +02:00
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2008-08-08 09:38:49 +02:00
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2008-08-08 Alan Modra <amodra@bigpond.net.au>
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* doc/internals.texi (DWARF2_FORMAT): Update for 2008-08-04 change.
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bfd/
* reloc.c (BFD_RELOC_MIPS16_GOT16, BFD_RELOC_MIPS16_CALL16): Declare.
* libbfd.h, bfd-in2.h: Regenerate.
* elf32-mips.c (elf_mips16_howto_table_rel): Fill in reserved
R_MIPS16_GOT16 and R_MIPS16_CALL16 entries.
(mips16_reloc_map): Add mappings.
* elf64-mips.c (mips16_elf64_howto_table_rel): Fill in reserved
R_MIPS16_GOT16 and R_MIPS16_CALL16 entries.
(mips16_elf64_howto_table_rela): Likewise.
(mips16_reloc_map): Add mappings.
* elfn32-mips.c (elf_mips16_howto_table_rel): Fill in reserved
R_MIPS16_GOT16 and R_MIPS16_CALL16 entries.
(elf_mips16_howto_table_rela): Likewise.
(mips16_reloc_map): Add mappings.
* elfxx-mips.c (mips_elf_create_shadow_symbol): New function.
(section_allows_mips16_refs_p): Likewise.
(mips16_stub_symndx): Likewise.
(mips_elf_check_mips16_stubs): Treat the data argument as a
bfd_link_info. Mark every dynamic symbol as needing MIPS16 stubs
and create a "shadow" symbol for the original MIPS16 definition.
(mips16_reloc_p, got16_reloc_p, call16_reloc_p, hi16_reloc_p)
(lo16_reloc_p, mips16_call_reloc_p): New functions.
(_bfd_mips16_elf_reloc_unshuffle): Use mips16_reloc_p to generalize
relocation checks.
(_bfd_mips16_elf_reloc_shuffle): Likewise.
(_bfd_mips_elf_lo16_reloc): Handle R_MIPS16_GOT16.
(mips_elf_got16_entry): Add comment.
(mips_elf_calculate_relocation): Use hi16_reloc_p,
lo16_reloc_p, mips16_call_reloc_p, call16_reloc_p and got16_reloc_p
to generalize relocation checks. Use section_allows_mips16_refs_p
instead of mips16_stub_section_p. Handle R_MIPS16_CALL16 and
R_MIPS16_GOT16, allowing the former to refer directly to a
MIPS16 function if its stub is not needed.
(mips16_stub_section_p): Delete.
(_bfd_mips_elf_symbol_processing): Convert odd-valued function
symbols into even MIPS16 symbols.
(mips_elf_add_lo16_rel_addend): Use mips16_reloc_p to generalize
a relocation check.
(_bfd_mips_elf_check_relocs): Calculate "bed" and "rel_end"
earlier in the function. Use mips16_stub_symndx to identify
the target function. Avoid out-of-bounds accesses when the
stub has no relocations; report an error instead. Use
section_allows_mips16_refs_p instead of mips16_stub_section_p.
Use mips16_call_reloc_p and got16_reloc_p to generalize relocation
checks. Handle R_MIPS16_CALL16 and R_MIPS16_GOT16. Don't create
dynamic relocations for absolute references to __gnu_local_gp.
(_bfd_mips_elf_always_size_sections): Pass a bfd_link_info as
the argument to mips_elf_check_mips16_stubs. Generalize comment.
(_bfd_mips_elf_relocate_section): Use hi16_reloc_p and got16_reloc_p
to generalize relocation checks.
(_bfd_mips_elf_finish_dynamic_symbol): If a dynamic MIPS16 function
symbol has a non-MIPS16 stub, redirect the symbol to the stub.
Fix an overly long line. Don't give dynamic symbols type STO_MIPS16.
(_bfd_mips_elf_gc_sweep_hook): Handle R_MIPS16_CALL16 and
R_MIPS16_GOT16.
gas/
* config/tc-mips.c (mips16_reloc_p, got16_reloc_p, hi16_reloc_p)
(lo16_reloc_p): New functions.
(reloc_needs_lo_p): Use hi16_reloc_p and got16_reloc_p to
generalize relocation checks.
(matching_lo_reloc): New function.
(fixup_has_matching_lo_p): Use it.
(mips16_mark_labels): Don't clobber a symbol's visibility.
(append_insn): Use hi16_reloc_p and lo16_reloc_p.
(mips16_ip): Handle BFD_RELOC_MIPS16_GOT16 and BFD_RELOC_MIPS16_CALL16.
(md_apply_fix): Likewise.
(mips16_percent_op): Add %got and %call16.
(mips_frob_file): Use got16_reloc_p to generalize relocation checks.
Use matching_lo_reloc.
(mips_force_relocation): Use hi16_reloc_p and lo16_reloc_p to
generalize relocation checks.
(mips_fix_adjustable): Use lo16_reloc_p to generalize relocation
checks.
gas/testsuite/
* gas/mips/elf-rel8-mips16.d, gas/mips/elf-rel8-mips16.s,
* gas/mips/elf-rel9-mips16.d, gas/mips/elf-rel9-mips16.s,
* gas/mips/elf-rel13-mips16.d, gas/mips/elf-rel13-mips16.s: New tests.
* gas/mips/mips.exp: Run them.
ld/testsuite/
* ld-mips-elf/mips16-local-stubs-1.d: Remove stub_for_h3,
which was only referenced by the .pdr section, and was not
actually needed by code.
* ld-mips-elf/mips16-intermix.d: Remove unused static function stubs.
* ld-mips-elf/mips16-pic-1a.s,
ld-mips-elf/mips16-pic-1b.s,
ld-mips-elf/mips16-pic-1-dummy.s,
ld-mips-elf/mips16-pic-1.dd,
ld-mips-elf/mips16-pic-1.gd,
ld-mips-elf/mips16-pic-1.inc,
ld-mips-elf/mips16-pic-1.ld,
ld-mips-elf/mips16-pic-2a.s,
ld-mips-elf/mips16-pic-2b.s,
ld-mips-elf/mips16-pic-2.ad,
ld-mips-elf/mips16-pic-2.dd,
ld-mips-elf/mips16-pic-2.gd,
ld-mips-elf/mips16-pic-2.nd,
ld-mips-elf/mips16-pic-2.rd: New tests.
* ld-mips-elf/mips-elf.exp: Run them.
2008-08-06 21:44:47 +02:00
|
|
|
|
2008-08-06 Richard Sandiford <rdsandiford@googlemail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (mips16_reloc_p, got16_reloc_p, hi16_reloc_p)
|
|
|
|
|
|
(lo16_reloc_p): New functions.
|
|
|
|
|
|
(reloc_needs_lo_p): Use hi16_reloc_p and got16_reloc_p to
|
|
|
|
|
|
generalize relocation checks.
|
|
|
|
|
|
(matching_lo_reloc): New function.
|
|
|
|
|
|
(fixup_has_matching_lo_p): Use it.
|
|
|
|
|
|
(mips16_mark_labels): Don't clobber a symbol's visibility.
|
|
|
|
|
|
(append_insn): Use hi16_reloc_p and lo16_reloc_p.
|
|
|
|
|
|
(mips16_ip): Handle BFD_RELOC_MIPS16_GOT16 and BFD_RELOC_MIPS16_CALL16.
|
|
|
|
|
|
(md_apply_fix): Likewise.
|
|
|
|
|
|
(mips16_percent_op): Add %got and %call16.
|
|
|
|
|
|
(mips_frob_file): Use got16_reloc_p to generalize relocation checks.
|
|
|
|
|
|
Use matching_lo_reloc.
|
|
|
|
|
|
(mips_force_relocation): Use hi16_reloc_p and lo16_reloc_p to
|
|
|
|
|
|
generalize relocation checks.
|
|
|
|
|
|
(mips_fix_adjustable): Use lo16_reloc_p to generalize relocation
|
|
|
|
|
|
checks.
|
|
|
|
|
|
|
2008-08-06 17:42:15 +02:00
|
|
|
|
2008-08-06 DJ Delorie <dj@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* NEWS: Mention these changes.
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-h8300.h (H_TICK_HEX): Define.
|
|
|
|
|
|
* config/tc-h8300.c (OPTION_H_TICK_HEX): New.
|
|
|
|
|
|
(md_longopts): Add "-h-tick-hex".
|
|
|
|
|
|
(md_parse_option): Support it.
|
|
|
|
|
|
* doc/c-h8300.texi (H8/300 Options): Document it.
|
|
|
|
|
|
* doc/as.texinfo (Overview): Likewise.
|
2008-08-11 09:40:22 +02:00
|
|
|
|
|
2008-08-06 17:42:15 +02:00
|
|
|
|
* config/tc-sh.h (H_TICK_HEX): Define.
|
|
|
|
|
|
* config/tc-sh.c (OPTION_H_TICK_HEX): New.
|
|
|
|
|
|
(md_longopts): Add "-h-tick-hex".
|
|
|
|
|
|
(md_parse_option): Support it.
|
|
|
|
|
|
* doc/c-sh.texi (SH Options): Document it.
|
|
|
|
|
|
* doc/c-sh64.texi (SH64 Options): Document it.
|
|
|
|
|
|
* doc/as.texinfo (Overview): Likewise.
|
|
|
|
|
|
|
2008-08-05 10:13:48 +02:00
|
|
|
|
2008-08-05 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/6656
|
|
|
|
|
|
* dwarf2dbg.c (dwarf2_directive_file): Disable gas generated
|
|
|
|
|
|
debug info if we see compiler generated debug info.
|
|
|
|
|
|
(dwarf2_directive_loc): Likewise. Remove redundant debug_type test.
|
|
|
|
|
|
|
2008-08-04 12:55:48 +02:00
|
|
|
|
2008-08-04 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
|
|
|
|
|
* dwarf2dbg.c: Remove superfluous forward function declarations.
|
|
|
|
|
|
(DWARF2_FORMAT): Add section arg.
|
|
|
|
|
|
(out_header): New function, split out from..
|
|
|
|
|
|
(out_debug_line): ..here.
|
|
|
|
|
|
(out_debug_aranges): Use out_header.
|
|
|
|
|
|
(out_debug_abbrev): Add info_seg and line_seg args. Use
|
|
|
|
|
|
DW_FORM_data8 (for DW_AT_stmt_list) if line_seg is 64-bit.
|
|
|
|
|
|
(out_debug_info): Use out_header. Output 8 byte DW_AT_stmt_list
|
|
|
|
|
|
if line_seg is 64-bit.
|
|
|
|
|
|
(dwarf2_finish): Adjust out_debug_abbrev call.
|
|
|
|
|
|
* config/tc-mips.h (DWARF2_FORMAT, mips_dwarf2_format): Add sec arg.
|
|
|
|
|
|
* config/tc-mips.c (mips_dwarf2_format): Likewise.
|
|
|
|
|
|
|
2008-08-04 08:55:33 +02:00
|
|
|
|
2008-08-04 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
|
|
|
|
|
* Makefile.am (POTFILES.in): Set LC_ALL=C.
|
|
|
|
|
|
* Makefile.in: Regenerate.
|
|
|
|
|
|
* po/POTFILES.in: Regenerate.
|
|
|
|
|
|
|
gas/
* config/tc-ppc.c (parse_cpu): Rename altivec_or_spe to retain_flags.
Handle -mvsx and -mpower7.
(md_show_usage): Document -mpower7 and -mvsx.
* doc/as.texinfo (Target PowerPC): Document -mvsx.
* doc/c-ppc.texi (PowerPC-Opts): Document -mvsx and -mpower7.
gas/testsuite/
* gas/ppc/power7.d: New.
* gas/ppc/power7.s: Likewise.
* gas/ppc/ppc.exp: Run power7 test.
include/opcode/
* ppc.h (PPC_OPCODE_VSX, PPC_OPERAND_VSR): New.
opcodes/
* ppc-dis.c (powerpc_init_dialect): Handle power7 and vsx options.
(print_insn_powerpc): Prepend 'vs' when printing VSX registers.
(print_ppc_disassembler_options): Document -Mpower7 and -Mvsx.
* ppc-opc.c (insert_xt6): New static function.
(extract_xt6): Likewise.
(insert_xa6): Likewise.
(extract_xa6: Likewise.
(insert_xb6): Likewise.
(extract_xb6): Likewise.
(insert_xb6s): Likewise.
(extract_xb6s): Likewise.
(XS6, XT6, XA6, XB6, XB6S, DM, XX3, XX3DM, XX1_MASK, XX3_MASK,
XX3DM_MASK, PPCVSX): New.
(powerpc_opcodes): Add opcodes "lxvd2x", "lxvd2ux", "stxvd2x",
"stxvd2ux", "xxmrghd", "xxmrgld", "xxpermdi", "xvmovdp", "xvcpsgndp".
2008-08-02 06:38:51 +02:00
|
|
|
|
2008-08-01 Peter Bergner <bergner@vnet.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-ppc.c (parse_cpu): Rename altivec_or_spe to retain_flags.
|
|
|
|
|
|
Handle -mvsx and -mpower7.
|
|
|
|
|
|
(md_show_usage): Document -mpower7 and -mvsx.
|
|
|
|
|
|
* doc/as.texinfo (Target PowerPC): Document -mvsx.
|
|
|
|
|
|
* doc/c-ppc.texi (PowerPC-Opts): Document -mvsx and -mpower7.
|
|
|
|
|
|
|
2008-08-01 04:44:12 +02:00
|
|
|
|
2008-07-31 Peter Bergner <bergner@vnet.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-ppc.c (parse_cpu) <power6>: Accept Altivec instructions.
|
|
|
|
|
|
<cell>: Likewise.
|
|
|
|
|
|
|
2008-07-30 08:29:22 +02:00
|
|
|
|
2008-07-30 Michael J. Eager <eager@eagercon.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-ppc.c (parse_cpu): Separate handling of -m403/405.
|
|
|
|
|
|
(md_show_usage): Likewise.
|
|
|
|
|
|
|
2008-07-30 06:34:58 +02:00
|
|
|
|
2008-07-30 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
|
|
|
|
|
* messages.c, symbols.c, write.c: Silence gcc warnings.
|
|
|
|
|
|
|
2008-07-28 08:48:00 +02:00
|
|
|
|
2008-07-28 Ineiev <ineiev@yahoo.co.uk>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (operand_type_check): Warning fix.
|
|
|
|
|
|
|
2008-07-26 15:10:48 +02:00
|
|
|
|
2008-07-26 Michael Eager <eager@eagercon.com>
|
|
|
|
|
|
|
|
|
|
|
|
* doc/as.texinfo: Add description of single-precision attribute.
|
|
|
|
|
|
|
2008-07-24 09:25:13 +02:00
|
|
|
|
2008-07-24 Jie Zhang <jie.zhang@analog.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/bfin-parse.y (asm_1): Error if plain symbol is used
|
|
|
|
|
|
as load/store offset.
|
|
|
|
|
|
|
2008-07-22 12:44:51 +02:00
|
|
|
|
2008-07-22 Chao-ying Fu <fu@mips.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (mips_ip): Reset s to argsStart.
|
|
|
|
|
|
|
2008-07-22 10:34:16 +02:00
|
|
|
|
2008-07-22 Jie Zhang <jie.zhang@analog.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-bfin.c (bfin_gen_loop): Remove loop symbol.
|
|
|
|
|
|
|
2008-07-21 19:50:54 +02:00
|
|
|
|
2008-07-21 DJ Delorie <dj@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-h8300.c (fix_operand_size): Use the default size
|
|
|
|
|
|
specified by the .lbranch/.sbranch pseudos.
|
|
|
|
|
|
|
2008-07-19 00:25:07 +02:00
|
|
|
|
2008-07-18 DJ Delorie <dj@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-m32c.h (H_TICK_HEX): Define.
|
|
|
|
|
|
* config/tc-m32c.c (OPTION_H_TICK_HEX): Define.
|
|
|
|
|
|
(md_longopts): Add support for it.
|
|
|
|
|
|
(md_parse_option): Likewise.
|
|
|
|
|
|
* doc/as.texinfo (Overview): Add new m32c options.
|
|
|
|
|
|
* doc/c-m32c.texi (M32C-Modifiers): Likewise
|
|
|
|
|
|
|
|
|
|
|
|
* as.h: (enable_h_tick_hex): New.
|
|
|
|
|
|
* app.c (enable_h_tick_hex): New.
|
|
|
|
|
|
(LEX_IS_H): New.
|
|
|
|
|
|
(do_scrub_begin): Mark 'H' and 'h' as special if enable_h_tick_hex.
|
|
|
|
|
|
(do_scrub_chars): If enable_h_tick_hex and 'h', check for H'00
|
|
|
|
|
|
style hex constants and convert the input stream to 0x00 style.
|
|
|
|
|
|
(do_scrub_chars): If a 'X style character constant is found after
|
|
|
|
|
|
a symbol character (like you're or X'00), warn the user.
|
|
|
|
|
|
|
2008-07-10 21:05:29 +02:00
|
|
|
|
2008-07-10 Richard Sandiford <rdsandiford@googlemail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (mips16_mark_labels): Use ELF_ST_SET_MIPS16.
|
|
|
|
|
|
(mips_fix_adjustable): Likewise.
|
|
|
|
|
|
(mips_frob_file_after_relocs): Likewise.
|
|
|
|
|
|
|
2008-07-08 08:33:41 +02:00
|
|
|
|
2008-07-08 Nathan Sidwell <nathan@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-m68k.c (m68k_set_cpu, m68k_set_arch): Don't complain
|
|
|
|
|
|
about overriding an earlier setting.
|
|
|
|
|
|
|
2008-07-07 21:16:23 +02:00
|
|
|
|
2008-07-07 Adam Nemet <anemet@caviumnetworks.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (NO_ISA_COP): New macro.
|
|
|
|
|
|
(COP_INSN): New macro.
|
|
|
|
|
|
(is_opcode_valid): Use them.
|
|
|
|
|
|
(macro) <ld_st>: Use them. Don't accept coprocessor load store
|
|
|
|
|
|
insns based on the ISA if CPU is NO_ISA_COP.
|
|
|
|
|
|
<copz>: Likewise for coprocessor operations.
|
|
|
|
|
|
|
2008-07-07 21:12:58 +02:00
|
|
|
|
2008-07-07 Paul Brook <paul@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (arm_fix_adjustable): Don't adjust MOVW/MOVT
|
2008-07-28 08:48:00 +02:00
|
|
|
|
relocations.
|
2008-07-07 21:12:58 +02:00
|
|
|
|
|
2008-07-07 18:43:06 +02:00
|
|
|
|
2008-07-07 Ralf Corsépius <ralf.corsepius@rtems.org>
|
|
|
|
|
|
|
|
|
|
|
|
* configure.tgt: Add bfin-*-rtems*.
|
|
|
|
|
|
|
2008-07-04 15:04:04 +02:00
|
|
|
|
2008-07-04 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-spu.c (md_apply_fix): Handle fully resolved
|
|
|
|
|
|
BFD_RELOC_32_PCREL, BFD_RELOC_SPU_HI16 and BFD_RELOC_SPU_LO16.
|
|
|
|
|
|
|
2008-06-25 18:49:03 +02:00
|
|
|
|
2008-06-25 Peter Bergner <bergner@vnet.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-ppc.c (parse_cpu): Handle -m464.
|
|
|
|
|
|
(md_show_usage): Likewise.
|
|
|
|
|
|
|
2008-06-25 18:19:11 +02:00
|
|
|
|
2008-06-24 Eric B. Weddington <eric.weddington@atmel.com>
|
|
|
|
|
|
|
|
|
|
|
|
Add support for ATtiny13A.
|
|
|
|
|
|
* config/tc-avr.c (mcu_types): Add attiny13a.
|
|
|
|
|
|
* doc/c-avr.texi: Likewise.
|
|
|
|
|
|
|
2008-06-24 03:49:36 +02:00
|
|
|
|
2008-06-24 Bob Wilson <bob.wilson@acm.org>
|
|
|
|
|
|
Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
|
|
|
|
|
* write.c (relax_segment <rs_org>): Include current stretch
|
|
|
|
|
|
value when calculating whether .org is backwards.
|
|
|
|
|
|
|
2008-06-18 01:14:44 +02:00
|
|
|
|
2008-06-17 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
|
|
|
|
|
|
|
|
|
|
|
|
* configure: Regenerate.
|
|
|
|
|
|
|
2008-06-17 18:01:28 +02:00
|
|
|
|
2008-06-17 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* app.c (do_scrub_chars): Do not UNGET an EOF value.
|
|
|
|
|
|
|
2008-06-16 17:04:41 +02:00
|
|
|
|
2008-06-16 Hans-Peter Nilsson <hp@bitrange.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/6607
|
|
|
|
|
|
* config/tc-mmix.c (s_loc): Assume "negative" addresses belong to
|
|
|
|
|
|
text_section. Do the "stepping backwards" test for text_section
|
|
|
|
|
|
using unsigned operands.
|
|
|
|
|
|
|
include/opcode/
* ppc.h (ppc_cpu_t): New typedef.
(struct powerpc_opcode <flags>): Use it.
(struct powerpc_operand <insert, extract>): Likewise.
(struct powerpc_macro <flags>): Likewise.
gas/
* config/tc-ppc.c (ppc_cpu): Use ppc_cpu_t typedef.
(ppc_insert_operand): Likewise.
(ppc_machine): Likewise.
* config/tc-ppc.h: #include "opcode/ppc.h"
(struct _ppc_fix_extra <ppc_cpu>): Use ppc_cpu_t typedef.
(ppc_cpu): Update extern decl.
opcodes/
* ppc-dis.c (print_insn_powerpc): Update prototye to use new
ppc_cpu_t typedef.
(struct dis_private): New.
(POWERPC_DIALECT): New define.
(powerpc_dialect): Renamed to...
(powerpc_init_dialect): This. Update to use ppc_cpu_t and
struct dis_private.
(print_insn_big_powerpc): Update for using structure in
info->private_data.
(print_insn_little_powerpc): Likewise.
(operand_value_powerpc): Change type of dialect param to ppc_cpu_t.
(skip_optional_operands): Likewise.
(print_insn_powerpc): Likewise. Remove initialization of dialect.
* ppc-opc.c (extract_bat, extract_bba, extract_bdm, extract_bdp,
extract_bo, extract_boe, extract_fxm, extract_mb6, extract_mbe,
extract_nb, extract_nsi, extract_rbs, extract_sh6, extract_spr,
extract_sprg, extract_tbr insert_bat, insert_bba, insert_bdm,
insert_bdp, insert_bo, insert_boe, insert_fxm, insert_mb6, insert_mbe,
insert_nsi, insert_ral, insert_ram, insert_raq, insert_ras, insert_rbs,
insert_sh6, insert_spr, insert_sprg, insert_tbr): Change the dialect
param to be of type ppc_cpu_t. Update prototype.
2008-06-13 22:16:00 +02:00
|
|
|
|
2008-06-13 Peter Bergner <bergner@vnet.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-ppc.c (ppc_cpu): Use ppc_cpu_t typedef.
|
|
|
|
|
|
(ppc_insert_operand): Likewise.
|
|
|
|
|
|
(ppc_machine): Likewise.
|
|
|
|
|
|
* config/tc-ppc.h: #include "opcode/ppc.h"
|
|
|
|
|
|
(struct _ppc_fix_extra <ppc_cpu>): Use ppc_cpu_t typedef.
|
|
|
|
|
|
(ppc_cpu): Update extern decl.
|
|
|
|
|
|
|
include/opcode/
* mips.h: Document new field descriptors +x, +X, +p, +P, +s, +S.
Update comment before MIPS16 field descriptors to mention MIPS16.
(OP_SH_BBITIND, OP_MASK_BBITIND): New bit mask and shift count for
BBIT.
(OP_SH_CINSPOS, OP_MASK_CINSPOS, OP_SH_CINSLM1, OP_MASK_CINSLM1):
New bit masks and shift counts for cins and exts.
gas/
* config/tc-mips.c (validate_mips_insn): Handle field descriptors
+x, +X, +p, +P, +s, +S.
(mips_ip): Likewise.
opcodes/
* mips-dis.c (print_insn_args): Handle field descriptors +x, +p,
+s, +S.
* mips-opc.c (mips_builtin_opcodes): Add Octeon instructions
baddu, bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs,
syncw, syncws, vm3mulu, vm0 and vmulu.
gas/testsuite/
* gas/mips/octeon.s, gas/mips/octeon.d: Add tests for baddu,
bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs, syncw,
syncws, vm3mulu, vm0 and vmulu.
* gas/mips/octeon-ill.s, gas/mips/octeon-ill.s: New test.
* gas/mips/mips.exp: Run it. Run octeon test with
run_dump_test_arches.
2008-06-12 18:14:52 +02:00
|
|
|
|
2008-06-12 Adam Nemet <anemet@caviumnetworks.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (validate_mips_insn): Handle field descriptors
|
|
|
|
|
|
+x, +X, +p, +P, +s, +S.
|
|
|
|
|
|
(mips_ip): Likewise.
|
|
|
|
|
|
|
2008-06-12 23:44:54 +02:00
|
|
|
|
* config/tc-mips.c (validate_mips_insn): Handle field descriptor +Q.
|
|
|
|
|
|
(mips_ip): Likewise.
|
|
|
|
|
|
(macro_build): Likewise.
|
|
|
|
|
|
(CPU_HAS_SEQ): New macro.
|
|
|
|
|
|
(macro2) <M_SEQ_I, M_SNE_I>: Use it. Emit seq/sne and seqi/snei.
|
|
|
|
|
|
|
2008-06-09 18:07:02 +02:00
|
|
|
|
2008-06-09 Eric B. Weddington <eric.weddington@atmel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-avr.c (mcu_types): Remove support for ATmega32HVB device.
|
|
|
|
|
|
* doc/c-avr.texi: Likewise.
|
|
|
|
|
|
|
2008-06-04 18:10:21 +02:00
|
|
|
|
2008-06-04 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* app.c (do_scrub_chars): Do not UNGET an EOF value.
|
|
|
|
|
|
|
2008-06-03 19:31:52 +02:00
|
|
|
|
2008-06-03 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (set_sse_check): New.
|
|
|
|
|
|
(md_pseudo_table): Add "sse_check".
|
|
|
|
|
|
|
2008-06-03 16:29:07 +02:00
|
|
|
|
2008-06-03 Paul Brook <paul@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (do_t_rbit): Populate both rm fields.
|
|
|
|
|
|
|
2008-05-30 16:20:27 +02:00
|
|
|
|
2008-05-30 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 5523
|
|
|
|
|
|
* config/tc-avr.c (avr_ldi_expression): Do not warn about unknown
|
|
|
|
|
|
relocs here.
|
|
|
|
|
|
|
2008-05-29 18:03:41 +02:00
|
|
|
|
2008-05-29 Maxim Kuvyrkov <maxim@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (mips_cpu_info_table): Move records for
|
|
|
|
|
|
ST Loongson-2E/2F processors to a better place.
|
|
|
|
|
|
|
2008-05-23 15:55:36 +02:00
|
|
|
|
2008-05-23 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/6518
|
|
|
|
|
|
* config/tc-i386.c (match_template): Report ambiguous operand
|
|
|
|
|
|
size, not invalid suffix when there is no match in Intel
|
|
|
|
|
|
syntax.
|
|
|
|
|
|
|
2008-05-22 19:03:55 +02:00
|
|
|
|
2008-05-22 Paul Brook <paul@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (parse_cond): Covert to lowercase before matching.
|
|
|
|
|
|
|
2008-05-21 10:20:17 +02:00
|
|
|
|
2008-05-21 I-Jui Sung <ijsung@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (arm_cpus): Add Faraday ARMv4 and ARMv5TE
|
|
|
|
|
|
compatible cores: fa526, fa626, fa626te, fa726te.
|
|
|
|
|
|
* doc/c-arm.texi (ARM Opts): Add -mcpu={fa526, fa626, fa626te,
|
|
|
|
|
|
fa726te} options.
|
|
|
|
|
|
|
2008-05-14 08:45:42 +02:00
|
|
|
|
2008-05-14 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
|
|
|
|
|
* Makefile.am: Run "make dep-am".
|
|
|
|
|
|
* Makefile.in: Regenerate.
|
|
|
|
|
|
* doc/Makefile.in: Regenerate.
|
|
|
|
|
|
* po/POTFILES.in: Regenerate.
|
|
|
|
|
|
|
2008-05-09 21:28:47 +02:00
|
|
|
|
2008-05-09 Catherine Moore <clm@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (mips_frob_file): Don't match MIPS16 relocs
|
|
|
|
|
|
with non-MIPS16 relocs.
|
|
|
|
|
|
|
2008-05-09 20:18:22 +02:00
|
|
|
|
2008-05-09 Chao-ying Fu <fu@mips.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (md_begin): Use strncmp to compare TARGET_OS, in
|
|
|
|
|
|
case that some characters append at the end of the name.
|
|
|
|
|
|
(mips_ip): Likewise.
|
|
|
|
|
|
(s_change_sec): Likewise.
|
|
|
|
|
|
(md_section_align): Likewise.
|
|
|
|
|
|
|
2008-05-08 01:13:09 +02:00
|
|
|
|
2008-05-07 Bob Wilson <bob.wilson@acm.org>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-xtensa.c (xtensa_create_property_segments): Use
|
|
|
|
|
|
xtensa_make_property_section instead of xtensa_get_property_section.
|
|
|
|
|
|
(xtensa_create_xproperty_segments): Likewise.
|
|
|
|
|
|
|
gas/
2008-05-02 H.J. Lu <hongjiu.lu@intel.com>
* NEWS: Mention XSAVE, EPT and MOVBE.
* config/tc-i386.c (cpu_arch): Add .movbe and .ept.
(md_show_usage): Add .movbe and .ept.
* doc/c-i386.texi: Add movbe and ept to -march=. Document
.movbe and .ept.
gas/testsuite/
2008-05-02 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run movbe, movbe-intel, inval-movbe, ept,
ept-intel, inval-ept, x86-64-movbe, x86-64-movbe-intel,
x86-64-inval-movbe. x86-64-ept, x86-64-ept-intel and
x86-64-inval-ept.
* gas/i386/arch-10.s: Add movbe and invept.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/ept.d: New file
* gas/i386/ept-intel.d: Likewise.
* gas/i386/ept.s: Likewise.
* gas/i386/inval-ept.l: Likewise.
* gas/i386/inval-ept.s: Likewise.
* gas/i386/inval-movbe.l: Likewise.
* gas/i386/inval-movbe.s: Likewise.
* gas/i386/movbe.d: Likewise.
* gas/i386/movbe-intel.d: Likewise.
* gas/i386/movbe.s: Likewise.
* gas/i386/x86-64-inval-ept.l: Likewise.
* gas/i386/x86-64-inval-ept.s: Likewise.
* gas/i386/x86-64-inval-movbe.l: Likewise.
* gas/i386/x86-64-inval-movbe.s: Likewise.
* gas/i386/x86-64-ept.d: Likewise.
* gas/i386/x86-64-ept-intel.d: Likewise.
* gas/i386/x86-64-ept.s: Likewise.
* gas/i386/x86-64-movbe.d: Likewise.
* gas/i386/x86-64-movbe-intel.d: Likewise.
* gas/i386/x86-64-movbe.s: Likewise.
* gas/i386/arch-10.d: Updated.
* gas/i386/arch-10-1.l: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
opcodes/
2008-05-02 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (MOVBE_Fixup): New.
(Mo): Likewise.
(PREFIX_0F3880): Likewise.
(PREFIX_0F3881): Likewise.
(PREFIX_0F38F0): Updated.
(prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881. Update
PREFIX_0F38F0 and PREFIX_0F38F1 for movbe.
(three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881.
* i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and
CPU_EPT_FLAGS.
(cpu_flags): Add CpuMovbe and CpuEPT.
* i386-opc.h (CpuMovbe): New.
(CpuEPT): Likewise.
(CpuLM): Updated.
(i386_cpu_flags): Add cpumovbe and cpuept.
* i386-opc.tbl: Add entries for movbe and EPT instructions.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-05-02 18:53:40 +02:00
|
|
|
|
2008-05-02 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* NEWS: Mention XSAVE, EPT and MOVBE.
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (cpu_arch): Add .movbe and .ept.
|
|
|
|
|
|
(md_show_usage): Add .movbe and .ept.
|
|
|
|
|
|
|
|
|
|
|
|
* doc/c-i386.texi: Add movbe and ept to -march=. Document
|
|
|
|
|
|
.movbe and .ept.
|
|
|
|
|
|
|
2008-04-30 05:50:39 +02:00
|
|
|
|
2008-04-29 David S. Miller <davem@davemloft.net>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-sparc.c (v9a_asr_table): Fix order of softint entries.
|
|
|
|
|
|
|
* config/tc-mips.c (file_mips_soft_float, file_mips_single_float):
New statics.
(OPTION_ELF_BASE): Make room for new option macros.
(OPTION_SOFT_FLOAT, OPTION_HARD_FLOAT, OPTION_SINGLE_FLOAT,
OPTION_DOUBLE_FLOAT): New option macros.
(md_longopts): Add msoft-float, mhard-float, msingle-float and
mdouble-float.
(md_parse_option): Handle OPTION_SINGLE_FLOAT,
OPTION_DOUBLE_FLOAT, OPTION_SOFT_FLOAT and OPTION_HARD_FLOAT.
(md_show_usage): Add -msoft-float, -mhard-float, -msingle-float
and -mdouble-float.
(struct mips_set_options): New fields soft_float and single_float.
(mips_opts): Initialized them. Add comment for each field
initializer.
(mips_after_parse_args): Set them based on file_mips_soft_float
and file_mips_single_float.
(s_mipsset): Add support for `.set softfloat', `.set hardfloat',
`.set singlefloat' and `.set doublefloat'.
(is_opcode_valid): New function to invoke OPCODE_IS_MEMBER.
Handle single-float and soft-float instructions here.
(macro_build, mips_ip): Use it instead of OPCODE_IS_MEMBER.
(is_opcode_valid_16): New function.
(mips16_ip): Use it instead of OPCODE_IS_MEMBER.
(macro) <M_LDC1_AB, M_SDC1_AB, M_L_DOB, M_L_DAB, M_S_DAB,
M_S_DOB>: Remove special-casing of r4650.
* doc/c-mips.texi (-march=): Add Octeon.
(MIPS Opts): Document -msoft-float and -mhard-float. Document
-msingle-float and -mdouble-float.
(MIPS floating-point): New section. Document `.set softfloat' and
`.set hardfloat'. Document `.set singlefloat' and `.set
doublefloat'.
2008-04-28 19:06:28 +02:00
|
|
|
|
2008-04-28 Adam Nemet <anemet@caviumnetworks.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (file_mips_soft_float, file_mips_single_float):
|
|
|
|
|
|
New statics.
|
|
|
|
|
|
(OPTION_ELF_BASE): Make room for new option macros.
|
|
|
|
|
|
(OPTION_SOFT_FLOAT, OPTION_HARD_FLOAT, OPTION_SINGLE_FLOAT,
|
|
|
|
|
|
OPTION_DOUBLE_FLOAT): New option macros.
|
|
|
|
|
|
(md_longopts): Add msoft-float, mhard-float, msingle-float and
|
|
|
|
|
|
mdouble-float.
|
|
|
|
|
|
(md_parse_option): Handle OPTION_SINGLE_FLOAT,
|
|
|
|
|
|
OPTION_DOUBLE_FLOAT, OPTION_SOFT_FLOAT and OPTION_HARD_FLOAT.
|
|
|
|
|
|
(md_show_usage): Add -msoft-float, -mhard-float, -msingle-float
|
|
|
|
|
|
and -mdouble-float.
|
|
|
|
|
|
(struct mips_set_options): New fields soft_float and single_float.
|
|
|
|
|
|
(mips_opts): Initialized them. Add comment for each field
|
|
|
|
|
|
initializer.
|
|
|
|
|
|
(mips_after_parse_args): Set them based on file_mips_soft_float
|
|
|
|
|
|
and file_mips_single_float.
|
|
|
|
|
|
(s_mipsset): Add support for `.set softfloat', `.set hardfloat',
|
|
|
|
|
|
`.set singlefloat' and `.set doublefloat'.
|
|
|
|
|
|
(is_opcode_valid): New function to invoke OPCODE_IS_MEMBER.
|
|
|
|
|
|
Handle single-float and soft-float instructions here.
|
|
|
|
|
|
(macro_build, mips_ip): Use it instead of OPCODE_IS_MEMBER.
|
|
|
|
|
|
(is_opcode_valid_16): New function.
|
|
|
|
|
|
(mips16_ip): Use it instead of OPCODE_IS_MEMBER.
|
|
|
|
|
|
(macro) <M_LDC1_AB, M_SDC1_AB, M_L_DOB, M_L_DAB, M_S_DAB,
|
|
|
|
|
|
M_S_DOB>: Remove special-casing of r4650.
|
|
|
|
|
|
* doc/c-mips.texi (-march=): Add Octeon.
|
|
|
|
|
|
(MIPS Opts): Document -msoft-float and -mhard-float. Document
|
|
|
|
|
|
-msingle-float and -mdouble-float.
|
|
|
|
|
|
(MIPS floating-point): New section. Document `.set softfloat' and
|
|
|
|
|
|
`.set hardfloat'. Document `.set singlefloat' and `.set
|
|
|
|
|
|
doublefloat'.
|
|
|
|
|
|
|
2008-04-25 21:58:03 +02:00
|
|
|
|
2008-04-25 David S. Miller <davem@davemloft.net>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-sparc.c: Accept 'softint_clear' and 'softint_set'
|
|
|
|
|
|
%asr aliases.
|
|
|
|
|
|
|
|
|
|
|
|
* doc/c-sparc.texi: Consistently refer to architecture 'versions',
|
|
|
|
|
|
rather than occaisionally 'levels'. Consistently refer to Sun's
|
|
|
|
|
|
UNIX variant as SunOS, every version of Solaris is also SunOS.
|
|
|
|
|
|
Document new 'softint_clear' and 'softint_set' aliases. Clarify
|
|
|
|
|
|
which architecture versions support '%dcr', '%cq', and '%gl'. Add
|
|
|
|
|
|
section on 32-bit/64-bit opcode translations.
|
|
|
|
|
|
|
2008-04-23 20:40:34 +02:00
|
|
|
|
2008-04-23 Mike Frysinger <vapier@gentoo.org>
|
|
|
|
|
|
|
|
|
|
|
|
* Makefile.am (OBJ_FORMAT_CFILES): Add config/obj-fdpicelf.c.
|
|
|
|
|
|
(OBJ_FORMAT_HFILES): Add config/obj-fdpicelf.h.
|
|
|
|
|
|
(obj-fdpicelf.o): Define.
|
|
|
|
|
|
* Makefile.in: Regenerate.
|
|
|
|
|
|
* configure.tgt: Set bfd_gas to yes when fmt is fdpicelf.
|
|
|
|
|
|
(bfin-*-*): Delete.
|
|
|
|
|
|
(bfin-*-linux-uclibc): New; set fmt to fdpicelf and em to linux.
|
|
|
|
|
|
(bfin-*-uclinux*): New; set fmt to elf and em to linux.
|
|
|
|
|
|
* config/obj-fdpicelf.c: New.
|
|
|
|
|
|
* config/obj-fdpicelf.h: Likewise.
|
|
|
|
|
|
* config/tc-bfin.c (bfin_flags, bfin_pic_flag): Set default based on
|
|
|
|
|
|
the OBJ_FDPIC_ELF define.
|
|
|
|
|
|
(OPTION_NOPIC): Define.
|
|
|
|
|
|
(md_longopts): Add mnopic and mno-fdpic.
|
|
|
|
|
|
(md_parse_option): Handle OPTION_NOPIC.
|
|
|
|
|
|
|
2008-04-23 18:11:47 +02:00
|
|
|
|
2008-04-23 Paolo Bonzini <bonzini@gnu.org>
|
|
|
|
|
|
|
|
|
|
|
|
* aclocal.m4: Regenerate.
|
|
|
|
|
|
* configure: Regenerate.
|
|
|
|
|
|
|
2008-04-23 09:49:33 +02:00
|
|
|
|
2008-04-23 David S. Miller <davem@davemloft.net>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-sparc.c (v9a_asr_table): Add missing
|
|
|
|
|
|
'stick' and 'stick_cmpr', and document ordering rules
|
|
|
|
|
|
of table.
|
|
|
|
|
|
(tc_gen_reloc): Accept BFD_RELOC_SPARC_PC22 and
|
|
|
|
|
|
BFD_RELOC_SPARC_PC10.
|
|
|
|
|
|
* doc/c-sparc.texi: New section on Sparc constants.
|
|
|
|
|
|
Add documentation for %stick and %stick_cmpr.
|
|
|
|
|
|
|
2008-04-24 10:20:55 +02:00
|
|
|
|
2008-04-22 David S. Miller <davem@davemloft.net>
|
|
|
|
|
|
|
|
|
|
|
|
* config/obj-elf.c (obj_elf_section_type): Add prototype
|
|
|
|
|
|
before obj_elf_section_word and add 'warn' arg.
|
|
|
|
|
|
(obj_elf_section_word): Add type pointer arg, and if no #SECTION
|
|
|
|
|
|
is matched, try checking for #SECTION_TYPE.
|
|
|
|
|
|
(obj_elf_section): Adjust for new args.
|
|
|
|
|
|
(obj_elf_type_name): New function.
|
|
|
|
|
|
(obj_elf_type): Call it, and accept STT_foo number strings
|
|
|
|
|
|
in .type statements as output by SunPRO compiler.
|
|
|
|
|
|
|
2008-04-23 00:27:13 +02:00
|
|
|
|
2008-04-22 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (md_assemble): Don't check SSE instructions
|
|
|
|
|
|
if noavx is 0.
|
|
|
|
|
|
|
2008-04-18 23:19:48 +02:00
|
|
|
|
2008-04-18 David S. Miller <davem@davemloft.net>
|
|
|
|
|
|
|
|
|
|
|
|
* doc/c-sparc.texi: Add syntax section.
|
|
|
|
|
|
|
2008-04-18 20:22:37 +02:00
|
|
|
|
2008-04-18 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (build_modrm_byte): Don't check FMA to swap
|
|
|
|
|
|
REG and NDS for instructions with immediate operand.
|
|
|
|
|
|
|
2008-04-18 15:10:32 +02:00
|
|
|
|
2008-04-18 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (build_modrm_byte): Swap REG and NDS for
|
|
|
|
|
|
FMA.
|
|
|
|
|
|
|
2008-04-16 10:51:18 +02:00
|
|
|
|
2008-04-16 David S. Miller <davem@davemloft.net>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-sparc.c (sparc_ip): Add support for gotdata mnemonics
|
|
|
|
|
|
and relocation generation.
|
|
|
|
|
|
(tc_gen_reloc): Likewise.
|
|
|
|
|
|
|
2008-04-15 17:53:26 +02:00
|
|
|
|
2008-04-15 Andrew Stubbs <andrew.stubbs@st.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-sh.c (md_apply_fix): Make sure BFD_RELOC_SH_PCRELIMM8BY4
|
|
|
|
|
|
relocations are properly aligned, and not negative.
|
|
|
|
|
|
|
2008-04-15 16:25:30 +02:00
|
|
|
|
2008-04-15 Khem Raj <kraj@mvista.com>
|
|
|
|
|
|
|
|
|
|
|
|
* doc/tc-arm.texi: Fix fnstart and fnend directive names.
|
|
|
|
|
|
|
2008-04-14 13:01:38 +02:00
|
|
|
|
2008-04-14 Edmar Wienskoski <edmar@freescale.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-ppc.c (parse_cpu): Handle "e500mc". Extend "e500" to
|
|
|
|
|
|
accept e500mc instructions.
|
|
|
|
|
|
(md_show_usage): Document -me500mc.
|
|
|
|
|
|
|
2008-04-11 11:06:02 +02:00
|
|
|
|
2008-04-11 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* listing.c (print_timestamp): Use localtime rather than
|
|
|
|
|
|
localtime_r since not all build environments provide the latter.
|
|
|
|
|
|
|
2008-04-10 19:53:40 +02:00
|
|
|
|
2008-04-10 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* NEWS: Mention -msse-check=[none|error|warning].
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (sse_check): New.
|
|
|
|
|
|
(OPTION_MSSE_CHECK): Likewise.
|
|
|
|
|
|
(md_assemble): Check SSE instructions if needed.
|
|
|
|
|
|
(md_longopts): Add -msse-check.
|
|
|
|
|
|
(md_parse_option): Handle OPTION_MSSE_CHECK.
|
|
|
|
|
|
(md_show_usage): Show -msse-check=[none|error|warning].
|
|
|
|
|
|
|
|
|
|
|
|
* doc/c-i386.texi: Document -msse-check=[none|error|warning].
|
|
|
|
|
|
|
2008-04-10 14:45:18 +02:00
|
|
|
|
2008-04-10 Santiago Urue<75>a <suruena@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* listing.c: Add -ag listing flag to show general information in
|
|
|
|
|
|
listings such as gas version, passed options, and time stamp.
|
|
|
|
|
|
(listing_general_info): New function.
|
|
|
|
|
|
(print_options): New function.
|
|
|
|
|
|
(print_single_option): New function.
|
|
|
|
|
|
(print_timestamp): New function.
|
|
|
|
|
|
(MAX_DATELEN): Define.
|
|
|
|
|
|
(listing_print): Add call to listing_general_info.
|
|
|
|
|
|
* listing.h (LISTING_GENERAL): Define.
|
|
|
|
|
|
(listing_print): Add new parameter.
|
|
|
|
|
|
* as.c (show_usage): Print new switch.
|
|
|
|
|
|
(parse_args): Parse new switch.
|
|
|
|
|
|
(main): Pass command line on to listing_print.
|
|
|
|
|
|
* NEWS: Mention this new feature.
|
|
|
|
|
|
* doc/as.texinfo: Document the new sub-option.
|
|
|
|
|
|
|
2008-04-08 01:56:18 +02:00
|
|
|
|
2008-04-08 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
|
|
|
|
|
* dwarf2dbg.c (dwarf2_emit_insn): Simplify test before dwarf2_where
|
|
|
|
|
|
call. Delete out of date comment.
|
|
|
|
|
|
(dwarf2_consume_line_info): Always clear dwarf2_loc_directive_seen.
|
|
|
|
|
|
(dwarf2_emit_label): Don't emit unless there has been a previous
|
|
|
|
|
|
.file or we are outputting assembler generated debug.
|
|
|
|
|
|
dwarf2_consume_line_info after emitting line info, not before.
|
|
|
|
|
|
(out_debug_info): Simplify files_in_use test.
|
|
|
|
|
|
|
2008-04-07 15:07:16 +02:00
|
|
|
|
2008-04-07 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (parse_real_register): Return AVX register
|
|
|
|
|
|
only if AVX is enabled.
|
|
|
|
|
|
|
2008-04-07 04:55:08 +02:00
|
|
|
|
2008-04-07 Kaz Kojima <kkojima@rr.iij4u.or.jp>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/6043
|
|
|
|
|
|
* config/tc-sh64.c (shmedia_md_pcrel_from_section): Use
|
|
|
|
|
|
md_pcrel_from_section for BFD_RELOC_64 and BFD_RELOC_64_PCREL.
|
|
|
|
|
|
|
2008-04-05 01:25:49 +02:00
|
|
|
|
2008-04-04 Adrian Bunk <bunk@stusta.de>
|
|
|
|
|
|
Bob Wilson <bob.wilson@acm.org>
|
2008-05-14 08:45:42 +02:00
|
|
|
|
|
2008-04-05 01:25:49 +02:00
|
|
|
|
* config/tc-xtensa.c (xg_apply_fix_value): Check return code from
|
|
|
|
|
|
call to decode_reloc.
|
2008-05-14 08:45:42 +02:00
|
|
|
|
|
2008-04-04 18:34:23 +02:00
|
|
|
|
2008-04-04 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* NEWS: Mention XSAVE. Change CLMUL to PCLMUL.
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (cpu_arch): Add .pclmul.
|
|
|
|
|
|
(md_show_usage): Replace clmul with pclmul.
|
|
|
|
|
|
* doc/c-i386.texi: Likewise.
|
|
|
|
|
|
|
binutils/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* dwarf.c (dwarf_regnames_i386): Add AVX registers.
(dwarf_regnames_x86_64): Likewise.
gas/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* NEWS: Mention AES, CLMUL, AVX/FMA and -msse2avx.
* doc/c-i386.texi: Add avx, aes, clmul and fma to -march=.
Document -msse2avx, .avx, .aes, .clmul and .fma.
* config/tc-i386.c (YMMWORD_MNEM_SUFFIX): New.
(vex_prefix): Likewise.
(sse2avx): Likewise.
(CPU_FLAGS_ARCH_MATCH): Likewise.
(CPU_FLAGS_64BIT_MATCH): Likewise.
(CPU_FLAGS_32BIT_MATCH): Likewise.
(CPU_FLAGS_PERFECT_MATCH): Likewise.
(regymm): Likewise.
(vex_imm4): Likewise.
(fits_in_imm4): Likewise.
(build_vex_prefix): Likewise.
(VEX_check_operands): Likewise.
(bad_implicit_operand): Likewise.
(OPTION_MSSE2AVX): Likewise.
(T_YMMWORD): Likewise.
(_i386_insn): Add vex.
(cpu_arch): Add .avx, .aes, .clmul and .fma.
(cpu_flags_match): Changed to take a pointer to const template.
Enable encoding SSE instructions with VEX prefix for -msse2avx.
(match_mem_size): Also check ymmword.
(operand_type_match): Clear ymmword.
(md_begin): Allow '_' in mnemonic.
(type_names): Add OPERAND_TYPE_VEX_IMM4.
(process_immext): Update assert.
(md_assemble): Don't call process_immext if sse2avx and immext
are true. Call build_vex_prefix if vex is true.
(parse_insn): Updated for cpu_flags_match.
(swap_operands): Handle 5 operands.
(match_template): Handle 5 operands. Updated for cpu_flags_match.
Check regymm. Call VEX_check_operands. Handle YMMWORD_MNEM_SUFFIX.
(process_suffix): Handle YMMWORD_MNEM_SUFFIX.
(check_byte_reg): Check regymm.
(process_operands): Duplicate the destination register for
-msse2avx if needed.
(build_modrm_byte): Updated for instructions with VEX encoding.
(output_insn): Output VEX prefix if needed.
(md_longopts): Add msse2avx.
(md_parse_option): Handle OPTION_MSSE2AVX.
(md_show_usage): Add avx, aes, clmul, fma and -msse2avx.
(intel_e09): Support YMMWORD.
(intel_e11): Likewise.
(intel_get_token): Likewise.
gas/testsuite/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run aes, aes-intel, x86-64-aes,
x86-64-aes-intel, avx, avx-intel, inval-avx, x86-64-avx,
x86-64-avx-intel and x86-64-inval-avx.
* gas/cfi/cfi-i386.s: Add tests for AVX register maps.
* gas/cfi/cfi-x86_64.s: Likewise.
* gas/i386/aes.d: New.
* gas/i386/aes.s: Likewise.
* gas/i386/aes-intel.d: Likewise.
* gas/i386/avx.d: Likewise.
* gas/i386/avx.s: Likewise.
* gas/i386/avx-intel.d: Likewise.
* gas/i386/clmul.d: Likewise.
* gas/i386/clmul-intel.d: Likewise.
* gas/i386/clmul.s: Likewise.
* gas/i386/i386.exp: Likewise.
* gas/i386/inval-avx.l: Likewise.
* gas/i386/inval-avx.s: Likewise.
* gas/i386/sse2avx.d: Likewise.
* gas/i386/sse2avx.s: Likewise.
* gas/i386/x86-64-aes.d: Likewise.
* gas/i386/x86-64-aes.s: Likewise.
* gas/i386/x86-64-aes-intel.d: Likewise.
* gas/i386/x86-64-avx.d: Likewise.
* gas/i386/x86-64-avx.s: Likewise.
* gas/i386/x86-64-avx-intel.d: Likewise.
* gas/i386/x86-64-clmul.d: Likewise.
* gas/i386/x86-64-clmul-intel.d: Likewise.
* gas/i386/x86-64-clmul.s: Likewise.
* gas/i386/x86-64-inval-avx.l: Likewise.
* gas/i386/x86-64-inval-avx.s: Likewise.
* gas/i386/x86-64-sse2avx.d: Likewise.
* gas/i386/x86-64-sse2avx.s: Likewise.
* gas/i386/arch-10.s: Add tests for AVX, AES, CLMUL and FMA.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/rexw.s: Add AVX tests.
* gas/i386/x86-64-opcode-inval.s: Remove lds/les test.
* gas/cfi/cfi-i386.d: Updated.
* gas/cfi/cfi-x86_64.d: Likewise.
* gas/i386/arch-10.d: Likewise.
* gas/i386/arch-10-1.l: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/rexw.d: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
* gas/i386/x86-64-opcode-inval.d: Likewise.
* gas/i386/x86-64-opcode-inval-intel.d: Likewise.
include/opcode/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (MAX_OPERANDS): Set to 5.
(MAX_MNEM_SIZE): Changed to 20.
opcodes/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (OP_E_register): New.
(OP_E_memory): Likewise.
(OP_VEX): Likewise.
(OP_EX_Vex): Likewise.
(OP_EX_VexW): Likewise.
(OP_XMM_Vex): Likewise.
(OP_XMM_VexW): Likewise.
(OP_REG_VexI4): Likewise.
(PCLMUL_Fixup): Likewise.
(VEXI4_Fixup): Likewise.
(VZERO_Fixup): Likewise.
(VCMP_Fixup): Likewise.
(VPERMIL2_Fixup): Likewise.
(rex_original): Likewise.
(rex_ignored): Likewise.
(Mxmm): Likewise.
(XMM): Likewise.
(EXxmm): Likewise.
(EXxmmq): Likewise.
(EXymmq): Likewise.
(Vex): Likewise.
(Vex128): Likewise.
(Vex256): Likewise.
(VexI4): Likewise.
(EXdVex): Likewise.
(EXqVex): Likewise.
(EXVexW): Likewise.
(EXdVexW): Likewise.
(EXqVexW): Likewise.
(XMVex): Likewise.
(XMVexW): Likewise.
(XMVexI4): Likewise.
(PCLMUL): Likewise.
(VZERO): Likewise.
(VCMP): Likewise.
(VPERMIL2): Likewise.
(xmm_mode): Likewise.
(xmmq_mode): Likewise.
(ymmq_mode): Likewise.
(vex_mode): Likewise.
(vex128_mode): Likewise.
(vex256_mode): Likewise.
(USE_VEX_C4_TABLE): Likewise.
(USE_VEX_C5_TABLE): Likewise.
(USE_VEX_LEN_TABLE): Likewise.
(VEX_C4_TABLE): Likewise.
(VEX_C5_TABLE): Likewise.
(VEX_LEN_TABLE): Likewise.
(REG_VEX_XX): Likewise.
(MOD_VEX_XXX): Likewise.
(PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
(PREFIX_0F3A44): Likewise.
(PREFIX_0F3ADF): Likewise.
(PREFIX_VEX_XXX): Likewise.
(VEX_OF): Likewise.
(VEX_OF38): Likewise.
(VEX_OF3A): Likewise.
(VEX_LEN_XXX): Likewise.
(vex): Likewise.
(need_vex): Likewise.
(need_vex_reg): Likewise.
(vex_i4_done): Likewise.
(vex_table): Likewise.
(vex_len_table): Likewise.
(OP_REG_VexI4): Likewise.
(vex_cmp_op): Likewise.
(pclmul_op): Likewise.
(vpermil2_op): Likewise.
(m_mode): Updated.
(es_reg): Likewise.
(PREFIX_0F38F0): Likewise.
(PREFIX_0F3A60): Likewise.
(reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
(prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
and PREFIX_VEX_XXX entries.
(x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
(three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
PREFIX_0F3ADF.
(mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
Add MOD_VEX_XXX entries.
(ckprefix): Initialize rex_original and rex_ignored. Store the
REX byte in rex_original.
(get_valid_dis386): Handle the implicit prefix in VEX prefix
bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
(print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
calling get_valid_dis386. Use rex_original and rex_ignored when
printing out REX.
(putop): Handle "XY".
(intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
ymmq_mode.
(OP_E_extended): Updated to use OP_E_register and
OP_E_memory.
(OP_XMM): Handle VEX.
(OP_EX): Likewise.
(XMM_Fixup): Likewise.
(CMP_Fixup): Use ARRAY_SIZE.
* i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
CPU_FMA_FLAGS and CPU_AVX_FLAGS.
(operand_type_init): Add OPERAND_TYPE_REGYMM and
OPERAND_TYPE_VEX_IMM4.
(cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
(opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
VexImmExt and SSE2AVX.
(operand_types): Add RegYMM, Ymmword and Vex_Imm4.
* i386-opc.h (CpuAVX): New.
(CpuAES): Likewise.
(CpuCLMUL): Likewise.
(CpuFMA): Likewise.
(Vex): Likewise.
(Vex256): Likewise.
(VexNDS): Likewise.
(VexNDD): Likewise.
(VexW0): Likewise.
(VexW1): Likewise.
(Vex0F): Likewise.
(Vex0F38): Likewise.
(Vex0F3A): Likewise.
(Vex3Sources): Likewise.
(VexImmExt): Likewise.
(SSE2AVX): Likewise.
(RegYMM): Likewise.
(Ymmword): Likewise.
(Vex_Imm4): Likewise.
(Implicit1stXmm0): Likewise.
(CpuXsave): Updated.
(CpuLM): Likewise.
(ByteOkIntel): Likewise.
(OldGcc): Likewise.
(Control): Likewise.
(Unspecified): Likewise.
(OTMax): Likewise.
(i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
(i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
vex3sources, veximmext and sse2avx.
(i386_operand_type): Add regymm, ymmword and vex_imm4.
* i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
* i386-reg.tbl: Add AVX registers, ymm0..ymm15.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-04-03 16:03:21 +02:00
|
|
|
|
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* NEWS: Mention AES, CLMUL, AVX/FMA and -msse2avx.
|
|
|
|
|
|
|
|
|
|
|
|
* doc/c-i386.texi: Add avx, aes, clmul and fma to -march=.
|
|
|
|
|
|
Document -msse2avx, .avx, .aes, .clmul and .fma.
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (YMMWORD_MNEM_SUFFIX): New.
|
|
|
|
|
|
(vex_prefix): Likewise.
|
|
|
|
|
|
(sse2avx): Likewise.
|
|
|
|
|
|
(CPU_FLAGS_ARCH_MATCH): Likewise.
|
|
|
|
|
|
(CPU_FLAGS_64BIT_MATCH): Likewise.
|
|
|
|
|
|
(CPU_FLAGS_32BIT_MATCH): Likewise.
|
|
|
|
|
|
(CPU_FLAGS_PERFECT_MATCH): Likewise.
|
|
|
|
|
|
(regymm): Likewise.
|
|
|
|
|
|
(vex_imm4): Likewise.
|
|
|
|
|
|
(fits_in_imm4): Likewise.
|
|
|
|
|
|
(build_vex_prefix): Likewise.
|
|
|
|
|
|
(VEX_check_operands): Likewise.
|
|
|
|
|
|
(bad_implicit_operand): Likewise.
|
|
|
|
|
|
(OPTION_MSSE2AVX): Likewise.
|
|
|
|
|
|
(T_YMMWORD): Likewise.
|
|
|
|
|
|
(_i386_insn): Add vex.
|
|
|
|
|
|
(cpu_arch): Add .avx, .aes, .clmul and .fma.
|
|
|
|
|
|
(cpu_flags_match): Changed to take a pointer to const template.
|
|
|
|
|
|
Enable encoding SSE instructions with VEX prefix for -msse2avx.
|
|
|
|
|
|
(match_mem_size): Also check ymmword.
|
|
|
|
|
|
(operand_type_match): Clear ymmword.
|
|
|
|
|
|
(md_begin): Allow '_' in mnemonic.
|
|
|
|
|
|
(type_names): Add OPERAND_TYPE_VEX_IMM4.
|
|
|
|
|
|
(process_immext): Update assert.
|
|
|
|
|
|
(md_assemble): Don't call process_immext if sse2avx and immext
|
|
|
|
|
|
are true. Call build_vex_prefix if vex is true.
|
|
|
|
|
|
(parse_insn): Updated for cpu_flags_match.
|
|
|
|
|
|
(swap_operands): Handle 5 operands.
|
|
|
|
|
|
(match_template): Handle 5 operands. Updated for cpu_flags_match.
|
|
|
|
|
|
Check regymm. Call VEX_check_operands. Handle YMMWORD_MNEM_SUFFIX.
|
|
|
|
|
|
(process_suffix): Handle YMMWORD_MNEM_SUFFIX.
|
|
|
|
|
|
(check_byte_reg): Check regymm.
|
|
|
|
|
|
(process_operands): Duplicate the destination register for
|
|
|
|
|
|
-msse2avx if needed.
|
|
|
|
|
|
(build_modrm_byte): Updated for instructions with VEX encoding.
|
|
|
|
|
|
(output_insn): Output VEX prefix if needed.
|
|
|
|
|
|
(md_longopts): Add msse2avx.
|
|
|
|
|
|
(md_parse_option): Handle OPTION_MSSE2AVX.
|
|
|
|
|
|
(md_show_usage): Add avx, aes, clmul, fma and -msse2avx.
|
|
|
|
|
|
(intel_e09): Support YMMWORD.
|
|
|
|
|
|
(intel_e11): Likewise.
|
|
|
|
|
|
(intel_get_token): Likewise.
|
|
|
|
|
|
|
2008-03-28 22:51:38 +01:00
|
|
|
|
2008-03-28 Eric B. Weddington <eric.weddington@atmel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-avr.c (mcu_types): Add attiny167.
|
|
|
|
|
|
* doc/c-avr.texi: Likewise.
|
|
|
|
|
|
|
2008-03-28 22:04:22 +01:00
|
|
|
|
2008-03-28 Eric B. Weddington <eric.weddington@atmel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-avr.c (mcu_types): Add atmega32u4.
|
|
|
|
|
|
* doc/c-avr.texi: Likewise.
|
|
|
|
|
|
|
2008-03-28 20:24:52 +01:00
|
|
|
|
2008-03-28 Eric B. Weddington <eric.weddington@atmel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-avr.c (mcu_types): Add atmega32c1.
|
|
|
|
|
|
* doc/c-avr.texi: Likewise.
|
|
|
|
|
|
|
2008-03-28 19:13:52 +01:00
|
|
|
|
2008-03-28 Paul Brook <paul@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (parse_neon_mov): Parse register before immediate
|
|
|
|
|
|
to avoid spurious symbols.
|
|
|
|
|
|
|
2008-03-28 10:51:13 +01:00
|
|
|
|
2008-03-28 Nathan Sidwell <nathan@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-m68k.c (md_convert_frag_1): Replace as_fatal with
|
|
|
|
|
|
as_bad_where.
|
|
|
|
|
|
|
2008-03-27 15:52:35 +01:00
|
|
|
|
2008-03-27 Eric B. Weddington <eric.weddington@atmel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-avr.c (mcu_types): Add atmega32m1.
|
|
|
|
|
|
* doc/c-avr.texi: Likewise.
|
|
|
|
|
|
|
2008-03-27 15:12:15 +01:00
|
|
|
|
2008-03-27 Ineiev <ineiev@yahoo.co.uk>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (do_neon_cvt): Move variable declarations to
|
|
|
|
|
|
start of block.
|
|
|
|
|
|
(do_neon_ext): Fix sign of comparison.
|
|
|
|
|
|
|
2008-03-26 16:18:42 +01:00
|
|
|
|
2008-03-26 Bernd Schmidt <bernd.schmidt@analog.com>
|
|
|
|
|
|
|
|
|
|
|
|
From Jie Zhang <jie.zhang@analog.com>
|
|
|
|
|
|
* config/bfin-parse.y (asm_1): Check AREGS in comparison
|
2008-03-26 16:58:27 +01:00
|
|
|
|
instructions. And call yyerror when comparing PREG with
|
2008-03-26 16:18:42 +01:00
|
|
|
|
DREG.
|
2008-03-26 16:58:27 +01:00
|
|
|
|
(check_macfunc_option): New.
|
2008-03-28 19:13:52 +01:00
|
|
|
|
(check_macfuncs): Check option by calling check_macfunc_option.
|
2008-03-26 16:58:27 +01:00
|
|
|
|
Fix comparison always true warnings. Both scalar instructions
|
|
|
|
|
|
of vector instruction must share the same mode option. Only allow
|
|
|
|
|
|
option mode at the end of the second instruction of the vector.
|
2008-03-28 19:13:52 +01:00
|
|
|
|
(asm_1): Check option by calling check_macfunc_option.
|
2008-03-26 16:18:42 +01:00
|
|
|
|
|
2008-03-26 17:21:10 +01:00
|
|
|
|
* config/bfin-parse.y (check_macfunc_option): Allow (IU)
|
|
|
|
|
|
option for multiply and multiply-accumulate to data register
|
2008-03-28 19:13:52 +01:00
|
|
|
|
instruction.
|
2008-03-26 17:21:10 +01:00
|
|
|
|
(check_macfuncs): Don't check if accumulator matches the data register
|
|
|
|
|
|
here.
|
|
|
|
|
|
(assign_macfunc): Check if accumulator matches the
|
|
|
|
|
|
data register in each rule that moves to the data
|
|
|
|
|
|
register.
|
|
|
|
|
|
|
2008-03-26 17:33:33 +01:00
|
|
|
|
* config/tc-bfin.c (bfin_start_line_hook): Localize the labels
|
|
|
|
|
|
generated for LOOP_BEGIN and LOOP_END instructions.
|
2008-05-14 08:45:42 +02:00
|
|
|
|
(bfin_gen_loop): Likewise.
|
2008-03-26 17:33:33 +01:00
|
|
|
|
|
2008-03-19 Andreas Krebbel <krebbel1@de.ibm.com>
* opcodes/s390-mkopc.c (s390_opcode_cpu_val): S390_OPCODE_Z10 added.
(s390_cond_extensions): Reduced extensions to the compare related.
(main): z10 cpu type option added.
(expandConditionalJump): Renamed to ...
(insertExpandedMnemonic): ... this.
* opcodes/s390-opc.c: Re-group the operand format makros.
(INSTR_RIE_RRPU, INSTR_RIE_RRP0, INSTR_RIE_RUPI,
INSTR_RIE_R0PI, INSTR_RIE_RUPU, INSTR_RIE_R0PU, INSTR_RIE_R0IU,
INSTR_RIE_R0I0, INSTR_RIE_R0UU, INSTR_RIE_R0U0,
INSTR_RIE_RRUUU, INSTR_RIS_RURDI, INSTR_RIS_R0RDI, INSTR_RIS_RURDU,
INSTR_RIS_R0RDU, INSTR_RRF_U0RR, INSTR_RRF_00RR, INSTR_RRS_RRRDU,
INSTR_RRS_RRRD0, INSTR_RXY_URRD, INSTR_SIY_IRD, INSTR_SIL_RDI,
INSTR_SIL_RDU): New instruction formats added.
(MASK_RIE_RRPU, MASK_RIE_RRP0, MASK_RIE_RUPI, MASK_RIE_R0PI,
MASK_RIE_RUPU, MASK_RIE_R0PU, MASK_RIE_R0IU, MASK_RIE_R0I0,
MASK_RIE_R0UU, MASK_RIE_R0U0, MASK_RIE_RRUUU, MASK_RIS_RURDI,
MASK_RIS_R0RDI, MASK_RIS_RURDU, MASK_RIS_R0RDU, MASK_RRF_U0RR,
MASK_RRF_00RR, MASK_RRS_RRRDU, MASK_RRS_RRRD0, MASK_RXY_URRD,
MASK_SIY_IRD, MASK_SIL_RDI, MASK_SIL_RDU): New instruction format
masks added.
(s390_opformats): New formats added "ris", "rrs", "sil".
* opcodes/s390-opc.txt: Add the conditional jumps with the
extensions removed from automatic expansion in s390-mkopc.c manually.
(asi - trtre): Add new System z10 EC instructions.
* include/opcode/s390.h (s390_opcode_cpu_val): S390_OPCODE_Z10 added.
2008-03-19 Andreas Krebbel <krebbel1@de.ibm.com>
* config/tc-s390.c (md_parse_option): z10 option added.
2008-03-19 Andreas Krebbel <krebbel1@de.ibm.com>
* gas/s390/zarch-z10.d: New file.
* gas/s390/zarch-z10.s: New file.
* gas/s390/s390.exp: Run the z10 testcases.
2008-03-19 11:29:18 +01:00
|
|
|
|
2008-03-19 Andreas Krebbel <krebbel1@de.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-s390.c (md_parse_option): z10 option added.
|
|
|
|
|
|
|
2008-03-17 23:17:33 +01:00
|
|
|
|
2008-03-17 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
|
|
|
|
|
|
|
|
|
|
|
|
* aclocal.m4: Regenerate.
|
|
|
|
|
|
* configure: Likewise.
|
|
|
|
|
|
* Makefile.in: Likewise.
|
|
|
|
|
|
* doc/Makefile.in: Likewise.
|
|
|
|
|
|
|
2008-03-17 00:16:03 +01:00
|
|
|
|
2008-03-17 Adrian Bunk <bunk@stusta.de>
|
|
|
|
|
|
|
|
|
|
|
|
PR 5946
|
|
|
|
|
|
* config/tc-hppa.c (is_same_frag): Delete.
|
|
|
|
|
|
|
2008-03-14 21:17:39 +01:00
|
|
|
|
2008-03-14 Sterling Augustine <sterling@tensilica.com>
|
2008-05-14 08:45:42 +02:00
|
|
|
|
|
2008-03-14 21:17:39 +01:00
|
|
|
|
* config/tc-xtensa.h (xtensa_relax_statesE): Update comment for
|
|
|
|
|
|
RELAX_LOOP_END_ADD_NOP.
|
2008-05-14 08:45:42 +02:00
|
|
|
|
|
2008-03-13 11:51:33 +01:00
|
|
|
|
2008-03-13 Evandro Menezes <evandro@yahoo.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/5895
|
|
|
|
|
|
* read.c (s_mexit): Warn if attempting to exit a macro when not
|
|
|
|
|
|
inside a macro definition.
|
|
|
|
|
|
|
2008-03-13 03:05:23 +01:00
|
|
|
|
2008-03-13 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
|
|
|
|
|
* Makefile.am: Run "make dep-am".
|
|
|
|
|
|
* Makefile.in: Regenerate.
|
|
|
|
|
|
* configure: Regenerate.
|
|
|
|
|
|
|
2008-03-09 16:20:31 +01:00
|
|
|
|
2008-03-09 Paul Brook <paul@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (arm_cpu_option_table): Add cortex-a9.
|
|
|
|
|
|
* doc/c-arm.texi: Add cortex-a9.
|
|
|
|
|
|
|
2008-03-09 14:23:29 +01:00
|
|
|
|
2008-03-09 Paul Brook <paul@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (fpu_vfp_ext_d32): New vairable.
|
|
|
|
|
|
(parse_vfp_reg_list, encode_arm_vfp_reg): Use it.
|
|
|
|
|
|
(arm_option_cpu_value): Add vfpv3-d16, vfpv2 and vfpv3.
|
|
|
|
|
|
(aeabi_set_public_attributes): Handle Tag_VFP_arch=VFPV3-D16.
|
|
|
|
|
|
* doc/c-arm.texi: Document new ARM FPU variants.
|
|
|
|
|
|
|
2008-03-08 02:20:39 +01:00
|
|
|
|
2008-03-07 Paul Brook <paul@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (md_apply_fix): Use correct offset range.
|
|
|
|
|
|
|
2008-03-07 00:01:00 +01:00
|
|
|
|
2008-03-07 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-ppc.c (ppc_setup_opcodes): Tidy. Add code to test
|
|
|
|
|
|
for strict ordering of powerpc_opcodes, but disable for now.
|
|
|
|
|
|
|
2008-03-05 02:31:26 +01:00
|
|
|
|
2008-03-04 Paul Brook <paul@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (arm_ext_barrier, arm_ext_msr): New.
|
|
|
|
|
|
(arm_ext_v7m): Rename...
|
|
|
|
|
|
(arm_ext_m): ... to this. Include v6-M.
|
|
|
|
|
|
(do_t_add_sub): Allow narrow low-reg non flag setting adds.
|
|
|
|
|
|
(do_t_mrs, do_t_msr, aeabi_set_public_attributes): Use arm_ext_m.
|
|
|
|
|
|
(md_assemble): Allow wide msr instructions.
|
|
|
|
|
|
(insns): Add classifications for v6-m instructions.
|
|
|
|
|
|
(arm_cpu_option_table): Add cortex-m1.
|
|
|
|
|
|
(arm_arch_option_table): Add armv6-m.
|
|
|
|
|
|
(cpu_arch): Add ARM_ARCH_V6M. Fix numbering of other v6 variants.
|
|
|
|
|
|
|
2008-03-04 00:23:41 +01:00
|
|
|
|
2008-03-03 Sterling Augustine <sterling@tensilica.com>
|
|
|
|
|
|
Bob Wilson <bob.wilson@acm.org>
|
2008-05-14 08:45:42 +02:00
|
|
|
|
|
2008-03-04 00:23:41 +01:00
|
|
|
|
* config/tc-xtensa.c (xtensa_num_pipe_stages): New.
|
|
|
|
|
|
(md_begin): Initialize it.
|
|
|
|
|
|
(resources_conflict): Use it.
|
2008-05-14 08:45:42 +02:00
|
|
|
|
|
2008-03-03 23:14:45 +01:00
|
|
|
|
2008-03-03 Sterling Augustine <sterling@tensilica.com>
|
2008-05-14 08:45:42 +02:00
|
|
|
|
|
2008-03-03 23:14:45 +01:00
|
|
|
|
* config/tc-xtensa.h (RELAX_XTENSA_NONE): New.
|
2008-05-14 08:45:42 +02:00
|
|
|
|
|
2008-03-03 16:28:58 +01:00
|
|
|
|
2008-03-03 Denys Vlasenko <vda.linux@googlemail.com>
|
|
|
|
|
|
H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/5543
|
|
|
|
|
|
* read.c (pseudo_set): Don't allow global register symbol.
|
|
|
|
|
|
|
|
|
|
|
|
* symbols.c (S_SET_EXTERNAL): Don't allow register symbol
|
|
|
|
|
|
global.
|
|
|
|
|
|
|
|
|
|
|
|
2008-03-03 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/5543
|
|
|
|
|
|
* write.c (write_object_file): Don't allow symbols which were
|
|
|
|
|
|
equated to register. Stop if there is an error.
|
|
|
|
|
|
|
2008-03-01 08:24:47 +01:00
|
|
|
|
2008-03-01 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-ppc.h (struct _ppc_fix_extra): New.
|
|
|
|
|
|
(ppc_cpu): Declare.
|
|
|
|
|
|
(TC_FIX_TYPE, TC_INIT_FIX_DATA): Define.
|
|
|
|
|
|
* config/tc-ppc.c (ppu_cpu): Make global.
|
|
|
|
|
|
(ppc_insert_operand): Add ppu_cpu parameter.
|
|
|
|
|
|
(md_assemble): Adjust for above change.
|
|
|
|
|
|
(md_apply_fix): Pass tc_fix_data.ppc_cpu to ppc_insert_operand.
|
|
|
|
|
|
|
2008-02-22 16:14:44 +01:00
|
|
|
|
2008-02-22 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (do_bx): Only test EF_ARM_EABI_VERSION on ELF
|
2008-02-22 17:47:01 +01:00
|
|
|
|
targeted ARM ports, otherwise just skip generating the reloc.
|
2008-02-22 16:14:44 +01:00
|
|
|
|
|
2008-02-18 19:52:46 +01:00
|
|
|
|
2008-02-18 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* doc/c-i386.texi: Update -march= and .arch.
|
|
|
|
|
|
|
2008-02-18 11:03:06 +01:00
|
|
|
|
2008-02-18 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mn10300.c (has_known_symbol_location): New function.
|
|
|
|
|
|
Do not regard weak symbols as having a known location.
|
|
|
|
|
|
(md_estimate_size_before_relax): Use new function.
|
|
|
|
|
|
(md_pcrel_from): Do not compute a pcrel against a weak symbol.
|
|
|
|
|
|
|
2008-02-18 09:44:38 +01:00
|
|
|
|
2008-02-18 Jan Beulich <jbeulich@novell.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (match_template): Disallow 'l' suffix when
|
|
|
|
|
|
currently selected CPU has no 32-bit support.
|
|
|
|
|
|
(parse_real_register): Do not return registers not available on
|
|
|
|
|
|
currently selected CPU.
|
|
|
|
|
|
|
2008-02-17 01:26:19 +01:00
|
|
|
|
2008-02-16 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (process_immext): Fix format.
|
|
|
|
|
|
|
2008-02-16 17:16:48 +01:00
|
|
|
|
2008-02-16 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (inoutportreg): New.
|
|
|
|
|
|
(process_immext): New.
|
|
|
|
|
|
(md_assemble): Use it.
|
|
|
|
|
|
(update_imm): Use imm16 and imm32s.
|
2008-05-14 08:45:42 +02:00
|
|
|
|
(i386_att_operand): Use inoutportreg.
|
2008-02-16 17:16:48 +01:00
|
|
|
|
|
2008-02-14 23:54:02 +01:00
|
|
|
|
2008-02-14 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (operand_type_all_zero): New.
|
|
|
|
|
|
(operand_type_set): Likewise.
|
|
|
|
|
|
(operand_type_equal): Likewise.
|
|
|
|
|
|
(cpu_flags_all_zero): Likewise.
|
|
|
|
|
|
(cpu_flags_set): Likewise.
|
|
|
|
|
|
(cpu_flags_equal): Likewise.
|
|
|
|
|
|
(UINTS_ALL_ZERO): Removed.
|
|
|
|
|
|
(UINTS_SET): Likewise.
|
|
|
|
|
|
(UINTS_CLEAR): Likewise.
|
|
|
|
|
|
(UINTS_EQUAL): Likewise.
|
|
|
|
|
|
(cpu_flags_match): Updated.
|
|
|
|
|
|
(smallest_imm_type): Likewise.
|
|
|
|
|
|
(set_cpu_arch): Likewise.
|
|
|
|
|
|
(md_assemble): Likewise.
|
|
|
|
|
|
(optimize_imm): Likewise.
|
|
|
|
|
|
(match_template): Likewise.
|
|
|
|
|
|
(process_suffix): Likewise.
|
|
|
|
|
|
(update_imm): Likewise.
|
|
|
|
|
|
(process_drex): Likewise.
|
|
|
|
|
|
(process_operands): Likewise.
|
|
|
|
|
|
(build_modrm_byte): Likewise.
|
|
|
|
|
|
(i386_immediate): Likewise.
|
|
|
|
|
|
(i386_displacement): Likewise.
|
|
|
|
|
|
(i386_att_operand): Likewise.
|
|
|
|
|
|
(parse_real_register): Likewise.
|
|
|
|
|
|
(md_parse_option): Likewise.
|
|
|
|
|
|
(i386_target_format): Likewise.
|
|
|
|
|
|
|
2008-02-14 17:35:51 +01:00
|
|
|
|
2008-02-14 Dimitry Andric <dimitry@andric.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/5712
|
|
|
|
|
|
* config/tc-arm.c (s_arm_unwind_save): Advance the input line
|
|
|
|
|
|
pointer past the comma after parsing a floating point register
|
|
|
|
|
|
name.
|
|
|
|
|
|
|
2008-02-14 14:04:29 +01:00
|
|
|
|
2008-02-14 Hakan Ardo <hakan@debian.org>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/2626
|
|
|
|
|
|
* config/tc-avr.c (mcu_types): Change the ISA tyoe of the attiny26
|
|
|
|
|
|
to AVR_ISA_2xxe.
|
|
|
|
|
|
(avr_operand): Disallow post-increment addressing in the lpm
|
|
|
|
|
|
instruction for the attiny26.
|
|
|
|
|
|
|
2008-02-13 14:41:26 +01:00
|
|
|
|
2008-02-13 Jan Beulich <jbeulich@novell.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (parse_real_register): Don't return 'FLAT'
|
|
|
|
|
|
if not in Intel mode.
|
|
|
|
|
|
(i386_intel_operand): Ignore segment overrides in immediate and
|
|
|
|
|
|
offset operands.
|
|
|
|
|
|
(intel_e11): Range-check i.mem_operands before use as array
|
|
|
|
|
|
index. Filter out FLAT for uses other than as segment override.
|
|
|
|
|
|
(intel_get_token): Remove broken promotion of "FLAT:" to mean
|
|
|
|
|
|
"offset FLAT:".
|
|
|
|
|
|
|
2008-02-13 14:29:31 +01:00
|
|
|
|
2008-02-13 Jan Beulich <jbeulich@novell.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (intel_e09): Also special-case 'bound'.
|
|
|
|
|
|
|
2008-02-13 11:14:40 +01:00
|
|
|
|
2008-02-13 Jan Beulich <jbeulich@novell.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (allow_pseudo_reg): New.
|
|
|
|
|
|
(parse_real_register): Check for NULL just once. Allow all
|
|
|
|
|
|
register table entries when allow_pseudo_reg is non-zero.
|
|
|
|
|
|
Don't allow any registers without type when allow_pseudo_reg
|
|
|
|
|
|
is zero.
|
|
|
|
|
|
(tc_x86_regname_to_dw2regnum): Replace with ...
|
|
|
|
|
|
(tc_x86_parse_to_dw2regnum): ... this.
|
|
|
|
|
|
(tc_x86_frame_initial_instructions): Adjust for above change.
|
|
|
|
|
|
* config/tc-i386.h (tc_regname_to_dw2regnum): Remove.
|
|
|
|
|
|
(tc_parse_to_dw2regnum): New.
|
|
|
|
|
|
(tc_x86_regname_to_dw2regnum): Replace with ...
|
|
|
|
|
|
(tc_x86_parse_to_dw2regnum): ... this.
|
|
|
|
|
|
* dw2gencfi.c (tc_parse_to_dw2regnum): New, broken out of ...
|
|
|
|
|
|
(cfi_parse_reg): ... this. Use tc_parse_to_dw2regnum. Adjust
|
|
|
|
|
|
error handling.
|
|
|
|
|
|
|
2008-02-12 09:37:08 +01:00
|
|
|
|
2008-02-12 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-tic4x.c (tic4x_insn_insert): Add const qualifier to
|
|
|
|
|
|
argument.
|
|
|
|
|
|
(tic4x_insn_add): Likewise.
|
|
|
|
|
|
(md_begin): Drop cast that was discarding a const qualifier.
|
|
|
|
|
|
* config/tc-d30v.c (get_reloc): Add const qualifier to op
|
|
|
|
|
|
argument.
|
|
|
|
|
|
(build_insn): Drop cast that was discarding a const qualifier.
|
|
|
|
|
|
|
2008-02-12 06:35:36 +01:00
|
|
|
|
2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (cpu_arch): Add .xsave.
|
|
|
|
|
|
(md_show_usage): Add .xsave.
|
|
|
|
|
|
|
|
|
|
|
|
* doc/c-i386.texi: Add xsave to -march=.
|
|
|
|
|
|
|
2008-02-07 09:40:29 +01:00
|
|
|
|
2008-02-07 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
|
|
|
|
|
* read.c (s_weakref): Don't pass unadorned NULL to concat.
|
|
|
|
|
|
* config/tc-i386.c (set_cpu_arch, md_parse_option): Likewise.
|
|
|
|
|
|
|
2008-02-05 20:39:08 +01:00
|
|
|
|
2008-02-05 Sterling Augustine <sterling@tensilica.com>
|
2008-05-14 08:45:42 +02:00
|
|
|
|
|
2008-02-05 20:39:08 +01:00
|
|
|
|
* config/tc-xtensa.c (relax_frag_immed): Change internal consistency
|
|
|
|
|
|
checks into assertions. When relaxation produces an operation that
|
|
|
|
|
|
does not fit in the current FLIX instruction, make sure that the
|
|
|
|
|
|
operation is relaxed as needed to account for being placed following
|
|
|
|
|
|
the current instruction.
|
2008-05-14 08:45:42 +02:00
|
|
|
|
|
2008-02-04 20:43:51 +01:00
|
|
|
|
2008-02-04 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 5715
|
|
|
|
|
|
* configure: Regenerated.
|
|
|
|
|
|
|
2008-02-04 20:20:16 +01:00
|
|
|
|
2008-02-04 Adam Nemet <anemet@caviumnetworks.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (mips_cpu_info_table): Add Octeon.
|
|
|
|
|
|
|
2008-02-01 18:58:48 +01:00
|
|
|
|
2008-01-31 Marc Gauthier <marc@tensilica.com>
|
|
|
|
|
|
|
|
|
|
|
|
* configure.tgt (xtensa*-*-*): Recognize processor variants.
|
|
|
|
|
|
|
2008-01-25 17:18:41 +01:00
|
|
|
|
2008-01-25 Kai Tietz <kai.tietz@onevision.com>
|
|
|
|
|
|
|
2008-05-14 08:45:42 +02:00
|
|
|
|
* read.c: (emit_expr): Correct for mingw use of printf size
|
2008-01-25 17:18:41 +01:00
|
|
|
|
specifier.
|
|
|
|
|
|
|
2008-01-25 02:08:34 +01:00
|
|
|
|
2008-01-24 Bob Wilson <bob.wilson@acm.org>
|
2008-05-14 08:45:42 +02:00
|
|
|
|
|
2008-01-25 02:08:34 +01:00
|
|
|
|
* doc/c-xtensa.texi (Xtensa Syntax): Clarify handling of opcodes that
|
|
|
|
|
|
can only be encoded in FLIX instructions but are not specified as such.
|
|
|
|
|
|
(Xtensa Automatic Alignment): Remove obsolete comment about debugging
|
|
|
|
|
|
labels.
|
2008-05-14 08:45:42 +02:00
|
|
|
|
|
2008-01-24 23:44:37 +01:00
|
|
|
|
2008-01-24 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* NEWS: Mention new command line options for x86 targets.
|
|
|
|
|
|
|
2008-01-23 20:05:12 +01:00
|
|
|
|
2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (md_show_usage): Replace tabs with spaces.
|
|
|
|
|
|
|
2008-01-23 18:36:23 +01:00
|
|
|
|
2008-01-23 Eric B. Weddington <eric.weddington@atmel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-avr.c (mcu_types): Change opcode set for at86rf401.
|
|
|
|
|
|
|
2008-01-23 15:13:08 +01:00
|
|
|
|
2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (md_show_usage): Show more processors for
|
|
|
|
|
|
-march=/-mtune=.
|
|
|
|
|
|
|
2008-01-22 20:57:30 +01:00
|
|
|
|
2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (i386_target_format): Remove cpummx2.
|
|
|
|
|
|
|
2008-01-22 20:16:45 +01:00
|
|
|
|
2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (XXX_PREFIX): Moved from tc-i386.h.
|
|
|
|
|
|
(XXX_MNEM_SUFFIX): Likewise.
|
|
|
|
|
|
(END_OF_INSN): Likewise.
|
|
|
|
|
|
(templates): Likewise.
|
|
|
|
|
|
(modrm_byte): Likewise.
|
|
|
|
|
|
(rex_byte): Likewise.
|
|
|
|
|
|
(DREX_XXX): Likewise.
|
|
|
|
|
|
(drex_byte): Likewise.
|
|
|
|
|
|
(sib_byte): Likewise.
|
|
|
|
|
|
(processor_type): Likewise.
|
|
|
|
|
|
(arch_entry): Likewise.
|
|
|
|
|
|
(cpu_sub_arch_name): Remove const.
|
|
|
|
|
|
(cpu_arch): Add .vmx and .smx.
|
|
|
|
|
|
(set_cpu_arch): Append cpu_sub_arch_name.
|
|
|
|
|
|
(md_parse_option): Support -march=CPU[,+EXTENSION...].
|
|
|
|
|
|
(md_show_usage): Updated.
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.h (XXX_PREFIX): Moved to tc-i386.c.
|
|
|
|
|
|
(XXX_MNEM_SUFFIX): Likewise.
|
|
|
|
|
|
(END_OF_INSN): Likewise.
|
|
|
|
|
|
(templates): Likewise.
|
|
|
|
|
|
(modrm_byte): Likewise.
|
|
|
|
|
|
(rex_byte): Likewise.
|
|
|
|
|
|
(DREX_XXX): Likewise.
|
|
|
|
|
|
(drex_byte): Likewise.
|
|
|
|
|
|
(sib_byte): Likewise.
|
|
|
|
|
|
(processor_type): Likewise.
|
|
|
|
|
|
(arch_entry): Likewise.
|
|
|
|
|
|
|
|
|
|
|
|
* doc/as.texinfo: Update i386 -march option.
|
|
|
|
|
|
|
|
|
|
|
|
* doc/c-i386.texi: Update -march= for ISA.
|
|
|
|
|
|
|
2008-01-18 20:13:48 +01:00
|
|
|
|
2008-01-18 Bob Wilson <bob.wilson@acm.org>
|
2008-05-14 08:45:42 +02:00
|
|
|
|
|
2008-01-18 20:13:48 +01:00
|
|
|
|
* config/tc-xtensa.c (xtensa_leb128): New function.
|
|
|
|
|
|
(md_pseudo_table): Use it for sleb128 and uleb128.
|
|
|
|
|
|
(is_leb128_expr): New internal flag.
|
|
|
|
|
|
(xtensa_symbol_new_hook): Check new flag.
|
2008-05-14 08:45:42 +02:00
|
|
|
|
|
2008-01-16 18:59:07 +01:00
|
|
|
|
2008-01-16 Eric B. Weddington <eric.weddington@atmel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-avr.c (mcu_types): Change opcode set for avr3,
|
|
|
|
|
|
at90usb82, at90usb162.
|
2008-05-14 08:45:42 +02:00
|
|
|
|
* doc/c-avr.texi: Change architecture grouping for at90usb82,
|
2008-01-16 18:59:07 +01:00
|
|
|
|
at90usb162.
|
|
|
|
|
|
These changes support the new avr35 architecture group in gcc.
|
|
|
|
|
|
|
2008-01-15 19:50:44 +01:00
|
|
|
|
2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (md_assemble): Also zap movzx and movsx
|
|
|
|
|
|
suffix for AT&T syntax.
|
|
|
|
|
|
|
2008-01-15 02:37:56 +01:00
|
|
|
|
2008-01-14 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (match_reg_size): New.
|
|
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(match_mem_size): Likewise.
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(operand_size_match): Likewise.
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(operand_type_match): Also clear all size fields.
|
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(match_template): Skip Intel syntax when in AT&T syntax.
|
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Call operand_size_match to check operand size.
|
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(i386_att_operand): Set the mem field to 1 for memory
|
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operand.
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(i386_intel_operand): Likewise.
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|
gas/testsuite/
2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* gas/i386/i386.s: Add tests for fnstsw and fstsw.
* gas/i386/inval.s: Likewise.
* gas/i386/x86_64.s: Likewise.
* gas/i386/intel.s: Use word instead of dword on ss.
* gas/i386/x86-64-inval.s: Add tests for fnstsw, fstsw, in
and out.
* gas/i386/prefix.s: Remove invalid fstsw.
* gas/i386/inval.l: Updated.
* gas/i386/intelbad.l: Likewise.
* gas/i386/i386.d: Likewise.
* gas/i386/x86_64.d: Likewise.
* gas/i386/x86-64-inval.l: Likewise.
* gas/i386/prefix.d: Updated.
gas/
2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* config/tc-i386.c (_i386_insn): Update comment.
(operand_type_match): Also clear unspecified.
(operand_type_register_match): Likewise.
(parse_operands): Initialize unspecified.
(i386_intel_operand): Likewise.
(match_template): Check memory and accumulator operand size.
(i386_att_operand): Clear unspecified on register operand.
(intel_e11): Likewise.
(intel_e09): Set operand size and clean unspecified for
"XXX PTR".
opcodes/
2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* i386-gen.c (operand_type_init): Add Dword to
OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64.
(opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
Qword and Xmmword.
(operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
Xmmword, Unspecified and Anysize.
(set_bitfield): Make Mmword an alias of Qword. Make Oword
an alias of Xmmword.
* i386-opc.h (CheckSize): Removed.
(Byte): Updated.
(Word): Likewise.
(Dword): Likewise.
(Qword): Likewise.
(Xmmword): Likewise.
(FWait): Updated.
(OTMax): Likewise.
(i386_opcode_modifier): Remove checksize, byte, word, dword,
qword and xmmword.
(Fword): New.
(TBYTE): Likewise.
(Unspecified): Likewise.
(Anysize): Likewise.
(i386_operand_type): Add byte, word, dword, fword, qword,
tbyte xmmword, unspecified and anysize.
* i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
Tbyte, Xmmword, Unspecified and Anysize.
* i386-reg.tbl: Add size for accumulator.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-01-12 17:05:42 +01:00
|
|
|
|
2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
|
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|
|
PR gas/5534
|
|
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|
|
* config/tc-i386.c (_i386_insn): Update comment.
|
|
|
|
|
|
(operand_type_match): Also clear unspecified.
|
|
|
|
|
|
(operand_type_register_match): Likewise.
|
|
|
|
|
|
(parse_operands): Initialize unspecified.
|
|
|
|
|
|
(i386_intel_operand): Likewise.
|
|
|
|
|
|
(match_template): Check memory and accumulator operand size.
|
|
|
|
|
|
(i386_att_operand): Clear unspecified on register operand.
|
|
|
|
|
|
(intel_e11): Likewise.
|
|
|
|
|
|
(intel_e09): Set operand size and clean unspecified for
|
|
|
|
|
|
"XXX PTR".
|
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|
|
2008-01-11 17:18:43 +01:00
|
|
|
|
2008-01-11 Andreas Schwab <schwab@suse.de>
|
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|
|
* read.c (s_space): Declare `repeat' as offsetT.
|
|
|
|
|
|
|
2008-01-10 22:59:46 +01:00
|
|
|
|
2008-01-10 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (match_template): Check processor support
|
|
|
|
|
|
first.
|
|
|
|
|
|
|
2008-01-10 21:53:27 +01:00
|
|
|
|
2008-01-10 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (match_template): Continue if processor
|
|
|
|
|
|
doesn't match.
|
|
|
|
|
|
|
2008-01-09 23:36:06 +01:00
|
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|
|
2008-01-09 Alexandre Oliva <aoliva@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-ia64.c (ia64_convert_frag): Zero-initialize room for
|
|
|
|
|
|
unwind personality function address.
|
|
|
|
|
|
|
2008-01-09 18:30:59 +01:00
|
|
|
|
2008-01-09 Bob Wilson <bob.wilson@acm.org>
|
2008-05-14 08:45:42 +02:00
|
|
|
|
|
2008-01-09 18:30:59 +01:00
|
|
|
|
* dwarf2dbg.c (out_sleb128): Delete.
|
|
|
|
|
|
(size_fixed_inc_line_addr, emit_fixed_inc_line_addr): New.
|
|
|
|
|
|
(out_fixed_inc_line_addr): Delete.
|
|
|
|
|
|
(relax_inc_line_addr, dwarf2dbg_estimate_size_before_relax): Call new
|
|
|
|
|
|
size_fixed_inc_line_addr if DWARF2_USE_FIXED_ADVANCE_PC is set.
|
|
|
|
|
|
(dwarf2dbg_convert_frag): Likewise for emit_fixed_inc_line_addr.
|
|
|
|
|
|
(process_entries): Remove calls to out_fixed_inc_line_addr. When
|
|
|
|
|
|
DWARF2_USE_FIXED_ADVANCE_PC is set, call relax_inc_line_addr.
|
|
|
|
|
|
* read.h (emit_expr_fix): New prototype.
|
|
|
|
|
|
* read.c (emit_expr): Move code to emit_expr_fix and use it here.
|
|
|
|
|
|
(emit_expr_fix): New.
|
2008-05-14 08:45:42 +02:00
|
|
|
|
|
2008-01-09 17:55:14 +01:00
|
|
|
|
2008-01-09 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (match_template): Check register size
|
|
|
|
|
|
only when size of operands can be encoded the canonical way.
|
|
|
|
|
|
|
2008-01-08 20:51:24 +01:00
|
|
|
|
2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (i386_operand): Renamed to ...
|
|
|
|
|
|
(i386_att_operand): This.
|
|
|
|
|
|
(parse_operands): Updated.
|
|
|
|
|
|
|
gas/
2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
* doc/c-i386.texi: Update .att_mnemonic and .intel_mnemonic.
* config/tc-i386.c (set_intel_mnemonic): Set intel_mnemonic
only.
(md_assemble): Remove Intel mode workaround.
(match_template): Check support for old gcc, AT&T mnemonic
and Intel Syntax.
(md_parse_option): Don't set intel_mnemonic to 0 for
OPTION_MOLD_GCC.
gas/testsuite/
2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/intel.s: Add tests for fadd, faddp, fdiv, fdivp,
fdivr, fdivrp, fmul, fmulp, fsub, fsubp, fsubr and fsubrp.
* gas/i386/intel.d: Updated.
* gas/i386/intel.e: Likewise.
opcodes/
2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
ATTSyntax.
* i386-opc.h (IntelMnemonic): Renamed to ..
(ATTSyntax): This
(Opcode_Modifier_Max): Updated.
(i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
and intelsyntax.
* i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
* i386-tbl.h: Regenerated.
2008-01-05 18:07:25 +01:00
|
|
|
|
2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* doc/c-i386.texi: Update .att_mnemonic and .intel_mnemonic.
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (set_intel_mnemonic): Set intel_mnemonic
|
|
|
|
|
|
only.
|
|
|
|
|
|
(md_assemble): Remove Intel mode workaround.
|
|
|
|
|
|
(match_template): Check support for old gcc, AT&T mnemonic
|
|
|
|
|
|
and Intel Syntax.
|
|
|
|
|
|
(md_parse_option): Don't set intel_mnemonic to 0 for
|
|
|
|
|
|
OPTION_MOLD_GCC.
|
|
|
|
|
|
|
2008-01-04 19:19:12 +01:00
|
|
|
|
2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.h: Update copyright to 2008.
|
|
|
|
|
|
|
2008-01-04 15:53:50 +01:00
|
|
|
|
2008-01-04 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-ppc.c (parse_cpu): Preserve the settings of the
|
|
|
|
|
|
PPC_OPCODE_ALTIVEC and PPC_OPCODE_SPE flags.
|
|
|
|
|
|
|
2008-01-04 02:27:01 +01:00
|
|
|
|
2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (md_assemble): Use !intel_mnemonic instead
|
|
|
|
|
|
of SYSV386_COMPAT.
|
|
|
|
|
|
|
2008-01-04 02:05:45 +01:00
|
|
|
|
2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/config/tc-i386.c (cpu_arch_flags_not): Removed.
|
|
|
|
|
|
(cpu_flags_not): Likewise.
|
|
|
|
|
|
(cpu_flags_match): Updated to check 64bit and arch.
|
|
|
|
|
|
(set_code_flag): Remove cpu_arch_flags_not.
|
|
|
|
|
|
(set_16bit_gcc_code_flag): Likewise.
|
|
|
|
|
|
(set_cpu_arch): Likewise.
|
|
|
|
|
|
(md_begin): Likewise.
|
|
|
|
|
|
(parse_insn): Call cpu_flags_match to check 64bit and arch.
|
|
|
|
|
|
(match_template): Likewise.
|
|
|
|
|
|
|
2008-01-03 21:19:29 +01:00
|
|
|
|
2008-01-03 Jakub Jelinek <jakub@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (process_drex): Initialize modrm_reg and
|
|
|
|
|
|
modrm_regmem to 0 instead of None.
|
|
|
|
|
|
|
2008-01-03 21:09:38 +01:00
|
|
|
|
2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (match_template): Use the xmmword field
|
|
|
|
|
|
instead of no_xsuf.
|
|
|
|
|
|
|
2008-01-03 00:55:45 +01:00
|
|
|
|
2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (process_suffix): Fix a typo.
|
|
|
|
|
|
|
gas/
2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* config/tc-i386.c (match_template): Handle XMMWORD_MNEM_SUFFIX.
Check memory size in Intel mode.
(process_suffix): Handle XMMWORD_MNEM_SUFFIX.
(intel_e09): Likewise.
* config/tc-i386.h (XMMWORD_MNEM_SUFFIX): New.
gas/testsuite/
2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* gas/i386/intel.s: Use QWORD on movq instead of DWORD.
* gas/i386/inval.s: Add tests for movq.
* gas/i386/x86-64-inval.s: Likewise.
* gas/i386/inval.l: Updated.
* gas/i386/x86-64-inval.l: Likewise.
opcodes/
2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
Byte, Word, Dword, QWord and Xmmword.
* i386-opc.h (No_xSuf): New.
(CheckSize): Likewise.
(Byte): Likewise.
(Word): Likewise.
(Dword): Likewise.
(QWord): Likewise.
(Xmmword): Likewise.
(FWait): Updated.
(i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
Dword, QWord and Xmmword.
* i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
used.
* i386-tbl.h: Regenerated.
2008-01-02 22:43:34 +01:00
|
|
|
|
2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/5534
|
|
|
|
|
|
* config/tc-i386.c (match_template): Handle XMMWORD_MNEM_SUFFIX.
|
|
|
|
|
|
Check memory size in Intel mode.
|
|
|
|
|
|
(process_suffix): Handle XMMWORD_MNEM_SUFFIX.
|
|
|
|
|
|
(intel_e09): Likewise.
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.h (XMMWORD_MNEM_SUFFIX): New.
|
|
|
|
|
|
|
2008-01-02 21:59:47 +01:00
|
|
|
|
2008-01-02 Catherine Moore <clm@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (mips_ip): Check operands on jalr instruction.
|
|
|
|
|
|
|
2008-01-02 22:41:02 +01:00
|
|
|
|
For older changes see ChangeLog-2007
|
2002-01-07 13:12:47 +01:00
|
|
|
|
|
|
|
|
|
|
Local Variables:
|
|
|
|
|
|
mode: change-log
|
|
|
|
|
|
left-margin: 8
|
|
|
|
|
|
fill-column: 74
|
|
|
|
|
|
version-control: never
|
|
|
|
|
|
End:
|