* tc-i386.c (md_assemble): Return after the error message;
move testing for 64bit operands to proper place.
* i386.exp: Add tests for presence of 32bit versus 64bit output
format; run both 64bit and 32bit tests when format is available;
add x86_64 test.
* x86_64.s: New file.
* x86_64.d: New file.
(QWORD_MNEM_SUFFIX): New macro.
(CpuK6,CpuAthlon,CpuSledgehammer, Cpu64, CpuNo64, CpuUnknownFlags):
New macros
(CpuMMX,CpuSSE,Cpu3dnow, CpuUnknown): Renumber.
(IgnoreSize, DefaultSize, No_?Suf, FWait, IsString, regKludge, IsPrefix,
ImmExt): Renumber.
(Size64, No_qSuf, NoRex64, Rex64): New macros.
(Reg64, Imm32S, Imm64, Disp32S, Disp64): New macros.
(Imm8, Imm8S, Imm16, Imm32, Imm1, BaseIndex, Disp8, Disp16, Disp32,
InOutPortReg,ShiftCount, Control, Debug, Test, FloatReg, FloatAcc,
SReg2, SReg3, Acc, JumpAbsolute, RegMMX, RegXMM, EsSeg, InvMem): Renumber.
(Reg, WordReg): Add Reg64.
(Imm): Add Imm32S and Imm64.
(EncImm): New.
(Disp): Add Disp64 and Disp32S.
(AnyMem): Add Disp32S.
(RegRex, RegRex64): New macros.
(rex_byte): New type.
* tc-i386.c (set_16bit_code_flag): Kill.
(fits_in_unsigned_long, fits_in_signed_long): New functions.
(reloc): New parameter "signed"; support x86_64.
(set_code_flag): New.
(DEFAULT_ARCH): New macro; default to "i386".
(default_arch): New static variable.
(struct _i386_insn): New fields Operand_PCrel; rex.
(flag_16bit_code): Kill; All tests replaced to "flag_code == CODE_64BIT";
(flag_code): New enum and static variable.
(use_rela_relocations): New static variable.
(flag_code_names): New static variable.
(cpu_arch_flags): Default to CpuUnknownFlags|CpuNo64.
(cpu_arch): Add "sledgehammer"; Add CPUAthlon to Athlon and CpuK6 to
K6 and Athlon.
(i386_align_code): Return plain "nop" for x86_64.
(mode_from_disp_size): Support Disp32S.
(smallest_imm_type): Support Imm32S and Imm64.
(offset_in_range): Support size of 8.
(set_cpu_arch): Do not clobber to Cpu64/CpuNo64.
(md_pseudo_table): Add "code64"; use set_code_flat.
(md_begin): Emit sane error message on hash failure.
(tc_i386_fix_adjustable): Support x86_64 relocations.
(md_assemble): Support QWORD_MNEM_SUFFIX, REX registers,
instructions supported on particular arch just partially,
output of 64bit immediates, handling of Imm32S and Disp32S type.
(i386_immedaite): Support x86_64 relocations; support 64bit constants.
(i386_displacement): Likewise.
(i386_index_check): Cleanup; support 64bit addresses.
(md_apply_fix3): Support x86_64 relocation and rela.
(md_longopts): Add "32" and "64".
(md_parse_option): Add OPTION_32 and OPTION_64.
(i386_target_format): Call even for ELFs; choose between
elf64-x86-64 and elf32-i386.
(i386_validate_fix): Refuse GOTOFF in 64bit mode.
(tc_gen_reloc): Support rela relocations and x86_64.
(intel_e09_1): Support QWORD.
* i386.h (i386_optab): Replace "Imm" with "EncImm".
(i386_regtab): Add flags field.
* config/tc-i386.c (intel_e09_1): Only flag as a memory operand if
it's not an offset expression.
(intel_e10_1): Ditto. Also, if the operand is an offset expression,
keep the braces '[' and ']' in the output string.
(intel_e11): Ditto. Also remove comparison intel_parser.op_modifier
!= FLAT. There is no such op_modifier.
* elfxx-ia64.c (get_dyn_sym_info): Cast %p argument to void *.
* config/tc-ia64.h (ia64_init): Add prototype.
* gas/ia64/dv-imply.d, gas/ia64/dv-mutex.d, gas/ia64/dv-safe.d,
gas/ia64/dv-srlz.d, gas/ia64/opc-m.d: Update.
* ia64-dis.c (print_insn_ia64): Cast away const on ia64_free_opcode
argument.
* ia64_gen.c (insert_deplist): Cast sizeof result to int.
(print_dependency_table): Print NULL if semantics field not set.
(insert_opcode_dependencies): Mark cmp parameter as unused.
(print_main_table): Use fprintf_vma to print long long fields.
(main): Mark argv paramter as unused. Convert to old style definition.
* ia64-opc.c (ia64_find_dependency): Cast sizeof result to int.
* ia64-asmtab.c: Regnerate.
* tc-i386.c (md_assemble): Swap i.disp_relocs when using intel
syntax.
2000-11-30 Diego Novillo <dnovillo@redhat.com>
* intel.s, intel.d: New test for @GOT references.
jump>: Use as_bad_where instead of as_bad. Tweak error message
accordingly. Stabilize frag by updating fix part and resetting
variant part.
<undefined symbol, unconditional jump>: Ditto.
* config/obj-elf.h (ECOFF_DEBUGGING) [TC_ALPHA]: Adjust for
tri-state definition of alpha_flag_mdebug.
* config/tc-alpha.c (alpha_flag_mdebug): Init to -1.
(s_alpha_file): Store first .file directive.
(s_alpha_stab): New.
(md_pseudo_table): Add stabs and stabn.
* config/obj-elf.c (elf_frob_symbol): Support
".symver name,name2@@@nodename".
(elf_frob_file_before_adjust): Likewise.
* doc/as.texinfo: Updated for ".symver name,name2@@@nodename"
and ".symver name,name2@@@nodename".
Fix a typo.
* config/tc-ia64.c (struct unw_rec_list): Add slot_frag field.
(struct unwind): Add next_slot_frag field.
(slot_index): New parameters slot_frag and first_frag. Add code
to add in frag sizes when different. Add comments.
(fixup_unw_records): New locals first_frag and last_frag. Pass new
arguments to slot_index.
(emit_one_bundle): Set slot_frag field. Set next_slot_number after
loop end. Set next_slot_frag field.
* doc/as.texinfo (.symver): Updated for versioned symbol
reference.
* obj.h (format_ops): Add the frob_file_before_adjust field.
* config/obj-aout.c (aout_format_ops): Set the
frob_file_before_adjust field to 0.
* config/obj-coff.c (coff_format_ops): Likewise.
* config/obj-ecoff.c (ecoff_format_ops): Likewise.
* config/obj-elf.c (obj_elf_symver): Allow duplicated version
name.
(elf_frob_file_before_adjust): New function to remove unneeded
versioned symbols from the symbol table.
(elf_format_ops): Set the frob_file_before_adjust field to
elf_frob_file_before_adjust.
* config/obj-elf.h (obj_frob_file_before_adjust): Defined if
not defined.
* config/obj-multi.h (obj_frob_file_before_adjust): Defined.
* config/tc-ia64.c (md_shortopts, md_parse_option, md_show_usage):
Change M to m for -milp32 or -mlp64 to match gcc.
(dot_endp): Use bytes_per_address instead of 8.
(emit_one_bundle): Use number_to_chars_littleendian instead of
md_number_to_chars.
(fix_insn): Likewise.
(ia64_init): New function.
(ia64_target_format): New function.
(md_begin): Set endianness, arch, and machine as appropriate.
* config/tc-ia64.h: (TARGET_BYTES_BIG_ENDIAN, md_number_to_chars):
Make these macros depend on TE_HPUX macro.
(TARGET_FORMAT): Define.
(HOST_SPECIAL_INIT): Define.
* config/te-hpux.h: New file.
* configure.in: Add "ia64-*-hpux*" target to configure.
* configure: Regenerate.
* config/tc-ia64.c (struct md): New field tag_fixups.
(ia64_flush_insns): Handle tag_fixups. Error if dangling
qualifying predicate.
(emit_one_bundle): Delete spurious multiplication by one. Handle
tag_fixups.
(ia64_start_line): Error if dangling qualifying predicate.
(defining_tag): New static variable.
(ia64_unrecognized_line, case '['): Parse tags.
(ia64_frob_label): Create tag_fixups.
(md_assemble): Reset md.qp.X_op after using it.
* tc-i386.c (i386_operand_modifier): Remove.
(build_displacement_string): Remove.
(i386_parse_seg): Remove.
(i386_intel_memory_operand): Remove.
(i386_intel_operand): Re-write using recursive descent parser based
on MASM documentation.
(struct intel_parser_s): New structure.
(intel_parser): New static variable.
(struct intel_token): New structure.
(cur_token, prev_token): New static variables.
(T_NIL): Define.
(T_CONST): Define.
(T_REG): Define.
(T_BYTE): Define.
(T_WORD): Define.
(T_DWORD): Define.
(T_QWORD): Define.
(T_XWORD): Define.
(T_SHORT): Define.
(T_OFFSET): Define.
(T_PTR): Define.
(T_ID): Define.
(intel_match_token): New function.
(intel_get_token): New function.
(intel_putback_token): New function.
(intel_expr): New function.
(intel_e05): New function.
(intel_e05_1): New function.
(intel_e06): New function.
(intel_e06_1): New function.
(intel_e09): New function.
(intel_e09_1): New function.
(intel_e10): New function.
(intel_e10_1): New function.
(intel_e11): New function.
2000-10-24 Diego Novillo <dnovillo@cygnus.com>
* intel.s, intel.d: Add new tests for intel syntax.
2000-10-15 Diego Novillo <dnovillo@cygnus.com>
* config/tc-i386.c (i386_operand_modifier): Only match
modifiers SHORT and FLAT if they are followed by a space.
(parse_register): When `allow_naked_reg' is set, do not confuse
identifiers that start with a register name with a register.
gas/testsuite:
2000-10-15 Diego Novillo <dnovillo@cygnus.com>
* intel.s, intel.d: Add new tests for naked registers using intel
syntax.
* config/tc-sh.c (md_apply_fix): Map 32-bit relocations that
become PC-relative to BFD_RELOC_32_PCREL. Reject 16- or 8-bit
similar relocs.
(sh_obj_adjustable): Return 1 for PC-relative offsets used in
branches.
* config/tc-sh.h (DIFF_EXPR_OK, GLOBAL_OFFSET_TABLE_NAME,
TC_RELOC_GLOBAL_OFFSET_TABLE, TC_RELOC_RTSYM_LOC_FIXUP): Define.
* config/tc-sh.c (sh_elf_cons, sh_elf_suffix): New functions.
[OBJ_ELF] (md_pseudo_table) <long, int, word, short>: Use them.
(GOT_symbol): New variable.
(md_undefined_symbol): Set it.
2000-08-30 Mark Hatle <mhatle@mvista.com>
* config/tc-ppc.c (md_parse_option): Recognize -m405.
In src/opcodes/ChangeLog:
2000-08-30 Mark Hatle <mhatle@mvista.com>
* ppc-opc.c Add XTLB macro for a few PPC 4xx extended mnemonics.
(powerpc_opcodes): Add table entries for PPC 405 instructions.
Changed rfci, icbt, mfdcr, dccci, mtdcr, iccci from PPC to PPC403
instructions.
Added extended mnemonic mftbl as defined in the 405GP manual
for all PPCs.
* config.in (STRICTCOFF): New for strict COFF.
* configure.in: Define STRICTCOFF for i386-*-msdosdjgpp*,
i386-*-go32* and i386-go32-rtems*.
* configure: Rebuilt.
* config/obj-coff.c (obj_coff_endef): Follow the historical
behavior if STRICTCOFF is not defined.
* doc/internals.texi: Document STRICTCOFF.
bfd:
* elf32-i860.c (elf32_i860_relocate_pc16): Just write the immediate
field with the newly relocated value instead of adding it to the
existing immediate field.
(elf32_i860_relocate_splitn): Likewise.
(elf32_i860_relocate_highadj): Likewise.
gas:
* config/tc-i860.c (md_apply_fix3): Do not insert the immediate
if the fixup resulted in a relocation.
obj_fix_adjustable() and tc_fix_adjustable() to tell whether to
add a symbol's address. Removed all target-specific #ifdefs that
used to accomplished the same.
* config/tc-v850.h (TC_DONT_FIX_NON_ADJUSTABLE): Define.
* config/tc-m68k.h (TC_DONT_FIX_NON_ADJUSTABLE): Define.
* config/tc-arm.h (TC_DONT_FIX_NON_ADJUSTABLE): Define.
* config/tc-i960.h (TC_DONT_FIX_NON_ADJUSTABLE): Define.
* config/tc-i386.h (TC_DONT_FIX_NON_ADJUSTABLE): Define.
bfd/
2000-08-14 Jim Wilson <wilson@cygnus.com>
* elf64-ia64.c (elf64_ia64_merge_private_bfd_data): Handle
EF_IA_64_REDUCEDFP, EF_IA_64_CONS_GP, and EF_IA_64_NOFUNCDESC_CONS_GP.
(elf64_ia64_print_private_bfd_data): Likewise. Also handle
EF_IA_64_ABSOLUTE.
gas/
2000-08-14 Jim Wilson <wilson@cygnus.com>
* config/tc-ia64.c (md_longopts): Add -mconstant-gp and -mauto-pic.
(md_parse_option): Add OPTION_MCONSTANT_GP and OPTION_MAUTO_PIC.
(md_begin): Change assignment to md.flag to OR in the new bit.
include/elf/
2000-08-14 Jim Wilson <wilson@cygnus.com>
* elf/ia64.h (EF_IA_64_REDUCEDFP, EF_IA_64_CONS_GP,
EF_IA_64_NOFUNCDESC_CONS_GP, EF_IA_64_ABSOLUTE): Define.
2000-08-08 Jason Eckhardt <jle@cygnus.com>
* config/tc-i860.h: Rework completely for BFD_ASSEMBLER.
(i860_fix_info): New enum.
(MD_APPLY_FIX3): Define.
(WORKING_DOT_WORD): Define.
(TC_HANDLES_FX_DONE): Define.
(DIFF_EXPR_OK): Define.
(LISTING_HEADER): Define.
(TARGET_FORMAT): Select target format based on endian flag.
(TARGET_BYTES_BIG_ENDIAN): Default to little endian.
(target_big_endian): Add external declaration.
* config/tc-i860.c: All existing code reworked completely. Other
new code shown below.
(SYNTAX_SVR4): Define.
(target_warn_expand): New variable.
(md_shortopts): Declare and define (-Qy, -Qn, and -V options).
(md_longopts): Declare and define with new options (-EL, -EB,
and -mwarn-expand).
(md_show_usage): New function.
(md_operand): New function.
(obtain_reloc_for_imm16): New function.
(md_apply_fix3): New function.
(tc_gen_reloc): New function.
include:
2000-08-08 Jason Eckhardt <jle@cygnus.com>
* opcode/i860.h: Small formatting adjustments.
opcode:
2000-08-08 Jason Eckhardt <jle@cygnus.com>
* i860-dis.c (print_br_address): Change third argument from int
to long.
bfd:
2000-08-08 Jason Eckhardt <jle@cygnus.com>
* elf32-i860.c (elf32_i860_howto_table): Updated some fields.
(dot_vframe): Elide psp_gr record if it overlaps prologue_gr.
(dot_save): Likewise for pfs_gr, rp_gr, and preds_gr.
(dot_body): Clear unwind.prologue_mask.
(dot_prologue): Set it. Accept a register second argument.
Don't declare md_pcrel_from_section (already in tc-avr.h).
(avr_operands): Use AVR_UNDEF_P and AVR_SKIP_P macros.
(avr_operand): Don't set (unsigned) op_mask to -1.
* configure.in: Add bits for i860-stardent-{sysv4, elf}*.
* configure: Regenerated.
* config/obj-elf.c (obj_elf_type): Recognize a fifth type
of operand to the .type directive (.e.g, "type").
* configure.in: Add entry for mips-*-sysv4*MP*
* configure: Rebuild
* config/tc-mips.c (mips_target_format): Return elf32-tradbigmips or
elf32-tradlittlemips for traditional mips targets.
* config/tc-mips.c (md_estimate_size_before_relax): Duplicate the
test for Link Once sections as in adjust_reloc_syms.
* config/te-tmips.h: New file for traditional mips targets. Define
TE_TMIPS.
is the integer register $r28, vs. both $r28 and the floating point
register $f28.
This quiets a bogus warning about needing ".set noat".
Approved by: Nick Clifton <nickc@cygnus.com>
Message-Id: <200006081749.KAA12558@elmo.cygnus.com>
* config/tc-ia64.c (generate_unwind_image): Call ia64_flush_insns.
(dot_endp): Don't call ia64_flush_insns.
(emit_one_bundle): Don't delete prologue/body records from
unwind_record list in first loop. Rewrite second loop to account for
this.
correctly.
mrs lr, spsr
The string pointer is advanced to far before the check to set
the SPSR bit.
Thu Jun 01 2000 Scott Bambrough <scottb@netwinder.org>
* config/tc-arm.c (do_mrs): Allow SPSR_BIT to be set correctly.
* config/tc-ia64.c (output_P7_format, case mem_stack_f): Output fixed
frame size in units of 16 bytes, as required per SW Conventions manual.
(output_unw_records): Output info-block header as a dword to get
byte-order right.
More comments added.
(md_begin): Removed "construct symbols for each register name".
Because register names conflicts with GCC generated function
names.
(avr_operand): Now constant numbers can be used as a register
identifiers (0 as r0, 31 as r31).
(md_assemble): use skip_space () before parsing instruction
operands.
(md_assemble): Handle opcodes with optional operands (lpm,elpm).
(avr_operand): Handle 'a', 'v' and 'z' constraint letters needed
for `fmul', `movw' and `lpm R,Z' instructions.
(avr_operands): Warn if current opcode is a two-word instruction
and previous opcode was cpse/sbic/sbis/sbrc/sbrs.
(avr_opcodes): New commands added.
(REGISTER_P): Check 'a' and 'v' constraint letters.
(mcu_types): New MCU added.
bfd:
* Makefile.am (coff64-rs6000.lo): New rule.
* Makefile.in: Regenerate.
* coff-rs6000.c (xcoff_mkobject, xcoff_copy_private_bfd_data,
xcoff_is_local_label_name, xcoff_rtype2howto,
xcoff_reloc_type_lookup, xcoff_slurp_armap, xcoff_archive_p,
xcoff_read_ar_hdr, xcoff_openr_next_archived_file, xcoff_write_armap,
xcoff_write_archive_contents): No longer static, and prefix with _bfd_.
(NO_COFF_SYMBOLS): Define.
(xcoff64_swap_sym_in, xcoff64_swap_sym_out, xcoff64_swap_aux_in,
xcoff64_swap_aux_out): New functions; handle xcoff symbol tables
internally.
(MINUS_ONE): New macro.
(xcoff_howto_tabl, xcoff_reloc_type_lookup): Add 64 bit POS
relocation.
(coff_SWAP_sym_in, coff_SWAP_sym_out, coff_SWAP_aux_in,
coff_SWAP_aux_out): Map to the new functions.
* coff64-rs6000.c: New file.
* libcoff.h (bfd_coff_backend_data): Add new fields
_bfd_coff_force_symnames_in_strings and
_bfd_coff_debug_string_prefix_length.
(bfd_coff_force_symnames_in_strings,
bfd_coff_debug_string_prefix_length): New macros for above fields.
* coffcode.h (coff_set_arch_mach_hook): Handle XCOFF64 magic.
Set machine to 620 for XCOFF64. Use bfd_coff_swap_sym_in instead
of using coff_swap_sym_in directly.
(FORCE_SYMNAMES_IN_STRINGS): New macro, defined for XCOFF64.
(coff_set_flags) Set magic for XCOFF64.
(coff_compute_section_file_positions): Add symbol name length to
string section length if bfd_coff_debug_string_prefix_length is
true.
(coff_write_object_contents): Don't do reloc overflow for XCOFF64.
(coff_slurp_line_table): Use bfd_coff_swap_lineno_in instead of
using coff_swap_lineno_in directly.
(bfd_coff_backend_data): Add _bfd_coff_force_symnames_in_strings
and _bfd_coff_debug_string_prefix_length fields.
* coffgen.c (coff_fix_symbol_name, coff_write_symbols): Force
symbol names into strings table when
bfd_coff_force_symnames_in_strings is true.
* coffswap.h (MAX_SCNHDR_NRELOC, MAX_SCNHDR_NLNNO, GET_RELOC_VADDR,
SET_RELOC_VADDR): New macros.
(coff_swap_reloc_in, coff_swap_reloc_out): Use above macros.
(coff_swap_aux_in, coff_swap_aux_out): Remove RS6000COFF_C
code.
(coff_swap_aouthdr_in, coff_swap_aouthdr_out): Handle XCOFF64
changes within RS6000COFF_C specific code.
(coff_swap_scnhdr_out): Use PUT_SCNHDR_NLNNO, PUT_SCNHDR_NRELOC,
MAX_SCNHDR_NRELOC, and MAX_SCNHDR_NLNNO.
* reloc.c (bfd_perform_relocation, bfd_install_relocation):
Extend existing hack on target name.
* xcofflink.c (XCOFF_XVECP): Extend existing hack on
target name.
* coff-tic54x.c (ticof): Keep up to date with new fields
in bfd_coff_backend_data.
* config.bfd: Add bfd_powerpc_64_arch to targ_arch and define
targ_selvecs to include rs6000coff64_vec for rs6000.
* configure.in: Add rs6000coff64_vec case.
* cpu-powerpc.c: New bfd_arch_info_type.
gas:
* as.c (parse_args): Allow md_parse_option to override -a listing
option.
* config/obj-coff.c (add_lineno): Change type of offset parameter
from "int" to "bfd_vma."
* config/tc-ppc.c (md_pseudo_table): Add "llong" and "machine."
(ppc_mach, ppc_subseg_align, ppc_target_format): New.
(ppc_change_csect): Align correctly for XCOFF64.
(ppc_machine): New function, which discards "ppc_machine" line.
(ppc_tc): Cons for 8 when code is 64 bit.
(md_apply_fix3): Don't check operand->insert. Handle 64 bit
relocations.
(md_parse_option): Handle -a64 and -a32.
(ppc_xcoff64): New.
* config/tc-ppc.h (TARGET_MACH): Define.
(TARGET_FORMAT): Move to function.
(SUB_SEGMENT_ALIGN): Use ppc_subseg_align.
include:
* include/coff/rs6k64.h: New file.
opcodes:
* configure.in: Add bfd_powerpc_64_arch.
* disassemble.c (disassembler): Use print_insn_big_powerpc for
64 bit code.
* sh-opc.c (sh_table): Use A_DISP_PC / PCRELIMM_8BY2 for ldre & ldrs.
stc GBR,@-<REG_N> is available for arch_sh1_up.
Group parallel processing insn with identical mnemonics together.
Make three-operand psha / pshl come first.
gas:
* config/tc-sh.c (get_operands): There's no third operand if the
first operand is an immediate.
opcodes:
* sh-opc.h (sh_nibble_type): Remove DISP_8 and DISP_4.
Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT.
(sh_arg_type): Add A_PC.
(sh_table): Update entries using immediates. Add repeat.
* sh-dis.c (print_insn_shx): Remove DISP_8 and DISP_4.
Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT.
gas:
* config/tc-sh.c (immediate): Delete.
(sh_operand_info): Add immediate member.
(parse_reg): Use A_PC for pc.
(parse_exp): Add second argument 'op'. All callers changed.
(parse_at): Expect pc to be coded as A_PC.
Use immediate field in *op.
(insert): Add fourth argument 'op'. All callers changed.
(build_relax): Add second argument 'op'. All callers changed.
(insert_loop_bounds): New function.
(build_Mytes): Remove DISP_4.
Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT.
(assemble_ppi): Use immediate field in *operand.
(sh_force_relocation): Handle BFD_RELOC_SH_LOOP_{START,END}.
(md_apply_fix): Likewise.
(tc_gen_reloc): Likewise. Check for a pcrel BFD_RELOC_SH_LABEL.
include/coff:
* sh.h (R_SH_LOOP_START, R_SH_LOOP_END): Define.
include/elf:
* sh.h (R_SH_LOOP_START, R_SH_LOOP_END): New RELOC_NUMBERs.
bfd:
* reloc.c (_bfd_relocate_contents): Add BFD_RELOC_SH_LOOP_START and
BFD_RELOC_SH_LOOP_END.
* elf32-sh.c (sh_elf_howto_tab): Change special_func to
sh_elf_ignore_reloc for all entries that sh_elf_reloc used to ignore.
Add entries for R_SH_LOOP_START and R_SH_LOOP_END.
(sh_elf_reloc_loop): New function.
(sh_elf_reloc): No need to test for always-to-be-ignored relocs
any more.
(sh_rel): Add entries for BFD_RELOC_SH_LOOP_{START,END}.
(sh_elf_relocate_section): Handle BFD_RELOC_SH_LOOP_{START,END}.
* bfd-in2.h, libbfd.h: Regenerate.
Nick Clifton
Kazu Hirata
Alan Modra
Jim Wilson
Jan Hubicka
Stephane Carrez
Andreas Jaeger
Phil Blundell
Richard Henderson
DJ Delorie
H.J. Lu
Diego Novillo
Geoffrey Keating
Hans-Peter Nilsson
Jakub Jelinek
Bernd Schmidt
Eric Christopher
Aldy Hernandez
Timothy Wall
Alexandre Oliva
Jeff Law
Denis Chertykov
Jason Eckhardt
Andrew Cagney
Ulf Carlsson
David O'Brien
Scott Bambrough
Donald Lindsay
J.T. Conklin
Ian Lance Taylor
Clinton Popetz
Joern Rennecke