Commit Graph

1082 Commits

Author SHA1 Message Date
Christophe Lyon
d1b0dd54ab [ARM] libgcc: Remove unsupported code for __ARM_ARCH__ < 4
2018-06-21  Christophe Lyon  <christophe.lyon@linaro.org>

	libgcc/
	* config/arm/ieee754-df.S: Remove code for __ARM_ARCH__ < 4, no
	longer supported.
	* config/arm/ieee754-sf.S: Likewise.

From-SVN: r261840
2018-06-21 13:01:05 +02:00
Than McIntosh
1f3fa52553 re PR libgcc/86213 (-fsplit-stack runtime may clobber SSE input param reg)
libgcc/:
	PR libgcc/86213
	* generic-morestack.c (allocate_segment): Move calls to getenv and
	getpagesize to __morestack_load_mmap.
	(__morestack_load_mmap) Initialize static_pagesize and
	use_guard_page here so as to avoid clobbering SSE regs during a
	__morestack call.
gcc/testsuite/:
	* gcc.dg/split-8.c: New.

From-SVN: r261823
2018-06-20 21:11:23 +00:00
Michael Meissner
6a8886e45f re PR target/85358 (PowerPC: Using -mabi=ieeelongdouble -mcpu=power9 breaks __ibm128)
[gcc]
2018-06-18  Michael Meissner  <meissner@linux.ibm.com>

	PR target/85358
	* config/rs6000/rs6000-modes.def (toplevel): Rework the 128-bit
	floating point modes, so that IFmode is numerically greater than
	TFmode, which is greater than KFmode using FRACTIONAL_FLOAT_MODE
	to declare the ordering.  This prevents IFmode from being
	converted to TFmode when long double is IEEE 128-bit on an ISA 3.0
	machine.  Include rs6000-modes.h to share the fractional values
	between genmodes* and the rest of the compiler.
	(IFmode): Likewise.
	(KFmode): Likewise.
	(TFmode): Likewise.
	* config/rs6000/rs6000-modes.h: New file.
	* config/rs6000/rs6000.c (rs6000_debug_reg_global): Change the
	meaning of rs6000_long_double_size so that 126..128 selects an
	appropriate 128-bit floating point type.
	(rs6000_option_override_internal): Likewise.
	* config/rs6000/rs6000.h (toplevel): Include rs6000-modes.h.
	(TARGET_LONG_DOUBLE_128): Change the meaning of
	rs6000_long_double_size so that 126..128 selects an appropriate
	128-bit floating point type.
	(LONG_DOUBLE_TYPE_SIZE): Update comment.
	* config/rs6000/rs6000.md (trunciftf2): Correct the modes of the
	source and destination to match the standard usage.
	(truncifkf2): Likewise.
	(copysign<mode>3, IEEE iterator): Rework copysign of float128 on
	ISA 2.07 to use an explicit clobber, instead of passing in a
	temporary.
	(copysign<mode>3_soft): Likewise.

[libgcc]
2018-06-18  Michael Meissner  <meissner@linux.ibm.com>

	* config/rs6000/t-float128 (FP128_CFLAGS_SW): Compile float128
	support modules with -mno-gnu-attribute.
	* config/rs6000/t-float128-hw (FP128_CFLAGS_HW): Likewise.

From-SVN: r261712
2018-06-18 19:10:08 +00:00
Olivier Hainque
fb9970973a t-vxworks (LIBGCC_INCLUDES): Add -I$(MULTIBUILDTOP)../../gcc/include.
2018-06-07  Olivier Hainque  <hainque@adacore.com>

        * config/t-vxworks (LIBGCC_INCLUDES): Add
        -I$(MULTIBUILDTOP)../../gcc/include.
        * config/t-vxworks7: Likewise. Reformat a bit to match
        the t-vxworks layout.

From-SVN: r261273
2018-06-07 13:31:24 +00:00
Olga Makhotina
a548a5a1d6 config.gcc: Support "tremont".
2018-06-07  Olga Makhotina  <olga.makhotina@intel.com>

gcc/

        * config.gcc: Support "tremont".
        * config/i386/driver-i386.c (host_detect_local_cpu): Detect "tremont".
        * config/i386/i386-c.c (ix86_target_macros_internal): Handle
        PROCESSOR_TREMONT.
        * config/i386/i386.c (m_TREMONT): Define.
        (processor_target_table): Add "tremont".
        (PTA_TREMONT): Define.
        (ix86_lea_outperforms): Add TARGET_TREMONT.
        (get_builtin_code_for_version): Handle PROCESSOR_TREMONT.
        (fold_builtin_cpu): Add M_INTEL_TREMONT, replace M_INTEL_GOLDMONT
        and M_INTEL_GOLDMONT_PLUS.
        (fold_builtin_cpu): Add "tremont".
        (ix86_add_stmt_cost): Add TARGET_TREMONT.
        (ix86_option_override_internal): Add "tremont".
        * config/i386/i386.h (processor_costs): Define TARGET_TREMONT.
        (processor_type): Add PROCESSOR_TREMONT.
        * config/i386/x86-tune.def: Add m_TREMONT.
        * doc/invoke.texi: Add tremont as x86 -march=/-mtune= CPU type.

gcc/testsuite/

        * gcc.target/i386/funcspec-56.inc: Test arch=tremont.

libgcc/

        * config/i386/cpuinfo.h (processor_types): Add INTEL_TREMONT.

From-SVN: r261270
2018-06-07 13:07:05 +02:00
Martin Liska
244aebfd6c Fix compilation of libgcov with GCOV_LOCKED=0.
2018-06-07  Martin Liska  <mliska@suse.cz>

	* libgcov-driver.c: Rename cs_all to all and assign it from
        all_prg.

From-SVN: r261261
2018-06-07 04:23:16 +00:00
Martin Liska
6c086e8c75 Fix libgcov-driver-system bootstrap failure (PR bootstrap/86057).
2018-06-07  Martin Liska  <mliska@suse.cz>

        PR bootstrap/86057
	* libgcov-driver-system.c (replace_filename_variables): Use
        memcpy instead of mempcpy.
	(allocate_filename_struct): Do not allocate filename, allocate
        prefix and set it.
	(gcov_exit_open_gcda_file): Allocate memory for gf->filename
        here and properly copy content into it.
	* libgcov-driver.c (struct gcov_filename): Remove max_length
        field, change prefix from size_t into char *.
	(compute_summary): Do not calculate longest filename.
	(gcov_do_dump): Release memory of gf.filename after each file.
	* libgcov-util.c (compute_summary): Use new signature of
        compute_summary.
	(calculate_overlap): Likewise.

From-SVN: r261260
2018-06-07 04:21:35 +00:00
Martin Liska
97a53d1d04 Support variables in expansion of -fprofile-generate option (PR gcov-profile/47618).
2018-06-05  Martin Liska  <mliska@suse.cz>

	PR gcov-profile/47618
	* doc/invoke.texi: Document how -fprofile-dir format
        is extended.
2018-06-05  Martin Liska  <mliska@suse.cz>

	PR gcov-profile/47618
	* libgcov-driver-system.c (replace_filename_variables): New
        function.
	(gcov_exit_open_gcda_file): Use it.

From-SVN: r261199
2018-06-05 12:10:22 +00:00
Martin Liska
7f3577f528 Simplify gcov_histogram as it's used only for ARCS counters.
2018-06-05  Martin Liska  <mliska@suse.cz>

	* auto-profile.c (read_autofdo_file): Do not use
	gcov_ctr_summary struct.
	(afdo_callsite_hot_enough_for_early_inline): Likewise.
	* coverage.c (struct counts_entry): Likewise.
	(read_counts_file): Read just single summary entry.
	(get_coverage_counts): Use gcov_summary struct.
	* coverage.h (get_coverage_counts): Likewise.
	* gcov-dump.c (dump_working_sets): Likewise.
	(tag_summary): Dump just single summary.
	* gcov-io.c (gcov_write_summary): Write just histogram
	summary.
	(gcov_read_summary): Read just single summary.
	(compute_working_sets): Use gcov_summary struct.
	* gcov-io.h (GCOV_TAG_SUMMARY_LENGTH): Remove usage
	of GCOV_COUNTERS_SUMMABLE.
	(GCOV_COUNTERS_SUMMABLE): Remove.
	(GCOV_FIRST_VALUE_COUNTER): Replace with
	GCOV_COUNTER_V_INTERVAL.
	(struct gcov_ctr_summary): Remove.
	(struct gcov_summary): Directly use fields of former
	gcov_ctr_summary.
	(compute_working_sets): Use gcov_summary struct.
	* gcov.c (read_count_file): Do not use ctrs fields.
	* lto-cgraph.c (merge_profile_summaries): Use gcov_summary
	struct.
	* lto-streamer.h (struct GTY): Make profile_info gcov_summary
	struct.
	* profile.c: Likewise.
	* profile.h: Likewise.
2018-06-05  Martin Liska  <mliska@suse.cz>

	* libgcov-driver.c (gcov_compute_histogram): Remove usage
	of gcov_ctr_summary.
	(compute_summary): Do it just for a single summary.
	(merge_one_data): Likewise.
	(merge_summary): Simplify as we read just single summary.
	(dump_one_gcov): Pass proper argument.
	* libgcov-util.c (compute_one_gcov): Simplify as we have just
	single summary.
	(gcov_info_count_all_cold): Likewise.
	(calculate_overlap): Likewise.

From-SVN: r261189
2018-06-05 08:13:31 +00:00
Chung-Ju Wu
cf3cd43d5a [NDS32] Support Linux target for nds32.
gcc/
	* config.gcc (nds32*): Use nds32-linux.opt and nds32-elf.opt.
	(nds32le-*-*, nds32be-*-*): Integrate checking process.
	(nds32*-*-*): Add glibc and uclibc conditions.
	* common/config/nds32/nds32-common.c (nds32_except_unwind_info): New.
	(TARGET_EXCEPT_UNWIND_INFO): Define.
	* config/nds32/elf.h: New file.
	* config/nds32/linux.h: New file.
	* config/nds32/nds32-elf.opt: New file.
	* config/nds32/nds32-linux.opt: New file.
	* config/nds32/nds32-fp-as-gp.c
	(pass_nds32_fp_as_gp::gate): Consider TARGET_LINUX_ABI.
	* config/nds32/nds32.c (nds32_conditional_register_usage): Consider
	TARGET_LINUX_ABI.
	(nds32_asm_file_end): Ditto.
	(nds32_print_operand): Ditto.
	(nds32_insert_attributes): Ditto.
	(nds32_init_libfuncs): New function.
	(TARGET_HAVE_TLS): Define.
	(TARGET_INIT_LIBFUNCS): Define.
	* config/nds32/nds32.h (TARGET_DEFAULT_RELAX): Apply different relax
	spec content.
	(TARGET_ELF): Apply different mcmodel setting.
	(LINK_SPEC, LIB_SPEC, STARTFILE_SPEC, ENDFILE_SPEC): The content has
	been migrated into elf.h and linux.h files.
	* config/nds32/nds32.md (add_pc): Consider TARGET_LINUX_ABI.
	* config/nds32/nds32.opt (mvh): Consider TARGET_LINUX_ABI.
	(mcmodel): The content has been migrated into nds32-elf.opt and
	nds32-linux.opt files.
	* config/nds32/t-elf: New file.
	* config/nds32/t-linux: New file.

libgcc/
	* config.host (nds32*-linux*): New.
	* config/nds32/linux-atomic.c: New file.
	* config/nds32/linux-unwind.h: New file.

Co-Authored-By: Kito Cheng <kito.cheng@gmail.com>
Co-Authored-By: Monk Chiang <sh.chiang04@gmail.com>

From-SVN: r261116
2018-06-02 14:22:12 +00:00
Uros Bizjak
8b8003ed54 re PR target/85591 (__builtin_cpu_is() is not detecting bdver2 with Model = 0x02)
PR target/85591
	* config/i386/cpuinfo.c (get_amd_cpu): Return
	AMDFAM15H_BDVER2 for AMDFAM15H model 0x2.

From-SVN: r261036
2018-05-31 21:45:54 +02:00
Rasmus Villemoes
bbdf026f43 * crtstuff.c: Remove declaration of _Jv_RegisterClasses.
From-SVN: r260980
2018-05-30 17:21:48 -06:00
Martin Liska
0e8f29daae libgcov: report about a different timestamp (PR gcov-profile/85759).
2018-05-29  Martin Liska  <mliska@suse.cz>

        PR gcov-profile/85759
	* doc/gcov.texi: Document GCOV_ERROR_FILE and GCOV_EXIT_AT_ERROR
	env variables.
2018-05-29  Martin Liska  <mliska@suse.cz>

        PR gcov-profile/85759
	* libgcov-driver-system.c (gcov_error): Introduce usage of
        GCOV_EXIT_AT_ERROR env. variable.
	* libgcov-driver.c (merge_one_data): Print error that we
        overwrite a gcov file with a different timestamp.

From-SVN: r260895
2018-05-29 12:11:21 +00:00
Kalamatee
54fd159056 lb1sf68.S (Laddsf$nf): Fix sign bit handling in path to Lf$finfty.
2018-05-23  Kalamatee  <kalamatee@gmail.com>

	* config/m68k/lb1sf68.S (Laddsf$nf): Fix sign bit handling in
	path to Lf$finfty.

From-SVN: r260626
2018-05-23 16:29:01 -06:00
Kito Cheng
09baee1ab1 RISC-V: Add RV32E support.
Kito Cheng <kito.cheng@gmail.com>
	Monk Chiang  <sh.chiang04@gmail.com>

	gcc/
	* common/config/riscv/riscv-common.c (riscv_parse_arch_string):
	Add support to parse rv32e*.  Clear MASK_RVE for rv32i and rv64i.
	* config.gcc (riscv*-*-*): Add support for rv32e* and ilp32e.
	* config/riscv/riscv-c.c (riscv_cpu_cpp_builtins): Define
	__riscv_32e when TARGET_RVE.  Handle ABI_ILP32E as soft-float ABI.
	* config/riscv/riscv-opts.h (riscv_abi_type): Add ABI_ILP32E.
	* config/riscv/riscv.c (riscv_compute_frame_info): When TARGET_RVE,
	compute save_libcall_adjustment properly.
	(riscv_option_override): Call error if TARGET_RVE and not ABI_ILP32E.
	(riscv_conditional_register_usage): Handle TARGET_RVE and ABI_ILP32E.
	* config/riscv/riscv.h (UNITS_PER_FP_ARG): Handle ABI_ILP32E.
	(STACK_BOUNDARY, ABI_STACK_BOUNDARY): Handle TARGET_RVE.
	(GP_REG_LAST, MAX_ARGS_IN_REGISTERS): Likewise.
	(ABI_SPEC): Handle mabi=ilp32e.
	* config/riscv/riscv.opt (abi_type): Add ABI_ILP32E.
	(RVE): Add RVE mask.
	* doc/invoke.texi (RISC-V options) <-mabi>: Add ilp32e info.
	<-march>: Add rv32e as an example.

	gcc/testsuite/
	* gcc.dg/stack-usage-1.c: Add support for rv32e.

	libgcc/
	* config/riscv/save-restore.S: Add support for rv32e.

Co-Authored-By: Jim Wilson <jimw@sifive.com>
Co-Authored-By: Monk Chiang <sh.chiang04@gmail.com>

From-SVN: r260384
2018-05-18 15:53:55 -07:00
Kyrylo Tkachov
c3f808d3f8 [arm][1/2] Remove support for deprecated -march=armv5 and armv5e
The -march=armv5 and armv5e options have been deprecated in GCC 7 [1].
This patch removes support for them.
It's mostly mechanical stuff. The functionality that was previously
gated on arm_arch5 is now gated on arm_arch5t and the functionality
that was gated on arm_arch5e is now gated on arm_arch5te.

A path in TARGET_OS_CPP_BUILTINS for VxWorks is now unreachable and
therefore is deleted.

References to armv5 and armv5e are deleted/updated throughout the
source tree and testsuite.

Bootstrapped and tested on arm-none-linux-gnueabihf.
Also built a cc1 for arm-wrs-vxworks as a sanity check.

        * config/arm/arm-cpus.in (armv5, armv5e): Delete features.
        (armv5t, armv5te): New features.
        (ARMv5, ARMv5e): Delete fgroups.
        (ARMv5t, ARMv5te): Adjust for above changes.
        (ARMv6m): Likewise.
        (armv5, armv5e): Delete arches.
        * config/arm/arm.md (*call_reg_armv5): Use arm_arch5t instead of
        arm_arch5.
        (*call_reg_arm): Likewise.
        (*call_value_reg_armv5): Likewise.
        (*call_value_reg_arm): Likewise.
        (*call_symbol): Likewise.
        (*call_value_symbol): Likewise.
        (*sibcall_insn): Likewise.
        (*sibcall_value_insn): Likewise.
        (clzsi2): Likewise.
        (prefetch): Likewise.
        (define_split and define_peephole2 dependent on arm_arch5):
        Likewise.
        * config/arm/arm.h (TARGET_LDRD): Use arm_arch5te instead of
        arm_arch5e.
        (TARGET_ARM_QBIT): Likewise.
        (TARGET_DSP_MULTIPLY): Likewise.
        (enum base_architecture): Delete BASE_ARCH_5, BASE_ARCH_5E.
        (arm_arch5, arm_arch5e): Delete.
        (arm_arch5t, arm_arch5te): Declare.
        * config/arm/arm.c (arm_arch5, arm_arch5e): Delete.
        (arm_arch5t): Declare.
        (arm_option_reconfigure_globals): Update for the above.
        (arm_options_perform_arch_sanity_checks): Update comment, replace
        use of arm_arch5 with arm_arch5t.
        (use_return_insn): Likewise.
        (arm_emit_call_insn): Likewise.
        (output_return_instruction): Likewise.
        (arm_final_prescan_insn): Likewise.
        (arm_coproc_builtin_available): Likewise.
        * config/arm/arm-c.c (arm_cpu_builtins): Replace arm_arch5 and
        arm_arch5e with arm_arch5t and arm_arch5te.
        * config/arm/arm-protos.h (arm_arch5, arm_arch5e): Delete.
        (arm_arch5t, arm_arch5te): Declare.
        * config/arm/arm-tables.opt: Regenerate.
        * config/arm/t-arm-elf: Remove references to armv5, armv5e.
        * config/arm/t-multilib: Likewise.
        * config/arm/thumb1.md (*call_reg_thumb1_v5): Check arm_arch5t
        instead of arm_arch5.
        (*call_reg_thumb1): Likewise.
        (*call_value_reg_thumb1_v5): Likewise.
        (*call_value_reg_thumb1): Likewise.
        * config/arm/vxworks.h (TARGET_OS_CPP_BUILTINS): Remove now
        unreachable path.
        * doc/invoke.texi (ARM Options): Remove references to armv5, armv5e.

        * gcc.target/arm/pr40887.c: Update comment.
        * lib/target-supports.exp: Don't generate effective target checks
        and related helpers for armv5.  Update comment.
        * gcc.target/arm/armv5_thumb_isa.c: Delete.
        * gcc.target/arm/di-longlong64-sync-withhelpers.c: Update effective
        target check and options.

        * config/arm/libunwind.S: Update comment relating to armv5.

From-SVN: r260362
2018-05-18 13:08:16 +00:00
Jerome Lambourg
fcf4f8311e arm_cmse.h (cmse_nsfptr_create, [...]): Remove #include <stdint.h>.
2018-05-17  Jerome Lambourg  <lambourg@adacore.com>

	gcc/
	* config/arm/arm_cmse.h (cmse_nsfptr_create, cmse_is_nsfptr): Remove
	#include <stdint.h>.  Replace intptr_t with __INTPTR_TYPE__.

	libgcc/
	* config/arm/cmse.c (cmse_check_address_range): Replace
	UINTPTR_MAX with __UINTPTR_MAX__ and uintptr_t with __UINTPTR_TYPE__.

From-SVN: r260330
2018-05-17 16:36:36 +00:00
Olga Makhotina
74b2bb19f3 config.gcc: Support "goldmont-plus".
2018-05-17  Olga Makhotina  <olga.makhotina@intel.com>

gcc/

	* config.gcc: Support "goldmont-plus".
	* config/i386/driver-i386.c (host_detect_local_cpu): Detect
	"goldmont-plus".
	* config/i386/i386-c.c (ix86_target_macros_internal): Handle
	PROCESSOR_GOLDMONT_PLUS.
	* config/i386/i386.c (m_GOLDMONT_PLUS): Define.
	(processor_target_table): Add "goldmont-plus".
	(PTA_GOLDMONT_PLUS): Define.
	(ix86_lea_outperforms): Add TARGET_GOLDMONT_PLUS.
	(get_builtin_code_for_version): Handle PROCESSOR_GOLDMONT_PLUS.
	(fold_builtin_cpu): Add M_INTEL_GOLDMONT_PLUS.
	(fold_builtin_cpu): Add "goldmont-plus".
	(ix86_add_stmt_cost): Add TARGET_GOLDMONT_PLUS.
	(ix86_option_override_internal): Add "goldmont-plus".
	* config/i386/i386.h (processor_costs): Define TARGET_GOLDMONT_PLUS.
	(processor_type): Add PROCESSOR_GOLDMONT_PLUS.
	* config/i386/x86-tune.def: Add m_GOLDMONT_PLUS.
	* doc/invoke.texi: Add goldmont-plus as x86 -march=/-mtune= CPU type.

libgcc/

	* config/i386/cpuinfo.h (processor_types): Add INTEL_GOLDMONT_PLUS.
	* config/i386/cpuinfo.c (get_intel_cpu): Detect Goldmont Plus.

gcc/testsuite/

	* gcc.target/i386/builtin_target.c: Test goldmont-plus.
	* gcc.target/i386/funcspec-56.inc: Test arch=goldmont-plus.

From-SVN: r260307
2018-05-17 10:13:23 +02:00
Olga Makhotina
50e461dfe3 config.gcc: Support "goldmont".
2018-05-08  Olga Makhotina  <olga.makhotina@intel.com>

gcc/

	* config.gcc: Support "goldmont".
	* config/i386/driver-i386.c (host_detect_local_cpu): Detect "goldmont".
	* config/i386/i386-c.c (ix86_target_macros_internal): Handle
	PROCESSOR_GOLDMONT.
	* config/i386/i386.c (m_GOLDMONT): Define.
	(processor_target_table): Add "goldmont".
	(PTA_GOLDMONT): Define.
	(ix86_lea_outperforms): Add TARGET_GOLDMONT.
	(get_builtin_code_for_version): Handle PROCESSOR_GOLDMONT.
	(fold_builtin_cpu): Add M_INTEL_GOLDMONT.
	(fold_builtin_cpu): Add "goldmont".
	(ix86_add_stmt_cost): Add TARGET_GOLDMONT.
	(ix86_option_override_internal): Add "goldmont".
	* config/i386/i386.h (processor_costs): Define TARGET_GOLDMONT.
	(processor_type): Add PROCESSOR_GOLDMONT.
	* config/i386/i386.md: Add CPU "glm".
	* config/i386/glm.md: New file.
	* config/i386/x86-tune.def: Add m_GOLDMONT.
	* doc/invoke.texi: Add goldmont as x86 -march=/-mtune= CPU type.

libgcc/
	* config/i386/cpuinfo.h (processor_types): Add INTEL_GOLDMONT.
	* config/i386/cpuinfo.c (get_intel_cpu): Detect Goldmont.

gcc/testsuite/

	* gcc.target/i386/builtin_target.c: Test goldmont.
	* gcc.target/i386/funcspec-56.inc: Tests for arch=goldmont and
	arch=silvermont.

From-SVN: r260042
2018-05-08 14:23:08 +02:00
Amaan Cheval
e5f1cdb1b0 config.host (x86_64-*-rtems*): Build crti.o and crtn.o.
2018-05-07  Amaan Cheval  <amaan.cheval@gmail.com>

	* config.host (x86_64-*-rtems*): Build crti.o and crtn.o.

From-SVN: r260007
2018-05-07 16:32:09 +00:00
Andreas Tobler
8f479d7a35 re PR libgcc/84292 (__sync_add_and_fetch returns the old value instead of the new value)
2018-04-27  Andreas Tobler  <andreast@gcc.gnu.org>
	    Maryse Levavasseur <maryse.levavasseur@stormshield.eu>

	PR libgcc/84292
	* config/arm/freebsd-atomic.c (SYNC_OP_AND_FETCH_N): Fix the
	op_and_fetch to return the right result.

Co-Authored-By: Maryse Levavasseur <maryse.levavasseur@stormshield.eu>

From-SVN: r259722
2018-04-27 21:14:05 +02:00
Alan Modra
ae0432915e PR85532, crtend.o built without --enable-initfini-array has bad .eh_frame
PR libgcc/85532
	* config/rs6000/t-crtstuff (CRTSTUFF_T_CFLAGS): Add
	-fno-asynchronous-unwind-tables.

From-SVN: r259702
2018-04-27 18:36:39 +09:30
Chung-Ju Wu
ba169b7424 [NDS32] Fix incorrect settings in sfp-machine.h and t-nds32-newlib for hard fp.
libgcc/
	* config/nds32/sfp-machine.h: Fix settings for NDS32_ABI_2FP_PLUS.
	* config/nds32/t-nds32-newlib (HOST_LIBGCC2_CFLAGS): Use -fwrapv.

From-SVN: r259645
2018-04-25 12:08:14 +00:00
H.J. Lu
ffc2fc06e3 x86: Update __CET__ check
__CET__ has been changed by revision 259522:

commit d59cfa9a4064339cf2bd2da828c4c133f13e57f0
Author: hjl <hjl@138bc75d-0d04-0410-961f-82ee72b054a4>
Date:   Fri Apr 20 13:30:13 2018 +0000

    Define __CET__ for -fcf-protection and remove -mibt

to

    (__CET__ & 1) != 0: -fcf-protection=branch or -fcf-protection=full
    (__CET__ & 2) != 0: -fcf-protection=return or -fcf-protection=full

We should check (__CET__ & 2) != 0 for shadow stack.

libgcc/

	* config/i386/linux-unwind.h: Add (__CET__ & 2) != 0 check
	when including "config/i386/shadow-stack-unwind.h".

libitm/

	* config/x86/sjlj.S (_ITM_beginTransaction): Add
	(__CET__ & 2) != 0 check for shadow stack.
	(GTM_longjmp): Likewise.

From-SVN: r259621
2018-04-24 15:15:51 -07:00
H.J. Lu
7b47ecf2f7 Regenerate configure of target libraries
* configure: Regenerated.

From-SVN: r259610
2018-04-24 09:45:26 -07:00
Michael Meissner
661eb8f9e5 re PR target/85456 (PowerPC: Using -mabi=ieeelongdouble calls wrong function for __builtin_powi.)
[libgcc]
2018-04-20  Michael Meissner  <meissner@linux.ibm.com>

	PR target/85456
	* config/rs6000/_powikf2.c: New file.  Add support for the
	__builtin_powil function when long double is IEEE 128-bit floating
	point.
	* config/rs6000/float128-ifunc.c (__powikf2_resolve): Add
	__powikf2 support.
	(__powikf2): Likewise.
	* config/rs6000/quad-float128.h (__powikf2_sw): Likewise.
	(__powikf2_hw): Likewise.
	(__powikf2): Likewise.
	* config/rs6000/t-float128 (fp128_ppc_funcs): Likewise.
	* config/rs6000/t-float128-hw (fp128_hw_func): Likewise.
	(_powikf2-hw.c): Likewise.

[gcc]
2018-04-20  Michael Meissner  <meissner@linux.ibm.com>

	PR target/85456
	* config/rs6000/rs6000.c (init_float128_ieee): Add support to call
	__powikf2 when long double is IEEE 128-bit.

[gcc/testsuite]
2018-04-20  Michael Meissner  <meissner@linux.ibm.com>

	PR target/85456
	* gcc.target/powerpc/pr85456.c: New test.

From-SVN: r259533
2018-04-20 21:27:08 +00:00
H.J. Lu
5707be3c7d libgcc/CET: Skip signal frames when unwinding shadow stack
When -fcf-protection -mcet is used, I got

FAIL: g++.dg/eh/sighandle.C

(gdb) bt
 #0  _Unwind_RaiseException (exc=exc@entry=0x416ed0)
    at /export/gnu/import/git/sources/gcc/libgcc/unwind.inc:140
 #1  0x00007ffff7d9936b in __cxxabiv1::__cxa_throw (obj=<optimized out>,
    tinfo=0x403dd0 <typeinfo for int@@CXXABI_1.3>, dest=0x0)
    at /export/gnu/import/git/sources/gcc/libstdc++-v3/libsupc++/eh_throw.cc:90
 #2  0x0000000000401255 in sighandler (signo=11, si=0x7fffffffd6f8,
    uc=0x7fffffffd5c0)
    at /export/gnu/import/git/sources/gcc/gcc/testsuite/g++.dg/eh/sighandle.C:9
 #3  <signal handler called> <<<< Signal frame which isn't on shadow stack
 #4  dosegv ()
    at /export/gnu/import/git/sources/gcc/gcc/testsuite/g++.dg/eh/sighandle.C:14
 #5  0x00000000004012e3 in main ()
    at /export/gnu/import/git/sources/gcc/gcc/testsuite/g++.dg/eh/sighandle.C:30
(gdb) p frames
$6 = 5
(gdb)

frame count should be 4, not 5.  This patch skips signal frames when
unwinding shadow stack.

gcc/testsuite/

	PR libgcc/85334
	* g++.dg/torture/pr85334.C: New test.

libgcc/

	PR libgcc/85334
	* unwind-generic.h (_Unwind_Frames_Increment): New.
	* config/i386/shadow-stack-unwind.h (_Unwind_Frames_Increment):
	Likewise.
	* unwind.inc (_Unwind_RaiseException_Phase2): Increment frame
	count with _Unwind_Frames_Increment.
	(_Unwind_ForcedUnwind_Phase2): Likewise.

From-SVN: r259502
2018-04-19 10:05:39 -07:00
H.J. Lu
5f9ca0b8bf libgcc/CET: Add _CET_ENDBR to __stack_split_initialize
Program received signal SIGSEGV, Segmentation fault.
__stack_split_initialize ()
    at /export/gnu/import/git/sources/gcc/libgcc/config/i386/morestack.S:751
751		leaq	-16000(%rsp),%rax	# We should have at least 16K.
Missing separate debuginfos, use: dnf debuginfo-install libgcc-8.0.1-0.21.0.fc28.x86_64
(gdb) disass
Dump of assembler code for function __stack_split_initialize:
=> 0x0000000000402858 <+0>:	lea    -0x3e80(%rsp),%rax
   0x0000000000402860 <+8>:	mov    %rax,%fs:0x70
   0x0000000000402869 <+17>:	sub    $0x8,%rsp
   0x000000000040286d <+21>:	mov    %rsp,%rdi
   0x0000000000402870 <+24>:	mov    $0x3e80,%esi
   0x0000000000402875 <+29>:	callq  0x401810 <__generic_morestack_set_initial_sp>
   0x000000000040287a <+34>:	add    $0x8,%rsp
   0x000000000040287e <+38>:	retq
End of assembler dump.
(gdb)

This patch adds the missing ENDBR to __stack_split_initialize.

	PR libgcc/85379
	* config/i386/morestack.S (__stack_split_initialize): Add
	_CET_ENDBR.

From-SVN: r259497
2018-04-19 08:22:27 -07:00
Jakub Jelinek
a0e1df888d cet.m4 (GCC_CET_FLAGS): Default to --disable-cet, replace --enable-cet=default with --enable-cet=auto.
* config/cet.m4 (GCC_CET_FLAGS): Default to --disable-cet, replace
	--enable-cet=default with --enable-cet=auto.

	* doc/install.texi: Document --disable-cet being the default and
	--enable-cet=auto.

	* configure: Regenerated.

From-SVN: r259487
2018-04-19 09:45:51 +02:00
David Malcolm
001ddaa852 re PR jit/85384 (libgccjit does not work if --with-gcc-major-version is used)
PR jit/85384
	* acx.m4 (GCC_BASE_VER): Remove \$\$ from sed expression.

	* configure.ac (gcc-driver-name.h): Honor --with-gcc-major-version
	by using gcc_base_ver to generate a gcc_driver_version, and use
	it when generating GCC_DRIVER_NAME.
	* configure: Regenerate.

	* configure: Regenerate.

From-SVN: r259462
2018-04-18 11:46:58 +02:00
Jakub Jelinek
a57f99ba1c re PR target/84945 (UBSAN: gcc/config/i386/i386.c:33312:22: runtime error: shift exponent 32 is too large for 32-bit type 'int')
PR target/84945
	* config/i386/cpuinfo.c (set_feature): Wrap into do while (0) to avoid
	-Wdangling-else warnings.  Mask shift counts to avoid
	-Wshift-count-negative and -Wshift-count-overflow false positives.

From-SVN: r259398
2018-04-16 13:22:40 +02:00
Ruslan Bukin
4d47fe5a8f RISC-V: Support for FreeBSD.
gcc/
	* config.gcc (riscv*-*-freebsd*): Add RISC-V FreeBSD support.
	* config/riscv/freebsd.h: New.
	libgcc/
	* config.host (riscv*-*-freebsd*): Add RISC-V FreeBSD support.

From-SVN: r259190
2018-04-06 13:04:17 -07:00
H.J. Lu
059cc8aca7 i386: Enable AVX/AVX512 features only if supported by OSXSAVE
Enable AVX and AVX512 features only if their states are supported by
OSXSAVE.

	PR target/85100
	* config/i386/cpuinfo.c (XCR_XFEATURE_ENABLED_MASK): New.
	(XSTATE_FP): Likewise.
	(XSTATE_SSE): Likewise.
	(XSTATE_YMM): Likewise.
	(XSTATE_OPMASK): Likewise.
	(XSTATE_ZMM): Likewise.
	(XSTATE_HI_ZMM): Likewise.
	(XCR_AVX_ENABLED_MASK): Likewise.
	(XCR_AVX512F_ENABLED_MASK): Likewise.
	(get_available_features): Enable AVX and AVX512 features only
	if their states are supported by OSXSAVE.

From-SVN: r258954
2018-03-29 06:14:06 -07:00
Igor Tsimbalist
f262038551 Fix PR85025: libgcc/config/i386/shadow-stack-unwind.h is wrong.
PR target/85025
	* config/i386/shadow-stack-unwind.h (_Unwind_Frames_Extra):
	Fix a typo, tmp => 255.

From-SVN: r258763
2018-03-22 12:22:31 +01:00
Jakub Jelinek
ae6dca8c65 re PR target/84945 (UBSAN: gcc/config/i386/i386.c:33312:22: runtime error: shift exponent 32 is too large for 32-bit type 'int')
PR target/84945
	* config/i386/i386.c (fold_builtin_cpu): For features above 31
	use __cpu_features2 variable instead of __cpu_model.__cpu_features[0].
	Use 1U instead of 1.  Formatting fixes.

	* gcc.target/i386/pr84945.c: New test.

	* config/i386/cpuinfo.h (__cpu_features2): Declare.
	* config/i386/cpuinfo.c (__cpu_features2): New variable for
	ifndef SHARED only.
	(set_feature): Define.
	(get_available_features): Use set_feature macro.  Set __cpu_features2
	to the second word of features ifndef SHARED.

From-SVN: r258673
2018-03-20 09:14:42 +01:00
Julia Koval
c36b04c146 Add builtin_cpu for cannonlake and new isa features.
gcc/
	* config/i386/i386.c (F_AVX512VBMI2, F_GFNI, F_VPCLMULQDQ,
	F_AVX512VNNI, F_AVX512BITALG): New.

gcc/testsuite/
	* gcc.target/i386/builtin_target.c (check_intel_cpu_model): Add
	cannonlake.
	(check_features): Add avx512vbmi2, gfni, vpclmulqdq, avx512vnni,
	avx512bitalg.

libgcc/
	* config/i386/cpuinfo.c (get_available_features): Add
	FEATURE_AVX512VBMI2, FEATURE_GFNI, FEATURE_VPCLMULQDQ,
	FEATURE_AVX512VNNI, FEATURE_AVX512BITALG.
	* config/i386/cpuinfo.h (processor_features) Add
	FEATURE_AVX512VBMI2, FEATURE_GFNI, FEATURE_VPCLMULQDQ,
	FEATURE_AVX512VNNI, FEATURE_AVX512BITALG.

From-SVN: r258551
2018-03-15 08:52:36 +01:00
Julia Koval
79ab536427 Split-up -march=icelake on -march=icelake-server and -march=icelake-client
Split-up -march=icelake on -march=icelake-server and -march=icelake-client
gcc/
	* config.gcc (icelake-client, icelake-server): New.
	(icelake): Remove.
	* config/i386/i386.c (initial_ix86_tune_features): Extend to 64 bit.
	(initial_ix86_arch_features): Ditto.
	(PTA_SKYLAKE): Add SGX.
	(PTA_ICELAKE): Remove.
	(PTA_ICELAKE_CLIENT): New.
	(PTA_ICELAKE_SERVER): New.
	(ix86_option_override_internal): Split up icelake on icelake client and
	icelake server.
	(get_builtin_code_for_version): Ditto.
	(fold_builtin_cpu): Ditto.
	* config/i386/driver-i386.c (config/i386/driver-i386.c): Ditto.
	* config/i386/i386-c.c (ix86_target_macros_internal): Ditto
	* config/i386/i386.h (processor_type): Ditto.
	* doc/invoke.texi: Ditto.

gcc/testsuite/
	* g++.dg/ext/mv16.C: Split up icelake on icelake client and
	icelake-server.
	* gcc.target/i386/funcspec-56.inc: Ditto.

libgcc/
	* config/i386/cpuinfo.h (processor_subtypes): Split up icelake on
	icelake-client and icelake-server.

From-SVN: r258518
2018-03-14 11:26:38 +01:00
John David Anglin
66a00b11a0 fptr.c (_dl_read_access_allowed): New.
* config/pa/fptr.c (_dl_read_access_allowed): New.
	(__canonicalize_funcptr_for_compare): Use it.

From-SVN: r258310
2018-03-07 00:17:32 +00:00
Jakub Jelinek
ce579a4fe0 re PR debug/83917 (with -mcall-ms2sysv-xlogues, stepping into x86 tail-call restore stub gives bad backtrace)
PR debug/83917
	* configure.ac (AS_HIDDEN_DIRECTIVE): AC_DEFINE_UNQUOTED this to
	$asm_hidden_op if visibility ("hidden") attribute works.
	(HAVE_AS_CFI_SECTIONS): New AC_DEFINE.
	* config/i386/i386-asm.h: Don't include auto-host.h.
	(PACKAGE_VERSION, PACKAGE_NAME, PACKAGE_STRING, PACKAGE_TARNAME,
	PACKAGE_URL): Don't undefine.
	(USE_GAS_CFI_DIRECTIVES): Don't use nor define this macro, instead
	guard cfi_startproc only on ifdef __GCC_HAVE_DWARF2_CFI_ASM.
	(FN_HIDDEN): Change guard from #ifdef HAVE_GAS_HIDDEN to
	#ifdef AS_HIDDEN_DIRECTIVE, use AS_HIDDEN_DIRECTIVE macro in the
	definition instead of hardcoded .hidden.
	* config/i386/cygwin.S: Include i386-asm.h first before .cfi_sections
	directive.  Use #ifdef HAVE_AS_CFI_SECTIONS rather than
	#ifdef HAVE_GAS_CFI_SECTIONS_DIRECTIVE to guard .cfi_sections.
	(USE_GAS_CFI_DIRECTIVES): Don't define.
	* configure: Regenerated.
	* config.in: Likewise.

From-SVN: r258057
2018-02-28 09:59:15 +01:00
Jakub Jelinek
e586831971 re PR debug/83917 (with -mcall-ms2sysv-xlogues, stepping into x86 tail-call restore stub gives bad backtrace)
PR debug/83917
	* config/i386/i386-asm.h (PACKAGE_VERSION, PACKAGE_NAME,
	PACKAGE_STRING, PACKAGE_TARNAME, PACKAGE_URL): Undefine between
	inclusion of auto-target.h and auto-host.h.
	(USE_GAS_CFI_DIRECTIVES): Define if not defined already based on
	__GCC_HAVE_DWARF2_CFI_ASM.
	(cfi_startproc, cfi_endproc, cfi_adjust_cfa_offset,
	cfi_def_cfa_register, cfi_def_cfa, cfi_register, cfi_offset, cfi_push,
	cfi_pop): Define.
	* config/i386/cygwin.S: Don't include auto-host.h here, just
	define USE_GAS_CFI_DIRECTIVES to 1 or 0 and include i386-asm.h.
	(cfi_startproc, cfi_endproc, cfi_adjust_cfa_offset,
	cfi_def_cfa_register, cfi_register, cfi_push, cfi_pop): Remove.
	* config/i386/resms64fx.h: Add cfi_* directives.
	* config/i386/resms64x.h: Likewise.

From-SVN: r258010
2018-02-26 20:46:34 +01:00
Max Filippov
faef260ee8 libgcc: xtensa: fix build with -mtext-section-literals
libgcc/
2018-02-20  Max Filippov  <jcmvbkbc@gmail.com>

	* config/xtensa/ieee754-df.S (__adddf3_aux): Add
	.literal_position directive.
	* config/xtensa/ieee754-sf.S (__addsf3_aux): Likewise.

From-SVN: r257862
2018-02-20 20:55:56 +00:00
Igor Tsimbalist
14e335edc8 CET shouldn't be enabled in 32-bit run-time libraries by defualt
ENDBR32 and RDSSPD are multi-byte NOPs on x86-64 processors and
newer x86 processors, starting Pentium Pro.  They are UD on older
32-bit processors. Detect this at configure time and adjust the
default value for enable_cet. GCC will enable CET in 32-bit run-time
libraries in any case if --enable-cet is used to configure GCC.

	PR target/84148
	* config/cet.m4: Check if target support multi-byte NOPS (SSE).
	* libatomic/configure: Regenerate.
	* libbacktrace/configure: Likewise.
	* libgcc/configure: Likewise.
	* libgfortran/configure: Likewise.
	* libgomp/configure: Likewise.
	* libitm/configure: Likewise.
	* libmpx/configure: Likewise.
	* libobjc/configure: Likewise.
	* libquadmath/configure: Likewise.
	* libsanitizer/configure: Likewise.
	* libssp/configure: Likewise.
	* libstdc++-v3/configure: Likewise.
	* libvtv/configure: Likewise.

From-SVN: r257809
2018-02-19 17:25:49 +01:00
Igor Tsimbalist
95df04335b Additional fix for PR 84239.
PR target/84239
	* libgcc/config/i386/shadow-stack-unwind.h (_Unwind_Frames_Extra):
	Include cetintrin.h not x86intrin.h.

From-SVN: r257730
2018-02-16 11:19:14 +01:00
Igor Tsimbalist
f8de876d8c Reimplement CET intrinsics for rdssp/incssp insn.
Introduce a couple of new CET intrinsics for reading and updating a
shadow stack pointer (_get_ssp and _inc_ssp). They replace the existing
_rdssp[d|q] and _incssp[d|q] instrinsics.

	PR target/84239
	* gcc/config/i386/cetintrin.h: Remove _rdssp[d|q] and
	add _get_ssp intrinsics. Remove argument from
	__builtin_ia32_rdssp[d|q].
	* gcc/config/i386/i386-builtin-types.def: Add UINT_FTYPE_VOID.
	* gcc/config/i386/i386-builtin.def: Remove argument from
	__builtin_ia32_rdssp[d|q].
	* gcc/config/i386/i386.c: Use UINT_FTYPE_VOID. Use
	ix86_expand_special_args_builtin for _rdssp[d|q].
	* gcc/config/i386/i386.md: Remove argument from rdssp[si|di] insn.
	Clear register before usage.
	* doc/extend.texi: Remove argument from __builtin_ia32_rdssp[d|q].
	Add documentation for new _get_ssp and _inc_ssp intrinsics.
	* testsuite/gcc.target/i386/cet-intrin-3.c: Use new _get_ssp and
	_inc_ssp intrinsics.
	* testsuite/gcc.target/i386/cet-intrin-4.c: Likewise.
	* testsuite/gcc.target/i386/cet-rdssp-1.c: Remove argument from
	__builtin_ia32_rdssp[d|q].
	* libgcc/config/i386/shadow-stack-unwind.hi (_Unwind_Frames_Extra):
	Use new _get_ssp and _inc_ssp intrinsics.

From-SVN: r257660
2018-02-14 16:06:21 +01:00
Julia Koval
02da1e9cae Add -march=icelake.
gcc/
	* config.gcc: Add -march=icelake.
	* config/i386/driver-i386.c (host_detect_local_cpu): Detect icelake.
	* config/i386/i386-c.c (ix86_target_macros_internal): Handle icelake.
	* config/i386/i386.c (processor_costs): Add m_ICELAKE.
	(PTA_ICELAKE, PTA_AVX512VNNI, PTA_GFNI, PTA_VAES, PTA_AVX512VBMI2,
	PTA_VPCLMULQDQ, PTA_RDPID, PTA_AVX512BITALG): New.
	(processor_target_table): Add icelake.
	(ix86_option_override_internal): Handle new PTAs.
	(get_builtin_code_for_version): Handle icelake.
	(M_INTEL_COREI7_ICELAKE): New.
	(fold_builtin_cpu): Handle icelake.
	* config/i386/i386.h (TARGET_ICELAKE, PROCESSOR_ICELAKE): New.
	* doc/invoke.texi: Add -march=icelake.
gcc/testsuite/
	* gcc.target/i386/funcspec-56.inc: Handle new march.
	* g++.dg/ext/mv16.C: Ditto.
libgcc/
	* config/i386/cpuinfo.h (processor_subtypes): Add INTEL_COREI7_ICELAKE.

From-SVN: r257331
2018-02-02 14:45:57 +01:00
Claudiu Zissulescu
048c6a9adc [ARC] Add support for reduced register file set
gcc/
2018-01-26  Claudiu Zissulescu  <claziss@synopsys.com>

        * config/arc/arc-arches.def: Option mrf16 valid for all
        architectures.
        * config/arc/arc-c.def (__ARC_RF16__): New predefined macro.
        * config/arc/arc-cpus.def (em_mini): New cpu with rf16 on.
        * config/arc/arc-options.def (FL_RF16): Add mrf16 option.
        * config/arc/arc-tables.opt: Regenerate.
        * config/arc/arc.c (arc_conditional_register_usage): Handle
        reduced register file case.
        (arc_file_start): Set must have build attributes.
        * config/arc/arc.h (MAX_ARC_PARM_REGS): Conditional define using
        mrf16 option value.
        * config/arc/arc.opt (mrf16): Add new option.
        * config/arc/elf.h (ATTRIBUTE_PCS): Define.
        * config/arc/genmultilib.awk: Handle new mrf16 option.
        * config/arc/linux.h (ATTRIBUTE_PCS): Define.
        * config/arc/t-multilib: Regenerate.
        * doc/invoke.texi (ARC Options): Document mrf16 option.

libgcc/
2018-01-26  Claudiu Zissulescu  <claziss@synopsys.com>

        * config/arc/lib1funcs.S (__udivmodsi4): Use safe version for RF16
        option.
        (__divsi3): Use RF16 safe registers.
        (__modsi3): Likewise.

From-SVN: r257083
2018-01-26 12:34:00 +01:00
Max Filippov
0889f16859 libgcc: xtensa: fix NaN return from add/sub/mul/div helpers
libgcc/
2018-01-23  Max Filippov  <jcmvbkbc@gmail.com>

	* config/xtensa/ieee754-df.S (__addsf3, __subsf3, __mulsf3)
	(__divsf3): Make NaN return value quiet.
	* config/xtensa/ieee754-sf.S (__adddf3, __subdf3, __muldf3)
	(__divdf3): Make NaN return value quiet.

From-SVN: r257002
2018-01-23 21:42:52 +00:00
Sebastian Perta
bc8b0d0428 rl78.md: New define_expand "anddi3".
2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>

	* config/rl78/rl78.md: New define_expand "anddi3".

2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>

	* config/rl78/anddi3.S: New assembly file.
	* config/rl78/t-rl78: Added anddi3.S to LIB2ADD.

From-SVN: r256958
2018-01-22 19:23:15 +00:00
Sebastian Perta
99cc06ea06 rl78.md: New define_expand "umindi3".
2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>

	* config/rl78/rl78.md: New define_expand "umindi3".

2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>

	* config/rl78/umindi3.S: New assembly file.
	* config/rl78/t-rl78: Added umindi3.S to LIB2ADD.

From-SVN: r256957
2018-01-22 18:51:28 +00:00
Sebastian Perta
6e9007a093 rl78.md: New define_expand "smindi3".
2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>

	* config/rl78/rl78.md: New define_expand "smindi3".

2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>

	* config/rl78/smindi3.S: New assembly file.
	* config/rl78/t-rl78: Added smindi3.S to LIB2ADD.

From-SVN: r256954
2018-01-22 18:17:09 +00:00
Sebastian Perta
d975e49487 rl78.md: New define_expand "smaxdi3".
2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>

	* config/rl78/rl78.md: New define_expand "smaxdi3".

2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>
 
	* config/rl78/smaxdi3.S: New assembly file.
	* config/rl78/t-rl78: Added smaxdi3.S to LIB2ADD.

From-SVN: r256953
2018-01-22 17:38:26 +00:00
Sebastian Perta
6a18c14681 fixed year in gcc/ChangeLog and libgcc/ChangeLog
From-SVN: r256949
2018-01-22 15:05:59 +00:00
Sebastian Perta
5dd16013d4 rl78.md: New define_expand "umaxdi3".
2017-01-22  Sebastian Perta  <sebastian.perta@renesas.com>

	* config/rl78/rl78.md: New define_expand "umaxdi3".

2017-01-22  Sebastian Perta  <sebastian.perta@renesas.com>
 
	* config/rl78/umaxdi3.S: New assembly file.
	* config/rl78/t-rl78: Added umaxdi3.S to LIB2ADD.

From-SVN: r256948
2018-01-22 15:00:59 +00:00
John David Anglin
07baf4a541 re PR lto/83452 (FAIL: gfortran.dg/save_6.f90 -O0 (test for excess errors))
PR lto/83452
	* config/pa/stublib.c (L_gnu_lto_v1): New stub definition.
	* config/pa/t-stublib (gnu_lto_v1-stub.o): Add make fragment.

From-SVN: r256933
2018-01-21 17:52:44 +00:00
Richard Sandiford
dbc3af4fc6 SVE unwinding
This patch adds support for unwinding frames that use the SVE
pseudo VG register.  We want this register to act like a normal
register if the CFI explicitly sets it, but want to provide a
default value otherwise.  Computing the default value requires
an SVE target, so we only want to compute it on demand.

aarch64_vg uses a hard-coded .inst in order to avoid a build
dependency on binutils 2.28 or later.

2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
	* doc/tm.texi.in (DWARF_LAZY_REGISTER_VALUE): Document.
	* doc/tm.texi: Regenerate.

libgcc/
	* config/aarch64/value-unwind.h (aarch64_vg): New function.
	(DWARF_LAZY_REGISTER_VALUE): Define.
	* unwind-dw2.c (_Unwind_GetGR): Use DWARF_LAZY_REGISTER_VALUE
	to provide a fallback register value.

gcc/testsuite/
	* g++.target/aarch64/sve/aarch64-sve.exp: New harness.
	* g++.target/aarch64/sve/catch_1.C: New test.
	* g++.target/aarch64/sve/catch_2.C: Likewise.
	* g++.target/aarch64/sve/catch_3.C: Likewise.
	* g++.target/aarch64/sve/catch_4.C: Likewise.
	* g++.target/aarch64/sve/catch_5.C: Likewise.
	* g++.target/aarch64/sve/catch_6.C: Likewise.

Reviewed-by: James Greenhalgh <james.greenhalgh@arm.com>

From-SVN: r256615
2018-01-13 17:56:52 +00:00
Michael Meissner
68df9882b2 quad-float128.h (IBM128_TYPE): Explicitly use __ibm128, instead of trying to use long double.
2018-01-08  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* config/rs6000/quad-float128.h (IBM128_TYPE): Explicitly use
	__ibm128, instead of trying to use long double.
	(CVT_FLOAT128_TO_IBM128): Use TFtype instead of __float128 to
	accomidate -mabi=ieeelongdouble multilibs.
	(CVT_IBM128_TO_FLOAT128): Likewise.
	* config/rs6000/ibm-ldouble.c (IBM128_TYPE): New macro to define
	the appropriate IBM extended double type.
	(__gcc_qadd): Change all occurances of long double to IBM128_TYPE.
	(__gcc_qsub): Likewise.
	(__gcc_qmul): Likewise.
	(__gcc_qdiv): Likewise.
	(pack_ldouble): Likewise.
	(__gcc_qneg): Likewise.
	(__gcc_qeq): Likewise.
	(__gcc_qne): Likewise.
	(__gcc_qge): Likewise.
	(__gcc_qle): Likewise.
	(__gcc_stoq): Likewise.
	(__gcc_dtoq): Likewise.
	(__gcc_itoq): Likewise.
	(__gcc_utoq): Likewise.
	(__gcc_qunord): Likewise.
	* config/rs6000/_mulkc3.c (toplevel): Include soft-fp.h and
	quad-float128.h for the definitions.
	(COPYSIGN): Use the f128 version instead of the q version.
	(INFINITY): Likewise.
	(__mulkc3): Use TFmode/TCmode for float128 scalar/complex types.
	* config/rs6000/_divkc3.c (toplevel): Include soft-fp.h and
	quad-float128.h for the definitions.
	(COPYSIGN): Use the f128 version instead of the q version.
	(INFINITY): Likewise.
	(FABS): Likewise.
	(__divkc3): Use TFmode/TCmode for float128 scalar/complex types.
	* config/rs6000/extendkftf2-sw.c (__extendkftf2_sw): Likewise.
	* config/rs6000/trunctfkf2-sw.c (__trunctfkf2_sw): Likewise.

From-SVN: r256354
2018-01-08 22:11:24 +00:00
Michael Meissner
d5eea0f7cc quad-float128.h (IBM128_TYPE): Explicitly use __ibm128, instead of trying to use long double.
2018-01-08  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* config/rs6000/quad-float128.h (IBM128_TYPE): Explicitly use
	__ibm128, instead of trying to use long double.
	(CVT_FLOAT128_TO_IBM128): Use TFtype instead of __float128 to
	accomidate -mabi=ieeelongdouble multilibs.
	(CVT_IBM128_TO_FLOAT128): Likewise.
	* config/rs6000/ibm-ldouble.c (IBM128_TYPE): New macro to define
	the appropriate IBM extended double type.
	(__gcc_qadd): Change all occurances of long double to IBM128_TYPE.
	(__gcc_qsub): Likewise.
	(__gcc_qmul): Likewise.
	(__gcc_qdiv): Likewise.
	(pack_ldouble): Likewise.
	(__gcc_qneg): Likewise.
	(__gcc_qeq): Likewise.
	(__gcc_qne): Likewise.
	(__gcc_qge): Likewise.
	(__gcc_qle): Likewise.
	(__gcc_stoq): Likewise.
	(__gcc_dtoq): Likewise.
	(__gcc_itoq): Likewise.
	(__gcc_utoq): Likewise.
	(__gcc_qunord): Likewise.
	* config/rs6000/_mulkc3.c (toplevel): Include soft-fp.h and
	quad-float128.h for the definitions.
	(COPYSIGN): Use the f128 version instead of the q version.
	(INFINITY): Likewise.
	(__mulkc3): Use TFmode/TCmode for float128 scalar/complex types.
	* config/rs6000/_divkc3.c (toplevel): Include soft-fp.h and
	quad-float128.h for the definitions.
	(COPYSIGN): Use the f128 version instead of the q version.
	(INFINITY): Likewise.
	(FABS): Likewise.
	(__divkc3): Use TFmode/TCmode for float128 scalar/complex types.
	* config/rs6000/extendkftf2-sw.c (__extendkftf2_sw): Likewise.
	* config/rs6000/trunctfkf2-sw.c (__trunctfkf2_sw): Likewise.

From-SVN: r256353
2018-01-08 21:49:37 +00:00
Sebastian Huber
64b371b1b5 RTEMS/EPIPHANY: Add RTEMS support
gcc/
	* config.gcc (epiphany-*-elf*): Add (epiphany-*-rtems*) configuration.
	* config/epiphany/rtems.h: New file.

libgcc/
	* config.host (epiphany-*-elf*): Add (epiphany-*-rtems*)
	configuration.

From-SVN: r256273
2018-01-05 06:17:22 +00:00
Jakub Jelinek
85ec4feb11 Update copyright years.
From-SVN: r256169
2018-01-03 11:03:58 +01:00
Kito Cheng
b8d7e076ed Use C version of multi3 for RVE support.
libgcc/
	* config/riscv/t-elf: Use multi3.c instead of multi3.S.
	* config/riscv/multi3.c: New file.
	* config/riscv/multi3.S: Remove.

From-SVN: r255598
2017-12-12 22:25:06 -08:00
Jim Wilson
3a4c600f38 Add .type and .size directives to riscv libgcc functions.
libgcc/
	* config/riscv/div.S: Use FUNC_* macros.
	* config/riscv/muldi3.S, config/riscv/multi3.S: Likewise
	* config/riscv/save-restore.S: Likewise.
	* config/riscv/riscv-asm.h: New.

From-SVN: r255521
2017-12-08 19:00:57 -08:00
Michael Meissner
6ae3512c0e _mulkc3.c (__mulkc3): Add forward declaration.
2017-11-30  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* config/rs6000/_mulkc3.c (__mulkc3): Add forward declaration.
	* config/rs6000/_divkc3.c (__divkc3): Likewise.

From-SVN: r255289
2017-12-01 05:32:39 +00:00
Michael Meissner
75ad35b5c4 re PR libgcc/83112 (Silence warnings from PowerPC libgcc float128-ifunc.c compilation)
2017-11-30  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR libgcc/83112
	* config/rs6000/float128-ifunc.c (__addkf3_resolve): Use the
	correct type for all ifunc resolvers to silence -Wattribute-alias
	warnings.  Eliminate the forward declaration of the resolver
	functions which is no longer needed.
	(__subkf3_resolve): Likewise.
	(__mulkf3_resolve): Likewise.
	(__divkf3_resolve): Likewise.
	(__negkf2_resolve): Likewise.
	(__eqkf2_resolve): Likewise.
	(__nekf2_resolve): Likewise.
	(__gekf2_resolve): Likewise.
	(__gtkf2_resolve): Likewise.
	(__lekf2_resolve): Likewise.
	(__ltkf2_resolve): Likewise.
	(__unordkf2_resolve): Likewise.
	(__extendsfkf2_resolve): Likewise.
	(__extenddfkf2_resolve): Likewise.
	(__trunckfsf2_resolve): Likewise.
	(__trunckfdf2_resolve): Likewise.
	(__fixkfsi_resolve): Likewise.
	(__fixkfdi_resolve): Likewise.
	(__fixunskfsi_resolve): Likewise.
	(__fixunskfdi_resolve): Likewise.
	(__floatsikf_resolve): Likewise.
	(__floatdikf_resolve): Likewise.
	(__floatunsikf_resolve): Likewise.
	(__floatundikf_resolve): Likewise.
	(__extendkftf2_resolve): Likewise.
	(__trunctfkf2_resolve): Likewise.

	PR libgcc/83103
	* config/rs6000/quad-float128.h (TF): Don't define if long double
	is IEEE 128-bit floating point.
	(TCtype): Define as either TCmode or KCmode, depending on whether
	long double is IEEE 128-bit floating point.
	(__mulkc3_sw): Add declarations for software/hardware versions of
	complex multiply/divide.
	(__divkc3_sw): Likewise.
	(__mulkc3_hw): Likewise.
	(__divkc3_hw): Likewise.
	* config/rs6000/_mulkc3.c (_mulkc3): If we are building ifunc
	handlers to switch between using software emulation and hardware
	float128 instructions, build the complex multiply/divide functions
	for both software and hardware support.
	* config/rs6000/_divkc3.c (_divkc3): Likewise.
	* config/rs6000/float128-ifunc.c (__mulkc3_resolve): Likewise.
	(__divkc3_resolve): Likewise.
	(__mulkc3): Likewise.
	(__divkc3): Likewise.
	* config/rs6000/t-float128-hw (fp128_hardfp_src): Likewise.
	(fp128_hw_src): Likewise.
	(fp128_hw_static_obj): Likewise.
	(fp128_hw_shared_obj): Likewise.
	(_mulkc3-hw.c): Create _mulkc3-hw.c and _divkc3-hw.c from
	_mulkc3.c and _divkc3.c, changing the function name.
	(_divkc3-hw.c): Likewise.
	* config/rs6000/t-float128 (clean-float128): Delete _mulkc3-hw.c
	and _divkc3-hw.c.

From-SVN: r255282
2017-11-30 20:52:27 +00:00
Uros Bizjak
c234d8319b i386.c (processor_target_table): Add skylake_cost for skylake-avx512.
* config/i386/i386.c (processor_target_table): Add skylake_cost for
	skylake-avx512.
	* config/i386/x86-tune-costs.h (skylake_memcpy, skylake_memset,
	skylake_cost): New.

	* config/i386/driver-i386.c (host_detect_local_cpu):
	Detect skylake-avx512.

	* config.gcc: Add -march=cannonlake.
	* config/i386/driver-i386.c (host_detect_local_cpu): Detect cannonlake.
	* config/i386/i386-c.c (ix86_target_macros_internal): Handle cannonlake.
	* config/i386/i386.c (processor_costs): Add m_CANNONLAKE.
	(PTA_CANNONLAKE): New.
	(processor_target_table): Add cannonlake.
	(ix86_option_override_internal): Ditto.
	(fold_builtin_cpu): Ditto.
	(get_builtin_code_for_version): Handle cannonlake.
	(M_INTEL_COREI7_CANNONLAKE): New.
	* config/i386/i386.h (TARGET_CANNONLAKE, PROCESSOR_CANNONLAKE): New.
	* doc/invoke.texi: Add -march=cannonlake.

gcc/testsuite/

	* gcc.target/i386/funcspec-56.inc: Handle new march.
	* g++.dg/ext/mv16.C: Ditto.

libgcc/

	* config/i386/cpuinfo.c (get_intel_cpu): Handle cannonlake.
	* config/i386/cpuinfo.h (processor_subtypes): Add
	INTEL_COREI7_CANNONLAKE.

From-SVN: r255155
2017-11-26 17:11:29 +01:00
Igor Tsimbalist
1ebafce0bc re PR bootstrap/83015 (bootstrap comparison failure on ia64)
PR bootstrap/83015
	* config/cr16/unwind-cr16.c (uw_install_context): Add FRAMES
	parameter.
	* config/xtensa/unwind-dw2-xtensa.c: Likewise
	* config/ia64/unwind-ia64.c: Add frames parameter.
	* unwind-sjlj.c: Likewise.

From-SVN: r254951
2017-11-20 13:30:25 +01:00
Igor Tsimbalist
6a10fff4e2 Add Intel CET support for EH in libgcc.
Control-flow Enforcement Technology (CET), published by Intel,
introduces the Shadow Stack feature, which ensures a return from a
function is done to exactly the same location from where the function
was called. When EH is present the control-flow transfer may skip some
stack frames and the shadow stack has to be adjusted not to signal a
violation of a control-flow transfer. It's done by counting a number
of skiping frames and adjasting shadow stack pointer by this number.

Having new semantic of the 'ret' instruction if CET is supported in HW
the 'ret' instruction cannot be generated in ix86_expand_epilogue when
we are returning after EH is processed. Added a code in
ix86_expand_epilogue to adjust Shadow Stack pointer and to generate an
indirect jump instead of 'ret'. As sp register is used during this
adjustment thus the argument in pro_epilogue_adjust_stack is changed
to update cfa_reg based on whether control-flow instrumentation is set.
Without updating the cfa_reg field there is an assert later in dwarf2
pass related to mismatch the stack register and cfa_reg value.

gcc/
	* config/i386/i386.c (ix86_expand_epilogue): Change simple
	return to indirect jump for EH return if control-flow protection
	is enabled. Change explicit 'false' argument in
	pro_epilogue_adjust_stack with a value of flag_cf_protection.
	* config/i386/i386.md (simple_return_indirect_internal): Remove
	SImode restriction to support 64-bit.

libgcc/
	* config/i386/linux-unwind.h: Include
	config/i386/shadow-stack-unwind.h.
	* config/i386/shadow-stack-unwind.h: New file.
	* unwind-dw2.c: (uw_install_context): Add a frame parameter and
	pass it to _Unwind_Frames_Extra.
	* unwind-generic.h (_Unwind_Frames_Extra): New.
	* unwind.inc (_Unwind_RaiseException_Phase2): Add frames_p
	parameter. Add local variable frames to count number of frames.
	(_Unwind_ForcedUnwind_Phase2): Likewise.
	(_Unwind_RaiseException): Add local variable frames to count
	number of frames, pass it to _Unwind_RaiseException_Phase2 and
	uw_install_context.
	(_Unwind_ForcedUnwind): Likewise.
	(_Unwind_Resume): Likewise.
	(_Unwind_Resume_or_Rethrow): Likewise.

From-SVN: r254876
2017-11-17 16:21:23 +01:00
Igor Tsimbalist
1ecae1fc23 Enable building libgcc with CET options.
Enable building libgcc with CET options by default on Linux/x86 if
binutils supports CET v2.0.  It can be disabled with --disable-cet.
It is an error to configure GCC with --enable-cet if bintuiils
doesn't support CET v2.0.

ENDBR instruction is added to __morestack_large_model since it is
called indirectly.

2017-11-17  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>

config/
	* cet.m4: New file.

gcc/
	* config.gcc (extra_headers): Add cet.h for x86 targets.
	* config/i386/cet.h: New file.
	* doc/install.texi: Add --enable-cet/--disable-cet.

libgcc/
	* Makefile.in (configure_deps): Add $(srcdir)/../config/cet.m4.
	(CET_FLAGS): New.
	* config/i386/morestack.S: Include <cet.h>.
	(__morestack_large_model): Add _CET_ENDBR at function entrance.
	* config/i386/resms64.h: Include <cet.h>.
	* config/i386/resms64f.h: Likewise.
	* config/i386/resms64fx.h: Likewise.
	* config/i386/resms64x.h: Likewise.
	* config/i386/savms64.h: Likewise.
	* config/i386/savms64f.h: Likewise.
	* config/i386/t-linux (HOST_LIBGCC2_CFLAGS): Add $(CET_FLAGS).
	(CRTSTUFF_T_CFLAGS): Likewise.
	* configure.ac: Include ../config/cet.m4.
	Set and substitute CET_FLAGS.
	* configure: Regenerated.

From-SVN: r254868
2017-11-17 14:34:39 +01:00
Rainer Orth
f021f1d3a6 Adapt Solaris 12 references
libgcc:
	* config.host (*-*-solaris2*): Adapt comment for Solaris 12
	renaming.
	* config/sol2/crtpg.c (__start_crt_compiler): Likewise.
	* configure.ac (libgcc_cv_solaris_crts): Likewise.
	* configure: Regenerate.

	gcc:
	* config.gcc (*-*-solaris2*): Enable default_use_cxa_atexit since
	Solaris 11.  Update comment.
	* configure.ac (gcc_cv_ld_pid): Adapt comment for Solaris 12
	renaming.
	* config/sol2.h (STARTFILE_SPEC): Likewise.
	* configure: Regenerate.

	gcc/testsuite:
	* lib/target-supports.exp (check_effective_target_pie): Adapt
	comment for Solaris 12 renaming.

	* gcc.dg/torture/pr60092.c: Remove *-*-solaris2.11* dg-xfail-run-if.

From-SVN: r254737
2017-11-14 18:31:01 +00:00
Tom de Vries
65f480c76f [libgcc, rs6000] Remove semicolon after do {} while (0) in REGISTER_CFA_OFFSET_FOR
2017-11-07  Tom de Vries  <tom@codesourcery.com>

	* config/rs6000/aix-unwind.h (REGISTER_CFA_OFFSET_FOR): Remove semicolon
	after "do {} while (0)".

From-SVN: r254491
2017-11-07 09:21:40 +00:00
Tom de Vries
2a321acb02 [libgcc] Remove semicolon after do {} while (0) in FP_HANDLE_EXCEPTIONS
2017-11-07  Tom de Vries  <tom@codesourcery.com>

	PR other/82784
	* config/aarch64/sfp-machine.h (FP_HANDLE_EXCEPTIONS): Remove
	semicolon after "do {} while (0)".
	* config/i386/sfp-machine.h (FP_HANDLE_EXCEPTIONS): Same.
	* config/ia64/sfp-machine.h (FP_HANDLE_EXCEPTIONS): Same.
	* config/mips/sfp-machine.h (FP_HANDLE_EXCEPTIONS): Same.
	* config/rs6000/sfp-machine.h (FP_HANDLE_EXCEPTIONS): Same.

From-SVN: r254489
2017-11-07 08:11:43 +00:00
Andreas Tobler
59fcf6c3ec re PR libgcc/82635 (std::thread's join broken on FreeBSD with all GCCs >= 5)
2017-11-04  Andreas Tobler  <andreast@gcc.gnu.org>

    PR libgcc/82635
    * config/i386/freebsd-unwind.h (MD_FALLBACK_FRAME_STATE_FOR): Use a
    sysctl to determine whether we're in a trampoline.
    Keep the pattern matching method for systems without
    KERN_PROC_SIGTRAMP sysctl.

From-SVN: r254411
2017-11-04 20:40:23 +01:00
Cupertino Miranda
b0c7ddf816 [ARC] Fix to unwinding.
gcc/ChangeLog:
2017-11-03  Cupertino Miranda  <cmiranda@synopsys.com>

        * config/arc/arc.c (arc_save_restore): Corrected CFA note.
        (arc_expand_prologue): Restore blink for millicode.
        * config/arc/linux.h (LINK_EH_SPEC): Defined.

libgcc/ChangeLog:
2017-11-03  Cupertino Miranda  <cmiranda@synopsys.com>
            Vineet Gupta <vgupta@synopsys.com>

        * config.host (arc*-*-linux*): Set md_unwind_header variable.
        * config/arc/linux-unwind-reg.def: New file.
        * config/arc/linux-unwind.h: Likewise.

Co-Authored-By: Vineet Gupta <vgupta@synopsys.com>

From-SVN: r254367
2017-11-03 11:51:18 +01:00
Sebastian Perta
5feee954e8 rl78.md: New define_expand "subdi3".
* config/rl78/rl78.md: New define_expand "subdi3".
* config/rl78/subdi3.S: New assembly file.
* config/rl78/t-rl78: Added subdi3.S to LIB2ADD.

From-SVN: r254019
2017-10-23 13:54:02 -04:00
Sebastian Perta
8cb41ec663 Forgot to add the new file :-P 2017-10-13 Sebastian Perta <sebastian.perta@renesas.com>
Forgot to add the new file :-P
2017-10-13  Sebastian Perta  <sebastian.perta@renesas.com>
* config/rl78/adddi3.S: New assembly file.
* config/rl78/t-rl78: Added adddi3.S to LIB2ADD.

From-SVN: r254016
2017-10-23 13:30:22 -04:00
Sebastian Perta
a0bf6cf784 rl78.c (rl78_emit_libcall): New function.
[gcc]
	* config/rl78/rl78.c (rl78_emit_libcall): New function.
	* config/rl78/rl78-protos.h (rl78_emit_libcall): New function.
	* config/rl78/rl78.md: New define_expand "adddi3".
[libgcc]
	* config/rl78/adddi3.S: New assembly file.
	* config/rl78/t-rl78: Added adddi3.S to LIB2ADD.

From-SVN: r253748
2017-10-13 20:33:58 -04:00
Jakub Jelinek
e7176f75d6 re PR target/82274 (__builtin_mul_overflow fails to detect overflow for int64_t when compiled with -m32)
PR target/82274
	* internal-fn.c (expand_mul_overflow): If both operands have
	the same highpart of -1 or 0 and the topmost bit of lowpart
	is different, overflow is if res <= 0 rather than res < 0.

	* libgcc2.c (__mulvDI3): If both operands have
	the same highpart of -1 and the topmost bit of lowpart is 0,
	multiplication overflows even if both lowparts are 0.

	* gcc.dg/pr82274-1.c: New test.
	* gcc.dg/pr82274-2.c: New test.

From-SVN: r253734
2017-10-13 19:19:12 +02:00
James Bowman
db6601d2b6 crti-hw.S: Add watchdog vector, FT930 IRQ support.
libgcc/
	* config/ft32/crti-hw.S: Add watchdog vector, FT930
	IRQ support.

From-SVN: r253276
2017-09-29 01:01:52 +00:00
Joseph Myers
938b6f1e5d Enable no-exec stacks for more targets using the Linux kernel.
Building glibc for many different configurations and running the
compilation parts of the testsuite runs into failures of the
elf/check-execstack test for hppa and microblaze.  Those
configurations default to executable stacks in the Linux kernel
because of VM_DATA_DEFAULT_FLAGS definitions including VM_EXEC
(VM_DATA_DEFAULT_FLAGS being the default definition of
VM_STACK_DEFAULT_FLAGS).

This fails because those configurations are not generating
.note.GNU-stack sections to indicate that programs do not need an
executable stack.  This patch fixes GCC to generate those sections on
those architectures (when configured for a target using the Linux
kernel), as it does on other architectures, together with adding that
section to libgcc .S sources, with the same code as used on other
architectures (or a variant using "#ifdef __linux__" instead of the
usual "#if defined(__ELF__) && defined(__linux__)" for microblaze, as
that configuration doesn't use elfos.h and so doesn't define __ELF__).

This suffices to eliminate that glibc test failure.  (For hppa, the
compilation parts of the glibc testsuite still fail because of the
separate elf/check-textrel failure.)

gcc:
	* config/microblaze/linux.h (TARGET_ASM_FILE_END): Likewise.
	* config/pa/pa.h (NEED_INDICATE_EXEC_STACK): Likewise.
	* config/pa/pa-linux.h (NEED_INDICATE_EXEC_STACK): Likewise.
	* config/pa/pa.c (pa_hpux_file_end): Rename to pa_file_end.
	Define unconditionally, with [ASM_OUTPUT_EXTERNAL_REAL]
	conditionals inside the function instead of around it.  Call
	file_end_indicate_exec_stack if NEED_INDICATE_EXEC_STACK.
	(TARGET_ASM_FILE_END): Define unconditionally to pa_file_end.

libgcc:
	* config/microblaze/crti.S, config/microblaze/crtn.S,
	config/microblaze/divsi3.S, config/microblaze/moddi3.S,
	config/microblaze/modsi3.S, config/microblaze/muldi3_hard.S,
	config/microblaze/mulsi3.S,
	config/microblaze/stack_overflow_exit.S,
	config/microblaze/udivsi3.S, config/microblaze/umodsi3.S,
	config/pa/milli64.S: Add .note.GNU-stack section.

From-SVN: r253204
2017-09-26 17:35:53 +01:00
Daniel Santos
89762a83cd PR target/82196 addendum: Fix Darwin build breakage and test FAILS on Solaris
gcc/testsuite:
	* gcc.target/i386/pr82196-1.c: (b): Remove volatile asm.
	* gcc.target/i386/pr82196-2.c: (b): Likewise.

libgcc:
	* configure.ac: Add Check for HAVE_AS_AVX.
	* config.in: Regenerate.
	* configure: Likewise.
	* config/i386/i386-asm.h: Include auto-target.h from libgcc.
	(SSE_SAVE, SSE_RESTORE): Emit .byte sequence for !HAVE_AS_AVX.
	Correct out-of-date comments.

From-SVN: r253116
2017-09-23 11:02:54 +00:00
Sebastian Peryt
cace2309d4 config.gcc: Support "knm".
gcc/

        * config.gcc: Support "knm".
        * config/i386/driver-i386.c (host_detect_local_cpu): Detect "knm".
        * config/i386/i386-c.c (ix86_target_macros_internal): Handle
        PROCESSOR_KNM.
        * config/i386/i386.c (m_KNM): Define.
        (processor_target_table): Add "knm".
        (PTA_KNM): Define.
        (ix86_option_override_internal): Add "knm".
        (ix86_issue_rate): Add PROCESSOR_KNM.
        (ix86_adjust_cost): Ditto.
        (ia32_multipass_dfa_lookahead): Ditto.
        (get_builtin_code_for_version): Handle PROCESSOR_KNM.
        (fold_builtin_cpu): Add M_INTEL_KNM.
        * config/i386/i386.h (processor_costs): Define TARGET_KNM.
        (processor_type): Add PROCESSOR_KNM.
         * config/i386/x86-tune.def: Add m_KNM.
        * doc/invoke.texi: Add knm as x86 -march=/-mtune= CPU type.

libgcc/
        * config/i386/cpuinfo.h (processor_types): Add INTEL_KNM.
        * config/i386/cpuinfo.c (get_intel_cpu): Detect Knights Mill.

gcc/testsuite/

        * gcc.target/i386/builtin_target.c: Test knm.
        * gcc.target/i386/funcspec-56.inc: Test arch=knm.

From-SVN: r253013
2017-09-20 15:47:30 +02:00
Daniel Santos
3cb626e4f7 PR target/82196 correct choice of avx/sse stubs for -mcall-ms2sysv-xlogues
gcc:
	config/i386/i386.c: (xlogue_layout::STUB_NAME_MAX_LEN): Increase to 20
	bytes.
	(xlogue_layout::s_stub_names): Add an additional size-2 diminsion.
	(xlogue_layout::get_stub_name): Modify to select the appropairate sse
	or avx version of the stub.

gcc/testsuite:
	gcc.target/i386/pr82196-1.c: New test.
	gcc.target/i386/pr82196-2.c: Likewise.

libgcc:
	config/i386/i386-asm.h (PASTE2): New macro.
	(ASMNAME): Modify to use PASTE2.
	(MS2SYSV_STUB_PREFIX): New macro for isa prefix.
	(MS2SYSV_STUB_BEGIN, MS2SYSV_STUB_END): New macros for stub headers.
	config/i386/resms64.S: Rename to a header file, use MS2SYSV_STUB_BEGIN
	instead of HIDDEN_FUNC and MS2SYSV_STUB_END instead of FUNC_END.
	config/i386/resms64f.S: Likewise.
	config/i386/resms64fx.S: Likewise.
	config/i386/resms64x.S: Likewise.
	config/i386/savms64.S: Likewise.
	config/i386/savms64f.S: Likewise.
	config/i386/avx_resms64.S: New file that only defines a macro and
	includes it's corresponding header file.
	config/i386/avx_resms64f.S: Likewise.
	config/i386/avx_resms64fx.S: Likewise.
	config/i386/avx_resms64x.S: Likewise.
	config/i386/avx_savms64.S: Likewise.
	config/i386/avx_savms64f.S: Likewise.
	config/i386/sse_resms64.S: Likewise.
	config/i386/sse_resms64f.S: Likewise.
	config/i386/sse_resms64fx.S: Likewise.
	config/i386/sse_resms64x.S: Likewise.
	config/i386/sse_savms64.S: Likewise.
	config/i386/sse_savms64f.S: Likewise.
	config/i386/t-msabi: Modified to add avx and sse versions of stubs.

From-SVN: r252896
2017-09-17 22:04:40 +00:00
Olivier Hainque
2f19c491de config.host (*-*-vxworks7): Widen scope to vxworks7*.
2017-09-01  Olivier Hainque  <hainque@adacore.com>

	libgcc/
	* config.host (*-*-vxworks7): Widen scope to vxworks7*.

From-SVN: r251594
2017-09-01 13:43:01 +00:00
Olivier Hainque
611e70369c config.gcc (powerpc-wrs-vxworks|vxworksae|vxworksmils): Now match as powerpc-wrs-vxworks*.
2017-08-31  Olivier Hainque  <hainque@adacore.com>

       gcc/
       * config.gcc (powerpc-wrs-vxworks|vxworksae|vxworksmils): Now
	match as powerpc-wrs-vxworks*.

       libgcc/
       * config.host: Likewise.

From-SVN: r251573
2017-08-31 19:19:47 +00:00
Jonathan Yong
c8f34527b1 Share mingw fset-stack-executable with cygwin
This patch is in use by Cygwin for years, upstream to GCC.

	* gcc/config/i386/mingw.opt (fset-stack-executable): Removed.
	* gcc/config/i386/cygming.opt (fset-stack-executable): Moved
	from mingw.opt.
	* gcc/config/i386/cygwin.h: Define CHECK_EXECUTE_STACK_ENABLED.
	* ligcc/config.host (*-cygwin): Include file from mingw
	config/i386/enable-execute-stack-mingw32.c

From-SVN: r250914
2017-08-07 11:40:08 +00:00
Jerome Lambourg
0b458d2bc8 config.gcc (arm-wrs-vxworks*): Rework to handle arm-wrs-vxworks7 as well as arm-wrs-vxworks.
2017-08-01  Jerome Lambourg  <lambourg@adacore.com>
           Doug Rupp  <rupp@adacore.com>
           Olivier Hainque  <hainque@adacore.com>

  	gcc/
   	* config.gcc (arm-wrs-vxworks*): Rework to handle arm-wrs-vxworks7 as
   	well as arm-wrs-vxworks. Update target_cpu_name from arm6 (arch v3) to
   	arm8 (arch v4).
   	* config/arm/vxworks.h (MAYBE_TARGET_BPABI_CPP_BUILTINS): New, helper
   	for TARGET_OS_CPP_BUILTIN.
   	(TARGET_OS_CPP_BUILTIN): Invoke MAYBE_TARGET_BPABI_CPP_BUILTINS(),
   	refine CPU definitions for arm_arch5 and add those for arm_arch6 and
   	arm_arch7.
    	(MAYBE_ASM_ABI_SPEC): New, helper for SUBTARGET_EXTRA_ASM_SPEC,
   	passing required abi options to the assembler for EABI configurations.
   	(EXTRA_CC1_SPEC): New macro, to help prevent the implicit production
   	of .text.hot and .text.unlikely sections for kernel modules when
   	using ARM style exceptions.
   	(CC1_SPEC): Remove obsolete attempt at mimicking Diab toolchain
   	options. Add EXTRA_CC1_SPEC.
   	(VXWORKS_ENDIAN_SPEC): Adjust comment and remove handling of Diab
   	toolchain options.
   	(DWARF2_UNWIND_INFO): Redefine to handle the pre/post VxWorks 7
   	transition.
   	(ARM_TARGET2_DWARF_FORMAT): Define.
   	* config/arm/t-vxworks: Adjust multilib control to removal of the
   	Diab command line options.

   	libgcc/
   	* config.host (arm-wrs-vxworks*): Rework to handle arm-wrs-vxworks7
   	as well as arm-wrs-vxworks.
   	* config/arm/t-vxworks7: New file.  Add unwind-arm-vxworks.c to
   	LIB2ADDEH.
   	* config/arm/unwind-arm-vxworks.c: New file. Provide dummy
   	__exidx_start and __exidx_end for downloadable modules.


Co-Authored-By: Doug Rupp <rupp@adacore.com>
Co-Authored-By: Olivier Hainque <hainque@adacore.com>

From-SVN: r250781
2017-08-01 14:14:21 +00:00
Olivier Hainque
4df612fa60 t-vxworks (LIBGCC2_INCLUDES): Start with -I.
2017-08-01  Olivier Hainque  <hainque@adacore.com>

	* config/t-vxworks (LIBGCC2_INCLUDES): Start with -I. after -nostdinc.
	* config/t-vxworks7: Likewise.

From-SVN: r250776
2017-08-01 13:23:06 +00:00
Olivier Hainque
5560e8c0af t-vxworks: Instead of redefining LIB2ADD, augment LIB2ADDEH with vxlib.c and vxlib-tls.c.
2017-08-01  Olivier Hainque  <hainque@adacore.com>

	* config/t-vxworks: Instead of redefining LIB2ADD,
	augment LIB2ADDEH with vxlib.c and vxlib-tls.c.

From-SVN: r250775
2017-08-01 12:59:44 +00:00
Sebastian Huber
16bab95a79 [PowerPC/RTEMS] Add 64-bit support using ELFv2 ABI
Add 64-bit support for RTEMS using the ELFv2 ABI with 64-bit long
double.

gcc/
	* config.gcc (powerpc-*-rtems*): Remove rs6000/eabi.h.  Add
	rs6000/biarch64.h.
	* config/rs6000/rtems.h (ASM_DECLARE_FUNCTION_SIZE): New macro.
	(ASM_OUTPUT_SPECIAL_POOL_ENTRY_P): Likewise.
	(CRT_CALL_STATIC_FUNCTION): Likewise.
	(ASM_DEFAULT_SPEC): New define.
	(ASM_SPEC32): Likewise.
	(ASM_SPEC64): Likewise.
	(ASM_SPEC_COMMON): Likewise.
	(ASM_SPEC): Likewise.
	(INVALID_64BIT): Likewise.
	(LINK_OS_DEFAULT_SPEC): Likewise.
	(LINK_OS_SPEC32): Likewise.
	(LINK_OS_SPEC64): Likewise.
	(POWERPC_LINUX): Likewise.
	(PTRDIFF_TYPE): Likewise.
	(RESTORE_FP_PREFIX): Likewise.
	(RESTORE_FP_SUFFIX): Likewise.
	(SAVE_FP_PREFIX): Likewise.
	(SAVE_FP_SUFFIX): Likewise.
	(SIZE_TYPE): Likewise.
	(SUBSUBTARGET_OVERRIDE_OPTIONS): Likewise.
	(TARGET_64BIT): Likewise.
	(TARGET_64BIT): Likewise.
	(TARGET_AIX): Likewise.
	(WCHAR_TYPE_SIZE): Likewise.
	(WCHAR_TYPE): Undefine.
	(TARGET_OS_CPP_BUILTINS): Add 64-bit PowerPC defines.
	(CPP_OS_DEFAULT_SPEC): Use previous CPP_OS_RTEMS_SPEC.
	(CPP_OS_RTEMS_SPEC): Delete.
	(SUBSUBTARGET_EXTRA_SPECS): Remove cpp_os_rtems.  Add
	asm_spec_common, asm_spec32, asm_spec64, link_os_spec32, and
	link_os_spec64.
	* config/rs6000/t-rtems: Add mcpu=e6500/m64 multilibs.

libgcc/
	* config/rs6000/ibm-ldouble.c: Disable if defined __rtems__.

From-SVN: r250652
2017-07-28 07:17:10 +00:00
Daniel Santos
9cbc07ccff PR testsuite/80759 Fix -mcall-ms2sysv-xlogues on Darwin and Solaris
2017-07-24  Daniel Santos  <daniel.santos@pobox.com>

	PR testsuite/80759
	* config.host: include i386/t-msabi for darwin and solaris.
	* config/i386/i386-asm.h
	(ELFFN): Rename to FN_TYPE.
	(FN_SIZE): New macro.
	(FN_HIDDEN): Likewise.
	(ASMNAME): Likewise.
	(FUNC_START): Rename to FUNC_BEGIN, use ASMNAME, replace .global with
	.globl.
	(HIDDEN_FUNC): Use ASMNAME and .globl instead of .global.
	(SSE_SAVE): Convert to cpp macro, hard-code offset (always 0x60).
	* config/i386/resms64.S: Use SSE_SAVE as cpp macro instead of gas
	.macro.
	* config/i386/resms64f.S: Likewise.
	* config/i386/resms64fx.S: Likewise.
	* config/i386/resms64x.S: Likewise.
	* config/i386/savms64.S: Likewise.
	* config/i386/savms64f.S: Likewise.

From-SVN: r250488
2017-07-24 21:59:57 +00:00
John Marino
de7422048e Fix Unwind support on DragonFly BSD after sigtramp move
2017-07-19  John Marino  <gnugcc@marino.st>

	* config/i386/dragonfly-unwind.h: Handle sigtramp relocation.

From-SVN: r250354
2017-07-19 16:55:11 +01:00
Michael Meissner
3787ee47fc re PR target/81193 (PowerPC GCC __builtin_cpu_is and __builtin_cpu_supports should warn about old libraries)
[gcc]
2017-07-12  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/81193
	* config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): If GLIBC
	provides the hardware capability bits, define the macro
	__BUILTIN_CPU_SUPPORTS__.
	* config/rs6000/rs6000.c (cpu_expand_builtin): Generate a warning
	if GLIBC does not provide the hardware capability bits.  Add a
	gcc_unreachable call if the built-in cpu function is neither
	__builtin_cpu_is nor __builtin_cpu_supports.
	(rs6000_get_function_versions_dispatcher): Change the warning
	that an old GLIBC is used which does not export the capability
	bits to be an error.
	* doc/extend.texi (target_clones attribute): Document the
	restriction that GLIBC 2.23 or newer is needed on the PowerPC.
	(PowerPC built-in functions): Document that GLIBC 2.23 or newer is
	needed by __builtin_cpu_is and __builtin_cpu_supports.  Document
	the macros defined by GCC if the newer GLIBC is available.

[gcc/testsuite]
2017-07-12  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/81193
	* gcc.target/powerpc/bmi-andn-1.c: Add guard against using
	__builtin_cpu_supports with old GLIBC's.
	* gcc.target/powerpc/bmi-andn-2.c: Likewise.
	* gcc.target/powerpc/bmi-bextr-1.c: Likewise.
	* gcc.target/powerpc/bmi-bextr-2.c: Likewise.
	* gcc.target/powerpc/bmi-bextr-4.c: Likewise.
	* gcc.target/powerpc/bmi-bextr-5.c: Likewise.
	* gcc.target/powerpc/bmi-blsi-1.c: Likewise.
	* gcc.target/powerpc/bmi-blsi-2.c: Likewise.
	* gcc.target/powerpc/bmi-blsmsk-1.c: Likewise.
	* gcc.target/powerpc/bmi-blsmsk-2.c: Likewise.
	* gcc.target/powerpc/bmi-blsr-1.c: Likewise.
	* gcc.target/powerpc/bmi-blsr-2.c: Likewise.
	* gcc.target/powerpc/bmi-tzcnt-1.c: Likewise.
	* gcc.target/powerpc/bmi-tzcnt-2.c: Likewise.
	* gcc.target/powerpc/bmi2-bzhi32-1.c: Likewise.
	* gcc.target/powerpc/bmi2-bzhi64-1.c: Likewise.
	* gcc.target/powerpc/bmi2-mulx32-1.c: Likewise.
	* gcc.target/powerpc/bmi2-mulx32-2.c: Likewise.
	* gcc.target/powerpc/bmi2-mulx64-1.c: Likewise.
	* gcc.target/powerpc/bmi2-mulx64-2.c: Likewise.
	* gcc.target/powerpc/bmi2-pdep32-1.c: Likewise.
	* gcc.target/powerpc/bmi2-pdep64-1.c: Likewise.
	* gcc.target/powerpc/bmi2-pext32-1.c: Likewise.
	* gcc.target/powerpc/bmi2-pext64-1.c: Likewise.
	* gcc.target/powerpc/cpu-builtin-1.c: Likewise.

[libgcc]
2017-07-12  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/81193
	* configure.ac (PowerPC float128 hardware support): Test whether
	we can use __builtin_cpu_supports before enabling the ifunc
	handler.
	* configure: Regenerate.

From-SVN: r250165
2017-07-12 23:07:50 +00:00
Vineet Gupta
b1938888f5 [ARC] Configure script to allow non uclibc based triplets
gcc/
2017-07-10  Vineet Gupta <vgupta@synopsys.com>

        * config.gcc: Remove uclibc from arc target spec.

libgcc/
2017-07-10  Vineet Gupta <vgupta@synopsys.com>

        * config.host: Remove uclibc from arc target spec.

From-SVN: r250097
2017-07-10 15:55:26 +02:00
Krister Walfridsson
bec75e53a8 config.host (*-*-netbsd*): Remove check for aout NetBSD releases.
2017-07-09  Krister Walfridsson  <krister.walfridsson@gmail.com>

	* config.host (*-*-netbsd*): Remove check for aout NetBSD releases.

From-SVN: r250080
2017-07-09 04:01:02 +00:00
Peter Bergner
d4391a62cb float128-ifunc.c: Don't include auxv.h.
libgcc/
	* config/rs6000/float128-ifunc.c: Don't include auxv.h.
	(have_ieee_hw_p): Delete function.
	(SW_OR_HW) Use __builtin_cpu_supports().

From-SVN: r250061
2017-07-07 16:08:42 -05:00
Thomas Preud'homme
9296dd9ba3 Add support for ARMv8-R architecture
2017-07-06  Thomas Preud'homme  <thomas.preudhomme@arm.com>

    gcc/
    * config/arm/arm-cpus.in (armv8-r): Add new entry.
    * config/arm/arm-isa.h (ISA_ARMv8r): Define macro.
    * config/arm/arm-tables.opt: Regenerate.
    * config/arm/arm.h (enum base_architecture): Add BASE_ARCH_8R
    enumerator.
    * doc/invoke.texi: Mention -march=armv8-r and its extensions.

    gcc/testsuite/
    * lib/target-supports.exp: Generate
    check_effective_target_arm_arch_v8r_ok, add_options_for_arm_arch_v8r
    and check_effective_target_arm_arch_v8r_multilib.

    libgcc/
    * config/arm/lib1funcs.S: Defined __ARM_ARCH__ to 8 for ARMv8-R.

From-SVN: r250025
2017-07-06 14:37:28 +00:00
Olivier Hainque
b85a969e83 Add missing libgcc/ChangeLog entry.
From-SVN: r249953
2017-07-04 08:50:03 +00:00
Olivier Hainque
ca12f1ca1f t-vxworks7: New file.
2017-06-27  Olivier Hainque  <hainque@adacore.com>

	* config/t-vxworks7: New file.

New file mistakenly omitted from previous commit referencing it.

From-SVN: r249938
2017-07-03 20:27:58 +00:00
Joseph Myers
883312dc79 Use ucontext_t not struct ucontext in linux-unwind.h files.
Current glibc no longer gives the ucontext_t type the tag struct
ucontext, to conform with POSIX namespace rules.  This requires
various linux-unwind.h files in libgcc, that were previously using
struct ucontext, to be fixed to use ucontext_t instead.  This is
similar to the removal of the struct siginfo tag from siginfo_t some
years ago.

This patch changes those files to use ucontext_t instead.  As the
standard name that should be unconditionally safe, so this is not
restricted to architectures supported by glibc, or conditioned on the
glibc version.

Tested compilation together with current glibc with glibc's
build-many-glibcs.py.

	* config/aarch64/linux-unwind.h (aarch64_fallback_frame_state),
	config/alpha/linux-unwind.h (alpha_fallback_frame_state),
	config/bfin/linux-unwind.h (bfin_fallback_frame_state),
	config/i386/linux-unwind.h (x86_64_fallback_frame_state,
	x86_fallback_frame_state), config/m68k/linux-unwind.h (struct
	uw_ucontext), config/nios2/linux-unwind.h (struct nios2_ucontext),
	config/pa/linux-unwind.h (pa32_fallback_frame_state),
	config/riscv/linux-unwind.h (riscv_fallback_frame_state),
	config/sh/linux-unwind.h (sh_fallback_frame_state),
	config/tilepro/linux-unwind.h (tile_fallback_frame_state),
	config/xtensa/linux-unwind.h (xtensa_fallback_frame_state): Use
	ucontext_t instead of struct ucontext.

From-SVN: r249731
2017-06-28 10:21:16 +01:00
Jerome Lambourg
50567938f9 config.gcc (i*86-wrs-vxworks7): Handle new acceptable triplet.
2017-06-27  Jerome Lambourg  <lambourg@adacore.com>

	gcc/
	* config.gcc (i*86-wrs-vxworks7): Handle new acceptable triplet.
	(x86_64-wrs-vxworks7): Likewise.

	libgcc/
	* config.host (i*86-wrs)vxworks7): Handle new acceptable triplet.
	(x86_64-wrs-vxworks7): Likewise.

From-SVN: r249689
2017-06-27 13:15:35 +00:00
Olivier Hainque
e4b0df93a0 t-vxworks7: New file.
2017-06-27  Olivier Hainque  <hainque@adacore.com>

	* config/t-vxworks7: New file.
	* config.host (*-*-vxworks7): Use it.

From-SVN: r249688
2017-06-27 12:20:05 +00:00