binutils-gdb/opcodes/disassemble.c

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/* Select disassembly routine for specified architecture.
Copyright (C) 1994-2018 Free Software Foundation, Inc.
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This file is part of the GNU opcodes library.
This library is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
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#include "sysdep.h"
Move print_insn_XXX to an opcodes internal header With the changes done in previous patches, print_insn_XXX functions don't have to be external visible out of opcodes, because both gdb and objdump select disassemblers through a single interface. This patch moves these print_insn_XXX declarations from include/dis-asm.h to opcodes/disassemble.h, which is a new header added by this patch. include: 2017-05-24 Yao Qi <yao.qi@linaro.org> * dis-asm.h: Move some function declarations to opcodes/disassemble.h. opcodes: 2017-05-24 Yao Qi <yao.qi@linaro.org> * alpha-dis.c: Include disassemble.h, don't include dis-asm.h. * avr-dis.c, bfin-dis.c, cr16-dis.c: Likewise. * crx-dis.c, d10v-dis.c, d30v-dis.c: Likewise. * disassemble.c, dlx-dis.c, epiphany-dis.c: Likewise. * fr30-dis.c, ft32-dis.c, h8300-dis.c, h8500-dis.c: Likewise. * hppa-dis.c, i370-dis.c, i386-dis.c: Likewise. * i860-dis.c, i960-dis.c, ip2k-dis.c: Likewise. * iq2000-dis.c, lm32-dis.c, m10200-dis.c: Likewise. * m10300-dis.c, m32r-dis.c, m68hc11-dis.c: Likewise. * m68k-dis.c, m88k-dis.c, mcore-dis.c: Likewise. * metag-dis.c, microblaze-dis.c, mmix-dis.c: Likewise. * moxie-dis.c, msp430-dis.c, mt-dis.c: * nds32-dis.c, nios2-dis.c, ns32k-dis.c: Likewise. * or1k-dis.c, pdp11-dis.c, pj-dis.c: Likewise. * ppc-dis.c, pru-dis.c, riscv-dis.c: Likewise. * rl78-dis.c, s390-dis.c, score-dis.c: Likewise. * sh-dis.c, sh64-dis.c, tic30-dis.c: Likewise. * tic4x-dis.c, tic54x-dis.c, tic6x-dis.c: Likewise. * tic80-dis.c, tilegx-dis.c, tilepro-dis.c: Likewise. * v850-dis.c, vax-dis.c, visium-dis.c: Likewise. * w65-dis.c, wasm32-dis.c, xc16x-dis.c: Likewise. * xgate-dis.c, xstormy16-dis.c, xtensa-dis.c: Likewise. * z80-dis.c, z8k-dis.c: Likewise. * disassemble.h: New file.
2017-05-24 18:23:52 +02:00
#include "disassemble.h"
GDB: Add support for the new set/show disassembler-options commands. This commit adds support to GDB so that it can modify the disassembler-options value that is passed to the disassembler, similar to objdump's -M option. Currently, the only supported targets are ARM, PowerPC and S/390, but adding support for a new target(s) is not difficult. include/ * dis-asm.h (disasm_options_t): New typedef. (parse_arm_disassembler_option): Remove prototype. (set_arm_regname_option): Likewise. (get_arm_regnames): Likewise. (get_arm_regname_num_options): Likewise. (disassemble_init_s390): New prototype. (disassembler_options_powerpc): Likewise. (disassembler_options_arm): Likewise. (disassembler_options_s390): Likewise. (remove_whitespace_and_extra_commas): Likewise. (disassembler_options_cmp): Likewise. (next_disassembler_option): New inline function. (FOR_EACH_DISASSEMBLER_OPTION): New macro. opcodes/ * disassemble.c Include "safe-ctype.h". (disassemble_init_for_target): Handle s390 init. (remove_whitespace_and_extra_commas): New function. (disassembler_options_cmp): Likewise. * arm-dis.c: Include "libiberty.h". (NUM_ELEM): Delete. (regnames): Use long disassembler style names. Add force-thumb and no-force-thumb options. (NUM_ARM_REGNAMES): Rename from this... (NUM_ARM_OPTIONS): ...to this. Use ARRAY_SIZE. (get_arm_regname_num_options): Delete. (set_arm_regname_option): Likewise. (get_arm_regnames): Likewise. (parse_disassembler_options): Likewise. (parse_arm_disassembler_option): Rename from this... (parse_arm_disassembler_options): ...to this. Make static. Use new FOR_EACH_DISASSEMBLER_OPTION macro to scan over options. (print_insn): Use parse_arm_disassembler_options. (disassembler_options_arm): New function. (print_arm_disassembler_options): Handle updated regnames. * ppc-dis.c: Include "libiberty.h". (ppc_opts): Add "32" and "64" entries. (ppc_parse_cpu): Use ARRAY_SIZE and disassembler_options_cmp. (powerpc_init_dialect): Add break to switch statement. Use new FOR_EACH_DISASSEMBLER_OPTION macro. (disassembler_options_powerpc): New function. (print_ppc_disassembler_options): Use ARRAY_SIZE. Remove printing of "32" and "64". * s390-dis.c: Include "libiberty.h". (init_flag): Remove unneeded variable. (struct s390_options_t): New structure type. (options): New structure. (init_disasm): Rename from this... (disassemble_init_s390): ...to this. Add initializations for current_arch_mask and option_use_insn_len_bits_p. Remove init_flag. (print_insn_s390): Delete call to init_disasm. (disassembler_options_s390): New function. (print_s390_disassembler_options): Print using information from struct 'options'. * po/opcodes.pot: Regenerate. binutils/ * objdump.c (main): Use remove_whitespace_and_extra_commas. gdb/ * NEWS: Mention new set/show disassembler-options commands. * doc/gdb.texinfo: Document new set/show disassembler-options commands. * disasm.c: Include "arch-utils.h", "gdbcmd.h" and "safe-ctype.h". (prospective_options): New static variable. (gdb_disassembler::gdb_disassembler): Initialize m_di.disassembler_options. (gdb_buffered_insn_length_init_dis): Initilize di->disassembler_options. (get_disassembler_options): New function. (set_disassembler_options): Likewise. (set_disassembler_options_sfunc): Likewise. (show_disassembler_options_sfunc): Likewise. (disassembler_options_completer): Likewise. (_initialize_disasm): Likewise. * disasm.h (get_disassembler_options): New prototype. (set_disassembler_options): Likewise. * gdbarch.sh (gdbarch_disassembler_options): New variable. (gdbarch_verify_disassembler_options): Likewise. * gdbarch.c: Regenerate. * gdbarch.h: Likewise. * arm-tdep.c (num_disassembly_options): Delete. (set_disassembly_style): Likewise. (arm_disassembler_options): New static variable. (set_disassembly_style_sfunc): Convert short style name into long option name. Call set_disassembler_options. (show_disassembly_style_sfunc): New function. (arm_gdbarch_init): Call set_gdbarch_disassembler_options and set_gdbarch_verify_disassembler_options. (_initialize_arm_tdep): Delete regnames variable and update callers. (arm_disassembler_options): Initialize. (disasm_options): New variable. (num_disassembly_options): Rename from this... (num_disassembly_styles): ...to this. Compute by scanning through disasm_options. (valid_disassembly_styles): Initialize using disasm_options. Remove calls to parse_arm_disassembler_option, get_arm_regnames and set_arm_regname_option. Pass show_disassembly_style_sfunc to the "disassembler" setshow command. * rs6000-tdep.c (powerpc_disassembler_options): New static variable. (rs6000_gdbarch_init): Call set_gdbarch_disassembler_options and set_gdbarch_verify_disassembler_options. * s390-tdep.c (s390_disassembler_options): New static variable. (s390_gdbarch_init):all set_gdbarch_disassembler_options and set_gdbarch_verify_disassembler_options. gdb/testsuite/ * gdb.arch/powerpc-power.exp: Delete test. * gdb.arch/powerpc-power.s: Likewise. * gdb.disasm/disassembler-options.exp: New test. * gdb.arch/powerpc-altivec.exp: Likewise. * gdb.arch/powerpc-altivec.s: Likewise. * gdb.arch/powerpc-altivec2.exp: Likewise. * gdb.arch/powerpc-altivec2.s: Likewise. * gdb.arch/powerpc-altivec3.exp: Likewise. * gdb.arch/powerpc-altivec3.s: Likewise. * gdb.arch/powerpc-power7.exp: Likewise. * gdb.arch/powerpc-power7.s: Likewise. * gdb.arch/powerpc-power8.exp: Likewise. * gdb.arch/powerpc-power8.s: Likewise. * gdb.arch/powerpc-power9.exp: Likewise. * gdb.arch/powerpc-power9.s: Likewise. * gdb.arch/powerpc-vsx.exp: Likewise. * gdb.arch/powerpc-vsx.s: Likewise. * gdb.arch/powerpc-vsx2.exp: Likewise. * gdb.arch/powerpc-vsx2.s: Likewise. * gdb.arch/powerpc-vsx3.exp: Likewise. * gdb.arch/powerpc-vsx3.s: Likewise. * gdb.arch/arm-disassembler-options.exp: Likewise. * gdb.arch/powerpc-disassembler-options.exp: Likewise. * gdb.arch/s390-disassembler-options.exp: Likewise.
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#include "safe-ctype.h"
#include <assert.h>
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#ifdef ARCH_all
#define ARCH_aarch64
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#define ARCH_alpha
#define ARCH_arc
#define ARCH_arm
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#define ARCH_avr
#define ARCH_bfin
#define ARCH_cr16
#define ARCH_cris
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#define ARCH_crx
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#define ARCH_d10v
#define ARCH_d30v
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#define ARCH_dlx
#define ARCH_epiphany
#define ARCH_fr30
#define ARCH_frv
FT32 initial support FT32 is a new 32-bit RISC core developed by FTDI for embedded applications. * configure.ac: Add FT32 support. * configure: Regenerate. bfd/ * Makefile.am: Add FT32 files. * archures.c (enum bfd_architecture): Add bfd_arch_ft32. (bfd_mach_ft32): Define. (bfd_ft32_arch): Declare. (bfd_archures_list): Add bfd_ft32_arch. * config.bfd: Handle FT32. * configure.ac: Likewise. * cpu-ft32.c: New file. * elf32-ft32.c: New file. * reloc.c (BFD_RELOC_FT32_10, BFD_RELOC_FT32_20, BFD_RELOC_FT32_17, BFD_RELOC_FT32_18): Define. * targets.c (_bfd_target_vector): Add ft32_elf32_vec. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * Makefile.in: Regenerate. * configure: Regenerate. * po/SRC-POTFILES.in: Regenerate. binutils/ * readelf.c: Add FT32 support. gas/ * Makefile.am: Add FT32 files. * config/tc-ft32.c: New file. * config/tc-ft32.h: New file. * configure.tgt: Add FT32 support. * Makefile.in: Regenerate. * po/POTFILES.in: Regenerate. gas/testsuite/ * gas/ft32/ft32.exp: New file. * gas/ft32/insn.d: New file. * gas/ft32/insn.s: New file. include/ * dis-asm.h (print_insn_ft32): Declare. include/elf/ * common.h (EM_FT32): Define. * ft32.h: New file. include/opcode/ * ft32.h: New file. ld/ * Makefile.am: Add FT32 files. * configure.tgt: Handle FT32 target. * emulparams/elf32ft32.sh: New file. * scripttempl/ft32.sc: New file. * Makefile.in: Regenerate. opcodes/ * Makefile.am: Add FT32 files. * configure.ac: Handle FT32. * disassemble.c (disassembler): Call print_insn_ft32. * ft32-dis.c: New file. * ft32-opc.c: New file. * Makefile.in: Regenerate. * configure: Regenerate. * po/POTFILES.in: Regenerate.
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#define ARCH_ft32
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#define ARCH_h8300
#define ARCH_h8500
#define ARCH_hppa
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#define ARCH_i370
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#define ARCH_i386
2000-07-22 Jason Eckhardt <jle@cygnus.com> * include/opcode/i860.h (btne, bte, bla): Changed these opcodes to use sbroff ('r') instead of split16 ('s'). (J, K, L, M): New operand types for 16-bit aligned fields. (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to use I, J, K, L, M instead of just I. (T, U): New operand types for split 16-bit aligned fields. (st.x): Changed these opcodes to use S, T, U instead of just S. (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not exist on the i860. (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860. (pfeq.ss, pfeq.dd): New opcodes. (st.s): Fixed incorrect mask bits. (fmlow): Fixed incorrect mask bits. (fzchkl, pfzchkl): Fixed incorrect mask bits. (faddz, pfaddz): Fixed incorrect mask bits. (form, pform): Fixed incorrect mask bits. (pfld.l): Fixed incorrect mask bits. (fst.q): Fixed incorrect mask bits. (all floating point opcodes): Fixed incorrect mask bits for handling of dual bit. * include/elf/i860.h: New file. (elf_i860_reloc_type): Defined ELF32 i860 relocations. * bfd/cpu-i860.c: Added comments. * bfd/elf32-i860.c (TARGET_LITTLE_SYM): Defined to bfd_elf32_i860_little_vec. (TARGET_LITTLE_NAME): Defined to "elf32-i860-little". (ELF_MAXPAGESIZE): Changed to 4096. * bfd/targets.c (bfd_elf32_i860_little_vec): Declaration of new target. (bfd_target_vector): Added bfd_elf32_i860_little_vec. * bfd/config.bfd (i860-stardent-sysv4*, i860-stardent-elf*): Added config for little endian elf32 i860. (targ_defvec): Define for the new config above as "bfd_elf32_i860_little_vec". (targ_selvecs): Define for the new config above as "bfd_elf32_i860_vec bfd_elf32_i860_little_vec" * bfd/configure.in (bfd_elf32_i860_little_vec): Added recognition of new target vec. * bfd/configure: Regenerated. * opcodes/i860-dis.c: New file. (print_insn_i860): New function. (print_br_address): New function. (sign_extend): New function. (BITWISE_OP): New macro. (I860_REG_PREFIX): New macro. (grnames, frnames, crnames): New structures. * opcodes/disassemble.c (ARCH_i860): Define. (disassembler): Add check for bfd_arch_i860 to set disassemble function to print_insn_i860. * include/dis-asm.h (print_insn_i860): Add prototype. * opcodes/Makefile.in (CFILES): Added i860-dis.c. (ALL_MACHINES): Added i860-dis.lo. (i860-dis.lo): New dependences. * opcodes/configure.in: New bits for bfd_i860_arch. * opcodes/configure: Regenerated.
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#define ARCH_i860
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#define ARCH_i960
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#define ARCH_ia64
#define ARCH_ip2k
#define ARCH_iq2000
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#define ARCH_lm32
#define ARCH_m32c
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#define ARCH_m32r
#define ARCH_m68hc11
#define ARCH_m68hc12
#define ARCH_m68k
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#define ARCH_m88k
#define ARCH_mcore
#define ARCH_mep
* common.h: Fix case of "Meta". * metag.h: New file. * dis-asm.h (print_insn_metag): New declaration. * metag.h: New file. * Makefile.am: Add Meta. * Makefile.in: Regenerate. * configure: Regenerate. * configure.in: Add Meta. * disassemble.c: Add Meta support. * metag-dis.c: New file. * Makefile.am: Add Meta. * Makefile.in: Regenerate. * archures.c (bfd_mach_metag): New. * bfd-in2.h: Regenerate. * config.bfd: Add Meta. * configure: Regenerate. * configure.in: Add Meta. * cpu-metag.c: New file. * elf-bfd.h: Add Meta. * elf32-metag.c: New file. * elf32-metag.h: New file. * libbfd.h: Regenerate. * reloc.c: Add Meta relocations. * targets.c: Add Meta. * Makefile.am: Add Meta. * Makefile.in: Regenerate. * config/tc-metag.c: New file. * config/tc-metag.h: New file. * configure.tgt: Add Meta. * doc/Makefile.am: Add Meta. * doc/Makefile.in: Regenerate. * doc/all.texi: Add Meta. * doc/as.texiinfo: Document Meta options. * doc/c-metag.texi: New file. * gas/metag/labelarithmetic.d: New file. * gas/metag/labelarithmetic.s: New file. * gas/metag/metacore12.d: New file. * gas/metag/metacore12.s: New file. * gas/metag/metacore21-invalid.l: New file. * gas/metag/metacore21-invalid.s: New file. * gas/metag/metacore21.d: New file. * gas/metag/metacore21.s: New file. * gas/metag/metacore21ext.d: New file. * gas/metag/metacore21ext.s: New file. * gas/metag/metadsp21-invalid.l: New file. * gas/metag/metadsp21-invalid.s: New file. * gas/metag/metadsp21.d: New file. * gas/metag/metadsp21.s: New file. * gas/metag/metadsp21ext.d: New file. * gas/metag/metadsp21ext.s: New file. * gas/metag/metafpu21.d: New file. * gas/metag/metafpu21.s: New file. * gas/metag/metafpu21ext.d: New file. * gas/metag/metafpu21ext.s: New file. * gas/metag/metag.exp: New file. * gas/metag/tls.d: New file. * gas/metag/tls.s: New file. * Makefile.am: Add Meta. * Makefile.in: Regenerate. * configure.tgt: Add Meta. * emulparams/elf32metag.sh: New file. * emultempl/metagelf.em: New file. * ld-elf/merge.d: Mark Meta as xfail. * ld-gc/start.d: Skip this test on Meta. * ld-gc/personality.d: Skip this test on Meta. * ld-metag/external.s: New file. * ld-metag/metag.exp: New file. * ld-metag/pcrel.d: New file. * ld-metag/pcrel.s: New file. * ld-metag/shared.d: New file. * ld-metag/shared.r: New file. * ld-metag/shared.s: New file. * ld-metag/stub.d: New file. * ld-metag/stub.s: New file. * ld-metag/stub_pic_app.d: New file. * ld-metag/stub_pic_app.r: New file. * ld-metag/stub_pic_app.s: New file. * ld-metag/stub_pic_shared.d: New file. * ld-metag/stub_pic_shared.s: New file. * ld-metag/stub_shared.d: New file. * ld-metag/stub_shared.r: New file. * ld-metag/stub_shared.s: New file. * binutils/readelf.c: (guess_is_rela): Add EM_METAG. (dump_relocations): Add EM_METAG. (get_machine_name): Correct case for Meta. (is_32bit_abs_reloc): Add support for Meta ADDR32 reloc. (is_none_reloc): Add support for Meta NONE reloc.
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#define ARCH_metag
Add support for Xilinx MicroBlaze processor. * bfd/Makefile.am: Add cpu-microblaze.{lo,c}, elf32-microblaze.{lo,c}. * bfd/Makefile.in: Same. * bfd/archures.c: Add bfd_arch_microblaze. * bfd/bfd-in2.h: Regenerate. * bfd/config.bfd: Add microblaze target. * bfd/configure: Add bfd_elf32_microblaze_vec target. * bfd/configure.in: Same. * bfd/cpu-microblaze.c: New. * bfd/elf32-microblaze.c: New. * bfd/libbfd-in.h: Add prototype _bfd_dwarf2_fixup_section_debug_loc(). * bfd/libbfd.h: Regenerate. * bfd/reloc.c: Add MICROBLAZE relocations. * bfd/section.c: Add struct relax_table and relax_count to section. * bfd/targets.c: Add bfd_elf32_microblaze_vec. * binutils/MAINTAINERS: Add self as maintainer. * binutils/readelf.c: Include elf/microblaze.h, add EM_MICROBLAZE & EM_MICROBLAZE_OLD to guess_is_rela(), dump_relocations(), get_machine_name(). * config.sub: Add microblaze target. * configure: Same. * configure.ac: Same. * gas/Makefile.am: add microblaze to CPU_TYPES, config/tc-microblaze.c to TARGET_CPU_CFILES, config/tc-microblaze.h to TARGET_CPU_HFILES, add DEP_microblaze_elf target. * gas/Makefile.in: Same. * gas/config/tc-microblaze.c: Add MicroBlaze assembler. * gas/config/tc-microblaze.h: Add header for tc-microblaze.c. * gas/configure: Add microblaze target. * gas/configure.in: Same. * gas/configure.tgt: Same. * gas/doc/Makefile.am: Add c-microblaze.texi to CPU_DOCS. * gas/doc/Makefile.in: Same. * gas/doc/all.texi: Set MICROBLAZE. * gas/doc/as.texinfo: Add MicroBlaze doc links. * gas/doc/c-microblaze.texi: New MicroBlaze docs. * include/dis-asm.h: Decl print_insn_microblaze(). * include/elf/common.h: Define EM_MICROBLAZE & EM_MICROBLAZE_OLD. * include/elf/microblaze.h: New reloc definitions. * ld/Makefile.am: Add eelf32mb_linux.o, eelf32microblaze.o to ALL_EMULATIONS, targets. * ld/Makefile.in: Same. * ld/configure.tgt: Add microblaze*-linux*, microblaze* targets. * ld/emulparams/elf32mb_linux.sh: New. * ld/emulparams/elf32microblaze.sh. New. * ld/scripttempl/elfmicroblaze.sc: New. * opcodes/Makefile.am: Add microblaze-opc.h to HFILES, microblaze-dis.c to CFILES, microblaze-dis.lo to ALL_MACHINES, targets. * opcodes/Makefile.in: Same. * opcodes/configure: Add bfd_microblaze_arch target. * opcodes/configure.in: Same. * opcodes/disassemble.c: Define ARCH_microblaze, return print_insn_microblaze(). * opcodes/microblaze-dis.c: New MicroBlaze disassembler. * opcodes/microblaze-opc.h: New MicroBlaze opcode definitions. * opcodes/microblaze-opcm.h: New MicroBlaze opcode types.
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#define ARCH_microblaze
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#define ARCH_mips
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#define ARCH_mmix
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#define ARCH_mn10200
#define ARCH_mn10300
#define ARCH_moxie
Second part of ms1 to mt renaming. * bfd/archures.c (bfd_arch_mt): Renamed. (bfd_mt_arch): Renamed. (bfd_archures_list): Adjusted. * bfd/bfd-in2.h: Rebuilt. * bfd/config.bfd (mt): Remove special case targ_archs. (mt-*-elf): Rename bfd_elf32_mt_vec. * bfd/configure: Rebuilt. * bfd/configure.in (bfd_elf32_mt_vec): Renamed. (selarchs) Remove mt special case. * bfd/cpu-mt.c (arch_info_struct): Adjust. (bfd_mt_arch): Renamed, adjust. * bfd/elf32-mt.c (mt_reloc_type_lookup, mt_info_to_howto_rela, mt_elf_relocate_hi16, mt_final_link_relocate, mt_relocate_section, mt_elf_howto_table): Renamed, adjusted. (mt_elf_gc_mark_hook, mt_elf_gc_sweep_hook, mt_elf_check_relocs, elf32_mt_machine, mt_elf_object_p, mt_elf_set_private_flags, mt_elf_copy_private_bfd_data, mt_elf_merge_private_bfd_data, mt_elf_print_private_bfd_data): Renamed, adjusted. (TARGET_BIG_SYM, TARGET_BIG_NAME, ELF_ARCH, ELF_MACHINE_CODE, ELF_MAXPAGESIZE, elf_info_to_howto, elf_backend_relocate_section, bfd_elf32_bfd_reloc_type_lookup, elf_backend_gc_mark_hook, elf_backend_gc_sweep_hook, elf_backend_check_relocs, eld_backend_object_p, bfd_elf32_bfd_set_private_flags, bfd_elf32_bfd_copy_private_bfd_data, bfd_elf32_bfd_merge_private_bfd_data, bfd_elf32_bfd_print_private_bfd_data): Adjusted. * bfd/libbfd.h: Regenerated. * bfd/reloc.c (BFD_RELOC_MT_PC16, BFD_RELOC_MT_HI16, BFD_RELOC_MT_LO16, BFD_RELOC_MT_GNU_VTINHERIT, BFD_RELOC_MT_GNU_VTENTRY, BFD_RELOC_MT_PCINSN8): Renamed. * bfd/targets.c (bfd_elf32_mt_vec): Renamed. (_bfd_target_vector): Adjusted. * binutils/readelf.c (guess_is_rela): Use EM_MT. (dump_relocations, get_machine_name): Adjust. * cpu/mt.cpu (define-arch, define-isa): Set name to mt. (define-mach): Adjust. * cpu/mt.opc (CGEN_ASM_HASH): Update. (mt_asm_hash, mt_cgen_insn_supported): Renamed. (parse_loopsize, parse_imm16): Adjust. * gas/configure: Rebuilt. * gas/configure.in (mt): Remove special case. * gas/config/tc-mt.c (opcodes/mt-desc.h, opcodes/mt-opc.h): Change #includes. (mt_insn, mt_mach, mt_mach_bitmask, mt_flags, mt_architectures): Rename, adjust. (md_parse_option, md_show_usage, md_begin, md_assemble, md_cgen_lookup_reloc, md_atof): Adjust. (mt_force_relocation, mt_apply_fix, mt_fix_adjustable): Rename, adjust. * gas/config/tc-mt.h (TC_MT): Rename. (LISTING_HEADER, TARGET_ARCH, TARGET_FORMAT): Adjust. (md_apply_fix): Adjust. (mt_apply_fix, mt_fix_adjustable, mt_force_relocation): Rename. (TC_FORCE_RELOCATION, tc_fix_adjustable): Adjust. * gdb/mt-tdep.c (mt_arch_constants, mt_gdb_regnums): Rename, adjust. (mt_register_name, mt_register_type, mt_register_reggroup_p, mt_return_value, mt_skip_prologue, mt_breapoint_from_pc, mt_pseudo_register_read, mt_pseudo_register_write, mt_frame_align, mt_registers_info, mt_push_dummy_call, mt_unwind_cache, mt_frame_unwind_cache, mt_unwind_pc, mt_unwind_dummy_id, mt_frame_this_id, mt_frame_prev_register, mt_frame_base_address, mt_frame_unwind, mt_frame_sniffer, mt_frame_base, mt_gdbarch_init, _initialize_mt_tdep): Rename & adjust. * include/dis-asm.h (print_insn_mt): Renamed. * include/elf/common.h (EM_MT): Renamed. * include/elf/mt.h: Rename relocs, cpu & other defines. * ld/emulparams/elf32mt.sh (ARCH, OUTPUT_FORMAT): Adjust. * opcodes/Makefile.am (HFILES, CFILES, ALL_MACHINES): Adjust. (stamp-mt): Adjust rule. (mt-asm.lo, mt-desc.lo, mt-dis.lo, mt-ibld.lo, mt-opc.lo): Rename & adjust. * opcodes/Makefile.in: Rebuilt. * opcodes/configure: Rebuilt. * opcodes/configure.in (bfd_mt_arch): Rename & adjust. * opcodes/disassemble.c (ARCH_mt): Renamed. (disassembler): Adjust. * opcodes/mt-asm.c: Renamed, rebuilt. * opcodes/mt-desc.c: Renamed, rebuilt. * opcodes/mt-desc.h: Renamed, rebuilt. * opcodes/mt-dis.c: Renamed, rebuilt. * opcodes/mt-ibld.c: Renamed, rebuilt. * opcodes/mt-opc.c: Renamed, rebuilt. * opcodes/mt-opc.h: Renamed, rebuilt. * sid/Makefile.in: Rebuilt. * sid/aclocal.m4: Rebuilt. * sid/configure: Rebuilt. * sid/sid.spec: Adjust. * sid/bsp/Makefile.am: Adjust. * sid/bsp/Makefile.in: Rebuilt. * sid/bsp/aclocal.m4: Rebuilt. * sid/bsp/configrun-sid.in: Adjust. * sid/bsp/pregen/Makefile.in: Rebuilt. * sid/bsp/pregen/mt-gdb.conf: Renamed & rebuilt. * sid/bsp/pregen/mt-gloss.conf: Renamed & rebuilt. * sid/bsp/pregen/pregen-configs.in: Adjust. * sid/component/aclocal.m4: Rebuilt. * sid/component/configure: Rebuilt. * sid/component/tconfig.in: Adjust. * sid/component/bochs/aclocal.m4: Rebuilt. * sid/component/cache/Makefile.in: Rebuilt. * sid/component/cgen-cpu/Makefile.in: Rebuilt. * sid/component/cgen-cpu/aclocal.m4: Rebuilt. * sid/component/cgen-cpu/compCGEN.cxx: Adjust. * sid/component/cgen-cpu/configure: Rebuilt. * sid/component/cgen-cpu/configure.in: Rebult. * sid/component/cgen-cpu/mt/Makefile.am: Adjust. * sid/component/cgen-cpu/mt/Makefile.in: Rebuilt. * sid/component/cgen-cpu/mt/hw-cpu-mt.txt: Adjust. * sid/component/cgen-cpu/mt/mt-cpu.h: Rebuilt. * sid/component/cgen-cpu/mt/mt-decode.cxx: Rebuilt. * sid/component/cgen-cpu/mt/mt-decode.h: Rebuilt. * sid/component/cgen-cpu/mt/mt-defs.h: Rebuilt. * sid/component/cgen-cpu/mt/mt-desc.h: Rebuilt. * sid/component/cgen-cpu/mt/mt-sem.cxx: Rebuilt. * sid/component/cgen-cpu/mt/mt-write.cxx: Rebuilt. * sid/component/cgen-cpu/mt/mt.cxx: Adjust. * sid/component/cgen-cpu/mt/mt.h: Adjust. * sid/component/consoles/Makefile.in: Rebuilt. * sid/component/families/aclocal.m4: Rebuilt. * sid/component/families/configure: Rebuilt. * sid/component/gdb/Makefile.in: Rebuilt. * sid/component/gloss/Makefile.in: Rebuilt. * sid/component/glue/Makefile.in: Rebuilt. * sid/component/ide/Makefile.in: Rebuilt. * sid/component/interrupt/Makefile.in: Rebuilt. * sid/component/lcd/Makefile.in: Rebuilt. * sid/component/lcd/testsuite/Makefile.in: Rebuilt. * sid/component/loader/Makefile.am: Rebuilt. * sid/component/loader/Makefile.in: Rebuilt. * sid/component/mapper/Makefile.in: Rebuilt. * sid/component/mapper/testsuite/Makefile.in: Rebuilt. * sid/component/memory/Makefile.in: Rebuilt. * sid/component/mmu/Makefile.in: Rebuilt. * sid/component/parport/Makefile.in: Rebuilt. * sid/component/profiling/Makefile.in: Rebuilt. * sid/component/rtc/Makefile.in: Rebuilt. * sid/component/sched/Makefile.in: Rebuilt. * sid/component/testsuite/Makefile.in: Rebuilt. * sid/component/timers/aclocal.m4: Rebuilt. * sid/component/timers/configure: Rebuilt. * sid/component/uart/Makefile.in: Rebuilt. * sid/component/uart/testsuite/Makefile.in: Rebuilt. * sid/config/config.sub: Adjust. * sid/config/info.tcl.in: Adjust. * sid/config/sidtargets.m4: Adjust. * sid/doc/Makefile.in: Rebuilt. * sid/main/dynamic/Makefile.am: Rebuilt. * sid/main/dynamic/Makefile.in: Rebuilt. * sid/main/dynamic/aclocal.m4: Rebuilt. * sid/main/dynamic/configure: Rebuilt.
2005-12-16 11:23:12 +01:00
#define ARCH_mt
2002-12-30 20:25:13 +01:00
#define ARCH_msp430
Add support for Andes NDS32: BFD: * Makefile.am (BFD32_BACKENDS, BFD32_BACKENDS_CFILES): Add nds32 files. * Makefile.in: Regenerate. * archures.c (bfd_nds32_arch): Add nds32 target. * bfd-in2.h: Regenerate. * config.bfd (nds32*le-*-linux): Add bfd_elf32_nds32lelin_vec and bfd_elf32_nds32belin_vec. (nds32*be-*-linux*): Likewise. (nds32*le-*-*): Add bfd_elf32_nds32le_vec and bfd_elf32_nds32be_vec. (nds32*be-*-*): Likewise. * configure.in (bfd_elf32_nds32be_vec): Add elf32-nds32.lo. (bfd_elf32_nds32le_vec): Likewise. (bfd_elf32_nds32belin_vec): Likewise. (bfd_elf32_nds32lelin_vec): Likewise. * configure: Regenerate. * cpu-nds32.c: New file for nds32. * elf-bfd.h: Add NDS32_ELF_DATA. * elf32-nds32.c: New file for nds32. * elf32-nds32.h: New file for nds32. * libbfd.h: Regenerate. * reloc.c: Add relocations for nds32. * targets.c (bfd_elf32_nds32be_vec): New declaration for nds32. (bfd_elf32_nds32le_vec): Likewise. (bfd_elf32_nds32belin_vec): Likewise. (bfd_elf32_nds32lelin_vec): Likewise. BINUTILS: * readelf.c: Include elf/nds32.h (guess_is_rela): Add case for EM_NDS32. (dump_relocations): Add case for EM_NDS32. (decode_NDS32_machine_flags): New. (get_machine_flags): Add case for EM_NDS32. (is_32bit_abs_reloc): Likewise. (is_16bit_abs_reloc): Likewise. (process_nds32_specific): New. (process_arch_specific): Add case for EM_NDS32. * NEWS: Announce Andes nds32 support. * MAINTAINERS: Add nds32 maintainers. TESTSUITE: * binutils-all/objdump.exp: Add NDS32 cpu. * binutils-all/readelf.r: Skip extra reloc created by NDS32. GAS: * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nds32.c. (TARGET_CPU_HFILES): Add config/tc-nds32.h. * Makefile.in: Regenerate. * configure.in (nds32): Add nds32 target extension config support. * configure.tgt : Add case for nds32-*-elf* and nds32-*-linux*. * configure: Regenerate. * config/tc-nds32.c: New file for nds32. * config/tc-nds32.h: New file for nds32. * doc/Makefile.am (CPU_DOCS): Add c-nds32.texi. * doc/Makefile.in: Regenerate. * doc/as.texinfo: Add nds32 options. * doc/all.texi: Set NDS32. * doc/c-nds32.texi: New file dor nds32 document. * NEWS: Announce Andes nds32 support. TESTSUITE: * gas/all/gas.exp: Add expected failures for NDS32. * gas/elf/elf.exp: Likewise. * gas/lns/lns.exp: Use alternate test. * gas/macros/irp.d: Skip for NDS32. * gas/macros/macros.exp: Skip some tests for the NDS32. * gas/macros/rept.d: Skip for NDS32. * gas/macros/test3.d: Skip for NDS32. * gas/nds32: New directory. * gas/nds32/alu-1.s: New test. * gas/nds32/alu-1.d: Likewise. * gas/nds32/alu-2.s: Likewise. * gas/nds32/alu-2.d: Likewise. * gas/nds32/br-1.d: Likewise. * gas/nds32/br-1.s: Likewise. * gas/nds32/br-2.d: Likewise. * gas/nds32/br-2.s: Likewise. * gas/nds32/ji-jr.d: Likewise. * gas/nds32/ji-jr.s: Likewise. * gas/nds32/ls.d: Likewise. * gas/nds32/ls.s: Likewise. * gas/nds32/lsi.d: Likewise. * gas/nds32/lsi.s: Likewise. * gas/nds32/to-16bit-v1.d: Likewise. * gas/nds32/to-16bit-v1.s: Likewise. * gas/nds32/to-16bit-v2.d: Likewise. * gas/nds32/to-16bit-v2.s: Likewise. * gas/nds32/to-16bit-v3.d: Likewise. * gas/nds32/to-16bit-v3.s: Likewise. * gas/nds32/nds32.exp: New test driver. LD: * Makefile.am (ALL_EMULATION_SOURCES): Add nds32 target. * Makefile.in: Regenerate. * configure.tgt: Add case for nds32*le-*-elf*, nds32*be-*-elf*, nds32*le-*-linux-gnu*, and nds32*be-*-linux-gnu*. * emulparams/nds32belf.sh: New file for nds32. * emulparams/nds32belf_linux.sh: Likewise. * emulparams/nds32belf16m.sh: Likewise. * emulparams/nds32elf.sh: Likewise. * emulparams/nds32elf_linux.sh: Likewise. * emulparams/nds32elf16m.sh: Likewise. * emultempl/nds32elf.em: Likewise. * scripttempl/nds32elf.sc}: Likewise. * gen-doc.texi: Set NDS32. * ld.texinfo: Set NDS32. * NEWS: Announce Andes nds32 support. TESTSUITE: * lib/ld-lib.exp: Add NDS32 to list of targets that do not support shared library generation. * ld-nds32: New directory. * ld-nds32/branch.d: New test. * ld-nds32/branch.ld: New test. * ld-nds32/branch.s: New test. * ld-nds32/diff.d: New test. * ld-nds32/diff.ld: New test. * ld-nds32/diff.s: New test. * ld-nds32/gp.d: New test. * ld-nds32/gp.ld: New test. * ld-nds32/gp.s: New test. * ld-nds32/imm.d: New test. * ld-nds32/imm.ld: New test. * ld-nds32/imm.s: New test. * ld-nds32/imm_symbol.s: New test. * ld-nds32/relax_jmp.d: New test. * ld-nds32/relax_jmp.ld: New test. * ld-nds32/relax_jmp.s: New test. * ld-nds32/relax_load_store.d: New test. * ld-nds32/relax_load_store.ld: New test. * ld-nds32/relax_load_store.s: New test. * ld-nds32/nds32.exp: New file. OPCODES: * Makefile.am (TARGET_LIBOPCODES_CFILES): Add nds32-asm.c and nds32-dis.c. * Makefile.in: Regenerate. * configure.in: Add case for bfd_nds32_arch. * configure: Regenerate. * disassemble.c (ARCH_nds32): Define. * nds32-asm.c: New file for nds32. * nds32-asm.h: New file for nds32. * nds32-dis.c: New file for nds32. * nds32-opc.h: New file for nds32. INCLUDE: * dis-asm.h (print_insn_nds32): Add nds32 target. * elf/nds32.h: New file for nds32. * opcode/nds32.h: New file for nds32.
2013-12-13 12:52:32 +01:00
#define ARCH_nds32
2013-02-06 Sandra Loosemore <sandra@codesourcery.com> Andrew Jenner <andrew@codesourcery.com> Based on patches from Altera Corporation. bfd/ * Makefile.am (ALL_MACHINES): Add cpu-nios2.lo. (ALL_MACHINES_CFILES): Add cpu-nios2.c. (BFD_BACKENDS): Add elf32-nios2.lo. (BFD32_BACKENDS_CFILES): Add elf32-nios2.c. * Makefile.in: Regenerated. * configure.in: Add entries for bfd_elf32_bignios2_vec and bfd_elf32_littlenios2_vec. * configure: Regenerated. * config.bfd: Add cases for nios2. * archures.c (enum bfd_architecture): Add bfd_arch_nios2. (bfd_mach_nios2): Define. (bfd_nios2_arch): Declare. (bfd_archures_list): Add bfd_nios2_arch. * targets.c (bfd_elf32_bignios2_vec): Declare. (bfd_elf32_littlenios2_vec): Declare. (_bfd_target_vector): Add entries for bfd_elf32_bignios2_vec and bfd_elf32_littlenios2_vec. * elf-bfd.h (enum elf_target_id): Add NIOS2_ELF_DATA. * reloc.c (enum bfd_reloc_code_real): Add Nios II relocations. * bfd-in2.h: Regenerated. * libbfd.h: Regenerated. * cpu-nios2.c: New file. * elf32-nios2.c: New file. opcodes/ * Makefile.am (TARGET_LIBOPCODES_CFILES): Add nios2-dis.c and nios2-opc.c. * Makefile.in: Regenerated. * configure.in: Add case for bfd_nios2_arch. * configure: Regenerated. * disassemble.c (ARCH_nios2): Define. (disassembler): Add case for bfd_arch_nios2. * nios2-dis.c: New file. * nios2-opc.c: New file. include/ * dis-asm.h (print_insn_big_nios2): Declare. (print_insn_little_nios2): Declare. include/elf * nios2.h: New file. include/opcode/ * nios2.h: New file. gas/ * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c. (TARGET_CPU_HFILES): Add config/tc-nios2.h. * Makefile.in: Regenerated. * configure.tgt: Add case for nios2*-linux*. * config/obj-elf.c: Conditionally include elf/nios2.h. * config/tc-nios2.c: New file. * config/tc-nios2.h: New file. * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi. * doc/Makefile.in: Regenerated. * doc/all.texi: Set NIOSII. * doc/as.texinfo (Overview): Add Nios II options. (Machine Dependencies): Include c-nios2.texi. * doc/c-nios2.texi: New file. * NEWS: Note Altera Nios II support. gas/testsuite/ * gas/nios2/add.d: New. * gas/nios2/add.s: New. * gas/nios2/align_fill.d: New. * gas/nios2/align_fill.s: New. * gas/nios2/align_text.d: New. * gas/nios2/align_text.s: New. * gas/nios2/and.d: New. * gas/nios2/and.s: New. * gas/nios2/branch.d: New. * gas/nios2/branch.s: New. * gas/nios2/break.d: New. * gas/nios2/break.s: New. * gas/nios2/bret.d: New. * gas/nios2/bret.s: New. * gas/nios2/cache.d: New. * gas/nios2/cache.s: New. * gas/nios2/call26.d: New. * gas/nios2/call26.s: New. * gas/nios2/call.d: New. * gas/nios2/call.s: New. * gas/nios2/cmp.d: New. * gas/nios2/cmp.s: New. * gas/nios2/comments.d: New. * gas/nios2/comments.s: New. * gas/nios2/complex.d: New. * gas/nios2/complex.s: New. * gas/nios2/ctl.d: New. * gas/nios2/ctl.s: New. * gas/nios2/custom.d: New. * gas/nios2/custom.s: New. * gas/nios2/etbt.d: New. * gas/nios2/etbt.s: New. * gas/nios2/flushda.d: New. * gas/nios2/flushda.s: New. * gas/nios2/illegal.l: New. * gas/nios2/illegal.s: New. * gas/nios2/jmp.d: New. * gas/nios2/jmp.s: New. * gas/nios2/ldb.d: New. * gas/nios2/ldb.s: New. * gas/nios2/ldh.d: New. * gas/nios2/ldh.s: New. * gas/nios2/ldw.d: New. * gas/nios2/ldw.s: New. * gas/nios2/lineseparator.d: New. * gas/nios2/lineseparator.s: New. * gas/nios2/mov.d: New. * gas/nios2/movia.d: New. * gas/nios2/movia.s: New. * gas/nios2/movi.d: New. * gas/nios2/movi.s: New. * gas/nios2/mov.s: New. * gas/nios2/mul.d: New. * gas/nios2/mul.s: New. * gas/nios2/nios2.exp: New. * gas/nios2/nor.d: New. * gas/nios2/nor.s: New. * gas/nios2/or.d: New. * gas/nios2/or.s: New. * gas/nios2/ret.d: New. * gas/nios2/ret.s: New. * gas/nios2/rol.d: New. * gas/nios2/rol.s: New. * gas/nios2/rotate.d: New. * gas/nios2/rotate.s: New. * gas/nios2/stb.d: New. * gas/nios2/stb.s: New. * gas/nios2/sth.d: New. * gas/nios2/sth.s: New. * gas/nios2/stw.d: New. * gas/nios2/stw.s: New. * gas/nios2/sub.d: New. * gas/nios2/sub.s: New. * gas/nios2/sync.d: New. * gas/nios2/sync.s: New. * gas/nios2/trap.d: New. * gas/nios2/trap.s: New. * gas/nios2/tret.d: New. * gas/nios2/tret.s: New. * gas/nios2/warn_noat.l: New. * gas/nios2/warn_noat.s: New. * gas/nios2/warn_nobreak.l: New. * gas/nios2/warn_nobreak.s: New. * gas/nios2/xor.d: New. * gas/nios2/xor.s: New. ld/ * Makefile.am (enios2elf.c): New rule. * Makefile.in: Regenerated. * configure.tgt: Add case for nios2*-*-*. * emulparams/nios2elf.sh: New file. * NEWS: Note Altera Nios II support. ld/testsuite/ * ld-nios2/emit-relocs-1a.s: New. * ld-nios2/emit-relocs-1b.s: New. * ld-nios2/emit-relocs-1.d: New. * ld-nios2/emit-relocs-1.ld: New. * ld-nios2/gprel.d: New. * ld-nios2/gprel.s: New. * ld-nios2/hilo16.d: New. * ld-nios2/hilo16.s: New. * ld-nios2/hilo16_symbol.s: New. * ld-nios2/imm5.d: New. * ld-nios2/imm5.s: New. * ld-nios2/imm5_symbol.s: New. * ld-nios2/nios2.exp: New. * ld-nios2/pcrel16.d: New. * ld-nios2/pcrel16_label.s: New. * ld-nios2/pcrel16.s: New. * ld-nios2/relax_callr.d: New. * ld-nios2/relax_callr.ld: New. * ld-nios2/relax_callr.s: New. * ld-nios2/relax_cjmp.d: New. * ld-nios2/relax_cjmp.s: New. * ld-nios2/relax_jmp.ld: New. * ld-nios2/relax_section.d: New. * ld-nios2/relax_section.s: New. * ld-nios2/relax_ujmp.d: New. * ld-nios2/relax_ujmp.s: New. * ld-nios2/reloc.d: New. * ld-nios2/reloc.s: New. * ld-nios2/reloc_symbol.s: New. * ld-nios2/s16.d: New. * ld-nios2/s16.s: New. * ld-nios2/s16_symbol.s: New. * ld-nios2/u16.d: New. * ld-nios2/u16.s: New. * ld-nios2/u16_symbol.s: New. * ld-elf/indirect.exp: Skip on targets that don't support -shared -fPIC. * ld-elfcomm/elfcomm.exp: Build with -G0 for nios2. * ld-plugin/lto.exp: Skip shared library tests on targets that don't support them. Skip execution tests on non-native targets. binutils/ * readelf.c: Include elf/nios2.h. (dump_relocations): Add case for EM_ALTERA_NIOS2. (get_nios2_dynamic_type): New. (get_dynamic_type): Add case for EM_ALTERA_NIOS2. (is_32bit_abs_reloc): Fix EM_ALTERA_NIOS2 case. (is_16bit_abs_reloc): Likewise. (is_none_reloc): Add EM_ALTERA_NIOS2 and EM_NIOS32 cases. * NEWS: Note Altera Nios II support. * MAINTAINERS: Add Nios II maintainers.
2013-02-07 00:22:26 +01:00
#define ARCH_nios2
1999-05-03 09:29:11 +02:00
#define ARCH_ns32k
#define ARCH_or1k
2001-02-19 00:33:11 +01:00
#define ARCH_pdp11
#define ARCH_pj
1999-05-03 09:29:11 +02:00
#define ARCH_powerpc
#define ARCH_pru
#define ARCH_riscv
1999-05-03 09:29:11 +02:00
#define ARCH_rs6000
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
#define ARCH_rl78
bfd * Makefile.am (ALL_MACHINES): Add cpu-rx.lo. (ALL_MACHINES_CFILES): Add cpu-rx.c. (BFD32_BACKENDS): Add elf32-rx.lo. (BFD32_BACKENDS_CFILES): Add elf32-rx.c. * archures.c (bfd_architecture): Add bfd_arch_rx and bfd_mach_rx. Export bfd_rx_arch. (bfd_archures_list): Add bfd_rx_arch. * config.bfd: Add entry for rx-*-elf. * configure.in: Add entries for bfd_elf32_rx_le_vec and bfd_elf32_rx_be_vec. * reloc.c: Add RX relocations. * targets.c: Add RX target vectors. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rx.c: New file. * elf32-rx.c: New file. binutils * readelf.c: Add support for RX target. * MAINTAINERS: Add DJ and NickC as maintainers for RX. gas * Makefile.am: Add RX target. * configure.in: Likewise. * configure.tgt: Likewise. * read.c (do_repeat_with_expander): New function. * read.h: Provide a prototype for do_repeat_with_expander. * doc/Makefile.am: Add RX target documentation. * doc/all.texi: Likewise. * doc/as.texinfo: Likewise. * Makefile.in: Regenerate. * NEWS: Mention support for RX architecture. * configure: Regenerate. * doc/Makefile.in: Regenerate. * config/rx-defs.h: New file. * config/rx-parse.y: New file. * config/tc-rx.h: New file. * config/tc-rx.c: New file. * doc/c-rx.texi: New file. gas/testsuite * gas/rx: New directory. * gas/rx/*: New set of test cases. * gas/elf/section2.e-rx: New expected output file. * gas/all/gas.exp: Add support for RX target. * gas/elf/elf.exp: Likewise. * gas/lns/lns.exp: Likewise. * gas/macros/macros.exp: Likewise. include * dis-asm.h: Add prototype for print_insn_rx. include/elf * rx.h: New file. include/opcode * rx.h: New file. ld * Makefile.am: Add rules to build RX emulation. * configure.tgt: Likewise. * NEWS: Mention support for RX architecture. * Makefile.in: Regenerate. * emulparams/elf32rx.sh: New file. * emultempl/rxelf.em: New file. opcodes * Makefile.am: Add RX files. * configure.in: Add support for RX target. * disassemble.c: Likewise. * Makefile.in: Regenerate. * configure: Regenerate. * opc2c.c: New file. * rx-decode.c: New file. * rx-decode.opc: New file. * rx-dis.c: New file.
2009-09-29 16:17:19 +02:00
#define ARCH_rx
2001-02-10 01:58:38 +01:00
#define ARCH_s390
2006-09-17 01:51:50 +02:00
#define ARCH_score
1999-05-03 09:29:11 +02:00
#define ARCH_sh
#define ARCH_sparc
2006-10-25 08:49:21 +02:00
#define ARCH_spu
1999-05-03 09:29:11 +02:00
#define ARCH_tic30
2002-08-28 12:38:51 +02:00
#define ARCH_tic4x
2000-05-06 19:14:34 +02:00
#define ARCH_tic54x
bfd: * Makefile.am (ALL_MACHINES): Add cpu-tic6x.lo. (ALL_MACHINES_CFILES): Add cpu-tic6x.c. (BFD32_BACKENDS): Add elf32-tic6x.lo. (BFD32_BACKENDS_CFILES): Add elf32-tic6x.c. * Makefile.in: Regenerate. * archures.c (bfd_arch_tic6x, bfd_tic6x_arch): New. (bfd_archures_list): Update. * config.bfd (tic6x-*-elf): New. * configure.in (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec): New. * configure: Regenerate. * cpu-tic6x.c, elf32-tic6x.c: New. * reloc.c (BFD_RELOC_C6000_PCR_S21, BFD_RELOC_C6000_PCR_S12, BFD_RELOC_C6000_PCR_S10, BFD_RELOC_C6000_PCR_S7, BFD_RELOC_C6000_ABS_S16, BFD_RELOC_C6000_ABS_L16, BFD_RELOC_C6000_ABS_H16, BFD_RELOC_C6000_SBR_U15_B, BFD_RELOC_C6000_SBR_U15_H, BFD_RELOC_C6000_SBR_U15_W, BFD_RELOC_C6000_SBR_S16, BFD_RELOC_C6000_SBR_L16_B, BFD_RELOC_C6000_SBR_L16_H, BFD_RELOC_C6000_SBR_L16_W, BFD_RELOC_C6000_SBR_H16_B, BFD_RELOC_C6000_SBR_H16_H, BFD_RELOC_C6000_SBR_H16_W, BFD_RELOC_C6000_SBR_GOT_U15_W, BFD_RELOC_C6000_SBR_GOT_L16_W, BFD_RELOC_C6000_SBR_GOT_H16_W, BFD_RELOC_C6000_DSBT_INDEX, BFD_RELOC_C6000_PREL31, BFD_RELOC_C6000_COPY, BFD_RELOC_C6000_ALIGN, BFD_RELOC_C6000_FPHEAD, BFD_RELOC_C6000_NOCMP): New. * targets.c (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec): New. (_bfd_target_vector): Update. * bfd-in2.h, libbfd.h: Regenerate. binutils: * MAINTAINERS: Add self as TI C6X maintainer. * NEWS: Add news entry for TI C6X support. * readelf.c: Include elf/tic6x.h. (guess_is_rela): Handle EM_TI_C6000. (dump_relocations): Likewise. (get_tic6x_dynamic_type): New. (get_dynamic_type): Call it. (get_machine_flags): Handle EF_C6000_REL. (get_osabi_name): Handle machine-specific values only for relevant machines. Handle C6X values. (get_tic6x_segment_type): New. (get_segment_type): Call it. (get_tic6x_section_type_name): New. (get_section_type_name): Call it. (is_32bit_abs_reloc, is_16bit_abs_reloc, is_none_reloc): Handle EM_TI_C6000. gas: * Makefile.am (TARGET_CPU_CFILES): Add config/tc-tic6x.c. (TARGET_CPU_HFILES): Add config/tc-tic6x.h. * Makefile.in: Regenerate. * NEWS: Add news entry for TI C6X support. * app.c (do_scrub_chars): Handle "||^" for TI C6X. Handle TC_PREDICATE_START_CHAR and TC_PREDICATE_END_CHAR. Keep spaces in operands if TC_KEEP_OPERAND_SPACES. * configure.tgt (tic6x-*-*): New. * config/tc-ia64.h (TC_PREDICATE_START_CHAR, TC_PREDICATE_END_CHAR): Define. * config/tc-tic6x.c, config/tc-tic6x.h: New. * doc/Makefile.am (CPU_DOCS): Add c-tic6x.texi. * doc/Makefile.in: Regenerate. * doc/all.texi (TIC6X): Define. * doc/as.texinfo: Add TI C6X documentation. Include c-tic6x.texi. * doc/c-tic6x.texi: New. gas/testsuite: * gas/tic6x: New directory and testcases. include: * dis-asm.h (print_insn_tic6x): Declare. include/elf: * common.h (ELFOSABI_C6000_ELFABI, ELFOSABI_C6000_LINUX): Define. * tic6x.h: New. include/opcode: * tic6x-control-registers.h, tic6x-insn-formats.h, tic6x-opcode-table.h, tic6x.h: New. ld: * Makefile.am (ALL_EMULATIONS): Add eelf32_tic6x_be.o and eelf32_tic6x_le.o. (eelf32_tic6x_be.c, eelf32_tic6x_le.c): New. * NEWS: Add news entry for TI C6X support. * configure.tgt (tic6x-*-*): New. * emulparams/elf32_tic6x_be.sh, emulparams/elf32_tic6x_le.sh: New. ld/testsuite: * ld-elf/flags1.d, ld-elf/merge.d: XFAIL for tic6x-*-*. * ld-elf/sec-to-seg.exp: Set B_test_same_seg to 0 for tic6x-*-*. * ld-tic6x: New directory and testcases. opcodes: * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c. * Makefile.in: Regenerate. * configure.in (bfd_tic6x_arch): New. * configure: Regenerate. * disassemble.c (ARCH_tic6x): Define if ARCH_all. (disassembler): Handle TI C6X. * tic6x-dis.c: New.
2010-03-25 22:12:36 +01:00
#define ARCH_tic6x
1999-05-03 09:29:11 +02:00
#define ARCH_tic80
* Makefile.am (ALL_MACHINES): Add cpu-tilegx.lo and cpu-tilepro.lo. (ALL_MACHINE_CFILES): Add cpu-tilegx.c and cpu-tilepro.c. (BFD32_BACKENDS): Add elf32-tilegx.lo, elf32-tilepro.lo, and elfxx-tilegx.lo. (BFD32_BACKENDS_CFILES): Add elf32-tilegx.c elf32-tilepro.c, and elfxx-tilegx.c. (BFD64_BACKENDS): Add elf64-tilegx.lo. (BFD64_BACKENDS_CFILES): Add elf64-tilegx.c. * Makefile.in: Regenerate. * arctures.c (bfd_architecture): Define bfd_arch_tilepro, bfd_arch_tilegx, bfd_mach_tilepro, bfd_mach_tilegx. (bfd_arch_info): Add bfd_tilegx_arch, bfd_tilepro_arch. (bfd_archures_list): Add bfd_tilegx_arch, bfd_tilepro_arch. bfd-in2.h: Regenerate. * config.bfd: Handle tilegx-*-* and tilepro-*-*. * configure.in: Handle bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec, and bfd_elf64_tilegx_vec. * configure: Regenerate. * elf-bfd.h (enum elf_target_id): Define TILEGX_ELF_DATA and TILEPRO_ELF_DATA. * libbfd.h: Regenerate. * reloc.c: Add BFD_RELOC_TILEPRO_{COPY, GLOB_DAT, JMP_SLOT, RELATIVE, BROFF_X1, JOFFLONG_X1, JOFFLONG_X1_PLT, IMM8_X0, IMM8_Y0, IMM8_X1, IMM8_Y1, DEST_IMM8_X1, MT_IMM15_X1, MF_IMM15_X1, IMM16_X0, IMM16_X1, IMM16_X0_LO, IMM16_X1_LO, IMM16_X0_HI, IMM16_X1_HI, IMM16_X0_HA, IMM16_X1_HA, IMM16_X0_PCREL, IMM16_X1_PCREL, IMM16_X0_LO_PCREL, IMM16_X1_LO_PCREL, IMM16_X0_HI_PCREL, IMM16_X1_HI_PCREL, IMM16_X0_HA_PCREL, IMM16_X1_HA_PCREL, IMM16_X0_GOT, IMM16_X1_GOT, IMM16_X0_GOT_LO, IMM16_X1_GOT_LO, IMM16_X0_GOT_HI, IMM16_X1_GOT_HI, IMM16_X0_GOT_HA, IMM16_X1_GOT_HA, MMSTART_X0, MMEND_X0, MMSTART_X1, MMEND_X1, SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1, IMM16_X0_TLS_GD, IMM16_X1_TLS_GD, IMM16_X0_TLS_GD_LO, IMM16_X1_TLS_GD_LO, IMM16_X0_TLS_GD_HI, IMM16_X1_TLS_GD_HI, IMM16_X0_TLS_GD_HA, IMM16_X1_TLS_GD_HA, IMM16_X0_TLS_IE, IMM16_X1_TLS_IE, IMM16_X0_TLS_IE_LO, IMM16_X1_TLS_IE_LO, IMM16_X0_TLS_IE_HI, IMM16_X1_TLS_IE_HI, IMM16_X0_TLS_IE_HA, IMM16_X1_TLS_IE_HA, TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32} Add BFD_RELOC_TILEGX_{HW0, HW1, HW2, HW3, HW0_LAST, HW1_LAST, HW2_LAST, COPY, GLOB_DAT, JMP_SLOT, RELATIVE, BROFF_X1, JUMPOFF_X1, JUMPOFF_X1_PLT, IMM8_X0, IMM8_Y0, IMM8_X1, IMM8_Y1, DEST_IMM8_X1, MT_IMM14_X1, MF_IMM14_X1, MMSTART_X0, MMEND_X0, SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1, IMM16_X0_HW0, IMM16_X1_HW0, IMM16_X0_HW1, IMM16_X1_HW1, IMM16_X0_HW2, IMM16_X1_HW2, IMM16_X0_HW3, IMM16_X1_HW3, IMM16_X0_HW0_LAST, IMM16_X1_HW0_LAST, IMM16_X0_HW1_LAST, IMM16_X1_HW1_LAST, IMM16_X0_HW2_LAST, IMM16_X1_HW2_LAST, IMM16_X0_HW0_PCREL, IMM16_X1_HW0_PCREL, IMM16_X0_HW1_PCREL, IMM16_X1_HW1_PCREL, IMM16_X0_HW2_PCREL, IMM16_X1_HW2_PCREL, IMM16_X0_HW3_PCREL, IMM16_X1_HW3_PCREL, IMM16_X0_HW0_LAST_PCREL, IMM16_X1_HW0_LAST_PCREL, IMM16_X0_HW1_LAST_PCREL, IMM16_X1_HW1_LAST_PCREL, IMM16_X0_HW2_LAST_PCREL, IMM16_X1_HW2_LAST_PCREL, IMM16_X0_HW0_GOT, IMM16_X1_HW0_GOT, IMM16_X0_HW1_GOT, IMM16_X1_HW1_GOT, IMM16_X0_HW2_GOT, IMM16_X1_HW2_GOT, IMM16_X0_HW3_GOT, IMM16_X1_HW3_GOT, IMM16_X0_HW0_LAST_GOT, IMM16_X1_HW0_LAST_GOT, IMM16_X0_HW1_LAST_GOT, IMM16_X1_HW1_LAST_GOT, IMM16_X0_HW2_LAST_GOT, IMM16_X1_HW2_LAST_GOT, IMM16_X0_HW0_TLS_GD, IMM16_X1_HW0_TLS_GD, IMM16_X0_HW1_TLS_GD, IMM16_X1_HW1_TLS_GD, IMM16_X0_HW2_TLS_GD, IMM16_X1_HW2_TLS_GD, IMM16_X0_HW3_TLS_GD, IMM16_X1_HW3_TLS_GD, IMM16_X0_HW0_LAST_TLS_GD, IMM16_X1_HW0_LAST_TLS_GD, IMM16_X0_HW1_LAST_TLS_GD, IMM16_X1_HW1_LAST_TLS_GD, IMM16_X0_HW2_LAST_TLS_GD, IMM16_X1_HW2_LAST_TLS_GD, IMM16_X0_HW0_TLS_IE, IMM16_X1_HW0_TLS_IE, IMM16_X0_HW1_TLS_IE, IMM16_X1_HW1_TLS_IE, IMM16_X0_HW2_TLS_IE, IMM16_X1_HW2_TLS_IE, IMM16_X0_HW3_TLS_IE, IMM16_X1_HW3_TLS_IE, IMM16_X0_HW0_LAST_TLS_IE, IMM16_X1_HW0_LAST_TLS_IE, IMM16_X0_HW1_LAST_TLS_IE, IMM16_X1_HW1_LAST_TLS_IE, IMM16_X0_HW2_LAST_TLS_IE, IMM16_X1_HW2_LAST_TLS_IE, TLS_DTPMOD64, TLS_DTPOFF64, TLS_TPOFF64, TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32} * targets.c (bfd_elf32_tilegx_vec): Declare. (bfd_elf32_tilepro_vec): Declare. (bfd_elf64_tilegx_vec): Declare. (bfd_target_vector): Add bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec, and bfd_elf64_tilegx_vec. * cpu-tilegx.c: New file. * cpu-tilepro.c: New file. * elf32-tilepro.h: New file. * elf32-tilepro.c: New file. * elf32-tilegx.c: New file. * elf32-tilegx.h: New file. * elf64-tilegx.c: New file. * elf64-tilegx.h: New file. * elfxx-tilegx.c: New file. * elfxx-tilegx.h: New file. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-tilegx.c and config/tc-tilepro.c. (TARGET_CPU_HFILES): Add config/tc-tilegx.h and config/tc-tilepro.h. * Makefile.in: Regenerate. * configure.tgt (tilepro-*-*): New. (tilegx-*-*): Likewise. * config/tc-tilegx.c: New file. * config/tc-tilegx.h: Likewise. * config/tc-tilepro.h: Likewise. * config/tc-tilepro.c: Likewise. * doc/Makefile.am (CPU_DOCS): Add c-tilegx.texi and c-tilepro.texi. * doc/Makefile.in: Regenerate. * doc/all.texi (TILEGX): Define. (TILEPRO): Define. * doc/as.texinfo: Add Tile-Gx and TILEPro documentation. Include c-tilegx.texi and c-tilepro.texi. * doc/c-tilegx.texi: New. * doc/c-tilepro.texi: New. * gas/tilepro/t_constants.s: New file. * gas/tilepro/t_constants.d: Likewise. * gas/tilepro/t_insns.s: Likewise. * gas/tilepro/tilepro.exp: Likewise. * gas/tilepro/t_insns.d: Likewise. * gas/tilegx/tilegx.exp: Likewise. * gas/tilegx/t_insns.d: Likewise. * gas/tilegx/t_insns.s: Likewise. * dis-asm.h (print_insn_tilegx): Declare. (print_insn_tilepro): Likewise. * tilegx.h: New file. * tilepro.h: New file. * common.h: Add EM_TILEGX. * tilegx.h: New file. * tilepro.h: New file. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32tilegx.c and eelf32tilepro.c. (ALL_64_EMULATION_SOURCES): Add eelf64tilegx.c. (eelf32tilegx.c): New target. (eelf32tilepro.c): Likewise. (eelf64tilegx.c): Likewise. * Makefile.in: Regenerate. * configure.tgt: Handle tilegx-*-* and tilepro-*-*. * emulparams/elf32tilegx.sh: New file. * emulparams/elf64tilegx.sh: New file. * emulparams/elf32tilepro.sh: New file. * ld-elf/eh5.d: Don't run on tile*. * ld-srec/srec.exp: xfail on tile*. * ld-tilegx/external.s: New file. * ld-tilegx/reloc.d: New file. * ld-tilegx/reloc.s: New file. * ld-tilegx/tilegx.exp: New file. * ld-tilepro/external.s: New file. * ld-tilepro/reloc.d: New file. * ld-tilepro/reloc.s: New file. * ld-tilepro/tilepro.exp: New file. * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tilegx-dis.c, tilegx-opc.c, tilepro-dis.c, and tilepro-opc.c. * Makefile.in: Regenerate. * configure.in: Handle bfd_tilegx_arch and bfd_tilepro_arch. * configure: Regenerate. * disassemble.c (disassembler): Add ARCH_tilegx and ARCH_tilepro. * po/POTFILES.in: Regenerate. * tilegx-dis.c: New file. * tilegx-opc.c: New file. * tilepro-dis.c: New file. * tilepro-opc.c: New file.
2011-06-13 17:18:54 +02:00
#define ARCH_tilegx
#define ARCH_tilepro
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#define ARCH_v850
#define ARCH_vax
#define ARCH_visium
1999-05-03 09:29:11 +02:00
#define ARCH_w65
#define ARCH_wasm32
Index: bfd/ChangeLog 2001-12-07 Geoffrey Keating <geoffk@redhat.com> Richard Henderson <rth@redhat.com> Corinna Vinschen <vinschen@redhat.com> * Makefile.am: Add support for xstormy16. * archures.c: Add support for xstormy16. * config.bfd: Add support for xstormy16. * configure.in: Add support for xstormy16. * reloc.c: Add support for xstormy16. * targets.c: Add support for xstormy16. * cpu-xstormy16.c: New file. * elf32-xstormy16.c: New file. * Makefile.in: Regenerated. * bfd-in2.h: Regenerated. * configure: Regenerated. * libbfd.h: Regenerated. Index: binutils/ChangeLog 2001-12-07 Geoffrey Keating <geoffk@redhat.com> * readelf.c (guess_is_rela): Add support for stormy16. (dump_relocations): Likewise. (get_machine_name): Likewise. Index: gas/ChangeLog 2001-12-07 Geoffrey Keating <geoffk@redhat.com> Richard Henderson <rth@redhat.com> * configure.in: Add support for xstormy16. * configure: Regenerated. * Makefile.am: Add support for xstormy16. * Makefile.in: Regenerated. * config/tc-xstormy16.c: New file. * config/tc-xstormy16.h: New file. Index: gas/testsuite/ChangeLog 2001-12-07 Geoffrey Keating <geoffk@redhat.com> matthew green <mrg@redhat.com> * gas/xstormy16/allinsn.d: New file. * gas/xstormy16/allinsn.exp: New file. * gas/xstormy16/allinsn.s: New file. * gas/xstormy16/allinsn.sh: New file. * gas/xstormy16/gcc.d: New file. * gas/xstormy16/gcc.s: New file. * gas/xstormy16/gcc.sh: New file. * gas/xstormy16/reloc-1.d: New file. * gas/xstormy16/reloc-1.s: New file. * gas/xstormy16/reloc-2.d: New file. * gas/xstormy16/reloc-2.s: New file. Index: ld/ChangeLog 2001-12-07 Geoffrey Keating <geoffk@redhat.com> Richard Henderson <rth@redhat.com> * Makefile.am: Add support for xstormy16. * configure.tgt: Add support for xstormy16. * Makefile.in: Regenerate. * emulparams/elf32xstormy16.sh: New file. * scripttempl/xstormy16.sc: New file. Index: opcodes/ChangeLog 2001-12-07 Geoffrey Keating <geoffk@redhat.com> * Makefile.am: Add support for xstormy16. * Makefile.in: Regenerate. * configure.in: Add support for xstormy16. * configure: Regenerate. * disassemble.c: Add support for xstormy16. * xstormy16-asm.c: New generated file. * xstormy16-desc.c: New generated file. * xstormy16-desc.h: New generated file. * xstormy16-dis.c: New generated file. * xstormy16-ibld.c: New generated file. * xstormy16-opc.c: New generated file. * xstormy16-opc.h: New generated file. Index: include/ChangeLog 2001-12-07 Geoffrey Keating <geoffk@redhat.com> * dis-asm.h (print_insn_xstormy16): Declare. Index: include/elf/ChangeLog 2001-12-07 Geoffrey Keating <geoffk@redhat.com> Richard Henderson <rth@redhat.com> * common.h (EM_XSTORMY16): Define. * xstormy16.h: New file.
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#define ARCH_xstormy16
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#define ARCH_xc16x
#define ARCH_xgate
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#define ARCH_xtensa
#define ARCH_z80
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#define ARCH_z8k
Contribute sh64-elf. 2001-10-08 Nick Clifton <nickc@cambridge.redhat.com> * sh64-opc.c: Regenerate. 2001-03-13 DJ Delorie <dj@redhat.com> * sh64-opc.h: Rename A_RESV_Fx to A_REUSE_PREV so that its purpose is more obvious. * sh64-opc.c (shmedia_table): Ditto. * sh64-dis.c (initialize_shmedia_opcode_mask_table): Ditto. (print_insn_shmedia): Ditto. 2001-03-12 DJ Delorie <dj@redhat.com> * sh64-opc.c: Adjust comments to reflect reality: replace bits 3:0 with zeros (not "reserved"), replace "rrrrrr" with "gggggg" for two-operand floating point opcodes. Remove "fsina". 2001-01-08 Hans-Peter Nilsson <hpn@cygnus.com> * sh64-dis.c (print_insn_shmedia) <failing read_memory_func>: Correct printing of .byte:s. Return number of printed bytes or -1; never 0. (print_insn_sh64x) <not CRT_SH5_ISA16>: Ditto. Print as .byte:s to next four-byte-alignment if insn or data is not aligned. 2001-01-06 Hans-Peter Nilsson <hpn@cygnus.com> * sh64-dis.c: Update comments and fix comment formatting. (initialize_shmedia_opcode_mask_table) <case A_IMMM>: Abort instead of setting length to 0. (crange_qsort_cmpb, crange_qsort_cmpl, crange_bsearch_cmpb, crange_bsearch_cmpl, sh64_get_contents_type, sh64_address_in_cranges): Move to bfd/elf32-sh64.c. 2001-01-05 Hans-Peter Nilsson <hpn@cygnus.com> * sh64-opc.c: Remove #if 0:d entries for instructions not found in SH-5/ST50-023-04: fcosa.s, fsrra.s and prefo. 2000-12-30 Hans-Peter Nilsson <hpn@cygnus.com> * sh64-dis.c (print_insn_shmedia): Display MOVI/SHORI-formed address with same prefix as SHcompact. In the disassembler, use a .cranges section for linked executables. * sh64-dis.c (SAVED_MOVI_R, SAVED_MOVI_IMM): Move to head of file and update for using structure in info->private_data. (struct sh64_disassemble_info): New. (is_shmedia_p): Delete. (crange_qsort_cmpb): New function. (crange_qsort_cmpl, crange_bsearch_cmpb): New functions. (crange_bsearch_cmpl, sh64_address_in_cranges): New functions. (init_sh64_disasm_info, sh64_get_contents_type_disasm): New functions. (sh64_get_contents_type, sh64_address_is_shmedia): New functions. (print_insn_shmedia): Correct displaying of address after MOVI/SHORI pair. Display addresses for linked executables only. (print_insn_sh64x_media): Initialize info->private_data by calling init_sh64_disasm_info. (print_insn_sh64x): Ditto. Find out type of contents by calling sh64_contents_type_disasm. Display data regions using ".long" and ".byte" similar to unrecognized opcodes. 2000-12-19 Hans-Peter Nilsson <hpn@cygnus.com> * sh64-dis.c (is_shmedia_p): Check info->section and look for ISA information in section flags before considering symbols. Don't assume an info->mach setting of bfd_mach_sh5 means SHmedia code. * configure.in (bfd_sh_arch): Check presence of sh64 insns by matching $target $canon_targets instead of looking at the now-removed -DINCLUDE_SHMEDIA in $targ_cflags. * configure: Regenerate. 2000-11-25 Hans-Peter Nilsson <hpn@cygnus.com> * sh64-opc.c (shmedia_creg_table): New. * sh64-opc.h (shmedia_creg_info): New type. (shmedia_creg_table): Declare. * sh64-dis.c (creg_name): New function. (print_insn_shmedia): Use it. * disassemble.c (disassembler) [ARCH_sh, INCLUDE_SHMEDIA]: Map bfd_mach_sh5 to print_insn_sh64 if big-endian and to print_insn_sh64l if little-endian. * sh64-dis.c (print_insn_shmedia): Make r unsigned. (print_insn_sh64l): New. (print_insn_sh64x): New. (print_insn_sh64x_media): New. (print_insn_sh64): Break out code to print_insn_sh64x and print_insn_sh64x_media. 2000-11-24 Hans-Peter Nilsson <hpn@cygnus.com> * sh64-opc.h: New file * sh64-opc.c: New file * sh64-dis.c: New file * Makefile.am: Add sh64 targets. (HFILES): Add sh64-opc.h. (CFILES): Add sh64-opc.c and sh64-dis.c. (ALL_MACHINES): Add sh64 files. * Makefile.in: Regenerate. * configure.in: Add support for sh64 to bfd_sh_arch. * configure: Regenerate. * disassemble.c [ARCH_all] (INCLUDE_SHMEDIA): Define. (disassembler) [ARCH_sh, INCLUDE_SHMEDIA]: Map bfd_mach_sh5 to print_insn_sh64. * sh-dis.c (print_insn_shx): Handle bfd_mach_sh5 as arch_sh4. * po/POTFILES.in: Regenerate. * po/opcodes.pot: Regenerate.
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#define INCLUDE_SHMEDIA
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#endif
ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * configure.in: Add cases for Renesas m32c. * configure: Regenerated. bfd/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for m32c-*-elf (Renesas m32c and m16c). * Makefile.am (ALL_MACHINES): Add cpu-m32c.lo. (ALL_MACHINES_CFILES): Add cpu-m32c.c. (BFD32_BACKENDS): Add elf32-m32c.lo. (BFD32_BACKENDS_CFILES): Add elf32-m32c.c. (cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'. * Makefile.in: Regenerated. * archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New arch and mach codes. (bfd_m32c_arch): New arch info object. (bfd_archures_list): List bfd_m32c_arch. * bfd-in2.h: Regenerated. * config.bfd: Add case for the m32c. * configure.in: Add case for the m32c. * configure: Regenerated. * cpu-m32c.c, elf32-m32c.c: New files. * libbfd.h: Regenerated. * targets.c (bfd_elf32_m32c_vec): Declare. (_bfd_target_vector): List bfd_elf32_m32c_vec. binutils/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * readelf.c: #include "elf/m32c.h" (guess_is_rela, dump_relocations, get_machine_name): Add cases for EM_M32C. * Makefile.am (readelf.o): Update dependencies. * Makefile.in: Regenerated. cpu/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * m32c.cpu, m32c.opc: Machine description for the Renesas M32C. gas/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C. * Makefile.am (CPU_TYPES): List m32c. (TARGET_CPU_CFILES): List config/tc-m32c.c. (TARGET_CPU_HFILES): List config/tc-m32c.h. * configure.in: Add case for m32c. * configure.tgt: Add cases for m32c and m32c-*-elf. * configure: Regenerated. * config/tc-m32c.c, config/tc-m32c.h: New files. * doc/Makefile.am (CPU_DOCS): Add c-m32c.texi. * doc/Makefile.in: Regenerated. * doc/all.texi: Set M32C. * doc/as.texinfo: Add text for the M32C-specific options and line comment characters, and refer to c-m32c.texi. * doc/c-m32c.texi: New file. include/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * dis-asm.h (print_insn_m32c): New declaration. include/elf/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for Renesas M32C and M16C. * common.h (EM_M32C): New machine number. * m32c.h: New file. ld/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o. (eelf32m32c.c): New target. * Makefile.in: Regenerated. * configure.tgt: Add case for m32c-*-elf. * emulparams/elf32m32c.sh: New file. opcodes/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New. * m32c-desc.h, m32c-opc.h: New. * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h. (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c. (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo. (CLEANFILES): List stamp-m32c. (M32C_DEPS): List stamp-m32c, if CGEN_MAINT. (CGEN_CPUS): Add m32c. (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c) (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS. (m32c_opc_h): New variable. (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo) (m32c-opc.lo): New rules. * Makefile.in: Regenerated. * configure.in: Add case for bfd_m32c_arch. * configure: Regenerated. * disassemble.c (ARCH_m32c): New. [ARCH_m32c]: #include "m32c-desc.h". (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c. (disassemble_init_for_target) [ARCH_m32c]: Same. * cgen-ops.h, cgen-types.h: New files. * Makefile.am (HFILES): List them. * Makefile.in: Regenerated.
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#ifdef ARCH_m32c
#include "m32c-desc.h"
#endif
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disassembler_ftype
disassembler (enum bfd_architecture a,
bfd_boolean big ATTRIBUTE_UNUSED,
unsigned long mach ATTRIBUTE_UNUSED,
GDB/opcodes: Remove arch/mach/endian disassembler assertions Fix `set architecture' and `set endian' command disassembly regressions from commit 39503f82427e ("Delegate opcodes to select disassembler in GDB"), and commit 003ca0fd2286 ("Refactor disassembler selection"), as well as a MIPS compressed ISA disassembly target regression from commit 6394c606997f ("Don't use print_insn_XXX in GDB"), which caused assertion failures to trigger. For example with the `mips-linux-gnu' target we get: $ cat main.c int main (void) { return 0; } $ gcc -mips32r2 -O2 main.c -o main $ gcc -mips16 -mips32r2 -O2 main.c -o main16 $ gdb GNU gdb (GDB) 8.0.50.20170731-git [...] (gdb) file main Reading symbols from main...done. (gdb) show architecture The target architecture is set automatically (currently mips:isa32r2) (gdb) show endian The target endianness is set automatically (currently big endian) (gdb) disassemble main Dump of assembler code for function main: 0x00400500 <+0>: jr ra 0x00400504 <+4>: move v0,zero End of assembler dump. (gdb) set architecture mips:isa64r2 The target architecture is assumed to be mips:isa64r2 (gdb) disassemble main Dump of assembler code for function main: 0x00400500 <+0>: .../gdb/arch-utils.c:979: internal-error: int default_print_insn(bfd_vma, disassemble_info*): Assertion `info->mach == bfd_get_mach (exec_bfd)' failed. A problem internal to GDB has been detected, further debugging may prove unreliable. Quit this debugging session? (y or n) n [...] Command aborted. (gdb) set architecture auto The target architecture is set automatically (currently mips:isa32r2) (gdb) set endian little The target is assumed to be little endian (gdb) disassemble main Dump of assembler code for function main: 0x00400500 <+0>: .../gdb/arch-utils.c:978: internal-error: int default_print_insn(bfd_vma, disassemble_info*): Assertion `info->endian == (bfd_big_endian (exec_bfd) ? BFD_ENDIAN_BIG : BFD_ENDIAN_LITTLE)' failed. A problem internal to GDB has been detected, further debugging may prove unreliable. Quit this debugging session? (y or n) n [...] Command aborted. (gdb) set endian auto The target endianness is set automatically (currently big endian) (gdb) set architecture i386 The target architecture is assumed to be i386 (gdb) disassemble main Dump of assembler code for function main: 0x00400500 <+0>: .../gdb/arch-utils.c:976: internal-error: int default_print_insn(bfd_vma, disassemble_info*): Assertion `info->arch == bfd_get_arch (exec_bfd)' failed. A problem internal to GDB has been detected, further debugging may prove unreliable. Quit this debugging session? (y or n) n [...] Command aborted. (gdb) set architecture auto The target architecture is set automatically (currently mips:isa32r2) (gdb) file main16 Load new symbol table from "main16"? (y or n) y Reading symbols from main16...done. (gdb) disassemble main Dump of assembler code for function main: 0x00400501 <+0>: .../gdb/arch-utils.c:979: internal-error: int default_print_insn(bfd_vma, disassemble_info*): Assertion `info->mach == bfd_get_mach (exec_bfd)' failed. A problem internal to GDB has been detected, further debugging may prove unreliable. Quit this debugging session? (y or n) n Command aborted. (gdb) Remove the assertions then, restoring previous semantics: (gdb) file main Reading symbols from main...done. (gdb) set architecture mips:isa64r2 The target architecture is assumed to be mips:isa64r2 (gdb) disassemble main Dump of assembler code for function main: 0x00400500 <+0>: jr ra 0x00400504 <+4>: move v0,zero End of assembler dump. (gdb) set endian little The target is assumed to be little endian (gdb) disassemble main Dump of assembler code for function main: 0x00400500 <+0>: j 0x3800c 0x00400504 <+4>: addiu s0,t0,0 End of assembler dump. (gdb) set architecture i386 The target architecture is assumed to be i386 (gdb) disassemble main Dump of assembler code for function main: 0x00400500 <+0>: add %eax,%esp 0x00400502 <+2>: add %cl,(%eax) 0x00400504 <+4>: add %al,(%eax) 0x00400506 <+6>: adc %ah,0x0 End of assembler dump. (gdb) set architecture auto The target architecture is set automatically (currently mips:isa32r2) (gdb) set endian auto The target endianness is set automatically (currently big endian) (gdb) file main16 Load new symbol table from "main16"? (y or n) y Reading symbols from main16...done. (gdb) disassemble main Dump of assembler code for function main: 0x00400501 <+0>: jr ra 0x00400503 <+2>: li v0,0 End of assembler dump. (gdb) gdb/ * arch-utils.c (default_print_insn): Remove arch/mach/endian assertions. opcodes/ * disassemble.c (disassembler): Remove arch/mach/endian assertions.
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bfd *abfd ATTRIBUTE_UNUSED)
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{
disassembler_ftype disassemble;
switch (a)
{
/* If you add a case to this table, also add it to the
ARCH_all definition right above this function. */
#ifdef ARCH_aarch64
case bfd_arch_aarch64:
disassemble = print_insn_aarch64;
break;
#endif
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#ifdef ARCH_alpha
case bfd_arch_alpha:
disassemble = print_insn_alpha;
break;
#endif
#ifdef ARCH_arc
case bfd_arch_arc:
disassemble = arc_get_disassembler (abfd);
break;
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#endif
#ifdef ARCH_arm
case bfd_arch_arm:
if (big)
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disassemble = print_insn_big_arm;
else
disassemble = print_insn_little_arm;
break;
#endif
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#ifdef ARCH_avr
case bfd_arch_avr:
disassemble = print_insn_avr;
break;
#endif
#ifdef ARCH_bfin
case bfd_arch_bfin:
disassemble = print_insn_bfin;
break;
#endif
#ifdef ARCH_cr16
case bfd_arch_cr16:
disassemble = print_insn_cr16;
break;
#endif
#ifdef ARCH_cris
case bfd_arch_cris:
disassemble = cris_get_disassembler (abfd);
break;
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#endif
#ifdef ARCH_crx
case bfd_arch_crx:
disassemble = print_insn_crx;
break;
#endif
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#ifdef ARCH_d10v
case bfd_arch_d10v:
disassemble = print_insn_d10v;
break;
#endif
#ifdef ARCH_d30v
case bfd_arch_d30v:
disassemble = print_insn_d30v;
break;
#endif
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#ifdef ARCH_dlx
case bfd_arch_dlx:
/* As far as I know we only handle big-endian DLX objects. */
disassemble = print_insn_dlx;
break;
#endif
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#ifdef ARCH_h8300
case bfd_arch_h8300:
if (mach == bfd_mach_h8300h || mach == bfd_mach_h8300hn)
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disassemble = print_insn_h8300h;
else if (mach == bfd_mach_h8300s
|| mach == bfd_mach_h8300sn
|| mach == bfd_mach_h8300sx
|| mach == bfd_mach_h8300sxn)
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disassemble = print_insn_h8300s;
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else
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disassemble = print_insn_h8300;
break;
#endif
#ifdef ARCH_h8500
case bfd_arch_h8500:
disassemble = print_insn_h8500;
break;
#endif
#ifdef ARCH_hppa
case bfd_arch_hppa:
disassemble = print_insn_hppa;
break;
#endif
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#ifdef ARCH_i370
case bfd_arch_i370:
disassemble = print_insn_i370;
break;
#endif
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#ifdef ARCH_i386
case bfd_arch_i386:
case bfd_arch_iamcu:
bfd/ 2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * archures.c (bfd_architecture): Add bfd_arch_l1om. (bfd_l1om_arch): New. (bfd_archures_list): Add &bfd_l1om_arch. * bfd-in2.h: Regenerated. * config.bfd (targ64_selvecs): Add bfd_elf64_l1om_vec if bfd_elf64_x86_64_vec is supported. Add bfd_elf64_l1om_freebsd_vec if bfd_elf64_x86_64_freebsd_vec is supported. (targ_selvecs): Likewise. * configure.in: Support bfd_elf64_l1om_vec and bfd_elf64_l1om_freebsd_vec. * configure: Regenerated. * cpu-l1om.c: New. * elf64-x86-64.c (elf64_l1om_elf_object_p): New. (bfd_elf64_l1om_vec): Likewise. (bfd_elf64_l1om_freebsd_vec): Likewise. * Makefile.am (ALL_MACHINES): Add cpu-l1om.lo. (ALL_MACHINES_CFILES): Add cpu-l1om.c. * Makefile.in: Regenerated. * targets.c (bfd_elf64_l1om_vec): New. (bfd_elf64_l1om_freebsd_vec): Likewise. (_bfd_target_vector): Add bfd_elf64_l1om_vec and bfd_elf64_l1om_freebsd_vec. binutils/ 2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * readelf.c (guess_is_rela): Handle EM_L1OM. (dump_relocations): Likewise. (get_machine_name): Likewise. (get_section_type_name): Likewise. (get_elf_section_flags): Likewise. (get_symbol_index_type): Likewise. (is_32bit_abs_reloc): Likewise. (is_32bit_pcrel_reloc): Likewise. (is_64bit_abs_reloc): Likewise. (is_64bit_pcrel_reloc): Likewise. (is_none_reloc): Likewise. gas/ 2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (cpu_arch): Add l1om. (check_cpu_arch_compatible): New. (set_cpu_arch): Use it. (i386_arch): New. (i386_mach): Return bfd_mach_l1om for Intel L1OM. (md_show_usage): Display l1om. (i386_target_format): Return ELF_TARGET_L1OM_FORMAT if cpu_arch_isa_flags.bitfield.cpul1om is set. * config/tc-i386.h (TARGET_ARCH): Use (i386_arch ()). (i386_arch): New. (ELF_TARGET_L1OM_FORMAT): Likewise. * doc/c-i386.texi: Document l1om. gas/testsuite/ 2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/l1om.d: New. * gas/i386/l1om-inval.l: Likewise. * gas/i386/l1om-inval.s: Likewise. * gas/i386/i386.exp: Run l1om-inval and l1om. include/elf/ 2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * common.h (EM_L1OM): New. ld/ 2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * configure.tgt (targ64_extra_emuls): Add elf_l1om if elf_x86_64 is supported. Add elf_l1om_fbsd if elf_x86_64_fbsd is supported. (targ_extra_emuls): Likewise. * Makefile.am (ALL_64_EMULATIONS): Add eelf_l1om.o and eelf_l1om_fbsd.o (eelf_l1om.c): New. (eelf_l1om_fbsd.c): Likewise. * Makefile.in: Regenerated. * emulparams/elf_l1om.sh: New. * emulparams/elf_l1om_fbsd.sh: Likewise. ld/testsuite/ 2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * ld-x86-64/abs-l1om.d: New. * ld-x86-64/protected2-l1om.d: Likewise. * ld-x86-64/protected3-l1om.d: Likewise. * ld-x86-64/x86-64.exp: Run abs-l1om, protected2-l1om and protected3-l1om. opcodes/ 2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * configure.in: Handle bfd_l1om_arch. * disassemble.c (disassembler): Likewise. * configure: Regenerated. * i386-dis.c (print_insn): Handle bfd_mach_l1om and bfd_mach_l1om_intel_syntax. Use 8 bytes per line for Intel L1OM. * i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~CpuL1OM. Add CPU_L1OM_FLAGS. (cpu_flags): Add CpuL1OM. (set_bitfield): Take an argument to set the value field. (process_i386_cpu_flag): Support ~CpuXXX and ~(CpuXXX|CpuYYY). (process_i386_opcode_modifier): Updated. (process_i386_operand_type): Likewise. * i386-init.h: Regenerated. * i386-tbl.h: Likewise. * i386-opc.h (CpuL1OM): New. (CpuXsave): Updated. (i386_cpu_flags): Add cpul1om.
2009-07-25 16:58:58 +02:00
case bfd_arch_l1om:
Add initial Intel K1OM support. bfd/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * Makefile.am (ALL_MACHINES): Add cpu-k1om.lo. (ALL_MACHINES_CFILES): Add cpu-k1om.c. * Makefile.in: Regenerated. * archures.c (bfd_architecture): Add bfd_arch_k1om. (bfd_k1om_arch): New. (bfd_archures_list): Add &bfd_k1om_arch. * bfd-in2.h: Regenerated. * config.bfd (targ64_selvecs): Add bfd_elf64_k1om_vec if bfd_elf64_x86_64_vec is supported. Add bfd_elf64_k1om_freebsd_vec if bfd_elf64_x86_64_freebsd_vec is supported. (targ_selvecs): Likewise. * configure.in: Support bfd_elf64_k1om_vec and bfd_elf64_k1om_freebsd_vec. * configure: Regenerated. * cpu-k1om.c: New. * elf64-x86-64.c (elf64_k1om_elf_object_p): New. (bfd_elf64_k1om_vec): Likewise. (bfd_elf64_k1om_freebsd_vec): Likewise. * targets.c (bfd_elf64_k1om_vec): New. (bfd_elf64_k1om_freebsd_vec): Likewise. (_bfd_target_vector): Add bfd_elf64_k1om_vec and bfd_elf64_k1om_freebsd_vec. binutils/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * dwarf.c (init_dwarf_regnames): Handle EM_K1OM. * elfedit.c (elf_machine): Support EM_K1OM. (elf_class): Likewise. * readelf.c (guess_is_rela): Handle EM_K1OM. (dump_relocations): Likewise. (get_machine_name): Likewise. (get_section_type_name): Likewise. (get_elf_section_flags): Likewise. (process_section_headers): Likewise. (get_symbol_index_type): Likewise. (is_32bit_abs_reloc): Likewise. (is_32bit_pcrel_reloc): Likewise. (is_64bit_abs_reloc): Likewise. (is_64bit_pcrel_reloc): Likewise. (is_none_reloc): Likewise. * doc/binutils.texi: Mention K1OM for elfedit. binutils/testsuite/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * binutils-all/elfedit.exp: Run elfedit-4. * binutils-all/elfedit-4.d: New. gas/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (cpu_arch): Add k1om. (i386_align_code): Handle PROCESSOR_K1OM. (check_cpu_arch_compatible): Check EM_K1OM. (i386_arch): Handle Intel K1OM. (i386_mach): Return bfd_mach_k1om for Intel K1OM. (i386_target_format): Return ELF_TARGET_K1OM_FORMAT for Intel K1OM. * config/tc-i386.h (ELF_TARGET_K1OM_FORMAT): New. (processor_type): Add PROCESSOR_K1OM. * doc/c-i386.texi: Document k1om. gas/testsuite/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/k1om.d: New. * gas/i386/k1om-inval.l: Likewise. * gas/i386/k1om-inval.s: Likewise. * gas/i386/i386.exp: Run k1om-inval and k1om. include/elf/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * common.h (EM_K1OM): New. ld/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * Makefile.am (ALL_64_EMULATIONS): Add eelf_k1om.o and eelf_k1om_fbsd.o (eelf_k1om.c): New. (eelf_k1om_fbsd.c): Likewise. * Makefile.in: Regenerated. * configure.tgt (targ64_extra_emuls): Add elf_k1om if elf_x86_64 is supported. Add elf_k1om_fbsd if elf_x86_64_fbsd is supported. (targ_extra_emuls): Likewise. * emulparams/elf_k1om.sh: New. * emulparams/elf_k1om_fbsd.sh: Likewise. ld/testsuite/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * ld-x86-64/abs-k1om.d: New. * ld-x86-64/protected2-k1om.d: Likewise. * ld-x86-64/protected3-k1om.d: Likewise. * ld-x86-64/x86-64.exp: Run abs-k1om, protected2-k1om and protected3-k1om. opcodes/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * configure.in: Handle bfd_k1om_arch. * configure: Regenerated. * disassemble.c (disassembler): Handle bfd_k1om_arch. * i386-dis.c (print_insn): Handle bfd_mach_k1om and bfd_mach_k1om_intel_syntax. * i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~(CpuL1OM|CpuK1OM). Add CPU_K1OM_FLAGS. (cpu_flags): Add CpuK1OM. * i386-opc.h (CpuK1OM): New. (i386_cpu_flags): Add cpuk1om. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2011-07-22 22:22:38 +02:00
case bfd_arch_k1om:
disassemble = print_insn_i386;
1999-05-03 09:29:11 +02:00
break;
#endif
2000-07-22 Jason Eckhardt <jle@cygnus.com> * include/opcode/i860.h (btne, bte, bla): Changed these opcodes to use sbroff ('r') instead of split16 ('s'). (J, K, L, M): New operand types for 16-bit aligned fields. (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to use I, J, K, L, M instead of just I. (T, U): New operand types for split 16-bit aligned fields. (st.x): Changed these opcodes to use S, T, U instead of just S. (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not exist on the i860. (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860. (pfeq.ss, pfeq.dd): New opcodes. (st.s): Fixed incorrect mask bits. (fmlow): Fixed incorrect mask bits. (fzchkl, pfzchkl): Fixed incorrect mask bits. (faddz, pfaddz): Fixed incorrect mask bits. (form, pform): Fixed incorrect mask bits. (pfld.l): Fixed incorrect mask bits. (fst.q): Fixed incorrect mask bits. (all floating point opcodes): Fixed incorrect mask bits for handling of dual bit. * include/elf/i860.h: New file. (elf_i860_reloc_type): Defined ELF32 i860 relocations. * bfd/cpu-i860.c: Added comments. * bfd/elf32-i860.c (TARGET_LITTLE_SYM): Defined to bfd_elf32_i860_little_vec. (TARGET_LITTLE_NAME): Defined to "elf32-i860-little". (ELF_MAXPAGESIZE): Changed to 4096. * bfd/targets.c (bfd_elf32_i860_little_vec): Declaration of new target. (bfd_target_vector): Added bfd_elf32_i860_little_vec. * bfd/config.bfd (i860-stardent-sysv4*, i860-stardent-elf*): Added config for little endian elf32 i860. (targ_defvec): Define for the new config above as "bfd_elf32_i860_little_vec". (targ_selvecs): Define for the new config above as "bfd_elf32_i860_vec bfd_elf32_i860_little_vec" * bfd/configure.in (bfd_elf32_i860_little_vec): Added recognition of new target vec. * bfd/configure: Regenerated. * opcodes/i860-dis.c: New file. (print_insn_i860): New function. (print_br_address): New function. (sign_extend): New function. (BITWISE_OP): New macro. (I860_REG_PREFIX): New macro. (grnames, frnames, crnames): New structures. * opcodes/disassemble.c (ARCH_i860): Define. (disassembler): Add check for bfd_arch_i860 to set disassemble function to print_insn_i860. * include/dis-asm.h (print_insn_i860): Add prototype. * opcodes/Makefile.in (CFILES): Added i860-dis.c. (ALL_MACHINES): Added i860-dis.lo. (i860-dis.lo): New dependences. * opcodes/configure.in: New bits for bfd_i860_arch. * opcodes/configure: Regenerated.
2000-07-28 23:10:20 +02:00
#ifdef ARCH_i860
case bfd_arch_i860:
disassemble = print_insn_i860;
break;
#endif
1999-05-03 09:29:11 +02:00
#ifdef ARCH_i960
case bfd_arch_i960:
disassemble = print_insn_i960;
break;
#endif
2000-04-21 22:22:24 +02:00
#ifdef ARCH_ia64
case bfd_arch_ia64:
disassemble = print_insn_ia64;
break;
#endif
2002-07-19 09:52:40 +02:00
#ifdef ARCH_ip2k
case bfd_arch_ip2k:
disassemble = print_insn_ip2k;
break;
#endif
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 13:18:16 +02:00
#ifdef ARCH_epiphany
case bfd_arch_epiphany:
disassemble = print_insn_epiphany;
break;
#endif
1999-05-03 09:29:11 +02:00
#ifdef ARCH_fr30
case bfd_arch_fr30:
disassemble = print_insn_fr30;
break;
#endif
2008-12-23 20:10:25 +01:00
#ifdef ARCH_lm32
case bfd_arch_lm32:
disassemble = print_insn_lm32;
break;
#endif
1999-05-03 09:29:11 +02:00
#ifdef ARCH_m32r
case bfd_arch_m32r:
disassemble = print_insn_m32r;
break;
#endif
* config/tc-m68hc11.c: Add S12X and XGATE co-processor support. Add option to offset S12 addresses into XGATE memory space. Tweak target flags to match other tools. (i.e. -m m68hc11). * doc/as.texinfo: Mention new options. * doc/c-m68hc11.texi: Document new options. * NEWS: Mention new support. * archures.c: Add bfd_arch_m9s12x and bfd_arch_m9s12xg. * config.bfd: Likewise. * cpu-m9s12x.c: New. * cpu-m9s12xg.c: New. * elf32-m68hc12.c: Add S12X and XGATE co-processor support. Add option to offset S12 addresses into XGATE memory space. Fix carry bug in IMM16 (IMM8 low/high) relocate. * Makefile.am (ALL_MACHINES): Add cpu-m9s12x and cpu-m9s12xg. (ALL_MACHINES_CFILES): Likewise. * reloc.c: Add S12X relocs. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * gas/m68hc11/insns9s12x.s: New * gas/m68hc11/insns9s12x.d: New * gas/m68hc11/hexprefix.s: New * gas/m68hc11/hexprefix.d: New * gas/m68hc11/9s12x-exg-sex-tfr.s: New * gas/m68hc11/9s12x-exg-sex-tfr.d: New * gas/m68hc11/insns9s12xg.s: New * gas/m68hc11/insns9s12xg.d: New * gas/m68hc11/9s12x-mov.s: New * gas/m68hc11/9s12x-mov.d: New * gas/m68hc11/m68hc11.exp: Updated * gas/m68hc11/*.d: Brought in line with changed objdump output. * gas/all/gas.exp: XFAIL all hc11/12 targets for redef2,3. * gas/elf/elf.exp: XFAIL all hc11/12 targets for redef. * gas/elf/dwarf2-1.d: Skip for hc11/12 targets. * gas/elf/dwarf2-2.d: Likewise. * ld-m68hc11/xgate-link.s: New. * ld-m68hc11/xgate-link.d: New. * ld-m68hc11/xgate-offset.s: New. * ld-m68hc11/xgate-offset.d: New. * ld-m68hc11/xgate1.s: New. * ld-m68hc11/xgate1.d: New. * ld-m68hc11/xgate2.s: New. * ld-m68hc11/m68hc11.exp: Updated. * ld-m68hc11/*.d: Brought in line with changed objdump output. * ld-gc/gc.exp: Update CFLAGS for m68hc11. * ld-plugin/plugin.exp: Likewise. * ld-srec/srec.exp: XFAIL for m68hc11 and m68hc12. * configure.in: Add S12X and XGATE co-processor support to m68hc11 target. * disassemble.c: Likewise. * configure: Regenerate. * m68hc11-dis.c: Make objdump output more consistent, use hex instead of decimal and use 0x prefix for hex. * m68hc11-opc.c: Add S12X and XGATE opcodes. * dis-asm.h (print_insn_m9s12x): Prototype. (print_insn_m9s12xg): Prototype. * m68hc11.h (R_M68HC12_16B, R_M68HC12_PCREL_9, R_M68HC12_PCREL_10) R_M68HC12_HI8XG, R_M68HC12_LO8XG): New relocations. (E_M68HC11_XGATE_RAMOFFSET): Define. * m68hc11.h: Add XGate definitions. (struct m68hc11_opcode): Add xg_mask field.
2012-05-15 14:55:51 +02:00
#if defined(ARCH_m68hc11) || defined(ARCH_m68hc12) \
|| defined(ARCH_9s12x) || defined(ARCH_m9s12xg)
case bfd_arch_m68hc11:
disassemble = print_insn_m68hc11;
break;
case bfd_arch_m68hc12:
disassemble = print_insn_m68hc12;
break;
* config/tc-m68hc11.c: Add S12X and XGATE co-processor support. Add option to offset S12 addresses into XGATE memory space. Tweak target flags to match other tools. (i.e. -m m68hc11). * doc/as.texinfo: Mention new options. * doc/c-m68hc11.texi: Document new options. * NEWS: Mention new support. * archures.c: Add bfd_arch_m9s12x and bfd_arch_m9s12xg. * config.bfd: Likewise. * cpu-m9s12x.c: New. * cpu-m9s12xg.c: New. * elf32-m68hc12.c: Add S12X and XGATE co-processor support. Add option to offset S12 addresses into XGATE memory space. Fix carry bug in IMM16 (IMM8 low/high) relocate. * Makefile.am (ALL_MACHINES): Add cpu-m9s12x and cpu-m9s12xg. (ALL_MACHINES_CFILES): Likewise. * reloc.c: Add S12X relocs. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * gas/m68hc11/insns9s12x.s: New * gas/m68hc11/insns9s12x.d: New * gas/m68hc11/hexprefix.s: New * gas/m68hc11/hexprefix.d: New * gas/m68hc11/9s12x-exg-sex-tfr.s: New * gas/m68hc11/9s12x-exg-sex-tfr.d: New * gas/m68hc11/insns9s12xg.s: New * gas/m68hc11/insns9s12xg.d: New * gas/m68hc11/9s12x-mov.s: New * gas/m68hc11/9s12x-mov.d: New * gas/m68hc11/m68hc11.exp: Updated * gas/m68hc11/*.d: Brought in line with changed objdump output. * gas/all/gas.exp: XFAIL all hc11/12 targets for redef2,3. * gas/elf/elf.exp: XFAIL all hc11/12 targets for redef. * gas/elf/dwarf2-1.d: Skip for hc11/12 targets. * gas/elf/dwarf2-2.d: Likewise. * ld-m68hc11/xgate-link.s: New. * ld-m68hc11/xgate-link.d: New. * ld-m68hc11/xgate-offset.s: New. * ld-m68hc11/xgate-offset.d: New. * ld-m68hc11/xgate1.s: New. * ld-m68hc11/xgate1.d: New. * ld-m68hc11/xgate2.s: New. * ld-m68hc11/m68hc11.exp: Updated. * ld-m68hc11/*.d: Brought in line with changed objdump output. * ld-gc/gc.exp: Update CFLAGS for m68hc11. * ld-plugin/plugin.exp: Likewise. * ld-srec/srec.exp: XFAIL for m68hc11 and m68hc12. * configure.in: Add S12X and XGATE co-processor support to m68hc11 target. * disassemble.c: Likewise. * configure: Regenerate. * m68hc11-dis.c: Make objdump output more consistent, use hex instead of decimal and use 0x prefix for hex. * m68hc11-opc.c: Add S12X and XGATE opcodes. * dis-asm.h (print_insn_m9s12x): Prototype. (print_insn_m9s12xg): Prototype. * m68hc11.h (R_M68HC12_16B, R_M68HC12_PCREL_9, R_M68HC12_PCREL_10) R_M68HC12_HI8XG, R_M68HC12_LO8XG): New relocations. (E_M68HC11_XGATE_RAMOFFSET): Define. * m68hc11.h: Add XGate definitions. (struct m68hc11_opcode): Add xg_mask field.
2012-05-15 14:55:51 +02:00
case bfd_arch_m9s12x:
disassemble = print_insn_m9s12x;
break;
case bfd_arch_m9s12xg:
disassemble = print_insn_m9s12xg;
break;
#endif
1999-05-03 09:29:11 +02:00
#ifdef ARCH_m68k
case bfd_arch_m68k:
disassemble = print_insn_m68k;
break;
#endif
#ifdef ARCH_m88k
case bfd_arch_m88k:
disassemble = print_insn_m88k;
break;
#endif
Second part of ms1 to mt renaming. * bfd/archures.c (bfd_arch_mt): Renamed. (bfd_mt_arch): Renamed. (bfd_archures_list): Adjusted. * bfd/bfd-in2.h: Rebuilt. * bfd/config.bfd (mt): Remove special case targ_archs. (mt-*-elf): Rename bfd_elf32_mt_vec. * bfd/configure: Rebuilt. * bfd/configure.in (bfd_elf32_mt_vec): Renamed. (selarchs) Remove mt special case. * bfd/cpu-mt.c (arch_info_struct): Adjust. (bfd_mt_arch): Renamed, adjust. * bfd/elf32-mt.c (mt_reloc_type_lookup, mt_info_to_howto_rela, mt_elf_relocate_hi16, mt_final_link_relocate, mt_relocate_section, mt_elf_howto_table): Renamed, adjusted. (mt_elf_gc_mark_hook, mt_elf_gc_sweep_hook, mt_elf_check_relocs, elf32_mt_machine, mt_elf_object_p, mt_elf_set_private_flags, mt_elf_copy_private_bfd_data, mt_elf_merge_private_bfd_data, mt_elf_print_private_bfd_data): Renamed, adjusted. (TARGET_BIG_SYM, TARGET_BIG_NAME, ELF_ARCH, ELF_MACHINE_CODE, ELF_MAXPAGESIZE, elf_info_to_howto, elf_backend_relocate_section, bfd_elf32_bfd_reloc_type_lookup, elf_backend_gc_mark_hook, elf_backend_gc_sweep_hook, elf_backend_check_relocs, eld_backend_object_p, bfd_elf32_bfd_set_private_flags, bfd_elf32_bfd_copy_private_bfd_data, bfd_elf32_bfd_merge_private_bfd_data, bfd_elf32_bfd_print_private_bfd_data): Adjusted. * bfd/libbfd.h: Regenerated. * bfd/reloc.c (BFD_RELOC_MT_PC16, BFD_RELOC_MT_HI16, BFD_RELOC_MT_LO16, BFD_RELOC_MT_GNU_VTINHERIT, BFD_RELOC_MT_GNU_VTENTRY, BFD_RELOC_MT_PCINSN8): Renamed. * bfd/targets.c (bfd_elf32_mt_vec): Renamed. (_bfd_target_vector): Adjusted. * binutils/readelf.c (guess_is_rela): Use EM_MT. (dump_relocations, get_machine_name): Adjust. * cpu/mt.cpu (define-arch, define-isa): Set name to mt. (define-mach): Adjust. * cpu/mt.opc (CGEN_ASM_HASH): Update. (mt_asm_hash, mt_cgen_insn_supported): Renamed. (parse_loopsize, parse_imm16): Adjust. * gas/configure: Rebuilt. * gas/configure.in (mt): Remove special case. * gas/config/tc-mt.c (opcodes/mt-desc.h, opcodes/mt-opc.h): Change #includes. (mt_insn, mt_mach, mt_mach_bitmask, mt_flags, mt_architectures): Rename, adjust. (md_parse_option, md_show_usage, md_begin, md_assemble, md_cgen_lookup_reloc, md_atof): Adjust. (mt_force_relocation, mt_apply_fix, mt_fix_adjustable): Rename, adjust. * gas/config/tc-mt.h (TC_MT): Rename. (LISTING_HEADER, TARGET_ARCH, TARGET_FORMAT): Adjust. (md_apply_fix): Adjust. (mt_apply_fix, mt_fix_adjustable, mt_force_relocation): Rename. (TC_FORCE_RELOCATION, tc_fix_adjustable): Adjust. * gdb/mt-tdep.c (mt_arch_constants, mt_gdb_regnums): Rename, adjust. (mt_register_name, mt_register_type, mt_register_reggroup_p, mt_return_value, mt_skip_prologue, mt_breapoint_from_pc, mt_pseudo_register_read, mt_pseudo_register_write, mt_frame_align, mt_registers_info, mt_push_dummy_call, mt_unwind_cache, mt_frame_unwind_cache, mt_unwind_pc, mt_unwind_dummy_id, mt_frame_this_id, mt_frame_prev_register, mt_frame_base_address, mt_frame_unwind, mt_frame_sniffer, mt_frame_base, mt_gdbarch_init, _initialize_mt_tdep): Rename & adjust. * include/dis-asm.h (print_insn_mt): Renamed. * include/elf/common.h (EM_MT): Renamed. * include/elf/mt.h: Rename relocs, cpu & other defines. * ld/emulparams/elf32mt.sh (ARCH, OUTPUT_FORMAT): Adjust. * opcodes/Makefile.am (HFILES, CFILES, ALL_MACHINES): Adjust. (stamp-mt): Adjust rule. (mt-asm.lo, mt-desc.lo, mt-dis.lo, mt-ibld.lo, mt-opc.lo): Rename & adjust. * opcodes/Makefile.in: Rebuilt. * opcodes/configure: Rebuilt. * opcodes/configure.in (bfd_mt_arch): Rename & adjust. * opcodes/disassemble.c (ARCH_mt): Renamed. (disassembler): Adjust. * opcodes/mt-asm.c: Renamed, rebuilt. * opcodes/mt-desc.c: Renamed, rebuilt. * opcodes/mt-desc.h: Renamed, rebuilt. * opcodes/mt-dis.c: Renamed, rebuilt. * opcodes/mt-ibld.c: Renamed, rebuilt. * opcodes/mt-opc.c: Renamed, rebuilt. * opcodes/mt-opc.h: Renamed, rebuilt. * sid/Makefile.in: Rebuilt. * sid/aclocal.m4: Rebuilt. * sid/configure: Rebuilt. * sid/sid.spec: Adjust. * sid/bsp/Makefile.am: Adjust. * sid/bsp/Makefile.in: Rebuilt. * sid/bsp/aclocal.m4: Rebuilt. * sid/bsp/configrun-sid.in: Adjust. * sid/bsp/pregen/Makefile.in: Rebuilt. * sid/bsp/pregen/mt-gdb.conf: Renamed & rebuilt. * sid/bsp/pregen/mt-gloss.conf: Renamed & rebuilt. * sid/bsp/pregen/pregen-configs.in: Adjust. * sid/component/aclocal.m4: Rebuilt. * sid/component/configure: Rebuilt. * sid/component/tconfig.in: Adjust. * sid/component/bochs/aclocal.m4: Rebuilt. * sid/component/cache/Makefile.in: Rebuilt. * sid/component/cgen-cpu/Makefile.in: Rebuilt. * sid/component/cgen-cpu/aclocal.m4: Rebuilt. * sid/component/cgen-cpu/compCGEN.cxx: Adjust. * sid/component/cgen-cpu/configure: Rebuilt. * sid/component/cgen-cpu/configure.in: Rebult. * sid/component/cgen-cpu/mt/Makefile.am: Adjust. * sid/component/cgen-cpu/mt/Makefile.in: Rebuilt. * sid/component/cgen-cpu/mt/hw-cpu-mt.txt: Adjust. * sid/component/cgen-cpu/mt/mt-cpu.h: Rebuilt. * sid/component/cgen-cpu/mt/mt-decode.cxx: Rebuilt. * sid/component/cgen-cpu/mt/mt-decode.h: Rebuilt. * sid/component/cgen-cpu/mt/mt-defs.h: Rebuilt. * sid/component/cgen-cpu/mt/mt-desc.h: Rebuilt. * sid/component/cgen-cpu/mt/mt-sem.cxx: Rebuilt. * sid/component/cgen-cpu/mt/mt-write.cxx: Rebuilt. * sid/component/cgen-cpu/mt/mt.cxx: Adjust. * sid/component/cgen-cpu/mt/mt.h: Adjust. * sid/component/consoles/Makefile.in: Rebuilt. * sid/component/families/aclocal.m4: Rebuilt. * sid/component/families/configure: Rebuilt. * sid/component/gdb/Makefile.in: Rebuilt. * sid/component/gloss/Makefile.in: Rebuilt. * sid/component/glue/Makefile.in: Rebuilt. * sid/component/ide/Makefile.in: Rebuilt. * sid/component/interrupt/Makefile.in: Rebuilt. * sid/component/lcd/Makefile.in: Rebuilt. * sid/component/lcd/testsuite/Makefile.in: Rebuilt. * sid/component/loader/Makefile.am: Rebuilt. * sid/component/loader/Makefile.in: Rebuilt. * sid/component/mapper/Makefile.in: Rebuilt. * sid/component/mapper/testsuite/Makefile.in: Rebuilt. * sid/component/memory/Makefile.in: Rebuilt. * sid/component/mmu/Makefile.in: Rebuilt. * sid/component/parport/Makefile.in: Rebuilt. * sid/component/profiling/Makefile.in: Rebuilt. * sid/component/rtc/Makefile.in: Rebuilt. * sid/component/sched/Makefile.in: Rebuilt. * sid/component/testsuite/Makefile.in: Rebuilt. * sid/component/timers/aclocal.m4: Rebuilt. * sid/component/timers/configure: Rebuilt. * sid/component/uart/Makefile.in: Rebuilt. * sid/component/uart/testsuite/Makefile.in: Rebuilt. * sid/config/config.sub: Adjust. * sid/config/info.tcl.in: Adjust. * sid/config/sidtargets.m4: Adjust. * sid/doc/Makefile.in: Rebuilt. * sid/main/dynamic/Makefile.am: Rebuilt. * sid/main/dynamic/Makefile.in: Rebuilt. * sid/main/dynamic/aclocal.m4: Rebuilt. * sid/main/dynamic/configure: Rebuilt.
2005-12-16 11:23:12 +01:00
#ifdef ARCH_mt
case bfd_arch_mt:
disassemble = print_insn_mt;
break;
#endif
Add support for Xilinx MicroBlaze processor. * bfd/Makefile.am: Add cpu-microblaze.{lo,c}, elf32-microblaze.{lo,c}. * bfd/Makefile.in: Same. * bfd/archures.c: Add bfd_arch_microblaze. * bfd/bfd-in2.h: Regenerate. * bfd/config.bfd: Add microblaze target. * bfd/configure: Add bfd_elf32_microblaze_vec target. * bfd/configure.in: Same. * bfd/cpu-microblaze.c: New. * bfd/elf32-microblaze.c: New. * bfd/libbfd-in.h: Add prototype _bfd_dwarf2_fixup_section_debug_loc(). * bfd/libbfd.h: Regenerate. * bfd/reloc.c: Add MICROBLAZE relocations. * bfd/section.c: Add struct relax_table and relax_count to section. * bfd/targets.c: Add bfd_elf32_microblaze_vec. * binutils/MAINTAINERS: Add self as maintainer. * binutils/readelf.c: Include elf/microblaze.h, add EM_MICROBLAZE & EM_MICROBLAZE_OLD to guess_is_rela(), dump_relocations(), get_machine_name(). * config.sub: Add microblaze target. * configure: Same. * configure.ac: Same. * gas/Makefile.am: add microblaze to CPU_TYPES, config/tc-microblaze.c to TARGET_CPU_CFILES, config/tc-microblaze.h to TARGET_CPU_HFILES, add DEP_microblaze_elf target. * gas/Makefile.in: Same. * gas/config/tc-microblaze.c: Add MicroBlaze assembler. * gas/config/tc-microblaze.h: Add header for tc-microblaze.c. * gas/configure: Add microblaze target. * gas/configure.in: Same. * gas/configure.tgt: Same. * gas/doc/Makefile.am: Add c-microblaze.texi to CPU_DOCS. * gas/doc/Makefile.in: Same. * gas/doc/all.texi: Set MICROBLAZE. * gas/doc/as.texinfo: Add MicroBlaze doc links. * gas/doc/c-microblaze.texi: New MicroBlaze docs. * include/dis-asm.h: Decl print_insn_microblaze(). * include/elf/common.h: Define EM_MICROBLAZE & EM_MICROBLAZE_OLD. * include/elf/microblaze.h: New reloc definitions. * ld/Makefile.am: Add eelf32mb_linux.o, eelf32microblaze.o to ALL_EMULATIONS, targets. * ld/Makefile.in: Same. * ld/configure.tgt: Add microblaze*-linux*, microblaze* targets. * ld/emulparams/elf32mb_linux.sh: New. * ld/emulparams/elf32microblaze.sh. New. * ld/scripttempl/elfmicroblaze.sc: New. * opcodes/Makefile.am: Add microblaze-opc.h to HFILES, microblaze-dis.c to CFILES, microblaze-dis.lo to ALL_MACHINES, targets. * opcodes/Makefile.in: Same. * opcodes/configure: Add bfd_microblaze_arch target. * opcodes/configure.in: Same. * opcodes/disassemble.c: Define ARCH_microblaze, return print_insn_microblaze(). * opcodes/microblaze-dis.c: New MicroBlaze disassembler. * opcodes/microblaze-opc.h: New MicroBlaze opcode definitions. * opcodes/microblaze-opcm.h: New MicroBlaze opcode types.
2009-08-06 19:38:04 +02:00
#ifdef ARCH_microblaze
case bfd_arch_microblaze:
disassemble = print_insn_microblaze;
break;
#endif
2002-12-30 20:25:13 +01:00
#ifdef ARCH_msp430
case bfd_arch_msp430:
disassemble = print_insn_msp430;
break;
#endif
Add support for Andes NDS32: BFD: * Makefile.am (BFD32_BACKENDS, BFD32_BACKENDS_CFILES): Add nds32 files. * Makefile.in: Regenerate. * archures.c (bfd_nds32_arch): Add nds32 target. * bfd-in2.h: Regenerate. * config.bfd (nds32*le-*-linux): Add bfd_elf32_nds32lelin_vec and bfd_elf32_nds32belin_vec. (nds32*be-*-linux*): Likewise. (nds32*le-*-*): Add bfd_elf32_nds32le_vec and bfd_elf32_nds32be_vec. (nds32*be-*-*): Likewise. * configure.in (bfd_elf32_nds32be_vec): Add elf32-nds32.lo. (bfd_elf32_nds32le_vec): Likewise. (bfd_elf32_nds32belin_vec): Likewise. (bfd_elf32_nds32lelin_vec): Likewise. * configure: Regenerate. * cpu-nds32.c: New file for nds32. * elf-bfd.h: Add NDS32_ELF_DATA. * elf32-nds32.c: New file for nds32. * elf32-nds32.h: New file for nds32. * libbfd.h: Regenerate. * reloc.c: Add relocations for nds32. * targets.c (bfd_elf32_nds32be_vec): New declaration for nds32. (bfd_elf32_nds32le_vec): Likewise. (bfd_elf32_nds32belin_vec): Likewise. (bfd_elf32_nds32lelin_vec): Likewise. BINUTILS: * readelf.c: Include elf/nds32.h (guess_is_rela): Add case for EM_NDS32. (dump_relocations): Add case for EM_NDS32. (decode_NDS32_machine_flags): New. (get_machine_flags): Add case for EM_NDS32. (is_32bit_abs_reloc): Likewise. (is_16bit_abs_reloc): Likewise. (process_nds32_specific): New. (process_arch_specific): Add case for EM_NDS32. * NEWS: Announce Andes nds32 support. * MAINTAINERS: Add nds32 maintainers. TESTSUITE: * binutils-all/objdump.exp: Add NDS32 cpu. * binutils-all/readelf.r: Skip extra reloc created by NDS32. GAS: * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nds32.c. (TARGET_CPU_HFILES): Add config/tc-nds32.h. * Makefile.in: Regenerate. * configure.in (nds32): Add nds32 target extension config support. * configure.tgt : Add case for nds32-*-elf* and nds32-*-linux*. * configure: Regenerate. * config/tc-nds32.c: New file for nds32. * config/tc-nds32.h: New file for nds32. * doc/Makefile.am (CPU_DOCS): Add c-nds32.texi. * doc/Makefile.in: Regenerate. * doc/as.texinfo: Add nds32 options. * doc/all.texi: Set NDS32. * doc/c-nds32.texi: New file dor nds32 document. * NEWS: Announce Andes nds32 support. TESTSUITE: * gas/all/gas.exp: Add expected failures for NDS32. * gas/elf/elf.exp: Likewise. * gas/lns/lns.exp: Use alternate test. * gas/macros/irp.d: Skip for NDS32. * gas/macros/macros.exp: Skip some tests for the NDS32. * gas/macros/rept.d: Skip for NDS32. * gas/macros/test3.d: Skip for NDS32. * gas/nds32: New directory. * gas/nds32/alu-1.s: New test. * gas/nds32/alu-1.d: Likewise. * gas/nds32/alu-2.s: Likewise. * gas/nds32/alu-2.d: Likewise. * gas/nds32/br-1.d: Likewise. * gas/nds32/br-1.s: Likewise. * gas/nds32/br-2.d: Likewise. * gas/nds32/br-2.s: Likewise. * gas/nds32/ji-jr.d: Likewise. * gas/nds32/ji-jr.s: Likewise. * gas/nds32/ls.d: Likewise. * gas/nds32/ls.s: Likewise. * gas/nds32/lsi.d: Likewise. * gas/nds32/lsi.s: Likewise. * gas/nds32/to-16bit-v1.d: Likewise. * gas/nds32/to-16bit-v1.s: Likewise. * gas/nds32/to-16bit-v2.d: Likewise. * gas/nds32/to-16bit-v2.s: Likewise. * gas/nds32/to-16bit-v3.d: Likewise. * gas/nds32/to-16bit-v3.s: Likewise. * gas/nds32/nds32.exp: New test driver. LD: * Makefile.am (ALL_EMULATION_SOURCES): Add nds32 target. * Makefile.in: Regenerate. * configure.tgt: Add case for nds32*le-*-elf*, nds32*be-*-elf*, nds32*le-*-linux-gnu*, and nds32*be-*-linux-gnu*. * emulparams/nds32belf.sh: New file for nds32. * emulparams/nds32belf_linux.sh: Likewise. * emulparams/nds32belf16m.sh: Likewise. * emulparams/nds32elf.sh: Likewise. * emulparams/nds32elf_linux.sh: Likewise. * emulparams/nds32elf16m.sh: Likewise. * emultempl/nds32elf.em: Likewise. * scripttempl/nds32elf.sc}: Likewise. * gen-doc.texi: Set NDS32. * ld.texinfo: Set NDS32. * NEWS: Announce Andes nds32 support. TESTSUITE: * lib/ld-lib.exp: Add NDS32 to list of targets that do not support shared library generation. * ld-nds32: New directory. * ld-nds32/branch.d: New test. * ld-nds32/branch.ld: New test. * ld-nds32/branch.s: New test. * ld-nds32/diff.d: New test. * ld-nds32/diff.ld: New test. * ld-nds32/diff.s: New test. * ld-nds32/gp.d: New test. * ld-nds32/gp.ld: New test. * ld-nds32/gp.s: New test. * ld-nds32/imm.d: New test. * ld-nds32/imm.ld: New test. * ld-nds32/imm.s: New test. * ld-nds32/imm_symbol.s: New test. * ld-nds32/relax_jmp.d: New test. * ld-nds32/relax_jmp.ld: New test. * ld-nds32/relax_jmp.s: New test. * ld-nds32/relax_load_store.d: New test. * ld-nds32/relax_load_store.ld: New test. * ld-nds32/relax_load_store.s: New test. * ld-nds32/nds32.exp: New file. OPCODES: * Makefile.am (TARGET_LIBOPCODES_CFILES): Add nds32-asm.c and nds32-dis.c. * Makefile.in: Regenerate. * configure.in: Add case for bfd_nds32_arch. * configure: Regenerate. * disassemble.c (ARCH_nds32): Define. * nds32-asm.c: New file for nds32. * nds32-asm.h: New file for nds32. * nds32-dis.c: New file for nds32. * nds32-opc.h: New file for nds32. INCLUDE: * dis-asm.h (print_insn_nds32): Add nds32 target. * elf/nds32.h: New file for nds32. * opcode/nds32.h: New file for nds32.
2013-12-13 12:52:32 +01:00
#ifdef ARCH_nds32
case bfd_arch_nds32:
disassemble = print_insn_nds32;
break;
#endif
1999-05-03 09:29:11 +02:00
#ifdef ARCH_ns32k
case bfd_arch_ns32k:
disassemble = print_insn_ns32k;
break;
#endif
#ifdef ARCH_mcore
case bfd_arch_mcore:
disassemble = print_insn_mcore;
break;
#endif
#ifdef ARCH_mep
case bfd_arch_mep:
disassemble = print_insn_mep;
break;
#endif
* common.h: Fix case of "Meta". * metag.h: New file. * dis-asm.h (print_insn_metag): New declaration. * metag.h: New file. * Makefile.am: Add Meta. * Makefile.in: Regenerate. * configure: Regenerate. * configure.in: Add Meta. * disassemble.c: Add Meta support. * metag-dis.c: New file. * Makefile.am: Add Meta. * Makefile.in: Regenerate. * archures.c (bfd_mach_metag): New. * bfd-in2.h: Regenerate. * config.bfd: Add Meta. * configure: Regenerate. * configure.in: Add Meta. * cpu-metag.c: New file. * elf-bfd.h: Add Meta. * elf32-metag.c: New file. * elf32-metag.h: New file. * libbfd.h: Regenerate. * reloc.c: Add Meta relocations. * targets.c: Add Meta. * Makefile.am: Add Meta. * Makefile.in: Regenerate. * config/tc-metag.c: New file. * config/tc-metag.h: New file. * configure.tgt: Add Meta. * doc/Makefile.am: Add Meta. * doc/Makefile.in: Regenerate. * doc/all.texi: Add Meta. * doc/as.texiinfo: Document Meta options. * doc/c-metag.texi: New file. * gas/metag/labelarithmetic.d: New file. * gas/metag/labelarithmetic.s: New file. * gas/metag/metacore12.d: New file. * gas/metag/metacore12.s: New file. * gas/metag/metacore21-invalid.l: New file. * gas/metag/metacore21-invalid.s: New file. * gas/metag/metacore21.d: New file. * gas/metag/metacore21.s: New file. * gas/metag/metacore21ext.d: New file. * gas/metag/metacore21ext.s: New file. * gas/metag/metadsp21-invalid.l: New file. * gas/metag/metadsp21-invalid.s: New file. * gas/metag/metadsp21.d: New file. * gas/metag/metadsp21.s: New file. * gas/metag/metadsp21ext.d: New file. * gas/metag/metadsp21ext.s: New file. * gas/metag/metafpu21.d: New file. * gas/metag/metafpu21.s: New file. * gas/metag/metafpu21ext.d: New file. * gas/metag/metafpu21ext.s: New file. * gas/metag/metag.exp: New file. * gas/metag/tls.d: New file. * gas/metag/tls.s: New file. * Makefile.am: Add Meta. * Makefile.in: Regenerate. * configure.tgt: Add Meta. * emulparams/elf32metag.sh: New file. * emultempl/metagelf.em: New file. * ld-elf/merge.d: Mark Meta as xfail. * ld-gc/start.d: Skip this test on Meta. * ld-gc/personality.d: Skip this test on Meta. * ld-metag/external.s: New file. * ld-metag/metag.exp: New file. * ld-metag/pcrel.d: New file. * ld-metag/pcrel.s: New file. * ld-metag/shared.d: New file. * ld-metag/shared.r: New file. * ld-metag/shared.s: New file. * ld-metag/stub.d: New file. * ld-metag/stub.s: New file. * ld-metag/stub_pic_app.d: New file. * ld-metag/stub_pic_app.r: New file. * ld-metag/stub_pic_app.s: New file. * ld-metag/stub_pic_shared.d: New file. * ld-metag/stub_pic_shared.s: New file. * ld-metag/stub_shared.d: New file. * ld-metag/stub_shared.r: New file. * ld-metag/stub_shared.s: New file. * binutils/readelf.c: (guess_is_rela): Add EM_METAG. (dump_relocations): Add EM_METAG. (get_machine_name): Correct case for Meta. (is_32bit_abs_reloc): Add support for Meta ADDR32 reloc. (is_none_reloc): Add support for Meta NONE reloc.
2013-01-10 10:49:22 +01:00
#ifdef ARCH_metag
case bfd_arch_metag:
disassemble = print_insn_metag;
break;
#endif
1999-05-03 09:29:11 +02:00
#ifdef ARCH_mips
case bfd_arch_mips:
if (big)
1999-05-03 09:29:11 +02:00
disassemble = print_insn_big_mips;
else
disassemble = print_insn_little_mips;
break;
#endif
2001-10-30 16:20:14 +01:00
#ifdef ARCH_mmix
case bfd_arch_mmix:
disassemble = print_insn_mmix;
break;
#endif
1999-05-03 09:29:11 +02:00
#ifdef ARCH_mn10200
case bfd_arch_mn10200:
disassemble = print_insn_mn10200;
break;
#endif
#ifdef ARCH_mn10300
case bfd_arch_mn10300:
disassemble = print_insn_mn10300;
break;
#endif
2013-02-06 Sandra Loosemore <sandra@codesourcery.com> Andrew Jenner <andrew@codesourcery.com> Based on patches from Altera Corporation. bfd/ * Makefile.am (ALL_MACHINES): Add cpu-nios2.lo. (ALL_MACHINES_CFILES): Add cpu-nios2.c. (BFD_BACKENDS): Add elf32-nios2.lo. (BFD32_BACKENDS_CFILES): Add elf32-nios2.c. * Makefile.in: Regenerated. * configure.in: Add entries for bfd_elf32_bignios2_vec and bfd_elf32_littlenios2_vec. * configure: Regenerated. * config.bfd: Add cases for nios2. * archures.c (enum bfd_architecture): Add bfd_arch_nios2. (bfd_mach_nios2): Define. (bfd_nios2_arch): Declare. (bfd_archures_list): Add bfd_nios2_arch. * targets.c (bfd_elf32_bignios2_vec): Declare. (bfd_elf32_littlenios2_vec): Declare. (_bfd_target_vector): Add entries for bfd_elf32_bignios2_vec and bfd_elf32_littlenios2_vec. * elf-bfd.h (enum elf_target_id): Add NIOS2_ELF_DATA. * reloc.c (enum bfd_reloc_code_real): Add Nios II relocations. * bfd-in2.h: Regenerated. * libbfd.h: Regenerated. * cpu-nios2.c: New file. * elf32-nios2.c: New file. opcodes/ * Makefile.am (TARGET_LIBOPCODES_CFILES): Add nios2-dis.c and nios2-opc.c. * Makefile.in: Regenerated. * configure.in: Add case for bfd_nios2_arch. * configure: Regenerated. * disassemble.c (ARCH_nios2): Define. (disassembler): Add case for bfd_arch_nios2. * nios2-dis.c: New file. * nios2-opc.c: New file. include/ * dis-asm.h (print_insn_big_nios2): Declare. (print_insn_little_nios2): Declare. include/elf * nios2.h: New file. include/opcode/ * nios2.h: New file. gas/ * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c. (TARGET_CPU_HFILES): Add config/tc-nios2.h. * Makefile.in: Regenerated. * configure.tgt: Add case for nios2*-linux*. * config/obj-elf.c: Conditionally include elf/nios2.h. * config/tc-nios2.c: New file. * config/tc-nios2.h: New file. * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi. * doc/Makefile.in: Regenerated. * doc/all.texi: Set NIOSII. * doc/as.texinfo (Overview): Add Nios II options. (Machine Dependencies): Include c-nios2.texi. * doc/c-nios2.texi: New file. * NEWS: Note Altera Nios II support. gas/testsuite/ * gas/nios2/add.d: New. * gas/nios2/add.s: New. * gas/nios2/align_fill.d: New. * gas/nios2/align_fill.s: New. * gas/nios2/align_text.d: New. * gas/nios2/align_text.s: New. * gas/nios2/and.d: New. * gas/nios2/and.s: New. * gas/nios2/branch.d: New. * gas/nios2/branch.s: New. * gas/nios2/break.d: New. * gas/nios2/break.s: New. * gas/nios2/bret.d: New. * gas/nios2/bret.s: New. * gas/nios2/cache.d: New. * gas/nios2/cache.s: New. * gas/nios2/call26.d: New. * gas/nios2/call26.s: New. * gas/nios2/call.d: New. * gas/nios2/call.s: New. * gas/nios2/cmp.d: New. * gas/nios2/cmp.s: New. * gas/nios2/comments.d: New. * gas/nios2/comments.s: New. * gas/nios2/complex.d: New. * gas/nios2/complex.s: New. * gas/nios2/ctl.d: New. * gas/nios2/ctl.s: New. * gas/nios2/custom.d: New. * gas/nios2/custom.s: New. * gas/nios2/etbt.d: New. * gas/nios2/etbt.s: New. * gas/nios2/flushda.d: New. * gas/nios2/flushda.s: New. * gas/nios2/illegal.l: New. * gas/nios2/illegal.s: New. * gas/nios2/jmp.d: New. * gas/nios2/jmp.s: New. * gas/nios2/ldb.d: New. * gas/nios2/ldb.s: New. * gas/nios2/ldh.d: New. * gas/nios2/ldh.s: New. * gas/nios2/ldw.d: New. * gas/nios2/ldw.s: New. * gas/nios2/lineseparator.d: New. * gas/nios2/lineseparator.s: New. * gas/nios2/mov.d: New. * gas/nios2/movia.d: New. * gas/nios2/movia.s: New. * gas/nios2/movi.d: New. * gas/nios2/movi.s: New. * gas/nios2/mov.s: New. * gas/nios2/mul.d: New. * gas/nios2/mul.s: New. * gas/nios2/nios2.exp: New. * gas/nios2/nor.d: New. * gas/nios2/nor.s: New. * gas/nios2/or.d: New. * gas/nios2/or.s: New. * gas/nios2/ret.d: New. * gas/nios2/ret.s: New. * gas/nios2/rol.d: New. * gas/nios2/rol.s: New. * gas/nios2/rotate.d: New. * gas/nios2/rotate.s: New. * gas/nios2/stb.d: New. * gas/nios2/stb.s: New. * gas/nios2/sth.d: New. * gas/nios2/sth.s: New. * gas/nios2/stw.d: New. * gas/nios2/stw.s: New. * gas/nios2/sub.d: New. * gas/nios2/sub.s: New. * gas/nios2/sync.d: New. * gas/nios2/sync.s: New. * gas/nios2/trap.d: New. * gas/nios2/trap.s: New. * gas/nios2/tret.d: New. * gas/nios2/tret.s: New. * gas/nios2/warn_noat.l: New. * gas/nios2/warn_noat.s: New. * gas/nios2/warn_nobreak.l: New. * gas/nios2/warn_nobreak.s: New. * gas/nios2/xor.d: New. * gas/nios2/xor.s: New. ld/ * Makefile.am (enios2elf.c): New rule. * Makefile.in: Regenerated. * configure.tgt: Add case for nios2*-*-*. * emulparams/nios2elf.sh: New file. * NEWS: Note Altera Nios II support. ld/testsuite/ * ld-nios2/emit-relocs-1a.s: New. * ld-nios2/emit-relocs-1b.s: New. * ld-nios2/emit-relocs-1.d: New. * ld-nios2/emit-relocs-1.ld: New. * ld-nios2/gprel.d: New. * ld-nios2/gprel.s: New. * ld-nios2/hilo16.d: New. * ld-nios2/hilo16.s: New. * ld-nios2/hilo16_symbol.s: New. * ld-nios2/imm5.d: New. * ld-nios2/imm5.s: New. * ld-nios2/imm5_symbol.s: New. * ld-nios2/nios2.exp: New. * ld-nios2/pcrel16.d: New. * ld-nios2/pcrel16_label.s: New. * ld-nios2/pcrel16.s: New. * ld-nios2/relax_callr.d: New. * ld-nios2/relax_callr.ld: New. * ld-nios2/relax_callr.s: New. * ld-nios2/relax_cjmp.d: New. * ld-nios2/relax_cjmp.s: New. * ld-nios2/relax_jmp.ld: New. * ld-nios2/relax_section.d: New. * ld-nios2/relax_section.s: New. * ld-nios2/relax_ujmp.d: New. * ld-nios2/relax_ujmp.s: New. * ld-nios2/reloc.d: New. * ld-nios2/reloc.s: New. * ld-nios2/reloc_symbol.s: New. * ld-nios2/s16.d: New. * ld-nios2/s16.s: New. * ld-nios2/s16_symbol.s: New. * ld-nios2/u16.d: New. * ld-nios2/u16.s: New. * ld-nios2/u16_symbol.s: New. * ld-elf/indirect.exp: Skip on targets that don't support -shared -fPIC. * ld-elfcomm/elfcomm.exp: Build with -G0 for nios2. * ld-plugin/lto.exp: Skip shared library tests on targets that don't support them. Skip execution tests on non-native targets. binutils/ * readelf.c: Include elf/nios2.h. (dump_relocations): Add case for EM_ALTERA_NIOS2. (get_nios2_dynamic_type): New. (get_dynamic_type): Add case for EM_ALTERA_NIOS2. (is_32bit_abs_reloc): Fix EM_ALTERA_NIOS2 case. (is_16bit_abs_reloc): Likewise. (is_none_reloc): Add EM_ALTERA_NIOS2 and EM_NIOS32 cases. * NEWS: Note Altera Nios II support. * MAINTAINERS: Add Nios II maintainers.
2013-02-07 00:22:26 +01:00
#ifdef ARCH_nios2
case bfd_arch_nios2:
if (big)
2013-02-06 Sandra Loosemore <sandra@codesourcery.com> Andrew Jenner <andrew@codesourcery.com> Based on patches from Altera Corporation. bfd/ * Makefile.am (ALL_MACHINES): Add cpu-nios2.lo. (ALL_MACHINES_CFILES): Add cpu-nios2.c. (BFD_BACKENDS): Add elf32-nios2.lo. (BFD32_BACKENDS_CFILES): Add elf32-nios2.c. * Makefile.in: Regenerated. * configure.in: Add entries for bfd_elf32_bignios2_vec and bfd_elf32_littlenios2_vec. * configure: Regenerated. * config.bfd: Add cases for nios2. * archures.c (enum bfd_architecture): Add bfd_arch_nios2. (bfd_mach_nios2): Define. (bfd_nios2_arch): Declare. (bfd_archures_list): Add bfd_nios2_arch. * targets.c (bfd_elf32_bignios2_vec): Declare. (bfd_elf32_littlenios2_vec): Declare. (_bfd_target_vector): Add entries for bfd_elf32_bignios2_vec and bfd_elf32_littlenios2_vec. * elf-bfd.h (enum elf_target_id): Add NIOS2_ELF_DATA. * reloc.c (enum bfd_reloc_code_real): Add Nios II relocations. * bfd-in2.h: Regenerated. * libbfd.h: Regenerated. * cpu-nios2.c: New file. * elf32-nios2.c: New file. opcodes/ * Makefile.am (TARGET_LIBOPCODES_CFILES): Add nios2-dis.c and nios2-opc.c. * Makefile.in: Regenerated. * configure.in: Add case for bfd_nios2_arch. * configure: Regenerated. * disassemble.c (ARCH_nios2): Define. (disassembler): Add case for bfd_arch_nios2. * nios2-dis.c: New file. * nios2-opc.c: New file. include/ * dis-asm.h (print_insn_big_nios2): Declare. (print_insn_little_nios2): Declare. include/elf * nios2.h: New file. include/opcode/ * nios2.h: New file. gas/ * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c. (TARGET_CPU_HFILES): Add config/tc-nios2.h. * Makefile.in: Regenerated. * configure.tgt: Add case for nios2*-linux*. * config/obj-elf.c: Conditionally include elf/nios2.h. * config/tc-nios2.c: New file. * config/tc-nios2.h: New file. * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi. * doc/Makefile.in: Regenerated. * doc/all.texi: Set NIOSII. * doc/as.texinfo (Overview): Add Nios II options. (Machine Dependencies): Include c-nios2.texi. * doc/c-nios2.texi: New file. * NEWS: Note Altera Nios II support. gas/testsuite/ * gas/nios2/add.d: New. * gas/nios2/add.s: New. * gas/nios2/align_fill.d: New. * gas/nios2/align_fill.s: New. * gas/nios2/align_text.d: New. * gas/nios2/align_text.s: New. * gas/nios2/and.d: New. * gas/nios2/and.s: New. * gas/nios2/branch.d: New. * gas/nios2/branch.s: New. * gas/nios2/break.d: New. * gas/nios2/break.s: New. * gas/nios2/bret.d: New. * gas/nios2/bret.s: New. * gas/nios2/cache.d: New. * gas/nios2/cache.s: New. * gas/nios2/call26.d: New. * gas/nios2/call26.s: New. * gas/nios2/call.d: New. * gas/nios2/call.s: New. * gas/nios2/cmp.d: New. * gas/nios2/cmp.s: New. * gas/nios2/comments.d: New. * gas/nios2/comments.s: New. * gas/nios2/complex.d: New. * gas/nios2/complex.s: New. * gas/nios2/ctl.d: New. * gas/nios2/ctl.s: New. * gas/nios2/custom.d: New. * gas/nios2/custom.s: New. * gas/nios2/etbt.d: New. * gas/nios2/etbt.s: New. * gas/nios2/flushda.d: New. * gas/nios2/flushda.s: New. * gas/nios2/illegal.l: New. * gas/nios2/illegal.s: New. * gas/nios2/jmp.d: New. * gas/nios2/jmp.s: New. * gas/nios2/ldb.d: New. * gas/nios2/ldb.s: New. * gas/nios2/ldh.d: New. * gas/nios2/ldh.s: New. * gas/nios2/ldw.d: New. * gas/nios2/ldw.s: New. * gas/nios2/lineseparator.d: New. * gas/nios2/lineseparator.s: New. * gas/nios2/mov.d: New. * gas/nios2/movia.d: New. * gas/nios2/movia.s: New. * gas/nios2/movi.d: New. * gas/nios2/movi.s: New. * gas/nios2/mov.s: New. * gas/nios2/mul.d: New. * gas/nios2/mul.s: New. * gas/nios2/nios2.exp: New. * gas/nios2/nor.d: New. * gas/nios2/nor.s: New. * gas/nios2/or.d: New. * gas/nios2/or.s: New. * gas/nios2/ret.d: New. * gas/nios2/ret.s: New. * gas/nios2/rol.d: New. * gas/nios2/rol.s: New. * gas/nios2/rotate.d: New. * gas/nios2/rotate.s: New. * gas/nios2/stb.d: New. * gas/nios2/stb.s: New. * gas/nios2/sth.d: New. * gas/nios2/sth.s: New. * gas/nios2/stw.d: New. * gas/nios2/stw.s: New. * gas/nios2/sub.d: New. * gas/nios2/sub.s: New. * gas/nios2/sync.d: New. * gas/nios2/sync.s: New. * gas/nios2/trap.d: New. * gas/nios2/trap.s: New. * gas/nios2/tret.d: New. * gas/nios2/tret.s: New. * gas/nios2/warn_noat.l: New. * gas/nios2/warn_noat.s: New. * gas/nios2/warn_nobreak.l: New. * gas/nios2/warn_nobreak.s: New. * gas/nios2/xor.d: New. * gas/nios2/xor.s: New. ld/ * Makefile.am (enios2elf.c): New rule. * Makefile.in: Regenerated. * configure.tgt: Add case for nios2*-*-*. * emulparams/nios2elf.sh: New file. * NEWS: Note Altera Nios II support. ld/testsuite/ * ld-nios2/emit-relocs-1a.s: New. * ld-nios2/emit-relocs-1b.s: New. * ld-nios2/emit-relocs-1.d: New. * ld-nios2/emit-relocs-1.ld: New. * ld-nios2/gprel.d: New. * ld-nios2/gprel.s: New. * ld-nios2/hilo16.d: New. * ld-nios2/hilo16.s: New. * ld-nios2/hilo16_symbol.s: New. * ld-nios2/imm5.d: New. * ld-nios2/imm5.s: New. * ld-nios2/imm5_symbol.s: New. * ld-nios2/nios2.exp: New. * ld-nios2/pcrel16.d: New. * ld-nios2/pcrel16_label.s: New. * ld-nios2/pcrel16.s: New. * ld-nios2/relax_callr.d: New. * ld-nios2/relax_callr.ld: New. * ld-nios2/relax_callr.s: New. * ld-nios2/relax_cjmp.d: New. * ld-nios2/relax_cjmp.s: New. * ld-nios2/relax_jmp.ld: New. * ld-nios2/relax_section.d: New. * ld-nios2/relax_section.s: New. * ld-nios2/relax_ujmp.d: New. * ld-nios2/relax_ujmp.s: New. * ld-nios2/reloc.d: New. * ld-nios2/reloc.s: New. * ld-nios2/reloc_symbol.s: New. * ld-nios2/s16.d: New. * ld-nios2/s16.s: New. * ld-nios2/s16_symbol.s: New. * ld-nios2/u16.d: New. * ld-nios2/u16.s: New. * ld-nios2/u16_symbol.s: New. * ld-elf/indirect.exp: Skip on targets that don't support -shared -fPIC. * ld-elfcomm/elfcomm.exp: Build with -G0 for nios2. * ld-plugin/lto.exp: Skip shared library tests on targets that don't support them. Skip execution tests on non-native targets. binutils/ * readelf.c: Include elf/nios2.h. (dump_relocations): Add case for EM_ALTERA_NIOS2. (get_nios2_dynamic_type): New. (get_dynamic_type): Add case for EM_ALTERA_NIOS2. (is_32bit_abs_reloc): Fix EM_ALTERA_NIOS2 case. (is_16bit_abs_reloc): Likewise. (is_none_reloc): Add EM_ALTERA_NIOS2 and EM_NIOS32 cases. * NEWS: Note Altera Nios II support. * MAINTAINERS: Add Nios II maintainers.
2013-02-07 00:22:26 +01:00
disassemble = print_insn_big_nios2;
else
disassemble = print_insn_little_nios2;
break;
#endif
#ifdef ARCH_or1k
case bfd_arch_or1k:
disassemble = print_insn_or1k;
break;
#endif
2001-02-19 00:33:11 +01:00
#ifdef ARCH_pdp11
case bfd_arch_pdp11:
disassemble = print_insn_pdp11;
break;
#endif
#ifdef ARCH_pj
case bfd_arch_pj:
disassemble = print_insn_pj;
break;
#endif
1999-05-03 09:29:11 +02:00
#ifdef ARCH_powerpc
case bfd_arch_powerpc:
if (big)
1999-05-03 09:29:11 +02:00
disassemble = print_insn_big_powerpc;
else
disassemble = print_insn_little_powerpc;
break;
#endif
#ifdef ARCH_pru
case bfd_arch_pru:
disassemble = print_insn_pru;
break;
#endif
Add support for RISC-V architecture. bfd * Makefile.am: Add entries for riscv32-elf and riscv64-elf. * config.bdf: Likewise. * configure.ac: Likewise. * Makefile.in: Regenerate. * configure: Regenerate. * archures.c: Add bfd_riscv_arch. * reloc.c: Add riscv relocs. * targets.c: Add riscv_elf32_vec and riscv_elf64_vec. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elf-bfd.h: Add RISCV_ELF_DATA to enum elf_target_id. * elfnn-riscv.c: New file. * elfxx-riscv.c: New file. * elfxx-riscv.h: New file. binutils* readelf.c (guess_is_rela): Add EM_RISCV. (get_machine_name): Likewise. (dump_relocations): Add support for riscv relocations. (get_machine_flags): Add support for riscv flags. (is_32bit_abs_reloc): Add R_RISCV_32. (is_64bit_abs_reloc): Add R_RISCV_64. (is_none_reloc): Add R_RISCV_NONE. * testsuite/binutils-all/objdump.exp (cpus_expected): Add riscv. Expect the debug_ranges test to fail. gas * Makefile.am: Add riscv files. * Makefile.in: Regenerate. * NEWS: Mention the support for this architecture. * configure.in: Define a default architecture. * configure: Regenerate. * configure.tgt: Add entries for riscv. * doc/as.texinfo: Likewise. * testsuite/gas/all/gas.exp: Expect the redef tests to fail. * testsuite/gas/elf/elf.exp: Expect the groupauto tests to fail. * config/tc-riscv.c: New file. * config/tc-riscv.h: New file. * doc/c-riscv.texi: New file. * testsuite/gas/riscv: New directory. * testsuite/gas/riscv/riscv.exp: New file. * testsuite/gas/riscv/t_insns.d: New file. * testsuite/gas/riscv/t_insns.s: New file. ld * Makefile.am: Add riscv files. * Makefile.in: Regenerate. * NEWS: Mention the support for this target. * configure.tgt: Add riscv entries. * emulparams/elf32lriscv-defs.sh: New file. * emulparams/elf32lriscv.sh: New file. * emulparams/elf64lriscv-defs.sh: New file. * emulparams/elf64lriscv.sh: New file. * emultempl/riscvelf.em: New file. opcodes * configure.ac: Add entry for bfd_riscv_arch. * configure: Regenerate. * disassemble.c (disassembler): Add support for riscv. (disassembler_usage): Likewise. * riscv-dis.c: New file. * riscv-opc.c: New file. include * dis-asm.h: Add prototypes for print_insn_riscv and print_riscv_disassembler_options. * elf/riscv.h: New file. * opcode/riscv-opc.h: New file. * opcode/riscv.h: New file.
2016-11-01 17:45:57 +01:00
#ifdef ARCH_riscv
case bfd_arch_riscv:
disassemble = print_insn_riscv;
break;
Add support for RISC-V architecture. bfd * Makefile.am: Add entries for riscv32-elf and riscv64-elf. * config.bdf: Likewise. * configure.ac: Likewise. * Makefile.in: Regenerate. * configure: Regenerate. * archures.c: Add bfd_riscv_arch. * reloc.c: Add riscv relocs. * targets.c: Add riscv_elf32_vec and riscv_elf64_vec. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elf-bfd.h: Add RISCV_ELF_DATA to enum elf_target_id. * elfnn-riscv.c: New file. * elfxx-riscv.c: New file. * elfxx-riscv.h: New file. binutils* readelf.c (guess_is_rela): Add EM_RISCV. (get_machine_name): Likewise. (dump_relocations): Add support for riscv relocations. (get_machine_flags): Add support for riscv flags. (is_32bit_abs_reloc): Add R_RISCV_32. (is_64bit_abs_reloc): Add R_RISCV_64. (is_none_reloc): Add R_RISCV_NONE. * testsuite/binutils-all/objdump.exp (cpus_expected): Add riscv. Expect the debug_ranges test to fail. gas * Makefile.am: Add riscv files. * Makefile.in: Regenerate. * NEWS: Mention the support for this architecture. * configure.in: Define a default architecture. * configure: Regenerate. * configure.tgt: Add entries for riscv. * doc/as.texinfo: Likewise. * testsuite/gas/all/gas.exp: Expect the redef tests to fail. * testsuite/gas/elf/elf.exp: Expect the groupauto tests to fail. * config/tc-riscv.c: New file. * config/tc-riscv.h: New file. * doc/c-riscv.texi: New file. * testsuite/gas/riscv: New directory. * testsuite/gas/riscv/riscv.exp: New file. * testsuite/gas/riscv/t_insns.d: New file. * testsuite/gas/riscv/t_insns.s: New file. ld * Makefile.am: Add riscv files. * Makefile.in: Regenerate. * NEWS: Mention the support for this target. * configure.tgt: Add riscv entries. * emulparams/elf32lriscv-defs.sh: New file. * emulparams/elf32lriscv.sh: New file. * emulparams/elf64lriscv-defs.sh: New file. * emulparams/elf64lriscv.sh: New file. * emultempl/riscvelf.em: New file. opcodes * configure.ac: Add entry for bfd_riscv_arch. * configure: Regenerate. * disassemble.c (disassembler): Add support for riscv. (disassembler_usage): Likewise. * riscv-dis.c: New file. * riscv-opc.c: New file. include * dis-asm.h: Add prototypes for print_insn_riscv and print_riscv_disassembler_options. * elf/riscv.h: New file. * opcode/riscv-opc.h: New file. * opcode/riscv.h: New file.
2016-11-01 17:45:57 +01:00
#endif
1999-05-03 09:29:11 +02:00
#ifdef ARCH_rs6000
case bfd_arch_rs6000:
if (mach == bfd_mach_ppc_620)
Add XCOFF64 support. bfd: * Makefile.am (coff64-rs6000.lo): New rule. * Makefile.in: Regenerate. * coff-rs6000.c (xcoff_mkobject, xcoff_copy_private_bfd_data, xcoff_is_local_label_name, xcoff_rtype2howto, xcoff_reloc_type_lookup, xcoff_slurp_armap, xcoff_archive_p, xcoff_read_ar_hdr, xcoff_openr_next_archived_file, xcoff_write_armap, xcoff_write_archive_contents): No longer static, and prefix with _bfd_. (NO_COFF_SYMBOLS): Define. (xcoff64_swap_sym_in, xcoff64_swap_sym_out, xcoff64_swap_aux_in, xcoff64_swap_aux_out): New functions; handle xcoff symbol tables internally. (MINUS_ONE): New macro. (xcoff_howto_tabl, xcoff_reloc_type_lookup): Add 64 bit POS relocation. (coff_SWAP_sym_in, coff_SWAP_sym_out, coff_SWAP_aux_in, coff_SWAP_aux_out): Map to the new functions. * coff64-rs6000.c: New file. * libcoff.h (bfd_coff_backend_data): Add new fields _bfd_coff_force_symnames_in_strings and _bfd_coff_debug_string_prefix_length. (bfd_coff_force_symnames_in_strings, bfd_coff_debug_string_prefix_length): New macros for above fields. * coffcode.h (coff_set_arch_mach_hook): Handle XCOFF64 magic. Set machine to 620 for XCOFF64. Use bfd_coff_swap_sym_in instead of using coff_swap_sym_in directly. (FORCE_SYMNAMES_IN_STRINGS): New macro, defined for XCOFF64. (coff_set_flags) Set magic for XCOFF64. (coff_compute_section_file_positions): Add symbol name length to string section length if bfd_coff_debug_string_prefix_length is true. (coff_write_object_contents): Don't do reloc overflow for XCOFF64. (coff_slurp_line_table): Use bfd_coff_swap_lineno_in instead of using coff_swap_lineno_in directly. (bfd_coff_backend_data): Add _bfd_coff_force_symnames_in_strings and _bfd_coff_debug_string_prefix_length fields. * coffgen.c (coff_fix_symbol_name, coff_write_symbols): Force symbol names into strings table when bfd_coff_force_symnames_in_strings is true. * coffswap.h (MAX_SCNHDR_NRELOC, MAX_SCNHDR_NLNNO, GET_RELOC_VADDR, SET_RELOC_VADDR): New macros. (coff_swap_reloc_in, coff_swap_reloc_out): Use above macros. (coff_swap_aux_in, coff_swap_aux_out): Remove RS6000COFF_C code. (coff_swap_aouthdr_in, coff_swap_aouthdr_out): Handle XCOFF64 changes within RS6000COFF_C specific code. (coff_swap_scnhdr_out): Use PUT_SCNHDR_NLNNO, PUT_SCNHDR_NRELOC, MAX_SCNHDR_NRELOC, and MAX_SCNHDR_NLNNO. * reloc.c (bfd_perform_relocation, bfd_install_relocation): Extend existing hack on target name. * xcofflink.c (XCOFF_XVECP): Extend existing hack on target name. * coff-tic54x.c (ticof): Keep up to date with new fields in bfd_coff_backend_data. * config.bfd: Add bfd_powerpc_64_arch to targ_arch and define targ_selvecs to include rs6000coff64_vec for rs6000. * configure.in: Add rs6000coff64_vec case. * cpu-powerpc.c: New bfd_arch_info_type. gas: * as.c (parse_args): Allow md_parse_option to override -a listing option. * config/obj-coff.c (add_lineno): Change type of offset parameter from "int" to "bfd_vma." * config/tc-ppc.c (md_pseudo_table): Add "llong" and "machine." (ppc_mach, ppc_subseg_align, ppc_target_format): New. (ppc_change_csect): Align correctly for XCOFF64. (ppc_machine): New function, which discards "ppc_machine" line. (ppc_tc): Cons for 8 when code is 64 bit. (md_apply_fix3): Don't check operand->insert. Handle 64 bit relocations. (md_parse_option): Handle -a64 and -a32. (ppc_xcoff64): New. * config/tc-ppc.h (TARGET_MACH): Define. (TARGET_FORMAT): Move to function. (SUB_SEGMENT_ALIGN): Use ppc_subseg_align. include: * include/coff/rs6k64.h: New file. opcodes: * configure.in: Add bfd_powerpc_64_arch. * disassemble.c (disassembler): Use print_insn_big_powerpc for 64 bit code.
2000-04-26 17:09:44 +02:00
disassemble = print_insn_big_powerpc;
else
disassemble = print_insn_rs6000;
1999-05-03 09:29:11 +02:00
break;
#endif
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
#ifdef ARCH_rl78
case bfd_arch_rl78:
disassemble = rl78_get_disassembler (abfd);
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
break;
#endif
bfd * Makefile.am (ALL_MACHINES): Add cpu-rx.lo. (ALL_MACHINES_CFILES): Add cpu-rx.c. (BFD32_BACKENDS): Add elf32-rx.lo. (BFD32_BACKENDS_CFILES): Add elf32-rx.c. * archures.c (bfd_architecture): Add bfd_arch_rx and bfd_mach_rx. Export bfd_rx_arch. (bfd_archures_list): Add bfd_rx_arch. * config.bfd: Add entry for rx-*-elf. * configure.in: Add entries for bfd_elf32_rx_le_vec and bfd_elf32_rx_be_vec. * reloc.c: Add RX relocations. * targets.c: Add RX target vectors. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rx.c: New file. * elf32-rx.c: New file. binutils * readelf.c: Add support for RX target. * MAINTAINERS: Add DJ and NickC as maintainers for RX. gas * Makefile.am: Add RX target. * configure.in: Likewise. * configure.tgt: Likewise. * read.c (do_repeat_with_expander): New function. * read.h: Provide a prototype for do_repeat_with_expander. * doc/Makefile.am: Add RX target documentation. * doc/all.texi: Likewise. * doc/as.texinfo: Likewise. * Makefile.in: Regenerate. * NEWS: Mention support for RX architecture. * configure: Regenerate. * doc/Makefile.in: Regenerate. * config/rx-defs.h: New file. * config/rx-parse.y: New file. * config/tc-rx.h: New file. * config/tc-rx.c: New file. * doc/c-rx.texi: New file. gas/testsuite * gas/rx: New directory. * gas/rx/*: New set of test cases. * gas/elf/section2.e-rx: New expected output file. * gas/all/gas.exp: Add support for RX target. * gas/elf/elf.exp: Likewise. * gas/lns/lns.exp: Likewise. * gas/macros/macros.exp: Likewise. include * dis-asm.h: Add prototype for print_insn_rx. include/elf * rx.h: New file. include/opcode * rx.h: New file. ld * Makefile.am: Add rules to build RX emulation. * configure.tgt: Likewise. * NEWS: Mention support for RX architecture. * Makefile.in: Regenerate. * emulparams/elf32rx.sh: New file. * emultempl/rxelf.em: New file. opcodes * Makefile.am: Add RX files. * configure.in: Add support for RX target. * disassemble.c: Likewise. * Makefile.in: Regenerate. * configure: Regenerate. * opc2c.c: New file. * rx-decode.c: New file. * rx-decode.opc: New file. * rx-dis.c: New file.
2009-09-29 16:17:19 +02:00
#ifdef ARCH_rx
case bfd_arch_rx:
disassemble = print_insn_rx;
break;
#endif
2001-02-10 01:58:38 +01:00
#ifdef ARCH_s390
case bfd_arch_s390:
disassemble = print_insn_s390;
break;
#endif
2006-09-17 01:51:50 +02:00
#ifdef ARCH_score
case bfd_arch_score:
if (big)
disassemble = print_insn_big_score;
2006-09-17 01:51:50 +02:00
else
disassemble = print_insn_little_score;
2006-09-17 01:51:50 +02:00
break;
#endif
1999-05-03 09:29:11 +02:00
#ifdef ARCH_sh
case bfd_arch_sh:
disassemble = print_insn_sh;
1999-05-03 09:29:11 +02:00
break;
#endif
#ifdef ARCH_sparc
case bfd_arch_sparc:
disassemble = print_insn_sparc;
break;
#endif
2006-10-25 08:49:21 +02:00
#ifdef ARCH_spu
case bfd_arch_spu:
disassemble = print_insn_spu;
break;
#endif
1999-05-03 09:29:11 +02:00
#ifdef ARCH_tic30
case bfd_arch_tic30:
disassemble = print_insn_tic30;
break;
#endif
2002-08-28 12:38:51 +02:00
#ifdef ARCH_tic4x
case bfd_arch_tic4x:
disassemble = print_insn_tic4x;
break;
#endif
2000-05-06 19:14:34 +02:00
#ifdef ARCH_tic54x
case bfd_arch_tic54x:
disassemble = print_insn_tic54x;
break;
#endif
bfd: * Makefile.am (ALL_MACHINES): Add cpu-tic6x.lo. (ALL_MACHINES_CFILES): Add cpu-tic6x.c. (BFD32_BACKENDS): Add elf32-tic6x.lo. (BFD32_BACKENDS_CFILES): Add elf32-tic6x.c. * Makefile.in: Regenerate. * archures.c (bfd_arch_tic6x, bfd_tic6x_arch): New. (bfd_archures_list): Update. * config.bfd (tic6x-*-elf): New. * configure.in (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec): New. * configure: Regenerate. * cpu-tic6x.c, elf32-tic6x.c: New. * reloc.c (BFD_RELOC_C6000_PCR_S21, BFD_RELOC_C6000_PCR_S12, BFD_RELOC_C6000_PCR_S10, BFD_RELOC_C6000_PCR_S7, BFD_RELOC_C6000_ABS_S16, BFD_RELOC_C6000_ABS_L16, BFD_RELOC_C6000_ABS_H16, BFD_RELOC_C6000_SBR_U15_B, BFD_RELOC_C6000_SBR_U15_H, BFD_RELOC_C6000_SBR_U15_W, BFD_RELOC_C6000_SBR_S16, BFD_RELOC_C6000_SBR_L16_B, BFD_RELOC_C6000_SBR_L16_H, BFD_RELOC_C6000_SBR_L16_W, BFD_RELOC_C6000_SBR_H16_B, BFD_RELOC_C6000_SBR_H16_H, BFD_RELOC_C6000_SBR_H16_W, BFD_RELOC_C6000_SBR_GOT_U15_W, BFD_RELOC_C6000_SBR_GOT_L16_W, BFD_RELOC_C6000_SBR_GOT_H16_W, BFD_RELOC_C6000_DSBT_INDEX, BFD_RELOC_C6000_PREL31, BFD_RELOC_C6000_COPY, BFD_RELOC_C6000_ALIGN, BFD_RELOC_C6000_FPHEAD, BFD_RELOC_C6000_NOCMP): New. * targets.c (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec): New. (_bfd_target_vector): Update. * bfd-in2.h, libbfd.h: Regenerate. binutils: * MAINTAINERS: Add self as TI C6X maintainer. * NEWS: Add news entry for TI C6X support. * readelf.c: Include elf/tic6x.h. (guess_is_rela): Handle EM_TI_C6000. (dump_relocations): Likewise. (get_tic6x_dynamic_type): New. (get_dynamic_type): Call it. (get_machine_flags): Handle EF_C6000_REL. (get_osabi_name): Handle machine-specific values only for relevant machines. Handle C6X values. (get_tic6x_segment_type): New. (get_segment_type): Call it. (get_tic6x_section_type_name): New. (get_section_type_name): Call it. (is_32bit_abs_reloc, is_16bit_abs_reloc, is_none_reloc): Handle EM_TI_C6000. gas: * Makefile.am (TARGET_CPU_CFILES): Add config/tc-tic6x.c. (TARGET_CPU_HFILES): Add config/tc-tic6x.h. * Makefile.in: Regenerate. * NEWS: Add news entry for TI C6X support. * app.c (do_scrub_chars): Handle "||^" for TI C6X. Handle TC_PREDICATE_START_CHAR and TC_PREDICATE_END_CHAR. Keep spaces in operands if TC_KEEP_OPERAND_SPACES. * configure.tgt (tic6x-*-*): New. * config/tc-ia64.h (TC_PREDICATE_START_CHAR, TC_PREDICATE_END_CHAR): Define. * config/tc-tic6x.c, config/tc-tic6x.h: New. * doc/Makefile.am (CPU_DOCS): Add c-tic6x.texi. * doc/Makefile.in: Regenerate. * doc/all.texi (TIC6X): Define. * doc/as.texinfo: Add TI C6X documentation. Include c-tic6x.texi. * doc/c-tic6x.texi: New. gas/testsuite: * gas/tic6x: New directory and testcases. include: * dis-asm.h (print_insn_tic6x): Declare. include/elf: * common.h (ELFOSABI_C6000_ELFABI, ELFOSABI_C6000_LINUX): Define. * tic6x.h: New. include/opcode: * tic6x-control-registers.h, tic6x-insn-formats.h, tic6x-opcode-table.h, tic6x.h: New. ld: * Makefile.am (ALL_EMULATIONS): Add eelf32_tic6x_be.o and eelf32_tic6x_le.o. (eelf32_tic6x_be.c, eelf32_tic6x_le.c): New. * NEWS: Add news entry for TI C6X support. * configure.tgt (tic6x-*-*): New. * emulparams/elf32_tic6x_be.sh, emulparams/elf32_tic6x_le.sh: New. ld/testsuite: * ld-elf/flags1.d, ld-elf/merge.d: XFAIL for tic6x-*-*. * ld-elf/sec-to-seg.exp: Set B_test_same_seg to 0 for tic6x-*-*. * ld-tic6x: New directory and testcases. opcodes: * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c. * Makefile.in: Regenerate. * configure.in (bfd_tic6x_arch): New. * configure: Regenerate. * disassemble.c (ARCH_tic6x): Define if ARCH_all. (disassembler): Handle TI C6X. * tic6x-dis.c: New.
2010-03-25 22:12:36 +01:00
#ifdef ARCH_tic6x
case bfd_arch_tic6x:
disassemble = print_insn_tic6x;
break;
#endif
1999-05-03 09:29:11 +02:00
#ifdef ARCH_tic80
case bfd_arch_tic80:
disassemble = print_insn_tic80;
break;
#endif
FT32 initial support FT32 is a new 32-bit RISC core developed by FTDI for embedded applications. * configure.ac: Add FT32 support. * configure: Regenerate. bfd/ * Makefile.am: Add FT32 files. * archures.c (enum bfd_architecture): Add bfd_arch_ft32. (bfd_mach_ft32): Define. (bfd_ft32_arch): Declare. (bfd_archures_list): Add bfd_ft32_arch. * config.bfd: Handle FT32. * configure.ac: Likewise. * cpu-ft32.c: New file. * elf32-ft32.c: New file. * reloc.c (BFD_RELOC_FT32_10, BFD_RELOC_FT32_20, BFD_RELOC_FT32_17, BFD_RELOC_FT32_18): Define. * targets.c (_bfd_target_vector): Add ft32_elf32_vec. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * Makefile.in: Regenerate. * configure: Regenerate. * po/SRC-POTFILES.in: Regenerate. binutils/ * readelf.c: Add FT32 support. gas/ * Makefile.am: Add FT32 files. * config/tc-ft32.c: New file. * config/tc-ft32.h: New file. * configure.tgt: Add FT32 support. * Makefile.in: Regenerate. * po/POTFILES.in: Regenerate. gas/testsuite/ * gas/ft32/ft32.exp: New file. * gas/ft32/insn.d: New file. * gas/ft32/insn.s: New file. include/ * dis-asm.h (print_insn_ft32): Declare. include/elf/ * common.h (EM_FT32): Define. * ft32.h: New file. include/opcode/ * ft32.h: New file. ld/ * Makefile.am: Add FT32 files. * configure.tgt: Handle FT32 target. * emulparams/elf32ft32.sh: New file. * scripttempl/ft32.sc: New file. * Makefile.in: Regenerate. opcodes/ * Makefile.am: Add FT32 files. * configure.ac: Handle FT32. * disassemble.c (disassembler): Call print_insn_ft32. * ft32-dis.c: New file. * ft32-opc.c: New file. * Makefile.in: Regenerate. * configure: Regenerate. * po/POTFILES.in: Regenerate.
2015-01-28 06:06:43 +01:00
#ifdef ARCH_ft32
case bfd_arch_ft32:
disassemble = print_insn_ft32;
break;
#endif
1999-05-03 09:29:11 +02:00
#ifdef ARCH_v850
case bfd_arch_v850:
2012-11-09 Nick Clifton <nickc@redhat.com> * Makefile.am (ALL_MACHINES): Add cpu-v850-rh850.lo. (ALL_MACHINES_CFILES): Add cpu-v850-rh850.c. * archures.c (bfd_arch_info): Add bfd_v850_rh850_arch. * config.bfd: Likewise. * configure.in: Add bfd_elf32_v850_rh850_vec. * cpu-v850.c: Update printed description. * cpu-v850_rh850.c: New file. * elf32-v850.c (v850_elf_check_relocs): Add support for RH850 ABI relocs. (v850_elf_perform_relocation): Likewise. (v850_elf_final_link_relocate): Likewise. (v850_elf_relocate_section): Likewise. (v850_elf_relax_section): Likewise. (v800_elf_howto_table): New. (v850_elf_object_p): Add support for RH850 ABI values. (v850_elf_final_write_processing): Likewise. (v850_elf_merge_private_bfd_data): Likewise. (v850_elf_print_private_bfd_data): Likewise. (v800_elf_reloc_map): New. (v800_elf_reloc_type_lookup): New. (v800_elf_reloc_name_lookup): New. (v800_elf_info_to_howto): New. (bfd_elf32_v850_rh850_vec): New. (bfd_arch_v850_rh850): New. * targets.c (_bfd_targets): Add bfd_elf32_v850_rh850_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * readelf.c (get_machine_flags): Add support for E_FLAG_RX_ABI. (guess_is_rela): Add EM_V800. (dump_relocations): Likewise. (get_machine_name): Update EM_V800. (get_machine_flags): Add support for RH850 ABI flags. (is_32bit_abs_reloc): Add support for RH850 ABI reloc. * config/tc-v850.c (v850_target_arch): New. (v850_target_format): New. (set_machine): Use v850_target_arch. (md_begin): Likewise. (md_show_usage): Document new switches. (md_parse_option): Add -mgcc-abi, -mrh850-abi, -m8byte-align and -m4byte-align. * config/tc-v850.c (TARGET_ARCH) Use v850_target_arch. (TARGET_FORMAT): Use v850_target_format. * doc/c-v850.texi: Document new options. * v850.h: Add RH850 ABI values. * Makefile.am: (ALL_EMULATION_SOURCES): Add ev850_rh850.c. * Makefile.in: Regenerate. * configure.tgt (v850*-*-*): Make v850_rh850 the default emulation. Add vanilla v850 as an extra emulation. * emulparams/v850_rh850.sh: New file. * scripttempl/v850_rh850.sc: New file. * configure.in: Add bfd_v850_rh850_arch. * configure: Regenerate. * disassemble.c (disassembler): Likewise.
2012-11-09 18:36:19 +01:00
case bfd_arch_v850_rh850:
1999-05-03 09:29:11 +02:00
disassemble = print_insn_v850;
break;
#endif
#ifdef ARCH_w65
case bfd_arch_w65:
disassemble = print_insn_w65;
break;
#endif
#ifdef ARCH_wasm32
case bfd_arch_wasm32:
disassemble = print_insn_wasm32;
break;
#endif
#ifdef ARCH_xgate
case bfd_arch_xgate:
disassemble = print_insn_xgate;
break;
#endif
Index: bfd/ChangeLog 2001-12-07 Geoffrey Keating <geoffk@redhat.com> Richard Henderson <rth@redhat.com> Corinna Vinschen <vinschen@redhat.com> * Makefile.am: Add support for xstormy16. * archures.c: Add support for xstormy16. * config.bfd: Add support for xstormy16. * configure.in: Add support for xstormy16. * reloc.c: Add support for xstormy16. * targets.c: Add support for xstormy16. * cpu-xstormy16.c: New file. * elf32-xstormy16.c: New file. * Makefile.in: Regenerated. * bfd-in2.h: Regenerated. * configure: Regenerated. * libbfd.h: Regenerated. Index: binutils/ChangeLog 2001-12-07 Geoffrey Keating <geoffk@redhat.com> * readelf.c (guess_is_rela): Add support for stormy16. (dump_relocations): Likewise. (get_machine_name): Likewise. Index: gas/ChangeLog 2001-12-07 Geoffrey Keating <geoffk@redhat.com> Richard Henderson <rth@redhat.com> * configure.in: Add support for xstormy16. * configure: Regenerated. * Makefile.am: Add support for xstormy16. * Makefile.in: Regenerated. * config/tc-xstormy16.c: New file. * config/tc-xstormy16.h: New file. Index: gas/testsuite/ChangeLog 2001-12-07 Geoffrey Keating <geoffk@redhat.com> matthew green <mrg@redhat.com> * gas/xstormy16/allinsn.d: New file. * gas/xstormy16/allinsn.exp: New file. * gas/xstormy16/allinsn.s: New file. * gas/xstormy16/allinsn.sh: New file. * gas/xstormy16/gcc.d: New file. * gas/xstormy16/gcc.s: New file. * gas/xstormy16/gcc.sh: New file. * gas/xstormy16/reloc-1.d: New file. * gas/xstormy16/reloc-1.s: New file. * gas/xstormy16/reloc-2.d: New file. * gas/xstormy16/reloc-2.s: New file. Index: ld/ChangeLog 2001-12-07 Geoffrey Keating <geoffk@redhat.com> Richard Henderson <rth@redhat.com> * Makefile.am: Add support for xstormy16. * configure.tgt: Add support for xstormy16. * Makefile.in: Regenerate. * emulparams/elf32xstormy16.sh: New file. * scripttempl/xstormy16.sc: New file. Index: opcodes/ChangeLog 2001-12-07 Geoffrey Keating <geoffk@redhat.com> * Makefile.am: Add support for xstormy16. * Makefile.in: Regenerate. * configure.in: Add support for xstormy16. * configure: Regenerate. * disassemble.c: Add support for xstormy16. * xstormy16-asm.c: New generated file. * xstormy16-desc.c: New generated file. * xstormy16-desc.h: New generated file. * xstormy16-dis.c: New generated file. * xstormy16-ibld.c: New generated file. * xstormy16-opc.c: New generated file. * xstormy16-opc.h: New generated file. Index: include/ChangeLog 2001-12-07 Geoffrey Keating <geoffk@redhat.com> * dis-asm.h (print_insn_xstormy16): Declare. Index: include/elf/ChangeLog 2001-12-07 Geoffrey Keating <geoffk@redhat.com> Richard Henderson <rth@redhat.com> * common.h (EM_XSTORMY16): Define. * xstormy16.h: New file.
2001-12-08 04:46:03 +01:00
#ifdef ARCH_xstormy16
case bfd_arch_xstormy16:
disassemble = print_insn_xstormy16;
break;
#endif
2006-02-17 15:36:28 +01:00
#ifdef ARCH_xc16x
case bfd_arch_xc16x:
disassemble = print_insn_xc16x;
break;
#endif
2003-04-01 17:50:31 +02:00
#ifdef ARCH_xtensa
case bfd_arch_xtensa:
disassemble = print_insn_xtensa;
break;
#endif
#ifdef ARCH_z80
case bfd_arch_z80:
disassemble = print_insn_z80;
break;
#endif
1999-05-03 09:29:11 +02:00
#ifdef ARCH_z8k
case bfd_arch_z8k:
if (mach == bfd_mach_z8001)
1999-05-03 09:29:11 +02:00
disassemble = print_insn_z8001;
2001-01-13 20:45:52 +01:00
else
1999-05-03 09:29:11 +02:00
disassemble = print_insn_z8002;
break;
#endif
#ifdef ARCH_vax
case bfd_arch_vax:
disassemble = print_insn_vax;
break;
#endif
#ifdef ARCH_visium
case bfd_arch_visium:
disassemble = print_insn_visium;
break;
#endif
#ifdef ARCH_frv
case bfd_arch_frv:
disassemble = print_insn_frv;
break;
#endif
#ifdef ARCH_moxie
case bfd_arch_moxie:
disassemble = print_insn_moxie;
break;
#endif
#ifdef ARCH_iq2000
case bfd_arch_iq2000:
disassemble = print_insn_iq2000;
break;
ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * configure.in: Add cases for Renesas m32c. * configure: Regenerated. bfd/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for m32c-*-elf (Renesas m32c and m16c). * Makefile.am (ALL_MACHINES): Add cpu-m32c.lo. (ALL_MACHINES_CFILES): Add cpu-m32c.c. (BFD32_BACKENDS): Add elf32-m32c.lo. (BFD32_BACKENDS_CFILES): Add elf32-m32c.c. (cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'. * Makefile.in: Regenerated. * archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New arch and mach codes. (bfd_m32c_arch): New arch info object. (bfd_archures_list): List bfd_m32c_arch. * bfd-in2.h: Regenerated. * config.bfd: Add case for the m32c. * configure.in: Add case for the m32c. * configure: Regenerated. * cpu-m32c.c, elf32-m32c.c: New files. * libbfd.h: Regenerated. * targets.c (bfd_elf32_m32c_vec): Declare. (_bfd_target_vector): List bfd_elf32_m32c_vec. binutils/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * readelf.c: #include "elf/m32c.h" (guess_is_rela, dump_relocations, get_machine_name): Add cases for EM_M32C. * Makefile.am (readelf.o): Update dependencies. * Makefile.in: Regenerated. cpu/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * m32c.cpu, m32c.opc: Machine description for the Renesas M32C. gas/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C. * Makefile.am (CPU_TYPES): List m32c. (TARGET_CPU_CFILES): List config/tc-m32c.c. (TARGET_CPU_HFILES): List config/tc-m32c.h. * configure.in: Add case for m32c. * configure.tgt: Add cases for m32c and m32c-*-elf. * configure: Regenerated. * config/tc-m32c.c, config/tc-m32c.h: New files. * doc/Makefile.am (CPU_DOCS): Add c-m32c.texi. * doc/Makefile.in: Regenerated. * doc/all.texi: Set M32C. * doc/as.texinfo: Add text for the M32C-specific options and line comment characters, and refer to c-m32c.texi. * doc/c-m32c.texi: New file. include/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * dis-asm.h (print_insn_m32c): New declaration. include/elf/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for Renesas M32C and M16C. * common.h (EM_M32C): New machine number. * m32c.h: New file. ld/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o. (eelf32m32c.c): New target. * Makefile.in: Regenerated. * configure.tgt: Add case for m32c-*-elf. * emulparams/elf32m32c.sh: New file. opcodes/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New. * m32c-desc.h, m32c-opc.h: New. * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h. (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c. (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo. (CLEANFILES): List stamp-m32c. (M32C_DEPS): List stamp-m32c, if CGEN_MAINT. (CGEN_CPUS): Add m32c. (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c) (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS. (m32c_opc_h): New variable. (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo) (m32c-opc.lo): New rules. * Makefile.in: Regenerated. * configure.in: Add case for bfd_m32c_arch. * configure: Regenerated. * disassemble.c (ARCH_m32c): New. [ARCH_m32c]: #include "m32c-desc.h". (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c. (disassemble_init_for_target) [ARCH_m32c]: Same. * cgen-ops.h, cgen-types.h: New files. * Makefile.am (HFILES): List them. * Makefile.in: Regenerated.
2005-07-15 00:52:28 +02:00
#endif
#ifdef ARCH_m32c
case bfd_arch_m32c:
disassemble = print_insn_m32c;
break;
* Makefile.am (ALL_MACHINES): Add cpu-tilegx.lo and cpu-tilepro.lo. (ALL_MACHINE_CFILES): Add cpu-tilegx.c and cpu-tilepro.c. (BFD32_BACKENDS): Add elf32-tilegx.lo, elf32-tilepro.lo, and elfxx-tilegx.lo. (BFD32_BACKENDS_CFILES): Add elf32-tilegx.c elf32-tilepro.c, and elfxx-tilegx.c. (BFD64_BACKENDS): Add elf64-tilegx.lo. (BFD64_BACKENDS_CFILES): Add elf64-tilegx.c. * Makefile.in: Regenerate. * arctures.c (bfd_architecture): Define bfd_arch_tilepro, bfd_arch_tilegx, bfd_mach_tilepro, bfd_mach_tilegx. (bfd_arch_info): Add bfd_tilegx_arch, bfd_tilepro_arch. (bfd_archures_list): Add bfd_tilegx_arch, bfd_tilepro_arch. bfd-in2.h: Regenerate. * config.bfd: Handle tilegx-*-* and tilepro-*-*. * configure.in: Handle bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec, and bfd_elf64_tilegx_vec. * configure: Regenerate. * elf-bfd.h (enum elf_target_id): Define TILEGX_ELF_DATA and TILEPRO_ELF_DATA. * libbfd.h: Regenerate. * reloc.c: Add BFD_RELOC_TILEPRO_{COPY, GLOB_DAT, JMP_SLOT, RELATIVE, BROFF_X1, JOFFLONG_X1, JOFFLONG_X1_PLT, IMM8_X0, IMM8_Y0, IMM8_X1, IMM8_Y1, DEST_IMM8_X1, MT_IMM15_X1, MF_IMM15_X1, IMM16_X0, IMM16_X1, IMM16_X0_LO, IMM16_X1_LO, IMM16_X0_HI, IMM16_X1_HI, IMM16_X0_HA, IMM16_X1_HA, IMM16_X0_PCREL, IMM16_X1_PCREL, IMM16_X0_LO_PCREL, IMM16_X1_LO_PCREL, IMM16_X0_HI_PCREL, IMM16_X1_HI_PCREL, IMM16_X0_HA_PCREL, IMM16_X1_HA_PCREL, IMM16_X0_GOT, IMM16_X1_GOT, IMM16_X0_GOT_LO, IMM16_X1_GOT_LO, IMM16_X0_GOT_HI, IMM16_X1_GOT_HI, IMM16_X0_GOT_HA, IMM16_X1_GOT_HA, MMSTART_X0, MMEND_X0, MMSTART_X1, MMEND_X1, SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1, IMM16_X0_TLS_GD, IMM16_X1_TLS_GD, IMM16_X0_TLS_GD_LO, IMM16_X1_TLS_GD_LO, IMM16_X0_TLS_GD_HI, IMM16_X1_TLS_GD_HI, IMM16_X0_TLS_GD_HA, IMM16_X1_TLS_GD_HA, IMM16_X0_TLS_IE, IMM16_X1_TLS_IE, IMM16_X0_TLS_IE_LO, IMM16_X1_TLS_IE_LO, IMM16_X0_TLS_IE_HI, IMM16_X1_TLS_IE_HI, IMM16_X0_TLS_IE_HA, IMM16_X1_TLS_IE_HA, TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32} Add BFD_RELOC_TILEGX_{HW0, HW1, HW2, HW3, HW0_LAST, HW1_LAST, HW2_LAST, COPY, GLOB_DAT, JMP_SLOT, RELATIVE, BROFF_X1, JUMPOFF_X1, JUMPOFF_X1_PLT, IMM8_X0, IMM8_Y0, IMM8_X1, IMM8_Y1, DEST_IMM8_X1, MT_IMM14_X1, MF_IMM14_X1, MMSTART_X0, MMEND_X0, SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1, IMM16_X0_HW0, IMM16_X1_HW0, IMM16_X0_HW1, IMM16_X1_HW1, IMM16_X0_HW2, IMM16_X1_HW2, IMM16_X0_HW3, IMM16_X1_HW3, IMM16_X0_HW0_LAST, IMM16_X1_HW0_LAST, IMM16_X0_HW1_LAST, IMM16_X1_HW1_LAST, IMM16_X0_HW2_LAST, IMM16_X1_HW2_LAST, IMM16_X0_HW0_PCREL, IMM16_X1_HW0_PCREL, IMM16_X0_HW1_PCREL, IMM16_X1_HW1_PCREL, IMM16_X0_HW2_PCREL, IMM16_X1_HW2_PCREL, IMM16_X0_HW3_PCREL, IMM16_X1_HW3_PCREL, IMM16_X0_HW0_LAST_PCREL, IMM16_X1_HW0_LAST_PCREL, IMM16_X0_HW1_LAST_PCREL, IMM16_X1_HW1_LAST_PCREL, IMM16_X0_HW2_LAST_PCREL, IMM16_X1_HW2_LAST_PCREL, IMM16_X0_HW0_GOT, IMM16_X1_HW0_GOT, IMM16_X0_HW1_GOT, IMM16_X1_HW1_GOT, IMM16_X0_HW2_GOT, IMM16_X1_HW2_GOT, IMM16_X0_HW3_GOT, IMM16_X1_HW3_GOT, IMM16_X0_HW0_LAST_GOT, IMM16_X1_HW0_LAST_GOT, IMM16_X0_HW1_LAST_GOT, IMM16_X1_HW1_LAST_GOT, IMM16_X0_HW2_LAST_GOT, IMM16_X1_HW2_LAST_GOT, IMM16_X0_HW0_TLS_GD, IMM16_X1_HW0_TLS_GD, IMM16_X0_HW1_TLS_GD, IMM16_X1_HW1_TLS_GD, IMM16_X0_HW2_TLS_GD, IMM16_X1_HW2_TLS_GD, IMM16_X0_HW3_TLS_GD, IMM16_X1_HW3_TLS_GD, IMM16_X0_HW0_LAST_TLS_GD, IMM16_X1_HW0_LAST_TLS_GD, IMM16_X0_HW1_LAST_TLS_GD, IMM16_X1_HW1_LAST_TLS_GD, IMM16_X0_HW2_LAST_TLS_GD, IMM16_X1_HW2_LAST_TLS_GD, IMM16_X0_HW0_TLS_IE, IMM16_X1_HW0_TLS_IE, IMM16_X0_HW1_TLS_IE, IMM16_X1_HW1_TLS_IE, IMM16_X0_HW2_TLS_IE, IMM16_X1_HW2_TLS_IE, IMM16_X0_HW3_TLS_IE, IMM16_X1_HW3_TLS_IE, IMM16_X0_HW0_LAST_TLS_IE, IMM16_X1_HW0_LAST_TLS_IE, IMM16_X0_HW1_LAST_TLS_IE, IMM16_X1_HW1_LAST_TLS_IE, IMM16_X0_HW2_LAST_TLS_IE, IMM16_X1_HW2_LAST_TLS_IE, TLS_DTPMOD64, TLS_DTPOFF64, TLS_TPOFF64, TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32} * targets.c (bfd_elf32_tilegx_vec): Declare. (bfd_elf32_tilepro_vec): Declare. (bfd_elf64_tilegx_vec): Declare. (bfd_target_vector): Add bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec, and bfd_elf64_tilegx_vec. * cpu-tilegx.c: New file. * cpu-tilepro.c: New file. * elf32-tilepro.h: New file. * elf32-tilepro.c: New file. * elf32-tilegx.c: New file. * elf32-tilegx.h: New file. * elf64-tilegx.c: New file. * elf64-tilegx.h: New file. * elfxx-tilegx.c: New file. * elfxx-tilegx.h: New file. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-tilegx.c and config/tc-tilepro.c. (TARGET_CPU_HFILES): Add config/tc-tilegx.h and config/tc-tilepro.h. * Makefile.in: Regenerate. * configure.tgt (tilepro-*-*): New. (tilegx-*-*): Likewise. * config/tc-tilegx.c: New file. * config/tc-tilegx.h: Likewise. * config/tc-tilepro.h: Likewise. * config/tc-tilepro.c: Likewise. * doc/Makefile.am (CPU_DOCS): Add c-tilegx.texi and c-tilepro.texi. * doc/Makefile.in: Regenerate. * doc/all.texi (TILEGX): Define. (TILEPRO): Define. * doc/as.texinfo: Add Tile-Gx and TILEPro documentation. Include c-tilegx.texi and c-tilepro.texi. * doc/c-tilegx.texi: New. * doc/c-tilepro.texi: New. * gas/tilepro/t_constants.s: New file. * gas/tilepro/t_constants.d: Likewise. * gas/tilepro/t_insns.s: Likewise. * gas/tilepro/tilepro.exp: Likewise. * gas/tilepro/t_insns.d: Likewise. * gas/tilegx/tilegx.exp: Likewise. * gas/tilegx/t_insns.d: Likewise. * gas/tilegx/t_insns.s: Likewise. * dis-asm.h (print_insn_tilegx): Declare. (print_insn_tilepro): Likewise. * tilegx.h: New file. * tilepro.h: New file. * common.h: Add EM_TILEGX. * tilegx.h: New file. * tilepro.h: New file. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32tilegx.c and eelf32tilepro.c. (ALL_64_EMULATION_SOURCES): Add eelf64tilegx.c. (eelf32tilegx.c): New target. (eelf32tilepro.c): Likewise. (eelf64tilegx.c): Likewise. * Makefile.in: Regenerate. * configure.tgt: Handle tilegx-*-* and tilepro-*-*. * emulparams/elf32tilegx.sh: New file. * emulparams/elf64tilegx.sh: New file. * emulparams/elf32tilepro.sh: New file. * ld-elf/eh5.d: Don't run on tile*. * ld-srec/srec.exp: xfail on tile*. * ld-tilegx/external.s: New file. * ld-tilegx/reloc.d: New file. * ld-tilegx/reloc.s: New file. * ld-tilegx/tilegx.exp: New file. * ld-tilepro/external.s: New file. * ld-tilepro/reloc.d: New file. * ld-tilepro/reloc.s: New file. * ld-tilepro/tilepro.exp: New file. * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tilegx-dis.c, tilegx-opc.c, tilepro-dis.c, and tilepro-opc.c. * Makefile.in: Regenerate. * configure.in: Handle bfd_tilegx_arch and bfd_tilepro_arch. * configure: Regenerate. * disassemble.c (disassembler): Add ARCH_tilegx and ARCH_tilepro. * po/POTFILES.in: Regenerate. * tilegx-dis.c: New file. * tilegx-opc.c: New file. * tilepro-dis.c: New file. * tilepro-opc.c: New file.
2011-06-13 17:18:54 +02:00
#endif
#ifdef ARCH_tilegx
case bfd_arch_tilegx:
disassemble = print_insn_tilegx;
break;
#endif
#ifdef ARCH_tilepro
case bfd_arch_tilepro:
disassemble = print_insn_tilepro;
break;
1999-05-03 09:29:11 +02:00
#endif
default:
return 0;
}
return disassemble;
}
void
update many old style function definitions This includes regenerating a bunch of files in opcodes/ with trunk cgen. gprof/ChangeLog: 2016-04-20 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> * basic_blocks.c: Update old style function definitions. * cg_arcs.c: Likewise. * cg_print.c: Likewise. * gen-c-prog.awk: Likewise. * gmon_io.c: Likewise. * hertz.c: Likewise. * hist.c: Likewise. * sym_ids.c: Likewise. bfd/ChangeLog: 2016-04-20 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> * cache.c: Update old style function definitions. * elf32-m68k.c: Likewise. * elf64-mmix.c: Likewise. * stab-syms.c: Likewise. opcodes/ChangeLog: 2016-04-20 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> * alpha-dis.c: Regenerate. * crx-dis.c: Likewise. * disassemble.c: Likewise. * epiphany-opc.c: Likewise. * fr30-opc.c: Likewise. * frv-opc.c: Likewise. * ip2k-opc.c: Likewise. * iq2000-opc.c: Likewise. * lm32-opc.c: Likewise. * lm32-opinst.c: Likewise. * m32c-opc.c: Likewise. * m32r-opc.c: Likewise. * m32r-opinst.c: Likewise. * mep-opc.c: Likewise. * mt-opc.c: Likewise. * or1k-opc.c: Likewise. * or1k-opinst.c: Likewise. * tic80-opc.c: Likewise. * xc16x-opc.c: Likewise. * xstormy16-opc.c: Likewise. ld/ChangeLog: 2016-04-20 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> * emultempl/scoreelf.em: Likewise. binutils/ChangeLog: 2016-04-20 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> * resres.c: Likewise. gas/ChangeLog: 2016-04-20 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> * cgen.c: Likewise. * config/tc-bfin.c: Likewise. * config/tc-ia64.c: Likewise. * config/tc-mep.c: Likewise. * config/tc-metag.c: Likewise. * config/tc-nios2.c: Likewise. * config/tc-rl78.c: Likewise.
2016-04-14 00:30:46 +02:00
disassembler_usage (FILE *stream ATTRIBUTE_UNUSED)
{
#ifdef ARCH_aarch64
print_aarch64_disassembler_options (stream);
#endif
#ifdef ARCH_arc
print_arc_disassembler_options (stream);
#endif
#ifdef ARCH_arm
print_arm_disassembler_options (stream);
#endif
[ binutils/ChangeLog ] 2002-12-27 Chris Demetriou <cgd@broadcom.com> * doc/binutils.texi (objdump): Document MIPS -M options. [ gas/testsuite/ChangeLog ] 2002-12-27 Chris Demetriou <cgd@broadcom.com> * gas/mips/cp0-names-mips32.d: New file. * gas/mips/cp0-names-mips64.d: New file. * gas/mips/cp0-names-numeric.d: New file. * gas/mips/cp0-names-sb1.d: New file. * gas/mips/cp0-names.s: New file. * gas/mips/fpr-names-32.d: New file. * gas/mips/fpr-names-64.d: New file. * gas/mips/fpr-names-n32.d: New file. * gas/mips/fpr-names-numeric.d: New file. * gas/mips/fpr-names.s: New file. * gas/mips/gpr-names-32.d: New file. * gas/mips/gpr-names-64.d: New file. * gas/mips/gpr-names-n32.d: New file. * gas/mips/gpr-names-numeric.d: New file. * gas/mips/gpr-names.s: New file. * gas/mips/mips.exp: Run new tests. [ include/ChangeLog ] 2002-12-27 Chris Demetriou <cgd@broadcom.com> * dis-asm.h (print_mips_disassembler_options): Prototype. [ include/opcode/ChangeLog ] 2002-12-19 Chris Demetriou <cgd@broadcom.com> * mips.h (OP_OP_COP0, OP_OP_COP1, OP_OP_COP2, OP_OP_COP3) (OP_OP_LWC1, OP_OP_LWC2, OP_OP_LWC3, OP_OP_LDC1, OP_OP_LDC2) (OP_OP_LDC3, OP_OP_SWC1, OP_OP_SWC2, OP_OP_SWC3, OP_OP_SDC1) (OP_OP_SDC2, OP_OP_SDC3): Define. [ opcodes/ChangeLog ] 2002-12-27 Chris Demetriou <cgd@broadcom.com> * disassemble.c (disassembler_usage): Add invocation of print_mips_disassembler_options. * mips-dis.c (print_mips_disassembler_options) (set_default_mips_dis_options, parse_mips_dis_option) (parse_mips_dis_options, choose_abi_by_name, choose_arch_by_name) (choose_arch_by_number): New functions. (mips_abi_choice, mips_arch_choice): New structures. (mips32_reg_names, mips64_reg_names, reg_names): Remove. (mips_gpr_names_numeric, mips_gpr_names_oldabi) (mips_gpr_names_newabi, mips_fpr_names_numeric) (mips_fpr_names_32, mips_fpr_names_n32, mips_fpr_names_64) (mips_cp0_names_numeric, mips_cp0_names_mips3264) (mips_cp0_names_sb1, mips_abi_choices, mips_arch_choices) (mips_processor, mips_isa, mips_gpr_names, mips_fpr_names) (mips_cp0_names): New variables. (print_insn_args): Use new variables to print GPR, FPR, and CP0 register names. (mips_isa_type): Remove. (print_insn_mips): Remove ISA and CPU setup since it is now done... (_print_insn_mips): Here. Remove register setup code, and call set_default_mips_dis_options and parse_mips_dis_options instead. (print_mips16_insn_arg): Use mips_gpr_names instead of mips32_names.
2002-12-27 09:00:31 +01:00
#ifdef ARCH_mips
print_mips_disassembler_options (stream);
#endif
#ifdef ARCH_powerpc
print_ppc_disassembler_options (stream);
#endif
Add support for RISC-V architecture. bfd * Makefile.am: Add entries for riscv32-elf and riscv64-elf. * config.bdf: Likewise. * configure.ac: Likewise. * Makefile.in: Regenerate. * configure: Regenerate. * archures.c: Add bfd_riscv_arch. * reloc.c: Add riscv relocs. * targets.c: Add riscv_elf32_vec and riscv_elf64_vec. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elf-bfd.h: Add RISCV_ELF_DATA to enum elf_target_id. * elfnn-riscv.c: New file. * elfxx-riscv.c: New file. * elfxx-riscv.h: New file. binutils* readelf.c (guess_is_rela): Add EM_RISCV. (get_machine_name): Likewise. (dump_relocations): Add support for riscv relocations. (get_machine_flags): Add support for riscv flags. (is_32bit_abs_reloc): Add R_RISCV_32. (is_64bit_abs_reloc): Add R_RISCV_64. (is_none_reloc): Add R_RISCV_NONE. * testsuite/binutils-all/objdump.exp (cpus_expected): Add riscv. Expect the debug_ranges test to fail. gas * Makefile.am: Add riscv files. * Makefile.in: Regenerate. * NEWS: Mention the support for this architecture. * configure.in: Define a default architecture. * configure: Regenerate. * configure.tgt: Add entries for riscv. * doc/as.texinfo: Likewise. * testsuite/gas/all/gas.exp: Expect the redef tests to fail. * testsuite/gas/elf/elf.exp: Expect the groupauto tests to fail. * config/tc-riscv.c: New file. * config/tc-riscv.h: New file. * doc/c-riscv.texi: New file. * testsuite/gas/riscv: New directory. * testsuite/gas/riscv/riscv.exp: New file. * testsuite/gas/riscv/t_insns.d: New file. * testsuite/gas/riscv/t_insns.s: New file. ld * Makefile.am: Add riscv files. * Makefile.in: Regenerate. * NEWS: Mention the support for this target. * configure.tgt: Add riscv entries. * emulparams/elf32lriscv-defs.sh: New file. * emulparams/elf32lriscv.sh: New file. * emulparams/elf64lriscv-defs.sh: New file. * emulparams/elf64lriscv.sh: New file. * emultempl/riscvelf.em: New file. opcodes * configure.ac: Add entry for bfd_riscv_arch. * configure: Regenerate. * disassemble.c (disassembler): Add support for riscv. (disassembler_usage): Likewise. * riscv-dis.c: New file. * riscv-opc.c: New file. include * dis-asm.h: Add prototypes for print_insn_riscv and print_riscv_disassembler_options. * elf/riscv.h: New file. * opcode/riscv-opc.h: New file. * opcode/riscv.h: New file.
2016-11-01 17:45:57 +01:00
#ifdef ARCH_riscv
print_riscv_disassembler_options (stream);
#endif
#ifdef ARCH_i386
print_i386_disassembler_options (stream);
#endif
#ifdef ARCH_s390
print_s390_disassembler_options (stream);
#endif
#ifdef ARCH_wasm32
print_wasm32_disassembler_options (stream);
#endif
2001-01-13 20:45:52 +01:00
return;
}
void
disassemble_init_for_target (struct disassemble_info * info)
{
if (info == NULL)
return;
switch (info->arch)
{
#ifdef ARCH_aarch64
case bfd_arch_aarch64:
info->symbol_is_valid = aarch64_symbol_is_valid;
info->disassembler_needs_relocs = TRUE;
break;
#endif
#ifdef ARCH_arm
case bfd_arch_arm:
info->symbol_is_valid = arm_symbol_is_valid;
info->disassembler_needs_relocs = TRUE;
break;
#endif
#ifdef ARCH_ia64
case bfd_arch_ia64:
info->skip_zeroes = 16;
break;
#endif
#ifdef ARCH_tic4x
case bfd_arch_tic4x:
info->skip_zeroes = 32;
break;
ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * configure.in: Add cases for Renesas m32c. * configure: Regenerated. bfd/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for m32c-*-elf (Renesas m32c and m16c). * Makefile.am (ALL_MACHINES): Add cpu-m32c.lo. (ALL_MACHINES_CFILES): Add cpu-m32c.c. (BFD32_BACKENDS): Add elf32-m32c.lo. (BFD32_BACKENDS_CFILES): Add elf32-m32c.c. (cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'. * Makefile.in: Regenerated. * archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New arch and mach codes. (bfd_m32c_arch): New arch info object. (bfd_archures_list): List bfd_m32c_arch. * bfd-in2.h: Regenerated. * config.bfd: Add case for the m32c. * configure.in: Add case for the m32c. * configure: Regenerated. * cpu-m32c.c, elf32-m32c.c: New files. * libbfd.h: Regenerated. * targets.c (bfd_elf32_m32c_vec): Declare. (_bfd_target_vector): List bfd_elf32_m32c_vec. binutils/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * readelf.c: #include "elf/m32c.h" (guess_is_rela, dump_relocations, get_machine_name): Add cases for EM_M32C. * Makefile.am (readelf.o): Update dependencies. * Makefile.in: Regenerated. cpu/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * m32c.cpu, m32c.opc: Machine description for the Renesas M32C. gas/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C. * Makefile.am (CPU_TYPES): List m32c. (TARGET_CPU_CFILES): List config/tc-m32c.c. (TARGET_CPU_HFILES): List config/tc-m32c.h. * configure.in: Add case for m32c. * configure.tgt: Add cases for m32c and m32c-*-elf. * configure: Regenerated. * config/tc-m32c.c, config/tc-m32c.h: New files. * doc/Makefile.am (CPU_DOCS): Add c-m32c.texi. * doc/Makefile.in: Regenerated. * doc/all.texi: Set M32C. * doc/as.texinfo: Add text for the M32C-specific options and line comment characters, and refer to c-m32c.texi. * doc/c-m32c.texi: New file. include/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * dis-asm.h (print_insn_m32c): New declaration. include/elf/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for Renesas M32C and M16C. * common.h (EM_M32C): New machine number. * m32c.h: New file. ld/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o. (eelf32m32c.c): New target. * Makefile.in: Regenerated. * configure.tgt: Add case for m32c-*-elf. * emulparams/elf32m32c.sh: New file. opcodes/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New. * m32c-desc.h, m32c-opc.h: New. * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h. (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c. (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo. (CLEANFILES): List stamp-m32c. (M32C_DEPS): List stamp-m32c, if CGEN_MAINT. (CGEN_CPUS): Add m32c. (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c) (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS. (m32c_opc_h): New variable. (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo) (m32c-opc.lo): New rules. * Makefile.in: Regenerated. * configure.in: Add case for bfd_m32c_arch. * configure: Regenerated. * disassemble.c (ARCH_m32c): New. [ARCH_m32c]: #include "m32c-desc.h". (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c. (disassemble_init_for_target) [ARCH_m32c]: Same. * cgen-ops.h, cgen-types.h: New files. * Makefile.am (HFILES): List them. * Makefile.in: Regenerated.
2005-07-15 00:52:28 +02:00
#endif
#ifdef ARCH_mep
case bfd_arch_mep:
info->skip_zeroes = 256;
info->skip_zeroes_at_end = 0;
break;
#endif
* common.h: Fix case of "Meta". * metag.h: New file. * dis-asm.h (print_insn_metag): New declaration. * metag.h: New file. * Makefile.am: Add Meta. * Makefile.in: Regenerate. * configure: Regenerate. * configure.in: Add Meta. * disassemble.c: Add Meta support. * metag-dis.c: New file. * Makefile.am: Add Meta. * Makefile.in: Regenerate. * archures.c (bfd_mach_metag): New. * bfd-in2.h: Regenerate. * config.bfd: Add Meta. * configure: Regenerate. * configure.in: Add Meta. * cpu-metag.c: New file. * elf-bfd.h: Add Meta. * elf32-metag.c: New file. * elf32-metag.h: New file. * libbfd.h: Regenerate. * reloc.c: Add Meta relocations. * targets.c: Add Meta. * Makefile.am: Add Meta. * Makefile.in: Regenerate. * config/tc-metag.c: New file. * config/tc-metag.h: New file. * configure.tgt: Add Meta. * doc/Makefile.am: Add Meta. * doc/Makefile.in: Regenerate. * doc/all.texi: Add Meta. * doc/as.texiinfo: Document Meta options. * doc/c-metag.texi: New file. * gas/metag/labelarithmetic.d: New file. * gas/metag/labelarithmetic.s: New file. * gas/metag/metacore12.d: New file. * gas/metag/metacore12.s: New file. * gas/metag/metacore21-invalid.l: New file. * gas/metag/metacore21-invalid.s: New file. * gas/metag/metacore21.d: New file. * gas/metag/metacore21.s: New file. * gas/metag/metacore21ext.d: New file. * gas/metag/metacore21ext.s: New file. * gas/metag/metadsp21-invalid.l: New file. * gas/metag/metadsp21-invalid.s: New file. * gas/metag/metadsp21.d: New file. * gas/metag/metadsp21.s: New file. * gas/metag/metadsp21ext.d: New file. * gas/metag/metadsp21ext.s: New file. * gas/metag/metafpu21.d: New file. * gas/metag/metafpu21.s: New file. * gas/metag/metafpu21ext.d: New file. * gas/metag/metafpu21ext.s: New file. * gas/metag/metag.exp: New file. * gas/metag/tls.d: New file. * gas/metag/tls.s: New file. * Makefile.am: Add Meta. * Makefile.in: Regenerate. * configure.tgt: Add Meta. * emulparams/elf32metag.sh: New file. * emultempl/metagelf.em: New file. * ld-elf/merge.d: Mark Meta as xfail. * ld-gc/start.d: Skip this test on Meta. * ld-gc/personality.d: Skip this test on Meta. * ld-metag/external.s: New file. * ld-metag/metag.exp: New file. * ld-metag/pcrel.d: New file. * ld-metag/pcrel.s: New file. * ld-metag/shared.d: New file. * ld-metag/shared.r: New file. * ld-metag/shared.s: New file. * ld-metag/stub.d: New file. * ld-metag/stub.s: New file. * ld-metag/stub_pic_app.d: New file. * ld-metag/stub_pic_app.r: New file. * ld-metag/stub_pic_app.s: New file. * ld-metag/stub_pic_shared.d: New file. * ld-metag/stub_pic_shared.s: New file. * ld-metag/stub_shared.d: New file. * ld-metag/stub_shared.r: New file. * ld-metag/stub_shared.s: New file. * binutils/readelf.c: (guess_is_rela): Add EM_METAG. (dump_relocations): Add EM_METAG. (get_machine_name): Correct case for Meta. (is_32bit_abs_reloc): Add support for Meta ADDR32 reloc. (is_none_reloc): Add support for Meta NONE reloc.
2013-01-10 10:49:22 +01:00
#ifdef ARCH_metag
case bfd_arch_metag:
info->disassembler_needs_relocs = TRUE;
break;
#endif
ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * configure.in: Add cases for Renesas m32c. * configure: Regenerated. bfd/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for m32c-*-elf (Renesas m32c and m16c). * Makefile.am (ALL_MACHINES): Add cpu-m32c.lo. (ALL_MACHINES_CFILES): Add cpu-m32c.c. (BFD32_BACKENDS): Add elf32-m32c.lo. (BFD32_BACKENDS_CFILES): Add elf32-m32c.c. (cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'. * Makefile.in: Regenerated. * archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New arch and mach codes. (bfd_m32c_arch): New arch info object. (bfd_archures_list): List bfd_m32c_arch. * bfd-in2.h: Regenerated. * config.bfd: Add case for the m32c. * configure.in: Add case for the m32c. * configure: Regenerated. * cpu-m32c.c, elf32-m32c.c: New files. * libbfd.h: Regenerated. * targets.c (bfd_elf32_m32c_vec): Declare. (_bfd_target_vector): List bfd_elf32_m32c_vec. binutils/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * readelf.c: #include "elf/m32c.h" (guess_is_rela, dump_relocations, get_machine_name): Add cases for EM_M32C. * Makefile.am (readelf.o): Update dependencies. * Makefile.in: Regenerated. cpu/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * m32c.cpu, m32c.opc: Machine description for the Renesas M32C. gas/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C. * Makefile.am (CPU_TYPES): List m32c. (TARGET_CPU_CFILES): List config/tc-m32c.c. (TARGET_CPU_HFILES): List config/tc-m32c.h. * configure.in: Add case for m32c. * configure.tgt: Add cases for m32c and m32c-*-elf. * configure: Regenerated. * config/tc-m32c.c, config/tc-m32c.h: New files. * doc/Makefile.am (CPU_DOCS): Add c-m32c.texi. * doc/Makefile.in: Regenerated. * doc/all.texi: Set M32C. * doc/as.texinfo: Add text for the M32C-specific options and line comment characters, and refer to c-m32c.texi. * doc/c-m32c.texi: New file. include/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * dis-asm.h (print_insn_m32c): New declaration. include/elf/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for Renesas M32C and M16C. * common.h (EM_M32C): New machine number. * m32c.h: New file. ld/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o. (eelf32m32c.c): New target. * Makefile.in: Regenerated. * configure.tgt: Add case for m32c-*-elf. * emulparams/elf32m32c.sh: New file. opcodes/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New. * m32c-desc.h, m32c-opc.h: New. * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h. (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c. (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo. (CLEANFILES): List stamp-m32c. (M32C_DEPS): List stamp-m32c, if CGEN_MAINT. (CGEN_CPUS): Add m32c. (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c) (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS. (m32c_opc_h): New variable. (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo) (m32c-opc.lo): New rules. * Makefile.in: Regenerated. * configure.in: Add case for bfd_m32c_arch. * configure: Regenerated. * disassemble.c (ARCH_m32c): New. [ARCH_m32c]: #include "m32c-desc.h". (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c. (disassemble_init_for_target) [ARCH_m32c]: Same. * cgen-ops.h, cgen-types.h: New files. * Makefile.am (HFILES): List them. * Makefile.in: Regenerated.
2005-07-15 00:52:28 +02:00
#ifdef ARCH_m32c
case bfd_arch_m32c:
/* This processor in fact is little endian. The value set here
reflects the way opcodes are written in the cgen description. */
ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * configure.in: Add cases for Renesas m32c. * configure: Regenerated. bfd/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for m32c-*-elf (Renesas m32c and m16c). * Makefile.am (ALL_MACHINES): Add cpu-m32c.lo. (ALL_MACHINES_CFILES): Add cpu-m32c.c. (BFD32_BACKENDS): Add elf32-m32c.lo. (BFD32_BACKENDS_CFILES): Add elf32-m32c.c. (cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'. * Makefile.in: Regenerated. * archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New arch and mach codes. (bfd_m32c_arch): New arch info object. (bfd_archures_list): List bfd_m32c_arch. * bfd-in2.h: Regenerated. * config.bfd: Add case for the m32c. * configure.in: Add case for the m32c. * configure: Regenerated. * cpu-m32c.c, elf32-m32c.c: New files. * libbfd.h: Regenerated. * targets.c (bfd_elf32_m32c_vec): Declare. (_bfd_target_vector): List bfd_elf32_m32c_vec. binutils/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * readelf.c: #include "elf/m32c.h" (guess_is_rela, dump_relocations, get_machine_name): Add cases for EM_M32C. * Makefile.am (readelf.o): Update dependencies. * Makefile.in: Regenerated. cpu/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * m32c.cpu, m32c.opc: Machine description for the Renesas M32C. gas/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C. * Makefile.am (CPU_TYPES): List m32c. (TARGET_CPU_CFILES): List config/tc-m32c.c. (TARGET_CPU_HFILES): List config/tc-m32c.h. * configure.in: Add case for m32c. * configure.tgt: Add cases for m32c and m32c-*-elf. * configure: Regenerated. * config/tc-m32c.c, config/tc-m32c.h: New files. * doc/Makefile.am (CPU_DOCS): Add c-m32c.texi. * doc/Makefile.in: Regenerated. * doc/all.texi: Set M32C. * doc/as.texinfo: Add text for the M32C-specific options and line comment characters, and refer to c-m32c.texi. * doc/c-m32c.texi: New file. include/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * dis-asm.h (print_insn_m32c): New declaration. include/elf/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for Renesas M32C and M16C. * common.h (EM_M32C): New machine number. * m32c.h: New file. ld/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o. (eelf32m32c.c): New target. * Makefile.in: Regenerated. * configure.tgt: Add case for m32c-*-elf. * emulparams/elf32m32c.sh: New file. opcodes/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New. * m32c-desc.h, m32c-opc.h: New. * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h. (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c. (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo. (CLEANFILES): List stamp-m32c. (M32C_DEPS): List stamp-m32c, if CGEN_MAINT. (CGEN_CPUS): Add m32c. (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c) (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS. (m32c_opc_h): New variable. (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo) (m32c-opc.lo): New rules. * Makefile.in: Regenerated. * configure.in: Add case for bfd_m32c_arch. * configure: Regenerated. * disassemble.c (ARCH_m32c): New. [ARCH_m32c]: #include "m32c-desc.h". (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c. (disassemble_init_for_target) [ARCH_m32c]: Same. * cgen-ops.h, cgen-types.h: New files. * Makefile.am (HFILES): List them. * Makefile.in: Regenerated.
2005-07-15 00:52:28 +02:00
info->endian = BFD_ENDIAN_BIG;
if (! info->insn_sets)
{
info->insn_sets = cgen_bitset_create (ISA_MAX);
if (info->mach == bfd_mach_m16c)
cgen_bitset_set (info->insn_sets, ISA_M16C);
else
cgen_bitset_set (info->insn_sets, ISA_M32C);
}
ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * configure.in: Add cases for Renesas m32c. * configure: Regenerated. bfd/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for m32c-*-elf (Renesas m32c and m16c). * Makefile.am (ALL_MACHINES): Add cpu-m32c.lo. (ALL_MACHINES_CFILES): Add cpu-m32c.c. (BFD32_BACKENDS): Add elf32-m32c.lo. (BFD32_BACKENDS_CFILES): Add elf32-m32c.c. (cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'. * Makefile.in: Regenerated. * archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New arch and mach codes. (bfd_m32c_arch): New arch info object. (bfd_archures_list): List bfd_m32c_arch. * bfd-in2.h: Regenerated. * config.bfd: Add case for the m32c. * configure.in: Add case for the m32c. * configure: Regenerated. * cpu-m32c.c, elf32-m32c.c: New files. * libbfd.h: Regenerated. * targets.c (bfd_elf32_m32c_vec): Declare. (_bfd_target_vector): List bfd_elf32_m32c_vec. binutils/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * readelf.c: #include "elf/m32c.h" (guess_is_rela, dump_relocations, get_machine_name): Add cases for EM_M32C. * Makefile.am (readelf.o): Update dependencies. * Makefile.in: Regenerated. cpu/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * m32c.cpu, m32c.opc: Machine description for the Renesas M32C. gas/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C. * Makefile.am (CPU_TYPES): List m32c. (TARGET_CPU_CFILES): List config/tc-m32c.c. (TARGET_CPU_HFILES): List config/tc-m32c.h. * configure.in: Add case for m32c. * configure.tgt: Add cases for m32c and m32c-*-elf. * configure: Regenerated. * config/tc-m32c.c, config/tc-m32c.h: New files. * doc/Makefile.am (CPU_DOCS): Add c-m32c.texi. * doc/Makefile.in: Regenerated. * doc/all.texi: Set M32C. * doc/as.texinfo: Add text for the M32C-specific options and line comment characters, and refer to c-m32c.texi. * doc/c-m32c.texi: New file. include/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * dis-asm.h (print_insn_m32c): New declaration. include/elf/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for Renesas M32C and M16C. * common.h (EM_M32C): New machine number. * m32c.h: New file. ld/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o. (eelf32m32c.c): New target. * Makefile.in: Regenerated. * configure.tgt: Add case for m32c-*-elf. * emulparams/elf32m32c.sh: New file. opcodes/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New. * m32c-desc.h, m32c-opc.h: New. * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h. (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c. (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo. (CLEANFILES): List stamp-m32c. (M32C_DEPS): List stamp-m32c, if CGEN_MAINT. (CGEN_CPUS): Add m32c. (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c) (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS. (m32c_opc_h): New variable. (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo) (m32c-opc.lo): New rules. * Makefile.in: Regenerated. * configure.in: Add case for bfd_m32c_arch. * configure: Regenerated. * disassemble.c (ARCH_m32c): New. [ARCH_m32c]: #include "m32c-desc.h". (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c. (disassemble_init_for_target) [ARCH_m32c]: Same. * cgen-ops.h, cgen-types.h: New files. * Makefile.am (HFILES): List them. * Makefile.in: Regenerated.
2005-07-15 00:52:28 +02:00
break;
#endif
#ifdef ARCH_pru
case bfd_arch_pru:
info->disassembler_needs_relocs = TRUE;
break;
#endif
#ifdef ARCH_powerpc
case bfd_arch_powerpc:
#endif
#ifdef ARCH_rs6000
case bfd_arch_rs6000:
#endif
#if defined (ARCH_powerpc) || defined (ARCH_rs6000)
disassemble_init_powerpc (info);
break;
GDB: Add support for the new set/show disassembler-options commands. This commit adds support to GDB so that it can modify the disassembler-options value that is passed to the disassembler, similar to objdump's -M option. Currently, the only supported targets are ARM, PowerPC and S/390, but adding support for a new target(s) is not difficult. include/ * dis-asm.h (disasm_options_t): New typedef. (parse_arm_disassembler_option): Remove prototype. (set_arm_regname_option): Likewise. (get_arm_regnames): Likewise. (get_arm_regname_num_options): Likewise. (disassemble_init_s390): New prototype. (disassembler_options_powerpc): Likewise. (disassembler_options_arm): Likewise. (disassembler_options_s390): Likewise. (remove_whitespace_and_extra_commas): Likewise. (disassembler_options_cmp): Likewise. (next_disassembler_option): New inline function. (FOR_EACH_DISASSEMBLER_OPTION): New macro. opcodes/ * disassemble.c Include "safe-ctype.h". (disassemble_init_for_target): Handle s390 init. (remove_whitespace_and_extra_commas): New function. (disassembler_options_cmp): Likewise. * arm-dis.c: Include "libiberty.h". (NUM_ELEM): Delete. (regnames): Use long disassembler style names. Add force-thumb and no-force-thumb options. (NUM_ARM_REGNAMES): Rename from this... (NUM_ARM_OPTIONS): ...to this. Use ARRAY_SIZE. (get_arm_regname_num_options): Delete. (set_arm_regname_option): Likewise. (get_arm_regnames): Likewise. (parse_disassembler_options): Likewise. (parse_arm_disassembler_option): Rename from this... (parse_arm_disassembler_options): ...to this. Make static. Use new FOR_EACH_DISASSEMBLER_OPTION macro to scan over options. (print_insn): Use parse_arm_disassembler_options. (disassembler_options_arm): New function. (print_arm_disassembler_options): Handle updated regnames. * ppc-dis.c: Include "libiberty.h". (ppc_opts): Add "32" and "64" entries. (ppc_parse_cpu): Use ARRAY_SIZE and disassembler_options_cmp. (powerpc_init_dialect): Add break to switch statement. Use new FOR_EACH_DISASSEMBLER_OPTION macro. (disassembler_options_powerpc): New function. (print_ppc_disassembler_options): Use ARRAY_SIZE. Remove printing of "32" and "64". * s390-dis.c: Include "libiberty.h". (init_flag): Remove unneeded variable. (struct s390_options_t): New structure type. (options): New structure. (init_disasm): Rename from this... (disassemble_init_s390): ...to this. Add initializations for current_arch_mask and option_use_insn_len_bits_p. Remove init_flag. (print_insn_s390): Delete call to init_disasm. (disassembler_options_s390): New function. (print_s390_disassembler_options): Print using information from struct 'options'. * po/opcodes.pot: Regenerate. binutils/ * objdump.c (main): Use remove_whitespace_and_extra_commas. gdb/ * NEWS: Mention new set/show disassembler-options commands. * doc/gdb.texinfo: Document new set/show disassembler-options commands. * disasm.c: Include "arch-utils.h", "gdbcmd.h" and "safe-ctype.h". (prospective_options): New static variable. (gdb_disassembler::gdb_disassembler): Initialize m_di.disassembler_options. (gdb_buffered_insn_length_init_dis): Initilize di->disassembler_options. (get_disassembler_options): New function. (set_disassembler_options): Likewise. (set_disassembler_options_sfunc): Likewise. (show_disassembler_options_sfunc): Likewise. (disassembler_options_completer): Likewise. (_initialize_disasm): Likewise. * disasm.h (get_disassembler_options): New prototype. (set_disassembler_options): Likewise. * gdbarch.sh (gdbarch_disassembler_options): New variable. (gdbarch_verify_disassembler_options): Likewise. * gdbarch.c: Regenerate. * gdbarch.h: Likewise. * arm-tdep.c (num_disassembly_options): Delete. (set_disassembly_style): Likewise. (arm_disassembler_options): New static variable. (set_disassembly_style_sfunc): Convert short style name into long option name. Call set_disassembler_options. (show_disassembly_style_sfunc): New function. (arm_gdbarch_init): Call set_gdbarch_disassembler_options and set_gdbarch_verify_disassembler_options. (_initialize_arm_tdep): Delete regnames variable and update callers. (arm_disassembler_options): Initialize. (disasm_options): New variable. (num_disassembly_options): Rename from this... (num_disassembly_styles): ...to this. Compute by scanning through disasm_options. (valid_disassembly_styles): Initialize using disasm_options. Remove calls to parse_arm_disassembler_option, get_arm_regnames and set_arm_regname_option. Pass show_disassembly_style_sfunc to the "disassembler" setshow command. * rs6000-tdep.c (powerpc_disassembler_options): New static variable. (rs6000_gdbarch_init): Call set_gdbarch_disassembler_options and set_gdbarch_verify_disassembler_options. * s390-tdep.c (s390_disassembler_options): New static variable. (s390_gdbarch_init):all set_gdbarch_disassembler_options and set_gdbarch_verify_disassembler_options. gdb/testsuite/ * gdb.arch/powerpc-power.exp: Delete test. * gdb.arch/powerpc-power.s: Likewise. * gdb.disasm/disassembler-options.exp: New test. * gdb.arch/powerpc-altivec.exp: Likewise. * gdb.arch/powerpc-altivec.s: Likewise. * gdb.arch/powerpc-altivec2.exp: Likewise. * gdb.arch/powerpc-altivec2.s: Likewise. * gdb.arch/powerpc-altivec3.exp: Likewise. * gdb.arch/powerpc-altivec3.s: Likewise. * gdb.arch/powerpc-power7.exp: Likewise. * gdb.arch/powerpc-power7.s: Likewise. * gdb.arch/powerpc-power8.exp: Likewise. * gdb.arch/powerpc-power8.s: Likewise. * gdb.arch/powerpc-power9.exp: Likewise. * gdb.arch/powerpc-power9.s: Likewise. * gdb.arch/powerpc-vsx.exp: Likewise. * gdb.arch/powerpc-vsx.s: Likewise. * gdb.arch/powerpc-vsx2.exp: Likewise. * gdb.arch/powerpc-vsx2.s: Likewise. * gdb.arch/powerpc-vsx3.exp: Likewise. * gdb.arch/powerpc-vsx3.s: Likewise. * gdb.arch/arm-disassembler-options.exp: Likewise. * gdb.arch/powerpc-disassembler-options.exp: Likewise. * gdb.arch/s390-disassembler-options.exp: Likewise.
2017-02-28 19:32:07 +01:00
#endif
#ifdef ARCH_wasm32
case bfd_arch_wasm32:
disassemble_init_wasm32 (info);
break;
#endif
GDB: Add support for the new set/show disassembler-options commands. This commit adds support to GDB so that it can modify the disassembler-options value that is passed to the disassembler, similar to objdump's -M option. Currently, the only supported targets are ARM, PowerPC and S/390, but adding support for a new target(s) is not difficult. include/ * dis-asm.h (disasm_options_t): New typedef. (parse_arm_disassembler_option): Remove prototype. (set_arm_regname_option): Likewise. (get_arm_regnames): Likewise. (get_arm_regname_num_options): Likewise. (disassemble_init_s390): New prototype. (disassembler_options_powerpc): Likewise. (disassembler_options_arm): Likewise. (disassembler_options_s390): Likewise. (remove_whitespace_and_extra_commas): Likewise. (disassembler_options_cmp): Likewise. (next_disassembler_option): New inline function. (FOR_EACH_DISASSEMBLER_OPTION): New macro. opcodes/ * disassemble.c Include "safe-ctype.h". (disassemble_init_for_target): Handle s390 init. (remove_whitespace_and_extra_commas): New function. (disassembler_options_cmp): Likewise. * arm-dis.c: Include "libiberty.h". (NUM_ELEM): Delete. (regnames): Use long disassembler style names. Add force-thumb and no-force-thumb options. (NUM_ARM_REGNAMES): Rename from this... (NUM_ARM_OPTIONS): ...to this. Use ARRAY_SIZE. (get_arm_regname_num_options): Delete. (set_arm_regname_option): Likewise. (get_arm_regnames): Likewise. (parse_disassembler_options): Likewise. (parse_arm_disassembler_option): Rename from this... (parse_arm_disassembler_options): ...to this. Make static. Use new FOR_EACH_DISASSEMBLER_OPTION macro to scan over options. (print_insn): Use parse_arm_disassembler_options. (disassembler_options_arm): New function. (print_arm_disassembler_options): Handle updated regnames. * ppc-dis.c: Include "libiberty.h". (ppc_opts): Add "32" and "64" entries. (ppc_parse_cpu): Use ARRAY_SIZE and disassembler_options_cmp. (powerpc_init_dialect): Add break to switch statement. Use new FOR_EACH_DISASSEMBLER_OPTION macro. (disassembler_options_powerpc): New function. (print_ppc_disassembler_options): Use ARRAY_SIZE. Remove printing of "32" and "64". * s390-dis.c: Include "libiberty.h". (init_flag): Remove unneeded variable. (struct s390_options_t): New structure type. (options): New structure. (init_disasm): Rename from this... (disassemble_init_s390): ...to this. Add initializations for current_arch_mask and option_use_insn_len_bits_p. Remove init_flag. (print_insn_s390): Delete call to init_disasm. (disassembler_options_s390): New function. (print_s390_disassembler_options): Print using information from struct 'options'. * po/opcodes.pot: Regenerate. binutils/ * objdump.c (main): Use remove_whitespace_and_extra_commas. gdb/ * NEWS: Mention new set/show disassembler-options commands. * doc/gdb.texinfo: Document new set/show disassembler-options commands. * disasm.c: Include "arch-utils.h", "gdbcmd.h" and "safe-ctype.h". (prospective_options): New static variable. (gdb_disassembler::gdb_disassembler): Initialize m_di.disassembler_options. (gdb_buffered_insn_length_init_dis): Initilize di->disassembler_options. (get_disassembler_options): New function. (set_disassembler_options): Likewise. (set_disassembler_options_sfunc): Likewise. (show_disassembler_options_sfunc): Likewise. (disassembler_options_completer): Likewise. (_initialize_disasm): Likewise. * disasm.h (get_disassembler_options): New prototype. (set_disassembler_options): Likewise. * gdbarch.sh (gdbarch_disassembler_options): New variable. (gdbarch_verify_disassembler_options): Likewise. * gdbarch.c: Regenerate. * gdbarch.h: Likewise. * arm-tdep.c (num_disassembly_options): Delete. (set_disassembly_style): Likewise. (arm_disassembler_options): New static variable. (set_disassembly_style_sfunc): Convert short style name into long option name. Call set_disassembler_options. (show_disassembly_style_sfunc): New function. (arm_gdbarch_init): Call set_gdbarch_disassembler_options and set_gdbarch_verify_disassembler_options. (_initialize_arm_tdep): Delete regnames variable and update callers. (arm_disassembler_options): Initialize. (disasm_options): New variable. (num_disassembly_options): Rename from this... (num_disassembly_styles): ...to this. Compute by scanning through disasm_options. (valid_disassembly_styles): Initialize using disasm_options. Remove calls to parse_arm_disassembler_option, get_arm_regnames and set_arm_regname_option. Pass show_disassembly_style_sfunc to the "disassembler" setshow command. * rs6000-tdep.c (powerpc_disassembler_options): New static variable. (rs6000_gdbarch_init): Call set_gdbarch_disassembler_options and set_gdbarch_verify_disassembler_options. * s390-tdep.c (s390_disassembler_options): New static variable. (s390_gdbarch_init):all set_gdbarch_disassembler_options and set_gdbarch_verify_disassembler_options. gdb/testsuite/ * gdb.arch/powerpc-power.exp: Delete test. * gdb.arch/powerpc-power.s: Likewise. * gdb.disasm/disassembler-options.exp: New test. * gdb.arch/powerpc-altivec.exp: Likewise. * gdb.arch/powerpc-altivec.s: Likewise. * gdb.arch/powerpc-altivec2.exp: Likewise. * gdb.arch/powerpc-altivec2.s: Likewise. * gdb.arch/powerpc-altivec3.exp: Likewise. * gdb.arch/powerpc-altivec3.s: Likewise. * gdb.arch/powerpc-power7.exp: Likewise. * gdb.arch/powerpc-power7.s: Likewise. * gdb.arch/powerpc-power8.exp: Likewise. * gdb.arch/powerpc-power8.s: Likewise. * gdb.arch/powerpc-power9.exp: Likewise. * gdb.arch/powerpc-power9.s: Likewise. * gdb.arch/powerpc-vsx.exp: Likewise. * gdb.arch/powerpc-vsx.s: Likewise. * gdb.arch/powerpc-vsx2.exp: Likewise. * gdb.arch/powerpc-vsx2.s: Likewise. * gdb.arch/powerpc-vsx3.exp: Likewise. * gdb.arch/powerpc-vsx3.s: Likewise. * gdb.arch/arm-disassembler-options.exp: Likewise. * gdb.arch/powerpc-disassembler-options.exp: Likewise. * gdb.arch/s390-disassembler-options.exp: Likewise.
2017-02-28 19:32:07 +01:00
#ifdef ARCH_s390
case bfd_arch_s390:
disassemble_init_s390 (info);
break;
#endif
default:
break;
}
}
GDB: Add support for the new set/show disassembler-options commands. This commit adds support to GDB so that it can modify the disassembler-options value that is passed to the disassembler, similar to objdump's -M option. Currently, the only supported targets are ARM, PowerPC and S/390, but adding support for a new target(s) is not difficult. include/ * dis-asm.h (disasm_options_t): New typedef. (parse_arm_disassembler_option): Remove prototype. (set_arm_regname_option): Likewise. (get_arm_regnames): Likewise. (get_arm_regname_num_options): Likewise. (disassemble_init_s390): New prototype. (disassembler_options_powerpc): Likewise. (disassembler_options_arm): Likewise. (disassembler_options_s390): Likewise. (remove_whitespace_and_extra_commas): Likewise. (disassembler_options_cmp): Likewise. (next_disassembler_option): New inline function. (FOR_EACH_DISASSEMBLER_OPTION): New macro. opcodes/ * disassemble.c Include "safe-ctype.h". (disassemble_init_for_target): Handle s390 init. (remove_whitespace_and_extra_commas): New function. (disassembler_options_cmp): Likewise. * arm-dis.c: Include "libiberty.h". (NUM_ELEM): Delete. (regnames): Use long disassembler style names. Add force-thumb and no-force-thumb options. (NUM_ARM_REGNAMES): Rename from this... (NUM_ARM_OPTIONS): ...to this. Use ARRAY_SIZE. (get_arm_regname_num_options): Delete. (set_arm_regname_option): Likewise. (get_arm_regnames): Likewise. (parse_disassembler_options): Likewise. (parse_arm_disassembler_option): Rename from this... (parse_arm_disassembler_options): ...to this. Make static. Use new FOR_EACH_DISASSEMBLER_OPTION macro to scan over options. (print_insn): Use parse_arm_disassembler_options. (disassembler_options_arm): New function. (print_arm_disassembler_options): Handle updated regnames. * ppc-dis.c: Include "libiberty.h". (ppc_opts): Add "32" and "64" entries. (ppc_parse_cpu): Use ARRAY_SIZE and disassembler_options_cmp. (powerpc_init_dialect): Add break to switch statement. Use new FOR_EACH_DISASSEMBLER_OPTION macro. (disassembler_options_powerpc): New function. (print_ppc_disassembler_options): Use ARRAY_SIZE. Remove printing of "32" and "64". * s390-dis.c: Include "libiberty.h". (init_flag): Remove unneeded variable. (struct s390_options_t): New structure type. (options): New structure. (init_disasm): Rename from this... (disassemble_init_s390): ...to this. Add initializations for current_arch_mask and option_use_insn_len_bits_p. Remove init_flag. (print_insn_s390): Delete call to init_disasm. (disassembler_options_s390): New function. (print_s390_disassembler_options): Print using information from struct 'options'. * po/opcodes.pot: Regenerate. binutils/ * objdump.c (main): Use remove_whitespace_and_extra_commas. gdb/ * NEWS: Mention new set/show disassembler-options commands. * doc/gdb.texinfo: Document new set/show disassembler-options commands. * disasm.c: Include "arch-utils.h", "gdbcmd.h" and "safe-ctype.h". (prospective_options): New static variable. (gdb_disassembler::gdb_disassembler): Initialize m_di.disassembler_options. (gdb_buffered_insn_length_init_dis): Initilize di->disassembler_options. (get_disassembler_options): New function. (set_disassembler_options): Likewise. (set_disassembler_options_sfunc): Likewise. (show_disassembler_options_sfunc): Likewise. (disassembler_options_completer): Likewise. (_initialize_disasm): Likewise. * disasm.h (get_disassembler_options): New prototype. (set_disassembler_options): Likewise. * gdbarch.sh (gdbarch_disassembler_options): New variable. (gdbarch_verify_disassembler_options): Likewise. * gdbarch.c: Regenerate. * gdbarch.h: Likewise. * arm-tdep.c (num_disassembly_options): Delete. (set_disassembly_style): Likewise. (arm_disassembler_options): New static variable. (set_disassembly_style_sfunc): Convert short style name into long option name. Call set_disassembler_options. (show_disassembly_style_sfunc): New function. (arm_gdbarch_init): Call set_gdbarch_disassembler_options and set_gdbarch_verify_disassembler_options. (_initialize_arm_tdep): Delete regnames variable and update callers. (arm_disassembler_options): Initialize. (disasm_options): New variable. (num_disassembly_options): Rename from this... (num_disassembly_styles): ...to this. Compute by scanning through disasm_options. (valid_disassembly_styles): Initialize using disasm_options. Remove calls to parse_arm_disassembler_option, get_arm_regnames and set_arm_regname_option. Pass show_disassembly_style_sfunc to the "disassembler" setshow command. * rs6000-tdep.c (powerpc_disassembler_options): New static variable. (rs6000_gdbarch_init): Call set_gdbarch_disassembler_options and set_gdbarch_verify_disassembler_options. * s390-tdep.c (s390_disassembler_options): New static variable. (s390_gdbarch_init):all set_gdbarch_disassembler_options and set_gdbarch_verify_disassembler_options. gdb/testsuite/ * gdb.arch/powerpc-power.exp: Delete test. * gdb.arch/powerpc-power.s: Likewise. * gdb.disasm/disassembler-options.exp: New test. * gdb.arch/powerpc-altivec.exp: Likewise. * gdb.arch/powerpc-altivec.s: Likewise. * gdb.arch/powerpc-altivec2.exp: Likewise. * gdb.arch/powerpc-altivec2.s: Likewise. * gdb.arch/powerpc-altivec3.exp: Likewise. * gdb.arch/powerpc-altivec3.s: Likewise. * gdb.arch/powerpc-power7.exp: Likewise. * gdb.arch/powerpc-power7.s: Likewise. * gdb.arch/powerpc-power8.exp: Likewise. * gdb.arch/powerpc-power8.s: Likewise. * gdb.arch/powerpc-power9.exp: Likewise. * gdb.arch/powerpc-power9.s: Likewise. * gdb.arch/powerpc-vsx.exp: Likewise. * gdb.arch/powerpc-vsx.s: Likewise. * gdb.arch/powerpc-vsx2.exp: Likewise. * gdb.arch/powerpc-vsx2.s: Likewise. * gdb.arch/powerpc-vsx3.exp: Likewise. * gdb.arch/powerpc-vsx3.s: Likewise. * gdb.arch/arm-disassembler-options.exp: Likewise. * gdb.arch/powerpc-disassembler-options.exp: Likewise. * gdb.arch/s390-disassembler-options.exp: Likewise.
2017-02-28 19:32:07 +01:00
/* Remove whitespace and consecutive commas from OPTIONS. */
char *
remove_whitespace_and_extra_commas (char *options)
{
char *str;
size_t i, len;
if (options == NULL)
return NULL;
/* Strip off all trailing whitespace and commas. */
for (len = strlen (options); len > 0; len--)
{
if (!ISSPACE (options[len - 1]) && options[len - 1] != ',')
break;
options[len - 1] = '\0';
}
/* Convert all remaining whitespace to commas. */
for (i = 0; options[i] != '\0'; i++)
if (ISSPACE (options[i]))
options[i] = ',';
/* Remove consecutive commas. */
for (str = options; *str != '\0'; str++)
if (*str == ',' && (*(str + 1) == ',' || str == options))
{
char *next = str + 1;
while (*next == ',')
next++;
len = strlen (next);
if (str != options)
str++;
memmove (str, next, len);
next[len - (size_t)(next - str)] = '\0';
}
return (strlen (options) != 0) ? options : NULL;
}
/* Like STRCMP, but treat ',' the same as '\0' so that we match
strings like "foobar" against "foobar,xxyyzz,...". */
int
disassembler_options_cmp (const char *s1, const char *s2)
{
unsigned char c1, c2;
do
{
c1 = (unsigned char) *s1++;
if (c1 == ',')
c1 = '\0';
c2 = (unsigned char) *s2++;
if (c2 == ',')
c2 = '\0';
if (c1 == '\0')
return c1 - c2;
}
while (c1 == c2);
return c1 - c2;
}