7a795ef4a7
* config/tc-mips.c (mips_cpu_info_table): Add "m14ke" and
...
"m14kec".
* doc/c-mips.texi (MIPS architecture options): Add "m14ke" and
"m14kec" to the list of -march options.
2011-11-16 12:21:35 +00:00
080f9e4f20
* write.c (dump_section_relocs): Don't convert PC-relative relocs
...
that have an in-place addend narrower than the addresses used.
2011-11-15 13:08:17 +00:00
9301f9c3e3
gas/
...
* config/tc-mips.c (can_swap_branch_p): Exclude microMIPS
variant frags too.
gas/testsuite/
* gas/mips/relax-swap3.d: New test.
* gas/mips/mips16@relax-swap3.d: Likewise.
* gas/mips/micromips@relax-swap3.d: Likewise.
* gas/mips/relax-swap3.s: New test source.
* gas/mips/mips.exp: Run the new tests.
2011-11-14 13:43:23 +00:00
c90460e450
* gas/config/tc-arm.c (arm_cpus): Add cortex-a7 entry.
...
* gas/doc/c-arm.texi (ARM Options): Add cortex-a7 to list of accepted
CPUs.
2011-11-07 16:20:48 +00:00
b14cf9dd6a
* doc/c-rl78.texi (RL78-Float): Remove unused menu entry.
2011-11-04 16:04:13 +00:00
6652d298c0
[bfd]
...
* elf32-rl78.c (rl78_elf_merge_private_bfd_data): Delete unused
variable.
[gas]
* config/tc-rl78.c (tc_gen_reloc): Remove unused variable.
2011-11-02 20:40:22 +00:00
3da1d841a1
* config/tc-arm.c (md_begin): Remove ARM_PLT32 reloc associated
...
with the (PLT) instruction suffix when operating in eabi mode.
* doc/c-arm.texi (ARM_Relocations): Extend description of (PLT)
suffix.
* gas/arm/pic.d: Update expected output.
2011-11-02 11:13:59 +00:00
99c513f6ac
[.]
...
* configure.ac (rl78-*-*) New case.
* configure: Regenerate.
[bfd]
* Makefile.am (ALL_MACHINES): Add cpu-rl78.lo.
(ALL_MACHINES_CFILES): Add cpu-rl78.c.
(BFD32_BACKENDS): Add elf32-rl78.lo.
(BFD32_BACKENDS_CFILES): Add elf32-rl78.c.
(Makefile.in): Regenerate.
* archures.c (bfd_architecture): Define bfd_arch_rl78.
(bfd_archures_list): Add bfd_rl78_arch.
* config.bfd: Add rl78-*-elf.
* configure.in: Add bfd_elf32_rl78_vec.
* reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations.
* targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec.
* Makefile.in: Regenerate.
* bfd-in2.h: Regenerate.
* configure: Regenerate.
* libbfd.h: Regenerate.
* cpu-rl78.c: New file.
* elf32-rl78.c: New file.
[binutils]
* readelf.c: Include elf/rl78.h
(guess_is_rela): Handle EM_RL78.
(dump_relocations): Likewise.
(get_machine_name): Likewise.
(is_32bit_abs_reloc): Likewise.
* NEWS: Mention addition of RL78 support.
* MAINTAINERS: Add myself as RL78 port maintainer.
[gas]
* Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c.
(TARGET_CPU_HFILES): Add rc-rl78.h.
(EXTRA_DIST): Add rl78-parse.c and rl78-parse.y.
(rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules.
* Makefile.in: Regenerate.
* configure.in: Add rl78 case.
* configure: Regenerate.
* configure.tgt: Add rl78 case.
* config/rl78-defs.h: New file.
* config/rl78-parse.y: New file.
* config/tc-rl78.c: New file.
* config/tc-rl78.h: New file.
* NEWS: Add Renesas RL78.
* doc/Makefile.am (c-rl78.texi): New.
* doc/Makefile.in: Likewise.
* doc/all.texi: Enable it.
* doc/as.texi: Add it.
[include]
* dis-asm.h (print_insn_rl78): Declare.
[include/elf]
* common.h (EM_RL78, EM_78K0R): New.
* rl78.h: New.
[include/opcode]
* rl78.h: New file.
[ld]
* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c.
(+eelf32rl78.c): New rule.
* Makefile.in: Regenerate.
* configure.tgt: Add rl78-*-* case.
* emulparams/elf32rl78.sh: New file.
* NEWS: Mention addition of Renesas RL78 support.
[opcodes]
* Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and
rl78-dis.c.
(MAINTAINERCLEANFILES): Add rl78-decode.c.
(rl78-decode.c): New rule, built from rl78-decode.opc and opc2c.
* Makefile.in: Regenerate.
* configure.in: Add bfd_rl78_arch case.
* configure: Regenerate.
* disassemble.c: Define ARCH_rl78.
(disassembler): Add ARCH_rl78 case.
* rl78-decode.c: New file.
* rl78-decode.opc: New file.
* rl78-dis.c: New file.
2011-11-02 03:09:11 +00:00
e8b9f50888
Fixes the TILE-Gx/TILEPro port of gas to deal with relocations of
...
aliases.
2011-10-28 14:43:54 +00:00
69f56ae1d3
Mention Tilera support in binutils/NEWS, and fix the TILEPro
...
capitalization in gas/NEWs and ld/NEWS.
2011-10-28 14:37:30 +00:00
006ad0a1b5
* po/ja.po: New Japanese translation.
...
* configure.in (ALL_LINGUAS): Add ja.
* configure: Regenerate.
2011-10-28 13:02:15 +00:00
926e2094bb
bfd:
...
* cpu-epiphany.c: Reinstate full list of Copyright years.
* elf32-epiphany.c: Likewise.
cpu:
* epiphany.cpu, epiphany.opc: Likewise.
gas:
* config/tc-epiphany.c, config/tc-epiphany.h: Likewise.
* doc/c-epiphany.texi: Likewise.
include:
* elf/epiphany.h: Likewise.
2011-10-27 14:27:16 +00:00
56b1318518
gas:
...
* doc/as.texinfo [EPIPHANY]: Include c-epiphany.texi to avoid
duplication.
opcodes:
* disassemble.c (ARCH_epiphany): Move into alphasorted spot.
2011-10-26 12:14:17 +00:00
214ce7b58a
Building rx's gas code atm fails:
...
rx-parse.c: In function ‘rx_parse’:
rx-parse.c:3774:9: error: passing argument 1 of ‘rx_error’ discards ‘const’
qualifier from pointer target type [-Werror]
../../../gas/config/rx-defs.h:40:12: note:
expected ‘char *’ but argument is of type ‘const char *’
cc1: all warnings being treated as errors
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-10-25 20:36:22 +00:00
dfc4b250e3
* config/tc-ns32k.c (md_begin): Rename local variable 'stat' to 'status'.
2011-10-25 13:35:00 +00:00
cfb8c0921c
bfd:
...
* Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo .
(ALL_MACHINES_CFILES): Add cpu-epiphany.c .
(BFD32_BACKENDS): Add elf32-epiphany.lo .
(BFD32_BACKENDS_CFILES): Add elf32-epiphany.c .
* Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate.
* archures.c (bfd_arch_epiphany): Add.
(bfd_mach_epiphany16, bfd_mach_epiphany32): Define.
(bfd_epiphany_arch): Declare.
(bfd_archures_list): Add &bfd_epiphany_arch.
* config.bfd (epiphany-*-elf): New target case.
* configure.in (bfd_elf32_epiphany_vec): New target vector case.
* reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation.
(BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise.
(BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise.
(BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise.
* targets.c (bfd_elf32_epiphany_vec): Declare.
(_bfd_target_vector): Add bfd_elf32_epiphany_vec.
* po/SRC-POTFILES.in, po/bfd.pot: Regenerate.
* cpu-epiphany.c, elf32-epiphany.c: New files.
binutils:
* readelf.c (include "elf/epiphany.h")
(guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY.
(get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise.
(is_16bit_abs_reloc, is_none_reloc): Likewise.
* po/binutils.pot: Regenerate.
cpu:
* cpu/epiphany.cpu, cpu/epiphany.opc: New files.
gas:
* NEWS: Mention addition of Adapteva Epiphany support.
* config/tc-epiphany.c, config/tc-epiphany.h: New files.
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c .
(TARGET_CPU_HFILES): Add config/tc-epiphany.h .
* Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate.
* configure.in: Also set using_cgen for epiphany.
* configure.tgt: Handle epiphany.
* doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi .
* doc/all.texi: Set EPIPHANY.
* doc/as.texinfo: Add EPIPHANY-specific text.
* doc/c-epiphany.texi: New file.
* po/gas.pot: Regenerate.
gas/testsuite:
* gas/epiphany: New directory.
include:
* dis-asm.h (print_insn_epiphany): Declare.
* elf/epiphany.h: New file.
* elf/common.h (EM_ADAPTEVA_EPIPHANY): Define.
ld:
* NEWS: Mention addition of Adapteva Epiphany support.
* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c .
(eelf32epiphany.c): New rule.
* Makefile.in: Regenerate.
* configure.tgt: Handle epiphany-*-elf.
* po/ld.pot: Regenerate.
* testsuite/ld-srec/srec.exp: xfail epiphany.
* emulparams/elf32epiphany.sh: New file.
opcodes:
* Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h .
(TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c,
epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c .
(CLEANFILES): Add stamp-epiphany.
(EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it.
(stamp-epiphany): New rule.
* Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate.
* configure.in: Handle bfd_epiphany_arch.
* disassemble.c (ARCH_epiphany): Define.
(disassembler): Handle bfd_arch_epiphany.
* epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files.
* epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise.
* epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
c373271616
opcodes/
...
* m68k-opc.c (m68k_opcodes): Fix entries for ColdFire moveml.
gas/testsuite/
* gas/m68k/all.exp (movem-offset): Add test.
* gas/m68k/movem-offset.s: New test.
* gas/m68k/movem-offset.d: New.
2011-10-24 16:36:51 +00:00
7951ca422a
* config/tc-mips.c (move_register): Fix formatting.
2011-10-24 14:25:01 +00:00
72671e6201
* config/tc-mips.c (can_swap_branch_p): Remove empty line.
...
(start_noreorder): Likewise.
2011-10-24 14:17:10 +00:00
8b828383a8
* config/tc-mips.c (s_option): Fix formatting.
...
(mips_elf_final_processing): Likewise.
2011-10-24 14:08:23 +00:00
444d75be22
* config/tc-mips.c (validate_micromips_insn): Fix formatting.
2011-10-24 14:04:42 +00:00
652618321c
* config/tc-mn10200.c (md_convert_frag): Add missing break.
2011-10-24 02:49:24 +00:00
f8e24652cb
2011-10-21 Tristan Gingold <gingold@adacore.com>
...
* config/tc-alpha.c (load_expression): Use symbol_mark_used accessor.
(s_alpha_comm): Use symbol_set_frag accessor.
2011-10-21 13:24:26 +00:00
9cae27dcb1
2011-10-21 Jan Glauber <jang@linux.vnet.ibm.com>
...
* s390-opc.txt: Add CPUMF instructions.
2011-10-21 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* gas/s390/zarch-z10.d: Add CPUMF instructions.
* gas/s390/zarch-z10.s: Likewise.
2011-10-21 12:50:30 +00:00
db9b2be466
* config/tc-mips.c (micromips_add_label): Avoid gcc warning.
...
(md_convert_frag): Likewise.
2011-10-19 23:09:11 +00:00
a415b1cd63
Jie Zhang <jie@codesourcery.com>
...
Julian Brown <julian@codesourcery.com>
gas/
* config/tc-arm.c (parse_shifter_operand): Fix handling
of explicit rotation.
(encode_arm_shifter_operand): Likewise.
gas/testsuite/
* gas/arm/adrl.d: Adjust.
* gas/arm/immed2.d: New test.
* gas/arm/immed2.s: New test.
ld/testsuite/
* ld-arm/cortex-a8-fix-b-plt.d: Adjust.
* ld-arm/cortex-a8-fix-bcc-plt.d: Adjust.
* ld-arm/cortex-a8-fix-bl-plt.d: Adjust.
* ld-arm/cortex-a8-fix-bl-rel-plt.d: Adjust.
* ld-arm/cortex-a8-fix-blx-plt.d: Adjust.
* ld-arm/ifunc-1.dd: Adjust.
* ld-arm/ifunc-2.dd: Adjust.
* ld-arm/ifunc-3.dd: Adjust.
* ld-arm/ifunc-4.dd: Adjust.
* ld-arm/ifunc-5.dd: Adjust.
* ld-arm/ifunc-6.dd: Adjust.
* ld-arm/ifunc-7.dd: Adjust.
* ld-arm/ifunc-8.dd: Adjust.
* ld-arm/ifunc-9.dd: Adjust.
* ld-arm/ifunc-10.dd: Adjust.
* ld-arm/ifunc-14.dd: Adjust.
* ld-arm/ifunc-15.dd: Adjust.
* ld-arm/ifunc-16.dd: Adjust.
opcodes/
* arm-dis.c (print_insn_arm): Explicitly specify rotation
if needed.
2011-10-18 14:41:55 +00:00
1be5fd2e2f
* config/tc-arm.c (check_ldr_r15_aligned): New.
...
(do_ldst): Warn in upredictable cases.
(do_t_ldst): Likewise.
(insns): Update accordingly.
* gas/arm/ldr-bad.s: New testcase.
* gas/arm/ldr-bad.l: Likewise.
* gas/arm/ldr-bad.d: Likewise.
* gas/arm/ldr.s: Likewise.
* gas/arm/ldr.d: Likewise.
* gas/arm/ldr-t-bad.s: Likewise.
* gas/arm/ldr-t-bad.l: Likewise.
* gas/arm/ldr-t-bad.d: Likewise.
* gas/arm/ldr-t.s: Likewise.
* gas/arm/ldr-t.d: Likewise.
* gas/arm/sp-pc-usage-t.s: Correct.
* gas/arm/sp-pc-usage-t.d: Update accordingly.
2011-10-13 08:15:17 +00:00
6885131b49
* as.c (main): Define .gasversion. rather than __GAS_VERSION__.
...
* frags.h (bss_address_frag): Delete
(predefined_address_frag): New.
* frags.c (frag_init): Init predefined_address_frag. Delete ref
to bss_addres_frag.
* symbols.c (S_CAN_BE_REDEFINED): New function.
* symbols.h (S_CAN_BE_REDEFINED): Declare.
* read.c (assign_symbol): Use S_CAN_BE_REDEFINED.
2011-10-12 21:07:07 +00:00
00ce9deb43
* symbols.c (local_symbol_make): Make global.
...
* symbols.h (local_symbol_make): Declare.
* as.c (main): Define __GAS_VERSION__.
2011-10-12 02:57:07 +00:00
d569865703
Updated Bulgarian, Spanish, Finnish, French, Russian and Ukranian translations.
2011-10-10 16:12:24 +00:00
989993d80a
gas/testsuite/
...
2011-09-28 Jan Beulich <jbeulich@suse.com>
* gas/ppc/476.s: Fix lswi first operand.
* gas/ppc/476.d: Adjust expected output.
* gas/ppc/a2.s: Fix lswi first operand.
* gas/ppc/a2.d: Adjust expected output.
* gas/ppc/power6.s: Fix lfdpx first operand.
* gas/ppc/power6.d: Adjust expected output.
opcodes/
2011-09-28 Jan Beulich <jbeulich@suse.com>
* ppc-opc.c (insert_nbi, insert_rbx, FRAp, FRBp, FRSp, FRTp, NBI, RAX,
RBX): New.
(insert_bo, insert_boe): Reject bcctr with bit 2 in bo unset.
(powerpc_opcodes): Use RAX for second and RBXC for third operand of
lswx. Use NBI for third operand of lswi. Use FRTp for first operand of
lfdp and lfdpx. Use FRSp for first operand of stfdp and stfdpx, and
mark them as invalid on POWER7. Use FRTp, FRAp, and FRBp repsectively
on DFP quad instructions.
2011-10-06 09:22:58 +00:00
d4cb0ea0ca
* readelf.c (get_machine_dlags): Add support for RX's PID mode.
...
* ld-scripts/phdrs.exp: Expect to fail for the RX.
* elf32-rx.c: Add support for PID mode.
(rx_elf_relocate_section): Add checks for unsafe PID relocations.
Include addend in R_RX_SYM relocations.
* config/rx-defs.h (rx_pid_register): New.
(rx_gp_register): New.
* config/rx-parse.y (rx_lex): Add support for %gpreg and %pidreg.
(displacement): Add PID support.
* config/tc-rx.c (rx_pid_mode): New.
(rx_num_int_regs): New.
(rx_pid_register): New.
(rx_gp_register): New.
(options): Add -mpid and -mint-register= options.
(md_longopts): Likewise.
(md_parse_option): Likewise.
(md_show_usage): Likewise.
(rx_pid_symbol): New.
(rx_pidreg_symbol): New.
(rx_gpreg_symbol): New.
(md_begin): Support PID.
(rx_validate_fix_sub): Support PID.
(tc_gen_reloc): Support PID.
* doc/c-rx.texi: Document PID support.
* rx.h (E_FLAG_RX_PID): New.
2011-10-05 14:13:31 +00:00
9af6978cc0
Another typo ... :(
2011-09-28 12:04:24 +00:00
8d7f3066f1
* gas/pe/section-exclude.d: Correct testcase.
2011-09-28 12:01:12 +00:00
c348982892
2011-09-27 Kai Tietz <ktietz@redhat.com>
...
* config/obj-coff.c (obj_coff_section): Add 'e' as specifier
for marking section SEC_EXCLUDE.
2011-09-27 Kai Tietz <ktietz@redhat.com>
* gas/pe/pe.exp: Add new testcase.
* gas/pe/section-exclude.d: New file.
* gas/pe/section-exclude.s: New file.
2011-09-27 18:57:22 +00:00
92a7795b59
opcodes/
...
* sparc-opc.c (sparc_opcodes): Fix random instruction to write
to a float instead of an integer register.
gas/testsuite/
* gas/sparc/hpcvis3.s: Update to use float reg for random insn.
* gas/sparc/hpcvis3.d: Likewise.
2011-09-27 04:30:32 +00:00
e91d10767a
Add sparc integer multiply-add instructions.
...
opcodes/
* sparc-opc.c (sparc_opcodes): Add integer multiply-add
instructions.
gas/testsuite/
* gas/sparc/ima.d: New test.
* gas/sparc/ima.s: New test source.
* gas/sparc/sparc.exp: Run new test.
2011-09-26 09:19:24 +00:00
a7142d9403
binutils/
...
2011-09-22 Tristan Gingold <gingold@adacore.com>
* NEWS: Add marker for 2.22.
gas/
2011-09-22 Tristan Gingold <gingold@adacore.com>
* NEWS: Add marker for 2.22.
ld/
2011-09-22 Tristan Gingold <gingold@adacore.com>
* NEWS: Add marker for 2.22.
2011-09-22 08:11:16 +00:00
4bafe00ecf
Add new sparc options to control instruction availability.
...
gas/
* config/tc-sparc.c (hwcap_allowed): New.
(struct sparc_arch): New field 'hwcap_allowed' containing a bitmask
of F_FOO flags which are enabled by the particular arch setting.
Add new options that provide explicit access to new instructions.
(md_parse_option): Only bump max_architecture if the requested one
is larger, or this is the first explicit request.
(get_hwcap_name): New function.
(sparc_ip): Validate that hwcaps used by an instruction have actually
been enabled.
* doc/c-sparc.texi: Document new sparc options.
2011-09-22 00:03:30 +00:00
527563502c
Fix sparc testcases when building with 64-bit default.
...
gas/testsuite/
* gas/sparc/imm-plus-rreg.d: Fix address regex for 64-bit.
* gas/sparc/save-args.d: Likewise.
* gas/sparc/ticc-imm-reg.d: Likewise, add -32 to options.
* gas/sparc/v8-movwr-imm.d: Likewise.
2011-09-21 22:29:55 +00:00
9e8c70f96b
Annotate sparc objects with cpu hardware capabilities used.
...
bfd/
* elfxx-sparc.c (_bfd_sparc_elf_merge_private_bfd_data): New.
* elfxx-sparc.h: Declare it.
* elf32-sparc.c (elf32_sparc_merge_private_bfd_data): Call it.
* elf64-sparc.c (elf64_sparc_merge_private_bfd_data): Likewise.
binutils/
* readelf.c (display_sparc_hwcaps): New.
(display_sparc_gnu_attribute): New.
(process_sparc_specific): New.
(process_arch_specific): When EM_SPARC, EM_SPARC32PLUS,
or EM_SPARCV9 invoke process_sparc_specific.
gas/
* config/tc-sparc.c (hwcap_seen): New bitmask, defined when
not TE_SOLARIS.
(sparc_ip): When not TE_SOLARIS, accumulate hwcap bits from
sparc_opcode->flags of instruction into hwcap_seen.
(sparc_md_end): Create Tag_GNU_Sparc_HWCAPS attribute if
hwcap_seen is non-zero and not TE_SOLARIS.
gas/testsuite/
* gas/sparc/hpcvis3.s: Update for fixed fchksum16 mnemonic.
* gas/sparc/hpcvis3.d: Likewise.
include/elf/
* sparc.h (Tag_GNU_Sparc_HWCAPS): New object attribute.
(ELF_SPARC_HWCAP_*): New HWCAPS bitmask values.
include/opcode/
* sparc.h (struct sparc_opcode): Expand 'flags' to unsigned int.
(F_MUL32, F_DIV32, F_FSMULD, F_V8PLUS, F_POPC, F_VIS, F_VIS2,
F_ASI_BLK_INIT, F_FMAF, F_VIS3, F_HPC, F_RANDOM, F_TRANS,
F_FJFMAU, F_IMA, F_ASI_CACHE_SPARING): New flag bits.
opcodes/
* sparc-opc.c (sparc_opcodes): Annotate table with HWCAP flag
bits. Fix "fchksm16" mnemonic.
2011-09-21 20:49:16 +00:00
a06413e3ef
2011-09-19 Tristan Gingold <gingold@adacore.com>
...
* config/tc-alpha.c (insert_operand): Call as_bad_value_out_of_range
instead of as_warn_out_of_range.
2011-09-19 08:24:23 +00:00
b2ea18299b
Add PR markers
2011-09-10 08:13:45 +00:00
8dbb9eb3c6
opcodes/
...
* sparc-opc.c (sparc_opcodes): Add entry for 'save simm13,regrs1,regrd'
This has been reported as being accepted by the Sun assmebler.
gas/testsuite/
* gas/sparc/save-args.[sd]: New test.
* gas/sparc/sparc.exp: Run new test.
2011-09-08 19:03:17 +00:00
9bf29d72d4
opcodes/
...
The changes below bring 'mov' and 'ticc' instructions into line
with the V8 SPARC Architecture Manual.
* sparc-opc.c (sparc_opcodes): Add entry for 'ticc imm + regrs1'.
* sparc-opc.c (sparc_opcodes): Add alias entries for
'mov regrs2,%asrX'; 'mov regrs2,%y'; 'mov regrs2,%prs';
'mov regrs2,%wim' and 'mov regrs2,%tbr'.
* sparc-opc.c (sparc_opcodes): Move/Change entries for
'mov imm,%asrX'; 'mov imm,%y'; 'mov imm,%prs'; 'mov imm,%wim'
and 'mov imm,%tbr'.
* sparc-opc.c (sparc_opcodes): Add wr alias entries to match above
mov aliases.
gas/testsuite/
* gas/sparc/ticc-imm-reg.[sd]: New test.
* gas/sparc/v8-movwr-imm.[sd]: New test.
* gas/sparc/sparc.exp: Run new tests.
2011-09-08 19:01:11 +00:00
f124dd4f3f
gas/
...
* config/tc-sparc.c (sparc_ip): Handle 'i' + r<0..31>
in addition to 'i' + [goli]<0..7>.
gas/testsuite/
* gas/sparc/imm-plus-rreg.[sd]: New test.
* gas/sparc/sparc.exp: Run new test.
2011-09-08 16:56:10 +00:00
cdf492019f
opcodes/
...
* sparc-opc.c (pdistn): Destination is integer not float register.
gas/testsuite/
* gas/sparc/hpcvis3.s: Correct pdistn test.
* gas/sparc/hpcvis3.d: Likewise.
2011-09-08 16:40:47 +00:00
32425e36f3
* cgen.c (gas_cgen_pcrel_r_type): New function.
...
(gas_cgen_tc_gen_reloc): Check for GAS_CGEN_PCREL_R_TYPE.
* cgen.h (gas_cgen_pcrel_r_type): Declare.
2011-09-08 16:07:11 +00:00
48b0740182
gas/
...
PR gas/13167
* dwarf2dbg.c (dwarf2_flush_pending_lines): Use symbol_temp_new_now.
gas/testsuite/
PR gas/13167
* gas/ia64/pr13167.d, gas/ia64/pr13167.s: New test.
* gas/ia64/ia64.exp: Run it.
2011-09-08 12:18:28 +00:00
96e67898bc
* gas/testsuite/gas/m68k/all.exp: Run "mode5" test also with -mcpu=5200.
...
* gas/testsuite/gas/m68k/mode5.s: Add moveml testcases.
* gas/testsuite/gas/m68k/mode5.d: Update.
* opcodes/m68k-opc.c: Use "y" in moveml pattern for mcfisa_a.
2011-09-07 20:56:09 +00:00
5045d76649
gas/
...
PR gas/13024
* dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
(dwarf2_gen_line_info_1): Delete.
(dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
(dwarf2_gen_line_info, dwarf2_emit_label): Use them.
(dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
(dwarf2_directive_loc): Push previous .locs instead of generating
them immediately.
gas/testsuite/
* gas/mips/loc-swap-2.s, gas/mips/loc-swap-2.d,
gas/mips/micromips@loc-swap-2.d,
gas/mips/mips16@loc-swap-2.d: New test.
* gas/mips/mips.exp: Run it.
2011-09-05 19:19:01 +00:00
7cf8042268
Updated Spanish translations.
2011-08-26 15:15:52 +00:00
0ac5db1998
2011-08-26 Tristan Gingold <gingold@adacore.com>
...
* config/tc-alpha.c (s_alpha_linkage): Simplify. Add comments.
2011-08-26 13:37:28 +00:00
0189c2eba7
2011-08-26 Tristan Gingold <gingold@adacore.com>
...
* config/tc-alpha.c (add_to_link_pool): Improve comment.
(s_alpha_fp_save): Fix indentation.
2011-08-26 13:16:36 +00:00
be748880a3
Update AVX tests.
...
2011-08-19 Sergey A. Guriev <sergeya.a.guriev@intel.com>
* gas/i386/avx-gather-intel.d: Added missing vpgather tests.
* gas/i386/avx-gather.d: Likewise.
* gas/i386/x86-64-avx-gather-intel.d: Likewise.
* gas/i386/x86-64-avx-gather.d: Likewise.
* gas/i386/avx-intel.d: Added missing vpinsrd and removed
duplicated vpinsrb instructions.
* gas/i386/avx.d: Likewise.
* gas/i386/avx.s: Likewise.
* gas/i386/ilp32/x86-64-avx-intel.d: Likewise.
* gas/i386/ilp32/x86-64-avx.d: Likewise.
* gas/i386/x86-64-avx-intel.d: Likewise.
* gas/i386/x86-64-avx.d: Likewise.
* gas/i386/x86-64-avx.s: Likewise.
2011-08-19 19:27:53 +00:00
6753e72f10
* doc/as.texinfo: Include c-xstormy16.texi.
2011-08-19 14:48:40 +00:00
7230378dfd
* write.c (resolve_reloc_expr_symbols): Convert local symbols
...
on relocs to section+offset.
(get_frag_for_reloc): New function.
(write_relocs): Merge sort fixup relocs with those from .reloc
directives.
2011-08-18 14:10:35 +00:00
87333bb72b
* config/tc-mips.c (can_swap_branch_p): Update the comment on
...
MIPS16 fixups.
2011-08-10 22:55:57 +00:00
85bb418f5e
* gas/mips/micromips@mips5.d: Rename to...
...
* gas/mips/micromips@mips5-fp.d: ... this.
* gas/mips/mips5.d: Rename to...
* gas/mips/mips5-fp.d: ... this.
* gas/mips/mips5.l: Rename to...
* gas/mips/mips5-fp.l: ... this.
* gas/mips/mips5.s: Rename to...
* gas/mips/mips5-fp.s: ... this.
* gas/mips/mips.exp: Update accordingly.
2011-08-10 22:52:03 +00:00
8d367dd5c0
* gas/mips/mips.exp: Define new "fpisa3", "fpisa4" and "fpisa5"
...
architecture properties adding them to "mips3", "mips4", "mips5"
and "mips32r2" architectures. Use the new properties for the
"24k-triple-stores-1", "24k-triple-stores-3", "mips4-fp",
"mips5" and "alnv_ps-swap" tests.
2011-08-10 22:28:41 +00:00
b5503c7b66
* config/tc-mips.c (mips_cpu_info_table): Add "m14k" and
...
"m14kc".
* doc/c-mips.texi (MIPS architecture options): Add "m14k" and
"m14kc" to the list of -march options.
2011-08-09 15:25:32 +00:00
dec0624dcd
gas/
...
* config/tc-mips.c (mips_set_options): Add ase_mcu.
(mips_opts): Initialise ase_mcu to -1.
(ISA_SUPPORTS_MCU_ASE): New macro.
(MIPS_CPU_ASE_MCU): Likewise.
(is_opcode_valid): Handle MCU.
(macro_build, macro): Likewise.
(validate_mips_insn, validate_micromips_insn): Likewise.
(mips_ip): Likewise.
(options): Add OPTION_MCU and OPTION_NO_MCU.
(md_longopts): Add mmcu and mno-mcu.
(md_parse_option): Handle OPTION_MCU and OPTION_NO_MCU.
(mips_after_parse_args): Handle MCU.
(s_mipsset): Likewise.
(md_show_usage): Handle MCU options.
* doc/as.texinfo: Document -mmcu and -mno-mcu options.
* doc/c-mips.texi: Likewise, and document ".set mcu" and
".set nomcu" directives.
gas/testsuite/
* gas/mips/micromips@mcu.d: New test.
* gas/mips/mcu.d: Likewise.
* gas/mips/mcu.s: New test source.
* gas/mips/mips.exp: Run the new tests.
include/opcode/
* mips.h (OP_MASK_3BITPOS, OP_SH_3BITPOS): New macros.
(OP_MASK_OFFSET12, OP_SH_OFFSET12): Redefine.
(INSN_ASE_MASK): Add the MCU bit.
(INSN_MCU): New macro.
(M_ACLR_AB, M_ACLR_OB, M_ASET_AB, M_ASET_OB): New enum values.
(MICROMIPSOP_MASK_3BITPOS, MICROMIPSOP_SH_3BITPOS): New macros.
opcodes/
* mips-dis.c (mips_arch_choices): Enable MCU for "mips32r2"
and "mips64r2".
(print_insn_args, print_insn_micromips): Handle MCU.
* micromips-opc.c (MC): New macro.
(micromips_opcodes): Add "aclr", "aset" and "iret".
* mips-opc.c (MC): New macro.
(mips_builtin_opcodes): Add "aclr", "aset" and "iret".
2011-08-09 15:20:03 +00:00
2b0c8b40ed
include/opcode/
...
* mips.h (INSN_WRITE_GPR_S, INSN2_WRITE_GPR_MB): New macros.
(INSN2_READ_GPR_MC, INSN2_READ_GPR_ME): Likewise.
(INSN2_WRITE_GPR_MF, INSN2_READ_GPR_MG): Likewise.
(INSN2_READ_GPR_MJ, INSN2_WRITE_GPR_MJ): Likewise.
(INSN2_READ_GPR_MP, INSN2_WRITE_GPR_MP): Likewise.
(INSN2_READ_GPR_MQ, INSN2_WRITE_GPR_MHI): Likewise.
(INSN2_READ_GPR_MMN): Likewise.
(INSN2_READ_FPR_D): Change the bit used.
(INSN2_MOD_GPR_MD, INSN2_MOD_GPR_MF): Likewise.
(INSN2_MOD_SP, INSN2_READ_GPR_31, INSN2_READ_GP): Likewise.
(INSN2_READ_PC, INSN2_UNCOND_BRANCH): Likewise.
(INSN2_COND_BRANCH): Likewise.
(INSN2_WRITE_GPR_S, INSN2_MOD_GPR_MB): Remove macros.
(INSN2_MOD_GPR_MC, INSN2_MOD_GPR_ME, INSN2_MOD_GPR_MG): Likewise.
(INSN2_MOD_GPR_MJ, INSN2_MOD_GPR_MP, INSN2_MOD_GPR_MQ): Likewise.
(INSN2_MOD_GPR_MHI, INSN2_MOD_GPR_MM): Likewise.
(INSN2_MOD_GPR_MN): Likewise.
gas/
* config/tc-mips.c (gpr_mod_mask): Remove INSN2_MOD_GPR_MB,
INSN2_MOD_GPR_MC, INSN2_MOD_GPR_ME, INSN2_MOD_GPR_MG,
INSN2_MOD_GPR_MHI, INSN2_MOD_GPR_MJ, INSN2_MOD_GPR_MM,
INSN2_MOD_GPR_MN, INSN2_MOD_GPR_MP and INSN2_MOD_GPR_MQ opcode
register use checks.
(gpr_read_mask): Add INSN2_READ_GPR_MC, INSN2_READ_GPR_ME
INSN2_READ_GPR_MG, INSN2_READ_GPR_MJ, INSN2_READ_GPR_MMN,
INSN2_READ_GPR_MP and INSN2_READ_GPR_MQ opcode register use
checks.
(gpr_write_mask): Replace INSN2_WRITE_GPR_S opcode register
use flag with INSN_WRITE_GPR_S. Add INSN2_WRITE_GPR_MB,
INSN2_WRITE_GPR_MHI, INSN2_WRITE_GPR_MJ and INSN2_WRITE_GPR_MP
opcode register use checks.
(can_swap_branch_p): Enable microMIPS branch swapping.
(append_insn): Likewise.
gas/testsuite/
* gas/mips/micromips.d: Update according to changes to enable
microMIPS branch swapping.
* gas/mips/micromips-trap.d: Likewise.
* gas/mips/micromips@jal-svr4pic.d: Likewise.
* gas/mips/micromips@loc-swap.d: Likewise.
* gas/mips/micromips@loc-swap-dis.d: Likewise.
opcodes/
* micromips-opc.c (MOD_mb, MOD_mc, MOD_md): Remove macros.
(MOD_me, MOD_mf, MOD_mg, MOD_mhi, MOD_mj, MOD_ml): Likewise.
(MOD_mm, MOD_mn, MOD_mp, MOD_mq, MOD_sp): Likewise.
(WR_mb, RD_mc, RD_md, WR_md, RD_me, RD_mf, WR_mf): New macros.
(RD_mg, WR_mhi, RD_mj, WR_mj, RD_ml, RD_mmn): Likewise.
(RD_mp, WR_mp, RD_mq, RD_sp, WR_sp): Likewise.
(WR_s): Update macro.
(micromips_opcodes): Update register use flags of: "addiu",
"addiupc", "addiur1sp", "addiur2", "addius5", "addiusp", "addu",
"and", "andi", "beq", "beqz", "bne", "bnez", "di", "ei", "j",
"jalr", "jalrs", "jr", "jraddiusp", "jrc", "lbu", "lhu", "li",
"lui", "lw", "lwm", "mfhi", "mflo", "move", "movep", "not",
"nor", "or", "ori", "sb", "sh", "sll", "srl", "subu", "sw",
"swm" and "xor" instructions.
2011-08-09 14:25:29 +00:00
40209cad0b
* config/tc-mips.c (RELAX_MICROMIPS_ENCODE): Remove forced 16-bit
...
branch size information.
(RELAX_MICROMIPS_U16BIT): Remove macro.
(RELAX_MICROMIPS_UNCOND): Adjust accordingly.
(RELAX_MICROMIPS_COMPACT, RELAX_MICROMIPS_LINK): Likewise.
(RELAX_MICROMIPS_RELAX32): Likewise.
(RELAX_MICROMIPS_TOOFAR16): Likewise.
(RELAX_MICROMIPS_MARK_TOOFAR16): Likewise.
(RELAX_MICROMIPS_CLEAR_TOOFAR16): Likewise.
(RELAX_MICROMIPS_TOOFAR32): Likewise.
(RELAX_MICROMIPS_MARK_TOOFAR32): Likewise.
(RELAX_MICROMIPS_CLEAR_TOOFAR32): Likewise.
(append_insn): Always check forced_insn_length for microMIPS
relaxation. Adjust code for the removal of
RELAX_MICROMIPS_U16BIT.
(mips_ip) <'D', 'E'>: If forced_insn_length, then emit the
relocation straight away.
(relaxed_micromips_16bit_branch_length): Adjust code for the
removal of RELAX_MICROMIPS_U16BIT.
2011-08-09 13:39:39 +00:00
74a6005fea
2011-08-08 Tristan Gingold <gingold@adacore.com>
...
* config/obj-macho.c (obj_mach_o_section): New function.
(struct known_section): New type.
(known_sections): Declare.
(obj_mach_o_known_section): New function.
(obj_mach_o_common_parse): Ditto.
(obj_mach_o_comm): Ditto.
(obj_mach_o_subsections_via_symbols): Ditto.
(mach_o_pseudo_table): Add new pseudos.
2011-08-08 12:20:01 +00:00
af385746fb
* dw2gencfi.c (all_fde_data): Export.
...
* dw2gencfi.h (all_fde_data): Declare.
* config/tc-alpha.c (alpha_elf_md_end): Don't convert legacy unwind
info to cfi unwind info if the user already has supplied some.
2011-08-07 16:32:20 +00:00
14fe068bd8
gas/
...
* config/tc-mips.c (emit_nop): Delete.
(get_delay_slot_nop): New function.
(nops_for_insn_or_target): Use it.
(append_insn): Likewise. When avoiding hazards, call add_fixed_insn
and insert_into_history directly.
2011-08-06 10:25:01 +00:00
11625dd84f
gas/
...
* config/tc-mips.c (delayed_branch_p, compact_branch_p)
(uncond_branch_p, branch_likely_p): New functions.
(insns_between, nops_for_insn_or_target, append_insn)
(macro_start): Use them.
(get_append_method): Likewise. Remove redundant test.
2011-08-06 10:02:03 +00:00
ea783ef3a0
include/opcode/
...
* sparc.h: Document new format codes '4', '5', and '('.
(OPF_LOW4, RS3): New macros.
opcodes/
* sparc-dis.c (v9a_ast_reg_names): Add "cps".
(X_RS3): New macro.
(print_insn_sparc): Handle '4', '5', and '(' format codes.
Accept %asr numbers below 28.
* sparc-opc.c (sparc_opcodes): Add entries for HPC and VIS3
instructions.
gas/
* config/tc-sparc.c (v9a_asr_table): Add "cps".
(sparc_ip): Handle '4', '5' and '(' format codes.
gas/testsuite
* gas/sparc/hpcvis3.d: New test.
* gas/sparc/hpcvis3.s: New test source.
* gas/sparc/sparc.exp: Run new test.
2011-08-05 16:52:50 +00:00
13077567ee
Update gas/i386/x86-64-branch.d to support win64.
...
2011-08-05 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/x86-64-branch.d: Pass -dw to objdump and support
win64.
2011-08-05 14:11:43 +00:00
2ae0848317
Call bfd_cache_close_all on error
...
2011-08-04 H.J. Lu <hongjiu.lu@intel.com>
PR gas/13056
* output-file.c (output_file_close): Call bfd_cache_close_all
on error.
* write.c (write_object_file): Revert the last change.
2011-08-04 20:53:58 +00:00
cfba7fd516
Add a testcase for group error.
...
2011-08-04 H.J. Lu <hongjiu.lu@intel.com>
* gas/elf/bad-group.d: New.
* gas/elf/bad-group.err: Likewise.
* gas/elf/bad-group.s: Likewise.
* gas/elf/elf.exp: Run bad-group.
2011-08-04 20:20:11 +00:00
5e9f6467f7
* write.c (write_object_file): Call set_symtab even if we had
...
errors.
2011-08-04 10:24:00 +00:00
249a777b4c
2011-08-04 Tristan Gingold <gingold@adacore.com>
...
* config/obj-elf.c (obj_elf_section): Do not free name.
2011-08-04 07:44:44 +00:00
877807f8c4
* config/tc-arm.c (do_t_strexbh): New.
...
(insns): Update accordingly.
* gas/arm/strex-bad-t.d: New testcase.
* gas/arm/strex-bad-t.s: Likewise.
* gas/arm/strex-bad-t.l: Likewise.
* gas/arm/strex-t.s: Likewise.
* gas/arm/strex-t.d: Likewise.
2011-08-03 11:35:56 +00:00
d7921315ba
Check R_X86_64_32 overflow and allow R_X86_64_64 for x32.
...
bfd/
2011-08-01 H.J. Lu <hongjiu.lu@intel.com>
PR ld/13048
* archures.c (bfd_mach_i386_intel_syntax): New.
(bfd_mach_i386_i8086): Updated.
(bfd_mach_i386_i386): Likewise.
(bfd_mach_x86_64): Likewise.
(bfd_mach_x64_32): Likewise.
(bfd_mach_i386_i386_intel_syntax): Likewise.
(bfd_mach_x86_64_intel_syntax): Likewise.
(bfd_mach_x64_32_intel_syntax): Likewise.
(bfd_mach_l1om): Likewise.
(bfd_mach_l1om_intel_syntax): Likewise.
(bfd_mach_k1om): Likewise.
(bfd_mach_k1om_intel_syntax): Likewise.
* bfd-in2.h: Regenerated.
* cpu-i386.c (bfd_i386_compatible): Check mach instead of
bits_per_address.
(bfd_x64_32_arch_intel_syntax): Set bits_per_address to 64.
(bfd_x64_32_arch): Likewise.
* elf64-x86-64.c: Include "libiberty.h".
(x86_64_elf_howto_table): Append x32 R_X86_64_32.
(elf_x86_64_rtype_to_howto): Support x32 R_X86_64_32.
(elf_x86_64_reloc_type_lookup): Likewise.
(elf_x86_64_reloc_name_lookup): Likewise.
(elf_x86_64_relocate_section): Likewise.
(elf_x86_64_check_relocs): Allow R_X86_64_64 relocations for x32.
gas/
2011-08-01 H.J. Lu <hongjiu.lu@intel.com>
PR ld/13048
* config/tc-i386.c (handle_quad): Removed.
(md_pseudo_table): Remove "quad".
(tc_gen_reloc): Don't check BFD_RELOC_64 for disallow_64bit_reloc.
(x86_dwarf2_addr_size): New.
* config/tc-i386.h (x86_dwarf2_addr_size): New.
(DWARF2_ADDR_SIZE): Likewise.
gas/testsuite/
2011-08-01 H.J. Lu <hongjiu.lu@intel.com>
PR ld/13048
* gas/i386/ilp32/ilp32.exp: Don't run inval.
* gas/i386/ilp32/inval.l: Removed.
* gas/i386/ilp32/inval.s: Likewise.
* gas/i386/ilp32/quad.d: Expect R_X86_64_64 instead of
R_X86_64_32.
* gas/i386/ilp32/x86-64-pcrel.s: Add tests for movabs.
* gas/i386/ilp32/x86-64-pcrel.d: Updated.
ld/testsuite/
2011-08-01 H.J. Lu <hongjiu.lu@intel.com>
PR ld/13048
* ld-x86-64/ilp32-6.d: New.
* ld-x86-64/ilp32-6.s: Likewise.
* ld-x86-64/ilp32-7.d: Likewise.
* ld-x86-64/ilp32-7.s: Likewise.
* ld-x86-64/ilp32-8.d: Likewise.
* ld-x86-64/ilp32-8.s: Likewise.
* ld-x86-64/ilp32-9.d: Likewise.
* ld-x86-64/ilp32-9.s: Likewise.
* ld-x86-64/x86-64.exp: Run ilp32-6, ilp32-7, ilp32-8 and ilp32-9.
opcodes/
2011-08-01 H.J. Lu <hongjiu.lu@intel.com>
PR ld/13048
* i386-dis.c (print_insn): Optimize info->mach check.
2011-08-01 23:04:23 +00:00
00f51a41a8
Add Disp32S to 64bit call.
...
gas/testsuite/
2011-08-01 H.J. Lu <hongjiu.lu@intel.com>
PR gas/13046
* gas/i386/x86-64-branch.s: Add tests for direct branch.
* gas/i386/x86-64-branch.d: Updated.
* gas/i386/ilp32/x86-64-branch.d: Likewise.
opcodes/
2011-08-01 H.J. Lu <hongjiu.lu@intel.com>
PR gas/13046
* i386-opc.tbl: Add Disp32S to 64bit call.
* i386-tbl.h: Regenerated.
2011-08-01 19:25:48 +00:00
a8040cf231
PR ld/12974
...
* config/tc-arm.c (literal_pool): Add locs field.
(add_to_lit_pool): Initialise the locs entry for the new literal.
(s_ltorg): Generate a DWARF2 line number entry for each emitted
literal pool entry.
2011-08-01 11:27:14 +00:00
1596988d53
2011-08-01 Tristan Gingold <gingold@adacore.com>
...
* write.c (write_relocs): Fix -Wshadow in DEBUG3 and DEBUG4.
2011-08-01 09:05:40 +00:00
8d8385cfb8
2011-08-01 Tristan Gingold <gingold@adacore.com>
...
* frags.c (frag_grow): Simplify the code.
2011-08-01 08:05:49 +00:00
c310919936
gas/
...
* config/tc-mips.c (nops_for_vr4130): Revert previous commit.
2011-07-30 06:28:22 +00:00
2309ddf222
bfd/
...
* elfxx-mips.c: Adjust comments throughout.
(mips_elf_relax_delete_bytes): Reshape code.
(_bfd_mips_elf_relax_section): Remove check for
R_MICROMIPS_GPREL16 relocations. Reshape code.
gas/
* config/tc-mips.c: Adjust comments throughout.
(reglist_lookup): Reshape code.
(jmp_reloc_p, jalr_reloc_p): Reformat.
(got16_reloc_p, hi16_reloc_p, lo16_reloc_p): Handle microMIPS
relocations.
(gpr_mod_mask): Remove unused variable.
(gpr_read_mask, gpr_write_mask): Reshape code.
(fpr_read_mask, fpr_write_mask): Likewise.
(nops_for_vr4130): Ensure non-microMIPS mode.
(can_swap_branch_p): Correct pinfo2 reference. Reshape code.
(append_insn): Skip Loongson 2F workaround in MIPS16 mode. Use
the outermost operator of a compound relocation to determines
the relocated field. Fix formatting.
(md_convert_frag): Reshape code.
include/opcode/
* mips.h: Clarify the description of microMIPS instruction
manipulation macros.
(MICROMIPSOP_MASK_MAJOR, MICROMIPSOP_SH_MAJOR): Remove macros.
2011-07-29 22:46:29 +00:00
8c9461a4de
* gas/elf/warn-2.s: Add other types of NOP insn.
2011-07-29 11:02:40 +00:00
69b1d6052d
2011-07-29 Tristan Gingold <gingold@adacore.com>
...
* frags.c (frag_var_init): New function.
(frag_var): Call frag_var_init to initialize.
(frag_variant): Ditto.
2011-07-29 07:34:14 +00:00
9aec20268e
* dwarf2dbg.c (out_debug_line): Ignore non-normal segments, with a
...
warning.
* doc/as.texinfo (Offset): Document .offset directive.
testsuite/
* gas/elf/warn-2.s: New.
2011-07-28 16:35:48 +00:00
088b3cd0ce
2011-07-27 Tristan Gingold <gingold@adacore.com>
...
* frags.c (frag_grow): Revert previous patch.
2011-07-27 06:54:12 +00:00
53d780c93d
* config/tc-rx.c (md_convert_frag): Fix encoding of beq.a
...
synthetic instruction.
* gas/rx/r-bcc.d: Update expected disassembly of synthetic beq.a
instruction.
2011-07-26 14:09:36 +00:00
179809c050
2011-07-25 Tristan Gingold <gingold@adacore.com>
...
* frags.c (frag_grow): Simplify the code.
2011-07-25 13:34:40 +00:00
df58fc944d
bfd/
...
2011-02-25 Chao-ying Fu <fu@mips.com>
Ilie Garbacea <ilie@mips.com>
Maciej W. Rozycki <macro@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Catherine Moore <clm@codesourcery.com>
Richard Sandiford <rdsandiford@googlemail.com>
* archures.c (bfd_mach_mips_micromips): New macro.
* cpu-mips.c (I_micromips): New enum value.
(arch_info_struct): Add bfd_mach_mips_micromips.
* elfxx-mips.h (_bfd_mips_elf_is_target_special_symbol): New
prototype.
(_bfd_mips_elf_relax_section): Likewise.
(_bfd_mips16_elf_reloc_unshuffle): Rename to...
(_bfd_mips_elf_reloc_unshuffle): ... this. Handle microMIPS
ASE.
(_bfd_mips16_elf_reloc_shuffle): Rename to...
(_bfd_mips_elf_reloc_shuffle): ... this. Handle microMIPS ASE.
(gprel16_reloc_p): Handle microMIPS ASE.
(literal_reloc_p): New function.
* elf32-mips.c (elf_micromips_howto_table_rel): New variable.
(_bfd_mips_elf32_gprel16_reloc): Handle microMIPS ASE.
(mips16_gprel_reloc): Update for _bfd_mips_elf_reloc_unshuffle
and _bfd_mips_elf_reloc_shuffle changes.
(mips_elf_gprel32_reloc): Update comment.
(micromips_reloc_map): New variable.
(bfd_elf32_bfd_reloc_type_lookup): Handle microMIPS ASE.
(mips_elf32_rtype_to_howto): Likewise.
(mips_info_to_howto_rel): Likewise.
(bfd_elf32_bfd_is_target_special_symbol): Define.
(bfd_elf32_bfd_relax_section): Likewise.
* elf64-mips.c (micromips_elf64_howto_table_rel): New variable.
(micromips_elf64_howto_table_rela): Likewise.
(mips16_gprel_reloc): Update for _bfd_mips_elf_reloc_unshuffle
and _bfd_mips_elf_reloc_shuffle changes.
(micromips_reloc_map): Likewise.
(bfd_elf64_bfd_reloc_type_lookup): Handle microMIPS ASE.
(bfd_elf64_bfd_reloc_name_lookup): Likewise.
(mips_elf64_rtype_to_howto): Likewise.
(bfd_elf64_bfd_is_target_special_symbol): Define.
* elfn32-mips.c (elf_micromips_howto_table_rel): New variable.
(elf_micromips_howto_table_rela): Likewise.
(mips16_gprel_reloc): Update for _bfd_mips_elf_reloc_unshuffle
and _bfd_mips_elf_reloc_shuffle changes.
(micromips_reloc_map): Likewise.
(bfd_elf32_bfd_reloc_type_lookup): Handle microMIPS ASE.
(bfd_elf32_bfd_reloc_name_lookup): Likewise.
(mips_elf_n32_rtype_to_howto): Likewise.
(bfd_elf32_bfd_is_target_special_symbol): Define.
* elfxx-mips.c (LA25_LUI_MICROMIPS_1): New macro.
(LA25_LUI_MICROMIPS_2): Likewise.
(LA25_J_MICROMIPS_1, LA25_J_MICROMIPS_2): Likewise.
(LA25_ADDIU_MICROMIPS_1, LA25_ADDIU_MICROMIPS_2): Likewise.
(TLS_RELOC_P): Handle microMIPS ASE.
(mips_elf_create_stub_symbol): Adjust value of stub symbol if
target is a microMIPS function.
(micromips_reloc_p): New function.
(micromips_reloc_shuffle_p): Likewise.
(got16_reloc_p, call16_reloc_p): Handle microMIPS ASE.
(got_disp_reloc_p, got_page_reloc_p): New functions.
(got_ofst_reloc_p): Likewise.
(got_hi16_reloc_p, got_lo16_reloc_p): Likewise.
(call_hi16_reloc_p, call_lo16_reloc_p): Likewise.
(hi16_reloc_p, lo16_reloc_p, jal_reloc_p): Handle microMIPS ASE.
(micromips_branch_reloc_p): New function.
(tls_gd_reloc_p, tls_ldm_reloc_p): Likewise.
(tls_gottprel_reloc_p): Likewise.
(_bfd_mips16_elf_reloc_unshuffle): Rename to...
(_bfd_mips_elf_reloc_unshuffle): ... this. Handle microMIPS
ASE.
(_bfd_mips16_elf_reloc_shuffle): Rename to...
(_bfd_mips_elf_reloc_shuffle): ... this. Handle microMIPS ASE.
(_bfd_mips_elf_lo16_reloc): Handle microMIPS ASE.
(mips_tls_got_index, mips_elf_got_page): Likewise.
(mips_elf_create_local_got_entry): Likewise.
(mips_elf_relocation_needs_la25_stub): Likewise.
(mips_elf_calculate_relocation): Likewise.
(mips_elf_perform_relocation): Likewise.
(_bfd_mips_elf_symbol_processing): Likewise.
(_bfd_mips_elf_add_symbol_hook): Likewise.
(_bfd_mips_elf_link_output_symbol_hook): Likewise.
(mips_elf_add_lo16_rel_addend): Likewise.
(_bfd_mips_elf_check_relocs): Likewise.
(mips_elf_adjust_addend): Likewise.
(_bfd_mips_elf_relocate_section): Likewise.
(mips_elf_create_la25_stub): Likewise.
(_bfd_mips_vxworks_finish_dynamic_symbol): Likewise.
(_bfd_mips_elf_gc_sweep_hook): Likewise.
(_bfd_mips_elf_is_target_special_symbol): New function.
(mips_elf_relax_delete_bytes): Likewise.
(opcode_descriptor): New structure.
(RA): New macro.
(OP32_SREG, OP32_TREG, OP16_VALID_REG): Likewise.
(b_insns_32, bc_insn_32, bz_insn_32, bzal_insn_32): New variables.
(beq_insn_32): Likewise.
(b_insn_16, bz_insn_16): New variables.
(BZC32_REG_FIELD): New macro.
(bz_rs_insns_32, bz_rt_insns_32): New variables.
(bzc_insns_32, bz_insns_16):Likewise.
(BZ16_REG, BZ16_REG_FIELD): New macros.
(jal_insn_32_bd16, jal_insn_32_bd32): New variables.
(jal_x_insn_32_bd32): Likewise.
(j_insn_32, jalr_insn_32): Likewise.
(ds_insns_32_bd16, ds_insns_32_bd32): Likewise.
(jalr_insn_16_bd16, jalr_insn_16_bd32, jr_insn_16): Likewise.
(JR16_REG): New macro.
(ds_insns_16_bd16): New variable.
(lui_insn): Likewise.
(addiu_insn, addiupc_insn): Likewise.
(ADDIUPC_REG_FIELD): New macro.
(MOVE32_RD, MOVE32_RS): Likewise.
(MOVE16_RD_FIELD, MOVE16_RS_FIELD): Likewise.
(move_insns_32, move_insns_16): New variables.
(nop_insn_32, nop_insn_16): Likewise.
(MATCH): New macro.
(find_match): New function.
(check_br16_dslot, check_br32_dslot): Likewise.
(check_br16, check_br32): Likewise.
(IS_BITSIZE): New macro.
(check_4byte_branch): New function.
(_bfd_mips_elf_relax_section): Likewise.
(_bfd_mips_elf_merge_private_bfd_data): Disallow linking MIPS16
and microMIPS modules together.
(_bfd_mips_elf_print_private_bfd_data): Handle microMIPS ASE.
* reloc.c (BFD_RELOC_MICROMIPS_7_PCREL_S1): New relocation.
(BFD_RELOC_MICROMIPS_10_PCREL_S1): Likewise.
(BFD_RELOC_MICROMIPS_16_PCREL_S1): Likewise.
(BFD_RELOC_MICROMIPS_GPREL16): Likewise.
(BFD_RELOC_MICROMIPS_JMP, BFD_RELOC_MICROMIPS_HI16): Likewise.
(BFD_RELOC_MICROMIPS_HI16_S): Likewise.
(BFD_RELOC_MICROMIPS_LO16): Likewise.
(BFD_RELOC_MICROMIPS_LITERAL): Likewise.
(BFD_RELOC_MICROMIPS_GOT16): Likewise.
(BFD_RELOC_MICROMIPS_CALL16): Likewise.
(BFD_RELOC_MICROMIPS_GOT_HI16): Likewise.
(BFD_RELOC_MICROMIPS_GOT_LO16): Likewise.
(BFD_RELOC_MICROMIPS_CALL_HI16): Likewise.
(BFD_RELOC_MICROMIPS_CALL_LO16): Likewise.
(BFD_RELOC_MICROMIPS_SUB): Likewise.
(BFD_RELOC_MICROMIPS_GOT_PAGE): Likewise.
(BFD_RELOC_MICROMIPS_GOT_OFST): Likewise.
(BFD_RELOC_MICROMIPS_GOT_DISP): Likewise.
(BFD_RELOC_MICROMIPS_HIGHEST): Likewise.
(BFD_RELOC_MICROMIPS_HIGHER): Likewise.
(BFD_RELOC_MICROMIPS_SCN_DISP): Likewise.
(BFD_RELOC_MICROMIPS_JALR): Likewise.
(BFD_RELOC_MICROMIPS_TLS_GD): Likewise.
(BFD_RELOC_MICROMIPS_TLS_LDM): Likewise.
(BFD_RELOC_MICROMIPS_TLS_DTPREL_HI16): Likewise.
(BFD_RELOC_MICROMIPS_TLS_DTPREL_LO16): Likewise.
(BFD_RELOC_MICROMIPS_TLS_GOTTPREL): Likewise.
(BFD_RELOC_MICROMIPS_TLS_TPREL_HI16): Likewise.
(BFD_RELOC_MICROMIPS_TLS_TPREL_LO16): Likewise.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
binutils/
2011-02-25 Chao-ying Fu <fu@mips.com>
Maciej W. Rozycki <macro@codesourcery.com>
* readelf.c (get_machine_flags): Handle microMIPS ASE.
(get_mips_symbol_other): Likewise.
gas/
2011-02-25 Maciej W. Rozycki <macro@codesourcery.com>
Chao-ying Fu <fu@mips.com>
Richard Sandiford <rdsandiford@googlemail.com>
* config/tc-mips.h (mips_segment_info): Add one bit for
microMIPS.
(TC_LABEL_IS_LOCAL): New macro.
(mips_label_is_local): New prototype.
* config/tc-mips.c (S0, S7): New macros.
(emit_branch_likely_macro): New variable.
(mips_set_options): Add micromips.
(mips_opts): Initialise micromips to -1.
(file_ase_micromips): New variable.
(CPU_HAS_MICROMIPS): New macro.
(hilo_interlocks): Set for microMIPS too.
(gpr_interlocks): Likewise.
(cop_interlocks): Likewise.
(cop_mem_interlocks): Likewise.
(HAVE_CODE_COMPRESSION): New macro.
(micromips_op_hash): New variable.
(micromips_nop16_insn, micromips_nop32_insn): New variables.
(NOP_INSN): Handle microMIPS ASE.
(mips32_to_micromips_reg_b_map): New macro.
(mips32_to_micromips_reg_c_map): Likewise.
(mips32_to_micromips_reg_d_map): Likewise.
(mips32_to_micromips_reg_e_map): Likewise.
(mips32_to_micromips_reg_f_map): Likewise.
(mips32_to_micromips_reg_g_map): Likewise.
(mips32_to_micromips_reg_l_map): Likewise.
(mips32_to_micromips_reg_n_map): Likewise.
(mips32_to_micromips_reg_h_map): New variable.
(mips32_to_micromips_reg_m_map): Likewise.
(mips32_to_micromips_reg_q_map): Likewise.
(micromips_to_32_reg_h_map): New variable.
(micromips_to_32_reg_i_map): Likewise.
(micromips_to_32_reg_m_map): Likewise.
(micromips_to_32_reg_q_map): Likewise.
(micromips_to_32_reg_b_map): New macro.
(micromips_to_32_reg_c_map): Likewise.
(micromips_to_32_reg_d_map): Likewise.
(micromips_to_32_reg_e_map): Likewise.
(micromips_to_32_reg_f_map): Likewise.
(micromips_to_32_reg_g_map): Likewise.
(micromips_to_32_reg_l_map): Likewise.
(micromips_to_32_reg_n_map): Likewise.
(micromips_imm_b_map, micromips_imm_c_map): New macros.
(RELAX_DELAY_SLOT_16BIT): New macro.
(RELAX_DELAY_SLOT_SIZE_FIRST): Likewise.
(RELAX_DELAY_SLOT_SIZE_SECOND): Likewise.
(RELAX_MICROMIPS_ENCODE, RELAX_MICROMIPS_P): New macros.
(RELAX_MICROMIPS_TYPE, RELAX_MICROMIPS_AT): Likewise.
(RELAX_MICROMIPS_U16BIT, RELAX_MICROMIPS_UNCOND): Likewise.
(RELAX_MICROMIPS_COMPACT, RELAX_MICROMIPS_LINK): Likewise.
(RELAX_MICROMIPS_RELAX32, RELAX_MICROMIPS_TOOFAR16): Likewise.
(RELAX_MICROMIPS_MARK_TOOFAR16): Likewise.
(RELAX_MICROMIPS_CLEAR_TOOFAR16): Likewise.
(RELAX_MICROMIPS_TOOFAR32): Likewise.
(RELAX_MICROMIPS_MARK_TOOFAR32): Likewise.
(RELAX_MICROMIPS_CLEAR_TOOFAR32): Likewise.
(INSERT_OPERAND, EXTRACT_OPERAND): Handle microMIPS ASE.
(mips_macro_warning): Add delay_slot_16bit_p, delay_slot_32bit_p,
fsize and insns.
(mips_mark_labels): New function.
(mips16_small, mips16_ext): Remove variables, replacing with...
(forced_insn_size): ... this.
(append_insn, mips16_ip): Update accordingly.
(micromips_insn_length): New function.
(insn_length): Return the length of microMIPS instructions.
(mips_record_mips16_mode): Rename to...
(mips_record_compressed_mode): ... this. Handle microMIPS ASE.
(install_insn): Handle microMIPS ASE.
(reglist_lookup): New function.
(is_size_valid, is_delay_slot_valid): Likewise.
(md_begin): Handle microMIPS ASE.
(md_assemble): Likewise. Update for append_insn interface change.
(micromips_reloc_p): New function.
(got16_reloc_p): Handle microMIPS ASE.
(hi16_reloc_p): Likewise.
(lo16_reloc_p): Likewise.
(jmp_reloc_p): New function.
(jalr_reloc_p): Likewise.
(matching_lo_reloc): Handle microMIPS ASE.
(insn_uses_reg, reg_needs_delay): Likewise.
(mips_move_labels): Likewise.
(mips16_mark_labels): Rename to...
(mips_compressed_mark_labels): ... this. Handle microMIPS ASE.
(gpr_mod_mask): New function.
(gpr_read_mask, gpr_write_mask): Handle microMIPS ASE.
(fpr_read_mask, fpr_write_mask): Likewise.
(insns_between, nops_for_vr4130, nops_for_insn): Likewise.
(fix_loongson2f_nop, fix_loongson2f_jump): Likewise.
(MICROMIPS_LABEL_CHAR): New macro.
(micromips_target_label, micromips_target_name): New variables.
(micromips_label_name, micromips_label_expr): New functions.
(micromips_label_inc, micromips_add_label): Likewise.
(mips_label_is_local): Likewise.
(micromips_map_reloc): Likewise.
(can_swap_branch_p): Handle microMIPS ASE.
(append_insn): Add expansionp argument. Handle microMIPS ASE.
(start_noreorder, end_noreorder): Handle microMIPS ASE.
(macro_start, macro_warning, macro_end): Likewise.
(brk_fmt, cop12_fmt, jalr_fmt, lui_fmt): New variables.
(mem12_fmt, mfhl_fmt, shft_fmt, trap_fmt): Likewise.
(BRK_FMT, COP12_FMT, JALR_FMT, LUI_FMT): New macros.
(MEM12_FMT, MFHL_FMT, SHFT_FMT, TRAP_FMT): Likewise.
(macro_build): Handle microMIPS ASE. Update for append_insn
interface change.
(mips16_macro_build): Update for append_insn interface change.
(macro_build_jalr): Handle microMIPS ASE.
(macro_build_lui): Likewise. Simplify.
(load_register): Handle microMIPS ASE.
(load_address): Likewise.
(move_register): Likewise.
(macro_build_branch_likely): New function.
(macro_build_branch_ccl): Likewise.
(macro_build_branch_rs): Likewise.
(macro_build_branch_rsrt): Likewise.
(macro): Handle microMIPS ASE.
(validate_micromips_insn): New function.
(expr_const_in_range): Likewise.
(mips_ip): Handle microMIPS ASE.
(options): Add OPTION_MICROMIPS and OPTION_NO_MICROMIPS.
(md_longopts): Add mmicromips and mno-micromips.
(md_parse_option): Handle OPTION_MICROMIPS and
OPTION_NO_MICROMIPS.
(mips_after_parse_args): Handle microMIPS ASE.
(md_pcrel_from): Handle microMIPS relocations.
(mips_force_relocation): Likewise.
(md_apply_fix): Likewise.
(mips_align): Handle microMIPS ASE.
(s_mipsset): Likewise.
(s_cpload, s_cpsetup, s_cpreturn): Use relocation wrappers.
(s_dtprel_internal): Likewise.
(s_gpword, s_gpdword): Likewise.
(s_insn): Handle microMIPS ASE.
(s_mips_stab): Likewise.
(relaxed_micromips_32bit_branch_length): New function.
(relaxed_micromips_16bit_branch_length): New function.
(md_estimate_size_before_relax): Handle microMIPS ASE.
(mips_fix_adjustable): Likewise.
(tc_gen_reloc): Handle microMIPS relocations.
(mips_relax_frag): Handle microMIPS ASE.
(md_convert_frag): Likewise.
(mips_frob_file_after_relocs): Likewise.
(mips_elf_final_processing): Likewise.
(mips_nop_opcode): Likewise.
(mips_handle_align): Likewise.
(md_show_usage): Handle microMIPS options.
* symbols.c (TC_LABEL_IS_LOCAL): New macro.
(S_IS_LOCAL): Add a TC_LABEL_IS_LOCAL check.
* doc/as.texinfo (Target MIPS options): Add -mmicromips and
-mno-micromips.
(-mmicromips, -mno-micromips): New options.
* doc/c-mips.texi (-mmicromips, -mno-micromips): New options.
(MIPS ISA): Document .set micromips and .set nomicromips.
(MIPS insn): Update for microMIPS support.
gas/testsuite/
2011-02-25 Maciej W. Rozycki <macro@codesourcery.com>
Chao-ying Fu <fu@mips.com>
Richard Sandiford <rdsandiford@googlemail.com>
* gas/mips/micromips.d: New test.
* gas/mips/micromips-branch-delay.d: Likewise.
* gas/mips/micromips-branch-relax.d: Likewise.
* gas/mips/micromips-branch-relax-pic.d: Likewise.
* gas/mips/micromips-size-1.d: Likewise.
* gas/mips/micromips-trap.d: Likewise.
* gas/mips/micromips.l: New stderr output.
* gas/mips/micromips-branch-delay.l: Likewise.
* gas/mips/micromips-branch-relax.l: Likewise.
* gas/mips/micromips-branch-relax-pic.l: Likewise.
* gas/mips/micromips-size-0.l: New list test.
* gas/mips/micromips-size-1.l: New stderr output.
* gas/mips/micromips.s: New test source.
* gas/mips/micromips-branch-delay.s: Likewise.
* gas/mips/micromips-branch-relax.s: Likewise.
* gas/mips/micromips-size-0.s: Likewise.
* gas/mips/micromips-size-1.s: Likewise.
* gas/mips/mips.exp: Run the new tests.
* gas/mips/dli.s: Use .p2align.
* gas/mips/elf_ase_micromips.d: New test.
* gas/mips/elf_ase_micromips-2.d: Likewise.
* gas/mips/micromips@abs.d: Likewise.
* gas/mips/micromips@add.d: Likewise.
* gas/mips/micromips@alnv_ps-swap.d: Likewise.
* gas/mips/micromips@and.d: Likewise.
* gas/mips/micromips@beq.d: Likewise.
* gas/mips/micromips@bge.d: Likewise.
* gas/mips/micromips@bgeu.d: Likewise.
* gas/mips/micromips@blt.d: Likewise.
* gas/mips/micromips@bltu.d: Likewise.
* gas/mips/micromips@branch-likely.d: Likewise.
* gas/mips/micromips@branch-misc-1.d: Likewise.
* gas/mips/micromips@branch-misc-2-64.d: Likewise.
* gas/mips/micromips@branch-misc-2.d: Likewise.
* gas/mips/micromips@branch-misc-2pic-64.d: Likewise.
* gas/mips/micromips@branch-misc-2pic.d: Likewise.
* gas/mips/micromips@branch-misc-4-64.d: Likewise.
* gas/mips/micromips@branch-misc-4.d: Likewise.
* gas/mips/micromips@branch-self.d: Likewise.
* gas/mips/micromips@cache.d: Likewise.
* gas/mips/micromips@daddi.d: Likewise.
* gas/mips/micromips@dli.d: Likewise.
* gas/mips/micromips@elf-jal.d: Likewise.
* gas/mips/micromips@elf-rel2.d: Likewise.
* gas/mips/micromips@elfel-rel2.d: Likewise.
* gas/mips/micromips@elf-rel4.d: Likewise.
* gas/mips/micromips@jal-svr4pic.d: Likewise.
* gas/mips/micromips@jal-svr4pic-noreorder.d: Likewise.
* gas/mips/micromips@lb-svr4pic-ilocks.d: Likewise.
* gas/mips/micromips@li.d: Likewise.
* gas/mips/micromips@loc-swap-dis.d: Likewise.
* gas/mips/micromips@loc-swap.d: Likewise.
* gas/mips/micromips@mips1-fp.d: Likewise.
* gas/mips/micromips@mips32-cp2.d: Likewise.
* gas/mips/micromips@mips32-imm.d: Likewise.
* gas/mips/micromips@mips32-sf32.d: Likewise.
* gas/mips/micromips@mips32.d: Likewise.
* gas/mips/micromips@mips32r2-cp2.d: Likewise.
* gas/mips/micromips@mips32r2-fp32.d: Likewise.
* gas/mips/micromips@mips32r2-sync.d: Likewise.
* gas/mips/micromips@mips32r2.d: Likewise.
* gas/mips/micromips@mips4-branch-likely.d: Likewise.
* gas/mips/micromips@mips4-fp.d: Likewise.
* gas/mips/micromips@mips4.d: Likewise.
* gas/mips/micromips@mips5.d: Likewise.
* gas/mips/micromips@mips64-cp2.d: Likewise.
* gas/mips/micromips@mips64.d: Likewise.
* gas/mips/micromips@mips64r2.d: Likewise.
* gas/mips/micromips@pref.d: Likewise.
* gas/mips/micromips@relax-at.d: Likewise.
* gas/mips/micromips@relax.d: Likewise.
* gas/mips/micromips@rol-hw.d: Likewise.
* gas/mips/micromips@uld2-eb.d: Likewise.
* gas/mips/micromips@uld2-el.d: Likewise.
* gas/mips/micromips@ulh2-eb.d: Likewise.
* gas/mips/micromips@ulh2-el.d: Likewise.
* gas/mips/micromips@ulw2-eb-ilocks.d: Likewise.
* gas/mips/micromips@ulw2-el-ilocks.d: Likewise.
* gas/mips/cache.d: Likewise.
* gas/mips/daddi.d: Likewise.
* gas/mips/mips32-imm.d: Likewise.
* gas/mips/pref.d: Likewise.
* gas/mips/elf-rel27.d: Handle microMIPS ASE.
* gas/mips/l_d.d: Likewise.
* gas/mips/l_d-n32.d: Likewise.
* gas/mips/l_d-n64.d: Likewise.
* gas/mips/ld.d: Likewise.
* gas/mips/ld-n32.d: Likewise.
* gas/mips/ld-n64.d: Likewise.
* gas/mips/s_d.d: Likewise.
* gas/mips/s_d-n32.d: Likewise.
* gas/mips/s_d-n64.d: Likewise.
* gas/mips/sd.d: Likewise.
* gas/mips/sd-n32.d: Likewise.
* gas/mips/sd-n64.d: Likewise.
* gas/mips/mips32.d: Update immediates.
* gas/mips/micromips@mips32-cp2.s: New test source.
* gas/mips/micromips@mips32-imm.s: Likewise.
* gas/mips/micromips@mips32r2-cp2.s: Likewise.
* gas/mips/micromips@mips64-cp2.s: Likewise.
* gas/mips/cache.s: Likewise.
* gas/mips/daddi.s: Likewise.
* gas/mips/mips32-imm.s: Likewise.
* gas/mips/elf-rel4.s: Handle microMIPS ASE.
* gas/mips/lb-pic.s: Likewise.
* gas/mips/ld.s: Likewise.
* gas/mips/mips32.s: Likewise.
* gas/mips/mips.exp: Add the micromips arch. Exclude mips16e
from micromips. Run mips32-imm.
* gas/mips/jal-mask-11.d: New test.
* gas/mips/jal-mask-12.d: Likewise.
* gas/mips/micromips@jal-mask-11.d: Likewise.
* gas/mips/jal-mask-1.s: Source for the new tests.
* gas/mips/jal-mask-21.d: New test.
* gas/mips/jal-mask-22.d: Likewise.
* gas/mips/micromips@jal-mask-12.d: Likewise.
* gas/mips/jal-mask-2.s: Source for the new tests.
* gas/mips/mips.exp: Run the new tests.
* gas/mips/mips16-e.d: Add --special-syms to `objdump'.
* gas/mips/tmips16-e.d: Likewise.
* gas/mips/mipsel16-e.d: Likewise.
* gas/mips/tmipsel16-e.d: Likewise.
* gas/mips/and.s: Adjust padding.
* gas/mips/beq.s: Likewise.
* gas/mips/bge.s: Likewise.
* gas/mips/bgeu.s: Likewise.
* gas/mips/blt.s: Likewise.
* gas/mips/bltu.s: Likewise.
* gas/mips/branch-misc-2.s: Likewise.
* gas/mips/jal.s: Likewise.
* gas/mips/li.s: Likewise.
* gas/mips/mips4.s: Likewise.
* gas/mips/mips4-fp.s: Likewise.
* gas/mips/relax.s: Likewise.
* gas/mips/and.d: Update accordingly.
* gas/mips/elf-jal.d: Likewise.
* gas/mips/jal.d: Likewise.
* gas/mips/li.d: Likewise.
* gas/mips/relax-at.d: Likewise.
* gas/mips/relax.d: Likewise.
include/elf/
2011-02-25 Chao-ying Fu <fu@mips.com>
Maciej W. Rozycki <macro@codesourcery.com>
* mips.h (R_MICROMIPS_min): New relocations.
(R_MICROMIPS_26_S1): Likewise.
(R_MICROMIPS_HI16, R_MICROMIPS_LO16): Likewise.
(R_MICROMIPS_GPREL16, R_MICROMIPS_LITERAL): Likewise.
(R_MICROMIPS_GOT16, R_MICROMIPS_PC7_S1): Likewise.
(R_MICROMIPS_PC10_S1, R_MICROMIPS_PC16_S1): Likewise.
(R_MICROMIPS_CALL16, R_MICROMIPS_GOT_DISP): Likewise.
(R_MICROMIPS_GOT_PAGE, R_MICROMIPS_GOT_OFST): Likewise.
(R_MICROMIPS_GOT_HI16, R_MICROMIPS_GOT_LO16): Likewise.
(R_MICROMIPS_SUB, R_MICROMIPS_HIGHER): Likewise.
(R_MICROMIPS_HIGHEST, R_MICROMIPS_CALL_HI16): Likewise.
(R_MICROMIPS_CALL_LO16, R_MICROMIPS_SCN_DISP): Likewise.
(R_MICROMIPS_JALR, R_MICROMIPS_HI0_LO16): Likewise.
(R_MICROMIPS_TLS_GD, R_MICROMIPS_TLS_LDM): Likewise.
(R_MICROMIPS_TLS_DTPREL_HI, R_MICROMIPS_TLS_DTPREL_LO): Likewise.
(R_MICROMIPS_TLS_GOTTPREL): Likewise.
(R_MICROMIPS_TLS_TPREL_HI16): Likewise.
(R_MICROMIPS_TLS_TPREL_LO16): Likewise.
(R_MICROMIPS_GPREL7_S2, R_MICROMIPS_PC23_S2): Likewise.
(R_MICROMIPS_max): Likewise.
(EF_MIPS_ARCH_ASE_MICROMIPS): New macro.
(STO_MIPS_ISA, STO_MIPS_FLAGS): Likewise.
(ELF_ST_IS_MIPS_PLT, ELF_ST_SET_MIPS_PLT): Likewise.
(STO_MICROMIPS): Likewise.
(ELF_ST_IS_MICROMIPS, ELF_ST_SET_MICROMIPS): Likewise.
(ELF_ST_IS_COMPRESSED): Likewise.
(STO_MIPS_PLT, STO_MIPS_PIC): Rework.
(ELF_ST_IS_MIPS_PIC, ELF_ST_SET_MIPS_PIC): Likewise.
(STO_MIPS16, ELF_ST_IS_MIPS16, ELF_ST_SET_MIPS16): Likewise.
include/opcode/
2011-02-25 Chao-ying Fu <fu@mips.com>
Maciej W. Rozycki <macro@codesourcery.com>
* mips.h (OP_MASK_EXTLSB, OP_SH_EXTLSB): New macros.
(OP_MASK_STYPE, OP_SH_STYPE): Likewise.
(OP_MASK_CODE10, OP_SH_CODE10): Likewise.
(OP_MASK_TRAP, OP_SH_TRAP): Likewise.
(OP_MASK_OFFSET12, OP_SH_OFFSET12): Likewise.
(OP_MASK_OFFSET10, OP_SH_OFFSET10): Likewise.
(OP_MASK_RS3, OP_SH_RS3): Likewise.
(OP_MASK_MB, OP_SH_MB, OP_MASK_MC, OP_SH_MC): Likewise.
(OP_MASK_MD, OP_SH_MD, OP_MASK_ME, OP_SH_ME): Likewise.
(OP_MASK_MF, OP_SH_MF, OP_MASK_MG, OP_SH_MG): Likewise.
(OP_MASK_MJ, OP_SH_MJ, OP_MASK_ML, OP_SH_ML): Likewise.
(OP_MASK_MP, OP_SH_MP, OP_MASK_MQ, OP_SH_MQ): Likewise.
(OP_MASK_IMMA, OP_SH_IMMA, OP_MASK_IMMB, OP_SH_IMMB): Likewise.
(OP_MASK_IMMC, OP_SH_IMMC, OP_MASK_IMMF, OP_SH_IMMF): Likewise.
(OP_MASK_IMMG, OP_SH_IMMG, OP_MASK_IMMH, OP_SH_IMMH): Likewise.
(OP_MASK_IMMI, OP_SH_IMMI, OP_MASK_IMMJ, OP_SH_IMMJ): Likewise.
(OP_MASK_IMML, OP_SH_IMML, OP_MASK_IMMM, OP_SH_IMMM): Likewise.
(OP_MASK_IMMN, OP_SH_IMMN, OP_MASK_IMMO, OP_SH_IMMO): Likewise.
(OP_MASK_IMMP, OP_SH_IMMP, OP_MASK_IMMQ, OP_SH_IMMQ): Likewise.
(OP_MASK_IMMU, OP_SH_IMMU, OP_MASK_IMMW, OP_SH_IMMW): Likewise.
(OP_MASK_IMMX, OP_SH_IMMX, OP_MASK_IMMY, OP_SH_IMMY): Likewise.
(INSN_WRITE_GPR_S): New macro.
(INSN2_BRANCH_DELAY_16BIT, INSN2_BRANCH_DELAY_32BIT): Likewise.
(INSN2_READ_FPR_D): Likewise.
(INSN2_MOD_GPR_MB, INSN2_MOD_GPR_MC): Likewise.
(INSN2_MOD_GPR_MD, INSN2_MOD_GPR_ME): Likewise.
(INSN2_MOD_GPR_MF, INSN2_MOD_GPR_MG): Likewise.
(INSN2_MOD_GPR_MJ, INSN2_MOD_GPR_MP): Likewise.
(INSN2_MOD_GPR_MQ, INSN2_MOD_SP): Likewise.
(INSN2_READ_GPR_31, INSN2_READ_GP, INSN2_READ_PC): Likewise.
(INSN2_UNCOND_BRANCH, INSN2_COND_BRANCH): Likewise.
(INSN2_MOD_GPR_MHI, INSN2_MOD_GPR_MM, INSN2_MOD_GPR_MN): Likewise.
(CPU_MICROMIPS): New macro.
(M_BC1FL, M_BC1TL, M_BC2FL, M_BC2TL): New enum values.
(M_BEQL, M_BGEZ, M_BGEZL, M_BGEZALL, M_BGTZ, M_BGTZL): Likewise.
(M_BLEZ, M_BLEZL, M_BLTZ, M_BLTZL, M_BLTZALL, M_BNEL): Likewise.
(M_CACHE_OB, M_JALS_1, M_JALS_2, M_JALS_A): Likewise.
(M_LDC2_OB, M_LDL_OB, M_LDM_AB, M_LDM_OB): Likewise.
(M_LDP_AB, M_LDP_OB, M_LDR_OB, M_LL_OB, M_LLD_OB): Likewise.
(M_LWC2_OB, M_LWL_OB, M_LWM_AB, M_LWM_OB): Likewise.
(M_LWP_AB, M_LWP_OB, M_LWR_OB): Likewise.
(M_LWU_OB, M_PREF_OB, M_SC_OB, M_SCD_OB): Likewise.
(M_SDC2_OB, M_SDL_OB, M_SDM_AB, M_SDM_OB): Likewise.
(M_SDP_AB, M_SDP_OB, M_SDR_OB): Likewise.
(M_SWC2_OB, M_SWL_OB, M_SWM_AB, M_SWM_OB): Likewise.
(M_SWP_AB, M_SWP_OB, M_SWR_OB): Likewise.
(MICROMIPSOP_MASK_MAJOR, MICROMIPSOP_SH_MAJOR): New macros.
(MICROMIPSOP_MASK_IMMEDIATE, MICROMIPSOP_SH_IMMEDIATE): Likewise.
(MICROMIPSOP_MASK_DELTA, MICROMIPSOP_SH_DELTA): Likewise.
(MICROMIPSOP_MASK_CODE10, MICROMIPSOP_SH_CODE10): Likewise.
(MICROMIPSOP_MASK_TRAP, MICROMIPSOP_SH_TRAP): Likewise.
(MICROMIPSOP_MASK_SHAMT, MICROMIPSOP_SH_SHAMT): Likewise.
(MICROMIPSOP_MASK_TARGET, MICROMIPSOP_SH_TARGET): Likewise.
(MICROMIPSOP_MASK_EXTLSB, MICROMIPSOP_SH_EXTLSB): Likewise.
(MICROMIPSOP_MASK_EXTMSBD, MICROMIPSOP_SH_EXTMSBD): Likewise.
(MICROMIPSOP_MASK_INSMSB, MICROMIPSOP_SH_INSMSB): Likewise.
(MICROMIPSOP_MASK_CODE, MICROMIPSOP_SH_CODE): Likewise.
(MICROMIPSOP_MASK_CODE2, MICROMIPSOP_SH_CODE2): Likewise.
(MICROMIPSOP_MASK_CACHE, MICROMIPSOP_SH_CACHE): Likewise.
(MICROMIPSOP_MASK_SEL, MICROMIPSOP_SH_SEL): Likewise.
(MICROMIPSOP_MASK_OFFSET12, MICROMIPSOP_SH_OFFSET12): Likewise.
(MICROMIPSOP_MASK_3BITPOS, MICROMIPSOP_SH_3BITPOS): Likewise.
(MICROMIPSOP_MASK_STYPE, MICROMIPSOP_SH_STYPE): Likewise.
(MICROMIPSOP_MASK_OFFSET10, MICROMIPSOP_SH_OFFSET10): Likewise.
(MICROMIPSOP_MASK_RS, MICROMIPSOP_SH_RS): Likewise.
(MICROMIPSOP_MASK_RT, MICROMIPSOP_SH_RT): Likewise.
(MICROMIPSOP_MASK_RD, MICROMIPSOP_SH_RD): Likewise.
(MICROMIPSOP_MASK_FS, MICROMIPSOP_SH_FS): Likewise.
(MICROMIPSOP_MASK_FT, MICROMIPSOP_SH_FT): Likewise.
(MICROMIPSOP_MASK_FD, MICROMIPSOP_SH_FD): Likewise.
(MICROMIPSOP_MASK_FR, MICROMIPSOP_SH_FR): Likewise.
(MICROMIPSOP_MASK_RS3, MICROMIPSOP_SH_RS3): Likewise.
(MICROMIPSOP_MASK_PREFX, MICROMIPSOP_SH_PREFX): Likewise.
(MICROMIPSOP_MASK_BCC, MICROMIPSOP_SH_BCC): Likewise.
(MICROMIPSOP_MASK_CCC, MICROMIPSOP_SH_CCC): Likewise.
(MICROMIPSOP_MASK_COPZ, MICROMIPSOP_SH_COPZ): Likewise.
(MICROMIPSOP_MASK_MB, MICROMIPSOP_SH_MB): Likewise.
(MICROMIPSOP_MASK_MC, MICROMIPSOP_SH_MC): Likewise.
(MICROMIPSOP_MASK_MD, MICROMIPSOP_SH_MD): Likewise.
(MICROMIPSOP_MASK_ME, MICROMIPSOP_SH_ME): Likewise.
(MICROMIPSOP_MASK_MF, MICROMIPSOP_SH_MF): Likewise.
(MICROMIPSOP_MASK_MG, MICROMIPSOP_SH_MG): Likewise.
(MICROMIPSOP_MASK_MH, MICROMIPSOP_SH_MH): Likewise.
(MICROMIPSOP_MASK_MI, MICROMIPSOP_SH_MI): Likewise.
(MICROMIPSOP_MASK_MJ, MICROMIPSOP_SH_MJ): Likewise.
(MICROMIPSOP_MASK_ML, MICROMIPSOP_SH_ML): Likewise.
(MICROMIPSOP_MASK_MM, MICROMIPSOP_SH_MM): Likewise.
(MICROMIPSOP_MASK_MN, MICROMIPSOP_SH_MN): Likewise.
(MICROMIPSOP_MASK_MP, MICROMIPSOP_SH_MP): Likewise.
(MICROMIPSOP_MASK_MQ, MICROMIPSOP_SH_MQ): Likewise.
(MICROMIPSOP_MASK_IMMA, MICROMIPSOP_SH_IMMA): Likewise.
(MICROMIPSOP_MASK_IMMB, MICROMIPSOP_SH_IMMB): Likewise.
(MICROMIPSOP_MASK_IMMC, MICROMIPSOP_SH_IMMC): Likewise.
(MICROMIPSOP_MASK_IMMD, MICROMIPSOP_SH_IMMD): Likewise.
(MICROMIPSOP_MASK_IMME, MICROMIPSOP_SH_IMME): Likewise.
(MICROMIPSOP_MASK_IMMF, MICROMIPSOP_SH_IMMF): Likewise.
(MICROMIPSOP_MASK_IMMG, MICROMIPSOP_SH_IMMG): Likewise.
(MICROMIPSOP_MASK_IMMH, MICROMIPSOP_SH_IMMH): Likewise.
(MICROMIPSOP_MASK_IMMI, MICROMIPSOP_SH_IMMI): Likewise.
(MICROMIPSOP_MASK_IMMJ, MICROMIPSOP_SH_IMMJ): Likewise.
(MICROMIPSOP_MASK_IMML, MICROMIPSOP_SH_IMML): Likewise.
(MICROMIPSOP_MASK_IMMM, MICROMIPSOP_SH_IMMM): Likewise.
(MICROMIPSOP_MASK_IMMN, MICROMIPSOP_SH_IMMN): Likewise.
(MICROMIPSOP_MASK_IMMO, MICROMIPSOP_SH_IMMO): Likewise.
(MICROMIPSOP_MASK_IMMP, MICROMIPSOP_SH_IMMP): Likewise.
(MICROMIPSOP_MASK_IMMQ, MICROMIPSOP_SH_IMMQ): Likewise.
(MICROMIPSOP_MASK_IMMU, MICROMIPSOP_SH_IMMU): Likewise.
(MICROMIPSOP_MASK_IMMW, MICROMIPSOP_SH_IMMW): Likewise.
(MICROMIPSOP_MASK_IMMX, MICROMIPSOP_SH_IMMX): Likewise.
(MICROMIPSOP_MASK_IMMY, MICROMIPSOP_SH_IMMY): Likewise.
(MICROMIPSOP_MASK_CODE, MICROMIPSOP_SH_CODE): Likewise.
(MICROMIPSOP_MASK_CODE2, MICROMIPSOP_SH_CODE2): Likewise.
(MICROMIPSOP_MASK_CACHE, MICROMIPSOP_SH_CACHE): Likewise.
(MICROMIPSOP_MASK_CODE20, MICROMIPSOP_SH_CODE20): Likewise.
(MICROMIPSOP_MASK_PERFREG, MICROMIPSOP_SH_PERFREG): Likewise.
(MICROMIPSOP_MASK_CODE19, MICROMIPSOP_SH_CODE19): Likewise.
(MICROMIPSOP_MASK_ALN, MICROMIPSOP_SH_ALN): Likewise.
(MICROMIPSOP_MASK_VECBYTE, MICROMIPSOP_SH_VECBYTE): Likewise.
(MICROMIPSOP_MASK_VECALIGN, MICROMIPSOP_SH_VECALIGN): Likewise.
(MICROMIPSOP_MASK_DSPACC, MICROMIPSOP_SH_DSPACC): Likewise.
(MICROMIPSOP_MASK_DSPACC_S, MICROMIPSOP_SH_DSPACC_S): Likewise.
(MICROMIPSOP_MASK_DSPSFT, MICROMIPSOP_SH_DSPSFT): Likewise.
(MICROMIPSOP_MASK_DSPSFT_7, MICROMIPSOP_SH_DSPSFT_7): Likewise.
(MICROMIPSOP_MASK_SA3, MICROMIPSOP_SH_SA3): Likewise.
(MICROMIPSOP_MASK_SA4, MICROMIPSOP_SH_SA4): Likewise.
(MICROMIPSOP_MASK_IMM8, MICROMIPSOP_SH_IMM8): Likewise.
(MICROMIPSOP_MASK_IMM10, MICROMIPSOP_SH_IMM10): Likewise.
(MICROMIPSOP_MASK_WRDSP, MICROMIPSOP_SH_WRDSP): Likewise.
(MICROMIPSOP_MASK_RDDSP, MICROMIPSOP_SH_RDDSP): Likewise.
(MICROMIPSOP_MASK_BP, MICROMIPSOP_SH_BP): Likewise.
(MICROMIPSOP_MASK_MT_U, MICROMIPSOP_SH_MT_U): Likewise.
(MICROMIPSOP_MASK_MT_H, MICROMIPSOP_SH_MT_H): Likewise.
(MICROMIPSOP_MASK_MTACC_T, MICROMIPSOP_SH_MTACC_T): Likewise.
(MICROMIPSOP_MASK_MTACC_D, MICROMIPSOP_SH_MTACC_D): Likewise.
(MICROMIPSOP_MASK_BBITIND, MICROMIPSOP_SH_BBITIND): Likewise.
(MICROMIPSOP_MASK_CINSPOS, MICROMIPSOP_SH_CINSPOS): Likewise.
(MICROMIPSOP_MASK_CINSLM1, MICROMIPSOP_SH_CINSLM1): Likewise.
(MICROMIPSOP_MASK_SEQI, MICROMIPSOP_SH_SEQI): Likewise.
(micromips_opcodes): New declaration.
(bfd_micromips_num_opcodes): Likewise.
ld/testsuite/
2011-02-25 Catherine Moore <clm@codesourcery.com>
Chao-ying Fu <fu@mips.com>
Maciej W. Rozycki <macro@codesourcery.com>
* lib/ld-lib.exp (run_dump_test): Support distinct assembler
flags for the same source named multiple times.
* ld-mips-elf/jalx-1.s: New test source.
* ld-mips-elf/jalx-1.d: New test output.
* ld-mips-elf/jalx-1.ld: New test linker script.
* ld-mips-elf/jalx-2-main.s: New test source.
* ld-mips-elf/jalx-2-ex.s: Likewise.
* ld-mips-elf/jalx-2-printf.s: Likewise.
* ld-mips-elf/jalx-2.dd: New test output.
* ld-mips-elf/jalx-2.ld: New test linker script.
* ld-mips-elf/mips16-and-micromips.d: New test.
* ld-mips-elf/mips-elf.exp: Run the new tests
opcodes/
2011-02-25 Chao-ying Fu <fu@mips.com>
Maciej W. Rozycki <macro@codesourcery.com>
* micromips-opc.c: New file.
* mips-dis.c (micromips_to_32_reg_b_map): New array.
(micromips_to_32_reg_c_map, micromips_to_32_reg_d_map): Likewise.
(micromips_to_32_reg_e_map, micromips_to_32_reg_f_map): Likewise.
(micromips_to_32_reg_g_map, micromips_to_32_reg_l_map): Likewise.
(micromips_to_32_reg_q_map): Likewise.
(micromips_imm_b_map, micromips_imm_c_map): Likewise.
(micromips_ase): New variable.
(is_micromips): New function.
(set_default_mips_dis_options): Handle microMIPS ASE.
(print_insn_micromips): New function.
(is_compressed_mode_p): Likewise.
(_print_insn_mips): Handle microMIPS instructions.
* Makefile.am (CFILES): Add micromips-opc.c.
* configure.in (bfd_mips_arch): Add micromips-opc.lo.
* Makefile.in: Regenerate.
* configure: Regenerate.
* mips-dis.c (micromips_to_32_reg_h_map): New variable.
(micromips_to_32_reg_i_map): Likewise.
(micromips_to_32_reg_m_map): Likewise.
(micromips_to_32_reg_n_map): New macro.
2011-07-24 14:20:15 +00:00
a40bc9dd42
gas/
...
2011-07-24 Maciej W. Rozycki <macro@codesourcery.com>
* config/tc-mips.c (mips_ip): Make a copy of the instruction's
mnemonic and use it for further processing.
2011-07-24 14:05:28 +00:00
bcd530a713
include/opcode/
...
2011-07-24 Maciej W. Rozycki <macro@codesourcery.com>
* mips.h (INSN_TRAP): Rename to...
(INSN_NO_DELAY_SLOT): ... this.
(INSN_SYNC): Remove macro.
gas/
2011-07-24 Maciej W. Rozycki <macro@codesourcery.com>
* config/tc-mips.c (can_swap_branch_p): Adjust for the rename of
INSN_TRAP to INSN_NO_DELAY_SLOT. Remove the check for INSN_SYNC
as well as explicit checks for ERET and DERET when scheduling
branch delay slots.
opcodes/
2011-07-24 Maciej W. Rozycki <macro@codesourcery.com>
* mips-opc.c (NODS): New macro.
(TRAP): Adjust for the rename of INSN_TRAP to INSN_NO_DELAY_SLOT.
(DSP_VOLA): Likewise.
(mips_builtin_opcodes): Add NODS annotation to "deret" and
"eret". Replace INSN_SYNC with NODS throughout. Use NODS in
place of TRAP for "wait", "waiti" and "yield".
* mips16-opc.c (NODS): New macro.
(TRAP): Adjust for the rename of INSN_TRAP to INSN_NO_DELAY_SLOT.
(mips16_opcodes): Use NODS in place of TRAP for "jalrc", "jrc",
"restore" and "save".
2011-07-24 14:04:51 +00:00
7a9068fe16
Add initial Intel K1OM support.
...
bfd/
2011-07-22 H.J. Lu <hongjiu.lu@intel.com>
* Makefile.am (ALL_MACHINES): Add cpu-k1om.lo.
(ALL_MACHINES_CFILES): Add cpu-k1om.c.
* Makefile.in: Regenerated.
* archures.c (bfd_architecture): Add bfd_arch_k1om.
(bfd_k1om_arch): New.
(bfd_archures_list): Add &bfd_k1om_arch.
* bfd-in2.h: Regenerated.
* config.bfd (targ64_selvecs): Add bfd_elf64_k1om_vec if
bfd_elf64_x86_64_vec is supported. Add bfd_elf64_k1om_freebsd_vec
if bfd_elf64_x86_64_freebsd_vec is supported.
(targ_selvecs): Likewise.
* configure.in: Support bfd_elf64_k1om_vec and
bfd_elf64_k1om_freebsd_vec.
* configure: Regenerated.
* cpu-k1om.c: New.
* elf64-x86-64.c (elf64_k1om_elf_object_p): New.
(bfd_elf64_k1om_vec): Likewise.
(bfd_elf64_k1om_freebsd_vec): Likewise.
* targets.c (bfd_elf64_k1om_vec): New.
(bfd_elf64_k1om_freebsd_vec): Likewise.
(_bfd_target_vector): Add bfd_elf64_k1om_vec and
bfd_elf64_k1om_freebsd_vec.
binutils/
2011-07-22 H.J. Lu <hongjiu.lu@intel.com>
* dwarf.c (init_dwarf_regnames): Handle EM_K1OM.
* elfedit.c (elf_machine): Support EM_K1OM.
(elf_class): Likewise.
* readelf.c (guess_is_rela): Handle EM_K1OM.
(dump_relocations): Likewise.
(get_machine_name): Likewise.
(get_section_type_name): Likewise.
(get_elf_section_flags): Likewise.
(process_section_headers): Likewise.
(get_symbol_index_type): Likewise.
(is_32bit_abs_reloc): Likewise.
(is_32bit_pcrel_reloc): Likewise.
(is_64bit_abs_reloc): Likewise.
(is_64bit_pcrel_reloc): Likewise.
(is_none_reloc): Likewise.
* doc/binutils.texi: Mention K1OM for elfedit.
binutils/testsuite/
2011-07-22 H.J. Lu <hongjiu.lu@intel.com>
* binutils-all/elfedit.exp: Run elfedit-4.
* binutils-all/elfedit-4.d: New.
gas/
2011-07-22 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (cpu_arch): Add k1om.
(i386_align_code): Handle PROCESSOR_K1OM.
(check_cpu_arch_compatible): Check EM_K1OM.
(i386_arch): Handle Intel K1OM.
(i386_mach): Return bfd_mach_k1om for Intel K1OM.
(i386_target_format): Return ELF_TARGET_K1OM_FORMAT for Intel
K1OM.
* config/tc-i386.h (ELF_TARGET_K1OM_FORMAT): New.
(processor_type): Add PROCESSOR_K1OM.
* doc/c-i386.texi: Document k1om.
gas/testsuite/
2011-07-22 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/k1om.d: New.
* gas/i386/k1om-inval.l: Likewise.
* gas/i386/k1om-inval.s: Likewise.
* gas/i386/i386.exp: Run k1om-inval and k1om.
include/elf/
2011-07-22 H.J. Lu <hongjiu.lu@intel.com>
* common.h (EM_K1OM): New.
ld/
2011-07-22 H.J. Lu <hongjiu.lu@intel.com>
* Makefile.am (ALL_64_EMULATIONS): Add eelf_k1om.o and
eelf_k1om_fbsd.o
(eelf_k1om.c): New.
(eelf_k1om_fbsd.c): Likewise.
* Makefile.in: Regenerated.
* configure.tgt (targ64_extra_emuls): Add elf_k1om if elf_x86_64
is supported. Add elf_k1om_fbsd if elf_x86_64_fbsd is supported.
(targ_extra_emuls): Likewise.
* emulparams/elf_k1om.sh: New.
* emulparams/elf_k1om_fbsd.sh: Likewise.
ld/testsuite/
2011-07-22 H.J. Lu <hongjiu.lu@intel.com>
* ld-x86-64/abs-k1om.d: New.
* ld-x86-64/protected2-k1om.d: Likewise.
* ld-x86-64/protected3-k1om.d: Likewise.
* ld-x86-64/x86-64.exp: Run abs-k1om, protected2-k1om and
protected3-k1om.
opcodes/
2011-07-22 H.J. Lu <hongjiu.lu@intel.com>
* configure.in: Handle bfd_k1om_arch.
* configure: Regenerated.
* disassemble.c (disassembler): Handle bfd_k1om_arch.
* i386-dis.c (print_insn): Handle bfd_mach_k1om and
bfd_mach_k1om_intel_syntax.
* i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to
~(CpuL1OM|CpuK1OM). Add CPU_K1OM_FLAGS.
(cpu_flags): Add CpuK1OM.
* i386-opc.h (CpuK1OM): New.
(i386_cpu_flags): Add cpuk1om.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2011-07-22 20:22:38 +00:00
2aab8acd29
Fix a typo in doc/c-i386.texi.
...
2011-07-18 H.J. Lu <hongjiu.lu@intel.com>
* doc/c-i386.texi: Fix a typo.
2011-07-18 13:32:31 +00:00
01f372ca0b
gas/
...
2011-07-04 Aurelien Jarno <aurelien@aurel32.net>
* config/tc-mips.c (append_insn): delete prev_pinfo2 and pinfo2.
2011-07-06 18:01:51 +00:00
97fd0b2f39
* gas/mips/loc-swap.s: Add file missing from a previous commit.
2011-07-04 22:48:42 +00:00
fe35f09f47
gas/
...
* config/tc-mips.c (gpr_read_mask, gpr_write_mask): Fix handling
of register 0.
2011-07-04 20:22:52 +00:00
e3a82c8e75
gas/
...
* config/tc-mips.c (append_insn): Make sure DWARF-2 location
information is properly adjusted for branches that get swapped.
gas/testsuite/
* gas/mips/loc-swap.d: New test case for DWARF-2 location with
branch swapping.
* gas/mips/loc-swap-dis.d: Likewise.
* gas/mips/mips16@loc-swap.d: Likewise, MIPS16 version.
* gas/mips/mips16@loc-swap-dis.d: Likewise.
* gas/mips/loc-swap.s: Source for the new tests.
* gas/mips/mips.exp: Run the new tests.
2011-07-04 19:27:28 +00:00
2bb70ae0f4
ELFOSABI_GNU
...
bfd/
* elf.c (_bfd_elf_set_osabi): Use ELFOSABI_GNU name instead of
ELFOSABI_LINUX alias.
* elf32-hppa.c: Likewise.
* elf32-i370.c: Likewise.
* elf64-hppa.c: Likewise.
binutils/
* elfedit.c (osabis): Use ELFOSABI_GNU name instead of ELFOSABI_LINUX
alias and ELFOSABI_HURD. Add GNU alias.
* readelf.c (get_osabi_name, get_symbol_binding, get_symbol_type):
Likewise.
* doc/binutils.texi <elfedit>: Update accordingly.
elfcpp/
* elfcpp.h (ELFOSABI): Add ELFOSABI_GNU with value of ELFOSABI_LINUX,
keep ELFOSABI_LINUX as an alias. Remove ELFOSABI_HURD.
gas/
* config/obj-elf.c (obj_elf_type): Use ELFOSABI_GNU name instead of
ELFOSABI_LINUX alias.
* config/tc-ia64.c: Likewise.
include/elf/
* common.h (ELFOSABI_GNU): Define, replaces...
(ELFOSABI_LINUX): ... this, kept as an alias.
(ELFOSABI_HURD): Remove.
ld/testsuite/
* ld-ifunc/ifunc.exp: Update for changed output.
* ld-unique/unique.exp: Likewise.
2011-07-03 13:45:32 +00:00
9c55345c8c
ELFOSABI_GNU
...
bfd/
* elf.c (_bfd_elf_set_osabi): Use ELFOSABI_GNU name instead of
ELFOSABI_LINUX alias.
* elf32-hppa.c: Likewise.
* elf32-i370.c: Likewise.
* elf64-hppa.c: Likewise.
binutils/
* elfedit.c (osabis): Use ELFOSABI_GNU name instead of ELFOSABI_LINUX
alias and ELFOSABI_HURD. Add GNU alias.
* readelf.c (get_osabi_name, get_symbol_binding, get_symbol_type):
Likewise.
* doc/binutils.texi <elfedit>: Update accordingly.
elfcpp/
* elfcpp.h (ELFOSABI): Add ELFOSABI_GNU with value of ELFOSABI_LINUX,
keep ELFOSABI_LINUX as an alias. Remove ELFOSABI_HURD.
gas/
* config/obj-elf.c (obj_elf_type): Use ELFOSABI_GNU name instead of
ELFOSABI_LINUX alias.
* config/tc-ia64.c: Likewise.
include/elf/
* common.h (ELFOSABI_GNU): Define, replaces...
(ELFOSABI_LINUX): ... this, kept as an alias.
(ELFOSABI_HURD): Remove.
ld/testsuite/
* ld-ifunc/ifunc.exp: Update for changed output.
* ld-unique/unique.exp: Likewise.
2011-07-03 13:37:09 +00:00
4cb0953da2
Fix rorx in BMI2.
...
gas/testsuite/
2011-06-30 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2011)
* gas/i386/bmi2.s: Correct rorx tests.
* gas/i386/x86-64-bmi2.s: Likewise.
* gas/i386/bmi2-intel.d: Updated.
* gas/i386/bmi2.d: Likewise.
* gas/i386/x86-64-bmi2-intel.d: Likewise.
* gas/i386/x86-64-bmi2.d: Likewise.
opcodes/
2011-06-30 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2011)
* i386-dis.c (vex_len_table): Correct rorxS.
* i386-opc.tbl: Correct rorx.
* i386-tbl.h: Regenerated.
2011-06-30 15:44:55 +00:00
5f4cb1986d
* gas/arm/addthumb2err.s: New test file.
...
* gas/arm/addthumb2err.d: Test control file.
* gas/arm/addthumb2err.l: Expected error messages.
* config/tc-arm.c (do_t_add_sub): Only allow LSL shifts of less
than 4 in Thumb mode.
2011-06-30 13:42:46 +00:00
68246214df
PR gas/12931
...
* gas/arm/blx-bad.d: Add exrta nop at end of disassembly.
* gas/arm/inst-po-be.d: Add exrta nop at end of disassembly.
* gas/arm/inst-po.d: Add exrta nop at end of disassembly.
2011-06-30 13:07:21 +00:00
f1d0450fe0
PR 12848
...
* gas/arm/thumb-b-bad.s: New test.
* gas/arm/thumb-b-bad.d: Test control file.
* gas/arm/thumb-b-bad.l: Expected error output.
2011-06-30 13:05:04 +00:00
08f10d51f9
PR gas/12848
...
* config/tc-arm.c (BAD_RANGE): New error message define.
(md_apply_fix): Use it.
Fix range check for thumb branch instructions.
2011-06-30 12:52:58 +00:00
a4e064680b
gas/
...
* config/tc-mips.c (append_method): New enum.
(can_swap_branch_p, get_append_method): New functions.
(append_insn): Use get_append_method to decide how the instruction
should be added.
2011-06-29 21:05:29 +00:00
9fe77896a7
gas/
...
* config/tc-mips.c (append_insn): Remove bogus goto.
2011-06-29 20:48:10 +00:00
13408f1edd
gas/
...
* config/tc-mips.c (append_insn): Always clear the history after an
unconditional branch.
2011-06-29 20:46:10 +00:00
ceb94aa50d
gas/
...
* config/tc-mips.c (find_altered_mips16_opcode): New function.
(append_insn): Use it.
opcodes/
* mips16-opc.c (jalrc, jrc): Move earlier in file.
2011-06-29 20:42:48 +00:00
4c26037942
gas/
...
* config/tc-mips.c (insn_uses_reg): Delete.
(gpr_read_mask, gpr_write_mask): New functions.
(fpr_read_mask, fpr_write_mask): Likewise.
(insns_between, nops_for_vr4130, append_insn): Use them.
gas/testsuite/
* gas/mips/mips16-e.d, gas/mips/mips16-f.d,
gas/mips/mipsel16-e.d, gas/mips/mipsel16-f.d,
gas/mips/tmips16-e.d, gas/mips/tmips16-f.d,
gas/mips/tmipsel16-e.d, gas/mips/tmipsel16-f.d: Fix GPR mask.
* gas/mips/reginfo-1.s, gas/mips/reginfo-1a.d,
gas/mips/reginfo-1b.d: New tests.
* gas/mips/mips.exp: Run them.
2011-06-29 20:39:00 +00:00
02b1ab82d7
gas/
...
* config/tc-mips.c (md_mips_end): Call mips_emit_delays.
gas/testsuite/
* gas/mips/24k-triple-stores-9.d: Add -z to dump options and
explicitly match one nop.
* gas/mips/24k-triple-stores-10.d: Likewise.
* gas/mips/24k-triple-stores-11.d: Likewise.
* gas/mips/lifloat.d: Likewise.
* gas/mips/trunc.d: Likewise 1 extra nop.
* gas/mips/vr4111.d: Likewise 2 nops.
2011-06-29 20:35:05 +00:00
49c62a3353
PR gas/12931
...
* config/tc-arm.c (mapping_state): When changing to ARM or THUMB
state set the minimum required alignment of the section.
2011-06-29 16:29:38 +00:00
7016a5d53d
2011-06-29 Tristan Gingold <gingold@adacore.com>
...
* config/tc-i386.c (i386_mach): Convert to ISO-C.
(md_begin, pe_directive_secrel, md_estimate_size_before_relax): Ditto.
(md_convert_frag, md_apply_fix, md_undefined_symbol): Ditto.
(md_section_align, tc_gen_reloc): Ditto.
2011-06-29 11:12:25 +00:00
af24f60c6d
2011-06-28 Tristan Gingold <gingold@adacore.com>
...
* config/tc-alpha.c (s_alpha_pdesc): Fix indentation. Do not
generate dummy fix.
2011-06-28 13:33:33 +00:00
e1f4d6bd07
2011-06-28 Tristan Gingold <gingold@adacore.com>
...
* config/tc-alpha.c (load_expression): Use alloca instead of xmalloc.
(emit_jsrjmp): Ditto.
(tc_gen_reloc): Ditto.
2011-06-28 09:23:53 +00:00
4b1c4d2b62
2011-06-28 Tristan Gingold <gingold@adacore.com>
...
* config/tc-alpha.c (alpha_evax_proc_hash): Remove.
(alpha_evax_proc_data): New variable.
(s_alpha_ent): Prevent nested function. Remove has_insert call.
(s_alpha_pdesc): Do not call demand_empty_rest_of_line in case of
error. Do not search in the hash table. Check if match with .ent.
(s_alpha_name): Remove unused variable.
(md_begin): Remove initialization of alpha_evax_proc_hash.
2011-06-28 07:40:16 +00:00
8aacb050e6
2011-06-27 Tristan Gingold <gingold@adacore.com>
...
* config/tc-alpha.c (add_to_link_pool): Remove basesym parameter.
Locally declare basesym. Add comments. Do not set literal_pool_size.
(load_expression): Adjust call to add_to_link_pool.
(s_alpha_pdesc): Define pdesc symbol using dot.
Do not set literal_pool_size.
(s_alpha_end): Use NULL instead of 0.
2011-06-27 14:08:15 +00:00
bb1d425616
2011-06-27 Tristan Gingold <gingold@adacore.com>
...
* config/obj-evax.c (evax_frob_file_before_adjust): Add comments.
Fix style.
* config/obj-evax.h (struct alpha_linkage_fixups): Remove seg
field. Add comments.
(obj_symbol_type, object_headers, OBJ_SYMFIELD_TYPE): Remove
2011-06-27 10:03:42 +00:00
cec256b1fc
Remove previous patch, committed in error.
2011-06-26 09:19:17 +00:00
96124ee0cf
gas/
...
* config/tc-mips.c (insn_uses_reg): Delete.
(gpr_read_mask, gpr_write_mask): New functions.
(fpr_read_mask, fpr_write_mask): Likewise.
(insns_between, nops_for_vr4130, append_insn): Use them.
gas/testsuite/
* gas/mips/mips16-e.d, gas/mips/mips16-f.d,
gas/mips/mipsel16-e.d, gas/mips/mipsel16-f.d,
gas/mips/tmips16-e.d, gas/mips/tmips16-f.d,
gas/mips/tmipsel16-e.d, gas/mips/tmipsel16-f.d: Fix GPR mask.
2011-06-26 09:16:35 +00:00
ab9794cf6a
gas/
...
* config/tc-mips.c (fix_24k_record_store_info): If the previous
instruction was a store, and the next instructions are unknown,
assume the worst.
gas/testsuite/
* gas/mips/24k-branch-delay-1.d: Do not allow stores to be put
into delay slots.
* gas/mips/24k-triple-stores-1.d: Put the first nop after the
second store, rather than the first.
* gas/mips/24k-triple-stores-2.d: Likewise.
* gas/mips/24k-triple-stores-4.d: Likewise.
* gas/mips/24k-triple-stores-8.d: Likewise.
* gas/mips/24k-triple-stores-3.d: Remove first nop.
* gas/mips/24k-triple-stores-5.d: Likewise.
* gas/mips/24k-triple-stores-6.d: Likewise.
* gas/mips/24k-triple-stores-7.d: Likewise.
* gas/mips/24k-triple-stores-9.d: Add a nop after the second store.
Expect a nop at the end.
* gas/mips/24k-triple-stores-10.d: Put the first nop after the
second store, rather than the first. Expect a nop at the end.
2011-06-26 08:32:50 +00:00
932d1a1b03
gas/
...
PR gas/12915
* config/tc-mips.c (nops_for_vr4130, nops_for_24k, nops_for_insn)
(nops_for_sequence, nops_for_insn_or_target): Add ignore parameters.
(mips_emit_delays, start_noreorder): Update accordingly.
(append_insn): Likewise. Revert original fix for this PR
and use the ignore parameter instead.
gas/testsuite/
* gas/mips/vr4130.s: Add some more ".set noreorder" tests.
* gas/mips/vr4130.d: Update accordingly.
2011-06-25 10:11:46 +00:00
e3a9940106
2011-06-24 Tristan Gingold <gingold@adacore.com>
...
PR gas/11625
* config/obj-evax.c (evax_frob_symbol): Use as_bad instead of abort.
2011-06-24 15:44:41 +00:00
576d330713
2011-06-24 Tristan Gingold <gingold@adacore.com>
...
* config/tc-alpha.c (add_to_link_pool): Remove useless offset
variable. Fix style.
2011-06-24 15:16:03 +00:00
f77ef3e29a
gas/
...
PR gas/12915
* config/tc-mips.c (append_insn): Only consider hazards between the
pre-noreorder block and ip.
gas/testsuite/
* gas/mips/pr12915.s, gas/mips/pr12915.d: New test.
* gas/mips/mips.exp: Run it.
2011-06-23 20:21:38 +00:00
5f1af56b76
2011-06-21 Sameera Deshpande <sameera.deshpande@arm.com>
...
* gas/config/tc-arm.c (vfp_conv): Add check on range of immediate operand
in vcvt instruction between floating-point and fixed-point.
(operand_parse_code): Add "OP_oI32z".
(parse_operands): OP_oI32z case added.
* gas/testsuite/gas/arm/vcvt-bad.d: New test.
* gas/testsuite/gas/arm/vcvt-bad.l: Likewise.
* gas/testsuite/gas/arm/vcvt-bad.s: Likewise.
* gas/testsuite/gas/arm/vcvt.d: Likewise.
* gas/testsuite/gas/arm/vcvt.s: Likewise.
2011-06-21 15:34:27 +00:00
ade78dba78
Revert x86_64-x32-* change.
...
gas/
2011-06-20 H.J. Lu <hongjiu.lu@intel.com>
* configure.tgt: Revert x32 change.
ld/
2011-06-20 H.J. Lu <hongjiu.lu@intel.com>
* configure.tgt: Revert x32 change.
ld/testsuite/
2011-06-20 H.J. Lu <hongjiu.lu@intel.com>
* ld-elf/eh1.d: Revert x32 change.
* ld-elf/eh2.d: Likewise.
* ld-elf/eh3.d: Likewise.
* ld-elf/eh4.d: Likewise.
2011-06-20 13:23:22 +00:00
b47d265edb
* doc/Makefile.am: (CPU_DOCS): Add c-xstormy16.texi.
...
* doc/Makefile.in: Regenerate.
* doc/all.texi: Set XSTORMY16.
* doc/c-xstormy16.texi: New file.
2011-06-20 10:27:56 +00:00
8b7789423c
Fix misc x32 bugs.
...
bfd/
2011-06-19 H.J. Lu <hongjiu.lu@intel.com>
* elf64-x86-64.c (elf_backend_post_process_headers): Defined
for x32.
binutils/testsuite/
2011-06-19 H.J. Lu <hongjiu.lu@intel.com>
* binutils-all/elfedit-1.d: Updated for x32.
gas/
2011-06-19 H.J. Lu <hongjiu.lu@intel.com>
* configure.tgt: Support x32.
ld/
2011-06-19 H.J. Lu <hongjiu.lu@intel.com>
* configure.tgt: Support x32.
ld/testsuite/
2011-06-19 H.J. Lu <hongjiu.lu@intel.com>
* ld-elf/eh1.d: Skip x32.
* ld-elf/eh2.d: Likewise.
* ld-elf/eh3.d: Likewise.
* ld-elf/eh4.d: Likewise.
* ld-elfvsb/elfvsb.exp: Only xfail 64bit x86_64-*-linux*.
* ld-shared/shared.exp: Likewise.
* ld-ifunc/ifunc-1-local-x86.d: Support x32.
* ld-ifunc/ifunc-1-x86.d: Likewise.
* ld-ifunc/ifunc-3a-x86.d: Likewise.
* ld-x86-64/pcrel16.d: Likewise.
* ld-x86-64/x86-64.exp (x86_64tests): Add missing -melf_x86_64.
2011-06-19 21:22:16 +00:00
90b3661c07
* NEWS: Mention addition of TILEPRO and TIKE-Gx support.
2011-06-15 09:12:09 +00:00
2fb4b302aa
gas/
...
2011-06-14 Tristan Gingold <gingold@adacore.com>
* config/tc-ppc.h (struct ppc_tc_sy): Complete comment on within.
(tc_new_dot_label): Define.
(ppc_new_dot_label): Declare.
* config/tc-ppc.c (ppc_frob_label): Set within target field.
(ppc_fix_adjustable): Use this field to adjust the reloc.
(ppc_new_dot_label): New function.
gas/testsuite/
2011-06-14 Tristan Gingold <gingold@adacore.com>
* gas/ppc/test1xcoff32.d: Adjust for csect anchor.
2011-06-14 09:03:52 +00:00
85b0f90c2b
* po/POTFILES.in: Regenerate.
2011-06-14 05:11:15 +00:00
aa137e4d51
* Makefile.am (ALL_MACHINES): Add cpu-tilegx.lo and cpu-tilepro.lo.
...
(ALL_MACHINE_CFILES): Add cpu-tilegx.c and cpu-tilepro.c.
(BFD32_BACKENDS): Add elf32-tilegx.lo, elf32-tilepro.lo,
and elfxx-tilegx.lo.
(BFD32_BACKENDS_CFILES): Add elf32-tilegx.c elf32-tilepro.c, and
elfxx-tilegx.c.
(BFD64_BACKENDS): Add elf64-tilegx.lo.
(BFD64_BACKENDS_CFILES): Add elf64-tilegx.c.
* Makefile.in: Regenerate.
* arctures.c (bfd_architecture): Define bfd_arch_tilepro,
bfd_arch_tilegx, bfd_mach_tilepro, bfd_mach_tilegx.
(bfd_arch_info): Add bfd_tilegx_arch, bfd_tilepro_arch.
(bfd_archures_list): Add bfd_tilegx_arch, bfd_tilepro_arch.
bfd-in2.h: Regenerate.
* config.bfd: Handle tilegx-*-* and tilepro-*-*.
* configure.in: Handle bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec,
and bfd_elf64_tilegx_vec.
* configure: Regenerate.
* elf-bfd.h (enum elf_target_id): Define TILEGX_ELF_DATA and
TILEPRO_ELF_DATA.
* libbfd.h: Regenerate.
* reloc.c: Add BFD_RELOC_TILEPRO_{COPY, GLOB_DAT, JMP_SLOT,
RELATIVE, BROFF_X1, JOFFLONG_X1, JOFFLONG_X1_PLT, IMM8_X0,
IMM8_Y0, IMM8_X1, IMM8_Y1, DEST_IMM8_X1, MT_IMM15_X1, MF_IMM15_X1,
IMM16_X0, IMM16_X1, IMM16_X0_LO, IMM16_X1_LO, IMM16_X0_HI,
IMM16_X1_HI, IMM16_X0_HA, IMM16_X1_HA, IMM16_X0_PCREL,
IMM16_X1_PCREL, IMM16_X0_LO_PCREL, IMM16_X1_LO_PCREL,
IMM16_X0_HI_PCREL, IMM16_X1_HI_PCREL, IMM16_X0_HA_PCREL,
IMM16_X1_HA_PCREL, IMM16_X0_GOT, IMM16_X1_GOT, IMM16_X0_GOT_LO,
IMM16_X1_GOT_LO, IMM16_X0_GOT_HI, IMM16_X1_GOT_HI,
IMM16_X0_GOT_HA, IMM16_X1_GOT_HA, MMSTART_X0, MMEND_X0,
MMSTART_X1, MMEND_X1, SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1,
IMM16_X0_TLS_GD, IMM16_X1_TLS_GD, IMM16_X0_TLS_GD_LO,
IMM16_X1_TLS_GD_LO, IMM16_X0_TLS_GD_HI, IMM16_X1_TLS_GD_HI,
IMM16_X0_TLS_GD_HA, IMM16_X1_TLS_GD_HA, IMM16_X0_TLS_IE,
IMM16_X1_TLS_IE, IMM16_X0_TLS_IE_LO, IMM16_X1_TLS_IE_LO,
IMM16_X0_TLS_IE_HI, IMM16_X1_TLS_IE_HI, IMM16_X0_TLS_IE_HA,
IMM16_X1_TLS_IE_HA, TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32}
Add BFD_RELOC_TILEGX_{HW0, HW1, HW2, HW3, HW0_LAST, HW1_LAST,
HW2_LAST, COPY, GLOB_DAT, JMP_SLOT, RELATIVE, BROFF_X1,
JUMPOFF_X1, JUMPOFF_X1_PLT, IMM8_X0, IMM8_Y0, IMM8_X1, IMM8_Y1,
DEST_IMM8_X1, MT_IMM14_X1, MF_IMM14_X1, MMSTART_X0, MMEND_X0,
SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1, IMM16_X0_HW0,
IMM16_X1_HW0, IMM16_X0_HW1, IMM16_X1_HW1, IMM16_X0_HW2,
IMM16_X1_HW2, IMM16_X0_HW3, IMM16_X1_HW3, IMM16_X0_HW0_LAST,
IMM16_X1_HW0_LAST, IMM16_X0_HW1_LAST, IMM16_X1_HW1_LAST,
IMM16_X0_HW2_LAST, IMM16_X1_HW2_LAST, IMM16_X0_HW0_PCREL,
IMM16_X1_HW0_PCREL, IMM16_X0_HW1_PCREL, IMM16_X1_HW1_PCREL,
IMM16_X0_HW2_PCREL, IMM16_X1_HW2_PCREL, IMM16_X0_HW3_PCREL,
IMM16_X1_HW3_PCREL, IMM16_X0_HW0_LAST_PCREL,
IMM16_X1_HW0_LAST_PCREL, IMM16_X0_HW1_LAST_PCREL,
IMM16_X1_HW1_LAST_PCREL, IMM16_X0_HW2_LAST_PCREL,
IMM16_X1_HW2_LAST_PCREL, IMM16_X0_HW0_GOT, IMM16_X1_HW0_GOT,
IMM16_X0_HW1_GOT, IMM16_X1_HW1_GOT, IMM16_X0_HW2_GOT,
IMM16_X1_HW2_GOT, IMM16_X0_HW3_GOT, IMM16_X1_HW3_GOT,
IMM16_X0_HW0_LAST_GOT, IMM16_X1_HW0_LAST_GOT,
IMM16_X0_HW1_LAST_GOT, IMM16_X1_HW1_LAST_GOT,
IMM16_X0_HW2_LAST_GOT, IMM16_X1_HW2_LAST_GOT, IMM16_X0_HW0_TLS_GD,
IMM16_X1_HW0_TLS_GD, IMM16_X0_HW1_TLS_GD, IMM16_X1_HW1_TLS_GD,
IMM16_X0_HW2_TLS_GD, IMM16_X1_HW2_TLS_GD, IMM16_X0_HW3_TLS_GD,
IMM16_X1_HW3_TLS_GD, IMM16_X0_HW0_LAST_TLS_GD,
IMM16_X1_HW0_LAST_TLS_GD, IMM16_X0_HW1_LAST_TLS_GD,
IMM16_X1_HW1_LAST_TLS_GD, IMM16_X0_HW2_LAST_TLS_GD,
IMM16_X1_HW2_LAST_TLS_GD, IMM16_X0_HW0_TLS_IE,
IMM16_X1_HW0_TLS_IE, IMM16_X0_HW1_TLS_IE, IMM16_X1_HW1_TLS_IE,
IMM16_X0_HW2_TLS_IE, IMM16_X1_HW2_TLS_IE, IMM16_X0_HW3_TLS_IE,
IMM16_X1_HW3_TLS_IE, IMM16_X0_HW0_LAST_TLS_IE,
IMM16_X1_HW0_LAST_TLS_IE, IMM16_X0_HW1_LAST_TLS_IE,
IMM16_X1_HW1_LAST_TLS_IE, IMM16_X0_HW2_LAST_TLS_IE,
IMM16_X1_HW2_LAST_TLS_IE, TLS_DTPMOD64, TLS_DTPOFF64, TLS_TPOFF64,
TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32}
* targets.c (bfd_elf32_tilegx_vec): Declare.
(bfd_elf32_tilepro_vec): Declare.
(bfd_elf64_tilegx_vec): Declare.
(bfd_target_vector): Add bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec,
and bfd_elf64_tilegx_vec.
* cpu-tilegx.c: New file.
* cpu-tilepro.c: New file.
* elf32-tilepro.h: New file.
* elf32-tilepro.c: New file.
* elf32-tilegx.c: New file.
* elf32-tilegx.h: New file.
* elf64-tilegx.c: New file.
* elf64-tilegx.h: New file.
* elfxx-tilegx.c: New file.
* elfxx-tilegx.h: New file.
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-tilegx.c and
config/tc-tilepro.c.
(TARGET_CPU_HFILES): Add config/tc-tilegx.h and
config/tc-tilepro.h.
* Makefile.in: Regenerate.
* configure.tgt (tilepro-*-*): New.
(tilegx-*-*): Likewise.
* config/tc-tilegx.c: New file.
* config/tc-tilegx.h: Likewise.
* config/tc-tilepro.h: Likewise.
* config/tc-tilepro.c: Likewise.
* doc/Makefile.am (CPU_DOCS): Add c-tilegx.texi and
c-tilepro.texi.
* doc/Makefile.in: Regenerate.
* doc/all.texi (TILEGX): Define.
(TILEPRO): Define.
* doc/as.texinfo: Add Tile-Gx and TILEPro documentation. Include
c-tilegx.texi and c-tilepro.texi.
* doc/c-tilegx.texi: New.
* doc/c-tilepro.texi: New.
* gas/tilepro/t_constants.s: New file.
* gas/tilepro/t_constants.d: Likewise.
* gas/tilepro/t_insns.s: Likewise.
* gas/tilepro/tilepro.exp: Likewise.
* gas/tilepro/t_insns.d: Likewise.
* gas/tilegx/tilegx.exp: Likewise.
* gas/tilegx/t_insns.d: Likewise.
* gas/tilegx/t_insns.s: Likewise.
* dis-asm.h (print_insn_tilegx): Declare.
(print_insn_tilepro): Likewise.
* tilegx.h: New file.
* tilepro.h: New file.
* common.h: Add EM_TILEGX.
* tilegx.h: New file.
* tilepro.h: New file.
* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32tilegx.c and
eelf32tilepro.c.
(ALL_64_EMULATION_SOURCES): Add eelf64tilegx.c.
(eelf32tilegx.c): New target.
(eelf32tilepro.c): Likewise.
(eelf64tilegx.c): Likewise.
* Makefile.in: Regenerate.
* configure.tgt: Handle tilegx-*-* and tilepro-*-*.
* emulparams/elf32tilegx.sh: New file.
* emulparams/elf64tilegx.sh: New file.
* emulparams/elf32tilepro.sh: New file.
* ld-elf/eh5.d: Don't run on tile*.
* ld-srec/srec.exp: xfail on tile*.
* ld-tilegx/external.s: New file.
* ld-tilegx/reloc.d: New file.
* ld-tilegx/reloc.s: New file.
* ld-tilegx/tilegx.exp: New file.
* ld-tilepro/external.s: New file.
* ld-tilepro/reloc.d: New file.
* ld-tilepro/reloc.s: New file.
* ld-tilepro/tilepro.exp: New file.
* Makefile.am (TARGET_LIBOPCODES_CFILES): Add tilegx-dis.c,
tilegx-opc.c, tilepro-dis.c, and tilepro-opc.c.
* Makefile.in: Regenerate.
* configure.in: Handle bfd_tilegx_arch and bfd_tilepro_arch.
* configure: Regenerate.
* disassemble.c (disassembler): Add ARCH_tilegx and ARCH_tilepro.
* po/POTFILES.in: Regenerate.
* tilegx-dis.c: New file.
* tilegx-opc.c: New file.
* tilepro-dis.c: New file.
* tilepro-opc.c: New file.
2011-06-13 15:18:54 +00:00
af199b0601
PR gas/12854
...
Add additional checks for extraneous shifts and extra tests in the testsuite.
2011-06-13 12:50:18 +00:00
94342ec38b
PR gas/12854
...
* gas/arm/shift-bad.s: New test.
* gas/arm/shift-bad.l: Expcted error output.
* gas/arm/shift-bad.s: New control file.
* config/tc-arm.c (do_shift): Do not allow shift operations at the
end of a register based shift insn.
(do_t_shift): Likewise.
2011-06-13 09:57:35 +00:00
f9e53abc4a
* config/tc-score.c (s3_my_get_expression): Delete unused local
...
variable 'seg'.
(s3_do_ldst_insn): Delete unused local variable 'strbak'.
(s3_do16_ldst_insn): Delete unused local variable 'temp'.
(s3_do_macro_bcmp): Zero inst_expand array.
(s3_do_macro_bcmpz): Likewise.
(s3_s_score_end): Delete unused local variable 'dot'.
(s3_gen_reloc): Delete unused local variables 'f', 's', and 'e'.
* config/tc-score7.c (s7_my_get_expression): Delete unused local
variable 'seg'.
(s7_do_ldst_insn): Delete unused local variable 'strbak'.
(s7_b32_relax_to_b16): Delete unused local variables 'r_old' and
'r_new'.
(s7_s_score_end): Delete unused local variable 'dot'.
(s7_relax_frag): Delete unused local variable 'relax_size'.
(s7_gen_reloc): Delete unused local variables 'f', 's', and 'e'.
2011-06-13 09:45:28 +00:00
551497ed0e
Update lzcnt testcases.
...
2011-06-12 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/arch-10-lzcnt.d: Updated.
* gas/i386/x86-64-arch-2-lzcnt.d: Likewise.
2011-06-13 02:41:24 +00:00
6c30d220f1
Support AVX Programming Reference (June, 2011).
...
gas/
2011-06-10 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2011)
* config/tc-i386.c (i386_error): Add invalid_vsib_address and
unsupported_vector_index_register.
(cpu_arch): Add .avx2, .bmi2, .lzcnt and .invpcid.
(check_VecOperands): New.
(match_template): Call check_VecOperands. Handle
invalid_vsib_address and unsupported_vector_index_register.
(build_modrm_byte): Support VecSIB. Check register-only source
operand when two source operands are swapped.
(i386_index_check): Allow Xmm/Ymm index registers.
* doc/c-i386.texi: Document avx2/.avx2, bmi2/.bmi2, lzcnt/.lzcnt
and invpcid./invpcid.
gas/testsuite/
2011-06-10 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2011)
* gas/i386/arch-10-1.l: Updated.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/arch-10.s: Add LZCNT to comments.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/arch-10-lzcnt.d: New.
* gas/i386/avx-gather-intel.d: Likewise.
* gas/i386/avx-gather.d: Likewise.
* gas/i386/avx-gather.s: Likewise.
* gas/i386/avx2-intel.d: Likewise.
* gas/i386/avx2.d: Likewise.
* gas/i386/avx2.s: Likewise
* gas/i386/avx256int-intel.d: Likewise.
* gas/i386/avx256int.d: Likewise.
* gas/i386/avx256int.s: Likewise.
* gas/i386/bmi2-intel.d: Likewise.
* gas/i386/bmi2.d: Likewise.
* gas/i386/bmi2.s: Likewise.
* gas/i386/inval-invpcid.l:Likewise.
* gas/i386/inval-invpcid.s: Likewise.
* gas/i386/invpcid-intel.d: Likewise.
* gas/i386/invpcid.d: Likewise.
* gas/i386/invpcid.s: Likewise.
* gas/i386/x86-64-arch-2-lzcnt.d: Likewise.
* gas/i386/x86-64-avx-gather-intel.d: Likewise.
* gas/i386/x86-64-avx-gather.d: Likewise.
* gas/i386/x86-64-avx-gather.s: Likewise.
* gas/i386/x86-64-avx2-intel.d: Likewise.
* gas/i386/x86-64-avx2.d: Likewise.
* gas/i386/x86-64-avx2.s: Likewise.
* gas/i386/x86-64-avx256int-intel.d: Likewise.
* gas/i386/x86-64-avx256int.d: Likewise.
* gas/i386/x86-64-avx256int.s: Likewise.
* gas/i386/x86-64-bmi2-intel.d: Likewise.
* gas/i386/x86-64-bmi2.d: Likewise.
* gas/i386/x86-64-bmi2.s: Likewise.
* gas/i386/x86-64-inval-invpcid.l: Likewise.
* gas/i386/x86-64-inval-invpcid.s: Likewise.
* gas/i386/x86-64-invpcid-intel.d: Likewise.
* gas/i386/x86-64-invpcid.d: Likewise.
* gas/i386/x86-64-invpcid.s: Likewise.
opcodes/
2011-06-10 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2011)
* i386-dis.c (XMGatherQ): New.
* i386-dis.c (EXxmm_mb): New.
(EXxmm_mb): Likewise.
(EXxmm_mw): Likewise.
(EXxmm_md): Likewise.
(EXxmm_mq): Likewise.
(EXxmmdw): Likewise.
(EXxmmqd): Likewise.
(VexGatherQ): Likewise.
(MVexVSIBDWpX): Likewise.
(MVexVSIBQWpX): Likewise.
(xmm_mb_mode): Likewise.
(xmm_mw_mode): Likewise.
(xmm_md_mode): Likewise.
(xmm_mq_mode): Likewise.
(xmmdw_mode): Likewise.
(xmmqd_mode): Likewise.
(ymmxmm_mode): Likewise.
(vex_vsib_d_w_dq_mode): Likewise.
(vex_vsib_q_w_dq_mode): Likewise.
(MOD_VEX_0F385A_PREFIX_2): Likewise.
(MOD_VEX_0F388C_PREFIX_2): Likewise.
(MOD_VEX_0F388E_PREFIX_2): Likewise.
(PREFIX_0F3882): Likewise.
(PREFIX_VEX_0F3816): Likewise.
(PREFIX_VEX_0F3836): Likewise.
(PREFIX_VEX_0F3845): Likewise.
(PREFIX_VEX_0F3846): Likewise.
(PREFIX_VEX_0F3847): Likewise.
(PREFIX_VEX_0F3858): Likewise.
(PREFIX_VEX_0F3859): Likewise.
(PREFIX_VEX_0F385A): Likewise.
(PREFIX_VEX_0F3878): Likewise.
(PREFIX_VEX_0F3879): Likewise.
(PREFIX_VEX_0F388C): Likewise.
(PREFIX_VEX_0F388E): Likewise.
(PREFIX_VEX_0F3890..PREFIX_VEX_0F3893): Likewise.
(PREFIX_VEX_0F38F5): Likewise.
(PREFIX_VEX_0F38F6): Likewise.
(PREFIX_VEX_0F3A00): Likewise.
(PREFIX_VEX_0F3A01): Likewise.
(PREFIX_VEX_0F3A02): Likewise.
(PREFIX_VEX_0F3A38): Likewise.
(PREFIX_VEX_0F3A39): Likewise.
(PREFIX_VEX_0F3A46): Likewise.
(PREFIX_VEX_0F3AF0): Likewise.
(VEX_LEN_0F3816_P_2): Likewise.
(VEX_LEN_0F3819_P_2): Likewise.
(VEX_LEN_0F3836_P_2): Likewise.
(VEX_LEN_0F385A_P_2_M_0): Likewise.
(VEX_LEN_0F38F5_P_0): Likewise.
(VEX_LEN_0F38F5_P_1): Likewise.
(VEX_LEN_0F38F5_P_3): Likewise.
(VEX_LEN_0F38F6_P_3): Likewise.
(VEX_LEN_0F38F7_P_1): Likewise.
(VEX_LEN_0F38F7_P_2): Likewise.
(VEX_LEN_0F38F7_P_3): Likewise.
(VEX_LEN_0F3A00_P_2): Likewise.
(VEX_LEN_0F3A01_P_2): Likewise.
(VEX_LEN_0F3A38_P_2): Likewise.
(VEX_LEN_0F3A39_P_2): Likewise.
(VEX_LEN_0F3A46_P_2): Likewise.
(VEX_LEN_0F3AF0_P_3): Likewise.
(VEX_W_0F3816_P_2): Likewise.
(VEX_W_0F3818_P_2): Likewise.
(VEX_W_0F3819_P_2): Likewise.
(VEX_W_0F3836_P_2): Likewise.
(VEX_W_0F3846_P_2): Likewise.
(VEX_W_0F3858_P_2): Likewise.
(VEX_W_0F3859_P_2): Likewise.
(VEX_W_0F385A_P_2_M_0): Likewise.
(VEX_W_0F3878_P_2): Likewise.
(VEX_W_0F3879_P_2): Likewise.
(VEX_W_0F3A00_P_2): Likewise.
(VEX_W_0F3A01_P_2): Likewise.
(VEX_W_0F3A02_P_2): Likewise.
(VEX_W_0F3A38_P_2): Likewise.
(VEX_W_0F3A39_P_2): Likewise.
(VEX_W_0F3A46_P_2): Likewise.
(MOD_VEX_0F3818_PREFIX_2): Removed.
(MOD_VEX_0F3819_PREFIX_2): Likewise.
(VEX_LEN_0F60_P_2..VEX_LEN_0F6D_P_2): Likewise.
(VEX_LEN_0F70_P_1..VEX_LEN_0F76_P_2): Likewise.
(VEX_LEN_0FD1_P_2..VEX_LEN_0FD5_P_2): Likewise.
(VEX_LEN_0FD7_P_2_M_1..VEX_LEN_0F3819_P_2_M_0): Likewise.
(VEX_LEN_0F381C_P_2..VEX_LEN_0F3840_P_2): Likewise.
(VEX_LEN_0F3A0E_P_2): Likewise.
(VEX_LEN_0F3A0F_P_2): Likewise.
(VEX_LEN_0F3A42_P_2): Likewise.
(VEX_LEN_0F3A4C_P_2): Likewise.
(VEX_W_0F3818_P_2_M_0): Likewise.
(VEX_W_0F3819_P_2_M_0): Likewise.
(prefix_table): Updated.
(three_byte_table): Likewise.
(vex_table): Likewise.
(vex_len_table): Likewise.
(vex_w_table): Likewise.
(mod_table): Likewise.
(putop): Handle "LW".
(intel_operand_size): Handle xmm_mb_mode, xmm_mw_mode,
xmm_md_mode, xmm_mq_mode, xmmdw_mode, xmmqd_mode, ymmxmm_mode,
vex_vsib_d_w_dq_mode, vex_vsib_q_w_dq_mode.
(OP_EX): Likewise.
(OP_E_memory): Handle vex_vsib_d_w_dq_mode and
vex_vsib_q_w_dq_mode.
(OP_XMM): Handle vex_vsib_q_w_dq_mode.
(OP_VEX): Likewise.
* i386-gen.c (cpu_flag_init): Add CpuAVX2 to CPU_ANY_SSE_FLAGS
and CPU_ANY_AVX_FLAGS. Add CPU_BMI2_FLAGS, CPU_LZCNT_FLAGS,
CPU_INVPCID_FLAGS and CPU_AVX2_FLAGS.
(cpu_flags): Add CpuAVX2, CpuBMI2, CpuLZCNT and CpuINVPCID.
(opcode_modifiers): Add VecSIB.
* i386-opc.h (CpuAVX2): New.
(CpuBMI2): Likewise.
(CpuLZCNT): Likewise.
(CpuINVPCID): Likewise.
(VecSIB128): Likewise.
(VecSIB256): Likewise.
(VecSIB): Likewise.
(i386_cpu_flags): Add cpuavx2, cpubmi2, cpulzcnt and cpuinvpcid.
(i386_opcode_modifier): Add vecsib.
* i386-opc.tbl: Add invpcid, AVX2 and BMI2 instructions.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2011-06-10 21:27:40 +00:00
fd596c16fb
PR gas/12861
...
* config/tc-cr16.c (tc_gen_reloc): Remove unused local variable
code.
(check_cinv_options): Remove unused local variables. Make
function void.
(md_assemble): Remove unused local variable.
2011-06-09 15:43:52 +00:00
c56791bbad
2011-06-09 James Greenhalgh <james.greenhalgh@arm.com>
...
* config/tc-arm.c (do_ldrd): Warn in unpredictable cases.
2011-06-09 James Greenhalgh <james.greenhalgh@arm.com>
* gas/arm/ldrd-unpredicatble.d: New testcase.
* gas/arm/ldrd-unpredicatble.s: Likewise.
* gas/arm/ldrd-unpredicatble.l: Likewise.
2011-06-09 09:59:34 +00:00
331fe61622
Fix attributation of previous delta.
2011-06-03 14:44:04 +00:00
a4482bb643
PR gas/12698
...
* config/tc-arm.c (parse_psr): Set m_profile to false when
assembling for any architecture.
2011-06-03 14:42:47 +00:00
26d97720ed
gas/
...
* config/tc-arm.c (parse_address_main): Handle -0 offsets.
(encode_arm_addr_mode_2): Set default sign of zero here ...
(encode_arm_addr_mode_3): ... and here.
(encode_arm_cp_address): ... and here.
(md_apply_fix): Use default sign of zero here.
gas/testsuite/
* gas/arm/inst.d: Adjust for signed zero offsets.
* gas/arm/ldst-offset0.d: New test.
* gas/arm/ldst-offset0.s: New test.
* gas/arm/offset-1.d: New test.
* gas/arm/offset-1.s: New test.
ld/testsuite/
Adjust tests for zero offset formatting.
* ld-arm/cortex-a8-fix-bcc-plt.d: Adjust.
* ld-arm/farcall-arm-arm-pic-veneer.d: Adjust.
* ld-arm/farcall-arm-thumb.d: Adjust.
* ld-arm/farcall-group-size2.d: Adjust.
* ld-arm/farcall-group.d: Adjust.
* ld-arm/farcall-mix.d: Adjust.
* ld-arm/farcall-mix2.d: Adjust.
* ld-arm/farcall-mixed-lib-v4t.d: Adjust.
* ld-arm/farcall-mixed-lib.d: Adjust.
* ld-arm/farcall-thumb-arm-blx-pic-veneer.d: Adjust.
* ld-arm/farcall-thumb-arm-pic-veneer.d: Adjust.
* ld-arm/farcall-thumb-thumb.d: Adjust.
* ld-arm/ifunc-10.dd: Adjust.
* ld-arm/ifunc-3.dd: Adjust.
* ld-arm/ifunc-4.dd: Adjust.
* ld-arm/ifunc-5.dd: Adjust.
* ld-arm/ifunc-6.dd: Adjust.
* ld-arm/ifunc-7.dd: Adjust.
* ld-arm/ifunc-8.dd: Adjust.
* ld-arm/jump-reloc-veneers-long.d: Adjust.
* ld-arm/tls-longplt-lib.d: Adjust.
* ld-arm/tls-thumb1.d: Adjust.
opcodes/
* arm-dis.c (print_insn_coprocessor): Explicitly print #-0
as address offset.
(print_arm_address): Likewise. Elide positive #0 appropriately.
(print_insn_arm): Likewise.
2011-06-02 15:32:10 +00:00
cc643b88f1
Fix spelling mistakes.
2011-06-02 13:43:24 +00:00
3b2f079304
2011-05-31 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (arm_cpus): Add Cortex-R5.
(arm_extensions): Allow idiv on ARMv7-R.
* doc/c-arm.text: Update idiv extension restrictions.
gas/testsuite/
* gas/arm/arm-idiv-bad.d: New test.
* gas/arm/arm-idiv-bad.s: New test.
* gas/arm/arm-idiv-bad.l: New test.
* gas/arm/arm-idiv.d: New test.
* gas/arm/arm-idiv.s: New test.
include/
* opcode/arm.h (ARM_ARCH_V7R_IDIV): Define.
2011-05-31 14:12:55 +00:00
b58843019a
2011-05-31 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (arm_force_relocation): Resolve all pc-relative
loads.
gas/testsuite/
* gas/arm/ldr-global.d: New test.
* gas/arm/ldr-global.s: New test.
2011-05-31 14:10:07 +00:00
10960bfbce
2011-05-31 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (do_t_branch): Avoid relaxing branches to constant
addresses.
gas/testsuite/
* arm/t2-branch-global.d: New test.
* arm/t2-branch-global.s: New test.
2011-05-31 14:04:13 +00:00
6e7ce2cdd3
2011-05-31 Paul Brook <paul@codesourcery.com>
...
Nathan Sidwell <nathan@codesourcery.com>
gas/
* config/tc-arm.c (fix_new_arm): Create an absolute symbol for
pc-relative fixes to constants.
* config/tc-arm.h (TC_FORCE_RELOCATATION_ABS): Define.
ld/testsuite/
* ld-arm/abs-call-1.d: New.
* ld-arm/abs-call-1.s: New.
* ld-arm/arm-elf.exp: Add it.
2011-05-31 13:40:04 +00:00
8e1adb8d3c
* config/tc-s390.c (md_begin): Remove unused variable dup_insn.
2011-05-27 12:56:06 +00:00
c8fa16ed5a
2011-05-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
...
* config/tc-s390.c (md_gather_operands): Fix check for floating
register pair operands.
2011-05-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* opcode/s390.h: Replace S390_OPERAND_REG_EVEN with
S390_OPERAND_REG_PAIR.
2011-05-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* s390-opc.c: Replace S390_OPERAND_REG_EVEN with
S390_OPERAND_REG_PAIR. Fix INSTR_RRF_0UFEF instruction type.
* s390-opc.txt: Fix cxr instruction type.
2011-05-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* gas/s390/esa-g5.d: Fix fp register pair operands.
* gas/s390/esa-g5.s: Likewise.
* gas/s390/zarch-z196.d: Likewise.
* gas/s390/zarch-z196.s: Likewise.
* gas/s390/zarch-z9-109.d: Likewise.
* gas/s390/zarch-z9-109.s: Likewise.
* gas/s390/zarch-z9-ec.d: Likewise.
* gas/s390/zarch-z9-ec.s: Likewise.
2011-05-24 16:13:31 +00:00
5e4b319cdc
2011-05-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
...
* config/tc-s390.c (md_gather_operands): Emit an error for odd
numbered registers used as register pair operand.
2011-05-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* opcode/s390.h: Add S390_OPCODE_REG_EVEN flag.
2011-05-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* s390-opc.c: Add new instruction types marking register pair
operands.
* s390-opc.txt: Match instructions having register pair operands
to the new instruction types.
2011-05-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* gas/s390/esa-g5.d: Fix register pair operands.
* gas/s390/esa-g5.s: Likewise.
* gas/s390/esa-z9-109.d: Likewise.
* gas/s390/esa-z9-109.s: Likewise.
* gas/s390/zarch-z196.d: Likewise.
* gas/s390/zarch-z196.s: Likewise.
* gas/s390/zarch-z9-109.d: Likewise.
* gas/s390/zarch-z9-109.s: Likewise.
* gas/s390/zarch-z900.d: Likewise.
* gas/s390/zarch-z900.s: Likewise.
* gas/s390/zarch-z990.d: Likewise.
* gas/s390/zarch-z990.s: Likewise.
2011-05-24 13:33:57 +00:00
Maciej W. Rozycki
Matthew Gretton-Dann
DJ Delorie
Nick Clifton
Walter Lee
Joern Rennecke
Mike Frysinger
Julian Brown
Alan Modra
Tristan Gingold
Andreas Krebbel
Jan Beulich
Kai Tietz
David S. Miller
Andreas Schwab
Richard Sandiford
H.J. Lu
Richard Henderson
Thomas Schwinge
Richard Earnshaw
Nathan Sidwell
Paul Brook