gcc:
* config/sh/sh.h (EXTRA_SPECS): Add subtarget_asm_relax_spec and
subtarget_asm_isa_spec.
(SUBTARGET_ASM_RELAX_SPEC, SUBTARGET_ASM_ISA_SPEC): Define.
(ASM_SPEC): Define as SH_ASM_SPEC.
(SH_ASM_SPEC): New; take the role of ASM_SPEC, but safe from svr4.h.
Use subtarget_asm_relax_spec and subtarget_asm_isa_spec.
* config/sh/elf.h (ASM_SPEC): Use SH_ASM_SPEC.
(SUBTARGET_ASM_ISA_SPEC): Undef / define.
gcc/testsuite:
gcc.dg/sh-relax.c: New test.
include/elf:
* sh.h (EF_SH_MERGE_MACH): Make sure SH2E & SH3/SH3E merge to SH3E,
and SH2E & SH4 merge to SH4, not SH2E.
gas:
* config/tc-sh.c (sh_dsp): Replace with preset_target_arch.
(md_begin): Use preset_target_arch.
(md_longopts): Make isa option unconditional.
(md_parse_option): Make OPTION_DSP and OPTION_ISA sh4 / any
set preset_target_arch.
(md_apply_fix3): If BFD_ASSEMBLER, adjust SWITCH_TABLE fixups
by -S_GET_VALUE (fixP->fx_subsy).
(tc_gen_reloc): For SWITCH_TABLE fixups, the symbol is fixp->fx_subsy,
and the addend is 0.
Adjust addend of R_SH_IND12W relocations by fixp->fx_offset - 4.
* config/tc-sh.h (TC_FORCE_RELOCATION_SUB_LOCAL): Define.
bfd:
elf32-sh.c (sh_elf_howto_tab): Make R_SH_IND12W into an ordinary
relocation (no special function), and make it non-partial_inplace.
(sh_elf_relax_section): When creating a bsr, use a consistent value
no matter if the symbol is extern or not; set addend to -4.
Don't swap load / non-load instructions for SH4.
(sh_elf_relax_delete_bytes): In R_SH_IND12W case, check the offset
rather than if the symbol is external to determine if adjusting the
offset makes sense. Adjust the addend too if appropriate.
(sh_elf_relocate_section): In R_SH_IND12W, don't fiddle with the
relocation.
* mips.h: Fix missing space in comment.
(INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4, INSN_ISA5)
(INSN_ISA32, INSN_ISA32R2, INSN_ISA64): Shift values right
by four bits.
2003-01-02 Chris Demetriou <cgd@broadcom.com>
* config/tc-mips.c: Update copyright years to include 2003.
(mips_ip): Fix indentation of "+A", "+B", and "+C" handling.
Additionally, clean up their code slightly and clean up their
comments some more.
* doc/c-mips.texi: Add MIPS32r2 to ".set mipsN" documentation.
[ gas/testsuite/ChangeLog ]
2003-01-02 Chris Demetriou <cgd@broadcom.com>
* gas/mips/elf_arch_mips32r2.d: Fix file description comment.
[ include/opcode/ChangeLog ]
2003-01-02 Chris Demetriou <cgd@broadcom.com>
* mips.h: Update copyright years to include 2002 (which had
been missed previously) and 2003. Make comments about "+A",
"+B", and "+C" operand types more descriptive.
2002-12-31 Chris Demetriou <cgd@broadcom.com>
* config/tc-mips.c (validate_mips_insn, mips_ip): Recognize
the "+D" operand, which will be used only by the disassembler.
[ gas/testsuite/ChangeLog ]
2002-12-31 Chris Demetriou <cgd@broadcom.com>
* gas/mips/cp0sel-names-mips32.d: New test.
* gas/mips/cp0sel-names-mips32r2.d: New test.
* gas/mips/cp0sel-names-mips64.d: New test.
* gas/mips/cp0sel-names-numeric.d: New test.
* gas/mips/cp0sel-names-sb1.d: New test.
* gas/mips/cp0sel-names.s: New test source file.
* gas/mips/mips.exp: Run new tests.
[ include/opcode/ChangeLog ]
2002-12-31 Chris Demetriou <cgd@broadcom.com>
* mips.h: Note that the "+D" operand type name is now used.
[ opcodes/ChangeLog ]
2002-12-31 Chris Demetriou <cgd@broadcom.com>
* mips-dis.c (mips_cp0sel_name): New structure.
(mips_cp0sel_names_mips3264, mips_cp0sel_names_mips3264r2)
(mips_cp0sel_names_sb1): New arrays.
(mips_arch_choice): New structure members "cp0sel_names" and
"cp0sel_names_len".
(mips_arch_choices): Add references to new cp0sel_names arrays
as appropriate, and make all existing entries reference
appropriate mips_XXX_names_numeric arrays rather than simply
using NULL.
(mips_cp0sel_names, mips_cp0sel_names_len): New variables.
(lookup_mips_cp0sel_name): New function.
(set_default_mips_dis_options): Set mips_cp0sel_names and
mips_cp0sel_names_len as appropriate. Remove now-unnecessary
checks for NULL register name arrays.
(parse_mips_dis_option): Likewise.
(print_insn_arg): Handle "+D" operand type.
* mips-opc.c (mips_builtin_opcodes): Add new "+D" variants
of mfc0, mtc0, dmfc0, and dmtc0 to print CP0+sel register
names symbolically.
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* aoutx.h (NAME(aout,machine_type)): Add bfd_mach_mipsisa32r2 case.
* archures.c (bfd_mach_mipsisa32r2): New define.
* bfd-in2.h: Regenerate.
* cpu-mips.c (I_mipsisa32r2): New enum value.
(arch_info_struct): Add entry for I_mipsisa32r2.
* elfxx-mips.c (elf_mips_isa, _bfd_elf_mips_mach)
(_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_32R2.
(_bfd_mips_elf_final_write_processing): Add
bfd_mach_mipsisa32r2 case.
(_bfd_mips_elf_merge_private_bfd_data): Handle merging of
binaries marked as using MIPS32 Release 2.
[ binutils/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* doc/binutils.texi (objdump): Note MIPS HWR (Hardware Register)
changes in MIPS -M options.
[ gas/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* configure.in: Recognize mipsisa32r2, mipsisa32r2el, and
CPU variants.
* configure: Regenerate.
* config/tc-mips.c (ISA_HAS_DROR, ISA_HAS_ROR): New defines.
(macro_build): Handle "K" operand.
(macro2): Use ISA_HAS_DROR and ISA_HAS_ROR in the places where
CPU_HAS_DROR and CPU_HAS_ROR are currently used.
(mips_ip): New variable "lastpos", and implement "+A", "+B",
and "+C" operands for MIPS32 Release 2 ins/ext instructions.
Implement "K" operand for MIPS32 Release 2 rdhwr instruction.
(validate_mips_insn): Implement "+" as a way to extend the
allowed operands, and implement "K", "+A", "+B", and "+C"
operands.
(OPTION_MIPS32R2): New define.
(md_longopts): Add entry for OPTION_MIPS32R2.
(OPTION_ELF_BASE): Adjust to accomodate OPTIONS_MIPS32R2.
(md_parse_option): Handle OPTION_MIPS32R2.
(s_mipsset): Reimplement handling of ".set mipsN" options
and add support for ".set mips32r2".
(mips_cpu_info_table): Add entry for "mips32r2" (MIPS32 Release 2).
(md_show_usage): Document "-mips32r2" option.
* doc/as.texinfo: Document "-mips32r2" option.
* doc/c-mips.texi: Likewise.
[ gas/testsuite/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* gas/mips/cp0-names-mips32r2.d: New test.
* gas/mips/hwr-names-mips32r2.d: New test.
* gas/mips/hwr-names-numeric.d: New test.
* gas/mips/hwr-names.s: New test source file.
* gas/mips/mips32r2.d: New test.
* gas/mips/mips32r2.s: New test source file.
* gas/mips/mips32r2-ill.l: New test.
* gas/mips/mips32r2-ill.s: New test source file.
* gas/mips/mips.exp: Add mips32r2 architecture data array
entry. Run new tests mentioned above.
[ include/elf/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* mips.h (E_MIPS_ARCH_32R2): New define.
[ include/opcode/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* mips.h: Document "+" as the start of two-character operand
type names, and add new "K", "+A", "+B", and "+C" operand types.
(OP_MASK_INSMSB, OP_SH_INSMSB, OP_MASK_EXTMSB)
(OP_SH_EXTMSB, INSN_ISA32R2, ISA_MIPS32R2, CPU_MIPS32R2): New
defines.
[ opcodes/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* mips-dis.c (mips_cp0_names_mips3264r2, mips_hwr_names_numeric)
(mips_hwr_names_mips3264r2): New arrays.
(mips_arch_choice): New "hwr_names" member.
(mips_arch_choices): Adjust for structure change, and add a new
entry for "mips32r2" ISA.
(mips_hwr_names): New variable.
(set_default_mips_dis_options): Set mips_hwr_names.
(parse_mips_dis_option): New "hwr-names" option which sets
mips_hwr_names, and adjust "reg-names=ARCH" to set mips_hwr_names.
(print_insn_arg): Change return type to "int"
and use that to indicate number of characters consumed.
Add support for "+" operand extension character, "+A", "+B",
"+C", and "K" operands.
(print_insn_mips): Adjust for changes to print_insn_arg.
(print_mips_disassembler_options): Adjust for "hwr-names"
addition and "reg-names" change.
* mips-opc (I33): New define (shorthand for INSN_ISA32R2).
(mips_builtin_opcodes): Note that "nop" and "ssnop" are special
forms of "sll". Add new MIPS32 Release 2 instructions: ehb,
di, ei, ext, ins, jr.hb, jalr.hb, mfhc1, mfhc2, mthc1, mthc2,
rdhwr, rdpgpr, seb, seh, synci, wrpgpr, wsbh.
Note that hardware rotate instructions (ror, rorv) can be
used on MIPS32 Release 2, and add the official mnemonics
for them (rotr, rotrv) and the similar "rotl" mnemonic for
left-rotate.
* h8300.h (h8_opcode): Remove 'noperands', 'idx', and 'size'
fields.
(h8_opcodes). Modify initializer and initializer macros to no
longer initialize the removed fields.
* h8300.h (h8_opcode): Remove 'length' field.
(h8_opcodes): Mark as 'const' (both the declaration and
definition). Modify initializer and initializer macros to no
longer initialize the length field.
2002-11-11 Klee Dienes <kdienes@apple.com>
* h8300-dis.c: Include libiberty.h (for xmalloc).
(struct h8_instruction): New type, used to wrap h8_opcodes with a
length field (computed at run-time).
(h8_instructions): New variable.
(bfd_h8_disassemble_init): Allocate the storage for
h8_instructions. Fill h8_instructions with pointers to the
appropriate opcode and the correct value for the length field.
(bfd_h8_disassemble): Iterate through h8_instructions instead of
h8_opcodes.
* arc.h (arc_ext_opcodes): Declare as extern.
(arc_ext_operands): Declare as extern.
* i860.h (i860_opcodes): Declare as const.
2002-11-18 Klee Dienes <kdienes@apple.com>
* arc-opc.c (arc_ext_opcodes): Define.
(arc_ext_operands): Define.
* i386-dis.c (Suffix3DNow): Declare as const.
* arm-opc.h (arm_opcodes): Declare as const.
(thumb_opcodes): Declare as const.
* h8500-opc.h (h8500_table): Declare as const.
(h8500_table): Use a NULL for the opcode in the terminator, so
that code testing (opcode->name) behaves correctly.
* mcore-opc.h (mcore_table): Declare as const.
* sh-opc.h (sh_table): Declare as const.
* w65-opc.h (optable): Declare as const.
* z8k-opc.h (z8k_table): Declare as const.
parameters. Added support for new opcode-list format. General
error message fixups.
(c4x_inst_add): Reject insn not for our CPU
(md_begin): Added matrix for setting the proper opcode-level &
device-flags according to cpu type and revision. Rewrite the
opcode hasher.
(c4x_operand_parse): Fix opcode bug
(c4x_operands_match): New function argument. Added dry-run
mechanism, that is optional error generation. Added constraint 'i'
and 'j'.
(c4x_insn_check): Added new function for post-verification of the
generated insn.
(md_assemble): Check all opcodes before croaking because of an
argument mismatch. Need this to be able to fully support
ortogonally arguments.
(md_parse_options): Revised commandprompt swicthes and added new
ones.
(md_show_usage): Complete rewrite of printout.
* gas/testsuite/gas/tic4x/addressing.s: Fix bug in one insn
* gas/testsuite/gas/tic4x/addressing_c3x.d: Update thereafter
* gas/testsuite/gas/tic4x/addressing_c4x.d: Update thereafter
* gas/testsuite/gas/tic4x/allopcodes.S: Add support for new
opclass.h changes
* gas/testsuite/gas/tic4x/opclasses.h: Added testsuites for
the new enhanced opcodes.
* gas/testsuite/gas/tic4x/opcodes.s: Regenerate
* gas/testsuite/gas/tic4x/opcodes_c3x.d: Update from above
* gas/testsuite/gas/tic4x/opcodes_c4x.d: Update from above
* gas/testsuite/gas/tic4x/opcodes_new.d: Added new testsuite for
the enhanced and special insns.
* gas/testsuite/gas/tic4x/tic4x.exp: Added the opcodes_new testsuite
* include/opcode/tic4x.h: File reordering. Added enhanced opcodes.
* opcodes/tic4x-dis.c: Added support for enhanced and special
insn.
(c4x_print_op): Added insn class 'i' and 'j'
(c4x_hash_opcode_special): Add to support special insn
(c4x_hash_opcode): Update to support the new opcode-list
format. Add support for the new special insns.
(c4x_disassemble): New opcode-list support.
(c4x_operands_match): Added check for 8-bits LDF insn. Give
warning when using constant direct bigger than 2^16. Add the new
arguments.
* include/opcode/tic4x.h: Major rewrite of entire file. Define
instruction classes, and put each instruction into a class.
* opcodes/tic4x-dis.c: (c4x_print_op): Add support for the new
argument format. Fix bug in 'N' register printer.
* reloc.c (BFD_RELOC_386_TLS_TPOFF, BFD_RELOC_386_TLS_IE,
BFD_RELOC_386_TLS_GOTIE): Add.
* bfd-in2.h, libbfd.h: Rebuilt.
* elf32-i386.c (elf_howto_table): Add R_386_TLS_TPOFF, R_386_TLS_IE
and R_386_TLS_GOTIE.
(elf_i386_reloc_type_lookup): Handle it.
(struct elf_i386_link_hash_entry): Change tls_type type to unsigned
char instead of enum, change GOT_* into defines.
(GOT_TLS_IE_POS, GOT_TLS_IE_NEG, GOT_TLS_IE_BOTH): Define.
(elf_i386_tls_transition): Handle R_386_TLS_IE and R_386_TLS_GOTIE.
(elf_i386_check_relocs): Likewise. Avoid crash if local symbol is
accessed both as normal and TLS symbol. Move R_386_TLS_LDM and
R_386_PLT32 cases so that R_386_TLS_IE can fall through.
Handle R_386_TLS_LE_32 and R_386_TLS_LE in shared libs.
(elf_i386_gc_sweep_hook): Handle R_386_TLS_IE and R_386_TLS_GOTIE.
Handle R_386_TLS_LE_32 and R_386_TLS_LE in shared libs.
(allocate_dynrelocs): Allocate 2 .got and 2 .rel.got entries if
tls_type is GOT_TLS_IE_BOTH.
(elf_i386_size_dynamic_sections): Likewise.
(elf_i386_relocate_section): Handle R_386_TLS_IE and R_386_TLS_GOTIE.
Handle R_386_TLS_LE_32 and R_386_TLS_LE in shared libs.
(elf_i386_finish_dynamic_symbol): Use tls_type & GOT_TLS_IE to catch
all 4 GOT_TLS_* TLS types.
gas/
* config/tc-i386.c (tc_i386_fix_adjustable): Handle
BFD_RELOC_386_TLS_IE and BFD_RELOC_386_TLS_GOTIE.
(BFD_RELOC_386_TLS_IE, BFD_RELOC_386_TLS_GOTIE): Define to 0
if not defined.
(lex_got): Handle @GOTNTPOFF and @INDNTPOFF.
(md_apply_fix3, tc_gen_reloc): Handle BFD_RELOC_386_TLS_IE and
BFD_RELOC_386_TLS_GOTIE.
gas/testsuite/
* gas/i386/tlspic.s: Add tests.
* gas/i386/tlspic.d: Regenerated.
* gas/i386/tlsnopic.s: Add tests.
* gas/i386/tlsnopic.d: Regenerated.
include/
* elf/i386.h (R_386_TLS_TPOFF, R_386_TLS_IE, R_386_TLS_GOTIE):
Define.
ld/testsuite/
* ld-i386/i386.exp: New.
* ld-i386/tlsbin.dd: New test.
* ld-i386/tlsbinpic.s: New test.
* ld-i386/tlsbin.rd: New test.
* ld-i386/tlsbin.s: New test.
* ld-i386/tlsbin.sd: New test.
* ld-i386/tlsbin.td: New test.
* ld-i386/tlslib.s: New test.
* ld-i386/tlsnopic1.s: New test.
* ld-i386/tlsnopic2.s: New test.
* ld-i386/tlsnopic.dd: New test.
* ld-i386/tlsnopic.rd: New test.
* ld-i386/tlsnopic.sd: New test.
* ld-i386/tlspic1.s: New test.
* ld-i386/tlspic2.s: New test.
* ld-i386/tlspic.dd: New test.
* ld-i386/tlspic.rd: New test.
* ld-i386/tlspic.sd: New test.
* ld-i386/tlspic.td: New test.
From matthew green <mrg@redhat.com>
* ppc.h (PPC_OPCODE_SPE): New opcode flag for Powerpc e500
instructions.
(PPC_OPCODE_ISEL, PPC_OPCODE_BRLOCK, PPC_OPCODE_PMR,
PPC_OPCODE_CACHELCK, PPC_OPCODE_RFMCI): New opcode flags for the
e500x2 Integer select, branch locking, performance monitor,
cache locking and machine check APUs, respectively.
(PPC_OPCODE_EFS): New opcode type for efs* instructions.
(PPC_OPCODE_CLASSIC): New opcode type for Classic PowerPC instructions.
EF_M68HC11_ABI): Define for ABI specification.
(STO_M68HC12_FAR, STO_M68HC12_INTERRUPT): Symbol flags for
linker and debugger.
(R_M68HC11_24, R_M68HC11_LO16, R_M68HC11_PAGE): New relocs.
(R_M68HC11_RL_JUMP, R_M68HC11_RL_GROUP): New reloc for linker
relaxation.
* sim-sh.h: Add enum constants for sh[1-4], sh3e, sh3?-dsp,
renumbering the sh-dsp registers to use distinct numbers.
sim/sh:
* Makefile.in (interp.o): Depend on $(srcroot)/include/gdb/sim-sh.h.
* interp.c: Include "gdb/sim-sh.h".
(sim_store_register, sim_fetch_register): Use constants defined there.
gdb:
* sh-tdep.c (sh_dsp_register_sim_regno): New function.
(sh_gdbarch_init): Use it for sh-dsp.
(mips_ip): Likewise.
* mips.h (INSN_MIPS16): New define.
* mips-dis.c (mips_isa_type): Add MIPS16 insn handling.
* mips-opc.c (I16): New define.
(mips_builtin_opcodes): Make jalx an I16 insn.
2002-07-01 Matt Thomas <matt@3am-software.com>
* Rename EF_* to EF_VAX_*.
bfd:
2002-07-01 Matt Thomas <matt@3am-software.com>
* elf32-vax.c (elf32_vax_print_private_bfd_data): Change EF_*
to EF_VAX_*.
binutils:
2002-07-01 Matt Thomas <matt@3am-software.com>
* readelf.c: Include "elf/vax.h".
(guess_is_rela): Move EM_VAX from unknown to RELA case.
(dump_relocations): Handle VAX relocations.
(get_machine_flags): Handle VAX machine flags.
2002-05-30 Chris G. Demetriou <cgd@broadcom.com>
Ed Satterthwaite <ehs@broadcom.com>
* config/tc-mips.c (mips_set_options): New "ase_mdmx" member.
(mips_opts): Initialize "ase_mdmx" member.
(file_ase_mdmx): New variable.
(CPU_HAS_MDMX): New macro.
(md_begin): Initialize mips_opts.ase_mdmx and file_ase_mdmx
based on command line options and configuration defaults.
(macro_build): Note in comment that use of MDMX in macros is
not currently allowed.
(validate_mips_insn): Add support for the "O", "Q", "X", "Y", and
"Z" MDMX operand types.
(mips_ip): Accept MDMX instructions if mips_opts.ase_mdmx is set,
and add support for the "O", "Q", "X", "Y", and "Z" MDMX operand
types.
(OPTION_MDMX, OPTION_NO_MDMX, md_longopts, md_parse_option):
Add support for "-mdmx" and "-no-mdmx" options.
(OPTION_ELF_BASE): Move to accomodate new options.
(s_mipsset): Support ".set mdmx" and ".set nomdmx".
(mips_elf_final_processing): Set MDMX ASE ELF header flag if
file_ase_mdmx was set.
* doc/as.texinfo: Document -mdmx and -no-mdmx options.
* doc/c-mips.texi: Likewise, and document ".set mdmx" and ".set
nomdmx" directives.
[ gas/testsuite/ChangeLog ]
2002-05-30 Chris G. Demetriou <cgd@broadcom.com>
* gas/mips/mips64-mdmx.s: New file.
* gas/mips/mips64-mdmx.d: Likewise.
* gas/mips/mips.exp: Run new "mips64-mdmx" test.
[ include/opcode/ChangeLog ]
2002-05-30 Chris G. Demetriou <cgd@broadcom.com>
* mips.h (OP_SH_ALN, OP_MASK_ALN, OP_SH_VSEL, OP_MASK_VSEL)
(MDMX_FMTSEL_IMM_QH, MDMX_FMTSEL_IMM_OB, MDMX_FMTSEL_VEC_QH)
(MDMX_FMTSEL_VEC_OB, INSN_READ_MDMX_ACC, INSN_WRITE_MDMX_ACC)
(INSN_MDMX): New constants, for MDMX support.
(opcode character list): Add "O", "Q", "X", "Y", and "Z" for MDMX.
[ opcodes/ChangeLog ]
2002-05-30 Chris G. Demetriou <cgd@broadcom.com>
Ed Satterthwaite <ehs@broadcom.com>
* mips-dis.c (print_insn_arg): Add support for 'O', 'Q', 'X', 'Y',
and 'Z' formats, for MDMX.
(mips_isa_type): Add MDMX instructions to the ISA
bit mask for bfd_mach_mipsisa64.
* mips-opc.c: Add support for MDMX instructions.
(MX): New definition.
* mips-dis.c: Update copyright years to include 2002.
* sim-d10v.h: New file. Moved from include/sim-d10v.h.
* Makefile.in (INCLUDE): Add "gdb/sim-d10v.h".
* interp.c: Include "gdb/sim-d10v.h" instead of "sim-d10v.h".
* d10v-tdep.c: Include "gdb/sim-d10v.h" instead of "sim-d10v.h".
* Makefile.in (sim_d10v_h): Update definition.
include:
* dis-asm.h (print_insn_shl, print_insn_sh64l): Remove prototype.
gdb:
* sh-tdep.c (gdb_print_insn_sh64): Delete.
(gdb_print_insn_sh): Just set info->endian and use print_insn_sh.
(sh_gdbarch_init): Always use gdb_print_insn_sh.
opcodes:
* disassemble.c (disassembler): Just use print_insn_sh for bfd_arch_sh.
* sh-dis.c (LITTLE_BIT): Delete.
(print_insn_sh, print_insn_shl): Deleted.
(print_insn_shx): Renamed to
(print_insn_sh). No longer static. Handle SHmedia instructions.
Use info->endian to determine endianness.
* sh64-dis.c (print_insn_sh64, print_insn_sh64l): Delete.
(print_insn_sh64x): No longer static. Renamed to
(print_insn_sh64). Removed pfun_compact and endian arguments.
If we got an uneven address to indicate SHmedia, adjust it.
Return -2 for SHcompact instructions.
sim/sh64:
* sim-if.c (sh64_disassemble_insn): Use print_insn_sh instead of
print_insn_shl.
* signals.h: Update comments.
(enum target_signal): Remove conditional compilation around
Mach-specific signals. Move them to after TARGET_SIGNAL_DEFAULT.
2002-03-15 Chris G. Demetriou <cgd@broadcom.com>
* config/tc-mips.c (mips_set_options): New "ase_mips3d" member.
(mips_opts): Initialize "ase_mips3d" member.
(file_ase_mips3d): New variable.
(CPU_HAS_MIPS3D): New macro.
(md_begin): Initialize mips_opts.ase_mips3d and file_ase_mips3d
based on command line options and configuration defaults.
(macro_build, mips_ip): Accept MIPS-3D instructions if
mips_opts.ase_mips3d is set.
(OPTION_MIPS3D, OPTION_NO_MIPS3D, md_longopts, md_parse_option):
Add support for "-mips3d" and "-no-mips3d" options.
(OPTION_ELF_BASE): Move to accomodate new options.
(s_mipsset): Support ".set mips3d" and ".set nomips3d".
(mips_elf_final_processing): Add a comment indicating that a
MIPS-3D ASE ELF header flag should be set, when one exists.
* doc/as.texinfo: Document -mips3d and -no-mips3d options.
* doc/c-mips.texi: Likewise, and document ".set mips3d" and ".set
nomips3d" directives.
[ gas/testsuite/ChangeLog ]
2002-03-15 Chris G. Demetriou <cgd@broadcom.com>
* gas/mips/mips64-mips3d.s: New file.
* gas/mips/mips64-mips3d.d: Likewise.
* gas/mips/mips.exp: Run new "mips64-mips3d" test.
[ include/opcode/ChangeLog ]
2002-03-15 Chris G. Demetriou <cgd@broadcom.com>
* mips.h (INSN_MIPS3D): New definition used to mark MIPS-3D
instructions.
(OPCODE_IS_MEMBER): Adjust comments to indicate that ASE bit masks
may be passed along with the ISA bitmask.
[ opcodes/ChangeLog ]
2002-03-15 Chris G. Demetriou <cgd@broadcom.com>
* mips-dis.c (mips_isa_type): Add MIPS3D instructions to the ISA
bit masks for bfd_mach_mips_sb1 and bfd_mach_mipsisa64. Add
comments for bfd_mach_mipsisa32 and bfd_mach_mipsisa64 that
indicate that they should dissassemble all applicable
MIPS-specified ASEs.
* mips-opc.c: Add support for MIPS-3D instructions.
(M3D): New definition.
* mips-opc.c: Update copyright years.
2002-03-10 Daniel Jacobowitz <drow@mvista.com>
* Makefile.in (defs_h): Add $(INCLUDE_DIR)/gdb/signals.h.
* defs.h: Include "gdb/signals.h".
(enum target_signal): Move to $(INCLUDE_DIR)/gdb/signals.h.
include/gdb:
2002-03-10 Daniel Jacobowitz <drow@mvista.com>
* signals.h: New file, split from gdb/defs.h.
Allow the user to specify functions for allocating memory for
splay tree roots and nodes.
* splay-tree.h (splay_tree_allocate_fn, splay_tree_deallocate_fn):
New types.
(splay_tree): New fields: `allocate', `deallocate', and
`allocate_data'.
(splay_tree_new_with_allocator): New function declaration.
libiberty:
* splay-tree.c (splay_tree_xmalloc_allocate,
splay_tree_xmalloc_deallocate): New functions.
(splay_tree_new): Call splay_tree_new_with_allocator, passing the
above functions and a dummy data pointer.
(splay_tree_new_with_allocator): New function.
(splay_tree_delete_helper, splay_tree_delete, splay_tree_insert,
splay_tree_remove): Use the splay tree's allocation and
deallocation functions.
2002-02-13 Matt Fredette <fredette@netbsd.org>
* elf32-m68k.c (elf32_m68k_print_private_bfd_data): Recognize
EF_M68000.
bintuls:
2002-02-13 Matt Fredette <fredette@netbsd.org>
* readelf.c (get_machine_flags): Recognize EF_M68000.
gas:
2002-02-13 Matt Fredette <fredette@netbsd.org>
* config/tc-m68k.c (md_show_usage): No longer display a
hard-coded "68020" for the default CPU, instead display the
canonical name of the true, configured default CPU.
(m68k_elf_final_processing): Mark objects for sub-68020
CPUs with the new EF_M68000 flag.
include/elf:
2002-02-13 Matt Fredette <fredette@netbsd.org>
* m68k.h (EF_M68000): Define.
2000-11-25 Hans-Peter Nilsson <hpn@cygnus.com>
* dis-asm.h (print_insn_sh64): New prototype.
(print_insn_sh64l): New prototype.
(print_insn_sh64x_media): New prototype.
[includes]
2002-02-04 Frank Ch. Eigler <fche@redhat.com>
* dis-asm.h (disassemble_info): New field `insn_sets'.
(INIT_DISASSEMBLE_INFO): Clear it.
[opcodes]
2002-02-04 Frank Ch. Eigler <fche@redhat.com>
* cgen-dis.in (print_insn_@arch@): Support disassemble_info.insn_sets.
* common.h: Update copyright years.
(NT_NETBSDCORE_PROCINFO): Define.
(NT_NETBSDCORE_FIRSTMACH): Define.
bfd:
* elf.c: Update copyright years.
(elfcore_grok_netbsd_note): Use NT_NETBSDCORE_PROCINFO
and NT_NETBSDCORE_FIRSTMACH. Improve a comment.
bintuils:
* readelf.c (get_netbsd_elfcore_note_type): Use
NT_NETBSDCORE_PROCINFO and NT_NETBSDCORE_FIRSTMACH.
* config/tc-ppc.c (md_parse_option): BookE is not Motorola specific.
[include/opcode/ChangeLog]
* ppc.h (PPC_OPCODE_BOOKE): BookE is not Motorola specific.
(PPC_OPCODE_BOOKE64): Likewise.
include/elf/ChangeLog
* external.h (Elf_External_Sym_Shndx): Declare.
* internal.h (struct elf_internal_sym <st_shndx>): Make it an
unsigned int.
* common.h (SHN_BAD): Define.
bfd/ChangeLog
* configure.in: Bump bfd version.
* configure: Regenerate.
* elf-bfd.h (elf_size_info <swap_symbol_out>): Add shndx param.
(bfd_elf32_swap_symbol_in): Likewise.
(bfd_elf32_swap_symbol_out): Likewise.
(bfd_elf64_swap_symbol_in): Likewise.
(bfd_elf64_swap_symbol_out): Likewise.
(elf_reloc_cookie): Add locsym_shndx field. Make locsyms a PTR.
(elf_obj_tdata): Add num_elf_sections, symtab_shndx_hdr and
symtab_shndx_section.
(elf_numsections): Define.
(elf_symtab_shndx): Define.
* elf.c (setup_group): Use elf_numsections rather than header e_shnum.
(bfd_elf_find_section): Likewise.
(bfd_section_from_elf_index): Likewise.
(bfd_section_from_shdr): Likewise. Handle SHT_SYMTAB_SHNDX.
(bfd_section_from_r_symndx): Read symbol shndx extension, and
translate st_shndx for > SHN_HIRESERVE.
(assign_section_numbers): Skip reserved sections. Assign
symtab_shndx_section and elf_numsections. Exclude reserved
sections from e_shnum. Set up symtab_shndx_hdr.
(_bfd_elf_compute_section_file_positions): Handle symtab_shndx_hdr.
(map_sections_to_segments): Don't map eh_frame_hdr unless required.
(assign_file_positions_except_relocs): Use elf_numsections rather
than header e_shnum. Skip reserved sections and symtab_shndx_section.
(prep_headers): Set name for symtab_shndx_hdr.
(_bfd_elf_assign_file_positions_for_relocs): Use elf_numsections.
(_bfd_elf_write_object_contents): Likewise. Skip reserved sections.
(_bfd_elf_section_from_bfd_section): Check bfd_{abs,com,und}_section
first. Use elf_section_data if available. Use elf_numsections.
Start scan at index 1.
(copy_private_bfd_data ): Comment fixes.
(MAP_ONESYMTAB): Define above SHN_HIOS.
(MAP_DYNSYMTAB): Likewise.
(MAP_STRTAB): Likewise.
(MAP_SHSTRTAB): Likewise.
(MAP_SYM_SHNDX): New define.
(_bfd_elf_copy_private_symbol_data): Handle symtab_shndx_section.
(swap_out_syms): Swap out SHT_SYMTAB_SHNDX section too.
* elfcode.h (elf_swap_symbol_in): Add shndx param, and handle shndx
extension.
(elf_swap_symbol_out): Likewise.
(elf_object_p): Set elf_numsections, and use instead of e_shnum.
Initialialise reserved elf_elfsections to point at shdr[0]. Remove
redundant bfd_release calls.
(elf_slurp_symbol_table): Read symbol shndx extension, and use with
elf_swap_symbol_in. Translate st_shndx for > SHN_HIRESERVE too.
* elflink.h (elf_link_is_defined_archive_symbol): Read symbol shndx
extension, and use with elf_swap_symbol_in.
(elf_link_record_local_dynamic_symbol): Likewise.
(elf_link_add_object_symbols): Likewise. Also translate st_shndx
for elf sections > SHN_HIRESERVE.
(NAME(bfd_elf,size_dynamic_sections)): Adjust elf_swap_symbol_out
call.
(struct elf_final_link_info): Add locsym_shndx and symshndxbuf.
(elf_bfd_final_link): Allocate the above, and tidy code allocating
other buffers. Use elf_numsections instead of e_shnum. Adjust
elf_swap_symbol_out calls.
(elf_link_output_sym): Swap out symbol shndx extension too.
(elf_link_flush_output_syms): And flush them to disk.
(elf_link_output_extsym): Use SHN_BAD. Adjust elf_swap_symbol_out
calls.
(elf_gc_mark): Read symbol shndx extension, and use with
elf_swap_symbol_in.
(elf_link_input_bfd): Likewise, Translate st_shndx for elf sections
> SHN_HIRESERVE too. Use SHN_BAD.
(elf_reloc_symbol_deleted_p): Use symbol shndx extensions with
elf_swap_symbol_in. Translate st_shndx > SHN_HIRESERVE too.
(elf_bfd_discard_info): Read symbol shndx extension. Don't attempt
to continue after a bfd error.
* elf-m10200.c (mn10200_elf_relax_section): Only read local syms.
Stash them immediately to symtab_hdr->contents rather than later
in multiple places. Clean up afterwards. Read symbol shndx
extension, and use with swap_symbol_in. Translate SHN_UNDEF,
SHN_ABS, SHN_COMMON and elf sections > SHN_HIRESERVE to bfd
sections too. Remove dead code.
(mn10200_elf_relax_delete_bytes): Use symbol shndx extension
when swapping in symbols. Tidy code adjusting global syms.
Don't swap in global syms.
(mn10200_elf_symbol_address_p): Likewise. Remove extsyms param.
(mn10200_elf_get_relocated_section_contents): Read symbol shndx
extension, and use with swap_symbol_in. Rename "size" -> "amt"
to maximize code in common with other files. Translate st_shndx
for > SHN_HIRESERVE too. Remove dead code.
* elf-m10300.c (mn10300_elf_relax_section): Only read local syms.
Stash them immediately to symtab_hdr->contents rather than later
in multiple places. Clean up afterwards. Read symbol shndx
extension, and use with swap_symbol_in. Remove dead code.
(mn10300_elf_relax_delete_bytes): As for elf-m10200.c.
(mn10300_elf_symbol_address_p): Likewise.
(mn10300_elf_get_relocated_section_contents): Likewise.
* elf32-h8300.c (elf32_h8_relax_section): As for elf-m10300.c.
(elf32_h8_relax_delete_bytes): Likewise.
(elf32_h8_symbol_address_p): Likewise.
(elf32_h8_get_relocated_section_contents): Likewise.
* elf32-hppa.c (elf32_hppa_size_stubs): Read symbol shndx
extension, and use with swap_symbol_in.
* elf64-hppa.c (elf64_hppa_check_relocs): Likewise.
* elf32-i370.c (i370_elf_finish_dynamic_sections): Adjust call to
bfd_elf32_swap_symbol_out.
* elf32-m32r.c (m32r_elf_get_relocated_section_contents): Translate
elf sections > SHN_HIRESERVE too.
* elf32-m68k.c (bfd_m68k_elf32_create_embedded_relocs): Only read
local syms. Read symbol shndx extension, and use with swap_symbol_in.
* elf32-mips.c (_bfd_mips_elf_final_write_processing): Use
elf_numsections rather than header e_shnum.
* elf32-sh.c (sh_elf_relax_section): As for elf-m10300.c.
(sh_elf_relax_delete_bytes): Likewise.
(sh_elf_get_relocated_section_contents): Likewise. Only read local
symbols.
* elf32-v850.c (v850_elf_symbol_processing): Use an unsigned int to
hold section index. Use elf_numsections rather than e_shnum.
Rename "index" -> "indx" to avoid shadowing warning.
(v850_elf_add_symbol_hook): Likewise.
* elf64-alpha.c (elf64_alpha_relax_section): Only read local syms.
Read symbol shndx extension, and use with swap_symbol_in.
* elf32-xstormy16.c (xstormy16_elf_relax_section): Likewise.
Translate SHN_COMMON and elf sections > SHN_HIRESERVE too.
* elfxx-ia64.c (elfNN_ia64_relax_section): Likewise.
(elfNN_ia64_aix_add_symbol_hook): Use elf_numsections.
* elf-m10300.c (mn10300_elf_gc_mark_hook): Remove unnecessary checks
before calling bfd_section_from_elf_index on local syms.
* elf32-arm.h (elf32_arm_gc_mark_hook): Likewise.
* elf32-avr.c (elf32_avr_gc_mark_hook): Likewise.
* elf32-cris.c (cris_elf_gc_mark_hook): Likewise.
* elf32-d10v.c (elf32_d10v_gc_mark_hook): Likewise.
* elf32-fr30.c (fr30_elf_gc_mark_hook): Likewise.
* elf32-hppa.c (elf32_hppa_gc_mark_hook): Likewise.
* elf32-i386.c (elf_i386_gc_mark_hook): Likewise.
* elf32-m32r.c (m32r_elf_gc_mark_hook): Likewise.
* elf32-m68k.c (elf_m68k_gc_mark_hook): Likewise.
* elf32-mcore.c (mcore_elf_gc_mark_hook): Likewise.
* elf32-mips.c (_bfd_mips_elf_gc_mark_hook): Likewise.
* elf32-openrisc.c (openrisc_elf_gc_mark_hook): Likewise.
* elf32-ppc.c (ppc_elf_gc_mark_hook): Likewise.
* elf32-s390.c (elf_s390_gc_mark_hook): Likewise.
* elf32-sh.c (sh_elf_gc_mark_hook): Likewise.
* elf32-sparc.c (elf32_sparc_gc_mark_hook): Likewise.
* elf32-v850.c (v850_elf_gc_mark_hook): Likewise.
* elf32-xstormy16.c (xstormy16_elf_gc_mark_hook): Likewise.
* elf64-mips.c (mips_elf64_gc_mark_hook): Likewise.
* elf64-mmix.c (mmix_elf_gc_mark_hook): Likewise.
* elf64-ppc.c (ppc64_elf_gc_mark_hook): Likewise.
* elf64-s390.c (elf_s390_gc_mark_hook): Likewise.
* elf64-x86-64.c (elf64_x86_64_gc_mark_hook): Likewise.
binutils/ChangeLog
* readelf.c (symtab_shndx_hdr): New global.
(SECTION_HEADER_INDEX): Define.
(SECTION_HEADER_NUM): Define.
(SECTION_HEADER): Define.
(GET_ELF_SYMBOLS): Pass two params rather than three.
(get_32bit_elf_symbols): Take file and section args. Read and
use SHT_SYMTAB_SHNDX.
(get_64bit_elf_symbols): Likewise.
(dump_relocations): Use SECTION_HEADER to index "section_headers".
(process_section_headers): Likewise. Use SECTION_HEADER_NUM too.
Remember symtab_shdx_hdr.
(process_program_headers): Scan from index 1 for segment map.
(slurp_ia64_unwind_table): Use SECTION_HEADER to index
"section_headers".
(process_relocs): Likewise. Also adjust call to GET_ELF_SYMBOLS.
(process_unwind): Likewise.
(process_version_sections): Likewise.
(process_symbol_table): Likewise.
(display_debug_info): Likewise.
(process_dynamic_segment): Fake up a symtab section for changed
GET_ELF_SYMBOLS.
(get_symbol_index_type): Check SHN_LOOS before SHN_LORESERVE.
(process_program_headers): Kill signed/unsigned warning.
(load_debug_str): Likewise.
(display_debug_info): Likewise.
2001-12-07 Geoffrey Keating <geoffk@redhat.com>
Richard Henderson <rth@redhat.com>
Corinna Vinschen <vinschen@redhat.com>
* Makefile.am: Add support for xstormy16.
* archures.c: Add support for xstormy16.
* config.bfd: Add support for xstormy16.
* configure.in: Add support for xstormy16.
* reloc.c: Add support for xstormy16.
* targets.c: Add support for xstormy16.
* cpu-xstormy16.c: New file.
* elf32-xstormy16.c: New file.
* Makefile.in: Regenerated.
* bfd-in2.h: Regenerated.
* configure: Regenerated.
* libbfd.h: Regenerated.
Index: binutils/ChangeLog
2001-12-07 Geoffrey Keating <geoffk@redhat.com>
* readelf.c (guess_is_rela): Add support for stormy16.
(dump_relocations): Likewise.
(get_machine_name): Likewise.
Index: gas/ChangeLog
2001-12-07 Geoffrey Keating <geoffk@redhat.com>
Richard Henderson <rth@redhat.com>
* configure.in: Add support for xstormy16.
* configure: Regenerated.
* Makefile.am: Add support for xstormy16.
* Makefile.in: Regenerated.
* config/tc-xstormy16.c: New file.
* config/tc-xstormy16.h: New file.
Index: gas/testsuite/ChangeLog
2001-12-07 Geoffrey Keating <geoffk@redhat.com>
matthew green <mrg@redhat.com>
* gas/xstormy16/allinsn.d: New file.
* gas/xstormy16/allinsn.exp: New file.
* gas/xstormy16/allinsn.s: New file.
* gas/xstormy16/allinsn.sh: New file.
* gas/xstormy16/gcc.d: New file.
* gas/xstormy16/gcc.s: New file.
* gas/xstormy16/gcc.sh: New file.
* gas/xstormy16/reloc-1.d: New file.
* gas/xstormy16/reloc-1.s: New file.
* gas/xstormy16/reloc-2.d: New file.
* gas/xstormy16/reloc-2.s: New file.
Index: ld/ChangeLog
2001-12-07 Geoffrey Keating <geoffk@redhat.com>
Richard Henderson <rth@redhat.com>
* Makefile.am: Add support for xstormy16.
* configure.tgt: Add support for xstormy16.
* Makefile.in: Regenerate.
* emulparams/elf32xstormy16.sh: New file.
* scripttempl/xstormy16.sc: New file.
Index: opcodes/ChangeLog
2001-12-07 Geoffrey Keating <geoffk@redhat.com>
* Makefile.am: Add support for xstormy16.
* Makefile.in: Regenerate.
* configure.in: Add support for xstormy16.
* configure: Regenerate.
* disassemble.c: Add support for xstormy16.
* xstormy16-asm.c: New generated file.
* xstormy16-desc.c: New generated file.
* xstormy16-desc.h: New generated file.
* xstormy16-dis.c: New generated file.
* xstormy16-ibld.c: New generated file.
* xstormy16-opc.c: New generated file.
* xstormy16-opc.h: New generated file.
Index: include/ChangeLog
2001-12-07 Geoffrey Keating <geoffk@redhat.com>
* dis-asm.h (print_insn_xstormy16): Declare.
Index: include/elf/ChangeLog
2001-12-07 Geoffrey Keating <geoffk@redhat.com>
Richard Henderson <rth@redhat.com>
* common.h (EM_XSTORMY16): Define.
* xstormy16.h: New file.
* doc/binutils.texi (objdump): Document x86 -M options.
include/ChangeLog
* dis-asm.h (print_insn_i386): Declare.
opcodes/ChangeLog
* disassemble.c (disassembler): Call print_insn_i386.
* i386-dis.c (SUFFIX_ALWAYS): Define.
(struct dis_private): Add orig_sizeflag.
(print_insn_i386): Make it a wrapper, calling..
(print_insn): ..The old body of print_insn_i386. Avoid longjmp
warning without using volatile by moving orig_sizeflag to priv,
and removing inbuf. Parse disassembler_options.
(print_insn_i386_att, print_insn_i386_intel): Move initialisation
code to print_insn.
(putop): Remove #ifdef SUFFIX_ALWAYS.
accept WordReg.
* i386-dis.c (grps): Change "sldt", "str", and "smsw" entries
to "sldtQ", "strQ", "smswQ" respectively; all with Ev operand
category instead of Ew.
2001-10-17 Chris Demetriou <cgd@broadcom.com>
* gas/mips/mips.exp (sb1-ext-ps): New test to test
SB-1 core's paired-single extensions to the MIPS64 ISA.
* gas/mips/sb1-ext-ps.d: New file.
* gas/mips/sb1-ext-ps.s: New file.
[include/opcode/ChangeLog]
2001-10-17 Chris Demetriou <cgd@broadcom.com>
* mips.h (INSN_SB1): New cpu-specific instruction bit.
(OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
if cpu is CPU_SB1.
[opcodes/ChangeLog]
2001-10-17 Chris Demetriou <cgd@broadcom.com>
* mips-dis.c (mips_isa_type): Make the ISA used to disassemble
SB-1 binaries include instructions specific to the SB-1.
* mips-opc.c (SB1): New definition.
(mips_builtin_opcodes): Add SB-1 extension opcodes "div.ps",
"recip.ps", "rsqrt.ps", and "sqrt.ps".
* config/tc-ppc.c (md_parse_option): New -m7410, -m7450 and -m7455
flags, equivalent to -m7400. New -maltivec to enable AltiVec
instructions. New -mbook64 and -mbooke/-mbooke32 flags to enable
64-bit and 32-bit BookE support, respectively. Change -m403 and
-m405 to set PPC403 option.
(md_show_usage): Adjust for new options.
* doc/all.texi: Set PPC.
* doc/as.texinfo: Add PPC support and pull in c-ppc.texi.
* doc/c-ppc.texi: New file.
* doc/Makefile.am (CPU_DOCS): Add c-ppc.texi.
* doc/Makefile.in: Regenerate.
[gas/testsuite/ChangeLog]
* gas/ppc/booke.s: New test for Motorola BookE.
* gas/ppc/booke.d: New file.
* gas/ppc/ppc.exp: Test booke.s.
[include/opcode/ChangeLog]
* ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_403): New opcode flags for
BookE and PowerPC403 instructions.
[opcodes/ChangeLog]
* ppc-opc.c (insert_de, extract_de, insert_des, extract_des): New
instruction field instruction/extraction functions for new BookE
DE form instructions.
(CT): New macro for CT field in an X form instruction.
(DE, DES, DEO, DE_MASK): New macros for DE/DES fields in DE form
instructions.
(PPC64): Don't include PPC_OPCODE_PPC.
(403): New opcode macro for PPC403 processors.
(BOOKE): New opcode macro for BookE processors.
(bce, bcel, bcea, bcela, bclre, bclrel: New BookE instructions.
(bcctre, bcctrel, be, bel, bea, bela, icbt, icbte, lwzxe): Likewise.
(dcbste, lwzuxe, luxe, dcbfe, lbzxe, lwarxe, lbzuxe): Likewise.
(stwcxe, stwxe, stxe, stwuxe, stuxe, stbxe, dcbtste, stbuxe): Likewise.
(mfapidi, dcbte, lhzxe, lhzuxe, lhaxe, lhauxe, subfe64): Likewise.
(subfeo64, adde64, addeo64, sthxe, sthuxe, subfze64): Likewise.
(subfzeo64, addze64, addzeo64, dcbie, subfme64, subfmeo64): Likewise.
(addme64, addmeo64, stdcxe., mcrxr64, lwbrxe, lfsxe, lfsuxe): Likewise.
(lfdxe, lfduxe, stwbrxe, stfsxe, stfsuxe, stfdxe, dcbae): Likewise.
(stfduxe, tlbivax, tlbivaxe, lhbrxe, ldxe, lduxe, tlbsx): Likewise.
(tlbsxe, sthbrxe, stdxe, stduxe, icbie, stfiwxe, dcbze, lbze): Likewise.
(lbzue, ldue, lhze, lhzue, lhae, lhaue, lwze, lwzue): Likewise.
(stbe, stbue, sthe, sthue, stwe, stwue, lfse, lfsue, lfde): Likewise.
(lfdue, stde, stdue, stfse, stfsue, stfde, stfdue): Likewise.
* ppc-dis.c (print_insn_big_powerpc, print_insn_little_powerpc): Look
for a disassembler option of `booke', `booke32' or `booke64' to enable
BookE support in the disassembler.
(PUT_LINENO_LNNO): Use H_PUT_32/16.
* m88k.h (GET_LNSZ_SIZE, GET_LNSZ_LNNO, GET_SCN_NRELOC,
GET_SCN_NLINNO): Use H_GET_32.
(PUT_LNSZ_LNNO, PUT_LNSZ_SIZE, PUT_SCN_NRELOC, PUT_SCN_NLINNO):
Use H_PUT_32.
* ti.h: Formatting fixes. Make use of H_GET_* and H_PUT_* throughout.
* xcoff.h: White space changes.
(EM_AVR): this, redefined as in the current ELF standard.
(EM_PJ_OLD): Renamed from...
(EM_PJ): this, redefined as in the current ELF standard.
(EM_R30, EM_D10V, EM_D30V, EM_V850, EM_M32R, EM_MN10300,
EM_MN10200, EM_OPENRISC, EM_ARC_A5, EM_XTENSA): Defined as in
the current ELF standard.
(EM_CYGNUS_ARC): Removed, unused for a long time.
