a929810277
* gas/bfin/{bit2.s, cache2.s, control_code2.s, event2.s,
...
logical2.s, move2.s, parallel.s, parallel2.s, parallel3.s,
parallel4.s, shift2.s, stack2.s, video2.s}: Remove DOS line
endings.
2008-07-14 03:54:27 +00:00
30c0909079
include/elf/
...
* mips.h (ELF_ST_IS_MIPS16, ELF_ST_SET_MIPS16): New macros.
bfd/
* elfxx-mips.c (mips_elf_check_mips16_stubs): Use ELF_ST_IS_MIPS16.
(mips_elf_calculate_relocation): Likewise.
(_bfd_mips_elf_add_symbol_hook): Likewise.
(_bfd_mips_elf_finish_dynamic_symbol): Likewise.
(_bfd_mips_vxworks_finish_dynamic_symbol): Likewise.
opcodes/
* mips-dis.c (_print_insn_mips): Use ELF_ST_IS_MIPS16.
gas/
* config/tc-mips.c (mips16_mark_labels): Use ELF_ST_SET_MIPS16.
(mips_fix_adjustable): Likewise.
(mips_frob_file_after_relocs): Likewise.
gas/testsuite/
* gas/mips/mips16-vis-1.d, gas/mips/mips16-vis-1.s: New tests.
* gas/mips/mips.exp: Run them.
2008-07-10 19:05:29 +00:00
0cd63f3d26
2008-07-09 Kai Tietz <kai.tietz@onevision.com>
...
* gas/i386/i386.exp (x86-64-pcrel): Disable for w64.
(x86-64-sse5): Likewise.
(x86-64-opcode-inval): Likewise.
(x86-64-opcode-inval-intel): Likewise.
(x86-64-w64-pcrel): New.
* gas/i386/x86-64-w64-pcrel.d: New.
2008-07-09 10:28:12 +00:00
bfbba8e4ee
* config/tc-m68k.c (m68k_set_cpu, m68k_set_arch): Don't complain
...
about overriding an earlier setting.
2008-07-08 06:33:41 +00:00
a6d8f55bfd
* gas/mips/mips32.s: Move out coprocessor2 insns from here ...
...
* gas/mips/mips32-cp2.s: ... to here.
* gas/mips/mips32.d: Update.
* gas/mips/mips32-cp2.d: New file.
* gas/mips/mips32r2.s: Move out coprocessor2 insns from here ...
* gas/mips/mips32r2-cp2.s: ... to here.
* gas/mips/mips32r2.d: Update.
* gas/mips/mips32r2-cp2.d: New file.
* gas/mips/mips64.s: Move out coprocessor2 insns from here ...
* gas/mips/mips64-cp2.s: ... to here.
* gas/mips/mips64.d: Update.
* gas/mips/mips64-cp2.d: New file.
* gas/mips/mips.exp: Run mips32-cp2, mips32r2-cp2 and mips64-cp
except for Octeon.
* gas/mips/octeon.s: Add supported coprocessor insns. Move pop
down to keep alphabetical order.
* gas/mips/octeon.d: Update.
* gas/mips/octeon-ill.s: Add unsupported coprocessor insns.
* gas/mips/octeon-ill.l: Update.
2008-07-07 19:28:02 +00:00
b19e8a9bae
* config/tc-mips.c (NO_ISA_COP): New macro.
...
(COP_INSN): New macro.
(is_opcode_valid): Use them.
(macro) <ld_st>: Use them. Don't accept coprocessor load store
insns based on the ISA if CPU is NO_ISA_COP.
<copz>: Likewise for coprocessor operations.
2008-07-07 19:16:23 +00:00
79947c5421
gas/
...
2008-07-07 Paul Brook <paul@codesourcery.com>
* config/tc-arm.c (arm_fix_adjustable): Don't adjust MOVW/MOVT
relocations.
gas/testsuite/
2008-07-07 Paul Brook <paul@codesourcery.com>
* gas/arm/movw-local.d: New test.
* gas/arm/movw-local.s: New test.
2008-07-07 19:12:58 +00:00
9990da1d51
* configure.tgt: Add bfin-*-rtems*.
2008-07-07 16:43:06 +00:00
d62f07d07d
* config/tc-spu.c (md_apply_fix): Handle fully resolved
...
BFD_RELOC_32_PCREL, BFD_RELOC_SPU_HI16 and BFD_RELOC_SPU_LO16.
2008-07-04 13:04:04 +00:00
4b4374ecf1
* gas/mips/odd-float.d: Replace ... with #pass.
...
* gas/mips/ldstla-32-shared.d: Add -march=mips1 for as.
* gas/mips/ldstla-32.d: Likewise.
* gas/mips/mips16-hilo-match.d: Add -mabi=32 -march=mips1 for as.
2008-06-27 18:30:11 +00:00
c8187e1509
gas/
...
* config/tc-ppc.c (parse_cpu): Handle -m464.
(md_show_usage): Likewise.
opcodes/
* ppc-dis.c (powerpc_init_dialect): Handle -M464.
(print_ppc_disassembler_options): Likewise.
* ppc-opc.c (PPC464): Define.
(powerpc_opcodes): Add mfdcrux and mtdcrux.
2008-06-25 16:49:03 +00:00
3bb06f783c
/gas:
...
2008-06-24 Eric B. Weddington <eric.weddington@atmel.com>
Add support for ATtiny13A.
* config/tc-avr.c (mcu_types): Add attiny13a.
* doc/c-avr.texi: Likewise.
2008-06-25 16:19:11 +00:00
6afe8e98a6
* write.c (relax_segment <rs_org>): Include current stretch
...
value when calculating whether .org is backwards.
2008-06-24 01:49:36 +00:00
4bec5bdf6a
* gas/mips/e32-rel2.d: Add -march=mips1 for as.
2008-06-20 18:34:00 +00:00
7a283e077b
* configure: Regenerate.
...
config/
* override.m4: Use m4_version_prereq throughout.
(_AC_ARG_VAR_VALIDATE, AC_MSG_FAILURE): Backport from git
Autoconf: output pwd along with fatal errors, so the right
config.log file is hinted at more prominently.
(PARSE_ARGS): Push setting of ac_pwd in this diversion.
(_GCC_AUTOCONF_VERSION): New, define to 2.59 if not defined.
(_GCC_AUTOCONF_VERSION_CHECK): New macro, require use of Autoconf
version _GCC_AUTOCONF_VERSION throughout the tree.
(m4_wrap): New override, fix for Posix semantics of m4wrap.
binutils/
* configure: Regenerate.
opcodes/
* configure: Regenerate.
bfd/
* configure: Regenerate.
gas/
* configure: Regenerate.
gprof/
* configure: Regenerate.
ld/
* config.in: Regenerate.
* configure: Regenerate.
2008-06-17 23:14:44 +00:00
0146fc9d1e
* app.c (do_scrub_chars): Do not UNGET an EOF value.
...
* ti.h (GET_SCNHDR_NLNNO): Provide an alternative version of this
macro which does not trigger an array bounds warning in gcc.
(PUT_SCNHDR_NLNNO): Likewise.
(GET_SCNHDR_FLAGS): Likewise.
(PUT_SCNHDR_FLAGS): Likewise.
(GET_SCNHDR_PAGE): Likewise.
(PUT_SCNHDR_PAGE): Likewise.
2008-06-17 16:01:28 +00:00
4758f280d4
PR gas/6607
...
* gas/mmix/err-loc-10.s, gas/mmix/err-loc-9.s, gas/mmix/loc-6.d,
gas/mmix/loc-6.s, gas/mmix/loc-7.d, gas/mmix/loc-7.s: New tests.
2008-06-16 15:05:55 +00:00
1afc8defa6
PR gas/6607
...
* config/tc-mmix.c (s_loc): Assume "negative" addresses belong to
text_section. Do the "stepping backwards" test for text_section
using unsigned operands.
2008-06-16 15:04:41 +00:00
fa452fa683
include/opcode/
...
* ppc.h (ppc_cpu_t): New typedef.
(struct powerpc_opcode <flags>): Use it.
(struct powerpc_operand <insert, extract>): Likewise.
(struct powerpc_macro <flags>): Likewise.
gas/
* config/tc-ppc.c (ppc_cpu): Use ppc_cpu_t typedef.
(ppc_insert_operand): Likewise.
(ppc_machine): Likewise.
* config/tc-ppc.h: #include "opcode/ppc.h"
(struct _ppc_fix_extra <ppc_cpu>): Use ppc_cpu_t typedef.
(ppc_cpu): Update extern decl.
opcodes/
* ppc-dis.c (print_insn_powerpc): Update prototye to use new
ppc_cpu_t typedef.
(struct dis_private): New.
(POWERPC_DIALECT): New define.
(powerpc_dialect): Renamed to...
(powerpc_init_dialect): This. Update to use ppc_cpu_t and
struct dis_private.
(print_insn_big_powerpc): Update for using structure in
info->private_data.
(print_insn_little_powerpc): Likewise.
(operand_value_powerpc): Change type of dialect param to ppc_cpu_t.
(skip_optional_operands): Likewise.
(print_insn_powerpc): Likewise. Remove initialization of dialect.
* ppc-opc.c (extract_bat, extract_bba, extract_bdm, extract_bdp,
extract_bo, extract_boe, extract_fxm, extract_mb6, extract_mbe,
extract_nb, extract_nsi, extract_rbs, extract_sh6, extract_spr,
extract_sprg, extract_tbr insert_bat, insert_bba, insert_bdm,
insert_bdp, insert_bo, insert_boe, insert_fxm, insert_mb6, insert_mbe,
insert_nsi, insert_ral, insert_ram, insert_raq, insert_ras, insert_rbs,
insert_sh6, insert_spr, insert_sprg, insert_tbr): Change the dialect
param to be of type ppc_cpu_t. Update prototype.
2008-06-13 20:16:00 +00:00
dd3cbb7ef7
* mips.h: Document new field descriptors +Q.
...
(OP_SH_SEQI, OP_MASK_SEQI): New bit mask and shift count for SEQI.
opcodes/
* mips-dis.c (print_insn_args): Handle field descriptor +Q.
* mips-opc.c (mips_builtin_opcodes): Add Octeon instructions seq,
seqi, sne and snei.
gas/
* config/tc-mips.c (validate_mips_insn): Handle field descriptor +Q.
(mips_ip): Likewise.
(macro_build): Likewise.
(CPU_HAS_SEQ): New macro.
(macro2) <M_SEQ_I, M_SNE_I>: Use it. Emit seq/sne and seqi/snei.
gas/testsuite/
* gas/mips/octeon.s, gas/mips/octeon.d: Add tests for seq* and sne*.
* gas/mips/octeon-ill.s, gas/mips/octeon-ill.s: Add tests for seqi
and snei.
2008-06-12 21:44:54 +00:00
bb35fb24c1
include/opcode/
...
* mips.h: Document new field descriptors +x, +X, +p, +P, +s, +S.
Update comment before MIPS16 field descriptors to mention MIPS16.
(OP_SH_BBITIND, OP_MASK_BBITIND): New bit mask and shift count for
BBIT.
(OP_SH_CINSPOS, OP_MASK_CINSPOS, OP_SH_CINSLM1, OP_MASK_CINSLM1):
New bit masks and shift counts for cins and exts.
gas/
* config/tc-mips.c (validate_mips_insn): Handle field descriptors
+x, +X, +p, +P, +s, +S.
(mips_ip): Likewise.
opcodes/
* mips-dis.c (print_insn_args): Handle field descriptors +x, +p,
+s, +S.
* mips-opc.c (mips_builtin_opcodes): Add Octeon instructions
baddu, bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs,
syncw, syncws, vm3mulu, vm0 and vmulu.
gas/testsuite/
* gas/mips/octeon.s, gas/mips/octeon.d: Add tests for baddu,
bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs, syncw,
syncws, vm3mulu, vm0 and vmulu.
* gas/mips/octeon-ill.s, gas/mips/octeon-ill.s: New test.
* gas/mips/mips.exp: Run it. Run octeon test with
run_dump_test_arches.
2008-06-12 16:14:52 +00:00
e8568f6c63
/gas:
...
2008-06-09 Eric B. Weddington <eric.weddington@atmel.com>
* config/tc-avr.c (mcu_types): Remove support for ATmega32HVB device.
* doc/c-avr.texi: Likewise.
2008-06-09 16:07:02 +00:00
83bd74026c
* app.c (do_scrub_chars): Do not UNGET an EOF value.
2008-06-04 16:10:21 +00:00
cb19c0328d
gas/
...
2008-06-03 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (set_sse_check): New.
(md_pseudo_table): Add "sse_check".
gas/testsuite/
2008-06-03 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run sse-check-none and
x86-64-sse-check-none.
* gas/i386/sse-check-none.d: New.
* gas/i386/sse-check-none.s: Likewise.
* gas/i386/x86-64-sse-check-none.d: Likewise.
2008-06-03 17:31:52 +00:00
4ecab7d4c2
2008-06-03 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (do_t_rbit): Populate both rm fields.
gas/testsuite/
* gas/arm/thumb32.d: Update expected output.
2008-06-03 14:29:07 +00:00
a5dabbb023
gas/testsuite/
...
2008-05-30 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/x86-64-avx.s: Add tests for vmovd on 64bit operands.
* gas/i386/x86-64-sse2avx.s: Add tests for movd on 64bit
operands.
* gas/testsuite/gas/i386/x86-64-avx.d: Updated.
* gas/testsuite/gas/i386/x86-64-avx-intel.d: Likewise.
* gas/testsuite/gas/i386/x86-64-sse2avx.d: Likewise.
opcodes/
2008-05-30 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.tbl: Add vmovd with 64bit operand.
* i386-tbl.h: Regenerated.
2008-05-30 19:49:18 +00:00
0a903babef
PR 5523
...
* config/tc-avr.c (avr_ldi_expression): Do not warn about unknown
relocs here.
2008-05-30 14:20:27 +00:00
b15591bb36
* config/tc-mips.c (mips_cpu_info_table): Move records for
...
ST Loongson-2E/2F processors to a better place.
2008-05-29 16:03:41 +00:00
725a9891bc
2008-05-27 Martin Schwidefsky <schwidefsky@de.ibm.com>
...
* s390-opc.c (INSTR_RRF_R0RR): Fix RRF_R0RR operand format.
2008-05-27 Martin Schwidefsky <schwidefsky@de.ibm.com>
* gas/s390/zarch-z990.d (idte): Fix operand format.
2008-05-27 12:52:44 +00:00
95f283e8f6
2008-05-23 H.J. Lu <hongjiu.lu@intel.com>
...
PR gas/6518
* config/tc-i386.c (match_template): Report ambiguous operand
size, not invalid suffix when there is no match in Intel
syntax.
2008-05-23 13:55:36 +00:00
cbc80391d0
gas/testsuite/
...
2008-05-22 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/sse-noavx.s: Add tests for cvtpd2pi, cvtpi2pd and
cvttpd2pi.
* gas/i386/x86-64-sse-noavx.s: Likewise.
* gas/i386/sse-noavx.d: Updated.
* gas/i386/x86-64-sse-noavx.d: Likewise.
opcodes/
2008-05-22 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.tbl: Add NoAVX to cvtpd2pi, cvtpi2pd and cvttpd2pi.
* i386-tbl.h: Regenerated.
2008-05-23 00:18:52 +00:00
116615c5f7
gas/testsuite/
...
2008-05-22 H.J. Lu <hongjiu.lu@intel.com>
PR gas/6517
* gas/i386/avx.s: Add tests for unspecified memory operand
size in Intel syntax.
* gas/i386/x86-64-avx.s: Likewise.
* gas/i386/simd.s: Add tests for cvtsi2ss and cvtsi2sd with
unspecified memory operand size in Intel syntax.
* gas/i386/avx.d: Updated.
* gas/i386/avx-intel.d: Likewise.
* gas/i386/simd.d: Likewise.
* gas/i386/simd-intel.d: Likewise.
* gas/i386/simd-suffix.d: Likewise.
* gas/i386/x86-64-avx.d: Likewise.
* gas/i386/x86-64-avx-intel.d: Likewise.
opcodes/
2008-05-22 H.J. Lu <hongjiu.lu@intel.com>
PR gas/6517
* i386-opc.tbl: Break cvtsi2ss/cvtsi2sd/vcvtsi2sd/vcvtsi2ss
into 32bit and 64bit. Remove Reg64|Qword and add
IgnoreSize|No_qSuf on 32bit version.
* i386-tbl.h: Regenerated.
2008-05-22 20:52:54 +00:00
c462b453bd
2008-05-22 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (parse_cond): Covert to lowercase before matching.
2008-05-22 17:03:55 +00:00
d9479f2d8d
gas/testsuite/
...
2008-05-21 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/sse-noavx.s: Add tests for movdq2q and movq2dq.
* gas/i386/x86-64-sse-noavx.s: Likewise.
* gas/i386/sse-noavx.d: Updated.
* gas/i386/x86-64-sse-noavx.d: Likewise.
opcodes/
2008-05-21 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.tbl: Add NoAVX to movdq2q and movq2dq.
* i386-tbl.h: Regenerated.
2008-05-21 21:40:57 +00:00
7fac05361c
* config/tc-arm.c (arm_cpus): Add Faraday ARMv4 and ARMv5TE
...
compatible cores: fa526, fa626, fa626te, fa726te.
* doc/c-arm.texi (ARM Opts): Add -mcpu={fa526, fa626, fa626te,
fa726te} options.
2008-05-21 08:20:17 +00:00
8944f3c277
update dependencies
2008-05-14 06:45:42 +00:00
35903be00c
gas/
...
* config/tc-mips.c (mips_frob_file): Don't match MIPS16 relocs
with non-MIPS16 relocs.
gas/testsuite/
* gas/mips/mips16-hilo-match.s: New test.
* gas/mips/mip16-hilo-match.d: New test output.Index: config/tc-mips.c
2008-05-09 19:28:47 +00:00
c41e87e39e
* config/tc-mips.c (md_begin): Use strncmp to compare TARGET_OS, in
...
case that some characters append at the end of the name.
(mips_ip): Likewise.
(s_change_sec): Likewise.
(md_section_align): Likewise.
2008-05-09 18:18:22 +00:00
51c8ebc1d0
bfd/
...
* elf32-xtensa.c (xtensa_property_section_name): New.
(xtensa_make_property_section): New.
(xtensa_get_property_section): Make static. Do not create a new
section if it does not exist.
gas/
* config/tc-xtensa.c (xtensa_create_property_segments): Use
xtensa_make_property_section instead of xtensa_get_property_section.
(xtensa_create_xproperty_segments): Likewise.
2008-05-07 23:13:09 +00:00
f1f8f695c0
gas/
...
2008-05-02 H.J. Lu <hongjiu.lu@intel.com>
* NEWS: Mention XSAVE, EPT and MOVBE.
* config/tc-i386.c (cpu_arch): Add .movbe and .ept.
(md_show_usage): Add .movbe and .ept.
* doc/c-i386.texi: Add movbe and ept to -march=. Document
.movbe and .ept.
gas/testsuite/
2008-05-02 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run movbe, movbe-intel, inval-movbe, ept,
ept-intel, inval-ept, x86-64-movbe, x86-64-movbe-intel,
x86-64-inval-movbe. x86-64-ept, x86-64-ept-intel and
x86-64-inval-ept.
* gas/i386/arch-10.s: Add movbe and invept.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/ept.d: New file
* gas/i386/ept-intel.d: Likewise.
* gas/i386/ept.s: Likewise.
* gas/i386/inval-ept.l: Likewise.
* gas/i386/inval-ept.s: Likewise.
* gas/i386/inval-movbe.l: Likewise.
* gas/i386/inval-movbe.s: Likewise.
* gas/i386/movbe.d: Likewise.
* gas/i386/movbe-intel.d: Likewise.
* gas/i386/movbe.s: Likewise.
* gas/i386/x86-64-inval-ept.l: Likewise.
* gas/i386/x86-64-inval-ept.s: Likewise.
* gas/i386/x86-64-inval-movbe.l: Likewise.
* gas/i386/x86-64-inval-movbe.s: Likewise.
* gas/i386/x86-64-ept.d: Likewise.
* gas/i386/x86-64-ept-intel.d: Likewise.
* gas/i386/x86-64-ept.s: Likewise.
* gas/i386/x86-64-movbe.d: Likewise.
* gas/i386/x86-64-movbe-intel.d: Likewise.
* gas/i386/x86-64-movbe.s: Likewise.
* gas/i386/arch-10.d: Updated.
* gas/i386/arch-10-1.l: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
opcodes/
2008-05-02 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (MOVBE_Fixup): New.
(Mo): Likewise.
(PREFIX_0F3880): Likewise.
(PREFIX_0F3881): Likewise.
(PREFIX_0F38F0): Updated.
(prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881. Update
PREFIX_0F38F0 and PREFIX_0F38F1 for movbe.
(three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881.
* i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and
CPU_EPT_FLAGS.
(cpu_flags): Add CpuMovbe and CpuEPT.
* i386-opc.h (CpuMovbe): New.
(CpuEPT): Likewise.
(CpuLM): Updated.
(i386_cpu_flags): Add cpumovbe and cpuept.
* i386-opc.tbl: Add entries for movbe and EPT instructions.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-05-02 16:53:40 +00:00
9239aded50
missed from 20080414 commit for e500mc support
2008-04-30 06:47:24 +00:00
2b661f3dc2
* config/tc-sparc.c (v9a_asr_table): Fix order of softint entries.
2008-04-30 03:50:39 +00:00
f6829a452a
* gas/mips/mips4.s: Split out fp instruction from here ...
...
* gas/mips/mips4-fp.s: ... to here.
* gas/mips/mips4.d: Update.
* gas/mips/mips4-fp.l: New file. Check error messages with
-msoft-float.
* gas/mips/mips4-fp.d: New file. Check disassembly with
hard-float.
* gas/mips/mips32r2.s: Split out fp instructions from here ...
* gas/mips/mips32r2-fp32.s: ... to here.
* gas/mips/mips32r2.d: Update.
* gas/mips/mips32r2-fp32.l: New file. Check error messages with
-msoft-float.
* gas/mips/mips32r2-fp32.d: New file. Check disassembly with
hard-float.
* gas/mips/mips32r2-ill-nofp.s, gas/mips/mips32r2-ill-nofp.l: New
test derived from mips32r2-ill.
* gas/mips/mips32-sf32.l: New list test for mips32-sf32.s to check
error messages for soft-float targets.
* gas/mips/mips-macro-ill-sfp.s, gas/mips/mips-macro-ill-sfp.l:
New test for -msingle-float.
* gas/mips/mips-macro-ill-nofp.s, gas/mips/mips-macro-ill-nofp.l:
New test for -msoft-float.
* gas/mips/mips-hard-float-flag.s,
gas/mips/mips-hard-float-flag.l: New test for -mhard-float.
* gas/mips/mips-double-float-flag.s,
gas/mips/mips-double-float-flag.l: New test for -mdouble-float.
* gas/mips/mips.exp: Run new mips4-fp and mips32r2-fp dump tests.
Run mips4-fp and mips32r2-fp list tests with -msoft-float. Run
new mips32r2-ill-nofp with -msoft-float. Run new mips32-sf32 list
test with -msoft-float. Run new mips-macro-ill-sfp test with
-msingle-float. Run new mips-macro-ill-nofp test with
-msoft-float. Run new mips-hard-float-flag and
mips-double-float-flag tests.
2008-04-28 17:10:18 +00:00
037b32b9ff
* config/tc-mips.c (file_mips_soft_float, file_mips_single_float):
...
New statics.
(OPTION_ELF_BASE): Make room for new option macros.
(OPTION_SOFT_FLOAT, OPTION_HARD_FLOAT, OPTION_SINGLE_FLOAT,
OPTION_DOUBLE_FLOAT): New option macros.
(md_longopts): Add msoft-float, mhard-float, msingle-float and
mdouble-float.
(md_parse_option): Handle OPTION_SINGLE_FLOAT,
OPTION_DOUBLE_FLOAT, OPTION_SOFT_FLOAT and OPTION_HARD_FLOAT.
(md_show_usage): Add -msoft-float, -mhard-float, -msingle-float
and -mdouble-float.
(struct mips_set_options): New fields soft_float and single_float.
(mips_opts): Initialized them. Add comment for each field
initializer.
(mips_after_parse_args): Set them based on file_mips_soft_float
and file_mips_single_float.
(s_mipsset): Add support for `.set softfloat', `.set hardfloat',
`.set singlefloat' and `.set doublefloat'.
(is_opcode_valid): New function to invoke OPCODE_IS_MEMBER.
Handle single-float and soft-float instructions here.
(macro_build, mips_ip): Use it instead of OPCODE_IS_MEMBER.
(is_opcode_valid_16): New function.
(mips16_ip): Use it instead of OPCODE_IS_MEMBER.
(macro) <M_LDC1_AB, M_SDC1_AB, M_L_DOB, M_L_DAB, M_S_DAB,
M_S_DOB>: Remove special-casing of r4650.
* doc/c-mips.texi (-march=): Add Octeon.
(MIPS Opts): Document -msoft-float and -mhard-float. Document
-msingle-float and -mdouble-float.
(MIPS floating-point): New section. Document `.set softfloat' and
`.set hardfloat'. Document `.set singlefloat' and `.set
doublefloat'.
2008-04-28 17:06:28 +00:00
f04d18b76a
gas/
...
* config/tc-sparc.c: Accept 'softint_clear' and 'softint_set'
%asr aliases.
* doc/c-sparc.texi: Consistently refer to architecture 'versions',
rather than occaisionally 'levels'. Consistently refer to Sun's
UNIX variant as SunOS, every version of Solaris is also SunOS.
Document new 'softint_clear' and 'softint_set' aliases. Clarify
which architecture versions support '%dcr', '%cq', and '%gl'. Add
section on 32-bit/64-bit opcode translations.
opcodes/
* sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr
instead of %sys_tick_cmpr, as suggested in architecture manuals.
2008-04-25 19:58:03 +00:00
879d3736b8
(oops) Add changelog entry for David Miller's SunPRO support patch which was
...
accidentally omitted yesterday.
2008-04-24 08:20:55 +00:00
fe4fa32c96
2008-04-23 Mike Frysinger <vapier@gentoo.org>
...
* Makefile.am (OBJ_FORMAT_CFILES): Add config/obj-fdpicelf.c.
(OBJ_FORMAT_HFILES): Add config/obj-fdpicelf.h.
(obj-fdpicelf.o): Define.
* Makefile.in: Regenerate.
* configure.tgt: Set bfd_gas to yes when fmt is fdpicelf.
(bfin-*-*): Delete.
(bfin-*-linux-uclibc): New; set fmt to fdpicelf and em to linux.
(bfin-*-uclinux*): New; set fmt to elf and em to linux.
* config/obj-fdpicelf.c: New.
* config/obj-fdpicelf.h: Likewise.
* config/tc-bfin.c (bfin_flags, bfin_pic_flag): Set default based on
the OBJ_FDPIC_ELF define.
(OPTION_NOPIC): Define.
(md_longopts): Add mnopic and mno-fdpic.
(md_parse_option): Handle OPTION_NOPIC.
2008-04-23 18:40:34 +00:00
6194aaaba7
bfd/
...
2008-04-23 Paolo Bonzini <bonzini@gnu.org>
* aclocal.m4: Regenerate.
* configure: Regenerate.
binutils/
2008-04-23 Paolo Bonzini <bonzini@gnu.org>
* aclocal.m4: Regenerate.
* configure: Regenerate.
gas/
2008-04-23 Paolo Bonzini <bonzini@gnu.org>
* aclocal.m4: Regenerate.
* configure: Regenerate.
gold/
2008-04-23 Paolo Bonzini <bonzini@gnu.org>
* aclocal.m4: Regenerate.
* configure: Regenerate.
gprof/
2008-04-23 Paolo Bonzini <bonzini@gnu.org>
* aclocal.m4: Regenerate.
* configure: Regenerate.
ld/
2008-04-23 Paolo Bonzini <bonzini@gnu.org>
* aclocal.m4: Regenerate.
* configure: Regenerate.
opcodes/
2008-04-23 Paolo Bonzini <bonzini@gnu.org>
* aclocal.m4: Regenerate.
* configure: Regenerate.
2008-04-23 16:11:47 +00:00
9ba52a267b
2008-04-23 H.J. Lu <hongjiu.lu@intel.com>
...
* gas/i386/i386.exp: Run sse-noavx and x86-64-sse-noavx.
* gas/i386/sse-noavx.d: New.
* gas/i386/sse-noavx.s: Likewise.
* gas/i386/x86-64-sse-noavx.d: Likewise.
* gas/i386/x86-64-sse-noavx.s: Likewise.
2008-04-23 16:01:10 +00:00
084076b886
2008-04-23 H.J. Lu <hongjiu.lu@intel.com>
...
* gas/i386/sse2.s: Add tests for pmuludq, paddq and psubq.
* gas/i386/x86-64-simd.s: Likewise.
* gas/i386/sse2.d: Updated.
* gas/i386/x86-64-simd.d: Likewise.
* gas/i386/x86-64-simd-intel.d: Likewise.
* gas/i386/x86-64-simd-suffix.d: Likewise.
2008-04-23 14:34:05 +00:00
44bf236263
* config/obj-elf.c (obj_elf_section_type): Add prototype
...
before obj_elf_section_word and add 'warn' arg.
(obj_elf_section_word): Add type pointer arg, and if no #SECTION
is matched, try checking for #SECTION_TYPE.
(obj_elf_section): Adjust for new args.
(obj_elf_type_name): New function.
(obj_elf_type): Call it, and accept STT_foo number strings
in .type statements as output by SunPRO compiler.
2008-04-23 13:54:56 +00:00
1a6b486f73
opcodes/
...
* sparc-opc.c (asi_table): Add UltraSPARC and Niagara
extended values.
(prefetch_table): Add missing values.
gas/
* config/tc-sparc.c (v9a_asr_table): Add missing
'stick' and 'stick_cmpr', and document ordering rules
of table.
(tc_gen_reloc): Accept BFD_RELOC_SPARC_PC22 and
BFD_RELOC_SPARC_PC10.
* doc/c-sparc.texi: New section on Sparc constants.
Add documentation for %stick and %stick_cmpr.
gas/testsuite/
* gas/sparc/pc2210.d: New file.
* gas/sparc/pc2210.d: Likewise.
* gas/sparc/sparc.exp: Run new %pc22/%pc10 relocation test.
2008-04-23 07:49:33 +00:00
81f8a9131a
gas/
...
2008-04-22 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (md_assemble): Don't check SSE instructions
if noavx is 0.
opcodes/
2008-04-22 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Add NoAVX.
* i386-opc.h (NoAVX): New.
(OldGcc): Updated.
(i386_opcode_modifier): Add noavx.
* i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3
instructions which don't have AVX equivalent.
* i386-tbl.h: Regenerated.
2008-04-22 22:27:13 +00:00
c15295d545
* doc/c-sparc.texi: Add syntax section.
2008-04-18 21:19:48 +00:00
eff014d916
2008-04-18 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (build_modrm_byte): Don't check FMA to swap
REG and NDS for instructions with immediate operand.
2008-04-18 18:22:37 +00:00
dae39accc2
gas/
...
2008-04-18 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (build_modrm_byte): Swap REG and NDS for
FMA.
gas/testsuite/
2008-04-18 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/arch-10.d: Updated.
* gas/i386/avx.d: Likewise.
* gas/i386/avx-intel.d: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
* gas/i386/x86-64-avx.d: Likewise.
* gas/i386/x86-64-avx-intel.d: Likewise.
opcodes/
2008-04-18 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (OP_VEX_FMA): New.
(OP_EX_VexImmW): Likewise.
(VexFMA): Likewise.
(Vex128FMA): Likewise.
(EXVexImmW): Likewise.
(get_vex_imm8): Likewise.
(OP_EX_VexReg): Likewise.
(vex_i4_done): Renamed to ...
(vex_w_done): This.
(prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps
and vpermil2pd. Replace Vex/Vex128 with VexFMA/Vex128FMA on
FMA instructions.
(print_insn): Updated.
(OP_EX_VexW): Rewrite to swap register in VEX with EX.
(OP_REG_VexI4): Check invalid high registers.
2008-04-18 13:10:32 +00:00
14865d7608
* config/tc-sparc.c (sparc_ip): Recognize %pc22 and %pc10.
2008-04-18 08:47:35 +00:00
ce886ab1f8
<opcode changes>
...
2008-04-16 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
Michael Meissner <michael.meissner@amd.com>
* i386-opc.tbl: Fix protX to allow memory in the middle operand.
* i386-tbl.h: Regenerate from i386-opc.tbl.
<gas/testsuite changes>
2008-04-16 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
Michael Meissner <michael.meissner@amd.com>
* gas/i386/x86-64-sse5.s: Add protX tests to allow memory in the middle
operand.
* gas/i386/x86-64-sse5.d: Likewise.
2008-04-16 15:31:33 +00:00
dc2f32e79b
Sorry, missed this ChangeLog updat in previous commit.
2008-04-16 08:52:15 +00:00
739f7f82be
bfd/
...
* reloc.c (BFD_RELOC_SPARC_GOTDATA_HIX22,
BFD_RELOC_SPARC_GOTDATA_LOX10, BFD_RELOC_SPARC_GOTDATA_OP_HIX22,
BFD_RELOC_SPARC_GOTDATA_OP_LOX10, BFD_RELOC_SPARC_GOTDATA_OP): New.
* libbfd.h: Regnerate.
* bfd-in2.h: Regenerate.
* elfxx-sparc.c (_bfd_sparc_elf_howto_table): Add entries for
GOTDATA relocations.
(sparc_reloc_map): Likewise.
(_bfd_sparc_elf_check_relocs): Handle R_SPARC_GOTDATA_* like
R_SPARC_GOT*.
(_bfd_sparc_elf_gc_sweep_hook): Likewise.
(_bfd_sparc_elf_relocate_section): Transform R_SPARC_GOTDATA_HIX22,
R_SPARC_GOTDATA_LOX10, R_SPARC_GOTDATA_OP_HIX22, and
R_SPARC_GOTDATA_OP_LOX10 into the equivalent R_SPARC_GOT* reloc.
Simply ignore R_SPARC_GOTDATA_OP relocations.
gas/
* config/tc-sparc.c (sparc_ip): Add support for gotdata mnemonics
and relocation generation.
(tc_gen_reloc): Likewise.
gas/testsuite/
* gas/sparc/gotops32.d: New.
* gas/sparc/gotops32.s: Likewise.
* gas/sparc/gotops64.d: Likewise.
* gas/sparc/gotops64.s: Likewise.
* gas/sparc/sparc.exp: Run new gotdata tests.
ld/testsuite/
* ld-sparc/gotop32.dd: New.
* ld-sparc/gotop32.rd: Likewise.
* ld-sparc/gotop32.s: Likewise.
* ld-sparc/gotop32.sd: Likewise.
* ld-sparc/gotop32.td: Likewise.
* ld-sparc/gotop64.dd: Likewise.
* ld-sparc/gotop64.rd: Likewise.
* ld-sparc/gotop64.s: Likewise.
* ld-sparc/gotop64.sd: Likewise.
* ld-sparc/gotop64.td: Likewise.
* ld-sparc/sparc.exp: Run new gotdata tests.
2008-04-16 08:51:18 +00:00
52b5ca5b35
2008-04-15 Andrew Stubbs <andrew.stubbs@st.com>
...
gas/
* config/tc-sh.c (md_apply_fix): Make sure BFD_RELOC_SH_PCRELIMM8BY4
relocations are properly aligned, and not negative.
gas/testsuite/
* gas/sh/arch/arch.exp: Align PC-relative instructions in the gererated
assembly files.
* gas/sh/arch/sh-dsp.s: Regenerate.
* gas/sh/arch/sh.s: Regenerate.
* gas/sh/arch/sh2.s: Regenerate.
* gas/sh/arch/sh2a-nofpu-or-sh3-nommu.s: Regenerate.
* gas/sh/arch/sh2a-nofpu-or-sh4-nommu-nofpu.s: Regenerate.
* gas/sh/arch/sh2a-nofpu.s: Regenerate.
* gas/sh/arch/sh2a-or-sh3e.s: Regenerate.: Regenerate.
* gas/sh/arch/sh2a-or-sh4.s: Regenerate.
* gas/sh/arch/sh2a.s: Regenerate.
* gas/sh/arch/sh2e.s: Regenerate.
* gas/sh/arch/sh3-dsp.s: Regenerate.
* gas/sh/arch/sh3-nommu.s: Regenerate.
* gas/sh/arch/sh3.s: Regenerate.
* gas/sh/arch/sh3e.s: Regenerate.
* gas/sh/arch/sh4-nofpu.s: Regenerate.
* gas/sh/arch/sh4-nommu-nofpu.s: Regenerate.
* gas/sh/arch/sh4.s: Regenerate.
* gas/sh/arch/sh4a-nofpu.s: Regenerate.
* gas/sh/arch/sh4a.s: Regenerate.
* gas/sh/arch/sh4al-dsp.s: Regenerate.
* gas/sh/err-mova.s: New test.
ld/testsuite/
* ld-sh/arch/sh-dsp.s: Regenerate.
* ld-sh/arch/sh.s: Regenerate.
* ld-sh/arch/sh2.s: Regenerate.
* ld-sh/arch/sh2a-nofpu-or-sh3-nommu.s: Regenerate.
* ld-sh/arch/sh2a-nofpu-or-sh4-nommu-nofpu.s: Regenerate.
* ld-sh/arch/sh2a-nofpu.s: Regenerate.
* ld-sh/arch/sh2a-or-sh3e.s: Regenerate.: Regenerate.
* ld-sh/arch/sh2a-or-sh4.s: Regenerate.
* ld-sh/arch/sh2a.s: Regenerate.
* ld-sh/arch/sh2e.s: Regenerate.
* ld-sh/arch/sh3-dsp.s: Regenerate.
* ld-sh/arch/sh3-nommu.s: Regenerate.
* ld-sh/arch/sh3.s: Regenerate.
* ld-sh/arch/sh3e.s: Regenerate.
* ld-sh/arch/sh4-nofpu.s: Regenerate.
* ld-sh/arch/sh4-nommu-nofpu.s: Regenerate.
* ld-sh/arch/sh4.s: Regenerate.
* ld-sh/arch/sh4a-nofpu.s: Regenerate.
* ld-sh/arch/sh4a.s: Regenerate.
* ld-sh/arch/sh4al-dsp.s: Regenerate.
2008-04-15 15:53:26 +00:00
a5f245b565
* doc/tc-arm.texi: Fix fnstart and fnend directive names.
2008-04-15 14:25:30 +00:00
19a6653ce8
ppc e500mc support
2008-04-14 11:01:38 +00:00
24f4d50fc1
2008-04-11 H.J. Lu <hongjiu.lu@intel.com>
...
* gas/lns/lns-big-delta.d: Updated.
* gas/lns/lns-common-1.d: Likewise.
* gas/lns/lns-common-1-alt.d: Likewise.
* gas/lns/lns-duplicate.d: Likewise.
2008-04-11 17:51:15 +00:00
d5a35a5552
* listing.c (print_timestamp): Use localtime rather than
...
localtime_r since not all build environments provide the latter.
2008-04-11 09:06:02 +00:00
daf50ae75d
gas/
...
2008-04-10 H.J. Lu <hongjiu.lu@intel.com>
* NEWS: Mention -msse-check=[none|error|warning].
* config/tc-i386.c (sse_check): New.
(OPTION_MSSE_CHECK): Likewise.
(md_assemble): Check SSE instructions if needed.
(md_longopts): Add -msse-check.
(md_parse_option): Handle OPTION_MSSE_CHECK.
(md_show_usage): Show -msse-check=[none|error|warning].
* doc/c-i386.texi: Document -msse-check=[none|error|warning].
gas/testsuite/
2008-04-10 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run sse-check, sse-check-warn,
sse-check-error, x86-64-sse-check, x86-64-sse-check-warn and
x86-64-sse-check-error.
* gas/i386/sse-check.d: New.
* gas/i386/sse-check.s: Likewise.
* gas/i386/sse-check-error.l: Likewise.
* gas/i386/sse-check-error.s: Likewise.
* gas/i386/sse-check-warn.d: Likewise.
* gas/i386/sse-check-warn.e: Likewise.
* gas/i386/x86-64-sse-check.d: Likewise.
* gas/i386/x86-64-sse-check-error.l: Likewise.
* gas/i386/x86-64-sse-check-error.s: Likewise.
* gas/i386/x86-64-sse-check-warn.d: Likewise.
2008-04-10 17:53:40 +00:00
83f10cb26a
* listing.c: Add -ag listing flag to show general information in
...
listings such as gas version, passed options, and time stamp.
(listing_general_info): New function.
(print_options): New function.
(print_single_option): New function.
(print_timestamp): New function.
(MAX_DATELEN): Define.
(listing_print): Add call to listing_general_info.
* listing.h (LISTING_GENERAL): Define.
(listing_print): Add new parameter.
* as.c (show_usage): Print new switch.
(parse_args): Parse new switch.
(main): Pass command line on to listing_print.
* NEWS: Mention this new feature.
* doc/as.texinfo: Document the new sub-option.
* gas/all/gas.exp: Check the performance of the -ag command line
switch.
2008-04-10 12:45:18 +00:00
45a5551e74
2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
...
* s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic
extensions for conditional jumps (o, p, m, nz, z, nm, np, no).
(s390_crb_extensions): New extensions table.
(insertExpandedMnemonic): Handle '$' tag.
* s390-opc.txt: Remove conditional jump variants which can now
be expanded automatically.
Replace '*' tag with '$' in the compare and branch instructions.
2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
* gas/s390/zarch-z10.d: Map the compare and branch variants
with odd condition code mask to version with an even mask.
2008-04-10 08:59:46 +00:00
7fd3924aef
* dwarf2dbg.c (dwarf2_emit_insn): Simplify test before dwarf2_where
...
call. Delete out of date comment.
(dwarf2_consume_line_info): Always clear dwarf2_loc_directive_seen.
(dwarf2_emit_label): Don't emit unless there has been a previous
.file or we are outputting assembler generated debug.
dwarf2_consume_line_info after emitting line info, not before.
(out_debug_info): Simplify files_in_use test.
2008-04-07 23:56:18 +00:00
f04cc279d0
Add the missing ymm test in the last checkin.
2008-04-07 14:38:25 +00:00
40f1253383
gas/
...
2008-04-07 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (parse_real_register): Return AVX register
only if AVX is enabled.
gas/testsuite/
2008-04-07 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/att-regs.s: Add AVX register test.
* gas/i386/intel-regs.s: Likewise.
* gas/i386/att-regs.d: Updated.
* gas/i386/intel-regs.d: Likewise.
2008-04-07 13:07:16 +00:00
783d3e7187
PR gas/6043
...
* config/tc-sh64.c (shmedia_md_pcrel_from_section): Use
md_pcrel_from_section for BFD_RELOC_64 and BFD_RELOC_64_PCREL.
* gas/sh/sh64/eh-1.d: New.
* gas/sh/sh64/eh-1.d: Likewise.
2008-04-07 02:55:08 +00:00
1b6e95c267
2008-04-04 Adrian Bunk <bunk@stusta.de>
...
Bob Wilson <bob.wilson@acm.org>
* config/tc-xtensa.c (xg_apply_fix_value): Check return code from
call to decode_reloc.
2008-04-04 23:25:49 +00:00
594ab6a333
gas/
...
2008-04-04 H.J. Lu <hongjiu.lu@intel.com>
* NEWS: Mention XSAVE. Change CLMUL to PCLMUL.
* config/tc-i386.c (cpu_arch): Add .pclmul.
(md_show_usage): Replace clmul with pclmul.
* doc/c-i386.texi: Likewise.
gas/testsuite/
2008-04-04 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/arch-10-1.l: Replace CLMUL with PCLMUL.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/arch-10.s: Likewise.
* gas/i386/clmul-intel.d: Likewise.
* gas/i386/clmul.d: Likewise.
* gas/i386/clmul.s: Likewise.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/x86-64-clmul-intel.d: Likewise.
* gas/i386/x86-64-clmul.d: Likewise.
* gas/i386/x86-64-clmul.s: Likewise.
* gas/i386/arch-10.d: Replace clmul with pclmul.
* gas/i386/x86-64-arch-2.d: Likewise.
opcodes/
2008-04-04 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
with CPU_PCLMUL_FLAGS/CpuPCLMUL.
(cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
* i386-opc.tbl: Likewise.
* i386-opc.h (CpuCLMUL): Renamed to ...
(CpuPCLMUL): This.
(CpuFMA): Updated.
(i386_cpu_flags): Replace cpuclmul with cpupclmul.
* i386-init.h: Regenerated.
2008-04-04 16:34:23 +00:00
c0f3af977b
binutils/
...
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* dwarf.c (dwarf_regnames_i386): Add AVX registers.
(dwarf_regnames_x86_64): Likewise.
gas/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* NEWS: Mention AES, CLMUL, AVX/FMA and -msse2avx.
* doc/c-i386.texi: Add avx, aes, clmul and fma to -march=.
Document -msse2avx, .avx, .aes, .clmul and .fma.
* config/tc-i386.c (YMMWORD_MNEM_SUFFIX): New.
(vex_prefix): Likewise.
(sse2avx): Likewise.
(CPU_FLAGS_ARCH_MATCH): Likewise.
(CPU_FLAGS_64BIT_MATCH): Likewise.
(CPU_FLAGS_32BIT_MATCH): Likewise.
(CPU_FLAGS_PERFECT_MATCH): Likewise.
(regymm): Likewise.
(vex_imm4): Likewise.
(fits_in_imm4): Likewise.
(build_vex_prefix): Likewise.
(VEX_check_operands): Likewise.
(bad_implicit_operand): Likewise.
(OPTION_MSSE2AVX): Likewise.
(T_YMMWORD): Likewise.
(_i386_insn): Add vex.
(cpu_arch): Add .avx, .aes, .clmul and .fma.
(cpu_flags_match): Changed to take a pointer to const template.
Enable encoding SSE instructions with VEX prefix for -msse2avx.
(match_mem_size): Also check ymmword.
(operand_type_match): Clear ymmword.
(md_begin): Allow '_' in mnemonic.
(type_names): Add OPERAND_TYPE_VEX_IMM4.
(process_immext): Update assert.
(md_assemble): Don't call process_immext if sse2avx and immext
are true. Call build_vex_prefix if vex is true.
(parse_insn): Updated for cpu_flags_match.
(swap_operands): Handle 5 operands.
(match_template): Handle 5 operands. Updated for cpu_flags_match.
Check regymm. Call VEX_check_operands. Handle YMMWORD_MNEM_SUFFIX.
(process_suffix): Handle YMMWORD_MNEM_SUFFIX.
(check_byte_reg): Check regymm.
(process_operands): Duplicate the destination register for
-msse2avx if needed.
(build_modrm_byte): Updated for instructions with VEX encoding.
(output_insn): Output VEX prefix if needed.
(md_longopts): Add msse2avx.
(md_parse_option): Handle OPTION_MSSE2AVX.
(md_show_usage): Add avx, aes, clmul, fma and -msse2avx.
(intel_e09): Support YMMWORD.
(intel_e11): Likewise.
(intel_get_token): Likewise.
gas/testsuite/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run aes, aes-intel, x86-64-aes,
x86-64-aes-intel, avx, avx-intel, inval-avx, x86-64-avx,
x86-64-avx-intel and x86-64-inval-avx.
* gas/cfi/cfi-i386.s: Add tests for AVX register maps.
* gas/cfi/cfi-x86_64.s: Likewise.
* gas/i386/aes.d: New.
* gas/i386/aes.s: Likewise.
* gas/i386/aes-intel.d: Likewise.
* gas/i386/avx.d: Likewise.
* gas/i386/avx.s: Likewise.
* gas/i386/avx-intel.d: Likewise.
* gas/i386/clmul.d: Likewise.
* gas/i386/clmul-intel.d: Likewise.
* gas/i386/clmul.s: Likewise.
* gas/i386/i386.exp: Likewise.
* gas/i386/inval-avx.l: Likewise.
* gas/i386/inval-avx.s: Likewise.
* gas/i386/sse2avx.d: Likewise.
* gas/i386/sse2avx.s: Likewise.
* gas/i386/x86-64-aes.d: Likewise.
* gas/i386/x86-64-aes.s: Likewise.
* gas/i386/x86-64-aes-intel.d: Likewise.
* gas/i386/x86-64-avx.d: Likewise.
* gas/i386/x86-64-avx.s: Likewise.
* gas/i386/x86-64-avx-intel.d: Likewise.
* gas/i386/x86-64-clmul.d: Likewise.
* gas/i386/x86-64-clmul-intel.d: Likewise.
* gas/i386/x86-64-clmul.s: Likewise.
* gas/i386/x86-64-inval-avx.l: Likewise.
* gas/i386/x86-64-inval-avx.s: Likewise.
* gas/i386/x86-64-sse2avx.d: Likewise.
* gas/i386/x86-64-sse2avx.s: Likewise.
* gas/i386/arch-10.s: Add tests for AVX, AES, CLMUL and FMA.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/rexw.s: Add AVX tests.
* gas/i386/x86-64-opcode-inval.s: Remove lds/les test.
* gas/cfi/cfi-i386.d: Updated.
* gas/cfi/cfi-x86_64.d: Likewise.
* gas/i386/arch-10.d: Likewise.
* gas/i386/arch-10-1.l: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/rexw.d: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
* gas/i386/x86-64-opcode-inval.d: Likewise.
* gas/i386/x86-64-opcode-inval-intel.d: Likewise.
include/opcode/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (MAX_OPERANDS): Set to 5.
(MAX_MNEM_SIZE): Changed to 20.
opcodes/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (OP_E_register): New.
(OP_E_memory): Likewise.
(OP_VEX): Likewise.
(OP_EX_Vex): Likewise.
(OP_EX_VexW): Likewise.
(OP_XMM_Vex): Likewise.
(OP_XMM_VexW): Likewise.
(OP_REG_VexI4): Likewise.
(PCLMUL_Fixup): Likewise.
(VEXI4_Fixup): Likewise.
(VZERO_Fixup): Likewise.
(VCMP_Fixup): Likewise.
(VPERMIL2_Fixup): Likewise.
(rex_original): Likewise.
(rex_ignored): Likewise.
(Mxmm): Likewise.
(XMM): Likewise.
(EXxmm): Likewise.
(EXxmmq): Likewise.
(EXymmq): Likewise.
(Vex): Likewise.
(Vex128): Likewise.
(Vex256): Likewise.
(VexI4): Likewise.
(EXdVex): Likewise.
(EXqVex): Likewise.
(EXVexW): Likewise.
(EXdVexW): Likewise.
(EXqVexW): Likewise.
(XMVex): Likewise.
(XMVexW): Likewise.
(XMVexI4): Likewise.
(PCLMUL): Likewise.
(VZERO): Likewise.
(VCMP): Likewise.
(VPERMIL2): Likewise.
(xmm_mode): Likewise.
(xmmq_mode): Likewise.
(ymmq_mode): Likewise.
(vex_mode): Likewise.
(vex128_mode): Likewise.
(vex256_mode): Likewise.
(USE_VEX_C4_TABLE): Likewise.
(USE_VEX_C5_TABLE): Likewise.
(USE_VEX_LEN_TABLE): Likewise.
(VEX_C4_TABLE): Likewise.
(VEX_C5_TABLE): Likewise.
(VEX_LEN_TABLE): Likewise.
(REG_VEX_XX): Likewise.
(MOD_VEX_XXX): Likewise.
(PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
(PREFIX_0F3A44): Likewise.
(PREFIX_0F3ADF): Likewise.
(PREFIX_VEX_XXX): Likewise.
(VEX_OF): Likewise.
(VEX_OF38): Likewise.
(VEX_OF3A): Likewise.
(VEX_LEN_XXX): Likewise.
(vex): Likewise.
(need_vex): Likewise.
(need_vex_reg): Likewise.
(vex_i4_done): Likewise.
(vex_table): Likewise.
(vex_len_table): Likewise.
(OP_REG_VexI4): Likewise.
(vex_cmp_op): Likewise.
(pclmul_op): Likewise.
(vpermil2_op): Likewise.
(m_mode): Updated.
(es_reg): Likewise.
(PREFIX_0F38F0): Likewise.
(PREFIX_0F3A60): Likewise.
(reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
(prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
and PREFIX_VEX_XXX entries.
(x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
(three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
PREFIX_0F3ADF.
(mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
Add MOD_VEX_XXX entries.
(ckprefix): Initialize rex_original and rex_ignored. Store the
REX byte in rex_original.
(get_valid_dis386): Handle the implicit prefix in VEX prefix
bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
(print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
calling get_valid_dis386. Use rex_original and rex_ignored when
printing out REX.
(putop): Handle "XY".
(intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
ymmq_mode.
(OP_E_extended): Updated to use OP_E_register and
OP_E_memory.
(OP_XMM): Handle VEX.
(OP_EX): Likewise.
(XMM_Fixup): Likewise.
(CMP_Fixup): Use ARRAY_SIZE.
* i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
CPU_FMA_FLAGS and CPU_AVX_FLAGS.
(operand_type_init): Add OPERAND_TYPE_REGYMM and
OPERAND_TYPE_VEX_IMM4.
(cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
(opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
VexImmExt and SSE2AVX.
(operand_types): Add RegYMM, Ymmword and Vex_Imm4.
* i386-opc.h (CpuAVX): New.
(CpuAES): Likewise.
(CpuCLMUL): Likewise.
(CpuFMA): Likewise.
(Vex): Likewise.
(Vex256): Likewise.
(VexNDS): Likewise.
(VexNDD): Likewise.
(VexW0): Likewise.
(VexW1): Likewise.
(Vex0F): Likewise.
(Vex0F38): Likewise.
(Vex0F3A): Likewise.
(Vex3Sources): Likewise.
(VexImmExt): Likewise.
(SSE2AVX): Likewise.
(RegYMM): Likewise.
(Ymmword): Likewise.
(Vex_Imm4): Likewise.
(Implicit1stXmm0): Likewise.
(CpuXsave): Updated.
(CpuLM): Likewise.
(ByteOkIntel): Likewise.
(OldGcc): Likewise.
(Control): Likewise.
(Unspecified): Likewise.
(OTMax): Likewise.
(i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
(i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
vex3sources, veximmext and sse2avx.
(i386_operand_type): Add regymm, ymmword and vex_imm4.
* i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
* i386-reg.tbl: Add AVX registers, ymm0..ymm15.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-04-03 14:03:21 +00:00
2460c166ae
/gas:
...
2008-03-28 Eric B. Weddington <eric.weddington@atmel.com>
* config/tc-avr.c (mcu_types): Add attiny167.
* doc/c-avr.texi: Likewise.
/include:
2008-03-28 Eric B. Weddington <eric.weddington@atmel.com>
* opcode/avr.h (AVR_ISA_TINY3): Define new opcode set for attiny167.
2008-03-28 21:51:38 +00:00
70881657a2
/gas:
...
2008-03-28 Eric B. Weddington <eric.weddington@atmel.com>
* config/tc-avr.c (mcu_types): Add atmega32u4.
* doc/c-avr.texi: Likewise.
2008-03-28 21:04:22 +00:00
25755480bf
/gas:
...
2008-03-28 Eric B. Weddington <eric.weddington@atmel.com>
* config/tc-avr.c (mcu_types): Add atmega32c1.
* doc/c-avr.texi: Likewise.
2008-03-28 19:24:52 +00:00
4641781c11
2008-03-28 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (parse_neon_mov): Parse register before immediate
to avoid spurious symbols.
2008-03-28 18:13:52 +00:00
025987eae0
* config/tc-m68k.c (md_convert_frag_1): Replace as_fatal with
...
as_bad_where.
2008-03-28 09:51:13 +00:00
38de72b9a0
* config/tc-avr.c (mcu_types): Add atmega32m1.
...
* doc/c-avr.texi: Likewise.
2008-03-27 14:52:35 +00:00
35997600fc
* config/tc-arm.c (do_neon_cvt): Move variable declarations to
...
start of block.
(do_neon_ext): Fix sign of comparison.
2008-03-27 14:12:15 +00:00
086134ec0e
gas/testsuite/:
...
From Robin Getz <rgetz@blackfin.uclinux.org>
* gas/bfin/arithmetic.d: Update to reflect spaces/capitalization in
recent changes in opcodes/bfin-dis.c.
gas/bfin/arithmetic.s: Likewise.
gas/bfin/bit.d: Likewise.
gas/bfin/bit2.d: Likewise.
gas/bfin/control_code.d: Likewise.
gas/bfin/control_code2.d: Likewise.
gas/bfin/event.d: Likewise.
gas/bfin/event2.d: Likewise.
gas/bfin/flow.d: Likewise.
gas/bfin/flow2.d: Likewise.
gas/bfin/load.d: Likewise.
gas/bfin/logical.d: Likewise.
gas/bfin/logical2.d: Likewise.
gas/bfin/move.d: Likewise.
gas/bfin/move2.d: Likewise.
gas/bfin/parallel.d: Likewise.
gas/bfin/parallel2.d: Likewise.
gas/bfin/parallel3.d: Likewise.
gas/bfin/parallel4.d: Likewise.
gas/bfin/shift.d: Likewise.
gas/bfin/shift2.d: Likewise.
gas/bfin/stack.d: Likewise.
gas/bfin/stack2.d: Likewise.
gas/bfin/store.d: Likewise.
gas/bfin/vector.d: Likewise.
gas/bfin/vector2.d: Likewise.
gas/bfin/video.d: Likewise.
gas/bfin/video2.d: Likewise.
opcodes/:
* bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
c_imm32, c_huimm32e): Define.
(constant_formats): Add flags for printing decimal, leading spaces, and
exact symbols.
(comment, parallel): Add global flags in all disassembly.
(fmtconst): Take advantage of new flags, and print default in hex.
(fmtconst_val): Likewise.
(decode_macfunc): Be consistant with spaces, tabs, comments,
capitalization in disassembly, fix minor coding style issues.
(reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
(decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
_print_insn_bfin, print_insn_bfin): Likewise.
2008-03-26 16:48:32 +00:00
e2c038d34c
gas/:
...
* config/tc-bfin.c (bfin_start_line_hook): Localize the labels
generated for LOOP_BEGIN and LOOP_END instructions.
(bfin_gen_loop): Likewise.
gas/testsuite/:
* gas/bfin/flow.d: Adjust since the generated labels for LOOP_BEGIN
and LOOP_END instruction are local now.
* gas/bfin/flow2.d: Likewise.
2008-03-26 16:33:33 +00:00
ee171c8f94
gas/
...
* config/bfin-parse.y (check_macfunc_option): Allow (IU)
option for multiply and multiply-accumulate to data register
instruction.
(check_macfuncs): Don't check if accumulator matches the data register
here.
(assign_macfunc): Check if accumulator matches the
data register in each rule that moves to the data
register.
gas/testsuite/
* gas/bfin/arithmetic.s, gas/bfin/arithmetic.d: Add check
for IU option.
* gas/bfin/expected_errors.l, gas/bfin/expected_errors.s:
Add check for mismatch of accumulator and data register.
opcodes/
* bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
multiply and multiply-accumulate to data register instruction.
2008-03-26 16:21:10 +00:00
c1db045b89
gas/:
...
* config/bfin-parse.y (check_macfunc_option): New.
(check_macfuncs): Check option by calling check_macfunc_option.
Fix comparison always true warnings. Both scalar instructions
of vector instruction must share the same mode option. Only allow
option mode at the end of the second instruction of the vector.
(asm_1): Check option by calling check_macfunc_option.
gas/testsuite/:
* gas/bfin/expected_errors.l, gas/bfin/expected_errors.s: Add
tests for bad options of "multiply and multipy-accumulate to
accumulator" instructions. Add new vector instruction option
mode tests.
* gas/bfin/vector2.s: Add new vector instruction option mode test.
* gas/bfin/vector2.d: Adjust accordingly.
* gas/bfin/expected_errors.s, gas/bfin/expected_errors.l: Add test
for mismatched half registers in vector multipy-accumulate
instructions.
2008-03-26 15:58:27 +00:00
99bfa74a53
gas/
...
From Jie Zhang <jie.zhang@analog.com>
* config/bfin-parse.y (asm_1): Check AREGS in comparison
instructions. And call yyerror () when comparing PREG with
DREG.
gas/testsuite/:
* gas/bfin/expected_comparison_errors.l: New test.
* gas/bfin/expected_comparison_errors.s: New test.
* gas/bfin/bfin.exp: Add expected_comparison_errors.
2008-03-26 15:18:42 +00:00
b21c9cb440
opcodes:
...
From Robin Getz <robin.getz@analog.com>
* bfin-dis.c (bu32): Typedef.
(enum const_forms_t): Add c_uimm32 and c_huimm32.
(constant_formats[]): Add uimm32 and huimm16.
(fmtconst_val): New.
(uimm32): Define.
(huimm32): Define.
(imm16_val): Define.
(luimm16_val): Define.
(struct saved_state): Define.
(GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
(get_allreg): New.
(decode_LDIMMhalf_0): Print out the whole register value.
gas/testsuite:
From Jie Zhang <jie.zhang@analog.com>
* gas/bfin/load.d: Update.
2008-03-26 14:50:52 +00:00
5746fb46c8
2008-03-19 Andreas Krebbel <krebbel1@de.ibm.com>
...
* opcodes/s390-mkopc.c (s390_opcode_cpu_val): S390_OPCODE_Z10 added.
(s390_cond_extensions): Reduced extensions to the compare related.
(main): z10 cpu type option added.
(expandConditionalJump): Renamed to ...
(insertExpandedMnemonic): ... this.
* opcodes/s390-opc.c: Re-group the operand format makros.
(INSTR_RIE_RRPU, INSTR_RIE_RRP0, INSTR_RIE_RUPI,
INSTR_RIE_R0PI, INSTR_RIE_RUPU, INSTR_RIE_R0PU, INSTR_RIE_R0IU,
INSTR_RIE_R0I0, INSTR_RIE_R0UU, INSTR_RIE_R0U0,
INSTR_RIE_RRUUU, INSTR_RIS_RURDI, INSTR_RIS_R0RDI, INSTR_RIS_RURDU,
INSTR_RIS_R0RDU, INSTR_RRF_U0RR, INSTR_RRF_00RR, INSTR_RRS_RRRDU,
INSTR_RRS_RRRD0, INSTR_RXY_URRD, INSTR_SIY_IRD, INSTR_SIL_RDI,
INSTR_SIL_RDU): New instruction formats added.
(MASK_RIE_RRPU, MASK_RIE_RRP0, MASK_RIE_RUPI, MASK_RIE_R0PI,
MASK_RIE_RUPU, MASK_RIE_R0PU, MASK_RIE_R0IU, MASK_RIE_R0I0,
MASK_RIE_R0UU, MASK_RIE_R0U0, MASK_RIE_RRUUU, MASK_RIS_RURDI,
MASK_RIS_R0RDI, MASK_RIS_RURDU, MASK_RIS_R0RDU, MASK_RRF_U0RR,
MASK_RRF_00RR, MASK_RRS_RRRDU, MASK_RRS_RRRD0, MASK_RXY_URRD,
MASK_SIY_IRD, MASK_SIL_RDI, MASK_SIL_RDU): New instruction format
masks added.
(s390_opformats): New formats added "ris", "rrs", "sil".
* opcodes/s390-opc.txt: Add the conditional jumps with the
extensions removed from automatic expansion in s390-mkopc.c manually.
(asi - trtre): Add new System z10 EC instructions.
* include/opcode/s390.h (s390_opcode_cpu_val): S390_OPCODE_Z10 added.
2008-03-19 Andreas Krebbel <krebbel1@de.ibm.com>
* config/tc-s390.c (md_parse_option): z10 option added.
2008-03-19 Andreas Krebbel <krebbel1@de.ibm.com>
* gas/s390/zarch-z10.d: New file.
* gas/s390/zarch-z10.s: New file.
* gas/s390/s390.exp: Run the z10 testcases.
2008-03-19 10:29:18 +00:00
188e2ff3a5
* gas/macros/test1.s: Rename symbols to avoid conflicts with
...
possible register names.
* gas/macros/test1.d: Update expected disassembly.
2008-03-18 16:56:00 +00:00
58c85be758
* configure.ac: m4_include config/proginstall.m4.
...
* configure: Regenerate.
config/
* proginstall.m4: New file, with fixed AC_PROG_INSTALL.
bfd/
* aclocal.m4: Regenerate.
* configure: Likewise.
* Makefile.in: Likewise.
bfd/doc/
* Makefile.in: Regenerate.
intl/
* aclocal.m4: Regenerate.
* configure: Likewise.
gas/
* aclocal.m4: Regenerate.
* configure: Likewise.
* Makefile.in: Likewise.
* doc/Makefile.in: Likewise.
ld/
* aclocal.m4: Regenerate.
* configure: Likewise.
* Makefile.in: Likewise.
opcodes/
* aclocal.m4: Regenerate.
* configure: Likewise.
* Makefile.in: Likewise.
binutils/
* aclocal.m4: Regenerate.
* configure: Likewise.
* Makefile.in: Likewise.
* doc/Makefile.in: Likewise.
gprof/
* aclocal.m4: Regenerate.
* configure: Likewise.
* Makefile.in: Likewise.
2008-03-17 22:17:33 +00:00
08e8dfaf50
gas/testsuite/
...
* gas/mips/elf-rel26.d: Add -32.
* gas/mips/mips16-intermix.d: Likewise.
ld/testsuite/
* ld-mips-elf/mips-elf.exp (o32_as_flags, o32_ld_flags): New variables.
(mips16_call_global_test, mips16_intermix_test): Use them.
2008-03-17 18:45:35 +00:00
da6b876ee6
PR 5946
...
* config/tc-hppa.c (is_same_frag): Delete.
2008-03-16 23:16:03 +00:00
3b49282506
2008-03-14 Sterling Augustine <sterling@tensilica.com>
...
* config/tc-xtensa.h (xtensa_relax_statesE): Update comment for
RELAX_LOOP_END_ADD_NOP.
2008-03-14 20:17:39 +00:00
5808f4a685
PR gas/5895
...
* read.c (s_mexit): Warn if attempting to exit a macro when not
inside a macro definition.
* gas/macros/exit.s: New test case.
* gas/macros/macros.exp: Run the new test, expect it to produce an
error result.
2008-03-13 10:51:33 +00:00
50e7d84b42
bfd/
...
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
* po/SRC-POTFILES.in: Regenerate.
bfd/doc/
* Makefile.in: Regenerate.
binutils/
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
* doc/Makefile.in: Regenerate.
* configure: Regenerate.
gas/
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
* configure: Regenerate.
gprof/
* configure: Regenerate.
ld/
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
* configure: Regenerate.
opcodes/
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
* configure: Regenerate.
2008-03-13 02:05:23 +00:00
15290f0adc
2008-03-09 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (arm_cpu_option_table): Add cortex-a9.
* doc/c-arm.texi: Add cortex-a9.
2008-03-09 15:20:31 +00:00
b1cc4aeb65
2008-03-09 Paul Brook <paul@codesourcery.com>
...
bfd/
* elf32-arm.c (elf32_arm_merge_eabi_attributes): Handle new
Tag_VFP_arch values.
binutils/
* readelf.c (arm_attr_tag_VFP_arch): Add "VFPv3-D16".
gas/
* config/tc-arm.c (fpu_vfp_ext_d32): New vairable.
(parse_vfp_reg_list, encode_arm_vfp_reg): Use it.
(arm_option_cpu_value): Add vfpv3-d16, vfpv2 and vfpv3.
(aeabi_set_public_attributes): Handle Tag_VFP_arch=VFPV3-D16.
* doc/c-arm.texi: Document new ARM FPU variants.
gas/testsuite/
* gas/arm/vfpv3-d16-bad.d: New test.
* gas/arm/vfpv3-d16-bad.l: New test.
include/opcode/
* arm.h (FPU_VFP_EXT_D32, FPU_VFP_V3D16, FPU_ARCH_VFP_V3D16): Define.
2008-03-09 13:23:29 +00:00
39623e120c
2008-03-07 Paul Brook <paul@codesourcery.com>
...
bfd/
* elf32-arm.c (elf32_arm_howto_table_1): Fix bitmasks for MOVW and
MOVT relocations.
(elf32_arm_final_link_relocate): Fix off by one MOVW/MOVT sign
extension.
(elf32_arm_relocate_section): Handle MOVW and MOVT
relocations. Improve safety check for other weird relocations.
(elf32_arm_check_relocs): Only set h->needs_plt for branch/call
relocations.
gas/
* config/tc-arm.c (md_apply_fix): Use correct offset range.
ld/testsuite/
* ld-arm/arm-elf.exp (armelftests): Add movw-merge and arm-app-movw.
* ld-arm/arm-app-movw.s: New test.
* ld-arm/arm-app.r: Update expected output.
* ld-arm/movw-merge.d: New test.
* ld-arm/movw-merge.s: New test.
2008-03-08 01:20:39 +00:00
d815f1a994
* config/tc-ppc.c (ppc_setup_opcodes): Tidy. Add code to test
...
for strict ordering of powerpc_opcodes, but disable for now.
2008-03-06 23:01:00 +00:00
98c3d90597
2008-03-06 Florian Krohm <fkrohm@us.ibm.com>
...
* s390-opc.c (INSTR_RSL_R0RD): Fix operands.
* s390-opc.txt (cmpsc): Duplicate entry removed.
(dxr, sqdr, sqer, cxfbr, cdfbr, cefbr, lzer, lzdr, lzxr,
cegbr, cdgbr, cxgbr, cegr, cdgr, cxgr, cxfr, cdfr, cefr, fixr, fidr,
fier, cu42, cu41): Fix operand format.
2008-03-06 Andreas Krebbel <krebbel1@de.ibm.com>
* gas/s390/esa-g5.d (cdfbr, cdfr, cefbr, cefr, cxfbr, cxfr,
dxr, fidr, fier, fixr, lzdr, lzer, lzxr, sqdr, sqer, tp): Fix
operand format.
* gas/s390/esa-g5.s: Likewise.
* gas/s390/zarch-z900.d (cdgbr, cdgr, cegbr, cegr, cxgbr,
cxgr): Likewise.
* gas/s390/zarch-z900.s: Likewise.
* gas/s390/zarch-z9-109.d (cu41, cu42): Remove mask operand.
* gas/s390/zarch-z9-109.s: Likewise.
2008-03-06 12:01:13 +00:00
7e8064706d
2008-03-04 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (arm_ext_barrier, arm_ext_msr): New.
(arm_ext_v7m): Rename...
(arm_ext_m): ... to this. Include v6-M.
(do_t_add_sub): Allow narrow low-reg non flag setting adds.
(do_t_mrs, do_t_msr, aeabi_set_public_attributes): Use arm_ext_m.
(md_assemble): Allow wide msr instructions.
(insns): Add classifications for v6-m instructions.
(arm_cpu_option_table): Add cortex-m1.
(arm_arch_option_table): Add armv6-m.
(cpu_arch): Add ARM_ARCH_V6M. Fix numbering of other v6 variants.
gas/testsuite/
* gas/arm/archv6m.d: New test.
* gas/arm/archv6m.s: New test.
* gas/arm/t16-bad.s: Test low register non flag setting add.
* gas/arm/t16-bad.l: Update expected output.
include/opcode/
* arm.h (ARM_EXT_V6M, ARM_EXT_BARRIER, ARM_EXT_THUMB_MSR): Define.
(ARM_AEXT_V6T2, ARM_AEXT_V7_ARM, ARM_AEXT_V7M): Use new flags.
(ARM_AEXT_V6M, ARM_ARCH_V6M): Define.
2008-03-05 01:31:26 +00:00
77cba8a32b
bfd/
...
* xtensa-isa.c (xtensa_isa_num_pipe_stages): Make max_stage static and
only compute its value once.
gas/
* config/tc-xtensa.c (xtensa_num_pipe_stages): New.
(md_begin): Initialize it.
(resources_conflict): Use it.
2008-03-03 23:23:41 +00:00
58502fec59
2008-03-03 Sterling Augustine <sterling@tensilica.com>
...
* config/tc-xtensa.h (RELAX_XTENSA_NONE): New.
2008-03-03 22:14:45 +00:00
d0548f348f
gas/
...
2008-03-03 Denys Vlasenko <vda.linux@googlemail.com>
H.J. Lu <hongjiu.lu@intel.com>
PR gas/5543
* read.c (pseudo_set): Don't allow global register symbol.
* symbols.c (S_SET_EXTERNAL): Don't allow register symbol
global.
2008-03-03 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5543
* write.c (write_object_file): Don't allow symbols which were
equated to register. Stop if there is an error.
gas/testsuite/
2008-03-03 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5543
* gas/i386/i386.exp: Run inval-equ-1 and inval-equ-2.
* gas/i386/inval-equ-1.l: New.
* gas/i386/inval-equ-1.s: Likewise.
* gas/i386/inval-equ-2.l: Likewise.
* gas/i386/inval-equ-2.s: Likewise.
2008-03-03 15:28:58 +00:00
28dbc07952
gas/testsuite/
...
2008-03-01 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/x86-64-branch.s: Add tests for 16-bit near indirect
branches.
* gas/i386/x86-64-inval.s: Remove tests for 16-bit near indirect
branches.
* gas/i386/x86-64-branch.d: Updated.
* gas/i386/x86-64-inval.l: Likewise.
opcodes/
2008-03-01 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
* i386-tbl.h: Regenerated.
2008-03-01 23:30:51 +00:00
783de16343
* config/tc-ppc.h (struct _ppc_fix_extra): New.
...
(ppc_cpu): Declare.
(TC_FIX_TYPE, TC_INIT_FIX_DATA): Define.
* config/tc-ppc.c (ppu_cpu): Make global.
(ppc_insert_operand): Add ppu_cpu parameter.
(md_assemble): Adjust for above change.
(md_apply_fix): Pass tc_fix_data.ppc_cpu to ppc_insert_operand.
2008-03-01 07:24:47 +00:00
af7329f0ff
PR 3134
...
* h8300.h (h8_opcodes): Add an encoding for a mov.l instruction
with a 32-bit displacement but without the top bit of the 4th byte
set.
* gas/h8300/pr3134.s: New test.
* gas/h8300/pr3134.d: Expected disassembly
* gas/h8300/h8300.exp: Run the new test.
* gas/h8300/h8300-coff.exp: Fix test for COFF based ports to
accept h8300-rtemscoff not just h8300-rtems.
2008-02-27 12:33:43 +00:00
58abc3ebf6
2008-02-26 H.J. Lu <hongjiu.lu@intel.com>
...
* gas/i386/jump.d: Updated for COFF.
2008-02-26 16:18:16 +00:00
849830bdfb
gas/testsuite/
...
2008-02-23 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/jump.s: Add tests for far branches.
* gas/i386/jump16.s: Likewise.
* gas/i386/jump.d: Updated.
* gas/i386/jump16.d: Likewise.
* gas/i386/x86-64-inval.l: Likewise.
* gas/i386/x86-64-inval.s: Add tests for 16-bit near indirect
branches.
opcodes/
2008-02-23 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.tbl: Disallow 16-bit near indirect branches for
x86-64.
* i386-tbl.h: Regenerated.
2008-02-23 17:29:17 +00:00
584206dbd5
* config/tc-arm.c (do_bx): Only test EF_ARM_EABI_VERSION on ELF
...
targeted ARM ports, otherwise just skip generating the reloc.
2008-02-22 16:47:01 +00:00
a696b49ec5
* gas/m68hc11/bug-1825.d: Update to match changes in the
...
information generated with source-in-disassembly listings.
* gas/m68hc11/indexed12.d: Likewise.
* gas/m68hc11/insns-dwarf2.d: Likewise.
* gas/m68hc11/lbranch-dwarf2.d: Likewise.
2008-02-22 15:33:31 +00:00
5ad3420347
* config/tc-arm.c (do_bx): Only test EF_ARM_EABI_VERSION on ELF
...
targeted ARM ports.
2008-02-22 15:14:44 +00:00
785d276e24
Correct year.
2008-02-20 23:32:33 +00:00
845b51d665
2008-02-20 Paul Brook <paul@codesourcery.com>
...
ld/
* emultempl/armelf.em (OPTION_FIX_V4BX_INTERWORKING): Define.
(PARSE_AND_LIST_LONGOPTS): Add fix-v4bx-interworking.
(PARSE_AND_LIST_OPTIONS): Ditto.
(PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FIX_V4BX_INTERWORKING.
* emulparams/armelf.sh (OTHER_TEXT_SECTIONS): Add .v4_bx.
* emulparams/armelf_linux.sh (OTHER_TEXT_SECTIONS): Ditto.
* emulparams/armnto.sh (OTHER_TEXT_SECTIONS): Ditto.
* ld.texinfo: Document --fix-v4bx-interworking.
ld/testsuite/
* ld-arm/armv4-bx.d: New test.
* ld-arm/armv4-bx.s: New test.
* ld-arm/arm.ld: Add .v4bx.
* ld-arm/arm-elf.exp: Add armv4-bx.
gas/testsuite/
* gas/arm/thumb.d: Exclude EABI targets.
* gas/arm/arch4t.d: Exclude EABI targts.
* gas/arm/v4bx.d: New test.
* gas/arm/v4bx.s: New test.
* gas/arm/thumb-eabi.d: New test.
* gas/arm/arch4t-eabi.d: New test.
gas/
* config/tc-arm.c (fix_v4bx): New variable.
(do_bx): Generate V4BX relocations.
(md_assemble): Allow bx on v4 codes when fix_v4bx.
(md_apply_fix): Handle BFD_RELOC_ARM_V4BX.
(tc_gen_reloc): Ditto.
(OPTION_FIX_V4BX): Define.
(md_longopts): Add fix-v4bx.
(md_parse_option): Handle OPTION_FIX_V4BX.
(md_show_usage): Document --fix-v4bx.
* doc/c-arm.texi: Document --fix-v4bx.
bfd/
* reloc.c: Add BFD_RELOC_ARM_V4BX.
* elf32-arm.c (elf32_arm_reloc_map): Add BFD_RELOC_ARM_V4BX.
(ARM_BX_GLUE_SECTION_NAME, ARM_BX_GLUE_SECTION_NAME): Define.
(elf32_arm_link_hash_table): Add bx_glue_size and bx_glue_offset.
Update comment for fix_v4bx.
(elf32_arm_link_hash_table_create): Zero bx_glue_size and
bx_glue_offset.
(ARM_BX_VENEER_SIZE, armbx1_tst_insn, armbx2_moveq_insn,
armbx3_bx_insn): New.
(bfd_elf32_arm_allocate_interworking_sections): Allocate BX veneer
section.
(bfd_elf32_arm_add_glue_sections_to_bfd): Ditto.
(bfd_elf32_arm_process_before_allocation): Record BX veneers.
(record_arm_bx_glue, elf32_arm_bx_glue): New functions.
(elf32_arm_final_link_relocate): Handle BX veneers.
(elf32_arm_output_arch_local_syms): Output mapping symbol for .v4_bx.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
2008-02-20 15:17:56 +00:00
b646068837
2008-02-18 H.J. Lu <hongjiu.lu@intel.com>
...
* cfi/cfi.exp (gas_x86_64_check): New.
(gas_x86_32_check): Likewise.
Run 32bit and 64bit tests for x86 targets if they are supportd.
2008-02-18 21:05:07 +00:00
1ceab3445d
2008-02-18 H.J. Lu <hongjiu.lu@intel.com>
...
* doc/c-i386.texi: Update -march= and .arch.
2008-02-18 18:52:46 +00:00
ca75ed2d8f
* config/tc-mn10300.c (has_known_symbol_location): New function.
...
Do not regard weak symbols as having a known location.
(md_estimate_size_before_relax): Use new function.
(md_pcrel_from): Do not compute a pcrel against a weak symbol.
2008-02-18 10:03:06 +00:00
192dc9c6fd
gas/
...
2008-02-18 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (match_template): Disallow 'l' suffix when
currently selected CPU has no 32-bit support.
(parse_real_register): Do not return registers not available on
currently selected CPU.
gas/testsuite/
2008-02-18 Jan Beulich <jbeulich@novell.com>
* gas/i386/att-regs.s, gas/i386/att-regs.d,
gas/i386/intel-regs.s, gas/i386/intel-regs.d: New.
* gas/i386/i386.exp: Run new tests.
2008-02-18 08:44:38 +00:00
1fed0ba155
2008-02-16 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (process_immext): Fix format.
2008-02-17 00:26:19 +00:00
65da13b5e0
gas/
...
2008-02-16 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (inoutportreg): New.
(process_immext): New.
(md_assemble): Use it.
(update_imm): Use imm16 and imm32s.
(i386_att_operand): Use inoutportreg.
opcodes/
2008-02-16 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
* i386-init.h: Regenerated.
2008-02-16 16:16:48 +00:00
0dfbf9d7ce
2008-02-14 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (operand_type_all_zero): New.
(operand_type_set): Likewise.
(operand_type_equal): Likewise.
(cpu_flags_all_zero): Likewise.
(cpu_flags_set): Likewise.
(cpu_flags_equal): Likewise.
(UINTS_ALL_ZERO): Removed.
(UINTS_SET): Likewise.
(UINTS_CLEAR): Likewise.
(UINTS_EQUAL): Likewise.
(cpu_flags_match): Updated.
(smallest_imm_type): Likewise.
(set_cpu_arch): Likewise.
(md_assemble): Likewise.
(optimize_imm): Likewise.
(match_template): Likewise.
(process_suffix): Likewise.
(update_imm): Likewise.
(process_drex): Likewise.
(process_operands): Likewise.
(build_modrm_byte): Likewise.
(i386_immediate): Likewise.
(i386_displacement): Likewise.
(i386_att_operand): Likewise.
(parse_real_register): Likewise.
(md_parse_option): Likewise.
(i386_target_format): Likewise.
2008-02-14 22:54:02 +00:00
93ac268764
PR gas/5712
...
* config/tc-arm.c (s_arm_unwind_save): Advance the input line
pointer past the comma after parsing a floating point register
name.
* gas/arm/fp-save.s: New test.
* gas/arm/fp-save.d: Expected disassembly.
2008-02-14 16:35:51 +00:00
d669d37f8d
PR gas/2626
...
* avr.h (AVR_ISA_2xxe): Define.
* config/tc-avr.c (mcu_types): Change the ISA tyoe of the attiny26
to AVR_ISA_2xxe.
(avr_operand): Disallow post-increment addressing in the lpm
instruction for the attiny26.
2008-02-14 13:04:29 +00:00
9579d38232
* gas/mips/branch-misc-2pic-64.d (#name): Have a unique name
...
different from the branch-misc-2-64.d test.
2008-02-13 17:22:43 +00:00
b7240065b3
gas/
...
2008-02-13 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (parse_real_register): Don't return 'FLAT'
if not in Intel mode.
(i386_intel_operand): Ignore segment overrides in immediate and
offset operands.
(intel_e11): Range-check i.mem_operands before use as array
index. Filter out FLAT for uses other than as segment override.
(intel_get_token): Remove broken promotion of "FLAT:" to mean
"offset FLAT:".
gas/testsuite/
2008-02-13 Jan Beulich <jbeulich@novell.com>
* gas/i386/intelok.s: Replace invalid offset expression with
valid ones.
* gas/i386/x86_64.s: Likewise.
opcodes/
2008-02-13 Jan Beulich <jbeulich@novell.com>
* i386-opc.h (RegFlat): New.
* i386-reg.tbl (flat): Add.
* i386-tbl.h: Re-generate.
2008-02-13 13:41:26 +00:00
34b772a651
gas/
...
2008-02-13 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (intel_e09): Also special-case 'bound'.
gas/testsuite/
2008-02-13 Jan Beulich <jbeulich@novell.com>
* gas/i386/intelbad.s, gas/i386/intelok.s: Add 'bound' tests.
* gas/i386/intelbad.l, gas/i386/intelok.l, gas/i386/intelok.e,
gas/i386/opcode-intel.d: Adjust.
opcodes/
2008-02-13 Jan Beulich <jbeulich@novell.com>
* i386-dis.c (a_mode): New.
(cond_jump_mode): Adjust.
(Ma): Change to a_mode.
(intel_operand_size): Handle a_mode.
* i386-opc.tbl: Allow Dword and Qword for bound.
* i386-tbl.h: Re-generate.
2008-02-13 13:29:31 +00:00
a60de03c61
gas/
...
2008-02-13 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (allow_pseudo_reg): New.
(parse_real_register): Check for NULL just once. Allow all
register table entries when allow_pseudo_reg is non-zero.
Don't allow any registers without type when allow_pseudo_reg
is zero.
(tc_x86_regname_to_dw2regnum): Replace with ...
(tc_x86_parse_to_dw2regnum): ... this.
(tc_x86_frame_initial_instructions): Adjust for above change.
* config/tc-i386.h (tc_regname_to_dw2regnum): Remove.
(tc_parse_to_dw2regnum): New.
(tc_x86_regname_to_dw2regnum): Replace with ...
(tc_x86_parse_to_dw2regnum): ... this.
* dw2gencfi.c (tc_parse_to_dw2regnum): New, broken out of ...
(cfi_parse_reg): ... this. Use tc_parse_to_dw2regnum. Adjust
error handling.
gas/testsuite/
2008-02-13 Jan Beulich <jbeulich@novell.com>
* gas/cfi/cfi-i386.s: Add code testing use of all registers.
Fix a few comments.
* gas/cfi/cfi-x86_64.s: Likewise.
* gas/cfi/cfi-i386.d, gas/cfi/cfi-x86_64.d: Adjust.
opcodes/
2008-02-13 Jan Beulich <jbeulich@novell.com>
* i386-gen.c (process_i386_registers): Process new fields.
* i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
unsigned char. Add dw2_regnum and Dw2Inval.
* i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
register names.
* i386-tbl.h: Re-generate.
2008-02-13 10:14:40 +00:00
e8efc4d9fd
2002-02-12 H.J. Lu <hongjiu.lu@intel.com>
...
* gas/i386/i386.exp: Run x86-64-arch-2 instead of
x86-64-arch-10.
* gas/i386/x86-64-arch-10.d: Removed.
* gas/i386/x86-64-arch-2.d: New.
* gas/i386/x86-64-arch-2.s: Likewise.
2008-02-12 18:56:12 +00:00
a3ac9d5899
2008-02-12 H.J. Lu <hongjiu.lu@intel.com>
...
* gas/i386/x86-64-xsave.d: Remove prefix.
2008-02-12 15:35:29 +00:00
9c95b5212a
* config/tc-tic4x.c (tic4x_insn_insert): Add const qualifier to
...
argument.
(tic4x_insn_add): Likewise.
(md_begin): Drop cast that was discarding a const qualifier.
* config/tc-d30v.c (get_reloc): Add const qualifier to op
argument.
(build_insn): Drop cast that was discarding a const qualifier.
2008-02-12 08:37:08 +00:00
f03fe4c110
gas/
...
2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (cpu_arch): Add .xsave.
(md_show_usage): Add .xsave.
* doc/c-i386.texi: Add xsave to -march=.
gas/testsuite/
2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/arch-10.s: Add xgetbv.
* gas/i386/arch-10.d: Updated.
* gas/i386/arch-10-1.l: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/x86-64-arch-10.d: Likewise.
opcodes/
2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
* i386-init.h: Updated.
2008-02-12 05:35:36 +00:00
475a2301db
gas/testsuite/
...
2002-02-11 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run xsave, xsave-intel, x86-64-xsave
and x86-64-xsave-intel.
* gas/i386/x86-64-xsave-intel.d: New file.
* gas/i386/x86-64-xsave.d: Likewise.
* gas/i386/x86-64-xsave.s: Likewise.
* gas/i386/xsave-intel.d: Likewise.
* gas/i386/xsave.d: Likewise.
* gas/i386/xsave.s: Likewise.
opcodes/
2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (cpu_flags): Add CpuXsave.
* i386-opc.h (CpuXsave): New.
(Cpu64): Updated.
(i386_cpu_flags): Add cpuxsave.
* i386-dis.c (MOD_0FAE_REG_4): New.
(RM_0F01_REG_2): Likewise.
(MOD_0FAE_REG_5): Updated.
(RM_0F01_REG_3): Likewise.
(reg_table): Use MOD_0FAE_REG_4.
(mod_table): Use RM_0F01_REG_2. Add MOD_0FAE_REG_4. Updated
for xrstor.
(rm_table): Add RM_0F01_REG_2.
* i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-02-12 00:04:45 +00:00
1bf57e9fa3
* read.c (s_weakref): Don't pass unadorned NULL to concat.
...
* config/tc-i386.c (set_cpu_arch, md_parse_option): Likewise.
2008-02-07 08:40:29 +00:00
0797561a54
* gas/mips/mips.exp: Invoke the tests smartmips, mips32-dsp,
...
mips32-dspr2, mips64-dsp and mips32-mt with run_dump_test instead
of run_dump_test_arches.
* gas/mips/smartmips.d: Pass -mips32.
* gas/mips/mips64-dsp.d: Pass -mips64r2.
* gas/mips/mips32-dsp.d: Pass -mips32r2.
* gas/mips/mips32-dspr2.d: Likewise.
* gas/mips/mips32-mt.d: Likewise.
2008-02-06 05:29:03 +00:00
2276bc2089
2008-02-05 Sterling Augustine <sterling@tensilica.com>
...
* config/tc-xtensa.c (relax_frag_immed): Change internal consistency
checks into assertions. When relaxation produces an operation that
does not fit in the current FLIX instruction, make sure that the
operation is relaxed as needed to account for being placed following
the current instruction.
2008-02-05 19:39:08 +00:00
bb8541b9c4
bfd/
...
2008-02-04 Kai Tietz <kai.tietz@onevision.com>
H.J. Lu <hongjiu.lu@intel.com>
PR 5715
* warning.m4: Enable -Wno-format by default when using gcc on
mingw.
* configure: Regenerated.
binutils/
2008-02-04 H.J. Lu <hongjiu.lu@intel.com>
PR 5715
* configure: Regenerated.
gas/
2008-02-04 H.J. Lu <hongjiu.lu@intel.com>
PR 5715
* configure: Regenerated.
ld/
2008-02-04 H.J. Lu <hongjiu.lu@intel.com>
PR 5715
* configure: Regenerated.
opcodes/
2008-02-04 H.J. Lu <hongjiu.lu@intel.com>
PR 5715
* configure: Regenerated.
2008-02-04 19:43:51 +00:00
967344c664
* config/tc-mips.c (mips_cpu_info_table): Add Octeon.
2008-02-04 19:20:16 +00:00
61d4e56d1b
* gas/mips/mips.exp: Call mips_arch_create for Octeon. Invoke
...
Octeon tests.
* gas/mips/octeon.s, gas/mips/octeon.d: New test.
2008-02-04 19:19:43 +00:00
f8a52b5923
2008-01-31 Marc Gauthier <marc@tensilica.com>
...
bfd/
* config.bfd (xtensa*-*-*): Recognize processor variants.
gas/
* configure.tgt (xtensa*-*-*): Recognize processor variants.
gas/testsuite/
* gas/all/gas.exp: Recognize Xtensa processor variants.
* gas/elf/elf.exp: Likewise.
* gas/lns/lns.exp: Likewise.
ld/
* configure.tgt (xtensa*-*-*): Recognize processor variants.
ld/testsuite/
* ld-elf/merge.d: Recognize Xtensa processor variants.
* ld-xtensa/coalesce.exp: Likewise.
* ld-xtensa/lcall.exp: Likewise.
2008-02-01 17:58:48 +00:00
2dc4cec1f3
binutils/
...
2008-01-28 H.J. Lu <hongjiu.lu@intel.com>
* dwarf.c: Include "elf/common.h".
(eh_addr_size): Changed to int.
(dwarf_regnames_i386): New.
(dwarf_regnames_x86_64): Likewise.
(dwarf_regnames): Likewise.
(dwarf_regnames_count): Likewise.
(init_dwarf_regnames): Likewise.
(regname): Likewise.
(frame_display_row): Properly support different address size.
Call regname to get register name.
(display_debug_frames): Call regname to get register name.
Display DW_CFA_def_cfa_register as DW_CFA_def_cfa_register
instead of DW_CFA_def_cfa_reg.
* dwarf.h (init_dwarf_regnames): New.
* objdump.c: Include "elf-bfd.h".
(dump_dwarf): Call init_dwarf_regnames on ELF input.
* readelf.c (guess_is_rela): Change argument to int.
(parse_args): Remove the undocumented upper case options for
-wX.
(process_file_header): Call init_dwarf_regnames if
do_dwarf_register is true.
gas/testsuite/
2008-01-28 H.J. Lu <hongjiu.lu@intel.com>
* gas/cfi/cfi-alpha-1.d: Replace DW_CFA_def_cfa_reg with
DW_CFA_def_cfa_register.
* gas/cfi/cfi-alpha-3.d: Likewise.
* gas/cfi/cfi-hppa-1.d: Likewise.
* gas/cfi/cfi-i386.d: Likewise.
* gas/cfi/cfi-m68k.d: Likewise.
* gas/cfi/cfi-mips-1.d: Likewise.
* gas/cfi/cfi-sh-1.d: Likewise.
* gas/cfi/cfi-sparc-1.d: Likewise.
* gas/cfi/cfi-sparc64-1.d: Likewise.
* gas/cfi/cfi-x86_64.d: Likewise.
* gas/cfi/cfi-common-1.d: Updated for i386/x86-64 register
names.
* gas/cfi/cfi-common-2.d: Likewise.
* gas/cfi/cfi-common-5.d: Likewise.
* gas/cfi/cfi-i386.d: Likewise.
* gas/cfi/cfi-x86_64.d: Likewise.
ld/testsuite/
2008-01-28 H.J. Lu <hongjiu.lu@intel.com>
* ld-elf/eh1.d: Replace DW_CFA_def_cfa_reg with
DW_CFA_def_cfa_register. Updated for i386/x86-64 register
names.
* ld-elf/eh2.d: Likewise.
* ld-elf/eh3.d: Likewise.
* ld-elf/eh4.d: Likewise.
* ld-elf/eh5.d: Likewise.
2008-01-28 15:15:32 +00:00
6e3d6dc1ed
Add mingw I64 support for printing long and long long values
2008-01-25 16:18:41 +00:00
cec28c9815
* doc/c-xtensa.texi (Xtensa Syntax): Clarify handling of opcodes that
...
can only be encoded in FLIX instructions but are not specified as such.
(Xtensa Automatic Alignment): Remove obsolete comment about debugging
labels.
2008-01-25 01:08:34 +00:00
ae40c9937a
2008-01-24 H.J. Lu <hongjiu.lu@intel.com>
...
* NEWS: Mention new command line options for x86 targets.
2008-01-24 22:44:37 +00:00
82c18208b8
gas/testsuite/
...
2008-01-24 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/x86-64-sib.s: Add tests for r12.
* gas/i386/x86-64-sib-intel.d: Updated.
* gas/i386/x86-64-sib.d: Likewise.
opcodes/
2008-01-24 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (OP_E_extended): Handle r12 like rsp.
2008-01-24 15:11:35 +00:00
599121aa77
gas/
...
2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (md_show_usage): Replace tabs with spaces.
gas/testsuite/
2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp : Run x86-64-arch-1 and x86-64-arch-10.
* gas/i386/x86-64-arch-1.d: New.
* gas/i386/x86-64-arch-1.s: Likewise.
* gas/i386/x86-64-arch-10.d: Likewise.
opcodes/
2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
* i386-init.h: Regenerated.
2008-01-23 19:05:12 +00:00
2b1ed17bea
/gas:
...
2008-01-23 Eric B. Weddington <eric.weddington@atmel.com>
* config/tc-avr.c (mcu_types): Change opcode set for at86rf401.
/include:
2008-01-23 Eric B. Weddington <eric.weddington@atmel.com>
* opcode/avr.h (AVR_ISA_RF401): Add new opcode set for at86rf401.
2008-01-23 17:36:23 +00:00
2cb4f3d5a9
2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (md_show_usage): Show more processors for
-march=/-mtune=.
2008-01-23 14:13:08 +00:00
73f4030dfa
2008-01-23 Tristan Gingold <gingold@adacore.com>
...
* gas/ia64/regs.d: Updated as the ia64 disassembler now displays
symbolic names for all ar registers.
2008-01-23 08:57:11 +00:00
115c7c25fe
gas/
...
2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (i386_target_format): Remove cpummx2.
gas/testsuite/
2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/arch-10.d: New.
* gas/i386/arch-11.s: Likewise.
* gas/i386/arch-12.d: Likewise.
* gas/i386/arch-12.s: Likewise.
* gas/i386/i386.exp: Run arch-11 and arch-12.
opcodes/
2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (cpu_flag_init): Remove CpuMMX2.
(cpu_flags): Likewise.
* i386-opc.h (CpuMMX2): Removed.
(CpuSSE): Updated.
* i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-01-22 19:57:30 +00:00
Jie Zhang
Richard Sandiford
Kai Tietz
Nathan Sidwell
Adam Nemet
Carlos O'Donell
Nick Clifton
Alan Modra
Chao-ying Fu
Peter Bergner
Eric B. Weddington
Ralf Wildenhues
Hans-Peter Nilsson
H.J. Lu
Paul Brook
Martin Schwidefsky
Catherine Moore
Bob Wilson
David S. Miller
Mike Frysinger
Dwarakanath Rajagopal
Andrew Stubbs
Andreas Krebbel
Kaz Kojima
Bernd Schmidt
Jan Beulich
Tristan Gingold