* merge from internal repo -> sourceware
2000-03-02 Frank Ch. Eigler <fche@redhat.com>
* configure: Regenerated.
Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
* interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
calls, conditional on the simulator being in verbose mode.
instead of sim_trace() to run the program; include support for ``-o''
option (operating environment); when a signal occurs, only continue
execution when operating environment mode.
Update d10v.
* sparc-desc.h: New file.
* sparc-opc.h: New file.
* decode64.c: New file.
* decode64.h: New file.
* sem64.c: New file.
* cpu64.c: New file.
* cpu64.h: New file.
* model64.h: New file.
* mloop64.in: New file.
* regs64.h: New file.
* trap64.c: New file.
* cpu32.h,decode32.c,decode32.h,model32.c,sem32.c: Rebuild.
1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
* dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
CPU, start periodic background I/O polls.
(tx3904sio_poll): New function: periodic I/O poller.
(PROFILE_USEFUL_MASK): New macro.
* sim-profile.c (profile_options): Make like trace_options, allow
optional on|off arg where applicable.
(set_profile_option_mask): New function.
(sim_profile_set_option): New function.
(profile_option_handler): Simplify.
Have -p only enable selected things, not everything.
Add missing break to OPTION_PROFILE_PC_RANGE.
* cgen-scache.c (scache_options): Allow optional on|off arg to
--profile-scache.
(scache_option_handler): Use sim_profile_set_option.
for internal PR 18869 and 18870.
1999-01-26 Frank Ch. Eigler <fche@cygnus.com>
* sim-memopt.c (memory_options): Add MEMORY_FILL option.
(memory_option_handler): Implement MEMORY_FILL option. Make
MEMORY_CLEAR an alias for MEMORY_FILL=0.
(parse_ulong_value): New function.
(do_memopt_add): Allocate all buffers. Optionally fill them.
(CGEN_MAIN_SCM): Add rtx-funcs.scm.
(cgen-arch): Pass $(mach) to cgen.sh.
* cgen-engine.h (SEM_BRANCH_FINI): New arg pcvar, all uses updated.
(SEM_BRANCH_INIT_EXTRACT): New macro.
(SEM_BRANCH_INIT): Add taken_p.
(TARGET_SEM_BRANCH_FINI): Provide default definition.
(SEM_BRANCH_FINI): Use it.
(SEM_INSN): Update.
* cgen-run.c (sim_resume): Handle tracing of last insn.
* cgen-scache.h (WITH_SCACHE): Define as 0 if not defined.
* cgen-trace.c (current_abuf): New static global.
(trace_insn_init): Initialize it.
(trace_insn_fini): Use it.
(trace_insn): Set it.
* cgen.sh (arch case): Pass -m ${mach} to cgen.
* genmloop.sh (@cpu@_emit_before): Only define if WITH_SCACHE_PBB.
(@cpu@_emit_after): Ditto.
(simple @cpu@_engine_run_full): New local `pc'. Initialize semantic
labels if WITH_SEM_SWITCH_FULL.
* sim-model.c: Include bfd.h.
(sim_model_init): New function.
(sim_model_install): Record init fn.
* sim-model.h (MACH): New member bfd_name.
* sim-module.c (modules): Initialize model before scache.
[ChangeLog]
1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
* mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
start-sanitize-sky
* interp.c (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook.
Call sim_engine_halt on BreakPoint.
end-sanitize-sky
[ChangeLog.sky]
1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
* sky-gdb.c (sky_sim_engine_halt): Do not set CIA here.
1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
* interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
(load_word): Call SIM_CORE_SIGNAL hook on error.
(signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
starting. For exception dispatching, pass PC instead of NULL_CIA.
(decode_coproc): Use COP0_BADVADDR to store faulting address.
* sim-main.h (COP0_BADVADDR): Define.
(SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
(SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
(_sim_cpu): Add exc_* fields to store register value snapshots.
* mips.igen (*): Replace memory-related SignalException* calls
with references to SIM_CORE_SIGNAL hook.
* dv-tx3904irc.c (tx3904irc_port_event): printf format warning
fix.
* sim-main.c (*): Minor warning cleanups.
1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
* Makefile.in (WITH_COMMON_OBJS): Build also dv-sockser.o.
* interp.c (sim_open): Add stub mn103002 cache control memory regions.
Set OPERATING_ENVIRONMENT on "stdeval1" board.
(mn10300_core_signal): New function to intercept memory errors.
(program_interrupt): New function to dispatch to exception vector
(mn10300_exception_*): New functions to snapshot pre/post exception
state.
* sim-main.h (SIM_CORE_SIGNAL): Define hook - call mn10300_core_signal.
(SIM_ENGINE_HALT_HOOK): Do nothing.
(SIM_CPU_EXCEPTION*): Define hooks to call mn10300_cpu_exception*().
(_sim_cpu): Add exc_* fields to store register value snapshots.
* dv-mn103ser.c (*): Support dv-sockser backend for UART I/O.
Various endianness and warning fixes.
* mn10300.igen (illegal): Call program_interrupt on error.
(break): Call program_interrupt on breakpoint
Several changes from <janczyn@cygnus.com> and <cagney@cygnus.com>
merged in:
* dv-mn103int.c (mn103int_ioctl): New function for NMI
generation. (mn103int_finish): Install it as ioctl handler.
* dv-mn103tim.c: Support timer 6 specially. Endianness fixes.
1998-12-24 Frank Ch. Eigler <fche@cygnus.com>
* dv-sockser.c (DEFAULT_TIMEOUT): Increase to 1 ms.
* nrun.c (main): Remain in simulation loop for traps and
exceptions when in operating environment mode.
(ui_loop_hook): New stub hook for standalone use.
* sim-events.c (sim_events_process): Call ui_loop_hook
periodically on CYGWIN host.
* sim-reason.c (sim_stop_reason): Return host signal numbers
to gdb on sim_stopped and sim_signalled cases.
* sim-engine.c (sim_engine_halt): Call SIM_CPU_EXCEPTION_SUSPEND
hook just before longjmp.
* sim-resume.c (sim_resume): Call SIM_CPU_EXCEPTION_RESUME
hook just before sim_engine_run.
* sim-n-core.h (sim_core_trace_M): Allay const warning.
* sim-trace.h (trace_generic): Ditto.
* sim-trace.c (trace_generic): Ditto.
* sim/fr30/ldres.cgs: New testcase.
* sim/fr30/stres.cgs: New testcase.
* sim/fr30/copop.cgs: New testcase.
* sim/fr30/copld.cgs: New testcase.
* sim/fr30/copst.cgs: New testcase.
* sim/fr30/copsv.cgs: New testcase.
* sim/fr30/nop.cgs: New testcase.
* sim/fr30/andccr.cgs: New testcase.
* sim/fr30/orccr.cgs: New testcase.
* sim/fr30/addsp.cgs: New testcase.
* sim/fr30/stilm.cgs: New testcase.
* sim/fr30/extsb.cgs: New testcase.
* sim/fr30/extub.cgs: New testcase.
* sim/fr30/extsh.cgs: New testcase.
* sim/fr30/extuh.cgs: New testcase.
* sim/fr30/enter.cgs: New testcase.
* sim/fr30/leave.cgs: New testcase.
* sim/fr30/xchb.cgs: New testcase.
* sim/fr30/dmovb.cgs: New testcase.
* sim/fr30/dmov.cgs: New testcase.
* sim/fr30/dmovh.cgs: New testcase.
* sim/fr30/testutils.inc (take_branch{_d},no_branch{_d}): New macros.
* sim/fr30/ret.cgs: Add tests fir ret:d.
* sim/fr30/inte.cgs: New testcase.
* sim/fr30/reti.cgs: New testcase.
* sim/fr30/bra.cgs: New testcase.
* sim/fr30/bno.cgs: New testcase.
* sim/fr30/beq.cgs: New testcase.
* sim/fr30/bne.cgs: New testcase.
* sim/fr30/bc.cgs: New testcase.
* sim/fr30/bnc.cgs: New testcase.
* sim/fr30/bn.cgs: New testcase.
* sim/fr30/bp.cgs: New testcase.
* sim/fr30/bv.cgs: New testcase.
* sim/fr30/bnv.cgs: New testcase.
* sim/fr30/blt.cgs: New testcase.
* sim/fr30/bge.cgs: New testcase.
* sim/fr30/ble.cgs: New testcase.
* sim/fr30/bgt.cgs: New testcase.
* sim/fr30/bls.cgs: New testcase.
* sim/fr30/bhi.cgs: New testcase.
* sim/fr30/call.cgs: Test ret here as well.
* sim/fr30/ld.cgs: Remove bogus comment.
* sim/fr30/testutils.inc (save_rp,restore_rp): New macros.
* sim/fr30/div.ms: New testcase.
* sim/fr30/st.cgs: New testcase.
* sim/fr30/sth.cgs: New testcase.
* sim/fr30/stb.cgs: New testcase.
* sim/fr30/mov.cgs: New testcase.
* sim/fr30/jmp.cgs: New testcase.
* sim/fr30/ret.cgs: New testcase.
* sim/fr30/int.cgs: New testcase.
Set mips_fpu, and mips_fpu_bitsize.
Set sim_gen, and sim_igen_machine.
* configure: Rebuild.
* mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
* sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
* sim/fr30/div0s.cgs: New testcase.
* sim/fr30/div0u.cgs: New testcase.
* sim/fr30/div1.cgs: New testcase.
* sim/fr30/div2.cgs: New testcase.
* sim/fr30/div3.cgs: New testcase.
* sim/fr30/div4s.cgs: New testcase.
* sim/fr30/testutils.inc (mvi_h_dr,set_dbits,test_dbits): New Macros.
1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
* dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
(tx3904sio_tickle): fflush after a stdout character output.
* sim/fr30/testutils.inc (set_s_user): Correct Mask.
(set_s_system): Correct Mask.
* sim/fr30/ld.cgs (ld): Move previously failing test back
into place.
* sim/fr30/ldm0.cgs: New testcase.
* sim/fr30/ldm1.cgs: New testcase.
* sim/fr30/stm0.cgs: New testcase.
* sim/fr30/stm1.cgs: New testcase.
* configure: Regenerate.
* sim-main.h: Protect against multiple inclusion.
Don't include cgen-scache.h,cgen-cpu.h,cgen-trace.h,cpuall.h.
Done by cgen-sim.h now.
* tconfig.in (SIM_HAVE_MODEL): Delete, moved to cgen-types.h.
* cpuall.h: Regenerate.
* cpu.h,decode.c,sem-switch.c,sem.c: Regenerate.
* mloop.in (extract16): Make static inline again.
Simplify with call to @cpu@_fill_argbuf,@cpu@_fill_argbuf_tp.
(extract32): Ditto.
Simplify with call to @cpu@_fill_argbuf,@cpu@_fill_argbuf_tp.
(execute): Test ARGBUF_PROFILE_P before profiling.
Update calls to TRACE_INSN_INIT,TRACE_INSN_FINI.
* cpux.h,decodex.c,modelx.c,semx-switch.c: Regenerate.
* mloopx.in: Rewrite.
* cgen-sim.h: Simple header that includes others.
* sim-arange.c: New file.
* sim-arange.h: New file.
* sim-basics.h: Include it.
* Make-common.in (SIM_NEW_COMMON_OBJS): Add sim-arange.o.
(sim-arange.o): Add rule for.
* sim-cpu.h (sim_cpu_msg_prefix): Add prototype.
(sim_io_eprintf_cpu): Add prototype.
* sim-inline.h (HAVE_INLINE): Define if GNUC.
(INLINE2): New macro.
(EXTERN_INLINE): New macro.
* sim-module.c (sim_post_argv_init): Initialize cpu backlink
before calling module init fns.
* sim-profile.h (OPTION_PROFILE_*): Move into enum.
(profile_init): New function.
(profile_options): New option --profile-range.
(profile_option_handler): Handle --profile-range.
(profile_print_insn): Qualify address range specific section titles.
(profile_print_addr_ranges): New function.
(profile_info): Print address ranges if specified.
(profile_install): Set profile_init init fn.
* sim-profile.h (PROFILE_DATA): New member `range'.
* sim-trace.c (trace_init): New function.
(trace_options): New option --trace-range.
(trace_option_handler): Handle --trace-range.
(trace_install): Set trace_init init fn.
* sim-trace.h (TRACE_DATA): New member `range'.
* sim-utils.c (sim_cpu_msg_prefix): New function.
(sim_io_eprintf_cpu): New function.
* cgen-engine.h (PC_IN_TRACE_RANGE_P): New macro.
(PC_IN_PROFILE_RANGE_P): New macro.
* cgen-trace.c (trace_insn_init): Set current_insn to NULL.
(trace_insn_fini): New arg abuf. All callers updated.
Exit early if trace_insn not called. Check ARGBUF_PROFILE_P before
printing cycle counts.
* cgen-trace.h (trace_insn_fini): Update prototype.
(TRACE_RESULT_P): New macro.
(TRACE_INSN_INIT,TRACE_INSN_FINI): New arg abuf. All callers updated.
(TRACE_INSN): Check ARGBUF_TRACE_P.
(TRACE_EXTRACT,TRACE_RESULT): New arg abuf. All callers updated.
* cgen-types.h (SIM_INLINE): Delete.
(SIM_HAVE_MODEL,SIM_HAVE_ADDR_RANGE): Define.
* cgen-utils.c: Don't include cgen-engine.h
* genmloop.sh (@cpu@_fill_argbuf): New function.
(@cpu@_fill_argbuf_tp): New function.
(@cpu@_emit_before,@cpu@_emit_after): New functions.
(@cpu@_pbb_begin): Prefix cti_sc,insn_count with '_'.
(SET_CTI_VPC,SET_INSN_COUNT): Update.
(@cpu@_pbb_before): Check ARGBUF_PROFILE_P before calling
doing profiling. Update call to TRACE_INSN_INIT,TRACE_INSN_FINI.
(@cpu@_pbb_after): Check ARGBUF_PROFILE_P before calling
doing profiling. Update call to TRACE_INSN_FINI.
* sim/fr30/ld.cgs: Implement more loads.
* sim/fr30/call.cgs: New testcase.
* sim/fr30/testutils.inc (testr_h_dr): New macro.
(set_s_user,set_s_system): New macros.
[common/ChangeLog]
1998-12-01 Frank Ch. Eigler <fche@elastic.org>
* sim-gx-run.c (sim_engine_run): Use new tgx_info struct to
collect run-time arguments to gx block.
* sim-gx.h (sim_gx_function): Corresponding signature change.
* sim-gx.c (sim_gx_compiled_block_f): Remove nonfunctional code to
again compile a gx block source file.
(sim_gx_compiled_block_dispose): Uninstall obsoleted gx block
shared libraries.
(sim_gx_block_translate): Always emit new "gx_label_NNNN" labels,
for basic block entry points, even if !__GNUC__.
[m32r-gx/ChangeLog]
1998-12-01 Frank Ch. Eigler <fche@elastic.org>
* Makefile.in (SIM_OBJS): Don't build sim-core.o.
* configure.in: Added --enable-sim-inline support.
Look for "getenv()" function.
* configure: Rebuilt.
* config.in: Rebuilt.
* gx-translate.c: Include "sim-inline.c" for sim-core inlining.
(m32r_gx_{load,store}*): Update signature.
(tgx_emit_pre_function): Emit new "tgx_info" struct, update
callback function signatures.
(m32r_emit_*_insn): Use new callback signatures. For all short
branches in optimized mode, emit direct "goto gx_label_NNNN".
(tgx_optimize_test): If the GX_OPTIMIZE environment variable is
set, allow its integer value to override the optimization heuristic.
* m32r-sim.h: New empty placeholder file.
* sim-main.c: New empty placeholder file.
* sim-if.c (sim_create_inferior): Use NULL instead of &abort
for unimplemented register fondling functions.
* sim-main.h: Add multiple inclusion guard. Update callback
function signatures.
(tgx_info): New struct for collecting gx block invocation
arguments.
v850/simops.c, d10v/simops.c, v850/Makefile.in, d10v/Makefile.in:
Include targ-vals.h instead of syscall.h. Replace SYS_* with
TARGET_SYS_*. Add dependency.
z8k/support.c: Include <errno.h>
v850/simops.c: Replace long with portable signed32.
mips/interp.c: Make sim_monitor global - needed by sky.
(CGEN_ARCH_SCM): New variable.
* cgen-engine.h (EXTRACT_[ML]SB0_{INT,UINT}): New macros.
(EXTRACT_INT,EXTRACT_UINT): New macros.
(SEM_SEM_ARG): New macro.
(SEM_NEXT_VPC): New arg `pc'.
* cgen-sim.h (EXTRACT_SIGNED,EXTRACT_UNSIGNED): Delete.
(sim_disassemble_insn): Update prototype.
* cgen-trace.c (current_insn,insn_fields): New static locals.
(trace_insn): Set them.
* cgen-utils.scm: #include cgen-engine.h.
(sim_disassemble_insn): New arg insn_fields.
Handle variable length insns.
* genmloop.sh: Only emit pbb decls if -pbb.
(${cpu}_scache_lookup): New arg `vpc'.
(scache support): Fetch pc before entering loop.
[d30v/ChangeLog]
1998-11-06 Frank Ch. Eigler <fche@cygnus.com>
* d30v-insns (do_mvfacc): Use loop to limit shift count to 63 .. 0.
[testsuite/d30v-elf/ChangeLog]
1998-11-06 Frank Ch. Eigler <fche@cygnus.com>
* do-shifts.S: Add test for large mvfacc shifts.
HAVE_PARALLEL_INSNS, define as 0 or 1. Emit decls of fns in mloop.cin.
* cgen-engine.h: Typedefs of IADDR,CIA,SEM_ARG,SEM_PC moved ...
* cgen-sim.h: ... to here.
Andrew Cagney