d5a216fa21
re PR tree-optimization/79345 (passing yet-uninitialized member as argument to base class constructor should warn (-Wunitialized))
...
PR tree-optimization/79345
* gensupport.h (struct pattern_stats): Add min_scratch_opno field.
* gensupport.c (get_pattern_stats_1) <case MATCH_SCRATCH>: Update it.
(get_pattern_stats): Initialize it.
* genemit.c (gen_expand): Verify match_scratch numbers come after
match_operand/match_dup numbers.
* config/i386/i386.md (<s>mul<mode>3_highpart): Swap match_dup and
match_scratch numbers.
* config/i386/sse.md (avx2_gathersi<mode>, avx2_gatherdi<mode>):
Likewise.
* config/s390/s390.md (trunctdsd2): Likewise.
From-SVN: r245833
2017-03-02 10:19:28 +01:00
a2b48844ed
re PR rtl-optimization/79593 (Poor/Worse code generation for FPU on versions after 6)
...
PR target/79593
* config/i386/i386.md (standard_x87sse_constant_load splitter):
Use nonimmediate_operand instead of memory_operand for operand 1.
(float-extend standard_x87sse_constant_load splitter): Ditto.
testsuite/ChangeLog:
PR target/79593
* gcc.target/i386/pr79593.c: New test.
From-SVN: r245640
2017-02-21 19:29:57 +01:00
1d516992d1
i386-common.c (OPTION_MASK_ISA_RDPID_SET): New.
...
* common/config/i386/i386-common.c (OPTION_MASK_ISA_RDPID_SET): New.
(OPTION_MASK_ISA_PKU_UNSET): New.
(ix86_handle_option): Handle -mrdpid.
* config/i386/cpuid.h (bit_RDPID): New.
* config/i386/driver-i386.c (host_detect_local_cpu):
Detect RDPID feature.
* config/i386/i386-builtin.def (__builtin_ia32_rdpid): New.
* config/i386/i386-c.c (ix86_target_macros_internal):
Handle RDPID flag.
* config/i386/i386.c (ix86_target_string): Add -mrdpid to isa2_opts.
(ix86_valid_target_attribute_inner_p): Add "rdpid".
(ix86_expand_builtin): Handle IX86_BUILTIN_RDPID.
* config/i386/i386.h (TARGET_RDPID, TARGET_RDPID_P): New.
* config/i386/i386.md (define_insn "rdpid"): New.
* config/i386/i386.opt Add -mrdpid.
* config/i386/immintrin.h (_rdpid_u32): New.
testsuite/ChangeLog:
* gcc.target/i386/rdpid.c New test.
* gcc.target/i386/sse-12.c: Add -mrdpid.
* gcc.target/i386/sse-13.c: Ditto.
* gcc.target/i386/sse-14.c: Ditto.
* gcc.target/i386/sse-22.c: Ditto.
* gcc.target/i386/sse-23.c: Ditto.
* g++.dg/other/i386-2.C: Ditto.
* g++.dg/other/i386-3.C: Ditto.
From-SVN: r245540
2017-02-17 19:11:28 +01:00
95d966091d
re PR target/79495 (ICE in extract_constrain_insn, at recog.c:2213)
...
PR target/79495
* config/i386/i386.md (*movxf_internal): Add (o,rC) alternative.
testsuite/ChangeLog:
2017-02-14 Uros Bizjak <ubizjak@gmail.com>
PR target/79495
* gcc.target/i386/pr79495.c: New test.
From-SVN: r245441
2017-02-14 18:52:37 +01:00
a711887ed9
re PR rtl-optimization/78952 (Combine does not convert 8-bit sign-extract to a zero-extract for QImode operations)
...
PR rtl-optimization/78952
* config/i386/i386.md (any_extract): New code iterator.
(*insvqi_2): Use any_extract for source operand.
(*insvqi_3): Use any_shiftrt for source operand.
testsuite/ChangeLog:
PR rtl-optimization/78952
* gcc.target/i386/pr78952-1.c: New test.
* gcc.target/i386/pr78952-2.c: Ditto.
From-SVN: r244591
2017-01-18 20:24:30 +01:00
4ed04e93c2
i386.h (MASK_CLASS_P): New define.
...
* config/i386/i386.h (MASK_CLASS_P): New define.
* config/i386/i386.c (inline_secondary_memory_needed): Ensure that
there are no registers from different register sets also when
mask registers are used. Update function comment.
* config/i386/i386.md (*movsi_internal): Split (*k/*krm) alternative
to (*k/*r) and (*k/*km) alternatives.
From-SVN: r244548
2017-01-17 20:44:53 +01:00
1dc06b76ba
i386.md (*testqi_ext_3): No need to handle memory operands in a special way.
...
* config/i386/i386.md (*testqi_ext_3): No need to handle memory
operands in a special way. Assert that pos+len <= mode precision.
From-SVN: r244108
2017-01-05 20:09:25 +01:00
58adb11b30
i386.md (HI/SImode test with imm to QImode splitters): Use gen_int_mode instead of gen_lopwart for const_int operands.
...
* config/i386/i386.md (HI/SImode test with imm to QImode splitters):
Use gen_int_mode instead of gen_lopwart for const_int operands.
From-SVN: r244058
2017-01-04 16:42:36 +01:00
8b7163c630
re PR target/78967 (inserts are not effective)
...
target/78967
* config/i386/i386.md (UNSPEC_NOREX_MEM): New unspec.
(*insvqi_1): New insn pattern.
(*insvqi_1_mem_rex64): Ditto.
(*insvqi_2): Ditto.
(*insvqi_3): Rename from *insvqi.
(*extzvqi_mem_rex64): Add UNSPEC_NOREX_MEM tag.
testsuite/ChangeLog:
PR target/78967
* gcc.target/i386/pr78967-1.c: New test.
* gcc.target/i386/pr78967-2.c: Ditto.
* gcc.target/i386/pr78967-3.c: Ditto.
* gcc.target/i386/pr78904-2.c: Tighten scan-asm patterns.
* gcc.target/i386/pr78904-4.c: Ditto.
* gcc.target/i386/pr78904-6.c: Ditto.
From-SVN: r244006
2017-01-02 23:08:18 +01:00
cbe34bb5ed
Update copyright years.
...
From-SVN: r243994
2017-01-01 13:07:43 +01:00
9085a4c146
i386.md (*testqi_ext_3): Merge insn pattern and corresponding splitter to define_insn_and_split.
...
* config/i386/i386.md (*testqi_ext_3): Merge insn pattern and
corresponding splitter to define_insn_and_split. Use wi::shifted_mask
helper function to calculate mask.
From-SVN: r243977
2016-12-30 18:14:16 +01:00
edf5d079d3
predicates.md (ext_register_operand): Do not reject registers without upper parts here.
...
* config/i386/predicates.md (ext_register_operand): Do not reject
registers without upper parts here.
* config/i386/i386.md (extv<mode>): Copy registers without
upper parts in operand 1 to a pseudo.
(extzv<mode>): Ditto.
(insv<mode>): Ditto.
From-SVN: r243976
2016-12-30 16:10:45 +01:00
bc865078dc
* config/i386/i386.md (divmodqi4): Use lowpart_subreg.
...
From-SVN: r243969
2016-12-30 00:19:32 +01:00
a455baa994
re PR target/78904 (zero-extracts are not effective)
...
PR target/78904
* config/i386/i386.md (*extvqi): Remove insn pattern.
(divmodqi4): Update expander to generate QImode zero-extract from AH.
testsuite/ChangeLog:
PR target/78904
* gcc.target/i386/pr78904-6.c: New test.
From-SVN: r243968
2016-12-29 22:41:07 +01:00
5c8617dce6
re PR target/78904 (zero-extracts are not effective)
...
PR target/78904
* config/i386/constraints.md (Bn): New special memory constraint.
* config/i386/predicates.md (norex_memory_operand): New predicate.
* config/i386/i386.md (*extzvqi_mem_rex64): New insn pattern and
corresponding peephole2 pattern.
testsuite/ChangeLog:
PR target/78904
* gcc.target/i386/pr78904-4.c: New test.
* gcc.target/i386/pr78904-5.c: Ditto.
From-SVN: r243955
2016-12-28 16:16:26 +01:00
4b6d0c0eb4
re PR target/78904 (zero-extracts are not effective)
...
PR target/78904
* config/i386/constraints.md (Bc): New special memory constraint.
* config/i386/i386.md (*cmpqi_ext_1, *extvqi, *extzvqi): Use Bc
constraint with nonimmediate_operand to allow constant memory operands.
(*cmpqi_ext_3, insv<mode>_1, addqi_ext_1, *testqi_ext_1, andqi_ext_1)
(*<any_or:code>qi_ext_1, *xorqi_ext_1_cc): Use Bc constraint
with general_operand to allow constant memory operands.
testsuite/ChangeLog:
PR target/78904
* gcc.target/i386/pr78904-3.c: New test.
From-SVN: r243937
2016-12-27 15:20:19 +01:00
6a2067fffe
i386.md (andqi_ext_1): Use general_operand predicate for operand 2.
...
* config/i386/i386.md (andqi_ext_1): Use general_operand
predicate for operand 2.
From-SVN: r243934
2016-12-27 12:00:15 +01:00
b1d3a450be
re PR target/78904 (zero-extracts are not effective)
...
PR target/78904
* config/i386/i386.md (*cmpqi_ext_1, *extvqi, *extzvqi): Use
nonimmediate_operand instead of nonimmediate_x64nomem_operand.
(*cmpqi_ext_3, insv<mode>_1, addqi_ext_1, *testqi_ext_1, andqi_ext_1)
(*<any_or:code>qi_ext_1, *xorqi_ext_1_cc): Use general_operand
instead of general_x64nomem_operand.
* config/i386/predicates.md (nonimmediate_x64nomem_operand): Remove.
(general_x64nomem_operand): Ditto.
testsuite/ChangeLog:
PR target/78904
* gcc.target/i386/pr78904-2.c: New test.
From-SVN: r243933
2016-12-27 09:59:04 +01:00
ecb1129654
re PR target/78904 (zero-extracts are not effective)
...
PR target/78904
* config/i386/i386.md (addqi_ext_1): Canonicalize insn pattern w.r.t.
zero_extract RTXes.
(*addqi_ext_2): Ditto.
(testqi_ext_ccno_0): Canonicalize expander w.r.t. zero_extract RTXes.
(testqi_ext_1_ccno): Rename from testqi_ext_ccno_0.
(*testqi_ext_0): Merge with *testqi_ext_1.
(*testqi_ext_1): Canonicalize insn pattern w.r.t. zero_extract RTXes.
Update corresponding splitter.
(*testqi_ext_2): Canonicalize insn pattern w.r.t. zero_extract RTXes.
(*andqi_ext_0): Merge with *andqi_ext_1.
(andqi_ext_1): Canonicalize insn pattern w.r.t. zero_extract RTXes.
Rename from *andqi_ext_1. Update corresponding splitter and
peephole2 patterns.
(*andqi_ext_1_cc): Rename from *andqi_ext_0_cc.
(*andqi_ext_2): Canonicalize insn pattern w.r.t. zero_extract RTXes.
(*<any_or:code>qi_ext_0): Merge with *andqi_ext_1.
(*<any_or:code>qi_ext_1): Canonicalize insn pattern w.r.t.
zero_extract RTXes. Update corresponding splitter.
(*<any_or:code>qi_ext_2): Canonicalize insn pattern w.r.t.
zero_extract RTXes.
(xorqi_cc_ext_1): Canonicalize expander w.r.t. zero_extract RTXes.
(xorqi_ext_1_cc): Rename from xorqi_cc_ext_1.
(*xorqi_cc_ext_1): Canonicalize insn pattern w.r.t. zero_extract RTXes.
Update corresponding splitter.
(*xorqi_ext_1_cc): Rename from *xorqi_cc_ext_1.
(isinfxf2): Update calls to renamed expanders.
(isinf<mode>2): Ditto.
* config/i386/i386.c (ix86_expand_fp_compare): Ditto.
(ix86_emit_fp_unordered_jump): Ditto.
(ix86_emit_i387_round): Ditto.
testsuite/ChangeLog:
PR target/78904
* gcc.target/i386/pr78904.c: New test.
From-SVN: r243929
2016-12-26 20:00:47 +01:00
d697acca12
re PR target/71321 (x86: worse code for uint8_t % 10 and / 10)
...
PR target/71321
* config/i386/i386.md (lea<mode>_general_2b, lea<mode>_general_3b): New
patterns.
* config/i386/predicates.md (const123_operand): New.
PR target/71321
* gcc.target/i386/pr71321.c: New test.
From-SVN: r243861
2016-12-21 16:45:33 +00:00
6418b07737
i386.md (*popcounthi2_1): New insn_and_split pattern.
...
* config/i386/i386.md (*popcounthi2_1): New insn_and_split pattern.
testsuite/ChangeLog:
* gcc.target/i386/pr59874-3.c: New test.
From-SVN: r243811
2016-12-19 21:23:08 +01:00
c5b1ea2558
i386.md (*tzcnt<mode>_1): Merge *tzcnt<mode>_1_falsedep_1 and *tzcnt<mode>_1 to define_insn_and_split pattern.
...
* config/i386/i386.md (*tzcnt<mode>_1): Merge *tzcnt<mode>_1_falsedep_1
and *tzcnt<mode>_1 to define_insn_and_split pattern. Adjust split
condition to split after epilogue_completed.
(ctz<mode>2): Remove expander.
(ctz<mode>2): Merge *ctz<mode>2_falsedep_1 and *ctz<mode>2 to
define_insn_and_split pattern. Adjust split condition to split
after epilogue_completed.
(clz<mode>2_lznct): Remove expander.
(clz<mode>2_lzcnt): Merge *clz<mode>2_lzcnt_falsedep_1 and
*clz<mode>2 to define_insn_and_split pattern. Adjust split
condition to split after epilogue_completed.
(<lt_zcnt>_<mode>): Remove expander.
(<lt_zcnt>_<mode>): Merge *<lt_zcnt>_<mode>_falsedep_1 and
*<lt_zcnt>_<mode> to define_insn_and_split pattern. Adjust split
condition to split after epilogue_completed.
(<lt_zcnt>_hi): New insn pattern.
(popcount<mode>2): Remove expander.
(popcount<mode>2): Merge *popcount<mode>2_falsedep_1 and
*popcount<mode>2 to define_insn_and_split pattern. Adjust split
condition to split after epilogue_completed.
(popcounthi2): New insn pattern.
From-SVN: r243772
2016-12-17 12:05:46 +01:00
bdb5177687
i386.md (ffs<mode>2): Generate CCCmode flags register for TARGET_BMI.
...
* config/i386/i386.md (ffs<mode>2): Generate CCCmode flags register
for TARGET_BMI.
(ffssi2_no_cmove): Ditto.
(*tzcnt<mode>_1_falsedep_1): New insn_and_split pattern.
(*tzcnt<mode>_1_falsedep): New insn pattern.
(LT_ZCNT): New mode iterator.
(lt_zcnt): New mode attribute.
(lt_zcnt_type): New mode attribute.
(<lt_zcnt>_<mode>): Macroize expander from bmi_tzcnt_<mode> and
lzcnt_<mode> using LT_ZCNT mode iterator.
(*<lt_zcnt>_<mode>_falsedep_1): Macroize insn from
*bmi_tzcnt_<mode>_falsedep_1 and *lzcnt_<mode>_falsedep_1
using LT_ZCNT mode iterator.
(*<lt_zcnt>_<mode>_falsedep): Macroize insn from
*bmi_tzcnt_<mode>_falsedep and *lzcnt_<mode>_falsedep
using LT_ZCNT mode iterator.
(*<lt_zcnt>_<mode>): Macroize insn from *bmi_tzcnt_<mode>
and *lzcnt_<mode> using LT_ZCNT mode iterator.
* config/i386/i386-builtin.def (__builtin_ia32_tzcnt_u16)
(__builtin_ia32_tzcnt_u32, __builtin_ia32_tzcnt_u64, __builtin_ctzs):
Update for rename.
From-SVN: r243727
2016-12-15 23:23:46 +01:00
cc99421ec4
re PR target/59874 (Missing builtin (__builtin_clzs) when compiling with g++)
...
PR target/59874
* config/i386/i386-builtin.def: Add __builtin_clzs and __builtin_ctzs.
(ix86_fold_builtin): Handle IX86_BUILTIN_CTZS and IX86_BUILTIN_CLZS.
* config/i386/i386.md (*ctzhi2): New insn_and_split pattern.
(*clzhi2): Ditto.
testsuite/ChangeLog
PR target/59874
* gcc.target/i386/pr59874-1.c: New test.
* gcc.target/i386/pr59874-2.c: Ditto.
From-SVN: r243668
2016-12-14 21:27:06 +01:00
cd3fe55a18
predicates.md (general_gr_operand): New predicate.
...
* config/i386/predicates.md (general_gr_operand): New predicate.
* config/i386/i386.md (TImode and DImode push_operand splitter):
Use general_gr_operand. Macroize using DWI mode macro.
(TImode and DImode nonimmediate_operand splitter): Use
nonimmediate_gr_operand and general_gr_operand. Macroize using
DWI mode macro.
(TF/XF/DFmode push_operand splitter): Use general_gr_operand.
(TFmode nonimmediate_operand splitter): Use nonimmediate_gr_operand
and general_gr_operand.
(XFmode nonimmediate_operand splitter): Ditto.
(DFmode nonimmediate_operand splitter): Ditto.
* config/i386/mmx.md (MMXMODE nonimmediate_operand splitter): Ditto.
From-SVN: r243315
2016-12-06 20:56:03 +01:00
81cff75ff9
re PR target/70322 (STV doesn't optimize andn)
...
PR target/70322
* config/i386/i386.md (*andndi3_doubleword): Add non-BMI alternative
and corresponding post-reload splitter.
testsuite/ChangeLog:
PR target/70322
* gcc.target/i386/pr70322-2.c (dg-final): Remove xfail.
From-SVN: r243202
2016-12-02 19:48:35 +01:00
17c69eff82
re PR target/70322 (STV doesn't optimize andn)
...
PR target/70322
* config/i386/i386.c (dimode_scalar_to_vector_candidate_p): Handle
NOT.
(dimode_scalar_chain::compute_convert_gain): Likewise.
(dimode_scalar_chain::convert_insn): Likewise.
* config/i386/i386.md (*one_cmpldi2_doubleword): New
define_insn_and_split.
(one_cmpl<mode>2): Use SWIM1248x iterator instead of SWIM.
* gcc.target/i386/pr70322-1.c: New test.
* gcc.target/i386/pr70322-2.c: New test.
* gcc.target/i386/pr70322-3.c: New test.
From-SVN: r243195
2016-12-02 17:28:41 +01:00
1f0133ebb9
i386.md (*andndi3_doubleword): Depend on TARGET_SSE2.
...
* config/i386/i386.md (*andndi3_doubleword): Depend on TARGET_SSE2.
From-SVN: r243121
2016-12-01 18:10:58 +01:00
a918548079
sse.md (UNSPEC_MASKOP): Move from i386.md.
...
* config/i386/sse.md (UNSPEC_MASKOP): Move from i386.md.
(mshift): Ditto.
(SWI1248_AVX512BWDQ): Ditto.
(SWI1248_AVX512BW): Ditto.
(k<any_logic:code><mode>): Ditto.
(kandn<mode>): Ditto.
(kxnor<mode>): Ditto.
(knot<mode>): Ditto.
(*k<any_lshift:code><mode>): Ditto.
(kortestzhi, kortestchi): Ditto.
(kunpckhi, kunpcksi, kunpckdi): Ditto.
testsuite/ChangeLog:
* gcc.target/i386/avx512f-kmovw-1.c (avx512f_test):
Force value through k register.
From-SVN: r242971
2016-11-29 20:26:49 +01:00
58aa6a736a
i386.md (*and<mode>_1): Merge insn pattern from *andsi_1 and *andhi_1 using SWI24 mode iterator.
...
* config/i386/i386.md (*and<mode>_1): Merge insn pattern from
*andsi_1 and *andhi_1 using SWI24 mode iterator. Use multi-line
output template string.
(*anddi_1): Use multi-line output template string.
(*andqi_1): Ditto.
From-SVN: r242938
2016-11-29 00:21:43 +01:00
bf9e8b6b50
i386.md (UNSPEC_KMASKOP): New.
...
* config/i386/i386.md (UNSPEC_KMASKOP): New.
(UNSPEC_KMOV): Remove.
(kmovw): Expand to plain HImode move.
(k<any_logic:code><mode>): Rename from *k<logic><mode>. Use
register_operand predicates. Tag pattern with UNSPEC_KMASKOP.
Remove corresponding clobber-removing splitter.
(*anddi_1): Remove mask register alternatives.
(*andsi_1): Ditto.
(*andhi_1): Ditto.
(*andqi_1): Ditto.
(*<any_or:code><mode>_1): Ditto.
(*<any_or:code>qi_1): Ditto.
(kandn<mode>): Use SWI1248_AVX512BW mode iterator. Remove
general register alternatives. Tag pattern with UNSPEC_KMASKOP.
Remove corresponding splitter to operation with general registers.
(*andn<SWI38:mode>): Rename from *bmi_andn_<mode>.
(*andn<SWI12:mode>): New pattern.
(*kxnor<mode>): Remove general register alternatives. Tag pattern
with UNSPEC_KMASKOP. Remove corresponding splitter to operation
with general registers.
(knot<mode>): New insn pattern.
(*one_cmpl<mode>2_1): Remove mask register alternatives.
(one_cmplqi2_1): Ditto.
(*k<any_lshift:code><mode>): Rename from *k<mshift><mode>3.
Tag pattern with UNSPEC_KMASKOP. Add mode attribute.
* config/i386/predicates.md (mask_reg_operand): Remove predicate.
* config/i386/sse.md (vec_unpacks_hi_hi): Update pattern
to generate kmaskop shift.
(vec_unpacks_hi_<mode>): Ditto.
* config/i386/i386-builtin.def (__builtin_ia32_kandhi):
Use CODE_FOR_kandhi.
(__builtin_ia32_knothi): Use CODE_FOR_knothi.
(__builtin_ia32_korhi): Use CODE_FOR_kiorhi.
(__builtin_ia32_kxorhi): Use CODE_FOR_kxorhi.
testsuite/ChangeLog:
* gcc.target/i386/bmi-andn-1a.c (dg-final): Update scan string.
* gcc.target/i386/bmi-andn-2a.c (dg-final): Ditto.
From-SVN: r242925
2016-11-28 17:53:17 +01:00
112a619379
i386.md (wide AND insn to QImode splitter): Use explicit mode macros.
...
* config/i386/i386.md (wide AND insn to QImode splitter): Use
explicit mode macros.
(wide OR insn to QImode splitter): Ditto.
From-SVN: r242852
2016-11-24 22:48:13 +01:00
4dec376c23
* config/i386/i386.md: Move some more patterns around.
...
From-SVN: r242850
2016-11-24 22:12:19 +01:00
11a669fbeb
* config/i386/i386.md: Move some insn patterns around.
...
From-SVN: r242809
2016-11-23 23:25:12 +01:00
cf919e352b
i386.md (*<any_or:code>hi_1): Fix operand 2 constraints.
...
* config/i386/i386.md (*<any_or:code>hi_1): Fix operand 2 constraints.
From-SVN: r242796
2016-11-23 21:23:44 +01:00
46e89251c4
i386.md (*movqi_internal): Calculate mode attribute of alternatives 7,8,9 depending on TARGET_AVX512DQ.
...
* gcc.target/config/i386.md (*movqi_internal): Calculate mode
attribute of alternatives 7,8,9 depending on TARGET_AVX512DQ.
<TYPE_MSKMOV>: Emit kmovw for MODE_HI insn mode attribute.
(*k<logic><mode>): Calculate mode attribute depending on
TARGET_AVX512DQ. Emit k<logic>w for MODE_HI insn mode attribute.
(*andqi_1): Calculate mode attribute of alternative 3 depending
on TARGET_AVX512DQ. Emit kandw for MODE_HI insn mode attribute.
(kandn<mode>): Calculate mode attribute of alternative 2 depending
on TARGET_AVX512DQ. Emit kandnw for MODE_HI insn mode attribute.
(kxnor<mode>): Merge insn patterns using SWI1248_AVX512BW mode
iterator. Calculate mode attribute of alternative 1 depending
on TARGET_AVX512DQ. Emit kxnorw for MODE_HI insn mode attribute.
(*one_cmplqi2_1): Calculate mode attribute of alternative 2 depending
on TARGET_AVX512DQ. Emit knotw for MODE_HI insn mode attribute.
From-SVN: r242791
2016-11-23 20:05:53 +01:00
d9df71be90
i386.md (cmpstrnsi): New test to bail out if neither string input is a string constant.
...
2016-11-17 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
* config/i386/i386.md (cmpstrnsi): New test to bail out if neither
string input is a string constant.
* builtins.c (expand_builtin_strncmp): Attempt expansion of strncmp
via cmpstrnsi even if neither string is constant.
From-SVN: r242556
2016-11-17 12:58:16 -06:00
9daa4c7259
i386.md (*andndi3_doubleword): Merge operand constraints.
...
* config/i386/i386.md (*andndi3_doubleword): Merge operand constraints.
(*ashl<mode>3_doubleword): Ditto.
From-SVN: r242391
2016-11-14 17:51:27 +01:00
76ee24d041
i386.md (*<shift_insn><mode>3_doubleword): Mark operand 0 as earlyclobber.
...
* config/i386/i386.md (*<shift_insn><mode>3_doubleword): Mark
operand 0 as earlyclobber.
(*ashl<mode>3_doubleword): Ditto for all operand 0 alternatives.
From-SVN: r242318
2016-11-11 20:38:20 +01:00
c901bc0d8e
re PR target/78310 (ICE: insn does not satisfy its constraints: {*bmi2_rorxdi3_1} with -mbmi2)
...
PR target/78310
* config/i386/i386.md (rotate to rotatex splitter): Avoid overflow
when calculating operand 2.
(rotate to rotatex zext splitter): Ditto.
testsuite/ChangeLog:
PR target/78310
* gcc.target/i386/pr78310.c: New test.
From-SVN: r242076
2016-11-11 17:21:52 +01:00
ff1f317b3c
re PR target/78262 (wrong code with -fschedule-insns)
...
PR target/78262
* config/i386/i386.md (*<shift_insn><mode>3_doubleword): Mark
operand 0 as earlyclobber.
testsuite/ChangeLog:
PR target/78262
* gcc.target/i386/pr78262.c: New test.
From-SVN: r242013
2016-11-09 20:21:11 +01:00
f56ea76ecb
re PR target/78037 (Incorrect code generated at optimization level -O2 for tzcnt and binary and)
...
PR target/78037
* config/i386/bmiintrin.h (__tzcnt_u16): Call __builtin_ia32_tzcnt_u16.
(__tzcnt_u32, _tzcnt_u32): Call __builtin_ia32_tzcnt_u32.
(__tzcnt_u64, _tzcnt_u64): Call __builtin_ia32_tzcnt_u64.
* config/i386/lzcntintrin.h (__lzcnt_u16): Call
__builtin_ia32_lzcnt_u16.
(__lzcnt_u32, _lzcnt_u32): Call __builtin_ia32_lzcnt_u32.
(__lzcnt_u64, _lzcnt_u64): Call __builtin_ia32_lzcnt_u64.
* config/i386/i386.md (UNSPEC_LZCNT, UNSPEC_TZCNT): New unspecs.
(ctz<mode>2, *ctz<mode>2): Use SWI48 mode iterator.
(bmi_tzcnt_<mode>): New expander.
(*bmi_tzcnt_<mode>_falsedep_1): New define_insn_and_split pattern.
(*bmi_tzcnt_<mode>_falsedep, *bmi_tzcnt_<mode>): New insn patterns.
(clz<mode>2_lzcnt, *clz<mode>2_lzcnt): Use SWI48 mode iterator.
(lzcnt_<mode>): New expander.
(*lzcnt_<mode>_falsedep_1): New define_insn_and_split pattern.
(*lzcnt_<mode>_falsedep, *lzcnt_<mode>): New insn patterns.
* config/i386/i386-builtin-types.def (UINT_FTYPE_UINT): New.
(UINT64_FTYPE_UINT64): New.
* config/i386/i386-builtin.def (__builtin_clzs): Remove description.
(__builtin_ia32_lzcnt_u16): New description.
(__builtin_ia32_lzcnt_u32): Ditto.
(__builtin_ia32_lzcnt_u64): Ditto.
(__builtin_ctzs): Remove description.
(__builtin_ia32_tzcnt_u16): New description.
(__builtin_ia32_tzcnt_u32): Ditto.
(__builtin_ia32_tzcnt_u64): Ditto.
* config/i386/i386.c (ix86_expand_args_builtin): Handle
UINT_FTYPE_UINT and UINT64_FTYPE_UINT64.
testsuite/ChangeLog:
PR target/78037
* gcc.target/i386/pr78037.c: New test.
From-SVN: r241381
2016-10-20 19:53:10 +02:00
eee8f0b07f
Delete x86 deprecated pcommit instruction support
...
Delete x86 pcommit instruction support, which has been deprecated:
https://software.intel.com/en-us/blogs/2016/09/12/deprecate-pcommit-instruction
gcc/
* common/config/i386/i386-common.c (OPTION_MASK_ISA_PCOMMIT_UNSET,
OPTION_MASK_ISA_PCOMMIT_SET): Deleted definitions.
(ix86_handle_option): Deleted handle of OPT_mpcommit.
* config.gcc: Deleted pcommitintrin.h
* config/i386/pcommitintrin.h: Deleted file.
* config/i386/cpuid.h (bit_PCOMMIT): Deleted.
* config/i386/driver-i386.c (host_detect_local_cpu): Deleted pcommit
detection.
* config/i386/i386-c.c (ix86_target_macros_internal): Deleted define
__PCOMMIT__.
* config/i386/i386.c (ix86_target_string): Deleted -mpcommit.
(PTA_PCOMMIT): Deleted define.
(ix86_option_override_internal): Deleted handle of option.
(ix86_valid_target_attribute_inner_p): Deleted pcommit.
* config/i386/i386-builtin.def (IX86_BUILTIN_PCOMMIT,
__builtin_ia32_pcommit): Deleted.
* config/i386/i386.h (TARGET_PCOMMIT, TARGET_PCOMMIT_P): Deleted.
* config/i386/i386.md (unspecv): Deleted UNSPECV_PCOMMIT.
(pcommit): Deleted instruction.
* config/i386/i386.opt: Mention -mpcommit deprecation.
* config/i386/x86intrin.h: Deleted inclusion of pcommitintrin.h.
gcc/testsuite/
* gcc.target/i386/pcommit-1.c: Deleted.
* gcc.target/i386/sse-12.c: Deleted -pcommit option.
* gcc.target/i386/sse-13.c: Ditto.
* gcc.target/i386/sse-14.c: Ditto.
* gcc.target/i386/sse-22.c: Ditto.
* gcc.target/i386/sse-23.c: Ditto.
* g++.dg/other/i386-2.C: Ditto.
From-SVN: r240816
2016-10-05 15:08:48 -07:00
ed34fc9723
i386.md (mult->ashift peephole2s): Use pow2p_hwi instead of exact_log2.
...
* config/i386/i386.md (mult->ashift peephole2s): Use pow2p_hwi
instead of exact_log2.
From-SVN: r240281
2016-09-20 20:00:46 +02:00
de9188e004
re PR target/77476 ([AVX-512] illegal kmovb instruction on KNL)
...
PR target/77476
* config/i386/i386.md (isa): Add x64_avx512bw.
(*zero_extendsidi2): For alternative 11 use x64_avx512bw isa.
(kmov_isa): New mode attr.
(zero_extend<mode>di2): Use <kmov_isa> isa for the last alternative.
(*zero_extend<mode>si2): Likewise.
(*zero_extendqihi2): Use avx512dq isa for the last alternative.
* gcc.target/i386/avx512f-pr77476.c: New test.
* gcc.target/i386/avx512bw-pr77476.c: New test.
* gcc.target/i386/avx512dq-pr77476.c: New test.
From-SVN: r240000
2016-09-05 21:45:21 +02:00
bef18c6382
i386.md (*zero_extendsidi2): Add (*r,*k) alternative.
...
* config/i386/i386.md (*zero_extendsidi2): Add (*r,*k) alternative.
(zero_extend<mode>di2): Ditto.
(*zero_extend<mode>si2): Ditto.
(*zero_extendqihi2): Ditto.
From-SVN: r239672
2016-08-22 21:13:45 +02:00
2561f329f1
re PR target/77270 (Flag -mprftchw is shared with 3dnow for -march=k8)
...
PR target/77270
* config/i386/i386.md (prefetch): When TARGET_PRFCHW or
TARGET_PREFETCHWT1 are disabled, emit 3dNOW! write prefetches for
non-SSE2 athlons only, otherwise prefer SSE prefetches.
From-SVN: r239643
2016-08-21 20:53:48 +02:00
9db4c25d2c
re PR target/77270 (Flag -mprftchw is shared with 3dnow for -march=k8)
...
PR target/77270
* config/i386/i386.c (ix86_option_override_internal): Remove
PTA_PRFCHW from entries that also have PTA_3DNOW flag.
Enable SSE prefetch also for TARGET_PREFETCHWT1.
Do not try to enable TARGET_PRFCHW ISA flag here.
* config/i386/i386.md (prefetch): Enable also for TARGET_3DNOW.
Rewrite expander function body.
(*prefetch_3dnow): Enable for TARGET_3DNOW and TARGET_PREFETCHWT1.
From-SVN: r239626
2016-08-19 20:14:03 +02:00
3c5db734e0
i386.md (*ashl<mode>3_mask): Rewrite define_insn pattern as define_insn_and_split.
...
* config/i386/i386.md (*ashl<mode>3_mask): Rewrite define_insn
pattern as define_insn_and_split. Split insn before reload to
ashl<mode>3_1.
(*<shift_insn><mode>3_mask): Ditto. Split insn before reload to
<shift_insn><mode>3_1.
(*<rotate_insn><mode>3_mask): Ditto. Split insn before reload to
<rotate_insn><mode>3_1.
From-SVN: r239511
2016-08-16 20:23:47 +02:00
432baa029c
re PR target/72867 (SSE/AVX/AVX512: incorrect optimization of VMINPS/VMAXPS at compile time)
...
PR target/72867
* config/i386/sse.md (<code><mode>3<mask_name><round_saeonly_name>):
Emit ieee_<ieee_maxmin><mode>3<mask_name><round_saeonly_name>
for !flag_finite_math_only or flag_signed_zeros.
(*<code><mode>3<mask_name><round_saeonly_name>): Rename from
*<code><mode>3_finite<mask_name><round_saeonly_name>. Do not
depend on flag_finite_math_only.
(ieee_<ieee_maxmin><mode>3<mask_name><round_saeonly_name>):
New insn pattern.
(*<code><mode>3<mask_name><round_saeonly_name>): Remove.
(*ieee_smin<mode>3): Ditto.
(*ieee_smax<mode>3): Ditto.
* config/i386/mmx.md (mmx_<code>v2sf3): Emit
mmx_ieee_<ieee_maxmin>v2sf3 for !flag_finite_math_only or
flag_signed_zeros.
(*mmx_<code>v2sf3): Rename from *mmx_<code>v2sf3_finite. Do not
depend on flag_finite_math_only.
(mmx_ieee_<ieee_maxmin>v2sf3): New insn pattern.
(*mmx_<code>v2sf3): Remove.
* config/i386/subst.md (round_saeonly_mask_arg3): New subst attribute.
* config/i386/i386.c (ix86_expand_sse_fp_mimnax): Check
flag_signed_zeros instead of !flag_unsafe_math_optimizations.
testsuite/ChangeLog:
PR target/72867
* gcc.target/i386/pr72867.c: New test.
From-SVN: r239487
2016-08-15 20:46:53 +02:00
Jakub Jelinek
Uros Bizjak
Julia Koval
Uros Bizjak
Jakub Jelinek
Bernd Schmidt
Aaron Sawdey
Andrew Senkevich