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Bill Schmidt 4a560547e3 backport: rs6000.c (rs6000_opt_vars): Add entry for -mspeculate-indirect-jumps. 
[gcc]

2018-01-17  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	Backport from mainline
	2018-01-16  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/rs6000.c (rs6000_opt_vars): Add entry for
	-mspeculate-indirect-jumps.
	* config/rs6000/rs6000.md (*call_indirect_elfv2<mode>): Disable
	for -mno-speculate-indirect-jumps.
	(*call_indirect_elfv2<mode>_nospec): New define_insn.
	(*call_value_indirect_elfv2<mode>): Disable for
	-mno-speculate-indirect-jumps.
	(*call_value_indirect_elfv2<mode>_nospec): New define_insn.
	(indirect_jump): Emit different RTL for
	-mno-speculate-indirect-jumps.
	(*indirect_jump<mode>): Disable for
	-mno-speculate-indirect-jumps.
	(*indirect_jump<mode>_nospec): New define_insn.
	(tablejump): Emit different RTL for
	-mno-speculate-indirect-jumps.
	(tablejumpsi): Disable for -mno-speculate-indirect-jumps.
	(tablejumpsi_nospec): New define_expand.
	(tablejumpdi): Disable for -mno-speculate-indirect-jumps.
	(tablejumpdi_nospec): New define_expand.
	(*tablejump<mode>_internal1): Disable for
	-mno-speculate-indirect-jumps.
	(*tablejump<mode>_internal1_nospec): New define_insn.
	* config/rs6000/rs6000.opt (mspeculate-indirect-jumps): New
	option.

	Backport from mainline
	2018-01-17  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/rs6000.md (*call_indirect_nonlocal_sysv<mode>):
	Generate different code for -mno-speculate-indirect-jumps.
	(*call_value_indirect_nonlocal_sysv<mode>): Likewise.
	(*call_indirect_aix<mode>): Disable for
	-mno-speculate-indirect-jumps.
	(*call_indirect_aix<mode>_nospec): New define_insn.
	(*call_value_indirect_aix<mode>): Disable for
	-mno-speculate-indirect-jumps.
	(*call_value_indirect_aix<mode>_nospec): New define_insn.
	(*sibcall_nonlocal_sysv<mode>): Generate different code for
	-mno-speculate-indirect-jumps.
	(*sibcall_value_nonlocal_sysv<mode>): Likewise.

[gcc/testsuite]

2018-01-17  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	Backport from mainline
	2018-01-16  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* gcc.target/powerpc/safe-indirect-jump-1.c: New file.
	* gcc.target/powerpc/safe-indirect-jump-2.c: New file.
	* gcc.target/powerpc/safe-indirect-jump-3.c: New file.
	* gcc.target/powerpc/safe-indirect-jump-4.c: New file.
	* gcc.target/powerpc/safe-indirect-jump-5.c: New file.
	* gcc.target/powerpc/safe-indirect-jump-6.c: New file.

	Backport from mainline
	2018-01-17  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* gcc.target/powerpc/safe-indirect-jump-1.c: Remove endian
	restriction, but still restrict to 64-bit.
	* gcc.target/powerpc/safe-indirect-jump-7.c: New file.
	* gcc.target/powerpc/safe-indirect-jump-8.c: New file.

From-SVN: r256832
 		2018-01-18 01:34:10 +00:00
..
bfp scalar-insert-exp-3.c: New test. 2017-01-23 21:56:58 +00:00
dfp Update copyright years. 2017-01-01 13:07:43 +01:00
ppc-fortran re PR target/80108 (ICE in aggregate_value_p at function.c:2028) 2017-04-10 19:01:37 +00:00
vsu re PR target/79963 (vec_eq_any extracts wrong CR bit when compiling with -mcpu=power9) 2017-03-20 18:05:00 +00:00
405-dlmzb-strlen-1.c
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405-macchw-1.c
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405-macchw-2.c
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405-macchwu-1.c
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405-macchwu-2.c
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405-machhw-1.c
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405-machhw-2.c
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405-machhwu-1.c
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405-machhwu-2.c
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405-maclhw-1.c
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405-maclhw-2.c
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405-maclhwu-1.c
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405-maclhwu-2.c
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405-mulchw-1.c
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405-mulchw-2.c
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405-mulchwu-1.c
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405-mulchwu-2.c
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405-mulhhw-1.c
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405-mulhhw-2.c
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405-mulhhwu-1.c
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405-mulhhwu-2.c
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405-mullhw-1.c
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405-mullhw-2.c
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405-mullhwu-1.c
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405-mullhwu-2.c
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405-nmacchw-1.c
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405-nmacchw-2.c
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405-nmachhw-1.c
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405-nmachhw-2.c
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405-nmaclhw-1.c
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405-nmaclhw-2.c
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440-dlmzb-strlen-1.c
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440-macchw-1.c
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440-macchw-2.c
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440-macchwu-1.c
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440-macchwu-2.c
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440-machhw-1.c
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440-machhw-2.c
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440-machhwu-1.c
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440-machhwu-2.c
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440-maclhw-1.c
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440-maclhw-2.c
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440-maclhwu-1.c
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440-maclhwu-2.c
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440-mulchw-1.c
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440-mulchw-2.c
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440-mulchwu-1.c
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440-mulchwu-2.c
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440-mulhhw-1.c
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440-mulhhw-2.c
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440-mulhhwu-1.c
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440-mulhhwu-2.c
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440-mullhw-1.c
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440-mullhw-2.c
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440-mullhwu-1.c
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440-mullhwu-2.c
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440-nmacchw-1.c
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440-nmacchw-2.c
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440-nmachhw-1.c
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440-nmachhw-2.c
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440-nmaclhw-1.c
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440-nmaclhw-2.c
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980827-1.c
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20020118-1.c
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20030218-1.c Use relative line number for subsequent dg directives 2017-04-19 06:55:33 +00:00
20030505.c
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20040121-1.c
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20040622-1.c
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20041111-1.c
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20050603-1.c
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20050603-3.c powerpc: Add some XFAILs to 20050603-3.c (PR68803) 2016-01-14 20:24:28 +01:00
20050830-1.c rs6000: Testcase 20050830-1.c no longer fails (PR66612) 2017-04-15 06:11:35 +02:00
20081204-1.c
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abs128-1.c abs128-1.c: Require VSX. 2016-06-28 20:08:23 +00:00
altivec-1.c
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altivec-2.c
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altivec-3.c
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altivec-4.c
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altivec-5.c
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altivec-6.c
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altivec-7.c
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altivec-8.c
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altivec-9.c
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altivec-10.c
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altivec-11.c
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altivec-12.c
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altivec-13.c
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altivec-14.c
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altivec-15.c
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altivec-16.c
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altivec-17.c
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altivec-18.c
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altivec-19.c
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altivec-20.c
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altivec-21.c
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altivec-22.c
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altivec-23.c
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altivec-24.c
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altivec-25.c
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altivec-26.c
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altivec-27.c
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altivec-28.c
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altivec-29.c
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altivec-30.c
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altivec-31.c
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altivec-32.c
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altivec-33.c
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altivec-34.c
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altivec-35.c altivec.h (vec_pmsum_be): New #define. 2015-08-20 17:01:32 +00:00
altivec-36.c re PR target/70296 (Incorrect handling of vector X; if X is function-like macro) 2016-03-21 16:41:13 +01:00
altivec-cell-1.c
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altivec-cell-2.c
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altivec-cell-3.c
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altivec-cell-4.c
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altivec-cell-5.c
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altivec-cell-6.c
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altivec-cell-7.c
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altivec-cell-8.c
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altivec-consts.c
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altivec-macros.c
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altivec-perm-1.c
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altivec-perm-2.c
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altivec-perm-3.c
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altivec-perm-4.c
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altivec-pr22085.c
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altivec-splat.c
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altivec-types-1.c
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altivec-types-2.c
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altivec-types-3.c
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altivec-types-4.c
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altivec-varargs-1.c
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altivec-vec-merge.c
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altivec-volatile.c
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asm-es-1.c
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asm-es-2.c
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asm-y.c
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atomic-p7.c
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atomic-p8.c
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atomic_load_store-p8.c
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avoid-indexed-addresses.c
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bcd-1.c
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bcd-2.c
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bcd-3.c
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block-move-1.c
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block-move-2.c
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bool.c
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bool2-av.c
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bool2-p5.c
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bool2-p7.c
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bool2-p8.c
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bool2.h
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bool3-av.c
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bool3-p7.c
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bool3-p8.c
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bool3.h
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bswap-run.c
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bswap16.c
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bswap32.c
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bswap64-1.c
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bswap64-2.c
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bswap64-3.c
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bswap64-4.c
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builtins-1.c
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builtins-2.c
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builtins-3-p8.c rs6000-c (altivec_overloaded_builtins): Fix order of entries for ALTIVEC_BUILTIN_VEC_PACKS and P8V_BUILTIN_VEC_VGBBD. 2017-01-25 16:23:48 +00:00
builtins-3-p9.c builtins-3-p9.c (test_ne_long()): Change arguments and return type to bool long long. 2017-01-16 17:03:14 +00:00
builtins-3.c rs6000-c (altivec_overloaded_builtins): Add support for built-in functions vector signed char vec_nabs (vector signed... 2017-01-16 17:18:05 +00:00
byte-in-either-range-0.c byte-in-either-range-0.c: New test. 2016-12-17 00:18:32 +00:00
byte-in-either-range-1.c byte-in-either-range-0.c: New test. 2016-12-17 00:18:32 +00:00
byte-in-range-0.c byte-in-either-range-0.c: New test. 2016-12-17 00:18:32 +00:00
byte-in-range-1.c byte-in-either-range-0.c: New test. 2016-12-17 00:18:32 +00:00
byte-in-set-0.c byte-in-either-range-0.c: New test. 2016-12-17 00:18:32 +00:00
byte-in-set-1.c byte-in-either-range-0.c: New test. 2016-12-17 00:18:32 +00:00
byte-in-set-2.c byte-in-either-range-0.c: New test. 2016-12-17 00:18:32 +00:00
cell_builtin-1.c
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cell_builtin-2.c
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cell_builtin-3.c
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cell_builtin-4.c
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cell_builtin-5.c
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cell_builtin-6.c
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cell_builtin-7.c
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cell_builtin-8.c
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compress-float-ppc-pic.c
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compress-float-ppc.c
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const-compare.c
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copysign128-1.c abs128-1.c: Require VSX. 2016-06-28 20:08:23 +00:00
cprophard.c
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cpu-builtin-1.c backport: ppc-auxv.h (PPC_FEATURE2_HTM_NO_SUSPEND): New define. 2017-12-13 21:43:10 -06:00
crypto-builtin-1.c
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crypto-builtin-2.c
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ctz-1.c constraints.md (wF constraint): New constraints for power9/toc fusion. 2015-11-10 00:04:03 +00:00
ctz-2.c constraints.md (wF constraint): New constraints for power9/toc fusion. 2015-11-10 00:04:03 +00:00
ctz-3.c altivec.md (VParity): New mode iterator for vector parity built-in functions. 2016-05-24 22:45:45 +00:00
ctz-4.c altivec.md (VParity): New mode iterator for vector parity built-in functions. 2016-05-24 22:45:45 +00:00
darn-0.c rs6000.h: Add conditional preprocessing directives to disable Power9-specific compiler... 2016-06-21 21:39:49 +00:00
darn-1.c rs6000.h: Add conditional preprocessing directives to disable Power9-specific compiler... 2016-06-21 21:39:49 +00:00
darn-2.c rs6000.h: Add conditional preprocessing directives to disable Power9-specific compiler... 2016-06-21 21:39:49 +00:00
darwin-abi-1.c
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darwin-abi-2.c
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darwin-abi-3.c
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darwin-abi-4.c
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darwin-abi-5.c
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darwin-abi-6.c
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darwin-abi-7.c
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darwin-abi-8.c
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darwin-abi-9.c
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darwin-abi-10.c
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darwin-abi-11.c
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darwin-abi-12.c
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darwin-bool-1.c
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darwin-bool-2.c
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darwin-ehreturn-1.c
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darwin-longdouble.c
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darwin-longlong.c
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darwin-misaligned.c
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darwin-save-world-1.c
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darwin-split-ld-stret.c
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darwin64-abi.c
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dfmode_off.c
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dform-1.c predicates.md (quad_memory_operand): Move most of the code into quad_address_p and call it to share code with... 2016-05-11 18:38:10 +00:00
dform-2.c predicates.md (quad_memory_operand): Move most of the code into quad_address_p and call it to share code with... 2016-05-11 18:38:10 +00:00
dform-3.c predicates.md (quad_memory_operand): Move most of the code into quad_address_p and call it to share code with... 2016-05-11 18:38:10 +00:00
dfp-builtin-1.c re PR target/80246 (Builtin's for POWER's dxex[q] and diex[q] use the wrong types) 2017-04-03 12:10:57 -05:00
dfp-builtin-2.c re PR target/80246 (Builtin's for POWER's dxex[q] and diex[q] use the wrong types) 2017-04-03 12:10:57 -05:00
dfp-dd-2.c
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dfp-dd.c
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dfp-td-2.c
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dfp-td-3.c
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dfp-td.c
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dimode_off.c
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direct-move-double1.c
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direct-move-double2.c
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direct-move-float1.c
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direct-move-float2.c
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direct-move-long1.c
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direct-move-long2.c
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direct-move-vector.c constraints.md (we constraint): New constraint for 64-bit power9 vector support. 2015-11-13 20:02:56 +00:00
direct-move-vint1.c
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direct-move-vint2.c
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direct-move.h
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divkc3-1.c divkc3-1.c: Require POWER8 hardware. 2016-07-31 14:27:32 +00:00
doloop-1.c
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e500-1.c
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e500-ord-1.c
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e500-ord-2.c
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e500-unord-1.c
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e500-unord-2.c
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ehreturn.c
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extend-divide-1.c
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extend-divide-2.c
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extswsli-1.c constraints.md (wF constraint): New constraints for power9/toc fusion. 2015-11-10 00:04:03 +00:00
extswsli-2.c constraints.md (wF constraint): New constraints for power9/toc fusion. 2015-11-10 00:04:03 +00:00
extswsli-3.c constraints.md (wF constraint): New constraints for power9/toc fusion. 2015-11-10 00:04:03 +00:00
float128-1.c re PR target/70381 (On powerpc, -mfloat128 is on by default for all VSX systems) 2016-04-11 19:45:35 +00:00
float128-2.c re PR target/70381 (On powerpc, -mfloat128 is on by default for all VSX systems) 2016-04-11 19:45:35 +00:00
float128-call.c constraints.md (wF constraint): New constraints for power9/toc fusion. 2015-11-10 00:04:03 +00:00
float128-cmp.c re PR target/71869 (__builtin_isgreater raises an invalid exception on PPC64 using __float128 inputs.) 2016-07-27 04:45:59 +00:00
float128-complex-1.c machmode.h (mode_complex): Add support to give the complex mode for a given mode. 2016-05-02 23:23:45 +00:00
float128-complex-2.c machmode.h (mode_complex): Add support to give the complex mode for a given mode. 2016-05-02 23:23:45 +00:00
float128-hw.c rs6000-cpus.def (ISA_3_0_MASKS_SERVER): Enable -mpower9-minmax by default for -mcpu=power9. 2017-01-19 23:31:20 +00:00
float128-mix.c rs6000-c.c (rs6000_cpu_cpp_builtins): Split -mfloat128 into -mfloat128-type that enables the IEEE 128-bit floating... 2016-10-07 18:58:10 +00:00
float128-type-1.c rs6000-c.c (rs6000_cpu_cpp_builtins): Split -mfloat128 into -mfloat128-type that enables the IEEE 128-bit floating... 2016-10-07 18:58:10 +00:00
float128-type-2.c rs6000-c.c (rs6000_cpu_cpp_builtins): Split -mfloat128 into -mfloat128-type that enables the IEEE 128-bit floating... 2016-10-07 18:58:10 +00:00
fold-vec-add-1.c fold-vec-add-1.c: Add dg-options -maltivec. 2016-11-07 18:09:44 -05:00
fold-vec-add-2.c fold-vec-add-1.c: Add dg-options -maltivec. 2016-11-07 18:09:44 -05:00
fold-vec-add-3.c fold-vec-add-1.c: Add dg-options -maltivec. 2016-11-07 18:09:44 -05:00
fold-vec-add-4.c fold-vec-add-1.c: Add dg-options -maltivec. 2016-11-07 18:09:44 -05:00
fold-vec-add-5.c fold-vec-add-1.c: Add dg-options -maltivec. 2016-11-07 18:09:44 -05:00
fold-vec-add-6.c fold-vec-add-1.c: Add dg-options -maltivec. 2016-11-07 18:09:44 -05:00
fold-vec-add-7.c fold-vec-add-7.c: Require effective target to support __int128. 2016-12-09 19:54:11 +00:00
fold-vec-mule-char.c re PR target/79941 (Altivec vec_vmuleub regression) 2017-03-10 16:18:44 +00:00
fold-vec-mule-misc.c re PR target/79941 (Altivec vec_vmuleub regression) 2017-03-10 16:18:44 +00:00
fold-vec-mule-short.c re PR target/79941 (Altivec vec_vmuleub regression) 2017-03-10 16:18:44 +00:00
fold-vec-mult-char.c rs6000.c: Add handling for early expansion of vector multiply builtins. 2016-12-19 19:03:48 +00:00
fold-vec-mult-float.c rs6000.c: Add handling for early expansion of vector multiply builtins. 2016-12-19 19:03:48 +00:00
fold-vec-mult-floatdouble.c rs6000.c: Add handling for early expansion of vector multiply builtins. 2016-12-19 19:03:48 +00:00
fold-vec-mult-int.c pr78796.c: dg-add-options tls. 2016-12-20 11:22:09 -05:00
fold-vec-mult-int128-p8.c rs6000.c: Add handling for early expansion of vector multiply builtins. 2016-12-19 19:03:48 +00:00
fold-vec-mult-int128-p9.c rs6000.c: Add handling for early expansion of vector multiply builtins. 2016-12-19 19:03:48 +00:00
fold-vec-mult-longlong.c testsuite, rs6000: fold-vec-mult-longlong.c 2017-02-10 17:59:51 +01:00
fold-vec-mult-short.c rs6000.c: Add handling for early expansion of vector multiply builtins. 2016-12-19 19:03:48 +00:00
fold-vec-sub-char.c rs6000.c (rs6000_gimple_fold_builtin): Add handling for early expansion of vector subtract builtins. 2016-12-19 18:58:19 +00:00
fold-vec-sub-float.c rs6000.c (rs6000_gimple_fold_builtin): Add handling for early expansion of vector subtract builtins. 2016-12-19 18:58:19 +00:00
fold-vec-sub-floatdouble.c rs6000.c (rs6000_gimple_fold_builtin): Add handling for early expansion of vector subtract builtins. 2016-12-19 18:58:19 +00:00
fold-vec-sub-int.c rs6000.c (rs6000_gimple_fold_builtin): Add handling for early expansion of vector subtract builtins. 2016-12-19 18:58:19 +00:00
fold-vec-sub-int128.c rs6000.c (rs6000_gimple_fold_builtin): Add handling for early expansion of vector subtract builtins. 2016-12-19 18:58:19 +00:00
fold-vec-sub-longlong.c rs6000.c (rs6000_gimple_fold_builtin): Add handling for early expansion of vector subtract builtins. 2016-12-19 18:58:19 +00:00
fold-vec-sub-short.c rs6000.c (rs6000_gimple_fold_builtin): Add handling for early expansion of vector subtract builtins. 2016-12-19 18:58:19 +00:00
fusion.c re PR bootstrap/68404 (PGO/LTO bootstrap failure on ppc64le) 2016-02-18 19:36:39 +00:00
fusion2.c constraints.md (wF constraint): New constraints for power9/toc fusion. 2015-11-10 00:04:03 +00:00
fusion3.c re PR bootstrap/68404 (PGO/LTO bootstrap failure on ppc64le) 2016-02-18 19:36:39 +00:00
fusion4.c re PR rtl-optimization/77416 (LRA rematerializing use of CA reg across function call) 2017-01-18 18:39:56 +01:00
gcse-1.c rs6000: Fix gcc.target/powerpc/gcse-1.c for PIC (PR43496) 2017-03-29 00:26:17 +02:00
htm-1.c
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htm-builtin-1.c
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htm-tabort-no-r0.c htm.md (tabort.): Restrict the source operand to using a base register. 2015-08-03 16:11:20 -05:00
htm-ttest.c
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htm-xl-intrin-1.c
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indexed-addr.c
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inf128-1.c abs128-1.c: Require VSX. 2016-06-28 20:08:23 +00:00
le-altivec-consts.c
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leaf.c
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lhs-1.c lhs-1.c: Fix testcase to avoid subreg changes. 2016-05-24 22:24:16 +00:00
lhs-2.c
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lhs-3.c
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longcall-1.c
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longcall-2.c
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loop_align.c
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lvsl-lvsr.c
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macho-lo-sum.c
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maddld.c constraints.md (we constraint): New constraint for 64-bit power9 vector support. 2015-11-13 20:02:56 +00:00
medium_offset.c
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mmfpgpr.c
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mod-1.c constraints.md (wF constraint): New constraints for power9/toc fusion. 2015-11-10 00:04:03 +00:00
mod-2.c constraints.md (wF constraint): New constraints for power9/toc fusion. 2015-11-10 00:04:03 +00:00
mulkc3-1.c divkc3-1.c: Require POWER8 hardware. 2016-07-31 14:27:32 +00:00
nan128-1.c abs128-1.c: Require VSX. 2016-06-28 20:08:23 +00:00
no-r11-1.c
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no-r11-2.c
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no-r11-3.c
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non-lazy-ptr-test.c
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optimize-bswapdi-2.c
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optimize-bswapdi-3.c
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optimize-bswapsi-2.c
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outofline_rnreg.c
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p8-vec-xl-xst.c backport: p8-vec-xl-xst.c: Fix target string to LE-only. 2017-05-22 19:47:43 +00:00
p8vector-builtin-1.c
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p8vector-builtin-2.c
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p8vector-builtin-3.c
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p8vector-builtin-4.c
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p8vector-builtin-5.c
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p8vector-builtin-6.c
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p8vector-builtin-7.c
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p8vector-builtin-8.c altivec.h (vec_bperm): Change #define. 2017-01-18 15:04:50 +00:00
p8vector-fp.c
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p8vector-int128-1.c predicates.md (quad_memory_operand): Move most of the code into quad_address_p and call it to share code with... 2016-05-11 18:38:10 +00:00
p8vector-int128-2.c
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p8vector-ldst.c p8vector-ldst.c: Adjust to test desired functionality for both 32-bit and 64-bit. 2016-02-26 15:24:55 +00:00
p8vector-vbpermq.c
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p8vector-vectorize-1.c
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p8vector-vectorize-2.c
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p8vector-vectorize-3.c
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p8vector-vectorize-4.c
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p8vector-vectorize-5.c
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p9-dimode1.c dimode-1.c: Update syntax on scan-assembler strings 2016-12-09 16:19:03 +00:00
p9-dimode2.c dimode-1.c: Update syntax on scan-assembler strings 2016-12-09 16:19:03 +00:00
p9-extract-1.c rs6000.c (rs6000_split_vec_extract_var): On ISA 3.0/power9, add support to use the VEXTU{B,H,W}{L,R}X extract instructions. 2016-12-14 16:08:07 +00:00
p9-extract-2.c predicates.md (const_0_to_7_operand): New predicate, recognize 0..7. 2016-06-29 23:54:12 +00:00
p9-extract-3.c rs6000.c (rs6000_split_vec_extract_var): On ISA 3.0/power9, add support to use the VEXTU{B,H,W}{L,R}X extract instructions. 2016-12-14 16:08:07 +00:00
p9-fpcvt-1.c vsx.md (UNSPEC_P9_MEMORY): New unspec to support loading and storing byte/half-word values in the vector... 2016-06-28 00:01:13 +00:00
p9-fpcvt-2.c vsx.md (UNSPEC_P9_MEMORY): New unspec to support loading and storing byte/half-word values in the vector... 2016-06-28 00:01:13 +00:00
p9-lxvx-stxvx-1.c re PR target/70033 (PowerPC power9 tests don't have guard for power9 support) 2016-03-01 21:31:47 +00:00
p9-lxvx-stxvx-2.c re PR target/70033 (PowerPC power9 tests don't have guard for power9 support) 2016-03-01 21:31:47 +00:00
p9-lxvx-stxvx-3.c re PR target/71806 (PowerPC -mcpu=power9 enables __float128 without an explicit -mfloat128) 2016-07-08 14:49:37 +00:00
p9-minmax-1.c rs6000.c (rs6000_emit_p9_fp_minmax): New function for ISA 3.0 min/max support. 2016-05-26 21:38:19 +00:00
p9-minmax-2.c rs6000.c (rs6000_emit_p9_fp_minmax): New function for ISA 3.0 min/max support. 2016-05-26 21:38:19 +00:00
p9-novsx.c pr71670.c: Require p9vector. 2017-01-05 15:10:55 -05:00
p9-options-1.c p9-options-1.c: New test. 2017-03-23 22:12:06 +00:00
p9-permute.c re PR target/71201 (PowerPC XXPERM instruction fails on ISA 3.0 system.) 2016-05-23 23:42:52 +00:00
p9-splat-1.c re PR target/70915 (Improve loading 0/-1 in VSX registers on PowerPC) 2016-05-18 14:04:32 +00:00
p9-splat-2.c re PR target/70915 (Improve loading 0/-1 in VSX registers on PowerPC) 2016-05-18 14:04:32 +00:00
p9-splat-3.c re PR target/70915 (Improve loading 0/-1 in VSX registers on PowerPC) 2016-05-18 14:04:32 +00:00
p9-splat-4.c re PR target/71186 (PowerPC64: Autovectorised code hits ICE with -O3 -mpower9 -mlra) 2016-06-01 20:09:35 +00:00
p9-splat-5.c predicates.md (splat_input_operand): Rework. 2016-06-23 19:19:09 +00:00
p9-vbpermd.c altivec.h (vec_bperm): Change #define. 2017-01-18 15:04:50 +00:00
p9-vinsert4b-1.c rs6000.c (rs6000_split_vec_extract_var): On ISA 3.0/power9, add support to use the VEXTU{B,H,W}{L,R}X extract instructions. 2016-12-14 16:08:07 +00:00
p9-vinsert4b-2.c predicates.md (const_0_to_12_operand): Rename predicate and change test from 0..11 to 0..12 to match the semantics of... 2016-12-27 23:19:15 +00:00
p9-vneg.c altivec.md (VNEG iterator): New iterator for VNEGW/VNEGD instructions. 2016-05-24 23:19:08 +00:00
p9-vparity.c altivec.md (VParity): New mode iterator for vector parity built-in functions. 2016-05-24 22:45:45 +00:00
p9-vpermr.c p9-vpermr.c: New test for ISA 3.0 vpermr support. 2016-05-24 17:21:18 +00:00
p9-xxbr-1.c p9-xxbr-1.c: Fix typos in submission. 2017-01-19 00:12:14 +00:00
p9-xxbr-2.c p9-xxbr-1.c: Fix typos in submission. 2017-01-19 00:12:14 +00:00
pack01.c
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pack02.c
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pack03.c
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paired-1.c
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paired-2.c
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paired-3.c
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paired-4.c
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paired-5.c
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paired-6.c
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paired-7.c
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paired-8.c
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paired-9.c
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paired-10.c
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parity-1.c
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popcount-1.c
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popcount-2.c
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popcount-3.c
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powerpc.exp Update copyright years. 2017-01-01 13:07:43 +01:00
ppc-and-1.c
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ppc-bitfield1.c
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ppc-compare-1.c
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ppc-eabi.c
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ppc-eq0-1.c
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ppc-fma-1.c
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ppc-fma-2.c
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ppc-fma-3.c
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ppc-fma-4.c
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ppc-fma-5.c
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ppc-fma-6.c
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ppc-fma-7.c
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ppc-fmadd-1.c
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ppc-fmadd-2.c
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ppc-fmadd-3.c
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ppc-fpconv-1.c
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ppc-fpconv-2.c
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ppc-fpconv-3.c
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ppc-fpconv-4.c
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ppc-fpconv-5.c
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ppc-fpconv-6.c
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ppc-fpconv-7.c
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ppc-fpconv-8.c
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ppc-fpconv-9.c
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ppc-fpconv-10.c
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ppc-fpconv-11.c
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ppc-fsel-1.c
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ppc-fsel-2.c
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ppc-fsel-3.c
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ppc-get-timebase.c
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ppc-ldstruct.c
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ppc-mftb.c
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ppc-mov-1.c
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ppc-ne0-1.c
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ppc-negeq0-1.c
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ppc-paired.c
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ppc-pow.c
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ppc-round.c
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ppc-round2.c backport: re PR target/79038 (Improve PowerPC ISA 3.0 conversion between integers and hardware _Float128) 2017-05-09 23:49:37 +00:00
ppc-round3.c backport: re PR target/79038 (Improve PowerPC ISA 3.0 conversion between integers and hardware _Float128) 2017-05-09 23:49:37 +00:00
ppc-sdata-1.c
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ppc-sdata-2.c
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ppc-spe.c Fix numerous typos in comments 2017-04-03 23:30:56 +01:00
ppc-spe64-1.c
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ppc-stackalign-1.c
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ppc-stfiwx.c
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ppc-switch-1.c
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ppc-switch-2.c
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ppc-target-1.c
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ppc-target-2.c
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ppc-target-3.c
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ppc-target-4.c
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ppc-vector-memcpy.c
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ppc-vector-memset.c
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ppc32-abi-dfp-1.c
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ppc64-abi-1.c
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ppc64-abi-2.c
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ppc64-abi-3.c
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ppc64-abi-dfp-1.c
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ppc64-abi-warn-1.c
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ppc64-abi-warn-2.c
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ppc64-abi-warn-3.c
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ppc64-double-1.c
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ppc64-toc.c
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ppu-intrinsics.c
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pr16155.c
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pr16286.c
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pr16458-1.c
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pr16458-2.c
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pr16458-3.c
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pr16458-4.c
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pr17381.c Remove duplicate copy of the test body inadvertently inserted by patch. 2016-02-01 12:38:53 -07:00
pr18096-1.c
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pr25960.c
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pr26350.c
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pr27158.c
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pr35907.c
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pr37168.c
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pr39457.c
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pr39902-2.c
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pr41175.c
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pr42747.c
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pr43154.c
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pr46728-1.c
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pr46728-2.c
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pr46728-3.c
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pr46728-4.c
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pr46728-5.c
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pr46728-7.c
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pr46728-8.c
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pr46728-10.c
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pr46728-11.c
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pr46728-13.c
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pr46728-14.c
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pr46728-15.c
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pr46728-16.c
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pr47197.c
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pr47251.c
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pr47755-2.c
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pr47755.c re PR target/70915 (Improve loading 0/-1 in VSX registers on PowerPC) 2016-05-18 14:04:32 +00:00
pr47862.c
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pr48053-1.c
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pr48053-2.c
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pr48053-3.c
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pr48192.c
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pr48226.c
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pr48258-1.c
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pr48258-2.c
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pr48344-1.c re PR target/48344 (powerpc ICE with -fstack-limit-register=r2) 2016-02-16 23:12:19 +00:00
pr48857.c
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pr51623.c
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pr52199.c
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pr52457.c
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pr52775.c
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pr53199.c
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pr53487.c
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pr54009.c
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pr54240.c
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pr55033.c
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pr56256.c
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pr56605.c
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pr57150.c
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pr57363.c
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pr57744.c
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pr57949-1.c
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pr57949-2.c
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pr58330.c
…
pr58673-1.c re PR rtl-optimization/77416 (LRA rematerializing use of CA reg across function call) 2017-01-18 18:39:56 +01:00
pr58673-2.c re PR rtl-optimization/77416 (LRA rematerializing use of CA reg across function call) 2017-01-18 18:39:56 +01:00
pr59054.c re PR rtl-optimization/77416 (LRA rematerializing use of CA reg across function call) 2017-01-18 18:39:56 +01:00
pr60032.c
…
pr60102.c
…
pr60137.c
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pr60158.c
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pr60203.c
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pr60676.c
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pr60735.c
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pr61977-1.c
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pr61977-2.c
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pr63335.c
…
pr63354.c pr63354.c: Require lp64 since -mprofile-kernel is not legal with -m32. 2016-07-26 14:24:16 +00:00
pr63491.c re PR rtl-optimization/77416 (LRA rematerializing use of CA reg across function call) 2017-01-18 18:39:56 +01:00
pr64019.c
…
pr64205.c re PR rtl-optimization/77416 (LRA rematerializing use of CA reg across function call) 2017-01-18 18:39:56 +01:00
pr64505.c
…
pr65058.c
…
pr65456.c
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pr65787.c
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pr65849-1.c
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pr65849-2.c
…
pr66144-1.c re PR target/66144 (vector element operator produces very bad code) 2017-02-06 21:07:37 +00:00
pr66144-2.c re PR target/66144 (vector element operator produces very bad code) 2017-02-06 21:07:37 +00:00
pr66144-3.c re PR target/66144 (vector element operator produces very bad code) 2017-02-06 21:07:37 +00:00
pr67071-1.c re PR target/67071 (GCC misses an optimization to load vector constants) 2015-08-12 21:54:23 +00:00
pr67071-2.c re PR target/67071 (GCC misses an optimization to load vector constants) 2015-08-12 21:54:23 +00:00
pr67071-3.c re PR target/67071 (GCC misses an optimization to load vector constants) 2015-08-12 21:54:23 +00:00
pr67789.c * gcc.target/powerpc/pr67789.c: Skip on AIX and Darwin. 2015-11-12 08:42:14 -05:00
pr67808.c pr67808.c: Add -mlong-double-128 option. 2015-12-12 08:12:10 -05:00
pr68163.c backport: re PR target/80510 (Optimize Power7/power8 Altivec load/stores) 2017-05-26 01:52:24 +00:00
pr68805.c predicates.md (quad_memory_operand): Move most of the code into quad_address_p and call it to share code with... 2016-05-11 18:38:10 +00:00
pr68872.c re PR target/68772 (Many -gstabs tests FAIL with Xcode 7 as) 2015-12-22 13:27:14 -06:00
pr69252.c re PR target/69252 (gcc.dg/vect/vect-iv-9.c FAILs with -Os -fmodulo-sched -fmodulo-sched-allow-regmoves -fsched-pressure) 2016-01-21 15:58:29 -07:00
pr69461.c re PR target/69461 (ICE in lra_set_insn_recog_data, at lra.c:964) 2016-02-03 17:58:34 +00:00
pr69548.c [RS6000] lqarx and stqcx. registers 2016-02-02 11:59:17 +10:30
pr69946.c powerpc: Handle DImode rotatert implemented with rlwinm (PR69946) 2016-02-26 19:49:18 +01:00
pr69969.c re PR target/69969 (Function attribute no-vsx) 2016-02-26 23:35:00 +01:00
pr70117.c PR70117, ppc long double isinf 2016-04-08 11:41:52 +09:30
pr70640.c re PR target/70640 (IEEE 128-bit floating point negative/abs has two thinkos) 2016-04-14 20:05:58 +00:00
pr70669.c re PR rtl-optimization/78241 (wrong code with -funroll-loops) 2017-02-03 14:20:30 +00:00
pr70866.c [RS6000] powerpc64le -ffixed-cr2 -ffixed-cr3 -ffixed-cr4 ICE 2016-05-04 09:21:34 +09:30
pr70963.c pr70963.c: Require at least power8 at both compile and run time. 2016-05-11 21:38:40 +00:00
pr71186.c re PR target/71186 (PowerPC64: Autovectorised code hits ICE with -O3 -mpower9 -mlra) 2016-06-01 20:09:35 +00:00
pr71297.c re PR target/71297 (ICE on invalid code in altivec_resolve_overloaded_builtin (rs6000-c.c:5106) on powerpc64le-linux) 2016-07-08 15:42:47 +00:00
pr71310.c fold-const: Don't access bit fields with too big mode (PR71310) 2016-06-11 01:58:09 +02:00
pr71493-1.c re PR target/71493 (accidental ABI change for structure return on PowerPC) 2016-07-19 03:31:48 +00:00
pr71493-2.c re PR target/71493 (accidental ABI change for structure return on PowerPC) 2016-07-19 03:31:48 +00:00
pr71656-1.c re PR target/71656 (ICE in reload when generating code for -mcpu=power9 -mpower9-dform-vector) 2016-06-27 20:28:28 -05:00
pr71656-2.c re PR target/71656 (ICE in reload when generating code for -mcpu=power9 -mpower9-dform-vector) 2016-06-28 10:49:10 -05:00
pr71670.c pr71670.c: Require p9vector. 2017-01-05 15:10:55 -05:00
pr71680.c missed from last commit 2016-08-11 08:42:56 +09:30
pr71698.c re PR target/71698 (ICE related to decimal float when compiling with -mcpu=power9) 2016-07-01 08:51:35 -05:00
pr71720.c re PR target/71720 (initialization of a vector of floats generates incorrect code for -mcpu=power9) 2016-07-01 18:23:29 +00:00
pr71763.c pr70098.C: Remove XFAIL for powerpc64_no_dm. 2016-07-29 18:29:01 +00:00
pr71785.c Testcase for PR71785 2016-11-21 16:15:21 +01:00
pr71805.c re PR target/71805 (incorrect code for test pr45752.c with -mcpu=power9) 2016-07-12 17:42:04 +00:00
pr71977-1.c re PR target/71977 (powerpc64: Use VSR when operating on float and integer) 2017-01-05 00:43:53 +00:00
pr71977-2.c re PR target/71977 (powerpc64: Use VSR when operating on float and integer) 2017-01-05 00:43:53 +00:00
pr72717.c re PR target/72717 (ICE: in emit_move_insn, at expr.c:3693 with vector shift @ powerpc64le) 2016-12-07 23:52:05 +00:00
pr72804.c backport: re PR target/72804 (Poor code gen with -mvsx-timode) 2017-08-23 15:03:46 -05:00
pr72853.c re PR target/72853 (gcc/testsuite/gcc.c-torture/execute/20021120-1.c generates incorrect stxssp op with -mcpu=power9) 2016-08-10 13:49:12 +00:00
pr72863.c re PR target/72863 (Powerpc64le: redundant swaps when using vec_vsx_ld/st) 2016-08-11 21:39:49 +00:00
pr77289.c re PR rtl-optimization/77289 (ICE in extract_constrain_insn, at recog.c:2212 on powerpc64) 2016-09-09 20:36:33 -05:00
pr77416.c re PR rtl-optimization/77416 (LRA rematerializing use of CA reg across function call) 2017-01-18 18:39:56 +01:00
pr77687.c rs6000: Don't touch below the stack pointer (PR77687) 2017-11-20 21:10:28 +01:00
pr78056-1.c re PR target/78056 (build failure on Power7) 2017-01-04 20:03:00 +00:00
pr78056-2.c re PR target/78056 (build failure on Power7) 2017-01-04 20:03:00 +00:00
pr78056-3.c re PR target/78056 (build failure on Power7) 2017-01-04 20:03:00 +00:00
pr78056-4.c re PR target/78056 (build failure on Power7) 2017-01-04 20:03:00 +00:00
pr78056-5.c re PR target/78056 (build failure on Power7) 2017-01-04 20:03:00 +00:00
pr78056-6.c re PR target/78056 (build failure on Power7) 2017-01-04 20:03:00 +00:00
pr78056-7.c re PR target/78056 (build failure on Power7) 2017-01-04 20:03:00 +00:00
pr78458.c re PR target/78458 (LRA ICE building libgcc for powerpc-linux-gnuspe e500v2) 2016-11-23 20:07:51 -06:00
pr78543.c re PR target/78543 (ICE in push_reload, at reload.c:1349 on powerpc64le-linux-gnu) 2017-03-27 19:19:00 +00:00
pr78604.c re PR target/78604 (test case gcc.target/powerpc/p8vector-vectorize-1.c fails starting with r242750) 2017-02-08 20:49:14 +00:00
pr78658.c re PR target/78658 (powerpc64le: ICE with -mcpu=power9 -Og) 2016-12-06 22:15:31 +00:00
pr78691-ppc.c re PR testsuite/78740 (test case powerpc/pr78691-ppc.c fails starting with its introduction in r243335) 2016-12-09 22:02:04 +00:00
pr78953.c re PR target/78900 (ICE in gcc.target/powerpc/signbit-3.c) 2017-01-04 04:32:48 +00:00
pr79004.c re PR target/79004 (ICE in gcc.dg/torture/fp-int-convert-float128-ieee.c with -mcpu=power9) 2017-01-18 00:35:29 +00:00
pr79038-1.c re PR target/79038 (Improve PowerPC ISA 3.0 conversion between integers and hardware _Float128) 2017-03-15 21:17:35 +00:00
pr79066.c PR79066, non-PIC code generated for powerpc glibc with -fpic 2017-01-17 13:24:11 +10:30
pr79179.c re PR target/79179 (PowerPC64: -mcpu=power9 creates stxsd with bad offset) 2017-01-26 04:16:11 +00:00
pr79197.c re PR target/79197 (ICE in extract_insn in gcc/recog.c:2311) 2017-02-02 11:05:26 +01:00
pr79268.c re PR target/79268 (Wrong code generation for vec_xl and vec_xst intrinsics) 2017-01-30 03:32:59 +00:00
pr79354.c re PR target/79354 (-mcpu=power8 -O2 generates power9 instruction on powerpc64le-linux) 2017-02-03 18:34:56 +01:00
pr79439.c re PR target/79439 (Missing nop instruction after recursive call corrupts TOC register) 2017-03-01 18:33:21 +00:00
pr79544.c pr79544.c: Add test for vec_vsrad and fix up scan string. 2017-03-01 18:09:51 +00:00
pr79799-1.c backport: re PR target/80510 (Optimize Power7/power8 Altivec load/stores) 2017-06-29 22:19:29 +00:00
pr79799-2.c backport: re PR target/80510 (Optimize Power7/power8 Altivec load/stores) 2017-06-29 22:19:29 +00:00
pr79799-3.c backport: re PR target/80510 (Optimize Power7/power8 Altivec load/stores) 2017-06-29 22:19:29 +00:00
pr79799-4.c backport: re PR target/80510 (Optimize Power7/power8 Altivec load/stores) 2017-06-29 22:19:29 +00:00
pr79799-5.c backport: re PR target/80510 (Optimize Power7/power8 Altivec load/stores) 2017-06-29 22:19:29 +00:00
pr79907.c re PR target/79907 (ICE in extract_constrain_insn, at recog.c:2213 on ppc64le) 2017-03-10 14:32:42 +00:00
pr79909.c re PR middle-end/79909 (ICE error: invalid rtl sharing found in the insn on ppc64le) 2017-03-10 08:57:45 +01:00
pr79947.c re PR target/79947 (ICE in rs6000_emit_swsqrt at gcc/config/rs6000/rs6000.c:37570) 2017-03-15 00:25:10 +00:00
pr79951.c re PR target/79951 (ICE in extract_insn, at recog.c:2311 on ppc64le with -mno-cmpb) 2017-03-17 16:42:29 +00:00
pr80098-1.c re PR target/80098 (ICE in curr_insn_transform, at lra-constraints.c:3816 on ppc64le) 2017-04-14 20:27:18 +00:00
pr80098-2.c re PR target/80098 (ICE in curr_insn_transform, at lra-constraints.c:3816 on ppc64le) 2017-04-14 20:27:18 +00:00
pr80098-3.c re PR target/80098 (ICE in curr_insn_transform, at lra-constraints.c:3816 on ppc64le) 2017-04-14 20:27:18 +00:00
pr80098-4.c re PR target/80098 (ICE in curr_insn_transform, at lra-constraints.c:3816 on ppc64le) 2017-04-14 20:27:18 +00:00
pr80099-1.c re PR target/80099 (ICE in rs6000_expand_vector_extract, at config/rs6000/rs6000.c:7450) 2017-04-18 16:41:06 +00:00
pr80099-2.c re PR target/80099 (ICE in rs6000_expand_vector_extract, at config/rs6000/rs6000.c:7450) 2017-04-18 16:41:06 +00:00
pr80099-3.c re PR target/80099 (ICE in rs6000_expand_vector_extract, at config/rs6000/rs6000.c:7450) 2017-04-18 16:41:06 +00:00
pr80099-4.c re PR target/80099 (ICE in rs6000_expand_vector_extract, at config/rs6000/rs6000.c:7450) 2017-04-18 16:41:06 +00:00
pr80099-5.c re PR target/80099 (ICE in rs6000_expand_vector_extract, at config/rs6000/rs6000.c:7450) 2017-04-18 16:41:06 +00:00
pr80101-1.c backport: re PR target/80101 (ICE in store_data_bypass_p, at recog.c:3737) 2017-12-07 13:20:27 +00:00
pr80103-1.c re PR target/80103 (ICE in output_1144, at config/rs6000/vsx.md:2298) 2017-03-27 17:04:07 +00:00
pr80125.c re PR target/80125 (r246297 causes segfault in reg_used_between_p()) 2017-03-21 15:49:51 +01:00
pr80210-2.c backport: re PR target/80210 (ICE in in extract_insn, at recog.c:2311 on ppc64 for with __builtin_pow) 2017-12-14 11:43:32 -06:00
pr80210.c backport: re PR target/80210 (ICE in in extract_insn, at recog.c:2311 on ppc64 for with __builtin_pow) 2017-08-22 15:13:11 -05:00
pr80246.c re PR target/80246 (Builtin's for POWER's dxex[q] and diex[q] use the wrong types) 2017-04-03 11:15:00 -05:00
pr80315-1.c re PR target/80315 (Calling __builtin_crypto_vshasigmaw with argument 3 out of range creates an unrecognizable insn) 2017-04-17 16:16:43 +00:00
pr80315-2.c re PR target/80315 (Calling __builtin_crypto_vshasigmaw with argument 3 out of range creates an unrecognizable insn) 2017-04-17 16:16:43 +00:00
pr80315-3.c re PR target/80315 (Calling __builtin_crypto_vshasigmaw with argument 3 out of range creates an unrecognizable insn) 2017-04-17 16:16:43 +00:00
pr80315-4.c re PR target/80315 (Calling __builtin_crypto_vshasigmaw with argument 3 out of range creates an unrecognizable insn) 2017-04-17 16:16:43 +00:00
pr80343.c re PR rtl-optimization/80343 (ICE in extract_constrain_insn, at recog.c:2213 (error: insn does not satisfy its constraints)) 2017-04-13 18:08:51 +00:00
pr80510-1.c backport: re PR target/80510 (Optimize Power7/power8 Altivec load/stores) 2017-06-29 22:19:29 +00:00
pr80510-2.c backport: re PR target/80510 (Optimize Power7/power8 Altivec load/stores) 2017-06-29 22:19:29 +00:00
pr80695-p8.c backport: re PR target/80695 (gratuitous use of stxvx to store multiple pointers) 2017-09-10 21:09:38 +00:00
pr80695-p9.c backport: re PR target/80695 (gratuitous use of stxvx to store multiple pointers) 2017-09-10 21:09:38 +00:00
pr80718.c backport: re PR target/80718 (GCC generates slow code for offsettable vec_duplicate) 2017-06-06 22:27:13 +00:00
pr81348.c backport: re PR target/81348 (PowerPC64: Code built with -mcpu=power9 hits SEGV in RTL split2) 2017-07-07 20:47:15 +00:00
pr81622.c re PR target/81622 (ICE on invalid altivec code with ppc64{,le}) 2017-08-01 18:44:17 +02:00
pr81833-1.c backport: re PR target/81833 (PowerPC: VSX: Miscompiles ffmpeg's scalarproduct_int16_vsx at -O1) 2017-09-12 21:02:13 +00:00
pr81833-2.c backport: re PR target/81833 (PowerPC: VSX: Miscompiles ffmpeg's scalarproduct_int16_vsx at -O1) 2017-09-12 21:02:13 +00:00
pr81959.c backport: re PR target/81959 (PowerPC __float128 optimization fails with integer PRE_INC addresses) 2017-12-11 18:54:55 +00:00
pr82112.c backport: re PR target/82112 (internal compiler error: in fold_convert_loc, at fold-const.c:2262) 2017-09-15 13:24:49 +02:00
pr83629.c backport: re PR target/83629 (ICE: in decompose_normal_address, at rtlanal.c:6329 with -O2 -fPIC -frename-registers --param=sched-autopref-queue-depth=nnn) 2018-01-15 23:08:12 +01:00
pr83677.c backport: re PR target/83677 (PPC: The xxpermr instruction is not generated correctly) 2018-01-14 17:47:30 +00:00
quad-atomic.c unpack-be-order.c: Use -Wno-shift-overflow. 2015-07-21 10:01:53 +00:00
recip-1.c re PR target/68609 (PowerPC reciprocal estimate missed opportunities) 2016-01-15 18:04:23 -05:00
recip-2.c re PR target/68609 (PowerPC reciprocal estimate missed opportunities) 2016-01-15 18:04:23 -05:00
recip-3.c re PR target/68609 (PowerPC reciprocal estimate missed opportunities) 2016-01-15 18:04:23 -05:00
recip-4.c re PR target/68609 (PowerPC reciprocal estimate missed opportunities) 2016-01-15 18:04:23 -05:00
recip-5.c
…
recip-6.c re PR target/68609 (PowerPC reciprocal estimate missed opportunities) 2016-01-16 15:04:33 -05:00
recip-7.c re PR target/68609 (PowerPC reciprocal estimate missed opportunities) 2016-01-16 15:04:33 -05:00
recip-sqrtf.c re PR target/68609 (PowerPC reciprocal estimate missed opportunities) 2016-01-15 18:04:23 -05:00
recip-test.h
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recip-test2.h
…
regnames-1.c
…
rldic-0.c rs6000: Testcases for rl*i* 2016-11-29 06:51:51 +01:00
rldic-1.c rs6000: Testcases for rl*i* 2016-11-29 06:51:51 +01:00
rldic-2.c rs6000: Testcases for rl*i* 2016-11-29 06:51:51 +01:00
rldicl-0.c rs6000: Testcases for rl*i* 2016-11-29 06:51:51 +01:00
rldicl-1.c rs6000: Testcases for rl*i* 2016-11-29 06:51:51 +01:00
rldicl-2.c rs6000: Testcases for rl*i* 2016-11-29 06:51:51 +01:00
rldicr-0.c rs6000: Testcases for rl*i* 2016-11-29 06:51:51 +01:00
rldicr-1.c rs6000: Testcases for rl*i* 2016-11-29 06:51:51 +01:00
rldicr-2.c rs6000: Testcases for rl*i* 2016-11-29 06:51:51 +01:00
rldicx.h rs6000: Testcases for rl*i* 2016-11-29 06:51:51 +01:00
rldimi-0.c rs6000: Testcases for rl*i* 2016-11-29 06:51:51 +01:00
rldimi-1.c rs6000: Testcases for rl*i* 2016-11-29 06:51:51 +01:00
rldimi-2.c rs6000: Testcases for rl*i* 2016-11-29 06:51:51 +01:00
rldimi.h rs6000: Testcases for rl*i* 2016-11-29 06:51:51 +01:00
rlwimi-0.c rs6000: Testcases for rl*i* 2016-11-29 06:51:51 +01:00
rlwimi-1.c rs6000: Testcases for rl*i* 2016-11-29 06:51:51 +01:00
rlwimi-2.c rs6000: Testcases for rl*i* 2016-11-29 06:51:51 +01:00
rlwimi.h rs6000: Testcases for rl*i* 2016-11-29 06:51:51 +01:00
rlwinm-0.c rs6000: Testcases for rl*i* 2016-11-29 06:51:51 +01:00
rlwinm-1.c rs6000: Testcases for rl*i* 2016-11-29 06:51:51 +01:00
rlwinm-2.c rs6000: Testcases for rl*i* 2016-11-29 06:51:51 +01:00
rlwinm.h rs6000: Testcases for rl*i* 2016-11-29 06:51:51 +01:00
rotate.c
…
rs6000-fpint-2.c
…
rs6000-fpint.c
…
rs6000-ldouble-1.c
…
rs6000-ldouble-2.c
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rs6000-ldouble-3.c
…
safe-indirect-jump-1.c backport: rs6000.c (rs6000_opt_vars): Add entry for -mspeculate-indirect-jumps. 2018-01-18 01:34:10 +00:00
safe-indirect-jump-2.c backport: rs6000.c (rs6000_opt_vars): Add entry for -mspeculate-indirect-jumps. 2018-01-18 01:34:10 +00:00
safe-indirect-jump-3.c backport: rs6000.c (rs6000_opt_vars): Add entry for -mspeculate-indirect-jumps. 2018-01-18 01:34:10 +00:00
safe-indirect-jump-4.c backport: rs6000.c (rs6000_opt_vars): Add entry for -mspeculate-indirect-jumps. 2018-01-18 01:34:10 +00:00
safe-indirect-jump-5.c backport: rs6000.c (rs6000_opt_vars): Add entry for -mspeculate-indirect-jumps. 2018-01-18 01:34:10 +00:00
safe-indirect-jump-6.c backport: rs6000.c (rs6000_opt_vars): Add entry for -mspeculate-indirect-jumps. 2018-01-18 01:34:10 +00:00
safe-indirect-jump-7.c backport: rs6000.c (rs6000_opt_vars): Add entry for -mspeculate-indirect-jumps. 2018-01-18 01:34:10 +00:00
safe-indirect-jump-8.c backport: rs6000.c (rs6000_opt_vars): Add entry for -mspeculate-indirect-jumps. 2018-01-18 01:34:10 +00:00
savres.c [RS6000] Fragile testcase breaks with -frename-registers 2016-05-09 22:05:25 +09:30
sd-pwr6.c
…
sd-vsx.c
…
shift-dot.c
…
shift-int.c
…
shrink-wrap-separate-0.c shrink-wrap: Testcases for separate shrink-wrapping 2016-10-12 17:37:20 +02:00
shrink-wrap-separate-1.c shrink-wrap: Testcases for separate shrink-wrapping 2016-10-12 17:37:20 +02:00
shrink-wrap-separate-2.c shrink-wrap: Testcases for separate shrink-wrapping 2016-10-12 17:37:20 +02:00
signbit-1.c rs6000-protos.h (rs6000_split_signbit): New prototype. 2016-07-05 17:50:22 +00:00
signbit-2.c rs6000-protos.h (rs6000_split_signbit): New prototype. 2016-07-05 17:50:22 +00:00
signbit-3.c rs6000-protos.h (rs6000_split_signbit): New prototype. 2016-07-05 17:50:22 +00:00
spe-evmerge.c
…
spe-small-data-1.c
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spe-small-data-2.c
…
spe-unwind-1.c
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spe-vector-memcpy.c
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spe-vector-memset.c
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spe1.c
…
ssp-1.c Check in gcc/testsuite/gcc.target/powerpc/ssp-[12].c (I forgot "svn add" 2017-01-18 02:05:50 +01:00
ssp-2.c Check in gcc/testsuite/gcc.target/powerpc/ssp-[12].c (I forgot "svn add" 2017-01-18 02:05:50 +01:00
stabs-attrib-vect-darwin.c
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stack-limit.c backports 2017-06-27 18:43:35 +02:00
swaps-p8-1.c
…
swaps-p8-2.c
…
swaps-p8-3.c
…
swaps-p8-4.c
…
swaps-p8-5.c
…
swaps-p8-6.c
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swaps-p8-7.c
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swaps-p8-8.c
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swaps-p8-9.c
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swaps-p8-10.c
…
swaps-p8-11.c
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swaps-p8-12.c
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swaps-p8-13.c
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swaps-p8-14.c
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swaps-p8-15.c
…
swaps-p8-16.c
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swaps-p8-17.c
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swaps-p8-18.c
…
swaps-p8-19.c rs6000.c (swap_web_entry): Enlarge special_handling bitfield. 2015-08-31 01:02:47 +00:00
swaps-p8-20.c rs6000.c (swap_web_entry): Update preceding commentary to simplify permute mask adjustment equation. 2015-09-10 20:22:37 +00:00
swaps-p8-21.c rs6000.c (swap_web_entry): Update preceding commentary to simplify permute mask adjustment equation. 2015-09-10 20:22:37 +00:00
swaps-p8-22.c rs6000.c (const_load_sequence_p): Handle extra indirection for large and small code models. 2015-12-01 16:10:45 +00:00
swaps-p8-23.c rs6000.c (v2df_reduction_p): New function. 2016-01-12 04:49:55 +00:00
swaps-p8-24.c rs6000.c (v2df_reduction_p): New function. 2016-01-12 04:49:55 +00:00
swaps-p8-25.c re PR target/77613 (Powerpc64le: redundant swaps in autovectorised loop) 2016-09-16 21:28:52 +00:00
swaps-p8-26.c re PR target/79044 (ICE in insn_is_swappable_p, at config/rs6000/rs6000.c:41191) 2017-01-12 16:01:13 +00:00
swaps-p8-27.c rs6000.c (rtx_is_swappable_p): Change UNSPEC_VSX__XXSPLTD to require special splat handling. 2017-01-16 15:05:35 +00:00
swaps-stack-protector.c re PR target/78695 (ICE (segfault) on powerpc64le-linux-gnu) 2016-12-11 23:37:17 +00:00
tfmode_off.c
…
ti_math1.c
…
ti_math2.c
…
timode_off.c
…
upper-regs-df.c
…
upper-regs-sf.c
…
vadsdu-0.c vadsdu-0.c: Replace dg-require-effective-target directive to allow test to run on more... 2016-06-21 14:09:12 +00:00
vadsdu-1.c vadsdu-0.c: Replace dg-require-effective-target directive to allow test to run on more... 2016-06-21 14:09:12 +00:00
vadsdu-2.c vadsdu-0.c: Replace dg-require-effective-target directive to allow test to run on more... 2016-06-21 14:09:12 +00:00
vadsdu-3.c vadsdu-0.c: Replace dg-require-effective-target directive to allow test to run on more... 2016-06-21 14:09:12 +00:00
vadsdu-4.c vadsdu-0.c: Replace dg-require-effective-target directive to allow test to run on more... 2016-06-21 14:09:12 +00:00
vadsdu-5.c vadsdu-0.c: Replace dg-require-effective-target directive to allow test to run on more... 2016-06-21 14:09:12 +00:00
vadsdub-1.c vadsdu-0.c: Replace dg-require-effective-target directive to allow test to run on more... 2016-06-21 14:09:12 +00:00
vadsdub-2.c vadsdu-0.c: Replace dg-require-effective-target directive to allow test to run on more... 2016-06-21 14:09:12 +00:00
vadsduh-1.c vadsdu-0.c: Replace dg-require-effective-target directive to allow test to run on more... 2016-06-21 14:09:12 +00:00
vadsduh-2.c vadsdu-0.c: Replace dg-require-effective-target directive to allow test to run on more... 2016-06-21 14:09:12 +00:00
vadsduw-1.c vadsdu-0.c: Replace dg-require-effective-target directive to allow test to run on more... 2016-06-21 14:09:12 +00:00
vadsduw-2.c vadsdu-0.c: Replace dg-require-effective-target directive to allow test to run on more... 2016-06-21 14:09:12 +00:00
vec-adde-int128.c rs6000: Fix the vec-adde* testcases once more 2017-02-14 21:27:54 +01:00
vec-adde.c rs6000: Fix the vec-adde* testcases once more 2017-02-14 21:27:54 +01:00
vec-addec-int128.c rs6000: Fix the vec-adde* testcases once more 2017-02-14 21:27:54 +01:00
vec-addec.c rs6000: Fix the vec-adde* testcases once more 2017-02-14 21:27:54 +01:00
vec-cg.c altivec.md (*altivec_lvxl_<mode>_internal): Output correct instruction. 2016-02-17 16:23:55 +00:00
vec-cmp-sel.c vec-cmp-sel.c: Avoid test failure on machines without VSX an Power8 vector support. 2015-08-04 14:09:23 +00:00
vec-cmp.c
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vec-cmpne-long.c This patch adds support for the vec_cmpne altivec builtins from the Power... 2016-05-25 21:55:22 +00:00
vec-cmpne.c This patch adds support for the vec_cmpne altivec builtins from the Power... 2016-05-25 21:55:22 +00:00
vec-constvolatile.c [PATCH, rs6000] pr80482 Relax vector builtin parameter checks 2017-04-25 16:16:13 +00:00
vec-extract-1.c rs6000-protos.h (rs6000_split_vec_extract_var): New declaration. 2016-07-28 21:02:06 +00:00
vec-extract-2.c rs6000-protos.h (rs6000_adjust_vec_address): New function that takes a vector memory address... 2016-07-30 22:31:16 +00:00
vec-extract-3.c rs6000-protos.h (rs6000_adjust_vec_address): New function that takes a vector memory address... 2016-07-30 22:31:16 +00:00
vec-extract-4.c rs6000-protos.h (rs6000_adjust_vec_address): New function that takes a vector memory address... 2016-07-30 22:31:16 +00:00
vec-extract-5.c rs6000-c.c (altivec_resolve_overloaded_builtin): Add support for vec_extract on vector float... 2016-08-01 23:27:38 +00:00
vec-extract-6.c rs6000-c.c (altivec_resolve_overloaded_builtin): Add support for vec_extract on vector float... 2016-08-01 23:27:38 +00:00
vec-extract-7.c rs6000-c.c (altivec_resolve_overloaded_builtin): Add support for vec_extract on vector float... 2016-08-01 23:27:38 +00:00
vec-extract-8.c rs6000-c.c (altivec_resolve_overloaded_builtin): Add support for vec_extract on vector float... 2016-08-01 23:27:38 +00:00
vec-extract-9.c rs6000-c.c (altivec_resolve_overloaded_builtin): Add support for vec_extract on vector float... 2016-08-01 23:27:38 +00:00
vec-extract-v2df.c rs6000.c (rs6000_split_vec_extract_var): On ISA 3.0/power9, add support to use the VEXTU{B,H,W}{L,R}X extract instructions. 2016-12-14 16:08:07 +00:00
vec-extract-v2di.c vec-extract.h: New files to check the vec_extract built-in functions for all vector types... 2016-07-22 00:12:28 +00:00
vec-extract-v4sf.c rs6000.c (rs6000_split_vec_extract_var): On ISA 3.0/power9, add support to use the VEXTU{B,H,W}{L,R}X extract instructions. 2016-12-14 16:08:07 +00:00
vec-extract-v4si-df.c rs6000.c (rs6000_split_vec_extract_var): On ISA 3.0/power9, add support to use the VEXTU{B,H,W}{L,R}X extract instructions. 2016-12-14 16:08:07 +00:00
vec-extract-v4si.c vec-extract.h: New files to check the vec_extract built-in functions for all vector types... 2016-07-22 00:12:28 +00:00
vec-extract-v4siu-df.c rs6000.c (rs6000_split_vec_extract_var): On ISA 3.0/power9, add support to use the VEXTU{B,H,W}{L,R}X extract instructions. 2016-12-14 16:08:07 +00:00
vec-extract-v4siu.c vec-extract.h: New files to check the vec_extract built-in functions for all vector types... 2016-07-22 00:12:28 +00:00
vec-extract-v8hi-df.c rs6000.c (rs6000_split_vec_extract_var): On ISA 3.0/power9, add support to use the VEXTU{B,H,W}{L,R}X extract instructions. 2016-12-14 16:08:07 +00:00
vec-extract-v8hi.c vec-extract.h: New files to check the vec_extract built-in functions for all vector types... 2016-07-22 00:12:28 +00:00
vec-extract-v8hiu-df.c rs6000.c (rs6000_split_vec_extract_var): On ISA 3.0/power9, add support to use the VEXTU{B,H,W}{L,R}X extract instructions. 2016-12-14 16:08:07 +00:00
vec-extract-v8hiu.c vec-extract.h: New files to check the vec_extract built-in functions for all vector types... 2016-07-22 00:12:28 +00:00
vec-extract-v16qi-df.c rs6000.c (rs6000_split_vec_extract_var): On ISA 3.0/power9, add support to use the VEXTU{B,H,W}{L,R}X extract instructions. 2016-12-14 16:08:07 +00:00
vec-extract-v16qi.c vec-extract.h: New files to check the vec_extract built-in functions for all vector types... 2016-07-22 00:12:28 +00:00
vec-extract-v16qiu-df.c rs6000.c (rs6000_split_vec_extract_var): On ISA 3.0/power9, add support to use the VEXTU{B,H,W}{L,R}X extract instructions. 2016-12-14 16:08:07 +00:00
vec-extract-v16qiu.c vec-extract.h: New files to check the vec_extract built-in functions for all vector types... 2016-07-22 00:12:28 +00:00
vec-extract.h rs6000.c (rs6000_split_vec_extract_var): On ISA 3.0/power9, add support to use the VEXTU{B,H,W}{L,R}X extract instructions. 2016-12-14 16:08:07 +00:00
vec-init-1.c rs6000.c (rs6000_expand_vector_init): Set initialization of all 0's to the 0 constant, instead of directly generating XOR. 2016-08-23 20:41:32 +00:00
vec-init-2.c rs6000.c (rs6000_expand_vector_init): Set initialization of all 0's to the 0 constant, instead of directly generating XOR. 2016-08-23 20:41:32 +00:00
vec-init-3.c vsx.md (vsx_concat_<mode>): Add support for the ISA 3.0 MTVSRDD instruction. 2016-08-12 19:40:37 +00:00
vec-init-4.c vec-init-4.c: New runtime tests for various vector short/char initializations. 2016-08-29 19:38:07 +00:00
vec-init-5.c vec-init-4.c: New runtime tests for various vector short/char initializations. 2016-08-29 19:38:07 +00:00
vec-init-6.c vec-init-4.c: New runtime tests for various vector short/char initializations. 2016-08-29 19:38:07 +00:00
vec-init-7.c vec-init-4.c: New runtime tests for various vector short/char initializations. 2016-08-29 19:38:07 +00:00
vec-init-8.c vec-init-4.c: New runtime tests for various vector short/char initializations. 2016-08-29 19:38:07 +00:00
vec-init-9.c vec-init-4.c: New runtime tests for various vector short/char initializations. 2016-08-29 19:38:07 +00:00
vec-mul.c This patch adds support for the missing versions of the vec_mul altivec... 2016-06-07 20:18:09 +00:00
vec-mult-char-1.c altivec.md (altivec_vperm_v8hiv16qi): New define_insn. 2015-09-03 18:08:42 +00:00
vec-mult-char-2.c altivec.md (altivec_vperm_v8hiv16qi): New define_insn. 2015-09-03 18:08:42 +00:00
vec-rlmi-rlnm.c altivec.h (vec_rlmi): New #define. 2017-01-17 19:14:09 +00:00
vec-set-char.c rs6000.c (rs6000_expand_vector_set): Add support for using xxinsertw and vinsert{b,h} on ISA 3.0. 2016-11-14 19:55:42 +00:00
vec-set-int.c rs6000.c (rs6000_expand_vector_set): Add support for using xxinsertw and vinsert{b,h} on ISA 3.0. 2016-11-14 19:55:42 +00:00
vec-set-short.c rs6000.c (rs6000_expand_vector_set): Add support for using xxinsertw and vinsert{b,h} on ISA 3.0. 2016-11-14 19:55:42 +00:00
vec-setup-be-double.c backport: re PR target/81593 (Optimize PowerPC vector set from vector extract) 2017-08-30 01:12:21 +00:00
vec-setup-be-long.c backport: re PR target/81593 (Optimize PowerPC vector set from vector extract) 2017-08-30 01:12:21 +00:00
vec-setup-double.c backport: re PR target/81593 (Optimize PowerPC vector set from vector extract) 2017-08-30 01:12:21 +00:00
vec-setup-long.c backport: re PR target/81593 (Optimize PowerPC vector set from vector extract) 2017-08-30 01:12:21 +00:00
vec-setup.h backport: re PR target/81593 (Optimize PowerPC vector set from vector extract) 2017-08-30 01:12:21 +00:00
vec-shift.c optabs.c (expand_binop): Don't create a broadcast vector with a source element wider than the inner mode. 2015-09-03 13:52:17 +00:00
vec-shr.c vector.md (vec_shr_<mode>): Fix to do a shift instead of a rotate. 2015-08-27 18:20:45 +00:00
vec-xxpermdi.c re PR target/79261 (vec_xxpermdi appears to have endian issues) 2017-02-17 19:11:06 +00:00
versioned-copy-loop.c backport: rs6000.c (rs6000_vect_nonmem): New static var. 2017-05-13 21:35:44 +00:00
vslv-0.c rs6000.h: Add conditional preprocessing directives to disable Power9-specific compiler... 2016-06-21 21:39:49 +00:00
vslv-1.c rs6000.h: Add conditional preprocessing directives to disable Power9-specific compiler... 2016-06-21 21:39:49 +00:00
vsrv-0.c rs6000.h: Add conditional preprocessing directives to disable Power9-specific compiler... 2016-06-21 21:39:49 +00:00
vsrv-1.c rs6000.h: Add conditional preprocessing directives to disable Power9-specific compiler... 2016-06-21 21:39:49 +00:00
vsx-builtin-1.c
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vsx-builtin-2.c rs6000: Fix tests for xvmadd and xvnmsub 2015-10-28 05:33:03 +01:00
vsx-builtin-3.c rs6000.c: Add case statement entry to make the xvcvuxdsp built-in argument unsigned. 2017-02-14 23:11:19 +00:00
vsx-builtin-4.c
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vsx-builtin-5.c
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vsx-builtin-6.c
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vsx-builtin-7.c
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vsx-builtin-8.c
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vsx-extract-1.c
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vsx-extract-2.c
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vsx-extract-3.c
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vsx-extract-4.c vsx.md (VSX_EXTRACT_FL): New iterator for all binary floating point types supported by the hardware... 2016-11-01 00:41:30 +00:00
vsx-extract-5.c vsx.md (VSX_EXTRACT_FL): New iterator for all binary floating point types supported by the hardware... 2016-11-01 00:41:30 +00:00
vsx-extract-6.c backport: re PR target/81593 (Optimize PowerPC vector set from vector extract) 2017-08-30 01:14:05 +00:00
vsx-extract-7.c backport: re PR target/81593 (Optimize PowerPC vector set from vector extract) 2017-08-30 01:14:05 +00:00
vsx-float0.c
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vsx-himode.c rs6000.c (rs6000_hard_regno_mode_ok): If ISA 3.0... 2016-11-10 19:38:33 +00:00
vsx-himode2.c rs6000.c (rs6000_hard_regno_mode_ok): If ISA 3.0... 2016-11-10 19:38:33 +00:00
vsx-himode3.c rs6000.c (rs6000_hard_regno_mode_ok): If ISA 3.0... 2016-11-10 19:38:33 +00:00
vsx-mass-1.c
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vsx-qimode.c rs6000.c (rs6000_hard_regno_mode_ok): If ISA 3.0... 2016-11-10 19:38:33 +00:00
vsx-qimode2.c rs6000.c (rs6000_hard_regno_mode_ok): If ISA 3.0... 2016-11-10 19:38:33 +00:00
vsx-qimode3.c rs6000.c (rs6000_hard_regno_mode_ok): If ISA 3.0... 2016-11-10 19:38:33 +00:00
vsx-sfminmax.c
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vsx-simode.c constraints.md (wH constraint): Add new constraints for allowing 32-bit integers (and eventually 8/16-bit... 2016-10-27 20:52:07 +00:00
vsx-simode2.c constraints.md (wH constraint): Add new constraints for allowing 32-bit integers (and eventually 8/16-bit... 2016-10-27 20:52:07 +00:00
vsx-simode3.c constraints.md (wH constraint): Add new constraints for allowing 32-bit integers (and eventually 8/16-bit... 2016-10-27 20:52:07 +00:00
vsx-vector-1.c
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vsx-vector-2.c re PR target/69469 (test case gcc.target/powerpc/vsx-vector-2.c fails on power starting with r232632) 2016-01-25 11:16:21 -05:00
vsx-vector-3.c
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vsx-vector-4.c
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vsx-vector-5.c
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vsx-vector-6.c
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vsx-vector-7.c altivec.h (vec_adde): New define. 2015-08-18 22:02:46 +00:00
vsx-vectorize-1.c
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vsx-vectorize-2.c
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vsx-vectorize-3.c
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vsx-vectorize-4.c
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vsx-vectorize-5.c
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vsx-vectorize-6.c
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vsx-vectorize-7.c
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vsx-vectorize-8.c
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vsxcopy.c
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warn-1.c rs6000: Use "dg-warning ... 0" in a few places 2016-10-12 16:56:44 +02:00
warn-2.c rs6000: Use "dg-warning ... 0" in a few places 2016-10-12 16:56:44 +02:00
warn-lvsl-lvsr.c
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