libctf: ELF file opening via BFD
These functions let you open an ELF file with a customarily-named CTF
section in it, automatically opening the CTF file or archive and
associating the symbol and string tables in the ELF file with the CTF
container, so that you can look up the types of symbols in the ELF file
via ctf_lookup_by_symbol(), and so that strings can be shared between
the ELF file and CTF container, to save space.
It uses BFD machinery to do so. This has now been lightly tested and
seems to work. In particular, if you already have a bfd you can pass
it in to ctf_bfdopen(), and if you want a bfd made for you you can
call ctf_open() or ctf_fdopen(), optionally specifying a target (or
try once without a target and then again with one if you get
ECTF_BFD_AMBIGUOUS back).
We use a forward declaration for the struct bfd in ctf-api.h, so that
ctf-api.h users are not required to pull in <bfd.h>. (This is mostly
for the sake of readelf.)
libctf/
* ctf-open-bfd.c: New file.
* ctf-open.c (ctf_close): New.
* ctf-impl.h: Include bfd.h.
(ctf_file): New members ctf_data_mmapped, ctf_data_mmapped_len.
(ctf_archive_internal): New members ctfi_abfd, ctfi_data,
ctfi_bfd_close.
(ctf_bfdopen_ctfsect): New declaration.
(_CTF_SECTION): likewise.
include/
* ctf-api.h (struct bfd): New forward.
(ctf_fdopen): New.
(ctf_bfdopen): Likewise.
(ctf_open): Likewise.
(ctf_arc_open): Likewise.
2019-04-24 11:46:39 +02:00
|
|
|
|
2019-05-28 Nick Alcock <nick.alcock@oracle.com>
|
|
|
|
|
|
|
|
|
|
|
|
* ctf-api.h (struct bfd): New forward.
|
|
|
|
|
|
(ctf_fdopen): New.
|
|
|
|
|
|
(ctf_bfdopen): Likewise.
|
|
|
|
|
|
(ctf_open): Likewise.
|
|
|
|
|
|
(ctf_arc_open): Likewise.
|
|
|
|
|
|
|
libctf: mmappable archives
If you need to store a large number of CTF containers somewhere, this
provides a dedicated facility for doing so: an mmappable archive format
like a very simple tar or ar without all the system-dependent format
horrors or need for heavy file copying, with built-in compression of
files above a particular size threshold.
libctf automatically mmap()s uncompressed elements of these archives, or
uncompresses them, as needed. (If the platform does not support mmap(),
copying into dynamically-allocated buffers is used.)
Archive iteration operations are partitioned into raw and non-raw
forms. Raw operations pass thhe raw archive contents to the callback:
non-raw forms open each member with ctf_bufopen() and pass the resulting
ctf_file_t to the iterator instead. This lets you manipulate the raw
data in the archive, or the contents interpreted as a CTF file, as
needed.
It is not yet known whether we will store CTF archives in a linked ELF
object in one of these (akin to debugdata) or whether they'll get one
section per TU plus one parent container for types shared between them.
(In the case of ELF objects with very large numbers of TUs, an archive
of all of them would seem preferable, so we might just use an archive,
and add lzma support so you can assume that .gnu_debugdata and .ctf are
compressed using the same algorithm if both are present.)
To make usage easier, the ctf_archive_t is not the on-disk
representation but an abstraction over both ctf_file_t's and archives of
many ctf_file_t's: users see both CTF archives and raw CTF files as
ctf_archive_t's upon opening, the only difference being that a raw CTF
file has only a single "archive member", named ".ctf" (the default if a
null pointer is passed in as the name). The next commit will make use
of this facility, in addition to providing the public interface to
actually open archives. (In the future, it should be possible to have
all CTF sections in an ELF file appear as an "archive" in the same
fashion.)
This machinery is also used to allow library-internal creators of
ctf_archive_t's (such as the next commit) to stash away an ELF string
and symbol table, so that all opens of members in a given archive will
use them. This lets CTF archives exploit the ELF string and symbol
table just like raw CTF files can.
(All this leads to somewhat confusing type naming. The ctf_archive_t is
a typedef for the opaque internal type, struct ctf_archive_internal: the
non-internal "struct ctf_archive" is the on-disk structure meant for
other libraries manipulating CTF files. It is probably clearest to use
the struct name for struct ctf_archive_internal inside the program, and
the typedef names outside.)
libctf/
* ctf-archive.c: New.
* ctf-impl.h (ctf_archive_internal): New type.
(ctf_arc_open_internal): New declaration.
(ctf_arc_bufopen): Likewise.
(ctf_arc_close_internal): Likewise.
include/
* ctf.h (CTFA_MAGIC): New.
(struct ctf_archive): New.
(struct ctf_archive_modent): Likewise.
* ctf-api.h (ctf_archive_member_f): New.
(ctf_archive_raw_member_f): Likewise.
(ctf_arc_write): Likewise.
(ctf_arc_close): Likewise.
(ctf_arc_open_by_name): Likewise.
(ctf_archive_iter): Likewise.
(ctf_archive_raw_iter): Likewise.
(ctf_get_arc): Likewise.
2019-04-24 12:30:17 +02:00
|
|
|
|
2019-05-28 Nick Alcock <nick.alcock@oracle.com>
|
|
|
|
|
|
|
|
|
|
|
|
* ctf.h (CTFA_MAGIC): New.
|
|
|
|
|
|
(struct ctf_archive): New.
|
|
|
|
|
|
(struct ctf_archive_modent): Likewise.
|
|
|
|
|
|
* ctf-api.h (ctf_archive_member_f): New.
|
|
|
|
|
|
(ctf_archive_raw_member_f): Likewise.
|
|
|
|
|
|
(ctf_arc_write): Likewise.
|
|
|
|
|
|
(ctf_arc_close): Likewise.
|
|
|
|
|
|
(ctf_arc_open_by_name): Likewise.
|
|
|
|
|
|
(ctf_archive_iter): Likewise.
|
|
|
|
|
|
(ctf_archive_raw_iter): Likewise.
|
|
|
|
|
|
(ctf_get_arc): Likewise.
|
|
|
|
|
|
|
libctf: opening
This fills in the other half of the opening/creation puzzle: opening of
already-existing CTF files. Such files are always read-only: if you
want to add to a CTF file opened with one of the opening functions in
this file, use ctf_add_type(), in a later commit, to copy appropriate
types into a newly ctf_create()d, writable container.
The lowest-level opening functions are in here: ctf_bufopen(), which
takes ctf_sect_t structures akin to ELF section headers, and
ctf_simple_open(), which can be used if you don't have an entire ELF
section header to work from. Both will malloc() new space for the
buffers only if necessary, will mmap() directly from the file if
requested, and will mprotect() it afterwards to prevent accidental
corruption of the types. These functions are also used by ctf_update()
when converting types in a writable container into read-only types that
can be looked up using the lookup functions (in later commits).
The files are always of the native endianness of the system that created
them: at read time, the endianness of the header magic number is used to
determine whether or not the file needs byte-swapping, and the entire
thing is aggressively byte-swapped.
The agggressive nature of this swapping avoids complicating the rest of
the code with endianness conversions, while the native endianness
introduces no byte-swapping overhead in the common case. (The
endianness-independence code is also much newer than everything else in
this file, and deserves closer scrutiny.)
The accessors at the top of the file are there to transparently support
older versions of the CTF file format, allowing translation from older
formats that have different sizes for the structures in ctf.h:
currently, these older formats are intermingled with the newer ones in
ctf.h: they will probably migrate to a compatibility header in time, to
ease readability. The ctf_set_base() function is split out for the same
reason: when conversion code to a newer format is written, it would need
to malloc() new storage for the entire ctf_file_t if a file format
change causes it to grow, and for that we need ctf_set_base() to be a
separate function.
One pair of linked data structures supported by this file has no
creation code in libctf yet: the data and function object sections read
by init_symtab(). These will probably arrive soon, when the linker comes
to need them. (init_symtab() has hardly been changed since 2009, but if
any code in libctf has rotted over time, this will.)
A few simple accessors are also present that can even be called on
read-only containers because they don't actually modify them, since the
relevant things are not stored in the container but merely change its
operation: ctf_setmodel(), which lets you specify whether a container is
LP64 or not (used to statically determine the sizes of a few types),
ctf_import(), which is the only way to associate a parent container with
a child container, and ctf_setspecific(), which lets the caller
associate an arbitrary pointer with the CTF container for any use. If
the user doesn't call these functions correctly, libctf will misbehave:
this is particularly important for ctf_import(), since a container built
against a given parent container will not be able to resolve types that
depend on types in the parent unless it is ctf_import()ed with a parent
container with the same set of types at the same IDs, or a superset.
Possible future extensions (also noted in the ctf-hash.c file) include
storing a count of things so that we don't need to do one pass over the
CTF file counting everything, and computing a perfect hash at CTF
creation time in some compact form, storing it in the CTF file, and
using it to hash things so we don't need to do a second pass over the
entire CTF file to set up the hashes used to go from names to type IDs.
(There are multiple such hashes, one for each C type namespace: types,
enums, structs, and unions.)
libctf/
* ctf-open.c: New file.
* swap.h: Likewise.
include/
* ctf-api.h (ctf_file_close): New declaration.
(ctf_getdatasect): Likewise.
(ctf_parent_file): Likewise.
(ctf_parent_name): Likewise.
(ctf_parent_name_set): Likewise.
(ctf_import): Likewise.
(ctf_setmodel): Likewise.
(ctf_getmodel): Likewise.
(ctf_setspecific): Likewise.
(ctf_getspecific): Likewise.
2019-04-24 11:17:13 +02:00
|
|
|
|
2019-05-28 Nick Alcock <nick.alcock@oracle.com>
|
|
|
|
|
|
|
|
|
|
|
|
* ctf-api.h (ctf_file_close): New declaration.
|
|
|
|
|
|
(ctf_getdatasect): Likewise.
|
|
|
|
|
|
(ctf_parent_file): Likewise.
|
|
|
|
|
|
(ctf_parent_name): Likewise.
|
|
|
|
|
|
(ctf_parent_name_set): Likewise.
|
|
|
|
|
|
(ctf_import): Likewise.
|
|
|
|
|
|
(ctf_setmodel): Likewise.
|
|
|
|
|
|
(ctf_getmodel): Likewise.
|
|
|
|
|
|
(ctf_setspecific): Likewise.
|
|
|
|
|
|
(ctf_getspecific): Likewise.
|
|
|
|
|
|
|
libctf: creation functions
The CTF creation process looks roughly like (error handling elided):
int err;
ctf_file_t *foo = ctf_create (&err);
ctf_id_t type = ctf_add_THING (foo, ...);
ctf_update (foo);
ctf_*write (...);
Some ctf_add_THING functions accept other type IDs as arguments,
depending on the type: cv-quals, pointers, and structure and union
members all take other types as arguments. So do 'slices', which
let you take an existing integral type and recast it as a type
with a different bitness or offset within a byte, for bitfields.
One class of THING is not a type: "variables", which are mappings
of names (in the internal string table) to types. These are mostly
useful when encoding variables that do not appear in a symbol table
but which some external user has some other way to figure out the
address of at runtime (dynamic symbol lookup or querying a VM
interpreter or something).
You can snapshot the creation process at any point: rolling back to a
snapshot deletes all types and variables added since that point.
You can make arbitrary type queries on the CTF container during the
creation process, but you must call ctf_update() first, which
translates the growing dynamic container into a static one (this uses
the CTF opening machinery, added in a later commit), which is quite
expensive. This function must also be called after adding types
and before writing the container out.
Because addition of types involves looking up existing types, we add a
little of the type lookup machinery here, as well: only enough to
look up types in dynamic containers under construction.
libctf/
* ctf-create.c: New file.
* ctf-lookup.c: New file.
include/
* ctf-api.h (zlib.h): New include.
(ctf_sect_t): New.
(ctf_sect_names_t): Likewise.
(ctf_encoding_t): Likewise.
(ctf_membinfo_t): Likewise.
(ctf_arinfo_t): Likewise.
(ctf_funcinfo_t): Likewise.
(ctf_lblinfo_t): Likewise.
(ctf_snapshot_id_t): Likewise.
(CTF_FUNC_VARARG): Likewise.
(ctf_simple_open): Likewise.
(ctf_bufopen): Likewise.
(ctf_create): Likewise.
(ctf_add_array): Likewise.
(ctf_add_const): Likewise.
(ctf_add_enum_encoded): Likewise.
(ctf_add_enum): Likewise.
(ctf_add_float): Likewise.
(ctf_add_forward): Likewise.
(ctf_add_function): Likewise.
(ctf_add_integer): Likewise.
(ctf_add_slice): Likewise.
(ctf_add_pointer): Likewise.
(ctf_add_type): Likewise.
(ctf_add_typedef): Likewise.
(ctf_add_restrict): Likewise.
(ctf_add_struct): Likewise.
(ctf_add_union): Likewise.
(ctf_add_struct_sized): Likewise.
(ctf_add_union_sized): Likewise.
(ctf_add_volatile): Likewise.
(ctf_add_enumerator): Likewise.
(ctf_add_member): Likewise.
(ctf_add_member_offset): Likewise.
(ctf_add_member_encoded): Likewise.
(ctf_add_variable): Likewise.
(ctf_set_array): Likewise.
(ctf_update): Likewise.
(ctf_snapshot): Likewise.
(ctf_rollback): Likewise.
(ctf_discard): Likewise.
(ctf_write): Likewise.
(ctf_gzwrite): Likewise.
(ctf_compress_write): Likewise.
2019-04-23 23:45:46 +02:00
|
|
|
|
2019-05-28 Nick Alcock <nick.alcock@oracle.com>
|
|
|
|
|
|
|
|
|
|
|
|
* ctf-api.h (zlib.h): New include.
|
|
|
|
|
|
(ctf_sect_t): New.
|
|
|
|
|
|
(ctf_sect_names_t): Likewise.
|
|
|
|
|
|
(ctf_encoding_t): Likewise.
|
|
|
|
|
|
(ctf_membinfo_t): Likewise.
|
|
|
|
|
|
(ctf_arinfo_t): Likewise.
|
|
|
|
|
|
(ctf_funcinfo_t): Likewise.
|
|
|
|
|
|
(ctf_lblinfo_t): Likewise.
|
|
|
|
|
|
(ctf_snapshot_id_t): Likewise.
|
|
|
|
|
|
(CTF_FUNC_VARARG): Likewise.
|
|
|
|
|
|
(ctf_simple_open): Likewise.
|
|
|
|
|
|
(ctf_bufopen): Likewise.
|
|
|
|
|
|
(ctf_create): Likewise.
|
|
|
|
|
|
(ctf_add_array): Likewise.
|
|
|
|
|
|
(ctf_add_const): Likewise.
|
|
|
|
|
|
(ctf_add_enum_encoded): Likewise.
|
|
|
|
|
|
(ctf_add_enum): Likewise.
|
|
|
|
|
|
(ctf_add_float): Likewise.
|
|
|
|
|
|
(ctf_add_forward): Likewise.
|
|
|
|
|
|
(ctf_add_function): Likewise.
|
|
|
|
|
|
(ctf_add_integer): Likewise.
|
|
|
|
|
|
(ctf_add_slice): Likewise.
|
|
|
|
|
|
(ctf_add_pointer): Likewise.
|
|
|
|
|
|
(ctf_add_type): Likewise.
|
|
|
|
|
|
(ctf_add_typedef): Likewise.
|
|
|
|
|
|
(ctf_add_restrict): Likewise.
|
|
|
|
|
|
(ctf_add_struct): Likewise.
|
|
|
|
|
|
(ctf_add_union): Likewise.
|
|
|
|
|
|
(ctf_add_struct_sized): Likewise.
|
|
|
|
|
|
(ctf_add_union_sized): Likewise.
|
|
|
|
|
|
(ctf_add_volatile): Likewise.
|
|
|
|
|
|
(ctf_add_enumerator): Likewise.
|
|
|
|
|
|
(ctf_add_member): Likewise.
|
|
|
|
|
|
(ctf_add_member_offset): Likewise.
|
|
|
|
|
|
(ctf_add_member_encoded): Likewise.
|
|
|
|
|
|
(ctf_add_variable): Likewise.
|
|
|
|
|
|
(ctf_set_array): Likewise.
|
|
|
|
|
|
(ctf_update): Likewise.
|
|
|
|
|
|
(ctf_snapshot): Likewise.
|
|
|
|
|
|
(ctf_rollback): Likewise.
|
|
|
|
|
|
(ctf_discard): Likewise.
|
|
|
|
|
|
(ctf_write): Likewise.
|
|
|
|
|
|
(ctf_gzwrite): Likewise.
|
|
|
|
|
|
(ctf_compress_write): Likewise.
|
|
|
|
|
|
|
2019-04-23 23:05:52 +02:00
|
|
|
|
2019-05-28 Nick Alcock <nick.alcock@oracle.com>
|
|
|
|
|
|
|
|
|
|
|
|
* ctf-api.h (ctf_errno): New declaration.
|
|
|
|
|
|
(ctf_errmsg): Likewise.
|
|
|
|
|
|
|
2019-04-23 19:55:27 +02:00
|
|
|
|
2019-05-28 Nick Alcock <nick.alcock@oracle.com>
|
|
|
|
|
|
|
|
|
|
|
|
* ctf-api.h (ctf_setdebug): New.
|
|
|
|
|
|
(ctf_getdebug): Likewise.
|
|
|
|
|
|
|
2019-04-23 19:42:34 +02:00
|
|
|
|
2019-05-28 Nick Alcock <nick.alcock@oracle.com>
|
|
|
|
|
|
|
|
|
|
|
|
* ctf-api.h: New file.
|
|
|
|
|
|
|
2019-04-23 19:02:25 +02:00
|
|
|
|
2019-05-28 Nick Alcock <nick.alcock@oracle.com>
|
|
|
|
|
|
|
|
|
|
|
|
* ctf.h: New file.
|
|
|
|
|
|
|
2019-04-25 14:46:01 +02:00
|
|
|
|
2019-05-24 Szabolcs Nagy <szabolcs.nagy@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* elf/aarch64.h (DT_AARCH64_VARIANT_PCS): Define.
|
|
|
|
|
|
(STO_AARCH64_VARIANT_PCS): Define.
|
|
|
|
|
|
|
PowerPC relocations for prefix insns
include/
* elf/ppc64.h (R_PPC64_PLTSEQ_NOTOC, R_PPC64_PLTCALL_NOTOC),
(R_PPC64_PCREL_OPT, R_PPC64_D34, R_PPC64_D34_LO, R_PPC64_D34_HI30),
(R_PPC64_D34_HA30, R_PPC64_PCREL34, R_PPC64_GOT_PCREL34),
(R_PPC64_PLT_PCREL34, R_PPC64_PLT_PCREL34_NOTOC),
(R_PPC64_ADDR16_HIGHER34, R_PPC64_ADDR16_HIGHERA34),
(R_PPC64_ADDR16_HIGHEST34, R_PPC64_ADDR16_HIGHESTA34),
(R_PPC64_REL16_HIGHER34, R_PPC64_REL16_HIGHERA34),
(R_PPC64_REL16_HIGHEST34, R_PPC64_REL16_HIGHESTA34),
(R_PPC64_D28, R_PPC64_PCREL28): Define.
bfd/
* reloc.c (BFD_RELOC_PPC64_D34, BFD_RELOC_PPC64_D34_LO),
(BFD_RELOC_PPC64_D34_HI30, BFD_RELOC_PPC64_D34_HA30),
(BFD_RELOC_PPC64_PCREL34, BFD_RELOC_PPC64_GOT_PCREL34),
(BFD_RELOC_PPC64_PLT_PCREL34),
(BFD_RELOC_PPC64_ADDR16_HIGHER34, BFD_RELOC_PPC64_ADDR16_HIGHERA34),
(BFD_RELOC_PPC64_ADDR16_HIGHEST34, BFD_RELOC_PPC64_ADDR16_HIGHESTA34),
(BFD_RELOC_PPC64_REL16_HIGHER34, BFD_RELOC_PPC64_REL16_HIGHERA34),
(BFD_RELOC_PPC64_REL16_HIGHEST34, BFD_RELOC_PPC64_REL16_HIGHESTA34),
(BFD_RELOC_PPC64_D28, BFD_RELOC_PPC64_PCREL28): New reloc enums.
* elf64-ppc.c (PNOP): Define.
(ppc64_elf_howto_raw): Add reloc howtos for new relocations.
(ppc64_elf_reloc_type_lookup): Translate new bfd reloc numbers.
(ppc64_elf_ha_reloc): Adjust addend for highera34 and highesta34
relocs.
(ppc64_elf_prefix_reloc): New function.
(struct ppc_link_hash_table): Add notoc_plt.
(is_branch_reloc): Add R_PPC64_PLTCALL_NOTOC.
(is_plt_seq_reloc): Add R_PPC64_PLT_PCREL34,
R_PPC64_PLT_PCREL34_NOTOC, and R_PPC64_PLTSEQ_NOTOC.
(ppc64_elf_check_relocs): Handle pcrel got and plt relocs. Set
has_pltcall for section on seeing R_PPC64_PLTCALL_NOTOC. Handle
possible need for dynamic relocs on non-pcrel powerxx relocs.
(dec_dynrel_count): Handle non-pcrel powerxx relocs.
(ppc64_elf_inline_plt): Handle R_PPC64_PLTCALL_NOTOC.
(toc_adjusting_stub_needed): Likewise.
(ppc64_elf_tls_optimize): Handle R_PPC64_PLTSEQ_NOTOC.
(ppc64_elf_relocate_section): Handle new powerxx relocs.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
gas/
* config/tc-ppc.c (ppc_elf_suffix): Support @pcrel, @got@pcrel,
@plt@pcrel, @higher34, @highera34, @highest34, and @highesta34.
(fixup_size): Handle new powerxx relocs.
(md_assemble): Warn for @pcrel on non-prefix insns.
Accept @l, @h and @ha on prefix insns, and infer reloc without
any @ suffix. Translate powerxx relocs to suit DQ and DS field
instructions. Include operand tests as well as opcode test to
translate BFD_RELOC_HI16_S to BFD_RELOC_PPC_16DX_HA.
(ppc_fix_adjustable): Return false for pcrel GOT and PLT relocs.
(md_apply_fix): Handle new powerxx relocs.
* config/tc-ppc.h (TC_FORCE_RELOCATION_SUB_LOCAL): Accept
BFD_RELOC_PPC64_ADDR16_HIGHER34, BFD_RELOC_PPC64_ADDR16_HIGHERA34,
BFD_RELOC_PPC64_ADDR16_HIGHEST34, BFD_RELOC_PPC64_ADDR16_HIGHESTA34,
BFD_RELOC_PPC64_D34, and BFD_RELOC_PPC64_D28.
* testsuite/gas/ppc/prefix-reloc.d,
* testsuite/gas/ppc/prefix-reloc.s: New test.
* testsuite/gas/ppc/ppc.exp: Run it.
2018-08-29 06:52:34 +02:00
|
|
|
|
2019-05-24 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* elf/ppc64.h (R_PPC64_PLTSEQ_NOTOC, R_PPC64_PLTCALL_NOTOC),
|
|
|
|
|
|
(R_PPC64_PCREL_OPT, R_PPC64_D34, R_PPC64_D34_LO, R_PPC64_D34_HI30),
|
|
|
|
|
|
(R_PPC64_D34_HA30, R_PPC64_PCREL34, R_PPC64_GOT_PCREL34),
|
|
|
|
|
|
(R_PPC64_PLT_PCREL34, R_PPC64_PLT_PCREL34_NOTOC),
|
|
|
|
|
|
(R_PPC64_ADDR16_HIGHER34, R_PPC64_ADDR16_HIGHERA34),
|
|
|
|
|
|
(R_PPC64_ADDR16_HIGHEST34, R_PPC64_ADDR16_HIGHESTA34),
|
|
|
|
|
|
(R_PPC64_REL16_HIGHER34, R_PPC64_REL16_HIGHERA34),
|
|
|
|
|
|
(R_PPC64_REL16_HIGHEST34, R_PPC64_REL16_HIGHESTA34),
|
|
|
|
|
|
(R_PPC64_D28, R_PPC64_PCREL28): Define.
|
|
|
|
|
|
|
PowerPC add initial -mfuture instruction support
This patch adds initial 64-bit insn assembler/disassembler support.
The only instruction added is "pnop" along with the automatic aligning
of prefix instruction so they do not cross 64-byte boundaries.
include/
* dis-asm.h (WIDE_OUTPUT): Define.
* opcode/ppc.h (prefix_opcodes, prefix_num_opcodes): Declare.
(PPC_OPCODE_POWERXX, PPC_GET_PREFIX, PPC_GET_SUFFIX),
(PPC_PREFIX_P, PPC_PREFIX_SEG): Define.
opcodes/
* ppc-dis.c (ppc_opts): Add "future" entry.
(PREFIX_OPCD_SEGS): Define.
(prefix_opcd_indices): New array.
(disassemble_init_powerpc): Initialize prefix_opcd_indices.
(lookup_prefix): New function.
(print_insn_powerpc): Handle 64-bit prefix instructions.
* ppc-opc.c (PREFIX_OP, PREFIX_FORM, SUFFIX_MASK, PREFIX_MASK),
(PMRR, POWERXX): Define.
(prefix_opcodes): New instruction table.
(prefix_num_opcodes): New constant.
binutils/
* objdump.c (disassemble_bytes): Set WIDE_OUTPUT in flags.
gas/
* config/tc-ppc.c (ppc_setup_opcodes): Handle prefix_opcodes.
(struct insn_label_list): New.
(insn_labels, free_insn_labels): New variables.
(ppc_record_label, ppc_clear_labels, ppc_start_line_hook): New funcs.
(ppc_frob_label, ppc_new_dot_label): Move functions earlier in file
and call ppc_record_label.
(md_assemble): Handle 64-bit prefix instructions. Align labels
that are on the same line as a prefix instruction.
* config/tc-ppc.h (tc_frob_label, ppc_frob_label): Move to
later in the file.
(md_start_line_hook): Define.
(ppc_start_line_hook): Declare.
* testsuite/gas/ppc/prefix-align.d,
* testsuite/gas/ppc/prefix-align.s: New test.
* testsuite/gas/ppc/ppc.exp: Run new test.
2018-05-15 23:48:14 +02:00
|
|
|
|
2019-05-24 Peter Bergner <bergner@linux.ibm.com>
|
|
|
|
|
|
Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* dis-asm.h (WIDE_OUTPUT): Define.
|
|
|
|
|
|
* opcode/ppc.h (prefix_opcodes, prefix_num_opcodes): Declare.
|
|
|
|
|
|
(PPC_OPCODE_POWERXX, PPC_GET_PREFIX, PPC_GET_SUFFIX),
|
|
|
|
|
|
(PPC_PREFIX_P, PPC_PREFIX_SEG): Define.
|
|
|
|
|
|
|
2019-05-23 18:30:42 +02:00
|
|
|
|
2019-05-23 Jose E. Marchesi <jose.marchesi@oracle.com>
|
|
|
|
|
|
|
|
|
|
|
|
* elf/bpf.h: New file.
|
|
|
|
|
|
|
2019-05-15 17:44:57 +02:00
|
|
|
|
2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* elf/arm.h (Tag_MVE_arch): Define new enum value.
|
|
|
|
|
|
* opcode/arm.h (FPU_MVE, FPU_MVE_FP): New MACROs for new features.
|
|
|
|
|
|
|
2019-05-09 11:29:27 +02:00
|
|
|
|
2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* opcode/aarch64.h (enum aarch64_opnd): New SVE_SHLIMM_UNPRED_22
|
|
|
|
|
|
operand.
|
|
|
|
|
|
|
2019-05-09 11:29:26 +02:00
|
|
|
|
2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_tsz_bhs
|
|
|
|
|
|
iclass.
|
|
|
|
|
|
|
2019-05-09 11:29:24 +02:00
|
|
|
|
2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* opcode/aarch64.h (enum aarch64_opnd): New SVE_Zm4_11_INDEX operand.
|
|
|
|
|
|
|
2019-05-09 11:29:23 +02:00
|
|
|
|
2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* opcode/aarch64.h (enum aarch64_insn_class): Add sve_shift_tsz_bhsd
|
|
|
|
|
|
iclass.
|
|
|
|
|
|
|
2019-05-09 11:29:22 +02:00
|
|
|
|
2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* opcode/aarch64.h (enum aarch64_opnd): New SVE_SHRIMM_UNPRED_22
|
|
|
|
|
|
operand.
|
|
|
|
|
|
(enum aarch64_insn_class): Add sve_shift_tsz_hsd iclass.
|
|
|
|
|
|
|
2019-05-09 11:29:21 +02:00
|
|
|
|
2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_013 iclass.
|
|
|
|
|
|
|
2019-05-09 11:29:20 +02:00
|
|
|
|
2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_bh iclass.
|
|
|
|
|
|
|
2019-05-09 11:29:19 +02:00
|
|
|
|
2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_sd2 iclass.
|
|
|
|
|
|
|
2019-05-09 11:29:18 +02:00
|
|
|
|
2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* opcode/aarch64.h (enum aarch64_opnd): New SVE_ADDR_ZX operand.
|
|
|
|
|
|
|
2019-05-09 11:29:17 +02:00
|
|
|
|
2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* opcode/aarch64.h (enum aarch64_opnd): New SVE_Zm3_11_INDEX operand.
|
|
|
|
|
|
|
2019-05-09 11:29:16 +02:00
|
|
|
|
2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_hsd2 iclass.
|
|
|
|
|
|
|
2019-05-09 11:29:15 +02:00
|
|
|
|
2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* opcode/aarch64.h (enum aarch64_opnd): New SVE_IMM_ROT3 operand.
|
|
|
|
|
|
|
[binutils][aarch64] SVE2 feature extension flags.
Include all feature flag macros.
The "sve2" extension that enables the core sve2 instructions.
This also enables the sve extension, since sve is a requirement of sve2.
Extra optional sve2 features are the bitperm, sm4, aes, and sha3 extensions.
These are all given extra feature flags, "bitperm", "sve2-sm4",
"sve2-aes", and "sve2-sha3" respectively.
The sm4, aes, and sha3 extensions are explicitly marked as sve2
extensions to distinguish them from the corresponding NEON extensions.
Rather than continue extending the current feature flag numbers, I used
some bits that have been skipped.
gas/ChangeLog:
2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
* config/tc-aarch64.c: Add command line architecture feature flags
"sve2", "sve2-sm4", "sve2-aes", "sve2-sha3", "bitperm".
* doc/c-aarch64.texi: Document new architecture feature flags.
include/ChangeLog:
2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
* opcode/aarch64.h (AARCH64_FEATURE_SVE2
AARCH64_FEATURE_SVE2_AES, AARCH64_FEATURE_SVE2_BITPERM,
AARCH64_FEATURE_SVE2_SM4, AARCH64_FEATURE_SVE2_SHA3): New
feature macros.
opcodes/ChangeLog:
2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
* aarch64-tbl.h
(aarch64_feature_sve2, aarch64_feature_sve2aes,
aarch64_feature_sve2sha3, aarch64_feature_sve2sm4,
aarch64_feature_sve2bitperm): New feature sets.
(SVE2, SVE2_AES, SVE2_SHA3, SVE2_SM4, SVE2_BITPERM): New macros
for feature set addresses.
(SVE2_INSN, SVE2_INSNC, SVE2AES_INSN, SVE2SHA3_INSN,
SVE2SM4_INSN, SVE2SM4_INSNC, SVE2BITPERM_INSN): New macros.
2019-05-09 11:29:12 +02:00
|
|
|
|
2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* opcode/aarch64.h (AARCH64_FEATURE_SVE2
|
|
|
|
|
|
AARCH64_FEATURE_SVE2_AES, AARCH64_FEATURE_SVE2_BITPERM,
|
|
|
|
|
|
AARCH64_FEATURE_SVE2_SM4, AARCH64_FEATURE_SVE2_SHA3): New
|
|
|
|
|
|
feature macros.
|
|
|
|
|
|
|
Add load-link, store-conditional paired EVA instructions
Add paired load-link and store-conditional instructions to the
EVA ASE for MIPS32R6[1]. These instructions are optional within
the EVA ASE. Their presence is indicated by the XNP bit in the
Config5 register.
[1] "MIPS Architecture for Programmers Volume II-A: The MIPS32
Instruction Set Manual", Imagination Technologies Ltd., Document
Number: MD00086, Revision 6.06, December 15, 2016, Section 3.2
"Alphabetical List of Instructions", pp. 230-231, pp. 357-360.
gas/
* config/tc-mips.c (mips_set_ase): Handle ASE_EVA_R6.
(macro) <M_LLWPE_AB, M_SCWPE_AB>: New cases.
(mips_after_parse_args): Translate EVA to EVA_R6.
* testsuite/gas/mips/ase-errors-1.s: Add new instructions.
* testsuite/gas/mips/eva.s: Likewise.
* testsuite/gas/mips/ase-errors-1.l: Check errors for
new instructions.
* testsuite/gas/mips/mipsr6@eva.d: Check new test cases.
include/
* opcode/mips.h (ASE_EVA_R6): New macro.
(M_LLWPE_AB, M_SCWPE_AB): New enum values.
opcodes/
* mips-dis.c (mips_calculate_combination_ases): Add ISA
argument and set ASE_EVA_R6 appropriately.
(set_default_mips_dis_options): Pass ISA to above.
(parse_mips_dis_option): Likewise.
* mips-opc.c (EVAR6): New macro.
(mips_builtin_opcodes): Add llwpe, scwpe.
Derived from patch authored by Andrew Bennett <andrew.bennett@imgtec.com>
2019-04-29 03:21:00 +02:00
|
|
|
|
2019-05-06 Andrew Bennett <andrew.bennett@imgtec.com>
|
|
|
|
|
|
Faraz Shahbazker <fshahbazker@wavecomp.com>
|
|
|
|
|
|
|
|
|
|
|
|
* opcode/mips.h (ASE_EVA_R6): New macro.
|
|
|
|
|
|
(M_LLWPE_AB, M_SCWPE_AB): New enum values.
|
|
|
|
|
|
|
2019-05-01 18:14:01 +02:00
|
|
|
|
2019-05-01 Sudakshina Das <sudi.das@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* opcode/aarch64.h (AARCH64_FEATURE_TME): New.
|
|
|
|
|
|
(enum aarch64_opnd): Add AARCH64_OPND_TME_UIMM16.
|
|
|
|
|
|
|
[MIPS] Add load-link, store-conditional paired instructions
Add several baseline MIPS32R6[1] and MIPS64R6[2] instructions
that were omitted from the initial spec. These instructions
are optional in implementations but not associated with any
ASE or pseudo-ASE. Their presence is indicated by the XNP bit
in the Config5 register.
[1] "MIPS Architecture for Programmers Volume II-A: The MIPS32
Instruction Set Manual", Imagination Technologies Ltd., Document
Number: MD00086, Revision 6.06, December 15, 2016, Section 3.2
"Alphabetical List of Instructions", pp. 228-229, pp. 354-357.
[2] "MIPS Architecture for Programmers Volume II-A: The MIPS64
Instruction Set Manual", Imagination Technologies Ltd., Document
Number: MD00087, Revision 6.06, December 15, 2016, Section 3.2
"Alphabetical List of Instructions", pp. 289-290 and pp. 458-460.
gas/
* config/tc-mips.c (macro) <M_LLWP_AB, M_LLDP_AB, M_SCWP_AB,
M_SCDP_AB>: New cases and expansions for paired instructions.
* testsuite/gas/mips/llpscp-32.s: New test source.
* testsuite/gas/mips/llpscp-64.s: Likewise.
* testsuite/gas/mips/llpscp-32.d: New test.
* testsuite/gas/mips/llpscp-64.d: Likewise.
* testsuite/gas/mips/mips.exp: Run the new tests.
* testsuite/gas/mips/r6.s: Add new instructions to test source.
* testsuite/gas/mips/r6-64.s: Likewise.
* testsuite/gas/mips/r6-64-n32.d: Check new instructions.
* testsuite/gas/mips/r6-64-n64.d: Likewise.
* testsuite/gas/mips/r6-n32.d: Likewise.
* testsuite/gas/mips/r6-n64.d: Likwwise.
* testsuite/gas/mips/r6.d: Likewise.
include/
* opcode/mips.h (M_LLWP_AB, M_LLDP_AB): New enum values.
(M_SCWP_AB, M_SCDP_AB): Likewise.
opcodes/
* mips-opc.c (mips_builtin_opcodes): Add llwp, lldp, scwp, scdp.
2019-04-23 00:12:09 +02:00
|
|
|
|
2019-04-26 Andrew Bennett <andrew.bennett@imgtec.com>
|
|
|
|
|
|
Faraz Shahbazker <fshahbazker@wavecomp.com>
|
|
|
|
|
|
|
|
|
|
|
|
* opcode/mips.h (M_LLWP_AB, M_LLDP_AB): New enum values.
|
|
|
|
|
|
(M_SCWP_AB, M_SCDP_AB): Likewise.
|
|
|
|
|
|
|
2019-04-25 02:28:49 +02:00
|
|
|
|
2019-04-25 Maciej W. Rozycki <macro@linux-mips.org>
|
|
|
|
|
|
|
|
|
|
|
|
* opcode/mips.h: Update comment for MIPS32 CODE20 operand.
|
|
|
|
|
|
|
2019-04-15 12:46:54 +02:00
|
|
|
|
2019-04-15 Sudakshina Das <sudi.das@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF12.
|
|
|
|
|
|
|
2019-04-15 12:37:51 +02:00
|
|
|
|
2019-04-15 Sudakshina Das <sudi.das@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF18.
|
|
|
|
|
|
|
2019-04-15 12:18:57 +02:00
|
|
|
|
2019-04-15 Sudakshina Das <sudi.das@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF16.
|
|
|
|
|
|
|
2019-04-15 11:54:42 +02:00
|
|
|
|
2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* elf/arm.h (TAG_CPU_ARCH_V8_1M_MAIN): new macro.
|
|
|
|
|
|
(MAX_TAG_CPU_ARCH): Set value to above macro.
|
|
|
|
|
|
* opcode/arm.h (ARM_EXT2_V8_1M_MAIN): New macro.
|
|
|
|
|
|
(ARM_AEXT_V8_1M_MAIN): Likewise.
|
|
|
|
|
|
(ARM_AEXT2_V8_1M_MAIN): Likewise.
|
|
|
|
|
|
(ARM_ARCH_V8_1M_MAIN): Likewise.
|
|
|
|
|
|
|
[BINUTILS, AArch64, 2/2] Update Store Allocation Tag instructions
This patch updates the Store allocation tags instructions in
Armv8.5-A Memory Tagging Extension. This is part of the changes
that have been introduced recently in the 00bet10 release
All of these instructions have an updated register operand (Xt -> <Xt|SP>)
- STG <Xt|SP>, [<Xn|SP>, #<simm>]
- STG <Xt|SP>, [<Xn|SP>, #<simm>]!
- STG <Xt|SP>, [<Xn|SP>], #<simm>
- STZG <Xt|SP>, [<Xn|SP>, #<simm>]
- STZG <Xt|SP>, [<Xn|SP>, #<simm>]!
- STZG <Xt|SP>, [<Xn|SP>], #<simm>
- ST2G <Xt|SP>, [<Xn|SP>, #<simm>]
- ST2G <Xt|SP>, [<Xn|SP>, #<simm>]!
- ST2G <Xt|SP>, [<Xn|SP>], #<simm>
- STZ2G <Xt|SP>, [<Xn|SP>, #<simm>]
- STZ2G <Xt|SP>, [<Xn|SP>, #<simm>]!
- STZ2G <Xt|SP>, [<Xn|SP>], #<simm>
In order to accept <Rt|SP> a new operand type Rt_SP is introduced which has
the same field as FLD_Rt but follows other semantics of Rn_SP.
*** gas/ChangeLog ***
2019-04-11 Sudakshina Das <sudi.das@arm.com>
* config/tc-aarch64.c (process_omitted_operand): Add case for
AARCH64_OPND_Rt_SP.
(parse_operands): Likewise.
* testsuite/gas/aarch64/armv8_5-a-memtag.d: Update tests.
* testsuite/gas/aarch64/armv8_5-a-memtag.s: Likewise.
* testsuite/gas/aarch64/illegal-memtag.l: Likewise.
* testsuite/gas/aarch64/illegal-memtag.s: Likewise.
*** include/ChangeLog ***
2019-04-11 Sudakshina Das <sudi.das@arm.com>
* opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_Rt_SP.
*** opcodes/ChangeLog ***
2019-04-11 Sudakshina Das <sudi.das@arm.com>
* aarch64-opc.c (aarch64_print_operand): Add case for
AARCH64_OPND_Rt_SP.
(verify_constraints): Likewise.
* aarch64-tbl.h (QL_LDST_AT): Update to add SP qualifier.
(struct aarch64_opcode): Update stg, stzg, st2g, stz2g instructions
to accept Rt|SP as first operand.
(AARCH64_OPERANDS): Add new Rt_SP.
* aarch64-asm-2.c: Regenerated.
* aarch64-dis-2.c: Regenerated.
* aarch64-opc-2.c: Regenerated.
2019-04-11 11:19:37 +02:00
|
|
|
|
2019-04-11 Sudakshina Das <sudi.das@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_Rt_SP.
|
|
|
|
|
|
|
2019-04-09 02:04:01 +02:00
|
|
|
|
2019-04-08 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* elf/common.h (GNU_PROPERTY_X86_ISA_1_AVX512_BF16): New.
|
|
|
|
|
|
|
2019-04-07 13:11:49 +02:00
|
|
|
|
2019-04-07 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
Merge from gcc.
|
|
|
|
|
|
2019-04-03 Vineet Gupta <vgupta@synopsys.com>
|
|
|
|
|
|
PR89877
|
|
|
|
|
|
* longlong.h [__arc__] (add_ssaaaa): Add cc clobber.
|
|
|
|
|
|
(sub_ddmmss): Likewise.
|
|
|
|
|
|
|
2019-04-06 16:25:10 +02:00
|
|
|
|
2019-04-06 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* bfdlink.h (bfd_link_info): Remove x86-specific linker options.
|
|
|
|
|
|
|
[GAS, Arm] CLI with architecture sensitive extensions
This patch adds a new framework to add architecture sensitive extensions, like
GCC does. This patch also implements all architecture extensions currently
available in GCC.
This framework works as follows. To enable architecture sensitive extensions
for a particular architecture, that architecture must contain an ARM_ARCH_OPT2
entry in the 'arm_archs' table. All fields here are the same as previous, with
the addition of a new extra field at the end to <name> it's extension table.
This <name>, corresponds to a <name>_ext_table of type 'struct arm_ext_table'.
This struct can be filled with three types of entries:
ARM_ADD (string <ext>, arm_feature_set <enable_bits>), which means +<ext> will
enable <enable_bits>
ARM_REMOVE (string <ext>, arm_feature_set <disable_bits>), which means
+no<ext> will disable <disable_bits>
ARM_EXT (string <ext>, arm_feature_set <enable_bits>, arm_feature_set
<disable_bits>), which means +<ext> will enable <enable_bits> and +no<ext>
will disable <disable_bits> (this is to be used instead of adding an
ARM_ADD and ARM_REMOVE for the same <ext>)
This patch does not disable the use of the old extensions, even if some of them
are duplicated in the new tables. This is a "in-between-step" as we may want to
deprecate the old table of extensions in later patches. For now, GAS will first
look for the +<ext> or +no<ext> in the new table and if no entry is found it
will continue searching in the old table, following old behaviour. If only an
ARM_ADD or an ARM_REMOVE is defined for <ext> and +no<ext> or +<ext> resp. is
used then it also continues to search the old table for it.
A couple of caveats:
- This patch does not enable the use of these architecture extensions with the
'.arch_extension' directive. This is future work that I will tend to later.
- This patch does not enable the use of these architecture extensions with the
-mcpu option. This is future work that I will tend to later.
- This patch does not change the current behaviour when combining an
architecture extension and using -mfpu on the command-line. The current
behaviour of GAS is to stage the union of feature bits enabled by both -march
and -mfpu. GCC behaves differently here, so this is something we may want to
revisit on a later date.
2019-04-01 11:43:32 +02:00
|
|
|
|
2019-04-01 Andre Vieira <andre.simoesdiasvieira@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* opcode/arm.h (FPU_NEON_ARMV8_1): New.
|
|
|
|
|
|
(FPU_ARCH_NEON_VFP_ARMV8_1): Use FPU_NEON_ARMV8_1.
|
|
|
|
|
|
(FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_1): Likewise.
|
|
|
|
|
|
(FPU_ARCH_DOTPROD_NEON_VFP_ARMV8): Likewise.
|
|
|
|
|
|
(FPU_ARCH_NEON_VFP_ARMV8_2_FP16): New.
|
|
|
|
|
|
(FPU_ARCH_NEON_VFP_ARMV8_2_FP16FML): New.
|
|
|
|
|
|
(FPU_ARCH_NEON_VFP_ARMV8_4_FP16FML): New.
|
|
|
|
|
|
(FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_4): New.
|
|
|
|
|
|
|
2019-03-28 01:06:55 +01:00
|
|
|
|
2019-03-28 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 24390
|
|
|
|
|
|
* opcode/ppc.h (PPC_OPERAND_CR_REG): Comment.
|
|
|
|
|
|
|
2019-03-25 13:08:53 +01:00
|
|
|
|
2019-03-25 Tamar Christina <tamar.christina@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* dis-asm.h (struct disassemble_info): Add stop_offset.
|
|
|
|
|
|
|
2019-03-13 12:09:10 +01:00
|
|
|
|
2019-03-13 Sudakshina Das <sudi.das@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* elf/aarch64.h (DT_AARCH64_PAC_PLT): New.
|
|
|
|
|
|
|
[BFD, LD, AArch64, 2/3] Add --force-bti to enable BTI and to select BTI enabled PLTs
This is part of the patch series to add support for BTI and
PAC in AArch64 linker.
1) This patch adds a new ld command line option: --force-bti.
In the presence of this option, the linker enables BTI with the
GNU_PROPERTY_AARCH64_FEATURE_1_BTI feature. This gives out warning
in case of missing gnu notes for BTI in inputs.
2) It also defines a new set of BTI enabled PLTs. These are used either
when all the inputs are marked with GNU_PROPERTY_AARCH64_FEATURE_1_BTI
or when the new --force-bti option is used. This required adding new
fields in elf_aarch64_link_hash_table so that we could make the PLT
related information more generic.
3) It also defines a dynamic tag DT_AARCH64_BTI_PLT. The linker uses
this whenever it picks BTI enabled PLTs.
All these are made according to the new AArch64 ELF ABI
https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4
*** bfd/ChangeLog ***
2019-03-13 Sudakshina Das <sudi.das@arm.com>
Szabolcs Nagy <szabolcs.nagy@arm.com>
* bfd-in.h (aarch64_plt_type, aarch64_enable_bti_type): New.
(aarch64_bti_pac_info): New.
(bfd_elf64_aarch64_set_options): Add aarch64_bti_pac_info argument.
(bfd_elf32_aarch64_set_options): Likewise.
* bfd-in2.h: Regenerate
* elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): New.
(PLT_BTI_SMALL_ENTRY_SIZE, PLT_BTI_TLSDESC_ENTRY_SIZE): New.
(elfNN_aarch64_small_plt0_bti_entry): New.
(elfNN_aarch64_small_plt_bti_entry): New.
(elfNN_aarch64_tlsdesc_small_plt_bti_entry): New.
(elf_aarch64_obj_tdata): Add no_bti_warn and plt_type fields.
(elf_aarch64_link_hash_table): Add plt0_entry, plt_entry and
tlsdesc_plt_entry_size fields.
(elfNN_aarch64_link_hash_table_create): Initialise the new fields.
(setup_plt_values): New helper function.
(bfd_elfNN_aarch64_set_options): Use new bp_info to set plt sizes and
bti enable type.
(elfNN_aarch64_allocate_dynrelocs): Use new size members instead of
fixed macros.
(elfNN_aarch64_size_dynamic_sections): Likewise and add checks.
(elfNN_aarch64_create_small_pltn_entry): Use new generic pointers
to plt stubs instead of fixed ones and update filling them according
to the need for bti.
(elfNN_aarch64_init_small_plt0_entry): Likewise.
(elfNN_aarch64_finish_dynamic_sections): Likewise.
(get_plt_type, elfNN_aarch64_get_synthetic_symtab): New.
(elfNN_aarch64_plt_sym_val): Update size accordingly.
(elfNN_aarch64_link_setup_gnu_properties): Set up plts if BTI GNU NOTE
is set.
(bfd_elfNN_get_synthetic_symtab): Define.
(elfNN_aarch64_merge_gnu_properties): Give out warning with --force-bti
and mising BTI NOTE SECTION.
*** binutils/ChangeLog ***
2019-03-13 Sudakshina Das <sudi.das@arm.com>
Szabolcs Nagy <szabolcs.nagy@arm.com>
* readelf.c (get_aarch64_dynamic_type): New.
(get_dynamic_type): Use above for EM_AARCH64.
(dynamic_section_aarch64_val): New.
(process_dynamic_section): Use above for EM_AARCH64.
*** include/ChangeLog ***
2019-03-13 Sudakshina Das <sudi.das@arm.com>
Szabolcs Nagy <szabolcs.nagy@arm.com>
* elf/aarch64.h (DT_AARCH64_BTI_PLT): New.
*** ld/ChangeLog ***
2019-03-13 Sudakshina Das <sudi.das@arm.com>
Szabolcs Nagy <szabolcs.nagy@arm.com>
* NEWS: Document --force-bti.
* emultempl/aarch64elf.em (plt_type, bti_type, OPTION_FORCE_BTI): New.
(PARSE_AND_LIST_SHORTOPTS, PARSE_AND_LIST_OPTIONS): Add force-bti.
(PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FORCE_BTI.
* testsuite/ld-aarch64/aarch64-elf.exp: Add all the tests below.
* testsuite/ld-aarch64/bti-plt-1.d: New test.
* testsuite/ld-aarch64/bti-plt-1.s: New test.
* testsuite/ld-aarch64/bti-plt-2.s: New test.
* testsuite/ld-aarch64/bti-plt-2.d: New test.
* testsuite/ld-aarch64/bti-plt-3.d: New test.
* testsuite/ld-aarch64/bti-plt-4.d: New test.
* testsuite/ld-aarch64/bti-plt-5.d: New test.
* testsuite/ld-aarch64/bti-plt-6.d: New test.
* testsuite/ld-aarch64/bti-plt-7.d: New test.
* testsuite/ld-aarch64/bti-plt-so.s: New test.
* testsuite/ld-aarch64/bti-plt.ld: New test.
2019-03-13 11:54:30 +01:00
|
|
|
|
2019-03-13 Sudakshina Das <sudi.das@arm.com>
|
|
|
|
|
|
Szabolcs Nagy <szabolcs.nagy@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* elf/aarch64.h (DT_AARCH64_BTI_PLT): New.
|
|
|
|
|
|
|
2019-03-13 11:42:27 +01:00
|
|
|
|
2019-03-13 Sudakshina Das <sudi.das@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* elf/common.h (GNU_PROPERTY_AARCH64_FEATURE_1_AND): New.
|
|
|
|
|
|
(GNU_PROPERTY_AARCH64_FEATURE_1_BTI): New.
|
|
|
|
|
|
(GNU_PROPERTY_AARCH64_FEATURE_1_PAC): New.
|
|
|
|
|
|
|
2019-02-20 11:39:28 +01:00
|
|
|
|
2019-02-20 Alan Hayward <alan.hayward@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* elf/common.h (NT_ARM_PAC_MASK): Add define.
|
|
|
|
|
|
|
2019-02-15 13:50:52 +01:00
|
|
|
|
2019-02-15 Saagar Jha <saagar@saagarjha.com>
|
|
|
|
|
|
|
|
|
|
|
|
* mach-o/loader.h: Use new OS names in comments.
|
|
|
|
|
|
|
2019-02-12 14:02:48 +01:00
|
|
|
|
2019-02-11 Philippe Waroquiers <philippe.waroquiers@skynet.be>
|
|
|
|
|
|
|
|
|
|
|
|
* splay-tree.h (splay_tree_delete_key_fn): Update comment.
|
|
|
|
|
|
(splay_tree_delete_value_fn): Likewise.
|
|
|
|
|
|
|
2019-01-31 17:01:27 +01:00
|
|
|
|
2019-01-31 Andreas Krebbel <krebbel@linux.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* opcode/s390.h (enum s390_opcode_cpu_val): Add
|
|
|
|
|
|
S390_OPCODE_ARCH13.
|
|
|
|
|
|
|
2019-01-25 14:57:14 +01:00
|
|
|
|
2019-01-25 Sudakshina Das <sudi.das@arm.com>
|
|
|
|
|
|
Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* opcode/aarch64.h (enum aarch64_opnd): Remove
|
|
|
|
|
|
AARCH64_OPND_ADDR_SIMPLE_2.
|
|
|
|
|
|
(enum aarch64_insn_class): Remove ldstgv_indexed.
|
|
|
|
|
|
|
2019-01-21 22:50:24 +01:00
|
|
|
|
2019-01-22 Tom Tromey <tom@tromey.com>
|
|
|
|
|
|
|
|
|
|
|
|
* coff/ecoff.h: Include coff/sym.h.
|
|
|
|
|
|
|
2019-01-19 16:55:50 +01:00
|
|
|
|
2018-06-24 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
2.32 branch created.
|
|
|
|
|
|
|
2019-01-16 22:14:59 +01:00
|
|
|
|
2019-01-16 Kito Cheng <kito@andestech.com>
|
|
|
|
|
|
|
|
|
|
|
|
* elf/riscv.h (SHT_RISCV_ATTRIBUTES): Define.
|
|
|
|
|
|
(Tag_RISCV_arch): Likewise.
|
|
|
|
|
|
(Tag_RISCV_priv_spec): Likewise.
|
|
|
|
|
|
(Tag_RISCV_priv_spec_minor): Likewise.
|
|
|
|
|
|
(Tag_RISCV_priv_spec_revision): Likewise.
|
|
|
|
|
|
(Tag_RISCV_unaligned_access): Likewise.
|
|
|
|
|
|
(Tag_RISCV_stack_align): Likewise.
|
|
|
|
|
|
|
2019-01-11 10:47:42 +01:00
|
|
|
|
2019-01-14 Pavel I. Kryukov <kryukov@frtk.ru>
|
|
|
|
|
|
|
|
|
|
|
|
* dis-asm.h: include <string.h>
|
|
|
|
|
|
|
Sync libiberty sources with gcc master versions.
. * libiberty: Sync with gcc. Bring in:
2019-01-09 Sandra Loosemore <sandra@codesourcery.com>
PR other/16615
* cp-demangle.c: Mechanically replace "can not" with "cannot".
* floatformat.c: Likewise.
* strerror.c: Likewise.
2018-12-22 Jason Merrill <jason@redhat.com>
Remove support for demangling GCC 2.x era mangling schemes.
* cplus-dem.c: Remove cplus_mangle_opname, cplus_demangle_opname,
internal_cplus_demangle, and all subroutines.
(libiberty_demanglers): Remove entries for ancient GNU (pre-3.0),
Lucid, ARM, HP, and EDG demangling styles.
(cplus_demangle): Remove 'work' variable. Don't call
internal_cplus_demangle.
include * Merge from GCC:
2018-12-22 Jason Merrill <jason@redhat.com>
* demangle.h: Remove support for ancient GNU (pre-3.0), Lucid,
ARM, HP, and EDG demangling styles.
2019-01-10 10:44:13 +01:00
|
|
|
|
2019-01-10 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* Merge from GCC:
|
|
|
|
|
|
2018-12-22 Jason Merrill <jason@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* demangle.h: Remove support for ancient GNU (pre-3.0), Lucid,
|
|
|
|
|
|
ARM, HP, and EDG demangling styles.
|
|
|
|
|
|
|
2019-01-09 22:59:16 +01:00
|
|
|
|
2019-01-09 Sandra Loosemore <sandra@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
Merge from GCC:
|
|
|
|
|
|
PR other/16615
|
|
|
|
|
|
|
|
|
|
|
|
* libiberty.h: Mechanically replace "can not" with "cannot".
|
|
|
|
|
|
* plugin-api.h: Likewise.
|
|
|
|
|
|
|
2018-12-25 12:44:15 +01:00
|
|
|
|
2018-12-25 Yoshinori Sato <ysato@users.sourceforge.jp>
|
|
|
|
|
|
|
|
|
|
|
|
* elf/rx.h (EF_RX_CPU_MASK): Update new bits.
|
|
|
|
|
|
(E_FLAG_RX_V3): New RXv3 type.
|
|
|
|
|
|
* opcode/rx.h (RX_Size): Add double size.
|
|
|
|
|
|
(RX_Operand_Type): Add double FPU registers.
|
|
|
|
|
|
(RX_Opcode_ID): Add new instuctions.
|
|
|
|
|
|
|
2019-01-01 11:31:27 +01:00
|
|
|
|
2019-01-01 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
Update year range in copyright notice of all files.
|
|
|
|
|
|
|
2019-01-01 11:53:15 +01:00
|
|
|
|
For older changes see ChangeLog-2018
|
2016-01-01 11:44:31 +01:00
|
|
|
|
|
2019-01-01 11:53:15 +01:00
|
|
|
|
Copyright (C) 2019 Free Software Foundation, Inc.
|
2016-01-01 11:44:31 +01:00
|
|
|
|
|
|
|
|
|
|
Copying and distribution of this file, with or without modification,
|
|
|
|
|
|
are permitted in any medium without royalty provided the copyright
|
|
|
|
|
|
notice and this notice are preserved.
|
|
|
|
|
|
|
|
|
|
|
|
Local Variables:
|
|
|
|
|
|
mode: change-log
|
|
|
|
|
|
left-margin: 8
|
|
|
|
|
|
fill-column: 74
|
|
|
|
|
|
version-control: never
|
|
|
|
|
|
End:
|