binutils-gdb/opcodes/ChangeLog

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2009-08-25 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
* Makefile.am (SUBDIRS): Build '.' before 'po'.
(COMPILE_FOR_BUILD, LINK_FOR_BUILD, BUILD_LIBIBERTY)
(MOSTLYCLEANFILES, MAINTAINERCLEANFILES): New variables.
(i386-gen$(EXEEXT_FOR_BUILD)): Renamed from i386-gen, rewrite
using *BUILD variables, depend upon $(BUILD_LIBIBERTY).
(i386-gen.o): New rule.
($(srcdir)/i386-init.h): Adjust.
(i386-opc.lo): Depend on $(srcdir)/i386-tbl.h.
(ia64-gen$(EXEEXT_FOR_BUILD)): Rename from ia64-gen, adjust likewise.
(ia64-gen.o): New rule.
(ia64_asmtab_deps): New variable.
($(srcdir)/ia64-asmtab.c): Use it; adjust likewise.
(ia64-opc.lo): Depend on $(srcdir)/ia64-asmtab.c.
(s390-mkopc$(EXEEXT_FOR_BUILD)): Rename from s390-mkopc, adjust
likewise.
(s390-opc.tab): Adjust.
(z8kgen$(EXEEXT_FOR_BUILD), z8kgen.o, $(srcdir)/z8k-opc.h): New
rules.
(z8k-dis.lo): Depend on $(srcdir)/z8k-opc.h.
* Makefile.in: Regenerate.
* z8kgen.c (gas): Avoid '/*' in comment.
* z8k-opc.h (func): Regenerate.
2009-08-24 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
* Makefile.am (TARGET_LIBOPCODES_CFILES): New variable, taken
from $(CFILES), sorted, with dis-buf.c, dis-init.c, disassemble.c,
i386-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-f.c, ia64-opc-i.c,
ia64-opc-m.c, ia64-opc-d.c, ia64-gen.c, ia64-asmtab.c removed, and
msp430-dis.c added.
(LIBOPCODES_CFILES): New variable, adding to
TARGET_LIBOPCODES_CFILES also non-target library sources.
(CFILES): Factorize based on $(LIBOPCODES_CFILES), adding generator
files.
(ALL_MACHINES): Factorize based on $(TARGET_LIBOPCODES_CFILES).
(EXTRA_libopcodes_la_SOURCES): Use $(LIBOPCODES_CFILES).
* Makefile.in: Regenerate.
* po/POTFILES.in: Regenerate.
Regenerate tree using Autoconf 2.64 and Automake 1.11. config/: * override.m4 (_GCC_AUTOCONF_VERSION): Bump to 2.64. /: * configure: Regenerate. etc/: * configure: Regenerate. sim/common/: * config.in: Regenerate. * configure: Likewise. sim/iq2000/: * config.in: Regenerate. * configure: Likewise. sim/d10v/: * config.in: Regenerate. * configure: Likewise. sim/igen/: * config.in: Regenerate. * configure: Likewise. sim/m32r/: * config.in: Regenerate. * configure: Likewise. sim/frv/: * config.in: Regenerate. * configure: Likewise. sim/: * avr/config.in: Regenerate. * avr/configure: Likewise. * configure: Likewise. * cris/config.in: Likewise. * cris/configure: Likewise. sim/h8300/: * config.in: Regenerate. * configure: Likewise. sim/mn10300/: * config.in: Regenerate. * configure: Likewise. sim/ppc/: * config.in: Regenerate. * configure: Likewise. sim/erc32/: * config.in: Regenerate. * configure: Likewise. sim/arm/: * config.in: Regenerate. * configure: Likewise. sim/m68hc11/: * config.in: Regenerate. * configure: Likewise. sim/lm32/: * config.in: Regenerate. * configure: Likewise. sim/sh64/: * config.in: Regenerate. * configure: Likewise. sim/v850/: * config.in: Regenerate. * configure: Likewise. sim/cr16/: * config.in: Regenerate. * configure: Likewise. sim/moxie/: * config.in: Regenerate. * configure: Likewise. sim/m32c/: * config.in: Regenerate. * configure: Likewise. sim/mips/: * config.in: Regenerate. * configure: Likewise. sim/mcore/: * config.in: Regenerate. * configure: Likewise. sim/testsuite/d10v-elf/: * configure: Regenerate. sim/testsuite/: * configure: Regenerate. sim/testsuite/frv-elf/: * configure: Regenerate. sim/testsuite/m32r-elf/: * configure: Regenerate. sim/testsuite/mips64el-elf/: * configure: Regenerate. sim/sh/: * config.in: Regenerate. * configure: Likewise. gold/: * Makefile.in: Regenerate. * aclocal.m4: Likewise. * config.in: Likewise. * configure: Likewise. * testsuite/Makefile.in: Likewise. gprof/: * Makefile.in: Regenerate. * aclocal.m4: Likewise. * configure: Likewise. * gconfig.in: Likewise. opcodes/: * Makefile.in: Regenerate. * aclocal.m4: Likewise. * config.in: Likewise. * configure: Likewise. gas/: * Makefile.in: Regenerate. * aclocal.m4: Likewise. * config.in: Likewise. * configure: Likewise. * doc/Makefile.in: Likewise. ld/: * Makefile.in: Regenerate. * aclocal.m4: Likewise. * config.in: Likewise. * configure: Likewise. gdb/: * aclocal.m4: Regenerate. * config.in: Likewise. * configure: Likewise. * gnulib/Makefile.in: Likewise. gdb/doc/: * configure: Regenerate. gdb/gdbserver/: * aclocal.m4: Regenerate. * config.in: Likewise. * configure: Likewise. gdb/testsuite/: * configure: Regenerate. * gdb.hp/configure: Likewise. * gdb.hp/gdb.aCC/configure: Likewise. * gdb.hp/gdb.base-hp/configure: Likewise. * gdb.hp/gdb.compat/configure: Likewise. * gdb.hp/gdb.defects/configure: Likewise. * gdb.hp/gdb.objdbg/configure: Likewise. * gdb.stabs/configure: Likewise. binutils/: * Makefile.in: Regenerate. * aclocal.m4: Likewise. * config.in: Likewise. * configure: Likewise. * doc/Makefile.in: Likewise. bfd/: * Makefile.in: Regenerate. * aclocal.m4: Likewise. * config.in: Likewise. * configure: Likewise. bfd/doc/: * Makefile.in: Regenerate. readline/: * configure: Regenerate. readline/examples/rlfe/: * configure: Regenerate.
2009-08-22 18:56:56 +02:00
2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
Cleanups in binutils makefiles. ld/: * Makefile.am (bin_PROGRAMS): Renamed from ... (noinst_PROGRAMS): ... this. (transform): Override, including the renaming of ld-new to ld. (install-exec-local): Installation of ld in $(bindir) not needed here any more. (AM_CPPFLAGS): Renamed from ... (INCLUDES): ... this. (MAINTAINERCLEANFILES): Add ld.1. * Makefile.in: Regenerate. gold/: * Makefile.am (AM_CPPFLAGS): Renamed from ... (INCLUDES): ... this. * testsuite/Makefile.am (AUTOMAKE_OPTIONS): Add -Wno-portability. (AM_CPPFLAGS): Renamed from ... (INCLUDE): ... this. * Makefile.in, testsuite/Makefile.in: Regenerate. bfd/: * Makefile.am (libbfd_la_LDFLAGS): Initialize early, to allow appending. [INSTALL_LIBBFD] (bfdlib_LTLIBRARIES, bfdinclude_HEADERS): Set only in this condition. [!INSTALL_LIBBFD] (noinst_LTLIBRARIES, libbfd_la_LDFLAGS): New, to build but not install libbfd.la in this condition. (install-bfdlibLTLIBRARIES, uninstall-bfdlibLTLIBRARIES) (install_libbfd, install_libbfd): Remove. * Makefile.in: Regenerate. binutils/: * Makefile.am (AM_CPPFLAGS): Renamed from ... (INCLUDES): ... this. (bin2c$(EXEEXT_FOR_BUILD): Adjust rule. (installcheck-local): Renamed from ... (installcheck): ... this. * Makefile.in: Regenerate. gas/: * Makefile.am (YFLAGS): Remove, not needed any more. (AM_CPPFLAGS): Renamed from ... (INCLUDES): ... this. * Makefile.in: Regenerate. gprof/: * Makefile.am (AM_CPPFLAGS): Renamed from ... (INCLUDES): ... this. * Makefile.in: Regenerate. opcodes/: * Makefile.am (libopcodes_la_LDFLAGS): Initialize early. [INSTALL_LIBBFD] (bfdlib_LTLIBRARIES): Set only in this condition. [INSTALL_LIBBFD] (bfdinclude_DATA): New. [!INSTALL_LIBBFD] (noinst_LTLIBRARIES): New. [!INSTALL_LIBBFD] (libopcodes_la_LDFLAGS): Ensure libopcodes.la is built shared even if it is not to be installed. (install-bfdlibLTLIBRARIES,uninstall-bfdlibLTLIBRARIES) (install_libopcodes, uninstall_libopcodes): Remove. (AM_CPPFLAGS): Renamed from ... (INCLUDES): ... this. * Makefile.in: Regenerate.
2009-08-22 21:02:57 +02:00
* Makefile.am (libopcodes_la_LDFLAGS): Initialize early.
[INSTALL_LIBBFD] (bfdlib_LTLIBRARIES): Set only in this condition.
[INSTALL_LIBBFD] (bfdinclude_DATA): New.
[!INSTALL_LIBBFD] (noinst_LTLIBRARIES): New.
[!INSTALL_LIBBFD] (libopcodes_la_LDFLAGS): Ensure libopcodes.la
is built shared even if it is not to be installed.
(install-bfdlibLTLIBRARIES,uninstall-bfdlibLTLIBRARIES)
(install_libopcodes, uninstall_libopcodes): Remove.
(AM_CPPFLAGS): Renamed from ...
(INCLUDES): ... this.
* Makefile.in: Regenerate.
* Makefile.am (AUTOMAKE_OPTIONS): Remove 1.9 and cygnus, add
1.11, foreign, no-dist.
(MKDEP, m32c_opc_h): Remove variables.
(disassemble.lo): Rewrite using automake-style dependency
tracking rules; only list the dependency upon the primary source
file, but no included headers.
(m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo)
(i386-gen.o, ia64-gen.o): Remove dependency statements.
(EXTRA_libopcodes_la_SOURCES): New variable, list $(CFILES) to
ensure all dependency fragments are included in the Makefile.
(s390-opc.lo): Depend on s390-opc.tab.
(DEP, DEP1, dep.sed, dep, dep-in, dep-am): Remove rules.
(mkdep section): Remove.
* Makefile.in: Regenerate.
* po/POTFILES.in: Regenerate.
Cleanups after the update to Autoconf 2.64, Automake 1.11. /: * README-maintainer-mode: Point directly to upstream locations for autoconf, automake, libtool, gettext, instead of copies on sources.redhat.com. Document required versions. * configure.ac: Do not substitute datarootdir, htmldir, pdfdir, docdir. Do not process --with-datarootdir, --with-htmldir, --with-pdfdir, --with-docdir. * configure: Regenerate. gdb/: * CONTRIBUTE: Bump documented Autoconf version. * configure.ac: Do not substitute datarootdir, htmldir, pdfdir, docdir. Do not process --with-datarootdir, --with-htmldir, --with-pdfdir, --with-docdir. * configure: Regenerate. gdb/doc/: * gdbint.texinfo (Releasing GDB): Point to README-maintainer-mode file for required autoconf version. * configure.ac: Do not substitute datarootdir, htmldir, pdfdir, docdir. Do not process --with-datarootdir, --with-htmldir, --with-pdfdir, --with-docdir. * configure: Regenerate. gprof/: * Makefile.am (pdf__strip_dir, install-pdf, install-pdf-am) (install-pdf-recursive, html__strip_dir, install-html) (install-html-am, install-html-recursive): Remove. * Makefile.in: Regenerate. opcodes/: * Makefile.am (install-pdf, install-html): Remove. * Makefile.in: Regenerate. gas/: * Makefile.am (install-pdf, install-pdf-recursive, install-html) (install-html-recursive): Remove. * Makefile.in: Regenerate. * doc/Makefile.am (pdf__strip_dir, install-pdf, install-pdf-am) (html__strip_dir, install-html, install-html-am): Remove. * doc/Makefile.in: Regenerate. ld/: * Makefile.am (pdf__strip_dir, install-pdf, install-pdf-am) (install-pdf-recursive, html__strip_dir, install-html) (install-html-am, install-html-recursive): Remove. * Makefile.in: Regenerate. binutils/: * Makefile.am (install-pdf, install-pdf-recursive, install-html) (install-html-recursive): Remove. * Makefile.in: Regenerate. * doc/Makefile.am (pdf__strip_dir, install-pdf, install-pdf-am) (html__strip_dir, install-html, install-html-am): Remove. * doc/Makefile.in: Regenerate. bfd/: * Makefile.am (datarootdir, docdir, htmldor, pdfdir) (install-pdf, install-pdf-recursive, install-html) (install-html-recursive): Remove. * Makefile.in: Regenerate. bfd/doc/: * Makefile.am (pdf__strip_dir, install-pdf, install-pdf-am) (html__strip_dir, install-html, install-html-am): Remove. * Makefile.in: Regenerate.
2009-08-22 19:08:11 +02:00
* Makefile.am (install-pdf, install-html): Remove.
* Makefile.in: Regenerate.
Regenerate tree using Autoconf 2.64 and Automake 1.11. config/: * override.m4 (_GCC_AUTOCONF_VERSION): Bump to 2.64. /: * configure: Regenerate. etc/: * configure: Regenerate. sim/common/: * config.in: Regenerate. * configure: Likewise. sim/iq2000/: * config.in: Regenerate. * configure: Likewise. sim/d10v/: * config.in: Regenerate. * configure: Likewise. sim/igen/: * config.in: Regenerate. * configure: Likewise. sim/m32r/: * config.in: Regenerate. * configure: Likewise. sim/frv/: * config.in: Regenerate. * configure: Likewise. sim/: * avr/config.in: Regenerate. * avr/configure: Likewise. * configure: Likewise. * cris/config.in: Likewise. * cris/configure: Likewise. sim/h8300/: * config.in: Regenerate. * configure: Likewise. sim/mn10300/: * config.in: Regenerate. * configure: Likewise. sim/ppc/: * config.in: Regenerate. * configure: Likewise. sim/erc32/: * config.in: Regenerate. * configure: Likewise. sim/arm/: * config.in: Regenerate. * configure: Likewise. sim/m68hc11/: * config.in: Regenerate. * configure: Likewise. sim/lm32/: * config.in: Regenerate. * configure: Likewise. sim/sh64/: * config.in: Regenerate. * configure: Likewise. sim/v850/: * config.in: Regenerate. * configure: Likewise. sim/cr16/: * config.in: Regenerate. * configure: Likewise. sim/moxie/: * config.in: Regenerate. * configure: Likewise. sim/m32c/: * config.in: Regenerate. * configure: Likewise. sim/mips/: * config.in: Regenerate. * configure: Likewise. sim/mcore/: * config.in: Regenerate. * configure: Likewise. sim/testsuite/d10v-elf/: * configure: Regenerate. sim/testsuite/: * configure: Regenerate. sim/testsuite/frv-elf/: * configure: Regenerate. sim/testsuite/m32r-elf/: * configure: Regenerate. sim/testsuite/mips64el-elf/: * configure: Regenerate. sim/sh/: * config.in: Regenerate. * configure: Likewise. gold/: * Makefile.in: Regenerate. * aclocal.m4: Likewise. * config.in: Likewise. * configure: Likewise. * testsuite/Makefile.in: Likewise. gprof/: * Makefile.in: Regenerate. * aclocal.m4: Likewise. * configure: Likewise. * gconfig.in: Likewise. opcodes/: * Makefile.in: Regenerate. * aclocal.m4: Likewise. * config.in: Likewise. * configure: Likewise. gas/: * Makefile.in: Regenerate. * aclocal.m4: Likewise. * config.in: Likewise. * configure: Likewise. * doc/Makefile.in: Likewise. ld/: * Makefile.in: Regenerate. * aclocal.m4: Likewise. * config.in: Likewise. * configure: Likewise. gdb/: * aclocal.m4: Regenerate. * config.in: Likewise. * configure: Likewise. * gnulib/Makefile.in: Likewise. gdb/doc/: * configure: Regenerate. gdb/gdbserver/: * aclocal.m4: Regenerate. * config.in: Likewise. * configure: Likewise. gdb/testsuite/: * configure: Regenerate. * gdb.hp/configure: Likewise. * gdb.hp/gdb.aCC/configure: Likewise. * gdb.hp/gdb.base-hp/configure: Likewise. * gdb.hp/gdb.compat/configure: Likewise. * gdb.hp/gdb.defects/configure: Likewise. * gdb.hp/gdb.objdbg/configure: Likewise. * gdb.stabs/configure: Likewise. binutils/: * Makefile.in: Regenerate. * aclocal.m4: Likewise. * config.in: Likewise. * configure: Likewise. * doc/Makefile.in: Likewise. bfd/: * Makefile.in: Regenerate. * aclocal.m4: Likewise. * config.in: Likewise. * configure: Likewise. bfd/doc/: * Makefile.in: Regenerate. readline/: * configure: Regenerate. readline/examples/rlfe/: * configure: Regenerate.
2009-08-22 18:56:56 +02:00
* Makefile.in: Regenerate.
* aclocal.m4: Likewise.
* config.in: Likewise.
* configure: Likewise.
Add support for Xilinx MicroBlaze processor. * bfd/Makefile.am: Add cpu-microblaze.{lo,c}, elf32-microblaze.{lo,c}. * bfd/Makefile.in: Same. * bfd/archures.c: Add bfd_arch_microblaze. * bfd/bfd-in2.h: Regenerate. * bfd/config.bfd: Add microblaze target. * bfd/configure: Add bfd_elf32_microblaze_vec target. * bfd/configure.in: Same. * bfd/cpu-microblaze.c: New. * bfd/elf32-microblaze.c: New. * bfd/libbfd-in.h: Add prototype _bfd_dwarf2_fixup_section_debug_loc(). * bfd/libbfd.h: Regenerate. * bfd/reloc.c: Add MICROBLAZE relocations. * bfd/section.c: Add struct relax_table and relax_count to section. * bfd/targets.c: Add bfd_elf32_microblaze_vec. * binutils/MAINTAINERS: Add self as maintainer. * binutils/readelf.c: Include elf/microblaze.h, add EM_MICROBLAZE & EM_MICROBLAZE_OLD to guess_is_rela(), dump_relocations(), get_machine_name(). * config.sub: Add microblaze target. * configure: Same. * configure.ac: Same. * gas/Makefile.am: add microblaze to CPU_TYPES, config/tc-microblaze.c to TARGET_CPU_CFILES, config/tc-microblaze.h to TARGET_CPU_HFILES, add DEP_microblaze_elf target. * gas/Makefile.in: Same. * gas/config/tc-microblaze.c: Add MicroBlaze assembler. * gas/config/tc-microblaze.h: Add header for tc-microblaze.c. * gas/configure: Add microblaze target. * gas/configure.in: Same. * gas/configure.tgt: Same. * gas/doc/Makefile.am: Add c-microblaze.texi to CPU_DOCS. * gas/doc/Makefile.in: Same. * gas/doc/all.texi: Set MICROBLAZE. * gas/doc/as.texinfo: Add MicroBlaze doc links. * gas/doc/c-microblaze.texi: New MicroBlaze docs. * include/dis-asm.h: Decl print_insn_microblaze(). * include/elf/common.h: Define EM_MICROBLAZE & EM_MICROBLAZE_OLD. * include/elf/microblaze.h: New reloc definitions. * ld/Makefile.am: Add eelf32mb_linux.o, eelf32microblaze.o to ALL_EMULATIONS, targets. * ld/Makefile.in: Same. * ld/configure.tgt: Add microblaze*-linux*, microblaze* targets. * ld/emulparams/elf32mb_linux.sh: New. * ld/emulparams/elf32microblaze.sh. New. * ld/scripttempl/elfmicroblaze.sc: New. * opcodes/Makefile.am: Add microblaze-opc.h to HFILES, microblaze-dis.c to CFILES, microblaze-dis.lo to ALL_MACHINES, targets. * opcodes/Makefile.in: Same. * opcodes/configure: Add bfd_microblaze_arch target. * opcodes/configure.in: Same. * opcodes/disassemble.c: Define ARCH_microblaze, return print_insn_microblaze(). * opcodes/microblaze-dis.c: New MicroBlaze disassembler. * opcodes/microblaze-opc.h: New MicroBlaze opcode definitions. * opcodes/microblaze-opcm.h: New MicroBlaze opcode types.
2009-08-06 19:38:04 +02:00
2009-08-06 Michael Eager <eager@eagercon.com>
* Makefile.am: Add microblaze-opc.h to HFILES, microblaze-dis.c to
CFILES, microblaze-dis.lo to ALL_MACHINES, targets.
* Makefile.in: Regenerate.
* configure.in: Add bfd_microblaze_arch target.
* configure: Regenerate.
* disassemble.c: Define ARCH_microblaze, return
print_insn_microblaze().
* microblaze-dis.c: New MicroBlaze disassembler.
* microblaze-opc.h: New MicroBlaze opcode definitions.
* microblaze-opcm.h: New MicroBlaze opcode types.
bfd/ 2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * archures.c (bfd_architecture): Add bfd_arch_l1om. (bfd_l1om_arch): New. (bfd_archures_list): Add &bfd_l1om_arch. * bfd-in2.h: Regenerated. * config.bfd (targ64_selvecs): Add bfd_elf64_l1om_vec if bfd_elf64_x86_64_vec is supported. Add bfd_elf64_l1om_freebsd_vec if bfd_elf64_x86_64_freebsd_vec is supported. (targ_selvecs): Likewise. * configure.in: Support bfd_elf64_l1om_vec and bfd_elf64_l1om_freebsd_vec. * configure: Regenerated. * cpu-l1om.c: New. * elf64-x86-64.c (elf64_l1om_elf_object_p): New. (bfd_elf64_l1om_vec): Likewise. (bfd_elf64_l1om_freebsd_vec): Likewise. * Makefile.am (ALL_MACHINES): Add cpu-l1om.lo. (ALL_MACHINES_CFILES): Add cpu-l1om.c. * Makefile.in: Regenerated. * targets.c (bfd_elf64_l1om_vec): New. (bfd_elf64_l1om_freebsd_vec): Likewise. (_bfd_target_vector): Add bfd_elf64_l1om_vec and bfd_elf64_l1om_freebsd_vec. binutils/ 2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * readelf.c (guess_is_rela): Handle EM_L1OM. (dump_relocations): Likewise. (get_machine_name): Likewise. (get_section_type_name): Likewise. (get_elf_section_flags): Likewise. (get_symbol_index_type): Likewise. (is_32bit_abs_reloc): Likewise. (is_32bit_pcrel_reloc): Likewise. (is_64bit_abs_reloc): Likewise. (is_64bit_pcrel_reloc): Likewise. (is_none_reloc): Likewise. gas/ 2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (cpu_arch): Add l1om. (check_cpu_arch_compatible): New. (set_cpu_arch): Use it. (i386_arch): New. (i386_mach): Return bfd_mach_l1om for Intel L1OM. (md_show_usage): Display l1om. (i386_target_format): Return ELF_TARGET_L1OM_FORMAT if cpu_arch_isa_flags.bitfield.cpul1om is set. * config/tc-i386.h (TARGET_ARCH): Use (i386_arch ()). (i386_arch): New. (ELF_TARGET_L1OM_FORMAT): Likewise. * doc/c-i386.texi: Document l1om. gas/testsuite/ 2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/l1om.d: New. * gas/i386/l1om-inval.l: Likewise. * gas/i386/l1om-inval.s: Likewise. * gas/i386/i386.exp: Run l1om-inval and l1om. include/elf/ 2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * common.h (EM_L1OM): New. ld/ 2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * configure.tgt (targ64_extra_emuls): Add elf_l1om if elf_x86_64 is supported. Add elf_l1om_fbsd if elf_x86_64_fbsd is supported. (targ_extra_emuls): Likewise. * Makefile.am (ALL_64_EMULATIONS): Add eelf_l1om.o and eelf_l1om_fbsd.o (eelf_l1om.c): New. (eelf_l1om_fbsd.c): Likewise. * Makefile.in: Regenerated. * emulparams/elf_l1om.sh: New. * emulparams/elf_l1om_fbsd.sh: Likewise. ld/testsuite/ 2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * ld-x86-64/abs-l1om.d: New. * ld-x86-64/protected2-l1om.d: Likewise. * ld-x86-64/protected3-l1om.d: Likewise. * ld-x86-64/x86-64.exp: Run abs-l1om, protected2-l1om and protected3-l1om. opcodes/ 2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * configure.in: Handle bfd_l1om_arch. * disassemble.c (disassembler): Likewise. * configure: Regenerated. * i386-dis.c (print_insn): Handle bfd_mach_l1om and bfd_mach_l1om_intel_syntax. Use 8 bytes per line for Intel L1OM. * i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~CpuL1OM. Add CPU_L1OM_FLAGS. (cpu_flags): Add CpuL1OM. (set_bitfield): Take an argument to set the value field. (process_i386_cpu_flag): Support ~CpuXXX and ~(CpuXXX|CpuYYY). (process_i386_opcode_modifier): Updated. (process_i386_operand_type): Likewise. * i386-init.h: Regenerated. * i386-tbl.h: Likewise. * i386-opc.h (CpuL1OM): New. (CpuXsave): Updated. (i386_cpu_flags): Add cpul1om.
2009-07-25 16:58:58 +02:00
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* configure.in: Handle bfd_l1om_arch.
* disassemble.c (disassembler): Likewise.
* configure: Regenerated.
* i386-dis.c (print_insn): Handle bfd_mach_l1om and
bfd_mach_l1om_intel_syntax. Use 8 bytes per line for Intel L1OM.
* i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~CpuL1OM.
Add CPU_L1OM_FLAGS.
(cpu_flags): Add CpuL1OM.
(set_bitfield): Take an argument to set the value field.
(process_i386_cpu_flag): Support ~CpuXXX and ~(CpuXXX|CpuYYY).
(process_i386_opcode_modifier): Updated.
(process_i386_operand_type): Likewise.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
* i386-opc.h (CpuL1OM): New.
(CpuXsave): Updated.
(i386_cpu_flags): Add cpul1om.
gas/ 2009-07-24 Jan Beulich <jbeulich@novell.com> * tc-i386.c (cpu_arch): Add .8087, .287, .387, .no87, .nommx, .nosse, and .noavx. (cpu_flags_and_not): New. (set_cpu_arch): Check whether sub-architecture specified is a feature disable. (md_parse_option): Likewise. (parse_real_register): Don't return floating point register when x87 functionality is disabled. (md_show_usage): Add new sub-options. * doc/c-i386.texi: Update with new command line sub-options. gas/testsuite/ 2009-07-24 Jan Beulich <jbeulich@novell.com> * gas/i386/8087.[ds]: New. * gas/i386/287.[ds]: New. * gas/i386/387.[ds]: New. * gas/i386/no87.[ls]: New. * gas/i386/no87-2.[ls]: New. * gas/i386/i386.exp: Run new tests. * gas/i386/att-regs.s: Also check FPU register access. * gas/i386/intel-regs.s: Likewise. * gas/i386/att-regs.d: Adjust expectations. * gas/i386/intel-regs.d: Likewise. opcodes/ 2009-07-24 Jan Beulich <jbeulich@novell.com> * i386-dis.c (fgrps): Correct annotation for feni/fdisi. Add frstpm. * i386-gen.c (cpu_flag_init): Add FP enabling flags where needed. (cpu_flags): Add Cpu8087, Cpu287, Cpu387, Cpu687, and CpuFISTTP. (set_bitfield): Expand CpuFP to Cpu8087|Cpu287|Cpu387. * i386-opc.h (Cpu8087, Cpu287, Cpu387, Cpu687, CpuFISTTP): Define. (union i386_cpu_flags): Add cpu8087, cpu287, cpu387, cpu687, and cpufisttp. * i386-opc.tbl: Qualify floating point instructions by their respective CpuXXX flag. Fix fucom{,p,pp}, fprem1, fsin, fcos, and fsincos to be avilable only on 387. Fix fstsw ax to be available only on 287+. Add f{,n}eni, f{,n}disi, f{,n}setpm, and frstpm. * i386-init.h, i386-tbl.h: Regenerate.
2009-07-24 17:41:20 +02:00
2009-07-24 Jan Beulich <jbeulich@novell.com>
* i386-dis.c (fgrps): Correct annotation for feni/fdisi. Add
frstpm.
* i386-gen.c (cpu_flag_init): Add FP enabling flags where needed.
(cpu_flags): Add Cpu8087, Cpu287, Cpu387, Cpu687, and CpuFISTTP.
(set_bitfield): Expand CpuFP to Cpu8087|Cpu287|Cpu387.
* i386-opc.h (Cpu8087, Cpu287, Cpu387, Cpu687, CpuFISTTP):
Define.
(union i386_cpu_flags): Add cpu8087, cpu287, cpu387, cpu687,
and cpufisttp.
* i386-opc.tbl: Qualify floating point instructions by their
respective CpuXXX flag. Fix fucom{,p,pp}, fprem1, fsin, fcos,
and fsincos to be avilable only on 387. Fix fstsw ax to be
available only on 287+. Add f{,n}eni, f{,n}disi, f{,n}setpm,
and frstpm.
* i386-init.h, i386-tbl.h: Regenerate.
2009-07-20 Nick Clifton <nickc@redhat.com>
PR 10288
* arm-dis.c (arm_opcodes): Catch non-zero bits 8-11 in register
offset or indexed based addressing mode 3.
2009-07-14 Nick Clifton <nickc@redhat.com>
PR 10288
* arm-dis.c (arm_opcodes): Catch illegal Addressing Mode 1
patterns.
(arm_decode_shift): Catch illegal register based shifts.
(print_insn_arm): Properly handle negative register r0
post-indexed addressing.
2009-07-10 Doug Kwan <dougkwan@google.com>
* arm-disc.c (print_insn_coprocessor, print_insn_arm): Print only
lower 32 bits of long types to make hexadecimal output consistent
on both 32-bit and 64-bit hosts.
2009-07-10 16:20:41 +02:00
2009-07-10 Alan Modra <amodra@bigpond.net.au>
* fr30-desc.c, * fr30-desc.h, * fr30-opc.c, * fr30-opc.h,
* frv-desc.c, * frv-desc.h, * frv-opc.c, * frv-opc.h,
* ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c, * ip2k-opc.h,
* iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c, * iq2000-opc.h,
* lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opc.h,
* lm32-opinst.c, * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
* m32c-opc.h, * m32r-desc.c, * m32r-desc.h, * m32r-opc.c,
* m32r-opc.h, * m32r-opinst.c, * mt-desc.c, * mt-desc.h,
* mt-opc.c, * mt-opc.h, * openrisc-desc.c, * openrisc-desc.h,
* openrisc-opc.c, * openrisc-opc.h, * xc16x-desc.c, * xc16x-desc.h,
* xc16x-opc.c, * xc16x-opc.h, * xstormy16-desc.c, * xstormy16-desc.h,
* xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
2009-07-07 Chung-Lin Tang <cltang@pllab.cs.nthu.edu.tw>
* arm-dis.c (coprocessor_opcodes): Fix mask for waddbhus.
2009-07-07 Nick Clifton <nickc@redhat.com>
PR 10288
* arm-dis.c (arm_opcodes): Be more strict about decoding scaled
addressing modes.
[cgen] * cpu/mep-core.cpu (fsft, ssarb): Mark as VOLATILE. * cpu/mep-ivc2.cpu (many): Add VOLATILE to more insns that make unspecified accesses to control registers. [sid/component/cgen-cpu/mep] * mep-cop1-16-decode.cxx: Regenerate. * mep-cop1-16-decode.h: Regenerate. * mep-cop1-16-defs.h: Regenerate. * mep-cop1-16-model.cxx: Regenerate. * mep-cop1-16-model.h: Regenerate. * mep-cop1-16-sem.cxx: Regenerate. * mep-cop1-32-decode.cxx: Regenerate. * mep-cop1-32-decode.h: Regenerate. * mep-cop1-32-defs.h: Regenerate. * mep-cop1-32-model.cxx: Regenerate. * mep-cop1-32-model.h: Regenerate. * mep-cop1-32-sem.cxx: Regenerate. * mep-cop1-48-decode.cxx: Regenerate. * mep-cop1-48-decode.h: Regenerate. * mep-cop1-48-defs.h: Regenerate. * mep-cop1-48-model.cxx: Regenerate. * mep-cop1-48-model.h: Regenerate. * mep-cop1-48-sem.cxx: Regenerate. * mep-cop1-64-decode.cxx: Regenerate. * mep-cop1-64-decode.h: Regenerate. * mep-cop1-64-defs.h: Regenerate. * mep-cop1-64-model.cxx: Regenerate. * mep-cop1-64-model.h: Regenerate. * mep-cop1-64-sem.cxx: Regenerate. * mep-core1-decode.cxx: Regenerate. * mep-core1-decode.h: Regenerate. * mep-core1-defs.h: Regenerate. * mep-core1-model.cxx: Regenerate. * mep-core1-model.h: Regenerate. * mep-core1-sem.cxx: Regenerate. * mep-cpu.h: Regenerate. * mep-decode.cxx: Regenerate. * mep-decode.h: Regenerate. * mep-defs.h: Regenerate. * mep-desc.h: Regenerate. * mep-model.cxx: Regenerate. * mep-model.h: Regenerate. * mep-sem.cxx: Regenerate. [opcodes] * mep-desc.c: Regenerate. * mep-desc.h: Regenerate. * mep-opc.c: Regenerate. * mep-opc.h: Regenerate.
2009-07-07 03:56:05 +02:00
2009-07-06 DJ Delorie <dj@redhat.com>
* mep-desc.c: Regenerate.
* mep-desc.h: Regenerate.
* mep-opc.c: Regenerate.
* mep-opc.h: Regenerate.
2009-07-06 21:34:30 +02:00
2009-07-06 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
* i386-opc.h (CpuFMA4): Add CpuFMA4.
(i386_cpu_flags): New.
* i386-gen.c: Add CPU_FMA4_FLAGS.
* i386-opc.tbl: Add FMA4 instructions.
* i386-tbl.h: Regenerate.
* i386-init.h: Regenerate.
* i386-dis.c (OP_VEX_FMA): New. Handle FMA4.
(OP_XMM_VexW): Ditto.
(OP_EX_VexW): Ditto.
(VEXI4_Fixup): Ditto.
(VexI4, VexFMA, Vex128FMA, EXVexW, EXdVexW, XMVexW): New Macros.
(PREFIX_VEX_3A5C, PREFIX_VEX_3A5D, PREFIX_VEX_3A5E): New.
(PREFIX_VEX_3A5F, PREFIX_VEX_3A60): New.
(PREFIX_VEX_3A68, PREFIX_VEX_3A69, PREFIX_VEX_3A6A): New.
(PREFIX_VEX_3A6B, PREFIX_VEX_3A6C, PREFIX_VEX_3A6D): New.
(PREFIX_VEX_3A6E, PREFIX_VEX_3A6F, PREFIX_VEX_3A7A): New.
(PREFIX_VEX_3A7B, PREFIX_VEX_3A7C, PREFIX_VEX_3A7D): New.
(PREFIX_VEX_3A7E, PREFIX_VEX_3A7F): New.
(VEX_LEN_3A6A_P_2,VEX_LEN_3A6B_P_2, VEX_LEN_3A6E_P_2): New.
(VEX_LEN_3A6F_P_2,VEX_LEN_3A7A_P_2, VEX_LEN_3A7B_P_2): New.
(VEX_LEN_3A7E_P_2,VEX_LEN_3A7F_P_2): New.
(get_vex_imm8): New. handle FMA4.
(OP_EX_VexReg): Ditto.
2009-06-30 Nick Clifton <nickc@redhat.com>
PR 10288
* arm-dis.c (coprocessor): Print the LDC and STC versions of the
LFM and SFM instructions as comments,.
Improve consistency of formatting for instructions displayed as
comments and decimal values displayed with their hexadecimal
equivalents.
Formatting tidy ups.
2009-06-29 Nick Clifton <nickc@redhat.com>
PR 10288
* arm-dis.c (enum opcode_sentinels): New: Used to mark the
boundary between variaant and generic coprocessor instuctions.
(coprocessor): Use it.
Fix architecture version of MCRR and MRRC instructions.
(arm_opcdes): Fix patterns for STRB and STRH instructions.
(print_insn_coprocessor): Check architecture and extension masks.
Print a hexadecimal version of any decimal constant that is
outside of the range of -16 to +32.
(print_arm_address): Add a return value of the offset used in the
adress, if it is worth printing a hexadecimal version of it.
(print_insn_neon): Print a hexadecimal version of any decimal
constant that is outside of the range of -16 to +32.
(print_insn_arm): Likewise.
(print_insn_thumb16): Likewise.
(print_insn_thumb32): Likewise.
PR 10297
* arm-dis.c (UNDEFINED_INSTRUCTION): New macro for a description
of an undefined instruction.
(arm_opcodes): Use it.
(thumb_opcod): Use it.
(thumb32_opc): Use it.
2009-06-23 DJ Delorie <dj@redhat.com>
[cgen] * intrinsics.scm: Updates to support IVC2. (belongs-to-group?): Check IVC2 slots. (-slots-attribute): New. (targets::attributes): Add SLOTS. (target:add-well-known-intrinsics): Add CPMOV. (md-insn): Add CPTYPE and CRET?. (add-md-insn): Likewise. (add-intrinsic-for-isa): Disable the duplicate tests, as IVC2 has duplicate insns with different bit patterns. (write-cgen-insn?): Add cret? support. (intrinsics.h): Add vector types. (runtime-op): Add vector support. (intrinsic-protos.h): Let GCC define its types. Add cret? support. * cpu/mep-core.cpu: Add CPTYPE and CRET attributes. * cpu/mep-ivc2.cpu: Update all insns to include type information. (h-cr-ivc2): Default to typeless. (h-ccr-ivc2): Fix register width. (SLOTS): Fix values and default. (ivc2_*): Add control register names. (crop, crqp, crpp, croc, crqc, crpc): Default to typeless. [opcodes] * mep-desc.c: Regenerate. * mep-desc.h: Regenerate. * mep-dis.c: Regenerate. * mep-ibld.c: Regenerate. * mep-opc.c: Regenerate. [sid/component/cgen-cpu/mep] * ivc2-cop.cxx (ivc2_cphadd_w): Change to return value. (ivc2_cpsubaca0u_b): Remove debug line. * ivc2-cpu.h (ivc2_cpccadd_b): Change to return value. * mep-cop1-16-decode.cxx: Regenerate. * mep-cop1-16-sem.cxx: Regenerate. * mep-cop1-32-decode.cxx: Regenerate. * mep-cop1-32-sem.cxx: Regenerate. * mep-cop1-48-decode.cxx: Regenerate. * mep-cop1-48-sem.cxx: Regenerate. * mep-cop1-64-decode.cxx: Regenerate. * mep-cop1-64-sem.cxx: Regenerate. * mep-core1-decode.cxx: Regenerate. * mep-cpu.h: Regenerate. * mep-decode.cxx: Regenerate. * mep-desc.h: Regenerate.
2009-06-24 05:06:42 +02:00
* mep-desc.c: Regenerate.
* mep-desc.h: Regenerate.
* mep-dis.c: Regenerate.
* mep-ibld.c: Regenerate.
* mep-opc.c: Regenerate.
* mep-asm.c: Regenerate.
* mep-opc.c: Regenerate.
* mep-opc.h: Regenerate.
2009-06-22 Nick Clifton <nickc@redhat.com>
* po/fi.po: Updated Finish translation.
2009-06-22 Alan Modra <amodra@bigpond.net.au>
* m32c-asm.c: Regenerate.
2009-06-22 Alan Modra <amodra@bigpond.net.au>
* score-dis.c (print_insn_score48, print_insn_score32): Move default
case label to proper lexical block.
* score7-dis.c (print_insn_score32): Likewise.
2009-06-19 Martin Schwidefsky <sschwidefsky@de.ibm.com>
* s390-opc.c (INSTR_RR_0R_OPT, INSTR_RX_0RRD_OPT, MASK_RR_0R_OPT,
MASK_RX_0RRD_OPT): New instruction formats with optional arguments.
* s390-opc.txt (nopr, nop): Use new instruction format.
2009-06-18 Nick Clifton <nickc@redhat.com>
PR 10288
* arm-dis.c (print_insn_coprocessor): Check that a user specified
ARM architecture supports the matched instruction.
(print_insn_arm): Likewise.
(select_arm_features): New function. Fills in the fields of an
arm_feature_set structure based on a given arm machine number.
(print_insn): Initialise an arm_feature_set structure.
2009-06-16 Maciej W. Rozycki <macro@linux-mips.org>
* vax-dis.c (is_function_entry): Return success for synthetic
symbols too.
(is_plt_tail): New function.
(print_insn_vax): Decode PLT entry offset longword.
2009-06-15 Nick Clifton <nickc@redhat.com>
PR 10186
* arm-dis.c (thumb32_opcodes): Fix binary value of SEV.W
instruction.
PR 10173
* cr16-dis.c (print_arg): Avoid printing the 0x prefix twice.
2009-06-15 Nick Clifton <nickc@redhat.com>
PR 10263
* arm-dis.c (print_insn): Ignore is_data if the user has requested
the disassembly of data as well as instructions.
2009-06-11 Doug Evans <dje@sebabeach.org>
* cgen.sh: Handle multiple simultaneous runs for parallel makes.
2009-06-11 Anthony Green <green@moxielogic.com>
* moxie-opc.c (moxie_form1_opc_info): Remove branch instructions.
(moxie_form3_opc_info): Add branch instructions.
* moxie-dis.c (print_insn_moxie): Disassemble MOXIE_F3_PCREL
encoded instructions.
2009-06-06 15:02:21 +02:00
2009-06-06 Anthony Green <green@moxielogic.com>
* moxie-opc.c: Recode some MOXIE_F1_4 opcodes as MOXIE_F1_M.
* moxie-dis.c (print_insn_moxie): Handle MOXIE_F1_M case.
2009-06-04 Alan Modra <amodra@bigpond.net.au>
* dep-in.sed: Don't use \n in replacement part of s command.
* Makefile.am (DEP1): LC_ALL for uniq.
* Makefile.in: Regenerate.
2009-06-02 18:31:59 +02:00
2009-06-02 Nick Clifton <nickc@redhat.com>
* po/nl.po: Updated Dutch translation.
2009-06-02 Tristan Gingold <gingold@adacore.com>
* ia64-gen.c (parse_resource_users, print_dependency_table,
add_dis_table_ent, finish_distable, insert_bit_table_ent,
add_dis_entry, compact_distree, gen_dis_table, completer_entries_eq,
get_prefix_len, compute_completer_bits, insert_opcode_dependencies,
insert_completer_entry, print_completer_entry, print_completer_table,
opcodes_eq, add_opcode_entry, shrink): Use ISO C syntax for functions.
2009-05-28 DJ Delorie <dj@redhat.com>
* mep-asm.c: Regenerate.
* mep-desc.c: Regenerate.
2009-05-26 DJ Delorie <dj@redhat.com>
* mep-asm.c: Regenerate.
* mep-desc.c: Regenerate.
* mep-desc.h: Regenerate.
* mep-dis.c: Regenerate.
* mep-ibld.c: Regenerate.
* mep-opc.c: Regenerate.
* mep-opc.h: Regenerate.
2009-05-26 Nick Clifton <nickc@redhat.com>
* po/id.po: Updated Indonesian translation.
* po/opcodes.pot: Updated template file.
2009-05-26 Alan Modra <amodra@bigpond.net.au>
* dep-in.sed: Don't modify .o to .lo here. Output one filename
per line with all lines having continuation backslash. Prefix
first line with "A", following lines with "B".
* Makefile.am (DEP): Don't use dep.sed here.
(DEP1): Run $MKDEP on single files, modify .o to .lo here. Use
dep.sed here on dependencies, sort and uniq.
* Makefile.in: Regenerate.
2009-05-25 Tristan Gingold <gingold@adacore.com>
* makefile.vms (OPT): New variable.
(CFLAGS): Update compilation flags.
2009-05-22 DJ Delorie <dj@redhat.com>
* mep-asm.c: Regenerate.
* mep-desc.c: Regenerate.
* mep-desc.h: Regenerate.
* mep-dis.c: Regenerate.
* mep-ibld.c: Regenerate.
* mep-opc.c: Regenerate.
* mep-opc.h: Regenerate.
<gas changes> 2009-05-22 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> * config/tc-i386.c (process_drex): Delete. Remove SSE5 support. (build_modrm_byte): Remove DREX handling support. (DREX_*): Delete. (drex_byte): Delete. (md_assemble): Remove DREX handling support. (process_operands): Remove DREX, SSE5 support. (i386_insn): Remove DREX. <gas/testsuite changes> 2009-05-22 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> * gas/i386/i386.exp: Remove SSE5 tests. * gas/i386/x86-64-sse5.s: Delete. Remove SSE5 tests. * gas/i386/x86-64-sse5.d: Ditto. * gas/i386/arch-10-1.l: Remove SSE5 tests. * gas/i386/arch-10-2.l: Ditto. * gas/i386/arch-10-3.l: Ditto. * gas/i386/arch-10-4.l: Ditto. * gas/i386/arch-10.d: Ditto. * gas/i386/arch-10.s: Ditto. * gas/i386/arch-4.s: Delete. Remove SSE5 tests. * gas/i386/arch-4.d: Ditto. * gas/i386/arch-8.s: Ditto. * gas/i386/arch-8.d: Ditto. * gas/i386/arch-2.s: Remove SSE5 tests. * gas/i386/arch-2.d: Remove SSE5 tests. * gas/i386/x86-64-arch-2.s: Ditto. <opcodes changes> 2009-05-22 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> * i386-opc.h (Cpusse5): Delete. (i386_cpu_flags): Delete. * i386-gen.c: Remove CpuSSE5, Drex, Drexv and Drexc. * i386-opc.tbl: Remove SSE5 instructions. * i386-tbl.h: Regenerate. * i386-init.h: Regenerate. * i386-dis.c (OP_E_memeory, OP_E_extended): Remove drex handling. (print_drex_arg): Delete. (OP_DREX4): Delete. (OP_DREX3): Delete. (OP_DREX_ICMP): Delete. (OP_DREX_FCMP): Delete. (DREX_*): Delete. (THREE_BYTE_0F24, THREE_BYTE_0F25, THREE_BYTE_0f7B): Delete.
2009-05-22 17:57:25 +02:00
2009-05-22 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
* i386-opc.h (Cpusse5): Delete.
(i386_cpu_flags): Delete.
* i386-gen.c: Remove CpuSSE5, Drex, Drexv and Drexc.
* i386-opc.tbl: Remove SSE5 instructions.
* i386-tbl.h: Regenerate.
* i386-init.h: Regenerate.
* i386-dis.c (OP_E_memeory, OP_E_extended): Remove drex handling.
(print_drex_arg): Delete.
(OP_DREX4): Delete.
(OP_DREX3): Delete.
(OP_DREX_ICMP): Delete.
(OP_DREX_FCMP): Delete.
(DREX_*): Delete.
(THREE_BYTE_0F24, THREE_BYTE_0F25, THREE_BYTE_0f7B): Delete.
2009-05-22 11:33:16 +02:00
2009-05-22 Alan Modra <amodra@bigpond.net.au>
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
* po/POTFILES.in: Regenerate.
2009-05-19 DJ Delorie <dj@redhat.com>
* mep-asm.c: Regenerate.
* mep-opc.c: Regenerate.
2009-04-30 DJ Delorie <dj@redhat.com>
* mep-asm.c: Regenerate.
* mep-desc.c: Regenerate.
* mep-desc.h: Regenerate.
* mep-dis.c: Regenerate.
* mep-ibld.c: Regenerate.
* mep-opc.c: Regenerate.
* mep-opc.h: Regenerate.
2009-04-17 DJ Delorie <dj@redhat.com
* mep-desc.c: Regenerate.
* mep-ibld.c: Regenerate.
* mep-opc.c: Regenerate.
* mep-opc.h: Regenerate.
2009-04-16 17:39:48 +02:00
2009-04-15 Anthony Green <green@moxielogic.com>
* moxie-opc.c, moxie-dis.c: Created.
* Makefile.am: Build the moxie source files.
* configure.in: Add moxie support.
* Makefile.in, configure: Rebuilt.
* disassemble.c (disassembler): Add moxie support.
(ARCH_moxie): Define.
2009-04-15 Jan Beulich <jbeulich@novell.com>
* i386-opc.tbl (protb, protw, protd, protq): Set opcode
extension to None.
(pshab, pshaw, pshad, pshaq): Likewise.
* i386-tbl.h: Re-generate.
2009-04-08 DJ Delorie <dj@redhat.com
* mep-asm.c: Regenerate.
* mep-desc.c: Regenerate.
* mep-desc.h: Regenerate.
* mep-dis.c: Regenerate.
* mep-ibld.c: Regenerate.
* mep-opc.c: Regenerate.
* mep-opc.h: Regenerate.
2009-04-07 Peter Bergner <bergner@vnet.ibm.com>
* ppc-opc.c (powerpc_opcodes) <"tlbilxlpid", "tlbilxpid", "tlbilxva",
"tlbilx">: Use secondary opcode "18" as per the ISA 2.06 documentation.
Reorder entries so the extended mnemonics are listed before tlbilx.
2009-04-02 Peter Bergner <bergner@vnet.ibm.com>
* ppc-dis.c (powerpc_init_dialect): Do not choose a default dialect
due to -many/-Many.
(print_insn_powerpc): Make sure we only deprecate instructions using
the original dialect and not a modified dialect due to -Many handling.
Move the handling of the condition register and default operands to
the end of the if/else if/else chain.
* ppc-opc.c (powerpc_opcodes): Reorder the opcode table so that
instructions from newer processors are listed before older ones.
<"icblce", "sync", "eieio", "tlbld">: Deprecate for processors
that have instructions with conflicting opcodes.
2009-04-01 Peter Bergner <bergner@vnet.ibm.com>
* ppc-opc.c (powerpc_opcodes) <"dcbzl">: Merge the POWER4 and
E500MC entries.
2009-04-01 Christophe Lyon <christophe.lyon@st.com>
* arm-dis.c (print_insn): Print BE8 opcodes in little endianness.
2009-03-30 Joseph Myers <joseph@codesourcery.com>
* arm-dis.c (print_insn): Also check section matches in backwards
search for mapping symbol.
2009-03-26 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (get_valid_dis386): Abort on unhandled table.
2009-03-18 Alan Modra <amodra@bigpond.net.au>
* cgen-opc.c: Include alloca-conf.h rather than alloca.h.
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
* openrisc-opc.c: Regenerate.
2009-03-10 Nick Clifton <nickc@redhat.com>
* po/id.po: Updated Indonesian translation.
2009-03-10 Alan Modra <amodra@bigpond.net.au>
* ppc-dis.c: Include "opintl.h".
(struct ppc_mopt, ppc_opts): New.
(ppc_parse_cpu): New function.
(powerpc_init_dialect): Use it.
(print_ppc_disassembler_options): Dump options from ppc_opts.
Internationalize message.
2009-03-06 13:14:40 +01:00
2009-03-06 Nick Clifton <nickc@redhat.com>
* po/es.po: Updated Spanish translation.
2009-03-04 Alan Modra <amodra@bigpond.net.au>
PR 6768
* configure.in: Test for ld --as-needed support. Link shared
libopcodes against libm.
* configure: Regenerate.
2009-03-03 Peter Bergner <bergner@vnet.ibm.com>
* ppc-opc.c (powerpc_opcodes): Reorder the opcode table so that
instructions from newer processors are listed before older ones.
2009-03-04 02:16:15 +01:00
2009-03-03 Alan Modra <amodra@bigpond.net.au>
* Makefile.am: Run "make dep-am".
(HFILES): Move lm32-desc.h and lm32-opc.h from..
(CFILES): ..here.
* Makefile.in: Regenerate.
2009-03-02 11:33:08 +01:00
2009-03-02 Qinwei <qinwei@sunnorth.com.cn>
* score7-dis.c: New file.
* Makefile.am: Add dependencies for score7-dis.c.
* Makefile.in: Regenerate.
* configure.in: Add score7-dis to score files.
* configure: Regenerate.
* score-dis.c: Add support for score7 architecture.
* score-opc.h: Likewise.
2009-03-01 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
* configure: Regenerate.
2009-02-27 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (OP_EX): Call OP_E_memory instead of OP_E.
gas/ * config/tc-ppc.c (pre_defined_registers): Add "f32" to "f63", "f.32" to "f.63", "vs0" to "vs63" and "vs.0" to "vs.63". (parse_cpu): Extend -mpower7 to accept power7 and isel instructions. gas/testsuite/ * gas/ppc/e500mc.d ("wait", "waitsrv", "waitimpl"): Add tests. * gas/ppc/e500mc.s: Likewise. * gas/ppc/power6.d ("cdtbcd", "cbcdtd", "addg6s"): Add tests. * gas/ppc/power6.s: Likewise. * gas/ppc/power7.d ("lfdpx", "mffgpr", "mftgpr"): Remove invalid tests. ("wait", "waitsrv", "waitimpl", "divwe", "divwe.", "divweo", "divweo.", "divweu", "divweu.", "divweuo", "divweuo.", "bpermd", "popcntw", "popcntd", "ldbrx", "stdbrx", "lfiwzx", "lfiwzx", "fcfids", "fcfids.", "fcfidus", "fcfidus.", "fctiwu", "fctiwu.", "fctiwuz", "fctiwuz.", "fctidu", "fctidu.", "fctiduz", "fctiduz.", "fcfidu", "fcfidu.", "ftdiv", "ftdiv", "ftsqrt", "ftsqrt", "dcbtt", "dcbtstt", "dcffix", "dcffix.", "lbarx", "lbarx", "lbarx", "lharx", "lharx", "lharx", "stbcx.", "sthcx.", "fre", "fre.", "fres", "fres.", "frsqrte", "frsqrte.", "frsqrtes", "frsqrtes.", "isel"): Add tests. * gas/ppc/power7.s: Likewise. * gas/ppc/vsx.d: New test. * gas/ppc/vsx.s: Likewise. * gas/ppc/ppc.exp: Run it. include/opcode/ * ppc.h (PPC_OPCODE_POWER7): New. opcodes/ * ppc-dis.c (powerpc_init_dialect): Extend -Mpower7 to disassemble the power7 and the isel instructions. * ppc-opc.c (insert_xc6, extract_xc6): New static functions. (insert_dm, extract_dm): Likewise. (XB6): Update comment to include XX2 form. (WC, XC6, SHW, DMEX, UIM, XX2, XX3RC, XX4, XX2_MASK, XX2UIM_MASK, XX2BF_MASK, XX3BF_MASK, XX3SHW_MASK, XX4_MASK, XWC_MASK, POWER7): New. (RemoveXX3DM): Delete. (powerpc_opcodes): <"lfdp", "lfdpx", "mcrxr", "mftb", "mffgpr", "mftgpr">: Deprecate for POWER7. <"fres", "fres.", "frsqrtes", "frsqrtes.", "fre", "fre.", "frsqrte", "frsqrte.">: Deprecate the three operand form and enable the two operand form for POWER7 and later. <"wait">: Extend to accept optional parameter. Enable for POWER7. <"waitsrv", "waitimpl">: Add extended opcodes. <"ldbrx", "stdbrx">: Enable for POWER7. <"cdtbcd", "cbcdtd", "addg6s">: Add POWER6 opcodes. <"bpermd", "dcbtstt", "dcbtt", "dcffix.", "dcffix", "divde.", "divde", "divdeo.", "divdeo", "divdeu.", "divdeu", "divdeuo.", "divdeuo", "divwe.", "divwe", "divweo.", "divweo", "divweu.", "divweu", "divweuo.", "divweuo", "fcfids.", "fcfids", "fcfidu.", "fcfidu", "fcfidus.", "fcfidus", "fctidu.", "fctidu", "fctiduz.", "fctiduz", "fctiwu.", "fctiwu", "fctiwuz.", "fctiwuz", "ftdiv", "ftsqrt", "lbarx", "lfiwzx", "lharx", "popcntd", "popcntw", "stbcx.", "sthcx.">: Add POWER7 opcodes. <"lxsdux", "lxsdx", "lxvdsx", "lxvw4ux", "lxvw4x", "stxsdux", "stxsdx", "stxvw4ux", "stxvw4x", "xsabsdp", "xsadddp", "xscmpodp", "xscmpudp", "xscpsgndp", "xscvdpsp", "xscvdpsxds", "xscvdpsxws", "xscvdpuxds", "xscvdpuxws", "xscvspdp", "xscvsxddp", "xscvuxddp", "xsdivdp", "xsmaddadp", "xsmaddmdp", "xsmaxdp", "xsmindp", "xsmsubadp", "xsmsubmdp", "xsmuldp", "xsnabsdp", "xsnegdp", "xsnmaddadp", "xsnmaddmdp", "xsnmsubadp", "xsnmsubmdp", "xsrdpi", "xsrdpic", "xsrdpim", "xsrdpip", "xsrdpiz", "xsredp", "xsrsqrtedp", "xssqrtdp", "xssubdp", "xstdivdp", "xstsqrtdp", "xvabsdp", "xvabssp", "xvadddp", "xvaddsp", "xvcmpeqdp.", "xvcmpeqdp", "xvcmpeqsp.", "xvcmpeqsp", "xvcmpgedp.", "xvcmpgedp", "xvcmpgesp.", "xvcmpgesp", "xvcmpgtdp.", "xvcmpgtdp", "xvcmpgtsp.", "xvcmpgtsp", "xvcpsgnsp", "xvcvdpsp", "xvcvdpsxds", "xvcvdpsxws", "xvcvdpuxds", "xvcvdpuxws", "xvcvspdp", "xvcvspsxds", "xvcvspsxws", "xvcvspuxds", "xvcvspuxws", "xvcvsxddp", "xvcvsxdsp", "xvcvsxwdp", "xvcvsxwsp", "xvcvuxddp", "xvcvuxdsp", "xvcvuxwdp", "xvcvuxwsp", "xvdivdp", "xvdivsp", "xvmaddadp", "xvmaddasp", "xvmaddmdp", "xvmaddmsp", "xvmaxdp", "xvmaxsp", "xvmindp", "xvminsp", "xvmovsp", "xvmsubadp", "xvmsubasp", "xvmsubmdp", "xvmsubmsp", "xvmuldp", "xvmulsp", "xvnabsdp", "xvnabssp", "xvnegdp", "xvnegsp", "xvnmaddadp", "xvnmaddasp", "xvnmaddmdp", "xvnmaddmsp", "xvnmsubadp", "xvnmsubasp", "xvnmsubmdp", "xvnmsubmsp", "xvrdpi", "xvrdpic", "xvrdpim", "xvrdpip", "xvrdpiz", "xvredp", "xvresp", "xvrspi", "xvrspic", "xvrspim", "xvrspip", "xvrspiz", "xvrsqrtedp", "xvrsqrtesp", "xvsqrtdp", "xvsqrtsp", "xvsubdp", "xvsubsp", "xvtdivdp", "xvtdivsp", "xvtsqrtdp", "xvtsqrtsp", "xxland", "xxlandc", "xxlnor", "xxlor", "xxlxor", "xxmrghw", "xxmrglw", "xxsel", "xxsldwi", "xxspltd", "xxspltw", "xxswapd">: Add VSX opcodes.
2009-02-26 23:07:33 +01:00
2009-02-26 Peter Bergner <bergner@vnet.ibm.com>
* ppc-dis.c (powerpc_init_dialect): Extend -Mpower7 to disassemble
the power7 and the isel instructions.
* ppc-opc.c (insert_xc6, extract_xc6): New static functions.
(insert_dm, extract_dm): Likewise.
(XB6): Update comment to include XX2 form.
(WC, XC6, SHW, DMEX, UIM, XX2, XX3RC, XX4, XX2_MASK, XX2UIM_MASK,
XX2BF_MASK, XX3BF_MASK, XX3SHW_MASK, XX4_MASK, XWC_MASK, POWER7): New.
(RemoveXX3DM): Delete.
(powerpc_opcodes): <"lfdp", "lfdpx", "mcrxr", "mftb", "mffgpr",
"mftgpr">: Deprecate for POWER7.
<"fres", "fres.", "frsqrtes", "frsqrtes.", "fre", "fre.", "frsqrte",
"frsqrte.">: Deprecate the three operand form and enable the two
operand form for POWER7 and later.
<"wait">: Extend to accept optional parameter. Enable for POWER7.
<"waitsrv", "waitimpl">: Add extended opcodes.
<"ldbrx", "stdbrx">: Enable for POWER7.
<"cdtbcd", "cbcdtd", "addg6s">: Add POWER6 opcodes.
<"bpermd", "dcbtstt", "dcbtt", "dcffix.", "dcffix", "divde.", "divde",
"divdeo.", "divdeo", "divdeu.", "divdeu", "divdeuo.", "divdeuo",
"divwe.", "divwe", "divweo.", "divweo", "divweu.", "divweu", "divweuo.",
"divweuo", "fcfids.", "fcfids", "fcfidu.", "fcfidu", "fcfidus.",
"fcfidus", "fctidu.", "fctidu", "fctiduz.", "fctiduz", "fctiwu.",
"fctiwu", "fctiwuz.", "fctiwuz", "ftdiv", "ftsqrt", "lbarx", "lfiwzx",
"lharx", "popcntd", "popcntw", "stbcx.", "sthcx.">: Add POWER7 opcodes.
<"lxsdux", "lxsdx", "lxvdsx", "lxvw4ux", "lxvw4x", "stxsdux", "stxsdx",
"stxvw4ux", "stxvw4x", "xsabsdp", "xsadddp", "xscmpodp", "xscmpudp",
"xscpsgndp", "xscvdpsp", "xscvdpsxds", "xscvdpsxws", "xscvdpuxds",
"xscvdpuxws", "xscvspdp", "xscvsxddp", "xscvuxddp", "xsdivdp",
"xsmaddadp", "xsmaddmdp", "xsmaxdp", "xsmindp", "xsmsubadp",
"xsmsubmdp", "xsmuldp", "xsnabsdp", "xsnegdp", "xsnmaddadp",
"xsnmaddmdp", "xsnmsubadp", "xsnmsubmdp", "xsrdpi", "xsrdpic",
"xsrdpim", "xsrdpip", "xsrdpiz", "xsredp", "xsrsqrtedp", "xssqrtdp",
"xssubdp", "xstdivdp", "xstsqrtdp", "xvabsdp", "xvabssp", "xvadddp",
"xvaddsp", "xvcmpeqdp.", "xvcmpeqdp", "xvcmpeqsp.", "xvcmpeqsp",
"xvcmpgedp.", "xvcmpgedp", "xvcmpgesp.", "xvcmpgesp", "xvcmpgtdp.",
"xvcmpgtdp", "xvcmpgtsp.", "xvcmpgtsp", "xvcpsgnsp", "xvcvdpsp",
"xvcvdpsxds", "xvcvdpsxws", "xvcvdpuxds", "xvcvdpuxws", "xvcvspdp",
"xvcvspsxds", "xvcvspsxws", "xvcvspuxds", "xvcvspuxws", "xvcvsxddp",
"xvcvsxdsp", "xvcvsxwdp", "xvcvsxwsp", "xvcvuxddp", "xvcvuxdsp",
"xvcvuxwdp", "xvcvuxwsp", "xvdivdp", "xvdivsp", "xvmaddadp",
"xvmaddasp", "xvmaddmdp", "xvmaddmsp", "xvmaxdp", "xvmaxsp",
"xvmindp", "xvminsp", "xvmovsp", "xvmsubadp", "xvmsubasp", "xvmsubmdp",
"xvmsubmsp", "xvmuldp", "xvmulsp", "xvnabsdp", "xvnabssp", "xvnegdp",
"xvnegsp", "xvnmaddadp", "xvnmaddasp", "xvnmaddmdp", "xvnmaddmsp",
"xvnmsubadp", "xvnmsubasp", "xvnmsubmdp", "xvnmsubmsp", "xvrdpi",
"xvrdpic", "xvrdpim", "xvrdpip", "xvrdpiz", "xvredp", "xvresp",
"xvrspi", "xvrspic", "xvrspim", "xvrspip", "xvrspiz", "xvrsqrtedp",
"xvrsqrtesp", "xvsqrtdp", "xvsqrtsp", "xvsubdp", "xvsubsp", "xvtdivdp",
"xvtdivsp", "xvtsqrtdp", "xvtsqrtsp", "xxland", "xxlandc", "xxlnor",
"xxlor", "xxlxor", "xxmrghw", "xxmrglw", "xxsel", "xxsldwi", "xxspltd",
"xxspltw", "xxswapd">: Add VSX opcodes.
2009-02-23 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (operand_type_init): Remove OPERAND_TYPE_VEX_IMM4.
(operand_types): Remove Vex_Imm4.
* i386-opc.h (Vex_Imm4): Removed.
(OTMax): Updated.
(i386_operand_type): Remove vex_imm4.
* i386-opc.tbl: Remove Vex_Imm4 comments.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2009-02-23 Richard Earnshaw <rearnsha@arm.com>
* arm-dis.c (neon_opcodes): Correct bit-mask and patterns for
vq{r}shr{u}n.s64 insnstructions.
2009-02-19 Peter Bergner <bergner@vnet.ibm.com>
* ppc-opc.c (powerpc_opcodes) <"lfdepx", "stfdepx">: Fix the first
operand to be a float point register (FRT/FRS).
2009-02-18 Adam Nemet <anemet@caviumnetworks.com>
* mips-opc.c (mips_builtin_opcodes): Move the Octeon-specific
dmfc2 and dmtc2 before the architecture-level variants.
2009-02-18 Pierre Muller <muller@ics.u-strasbg.fr>
* fr30-opc.c: Regenerate.
* frv-opc.c: Regenerate.
* ip2k-opc.c: Regenerate.
* iq2000-opc.c: Regenerate.
* lm32-opc.c: Regenerate.
* m32c-opc.c: Regenerate.
* m32r-opc.c: Regenerate.
* mep-opc.c: Regenerate.
* mt-opc.c: Regenerate.
* xc16x-opc.c: Regenerate.
* xstormy16-opc.c: Regenerate.
* tic54x-dis.c (print_instruction): Avoid compiler warning on
sprintf call.
2009-02-12 Nathan Sidwell <nathan@codesourcery.com>
* m68k-opc.c (m68k_opcodes): Add stldsr instruction.
2009-02-05 Peter Bergner <bergner@vnet.ibm.com>
* ppc-opc.c: Update copyright year.
(powerpc_opcodes) <"dcbt", "dcbtst">: Deprecate the Embedded operand
ordering for POWER4 and later and use the correct Server ordering.
gas/ 2009-02-04 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (January, 2009) * config/tc-i386.c (CPU_FLAGS_PCLMUL_MATCH): New. (CPU_FLAGS_AVX_MATCH): Updated. (CPU_FLAGS_32BIT_MATCH): Likewise. (cpu_flags_match): Likewise. gas/testsuite/ 2009-02-04 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (January, 2009) * gas/i386/arch-avx-1-3.l: New. * gas/i386/arch-avx-1-3.s: Likewise. * gas/i386/arch-avx-1-4.l: Likewise. * gas/i386/arch-avx-1-4.s: Likewise. * gas/i386/arch-avx-1-5.l: Likewise. * gas/i386/arch-avx-1-5.s: Likewise. * gas/i386/arch-avx-1-6.l: Likewise. * gas/i386/arch-avx-1-6.s: Likewise. * gas/i386/arch-10.s: Add vpclmul instructions. * gas/i386/arch-avx-1.s: Likewise. * gas/i386/avx.s: Likewise. * gas/i386/x86-64-arch-2.s: Likewise. * gas/i386/x86-64-avx.s: Likewise. * gas/i386/sse2avx.s: Add pclmul instructions. * gas/i386/x86-64-sse2avx.s: Likewise. * gas/i386/arch-10.d: Updated. * gas/i386/arch-10-1.l: Likewise. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/arch-avx-1.d: Likewise. * gas/i386/arch-avx-1-1.l: Likewise. * gas/i386/arch-avx-1-2.l: Likewise. * gas/i386/avx.d: Likewise. * gas/i386/avx-intel.d: Likewise. * gas/i386/sse2avx.d: Likewise. * gas/i386/x86-64-arch-2.d: Likewise. * gas/i386/x86-64-avx.d: Likewise. * gas/i386/x86-64-avx-intel.d: Likewise. * gas/i386/x86-64-sse2avx.d: Likewise. * gas/i386/i386.exp: Run arch-avx-1-3, arch-avx-1-4, arch-avx-1-5 and arch-avx-1-6. opcodes/ 2009-02-04 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (January, 2009) * i386-dis.c (PREFIX_VEX_3A44): New. (VEX_LEN_3A44_P_2): Likewise. (PREFIX_VEX_3A48): Updated. (VEX_LEN_3A4C_P_2): Likewise. (prefix_table): Add PREFIX_VEX_3A44. (vex_table): Likewise. (vex_len_table): Add VEX_LEN_3A44_P_2. * i386-opc.tbl: Add PCLMUL + AVX instructions. * i386-tbl.h: Regenerated.
2009-02-04 17:03:31 +01:00
2009-02-04 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (January, 2009)
* i386-dis.c (PREFIX_VEX_3A44): New.
(VEX_LEN_3A44_P_2): Likewise.
(PREFIX_VEX_3A48): Updated.
(VEX_LEN_3A4C_P_2): Likewise.
(prefix_table): Add PREFIX_VEX_3A44.
(vex_table): Likewise.
(vex_len_table): Add VEX_LEN_3A44_P_2.
* i386-opc.tbl: Add PCLMUL + AVX instructions.
* i386-tbl.h: Regenerated.
2009-02-03 Sandip Matte <sandip@rmicorp.com>
* mips-dis.c (mips_cp0_names_xlr, mips_cp0sel_names_xlr): Define.
(mips_arch_choices): Add XLR entry.
* mips-opc.c (XLR): Define.
(mips_builtin_opcodes): Add XLR instructions.
bfd: 2009-02-03 Carlos O'Donell <carlos@codesourcery.com> * configure.in: AC_SUBST pdfdir. * Makefile.am: Add install-pdf, install-pdf-am and install-pdf-recursive targets. Define pdfdir. * doc/Makefile.am: Define pdf__strip_dir. Add install-pdf and install-pdf-am targets. * po/Make-in: Add install-pdf target. * configure: Regenerate. * Makefile.in: Regenerate * doc/Makefile.in: Regenerate. binutils: 2009-02-03 Carlos O'Donell <carlos@codesourcery.com> * configure.in: AC_SUBST pdfdir. * Makefile.am: Add install-pdf, install-pdf-am, and install-pdf-recursive targets. * doc/Makefile.am: Define pdf__strip_dir. Add install-pdf and install-pdf-am targets. * po/Make-in: Add install-pdf target. * configure: Regenerate. * Makefile.in: Regenerate. * doc/Makefile.in: Regenerate. etc: 2009-02-03 Carlos O'Donell <carlos@codesourcery.com> * configure.in: AC_SUBST pdfdir. * configure: Regenerate. gas: 2009-02-03 Carlos O'Donell <carlos@codesourcery.com> * configure.in: AC_SUBST pdfdir. * Makefile.am: Add install-pdf, install-pdf-am, and install-pdf-recursive targets. * doc/Makefile.am: Define pdf__strip_dir. Add install-pdf and install-pdf-am targets. * po/Make-in: Add install-pdf target. * configure: Regenerate. * Makefile.in: Regenerate. * doc/Makefile.in: Regenerate. gprof: 2009-02-03 Carlos O'Donell <carlos@codesourcery.com> * configure.in: AC_SUBST pdfdir. * Makefile.am: Add install-pdf, install-pdf-am, and install-pdf-recursive targets. Define pdf__strip_dir. * po/Make-in: Add install-pdf target. * configure: Regenerate. * Makefile.in: Regenerate. ld: 2009-02-03 Carlos O'Donell <carlos@codesourcery.com> * configure.in: AC_SUBST pdfdir. * Makefile.am: Add install-pdf, install-pdf-am, and install-pdf-recursive targets. Define pdf__strip_dir. * po/Make-in: Add install-pdf target. * configure: Regenerate. * Makefile.in: Regenerate. opcodes: 2009-02-03 Carlos O'Donell <carlos@codesourcery.com> * Makefile.am: Add install-pdf target. * po/Make-in: Add install-pdf target. * Makefile.in: Regenerate.
2009-02-03 16:54:05 +01:00
2009-02-03 Carlos O'Donell <carlos@codesourcery.com>
* Makefile.am: Add install-pdf target.
* po/Make-in: Add install-pdf target.
* Makefile.in: Regenerate.
2009-02-02 DJ Delorie <dj@redhat.com>
* mep-asm.c: Regenerate.
* mep-desc.c: Regenerate.
* mep-desc.h: Regenerate.
* mep-dis.c: Regenerate.
* mep-ibld.c: Regenerate.
* mep-opc.c: Regenerate.
* mep-opc.h: Regenerate.
2009-01-29 Mark Mitchell <mark@codesourcery.com>
* arm-dis.c (thumb32_opcodes): Correct decoding for qadd, qdadd,
qsub, and qdsub.
2009-01-28 Chao-ying Fu <fu@mips.com>
* mips-opc.c (suxc1): Add the flag of FP_D.
2009-01-20 08:22:30 +01:00
2009-01-20 Alan Modra <amodra@bigpond.net.au>
* fr30-asm.c, fr30-dis.c, fr30-ibld.c, frv-asm.c, frv-dis.c,
* frv-ibld.c, ip2k-asm.c, ip2k-dis.c, ip2k-ibld.c,
* iq2000-asm.c, iq2000-dis.c, iq2000-ibld.c, m32c-asm.c,
* m32c-dis.c, m32c-ibld.c, m32r-asm.c, m32r-dis.c,
* m32r-ibld.c, mep-asm.c, mep-dis.c, mep-ibld.c, mt-asm.c,
* mt-dis.c, mt-ibld.c, openrisc-asm.c, openrisc-dis.c,
* openrisc-ibld.c, xc16x-asm.c, xc16x-dis.c, xc16x-ibld.c,
* xstormy16-asm.c, xstormy16-dis.c, xstormy16-ibld.c: Regenerate.
2009-01-16 Alan Modra <amodra@bigpond.net.au>
* configure.in (commonbfdlib): Delete.
(SHARED_LIBADD): Add pic libiberty if such is available.
* configure: Regenerate.
* po/POTFILES.in: Regenerate.
2009-01-14 Peter Bergner <bergner@vnet.ibm.com>
* ppc-dis.c (print_insn_powerpc): Skip insn if it is deprecated.
* ppc-opc.c (powerpc_opcodes) <mtfsf, mtfsf.>: Deprecate the two
operand form and enable the four operand form for POWER6 and later.
<mtfsfi, mtfsfi.>: Deprecate the two operand form and enable the
three operand form for POWER6 and later.
2009-01-14 Mike Frysinger <vapier@gentoo.org>
* bfin-dis.c (OUTS): Use "%s" as format string.
2009-01-13 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (cpu_flag_init): Remove a white space.
(operand_type_init): Likewise.
2009-01-12 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.tbl: Add NoAVX to movnti, lfence and mfence.
* i386-tbl.h: Regenerated.
2009-01-12 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (dis386): Use EbS on addB, orB, adcB, sbbB, andB,
subB, xorB and cmpB. Use EvS on addS, orS, adcS, sbbS, andS,
subS, xorS and cmpS.
gas/ 2009-01-10 H.J. Lu <hongjiu.lu@intel.com> * gas/config/tc-i386.c (cpu_arch): Add corei7, .clflush and .syscall. (i386_align_code): Handle PROCESSOR_COREI7. (md_show_usage): Add corei7, clflush and syscall. (i386_target_format): Replace cpup4 with cpuclflush. * gas/config/tc-i386.h (processor_type): Add PROCESSOR_COREI7. * doc/c-i386.texi: Document corei7, clflush and syscall. gas/testsuite/ 2009-01-10 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/arch-10.s: Add clflush and syscall. * gas/i386/x86-64-arch-2.s: Likewise. * gas/i386/arch-10.d: Updated. * gas/i386/arch-10-1.l: Likewise. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/x86-64-arch-2.d: Likewise. opcodes/ 2009-01-10 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (cpu_flag_init): Replace CpuP4 and CpuK6 with CpuClflush and CpuSYSCALL, respectively. Remove CpuK8. Add CPU_COREI7_FLAGS, CPU_CLFLUSH_FLAGS and CPU_SYSCALL_FLAGS. (cpu_flags): Remove CpuP4, CpuK6 and CpuK8. Add CpuClflush and CpuSYSCALL. (lineno): Removed. (set_bitfield): Take an argument, lineno. Don't report lineno on error if it is -1. (process_i386_cpu_flag): Take an argument, lineno. (process_i386_opcode_modifier): Likewise. (process_i386_operand_type): Likewise. (output_i386_opcode): Likewise. (opcode_hash_entry): Add lineno. (process_i386_opcodes): Updated. (process_i386_registers): Likewise. (process_i386_initializers): Likewise. * i386-opc.h (CpuP4): Removed. (CpuK6): Likewise. (CpuK8): Likewise. (CpuClflush): New. (CpuSYSCALL): Likewise. (CpuMMX): Updated. (i386_cpu_flags): Remove cpup4, cpuk6 and cpuk8. Add cpuclflush and cpusyscall. * i386-opc.tbl: Update movnti, clflush, lfence, mfence, pause, syscall and sysret. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2009-01-10 18:25:52 +01:00
2009-01-10 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (cpu_flag_init): Replace CpuP4 and CpuK6 with
CpuClflush and CpuSYSCALL, respectively. Remove CpuK8. Add
CPU_COREI7_FLAGS, CPU_CLFLUSH_FLAGS and CPU_SYSCALL_FLAGS.
(cpu_flags): Remove CpuP4, CpuK6 and CpuK8. Add CpuClflush
and CpuSYSCALL.
(lineno): Removed.
(set_bitfield): Take an argument, lineno. Don't report lineno
on error if it is -1.
(process_i386_cpu_flag): Take an argument, lineno.
(process_i386_opcode_modifier): Likewise.
(process_i386_operand_type): Likewise.
(output_i386_opcode): Likewise.
(opcode_hash_entry): Add lineno.
(process_i386_opcodes): Updated.
(process_i386_registers): Likewise.
(process_i386_initializers): Likewise.
* i386-opc.h (CpuP4): Removed.
(CpuK6): Likewise.
(CpuK8): Likewise.
(CpuClflush): New.
(CpuSYSCALL): Likewise.
(CpuMMX): Updated.
(i386_cpu_flags): Remove cpup4, cpuk6 and cpuk8. Add
cpuclflush and cpusyscall.
* i386-opc.tbl: Update movnti, clflush, lfence, mfence, pause,
syscall and sysret.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2009-01-09 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (cpu_flag_init): Add CpuRdtscp to CPU_K8_FLAGS
and CPU_AMDFAM10_FLAGS. Add CPU_RDTSCP_FLAGS.
(cpu_flags): Add CpuRdtscp.
(set_bitfield): Remove CpuSledgehammer check.
* i386-opc.h (CpuRdtscp): New.
(CpuLM): Updated.
(i386_cpu_flags): Add cpurdtscp.
* i386-opc.tbl: Replace CpuSledgehammer with CpuRdtscp.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2009-01-09 Peter Bergner <bergner@vnet.ibm.com>
* ppc-opc.c (PPCNONE): Define.
(NOPOWER4): Delete.
(powerpc_opcodes): Initialize the new "deprecated" field.
2009-01-06 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (December, 2008)
* i386-dis.c (VEX_LEN_2B_M_0): Removed.
(VEX_LEN_E7_P_2_M_0): Likewise.
(VEX_LEN_2C_P_1): Updated.
(VEX_LEN_E8_P_2): Likewise.
(vex_len_table): Remove VEX_LEN_2B_M_0 and VEX_LEN_E7_P_2_M_0.
(mod_table): Likewise.
* i386-opc.tbl: Add 256bit vmovntdq, vmovntpd and vmovntps.
* i386-tbl.h: Regenerated.
2009-01-05 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (process_copyright): Update for 2009.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
gas/ 2009-01-05 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (December, 2008) * config/tc-i386.c (build_modrm_byte): Remove 5 operand instruction support. Don't swap REG and NDS for FMA. gas/testsuite/ 2009-01-05 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (December, 2008) * gas/i386/arch-10.s: Replace vfmaddpd with vfmadd132pd. * gas/i386/x86-64-arch-2.s: Likewise. * gas/i386/arch-10.d: Updated. * gas/i386/arch-10-1.l: Likewise. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/avx.d: Likewise. * gas/i386/avx-intel.d: Likewise. * gas/i386/inval-avx.l: Likewise. * gas/i386/x86-64-arch-2.d: Likewise. * gas/i386/x86-64-avx.d: Likewise. * gas/i386/x86-64-avx-intel.d: Likewise. * gas/i386/x86-64-inval-avx.l: Likewise. * gas/i386/avx.s: Remove vpermil2ps/vpermil2pd and FMA instructions. Update tests. * gas/i386/inval-avx.s: Likewise. * gas/i386/x86-64-avx.s: Likewise. * gas/i386/x86-64-inval-avx.s: Likewise. * gas/i386/fma.d: New. * gas/i386/fma.s: Likewise. * gas/i386/fma-intel.d: Likewise. * gas/i386/x86-64-fma.d: Likewise. * gas/i386/x86-64-fma.s: Likewise. * gas/i386/x86-64-fma-intel.d: Likewise. * gas/i386/i386.exp: Run fma, fma-intel, x86-64-fma and x86-64-fma-intel. opcodes/ 2009-01-05 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (December, 2008) * i386-dis.c (OP_VEX_FMA): Removed. (OP_EX_VexW): Likewise. (OP_EX_VexImmW): Likewise. (OP_XMM_VexW): Likewise. (VEXI4_Fixup): Likewise. (VPERMIL2_Fixup): Likewise. (VexI4): Likewise. (VexFMA): Likewise. (Vex128FMA): Likewise. (EXVexW): Likewise. (EXdVexW): Likewise. (EXqVexW): Likewise. (EXVexImmW): Likewise. (XMVexW): Likewise. (VPERMIL2): Likewise. (PREFIX_VEX_3A48...PREFIX_VEX_3A4A): Likewise. (PREFIX_VEX_3A5C...PREFIX_VEX_3A5F): Likewise. (PREFIX_VEX_3A68...PREFIX_VEX_3A6F): Likewise. (PREFIX_VEX_3A78...PREFIX_VEX_3A7F): Likewise. (VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2): Likewise. (VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2): Likewise. (get_vex_imm8): Likewise. (OP_EX_VexReg): Likewise. vpermil2_op): Likewise. (EXVexWdq): New. (vex_w_dq_mode): Likewise. (PREFIX_VEX_3896...PREFIX_VEX_389F): Likewise. (PREFIX_VEX_38A6...PREFIX_VEX_38AF): Likewise. (PREFIX_VEX_38B6...PREFIX_VEX_38BF): Likewise. (es_reg): Updated. (PREFIX_VEX_38DB): Likewise. (PREFIX_VEX_3A4A): Likewise. (PREFIX_VEX_3A60): Likewise. (PREFIX_VEX_3ADF): Likewise. (VEX_LEN_3ADF_P_2): Likewise. (prefix_table): Remove PREFIX_VEX_3A48...PREFIX_VEX_3A4A, PREFIX_VEX_3A5C...PREFIX_VEX_3A5F, PREFIX_VEX_3A68...PREFIX_VEX_3A6F and PREFIX_VEX_3A78...PREFIX_VEX_3A7F. Add PREFIX_VEX_3896...PREFIX_VEX_389F, PREFIX_VEX_38A6...PREFIX_VEX_38AF and PREFIX_VEX_38B6...PREFIX_VEX_38BF. (vex_table): Likewise. (vex_len_table): Remove VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2 and VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2. (putop): Support "%XW". (intel_operand_size): Handle vex_w_dq_mode. * i386-opc.h (VexNDS): Add a comment for VEX NDS and VEX DDS. * i386-opc.tbl: Remove vpermil2pd/vpermil2ps and old FMA instructions. Add new FMA instructions. * i386-tbl.h: Regenerated.
2009-01-06 02:03:27 +01:00
2009-01-05 H.J. Lu <hongjiu.lu@intel.com>
gas/ 2009-01-05 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (December, 2008) * config/tc-i386.c (build_modrm_byte): Remove 5 operand instruction support. Don't swap REG and NDS for FMA. gas/testsuite/ 2009-01-05 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (December, 2008) * gas/i386/arch-10.s: Replace vfmaddpd with vfmadd132pd. * gas/i386/x86-64-arch-2.s: Likewise. * gas/i386/arch-10.d: Updated. * gas/i386/arch-10-1.l: Likewise. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/avx.d: Likewise. * gas/i386/avx-intel.d: Likewise. * gas/i386/inval-avx.l: Likewise. * gas/i386/x86-64-arch-2.d: Likewise. * gas/i386/x86-64-avx.d: Likewise. * gas/i386/x86-64-avx-intel.d: Likewise. * gas/i386/x86-64-inval-avx.l: Likewise. * gas/i386/avx.s: Remove vpermil2ps/vpermil2pd and FMA instructions. Update tests. * gas/i386/inval-avx.s: Likewise. * gas/i386/x86-64-avx.s: Likewise. * gas/i386/x86-64-inval-avx.s: Likewise. * gas/i386/fma.d: New. * gas/i386/fma.s: Likewise. * gas/i386/fma-intel.d: Likewise. * gas/i386/x86-64-fma.d: Likewise. * gas/i386/x86-64-fma.s: Likewise. * gas/i386/x86-64-fma-intel.d: Likewise. * gas/i386/i386.exp: Run fma, fma-intel, x86-64-fma and x86-64-fma-intel. opcodes/ 2009-01-05 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (December, 2008) * i386-dis.c (OP_VEX_FMA): Removed. (OP_EX_VexW): Likewise. (OP_EX_VexImmW): Likewise. (OP_XMM_VexW): Likewise. (VEXI4_Fixup): Likewise. (VPERMIL2_Fixup): Likewise. (VexI4): Likewise. (VexFMA): Likewise. (Vex128FMA): Likewise. (EXVexW): Likewise. (EXdVexW): Likewise. (EXqVexW): Likewise. (EXVexImmW): Likewise. (XMVexW): Likewise. (VPERMIL2): Likewise. (PREFIX_VEX_3A48...PREFIX_VEX_3A4A): Likewise. (PREFIX_VEX_3A5C...PREFIX_VEX_3A5F): Likewise. (PREFIX_VEX_3A68...PREFIX_VEX_3A6F): Likewise. (PREFIX_VEX_3A78...PREFIX_VEX_3A7F): Likewise. (VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2): Likewise. (VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2): Likewise. (get_vex_imm8): Likewise. (OP_EX_VexReg): Likewise. vpermil2_op): Likewise. (EXVexWdq): New. (vex_w_dq_mode): Likewise. (PREFIX_VEX_3896...PREFIX_VEX_389F): Likewise. (PREFIX_VEX_38A6...PREFIX_VEX_38AF): Likewise. (PREFIX_VEX_38B6...PREFIX_VEX_38BF): Likewise. (es_reg): Updated. (PREFIX_VEX_38DB): Likewise. (PREFIX_VEX_3A4A): Likewise. (PREFIX_VEX_3A60): Likewise. (PREFIX_VEX_3ADF): Likewise. (VEX_LEN_3ADF_P_2): Likewise. (prefix_table): Remove PREFIX_VEX_3A48...PREFIX_VEX_3A4A, PREFIX_VEX_3A5C...PREFIX_VEX_3A5F, PREFIX_VEX_3A68...PREFIX_VEX_3A6F and PREFIX_VEX_3A78...PREFIX_VEX_3A7F. Add PREFIX_VEX_3896...PREFIX_VEX_389F, PREFIX_VEX_38A6...PREFIX_VEX_38AF and PREFIX_VEX_38B6...PREFIX_VEX_38BF. (vex_table): Likewise. (vex_len_table): Remove VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2 and VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2. (putop): Support "%XW". (intel_operand_size): Handle vex_w_dq_mode. * i386-opc.h (VexNDS): Add a comment for VEX NDS and VEX DDS. * i386-opc.tbl: Remove vpermil2pd/vpermil2ps and old FMA instructions. Add new FMA instructions. * i386-tbl.h: Regenerated.
2009-01-06 02:03:27 +01:00
AVX Programming Reference (December, 2008)
* i386-dis.c (OP_VEX_FMA): Removed.
binutils/ 2008-04-03 H.J. Lu <hongjiu.lu@intel.com> * dwarf.c (dwarf_regnames_i386): Add AVX registers. (dwarf_regnames_x86_64): Likewise. gas/ 2008-04-03 H.J. Lu <hongjiu.lu@intel.com> * NEWS: Mention AES, CLMUL, AVX/FMA and -msse2avx. * doc/c-i386.texi: Add avx, aes, clmul and fma to -march=. Document -msse2avx, .avx, .aes, .clmul and .fma. * config/tc-i386.c (YMMWORD_MNEM_SUFFIX): New. (vex_prefix): Likewise. (sse2avx): Likewise. (CPU_FLAGS_ARCH_MATCH): Likewise. (CPU_FLAGS_64BIT_MATCH): Likewise. (CPU_FLAGS_32BIT_MATCH): Likewise. (CPU_FLAGS_PERFECT_MATCH): Likewise. (regymm): Likewise. (vex_imm4): Likewise. (fits_in_imm4): Likewise. (build_vex_prefix): Likewise. (VEX_check_operands): Likewise. (bad_implicit_operand): Likewise. (OPTION_MSSE2AVX): Likewise. (T_YMMWORD): Likewise. (_i386_insn): Add vex. (cpu_arch): Add .avx, .aes, .clmul and .fma. (cpu_flags_match): Changed to take a pointer to const template. Enable encoding SSE instructions with VEX prefix for -msse2avx. (match_mem_size): Also check ymmword. (operand_type_match): Clear ymmword. (md_begin): Allow '_' in mnemonic. (type_names): Add OPERAND_TYPE_VEX_IMM4. (process_immext): Update assert. (md_assemble): Don't call process_immext if sse2avx and immext are true. Call build_vex_prefix if vex is true. (parse_insn): Updated for cpu_flags_match. (swap_operands): Handle 5 operands. (match_template): Handle 5 operands. Updated for cpu_flags_match. Check regymm. Call VEX_check_operands. Handle YMMWORD_MNEM_SUFFIX. (process_suffix): Handle YMMWORD_MNEM_SUFFIX. (check_byte_reg): Check regymm. (process_operands): Duplicate the destination register for -msse2avx if needed. (build_modrm_byte): Updated for instructions with VEX encoding. (output_insn): Output VEX prefix if needed. (md_longopts): Add msse2avx. (md_parse_option): Handle OPTION_MSSE2AVX. (md_show_usage): Add avx, aes, clmul, fma and -msse2avx. (intel_e09): Support YMMWORD. (intel_e11): Likewise. (intel_get_token): Likewise. gas/testsuite/ 2008-04-03 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Run aes, aes-intel, x86-64-aes, x86-64-aes-intel, avx, avx-intel, inval-avx, x86-64-avx, x86-64-avx-intel and x86-64-inval-avx. * gas/cfi/cfi-i386.s: Add tests for AVX register maps. * gas/cfi/cfi-x86_64.s: Likewise. * gas/i386/aes.d: New. * gas/i386/aes.s: Likewise. * gas/i386/aes-intel.d: Likewise. * gas/i386/avx.d: Likewise. * gas/i386/avx.s: Likewise. * gas/i386/avx-intel.d: Likewise. * gas/i386/clmul.d: Likewise. * gas/i386/clmul-intel.d: Likewise. * gas/i386/clmul.s: Likewise. * gas/i386/i386.exp: Likewise. * gas/i386/inval-avx.l: Likewise. * gas/i386/inval-avx.s: Likewise. * gas/i386/sse2avx.d: Likewise. * gas/i386/sse2avx.s: Likewise. * gas/i386/x86-64-aes.d: Likewise. * gas/i386/x86-64-aes.s: Likewise. * gas/i386/x86-64-aes-intel.d: Likewise. * gas/i386/x86-64-avx.d: Likewise. * gas/i386/x86-64-avx.s: Likewise. * gas/i386/x86-64-avx-intel.d: Likewise. * gas/i386/x86-64-clmul.d: Likewise. * gas/i386/x86-64-clmul-intel.d: Likewise. * gas/i386/x86-64-clmul.s: Likewise. * gas/i386/x86-64-inval-avx.l: Likewise. * gas/i386/x86-64-inval-avx.s: Likewise. * gas/i386/x86-64-sse2avx.d: Likewise. * gas/i386/x86-64-sse2avx.s: Likewise. * gas/i386/arch-10.s: Add tests for AVX, AES, CLMUL and FMA. * gas/i386/x86-64-arch-2.s: Likewise. * gas/i386/rexw.s: Add AVX tests. * gas/i386/x86-64-opcode-inval.s: Remove lds/les test. * gas/cfi/cfi-i386.d: Updated. * gas/cfi/cfi-x86_64.d: Likewise. * gas/i386/arch-10.d: Likewise. * gas/i386/arch-10-1.l: Likewise. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/rexw.d: Likewise. * gas/i386/x86-64-arch-2.d: Likewise. * gas/i386/x86-64-opcode-inval.d: Likewise. * gas/i386/x86-64-opcode-inval-intel.d: Likewise. include/opcode/ 2008-04-03 H.J. Lu <hongjiu.lu@intel.com> * i386.h (MAX_OPERANDS): Set to 5. (MAX_MNEM_SIZE): Changed to 20. opcodes/ 2008-04-03 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (OP_E_register): New. (OP_E_memory): Likewise. (OP_VEX): Likewise. (OP_EX_Vex): Likewise. (OP_EX_VexW): Likewise. (OP_XMM_Vex): Likewise. (OP_XMM_VexW): Likewise. (OP_REG_VexI4): Likewise. (PCLMUL_Fixup): Likewise. (VEXI4_Fixup): Likewise. (VZERO_Fixup): Likewise. (VCMP_Fixup): Likewise. (VPERMIL2_Fixup): Likewise. (rex_original): Likewise. (rex_ignored): Likewise. (Mxmm): Likewise. (XMM): Likewise. (EXxmm): Likewise. (EXxmmq): Likewise. (EXymmq): Likewise. (Vex): Likewise. (Vex128): Likewise. (Vex256): Likewise. (VexI4): Likewise. (EXdVex): Likewise. (EXqVex): Likewise. (EXVexW): Likewise. (EXdVexW): Likewise. (EXqVexW): Likewise. (XMVex): Likewise. (XMVexW): Likewise. (XMVexI4): Likewise. (PCLMUL): Likewise. (VZERO): Likewise. (VCMP): Likewise. (VPERMIL2): Likewise. (xmm_mode): Likewise. (xmmq_mode): Likewise. (ymmq_mode): Likewise. (vex_mode): Likewise. (vex128_mode): Likewise. (vex256_mode): Likewise. (USE_VEX_C4_TABLE): Likewise. (USE_VEX_C5_TABLE): Likewise. (USE_VEX_LEN_TABLE): Likewise. (VEX_C4_TABLE): Likewise. (VEX_C5_TABLE): Likewise. (VEX_LEN_TABLE): Likewise. (REG_VEX_XX): Likewise. (MOD_VEX_XXX): Likewise. (PREFIX_0F38DB..PREFIX_0F38DF): Likewise. (PREFIX_0F3A44): Likewise. (PREFIX_0F3ADF): Likewise. (PREFIX_VEX_XXX): Likewise. (VEX_OF): Likewise. (VEX_OF38): Likewise. (VEX_OF3A): Likewise. (VEX_LEN_XXX): Likewise. (vex): Likewise. (need_vex): Likewise. (need_vex_reg): Likewise. (vex_i4_done): Likewise. (vex_table): Likewise. (vex_len_table): Likewise. (OP_REG_VexI4): Likewise. (vex_cmp_op): Likewise. (pclmul_op): Likewise. (vpermil2_op): Likewise. (m_mode): Updated. (es_reg): Likewise. (PREFIX_0F38F0): Likewise. (PREFIX_0F3A60): Likewise. (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE. (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF and PREFIX_VEX_XXX entries. (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE. (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and PREFIX_0F3ADF. (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE. Add MOD_VEX_XXX entries. (ckprefix): Initialize rex_original and rex_ignored. Store the REX byte in rex_original. (get_valid_dis386): Handle the implicit prefix in VEX prefix bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE. (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before calling get_valid_dis386. Use rex_original and rex_ignored when printing out REX. (putop): Handle "XY". (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and ymmq_mode. (OP_E_extended): Updated to use OP_E_register and OP_E_memory. (OP_XMM): Handle VEX. (OP_EX): Likewise. (XMM_Fixup): Likewise. (CMP_Fixup): Use ARRAY_SIZE. * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS, CPU_FMA_FLAGS and CPU_AVX_FLAGS. (operand_type_init): Add OPERAND_TYPE_REGYMM and OPERAND_TYPE_VEX_IMM4. (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA. (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD, VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources, VexImmExt and SSE2AVX. (operand_types): Add RegYMM, Ymmword and Vex_Imm4. * i386-opc.h (CpuAVX): New. (CpuAES): Likewise. (CpuCLMUL): Likewise. (CpuFMA): Likewise. (Vex): Likewise. (Vex256): Likewise. (VexNDS): Likewise. (VexNDD): Likewise. (VexW0): Likewise. (VexW1): Likewise. (Vex0F): Likewise. (Vex0F38): Likewise. (Vex0F3A): Likewise. (Vex3Sources): Likewise. (VexImmExt): Likewise. (SSE2AVX): Likewise. (RegYMM): Likewise. (Ymmword): Likewise. (Vex_Imm4): Likewise. (Implicit1stXmm0): Likewise. (CpuXsave): Updated. (CpuLM): Likewise. (ByteOkIntel): Likewise. (OldGcc): Likewise. (Control): Likewise. (Unspecified): Likewise. (OTMax): Likewise. (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma. (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256, vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a, vex3sources, veximmext and sse2avx. (i386_operand_type): Add regymm, ymmword and vex_imm4. * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions. * i386-reg.tbl: Add AVX registers, ymm0..ymm15. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2008-04-03 16:03:21 +02:00
(OP_EX_VexW): Likewise.
gas/ 2009-01-05 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (December, 2008) * config/tc-i386.c (build_modrm_byte): Remove 5 operand instruction support. Don't swap REG and NDS for FMA. gas/testsuite/ 2009-01-05 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (December, 2008) * gas/i386/arch-10.s: Replace vfmaddpd with vfmadd132pd. * gas/i386/x86-64-arch-2.s: Likewise. * gas/i386/arch-10.d: Updated. * gas/i386/arch-10-1.l: Likewise. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/avx.d: Likewise. * gas/i386/avx-intel.d: Likewise. * gas/i386/inval-avx.l: Likewise. * gas/i386/x86-64-arch-2.d: Likewise. * gas/i386/x86-64-avx.d: Likewise. * gas/i386/x86-64-avx-intel.d: Likewise. * gas/i386/x86-64-inval-avx.l: Likewise. * gas/i386/avx.s: Remove vpermil2ps/vpermil2pd and FMA instructions. Update tests. * gas/i386/inval-avx.s: Likewise. * gas/i386/x86-64-avx.s: Likewise. * gas/i386/x86-64-inval-avx.s: Likewise. * gas/i386/fma.d: New. * gas/i386/fma.s: Likewise. * gas/i386/fma-intel.d: Likewise. * gas/i386/x86-64-fma.d: Likewise. * gas/i386/x86-64-fma.s: Likewise. * gas/i386/x86-64-fma-intel.d: Likewise. * gas/i386/i386.exp: Run fma, fma-intel, x86-64-fma and x86-64-fma-intel. opcodes/ 2009-01-05 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (December, 2008) * i386-dis.c (OP_VEX_FMA): Removed. (OP_EX_VexW): Likewise. (OP_EX_VexImmW): Likewise. (OP_XMM_VexW): Likewise. (VEXI4_Fixup): Likewise. (VPERMIL2_Fixup): Likewise. (VexI4): Likewise. (VexFMA): Likewise. (Vex128FMA): Likewise. (EXVexW): Likewise. (EXdVexW): Likewise. (EXqVexW): Likewise. (EXVexImmW): Likewise. (XMVexW): Likewise. (VPERMIL2): Likewise. (PREFIX_VEX_3A48...PREFIX_VEX_3A4A): Likewise. (PREFIX_VEX_3A5C...PREFIX_VEX_3A5F): Likewise. (PREFIX_VEX_3A68...PREFIX_VEX_3A6F): Likewise. (PREFIX_VEX_3A78...PREFIX_VEX_3A7F): Likewise. (VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2): Likewise. (VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2): Likewise. (get_vex_imm8): Likewise. (OP_EX_VexReg): Likewise. vpermil2_op): Likewise. (EXVexWdq): New. (vex_w_dq_mode): Likewise. (PREFIX_VEX_3896...PREFIX_VEX_389F): Likewise. (PREFIX_VEX_38A6...PREFIX_VEX_38AF): Likewise. (PREFIX_VEX_38B6...PREFIX_VEX_38BF): Likewise. (es_reg): Updated. (PREFIX_VEX_38DB): Likewise. (PREFIX_VEX_3A4A): Likewise. (PREFIX_VEX_3A60): Likewise. (PREFIX_VEX_3ADF): Likewise. (VEX_LEN_3ADF_P_2): Likewise. (prefix_table): Remove PREFIX_VEX_3A48...PREFIX_VEX_3A4A, PREFIX_VEX_3A5C...PREFIX_VEX_3A5F, PREFIX_VEX_3A68...PREFIX_VEX_3A6F and PREFIX_VEX_3A78...PREFIX_VEX_3A7F. Add PREFIX_VEX_3896...PREFIX_VEX_389F, PREFIX_VEX_38A6...PREFIX_VEX_38AF and PREFIX_VEX_38B6...PREFIX_VEX_38BF. (vex_table): Likewise. (vex_len_table): Remove VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2 and VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2. (putop): Support "%XW". (intel_operand_size): Handle vex_w_dq_mode. * i386-opc.h (VexNDS): Add a comment for VEX NDS and VEX DDS. * i386-opc.tbl: Remove vpermil2pd/vpermil2ps and old FMA instructions. Add new FMA instructions. * i386-tbl.h: Regenerated.
2009-01-06 02:03:27 +01:00
(OP_EX_VexImmW): Likewise.
binutils/ 2008-04-03 H.J. Lu <hongjiu.lu@intel.com> * dwarf.c (dwarf_regnames_i386): Add AVX registers. (dwarf_regnames_x86_64): Likewise. gas/ 2008-04-03 H.J. Lu <hongjiu.lu@intel.com> * NEWS: Mention AES, CLMUL, AVX/FMA and -msse2avx. * doc/c-i386.texi: Add avx, aes, clmul and fma to -march=. Document -msse2avx, .avx, .aes, .clmul and .fma. * config/tc-i386.c (YMMWORD_MNEM_SUFFIX): New. (vex_prefix): Likewise. (sse2avx): Likewise. (CPU_FLAGS_ARCH_MATCH): Likewise. (CPU_FLAGS_64BIT_MATCH): Likewise. (CPU_FLAGS_32BIT_MATCH): Likewise. (CPU_FLAGS_PERFECT_MATCH): Likewise. (regymm): Likewise. (vex_imm4): Likewise. (fits_in_imm4): Likewise. (build_vex_prefix): Likewise. (VEX_check_operands): Likewise. (bad_implicit_operand): Likewise. (OPTION_MSSE2AVX): Likewise. (T_YMMWORD): Likewise. (_i386_insn): Add vex. (cpu_arch): Add .avx, .aes, .clmul and .fma. (cpu_flags_match): Changed to take a pointer to const template. Enable encoding SSE instructions with VEX prefix for -msse2avx. (match_mem_size): Also check ymmword. (operand_type_match): Clear ymmword. (md_begin): Allow '_' in mnemonic. (type_names): Add OPERAND_TYPE_VEX_IMM4. (process_immext): Update assert. (md_assemble): Don't call process_immext if sse2avx and immext are true. Call build_vex_prefix if vex is true. (parse_insn): Updated for cpu_flags_match. (swap_operands): Handle 5 operands. (match_template): Handle 5 operands. Updated for cpu_flags_match. Check regymm. Call VEX_check_operands. Handle YMMWORD_MNEM_SUFFIX. (process_suffix): Handle YMMWORD_MNEM_SUFFIX. (check_byte_reg): Check regymm. (process_operands): Duplicate the destination register for -msse2avx if needed. (build_modrm_byte): Updated for instructions with VEX encoding. (output_insn): Output VEX prefix if needed. (md_longopts): Add msse2avx. (md_parse_option): Handle OPTION_MSSE2AVX. (md_show_usage): Add avx, aes, clmul, fma and -msse2avx. (intel_e09): Support YMMWORD. (intel_e11): Likewise. (intel_get_token): Likewise. gas/testsuite/ 2008-04-03 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Run aes, aes-intel, x86-64-aes, x86-64-aes-intel, avx, avx-intel, inval-avx, x86-64-avx, x86-64-avx-intel and x86-64-inval-avx. * gas/cfi/cfi-i386.s: Add tests for AVX register maps. * gas/cfi/cfi-x86_64.s: Likewise. * gas/i386/aes.d: New. * gas/i386/aes.s: Likewise. * gas/i386/aes-intel.d: Likewise. * gas/i386/avx.d: Likewise. * gas/i386/avx.s: Likewise. * gas/i386/avx-intel.d: Likewise. * gas/i386/clmul.d: Likewise. * gas/i386/clmul-intel.d: Likewise. * gas/i386/clmul.s: Likewise. * gas/i386/i386.exp: Likewise. * gas/i386/inval-avx.l: Likewise. * gas/i386/inval-avx.s: Likewise. * gas/i386/sse2avx.d: Likewise. * gas/i386/sse2avx.s: Likewise. * gas/i386/x86-64-aes.d: Likewise. * gas/i386/x86-64-aes.s: Likewise. * gas/i386/x86-64-aes-intel.d: Likewise. * gas/i386/x86-64-avx.d: Likewise. * gas/i386/x86-64-avx.s: Likewise. * gas/i386/x86-64-avx-intel.d: Likewise. * gas/i386/x86-64-clmul.d: Likewise. * gas/i386/x86-64-clmul-intel.d: Likewise. * gas/i386/x86-64-clmul.s: Likewise. * gas/i386/x86-64-inval-avx.l: Likewise. * gas/i386/x86-64-inval-avx.s: Likewise. * gas/i386/x86-64-sse2avx.d: Likewise. * gas/i386/x86-64-sse2avx.s: Likewise. * gas/i386/arch-10.s: Add tests for AVX, AES, CLMUL and FMA. * gas/i386/x86-64-arch-2.s: Likewise. * gas/i386/rexw.s: Add AVX tests. * gas/i386/x86-64-opcode-inval.s: Remove lds/les test. * gas/cfi/cfi-i386.d: Updated. * gas/cfi/cfi-x86_64.d: Likewise. * gas/i386/arch-10.d: Likewise. * gas/i386/arch-10-1.l: Likewise. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/rexw.d: Likewise. * gas/i386/x86-64-arch-2.d: Likewise. * gas/i386/x86-64-opcode-inval.d: Likewise. * gas/i386/x86-64-opcode-inval-intel.d: Likewise. include/opcode/ 2008-04-03 H.J. Lu <hongjiu.lu@intel.com> * i386.h (MAX_OPERANDS): Set to 5. (MAX_MNEM_SIZE): Changed to 20. opcodes/ 2008-04-03 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (OP_E_register): New. (OP_E_memory): Likewise. (OP_VEX): Likewise. (OP_EX_Vex): Likewise. (OP_EX_VexW): Likewise. (OP_XMM_Vex): Likewise. (OP_XMM_VexW): Likewise. (OP_REG_VexI4): Likewise. (PCLMUL_Fixup): Likewise. (VEXI4_Fixup): Likewise. (VZERO_Fixup): Likewise. (VCMP_Fixup): Likewise. (VPERMIL2_Fixup): Likewise. (rex_original): Likewise. (rex_ignored): Likewise. (Mxmm): Likewise. (XMM): Likewise. (EXxmm): Likewise. (EXxmmq): Likewise. (EXymmq): Likewise. (Vex): Likewise. (Vex128): Likewise. (Vex256): Likewise. (VexI4): Likewise. (EXdVex): Likewise. (EXqVex): Likewise. (EXVexW): Likewise. (EXdVexW): Likewise. (EXqVexW): Likewise. (XMVex): Likewise. (XMVexW): Likewise. (XMVexI4): Likewise. (PCLMUL): Likewise. (VZERO): Likewise. (VCMP): Likewise. (VPERMIL2): Likewise. (xmm_mode): Likewise. (xmmq_mode): Likewise. (ymmq_mode): Likewise. (vex_mode): Likewise. (vex128_mode): Likewise. (vex256_mode): Likewise. (USE_VEX_C4_TABLE): Likewise. (USE_VEX_C5_TABLE): Likewise. (USE_VEX_LEN_TABLE): Likewise. (VEX_C4_TABLE): Likewise. (VEX_C5_TABLE): Likewise. (VEX_LEN_TABLE): Likewise. (REG_VEX_XX): Likewise. (MOD_VEX_XXX): Likewise. (PREFIX_0F38DB..PREFIX_0F38DF): Likewise. (PREFIX_0F3A44): Likewise. (PREFIX_0F3ADF): Likewise. (PREFIX_VEX_XXX): Likewise. (VEX_OF): Likewise. (VEX_OF38): Likewise. (VEX_OF3A): Likewise. (VEX_LEN_XXX): Likewise. (vex): Likewise. (need_vex): Likewise. (need_vex_reg): Likewise. (vex_i4_done): Likewise. (vex_table): Likewise. (vex_len_table): Likewise. (OP_REG_VexI4): Likewise. (vex_cmp_op): Likewise. (pclmul_op): Likewise. (vpermil2_op): Likewise. (m_mode): Updated. (es_reg): Likewise. (PREFIX_0F38F0): Likewise. (PREFIX_0F3A60): Likewise. (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE. (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF and PREFIX_VEX_XXX entries. (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE. (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and PREFIX_0F3ADF. (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE. Add MOD_VEX_XXX entries. (ckprefix): Initialize rex_original and rex_ignored. Store the REX byte in rex_original. (get_valid_dis386): Handle the implicit prefix in VEX prefix bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE. (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before calling get_valid_dis386. Use rex_original and rex_ignored when printing out REX. (putop): Handle "XY". (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and ymmq_mode. (OP_E_extended): Updated to use OP_E_register and OP_E_memory. (OP_XMM): Handle VEX. (OP_EX): Likewise. (XMM_Fixup): Likewise. (CMP_Fixup): Use ARRAY_SIZE. * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS, CPU_FMA_FLAGS and CPU_AVX_FLAGS. (operand_type_init): Add OPERAND_TYPE_REGYMM and OPERAND_TYPE_VEX_IMM4. (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA. (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD, VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources, VexImmExt and SSE2AVX. (operand_types): Add RegYMM, Ymmword and Vex_Imm4. * i386-opc.h (CpuAVX): New. (CpuAES): Likewise. (CpuCLMUL): Likewise. (CpuFMA): Likewise. (Vex): Likewise. (Vex256): Likewise. (VexNDS): Likewise. (VexNDD): Likewise. (VexW0): Likewise. (VexW1): Likewise. (Vex0F): Likewise. (Vex0F38): Likewise. (Vex0F3A): Likewise. (Vex3Sources): Likewise. (VexImmExt): Likewise. (SSE2AVX): Likewise. (RegYMM): Likewise. (Ymmword): Likewise. (Vex_Imm4): Likewise. (Implicit1stXmm0): Likewise. (CpuXsave): Updated. (CpuLM): Likewise. (ByteOkIntel): Likewise. (OldGcc): Likewise. (Control): Likewise. (Unspecified): Likewise. (OTMax): Likewise. (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma. (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256, vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a, vex3sources, veximmext and sse2avx. (i386_operand_type): Add regymm, ymmword and vex_imm4. * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions. * i386-reg.tbl: Add AVX registers, ymm0..ymm15. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2008-04-03 16:03:21 +02:00
(OP_XMM_VexW): Likewise.
(VEXI4_Fixup): Likewise.
(VPERMIL2_Fixup): Likewise.
(VexI4): Likewise.
gas/ 2009-01-05 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (December, 2008) * config/tc-i386.c (build_modrm_byte): Remove 5 operand instruction support. Don't swap REG and NDS for FMA. gas/testsuite/ 2009-01-05 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (December, 2008) * gas/i386/arch-10.s: Replace vfmaddpd with vfmadd132pd. * gas/i386/x86-64-arch-2.s: Likewise. * gas/i386/arch-10.d: Updated. * gas/i386/arch-10-1.l: Likewise. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/avx.d: Likewise. * gas/i386/avx-intel.d: Likewise. * gas/i386/inval-avx.l: Likewise. * gas/i386/x86-64-arch-2.d: Likewise. * gas/i386/x86-64-avx.d: Likewise. * gas/i386/x86-64-avx-intel.d: Likewise. * gas/i386/x86-64-inval-avx.l: Likewise. * gas/i386/avx.s: Remove vpermil2ps/vpermil2pd and FMA instructions. Update tests. * gas/i386/inval-avx.s: Likewise. * gas/i386/x86-64-avx.s: Likewise. * gas/i386/x86-64-inval-avx.s: Likewise. * gas/i386/fma.d: New. * gas/i386/fma.s: Likewise. * gas/i386/fma-intel.d: Likewise. * gas/i386/x86-64-fma.d: Likewise. * gas/i386/x86-64-fma.s: Likewise. * gas/i386/x86-64-fma-intel.d: Likewise. * gas/i386/i386.exp: Run fma, fma-intel, x86-64-fma and x86-64-fma-intel. opcodes/ 2009-01-05 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (December, 2008) * i386-dis.c (OP_VEX_FMA): Removed. (OP_EX_VexW): Likewise. (OP_EX_VexImmW): Likewise. (OP_XMM_VexW): Likewise. (VEXI4_Fixup): Likewise. (VPERMIL2_Fixup): Likewise. (VexI4): Likewise. (VexFMA): Likewise. (Vex128FMA): Likewise. (EXVexW): Likewise. (EXdVexW): Likewise. (EXqVexW): Likewise. (EXVexImmW): Likewise. (XMVexW): Likewise. (VPERMIL2): Likewise. (PREFIX_VEX_3A48...PREFIX_VEX_3A4A): Likewise. (PREFIX_VEX_3A5C...PREFIX_VEX_3A5F): Likewise. (PREFIX_VEX_3A68...PREFIX_VEX_3A6F): Likewise. (PREFIX_VEX_3A78...PREFIX_VEX_3A7F): Likewise. (VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2): Likewise. (VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2): Likewise. (get_vex_imm8): Likewise. (OP_EX_VexReg): Likewise. vpermil2_op): Likewise. (EXVexWdq): New. (vex_w_dq_mode): Likewise. (PREFIX_VEX_3896...PREFIX_VEX_389F): Likewise. (PREFIX_VEX_38A6...PREFIX_VEX_38AF): Likewise. (PREFIX_VEX_38B6...PREFIX_VEX_38BF): Likewise. (es_reg): Updated. (PREFIX_VEX_38DB): Likewise. (PREFIX_VEX_3A4A): Likewise. (PREFIX_VEX_3A60): Likewise. (PREFIX_VEX_3ADF): Likewise. (VEX_LEN_3ADF_P_2): Likewise. (prefix_table): Remove PREFIX_VEX_3A48...PREFIX_VEX_3A4A, PREFIX_VEX_3A5C...PREFIX_VEX_3A5F, PREFIX_VEX_3A68...PREFIX_VEX_3A6F and PREFIX_VEX_3A78...PREFIX_VEX_3A7F. Add PREFIX_VEX_3896...PREFIX_VEX_389F, PREFIX_VEX_38A6...PREFIX_VEX_38AF and PREFIX_VEX_38B6...PREFIX_VEX_38BF. (vex_table): Likewise. (vex_len_table): Remove VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2 and VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2. (putop): Support "%XW". (intel_operand_size): Handle vex_w_dq_mode. * i386-opc.h (VexNDS): Add a comment for VEX NDS and VEX DDS. * i386-opc.tbl: Remove vpermil2pd/vpermil2ps and old FMA instructions. Add new FMA instructions. * i386-tbl.h: Regenerated.
2009-01-06 02:03:27 +01:00
(VexFMA): Likewise.
(Vex128FMA): Likewise.
binutils/ 2008-04-03 H.J. Lu <hongjiu.lu@intel.com> * dwarf.c (dwarf_regnames_i386): Add AVX registers. (dwarf_regnames_x86_64): Likewise. gas/ 2008-04-03 H.J. Lu <hongjiu.lu@intel.com> * NEWS: Mention AES, CLMUL, AVX/FMA and -msse2avx. * doc/c-i386.texi: Add avx, aes, clmul and fma to -march=. Document -msse2avx, .avx, .aes, .clmul and .fma. * config/tc-i386.c (YMMWORD_MNEM_SUFFIX): New. (vex_prefix): Likewise. (sse2avx): Likewise. (CPU_FLAGS_ARCH_MATCH): Likewise. (CPU_FLAGS_64BIT_MATCH): Likewise. (CPU_FLAGS_32BIT_MATCH): Likewise. (CPU_FLAGS_PERFECT_MATCH): Likewise. (regymm): Likewise. (vex_imm4): Likewise. (fits_in_imm4): Likewise. (build_vex_prefix): Likewise. (VEX_check_operands): Likewise. (bad_implicit_operand): Likewise. (OPTION_MSSE2AVX): Likewise. (T_YMMWORD): Likewise. (_i386_insn): Add vex. (cpu_arch): Add .avx, .aes, .clmul and .fma. (cpu_flags_match): Changed to take a pointer to const template. Enable encoding SSE instructions with VEX prefix for -msse2avx. (match_mem_size): Also check ymmword. (operand_type_match): Clear ymmword. (md_begin): Allow '_' in mnemonic. (type_names): Add OPERAND_TYPE_VEX_IMM4. (process_immext): Update assert. (md_assemble): Don't call process_immext if sse2avx and immext are true. Call build_vex_prefix if vex is true. (parse_insn): Updated for cpu_flags_match. (swap_operands): Handle 5 operands. (match_template): Handle 5 operands. Updated for cpu_flags_match. Check regymm. Call VEX_check_operands. Handle YMMWORD_MNEM_SUFFIX. (process_suffix): Handle YMMWORD_MNEM_SUFFIX. (check_byte_reg): Check regymm. (process_operands): Duplicate the destination register for -msse2avx if needed. (build_modrm_byte): Updated for instructions with VEX encoding. (output_insn): Output VEX prefix if needed. (md_longopts): Add msse2avx. (md_parse_option): Handle OPTION_MSSE2AVX. (md_show_usage): Add avx, aes, clmul, fma and -msse2avx. (intel_e09): Support YMMWORD. (intel_e11): Likewise. (intel_get_token): Likewise. gas/testsuite/ 2008-04-03 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Run aes, aes-intel, x86-64-aes, x86-64-aes-intel, avx, avx-intel, inval-avx, x86-64-avx, x86-64-avx-intel and x86-64-inval-avx. * gas/cfi/cfi-i386.s: Add tests for AVX register maps. * gas/cfi/cfi-x86_64.s: Likewise. * gas/i386/aes.d: New. * gas/i386/aes.s: Likewise. * gas/i386/aes-intel.d: Likewise. * gas/i386/avx.d: Likewise. * gas/i386/avx.s: Likewise. * gas/i386/avx-intel.d: Likewise. * gas/i386/clmul.d: Likewise. * gas/i386/clmul-intel.d: Likewise. * gas/i386/clmul.s: Likewise. * gas/i386/i386.exp: Likewise. * gas/i386/inval-avx.l: Likewise. * gas/i386/inval-avx.s: Likewise. * gas/i386/sse2avx.d: Likewise. * gas/i386/sse2avx.s: Likewise. * gas/i386/x86-64-aes.d: Likewise. * gas/i386/x86-64-aes.s: Likewise. * gas/i386/x86-64-aes-intel.d: Likewise. * gas/i386/x86-64-avx.d: Likewise. * gas/i386/x86-64-avx.s: Likewise. * gas/i386/x86-64-avx-intel.d: Likewise. * gas/i386/x86-64-clmul.d: Likewise. * gas/i386/x86-64-clmul-intel.d: Likewise. * gas/i386/x86-64-clmul.s: Likewise. * gas/i386/x86-64-inval-avx.l: Likewise. * gas/i386/x86-64-inval-avx.s: Likewise. * gas/i386/x86-64-sse2avx.d: Likewise. * gas/i386/x86-64-sse2avx.s: Likewise. * gas/i386/arch-10.s: Add tests for AVX, AES, CLMUL and FMA. * gas/i386/x86-64-arch-2.s: Likewise. * gas/i386/rexw.s: Add AVX tests. * gas/i386/x86-64-opcode-inval.s: Remove lds/les test. * gas/cfi/cfi-i386.d: Updated. * gas/cfi/cfi-x86_64.d: Likewise. * gas/i386/arch-10.d: Likewise. * gas/i386/arch-10-1.l: Likewise. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/rexw.d: Likewise. * gas/i386/x86-64-arch-2.d: Likewise. * gas/i386/x86-64-opcode-inval.d: Likewise. * gas/i386/x86-64-opcode-inval-intel.d: Likewise. include/opcode/ 2008-04-03 H.J. Lu <hongjiu.lu@intel.com> * i386.h (MAX_OPERANDS): Set to 5. (MAX_MNEM_SIZE): Changed to 20. opcodes/ 2008-04-03 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (OP_E_register): New. (OP_E_memory): Likewise. (OP_VEX): Likewise. (OP_EX_Vex): Likewise. (OP_EX_VexW): Likewise. (OP_XMM_Vex): Likewise. (OP_XMM_VexW): Likewise. (OP_REG_VexI4): Likewise. (PCLMUL_Fixup): Likewise. (VEXI4_Fixup): Likewise. (VZERO_Fixup): Likewise. (VCMP_Fixup): Likewise. (VPERMIL2_Fixup): Likewise. (rex_original): Likewise. (rex_ignored): Likewise. (Mxmm): Likewise. (XMM): Likewise. (EXxmm): Likewise. (EXxmmq): Likewise. (EXymmq): Likewise. (Vex): Likewise. (Vex128): Likewise. (Vex256): Likewise. (VexI4): Likewise. (EXdVex): Likewise. (EXqVex): Likewise. (EXVexW): Likewise. (EXdVexW): Likewise. (EXqVexW): Likewise. (XMVex): Likewise. (XMVexW): Likewise. (XMVexI4): Likewise. (PCLMUL): Likewise. (VZERO): Likewise. (VCMP): Likewise. (VPERMIL2): Likewise. (xmm_mode): Likewise. (xmmq_mode): Likewise. (ymmq_mode): Likewise. (vex_mode): Likewise. (vex128_mode): Likewise. (vex256_mode): Likewise. (USE_VEX_C4_TABLE): Likewise. (USE_VEX_C5_TABLE): Likewise. (USE_VEX_LEN_TABLE): Likewise. (VEX_C4_TABLE): Likewise. (VEX_C5_TABLE): Likewise. (VEX_LEN_TABLE): Likewise. (REG_VEX_XX): Likewise. (MOD_VEX_XXX): Likewise. (PREFIX_0F38DB..PREFIX_0F38DF): Likewise. (PREFIX_0F3A44): Likewise. (PREFIX_0F3ADF): Likewise. (PREFIX_VEX_XXX): Likewise. (VEX_OF): Likewise. (VEX_OF38): Likewise. (VEX_OF3A): Likewise. (VEX_LEN_XXX): Likewise. (vex): Likewise. (need_vex): Likewise. (need_vex_reg): Likewise. (vex_i4_done): Likewise. (vex_table): Likewise. (vex_len_table): Likewise. (OP_REG_VexI4): Likewise. (vex_cmp_op): Likewise. (pclmul_op): Likewise. (vpermil2_op): Likewise. (m_mode): Updated. (es_reg): Likewise. (PREFIX_0F38F0): Likewise. (PREFIX_0F3A60): Likewise. (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE. (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF and PREFIX_VEX_XXX entries. (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE. (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and PREFIX_0F3ADF. (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE. Add MOD_VEX_XXX entries. (ckprefix): Initialize rex_original and rex_ignored. Store the REX byte in rex_original. (get_valid_dis386): Handle the implicit prefix in VEX prefix bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE. (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before calling get_valid_dis386. Use rex_original and rex_ignored when printing out REX. (putop): Handle "XY". (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and ymmq_mode. (OP_E_extended): Updated to use OP_E_register and OP_E_memory. (OP_XMM): Handle VEX. (OP_EX): Likewise. (XMM_Fixup): Likewise. (CMP_Fixup): Use ARRAY_SIZE. * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS, CPU_FMA_FLAGS and CPU_AVX_FLAGS. (operand_type_init): Add OPERAND_TYPE_REGYMM and OPERAND_TYPE_VEX_IMM4. (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA. (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD, VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources, VexImmExt and SSE2AVX. (operand_types): Add RegYMM, Ymmword and Vex_Imm4. * i386-opc.h (CpuAVX): New. (CpuAES): Likewise. (CpuCLMUL): Likewise. (CpuFMA): Likewise. (Vex): Likewise. (Vex256): Likewise. (VexNDS): Likewise. (VexNDD): Likewise. (VexW0): Likewise. (VexW1): Likewise. (Vex0F): Likewise. (Vex0F38): Likewise. (Vex0F3A): Likewise. (Vex3Sources): Likewise. (VexImmExt): Likewise. (SSE2AVX): Likewise. (RegYMM): Likewise. (Ymmword): Likewise. (Vex_Imm4): Likewise. (Implicit1stXmm0): Likewise. (CpuXsave): Updated. (CpuLM): Likewise. (ByteOkIntel): Likewise. (OldGcc): Likewise. (Control): Likewise. (Unspecified): Likewise. (OTMax): Likewise. (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma. (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256, vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a, vex3sources, veximmext and sse2avx. (i386_operand_type): Add regymm, ymmword and vex_imm4. * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions. * i386-reg.tbl: Add AVX registers, ymm0..ymm15. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2008-04-03 16:03:21 +02:00
(EXVexW): Likewise.
(EXdVexW): Likewise.
(EXqVexW): Likewise.
gas/ 2009-01-05 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (December, 2008) * config/tc-i386.c (build_modrm_byte): Remove 5 operand instruction support. Don't swap REG and NDS for FMA. gas/testsuite/ 2009-01-05 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (December, 2008) * gas/i386/arch-10.s: Replace vfmaddpd with vfmadd132pd. * gas/i386/x86-64-arch-2.s: Likewise. * gas/i386/arch-10.d: Updated. * gas/i386/arch-10-1.l: Likewise. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/avx.d: Likewise. * gas/i386/avx-intel.d: Likewise. * gas/i386/inval-avx.l: Likewise. * gas/i386/x86-64-arch-2.d: Likewise. * gas/i386/x86-64-avx.d: Likewise. * gas/i386/x86-64-avx-intel.d: Likewise. * gas/i386/x86-64-inval-avx.l: Likewise. * gas/i386/avx.s: Remove vpermil2ps/vpermil2pd and FMA instructions. Update tests. * gas/i386/inval-avx.s: Likewise. * gas/i386/x86-64-avx.s: Likewise. * gas/i386/x86-64-inval-avx.s: Likewise. * gas/i386/fma.d: New. * gas/i386/fma.s: Likewise. * gas/i386/fma-intel.d: Likewise. * gas/i386/x86-64-fma.d: Likewise. * gas/i386/x86-64-fma.s: Likewise. * gas/i386/x86-64-fma-intel.d: Likewise. * gas/i386/i386.exp: Run fma, fma-intel, x86-64-fma and x86-64-fma-intel. opcodes/ 2009-01-05 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (December, 2008) * i386-dis.c (OP_VEX_FMA): Removed. (OP_EX_VexW): Likewise. (OP_EX_VexImmW): Likewise. (OP_XMM_VexW): Likewise. (VEXI4_Fixup): Likewise. (VPERMIL2_Fixup): Likewise. (VexI4): Likewise. (VexFMA): Likewise. (Vex128FMA): Likewise. (EXVexW): Likewise. (EXdVexW): Likewise. (EXqVexW): Likewise. (EXVexImmW): Likewise. (XMVexW): Likewise. (VPERMIL2): Likewise. (PREFIX_VEX_3A48...PREFIX_VEX_3A4A): Likewise. (PREFIX_VEX_3A5C...PREFIX_VEX_3A5F): Likewise. (PREFIX_VEX_3A68...PREFIX_VEX_3A6F): Likewise. (PREFIX_VEX_3A78...PREFIX_VEX_3A7F): Likewise. (VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2): Likewise. (VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2): Likewise. (get_vex_imm8): Likewise. (OP_EX_VexReg): Likewise. vpermil2_op): Likewise. (EXVexWdq): New. (vex_w_dq_mode): Likewise. (PREFIX_VEX_3896...PREFIX_VEX_389F): Likewise. (PREFIX_VEX_38A6...PREFIX_VEX_38AF): Likewise. (PREFIX_VEX_38B6...PREFIX_VEX_38BF): Likewise. (es_reg): Updated. (PREFIX_VEX_38DB): Likewise. (PREFIX_VEX_3A4A): Likewise. (PREFIX_VEX_3A60): Likewise. (PREFIX_VEX_3ADF): Likewise. (VEX_LEN_3ADF_P_2): Likewise. (prefix_table): Remove PREFIX_VEX_3A48...PREFIX_VEX_3A4A, PREFIX_VEX_3A5C...PREFIX_VEX_3A5F, PREFIX_VEX_3A68...PREFIX_VEX_3A6F and PREFIX_VEX_3A78...PREFIX_VEX_3A7F. Add PREFIX_VEX_3896...PREFIX_VEX_389F, PREFIX_VEX_38A6...PREFIX_VEX_38AF and PREFIX_VEX_38B6...PREFIX_VEX_38BF. (vex_table): Likewise. (vex_len_table): Remove VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2 and VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2. (putop): Support "%XW". (intel_operand_size): Handle vex_w_dq_mode. * i386-opc.h (VexNDS): Add a comment for VEX NDS and VEX DDS. * i386-opc.tbl: Remove vpermil2pd/vpermil2ps and old FMA instructions. Add new FMA instructions. * i386-tbl.h: Regenerated.
2009-01-06 02:03:27 +01:00
(EXVexImmW): Likewise.
binutils/ 2008-04-03 H.J. Lu <hongjiu.lu@intel.com> * dwarf.c (dwarf_regnames_i386): Add AVX registers. (dwarf_regnames_x86_64): Likewise. gas/ 2008-04-03 H.J. Lu <hongjiu.lu@intel.com> * NEWS: Mention AES, CLMUL, AVX/FMA and -msse2avx. * doc/c-i386.texi: Add avx, aes, clmul and fma to -march=. Document -msse2avx, .avx, .aes, .clmul and .fma. * config/tc-i386.c (YMMWORD_MNEM_SUFFIX): New. (vex_prefix): Likewise. (sse2avx): Likewise. (CPU_FLAGS_ARCH_MATCH): Likewise. (CPU_FLAGS_64BIT_MATCH): Likewise. (CPU_FLAGS_32BIT_MATCH): Likewise. (CPU_FLAGS_PERFECT_MATCH): Likewise. (regymm): Likewise. (vex_imm4): Likewise. (fits_in_imm4): Likewise. (build_vex_prefix): Likewise. (VEX_check_operands): Likewise. (bad_implicit_operand): Likewise. (OPTION_MSSE2AVX): Likewise. (T_YMMWORD): Likewise. (_i386_insn): Add vex. (cpu_arch): Add .avx, .aes, .clmul and .fma. (cpu_flags_match): Changed to take a pointer to const template. Enable encoding SSE instructions with VEX prefix for -msse2avx. (match_mem_size): Also check ymmword. (operand_type_match): Clear ymmword. (md_begin): Allow '_' in mnemonic. (type_names): Add OPERAND_TYPE_VEX_IMM4. (process_immext): Update assert. (md_assemble): Don't call process_immext if sse2avx and immext are true. Call build_vex_prefix if vex is true. (parse_insn): Updated for cpu_flags_match. (swap_operands): Handle 5 operands. (match_template): Handle 5 operands. Updated for cpu_flags_match. Check regymm. Call VEX_check_operands. Handle YMMWORD_MNEM_SUFFIX. (process_suffix): Handle YMMWORD_MNEM_SUFFIX. (check_byte_reg): Check regymm. (process_operands): Duplicate the destination register for -msse2avx if needed. (build_modrm_byte): Updated for instructions with VEX encoding. (output_insn): Output VEX prefix if needed. (md_longopts): Add msse2avx. (md_parse_option): Handle OPTION_MSSE2AVX. (md_show_usage): Add avx, aes, clmul, fma and -msse2avx. (intel_e09): Support YMMWORD. (intel_e11): Likewise. (intel_get_token): Likewise. gas/testsuite/ 2008-04-03 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Run aes, aes-intel, x86-64-aes, x86-64-aes-intel, avx, avx-intel, inval-avx, x86-64-avx, x86-64-avx-intel and x86-64-inval-avx. * gas/cfi/cfi-i386.s: Add tests for AVX register maps. * gas/cfi/cfi-x86_64.s: Likewise. * gas/i386/aes.d: New. * gas/i386/aes.s: Likewise. * gas/i386/aes-intel.d: Likewise. * gas/i386/avx.d: Likewise. * gas/i386/avx.s: Likewise. * gas/i386/avx-intel.d: Likewise. * gas/i386/clmul.d: Likewise. * gas/i386/clmul-intel.d: Likewise. * gas/i386/clmul.s: Likewise. * gas/i386/i386.exp: Likewise. * gas/i386/inval-avx.l: Likewise. * gas/i386/inval-avx.s: Likewise. * gas/i386/sse2avx.d: Likewise. * gas/i386/sse2avx.s: Likewise. * gas/i386/x86-64-aes.d: Likewise. * gas/i386/x86-64-aes.s: Likewise. * gas/i386/x86-64-aes-intel.d: Likewise. * gas/i386/x86-64-avx.d: Likewise. * gas/i386/x86-64-avx.s: Likewise. * gas/i386/x86-64-avx-intel.d: Likewise. * gas/i386/x86-64-clmul.d: Likewise. * gas/i386/x86-64-clmul-intel.d: Likewise. * gas/i386/x86-64-clmul.s: Likewise. * gas/i386/x86-64-inval-avx.l: Likewise. * gas/i386/x86-64-inval-avx.s: Likewise. * gas/i386/x86-64-sse2avx.d: Likewise. * gas/i386/x86-64-sse2avx.s: Likewise. * gas/i386/arch-10.s: Add tests for AVX, AES, CLMUL and FMA. * gas/i386/x86-64-arch-2.s: Likewise. * gas/i386/rexw.s: Add AVX tests. * gas/i386/x86-64-opcode-inval.s: Remove lds/les test. * gas/cfi/cfi-i386.d: Updated. * gas/cfi/cfi-x86_64.d: Likewise. * gas/i386/arch-10.d: Likewise. * gas/i386/arch-10-1.l: Likewise. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/rexw.d: Likewise. * gas/i386/x86-64-arch-2.d: Likewise. * gas/i386/x86-64-opcode-inval.d: Likewise. * gas/i386/x86-64-opcode-inval-intel.d: Likewise. include/opcode/ 2008-04-03 H.J. Lu <hongjiu.lu@intel.com> * i386.h (MAX_OPERANDS): Set to 5. (MAX_MNEM_SIZE): Changed to 20. opcodes/ 2008-04-03 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (OP_E_register): New. (OP_E_memory): Likewise. (OP_VEX): Likewise. (OP_EX_Vex): Likewise. (OP_EX_VexW): Likewise. (OP_XMM_Vex): Likewise. (OP_XMM_VexW): Likewise. (OP_REG_VexI4): Likewise. (PCLMUL_Fixup): Likewise. (VEXI4_Fixup): Likewise. (VZERO_Fixup): Likewise. (VCMP_Fixup): Likewise. (VPERMIL2_Fixup): Likewise. (rex_original): Likewise. (rex_ignored): Likewise. (Mxmm): Likewise. (XMM): Likewise. (EXxmm): Likewise. (EXxmmq): Likewise. (EXymmq): Likewise. (Vex): Likewise. (Vex128): Likewise. (Vex256): Likewise. (VexI4): Likewise. (EXdVex): Likewise. (EXqVex): Likewise. (EXVexW): Likewise. (EXdVexW): Likewise. (EXqVexW): Likewise. (XMVex): Likewise. (XMVexW): Likewise. (XMVexI4): Likewise. (PCLMUL): Likewise. (VZERO): Likewise. (VCMP): Likewise. (VPERMIL2): Likewise. (xmm_mode): Likewise. (xmmq_mode): Likewise. (ymmq_mode): Likewise. (vex_mode): Likewise. (vex128_mode): Likewise. (vex256_mode): Likewise. (USE_VEX_C4_TABLE): Likewise. (USE_VEX_C5_TABLE): Likewise. (USE_VEX_LEN_TABLE): Likewise. (VEX_C4_TABLE): Likewise. (VEX_C5_TABLE): Likewise. (VEX_LEN_TABLE): Likewise. (REG_VEX_XX): Likewise. (MOD_VEX_XXX): Likewise. (PREFIX_0F38DB..PREFIX_0F38DF): Likewise. (PREFIX_0F3A44): Likewise. (PREFIX_0F3ADF): Likewise. (PREFIX_VEX_XXX): Likewise. (VEX_OF): Likewise. (VEX_OF38): Likewise. (VEX_OF3A): Likewise. (VEX_LEN_XXX): Likewise. (vex): Likewise. (need_vex): Likewise. (need_vex_reg): Likewise. (vex_i4_done): Likewise. (vex_table): Likewise. (vex_len_table): Likewise. (OP_REG_VexI4): Likewise. (vex_cmp_op): Likewise. (pclmul_op): Likewise. (vpermil2_op): Likewise. (m_mode): Updated. (es_reg): Likewise. (PREFIX_0F38F0): Likewise. (PREFIX_0F3A60): Likewise. (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE. (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF and PREFIX_VEX_XXX entries. (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE. (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and PREFIX_0F3ADF. (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE. Add MOD_VEX_XXX entries. (ckprefix): Initialize rex_original and rex_ignored. Store the REX byte in rex_original. (get_valid_dis386): Handle the implicit prefix in VEX prefix bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE. (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before calling get_valid_dis386. Use rex_original and rex_ignored when printing out REX. (putop): Handle "XY". (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and ymmq_mode. (OP_E_extended): Updated to use OP_E_register and OP_E_memory. (OP_XMM): Handle VEX. (OP_EX): Likewise. (XMM_Fixup): Likewise. (CMP_Fixup): Use ARRAY_SIZE. * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS, CPU_FMA_FLAGS and CPU_AVX_FLAGS. (operand_type_init): Add OPERAND_TYPE_REGYMM and OPERAND_TYPE_VEX_IMM4. (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA. (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD, VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources, VexImmExt and SSE2AVX. (operand_types): Add RegYMM, Ymmword and Vex_Imm4. * i386-opc.h (CpuAVX): New. (CpuAES): Likewise. (CpuCLMUL): Likewise. (CpuFMA): Likewise. (Vex): Likewise. (Vex256): Likewise. (VexNDS): Likewise. (VexNDD): Likewise. (VexW0): Likewise. (VexW1): Likewise. (Vex0F): Likewise. (Vex0F38): Likewise. (Vex0F3A): Likewise. (Vex3Sources): Likewise. (VexImmExt): Likewise. (SSE2AVX): Likewise. (RegYMM): Likewise. (Ymmword): Likewise. (Vex_Imm4): Likewise. (Implicit1stXmm0): Likewise. (CpuXsave): Updated. (CpuLM): Likewise. (ByteOkIntel): Likewise. (OldGcc): Likewise. (Control): Likewise. (Unspecified): Likewise. (OTMax): Likewise. (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma. (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256, vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a, vex3sources, veximmext and sse2avx. (i386_operand_type): Add regymm, ymmword and vex_imm4. * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions. * i386-reg.tbl: Add AVX registers, ymm0..ymm15. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2008-04-03 16:03:21 +02:00
(XMVexW): Likewise.
(VPERMIL2): Likewise.
gas/ 2009-01-05 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (December, 2008) * config/tc-i386.c (build_modrm_byte): Remove 5 operand instruction support. Don't swap REG and NDS for FMA. gas/testsuite/ 2009-01-05 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (December, 2008) * gas/i386/arch-10.s: Replace vfmaddpd with vfmadd132pd. * gas/i386/x86-64-arch-2.s: Likewise. * gas/i386/arch-10.d: Updated. * gas/i386/arch-10-1.l: Likewise. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/avx.d: Likewise. * gas/i386/avx-intel.d: Likewise. * gas/i386/inval-avx.l: Likewise. * gas/i386/x86-64-arch-2.d: Likewise. * gas/i386/x86-64-avx.d: Likewise. * gas/i386/x86-64-avx-intel.d: Likewise. * gas/i386/x86-64-inval-avx.l: Likewise. * gas/i386/avx.s: Remove vpermil2ps/vpermil2pd and FMA instructions. Update tests. * gas/i386/inval-avx.s: Likewise. * gas/i386/x86-64-avx.s: Likewise. * gas/i386/x86-64-inval-avx.s: Likewise. * gas/i386/fma.d: New. * gas/i386/fma.s: Likewise. * gas/i386/fma-intel.d: Likewise. * gas/i386/x86-64-fma.d: Likewise. * gas/i386/x86-64-fma.s: Likewise. * gas/i386/x86-64-fma-intel.d: Likewise. * gas/i386/i386.exp: Run fma, fma-intel, x86-64-fma and x86-64-fma-intel. opcodes/ 2009-01-05 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (December, 2008) * i386-dis.c (OP_VEX_FMA): Removed. (OP_EX_VexW): Likewise. (OP_EX_VexImmW): Likewise. (OP_XMM_VexW): Likewise. (VEXI4_Fixup): Likewise. (VPERMIL2_Fixup): Likewise. (VexI4): Likewise. (VexFMA): Likewise. (Vex128FMA): Likewise. (EXVexW): Likewise. (EXdVexW): Likewise. (EXqVexW): Likewise. (EXVexImmW): Likewise. (XMVexW): Likewise. (VPERMIL2): Likewise. (PREFIX_VEX_3A48...PREFIX_VEX_3A4A): Likewise. (PREFIX_VEX_3A5C...PREFIX_VEX_3A5F): Likewise. (PREFIX_VEX_3A68...PREFIX_VEX_3A6F): Likewise. (PREFIX_VEX_3A78...PREFIX_VEX_3A7F): Likewise. (VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2): Likewise. (VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2): Likewise. (get_vex_imm8): Likewise. (OP_EX_VexReg): Likewise. vpermil2_op): Likewise. (EXVexWdq): New. (vex_w_dq_mode): Likewise. (PREFIX_VEX_3896...PREFIX_VEX_389F): Likewise. (PREFIX_VEX_38A6...PREFIX_VEX_38AF): Likewise. (PREFIX_VEX_38B6...PREFIX_VEX_38BF): Likewise. (es_reg): Updated. (PREFIX_VEX_38DB): Likewise. (PREFIX_VEX_3A4A): Likewise. (PREFIX_VEX_3A60): Likewise. (PREFIX_VEX_3ADF): Likewise. (VEX_LEN_3ADF_P_2): Likewise. (prefix_table): Remove PREFIX_VEX_3A48...PREFIX_VEX_3A4A, PREFIX_VEX_3A5C...PREFIX_VEX_3A5F, PREFIX_VEX_3A68...PREFIX_VEX_3A6F and PREFIX_VEX_3A78...PREFIX_VEX_3A7F. Add PREFIX_VEX_3896...PREFIX_VEX_389F, PREFIX_VEX_38A6...PREFIX_VEX_38AF and PREFIX_VEX_38B6...PREFIX_VEX_38BF. (vex_table): Likewise. (vex_len_table): Remove VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2 and VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2. (putop): Support "%XW". (intel_operand_size): Handle vex_w_dq_mode. * i386-opc.h (VexNDS): Add a comment for VEX NDS and VEX DDS. * i386-opc.tbl: Remove vpermil2pd/vpermil2ps and old FMA instructions. Add new FMA instructions. * i386-tbl.h: Regenerated.
2009-01-06 02:03:27 +01:00
(PREFIX_VEX_3A48...PREFIX_VEX_3A4A): Likewise.
(PREFIX_VEX_3A5C...PREFIX_VEX_3A5F): Likewise.
(PREFIX_VEX_3A68...PREFIX_VEX_3A6F): Likewise.
(PREFIX_VEX_3A78...PREFIX_VEX_3A7F): Likewise.
(VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2): Likewise.
(VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2): Likewise.
(get_vex_imm8): Likewise.
(OP_EX_VexReg): Likewise.
vpermil2_op): Likewise.
(EXVexWdq): New.
(vex_w_dq_mode): Likewise.
(PREFIX_VEX_3896...PREFIX_VEX_389F): Likewise.
(PREFIX_VEX_38A6...PREFIX_VEX_38AF): Likewise.
(PREFIX_VEX_38B6...PREFIX_VEX_38BF): Likewise.
(es_reg): Updated.
(PREFIX_VEX_38DB): Likewise.
(PREFIX_VEX_3A4A): Likewise.
(PREFIX_VEX_3A60): Likewise.
(PREFIX_VEX_3ADF): Likewise.
(VEX_LEN_3ADF_P_2): Likewise.
(prefix_table): Remove PREFIX_VEX_3A48...PREFIX_VEX_3A4A,
PREFIX_VEX_3A5C...PREFIX_VEX_3A5F,
PREFIX_VEX_3A68...PREFIX_VEX_3A6F and
PREFIX_VEX_3A78...PREFIX_VEX_3A7F. Add
PREFIX_VEX_3896...PREFIX_VEX_389F,
PREFIX_VEX_38A6...PREFIX_VEX_38AF and
PREFIX_VEX_38B6...PREFIX_VEX_38BF.
binutils/ 2008-04-03 H.J. Lu <hongjiu.lu@intel.com> * dwarf.c (dwarf_regnames_i386): Add AVX registers. (dwarf_regnames_x86_64): Likewise. gas/ 2008-04-03 H.J. Lu <hongjiu.lu@intel.com> * NEWS: Mention AES, CLMUL, AVX/FMA and -msse2avx. * doc/c-i386.texi: Add avx, aes, clmul and fma to -march=. Document -msse2avx, .avx, .aes, .clmul and .fma. * config/tc-i386.c (YMMWORD_MNEM_SUFFIX): New. (vex_prefix): Likewise. (sse2avx): Likewise. (CPU_FLAGS_ARCH_MATCH): Likewise. (CPU_FLAGS_64BIT_MATCH): Likewise. (CPU_FLAGS_32BIT_MATCH): Likewise. (CPU_FLAGS_PERFECT_MATCH): Likewise. (regymm): Likewise. (vex_imm4): Likewise. (fits_in_imm4): Likewise. (build_vex_prefix): Likewise. (VEX_check_operands): Likewise. (bad_implicit_operand): Likewise. (OPTION_MSSE2AVX): Likewise. (T_YMMWORD): Likewise. (_i386_insn): Add vex. (cpu_arch): Add .avx, .aes, .clmul and .fma. (cpu_flags_match): Changed to take a pointer to const template. Enable encoding SSE instructions with VEX prefix for -msse2avx. (match_mem_size): Also check ymmword. (operand_type_match): Clear ymmword. (md_begin): Allow '_' in mnemonic. (type_names): Add OPERAND_TYPE_VEX_IMM4. (process_immext): Update assert. (md_assemble): Don't call process_immext if sse2avx and immext are true. Call build_vex_prefix if vex is true. (parse_insn): Updated for cpu_flags_match. (swap_operands): Handle 5 operands. (match_template): Handle 5 operands. Updated for cpu_flags_match. Check regymm. Call VEX_check_operands. Handle YMMWORD_MNEM_SUFFIX. (process_suffix): Handle YMMWORD_MNEM_SUFFIX. (check_byte_reg): Check regymm. (process_operands): Duplicate the destination register for -msse2avx if needed. (build_modrm_byte): Updated for instructions with VEX encoding. (output_insn): Output VEX prefix if needed. (md_longopts): Add msse2avx. (md_parse_option): Handle OPTION_MSSE2AVX. (md_show_usage): Add avx, aes, clmul, fma and -msse2avx. (intel_e09): Support YMMWORD. (intel_e11): Likewise. (intel_get_token): Likewise. gas/testsuite/ 2008-04-03 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Run aes, aes-intel, x86-64-aes, x86-64-aes-intel, avx, avx-intel, inval-avx, x86-64-avx, x86-64-avx-intel and x86-64-inval-avx. * gas/cfi/cfi-i386.s: Add tests for AVX register maps. * gas/cfi/cfi-x86_64.s: Likewise. * gas/i386/aes.d: New. * gas/i386/aes.s: Likewise. * gas/i386/aes-intel.d: Likewise. * gas/i386/avx.d: Likewise. * gas/i386/avx.s: Likewise. * gas/i386/avx-intel.d: Likewise. * gas/i386/clmul.d: Likewise. * gas/i386/clmul-intel.d: Likewise. * gas/i386/clmul.s: Likewise. * gas/i386/i386.exp: Likewise. * gas/i386/inval-avx.l: Likewise. * gas/i386/inval-avx.s: Likewise. * gas/i386/sse2avx.d: Likewise. * gas/i386/sse2avx.s: Likewise. * gas/i386/x86-64-aes.d: Likewise. * gas/i386/x86-64-aes.s: Likewise. * gas/i386/x86-64-aes-intel.d: Likewise. * gas/i386/x86-64-avx.d: Likewise. * gas/i386/x86-64-avx.s: Likewise. * gas/i386/x86-64-avx-intel.d: Likewise. * gas/i386/x86-64-clmul.d: Likewise. * gas/i386/x86-64-clmul-intel.d: Likewise. * gas/i386/x86-64-clmul.s: Likewise. * gas/i386/x86-64-inval-avx.l: Likewise. * gas/i386/x86-64-inval-avx.s: Likewise. * gas/i386/x86-64-sse2avx.d: Likewise. * gas/i386/x86-64-sse2avx.s: Likewise. * gas/i386/arch-10.s: Add tests for AVX, AES, CLMUL and FMA. * gas/i386/x86-64-arch-2.s: Likewise. * gas/i386/rexw.s: Add AVX tests. * gas/i386/x86-64-opcode-inval.s: Remove lds/les test. * gas/cfi/cfi-i386.d: Updated. * gas/cfi/cfi-x86_64.d: Likewise. * gas/i386/arch-10.d: Likewise. * gas/i386/arch-10-1.l: Likewise. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/rexw.d: Likewise. * gas/i386/x86-64-arch-2.d: Likewise. * gas/i386/x86-64-opcode-inval.d: Likewise. * gas/i386/x86-64-opcode-inval-intel.d: Likewise. include/opcode/ 2008-04-03 H.J. Lu <hongjiu.lu@intel.com> * i386.h (MAX_OPERANDS): Set to 5. (MAX_MNEM_SIZE): Changed to 20. opcodes/ 2008-04-03 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (OP_E_register): New. (OP_E_memory): Likewise. (OP_VEX): Likewise. (OP_EX_Vex): Likewise. (OP_EX_VexW): Likewise. (OP_XMM_Vex): Likewise. (OP_XMM_VexW): Likewise. (OP_REG_VexI4): Likewise. (PCLMUL_Fixup): Likewise. (VEXI4_Fixup): Likewise. (VZERO_Fixup): Likewise. (VCMP_Fixup): Likewise. (VPERMIL2_Fixup): Likewise. (rex_original): Likewise. (rex_ignored): Likewise. (Mxmm): Likewise. (XMM): Likewise. (EXxmm): Likewise. (EXxmmq): Likewise. (EXymmq): Likewise. (Vex): Likewise. (Vex128): Likewise. (Vex256): Likewise. (VexI4): Likewise. (EXdVex): Likewise. (EXqVex): Likewise. (EXVexW): Likewise. (EXdVexW): Likewise. (EXqVexW): Likewise. (XMVex): Likewise. (XMVexW): Likewise. (XMVexI4): Likewise. (PCLMUL): Likewise. (VZERO): Likewise. (VCMP): Likewise. (VPERMIL2): Likewise. (xmm_mode): Likewise. (xmmq_mode): Likewise. (ymmq_mode): Likewise. (vex_mode): Likewise. (vex128_mode): Likewise. (vex256_mode): Likewise. (USE_VEX_C4_TABLE): Likewise. (USE_VEX_C5_TABLE): Likewise. (USE_VEX_LEN_TABLE): Likewise. (VEX_C4_TABLE): Likewise. (VEX_C5_TABLE): Likewise. (VEX_LEN_TABLE): Likewise. (REG_VEX_XX): Likewise. (MOD_VEX_XXX): Likewise. (PREFIX_0F38DB..PREFIX_0F38DF): Likewise. (PREFIX_0F3A44): Likewise. (PREFIX_0F3ADF): Likewise. (PREFIX_VEX_XXX): Likewise. (VEX_OF): Likewise. (VEX_OF38): Likewise. (VEX_OF3A): Likewise. (VEX_LEN_XXX): Likewise. (vex): Likewise. (need_vex): Likewise. (need_vex_reg): Likewise. (vex_i4_done): Likewise. (vex_table): Likewise. (vex_len_table): Likewise. (OP_REG_VexI4): Likewise. (vex_cmp_op): Likewise. (pclmul_op): Likewise. (vpermil2_op): Likewise. (m_mode): Updated. (es_reg): Likewise. (PREFIX_0F38F0): Likewise. (PREFIX_0F3A60): Likewise. (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE. (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF and PREFIX_VEX_XXX entries. (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE. (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and PREFIX_0F3ADF. (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE. Add MOD_VEX_XXX entries. (ckprefix): Initialize rex_original and rex_ignored. Store the REX byte in rex_original. (get_valid_dis386): Handle the implicit prefix in VEX prefix bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE. (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before calling get_valid_dis386. Use rex_original and rex_ignored when printing out REX. (putop): Handle "XY". (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and ymmq_mode. (OP_E_extended): Updated to use OP_E_register and OP_E_memory. (OP_XMM): Handle VEX. (OP_EX): Likewise. (XMM_Fixup): Likewise. (CMP_Fixup): Use ARRAY_SIZE. * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS, CPU_FMA_FLAGS and CPU_AVX_FLAGS. (operand_type_init): Add OPERAND_TYPE_REGYMM and OPERAND_TYPE_VEX_IMM4. (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA. (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD, VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources, VexImmExt and SSE2AVX. (operand_types): Add RegYMM, Ymmword and Vex_Imm4. * i386-opc.h (CpuAVX): New. (CpuAES): Likewise. (CpuCLMUL): Likewise. (CpuFMA): Likewise. (Vex): Likewise. (Vex256): Likewise. (VexNDS): Likewise. (VexNDD): Likewise. (VexW0): Likewise. (VexW1): Likewise. (Vex0F): Likewise. (Vex0F38): Likewise. (Vex0F3A): Likewise. (Vex3Sources): Likewise. (VexImmExt): Likewise. (SSE2AVX): Likewise. (RegYMM): Likewise. (Ymmword): Likewise. (Vex_Imm4): Likewise. (Implicit1stXmm0): Likewise. (CpuXsave): Updated. (CpuLM): Likewise. (ByteOkIntel): Likewise. (OldGcc): Likewise. (Control): Likewise. (Unspecified): Likewise. (OTMax): Likewise. (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma. (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256, vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a, vex3sources, veximmext and sse2avx. (i386_operand_type): Add regymm, ymmword and vex_imm4. * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions. * i386-reg.tbl: Add AVX registers, ymm0..ymm15. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2008-04-03 16:03:21 +02:00
(vex_table): Likewise.
gas/ 2009-01-05 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (December, 2008) * config/tc-i386.c (build_modrm_byte): Remove 5 operand instruction support. Don't swap REG and NDS for FMA. gas/testsuite/ 2009-01-05 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (December, 2008) * gas/i386/arch-10.s: Replace vfmaddpd with vfmadd132pd. * gas/i386/x86-64-arch-2.s: Likewise. * gas/i386/arch-10.d: Updated. * gas/i386/arch-10-1.l: Likewise. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/avx.d: Likewise. * gas/i386/avx-intel.d: Likewise. * gas/i386/inval-avx.l: Likewise. * gas/i386/x86-64-arch-2.d: Likewise. * gas/i386/x86-64-avx.d: Likewise. * gas/i386/x86-64-avx-intel.d: Likewise. * gas/i386/x86-64-inval-avx.l: Likewise. * gas/i386/avx.s: Remove vpermil2ps/vpermil2pd and FMA instructions. Update tests. * gas/i386/inval-avx.s: Likewise. * gas/i386/x86-64-avx.s: Likewise. * gas/i386/x86-64-inval-avx.s: Likewise. * gas/i386/fma.d: New. * gas/i386/fma.s: Likewise. * gas/i386/fma-intel.d: Likewise. * gas/i386/x86-64-fma.d: Likewise. * gas/i386/x86-64-fma.s: Likewise. * gas/i386/x86-64-fma-intel.d: Likewise. * gas/i386/i386.exp: Run fma, fma-intel, x86-64-fma and x86-64-fma-intel. opcodes/ 2009-01-05 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (December, 2008) * i386-dis.c (OP_VEX_FMA): Removed. (OP_EX_VexW): Likewise. (OP_EX_VexImmW): Likewise. (OP_XMM_VexW): Likewise. (VEXI4_Fixup): Likewise. (VPERMIL2_Fixup): Likewise. (VexI4): Likewise. (VexFMA): Likewise. (Vex128FMA): Likewise. (EXVexW): Likewise. (EXdVexW): Likewise. (EXqVexW): Likewise. (EXVexImmW): Likewise. (XMVexW): Likewise. (VPERMIL2): Likewise. (PREFIX_VEX_3A48...PREFIX_VEX_3A4A): Likewise. (PREFIX_VEX_3A5C...PREFIX_VEX_3A5F): Likewise. (PREFIX_VEX_3A68...PREFIX_VEX_3A6F): Likewise. (PREFIX_VEX_3A78...PREFIX_VEX_3A7F): Likewise. (VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2): Likewise. (VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2): Likewise. (get_vex_imm8): Likewise. (OP_EX_VexReg): Likewise. vpermil2_op): Likewise. (EXVexWdq): New. (vex_w_dq_mode): Likewise. (PREFIX_VEX_3896...PREFIX_VEX_389F): Likewise. (PREFIX_VEX_38A6...PREFIX_VEX_38AF): Likewise. (PREFIX_VEX_38B6...PREFIX_VEX_38BF): Likewise. (es_reg): Updated. (PREFIX_VEX_38DB): Likewise. (PREFIX_VEX_3A4A): Likewise. (PREFIX_VEX_3A60): Likewise. (PREFIX_VEX_3ADF): Likewise. (VEX_LEN_3ADF_P_2): Likewise. (prefix_table): Remove PREFIX_VEX_3A48...PREFIX_VEX_3A4A, PREFIX_VEX_3A5C...PREFIX_VEX_3A5F, PREFIX_VEX_3A68...PREFIX_VEX_3A6F and PREFIX_VEX_3A78...PREFIX_VEX_3A7F. Add PREFIX_VEX_3896...PREFIX_VEX_389F, PREFIX_VEX_38A6...PREFIX_VEX_38AF and PREFIX_VEX_38B6...PREFIX_VEX_38BF. (vex_table): Likewise. (vex_len_table): Remove VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2 and VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2. (putop): Support "%XW". (intel_operand_size): Handle vex_w_dq_mode. * i386-opc.h (VexNDS): Add a comment for VEX NDS and VEX DDS. * i386-opc.tbl: Remove vpermil2pd/vpermil2ps and old FMA instructions. Add new FMA instructions. * i386-tbl.h: Regenerated.
2009-01-06 02:03:27 +01:00
(vex_len_table): Remove VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2
and VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2.
(putop): Support "%XW".
(intel_operand_size): Handle vex_w_dq_mode.
gas/ 2009-01-05 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (December, 2008) * config/tc-i386.c (build_modrm_byte): Remove 5 operand instruction support. Don't swap REG and NDS for FMA. gas/testsuite/ 2009-01-05 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (December, 2008) * gas/i386/arch-10.s: Replace vfmaddpd with vfmadd132pd. * gas/i386/x86-64-arch-2.s: Likewise. * gas/i386/arch-10.d: Updated. * gas/i386/arch-10-1.l: Likewise. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/avx.d: Likewise. * gas/i386/avx-intel.d: Likewise. * gas/i386/inval-avx.l: Likewise. * gas/i386/x86-64-arch-2.d: Likewise. * gas/i386/x86-64-avx.d: Likewise. * gas/i386/x86-64-avx-intel.d: Likewise. * gas/i386/x86-64-inval-avx.l: Likewise. * gas/i386/avx.s: Remove vpermil2ps/vpermil2pd and FMA instructions. Update tests. * gas/i386/inval-avx.s: Likewise. * gas/i386/x86-64-avx.s: Likewise. * gas/i386/x86-64-inval-avx.s: Likewise. * gas/i386/fma.d: New. * gas/i386/fma.s: Likewise. * gas/i386/fma-intel.d: Likewise. * gas/i386/x86-64-fma.d: Likewise. * gas/i386/x86-64-fma.s: Likewise. * gas/i386/x86-64-fma-intel.d: Likewise. * gas/i386/i386.exp: Run fma, fma-intel, x86-64-fma and x86-64-fma-intel. opcodes/ 2009-01-05 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (December, 2008) * i386-dis.c (OP_VEX_FMA): Removed. (OP_EX_VexW): Likewise. (OP_EX_VexImmW): Likewise. (OP_XMM_VexW): Likewise. (VEXI4_Fixup): Likewise. (VPERMIL2_Fixup): Likewise. (VexI4): Likewise. (VexFMA): Likewise. (Vex128FMA): Likewise. (EXVexW): Likewise. (EXdVexW): Likewise. (EXqVexW): Likewise. (EXVexImmW): Likewise. (XMVexW): Likewise. (VPERMIL2): Likewise. (PREFIX_VEX_3A48...PREFIX_VEX_3A4A): Likewise. (PREFIX_VEX_3A5C...PREFIX_VEX_3A5F): Likewise. (PREFIX_VEX_3A68...PREFIX_VEX_3A6F): Likewise. (PREFIX_VEX_3A78...PREFIX_VEX_3A7F): Likewise. (VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2): Likewise. (VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2): Likewise. (get_vex_imm8): Likewise. (OP_EX_VexReg): Likewise. vpermil2_op): Likewise. (EXVexWdq): New. (vex_w_dq_mode): Likewise. (PREFIX_VEX_3896...PREFIX_VEX_389F): Likewise. (PREFIX_VEX_38A6...PREFIX_VEX_38AF): Likewise. (PREFIX_VEX_38B6...PREFIX_VEX_38BF): Likewise. (es_reg): Updated. (PREFIX_VEX_38DB): Likewise. (PREFIX_VEX_3A4A): Likewise. (PREFIX_VEX_3A60): Likewise. (PREFIX_VEX_3ADF): Likewise. (VEX_LEN_3ADF_P_2): Likewise. (prefix_table): Remove PREFIX_VEX_3A48...PREFIX_VEX_3A4A, PREFIX_VEX_3A5C...PREFIX_VEX_3A5F, PREFIX_VEX_3A68...PREFIX_VEX_3A6F and PREFIX_VEX_3A78...PREFIX_VEX_3A7F. Add PREFIX_VEX_3896...PREFIX_VEX_389F, PREFIX_VEX_38A6...PREFIX_VEX_38AF and PREFIX_VEX_38B6...PREFIX_VEX_38BF. (vex_table): Likewise. (vex_len_table): Remove VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2 and VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2. (putop): Support "%XW". (intel_operand_size): Handle vex_w_dq_mode. * i386-opc.h (VexNDS): Add a comment for VEX NDS and VEX DDS. * i386-opc.tbl: Remove vpermil2pd/vpermil2ps and old FMA instructions. Add new FMA instructions. * i386-tbl.h: Regenerated.
2009-01-06 02:03:27 +01:00
* i386-opc.h (VexNDS): Add a comment for VEX NDS and VEX DDS.
gas/ 2009-01-05 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (December, 2008) * config/tc-i386.c (build_modrm_byte): Remove 5 operand instruction support. Don't swap REG and NDS for FMA. gas/testsuite/ 2009-01-05 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (December, 2008) * gas/i386/arch-10.s: Replace vfmaddpd with vfmadd132pd. * gas/i386/x86-64-arch-2.s: Likewise. * gas/i386/arch-10.d: Updated. * gas/i386/arch-10-1.l: Likewise. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/avx.d: Likewise. * gas/i386/avx-intel.d: Likewise. * gas/i386/inval-avx.l: Likewise. * gas/i386/x86-64-arch-2.d: Likewise. * gas/i386/x86-64-avx.d: Likewise. * gas/i386/x86-64-avx-intel.d: Likewise. * gas/i386/x86-64-inval-avx.l: Likewise. * gas/i386/avx.s: Remove vpermil2ps/vpermil2pd and FMA instructions. Update tests. * gas/i386/inval-avx.s: Likewise. * gas/i386/x86-64-avx.s: Likewise. * gas/i386/x86-64-inval-avx.s: Likewise. * gas/i386/fma.d: New. * gas/i386/fma.s: Likewise. * gas/i386/fma-intel.d: Likewise. * gas/i386/x86-64-fma.d: Likewise. * gas/i386/x86-64-fma.s: Likewise. * gas/i386/x86-64-fma-intel.d: Likewise. * gas/i386/i386.exp: Run fma, fma-intel, x86-64-fma and x86-64-fma-intel. opcodes/ 2009-01-05 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (December, 2008) * i386-dis.c (OP_VEX_FMA): Removed. (OP_EX_VexW): Likewise. (OP_EX_VexImmW): Likewise. (OP_XMM_VexW): Likewise. (VEXI4_Fixup): Likewise. (VPERMIL2_Fixup): Likewise. (VexI4): Likewise. (VexFMA): Likewise. (Vex128FMA): Likewise. (EXVexW): Likewise. (EXdVexW): Likewise. (EXqVexW): Likewise. (EXVexImmW): Likewise. (XMVexW): Likewise. (VPERMIL2): Likewise. (PREFIX_VEX_3A48...PREFIX_VEX_3A4A): Likewise. (PREFIX_VEX_3A5C...PREFIX_VEX_3A5F): Likewise. (PREFIX_VEX_3A68...PREFIX_VEX_3A6F): Likewise. (PREFIX_VEX_3A78...PREFIX_VEX_3A7F): Likewise. (VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2): Likewise. (VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2): Likewise. (get_vex_imm8): Likewise. (OP_EX_VexReg): Likewise. vpermil2_op): Likewise. (EXVexWdq): New. (vex_w_dq_mode): Likewise. (PREFIX_VEX_3896...PREFIX_VEX_389F): Likewise. (PREFIX_VEX_38A6...PREFIX_VEX_38AF): Likewise. (PREFIX_VEX_38B6...PREFIX_VEX_38BF): Likewise. (es_reg): Updated. (PREFIX_VEX_38DB): Likewise. (PREFIX_VEX_3A4A): Likewise. (PREFIX_VEX_3A60): Likewise. (PREFIX_VEX_3ADF): Likewise. (VEX_LEN_3ADF_P_2): Likewise. (prefix_table): Remove PREFIX_VEX_3A48...PREFIX_VEX_3A4A, PREFIX_VEX_3A5C...PREFIX_VEX_3A5F, PREFIX_VEX_3A68...PREFIX_VEX_3A6F and PREFIX_VEX_3A78...PREFIX_VEX_3A7F. Add PREFIX_VEX_3896...PREFIX_VEX_389F, PREFIX_VEX_38A6...PREFIX_VEX_38AF and PREFIX_VEX_38B6...PREFIX_VEX_38BF. (vex_table): Likewise. (vex_len_table): Remove VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2 and VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2. (putop): Support "%XW". (intel_operand_size): Handle vex_w_dq_mode. * i386-opc.h (VexNDS): Add a comment for VEX NDS and VEX DDS. * i386-opc.tbl: Remove vpermil2pd/vpermil2ps and old FMA instructions. Add new FMA instructions. * i386-tbl.h: Regenerated.
2009-01-06 02:03:27 +01:00
* i386-opc.tbl: Remove vpermil2pd/vpermil2ps and old FMA
instructions. Add new FMA instructions.
* i386-tbl.h: Regenerated.
gas/ 2009-01-05 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (December, 2008) * config/tc-i386.c (build_modrm_byte): Remove 5 operand instruction support. Don't swap REG and NDS for FMA. gas/testsuite/ 2009-01-05 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (December, 2008) * gas/i386/arch-10.s: Replace vfmaddpd with vfmadd132pd. * gas/i386/x86-64-arch-2.s: Likewise. * gas/i386/arch-10.d: Updated. * gas/i386/arch-10-1.l: Likewise. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/avx.d: Likewise. * gas/i386/avx-intel.d: Likewise. * gas/i386/inval-avx.l: Likewise. * gas/i386/x86-64-arch-2.d: Likewise. * gas/i386/x86-64-avx.d: Likewise. * gas/i386/x86-64-avx-intel.d: Likewise. * gas/i386/x86-64-inval-avx.l: Likewise. * gas/i386/avx.s: Remove vpermil2ps/vpermil2pd and FMA instructions. Update tests. * gas/i386/inval-avx.s: Likewise. * gas/i386/x86-64-avx.s: Likewise. * gas/i386/x86-64-inval-avx.s: Likewise. * gas/i386/fma.d: New. * gas/i386/fma.s: Likewise. * gas/i386/fma-intel.d: Likewise. * gas/i386/x86-64-fma.d: Likewise. * gas/i386/x86-64-fma.s: Likewise. * gas/i386/x86-64-fma-intel.d: Likewise. * gas/i386/i386.exp: Run fma, fma-intel, x86-64-fma and x86-64-fma-intel. opcodes/ 2009-01-05 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (December, 2008) * i386-dis.c (OP_VEX_FMA): Removed. (OP_EX_VexW): Likewise. (OP_EX_VexImmW): Likewise. (OP_XMM_VexW): Likewise. (VEXI4_Fixup): Likewise. (VPERMIL2_Fixup): Likewise. (VexI4): Likewise. (VexFMA): Likewise. (Vex128FMA): Likewise. (EXVexW): Likewise. (EXdVexW): Likewise. (EXqVexW): Likewise. (EXVexImmW): Likewise. (XMVexW): Likewise. (VPERMIL2): Likewise. (PREFIX_VEX_3A48...PREFIX_VEX_3A4A): Likewise. (PREFIX_VEX_3A5C...PREFIX_VEX_3A5F): Likewise. (PREFIX_VEX_3A68...PREFIX_VEX_3A6F): Likewise. (PREFIX_VEX_3A78...PREFIX_VEX_3A7F): Likewise. (VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2): Likewise. (VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2): Likewise. (get_vex_imm8): Likewise. (OP_EX_VexReg): Likewise. vpermil2_op): Likewise. (EXVexWdq): New. (vex_w_dq_mode): Likewise. (PREFIX_VEX_3896...PREFIX_VEX_389F): Likewise. (PREFIX_VEX_38A6...PREFIX_VEX_38AF): Likewise. (PREFIX_VEX_38B6...PREFIX_VEX_38BF): Likewise. (es_reg): Updated. (PREFIX_VEX_38DB): Likewise. (PREFIX_VEX_3A4A): Likewise. (PREFIX_VEX_3A60): Likewise. (PREFIX_VEX_3ADF): Likewise. (VEX_LEN_3ADF_P_2): Likewise. (prefix_table): Remove PREFIX_VEX_3A48...PREFIX_VEX_3A4A, PREFIX_VEX_3A5C...PREFIX_VEX_3A5F, PREFIX_VEX_3A68...PREFIX_VEX_3A6F and PREFIX_VEX_3A78...PREFIX_VEX_3A7F. Add PREFIX_VEX_3896...PREFIX_VEX_389F, PREFIX_VEX_38A6...PREFIX_VEX_38AF and PREFIX_VEX_38B6...PREFIX_VEX_38BF. (vex_table): Likewise. (vex_len_table): Remove VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2 and VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2. (putop): Support "%XW". (intel_operand_size): Handle vex_w_dq_mode. * i386-opc.h (VexNDS): Add a comment for VEX NDS and VEX DDS. * i386-opc.tbl: Remove vpermil2pd/vpermil2ps and old FMA instructions. Add new FMA instructions. * i386-tbl.h: Regenerated.
2009-01-06 02:03:27 +01:00
2009-01-02 Matthias Klose <doko@ubuntu.com>
gas/ 2009-01-05 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (December, 2008) * config/tc-i386.c (build_modrm_byte): Remove 5 operand instruction support. Don't swap REG and NDS for FMA. gas/testsuite/ 2009-01-05 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (December, 2008) * gas/i386/arch-10.s: Replace vfmaddpd with vfmadd132pd. * gas/i386/x86-64-arch-2.s: Likewise. * gas/i386/arch-10.d: Updated. * gas/i386/arch-10-1.l: Likewise. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/avx.d: Likewise. * gas/i386/avx-intel.d: Likewise. * gas/i386/inval-avx.l: Likewise. * gas/i386/x86-64-arch-2.d: Likewise. * gas/i386/x86-64-avx.d: Likewise. * gas/i386/x86-64-avx-intel.d: Likewise. * gas/i386/x86-64-inval-avx.l: Likewise. * gas/i386/avx.s: Remove vpermil2ps/vpermil2pd and FMA instructions. Update tests. * gas/i386/inval-avx.s: Likewise. * gas/i386/x86-64-avx.s: Likewise. * gas/i386/x86-64-inval-avx.s: Likewise. * gas/i386/fma.d: New. * gas/i386/fma.s: Likewise. * gas/i386/fma-intel.d: Likewise. * gas/i386/x86-64-fma.d: Likewise. * gas/i386/x86-64-fma.s: Likewise. * gas/i386/x86-64-fma-intel.d: Likewise. * gas/i386/i386.exp: Run fma, fma-intel, x86-64-fma and x86-64-fma-intel. opcodes/ 2009-01-05 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (December, 2008) * i386-dis.c (OP_VEX_FMA): Removed. (OP_EX_VexW): Likewise. (OP_EX_VexImmW): Likewise. (OP_XMM_VexW): Likewise. (VEXI4_Fixup): Likewise. (VPERMIL2_Fixup): Likewise. (VexI4): Likewise. (VexFMA): Likewise. (Vex128FMA): Likewise. (EXVexW): Likewise. (EXdVexW): Likewise. (EXqVexW): Likewise. (EXVexImmW): Likewise. (XMVexW): Likewise. (VPERMIL2): Likewise. (PREFIX_VEX_3A48...PREFIX_VEX_3A4A): Likewise. (PREFIX_VEX_3A5C...PREFIX_VEX_3A5F): Likewise. (PREFIX_VEX_3A68...PREFIX_VEX_3A6F): Likewise. (PREFIX_VEX_3A78...PREFIX_VEX_3A7F): Likewise. (VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2): Likewise. (VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2): Likewise. (get_vex_imm8): Likewise. (OP_EX_VexReg): Likewise. vpermil2_op): Likewise. (EXVexWdq): New. (vex_w_dq_mode): Likewise. (PREFIX_VEX_3896...PREFIX_VEX_389F): Likewise. (PREFIX_VEX_38A6...PREFIX_VEX_38AF): Likewise. (PREFIX_VEX_38B6...PREFIX_VEX_38BF): Likewise. (es_reg): Updated. (PREFIX_VEX_38DB): Likewise. (PREFIX_VEX_3A4A): Likewise. (PREFIX_VEX_3A60): Likewise. (PREFIX_VEX_3ADF): Likewise. (VEX_LEN_3ADF_P_2): Likewise. (prefix_table): Remove PREFIX_VEX_3A48...PREFIX_VEX_3A4A, PREFIX_VEX_3A5C...PREFIX_VEX_3A5F, PREFIX_VEX_3A68...PREFIX_VEX_3A6F and PREFIX_VEX_3A78...PREFIX_VEX_3A7F. Add PREFIX_VEX_3896...PREFIX_VEX_389F, PREFIX_VEX_38A6...PREFIX_VEX_38AF and PREFIX_VEX_38B6...PREFIX_VEX_38BF. (vex_table): Likewise. (vex_len_table): Remove VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2 and VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2. (putop): Support "%XW". (intel_operand_size): Handle vex_w_dq_mode. * i386-opc.h (VexNDS): Add a comment for VEX NDS and VEX DDS. * i386-opc.tbl: Remove vpermil2pd/vpermil2ps and old FMA instructions. Add new FMA instructions. * i386-tbl.h: Regenerated.
2009-01-06 02:03:27 +01:00
* or32-opc.c (or32_print_register, or32_print_immediate,
disassemble_insn): Don't rely on undefined sprintf behaviour.
gas/ 2009-01-05 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (December, 2008) * config/tc-i386.c (build_modrm_byte): Remove 5 operand instruction support. Don't swap REG and NDS for FMA. gas/testsuite/ 2009-01-05 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (December, 2008) * gas/i386/arch-10.s: Replace vfmaddpd with vfmadd132pd. * gas/i386/x86-64-arch-2.s: Likewise. * gas/i386/arch-10.d: Updated. * gas/i386/arch-10-1.l: Likewise. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/avx.d: Likewise. * gas/i386/avx-intel.d: Likewise. * gas/i386/inval-avx.l: Likewise. * gas/i386/x86-64-arch-2.d: Likewise. * gas/i386/x86-64-avx.d: Likewise. * gas/i386/x86-64-avx-intel.d: Likewise. * gas/i386/x86-64-inval-avx.l: Likewise. * gas/i386/avx.s: Remove vpermil2ps/vpermil2pd and FMA instructions. Update tests. * gas/i386/inval-avx.s: Likewise. * gas/i386/x86-64-avx.s: Likewise. * gas/i386/x86-64-inval-avx.s: Likewise. * gas/i386/fma.d: New. * gas/i386/fma.s: Likewise. * gas/i386/fma-intel.d: Likewise. * gas/i386/x86-64-fma.d: Likewise. * gas/i386/x86-64-fma.s: Likewise. * gas/i386/x86-64-fma-intel.d: Likewise. * gas/i386/i386.exp: Run fma, fma-intel, x86-64-fma and x86-64-fma-intel. opcodes/ 2009-01-05 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (December, 2008) * i386-dis.c (OP_VEX_FMA): Removed. (OP_EX_VexW): Likewise. (OP_EX_VexImmW): Likewise. (OP_XMM_VexW): Likewise. (VEXI4_Fixup): Likewise. (VPERMIL2_Fixup): Likewise. (VexI4): Likewise. (VexFMA): Likewise. (Vex128FMA): Likewise. (EXVexW): Likewise. (EXdVexW): Likewise. (EXqVexW): Likewise. (EXVexImmW): Likewise. (XMVexW): Likewise. (VPERMIL2): Likewise. (PREFIX_VEX_3A48...PREFIX_VEX_3A4A): Likewise. (PREFIX_VEX_3A5C...PREFIX_VEX_3A5F): Likewise. (PREFIX_VEX_3A68...PREFIX_VEX_3A6F): Likewise. (PREFIX_VEX_3A78...PREFIX_VEX_3A7F): Likewise. (VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2): Likewise. (VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2): Likewise. (get_vex_imm8): Likewise. (OP_EX_VexReg): Likewise. vpermil2_op): Likewise. (EXVexWdq): New. (vex_w_dq_mode): Likewise. (PREFIX_VEX_3896...PREFIX_VEX_389F): Likewise. (PREFIX_VEX_38A6...PREFIX_VEX_38AF): Likewise. (PREFIX_VEX_38B6...PREFIX_VEX_38BF): Likewise. (es_reg): Updated. (PREFIX_VEX_38DB): Likewise. (PREFIX_VEX_3A4A): Likewise. (PREFIX_VEX_3A60): Likewise. (PREFIX_VEX_3ADF): Likewise. (VEX_LEN_3ADF_P_2): Likewise. (prefix_table): Remove PREFIX_VEX_3A48...PREFIX_VEX_3A4A, PREFIX_VEX_3A5C...PREFIX_VEX_3A5F, PREFIX_VEX_3A68...PREFIX_VEX_3A6F and PREFIX_VEX_3A78...PREFIX_VEX_3A7F. Add PREFIX_VEX_3896...PREFIX_VEX_389F, PREFIX_VEX_38A6...PREFIX_VEX_38AF and PREFIX_VEX_38B6...PREFIX_VEX_38BF. (vex_table): Likewise. (vex_len_table): Remove VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2 and VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2. (putop): Support "%XW". (intel_operand_size): Handle vex_w_dq_mode. * i386-opc.h (VexNDS): Add a comment for VEX NDS and VEX DDS. * i386-opc.tbl: Remove vpermil2pd/vpermil2ps and old FMA instructions. Add new FMA instructions. * i386-tbl.h: Regenerated.
2009-01-06 02:03:27 +01:00
For older changes see ChangeLog-2008
1999-05-03 09:29:11 +02:00
Local Variables:
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mode: change-log
left-margin: 8
fill-column: 74
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version-control: never
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