binutils-gdb/gas/NEWS

589 lines
20 KiB
Plaintext
Raw Normal View History

1999-05-03 09:29:11 +02:00
-*- text -*-
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 13:18:16 +02:00
* Add support for the Adapteva EPIPHANY architecture.
Changes in 2.22:
* Add support for the Tilera TILEPro and TILE-Gx architectures.
Changes in 2.21:
* Gas no longer requires doubling of ampersands in macros.
bfd: * Makefile.am (ALL_MACHINES): Add cpu-tic6x.lo. (ALL_MACHINES_CFILES): Add cpu-tic6x.c. (BFD32_BACKENDS): Add elf32-tic6x.lo. (BFD32_BACKENDS_CFILES): Add elf32-tic6x.c. * Makefile.in: Regenerate. * archures.c (bfd_arch_tic6x, bfd_tic6x_arch): New. (bfd_archures_list): Update. * config.bfd (tic6x-*-elf): New. * configure.in (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec): New. * configure: Regenerate. * cpu-tic6x.c, elf32-tic6x.c: New. * reloc.c (BFD_RELOC_C6000_PCR_S21, BFD_RELOC_C6000_PCR_S12, BFD_RELOC_C6000_PCR_S10, BFD_RELOC_C6000_PCR_S7, BFD_RELOC_C6000_ABS_S16, BFD_RELOC_C6000_ABS_L16, BFD_RELOC_C6000_ABS_H16, BFD_RELOC_C6000_SBR_U15_B, BFD_RELOC_C6000_SBR_U15_H, BFD_RELOC_C6000_SBR_U15_W, BFD_RELOC_C6000_SBR_S16, BFD_RELOC_C6000_SBR_L16_B, BFD_RELOC_C6000_SBR_L16_H, BFD_RELOC_C6000_SBR_L16_W, BFD_RELOC_C6000_SBR_H16_B, BFD_RELOC_C6000_SBR_H16_H, BFD_RELOC_C6000_SBR_H16_W, BFD_RELOC_C6000_SBR_GOT_U15_W, BFD_RELOC_C6000_SBR_GOT_L16_W, BFD_RELOC_C6000_SBR_GOT_H16_W, BFD_RELOC_C6000_DSBT_INDEX, BFD_RELOC_C6000_PREL31, BFD_RELOC_C6000_COPY, BFD_RELOC_C6000_ALIGN, BFD_RELOC_C6000_FPHEAD, BFD_RELOC_C6000_NOCMP): New. * targets.c (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec): New. (_bfd_target_vector): Update. * bfd-in2.h, libbfd.h: Regenerate. binutils: * MAINTAINERS: Add self as TI C6X maintainer. * NEWS: Add news entry for TI C6X support. * readelf.c: Include elf/tic6x.h. (guess_is_rela): Handle EM_TI_C6000. (dump_relocations): Likewise. (get_tic6x_dynamic_type): New. (get_dynamic_type): Call it. (get_machine_flags): Handle EF_C6000_REL. (get_osabi_name): Handle machine-specific values only for relevant machines. Handle C6X values. (get_tic6x_segment_type): New. (get_segment_type): Call it. (get_tic6x_section_type_name): New. (get_section_type_name): Call it. (is_32bit_abs_reloc, is_16bit_abs_reloc, is_none_reloc): Handle EM_TI_C6000. gas: * Makefile.am (TARGET_CPU_CFILES): Add config/tc-tic6x.c. (TARGET_CPU_HFILES): Add config/tc-tic6x.h. * Makefile.in: Regenerate. * NEWS: Add news entry for TI C6X support. * app.c (do_scrub_chars): Handle "||^" for TI C6X. Handle TC_PREDICATE_START_CHAR and TC_PREDICATE_END_CHAR. Keep spaces in operands if TC_KEEP_OPERAND_SPACES. * configure.tgt (tic6x-*-*): New. * config/tc-ia64.h (TC_PREDICATE_START_CHAR, TC_PREDICATE_END_CHAR): Define. * config/tc-tic6x.c, config/tc-tic6x.h: New. * doc/Makefile.am (CPU_DOCS): Add c-tic6x.texi. * doc/Makefile.in: Regenerate. * doc/all.texi (TIC6X): Define. * doc/as.texinfo: Add TI C6X documentation. Include c-tic6x.texi. * doc/c-tic6x.texi: New. gas/testsuite: * gas/tic6x: New directory and testcases. include: * dis-asm.h (print_insn_tic6x): Declare. include/elf: * common.h (ELFOSABI_C6000_ELFABI, ELFOSABI_C6000_LINUX): Define. * tic6x.h: New. include/opcode: * tic6x-control-registers.h, tic6x-insn-formats.h, tic6x-opcode-table.h, tic6x.h: New. ld: * Makefile.am (ALL_EMULATIONS): Add eelf32_tic6x_be.o and eelf32_tic6x_le.o. (eelf32_tic6x_be.c, eelf32_tic6x_le.c): New. * NEWS: Add news entry for TI C6X support. * configure.tgt (tic6x-*-*): New. * emulparams/elf32_tic6x_be.sh, emulparams/elf32_tic6x_le.sh: New. ld/testsuite: * ld-elf/flags1.d, ld-elf/merge.d: XFAIL for tic6x-*-*. * ld-elf/sec-to-seg.exp: Set B_test_same_seg to 0 for tic6x-*-*. * ld-tic6x: New directory and testcases. opcodes: * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c. * Makefile.in: Regenerate. * configure.in (bfd_tic6x_arch): New. * configure: Regenerate. * disassemble.c (ARCH_tic6x): Define if ARCH_all. (disassembler): Handle TI C6X. * tic6x-dis.c: New.
2010-03-25 22:12:36 +01:00
* Add support for the TMS320C6000 (TI C6X) processor family.
* GAS now understands an extended syntax in the .section directive flags
for COFF targets that allows the section's alignment to be specified. This
feature has also been backported to the 2.20 release series, starting with
2.20.1.
bfd * Makefile.am (ALL_MACHINES): Add cpu-rx.lo. (ALL_MACHINES_CFILES): Add cpu-rx.c. (BFD32_BACKENDS): Add elf32-rx.lo. (BFD32_BACKENDS_CFILES): Add elf32-rx.c. * archures.c (bfd_architecture): Add bfd_arch_rx and bfd_mach_rx. Export bfd_rx_arch. (bfd_archures_list): Add bfd_rx_arch. * config.bfd: Add entry for rx-*-elf. * configure.in: Add entries for bfd_elf32_rx_le_vec and bfd_elf32_rx_be_vec. * reloc.c: Add RX relocations. * targets.c: Add RX target vectors. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rx.c: New file. * elf32-rx.c: New file. binutils * readelf.c: Add support for RX target. * MAINTAINERS: Add DJ and NickC as maintainers for RX. gas * Makefile.am: Add RX target. * configure.in: Likewise. * configure.tgt: Likewise. * read.c (do_repeat_with_expander): New function. * read.h: Provide a prototype for do_repeat_with_expander. * doc/Makefile.am: Add RX target documentation. * doc/all.texi: Likewise. * doc/as.texinfo: Likewise. * Makefile.in: Regenerate. * NEWS: Mention support for RX architecture. * configure: Regenerate. * doc/Makefile.in: Regenerate. * config/rx-defs.h: New file. * config/rx-parse.y: New file. * config/tc-rx.h: New file. * config/tc-rx.c: New file. * doc/c-rx.texi: New file. gas/testsuite * gas/rx: New directory. * gas/rx/*: New set of test cases. * gas/elf/section2.e-rx: New expected output file. * gas/all/gas.exp: Add support for RX target. * gas/elf/elf.exp: Likewise. * gas/lns/lns.exp: Likewise. * gas/macros/macros.exp: Likewise. include * dis-asm.h: Add prototype for print_insn_rx. include/elf * rx.h: New file. include/opcode * rx.h: New file. ld * Makefile.am: Add rules to build RX emulation. * configure.tgt: Likewise. * NEWS: Mention support for RX architecture. * Makefile.in: Regenerate. * emulparams/elf32rx.sh: New file. * emultempl/rxelf.em: New file. opcodes * Makefile.am: Add RX files. * configure.in: Add support for RX target. * disassemble.c: Likewise. * Makefile.in: Regenerate. * configure: Regenerate. * opc2c.c: New file. * rx-decode.c: New file. * rx-decode.opc: New file. * rx-dis.c: New file.
2009-09-29 16:17:19 +02:00
* Add support for the Renesas RX processor.
* New command line option, --compress-debug-sections, which requests
compression of DWARF debug information sections in the relocatable output
file. Compressed debug sections are supported by readelf, objdump, and
gold, but not currently by Gnu ld.
Changes in 2.20:
2010-07-23 16:52:54 +02:00
* Added support for v850e2 and v850e2v3.
* config/obj-elf.c (obj_elf_type): Add code to support a type of gnu_unique_object. * doc/as.texinfo: Document new feature of .type directive. * NEWS: Mention support for gnu_unique_object symbol type. * common.h (STB_GNU_UNIQUE): Define. * NEWS: Mention the linker's support for symbols with a binding of STB_GNU_UNIQUE. * gas/elf/type.s: Add unique global symbol definition. * gas/elf/type.e: Add expected readelf output for global unique symbol. * elfcpp.h (enum STB): Add STB_GNU_UNIQUE. * readelf.c (get_symbol_binding): For Linux targeted files return UNIQUE for symbols with the STB_GNU_UNIQUE binding. * doc/binutils.texi: Document the meaning of the 'u' symbol binding in the output of nm and objdump --syms. * elf-bfd.h (struct elf_link_hash_entry): Add unique_global field. * elf.c (swap_out_syms): Set binding to STB_GNU_UNIQUE for symbols with the BSF_GNU_UNIQUE flag bit set. * elfcode.h (elf_slurp_symbol_table): Set the BSF_GNU_UNIQUE flag for symbols with STB_GNU_UNIQUE binding. * elflink.c (_bfd_elf_merge_symbol): Set unique_global for symbols with the STB_GNU_UNIQUE binding. (elf_link_add_object_symbols): Set the BSF_GNU_UNIQUE flag for symbols with STB_GNU_UNIQUE binding. Set STB_GNU_UNIQUE for symbols with the unique_global field set. (elf_link_output_extsym): Set unique_global field for symbols with the STB_GNU_UNIQUE binding. * syms.c (struct bfd_symbol): Define BSF_GNU_UNIQUE flag bit. (bfd_print_symbol_vandf): Print a 'u' character for BSF_GNU_UNIQUE symbols. (bfd_decode_symclass): Return a 'u' character for BSF_GNU_UNIQUE symbols. * bfd-in2.h: Regenerate.
2009-07-23 15:00:30 +02:00
* GNU/Linux targets now supports "gnu_unique_object" as a value in the .type
pseudo op. It marks the symbol as being globally unique in the entire
process.
* ARM assembler now supports .inst[.nw] pseudo-ops to insert opcodes specified
in binary rather than text.
==> bfd/ChangeLog <== 2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com> * cofflink.c (process_embedded_commands): Ignore "-aligncomm". ==> gas/ChangeLog <== 2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com> * NEWS: Mention new feature. * config/obj-coff.c (obj_coff_common_parse): New function. (obj_coff_comm): Likewise. (coff_pseudo_table): Override default ".comm" definition on PE. * doc/as.texinfo: Document new feature. ==> gas/testsuite/ChangeLog <== 2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com> * gas/pe/: New directory for PE format-specific tests. * gas/pe/aligncomm-a.d: New test pattern file. * gas/pe/aligncomm-a.s: New test source file. * gas/pe/aligncomm-b.d: New test pattern file. * gas/pe/aligncomm-b.s: New test source file. * gas/pe/aligncomm-c.d: New test pattern file. * gas/pe/aligncomm-c.s: New test source file. * gas/pe/aligncomm-d.d: New test pattern file. * gas/pe/aligncomm-d.s: New test source file. * gas/pe/pe.exp: New test control script. * lib/gas-defs.exp (is_pecoff_format): New function. ==> ld/ChangeLog <== 2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com> * NEWS: Mention new feature. * deffile.h (def_file_aligncomm): Add new struct definition. (def_file): Add new def_file_aligncomm member. * deffilep.y (%token): Add new ALIGNCOMM token. (command): Add production rule for ALIGNCOMM. (def_file_free): Free any chained def_file_aligncomm structs. (diropts[]): Add entry for '-aligncomm' .drectve command. (def_aligncomm): New grammar function. * ld.texinfo: Document new feature. * pe-dll.c (process_def_file): Rename from this ... (process_def_file_and_drectve): ... to this, updating all callers, and process any aligncomms chained to the def file after scanning all .drectve sections. (generate_edata): Updated to match. (pe_dll_build_sections): Likewise. ==> ld/testsuite/ChangeLog <== 2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com> * ld-pe/aligncomm-1.c: New test source file. * ld-pe/aligncomm-2.c: Likewise. * ld-pe/aligncomm-3.c: Likewise. * ld-pe/aligncomm-4.c: Likewise. * ld-pe/aligncomm.d: New test pattern file. * ld-pe/direct.exp: Deleted, and content moved into ... * ld-pe/pe-run.exp: ... New common file for all PE run tests. * ld-pe/vers-script.exp: Deleted, and content merged into ... * ld-pe/pe-compile.exp: ... New common file for PE tests needing a compiler, adding aligned common tests. * ld-pe/pe.exp: Update header comment.
2009-05-19 18:08:08 +02:00
* Add support for common symbol alignment to PE formats.
* Add support for the new discriminator column in the DWARF line table,
with a discriminator operand for the .loc directive.
2009-03-02 11:33:08 +01:00
* Add support for Sunplus score architecture.
include/elf 2009-04-30 Nick Clifton <nickc@redhat.com> * common.h (STT_GNU_IFUNC): Define. elfcpp 2009-04-30 Nick Clifton <nickc@redhat.com> * (enum STT): Add STT_GNU_IFUNC. gas 2009-04-30 Nick Clifton <nickc@redhat.com> * config/obj-elf.c (obj_elf_type): Add support for a gnu_indirect_function type. * config/tc-i386.c (tc_i386_fix_adjustable): Do not adjust fixups against indirect function symbols. * doc/as.texinfo (.type): Document the support for the gnu_indirect_function symbol type. * NEWS: Mention the new feature. gas/testsuite 2009-04-30 Nick Clifton <nickc@redhat.com> * gas/elf/elf.exp: Extend type test to include an ifunc symbol. Provide an alternative test for targets which do not support ifunc symbols. (type.s): Add entry for an ifunc symbol. (type.e): Add ifunc entry to expected symbol dump. (section2.e-armelf): Add entry for ifunc symbol. (type-noifunc.s): New file. (type-noifunc.e): New file. bfd/ 2009-04-30 Nick Clifton <nickc@redhat.com> * elf-bfd.h (struct bfd_elf_section_data): Add indirect_relocs section pointer. (struct elf_obj_data): Add has_ifunc_symbols boolean. * elf.c (swap_out_syms): Convert BSF_GNU_INDIRECT_FUNCTION flags into a STT_GNU_IFUNC symbol type. (_bfd_elf_is_function_type): Accept STT_GNU_IFUNC as a function type. (_bfd_elf_set_osabi): Set the osasbi field to ELFOSABI_LINUX if the binary contains ifunc symbols. * elfcode.h (elf_slurp_symbol_table): Translate the STT_GNU_IFUNC symbol type into a BSF_GNU_INDIRECT_FUNCTION flag. * elf32-i386.c (is_indirect_function): New function. (elf_i386_check_relocs): Create an ifunc output section. (allocate_dynrelocs): Create dynamic relocs in the ifunc output section if necessary. (elf_i386_relocate_section): Emit a reloc against an ifunc symbol if necessary. (elf_i386_add_symbol_hook): New function. Set the has_ifunc_symbols field of the elf_obj_data structure if an ifunc symbol is encountered. (elf_backend_post_process_headers): Define. (elf_backend_add_symbol_hook): Define. (elf_i386_post_process_headers): Rename to elf_i388_fbsd_post_process_headers. * elf64-x86_64.c (IS_X86_64_PCREL_TYPE): New macro. (is_indirect_function): New function. (elf64_x86_64_check_relocs): Create an ifunc output section. (allocate_dynrelocs): Create dynamic relocs in the ifunc output section if necessary. (elf64_x86_64_relocate_section): Emit a reloc against an ifunc symbol if necessary. (elf_i386_add_symbol_hook): Set the has_ifunc_symbols field of the elf_obj_data structure if an ifunc symbol is encountered. (elf_backend_post_process_headers): Define. * elflink.c (_bfd_elf_adjust_dynamic_symbol): Always create a PLT if we have ifunc symbols to handle. (get_ifunc_reloc_section_name): New function. Computes the name for an ifunc section. (_bfd_elf_make_ifunc_reloc_section): New function. Creates a section to hold ifunc relocs. * syms.c (BSF_GNU_INDIRECT_FUNCTION): Define. (bfd_print_symbol_vandf): Handle ifunc symbols. (bfd_decode_symclass): Likewise. * bfd-in2.h: Regenerate. binutils 2009-04-30 Nick Clifton <nickc@redhat.com> * readelf.c (dump_relocations): Display a relocation against an ifunc symbol as if it were a function invocation. (get_symbol_type): Handle STT_GNU_IFUNC. ld 2009-04-30 Nick Clifton <nickc@redhat.com> * NEWS: Mention support for IFUNC symbols. ld/testsuite 2009-04-30 Nick Clifton <nickc@redhat.com> * ld-ifunc: New directory. * ld-ifunc/ifunc.exp: New file: Run the IFUNC tests. * ld-ifunc/prog.c: New file. * ld-ifunc/lib.c: New file.
2009-04-30 17:47:13 +02:00
* The .type pseudo-op now accepts a type of STT_GNU_IFUNC which can be used to
indicate that if the symbol is the target of a relocation, its value should
not be use. Instead the function should be invoked and its result used as
the value.
2008-12-23 20:10:25 +01:00
* Add support for Lattice Mico32 (lm32) architecture.
2009-08-07 14:12:52 +02:00
* Add support for Xilinx MicroBlaze architecture.
Changes in 2.19:
2008-09-28 17:15:32 +02:00
* New pseudo op .cfi_val_encoded_addr, to record constant addresses in unwind
tables without runtime relocation.
* New command line option, -h-tick-hex, for sh, m32c, and h8/300 targets, which
adds compatibility with H'00 style hex constants.
* New command line option, -msse-check=[none|error|warning], for x86
targets.
* New sub-option added to the assembler's -a command line switch to
generate a listing output. The 'g' sub-option will insert into the listing
various information about the assembly, such as assembler version, the
command line options used, and a time stamp.
binutils/ 2008-04-03 H.J. Lu <hongjiu.lu@intel.com> * dwarf.c (dwarf_regnames_i386): Add AVX registers. (dwarf_regnames_x86_64): Likewise. gas/ 2008-04-03 H.J. Lu <hongjiu.lu@intel.com> * NEWS: Mention AES, CLMUL, AVX/FMA and -msse2avx. * doc/c-i386.texi: Add avx, aes, clmul and fma to -march=. Document -msse2avx, .avx, .aes, .clmul and .fma. * config/tc-i386.c (YMMWORD_MNEM_SUFFIX): New. (vex_prefix): Likewise. (sse2avx): Likewise. (CPU_FLAGS_ARCH_MATCH): Likewise. (CPU_FLAGS_64BIT_MATCH): Likewise. (CPU_FLAGS_32BIT_MATCH): Likewise. (CPU_FLAGS_PERFECT_MATCH): Likewise. (regymm): Likewise. (vex_imm4): Likewise. (fits_in_imm4): Likewise. (build_vex_prefix): Likewise. (VEX_check_operands): Likewise. (bad_implicit_operand): Likewise. (OPTION_MSSE2AVX): Likewise. (T_YMMWORD): Likewise. (_i386_insn): Add vex. (cpu_arch): Add .avx, .aes, .clmul and .fma. (cpu_flags_match): Changed to take a pointer to const template. Enable encoding SSE instructions with VEX prefix for -msse2avx. (match_mem_size): Also check ymmword. (operand_type_match): Clear ymmword. (md_begin): Allow '_' in mnemonic. (type_names): Add OPERAND_TYPE_VEX_IMM4. (process_immext): Update assert. (md_assemble): Don't call process_immext if sse2avx and immext are true. Call build_vex_prefix if vex is true. (parse_insn): Updated for cpu_flags_match. (swap_operands): Handle 5 operands. (match_template): Handle 5 operands. Updated for cpu_flags_match. Check regymm. Call VEX_check_operands. Handle YMMWORD_MNEM_SUFFIX. (process_suffix): Handle YMMWORD_MNEM_SUFFIX. (check_byte_reg): Check regymm. (process_operands): Duplicate the destination register for -msse2avx if needed. (build_modrm_byte): Updated for instructions with VEX encoding. (output_insn): Output VEX prefix if needed. (md_longopts): Add msse2avx. (md_parse_option): Handle OPTION_MSSE2AVX. (md_show_usage): Add avx, aes, clmul, fma and -msse2avx. (intel_e09): Support YMMWORD. (intel_e11): Likewise. (intel_get_token): Likewise. gas/testsuite/ 2008-04-03 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Run aes, aes-intel, x86-64-aes, x86-64-aes-intel, avx, avx-intel, inval-avx, x86-64-avx, x86-64-avx-intel and x86-64-inval-avx. * gas/cfi/cfi-i386.s: Add tests for AVX register maps. * gas/cfi/cfi-x86_64.s: Likewise. * gas/i386/aes.d: New. * gas/i386/aes.s: Likewise. * gas/i386/aes-intel.d: Likewise. * gas/i386/avx.d: Likewise. * gas/i386/avx.s: Likewise. * gas/i386/avx-intel.d: Likewise. * gas/i386/clmul.d: Likewise. * gas/i386/clmul-intel.d: Likewise. * gas/i386/clmul.s: Likewise. * gas/i386/i386.exp: Likewise. * gas/i386/inval-avx.l: Likewise. * gas/i386/inval-avx.s: Likewise. * gas/i386/sse2avx.d: Likewise. * gas/i386/sse2avx.s: Likewise. * gas/i386/x86-64-aes.d: Likewise. * gas/i386/x86-64-aes.s: Likewise. * gas/i386/x86-64-aes-intel.d: Likewise. * gas/i386/x86-64-avx.d: Likewise. * gas/i386/x86-64-avx.s: Likewise. * gas/i386/x86-64-avx-intel.d: Likewise. * gas/i386/x86-64-clmul.d: Likewise. * gas/i386/x86-64-clmul-intel.d: Likewise. * gas/i386/x86-64-clmul.s: Likewise. * gas/i386/x86-64-inval-avx.l: Likewise. * gas/i386/x86-64-inval-avx.s: Likewise. * gas/i386/x86-64-sse2avx.d: Likewise. * gas/i386/x86-64-sse2avx.s: Likewise. * gas/i386/arch-10.s: Add tests for AVX, AES, CLMUL and FMA. * gas/i386/x86-64-arch-2.s: Likewise. * gas/i386/rexw.s: Add AVX tests. * gas/i386/x86-64-opcode-inval.s: Remove lds/les test. * gas/cfi/cfi-i386.d: Updated. * gas/cfi/cfi-x86_64.d: Likewise. * gas/i386/arch-10.d: Likewise. * gas/i386/arch-10-1.l: Likewise. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/rexw.d: Likewise. * gas/i386/x86-64-arch-2.d: Likewise. * gas/i386/x86-64-opcode-inval.d: Likewise. * gas/i386/x86-64-opcode-inval-intel.d: Likewise. include/opcode/ 2008-04-03 H.J. Lu <hongjiu.lu@intel.com> * i386.h (MAX_OPERANDS): Set to 5. (MAX_MNEM_SIZE): Changed to 20. opcodes/ 2008-04-03 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (OP_E_register): New. (OP_E_memory): Likewise. (OP_VEX): Likewise. (OP_EX_Vex): Likewise. (OP_EX_VexW): Likewise. (OP_XMM_Vex): Likewise. (OP_XMM_VexW): Likewise. (OP_REG_VexI4): Likewise. (PCLMUL_Fixup): Likewise. (VEXI4_Fixup): Likewise. (VZERO_Fixup): Likewise. (VCMP_Fixup): Likewise. (VPERMIL2_Fixup): Likewise. (rex_original): Likewise. (rex_ignored): Likewise. (Mxmm): Likewise. (XMM): Likewise. (EXxmm): Likewise. (EXxmmq): Likewise. (EXymmq): Likewise. (Vex): Likewise. (Vex128): Likewise. (Vex256): Likewise. (VexI4): Likewise. (EXdVex): Likewise. (EXqVex): Likewise. (EXVexW): Likewise. (EXdVexW): Likewise. (EXqVexW): Likewise. (XMVex): Likewise. (XMVexW): Likewise. (XMVexI4): Likewise. (PCLMUL): Likewise. (VZERO): Likewise. (VCMP): Likewise. (VPERMIL2): Likewise. (xmm_mode): Likewise. (xmmq_mode): Likewise. (ymmq_mode): Likewise. (vex_mode): Likewise. (vex128_mode): Likewise. (vex256_mode): Likewise. (USE_VEX_C4_TABLE): Likewise. (USE_VEX_C5_TABLE): Likewise. (USE_VEX_LEN_TABLE): Likewise. (VEX_C4_TABLE): Likewise. (VEX_C5_TABLE): Likewise. (VEX_LEN_TABLE): Likewise. (REG_VEX_XX): Likewise. (MOD_VEX_XXX): Likewise. (PREFIX_0F38DB..PREFIX_0F38DF): Likewise. (PREFIX_0F3A44): Likewise. (PREFIX_0F3ADF): Likewise. (PREFIX_VEX_XXX): Likewise. (VEX_OF): Likewise. (VEX_OF38): Likewise. (VEX_OF3A): Likewise. (VEX_LEN_XXX): Likewise. (vex): Likewise. (need_vex): Likewise. (need_vex_reg): Likewise. (vex_i4_done): Likewise. (vex_table): Likewise. (vex_len_table): Likewise. (OP_REG_VexI4): Likewise. (vex_cmp_op): Likewise. (pclmul_op): Likewise. (vpermil2_op): Likewise. (m_mode): Updated. (es_reg): Likewise. (PREFIX_0F38F0): Likewise. (PREFIX_0F3A60): Likewise. (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE. (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF and PREFIX_VEX_XXX entries. (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE. (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and PREFIX_0F3ADF. (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE. Add MOD_VEX_XXX entries. (ckprefix): Initialize rex_original and rex_ignored. Store the REX byte in rex_original. (get_valid_dis386): Handle the implicit prefix in VEX prefix bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE. (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before calling get_valid_dis386. Use rex_original and rex_ignored when printing out REX. (putop): Handle "XY". (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and ymmq_mode. (OP_E_extended): Updated to use OP_E_register and OP_E_memory. (OP_XMM): Handle VEX. (OP_EX): Likewise. (XMM_Fixup): Likewise. (CMP_Fixup): Use ARRAY_SIZE. * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS, CPU_FMA_FLAGS and CPU_AVX_FLAGS. (operand_type_init): Add OPERAND_TYPE_REGYMM and OPERAND_TYPE_VEX_IMM4. (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA. (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD, VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources, VexImmExt and SSE2AVX. (operand_types): Add RegYMM, Ymmword and Vex_Imm4. * i386-opc.h (CpuAVX): New. (CpuAES): Likewise. (CpuCLMUL): Likewise. (CpuFMA): Likewise. (Vex): Likewise. (Vex256): Likewise. (VexNDS): Likewise. (VexNDD): Likewise. (VexW0): Likewise. (VexW1): Likewise. (Vex0F): Likewise. (Vex0F38): Likewise. (Vex0F3A): Likewise. (Vex3Sources): Likewise. (VexImmExt): Likewise. (SSE2AVX): Likewise. (RegYMM): Likewise. (Ymmword): Likewise. (Vex_Imm4): Likewise. (Implicit1stXmm0): Likewise. (CpuXsave): Updated. (CpuLM): Likewise. (ByteOkIntel): Likewise. (OldGcc): Likewise. (Control): Likewise. (Unspecified): Likewise. (OTMax): Likewise. (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma. (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256, vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a, vex3sources, veximmext and sse2avx. (i386_operand_type): Add regymm, ymmword and vex_imm4. * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions. * i386-reg.tbl: Add AVX registers, ymm0..ymm15. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2008-04-03 16:03:21 +02:00
* New command line option -msse2avx for x86 target to encode SSE
instructions with VEX prefix.
gas/ 2008-05-02 H.J. Lu <hongjiu.lu@intel.com> * NEWS: Mention XSAVE, EPT and MOVBE. * config/tc-i386.c (cpu_arch): Add .movbe and .ept. (md_show_usage): Add .movbe and .ept. * doc/c-i386.texi: Add movbe and ept to -march=. Document .movbe and .ept. gas/testsuite/ 2008-05-02 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Run movbe, movbe-intel, inval-movbe, ept, ept-intel, inval-ept, x86-64-movbe, x86-64-movbe-intel, x86-64-inval-movbe. x86-64-ept, x86-64-ept-intel and x86-64-inval-ept. * gas/i386/arch-10.s: Add movbe and invept. * gas/i386/x86-64-arch-2.s: Likewise. * gas/i386/ept.d: New file * gas/i386/ept-intel.d: Likewise. * gas/i386/ept.s: Likewise. * gas/i386/inval-ept.l: Likewise. * gas/i386/inval-ept.s: Likewise. * gas/i386/inval-movbe.l: Likewise. * gas/i386/inval-movbe.s: Likewise. * gas/i386/movbe.d: Likewise. * gas/i386/movbe-intel.d: Likewise. * gas/i386/movbe.s: Likewise. * gas/i386/x86-64-inval-ept.l: Likewise. * gas/i386/x86-64-inval-ept.s: Likewise. * gas/i386/x86-64-inval-movbe.l: Likewise. * gas/i386/x86-64-inval-movbe.s: Likewise. * gas/i386/x86-64-ept.d: Likewise. * gas/i386/x86-64-ept-intel.d: Likewise. * gas/i386/x86-64-ept.s: Likewise. * gas/i386/x86-64-movbe.d: Likewise. * gas/i386/x86-64-movbe-intel.d: Likewise. * gas/i386/x86-64-movbe.s: Likewise. * gas/i386/arch-10.d: Updated. * gas/i386/arch-10-1.l: Likewise. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/x86-64-arch-2.d: Likewise. opcodes/ 2008-05-02 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (MOVBE_Fixup): New. (Mo): Likewise. (PREFIX_0F3880): Likewise. (PREFIX_0F3881): Likewise. (PREFIX_0F38F0): Updated. (prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881. Update PREFIX_0F38F0 and PREFIX_0F38F1 for movbe. (three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881. * i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and CPU_EPT_FLAGS. (cpu_flags): Add CpuMovbe and CpuEPT. * i386-opc.h (CpuMovbe): New. (CpuEPT): Likewise. (CpuLM): Updated. (i386_cpu_flags): Add cpumovbe and cpuept. * i386-opc.tbl: Add entries for movbe and EPT instructions. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2008-05-02 18:53:40 +02:00
* Add Intel XSAVE, EPT, MOVBE, AES, PCLMUL, AVX/FMA support for x86 target.
binutils/ 2008-04-03 H.J. Lu <hongjiu.lu@intel.com> * dwarf.c (dwarf_regnames_i386): Add AVX registers. (dwarf_regnames_x86_64): Likewise. gas/ 2008-04-03 H.J. Lu <hongjiu.lu@intel.com> * NEWS: Mention AES, CLMUL, AVX/FMA and -msse2avx. * doc/c-i386.texi: Add avx, aes, clmul and fma to -march=. Document -msse2avx, .avx, .aes, .clmul and .fma. * config/tc-i386.c (YMMWORD_MNEM_SUFFIX): New. (vex_prefix): Likewise. (sse2avx): Likewise. (CPU_FLAGS_ARCH_MATCH): Likewise. (CPU_FLAGS_64BIT_MATCH): Likewise. (CPU_FLAGS_32BIT_MATCH): Likewise. (CPU_FLAGS_PERFECT_MATCH): Likewise. (regymm): Likewise. (vex_imm4): Likewise. (fits_in_imm4): Likewise. (build_vex_prefix): Likewise. (VEX_check_operands): Likewise. (bad_implicit_operand): Likewise. (OPTION_MSSE2AVX): Likewise. (T_YMMWORD): Likewise. (_i386_insn): Add vex. (cpu_arch): Add .avx, .aes, .clmul and .fma. (cpu_flags_match): Changed to take a pointer to const template. Enable encoding SSE instructions with VEX prefix for -msse2avx. (match_mem_size): Also check ymmword. (operand_type_match): Clear ymmword. (md_begin): Allow '_' in mnemonic. (type_names): Add OPERAND_TYPE_VEX_IMM4. (process_immext): Update assert. (md_assemble): Don't call process_immext if sse2avx and immext are true. Call build_vex_prefix if vex is true. (parse_insn): Updated for cpu_flags_match. (swap_operands): Handle 5 operands. (match_template): Handle 5 operands. Updated for cpu_flags_match. Check regymm. Call VEX_check_operands. Handle YMMWORD_MNEM_SUFFIX. (process_suffix): Handle YMMWORD_MNEM_SUFFIX. (check_byte_reg): Check regymm. (process_operands): Duplicate the destination register for -msse2avx if needed. (build_modrm_byte): Updated for instructions with VEX encoding. (output_insn): Output VEX prefix if needed. (md_longopts): Add msse2avx. (md_parse_option): Handle OPTION_MSSE2AVX. (md_show_usage): Add avx, aes, clmul, fma and -msse2avx. (intel_e09): Support YMMWORD. (intel_e11): Likewise. (intel_get_token): Likewise. gas/testsuite/ 2008-04-03 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Run aes, aes-intel, x86-64-aes, x86-64-aes-intel, avx, avx-intel, inval-avx, x86-64-avx, x86-64-avx-intel and x86-64-inval-avx. * gas/cfi/cfi-i386.s: Add tests for AVX register maps. * gas/cfi/cfi-x86_64.s: Likewise. * gas/i386/aes.d: New. * gas/i386/aes.s: Likewise. * gas/i386/aes-intel.d: Likewise. * gas/i386/avx.d: Likewise. * gas/i386/avx.s: Likewise. * gas/i386/avx-intel.d: Likewise. * gas/i386/clmul.d: Likewise. * gas/i386/clmul-intel.d: Likewise. * gas/i386/clmul.s: Likewise. * gas/i386/i386.exp: Likewise. * gas/i386/inval-avx.l: Likewise. * gas/i386/inval-avx.s: Likewise. * gas/i386/sse2avx.d: Likewise. * gas/i386/sse2avx.s: Likewise. * gas/i386/x86-64-aes.d: Likewise. * gas/i386/x86-64-aes.s: Likewise. * gas/i386/x86-64-aes-intel.d: Likewise. * gas/i386/x86-64-avx.d: Likewise. * gas/i386/x86-64-avx.s: Likewise. * gas/i386/x86-64-avx-intel.d: Likewise. * gas/i386/x86-64-clmul.d: Likewise. * gas/i386/x86-64-clmul-intel.d: Likewise. * gas/i386/x86-64-clmul.s: Likewise. * gas/i386/x86-64-inval-avx.l: Likewise. * gas/i386/x86-64-inval-avx.s: Likewise. * gas/i386/x86-64-sse2avx.d: Likewise. * gas/i386/x86-64-sse2avx.s: Likewise. * gas/i386/arch-10.s: Add tests for AVX, AES, CLMUL and FMA. * gas/i386/x86-64-arch-2.s: Likewise. * gas/i386/rexw.s: Add AVX tests. * gas/i386/x86-64-opcode-inval.s: Remove lds/les test. * gas/cfi/cfi-i386.d: Updated. * gas/cfi/cfi-x86_64.d: Likewise. * gas/i386/arch-10.d: Likewise. * gas/i386/arch-10-1.l: Likewise. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/rexw.d: Likewise. * gas/i386/x86-64-arch-2.d: Likewise. * gas/i386/x86-64-opcode-inval.d: Likewise. * gas/i386/x86-64-opcode-inval-intel.d: Likewise. include/opcode/ 2008-04-03 H.J. Lu <hongjiu.lu@intel.com> * i386.h (MAX_OPERANDS): Set to 5. (MAX_MNEM_SIZE): Changed to 20. opcodes/ 2008-04-03 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (OP_E_register): New. (OP_E_memory): Likewise. (OP_VEX): Likewise. (OP_EX_Vex): Likewise. (OP_EX_VexW): Likewise. (OP_XMM_Vex): Likewise. (OP_XMM_VexW): Likewise. (OP_REG_VexI4): Likewise. (PCLMUL_Fixup): Likewise. (VEXI4_Fixup): Likewise. (VZERO_Fixup): Likewise. (VCMP_Fixup): Likewise. (VPERMIL2_Fixup): Likewise. (rex_original): Likewise. (rex_ignored): Likewise. (Mxmm): Likewise. (XMM): Likewise. (EXxmm): Likewise. (EXxmmq): Likewise. (EXymmq): Likewise. (Vex): Likewise. (Vex128): Likewise. (Vex256): Likewise. (VexI4): Likewise. (EXdVex): Likewise. (EXqVex): Likewise. (EXVexW): Likewise. (EXdVexW): Likewise. (EXqVexW): Likewise. (XMVex): Likewise. (XMVexW): Likewise. (XMVexI4): Likewise. (PCLMUL): Likewise. (VZERO): Likewise. (VCMP): Likewise. (VPERMIL2): Likewise. (xmm_mode): Likewise. (xmmq_mode): Likewise. (ymmq_mode): Likewise. (vex_mode): Likewise. (vex128_mode): Likewise. (vex256_mode): Likewise. (USE_VEX_C4_TABLE): Likewise. (USE_VEX_C5_TABLE): Likewise. (USE_VEX_LEN_TABLE): Likewise. (VEX_C4_TABLE): Likewise. (VEX_C5_TABLE): Likewise. (VEX_LEN_TABLE): Likewise. (REG_VEX_XX): Likewise. (MOD_VEX_XXX): Likewise. (PREFIX_0F38DB..PREFIX_0F38DF): Likewise. (PREFIX_0F3A44): Likewise. (PREFIX_0F3ADF): Likewise. (PREFIX_VEX_XXX): Likewise. (VEX_OF): Likewise. (VEX_OF38): Likewise. (VEX_OF3A): Likewise. (VEX_LEN_XXX): Likewise. (vex): Likewise. (need_vex): Likewise. (need_vex_reg): Likewise. (vex_i4_done): Likewise. (vex_table): Likewise. (vex_len_table): Likewise. (OP_REG_VexI4): Likewise. (vex_cmp_op): Likewise. (pclmul_op): Likewise. (vpermil2_op): Likewise. (m_mode): Updated. (es_reg): Likewise. (PREFIX_0F38F0): Likewise. (PREFIX_0F3A60): Likewise. (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE. (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF and PREFIX_VEX_XXX entries. (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE. (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and PREFIX_0F3ADF. (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE. Add MOD_VEX_XXX entries. (ckprefix): Initialize rex_original and rex_ignored. Store the REX byte in rex_original. (get_valid_dis386): Handle the implicit prefix in VEX prefix bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE. (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before calling get_valid_dis386. Use rex_original and rex_ignored when printing out REX. (putop): Handle "XY". (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and ymmq_mode. (OP_E_extended): Updated to use OP_E_register and OP_E_memory. (OP_XMM): Handle VEX. (OP_EX): Likewise. (XMM_Fixup): Likewise. (CMP_Fixup): Use ARRAY_SIZE. * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS, CPU_FMA_FLAGS and CPU_AVX_FLAGS. (operand_type_init): Add OPERAND_TYPE_REGYMM and OPERAND_TYPE_VEX_IMM4. (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA. (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD, VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources, VexImmExt and SSE2AVX. (operand_types): Add RegYMM, Ymmword and Vex_Imm4. * i386-opc.h (CpuAVX): New. (CpuAES): Likewise. (CpuCLMUL): Likewise. (CpuFMA): Likewise. (Vex): Likewise. (Vex256): Likewise. (VexNDS): Likewise. (VexNDD): Likewise. (VexW0): Likewise. (VexW1): Likewise. (Vex0F): Likewise. (Vex0F38): Likewise. (Vex0F3A): Likewise. (Vex3Sources): Likewise. (VexImmExt): Likewise. (SSE2AVX): Likewise. (RegYMM): Likewise. (Ymmword): Likewise. (Vex_Imm4): Likewise. (Implicit1stXmm0): Likewise. (CpuXsave): Updated. (CpuLM): Likewise. (ByteOkIntel): Likewise. (OldGcc): Likewise. (Control): Likewise. (Unspecified): Likewise. (OTMax): Likewise. (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma. (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256, vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a, vex3sources, veximmext and sse2avx. (i386_operand_type): Add regymm, ymmword and vex_imm4. * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions. * i386-reg.tbl: Add AVX registers, ymm0..ymm15. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2008-04-03 16:03:21 +02:00
* New command line options, -march=CPU[,+EXTENSION...], -mtune=CPU,
-mmnemonic=[att|intel], -msyntax=[att|intel], -mindex-reg,
-mnaked-reg and -mold-gcc, for x86 targets.
* Support for generating wide character strings has been added via the new
pseudo ops: .string16, .string32 and .string64.
2007-09-14 20:21:09 +02:00
* Support for SSE5 has been added to the i386 port.
2007-08-10 15:21:40 +02:00
Changes in 2.18:
2007-07-03 13:01:12 +02:00
* The GAS sources are now released under the GPLv3.
* Support for the National Semiconductor CR16 target has been added.
2007-03-27 10:33:47 +02:00
* Added gas .reloc pseudo. This is a low-level interface for creating
relocations.
2006-09-20 13:35:11 +02:00
* Add support for x86_64 PE+ target.
2006-09-17 01:51:50 +02:00
* Add support for Score target.
2007-07-03 13:01:12 +02:00
Changes in 2.17:
2006-02-17 15:36:28 +01:00
* Support for the Infineon XC16X has been added by KPIT Cummins Infosystems.
2005-11-08 12:17:03 +01:00
* Support for ms2 architecture has been added.
2005-10-25 19:42:02 +02:00
* Support for the Z80 processor family has been added.
* Add support for the "@<file>" syntax to the command line, so that extra
switches can be read from <file>.
* The SH target supports a new command line switch --enable-reg-prefix which,
if enabled, will allow register names to be optionally prefixed with a $
character. This allows register names to be distinguished from label names.
* Macros with a variable number of arguments are now supported. See the
documentation for how this works.
* Added --reduce-memory-overheads switch to reduce the size of the hash
tables used, at the expense of longer assembly times, and
--hash-size=<NUMBER> to set the size of the hash tables used by gas.
* Macro names and macro parameter names can now be any identifier that would
also be legal as a symbol elsewhere. For macro parameter names, this is
known to cause problems in certain sources when the respective target uses
characters inconsistently, and thus macro parameter references may no longer
be recognized as such (see the documentation for details).
* Support the .f_floating, .d_floating, .g_floating and .h_floating directives
for the VAX target in order to be more compatible with the VAX MACRO
assembler.
* New command line option -mtune=[itanium1|itanium2] for IA64 targets.
2005-03-15 18:49:15 +01:00
Changes in 2.16:
* Redefinition of macros now results in an error.
* New command line option -mhint.b=[ok|warning|error] for IA64 targets.
* New command line option -munwind-check=[warning|error] for IA64
targets.
* The IA64 port now uses automatic dependency violation removal as its default
mode.
2004-11-08 14:17:43 +01:00
* Port to MAXQ processor contributed by HCL Tech.
* Added support for generating unwind tables for ARM ELF targets.
2004-08-17 14:19:58 +02:00
* Add a -g command line option to generate debug information in the target's
preferred debug format.
2004-07-07 19:28:53 +02:00
* Support for the crx-elf target added.
* Support for the sh-symbianelf target added.
2004-07-07 19:28:53 +02:00
* Added a pseudo-op (.secrel32) to generate 32 bit section relative relocations
on pe[i]-i386; required for this target's DWARF 2 support.
2004-05-05 16:33:14 +02:00
* Support for Motorola MCF521x/5249/547x/548x added.
* Support for ColdFire EMAC instructions added and Motorola syntax for MAC/EMAC
instrucitons.
* New command line option -mno-shared for MIPS ELF targets.
* New command line option --alternate and pseudo-ops .altmacro and .noaltmacro
added to enter (and leave) alternate macro syntax mode.
Changes in 2.15:
* The MIPS -membedded-pic option (Embedded-PIC code generation) is
deprecated and will be removed in a future release.
* Added PIC m32r Linux (ELF) and support to M32R assembler.
* gas/arm/arm.exp: Add archv6 and thumbv6. * gas/arm/archv6.d: New file. * gas/arm/archv6.s: Likewise. * gas/arm/thumbv6.d: Likewise. * gas/arm/thumbv6.s: Likewise. Add V6 support. * config/tc-arm.c (ARM_EXT_V6): New macro. (ARM_ARCH_V6): Likewise. (SHIFT_IMMEDIATE): Likewise. (SHIFT_LSL_OR_ASR_IMMEDIATE): Likewise. (SHIFT_ASR_IMMEDIATE): Likewise. (SHIFT_LSL_IMMMEDIATE): Likewise. (do_cps): New function. (do_cpsi): Likewise. (do_ldrex): Likewise. (do_pkhbt): Likewise. (do_pkhtb): Likewise. (do_qadd16): Likewise. (do_rev): Likewise. (do_rfe): Likewise. (do_sxtah): Likewise. (do_sxth): Likewise. (do_setend): Likewise. (do_smlad): Likewise. (do_smlald): Likewise. (do_smmul): Likewise. (do_ssat): Likewise. (do_usat): Likewise. (do_srs): Likewise. (do_ssat16): Likewise. (do_usat16): Likewise. (do_strex): Likewise. (do_umaal): Likewise. (do_cps_mode): Likewise. (do_cps_flags): Likewise. (do_endian_specifier): Likewise. (do_pkh_core): Likewise. (do_sat): Likewise. (do_sat16): Likewise. (insns): Add V6 instructions. (do_t_cps): New function. (do_t_cpy): Likewise. (do_t_setend): Likewise. (THUMB_CPY): New macro. (tinsns): Add V6 instructions. (decode_shift): Handle V6 restricted-shift options. (thumb_mov_compare): Support CPY. (arm_cores): Add arm1136js and arm1136jfs. (arm_archs): Add armv6. (arm_fpus): Add arm1136jfs. * doc/c-arm.texi (ARM Options): Mention arm1136js, arm1136jfs, and armv6 options. * gas/arm/arm.exp: Add archv6 and thumbv6. * gas/arm/archv6.d: New file. * gas/arm/archv6.s: Likewise. * gas/arm/thumbv6.d: Likewise. * gas/arm/thumbv6.s: Likewise. * arm-dis.c (print_arm_insn): Add 'W' macro. * arm-opc.h (arm_opcodes): Add V6 instructions. (thumb_opcodes): Likewise.
2003-12-06 02:25:29 +01:00
* Added support for ARM V6.
* Added support for sh4a and variants.
* Support for Renesas M32R2 added.
* Limited support for Mapping Symbols as specified in the ARM ELF
specification has been added to the arm assembler.
2003-11-14 09:21:02 +01:00
* On ARM architectures, added a new gas directive ".unreq" that undoes
definitions created by ".req".
2003-10-21 15:28:59 +02:00
* Support for Motorola ColdFire MCF528x added.
* Added --gstabs+ switch to enable the generation of STABS debug format
information with GNU extensions.
* Added support for MIPS64 Release 2.
* Added support for v850e1.
* Added -n switch for x86 assembler. By default, x86 GAS replaces
multiple nop instructions used for alignment within code sections
with multi-byte nop instructions such as leal 0(%esi,1),%esi. This
switch disables the optimization.
* Removed -n option from MIPS assembler. It was not useful, and confused the
existing -non_shared option.
Changes in 2.14:
* Added support for MIPS32 Release 2.
* Added support for Xtensa architecture.
2003-03-25 21:56:01 +01:00
* Support for Intel's iWMMXt processor (an ARM variant) added.
* An assembler test generator has been contributed and an example file that
uses it (gas/testsuite/gas/all/test-gen.c and test-exmaple.c).
2003-01-23 19:50:57 +01:00
* Support for SH2E added.
2002-12-02 16:42:15 +01:00
* GASP has now been removed.
* Support for Texas Instruments TMS320C4x and TMS320C3x series of
DSP's contributed by Michael Hayes and Svein E. Seldal.
2002-08-28 12:38:51 +02:00
2002-07-19 09:52:40 +02:00
* Support for the Ubicom IP2xxx microcontroller added.
2002-07-16 09:58:34 +02:00
Changes in 2.13:
2002-07-19 09:52:40 +02:00
* Support for the Fujitsu FRV architecture added by Red Hat. Models for FR400
and FR500 included.
2002-07-19 09:52:40 +02:00
* Support for DLX processor added.
2002-05-28 16:20:42 +02:00
2002-07-19 09:52:40 +02:00
* GASP has now been deprecated and will be removed in a future release. Use
the macro facilities in GAS instead.
2002-02-21 17:51:00 +01:00
2002-07-19 09:52:40 +02:00
* GASP now correctly parses floating point numbers. Unless the base is
explicitly specified, they are interpreted as decimal numbers regardless of
the currently specified base.
2002-02-20 11:46:54 +01:00
Changes in 2.12:
2002-07-19 09:52:40 +02:00
* Support for Don Knuth's MMIX, by Hans-Peter Nilsson.
2002-02-15 05:04:03 +01:00
2002-07-19 09:52:40 +02:00
* Support for the OpenRISC 32-bit embedded processor by OpenCores.
2002-07-19 09:52:40 +02:00
* The ARM assembler now accepts -march=..., -mcpu=... and -mfpu=... for
specifying the target instruction set. The old method of specifying the
target processor has been deprecated, but is still accepted for
compatibility.
2002-07-19 09:52:40 +02:00
* Support for the VFP floating-point instruction set has been added to
the ARM assembler.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* New psuedo op: .incbin to include a set of binary data at a given point
in the assembly. Contributed by Anders Norlander.
2001-07-09 10:19:18 +02:00
2002-07-19 09:52:40 +02:00
* The MIPS assembler now accepts -march/-mtune. -mcpu has been deprecated
but still works for compatability.
2001-06-28 Eric Christopher <echristo@redhat.com> H.J. Lu <hjl@gnu.org>         * config/tc-mips.c (mips_arch): New. Use mips_arch instead         of mips_cpu for the ISA selection.         (md_longopts): Add OPTION_MARCH and OPTION_MTUNE.         (md_parse_option): Handle OPTION_MARCH and OPTION_MTUNE. (mips_tune): New. Use mips_tune for scheduling and optimization issues. (append_insn): Use mips_tune and mips_arch. (macro_build): Ditto. (mips_ip): Ditto. (md_begin): Handle mips_arch, mips_tune and mips_cpu. For backwards compatability mips_cpu generates arch and tune. (md_show_usage): Document new behavior. * doc/c-mips.texi (MIPS Opts): Document -march and -mtune. Deprecate -mcpu. * NEWS: Update. 2001-06-28 Eric Christopher <echristo@redhat.com> * gas/mips/usd.d: Change for march/mtune. * gas/mips/ulh-xgot.d: Ditto. * gas/mips/uld.d: Ditto. * gas/mips/trunc.d: Ditto. * gas/mips/rol.d: Ditto. * gas/mips/nodelay.d: Ditto. * gas/mips/mul.d: Ditto. * gas/mips/mul-ilocks.d: Ditto. * gas/mips/trap20.d: Ditto. * gas/mips/mips4.d: Ditto. * gas/mips/mips16.d: Ditto. * gas/mips/lif-xgot.d: Ditto. * gas/mips/lif-svr4pic.d: Ditto. * gas/mips/ld-xgot.d: Ditto. * gas/mips/ld-svr4pic.d: Ditto. * gas/mips/ld-ilocks-addr32.d: Ditto. * gas/mips/lb-xgot.d: Ditto. * gas/mips/jal-xgot.d: Ditto. * gas/mips/jal-svr4pic.d: Ditto. * gas/mips/delay.d: Ditto. * gas/mips/lb-xgot-ilocks.d: Ditto. * gas/mips/div.d: Ditto. * gas/mips/break20.d: Ditto. * gas/mips/delay.d: Ditto. * gas/mips/elf_e_flags3.d: Ditto. * gas/mips/elf_e_flags4.d: Ditto. * gas/mips/lineno.d: Ditto. * gas/mips/mips16.d: Ditto. * gas/mips/mips4.d: Ditto. * gas/mips/mips4010.d: Ditto. * gas/mips/mips4650.d: Ditto.
2001-06-29 23:27:43 +02:00
2002-07-19 09:52:40 +02:00
* The MIPS assembler no longer issues a warning by default when it
generates a nop instruction from a macro. The new command line option
-n will turn on the warning.
2000-04-25 22:54:41 +02:00
Changes in 2.11:
* Support for PDP-11 and 2.11BSD a.out format, by Lars Brinkhoff.
2002-07-19 09:52:40 +02:00
* x86 gas now supports the full Pentium4 instruction set.
2002-07-19 09:52:40 +02:00
* Support for AMD x86-64 architecture, by Jan Hubicka, SuSE Labs.
2002-07-19 09:52:40 +02:00
* Support for Motorola 68HC11 and 68HC12.
2002-07-19 09:52:40 +02:00
* Support for Texas Instruments TMS320C54x (tic54x).
2000-06-20 15:52:32 +02:00
2002-07-19 09:52:40 +02:00
* Support for IA-64.
2000-04-25 22:54:41 +02:00
2002-07-19 09:52:40 +02:00
* Support for i860, by Jason Eckhardt.
2002-07-19 09:52:40 +02:00
* Support for CRIS (Axis Communications ETRAX series).
2000-08-24 19:42:52 +02:00
2002-07-19 09:52:40 +02:00
* x86 gas has a new .arch pseudo op to specify the target CPU architecture.
2002-07-19 09:52:40 +02:00
* x86 gas -q command line option quietens warnings about register size changes
due to suffix, indirect jmp/call without `*', stand-alone prefixes, and
translating various deprecated floating point instructions.
1999-05-03 09:29:11 +02:00
Changes in 2.10:
2002-07-19 09:52:40 +02:00
* Support for the ARM msr instruction was changed to only allow an immediate
operand when altering the flags field.
2002-07-19 09:52:40 +02:00
* Support for ATMEL AVR.
2000-03-27 10:39:14 +02:00
2002-07-19 09:52:40 +02:00
* Support for IBM 370 ELF. Somewhat experimental.
2000-02-24 02:40:42 +01:00
2002-07-19 09:52:40 +02:00
* Support for numbers with suffixes.
2000-02-08 15:13:57 +01:00
2002-07-19 09:52:40 +02:00
* Added support for breaking to the end of repeat loops.
2002-07-19 09:52:40 +02:00
* Added support for parallel instruction syntax (DOUBLEBAR_PARALLEL).
2002-07-19 09:52:40 +02:00
* New .elseif pseudo-op added.
2000-02-08 15:13:57 +01:00
2002-07-19 09:52:40 +02:00
* New --fatal-warnings option.
2002-07-19 09:52:40 +02:00
* picoJava architecture support added.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* Motorola MCore 210 processor support added.
2002-07-19 09:52:40 +02:00
* A new pseudo-op .intel_syntax has been implemented to allow gas to parse i386
assembly programs with intel syntax.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* New pseudo-ops .func,.endfunc to aid in debugging user-written assembler code.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* Added -gdwarf2 option to generate DWARF 2 debugging information.
2002-07-19 09:52:40 +02:00
* Full 16-bit mode support for i386.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* Greatly improved instruction operand checking for i386. This change will
produce errors or warnings on incorrect assembly code that previous versions
of gas accepted. If you get unexpected messages from code that worked with
older versions of gas, please double check the code before reporting a bug.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* Weak symbol support added for COFF targets.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* Mitsubishi D30V support added.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* Texas Instruments c80 (tms320c80) support added.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* i960 ELF support added.
2002-07-19 09:52:40 +02:00
* ARM ELF support added.
1999-05-03 09:29:11 +02:00
Changes in 2.9:
2002-07-19 09:52:40 +02:00
* Texas Instruments c30 (tms320c30) support added.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* The assembler now optimizes the exception frame information generated by egcs
and gcc 2.8. The new --traditional-format option disables this optimization.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* Added --gstabs option to generate stabs debugging information.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* The -a option takes a new suboption, m (e.g., -alm) to expand macros in a
listing.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* Added -MD option to print dependencies.
1999-05-03 09:29:11 +02:00
Changes in 2.8:
2002-07-19 09:52:40 +02:00
* BeOS support added.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* MIPS16 support added.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* Motorola ColdFire 5200 support added (configure for m68k and use -m5200).
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* Alpha/VMS support added.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* m68k options --base-size-default-16, --base-size-default-32,
--disp-size-default-16, and --disp-size-default-32 added.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* The alignment directives now take an optional third argument, which is the
maximum number of bytes to skip. If doing the alignment would require
skipping more than the given number of bytes, the alignment is not done at
all.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* The ELF assembler has a new pseudo-op, .symver, used for symbol versioning.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* The -a option takes a new suboption, c (e.g., -alc), to skip false
conditionals in listings.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* Added new pseudo-op, .equiv; it's like .equ, except that it is an error if
the symbol is already defined.
1999-05-03 09:29:11 +02:00
Changes in 2.7:
2002-07-19 09:52:40 +02:00
* The PowerPC assembler now allows the use of symbolic register names (r0,
etc.) if -mregnames is used. Symbolic names preceded by a '%' (%r0, etc.)
can be used any time. PowerPC 860 move to/from SPR instructions have been
added.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* Alpha Linux (ELF) support added.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* PowerPC ELF support added.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* m68k Linux (ELF) support added.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* i960 Hx/Jx support added.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* i386/PowerPC gnu-win32 support added.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* SCO ELF support added. For OpenServer 5 targets (i386-unknown-sco3.2v5) the
default is to build COFF-only support. To get a set of tools that generate
ELF (they'll understand both COFF and ELF), you must configure with
target=i386-unknown-sco3.2v5elf.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* m88k-motorola-sysv3* support added.
1999-05-03 09:29:11 +02:00
Changes in 2.6:
2002-07-19 09:52:40 +02:00
* Gas now directly supports macros, without requiring GASP.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* Gas now has an MRI assembler compatibility mode. Use -M or --mri to select
MRI mode. The pseudo-op ``.mri 1'' will switch into the MRI mode until the
``.mri 0'' is seen; this can be convenient for inline assembler code.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* Added --defsym SYM=VALUE option.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* Added -mips4 support to MIPS assembler.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* Added PIC support to Solaris and SPARC SunOS 4 assembler.
1999-05-03 09:29:11 +02:00
Changes in 2.4:
2002-07-19 09:52:40 +02:00
* Converted this directory to use an autoconf-generated configure script.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* ARM support, from Richard Earnshaw.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* Updated VMS support, from Pat Rankin, including considerably improved
debugging support.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* Support for the control registers in the 68060.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* Handles (ignores) a new directive ".this_GCC_requires_the_GNU_assembler", to
provide for possible future gcc changes, for targets where gas provides some
features not available in the native assembler. If the native assembler is
used, it should become obvious pretty quickly what the problem is.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* Usage message is available with "--help".
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* The GNU Assembler Preprocessor (gasp) is included. (Actually, it was in 2.3
also, but didn't get into the NEWS file.)
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* Weak symbol support for a.out.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* A bug in the listing code which could cause an infinite loop has been fixed.
Bugs in listings when generating a COFF object file have also been fixed.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* Initial i386-svr4 PIC implementation from Eric Youngdale, based on code by
Paul Kranenburg.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* Improved Alpha support. Immediate constants can have a much larger range
now. Support for the 21164 has been contributed by Digital.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* Updated ns32k (pc532-mach, netbsd532) support from Ian Dall.
1999-05-03 09:29:11 +02:00
Changes in 2.3:
2002-07-19 09:52:40 +02:00
* Mach i386 support, by David Mackenzie and Ken Raeburn.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* RS/6000 and PowerPC support by Ian Taylor.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* VMS command scripts (make-gas.com, config-gas.com) have been worked on a bit,
based on mail received from various people. The `-h#' option should work
again too.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* HP-PA work, by Jeff Law. Note, for the PA, gas-2.3 has been designed to work
with gdb-4.12 and gcc-2.6. As gcc-2.6 has not been released yet, a special
version of gcc-2.5.8 has been patched to work with gas-2.3. You can retrieve
this special version of gcc-2.5.8 via anonymous ftp from jaguar.cs.utah.edu
in the "dist" directory.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* Vax support in gas fixed for BSD, so it builds and seems to run a couple
simple tests okay. I haven't put it through extensive testing. (GNU make is
currently required for BSD 4.3 builds.)
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* Support for the DEC Alpha, running OSF/1 (ECOFF format). The gas support is
based on code donated by CMU, which used an a.out-based format. I'm afraid
the alpha-a.out support is pretty badly mangled, and much of it removed;
making it work will require rewriting it as BFD support for the format anyways.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* Irix 5 support.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* The test suites have been fixed up a bit, so that they should work with a
couple different versions of expect and dejagnu.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* Symbols' values are now handled internally as expressions, permitting more
flexibility in evaluating them in some cases. Some details of relocation
handling have also changed, and simple constant pool management has been
added, to make the Alpha port easier.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* New option "--statistics" for printing out program run times. This is
intended to be used with the gcc "-Q" option, which prints out times spent in
various phases of compilation. (You should be able to get all of them
printed out with "gcc -Q -Wa,--statistics", I think.)
1999-05-03 09:29:11 +02:00
Changes in 2.2:
2002-07-19 09:52:40 +02:00
* RS/6000 AIX and MIPS SGI Irix 5 support has been added.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* Configurations that are still in development (and therefore are convenient to
have listed in configure.in) still get rejected without a minor change to
gas/Makefile.in, so people not doing development work shouldn't get the
impression that support for such configurations is actually believed to be
reliable.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* The program name (usually "as") is printed when a fatal error message is
displayed. This should prevent some confusion about the source of occasional
messages about "internal errors".
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* ELF support is falling into place. Support for the 386 should be working.
Support for SPARC Solaris is in. HPPA support from Utah is being integrated.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* Symbol values are maintained as expressions instead of being immediately
boiled down to add-symbol, sub-symbol, and constant. This permits slightly
more complex calculations involving symbols whose values are not alreadey
known.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* DBX-style debugging info ("stabs") is now supported for COFF formats.
If any stabs directives are seen in the source, GAS will create two new
sections: a ".stab" and a ".stabstr" section. The format of the .stab
section is nearly identical to the a.out symbol format, and .stabstr is
its string table. For this to be useful, you must have configured GCC
to generate stabs (by defining DBX_DEBUGGING_INFO), and must have a GDB
that can use the stab sections (4.11 or later).
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* LynxOS, on i386 and m68k platforms, is now supported. SPARC LynxOS
support is in progress.
1999-05-03 09:29:11 +02:00
Changes in 2.1:
2002-07-19 09:52:40 +02:00
* Several small fixes for i386-aix (PS/2) support from Minh Tran-Le have been
incorporated, but not well tested yet.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* Altered the opcode table split for m68k; it should require less VM to compile
with gcc now.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* Some minor adjustments to add (Convergent Technologies') Miniframe support,
suggested by Ronald Cole.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* HPPA support (running OSF only, not HPUX) has been contributed by Utah. This
includes improved ELF support, which I've started adapting for SPARC Solaris
2.x. Integration isn't completely, so it probably won't work.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* HP9000/300 support, donated by HP, has been merged in.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* Ian Taylor has finished the MIPS ECOFF (Ultrix, Irix) support.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* Better error messages for unsupported configurations (e.g., hppa-hpux).
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* Test suite framework is starting to become reasonable.
1999-05-03 09:29:11 +02:00
Changes in 2.0:
2002-07-19 09:52:40 +02:00
* Mostly bug fixes.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* Some more merging of BFD and ELF code, but ELF still doesn't work.
1999-05-03 09:29:11 +02:00
Changes in 1.94:
2002-07-19 09:52:40 +02:00
* BFD merge is partly done. Adventurous souls may try giving configure the
"--with-bfd-assembler" option. Currently, ELF format requires it, a.out
format accepts it; SPARC CPU accepts it. It's the default only for OS "elf"
or "solaris". (ELF isn't really supported yet. It needs work. I've got
some code from Utah for HP-PA ELF, and from DG for m88k ELF, but they're not
fully merged yet.)
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* The 68K opcode table has been split in half. It should now compile under gcc
without consuming ridiculous amounts of memory.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* A couple data structures have been reduced in size. This should result in
saving a little bit of space at runtime.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* Support for MIPS, from OSF and Ralph Campbell, has been merged in. The OSF
code provided ROSE format support, which I haven't merged in yet. (I can
make it available, if anyone wants to try it out.) Ralph's code, for BSD
4.4, supports a.out format. We don't have ECOFF support in just yet; it's
coming.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* Support for the Hitachi H8/500 has been added.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* VMS host and target support should be working now, thanks chiefly to Eric
Youngdale.
1999-05-03 09:29:11 +02:00
Changes in 1.93.01:
2002-07-19 09:52:40 +02:00
* For m68k, support for more processors has been added: 68040, CPU32, 68851.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* For i386, .align is now power-of-two; was number-of-bytes.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* For m68k, "%" is now accepted before register names. For COFF format, which
doesn't use underscore prefixes for C labels, it is required, so variable "a0"
can be distinguished from the register.
1999-05-03 09:29:11 +02:00
2002-07-19 09:52:40 +02:00
* Last public release was 1.38. Lots of configuration changes since then, lots
of new CPUs and formats, lots of bugs fixed.
1999-05-03 09:29:11 +02:00
Local variables:
fill-column: 79
End: