46b596ff8c
gas/ChangeLog:
...
* config/tc-ppc.c (md_apply_fix): Leave field zero when emitting
an ELF reloc on data as well.
gas/testsuite/ChangeLog:
* gas/ppc/astest.d: Update for fixup changes.
* gas/ppc/astest64.d: Likewise.
* gas/ppc/astest2.d: Likewise.
* gas/ppc/astest2_64.d: Likewise.
* gas/ppc/test1elf32.d: Likewise.
* gas/ppc/test1elf64.d: Likewise.
2012-11-14 13:44:45 +00:00
477a32403b
Add missing test cases.
...
* gas/microblaze/endian.exp: New file - endian testcase for microblaze / microblazeel.
* gas/microblaze/endian.s: Likewise.
* gas/microblaze/endian_be.d: Likewise.
* gas/microblaze/endian_le.d: Likewise.
* gas/microblaze/endian_le_elf.d: Likewise.
2012-11-12 00:23:25 +00:00
f23200ada9
Add microblazeel target support to bfd, gas and ld.
...
binutils/bfd/Changelog
2012-11-09 Edgar E. Iglesias <edgar.iglesias@gmail.com>
* config.bfd: Add microblazeel-*-*
* configure.in: Likewise.
* configure: Regenerate.
* elf32-microblaze.c (microblaze_elf_relocate_section):
Add endian awareness.
(microblaze_elf_merge_private_bfd_data): New.
(microblaze_bfd_write_imm_value_32): New.
(microblaze_bfd_write_imm_value_64): New.
(microblaze_elf_relax_section): Add endian awareness.
(microblaze_elf_add_symbol_hook): Define TARGET_LITTLE_NAME,
TARGET_LITTLE_SYM and bfd_elf32_bfd_merge_private_bfd_data.
* targets.c: Add bfd target bfd_elf32_microblazeel_vec.
binutils/gas/Changelog
2012-11-09 Edgar E. Iglesias <edgar.iglesias@gmail.com>
* tc-microblaze.c (md_longopts): Define OPTION_EB and
OPTION_EL for target.
(md_parse_option): Likewise.
* tc-microblaze.h: Set elf32-microblazeel if not
target_big_endian for TARGET_FORMAT.
* configure.tgt: Add microblazeel and set endian per target.
binutils/gas/testsuite/Changelog
2012-11-09 David Holsgrove <david.holsgrove@xilinx.com>
* gas/microblaze/endian.exp: New file - endian
testcase for microblaze / microblazeel.
* gas/microblaze/endian.s: Likewise.
* gas/microblaze/endian_be.d: Likewise.
* gas/microblaze/endian_le.d: Likewise.
* gas/microblaze/endian_le_elf.d: Likewise.
* gas/microblaze/reloc_sym.d: Update to accept targets
other than elf32-microblaze.
* gas/microblaze/special_reg.d: Likewise.
binutils/ld/Changelog
2012-11-09 Edgar E. Iglesias <edgar.iglesias@gmail.com>
* Makefile.am: Add eelf32microblazeel.c and eelf32mbel_linux.c.
* Makefile.in: Regenerated.
* configure.tgt: Add microblazeel and set endian per target.
* emulparams/elf32mb_linux.sh: Add OUTPUT_FORMAT.
* emulparams/elf32microblaze.sh: Likewise.
* emulparams/elf32mbel_linux.sh: New file.
* emulparams/elf32microblazeel.sh: Likewise.
2012-11-09 16:25:12 +00:00
5821951ca6
gas/
...
* config/tc-mips.c (mips_ip) <'u'>: Default to BFD_RELOC_LO16.
gas/testsuite/
* gas/mips/lui.d: New test.
* gas/mips/micromips@lui.d: New test.
* gas/mips/lui-1.l: New list test.
* gas/mips/lui-2.l: New list test.
* gas/mips/lui.s: New test source.
* gas/mips/lui-1.s: New test source.
* gas/mips/lui-2.s: New test source.
* gas/mips/mips.exp: Run the new tests.
2012-11-08 18:21:25 +00:00
34ecb04d42
2012-11-07 David Holsgrove <david.holsgrove@xilinx.com>
...
* config/tc-microblaze.c: Remove special register condition check
for INST_TYPE_RFSL related instructions.
2012-11-07 David Holsgrove <david.holsgrove@xilinx.com>
* testsuite/gas/microblaze/special_reg.exp: Add test case.
* testsuite/gas/microblaze/special_reg.s: Likewise.
* testsuite/gas/microblaze/special_reg.d: Likewise.
2012-11-07 15:36:09 +00:00
ddaf2c4191
gas/
...
* config/tc-mips.c (append_insn): Set fx_no_overflow for 16-bit
microMIPS branch relocations.
gas/testsuite/
* gas/mips/micromips-b16.d: New test.
* gas/mips/micromips-b16.s: New test source.
* gas/mips/mips.exp: Run the new test.
2012-11-01 22:54:11 +00:00
e64af27846
gas/
...
* config/tc-mips.c (is_delay_slot_valid): Don't accept macros
in 16-bit delay slots.
(macro_build_jalr): Emit 32-bit JALR if placed in a 32-bit delay
slot.
(macro) <M_JAL_2>: Likewise
gas/testsuite/
* gas/mips/micromips-branch-delay.l: Update messages for 16-bit
delay slot changes.
* gas/mips/micromips-warn-branch-delay.d: New test.
* gas/mips/micromips-warn-branch-delay.l: Stderr output for the
new test.
* gas/mips/micromips-warn-branch-delay-1.d: New test.
* gas/mips/micromips-warn-branch-delay.s: New test source.
* gas/mips/micromips-warn-branch-delay-1.s: New test source.
* gas/mips/mips.exp: Run the new tests.
2012-11-01 22:49:28 +00:00
28ad2e2dc9
2012-10-31 David Holsgrove <david.holsgrove@xilinx.com>
...
* config/tc-microblaze.c: Check for weak symbols before
emitting relocation.
2012-10-31 David Holsgrove <david.holsgrove@xilinx.com>
* gas/microblaze: New.
* gas/microblaze/reloc_sym.exp: Add test case.
* gas/microblaze/reloc_strongsym.s: Likewise.
* gas/microblaze/reloc_weaksym.s: Likewise.
* gas/microblaze/reloc_sym.d: Likewise.
2012-10-31 15:27:37 +00:00
ab1f5dd1e2
* gas/cfi/cfi.exp: Remove redundant ppc test. Exclude
...
powerpc-pe targets from cfi-common-6 test.
* gas/cfi/cfi-ppc-1.d: Use objdump to handle pe.
* gas/cfi/cfi-ppc-1.s: Don't use .type and .size.
* gas/ppc/ppc.exp: Exclude various tests for powerpc-pe. Exclude
vle tests for le targets.
* gas/ppc/476.d, * gas/ppc/476.s: Update for le output. Use .text
rather than section directive with quotes.
* gas/ppc/a2.d, * gas/ppc/a2.s: Likewise.
* gas/ppc/altivec.d, * gas/ppc/altivec.s: Likewise.
* gas/ppc/altivec2.d: Likewise.
* gas/ppc/altivec_and_spe.d: Likewise.
* gas/ppc/astest.d: Likewise.
* gas/ppc/astest2.d: Likewise.
* gas/ppc/astest2_64.d: Likewise.
* gas/ppc/astest64.d: Likewise.
* gas/ppc/booke.d, * gas/ppc/booke.s: Likewise.
* gas/ppc/cell.d, * gas/ppc/cell.s: Likewise.
* gas/ppc/common.d, * gas/ppc/common.s: Likewise.
* gas/ppc/e500.d, * gas/ppc/e500.s: Likewise.
* gas/ppc/e500mc.d, * gas/ppc/e500mc.s: Likewise.
* gas/ppc/e500mc64_nop.d, * gas/ppc/e500mc64_nop.s: Likewise.
* gas/ppc/e5500_nop.d, * gas/ppc/e5500_nop.s: Likewise.
* gas/ppc/e6500.d, * gas/ppc/e6500.s: Likewise.
* gas/ppc/e6500_nop.d, * gas/ppc/e6500_nop.s: Likewise.
* gas/ppc/machine.d: Likewise.
* gas/ppc/power4.d, * gas/ppc/power4.s: Likewise.
* gas/ppc/power4_32.d, * gas/ppc/power4_32.s: Likewise.
* gas/ppc/power6.d, * gas/ppc/power6.s: Likewise.
* gas/ppc/power7.d, * gas/ppc/power7.s: Likewise.
* gas/ppc/ppc750ps.d, * gas/ppc/ppc750ps.s: Likewise.
* gas/ppc/regnames.d: Likewise.
* gas/ppc/simpshft.d: Likewise.
* gas/ppc/test1elf32.d: Likewise.
* gas/ppc/test1elf64.d: Likewise.
* gas/ppc/titan.d, * gas/ppc/titan.s: Likewise.
* gas/ppc/vle-reloc.s: Likewise.
* gas/ppc/vle-simple-1.s: Likewise.
* gas/ppc/vle-simple-2.s: Likewise.
* gas/ppc/vle-simple-3.s: Likewise.
* gas/ppc/vle-simple-4.s: Likewise.
* gas/ppc/vle-simple-5.s: Likewise.
* gas/ppc/vle-simple-6.s: Likewise.
* gas/ppc/vle.s: Likewise.
* gas/ppc/vsx.d, * gas/ppc/vsx.s: Likewise.
2012-10-29 09:25:15 +00:00
6f78ea2498
gas/testsuite:
...
2012-10-27 James Lemke <jwlemke@codesourcery.com>
* gas/m68k/all.exp: Exclude pr11676 for fido-*-*.
2012-10-27 07:55:57 +00:00
aac129d776
2012-10-26 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
...
* s390-mkopc.c: Accept empty lines in s390-opc.txt.
* s390-opc.c: Add M_20OPT field. New instruction formats RRF_RURR2 and RRF_RMRR.
* s390-opc.txt: Add new instructions. New instruction type for lptea.
2012-10-26 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* gas/testsuite/gas/s390/zarch-z10.d: Refreshed.
* gas/testsuite/gas/s390/zarch-z10.s: Refreshed.
* gas/testsuite/gas/s390/zarch-z196.d: Refreshed.
* gas/testsuite/gas/s390/zarch-z196.s: Refreshed.
* gas/testsuite/gas/s390/zarch-z9-109.d: Refreshed.
* gas/testsuite/gas/s390/zarch-z990.d: Refreshed.
* gas/testsuite/gas/s390/zarch-z990.s: Refreshed.
* gas/testsuite/gas/s390/zarch-zEC12.d: Refreshed.
* gas/testsuite/gas/s390/zarch-zEC12.s: Refreshed.
2012-10-26 09:41:55 +00:00
747a4ac1f4
gas/testsuite:
...
* gas/z8k/z8k.exp: Run translate-ops test.
* gas/z8k/translate-ops.s: New file.
* gas/z8k/translate-ops.d: New file.
opcodes:
* z8kgen.c (struct op): Fix encoding for translate opcodes (trdb,
trdrb, trib, trirb, trtdb, trtdrb, trtib, trtirb). Remove
non-existing opcode trtrb.
* z8k-opc.h: Regenerate.
2012-10-26 08:14:07 +00:00
e3b0b0abf9
* gas/ppc/power4.s: Fix invalid lq offsets.
...
* gas/ppc/power4.d: Update.
2012-10-26 03:39:32 +00:00
6c067bbb1a
gas/testsuite/
...
* gas/i386/rex.s: Add test of REX prefix before fsave (i.e. fwait).
* gas/i386/rex.d: Update.
opcodes/
* i386-dis.c (ckprefix): When bailing out for fwait with prefixes,
set rex_used to rex.
2012-10-24 21:41:33 +00:00
ab4437c322
opcodes/
...
* ppc-opc.c (powerpc_opcodes) <vcfpsxws>: Fix opcode spelling.
gas/testsuite/
* gas/ppc/altivec.s <vcfpsxws>: Fix opcode spelling.
2012-10-22 16:04:28 +00:00
b7a54b5525
Updated the system register table.
...
opcodes/
* aarch64-opc.c (aarch64_sys_regs): Add rmr_el1, rmr_el2 and
rmr_el3; remove daifset and daifclr.
gas/testsuite/
* gas/aarch64/sysreg-1.s: Add tests of rmr_el1, rmr_el2 and rmr_el3.
* gas/aarch64/sysreg-1.d: Update.
* gas/aarch64/illegal.s: Add tests of daifset and daifclr.
* gas/aarch64/illegal.d: Update.
2012-10-15 15:07:49 +00:00
9b61754a3f
Added the changelog for the previous commit.
2012-10-15 14:57:31 +00:00
9de794e148
Added missing alignment check to load/store uimm12 immediate offset.
...
opcodes/
* aarch64-opc.c (operand_general_constraint_met_p): Change to check
the alignment of addr.offset.imm instead of that of shifter.amount for
operand type AARCH64_OPND_ADDR_UIMM12.
gas/testsuite/
* gas/aarch64/illegal-2.s: Add test case.
* gas/aarch64/illegal-2.l: Likewise.
2012-10-15 14:52:06 +00:00
767b2c6712
* gas/hppa/basic/fmemLRbug.s: Remove double load and store instructions
...
which reference the right half of a floating point register.
* gas/hppa/basic/basic.exp: Adjust expected results.
2012-10-14 23:25:17 +00:00
3af942d249
* gas/hppa/basic/unit.s: Remove uxor instructions with unit condition
...
involving a carry.
* gas/hppa/basic/unit2.s: Likewise.
* gas/hppa/basic/basic.exp: Adjusted expected.
2012-10-13 22:12:18 +00:00
f8ece37fb1
2012-10-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
...
* arm-dis.c: Use preferred form of vrint instruction variants
for disassembly.
2012-10-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* gas/arm/armv8-a+fp.d: Use preferred form of vrint instruction
variants for disassembly.
* gas/arm/armv8-a+fp.s: Likewise.
* gas/arm/armv8-a+simd.d: Likewise.
* gas/arm/armv8-a+simd.s: Likewise.
2012-10-11 15:33:08 +00:00
56c0a61f59
2012-10-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
...
* config/tc-arm.c: Change condition code insertion for
lds[hb] instructions from after the 2nd character to after the 3rd.
(tCM): Remove macro.
(TxCM): Likewise.
(TxCM_): Likewise.
(TCM): Likewise.
2012-10-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* gas/arm/ldgesb-bad.d: New file.
* gas/arm/ldgesb-bad.l: Likewise.
* gas/arm/ldgesb-bad.s: Likewise.
* gas/arm/ldgesh-bad.d: Likewise.
* gas/arm/ldgesh-bad.l: Likewise.
* gas/arm/ldgesh-bad.s: Likewise.
* gas/arm/ldsgeb.d: Likewise.
* gas/arm/ldsgeb.s: Likewise.
* gas/arm/ldsgeb.l: Likewise.
* gas/arm/ldsgeh.d: Likewise.
* gas/arm/ldsgeh.s: Likewise.
* gas/arm/ldsgeh.l: Likewise.
2012-10-11 15:26:18 +00:00
5e5c50d37b
Add AMD bdver3 support.
...
gas/
* config/tc-i386.c (cpu_arch): Add CPU_BDVER3_FLAGS.
* doc/c-i386.texi: Add -march=bdver3 option.
gas/testsuite/
* gas/i386/i386.exp: Run bdver3 test cases.
* gas/i386/nops-1-bdver3.d: New.
* gas/i386/arch-10-bdver3.d: New.
* gas/i386/x86-64-nops-1-bdver3.d: New.
* gas/i386/x86-64-arch-2-bdver3.d: New.
opcodes/
* i386-gen.c (cpu_flag_init): Add CPU_BDVER3_FLAGS.
* i386-init.h: Regenerated.
2012-10-09 08:43:06 +00:00
c7a5aa9c64
opcodes/
...
* ppc-dis.c (ppc_opts) <altivec>: Use PPC_OPCODE_ALTIVEC2;
* ppc-opc.c (VBA): New define.
(powerpc_opcodes) <vcuxwfp, vcsxwfp, vcfpuxws, vcfpsxsw, vmr, vnot,
mfppr, mfppr32, mtppr, mtppr32>: New extended mnemonics.
gas/testsuite/
* gas/ppc/power7.d: Add tests for mfppr, mfppr32, mtppr and mtppr32.
* gas/ppc/power7.s: Likewise.
* gas/ppc/altivec.d: Add tests for all legacy Altivec instructions.
* gas/ppc/altivec.s: Likewise.
* gas/ppc/altivec2.d: New test file.
* gas/ppc/altivec2.s: Likewise.
* gas/ppc/ppc.exp: Run it.
2012-10-05 14:06:20 +00:00
04ee5257d6
* v850-dis.c (disassemble): Place square parentheses around second
...
register operand of clr1, not1, set1 and tst1 instructions.
* config/tc-v850.c (v850_insert_operand): Use a static buffer for
the error message.
* gas/v850/v850e1.d: Fix expected disassembly of clr1, not1, set1
and tst1 insns.
2012-10-04 10:30:06 +00:00
8936df7e34
2012-10-04 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
...
* gas/s390/zarch-zEC12.d: Fix branch preload instructions.
* gas/s390/zarch-zEC12.s: Likewise.
2012-10-04 10:20:48 +00:00
b95ee1f439
Commit missing files from last patch.
2012-10-04 08:48:14 +00:00
cfc7277920
2012-10-04 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
...
* config/tc-s390.c (s390_parse_cpu): Add new option zEC12.
* doc/as.texinfo: Document new option zEC12.
* doc/c-s390.texi: Likewise.
2012-10-04 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* gas/s390/s390.exp: Run zEC12 tests.
* gas/s390/zarch-zEC12.d: New file.
* gas/s390/zarch-zEC12.s: New file.
2012-10-04 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* s390-mkopc.c: Support new option zEC12.
* s390-opc.c: Add new instruction formats.
* s390-opc.txt: Add new instructions for zEC12.
2012-10-04 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* s390.h (s390_opcode_cpu_val): Add S390_OPCODE_ZEC12.
2012-10-04 08:47:36 +00:00
160a30bb92
Add missing Cpu flags in bd and bt cores
...
gas/testsuite/
2012-09-25 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
* gas/i386/arch-10-bdver1.d: New file to test bdver1 core.
* gas/i386/x86-64-arch-2-bdver1.d: Likewise.
* gas/i386/i386.exp: Run bdver1 testcases.
* gas/i386/arch-10-bdver2.d: Updated -march flags.
* gas/i386/arch-10-btver1.d: Likewise.
* gas/i386/arch-10-btver2.d: Likewise.
* gas/i386/x86-64-arch-2-bdver2.d: Likewise.
* gas/i386/x86-64-arch-2-btver1.d: Likewise.
* gas/i386/x86-64-arch-2-btver2.d: Likewise.
opcodes/
2012-09-25 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
* gas/i386/arch-10-bdver1.d: New file to test bdver1 core.
* gas/i386/x86-64-arch-2-bdver1.d: Likewise.
* gas/i386/i386.exp: Run bdver1 testcases.
* gas/i386/arch-10-bdver2.d: Updated -march flags.
* gas/i386/arch-10-btver1.d: Likewise.
* gas/i386/arch-10-btver2.d: Likewise.
* gas/i386/x86-64-arch-2-bdver2.d: Likewise.
* gas/i386/x86-64-arch-2-btver1.d: Likewise.
* gas/i386/x86-64-arch-2-btver2.d: Likewise.
2012-09-25 13:12:34 +00:00
1976c29229
gas/testsuite/
...
2012-09-23 Maciej W. Rozycki <macro@codesourcery.com>
* gas/mips/hilo-diff-eb.d: New test.
* gas/mips/hilo-diff-eb-n32.d: New test.
* gas/mips/hilo-diff-eb-n64.d: New test.
* gas/mips/hilo-diff-el.d: New test.
* gas/mips/hilo-diff-el-n32.d: New test.
* gas/mips/hilo-diff-el-n64.d: New test.
* gas/mips/mips16@hilo-diff-eb.d: New test.
* gas/mips/mips16@hilo-diff-eb-n32.d: New test.
* gas/mips/mips16@hilo-diff-eb-n64.d: New test.
* gas/mips/mips16@hilo-diff-el.d: New test.
* gas/mips/mips16@hilo-diff-el-n32.d: New test.
* gas/mips/mips16@hilo-diff-el-n64.d: New test.
* gas/mips/micromips@hilo-diff-eb.d: New test.
* gas/mips/micromips@hilo-diff-eb-n32.d: New test.
* gas/mips/micromips@hilo-diff-eb-n64.d: New test.
* gas/mips/micromips@hilo-diff-el.d: New test.
* gas/mips/micromips@hilo-diff-el-n32.d: New test.
* gas/mips/micromips@hilo-diff-el-n64.d: New test.
* gas/mips/hilo-diff.s: New test source.
* gas/mips/mips.exp: Run the new tests.
2012-09-23 11:16:53 +00:00
b886a2ab0d
gas/
...
* config/tc-mips.h (TC_FORCE_RELOCATION): Remove comment.
* config/tc-mips.c (calculate_reloc): New function.
(append_insn): Use it. Do not resolve compound relocations here.
(mips16_macro_build, mips16_ip): Use calculate_reloc.
(mips16_immed_extend): New function, split out from...
(mips16_immed): ...here.
(mips_frob_file): Handle null symbols.
(mips_force_relocation): Remove NEWABI handling.
(read_reloc_insn, write_reloc_insn): New functions.
(md_apply_fix): Report TLS relocations against constants.
Use read_reloc_insn, calculate_reloc and write_reloc_insn.
Report relocations against constants that can't be resolved
at assembly time.
gas/testsuite/
* gas/mips/elf-rel22.s, gas/mips/elf-rel22.d: Add more tests.
* gas/mips/elf-rel29.s, gas/mips/elf-rel29.d,
gas/mips/micromips@elf-rel29.d, gas/mips/elf-rel30.s,
gas/mips/elf-rel30.l: New tests.
* gas/mips/mips.exp: Run them.
2012-09-23 11:14:27 +00:00
e1b47bd5c7
gas/
...
2012-09-23 Richard Sandiford <rdsandiford@googlemail.com>
Maciej W. Rozycki <macro@codesourcery.com>
* config/tc-mips.h (mips_record_label): Delete.
(mips_add_dot_label): Declare.
(tc_new_dot_label): Use it.
* config/tc-mips.c (mips_assembling_insn): New variable.
(md_assemble): Call mips_mark_labels. Set mips_assembling_insn
while the main part of the function is executing.
(mips_compressed_mark_label): New function, split out from...
(mips_compressed_mark_labels): ...here.
(append_insn): Don't call mips_mark_labels here.
(mips_record_label): Make local.
(mips_add_dot_label): New function.
gas/testsuite/
* gas/mips/dot-1.s, gas/mips/dot-1.d, gas/mips/micromips@dot-1.d,
gas/mips/mips16@dot-1.d: New test.
* gas/mips/mips.exp: Run it.
2012-09-23 10:41:24 +00:00
6788fa5241
Add x86-64-arch-2-1/x86-64-arch-2-2 tests
...
* gas/i386/i386.exp: Run x86-64-arch-2-1 and x86-64-arch-2-2.
* gas/i386/x86-64-arch-2-1.l: New file.
* gas/i386/x86-64-arch-2-1.s: Likewise.
* gas/i386/x86-64-arch-2-2.l: Likewise.
* gas/i386/x86-64-arch-2-2.s: Likewise.
2012-09-20 14:43:20 +00:00
60aa667ec4
Replace CpuSSE3 with CpuCX16 for cmpxchg16b
...
gas/
* config/tc-i386.c (cpu_arch): Add .cx16.
* doc/c-i386.texi: Document .cx16.
gas/testsuite/
* gas/i386/x86-64-arch-2.s: Add test for cmpxchg16b.
* gas/i386/x86-64-arch-2.d: Update correspondingly.
* gas/i386/x86-64-arch-2-bdver2.d: Likewise.
* gas/i386/x86-64-arch-2-btver1.d: Likewise.
* gas/i386/x86-64-arch-2-btver2.d: Likewise.
* gas/i386/x86-64-arch-2-lzcnt.d: Likewise.
* gas/i386/x86-64-arch-2-prefetchw.d: Likewise.
* gas/i386/ilp32/x86-64-arch-2.d: Likewise.
opcodes/
* i386-gen.c (cpu_flag_init): Add CpuCX16 to CPU_NOCONA_FLAGS,
CPU_CORE_FLAGS, CPU_CORE2_FLAGS, CPU_COREI7_FLAGS,
CPU_BDVER1_FLAGS, CPU_BDVER2_FLAGS, CPU_BTVER1_FLAGS,
CPU_BTVER2_FLAGS. Add CPU_CX16_FLAGS.
(cpu_flags): Add CpuCX16.
* i386-opc.h (CpuCX16): New.
(i386_cpu_flags): Add cpucx16.
* i386-opc.tbl: Replace CpuSSE3 with CpuCX16 for cmpxchg16b.
* i386-tbl.h: Regenerate.
* i386-init.h: Likewise.
2012-09-20 11:53:33 +00:00
4b8c8c02e9
2012-09-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
...
opcodes:
* arm-dis.c: Changed ldra and strl-form mnemonics
to lda and stl-form.
gas:
* config/tc-arm.c: Changed ldra and strl-form mnemonics
to lda and stl-form for armv8.
gas/testsuite:
* gas/arm/armv8-a-bad.l: Updated for changed mnemonics.
* gas/arm/armv8-a-bad.s: Likewise.
* gas/arm/armv8-a.d: Likewise.
* gas/arm/armv8-a.s: Likewise.
* gas/arm/inst.s: Added test for ldrt encoding compatibly with ldralt.
* gas/arm/inst.d: Updated.
2012-09-18 14:52:43 +00:00
83ea18d0a3
opcodes/
...
* micromips-opc.c (micromips_opcodes): Correct the encoding of
the "swxc1" instruction.
gas/testsuite/
* gas/mips/micromips.d: Correct the disassembly of SWXC1.
* gas/mips/micromips-trap.d: Likewise.
* gas/mips/micromips@24k-triple-stores-1.d: Likewise.
* gas/mips/micromips@mips4-fp.d: Likewise.
2012-09-18 14:19:04 +00:00
5a1ad39d72
2012-09-17 Yufeng Zhang <yufeng.zhang@arm.com>
...
gas:
* config/tc-aarch64.c (aarch64_archs): Rename 'armv8' to 'armv8-a'.
gas/testsuite:
* gas/aarch64/crypto.d (#as): Update for v8->v8-A change.
* gas/aarch64/int-insns.d (#as): Likewise.
* gas/aarch64/legacy_reg_names.s (.arch): Likewise.
* gas/aarch64/neon-not.s (.arch): Likewise.
* gas/aarch64/neon-vfp-reglist-post.s (.arch): Likewise.
* gas/aarch64/neon-vfp-reglist.s (.arch): Likewise.
2012-09-17 17:48:51 +00:00
f41aef5f6e
2012-09-11 Chris Schlumberger-Socha <chris.schlumberger-socha@arm.com>
...
bfd/
* bfd-in2.h: Regenerated.
* elf64-aarch64.c
(elf64_aarch64_howto_table): Add R_AARCH64_GOT_LD_PREL19 reloc to HOWTO.
(elf64_aarch64_reloc_map): Add reloc entry.
(aarch64_resolve_relocation): Likewise.
(bfd_elf_aarch64_put_addend): Likewise.
(aarch64_reloc_got_type): Likewise.
(elf64_aarch64_final_link_relocate): Likewise.
(lf64_aarch64_check_relocs): Likewise.
(elf64_aarch64_check_relocs): New case for R_AARCH64_ADR_PREL_LO21
reloc.
* libbfd.h: Regenerated.
* reloc.c (R_AARCH64_GOT_LD_PREL19): New reloc.
gas/
* config/tc-aarch64.c
(reloc_table): Add reloc to table entry.
(parse_address_main): Add support for #:<reloc_op>:<symbol>.
(parse_operands): Check for unused reloc.
(md_apply_fix): New case for reloc.
(aarch64_force_relocation): Likewise.
gas/testsuite
* gas/aarch64/reloc-insn.d
(BFD_RELOC_AARCH64_GOT_LD_PREL19): Add expected asm for new reloc test.
* gas/aarch64/reloc-insn.s
(BFD_RELOC_AARCH64_GOT_LD_PREL19): Add test for reloc.
include/
* elf/aarch64.h (R_AARCH64_GOT_LD_PREL19): New reloc.
ld/testsuite
* ld-aarch64/aarch64-elf.exp: New reloc tests.
* ld-aarch64/emit-relocs-309-low-bad.d: New file. Expected asm for test
failure (lower bound overflow).
* ld-aarch64/emit-relocs-309-low.d: New file. Expected asm for test
success (lower bound).
* ld-aarch64/emit-relocs-309-up-bad.d: New file. Expected asm for test
failure (upper bound overflow).
* ld-aarch64/emit-relocs-309-up.d: New file. Expected asm for test
success (upper bound).
* ld-aarch64/emit-relocs-309.s: New file. Asm for new reloc tests.
2012-09-12 16:25:51 +00:00
b3e14edafc
Add Intel Itanium Series 9500 support
...
bfd/
2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
* cpu-ia64-opc.c (ins_cnt6a): New function.
(ext_cnt6a): Ditto.
(ins_strd5b): Ditto.
(ext_strd5b): Ditto.
(elf64_ia64_operands): Add new operand types.
gas/
2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
* config/tc-ia64.c (reg_symbol): Add a new register.
(indirect_reg): Ditto.
(pseudo_func): Add new symbolic constants.
(operand_match): Add new operand types recognition.
(operand_insn): Add new register recognition.
(md_begin): Add new register definition.
(specify_resource): Add new register recognition.
gas/testsuite/
2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
* gas/testsuite/gas/ia64/psn.d: New file.
* gas/testsuite/gas/ia64/psn.s: New file.
* gas/testsuite/gas/ia64/ia64.exp: Add new testcase.
* gas/testsuite/gas/ia64/opc-i.d: Fixed failing tests.
* gas/testsuite/gas/ia64/opc-m.d: Ditto.
include/opcode/
2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
* ia64.h (ia64_opnd): Add new operand types.
opcodes/
2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
* ia64-asmtab.h (completer_index): Extend bitfield to full uint.
* ia64-gen.c: Promote completer index type to longlong.
(irf_operand): Add new register recognition.
(in_iclass_mov_x): Add an entry for the new mov_* instruction type.
(lookup_specifier): Add new resource recognition.
(insert_bit_table_ent): Relax abort condition according to the
changed completer index type.
(print_dis_table): Fix printf format for completer index.
* ia64-ic.tbl: Add a new instruction class.
* ia64-opc-i.c (ia64_opcodes_i): Define new I-instructions.
* ia64-opc-m.c (ia64_opcodes_m): Define new M-instructions.
* ia64-opc.h: Define short names for new operand types.
* ia64-raw.tbl: Add new RAW resource for DAHR register.
* ia64-waw.tbl: Add new WAW resource for DAHR register.
* ia64-asmtab.c: Regenerate.
2012-09-04 13:52:06 +00:00
9c75beeb5a
PR gas/14521
...
* gas/mmix/group-1.d, gas/mmix/group-1.s: New test.
2012-09-01 18:09:26 +00:00
49b5fc4618
Skip gas/elf/group0c.d for Solaris
...
* gas/elf/group0c.d: Skip Solaris.
2012-08-24 19:00:16 +00:00
e772203522
Properly check x32 support
...
* gas/i386/ilp32/ilp32.exp (gas_64_check): Renamed to ...
(gas_x32_check): This. Check elf32-x86-64.
Remove Solaris check.
* gas/i386/ilp32/cfi/ilp32.exp: Likewise.
* gas/i386/ilp32/elf/ilp32.exp: Likewise.
* gas/i386/ilp32/lns/ilp32.exp: Likewise.
2012-08-24 17:57:52 +00:00
9ace5d9690
Skip x32 tests for Solaris
...
* gas/i386/ilp32/ilp32.exp: Skip Solaris.
* gas/i386/ilp32/cfi/ilp32.exp: Likewise.
* gas/i386/ilp32/elf/ilp32.exp: Likewise.
* gas/i386/ilp32/lns/ilp32.exp: Likewise.
2012-08-24 17:42:56 +00:00
3c9017d250
* gas/config/tc-arm.c (ARM_ENC_TAB): Add sha1h and sha2op entries.
...
(do_sha1h): New function.
(do_sha1su1): Likewise.
(do_sha256su0): Likewise.
(insns): Add 2 operand SHA instructions.
* gas/testsuite/gas/arm/armv8-a+crypto.s: Update testcase.
* gas/testsuite/gas/arm/armv8-a+crypto.d: Likewise.
* opcodes/arm-dis.c (neon_opcodes): Add 2 operand sha instructions.
2012-08-24 08:14:40 +00:00
48adcd8ed5
* gas/config/tc-arm.c (NEON_ENC_TAB): Add sha3op entry.
...
(do_crypto_3op_1): New function.
(do_sha1c): Likewise.
(do_sha1p): Likewise.
(do_sha1m): Likewise.
(do_sha1su0): Likewise.
(do_sha256h): Likewise.
(do_sha256h2): Likewise.
(do_sha256su1): Likewise.
(insns): Add SHA 3 operand instructions.
* gas/testsuite/gas/arm/armv8-a+crypto.d: Update testcase.
* gas/testsuite/gas/arm/armv8-a+crypto.s: Likewise.
* opcodes/arm-dis.c (neon_opcodes): Add SHA 3-operand instructions.
2012-08-24 08:14:04 +00:00
4f51b4bdbb
* gas/config/tc-arm.c (neon_type_mask): Add P64 type.
...
(type_chk_of_el_type): Handle P64 type.
(el_type_of_type_chk): Likewise.
(do_neon_vmull): Handle VMULL.P64.
* gas/testsuite/gas/arm/armv8-a+crypto.d: Update testcase.
* gas/testsuite/gas/arm/armv8-a+crypto.s: Likewise.
* opcodes/arm-dis.c (neon_opcodes): Handle VMULL.P64.
2012-08-24 08:13:24 +00:00
91ff78946d
* gas/config/tc-arm.c (NEON_ENC_TAB): Add aes entry.
...
(neon_type_mask): Add N_UNT.
(neon_check_type): Don't always decay typed to untyped sizes.
(do_crypto_2op_1): New function.
(do_aese): Likewise.
(do_aesd): Likewise.
(do_aesmc.8): Likewise.
(do_aesimc.8): Likewise.
(insns): Add AES instructions.
* gas/testsuite/gas/arm/armv8-a+crypto.d: New testcase.
* gas/testsuite/gas/arm/armv8-a+crypto.s: Likewise.
* opcodes/arm-dis.c (neon_opcodes): Add support for AES instructions.
2012-08-24 08:12:45 +00:00
c70a898785
* gas/config/tc-arm.c (el_type_type_check): Add handling for 16-bit
...
floating point types.
(do_neon_cvttb_2): New function.
(do_neon_cvttb_1): Likewise.
(do_neon_cvtb): Refactor to use do_neon_cvttb_1.
(do_neon_cvtt): Likewise.
* gas/testsuite/gas/arm/armv8-a+fp.d: Update testcase.
* gas/testsuite/gas/arm/armv8-a+fp.s: Likewise.
* gas/testsuite/gas/arm/half-prec-vfpv3.s: Likewise.
* opcodes/arm-dis.c (coprocessor_opcodes): Add support for HP/DP
conversions.
2012-08-24 08:11:44 +00:00
30bdf75259
* gas/config/tc-arm.c (NEON_ENC_TAB): Add vrint entries.
...
(neon_cvt_mode): Add neon_cvt_mode_r.
(do_vrint_1): New function.
(do_vrint_x): Likewise.
(do_vrint_z): Likewise.
(do_vrint_r): Likewise.
(do_vrint_a): Likewise.
(do_vrint_n): Likewise.
(do_vrint_p): Likewise.
(do_vrint_m): Likewise.
(insns): Add VRINT instructions.
* gas/testsuite/gas/arm/armv8-a+fpv5.d: Update testcase.
* gas/testsuite/gas/arm/armv8-a+fpv5.s: Likewise.
* gas/testsuite/gas/arm/armv8-a+simdv3.d: Likewise.
* gas/testsuite/gas/arm/armv8-a+simdv3.s: Likewise.
* opcodes/arm-dis.c (coprocessor_opcodes): Add VRINT.
(neon_opcodes): Likewise.
2012-08-24 08:11:13 +00:00
7e8e678496
* gas/config/tc-arm.c (NEON_ENC_TAB): Add vcvta entry.
...
(neon_cvt_mode): New enumeration.
(do_vfp_nsyn_cvt_fpv8): New function.
(do_neon_cvt_1): Add support for new conversions.
(do_neon_cvtr): Use neon_cvt_mode enumerator.
(do_neon_cvt): Likewise.
(do_neon_cvta): New function.
(do_neon_cvtn): Likewise.
(do_neon_cvtp): Likewise.
(do_neon_cvtm): Likewise.
(insns): Add new VCVT instructions.
* gas/testsuite/gas/arm/armv8-a+fp.d: Update testcase.
* gas/testsuite/gas/arm/armv8-a+fp.s: Likewise.
* gas/testsuite/gas/arm/armv8-a+simd.d: Likewise.
* gas/testsuite/gas/arm/armv8-a+simd.s: Likewise.
* opcodes/arm-dis.c (coprocessor_opcodes): Add support for new VCVT
variants.
(neon_opcodes): Likewise.
2012-08-24 08:09:50 +00:00
73924fbcf8
* gas/config/tc-arm.c (NEON_ENC_TAB): Add vmaxnm, vminnm entries.
...
(vfp_or_neon_is_neon_bits): Add NEON_CHECK_ARCH8 enumerator.
(vfp_or_neon_is_neon): Add check for SIMD for ARMv8.
(do_maxnm): New function.
(insns): Add vmaxnm, vminnm entries.
* gas/testsuite/gas/testsuite/gas/armv8-a+fp.d: Update testcase.
* gas/testsuite/gas/testsuite/gas/armv8-a+fp.s: Likewise.
* gas/testsuite/gas/testsuite/gas/armv8-a+simd.d: New testcase.
* gas/testsuite/gas/testsuite/gas/armv8-a+simd.s: Likewise.
* opcodes/arm-dis.c (coprocessor_opcodes): Add VMAXNM/VMINNM.
(neon_opcodes): Likewise.
2012-08-24 08:07:36 +00:00
33399f071c
* gas/config/tc-arm.c (NEON_ENC_TAB): Add entries for VSEL.
...
(NEON_ENC_FPV8_): New define.
(do_vfp_nsyn_fpv8): New function.
(do_vsel): Likewise.
(insns): Add VSEL instructions.
* gas/testsuite/gas/arm/armv8-a+fp.d: New testcase.
* gas/testsuite/gas/arm/armv8-a+fp.s: Likewise.
* opcodes/arm-dis.c (coprocessor_opcodes): Add VSEL.
(print_insn_coprocessor): Add new %<>c bitfield format
specifier.
2012-08-24 08:06:36 +00:00
9eb6c0f132
* gas/config/tc-arm.c (do_rm_rn): New function.
...
(do_strlex): Likewise.
(do_t_strlex): Likewise.
(insns): Add support for LDRA/STRL instructions.
* gas/testsuite/gas/arm/armv8-a-bad.l: Update testcase.
* gas/testsuite/gas/arm/armv8-a-bad.s: Likewise.
* gas/testsuite/gas/arm/armv8-a.d: Likewise.
* gas/testsuite/gas/arm/armv8-a.s: Likewise.
* opcodes/arm-dis.c (arm_opcodes): Add LDRA/STRL instructions.
(thumb32_opcodes): Likewise.
(print_arm_insn): Add support for %<>T formatter.
2012-08-24 08:03:39 +00:00
8884b7208b
* gas/config/tc-arm.c (do_t_bkpt_hlt1): New function.
...
(do_t_hlt): New function.
(do_t_bkpt): Use do_t_bkpt_hlt1.
(insns): Add HLT.
* gas/testsuite/gas/arm/armv8-a-bad.l: Update for HLT.
* gas/testsuite/gas/arm/armv8-a-bad.s: Likewise.
* gas/testsuite/gas/arm/armv8-a.d: Likewise.
* gas/testsuite/gas/arm/armv8-a.s: Likewise.
* opcodes/arm-dis.c (arm_opcodes): Add HLT.
(thumb_opcodes): Likewise.
2012-08-24 08:02:51 +00:00
b79f7053dd
* gas/config/tc-arm.c (insns): Add DCPS instruction.
...
* gas/testsuite/gas/arm/armv8-a.d: Update.
* gas/testsuite/gas/arm/armv8-a.s: Likewise.
* opcodes/arm-dis.c (thumb32_opcodes): Add DCPS instruction.
2012-08-24 08:02:09 +00:00
53c4b28b4f
* gas/config/tc-arm.c (T16_32_TAB): Add _sevl.
...
(insns): Add SEVL.
* gas/testsuite/gas/arm/armv8-a.s: New testcase.
* gas/testsuite/gas/arm/armv8-a.d: Likewise.
* opcodes/arm-dis.c (arm_opcodes): Add SEVL.
(thumb_opcodes): Likewise.
(thumb32_opcodes): Likewise.
2012-08-24 08:01:18 +00:00
e797f7e0b2
* gas/config/tc-arm.c (asm_barrier_opt): Add arch field.
...
(mark_feature_used): New function.
(parse_barrier): Check specified option is valid for the
specified architecture.
(UL_BARRIER): New macro.
(barrier_opt_names): Update for new barrier options.
* gas/testsuite/gas/arm/armv8-a-barrier.s: New testcase.
* gas/testsuite/gas/arm/armv8-a-barrier-arm.d: Likewise.
* gas/testsuite/gas/arm/armv8-a-barrier-thumb.d: Likewise.
* opcodes/arm-dis.c (data_barrier_option): New function.
(print_insn_arm): Use data_barrier_option.
(print_insn_thumb32): Use data_barrier_option.
2012-08-24 08:00:20 +00:00
12e37cbc4b
* gas/config/tc-arm.c (do_setend): Warn on deprecated SETEND.
...
(do_t_setend): Likewise.
* gas/testsuite/gas/arm/armv8-a-bad.l: Update
* gas/testsuite/gas/arm/armv8-a-bad.s: Likewise.
2012-08-24 07:58:02 +00:00
5a01bb1d0f
* gas/config/tc-arm.c (do_t_it): Fully initialise now_it.
...
(new_automatic_it_block): Likewise.
(handle_it_block): Record whether current instruction is
conditionally executed.
* gas/config/tc-arm.c (depr_insn_mask): New structure.
(depr_it_insns): New variable.
(it_fsm_post_encode): Warn on deprecated uses.
* gas/config/tc-arm.h (current_it): Add new fields.
* gas/testsuite/gas/arm/armv8-a-it-bad.d: New testcase.
* gas/testsuite/gas/arm/armv8-a-it-bad.l: Likewise.
* gas/testsuite/gas/arm/armv8-a-it-bad.s: Likewise.
* gas/testsuite/gas/arm/ldr-t-bad.s: Update testcase.
* gas/testsuite/gas/arm/ldr-t.d: Likewise.
* gas/testsuite/gas/arm/ldr-t.s: Likewise.
* gas/testsuite/gas/arm/neon-cond-bad-inc.s: Likewise.
* gas/testsuite/gas/arm/sp-pc-validations-bad-t: Likewise.
* gas/testsuite/gas/arm/vfp-fma-inc.s: Likewise.
* gas/testsuite/gas/arm/vfp-neon-syntax-inc.s: Likewise.
2012-08-24 07:57:19 +00:00
dcbd0d713c
* gas/config/tc-arm.c (deprecated_coproc_regs_s): New structure.
...
(deprecated_coproc_regs): New variable.
(deprecated_coproc_reg_count): Likewise.
(do_co_reg): Error on obsolete & warn on deprecated registers.
* gas/testsuite/gas/arm/armv8-a-bad.l: Update testcase.
* gas/testsuite/gas/arm/armv8-a-bad.s: Likewise.
2012-08-24 07:54:45 +00:00
59d09be6f5
* gas/config/tc-arm.c (check_obsolete): New function.
...
(do_rd_rm_rn): Check swp{b} for obsoletion.
* gas/testsuite/gas/arm/armv8-a-bad.d: New testcase.
* gas/testsuite/gas/arm/armv8-a-bad.l: Likewise.
* gas/testsuite/gas/arm/armv8-a-bad.s: Likewise.
* gas/testsuite/gas/arm/depr-swp.l: Update for change in expected output.
* gas/testsuite/gas/arm/depr-swp.s: Add additional test.
* include/opcode/arm.h (ARM_CPU_IS_ANY): New define.
2012-08-24 07:52:49 +00:00
bca3892142
* bfd/elf32-arm.c (v8): New array.
...
(tag_cpu_arch_combine): Add support for ARMv8 attributes.
(elf32_arm_merge_eabi_attributes): Likewise.
(VFP_VERSION_COUNT): New define.
* binutils/readelf.c (arm_attr_tag_CPU_arch): Update for ARMv8.
(arm_attr_tag_FP_arch): Likewise.
(arm_attr_tag_Advanced_SIMD_arch): Likewise.
* gas/config/tc-arm.h (arm_ext_v8): New variable.
(fpu_vfp_ext_armv8): Likewise.
(fpu_neon_ext_armv8): Likewise.
(fpu_crypto_ext_armv8): Likewise.
(arm_archs): Add armv8-a.
(arm_extensions): Add crypto, fp, and simd.
(arm_fpus): Add fp-armv8, neon-fp-armv8, crypto-neon-fp-armv8.
(cpu_arch_ver): Add support for ARMv8.
(aeabi_set_public_sttributes): Likewise.
* gas/doc/c-arm.texi (ARM Options): Document new architecture and
extension options for ARMv8.
* gas/testsuite/gas/arm/attr-march-all.d: Update for change in expected
output.
* gas/testsuite/gas/arm/attr-mfpu-vfpv4-d16.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfpv4.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv8-a+crypto.d: New testcase.
* gas/testsuite/gas/arm/attr-march-armv8-a+fp.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv8-a+simd.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv8-a.d: Likewise.
* include/elf/arm.h (TAG_CPU_ARCH_V8): New define.
(MAX_TAG_CPU_ARCH): Update.
* include/opcode/arm.h (ARM_EXT_V8): New define.
(FPU_VFP_EXT_ARMV8): Likewise.
(FPU_NEON_EXT_ARMV8): Likewise.
(FPU_CRYPTO_EXT_ARMV8): Likewise.
(ARM_AEXT_V8A): Likewise.
(FPU_VFP_ARMV8): Likwise.
(FPU_NEON_ARMV8): Likewise.
(FPU_CRYPTO_ARMV8): Likewise.
(FPU_ARCH_VFP_ARMV8): Likewise.
(FPU_ARCH_NEON_VFP_ARMV8): Likewise.
(FPU_ARCH_CRYPTO_NEON_VFP_ARMV8): Likewise.
(ARM_ARCH_V8A): Likwise.
(ARM_ARCH_V8A_FP): Likewise.
(ARM_ARCH_V8A_SIMD): Likewise.
(ARM_ARCH_V8A_CRYPTO): Likewise.
* ld/testsuite/ld-arm/arm-elf.exp: Add new testcases.
* ld/testsuite/ld-arm/attr-merge-vfp-3.d: Update for change in expected
output.
* ld/testsuite/ld-arm/attr-merge-vfp-3r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-4.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-4r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-5.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-5r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-7.d: New testcase.
* ld/testsuite/ld-arm/attr-merge-vfp-7r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-armv8-hard.s: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-armv8.s: Likewise.
2012-08-24 07:50:38 +00:00
2c63854f55
Fix sparc opcode encoding for 4-arg crypto instructions.
...
include/opcode
* sparc.h (F3F4): New macro.
opcodes
* sparc-opc.c (4-argument crypto instructions): Fix encoding using
F3F4 macro.
gas/testsuite
* gas/sparc/crypto.d: Fix opcodes for 4-arg crypto instructions.
2012-08-21 23:00:36 +00:00
e67ed0e885
opcodes/ChangeLog
...
* ppc-opc.c (powerpc_opcodes): Changed opcode for vabsdub,
vabsduh, vabsduw, mviwsplt.
gas/testsuite/ChangeLog
* gas/ppc/e6500.d: Changed opcode for vabsdub, vabsduh, vabsduw,
mviwsplt.
2012-08-20 03:20:24 +00:00
7b458c12dc
Add AMD btver1 and btver2 support
...
gas/
2012-08-17 Nagajyothi Eggone <nagajyothi.eggone@amd.com>
* config/tc-i386.c (cpu_arch): Add CPU_BTVER1_FLAGS and
CPU_BTVER2_FLAGS.
(i386_align_code): Add case for PROCESSOR_BT.
* config/tc-i386.h (enum processor_type): Add PROCESSOR_BT.
* doc/c-i386.texi: Add -march={btver1, btver2} options.
gas/testsuite/
2012-08-17 Nagajyothi Eggone <nagajyothi.eggone@amd.com>
* gas/i386/i386.exp: Run btver1 and btver2 test cases.
* gas/i386/nops-1-btver1.d: New.
* gas/i386/nops-1-btver2.d: New.
* gas/i386/arch-10-btver1.d: New.
* gas/i386/arch-10-btver2.d: New.
* gas/i386/x86-64-nops-1-btver1.d: New.
* gas/i386/x86-64-nops-1-btver2.d: New.
* gas/i386/x86-64-arch-2-btver1.d: New.
* gas/i386/x86-64-arch-2-btver2.d: New.
opcodes/
2012-08-17 Nagajyothi Eggone <nagajyothi.eggone@amd.com>
* i386-gen.c (cpu_flag_init): Add CPU_BTVER1_FLAGS and
CPU_BTVER2_FLAGS.
* i386-opc.h: Update CpuPRFCHW comment.
* i386-opc.tbl: Enable prefetch instruction for CpuPRFCHW.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2012-08-17 17:12:36 +00:00
588925d065
opcodes/
...
* ppc-opc.c <RSQ, RTQ>: Use PPC_OPERAND_GPR.
gas/testsuite/
* gas/ppc/power4.s <lq, stq>: Add more tests.
* gas/ppc/power4.d: Likewise.
2012-08-15 21:25:21 +00:00
9f6a6cc022
opcodes/
...
* ppc-opc.c <xnop, yield, mdoio, mdoom>: New extended mnemonics.
gas/testsuite/
* gas/ppc/common.d ("nop", "xnop"): Add tests.
* gas/ppc/common.s: Likewise.
* gas/ppc/power7.d ("yield", "mdoio", "mdoom"): Add tests.
* gas/ppc/power7.s: Likewise.
2012-08-15 15:33:25 +00:00
f76bf5e00c
Terminate register name when reporting bad register
...
gas/
PR gas/14457
* config/tc-i386.c (i386_att_operand): Terminate register name
when reporting bad register.
gas/testsuite/
PR gas/14457
* gas/i386/i386.exp: Run reg-bad.
* gas/i386/reg-bad.l: New.
* gas/i386/reg-bad.s: Likewise.
2012-08-14 17:01:46 +00:00
a6f7924a83
* gas/mmix/err-fb-2.s: New test.
2012-08-14 02:29:30 +00:00
a06ea96464
Add support for 64-bit ARM architecture: AArch64
2012-08-13 14:52:54 +00:00
5c5acbbddf
Enable FMA instructions for bdver2
...
gas/testsuite/
PR gas/14423
* gas/i386/arch-10-bdver2.d: New file.
* gas/i386/x86-64-arch-2-bdver2.d: Likewise.
* gas/i386/i386.exp: Run new test
opcodes/
2012-08-11 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
PR gas/14423
* i386-gen.c (cpu_flag_init): Add CpuFMA in CPU_BDVER2_FLAGS.
* i386-init.h: Regenerated.
2012-08-10 21:19:40 +00:00
d7189fa58e
gas/testsuite/
...
* gas/i386/prefetch.s: New file.
* gas/i386/prefetch.d: New file.
* gas/i386/prefetch-intel.d: New file.
* gas/i386/x86-64-prefetch.d: New file.
* gas/i386/x86-64-prefetch-intel.d: New file.
* gas/i386/i386.exp: Run them.
opcodes/
* i386-dis.c (reg_table): Fill out REG_0F0D table with
AMD-reserved cases as "prefetch".
(MOD_0F18_REG_4, MOD_0F18_REG_5): New enum constants.
(MOD_0F18_REG_6, MOD_0F18_REG_7): Likewise.
(reg_table): Use those under REG_0F18.
(mod_table): Add those cases as "nop/reserved".
2012-08-07 18:22:04 +00:00
848930b2ba
Despite them being ignored by the CPU, gas issues segment override
...
prefixes for other than FS/GS in 64-bit mode. If doing so at all, it
should clearly do this correctly. Determining the default segment,
however, requires to take into consideration RegRex (so far, RSP, RBP,
R12, and R13 were all treated equally here).
gas/
2012-08-07 Jan Beulich <jbeulich@suse.com>
* config/tc-i386-intel.c (build_modrm_byte): Split determining
default segment from figuring out encoding. Honor RegRex for
the former.
gas/testsuite/
2012-08-07 Jan Beulich <jbeulich@suse.com>
* gas/i386/x86-64-segovr.{s,l}: New.
* gas/i386/i386.exp: Run new test.
2012-08-07 16:57:49 +00:00
7bab8ab56f
The VGATHER group of instructions requires that all three involved
...
xmm/ymm registers are distinct. This patch adds code to check for this,
and at once eliminates a superfluous check for not using PC-relative
addressing for these instructions (the fact that an index register is
required here already excludes valid PC-relative addresses). The
severity of the resulting diagnostics can be controlled via command
line option or directive.
gas/
2012-08-07 Jan Beulich <jbeulich@suse.com>
* config/tc-i386.c (set_check): Renamed from set_sse_check.
Generalize to also handle operand checking option.
(enum i386_error): New enumerator 'invalid_vector_register_set'.
(match_template): Handle it.
(enum check_kind): Give it a tag. Drop sse_ prefixes from
enumerators.
(operand_check): New.
(md_pseudo_table): Add "operand_check".
(check_VecOperands): Don't special case RIP addressing. Check
that vSIB operands use distinct vector registers unless no
checking was requested.
(OPTION_MOPERAND_CHECK): New.
(md_parse_option): Handle it.
(OPTION_MAVXSCALAR, OPTION_X32): Adjust.
(md_longopts): Add "moperand-check".
(md_show_usage): Add help text for it.
gas/testsuite/
2012-08-07 Jan Beulich <jbeulich@suse.com>
* gas/i386/vgather-check-error.{s,l}: New.
* gas/i386/vgather-check-none.{s,d}: New.
* gas/i386/vgather-check-warn.{d,e}: New.
* gas/i386/vgather-check.{s,d}: New.
* gas/i386/x86-64-vgather-check-error.{s,l}: New.
* gas/i386/x86-64-vgather-check-none.{s,d}: New.
* gas/i386/x86-64-vgather-check-warn.{d,e}: New.
* gas/i386/x86-64-vgather-check.{s,d}: New.
* gas/i386/i386.exp: Run new tests.
2012-08-07 16:55:00 +00:00
4c692bc7aa
There were several cases where the registers in the REX encoded range
...
got treated identically to the ones in the base range, due to not
paying attention to the fact that reg_entry's reg_num field doesn't
fully specify the register number (reg_flags also needs to be checked
for RegRex). This patch introduces and uses a new (inline) function to
obtain the full register number, and uses it to fix all those cases.
It additionally adds the missing operand checks for SVME instructions
(which match the monitor/mwait ones).
gas/
2012-08-07 Jan Beulich <jbeulich@suse.com>
* config/tc-i386.c (register_number): New function.
(build_vex_prefix, process_immext, process_operands,
build_modrm_byte, i386_index_check): Use it.
gas/testsuite/
2012-08-07 Jan Beulich <jbeulich@suse.com>
* gas/i386/x86-64-specific-reg.{s,l}: New.
* gas/i386/i386.exp: Run new test.
opcodes/
2012-08-07 Jan Beulich <jbeulich@suse.com>
* i386-opc.tbl: Remove "FIXME" comments from SVME instructions.
2012-08-07 16:51:34 +00:00
a988325c24
* config/tc-i386.c (lex_got): Provide implementation for PE
...
format.
* gas/i386/secrel.s: Add test of <symbol>@SECREL32.
* gas/i386/secrel.d: Add expected disassembly.
* scripttempl/pe.sc (R_TLS): Add .tls$AAA and .tls$ZZZ.
* scripttempl/pep.sc (R_TLS): Add .tls$AAA and .tls$ZZZ.
* archive.c (_bfd_delete_archive_data): New function.
* libbfd-in.h (_bfd_delete_archive_data): Declare.
* libbfd.h: Rebuild.
* opncls.c (_bfd_delete_bfd): Call _bfd_delete_archive_data.
2012-08-07 13:47:19 +00:00
de88229846
gas/testsuite/
...
* gas/i386/x86-64-stack.s: Add cases for push segment register.
* gas/i386/x86-64-stack.d: Updated.
* gas/i386/x86-64-stack-suffix.d: Updated.
* gas/i386/x86-64-stack-intel.d: Updated.
* gas/i386/ilp32/x86-64-stack.d: Updated.
* gas/i386/ilp32/x86-64-stack-suffix.d: Updated.
* gas/i386/ilp32/x86-64-stack-intel.d: Updated.
opcodes/
* i386-dis.c (print_insn): Print spaces between multiple excess
prefixes. Return actual number of excess prefixes consumed,
not always one.
* i386-dis.c (OP_REG): Ignore REX_B for segment register cases.
2012-08-06 22:08:25 +00:00
99262e37ef
gas/testsuite/
...
* gas/mips/mips.exp: Set has_newabi for all Linux targets.
* gas/mips/cfi-n64-1.d: Adjust for targets that do not infer the
ISA from the ABI.
* gas/mips/elf-rel-got-n32.d: Likewise.
* gas/mips/elf-rel-got-n64.d: Likewise.
* gas/mips/elf-rel-xgot-n32.d: Likewise.
* gas/mips/elf-rel-xgot-n64.d: Likewise.
* gas/mips/elf-rel18.d: Likewise.
* gas/mips/elf-rel28-n32.d: Likewise.
* gas/mips/elf-rel28-n64.d: Likewise.
* gas/mips/jal-newabi.d: Likewise.
* gas/mips/ldstla-n64-shared.d: Likewise.
* gas/mips/ldstla-n64-sym32.d: Likewise.
* gas/mips/ldstla-n64.d: Likewise.
* gas/mips/macro-warn-1-n32.d: Likewise.
* gas/mips/macro-warn-2-n32.d: Likewise.
* gas/mips/n32-consec.d: Likewise.
ld/testsuite/
* ld-mips-elf/mips-elf.exp: Set has_newabi for all Linux targets.
Adjust abi_asflags for targets that do not infer the ISA from the
ABI.
* ld-mips-elf/eh-frame1-n32.d: Adjust for targets that do not
infer the ISA from the ABI.
* ld-mips-elf/eh-frame1-n64.d: Likewise.
* ld-mips-elf/eh-frame2-n32.d: Likewise.
* ld-mips-elf/eh-frame2-n64.d: Likewise.
* ld-mips-elf/elf-rel-got-n32-embed.d: Likewise.
* ld-mips-elf/elf-rel-got-n32.d: Likewise.
* ld-mips-elf/elf-rel-got-n64-embed.d: Likewise.
* ld-mips-elf/elf-rel-got-n64-linux.d: Likewise.
* ld-mips-elf/elf-rel-got-n64.d: Likewise.
* ld-mips-elf/elf-rel-xgot-n32-embed.d: Likewise.
* ld-mips-elf/elf-rel-xgot-n32.d: Likewise.
* ld-mips-elf/elf-rel-xgot-n64-embed.d: Likewise.
* ld-mips-elf/elf-rel-xgot-n64-linux.d: Likewise.
* ld-mips-elf/elf-rel-xgot-n64.d: Likewise.
* ld-mips-elf/emit-relocs-1.d: Likewise.
* ld-mips-elf/got-page-2.d: Likewise.
* ld-mips-elf/no-shared-1-n32.d: Likewise.
* ld-mips-elf/no-shared-1-n64.d: Likewise.
* ld-mips-elf/rel32-n32.d: Likewise.
* ld-mips-elf/rel64.d: Likewise.
* ld-mips-elf/relax-jalr-n32-shared.d: Likewise.
* ld-mips-elf/relax-jalr-n32.d: Likewise.
* ld-mips-elf/relax-jalr-n64-shared.d: Likewise.
* ld-mips-elf/relax-jalr-n64.d: Likewise.
* ld-mips-elf/reloc-1-n32.d: Likewise.
* ld-mips-elf/reloc-1-n64.d: Likewise.
* ld-mips-elf/textrel-1.d: Likewise.
2012-08-06 21:28:45 +00:00
ef2b5578f6
gas/testsuite/
...
* gas/mips/mips.exp: Set has_newabi for mips*-sde-elf* too.
* gas/mips/elf-rel-got-n32.s: Adjust padding.
* gas/mips/elf-rel-got-n64.s: Likewise.
* gas/mips/elf-rel23.s: Likewise.
* gas/mips/elf-rel28.s: Likewise.
* gas/mips/n32-consec.s: Likewise.
* gas/mips/elf-rel-xgot-n32.d: Adjust output expected.
* gas/mips/elf-rel-xgot-n64.d: Likewise.
* gas/mips/elf-rel23.d: Likewise.
* gas/mips/elf-rel23a.d: Likewise.
* gas/mips/elf-rel23b.d: Likewise.
* gas/mips/elf-rel28-n32.d: Likewise.
ld/testsuite/
* lib/ld-lib.exp (run_dump_test): Implement the EXTRA_OPTIONS
argument and the "dump" keyword.
* ld-mips-elf/emit-relocs-1a.s: Make section alignment uniform
across targets.
* ld-mips-elf/emit-relocs-1b.s: Likewise.
* ld-mips-elf/jalbal.s: Adjust padding.
* ld-mips-elf/elf-rel-got-n32-embed.d: New test.
* ld-mips-elf/elf-rel-got-n64-embed.d: New test.
* ld-mips-elf/elf-rel-xgot-n32-embed.d: New test.
* ld-mips-elf/elf-rel-xgot-n64-embed.d: New test.
* ld-mips-elf/elf-rel-got-n32.d: Remove -melf32btsmipn32.
* ld-mips-elf/elf-rel-got-n64.d: Remove -melf64btsmip. Adjust
output.
* ld-mips-elf/elf-rel-got-n64-linux.d: Remove -melf64btsmip.
* ld-mips-elf/elf-rel-xgot-n32.d: Remove -melf32btsmipn32.
Adjust output.
* ld-mips-elf/elf-rel-xgot-n64.d: Remove -melf64btsmip. Adjust
output.
* ld-mips-elf/elf-rel-xgot-n64-linux.d: Likewise.
* ld-mips-elf/reloc-1-n64.d: Remove -melf64btsmip.
* ld-mips-elf/mips-elf.exp: Set has_newabi for mips*-sde-elf*
too. Move tool flags from o32_as_flags and o32_ld_flags
variables into abi_asflags and abi_ldflags arrays. Adjust test
cases run to use them. Run the new tests.
2012-08-06 21:05:54 +00:00
464ab0e55a
gas/
...
* config/tc-mips.c (append_insn): Also handle moving delay-slot
instruction across frags for fixed branches.
gas/testsuite/
* gas/mips/branch-swap-2.l: New list test.
* gas/mips/branch-swap-2.s: New test source.
* gas/mips/mips.exp: Run the new test.
2012-08-06 20:33:00 +00:00
7bb15c6f21
gas/testsuite/
...
* gas/i386/x86-64-stack.s: Add cases for push immediate.
* gas/testsuite/gas/i386/ilp32/x86-64-stack-intel.d: Updated.
* gas/testsuite/gas/i386/ilp32/x86-64-stack-suffix.d: Updated.
* gas/testsuite/gas/i386/ilp32/x86-64-stack.d: Updated.
* gas/testsuite/gas/i386/x86-64-stack-intel.d: Updated.
* gas/testsuite/gas/i386/x86-64-stack-suffix.d: Updated.
* gas/testsuite/gas/i386/x86-64-stack.d: Updated.
opcodes/
* i386-dis.c (OP_sI): In b_T_mode and v_mode, REX_W trumps DFLAG.
(putop): For 'T', 'U', and 'V', treat REX_W like DFLAG.
(intel_operand_size): For stack_v_mode, treat REX_W like DFLAG.
(OP_E_register): Likewise.
(OP_REG): For low 8 whole registers, treat REX_W like DFLAG.
2012-08-06 20:19:34 +00:00
3e645041a7
gas/testsuite/
...
* gas/i386/x86-64-stack.s (try): Also try just rex.W (0x48) prefix.
* gas/testsuite/gas/i386/ilp32/x86-64-stack-intel.d: Updated.
* gas/testsuite/gas/i386/ilp32/x86-64-stack-suffix.d: Updated.
* gas/testsuite/gas/i386/ilp32/x86-64-stack.d: Updated.
* gas/testsuite/gas/i386/x86-64-stack-intel.d: Updated.
* gas/testsuite/gas/i386/x86-64-stack-suffix.d: Updated.
* gas/testsuite/gas/i386/x86-64-stack.d: Updated.
2012-08-03 21:45:16 +00:00
399c99f739
Display null bytes in DWARF debug info
...
binutils/
PR binutils/14420
* dwarf.c (process_abbrev_section): Add attribute terminator.
Warn missing section terminator.
(get_FORM_name): Special check for 0 value.
(get_AT_name): Likewise.
(process_debug_info): Display zero abbrev number. Check
attribute terminator.
binutils/testsuite/
PR binutils/14420
* binutils-all/i386/compressed-1a.d: Updated.
* binutils-all/objdump.W: Likewise.
* binutils-all/readelf.wa: Likewise.
* binutils-all/x86-64/compressed-1a.d: Likewise.
gas/testsuite/
PR binutils/14420
* gas/elf/dwarf2-1.d: Updated.
* gas/elf/dwarf2-2.d: Likwise.
* gas/i386/dw2-compress-1.d: Likwise.
2012-08-02 13:42:59 +00:00
4e47244dbe
Reformat ChangeLog files
2012-08-01 15:59:55 +00:00
8fbf7334de
gas/ChangeLog:
...
2012-08-01 James Lemke <jwlemke@codesourcery.com>
* gas/dwarf2dbg.c (out_set_addr): Allow for non-constant value of
DWARF2_LINE_MIN_INSN_LENGTH
* gas/config/tc-ppc.c (ppc_dwarf2_line_min_insn_length): Declare
and initialize.
(md_apply_fix): Branch addr can be a multiple of 2 or 4.
* gas/config/tc-ppc.h (DWARF2_LINE_MIN_INSN_LENGTH): Now a
variable reference.
gas/testsuite/ChangeLog:
2012-08-01 James Lemke <jwlemke@codesourcery.com>
* gas/cfi/cfi-ppc-1.d: Allow for code alignment of 2 or 4.
ld/ChangeLog:
2012-08-01 James Lemke <jwlemke@codesourcery.com>
* ld/testsuite/ld-gc/pr13683.d: XFAIL for powerpc*-*-eabivle.
2012-08-01 13:46:59 +00:00
7a2d09ccbf
Correct ChangeLog.
2012-08-01 03:05:50 +00:00
03f66e8a8f
include/opcode/
...
* mips.h: Document microMIPS DSP ASE usage.
(MICROMIPSOP_MASK_DSPACC, MICROMIPSOP_SH_DSPACC): Update for
microMIPS DSP ASE support.
(MICROMIPSOP_MASK_DSPSFT, MICROMIPSOP_SH_DSPSFT): Likewise.
(MICROMIPSOP_MASK_SA3, MICROMIPSOP_SH_SA3): Likewise.
(MICROMIPSOP_MASK_SA4, MICROMIPSOP_SH_SA4): Likewise.
(MICROMIPSOP_MASK_IMM8, MICROMIPSOP_SH_IMM8): Likewise.
(MICROMIPSOP_MASK_IMM10, MICROMIPSOP_SH_IMM10): Likewise.
(MICROMIPSOP_MASK_WRDSP, MICROMIPSOP_SH_WRDSP): Likewise.
(MICROMIPSOP_MASK_BP, MICROMIPSOP_SH_BP): Likewise.
gas/
* config/tc-mips.c (macro_build) <'2'>: Handle microMIPS.
(macro) <M_BALIGN>: Update error handling.
(validate_micromips_insn) <'2', '3', '4', '5', '6'>: New cases.
<'7', '8', '0', '@', '^'>: Likewise.
(mips_ip) <'2', '3', '4', '5', '6', '7', '8'>: Handle microMIPS.
<'9'>: Fix formatting.
<'0', '@'>: Handle microMIPS.
<'^'>: New case.
gas/testsuite/
* gas/mips/micromips@mips32-dsp.d: New.
* gas/mips/micromips@mips32-dspr2.d: New.
* gas/mips/mips32-dsp.d: Remove -mips32r2.
* gas/mips/mips32-dspr2.d: Likewise.
* gas/mips/mips.exp: (mips_create_arch): Use -mips64r2
for micromips. Use run_dump_test_arches to run dsp tests.
opcodes/
* micromips-opc.c (WR_a, RD_a, MOD_a): New macros.
(DSP_VOLA): Likewise.
(D32, D33): Likewise.
(micromips_opcodes): Add DSP ASE instructions.
* micromips-dis.c (print_insn_micromips) <'2', '3'>: New cases.
<'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
2012-07-31 21:38:54 +00:00
33fee3c9c6
Update gas/d30v/bittest.l
...
* gas/d30v/bittest.l: Updated.
2012-07-31 20:46:59 +00:00
0ac3caa958
Append "#pass" to gas/i386/rdseed-intel.d
...
* gas/i386/rdseed-intel.d: Append "#pass".
2012-07-31 20:46:07 +00:00
8a4b034f5f
2012-07-27 Sean Keys <skeys@ipdatasys.com>
...
* gas/xgate/xgate.exp: Added hi/lo test.
* gas/xgate/hilo.d: New test file
* gas/xgate/hilo.s: Net test source file.
2012-07-30 21:39:06 +00:00
db7c7ead66
Update gas/i386/inval-equ-2.l
...
* gas/i386/inval-equ-2.l: Updated.
2012-07-30 17:11:39 +00:00
8d8ad4eb57
2012-07-27 Sean Keys <skeys@ipdatasys.com>
...
gas/config/
* tc-xgate.c: Consolidated inc/dec/hi/low modifieres into
one function.
(xgate_parse_operand): Added %hi and %lo handling.
gas/testsuite/gas/xgate
* xgate.exp: Added hi/lo test.
* hilo.d: New test file
* hilo.s: Net test source file.
2012-07-27 22:33:22 +00:00
5e73442d4c
2012-07-24 Sandra Loosemore <sandra@codesourcery.com>
...
Jie Zhang <jzhang918@gmail.com>
gas/
* config/tc-arm.c (md_apply_fix): Use encoding A2 of ADR
if offset is negative.
gas/testsuite/
* gas/arm/adr.d: New test.
* gas/arm/adr.s: New test.
2012-07-24 16:38:35 +00:00
e2e1fcde62
Implement RDRSEED, ADX and PRFCHW instructions
...
gas/
* config/tc-i386.c: Add ADX, RDSEED and PRFCHW asm directives.
* doc/c-i386.texi: Document the new directives.
gas/testsuite/
* gas/i386/i386.exp: Run adx, rdseed and prefetchw tests.
* gas/i386/x86-64-arch-2.s: Use prefetchw as 3dnow and Prfchw tests.
* gas/i386/arch-10.s: Likewise.
* gas/i386/arch-10-1.l: Changed correspondingly.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/arch-10.d: Likewise.
* gas/i386/arch-10-lzcnt.d: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
* gas/i386/x86-64-arch-2-lzcnt.d: Likewise.
* gas/i386/ilp32/x86-64-arch-2.d: Likewise.
* gas/i386/arch-10-prefetchw.d: New file.
* gas/i386/x86-64-arch-2-prefetchw.d: Likewise.
* gas/i386/rdseed.s: Likewise.
* gas/i386/rdseed.d: Likewise.
* gas/i386/rdseed-intel.d: Likewise.
* gas/i386/adx.s: Likewise.
* gas/i386/adx.d: Likewise.
* gas/i386/adx-intel.d: Likewise.
* gas/i386/x86-64-rdseed.s: Likewise.
* gas/i386/x86-64-rdseed.d: Likewise.
* gas/i386/x86-64-rdseed-intel.d: Likewise.
* gas/i386/x86-64-adx.s: Likewise.
* gas/i386/x86-64-adx.d: Likewise.
* gas/i386/x86-64-adx-intel.d: Likewise.
opcodes/
* i386-dis.c (PREFIX_0F38F6): New.
(prefix_table): Add adcx, adox instructions.
(three_byte_table): Use PREFIX_0F38F6.
(mod_table): Add rdseed instruction.
* i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW.
(cpu_flags): Likewise.
* i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW.
(i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw.
* i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend
prefetchw.
* i386-tbl.h: Regenerate.
* i386-init.h: Likewise.
2012-07-16 12:58:29 +00:00
9fa0f14a97
gas/testsuite/
...
* gas/i386/rep-suffix.s: Add 'rep nop' case.
* gas/i386/x86-64-rep-suffix.s: Likewise.
* gas/i386/rep-suffix.d: Updated.
* gas/i386/x86-64-rep-suffix.d: Likewise.
* gas/i386/ilp32/x86-64-rep-suffix.d: Likewise.
opcodes/
* i386-opc.tbl: Add RepPrefixOk to nop.
* i386-tbl.h: Regenerate.
2012-07-02 18:12:28 +00:00
d628b0e133
Fix ChangeLog entry
2012-07-02 17:06:52 +00:00
7670492947
Move rep tests for bsf/bsr/ret to rep-suffix
...
* gas/i386/i386.exp: Don't run rep-bsf nor rep-ret.
* gas/i386/rep-bsf.d: Removed.
* gas/i386/rep-bsf.s: Likewise.
* gas/i386/rep-ret.d: Likewise.
* gas/i386/rep-ret.s: Likewise.
* gas/i386/rep-suffix.d: Updated.
* gas/i386/x86-64-rep-suffix.d: Likewise.
* gas/i386/ilp32/x86-64-rep-suffix.d: Likewise.
* gas/i386/rep-suffix.s: Add tests for bsf, bsr and ret.
* i386/x86-64-rep-suffix.s: Likewise.
2012-07-02 17:04:51 +00:00
f3aa805470
Add testcases for PR gas/14315
...
PR gas/14315
* gas/elf/common1.d: New file.
* gas/elf/common1.l: Likewise.
* gas/elf/common1.s: Likewise.
* gas/elf/common2.d: Likewise.
* gas/elf/common2.l: Likewise.
* gas/elf/common2.s: Likewise.
* gas/elf/elf.exp: Run common1 and common2.
2012-06-30 12:35:52 +00:00
b9e10fe0cc
* gas/lns/lns.exp (lns-common-1): Add crx to alt target list.
2012-06-29 07:04:49 +00:00
2b2f5df902
PR gas/14260
...
* config/tc-arm.c (encode_arm_addr_mode_common): Generate an error
message if literal pool addressing is used.
* gas/arm/ldr-t-bad.s: Add test of bogus use of literal pool
addressing.
* gas/arm/ldr-t-bad.l: Update expected assembler error message
output.
2012-06-28 15:38:15 +00:00
453dc3f010
* dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): Enable when using
...
linker relaxation.
(dwarf2_gen_line_info): Generate real, local, labels for line
numbers.
(dwarf2dbg_convert_frag): Do not finalize the computation of the
frag's symbol value when linker relaxation is enabled.
(ADDR_DELTA_LIMIT): Define.
(size_fixed_inc_line_addr): Use ADDR_DELTA_LIMIT.
(emit_fixed_inc_line_addr): Likewise.
* write.c (fixup_segment): If the subtraction of two symbols
cannot be resolved but is valid, then prevent bogus range warnings
by pre-biasing add_number.
* config/tc-h8300.h (DWARF2_USE_FIXED_ADVANCE_PC): Define to 0.
* gas/lns/lns.exp: Use alternate lns-common test for targets
enabling linker relaxation.
* gas/lns/lns-big-delta.d: Allow for output from architectures
with 32-bit addresses.
2012-06-28 11:31:14 +00:00
d7d20338d5
* gas/i386/rep-ret.s: Zero pad section.
...
* gas/i386/rep-ret.d: Update.
2012-06-27 01:17:11 +00:00
fe13e45b9a
gas/
...
* NEWS: Mention 'rep ret' too.
gas/testsuite/
* gas/i386/rep-ret.d: New file.
* gas/i386/rep-ret.s: New file.
* gas/i386/i386.exp: Add the new test.
opcodes/
* i386-opc.tbl: Add RepPrefixOk to ret.
* i386-tbl.h: Regenerate.
2012-06-22 21:54:06 +00:00
29c048b696
gas/
...
* config/tc-i386.c (parse_insn): Don't complain about REP prefix
when the template has opcode_modifier.repprefixok set.
* NEWS: Mention the change.
gas/testsuite/
* gas/i386/rep-bsf.d: New file.
* gas/i386/rep-bsf.s: New file.
* gas/i386/i386.exp: Add the new test.
opcodes/
* i386-opc.h (RepPrefixOk): New enum constant.
(i386_opcode_modifier): New bitfield 'repprefixok'.
* i386-gen.c (opcode_modifiers): Add RepPrefixOk.
* i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
instructions that have IsString.
* i386-tbl.h: Regenerate.
2012-06-22 16:42:08 +00:00
357d1bd8fd
Fix .dc.a for x32
...
gas/
* config/tc-i386.c (x86_address_bytes): New.
* config/tc-i386.h (TC_ADDRESS_BYTES): Likewise.
(x86_address_bytes): Likewise.
gas/testsuite/
* gas/i386/ilp32/x86-64-dc_a.d: New.
* gas/i386/ilp32/x86-64-dc_a.s: Likewise.
2012-06-13 21:41:07 +00:00
c7a8dbf91f
opcodes/
...
* ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx)
(iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx)
(lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls)
(stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst)
(dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep)
(dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls)
(stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x)
(tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx)
(stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0.
gas/testsuite/
* gas/ppc/e500mc.d: Update.
* gas/ppc/476.d: Update.
2012-06-11 08:20:43 +00:00
c22faadb1a
Move gas/all/rept.[ds] to gas/i386
...
* gas/all/gas.exp: Don't run rept.
* gas/all/rept.d: Moved to ...
* gas/i386/rept.d: Here.
* gas/all/rept.s: Moved to ...
* gas/i386/rept.s: Here.
* gas/i386/i386.exp: Run rept.
2012-06-07 14:52:42 +00:00
918e92bee9
Add a testcase for PR gas/14201
...
PR gas/14201
* gas/all/gas.exp: Run rept.
* gas/all/rept.d: New file.
* gas/all/rept.s: Likewise.
2012-06-07 13:47:14 +00:00
d416e51da0
gas/
...
* read.c [HANDLE_BUNDLE] (bundle_lock_depth): New variable.
(read_a_source_file) [HANDLE_BUNDLE]: Reset it.
[HANDLE_BUNDLE] (s_bundle_lock, s_bundle_unlock): Allow nested
pairs.
gas/testsuite/
* gas/i386/bundle-bad.s: Remove nested .bundle_lock case.
* gas/i386/bundle-bad.l: Remove expected error line.
* gas/i386/bundle-lock.s: Add nested .bundle_lock case.
* gas/i386/bundle-lock.d: Update expectations.
2012-05-29 16:32:11 +00:00
7bfd842d05
* read.c (read_symbol_name): New function. Reads a symbol names.
...
Allows escape codes in names.
(s_comm_internal): Use read_symbol_name.
(s_globl, s_lsym, s_set, s_weakref): Likewise.
* doc/as.texinfo: Document support for multibyte characters in
symbol names.
* gas/elf/syms.s: New test - checks the generation of multibyte
symbol names.
* gas/elf/syms.d: New file - expected readelf output.
* gas/elf/elf.exp: Add syms.
* readelf.c (print_symbol): Display multibyte characters in symbol
names.
(process_section_headers): Use print_symbol.
* ld-ifunc/ifunc-13a-i386.s: Fix use of .global directive.
* ld-ifunc/ifunc-15a-i385.s: Likewise.
2012-05-28 14:20:19 +00:00
16224acd5c
* gas/lns/lns-big-delta.s: Add nops.
...
* gas/lns/lns-big-delta.d: Update.
2012-05-24 15:36:33 +00:00
50c374809b
* gas/tic6x/unwind-1.d: Update for readelf changes.
...
* gas/tic6x/unwind-2.d: Likewise.
* gas/tic6x/unwind-3.d: Likewise.
2012-05-19 10:37:46 +00:00
046e56f784
Expect addend as signed
...
binutils/testsuite/
* binutils-all/hppa/objdump.exp: Expect addend as signed.
gas/testsuite/
* gas/all/weakref1.d: Expect addend as signed.
* gas/arm/pic_vxworks.d: Likewise.
* gas/arm/wince.d: Likewise.
* gas/h8300/h8300.exp: Likewise.
* gas/i386/sub.d: Likewise.
* gas/mips/ecoff@ld.d: Likewise.
* gas/mips/ecoff@sd.d: Likewise.
* gas/mips/l_d-n32.d: Likewise.
* gas/mips/l_d-n64.d: Likewise.
* gas/mips/l_d.d: Likewise.
* gas/mips/ld-n32.d: Likewise.
* gas/mips/ld-n64.d: Likewise.
* gas/mips/ld.d: Likewise.
* gas/mips/mips1@l_d.d: Likewise.
* gas/mips/mips1@ld-forward.d: Likewise.
* gas/mips/mips1@ld.d: Likewise.
* gas/mips/mips1@s_d.d: Likewise.
* gas/mips/s_d-n32.d: Likewise.
* gas/mips/s_d-n64.d: Likewise.
* gas/mips/s_d.d: Likewise.
* gas/mips/sd-n32.d: Likewise.
* gas/mips/sd-n64.d: Likewise.
* gas/mips/sd.d: Likewise.
* gas/mmix/bz-c.d: Likewise.
* gas/mmix/geta-c.d: Likewise.
* gas/mmix/jump-c.d: Likewise.
* gas/mmix/pushj-c.d: Likewise.
* gas/mmix/pushj-cs.d: Likewise.
* gas/mmix/reloc16-n.d: Likewise.
* gas/mmix/reloc16-r.d: Likewise.
* gas/mmix/reloc16.d: Likewise.
* gas/mmix/reloc8-r.d: Likewise.
* gas/mmix/reloc8.d: Likewise.
* gas/mmix/relocxrn.d: Likewise.
* gas/sh/sh64/case-1.d: Likewise.
* gas/sh/sh64/mix-1.d: Likewise.
* gas/sh/sh64/pt32-1.d: Likewise.
* gas/sh/sh64/pt64-1.d: Likewise.
* gas/sh/sh64/pt64-32-2.d: Likewise.
* gas/sh/sh64/rel32-2.d: Likewise.
* gas/sh/sh64/rel32-4.d: Likewise.
* gas/sh/sh64/rel64-2.d: Likewise.
* gas/sh/sh64/rel64-4.d: Likewise.
* gas/tic6x/data-reloc.d: Likewise.
* gas/tic6x/pcr-relocs.d: Likewise.
* gas/xstormy16/allinsn.d: Likewise.
* gas/xstormy16/reloc-1.d: Likewise.
* gas/xstormy16/reloc-2.d: Likewise.
ld/testsuite/
* ld-arm/emit-relocs1-vxworks.d: Expect addend as signed.
* ld-spu/pic.d: Likewise.
2012-05-17 16:36:22 +00:00
7282333f3d
binutils/
...
* dwarf.c (process_debug_info): Display abbrev offset in hex.
(display_debug_abbrev): Show offset of abbrev.
binutils/testsuite/
* binutils-all/objdump.W: Update.
* binutils-all/readelf.wa: Update.
* binutils-all/i386/compressed-1a.d: Update.
* binutils-all/x86-64/compressed-1a.d: Update.
gas/testsuite/
* gas/elf/dwarf2-1.d: Update.
* gas/elf/dwarf2-2.d: Update.
* gas/i386/dw2-compress-1.d: Update.
2012-05-17 10:00:37 +00:00
d9fa356624
* gas/ppc/vle.d: Pass -a32 to assembler.
...
* gas/ppc/vle-reloc.d: Likewise.
* gas/ppc/vle-simple-1.d: Likewise, also match wider addresses.
* gas/ppc/vle-simple-2.d: Likewise.
* gas/ppc/vle-simple-3.d: Likewise.
* gas/ppc/vle-simple-4.d: Likewise.
* gas/ppc/vle-simple-5.d: Likewise.
* gas/ppc/vle-simple-6.d: Likewise.
2012-05-17 07:03:20 +00:00
101af531fe
* arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
...
to PUSH/POP {reg}.
* binutils-all/arm/objdump.exp:
STMFD/LDMIA sp!, {reg} don't disassemble to PUSH/POP {reg} any longer.
* gas/arm/stm-ldm.d: STMFD/LDMIA sp!, {reg} don't disassemble to
PUSH/POP {reg} any longer. Some new test cases have been added as well.
* gas/arm/stm-ldm.s: Likewise.
2012-05-16 10:53:49 +00:00
6927f98292
* config/tc-m68hc11.c: Add S12X and XGATE co-processor support.
...
Add option to offset S12 addresses into XGATE memory space.
Tweak target flags to match other tools. (i.e. -m m68hc11).
* doc/as.texinfo: Mention new options.
* doc/c-m68hc11.texi: Document new options.
* NEWS: Mention new support.
* archures.c: Add bfd_arch_m9s12x and bfd_arch_m9s12xg.
* config.bfd: Likewise.
* cpu-m9s12x.c: New.
* cpu-m9s12xg.c: New.
* elf32-m68hc12.c: Add S12X and XGATE co-processor support.
Add option to offset S12 addresses into XGATE memory space.
Fix carry bug in IMM16 (IMM8 low/high) relocate.
* Makefile.am (ALL_MACHINES): Add cpu-m9s12x and cpu-m9s12xg.
(ALL_MACHINES_CFILES): Likewise.
* reloc.c: Add S12X relocs.
* Makefile.in: Regenerate.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* gas/m68hc11/insns9s12x.s: New
* gas/m68hc11/insns9s12x.d: New
* gas/m68hc11/hexprefix.s: New
* gas/m68hc11/hexprefix.d: New
* gas/m68hc11/9s12x-exg-sex-tfr.s: New
* gas/m68hc11/9s12x-exg-sex-tfr.d: New
* gas/m68hc11/insns9s12xg.s: New
* gas/m68hc11/insns9s12xg.d: New
* gas/m68hc11/9s12x-mov.s: New
* gas/m68hc11/9s12x-mov.d: New
* gas/m68hc11/m68hc11.exp: Updated
* gas/m68hc11/*.d: Brought in line with changed objdump output.
* gas/all/gas.exp: XFAIL all hc11/12 targets for redef2,3.
* gas/elf/elf.exp: XFAIL all hc11/12 targets for redef.
* gas/elf/dwarf2-1.d: Skip for hc11/12 targets.
* gas/elf/dwarf2-2.d: Likewise.
* ld-m68hc11/xgate-link.s: New.
* ld-m68hc11/xgate-link.d: New.
* ld-m68hc11/xgate-offset.s: New.
* ld-m68hc11/xgate-offset.d: New.
* ld-m68hc11/xgate1.s: New.
* ld-m68hc11/xgate1.d: New.
* ld-m68hc11/xgate2.s: New.
* ld-m68hc11/m68hc11.exp: Updated.
* ld-m68hc11/*.d: Brought in line with changed objdump output.
* ld-gc/gc.exp: Update CFLAGS for m68hc11.
* ld-plugin/plugin.exp: Likewise.
* ld-srec/srec.exp: XFAIL for m68hc11 and m68hc12.
* configure.in: Add S12X and XGATE co-processor support to m68hc11
target.
* disassemble.c: Likewise.
* configure: Regenerate.
* m68hc11-dis.c: Make objdump output more consistent, use hex
instead of decimal and use 0x prefix for hex.
* m68hc11-opc.c: Add S12X and XGATE opcodes.
* dis-asm.h (print_insn_m9s12x): Prototype.
(print_insn_m9s12xg): Prototype.
* m68hc11.h (R_M68HC12_16B, R_M68HC12_PCREL_9, R_M68HC12_PCREL_10)
R_M68HC12_HI8XG, R_M68HC12_LO8XG): New relocations.
(E_M68HC11_XGATE_RAMOFFSET): Define.
* m68hc11.h: Add XGate definitions.
(struct m68hc11_opcode): Add xg_mask field.
2012-05-15 12:55:51 +00:00
b9c361e0ad
Add support for PowerPC VLE.
...
2012-05-14 Catherine Moore <clm@codesourcery.com>
* NEWS: Mention PowerPC VLE port.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
Catherine Moore <clm@codesourcery.com>
bfd/
* bfd.c (bfd_lookup_section_flags): Add section parm.
* ecoff.c (bfd_debug_section): Remove flag_info initializer.
* elf-bfd.h (bfd_elf_section_data): Move in section_flag_info.
(bfd_elf_lookup_section_flags): Add section parm.
* elf32-ppc.c (is_ppc_vle): New function.
(ppc_elf_modify_segment_map): New function.
(elf_backend_modify_segment_map): Define.
(has_vle_insns): New define.
* elf32-ppc.h (ppc_elf_modify_segment_map): Declare.
* elflink.c (bfd_elf_lookup_section_flags): Add return value & parm.
Move in logic to omit / include a section.
* libbfd-in.h (bfd_link_info): Add section parm.
(bfd_generic_lookup_section_flags): Likewise.
* reloc.c (bfd_generic_lookup_section_flags): Likewise.
* section.c (bfd_section): Move out section_flag_info.
(BFD_FAKE_SECTION): Remove flag_info initializer.
* targets.c (_bfd_lookup_section_flags): Add section parm.
2012-05-14 Catherine Moore <clm@codesourcery.com>
bfd/
* archures.c (bfd_mach_ppc_vle): New.
* bfd-in2.h: Regenerated.
* cpu-powerpc.c (bfd_powerpc_archs): New entry for vle.
* elf32-ppc.c (split16_format_type): New enumeration.
(ppc_elf_vle_split16): New function.
(HOWTO): Add entries for R_PPC_VLE relocations.
(ppc_elf_reloc_type_lookup): Handle PPC_VLE relocations.
(ppc_elf_section_flags): New function.
(ppc_elf_lookup_section_flags): New function.
(ppc_elf_section_processing): New function.
(ppc_elf_check_relocs): Handle PPC_VLE relocations.
(ppc_elf_relocation_section): Likewise.
(elf_backend_lookup_section_flags_hook): Define.
(elf_backend_section_flags): Define.
(elf_backend_section_processing): Define.
* elf32-ppc.h (ppc_elf_section_processing): Declare.
* libbfd.h: Regenerated.
* reloc.c (BFD_RELOC_PPC_VLE_REL8, BFD_RELOC_PPC_VLE_REL15,
BFD_RELOC_PPC_VLE_REL24, BFD_RELOC_PPC_VLE_LO16A,
BFD_RELOC_PPC_VLE_LO16D, BFD_RELOC_PPC_VLE_HI16A,
BFD_RELOC_PPC_VLE_HI16D, BFD_RELOC_PPC_VLE_HA16A,
BFD_RELOC_PPC_VLE_HA16D, BFD_RELOC_PPC_VLE_SDA21,
BFD_RELOC_PPC_VLE_SDA21_LO, BFD_RELOC_PPC_VLE_SDAREL_LO16A,
BFD_RELOC_PPC_VLE_SDAREL_LO16D, BFD_RELOC_PPC_VLE_SDAREL_HI16A,
BFD_RELOC_PPC_VLE_SDAREL_HI16D, BFD_RELOC_PPC_VLE_SDAREL_HA16A,
BFD_RELOC_PPC_VLE_SDAREL_HA16D): New bfd relocations.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
gas/
* config/tc-ppc.c (insn_validate): New func of existing code to call..
(ppc_setup_opcodes): ..from 2 places here.
Revise for second (VLE) opcode table.
Add #ifdef'd code to print opcode tables.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
gas/
* config/tc-ppc.c (ppc_setup_opcodes): Allow out-of-order
for the VLE conditional branches.
2012-05-14 Catherine Moore <clm@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
Rhonda Wittels <rhonda@codesourcery.com>
gas/
* config/tc-ppc.c (PPC_VLE_SPLIT16A): New macro.
(PPC_VLE_SPLIT16D): New macro.
(PPC_VLE_LO16A): New macro.
(PPC_VLE_LO16D): New macro.
(PPC_VLE_HI16A): New macro.
(PPC_VLE_HI16D): New macro.
(PPC_VLE_HA16A): New macro.
(PPC_VLE_HA16D): New macro.
(PPC_APUINFO_VLE): New definition.
(md_chars_to_number): New function.
(md_parse_option): Check for combinations of little
endian and -mvle.
(md_show_usage): Document -mvle.
(ppc_arch): Recognize VLE.
(ppc_mach): Recognize bfd_mach_ppc_vle.
(ppc_setup_opcodes): Print the opcode table if
* config/tc-ppc.h (ppc_frag_check): Declare.
* doc/c-ppc.texi: Document -mvle.
* NEWS: Mention PowerPC VLE port.
2012-05-14 Catherine Moore <clm@codesourcery.com>
gas/
* config/tc-ppc.h (ppc_dw2_line_min_insn_length): Declare.
(DWARF2_LINE_MIN_INSN_LENGTH): Redefine.
* config/tc-ppc.c (ppc_dw2_line_min_insn_length): New.
* dwarf2dbg.c (scale_addr_delta): Handle values of 1
for DWARF2_LINE_MIN_INSN_LENGTH.
2012-05-14 Catherine Moore <clm@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
Rhonda Wittels <rhonda@codesourcery.com>
gas/testsuite/
* gas/ppc/ppc.exp: Run new tests.
* gas/ppc/vle-reloc.d: New test.
* gas/ppc/vle-reloc.s: New test.
* gas/ppc/vle-simple-1.d: New test.
* gas/ppc/vle-simple-1.s: New test.
* gas/ppc/vle-simple-2.d: New test.
* gas/ppc/vle-simple-2.s: New test.
* gas/ppc/vle-simple-3.d: New test.
* gas/ppc/vle-simple-3.s: New test.
* gas/ppc/vle-simple-4.d: New test.
* gas/ppc/vle-simple-4.s: New test.
* gas/ppc/vle-simple-5.d: New test.
* gas/ppc/vle-simple-5.s: New test.
* gas/ppc/vle-simple-6.d: New test.
* gas/ppc/vle-simple-6.s: New test.
* gas/ppc/vle.d: New test.
* gas/ppc/vle.s: New test.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
include/elf/
* ppc.h (SEC_PPC_VLE): Remove.
2012-05-14 Catherine Moore <clm@codesourcery.com>
James Lemke <jwlemke@codesourcery.com>
include/elf/
* ppc.h (R_PPC_VLE_REL8): New reloction.
(R_PPC_VLE_REL15): Likewise.
(R_PPC_VLE_REL24): Likewise.
(R_PPC_VLE_LO16A): Likewise.
(R_PPC_VLE_LO16D): Likewise.
(R_PPC_VLE_HI16A): Likewise.
(R_PPC_VLE_HI16D): Likewise.
(R_PPC_VLE_HA16A): Likewise.
(R_PPC_VLE_HA16D): Likewise.
(R_PPC_VLE_SDA21): Likewise.
(R_PPC_VLE_SDA21_LO): Likewise.
(R_PPC_VLE_SDAREL_LO16A): Likewise.
(R_PPC_VLE_SDAREL_LO16D): Likewise.
(R_PPC_VLE_SDAREL_HI16A): Likewise.
(R_PPC_VLE_SDAREL_HI16D): Likewise.
(R_PPC_VLE_SDAREL_HA16A): Likewise.
(R_PPC_VLE_SDAREL_HA16D): Likewise.
(SEC_PPC_VLE): Remove.
(PF_PPC_VLE): New program header flag.
(SHF_PPC_VLE): New section header flag.
(vle_opcodes, vle_num_opcodes): New.
(VLE_OP): New macro.
(VLE_OP_TO_SEG): New macro.
2012-05-14 Catherine Moore <clm@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
Rhonda Wittels <rhonda@codesourcery.com>
include/opcode/
* ppc.h (PPC_OPCODE_VLE): New definition.
(PPC_OP_SA): New macro.
(PPC_OP_SE_VLE): New macro.
(PPC_OP): Use a variable shift amount.
(powerpc_operand): Update comments.
(PPC_OPSHIFT_INV): New macro.
(PPC_OPERAND_CR): Replace with...
(PPC_OPERAND_CR_BIT): ...this and
(PPC_OPERAND_CR_REG): ...this.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
ld/
* ldlang.c (walk_wild_consider_section): Don't copy section_flag_list.
Pass it to callback.
(walk_wild_section_general): Pass section_flag_list to callback.
(lang_add_section): Add sflag_list parm.
Move out logic to keep / omit a section & call bfd_lookup_section_flags.
(output_section_callback_fast): Add sflag_list parm.
Add new parm to lang_add_section calls.
(output_section_callback): Likewise.
(check_section_callback): Add sflag_list parm.
(lang_place_orphans): Add new parm to lang_add_section calls.
(gc_section_callback): Add sflag_list parm.
(find_relro_section_callback): Likewise.
* ldlang.h (callback_t): Add flag_info parm.
(lang_add_section): Add sflag_list parm.
* emultempl/armelf.em (elf32_arm_add_stub_section):
Add lang_add_section parm.
* emultempl/beos.em (gld*_place_orphan): Likewise.
* emultempl/elf32.em (gld*_place_orphan): Likewise.
* emultempl/hppaelf.em (hppaelf_add_stub_section): Likewise.
* emultempl/m68hc1xelf.em (m68hc11elf_add_stub_section): Likewise.
* emultempl/mipself.em (mips_add_stub_section): Likewise.
* emultempl/mmo.em (mmo_place_orphan): Likewise.
* emultempl/pe.em (gld_*_place_orphan): Likewise.
* emultempl/pep.em (gld_*_place_orphan): Likewise.
* emultempl/ppc64elf.em (ppc_add_stub_section): Likewise.
* emultempl/spuelf.em (spu_place_special_section): Likewise.
* emultempl/vms.em (vms_place_orphan): Likewise.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
ld/testsuite/
* ld-powerpc/powerpc.exp: Create ppceabitests.
* ld-powerpc/vle-multiseg.s: New.
* ld-powerpc/vle-multiseg-1.d: New.
* ld-powerpc/vle-multiseg-1.ld: New.
* ld-powerpc/vle-multiseg-2.d: New.
* ld-powerpc/vle-multiseg-2.ld: New.
* ld-powerpc/vle-multiseg-3.d: New.
* ld-powerpc/vle-multiseg-3.ld: New.
* ld-powerpc/vle-multiseg-4.d: New.
* ld-powerpc/vle-multiseg-4.ld: New.
* ld-powerpc/vle-multiseg-5.d: New.
* ld-powerpc/vle-multiseg-5.ld: New.
* ld-powerpc/vle-multiseg-6.d: New.
* ld-powerpc/vle-multiseg-6.ld: New.
* ld-powerpc/vle-multiseg-6a.s: New.
* ld-powerpc/vle-multiseg-6b.s: New.
* ld-powerpc/vle-multiseg-6c.s: New.
* ld-powerpc/vle-multiseg-6d.s: New.
* ld-powerpc/powerpc.exp: Run new tests.
2012-05-14 Catherine Moore <clm@codesourcery.com>
ld/
* NEWS: Mention PowerPC VLE port.
2012-05-14 Catherine Moore <clm@codesourcery.com>
ld/testsuite/
* ld-powerpc/apuinfo.rd: Update for VLE.
* ld-powerpc/vle-reloc-1.d: New.
* ld-powerpc/vle-reloc-1.s: New.
* ld-powerpc/vle-reloc-2.d: New.
* ld-powerpc/vle-reloc-2.s: New.
* ld-powerpc/vle-reloc-3.d: New.
* ld-powerpc/vle-reloc-3.s: New.
* ld-powerpc/vle-reloc-def-1.s: New.
* ld-powerpc/vle-reloc-def-2.s: New.
* ld-powerpc/vle-reloc-def-3.s: New.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
opcodes/
* ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
(PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
(vle_opcd_indices): New array.
(lookup_vle): New function.
(disassemble_init_powerpc): Revise for second (VLE) opcode table.
(print_insn_powerpc): Likewise.
* ppc-opc.c: Likewise.
2012-05-14 Catherine Moore <clm@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
Rhonda Wittels <rhonda@codesourcery.com>
Nathan Froyd <froydnj@codesourcery.com>
opcodes/
* ppc-opc.c (insert_arx, extract_arx): New functions.
(insert_ary, extract_ary): New functions.
(insert_li20, extract_li20): New functions.
(insert_rx, extract_rx): New functions.
(insert_ry, extract_ry): New functions.
(insert_sci8, extract_sci8): New functions.
(insert_sci8n, extract_sci8n): New functions.
(insert_sd4h, extract_sd4h): New functions.
(insert_sd4w, extract_sd4w): New functions.
(insert_vlesi, extract_vlesi): New functions.
(insert_vlensi, extract_vlensi): New functions.
(insert_vleui, extract_vleui): New functions.
(insert_vleil, extract_vleil): New functions.
(BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
(BI16, BI32, BO32, B8): New.
(B15, B24, CRD32, CRS): New.
(CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
(DB, IMM20, RD, Rx, ARX, RY, RZ): New.
(ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
(SH6_MASK): Use PPC_OPSHIFT_INV.
(SI8, UI5, OIMM5, UI7, BO16): New.
(VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
(XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
(ALLOW8_SPRG): New.
(insert_sprg, extract_sprg): Check ALLOW8_SPRG.
(OPVUP, OPVUP_MASK OPVUP): New
(BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
(EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
(BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
(BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
(IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
(IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
(SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
(SE_IM5, SE_IM5_MASK): New.
(SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
(EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
(BO32DNZ, BO32DZ): New.
(NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
(PPCVLE): New.
(powerpc_opcodes): Add new VLE instructions. Update existing
instruction to include PPCVLE if supported.
* ppc-dis.c (ppc_opts): Add vle entry.
(get_powerpc_dialect): New function.
(powerpc_init_dialect): VLE support.
(print_insn_big_powerpc): Call get_powerpc_dialect.
(print_insn_little_powerpc): Likewise.
(operand_value_powerpc): Handle negative shift counts.
(print_insn_powerpc): Handle 2-byte instruction lengths.
2012-05-14 19:45:30 +00:00
27d799802a
Expect addend as signed
...
* gas/cris/rd-pic-1.d: Expect addend as signed.
* gas/cris/rd-tls-1.d: Likewise.
* gas/cris/rd-tls-2.d: Likewise.
2012-05-14 12:23:14 +00:00
343dbc36ff
Print addend as signed in objdump
...
binutils/
* objdump.c (disassemble_bytes): Print addend as signed.
(dump_reloc_set): Likewise.
gas/testsuite/
* gas/all/fwdexp.d: Expect addend as signed.
* gas/alpha/elf-reloc-1.d: Likewise.
* gas/i386/mixed-mode-reloc64.d: Likewise.
* gas/i386/reloc64.d: Likewise.
* gas/i386/ilp32/mixed-mode-reloc64.d: Expect addend as signed.
* gas/i386/ilp32/reloc64.d: Likewise.
* gas/ia64/pcrel.d: Likewise.
* gas/mips/branch-misc-2-64.d: Likewise.
* gas/mips/branch-misc-2pic-64.d: Likewise.
* gas/mips/branch-misc-4-64.d: Likewise.
* gas/mips/ldstla-n64-sym32.d: Likewise.
* gas/mips/micromips@branch-misc-2-64.d: Likewise.
* gas/mips/micromips@branch-misc-2pic-64.d: Likewise.
* gas/mips/micromips@branch-misc-4-64.d: Likewise.
* gas/mips/mips16-hilo-n32.d: Likewise.
* gas/ppc/astest.d: Likewise.
* gas/ppc/astest2.d: Likewise.
* gas/ppc/astest2_64.d: Likewise.
* gas/ppc/astest64.d: Likewise.
* gas/ppc/test1elf32.d: Likewise.
* gas/ppc/test1elf64.d: Likewise.
* gas/sparc/reloc64.d: Likewise.
2012-05-14 02:40:00 +00:00
9920b1ee65
Adjust testcases for readelf addend change
...
gas/testsuite/
* gas/mips/elf-rel10.d: Updated.
* gas/mips/elf-rel22.d: Likewise.
* gas/mmix/comment-1.d: Likewise.
ld/testsuite/
* ld-alpha/tlspic.rd: Updated.
* ld-powerpc/tlsso.r: Likewise.
* ld-powerpc/tlsso32.r: Likewise.
* ld-powerpc/vxworks1-lib.rd: Likewise.
* ld-s390/tlspic.rd: Likewise.
* ld-s390/tlspic_64.rd: Likewise.
* ld-sh/shared-1.d: Likewise.
* ld-sh/tlspic-2.d: Likewise.
* ld-sparc/tlssunnopic32.rd: Likewise.
* ld-sparc/tlssunnopic64.rd: Likewise.
* ld-sparc/tlssunpic32.rd: Likewise.
* ld-sparc/tlssunpic64.rd: Likewise.
2012-05-12 13:46:26 +00:00
56e63005cd
Remove x32 addend overflow for BFD_RELOC_64
...
gas/
* config/tc-i386.c (tc_gen_reloc): Remove x32 addend overflow
for BFD_RELOC_64.
gas/testsuite/
* gas/i386/ilp32/ilp32.exp: Don't run reloc64-inval.
* gas/i386/ilp32/reloc64.s: Add test for -4294967295 addend.
* gas/i386/ilp32/reloc64.d: Updated.
* gas/i386/ilp32/reloc64-inval.l: Removed.
* gas/i386/ilp32/reloc64-inval.s: Likewise.
2012-05-12 12:34:37 +00:00
8cf0d2dd21
Check 64-bit relocation addend overflow for x32
...
bfd/
* elf64-x86-64.c (elf_x86_64_relocate_section): Check addend
overflow for R_X86_64_RELATIVE64.
gas/
* config/tc-i386.c (tc_gen_reloc): Check x32 addend overflow
for BFD_RELOC_64.
gas/testsuite/
* gas/i386/ilp32/ilp32.exp: Run reloc64-inval.
* gas/i386/ilp32/reloc64.s: Add tests for ".quad".
* gas/i386/ilp32/reloc64.d: Updated.
* gas/i386/ilp32/reloc64-inval.l: New file.
* gas/i386/ilp32/reloc64-inval.s: Likewise.
ld/testsuite/
* ld-x86-64/ilp32-11.d: New file.
* ld-x86-64/ilp32-11.s: Likewise.
* ld-x86-64/x86-64.exp: Run ilp32-11.
2012-05-10 03:25:17 +00:00
4aee77982d
* lib/gas-defs.exp (run_dump_test): Don't set LC_ALL here.
2012-05-08 12:15:06 +00:00
35c011e316
2012-05-06 Arnold Metselaar <arnold_m@operamail.com>
...
* gas/z80/jr-forwf.s: New file, adapted from z8k version.
* gas/z80/jr-backf.s: Likewise.
* gas/z80/djnz-backf.s: Likewise.
* gas/z80/ill_op: New file, with illegal operand.
* gas/z80/z80.exp: Run new tests.
2012-05-06 10:56:25 +00:00
f6c1a2d592
Add support for Motorola XGATE embedded CPU
2012-05-03 13:12:08 +00:00
2e52845baf
Add support for sparc %cfr ASR register.
...
opcodes/
* sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
* sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
gas/
* config/tc-sparc.c (v9a_asr_table): Add 'cfr'.
gas/testsuite/
* gas/sparc/sparc.exp: Run cfr test.
* gas/sparc/cfr.s: New testcase.
* gas/sparc/cfr.d: Likewise.
2012-04-27 20:43:35 +00:00
58004e23c9
Add support for sparc pause instruction.
...
opcodes/
* sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
* sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
gas/
* config/tc-sparc.c (sparc_arch_table): Add HWCAP_PAUSE to sparc4,
v8pluse, v8plusv, v9e, and v9v.
(v9a_asr_table): Add 'pause'.
gas/testsuite/
* gas/sparc/sparc.exp: Run pause test.
* gas/sparc/pause.s: New testcase.
* gas/sparc/pause.d: Likewise.
2012-04-27 18:04:00 +00:00
698544e152
Add support for sparc compare-and-branch instructions.
...
opcodes/
* sparc-opc.c (CBCOND): New define.
(CBCOND_XCC): Likewise.
(cbcond): New helper macro.
(sparc_opcodes): Add compare-and-branch instructions.
gas/
* config/tc-sparc.c (sparc_arch_table): Add HWCAP_CBCOND to
sparc4, v8pluse, v8plusv, v9e, and v9v.
(sparc_ip): Handle R_SPARC_5 of immediate constants inline in
order to accomodate cbcond which otherwise would require two
relocations to be handled in a single instruction..
gas/testsuite/
* gas/sparc/cbcond.s: New file.
* gas/sparc/cbcond.d: New file.
* gas/sparc/sparc.exp: Run cbcond test.
2012-04-27 18:03:13 +00:00
6cda13266f
Add support for SPARC T4 crypto instructions.
...
include/opcode/
* sparc.h: Document new arg code' )' for crypto RS3
immediates.
opcodes/
* sparc-dis.c (print_insn_sparc): Handle ')'.
* sparc-opc.c (sparc_opcodes): Add crypto instructions.
gas/
* config/tc-sparc.c (sparc_ip): Likewise. Accept instruction
names containing "_".
(sparc_arch_table): Add sparc4, v8pluse, and v9e. Add crypto
hwcap masks to v8plusv and v9v.
gas/testsuite/
* gas/sparc/crypto.s: New file.
* gas/sparc/crypto.d: New file.
* gas/sparc/sparc.exp: Run crypto test.
2012-04-27 18:02:35 +00:00
2615994e91
Support R_SPARC_WDISP10 and R_SPARC_H34.
...
include/
* elf/sparc.h (R_SPARC_WDISP10): New reloc.
* opcode/sparc.h: Define '=' as generating R_SPARC_WDISP10.
opcodes/
* sparc-dis.c (X_DISP10): Define.
(print_insn_sparc): Handle '='.
bfd/
* reloc.c (BFD_RELOC_SPARC_H34, BFD_RELOC_SPARC_SIZE32,
BFD_RELOC_SPARC_SIZE64, BFD_RELOC_SPARC_WDISP10): New relocs.
* libbfd.h: Regenerate.
* bfd-in2.h: Likewise.
* elfxx-sparc.c (sparc_elf_wdisp10_reloc): New function.
(_bfd_sparc_elf_howto_table): Add entries for R_SPARC_H34,
R_SPARC_SIZE32, R_SPARC_64, and R_SPARC_WDISP10.
(_bfd_sparc_elf_reloc_type_lookup): Handle new relocs.
(_bfd_sparc_elf_check_relocs): Likewise.
(_bfd_sparc_elf_gc_sweep_hook): Likewise.
(_bfd_sparc_elf_relocate_section): Likewise.
gas/
* config/tc-sparc.c (sparc_ip): Handle '=', "%h34", "%l34", and
BFD_RELOC_SPARC_H34.
(md_apply_fix): Handle BFD_RELOC_SPARC_WDISP10 and BFD_RELOC_SPARC_H34.
(tc_gen_reloc): Likewise.
gas/testsuite/
* gas/sparc/reloc64.s: Add abs34 code model tests.
* gas/sparc/reloc64.d: Update.
elfcpp/
* sparc.h (R_SPARC_WDISP10): New relocation.
gold/
* sparc.cc (Reloc::wdisp10): New relocation method.
(Reloc::h34): Likewise.
(Target_sparc::Scan::check_non_pic): Handle R_SPARC_H34.
(Target_sparc::Scan::get_reference_flags): Handle R_SPARC_H34 and
R_SPARC_WDISP10.
(Target_sparc::Scan::local): Likewise.
(Target_sparc::Scan::global): Likewise.
(Target_sparc::Relocate::relocate): Likewise.
2012-04-12 16:26:06 +00:00
b38cadfb70
* elf32-arm.c (elf32_arm_nacl_plt0_entry, elf32_arm_nacl_plt_entry):
...
New variables.
(struct elf32_arm_link_hash_table): New member `nacl_p'.
(elf32_arm_link_hash_table_create): Initialize it.
(elf32_arm_nacl_link_hash_table_create): New function.
(arm_movw_immediate, arm_movt_immediate): New functions.
(elf32_arm_populate_plt_entry): Test HTAB->nacl_p.
(elf32_arm_finish_dynamic_sections): Likewise.
(elf32_arm_output_plt_map_1): Likewise.
(bfd_elf32_littlearm_nacl_vec, bfd_elf32_bigarm_nacl_vec):
New backend vector stanza.
(elf32_arm_nacl_modify_segment_map): New function.
* config.bfd: Handle arm-*-nacl*, armeb-*-nacl*.
* targets.c: Support bfd_elf32_{big,little}_nacl_vec.
* configure.in: Likewise.
(bfd_elf32_bigarm_nacl_vec): Add elf-nacl.lo here.
(bfd_elf32_littlearm_nacl_vec): Likewise.
(bfd_elf32_bigarm_vec, bfd_elf32_littlearm_vec): Likewise.
(bfd_elf32_bigarm_symbian_vec): Likewise.
(bfd_elf32_littlearm_symbian_vec): Likewise.
(bfd_elf32_bigarm_vxworks_vec): Likewise.
(bfd_elf32_littlearm_vxworks_vec): Likewise.
* configure: Regenerated.
* configure.tgt (arm-*-nacl*): Match it.
* config/te-nacl.h (FPU_DEFAULT, EABI_DEFAULT): Define.
(LOCAL_LABELS_DOLLAR): Define.
* config/tc-arm.c (elf32_arm_target_format) [TE_NACL]:
Use nacl format variants.
* gas/elf/elf.exp (run_elf_list_test): Treat arm-*-nacl* targets
as -armeabi.
* gas/arm/any-idiv.d: Match *-*-nacl* targets too.
* gas/arm/arch4t.d: Likewise.
* gas/arm/arch4t-eabi.d: Likewise.
* gas/arm/attr-any-armv4t.d: Likewise.
* gas/arm/attr-any-thumbv6.d: Likewise.
* gas/arm/attr-cpu-directive.d: Likewise.
* gas/arm/attr-default.d: Likewise.
* gas/arm/attr-march-all.d: Likewise.
* gas/arm/attr-march-armv1.d: Likewise.
* gas/arm/attr-march-armv2a.d: Likewise.
* gas/arm/attr-march-armv2.d: Likewise.
* gas/arm/attr-march-armv2s.d: Likewise.
* gas/arm/attr-march-armv3.d: Likewise.
* gas/arm/attr-march-armv3m.d: Likewise.
* gas/arm/attr-march-armv4.d: Likewise.
* gas/arm/attr-march-armv4t.d: Likewise.
* gas/arm/attr-march-armv4txm.d: Likewise.
* gas/arm/attr-march-armv4xm.d: Likewise.
* gas/arm/attr-march-armv5.d: Likewise.
* gas/arm/attr-march-armv5t.d: Likewise.
* gas/arm/attr-march-armv5te.d: Likewise.
* gas/arm/attr-march-armv5tej.d: Likewise.
* gas/arm/attr-march-armv5texp.d: Likewise.
* gas/arm/attr-march-armv5txm.d: Likewise.
* gas/arm/attr-march-armv6.d: Likewise.
* gas/arm/attr-march-armv6j.d: Likewise.
* gas/arm/attr-march-armv6k.d: Likewise.
* gas/arm/attr-march-armv6k+sec.d: Likewise.
* gas/arm/attr-march-armv6kt2.d: Likewise.
* gas/arm/attr-march-armv6-m.d: Likewise.
* gas/arm/attr-march-armv6-m+os.d: Likewise.
* gas/arm/attr-march-armv6s-m.d: Likewise.
* gas/arm/attr-march-armv6t2.d: Likewise.
* gas/arm/attr-march-armv6z.d: Likewise.
* gas/arm/attr-march-armv6zk.d: Likewise.
* gas/arm/attr-march-armv6zkt2.d: Likewise.
* gas/arm/attr-march-armv6zt2.d: Likewise.
* gas/arm/attr-march-armv7-a.d: Likewise.
* gas/arm/attr-march-armv7a.d: Likewise.
* gas/arm/attr-march-armv7-a+idiv.d: Likewise.
* gas/arm/attr-march-armv7-a+mp.d: Likewise.
* gas/arm/attr-march-armv7-a+sec.d: Likewise.
* gas/arm/attr-march-armv7-a+sec+virt.d: Likewise.
* gas/arm/attr-march-armv7-a+virt.d: Likewise.
* gas/arm/attr-march-armv7.d: Likewise.
* gas/arm/attr-march-armv7em.d: Likewise.
* gas/arm/attr-march-armv7-m.d: Likewise.
* gas/arm/attr-march-armv7m.d: Likewise.
* gas/arm/attr-march-armv7-r.d: Likewise.
* gas/arm/attr-march-armv7r.d: Likewise.
* gas/arm/attr-march-armv7-r+mp.d: Likewise.
* gas/arm/attr-march-iwmmxt2.d: Likewise.
* gas/arm/attr-march-iwmmxt.d: Likewise.
* gas/arm/attr-march-xscale.d: Likewise.
* gas/arm/attr-mcpu.d: Likewise.
* gas/arm/attr-mfpu-arm1020e.d: Likewise.
* gas/arm/attr-mfpu-arm1020t.d: Likewise.
* gas/arm/attr-mfpu-arm1136jf-s.d: Likewise.
* gas/arm/attr-mfpu-arm1136jfs.d: Likewise.
* gas/arm/attr-mfpu-arm7500fe.d: Likewise.
* gas/arm/attr-mfpu-fpa10.d: Likewise.
* gas/arm/attr-mfpu-fpa11.d: Likewise.
* gas/arm/attr-mfpu-fpa.d: Likewise.
* gas/arm/attr-mfpu-fpe2.d: Likewise.
* gas/arm/attr-mfpu-fpe3.d: Likewise.
* gas/arm/attr-mfpu-fpe.d: Likewise.
* gas/arm/attr-mfpu-maverick.d: Likewise.
* gas/arm/attr-mfpu-neon.d: Likewise.
* gas/arm/attr-mfpu-neon-fp16.d: Likewise.
* gas/arm/attr-mfpu-softfpa.d: Likewise.
* gas/arm/attr-mfpu-softvfp.d: Likewise.
* gas/arm/attr-mfpu-softvfp+vfp.d: Likewise.
* gas/arm/attr-mfpu-vfp10.d: Likewise.
* gas/arm/attr-mfpu-vfp10-r0.d: Likewise.
* gas/arm/attr-mfpu-vfp3.d: Likewise.
* gas/arm/attr-mfpu-vfp9.d: Likewise.
* gas/arm/attr-mfpu-vfp.d: Likewise.
* gas/arm/attr-mfpu-vfpv2.d: Likewise.
* gas/arm/attr-mfpu-vfpv3-d16.d: Likewise.
* gas/arm/attr-mfpu-vfpv3.d: Likewise.
* gas/arm/attr-mfpu-vfpv4-d16.d: Likewise.
* gas/arm/attr-mfpu-vfpv4.d: Likewise.
* gas/arm/attr-mfpu-vfpxd.d: Likewise.
* gas/arm/attr-names.d: Likewise.
* gas/arm/attr-order.d: Likewise.
* gas/arm/attr-override-cpu-directive.d: Likewise.
* gas/arm/attr-override-mcpu.d: Likewise.
* gas/arm/got_prel.d: Likewise.
* gas/arm/mapdir.d: Likewise.
* gas/arm/mapmisc.d: Likewise.
* gas/arm/mapsecs.d: Likewise.
* gas/arm/mapshort-eabi.d: Likewise.
* gas/arm/mapshort-elf.d: Likewise.
* gas/arm/mov-highregs-any.d: Likewise.
* gas/arm/mov-lowregs-any.d: Likewise.
* gas/arm/pr12198-1.d: Likewise.
* gas/arm/pr12198-2.d: Likewise.
* gas/arm/thumb.d: Likewise.
* gas/arm/thumb-eabi.d: Likewise.
* gas/arm/thumbrel.d: Likewise.
* configure.tgt (arm*-*-nacl*, arm*b-*-nacl*): Handle them.
* emulparams/armelf_nacl.sh: New file.
* emulparams/armelfb_nacl.sh: New file.
* Makefile.am (ALL_EMULATION_SOURCES): Add earmelf_nacl.c
and earmelfb_nacl.c here.
(earmelf_nacl.c, earmelfb_nacl.c): New targets.
* Makefile.in: Regenerated.
* ld-arm/arm-elf.exp (armelftests): Split out into ...
(armelftests_common, armelftests_nonacl): ... these two.
(armeabitests): Split out into ...
(armeabitests_common, armeabitests_nonacl): ... these two.
Omit _nonacl sets for arm*-*-nacl* targets.
* ld-arm/farcall-mix.d: Don't match exact addresses, only symbolic ones.
* ld-arm/farcall-mix2.d: Likewise.
* ld-arm/farcall-group.d: Likewise.
* ld-arm/tls-gdesc-got.d: Match variant file formats too.
Accept some variation in exact addresses.
* ld-arm/thumb2-b-interwork.d: Match variant file formats too.
Fix regexps not to care about exact addresses where not relevant.
* ld-arm/thumb2-bl-undefweak.d: Match any hex strings, not any
strings of particular exact lengths.
* ld-arm/thumb2-bl-undefweak1.d: Likewise.
* ld-arm/arm-app.r: Match variant file formats too.
* ld-arm/arm-app-abs32.r: Likewise.
* ld-arm/arm-lib.d: Likewise.
* ld-arm/arm-lib.r: Likewise.
* ld-arm/arm-static-app.r: Likewise.
* ld-arm/armv4-bx.d: Likewise.
* ld-arm/data-only-map.d: Likewise.
* ld-arm/group-relocs.d: Likewise.
* ld-arm/jump19.d: Likewise.
* ld-arm/reloc-boundaries.d: Likewise.
* ld-arm/thumb1-bl.d: Likewise.
* ld-arm/thumb2-bl.d: Likewise.
* ld-arm/tls-app.d: Likewise.
* ld-arm/tls-app.r: Likewise.
* ld-arm/tls-gdierelax.d: Likewise.
* ld-arm/tls-gdierelax2.d: Likewise.
* ld-arm/tls-gdlerelax.d: Likewise.
* ld-arm/tls-lib.d: Likewise.
* ld-arm/tls-lib.r: Likewise.
* ld-arm/tls-mixed.r: Likewise.
* ld-arm/vfp11-fix-none.d: Likewise.
* ld-arm/vfp11-fix-scalar.d: Likewise.
* ld-arm/vfp11-fix-vector.d: Likewise.
* ld-arm/arm-static-app.d: Likewise.
Fix regexps not to care about exact number of leading spaces.
* ld-arm/arm-app-abs32.d: Likewise.
* ld-arm/fix-arm1176-off.d: Likewise.
* ld-arm/fix-arm1176-on.d: Likewise.
* ld-arm/arm-elf.exp: Treat nacl targets like eabi targets.
2012-04-12 13:01:15 +00:00
465cb9fba7
oops - omitted from previous delta
2012-04-12 07:47:36 +00:00
6530b175a1
* config/tc-arm.c (only_one_reg_in_list): New function.
...
(encode_ldmstm): Ditto.
(do_ldmstm): Use a different encoding when pushing or poping
a single register.
(A_COND_MASK): New macro.
(A_PUSH_POP_OP_MASK): Ditto.
(A1_OPCODE_PUSH): Ditto.
(A2_OPCODE_PUSH): Ditto.
(A2_OPCODE_POP): Ditto.
* gas/arm/push-pop.d: New testcase.
* gas/arm/push-pop.s: Ditto.
* gas/arm/stm-ldm.d: Ditto.
* gas/arm/stm-ldm.s: Ditto.
2012-04-12 07:46:54 +00:00
be16f58925
gas/testsuite/
...
* gas/all/gas.exp: Sparc can handle BFD_RELOC_8 for constants.
ld/testsuite/
* ld-sparc/tlssunbin32.rd: Fix regexp.
* ld-sparc/tlssunbin64.rd: Likewise.
2012-04-07 14:16:35 +00:00
5a68afcf73
bfd/
...
2012-04-03 Roland McGrath <mcgrathr@google.com>
* elf-nacl.c: New file.
* elf-nacl.h: New file.
* elf32-i386.c (elf_backend_modify_segment_map): Define for
bfd_elf32_i386_nacl_vec.
(elf_backend_modify_program_headers): Likewise.
* elf64-x86-64.c (elf_backend_modify_segment_map): Define for
bfd_elf64_x86_64_nacl_vec and bfd_elf32_x86_64_nacl_vec.
(elf_backend_modify_program_headers): Likewise.
* Makefile.am (BFD32_BACKENDS, BFD64_BACKENDS): Add elf-nacl.lo here.
(BFD32_BACKENDS_CFILES, BFD64_BACKENDS_CFILES): Add elf-nacl.c here.
* Makefile.in: Regenerated.
* configure.in (bfd_elf64_x86_64_nacl_vec): Add elf-nacl.o to tb here.
(bfd_elf32_x86_64_nacl_vec): Likewise.
(bfd_elf64_x86_64_vec, bfd_elf32_x86_64_vec): Likewise.
(bfd_elf64_x86_64_freebsd_vec, bfd_elf64_x86_64_sol2_vec): Likewise.
(bfd_elf64_l1om_vec, bfd_elf64_l1om_freebsd_vec): Likewise.
(bfd_elf64_k1om_vec, bfd_elf64_k1om_freebsd_vec): Likewise.
(bfd_elf32_i386_nacl_vec): Likewise.
(bfd_elf32_i386_sol2_vec, bfd_elf32_i386_freebsd_vec): Likewise.
(bfd_elf32_i386_vxworks_vec, bfd_elf32_i386_vec): Likewise.
* configure: Regenerated.
binutils/testsuite/
2012-04-03 Roland McGrath <mcgrathr@google.com>
* lib/binutils-common.exp (is_elf_format): Consider *-*-nacl* to
be ELF too.
* binutils-all/elfedit-4.d: Add "#as: --64" option.
* binutils-all/i386/i386.exp: Accept nacl targets too.
* binutils-all/x86-64/x86-64.exp: Likewise.
gas/testsuite/
2012-04-03 Roland McGrath <mcgrathr@google.com>
* gas/i386/k1om.d: Add not-target match for *-*-nacl*.
* gas/i386/l1om.d: Likewise.
ld/
2012-04-03 Roland McGrath <mcgrathr@google.com>
* configure.tgt (i[3-7]86-*-nacl*, x86_64-*-nacl*): Handle them.
* emulparams/elf_nacl.sh: New file.
* emulparams/elf_i386_nacl.sh: New file.
* emulparams/elf32_x86_64_nacl.sh: New file.
* emulparams/elf_x86_64_nacl.sh: New file.
* Makefile.am (ALL_EMULATION_SOURCES): Add eelf_i386_nacl.c here.
(ALL_64_EMULATION_SOURCES): Add eelf32_x86_64_nacl.c and
eelf_x86_64_nacl.c here.
(eelf_i386_nacl.c, eelf32_x86_64_nacl.c, eelf_x86_64_nacl.c):
New targets.
* Makefile.in: Regenerated.
* scripttempl/elf.sc: Handle SEPARATE_CODE cases.
ld/testsuite/
2012-04-03 Roland McGrath <mcgrathr@google.com>
* ld-x86-64/ilp32-4-nacl.d: New file.
* ld-x86-64/x86-64.exp: Run it.
* ld-discard/discard.exp: Accept nacl targets too.
* ld-elf/binutils.exp: Likewise.
* ld-elf/comm-data.exp: Likewise.
* ld-elf/elf.exp: Likewise.
* ld-elf/tls_common.exp: Likewise.
* ld-elfvers/vers.exp: Likewise.
* ld-elfvsb/elfvsb.exp: Likewise.
* ld-elfweak/elfweak.exp: Likewise.
* ld-gc/gc.exp: Likewise.
* ld-ifunc/binutils.exp: Likewise.
* ld-ifunc/ifunc.exp: Likewise.
* ld-linkonce/linkonce.exp:Likewise.
* ld-pie/pie.exp: Likewise.
* ld-shared/shared.exp: Likewise.
* ld-undefined/weak-undef.exp: Likewise.
* ld-unique/unique.exp: Likewise.
* ld-x86-64/dwarfreloc.exp: Likewise.
* ld-x86-64/line.exp: Likewise.
* lib/ld-lib.exp (slurp_options): Support global array
options_regsub to apply substitutions to the contents
of options lines read from the file.
* ld-i386/emit-relocs.d: Renamed to ...
* ld-i386/emit-relocs.rd: ... this.
* ld-i386/i386.exp: Accept nacl targets too.
For them, use options_regsub to replace elf_i386 with
elf_i386_nacl in run_dump_test cases; apply the same
substitution in $i386tests; replace foo.rd expectations
files with foo-nacl.rd in $i386tests.
(i386tests): Change emit-relocs.d to emit-relocs.rd here.
* ld-i386/emit-relocs-nacl.rd: New file.
* ld-i386/plt-nacl.pd: New file.
* ld-i386/plt-pic-nacl.pd: New file.
* ld-i386/tlsbin-nacl.rd: New file.
* ld-i386/tlsbindesc-nacl.rd: New file.
* ld-i386/tlsdesc-nacl.rd: New file.
* ld-i386/tlsgdesc-nacl.rd: New file.
* ld-i386/tlsnopic-nacl.rd: New file.
* ld-i386/tlspic-nacl.rd: New file.
* ld-x86-64/x86-64.exp: Accept nacl targets too.
For them, use options_regsub to replace elf_x86_64 with
elf_x86_64_nacl in run_dump_test cases; apply the same
substitution in $x86_64tests; replace foo.rd expectations
files with foo-nacl.rd in $x86_64tests.
Add explicit -melf_x86_64 to ld options in tests that need it,
in case the default emulation is x32 (as it is for x86_64-nacl).
* ld/testsuite/ld-x86-64/plt-nacl.pd: New file.
* ld/testsuite/ld-x86-64/split-by-file-nacl.rd: New file.
* ld/testsuite/ld-x86-64/tlsbin-nacl.rd: New file.
* ld/testsuite/ld-x86-64/tlsbindesc-nacl.rd: New file.
* ld/testsuite/ld-x86-64/tlsdesc-nacl.pd: New file.
* ld/testsuite/ld-x86-64/tlsdesc-nacl.rd: New file.
* ld/testsuite/ld-x86-64/tlsgdesc-nacl.rd: New file.
* ld/testsuite/ld-x86-64/tlspic-nacl.rd: New file.
* ld-i386/hidden2.d: Loosen regexps to match any file format variant,
and not to depend on exact addresses, displacements, etc. where
they are irrelevant.
* ld-i386/pcrel16.d: Likewise.
* ld-i386/pcrel16abs.d: Likewise.
* ld-i386/pr12718.d: Likewise.
* ld-i386/pr12921.d: Likewise.
* ld-i386/reloc.d: Likewise.
* ld-i386/tlsbin.dd: Likewise.
* ld-i386/tlsbin.sd: Likewise.
* ld-i386/tlsbin.td: Likewise.
* ld-i386/tlsbindesc.dd: Likewise.
* ld-i386/tlsbindesc.sd: Likewise.
* ld-i386/tlsbindesc.td: Likewise.
* ld-i386/tlsdesc.dd: Likewise.
* ld-i386/tlsdesc.sd: Likewise.
* ld-i386/tlsdesc.td: Likewise.
* ld-i386/tlsg.sd: Likewise.
* ld-i386/tlsgdesc.dd: Likewise.
* ld-i386/tlsindntpoff.dd: Likewise.
* ld-i386/tlsnopic.dd: Likewise.
* ld-i386/tlsnopic.sd: Likewise.
* ld-i386/tlspic.dd: Likewise.
* ld-i386/tlspic.sd: Likewise.
* ld-i386/tlspic.td: Likewise.
* ld-i386/tlspie2.d: Likewise.
* ld-x86-64/hidden2.d: Likewise.
* ld-x86-64/pcrel16.d: Likewise.
* ld-x86-64/pr12718.d: Likewise.
* ld-x86-64/pr12921.d: Likewise.
* ld-x86-64/protected3.d: Likewise.
* ld-x86-64/tlsbin.dd: Likewise.
* ld-x86-64/tlsbin.sd: Likewise.
* ld-x86-64/tlsbin.td: Likewise.
* ld-x86-64/tlsbindesc.dd: Likewise.
* ld-x86-64/tlsbindesc.sd: Likewise.
* ld-x86-64/tlsbindesc.td: Likewise.
* ld-x86-64/tlsdesc.dd: Likewise.
* ld-x86-64/tlsdesc.sd: Likewise.
* ld-x86-64/tlsdesc.td: Likewise.
* ld-x86-64/tlsg.sd: Likewise.
* ld-x86-64/tlsgd5.dd: Likewise.
* ld-x86-64/tlsgd6.dd: Likewise.
* ld-x86-64/tlsgdesc.dd: Likewise.
* ld-x86-64/tlspic.dd: Likewise.
* ld-x86-64/tlspic.sd: Likewise.
* ld-x86-64/tlspic.td: Likewise.
* ld-x86-64/ilp32-8.d: Match any file format variant.
Use a -Ttext and adjust expected results, to handle variant layouts.
* ld-x86-64/ilp32-9.d: Likewise.
* ld-i386/alloc.t: Remove superfluous OUTPUT_FORMAT statement.
* ld-i386/pr12627.t: Likewise.
* ld-x86-64/abs-l1om.d: Add target: constraint.
* ld-x86-64/protected2-l1om.d: Likewise.
* ld-x86-64/protected3-l1om.d: Likewise.
* ld-x86-64/ilp32-4.d: Likewise.
* ld-x86-64/plt.s: New file.
* ld-x86-64/pltlib.s: New file.
* ld-x86-64/plt.pd: New file.
* ld-x86-64/x86-64.exp (x86_64tests): Add them.
* ld-i386/plt.s: New file.
* ld-i386/pltlib.s: New file.
* ld-i386/plt.pd: New file.
* ld-i386/plt-pic.s: New file.
* ld-i386/plt-pic.pd: New file.
* ld-i386/i386.exp (i386tests): Add them.
2012-04-03 16:01:38 +00:00
b1c0804b2e
* config/rx-parse.y: IMM->IMM_, take an extra parameter for the
...
transfer size.
(IMM): New, call IMM_ with the default 32.
(IMMW,IMMB): Likewise, for 16 and 8.
(NIMM, MBIMM): Add size parameter.
(immediate): Likewise. Allow 32768..65535 for 16-bit transfers.
(MOV.W): Use IMMW instead of IMM.
* config/rx-parse.y (ADC,SBB): ADC and SBB only allow .L.
(op_dp20_rm_l): New.
(op_dp20_rim_l): New.
* config/rx-parse.y (op_dp20_rms): Rename to op_dp20_rr, don't allow mem.
(ABS, NEG, NOT): These only take REG or REG,REG (rr, not rms).
* gas/rx/mov.d: Update patterns for fixed MOV.W encoding.
2012-04-03 03:01:57 +00:00
7465e07a57
* config/tc-arm.c (do_vmrs): Accept priviledged mode VFP system
...
registers.
(do_vmsr): Likewise.
(arm_opcode_insns): Do not default to using the FPSCR register in
the VMRS and VMSR registers.
* gas/arm/vfp1xD.s: Add tests of the VMSR ad VMRS instructions in
priviledged modes.
* gas/arm/vfp1xD.d: Update expected output.
2012-03-20 11:55:07 +00:00
692392805b
* gas/config/tc-arm.c (aeabi_set_public_attributes): Correct
...
handling of Tag_DIV_use.
* gas/testsuite/gas/testsuite/gas/arm/any-idiv.d: New testcase.
* gas/testsuite/gas/testsuite/gas/arm/any-idiv.s: Likewise.
* gas/testsuite/gas/arm/attr-any-armv4t.d: Update expected output.
* gas/testsuite/gas/arm/attr-any-thumbv6.d: Likewise.
* gas/testsuite/gas/arm/attr-cpu-directive.d: Likewise.
* gas/testsuite/gas/arm/attr-default.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv1.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv2.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv2a.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv2s.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv3.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv3m.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv4.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv4t.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv4txm.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv4xm.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv5.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv5t.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv5te.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv5tej.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv5texp.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv5txm.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6-m+os.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6-m.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6j.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6k+sec.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6k.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6kt2.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6s-m.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6t2.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6z.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6zk.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6zkt2.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6zt2.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv7-a+mp.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv7-a+sec.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv7-a.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv7.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv7a.d: Likewise.
* gas/testsuite/gas/arm/attr-march-iwmmxt.d: Likewise.
* gas/testsuite/gas/arm/attr-march-iwmmxt2.d: Likewise.
* gas/testsuite/gas/arm/attr-march-xscale.d: Likewise.
* gas/testsuite/gas/arm/attr-mcpu.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-arm1020e.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-arm1020t.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-arm1136jf-s.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-arm1136jfs.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-arm7500fe.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-fpa.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-fpa10.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-fpa11.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-fpe.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-fpe2.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-fpe3.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-maverick.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-neon-fp16.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-neon.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-softfpa.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-softvfp+vfp.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-softvfp.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfp.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfp10-r0.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfp10.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfp3.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfp9.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfpv2.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfpv3-d16.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfpv3.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfpv4-d16.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfpv4.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfpxd.d: Likewise.
* gas/testsuite/gas/arm/attr-order.d: Likewise.
* gas/testsuite/gas/arm/attr-override-cpu-directive.d: Likewise.
* gas/testsuite/gas/arm/attr-override-mcpu.d: Likewise.
* gas/testsuite/gas/arm/eabi_attr_1.d: Likewise.
* gas/testsuite/gas/arm/mov-highregs-any.d: Likewise.
* gas/testsuite/gas/arm/mov-lowregs-any.d: Likewise.
* gas/testsuite/gas/arm/pr12198-1.d: Likewise.
* gas/testsuite/gas/arm/pr12198-2.d: Likewise.
* ld/testsuite/ld-arm/arm-elf.exp: Add new testcases.
* ld/testsuite/ld-arm/attr-merge-2.attr: Update ouput.
* ld/testsuite/ld-arm/attr-merge-2a.s: Remove Tag_DIV_use test.
* ld/testsuite/ld-arm/attr-merge-2b.s: Likewise.
* ld/testsuite/ld-arm/attr-merge-3.attr: Updated expected output.
* ld/testsuite/ld-arm/attr-merge-4.attr: Likewise.
* ld/testsuite/ld-arm/attr-merge-5.attr: Likewise.
* ld/testsuite/ld-arm/attr-merge-6.attr: Likewise.
* ld/testsuite/ld-arm/attr-merge-7.attr: Likewise.
* ld/testsuite/ld-arm/attr-merge-arch-1.attr: Likewise.
* ld/testsuite/ld-arm/attr-merge-arch-2.attr: Likewise.
* ld/testsuite/ld-arm/attr-merge-unknown-2.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-unknown-2r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-unknown-3.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-1.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-1r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-2.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-2r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-3.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-3r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-4.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-4r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-5.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-5r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-6.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-6r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-00-nowarn.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-00.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-02-nowarn.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-02.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-04-nowarn.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-04.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-20-nowarn.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-20.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-22-nowarn.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-22.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-24-nowarn.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-40-nowarn.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-40.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-42-nowarn.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-44-nowarn.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-44.d: Likewise.
* ld/testsuite/ld-arm/attr-merge.attr: Likewise.
* ld/testsuite/ld-arm/attr-merge-div-0.s: New testcase.
* ld/testsuite/ld-arm/attr-merge-div-00.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-div-01-m3.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-div-01.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-div-02.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-div-1.s: Likewise.
* ld/testsuite/ld-arm/attr-merge-div-10-m3.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-div-10.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-div-11.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-div-12.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-div-120.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-div-2.s: Likewise.
* ld/testsuite/ld-arm/attr-merge-div-20.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-div-21.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-div-22.d: Likewise.
2012-03-16 14:02:33 +00:00
57b99c84f9
* gas/i386/bundle-lock.d: Ignore trailing nops.
...
* gas/i386/bundle.d: Likewise.
* gas/i386/x86-64-bundle.d: Likewise.
2012-03-15 01:36:29 +00:00
8d3eaee676
Fix up last commit.
2012-03-13 17:01:34 +00:00
fa94de6b5c
gas/
...
2012-03-12 Roland McGrath <mcgrathr@google.com>
* config/tc-arm.c (arm_frag_max_var): New function.
* config/tc-arm.h: Declare it.
(md_frag_max_var): New macro.
* config/tc-i386.c (i386_frag_max_var): New function.
* config/tc-i386.h: Declare it.
(md_frag_max_var): New macro.
* doc/as.texinfo (Bundle directives): New node.
(Pseudo Ops): Add it to the menu.
* NEWS: Mention new feature.
* read.c [md_frag_max_var] (HANDLE_BUNDLE): New macro.
[HANDLE_BUNDLE] (bundle_align_p2): New variable.
[HANDLE_BUNDLE] (bundle_lock_frchain, bundle_lock_frag): New variables.
[HANDLE_BUNDLE] (start_bundle, pending_bundle_size, finish_bundle):
New functions.
(assemble_one): New function if [HANDLE_BUNDLE], #define directly
to md_assembly if not.
(read_a_source_file): Call assemble_one in place of md_assemble.
(read_a_source_file) [HANDLE_BUNDLE]: Check for unterminated
.bundle_lock at end of processing.
[HANDLE_BUNDLE] (s_bundle_align_mode, s_bundle_lock, s_bundle_unlock):
New functions.
[HANDLE_BUNDLE] (potable): Add their entries.
* read.h: Declare new functions.
gas/testsuite/
2012-03-12 Roland McGrath <mcgrathr@google.com>
* gas/i386/bundle-bad.s: New file.
* gas/i386/bundle-bad.d: New file.
* gas/i386/bundle-bad.l: New file.
* gas/i386/i386.exp: Run it.
* gas/arm/bundle.s: New file.
* gas/arm/bundle.d: New file.
* gas/arm/bundle-lock.s: New file.
* gas/arm/bundle-lock.d: New file.
* gas/i386/bundle.s: New file.
* gas/i386/bundle.d: New file.
* gas/i386/x86-64-bundle.s: New file.
* gas/i386/x86-64-bundle.d: New file.
* gas/i386/bundle-lock.s: New file.
* gas/i386/bundle-lock.d: New file.
* gas/i386/i386.exp: Run them.
2012-03-13 16:59:57 +00:00
aea77599d0
include/opcode/
...
* ppc.h: Add PPC_OPCODE_ALTIVEC2, PPC_OPCODE_E6500, PPC_OPCODE_TMR.
opcodes/
* ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
* ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
(PPCVEC2, PPCTMR, E6500): New short names.
(powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
optional operands on sync instruction for E6500 target.
bfd/
* archures.c: Add bfd_mach_ppc_e5500 and bfd_mach_ppc_e6500.
* bfd-in2.h: Regenerate.
* cpu-powerpc.c (bfd_powerpc_archs): Add entryies for
bfd_mach_ppc_e5500 and bfd_mach_ppc_e6500.
gas/
* config/tc-ppc.c (md_show_usage): Document -me5500 and -me6500.
(ppc_handle_align): Add termination nop opcode for e500mc family.
* doc/as.texinfo: Document options -me5500 and -me6500.
* doc/c-ppc.texi: Likewise.
gas/testsuite/
* gas/ppc/e500mc64_nop.s: New test case for e500mc family
termination nops.
* gas/ppc/e500mc64_nop.d: Likewise.
* gas/ppc/e5500_nop.s: Likewise.
* gas/ppc/e5500_nop.d: Likewise.
* gas/ppc/e6500_nop.s: Likewise.
* gas/ppc/e6500_nop.d: Likewise.
* gas/ppc/e6500.s: New.
* gas/ppc/e6500.d: Likewise.
* gas/ppc/ppc.exp: Run e6500, e500mc64_nop, e5500_nop, and e6500_nop.
2012-03-09 23:39:06 +00:00
5333187ab1
2012-03-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
...
* s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
2012-03-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* gas/s390/esa-g5.d: Move length field to the second operand.
* gas/s390/esa-g5.s: Likewise.
2012-03-08 17:22:18 +00:00
516e75beac
* gas/elf/bad-group.s: Add section attributes.
...
* gas/elf/elf.exp (groupautoa, groupautob): Don't run for hppa64-hpux.
(ifunc-1, type): Don't run for hpux.
* gas/elf/type-noifunc.e: Accept ANSI_COM.
* gas/elf/section7.s: Always have whitespace before directives.
* gas/elf/warn-2.s: Likewise.
* gas/i386/ifunc-3.s: Move .size directive.
2012-02-14 01:01:30 +00:00
cec7aa6aca
revert premature delta
2012-02-13 04:10:56 +00:00
017761eafe
* gas/all/gas.exp (redef2): xfail m6811 and m6812.
...
* gas/elf/elf.exp: Use is_elf_format.
* gas/symver/symver.exp: Likewise.
* gas/m68hc11/m68hc11.exp: Simplify target test.
Add -m68hc11 to error tests that pass for hc12.
2012-02-13 02:31:18 +00:00
fd08dafa65
* gas/i386/disp32.d: Adjust lable-pattern.
2012-02-11 15:12:56 +00:00
97298d2971
* gas/i386/x86-64-disp32.d: Fix lable-pattern.
2012-02-08 18:46:11 +00:00
42164a7195
Implement Intel Transactional Synchronization Extensions
...
gas/
2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (HLE_PREFIX): New.
(check_hle): Likewise.
(_i386_insn): Add have_hle.
(cpu_arch): Add .hle and .rtm.
(md_assemble): Call check_hle if i.have_hle isn't zero.
(parse_insn): Set i.have_hle to 1 for HLE prefix.
(output_jump): Support up to 2 byte opcode.
* doc/c-i386.texi: Document hle/.hle and rtm/.rtm.
gas/testsuite/
2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/hle-intel.d: New.
* gas/i386/hle.d: Likewise.
* gas/i386/hle.s: Likewise.
* gas/i386/hlebad.l: Likewise.
* gas/i386/hlebad.s: Likewise.
* gas/i386/rtm-intel.d: Likewise.
* gas/i386/rtm.d: Likewise.
* gas/i386/rtm.s: Likewise.
* gas/i386/x86-64-hle-intel.d: Likewise.
* gas/i386/x86-64-hle.d: Likewise.
* gas/i386/x86-64-hle.s: Likewise.
* gas/i386/x86-64-hlebad.l: Likewise.
* gas/i386/x86-64-hlebad.s: Likewise.
* gas/i386/x86-64-rtm-intel.d: Likewise.
* gas/i386/x86-64-rtm.d: Likewise.
* gas/i386/x86-64-rtm.s: Likewise.
* gas/i386/i386.exp: Run hle, hle-intel, hlebad x86-64-hle, rtm,
rtm-intel, x86-64-hle-intel, x86-64-hlebad, x86-64-rtm and
x86-64-rtm-intel.
include/opcode/
2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (XACQUIRE_PREFIX_OPCODE): New.
(XRELEASE_PREFIX_OPCODE): Likewise.
opcodes/
2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (HLE_Fixup1): New.
(HLE_Fixup2): Likewise.
(HLE_Fixup3): Likewise.
(Ebh1): Likewise.
(Evh1): Likewise.
(Ebh2): Likewise.
(Evh2): Likewise.
(Ebh3): Likewise.
(Evh3): Likewise.
(MOD_C6_REG_7): Likewise.
(MOD_C7_REG_7): Likewise.
(RM_C6_REG_7): Likewise.
(RM_C7_REG_7): Likewise.
(XACQUIRE_PREFIX): Likewise.
(XRELEASE_PREFIX): Likewise.
(dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
Ebh2/Evh2 on xchg. Use Ebh3/Evh3 on mov.
(reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
not, or, sbb, sub and xor. Use Ebh3/Evh3 on mov. Use
MOD_C6_REG_7 and MOD_C7_REG_7.
(mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
(rm_table): Add RM_C6_REG_7 and RM_C7_REG_7. Add xend and
xtest.
(prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
(CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
* i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
CPU_RTM_FLAGS.
(cpu_flags): Add CpuHLE and CpuRTM.
(opcode_modifiers): Add HLEPrefixOk.
* i386-opc.h (CpuHLE): New.
(CpuRTM): Likewise.
(HLEPrefixOk): Likewise.
(i386_cpu_flags): Add cpuhle and cpurtm.
(i386_opcode_modifier): Add hleprefixok.
* i386-opc.tbl: Add HLEPrefixOk=3 to mov. Add HLEPrefixOk to
add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
sbb, sub, xor and xadd. Add HLEPrefixOk=2 to xchg with memory
operand. Add xacquire, xrelease, xabort, xbegin, xend and
xtest.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2012-02-08 18:20:41 +00:00
a501d77eeb
Add .d8 suffix support to x86 assembler
...
gas/
2012-01-20 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (_i386_insn): Replace disp32_encoding with
disp_encoding.
(md_assemble): Updated.
(output_branch): Likewise.
(parse_insn): Support .d8 suffix.
(build_modrm_byte): Fake zero displacement for .d8 and .d32
suffixes.
* doc/c-i386.texi: Document .d8 suffix.
gas/testsuite/
2012-01-20 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/disp32.s: Add tests for .d8 suffix.
* gas/i386/x86-64-disp32.s: Likewise.
* gas/i386/disp32.d: Updated.
* gas/i386/x86-64-disp32.d: Likewise.
2012-01-20 20:53:50 +00:00
e143d25c73
* gas/testsuite/gas/m68k/pmove.s, gas/testsuite/gas/m68k/pmove.d: New test.
...
* gas/testsuite/gas/m68k/all.exp: Run it.
* opcodes/m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
register and move them after pmove with PSR/PCSR register.
2012-01-16 23:19:20 +00:00
8729a6f6a5
Add vmfunc
...
gas/
2012-01-13 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (cpu_arch): Add ".vmfunc".
* doc/c-i386.texi: Document vmfunc.
gas/testsuite/
2012-01-13 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run vmfunc and x86-64-vmfunc.
* gas/i386/vmfunc.d: New.
* gas/i386/vmfunc.s: Likewise.
* gas/i386/x86-64-vmfunc.d: Likewise.
opcodes/
2012-01-13 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (mod_table): Add vmfunc.
* i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
(cpu_flags): CpuVMFUNC.
* i386-opc.h (CpuVMFUNC): New.
(i386_cpu_flags): Add cpuvmfunc.
* i386-opc.tbl: Add vmfunc.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2012-01-13 22:19:32 +00:00
34dd18bca5
reverse the order of relocs in mach-o gas output.
...
gas:
* config/obj-macho.c (obj_mach_o_reorder_section_relocs): New.
* config/obj-macho.h (SET_SECTION_RELOCS): Define.
(obj_mach_o_reorder_section_relocs): Declare.
gas/testsuite:
* gas/all/redef2.d: Skip for Darwin.
* gas/all/redef3.d: Likewise.
* gas/all/weakref1.d: Likewise.
* gas/macros/irp.d: Likewise.
* gas/macros/repeat.d: Likewise.
* gas/macros/rept.d: Likewise.
* gas/macros/test2.d: Likewise.
* gas/macros/vararg.d: Likewise.
* gas/mach-o/macro-irp.d: New.
* gas/mach-o/macro-repeat.d: New.
* gas/mach-o/macro-rept.d: New.
* gas/mach-o/macro-test2.d: New.
* gas/mach-o/macro-vararg.d: New.
* gas/mach-o/redef2.d: New.
* gas/mach-o/redef3.d: New.
2012-01-13 15:19:13 +00:00
687be931eb
handle absolute indirect syms in mach-o
...
bfd:
* mach-o.c (bfd_mach_o_build_dysymtab_command): Handle absolute
indirect symbols.
gas:
* config/obj-macho.c (obj_mach_o_set_indirect_symbols): Handle
absolute indirect symbols.
gas/testsuite:
* gas/mach-o/dysymtab-3.d: New.
* gas/mach-o/symbols-7.s: New.
2012-01-13 12:59:30 +00:00
c3402d2056
set vma on mach-o sections.
...
gas:
* config/obj-macho.c (obj_mach_o_set_vma_data): New type.
(obj_mach_o_set_section_vma): New.
(obj_mach_o_post_relax_hook): New.
* config/obj-macho.h (md_post_relax_hook): Define.
(obj_mach_o_post_relax_hook): Declare.
gas/testsuite:
* gas/mach-o/dysymtab-2.d: Update to include the set VMA.
* gas/mach-o/symbols-1-64.d: Likewise.
* gas/mach-o/symbols-1.d: Likewise.
* gas/mach-o/symbols-6.d: Likewise.
* gas/mach-o/zerofill-1.d: Likewise.
* gas/mach-o/zerofill-2.d: Likewise.
2012-01-13 11:55:02 +00:00
50d10658ee
add indirect_symbol to mach-o port.
...
bfd:
* mach-o.c (bfd_mach_o_count_indirect_symbols): New.
(bfd_mach_o_build_dysymtab_command): Populate indirect symbol table.
* mach-o.h (bfd_mach_o_asymbol): Move declaration to start of the
file. (bfd_mach_o_section): Add indirect_syms field.
gas:
* config/obj-macho.c (obj_mach_o_set_symbol_qualifier): Switch off
lazy when the symbol is private_extern.
(obj_mach_o_indirect_sym): New type.
(obj_mach_o_indirect_symbol): New.
(mach_o_pseudo_table): Use obj_mach_o_indirect_symbol.
(obj_macho_frob_label): Adjust to avoid adding bsyms for locals.
(obj_macho_frob_label): Likewise. Adjust external and comm
symbol tests.
(obj_mach_o_set_indirect_symbols): New.
(obj_mach_o_frob_file_after_relocs): New.
*config/obj-macho.h (obj_frob_file_after_relocs): Define.
(obj_mach_o_frob_file_after_relocs): Declare.
include/mach-o:
* loader.h (BFD_MACH_O_INDIRECT_SYM_LOCAL): New.
(BFD_MACH_O_INDIRECT_SYM_ABS): New
gas/testsuite:
* gas/mach-o/dysymtab-2.d: New.
* gas/mach-o/err-syms-4.s: New.
* gas/mach-o/err-syms-5.s: New.
* gas/mach-o/err-syms-6.s: New.
* gas/mach-o/symbols-6-64.d: New.
* gas/mach-o/symbols-6-64.s: New.
* gas/mach-o/symbols-6.d: New.
* gas/mach-o/symbols-6.s: New.
2012-01-12 14:03:12 +00:00
b22161d698
add symbol qualifiers for mach-o to bfd/gas
...
bfd:
* mach-o.c (bfd_mach_o_bfd_copy_private_symbol_data): Implement.
(bfd_mach_o_write_symtab): Remove handling for indirect syms.
(bfd_mach_o_primary_symbol_sort_key): Likewise.
(bfd_mach_o_cf_symbols): Likewise.
(bfd_mach_o_sort_symbol_table): Remove.
(bfd_mach_o_mangle_symbols): Adjust arguments, remove handling
for indirect and dysymtab counts. Do the symbol sorting here.
(bfd_mach_o_build_dysymtab_command): Count the symbol types here.
Make the indirect symbols a TODO.
(bfd_mach_o_build_commands): Adjust call to bfd_mach_o_mangle_symbols.
(bfd_mach_o_make_empty_symbol): Specifically flag unset symbols with
a non-zero value.
(bfd_mach_o_read_symtab_symbol): Record the symbol index.
(bfd_mach_o_read_symtab_symbol): Adjust recording of global status.
* mach-o.h (mach_o_data_struct): Remove indirect and dysymtab entries.
(IS_MACHO_INDIRECT): Remove.
(SYM_MACHO_FIELDS_UNSET, SYM_MACHO_FIELDS_NOT_VALIDATED): New.
gas:
* config/obj-macho.c (obj_mach_o_weak): Remove.
(obj_mach_o_common_parse): Set symbol qualifiers.
(LAZY, REFE): New macros.
(obj_mach_o_symbol_type): New enum.
(obj_mach_o_set_symbol_qualifier): New.
(obj_mach_o_sym_qual): New.
(mach_o_pseudo_table): Add symbol qualifiers, set indirect_symbol to
a dummy function.
(obj_mach_o_type_for_symbol): New.
(obj_macho_frob_label): New.
(obj_macho_frob_symbol): New.
* config/obj-macho.h (S_SET_ALIGN): Amend temorary var name.
(obj_frob_label, obj_macho_frob_label): Declare.
(obj_frob_symbol, obj_macho_frob_symbol): Declare.
gas/testsuite:
* gas/mach-o/err-syms-1.s: New.
* gas/mach-o/err-syms-2.s: New.
* gas/mach-o/err-syms-3.s: New.
* gas/mach-o/symbols-2.d: New.
* gas/mach-o/symbols-2.s: New.
* gas/mach-o/symbols-3.s: New.
* gas/mach-o/symbols-4.s: New.
* gas/mach-o/symbols-5.d: New.
* gas/mach-o/symbols-5.s: New.
2012-01-09 10:47:50 +00:00
de64cffdf8
gas/
...
* config/tc-mips.c (s_tls_rel_directive): Call mips_clear_insn_labels.
gas/testsuite/
* gas/mips/tls-relw.s, gas/mips/tls-relw.d: New test.
* gas/mips/mips.exp: Run it.
2012-01-08 12:33:54 +00:00
462427c418
gas/
...
2011-01-08 Andrew Pinski <andrew.pinski@caviumnetworks.com>
Richard Sandiford <rdsandiford@googlemail.com>
* config/tc-mips.c (mips_move_labels): Take the list of labels and
textness as parameters.
(mips_move_text_labels): New function.
(append_insn): Use it instead of mips_move_labels.
(mips_emit_delays, start_noreorder): Likewise.
(mips_align): Take the labels rather than just one label.
Move all labels to after the .align.
(s_align): Change the last argument to mips_align.
(s_cons): Likewise.
(s_float_cons): Likewise.
(s_gpword): Likewise.
(s_gpdword): Likewise.
gas/testsuite/
* gas/mips/align3.s, gas/mips/align3.d: New testcase.
* gas/mips/mips.exp: Run it.
2012-01-08 12:11:42 +00:00
23e1d3291c
Rotate ChangeLogs
2012-01-05 10:09:39 +00:00
8b282ca52a
gas/testsuite:
...
* gas/mach-o/zerofill-2.d: New.
2012-01-04 11:25:11 +00:00
8cf6e08400
add .zerofill to mach-o GAS.
...
gas:
* config/obj-macho.c (obj_mach_o_segT_from_bfd_name): Tidy definition.
(obj_mach_o_get_section_names): New (split from obj_mach_o_section).
(obj_mach_o_make_or_get_sect): Likewise.
(obj_mach_o_section): Split out the functionality shared with zerofill.
(obj_mach_o_zerofill): New.
(obj_mach_o_common_parse): Ensure whitespace is skipped.
(mach_o_pseudo_table): Add .zerofill.
gas/testsuite:
* gas/mach-o/zerofill-1.d: New.
* gas/mach-o/zerofill-1.s: New.
2012-01-04 10:59:54 +00:00
7f3072381b
add dysymtab write support to bfd/mach-o.
...
bfd:
* mach-o.c (bfd_mach_o_write_symtab): Fill in the string table index
as the value of an indirect symbol. Keep the string table index in
non-indirect syms for reference.
(bfd_mach_o_write_dysymtab): New.
(bfd_mach_o_primary_symbol_sort_key): New.
(bfd_mach_o_cf_symbols): New.
(bfd_mach_o_sort_symbol_table): New.
(bfd_mach_o_mangle_symbols): Return early if no symbols. Sort symbols.
If we are emitting a dysymtab, process indirect symbols and count the
number of each other kind.
(bfd_mach_o_mangle_sections): New.
(bfd_mach_o_write_contents): Split out some pre-requisite code into
the command builder. Write dysymtab if the command is present.
(bfd_mach_o_count_sections_for_seg): New.
(bfd_mach_o_build_seg_command): New.
(bfd_mach_o_build_dysymtab_command): New.
(bfd_mach_o_build_commands): Reorganize to support the fact that some
commands are optional and should not be emitted if there are no
sections or symbols.
(bfd_mach_o_set_section_contents): Amend comment.
* mach-o.h: Amend and add to comments.
(mach_o_data_struct): Add fields for dysymtab symbols counts and a
pointer to the indirects, when present.
(bfd_mach_o_should_emit_dysymtab): New macro.
(IS_MACHO_INDIRECT): Likewise.
gas/testsuite:
* gas/mach-o/dysymtab-1-64.d: New.
* gas/mach-o/dysymtab-1.d: New.
* gas/mach-o/symbols-1-64.d: New.
* gas/mach-o/symbols-1.d: New.
* gas/mach-o/symbols-base-64.s: New.
* gas/mach-o/symbols-base.s: New.
2012-01-03 10:54:01 +00:00
bcf0aac6f6
adjust mach-o default GAS sections.
...
gas:
* as.c (perform_an_assembly_pass): Do not create text, data and bss
sections for MACH-O. Do not switch to the text section.
* config/obj-macho.c (obj_mach_o_segT_from_bfd_name): Forward decl.
(mach_o_begin): Startup with only text section unless suppressed.
* config/obj-macho.h (obj_begin): define to mach_o_begin ().
gas/testsuite:
* gas/mach-o/sections-1.d: Amend to recognize that bss is not emitted
by default.
* gas/mach-o/sections-2.d: New.
2011-12-29 10:53:10 +00:00
ab76eeafa5
bfd:
...
* mach-o-i386.c (bfd_mach_o_section_type_valid_for_tgt): Define NULL.
* mach-o-target.c (bfd_mach_o_backend_data): Initialize bfd_mach_o_section_type_valid_for_tgt
* mach-o-x86-64.c (bfd_mach_o_section_type_valid_for_x86_64): New.
(bfd_mach_o_section_type_valid_for_tgt): Set to bfd_mach_o_section_type_valid_for_x86_64.
* mach-o.c (bfd_mach_o_section_type_name): Reorder and eliminate dup.
(bfd_mach_o_section_attribute_name): Reorder.
(bfd_mach_o_get_section_type_from_name): If the target has defined a validator for section
types, then use it.
* mach-o.h (bfd_mach_o_get_section_type_from_name): Alter declaration to include the bfd.
gas:
* config/obj-macho.c (obj_mach_o_section): Account for target-dependent section
types. Improve error handling when wrong section types/attributes are specified.
gas/testsuite:
* gas/mach-o/err-sections-1.s: New.
* gas/mach-o/err-sections-2.s: New.
* gas/mach-o/sections-3.d: New.
* gas/mach-o/sections-3.s: New.
2011-12-19 15:42:37 +00:00
0c9ef0f001
bfd/
...
2011-12-15 Iain Sandoe <iains@gcc.gnu.org>
* mach-o-target.c (bfd_mach_o_bfd_set_private_flags): Use
bfd_mach_o_bfd_set_private_flags.
* mach-o.c (bfd_mach_o_bfd_set_private_flags): New.
* mach-o.h (bfd_mach_o_bfd_set_private_flags): Declare.
gas/
2011-12-15 Iain Sandoe <iains@gcc.gnu.org>
* config/obj-macho.c (obj_mach_o_subsections_by_symbols): New global.
(obj_mach_o_file_properties): New enum.
(obj_mach_o_subsections_via_symbols): Generalize name to...
... (obj_mach_o_fileprop) and use to set subsections_via_symbols.
gas/testsuite/
2011-12-15 Iain Sandoe <iains@gcc.gnu.org>
* gas/mach-o/subsect-via-symbols-0.d: New.
* gas/mach-o/subsect-via-symbols-1.d: New.
* gas/mach-o/subsect-via-symbols.s: New.
2011-12-15 10:56:48 +00:00
5011093dd0
* frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
...
hosts.
* cgen-asm.c (cgen_parse_signed_integer): Add code to handle the
sign extension of negative values on a 64-bit host.
* frv-asm.c: Regenerate.
* gas/frv/immediates.s: New test file - checks assembly of
constant values.
* gas/frv/immediates.d: Expected disassmbly.
* gas/frv/allinsn.exp: Run the new test.
2011-12-15 10:21:51 +00:00
370a075d48
gas/
...
2011-12-14 Stuart Henderson <shenders@gcc.gnu.org>
* config/bfin-parse.y (asm_1): set SRCx fields to all 1s for
dspalu32 instrs that don't use them.
gas/testsuite/
2011-12-14 Stuart Henderson <shenders@gcc.gnu.org>
* gas/bfin/move.d: Update SRCx field expectations.
* gas/bfin/move2.d: Likewise.
* gas/bfin/parallel.d: Likewise.
* gas/bfin/parallel2.d: Likewise.
* gas/bfin/parallel3.d: Likewise.
* gas/bfin/parallel4.d: Likewise.
* gas/bfin/video.d: Likewise.
* gas/bfin/video2.d: Likewise.
2011-12-15 04:25:10 +00:00
9dadd4aee8
2011-12-14 Iain Sandoe <iains@gcc.gnu.org>
...
* gas/mach-o/comm-1.d: New.
* gas/mach-o/comm-1.s: New.
* gas/mach-o/lcomm-1.s: New.
* gas/mach-o/mach-o.exp: Update to use run_dump_tests[].
* gas/mach-o/sections-1.d: New.
* gas/mach-o/sections-1.s: New.
* gas/mach-o/warn-1.s: Add .comm alignment range warning.
2011-12-14 15:32:25 +00:00
f68e81fcd4
2011-12-14 Iain Sandoe <iains@gcc.gnu.org>
...
* gas/mach-o: New.
* gas/mach-o/mach-o.exp: New.
* gas/mach-o/warn-1.s: New.
* gas/mach-o/lcomm-1.s: New.
* gas/mach-o/lcomm-1.d: New.
2011-12-14 13:27:34 +00:00
bb8e626db9
opcodes:
...
2011-12-08 Andrew Pinski <apinski@cavium.com>
* mips-opc.c (mips_builtin_opcodes): Add "pause".
gas/testsuite:
2011-12-08 Andrew Pinski <apinski@cavium.com>
* gas/mips/mips32-mt.d: Add pause instruction encoding to the end.
* gas/mips/micromips@mips32r2.d: Likewise.
* gas/mips/mips32r2.d: Likewise.
* gas/mips/mips32-mt.s: Add pause instruction to the end.
* gas/mips/mips32r2.s: Likewise.
2011-12-08 20:52:42 +00:00
432233b359
bfd:
...
2011-12-08 Andrew Pinski <apinski@cavium.com>
Adam Nemet <anemet@caviumnetworks.com>
* archures.c (bfd_mach_mips_octeon2): New macro
* bfd-in2.h: Regenerate.
* cpu-mips.c (I_mipsocteon2): New enum value.
(arch_info_struct): Add bfd_mach_mips_octeon2.
* elfxx-mips.c (_bfd_elf_mips_mach): Support E_MIPS_MACH_OCTEON2.
(mips_set_isa_flags): Add bfd_mach_mips_octeon2.
(mips_mach_extensions): Add bfd_mach_mips_octeon2.
gas:
2011-12-08 Andrew Pinski <apinski@cavium.com>
Adam Nemet <anemet@caviumnetworks.com>
* tc-mips.c (CPU_IS_OCTEON): Add Octeon2.
(mips_cpu_info_table): Add Octeon2.
* doc/c-mips.texi: Document octeon2 as an acceptable value for -march=.
gas/testsuite:
2011-12-08 Andrew Pinski <apinski@cavium.com>
Adam Nemet <anemet@caviumnetworks.com>
* gas/mips/mips.exp: Add Octeon2 for an architecture.
Run octeon2 test.
* gas/mips/octeon2.d: New file.
* gas/mips/octeon2.s: New file.
include/opcode:
2011-12-08 Andrew Pinski <apinski@cavium.com>
Adam Nemet <anemet@caviumnetworks.com>
* mips.h (INSN_CHIP_MASK): Update according to INSN_OCTEON2.
(INSN_OCTEON2): New macro.
(CPU_OCTEON2): New macro.
(OPCODE_IS_MEMBER): Add Octeon2.
opcodes:
2011-12-08 Andrew Pinski <apinski@cavium.com>
Adam Nemet <anemet@caviumnetworks.com>
* mips-dis.c (mips_arch_choices): Add Octeon2.
For "octeon+", just include OcteonP for the insn.
* mips-opc.c (IOCT): Include Octeon2.
(IOCTP): Include Octeon2.
(IOCT2): New macro.
(mips_builtin_opcodes): Add "laa", "laad", "lac", "lacd", "lad",
"ladd", "lai", "laid", "las", "lasd", "law", "lawd".
Move "lbux", "ldx", "lhx", "lwx", and "lwux" up to where the standard
loads are, and add IOCT2 to them.
Add "lbx" and "lhux".
Add "qmac.00", "qmac.01", "qmac.02", "qmac.03", "qmacs.00",
"qmacs.01", "qmacs.01", "qmacs.02" and "qmacs.03".
Add "zcb" and "zcbt".
2011-12-08 20:47:27 +00:00
bd340a044c
2011-12-07 Sameera Deshpande <sameera.deshpande@arm.com>
...
* gas/config/tc-arm.c (do_t_ldstd): Warn for unpredictable cases.
* gas/testsuite/gas/arm/thumb2_ldstd_unpredictable.d: New testcase.
* gas/testsuite/gas/arm/thumb2_ldstd_unpredictable.l: Likewise.
* gas/testsuite/gas/arm/thumb2_ldstd_unpredictable.s: Likewise.
* gas/testsuite/gas/testsuite/gas/arm/sp-pc-validations-bad-t.l: Update
testcase.
* gas/testsuite/gas/testsuite/gas/arm/sp-pc-validations-bad-t.s: Likewise.
2011-12-07 16:58:35 +00:00
ad6cec4372
* gas/config/tc-arm.c (ARM_IT_MAX_OPERANDS): New define.
...
(arm_it): Use ARM_IT_MAX_OPERANDS.
(neon_select_shape): Ensure we have matched all operands.
* gas/testsuite/gas/arm/neon-suffix-bad.l: Add testcase.
* gas/testsuite/gas/arm/neon-suffix-bad.s: Likewise.
2011-12-07 16:46:35 +00:00
ddd7f988d4
* tc-arm.c (aeabi_set_public_attributes): Correctly set
...
Tag_ARM_ISA_use and Tag_Thumb_ISA_use.
* gas/arm/attr-any-armv4t.d: New test.
* gas/arm/attr-any-armv4t.s: New file.
* gas/arm/attr-any-thumbv6.d: New test.
* gas/arm/attr-any-thumbv6.s: New file.
2011-12-05 15:43:53 +00:00
f3bad4690f
* gas/config/tc-arm.c (arm_cpu_option_table): Add name_len field.
...
(arm_arch_option_table): Likewise.
(arm_option_extension_value_table): Likewise.
(ARM_CPU_OPT): New define.
(ARM_ARCH_OPT): Likewise.
(ARM_EXT_OPT): Likewise.
(arm_cpus): Use ARM_CPU_OPT to initialize.
(arm_archs): Use ARM_ARCH_OPT to initialize.
(arm_extensions): Use ARM_EXT_OPT to initialize.
(arm_parse_extension): Ensure option string matching matches
the whole string.
(arm_parse_cpu): Likewise.
(arm_parse_arch): Likewise.
* gas/testsuite/gas/arm/cmdline-bad-arch.d: New test case.
* gas/testsuite/gas/arm/cmdline-bad-cpu.d: Likewise.
2011-12-05 14:51:54 +00:00
725fc8eddf
gas/testsuite/
...
* gas/mips/mips.exp (run_dump_test_arch): Add an opts parameter.
(run_dump_test_arches): Allow additional options to be passed.
(run_list_test_arch): Add opts to the name.
(run_list_test_arches): Allow the options to be elided.
(mips4-fp, mips5-fp): Run twice, one with -32 and once with -mabi=o64.
(mips64r2-ill, octeon-ill): Remove empty options string.
2011-12-03 10:29:53 +00:00
dd6a37e700
opcode/
...
2011-11-29 Andrew Pinski <apinski@cavium.com>
* mips-dis.c (mips_arch_choices): Add Octeon+.
* mips-opc.c (IOCT): Include Octeon+.
(IOCTP): New macro.
(mips_builtin_opcodes): Add "saa" and "saad".
bfd/
2011-11-29 Andrew Pinski <apinski@cavium.com>
* archures.c (bfd_mach_mips_octeonp): New macro.
* bfd-in2.h: Regenerate.
* bfd/cpu-mips.c (I_mipsocteonp): New enum value.
(arch_info_struct): Add bfd_mach_mips_octeonp.
* elfxx-mips.c (mips_set_isa_flags): Add bfd_mach_mips_octeonp.
(mips_mach_extensions): Add bfd_mach_mips_octeonp.
include/opcodes/
2011-11-29 Andrew Pinski <apinski@cavium.com>
* mips.h (INSN_CHIP_MASK): Update according to INSN_OCTEONP.
(INSN_OCTEONP): New macro.
(CPU_OCTEONP): New macro.
(OPCODE_IS_MEMBER): Add Octeon+.
(M_SAA_AB, M_SAAD_AB, M_SAA_OB, M_SAAD_OB): New enum values.
gas/
2011-11-29 Andrew Pinski <apinski@cavium.com>
* config/tc-mips.c (CPU_IS_OCTEON): New macro function.
(CPU_HAS_SEQ): Change to use CPU_IS_OCTEON.
(NO_ISA_COP): Likewise.
(macro) <ld_st>: Add support when off0 is true.
Add support for M_SAA_AB, M_SAA_OB, M_SAAD_OB and M_SAAD_AB.
(mips_cpu_info_table): Add octeon+.
* doc/c-mips.texi: Document octeon+ as an acceptable value for -march=.
gas/testsuite/
2011-11-29 Andrew Pinski <apinski@cavium.com>
* gas/mips/mips.exp: Add octeon+ for an architecture.
Run octeon-saa-saad test.
(run_dump_test_arch): For Octeon architectures, also try octeon@.
* gas/mips/octeon-pref.d: Remove -march=octeon from command line.
* gas/mips/octeon.d: Likewise.
* gas/mips/octeon-saa-saad.d: New file.
* gas/mips/octeon-saa-saad.s: New file
2011-11-29 20:28:55 +00:00
c6400f8afd
* gas/config/tc-arm.c (do_t_mov_cmp): Allow MOV lowreg, lowreg when no CPU
...
is specified.
* gas/testsuite/gas/arm/mov-highregs-any.d: New testcase.
* gas/testsuite/gas/arm/mov-highregs-any.s: Likewise.
* gas/testsuite/gas/arm/mov-lowregs-any.d: Likewise.
* gas/testsuite/gas/arm/mov-lowregs-any.s: Likewise.
2011-11-25 15:17:36 +00:00
fbdd3712c9
* gas/mips/micromips@24k-branch-delay-1.d: New test.
...
* gas/mips/micromips@24k-triple-stores-1.d: New test.
* gas/mips/micromips@24k-triple-stores-2.d: New test.
* gas/mips/micromips@24k-triple-stores-3.d: New test.
* gas/mips/micromips@24k-triple-stores-4.d: New test.
* gas/mips/micromips@24k-triple-stores-5.d: New test.
* gas/mips/micromips@24k-triple-stores-6.d: New test.
* gas/mips/micromips@24k-triple-stores-7.d: New test.
* gas/mips/micromips@24k-triple-stores-8.d: New test.
* gas/mips/micromips@24k-triple-stores-9.d: New test.
* gas/mips/micromips@24k-triple-stores-10.d: New test.
* gas/mips/micromips@24k-triple-stores-11.d: New test.
* gas/mips/24k-triple-stores-1.s: Adjust for microMIPS
disassembly.
* gas/mips/24k-triple-stores-2.s: Likewise.
* gas/mips/24k-triple-stores-3.s: Likewise.
* gas/mips/24k-triple-stores-4.s: Likewise.
* gas/mips/24k-triple-stores-5.s: Likewise.
* gas/mips/24k-triple-stores-6.s: Likewise.
* gas/mips/24k-triple-stores-7.s: Likewise.
* gas/mips/24k-triple-stores-8.s: Likewise.
* gas/mips/24k-triple-stores-9.s: Likewise.
* gas/mips/24k-triple-stores-10.s: Likewise.
* gas/mips/24k-triple-stores-11.s: Likewise.
* gas/mips/mips.exp: Run the new tests.
2011-11-21 11:18:28 +00:00
9535b3e573
* gas/mips/micromips@loc-swap-2.d: Correct test case.
2011-11-21 11:12:41 +00:00
7bd942df4a
gas/
...
* config/tc-mips.c (macro): Fix unsupported opcode message
capitalization.
(mips_ip, mips16_ip): Likewise.
gas/testsuite/
* gas/mips/mips-double-float-flag.l: Adjust according to
unsupported opcode message capitalization fix.
* gas/mips/mips-hard-float-flag.l: Likewise.
* gas/mips/mips-macro-ill-nofp.l: Likewise.
* gas/mips/mips-macro-ill-sfp.l: Likewise.
* gas/mips/mips1-fp.l: Likewise.
* gas/mips/mips16e-64.l: Likewise.
* gas/mips/mips32-sf32.l: Likewise.
* gas/mips/mips32r2-fp32.l: Likewise.
* gas/mips/mips4-branch-likely.l: Likewise.
* gas/mips/mips4-fp.l: Likewise.
* gas/mips/octeon-ill.l: Likewise.
2011-11-16 12:34:34 +00:00
9301f9c3e3
gas/
...
* config/tc-mips.c (can_swap_branch_p): Exclude microMIPS
variant frags too.
gas/testsuite/
* gas/mips/relax-swap3.d: New test.
* gas/mips/mips16@relax-swap3.d: Likewise.
* gas/mips/micromips@relax-swap3.d: Likewise.
* gas/mips/relax-swap3.s: New test source.
* gas/mips/mips.exp: Run the new tests.
2011-11-14 13:43:23 +00:00
3da1d841a1
* config/tc-arm.c (md_begin): Remove ARM_PLT32 reloc associated
...
with the (PLT) instruction suffix when operating in eabi mode.
* doc/c-arm.texi (ARM_Relocations): Extend description of (PLT)
suffix.
* gas/arm/pic.d: Update expected output.
2011-11-02 11:13:59 +00:00
cfb8c0921c
bfd:
...
* Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo .
(ALL_MACHINES_CFILES): Add cpu-epiphany.c .
(BFD32_BACKENDS): Add elf32-epiphany.lo .
(BFD32_BACKENDS_CFILES): Add elf32-epiphany.c .
* Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate.
* archures.c (bfd_arch_epiphany): Add.
(bfd_mach_epiphany16, bfd_mach_epiphany32): Define.
(bfd_epiphany_arch): Declare.
(bfd_archures_list): Add &bfd_epiphany_arch.
* config.bfd (epiphany-*-elf): New target case.
* configure.in (bfd_elf32_epiphany_vec): New target vector case.
* reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation.
(BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise.
(BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise.
(BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise.
* targets.c (bfd_elf32_epiphany_vec): Declare.
(_bfd_target_vector): Add bfd_elf32_epiphany_vec.
* po/SRC-POTFILES.in, po/bfd.pot: Regenerate.
* cpu-epiphany.c, elf32-epiphany.c: New files.
binutils:
* readelf.c (include "elf/epiphany.h")
(guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY.
(get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise.
(is_16bit_abs_reloc, is_none_reloc): Likewise.
* po/binutils.pot: Regenerate.
cpu:
* cpu/epiphany.cpu, cpu/epiphany.opc: New files.
gas:
* NEWS: Mention addition of Adapteva Epiphany support.
* config/tc-epiphany.c, config/tc-epiphany.h: New files.
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c .
(TARGET_CPU_HFILES): Add config/tc-epiphany.h .
* Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate.
* configure.in: Also set using_cgen for epiphany.
* configure.tgt: Handle epiphany.
* doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi .
* doc/all.texi: Set EPIPHANY.
* doc/as.texinfo: Add EPIPHANY-specific text.
* doc/c-epiphany.texi: New file.
* po/gas.pot: Regenerate.
gas/testsuite:
* gas/epiphany: New directory.
include:
* dis-asm.h (print_insn_epiphany): Declare.
* elf/epiphany.h: New file.
* elf/common.h (EM_ADAPTEVA_EPIPHANY): Define.
ld:
* NEWS: Mention addition of Adapteva Epiphany support.
* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c .
(eelf32epiphany.c): New rule.
* Makefile.in: Regenerate.
* configure.tgt: Handle epiphany-*-elf.
* po/ld.pot: Regenerate.
* testsuite/ld-srec/srec.exp: xfail epiphany.
* emulparams/elf32epiphany.sh: New file.
opcodes:
* Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h .
(TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c,
epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c .
(CLEANFILES): Add stamp-epiphany.
(EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it.
(stamp-epiphany): New rule.
* Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate.
* configure.in: Handle bfd_epiphany_arch.
* disassemble.c (ARCH_epiphany): Define.
(disassembler): Handle bfd_arch_epiphany.
* epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files.
* epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise.
* epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
c373271616
opcodes/
...
* m68k-opc.c (m68k_opcodes): Fix entries for ColdFire moveml.
gas/testsuite/
* gas/m68k/all.exp (movem-offset): Add test.
* gas/m68k/movem-offset.s: New test.
* gas/m68k/movem-offset.d: New.
2011-10-24 16:36:51 +00:00
9cae27dcb1
2011-10-21 Jan Glauber <jang@linux.vnet.ibm.com>
...
* s390-opc.txt: Add CPUMF instructions.
2011-10-21 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* gas/s390/zarch-z10.d: Add CPUMF instructions.
* gas/s390/zarch-z10.s: Likewise.
2011-10-21 12:50:30 +00:00
a415b1cd63
Jie Zhang <jie@codesourcery.com>
...
Julian Brown <julian@codesourcery.com>
gas/
* config/tc-arm.c (parse_shifter_operand): Fix handling
of explicit rotation.
(encode_arm_shifter_operand): Likewise.
gas/testsuite/
* gas/arm/adrl.d: Adjust.
* gas/arm/immed2.d: New test.
* gas/arm/immed2.s: New test.
ld/testsuite/
* ld-arm/cortex-a8-fix-b-plt.d: Adjust.
* ld-arm/cortex-a8-fix-bcc-plt.d: Adjust.
* ld-arm/cortex-a8-fix-bl-plt.d: Adjust.
* ld-arm/cortex-a8-fix-bl-rel-plt.d: Adjust.
* ld-arm/cortex-a8-fix-blx-plt.d: Adjust.
* ld-arm/ifunc-1.dd: Adjust.
* ld-arm/ifunc-2.dd: Adjust.
* ld-arm/ifunc-3.dd: Adjust.
* ld-arm/ifunc-4.dd: Adjust.
* ld-arm/ifunc-5.dd: Adjust.
* ld-arm/ifunc-6.dd: Adjust.
* ld-arm/ifunc-7.dd: Adjust.
* ld-arm/ifunc-8.dd: Adjust.
* ld-arm/ifunc-9.dd: Adjust.
* ld-arm/ifunc-10.dd: Adjust.
* ld-arm/ifunc-14.dd: Adjust.
* ld-arm/ifunc-15.dd: Adjust.
* ld-arm/ifunc-16.dd: Adjust.
opcodes/
* arm-dis.c (print_insn_arm): Explicitly specify rotation
if needed.
2011-10-18 14:41:55 +00:00
1be5fd2e2f
* config/tc-arm.c (check_ldr_r15_aligned): New.
...
(do_ldst): Warn in upredictable cases.
(do_t_ldst): Likewise.
(insns): Update accordingly.
* gas/arm/ldr-bad.s: New testcase.
* gas/arm/ldr-bad.l: Likewise.
* gas/arm/ldr-bad.d: Likewise.
* gas/arm/ldr.s: Likewise.
* gas/arm/ldr.d: Likewise.
* gas/arm/ldr-t-bad.s: Likewise.
* gas/arm/ldr-t-bad.l: Likewise.
* gas/arm/ldr-t-bad.d: Likewise.
* gas/arm/ldr-t.s: Likewise.
* gas/arm/ldr-t.d: Likewise.
* gas/arm/sp-pc-usage-t.s: Correct.
* gas/arm/sp-pc-usage-t.d: Update accordingly.
2011-10-13 08:15:17 +00:00
989993d80a
gas/testsuite/
...
2011-09-28 Jan Beulich <jbeulich@suse.com>
* gas/ppc/476.s: Fix lswi first operand.
* gas/ppc/476.d: Adjust expected output.
* gas/ppc/a2.s: Fix lswi first operand.
* gas/ppc/a2.d: Adjust expected output.
* gas/ppc/power6.s: Fix lfdpx first operand.
* gas/ppc/power6.d: Adjust expected output.
opcodes/
2011-09-28 Jan Beulich <jbeulich@suse.com>
* ppc-opc.c (insert_nbi, insert_rbx, FRAp, FRBp, FRSp, FRTp, NBI, RAX,
RBX): New.
(insert_bo, insert_boe): Reject bcctr with bit 2 in bo unset.
(powerpc_opcodes): Use RAX for second and RBXC for third operand of
lswx. Use NBI for third operand of lswi. Use FRTp for first operand of
lfdp and lfdpx. Use FRSp for first operand of stfdp and stfdpx, and
mark them as invalid on POWER7. Use FRTp, FRAp, and FRBp repsectively
on DFP quad instructions.
2011-10-06 09:22:58 +00:00
9af6978cc0
Another typo ... :(
2011-09-28 12:04:24 +00:00
8d7f3066f1
* gas/pe/section-exclude.d: Correct testcase.
2011-09-28 12:01:12 +00:00
c348982892
2011-09-27 Kai Tietz <ktietz@redhat.com>
...
* config/obj-coff.c (obj_coff_section): Add 'e' as specifier
for marking section SEC_EXCLUDE.
2011-09-27 Kai Tietz <ktietz@redhat.com>
* gas/pe/pe.exp: Add new testcase.
* gas/pe/section-exclude.d: New file.
* gas/pe/section-exclude.s: New file.
2011-09-27 18:57:22 +00:00
92a7795b59
opcodes/
...
* sparc-opc.c (sparc_opcodes): Fix random instruction to write
to a float instead of an integer register.
gas/testsuite/
* gas/sparc/hpcvis3.s: Update to use float reg for random insn.
* gas/sparc/hpcvis3.d: Likewise.
2011-09-27 04:30:32 +00:00
e91d10767a
Add sparc integer multiply-add instructions.
...
opcodes/
* sparc-opc.c (sparc_opcodes): Add integer multiply-add
instructions.
gas/testsuite/
* gas/sparc/ima.d: New test.
* gas/sparc/ima.s: New test source.
* gas/sparc/sparc.exp: Run new test.
2011-09-26 09:19:24 +00:00
4bafe00ecf
Add new sparc options to control instruction availability.
...
gas/
* config/tc-sparc.c (hwcap_allowed): New.
(struct sparc_arch): New field 'hwcap_allowed' containing a bitmask
of F_FOO flags which are enabled by the particular arch setting.
Add new options that provide explicit access to new instructions.
(md_parse_option): Only bump max_architecture if the requested one
is larger, or this is the first explicit request.
(get_hwcap_name): New function.
(sparc_ip): Validate that hwcaps used by an instruction have actually
been enabled.
* doc/c-sparc.texi: Document new sparc options.
2011-09-22 00:03:30 +00:00
527563502c
Fix sparc testcases when building with 64-bit default.
...
gas/testsuite/
* gas/sparc/imm-plus-rreg.d: Fix address regex for 64-bit.
* gas/sparc/save-args.d: Likewise.
* gas/sparc/ticc-imm-reg.d: Likewise, add -32 to options.
* gas/sparc/v8-movwr-imm.d: Likewise.
2011-09-21 22:29:55 +00:00
9e8c70f96b
Annotate sparc objects with cpu hardware capabilities used.
...
bfd/
* elfxx-sparc.c (_bfd_sparc_elf_merge_private_bfd_data): New.
* elfxx-sparc.h: Declare it.
* elf32-sparc.c (elf32_sparc_merge_private_bfd_data): Call it.
* elf64-sparc.c (elf64_sparc_merge_private_bfd_data): Likewise.
binutils/
* readelf.c (display_sparc_hwcaps): New.
(display_sparc_gnu_attribute): New.
(process_sparc_specific): New.
(process_arch_specific): When EM_SPARC, EM_SPARC32PLUS,
or EM_SPARCV9 invoke process_sparc_specific.
gas/
* config/tc-sparc.c (hwcap_seen): New bitmask, defined when
not TE_SOLARIS.
(sparc_ip): When not TE_SOLARIS, accumulate hwcap bits from
sparc_opcode->flags of instruction into hwcap_seen.
(sparc_md_end): Create Tag_GNU_Sparc_HWCAPS attribute if
hwcap_seen is non-zero and not TE_SOLARIS.
gas/testsuite/
* gas/sparc/hpcvis3.s: Update for fixed fchksum16 mnemonic.
* gas/sparc/hpcvis3.d: Likewise.
include/elf/
* sparc.h (Tag_GNU_Sparc_HWCAPS): New object attribute.
(ELF_SPARC_HWCAP_*): New HWCAPS bitmask values.
include/opcode/
* sparc.h (struct sparc_opcode): Expand 'flags' to unsigned int.
(F_MUL32, F_DIV32, F_FSMULD, F_V8PLUS, F_POPC, F_VIS, F_VIS2,
F_ASI_BLK_INIT, F_FMAF, F_VIS3, F_HPC, F_RANDOM, F_TRANS,
F_FJFMAU, F_IMA, F_ASI_CACHE_SPARING): New flag bits.
opcodes/
* sparc-opc.c (sparc_opcodes): Annotate table with HWCAP flag
bits. Fix "fchksm16" mnemonic.
2011-09-21 20:49:16 +00:00
b2ea18299b
Add PR markers
2011-09-10 08:13:45 +00:00
8dbb9eb3c6
opcodes/
...
* sparc-opc.c (sparc_opcodes): Add entry for 'save simm13,regrs1,regrd'
This has been reported as being accepted by the Sun assmebler.
gas/testsuite/
* gas/sparc/save-args.[sd]: New test.
* gas/sparc/sparc.exp: Run new test.
2011-09-08 19:03:17 +00:00
9bf29d72d4
opcodes/
...
The changes below bring 'mov' and 'ticc' instructions into line
with the V8 SPARC Architecture Manual.
* sparc-opc.c (sparc_opcodes): Add entry for 'ticc imm + regrs1'.
* sparc-opc.c (sparc_opcodes): Add alias entries for
'mov regrs2,%asrX'; 'mov regrs2,%y'; 'mov regrs2,%prs';
'mov regrs2,%wim' and 'mov regrs2,%tbr'.
* sparc-opc.c (sparc_opcodes): Move/Change entries for
'mov imm,%asrX'; 'mov imm,%y'; 'mov imm,%prs'; 'mov imm,%wim'
and 'mov imm,%tbr'.
* sparc-opc.c (sparc_opcodes): Add wr alias entries to match above
mov aliases.
gas/testsuite/
* gas/sparc/ticc-imm-reg.[sd]: New test.
* gas/sparc/v8-movwr-imm.[sd]: New test.
* gas/sparc/sparc.exp: Run new tests.
2011-09-08 19:01:11 +00:00
f124dd4f3f
gas/
...
* config/tc-sparc.c (sparc_ip): Handle 'i' + r<0..31>
in addition to 'i' + [goli]<0..7>.
gas/testsuite/
* gas/sparc/imm-plus-rreg.[sd]: New test.
* gas/sparc/sparc.exp: Run new test.
2011-09-08 16:56:10 +00:00
cdf492019f
opcodes/
...
* sparc-opc.c (pdistn): Destination is integer not float register.
gas/testsuite/
* gas/sparc/hpcvis3.s: Correct pdistn test.
* gas/sparc/hpcvis3.d: Likewise.
2011-09-08 16:40:47 +00:00
48b0740182
gas/
...
PR gas/13167
* dwarf2dbg.c (dwarf2_flush_pending_lines): Use symbol_temp_new_now.
gas/testsuite/
PR gas/13167
* gas/ia64/pr13167.d, gas/ia64/pr13167.s: New test.
* gas/ia64/ia64.exp: Run it.
2011-09-08 12:18:28 +00:00
96e67898bc
* gas/testsuite/gas/m68k/all.exp: Run "mode5" test also with -mcpu=5200.
...
* gas/testsuite/gas/m68k/mode5.s: Add moveml testcases.
* gas/testsuite/gas/m68k/mode5.d: Update.
* opcodes/m68k-opc.c: Use "y" in moveml pattern for mcfisa_a.
2011-09-07 20:56:09 +00:00
5045d76649
gas/
...
PR gas/13024
* dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
(dwarf2_gen_line_info_1): Delete.
(dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
(dwarf2_gen_line_info, dwarf2_emit_label): Use them.
(dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
(dwarf2_directive_loc): Push previous .locs instead of generating
them immediately.
gas/testsuite/
* gas/mips/loc-swap-2.s, gas/mips/loc-swap-2.d,
gas/mips/micromips@loc-swap-2.d,
gas/mips/mips16@loc-swap-2.d: New test.
* gas/mips/mips.exp: Run it.
2011-09-05 19:19:01 +00:00
be748880a3
Update AVX tests.
...
2011-08-19 Sergey A. Guriev <sergeya.a.guriev@intel.com>
* gas/i386/avx-gather-intel.d: Added missing vpgather tests.
* gas/i386/avx-gather.d: Likewise.
* gas/i386/x86-64-avx-gather-intel.d: Likewise.
* gas/i386/x86-64-avx-gather.d: Likewise.
* gas/i386/avx-intel.d: Added missing vpinsrd and removed
duplicated vpinsrb instructions.
* gas/i386/avx.d: Likewise.
* gas/i386/avx.s: Likewise.
* gas/i386/ilp32/x86-64-avx-intel.d: Likewise.
* gas/i386/ilp32/x86-64-avx.d: Likewise.
* gas/i386/x86-64-avx-intel.d: Likewise.
* gas/i386/x86-64-avx.d: Likewise.
* gas/i386/x86-64-avx.s: Likewise.
2011-08-19 19:27:53 +00:00
85bb418f5e
* gas/mips/micromips@mips5.d: Rename to...
...
* gas/mips/micromips@mips5-fp.d: ... this.
* gas/mips/mips5.d: Rename to...
* gas/mips/mips5-fp.d: ... this.
* gas/mips/mips5.l: Rename to...
* gas/mips/mips5-fp.l: ... this.
* gas/mips/mips5.s: Rename to...
* gas/mips/mips5-fp.s: ... this.
* gas/mips/mips.exp: Update accordingly.
2011-08-10 22:52:03 +00:00
8d367dd5c0
* gas/mips/mips.exp: Define new "fpisa3", "fpisa4" and "fpisa5"
...
architecture properties adding them to "mips3", "mips4", "mips5"
and "mips32r2" architectures. Use the new properties for the
"24k-triple-stores-1", "24k-triple-stores-3", "mips4-fp",
"mips5" and "alnv_ps-swap" tests.
2011-08-10 22:28:41 +00:00
dec0624dcd
gas/
...
* config/tc-mips.c (mips_set_options): Add ase_mcu.
(mips_opts): Initialise ase_mcu to -1.
(ISA_SUPPORTS_MCU_ASE): New macro.
(MIPS_CPU_ASE_MCU): Likewise.
(is_opcode_valid): Handle MCU.
(macro_build, macro): Likewise.
(validate_mips_insn, validate_micromips_insn): Likewise.
(mips_ip): Likewise.
(options): Add OPTION_MCU and OPTION_NO_MCU.
(md_longopts): Add mmcu and mno-mcu.
(md_parse_option): Handle OPTION_MCU and OPTION_NO_MCU.
(mips_after_parse_args): Handle MCU.
(s_mipsset): Likewise.
(md_show_usage): Handle MCU options.
* doc/as.texinfo: Document -mmcu and -mno-mcu options.
* doc/c-mips.texi: Likewise, and document ".set mcu" and
".set nomcu" directives.
gas/testsuite/
* gas/mips/micromips@mcu.d: New test.
* gas/mips/mcu.d: Likewise.
* gas/mips/mcu.s: New test source.
* gas/mips/mips.exp: Run the new tests.
include/opcode/
* mips.h (OP_MASK_3BITPOS, OP_SH_3BITPOS): New macros.
(OP_MASK_OFFSET12, OP_SH_OFFSET12): Redefine.
(INSN_ASE_MASK): Add the MCU bit.
(INSN_MCU): New macro.
(M_ACLR_AB, M_ACLR_OB, M_ASET_AB, M_ASET_OB): New enum values.
(MICROMIPSOP_MASK_3BITPOS, MICROMIPSOP_SH_3BITPOS): New macros.
opcodes/
* mips-dis.c (mips_arch_choices): Enable MCU for "mips32r2"
and "mips64r2".
(print_insn_args, print_insn_micromips): Handle MCU.
* micromips-opc.c (MC): New macro.
(micromips_opcodes): Add "aclr", "aset" and "iret".
* mips-opc.c (MC): New macro.
(mips_builtin_opcodes): Add "aclr", "aset" and "iret".
2011-08-09 15:20:03 +00:00
2b0c8b40ed
include/opcode/
...
* mips.h (INSN_WRITE_GPR_S, INSN2_WRITE_GPR_MB): New macros.
(INSN2_READ_GPR_MC, INSN2_READ_GPR_ME): Likewise.
(INSN2_WRITE_GPR_MF, INSN2_READ_GPR_MG): Likewise.
(INSN2_READ_GPR_MJ, INSN2_WRITE_GPR_MJ): Likewise.
(INSN2_READ_GPR_MP, INSN2_WRITE_GPR_MP): Likewise.
(INSN2_READ_GPR_MQ, INSN2_WRITE_GPR_MHI): Likewise.
(INSN2_READ_GPR_MMN): Likewise.
(INSN2_READ_FPR_D): Change the bit used.
(INSN2_MOD_GPR_MD, INSN2_MOD_GPR_MF): Likewise.
(INSN2_MOD_SP, INSN2_READ_GPR_31, INSN2_READ_GP): Likewise.
(INSN2_READ_PC, INSN2_UNCOND_BRANCH): Likewise.
(INSN2_COND_BRANCH): Likewise.
(INSN2_WRITE_GPR_S, INSN2_MOD_GPR_MB): Remove macros.
(INSN2_MOD_GPR_MC, INSN2_MOD_GPR_ME, INSN2_MOD_GPR_MG): Likewise.
(INSN2_MOD_GPR_MJ, INSN2_MOD_GPR_MP, INSN2_MOD_GPR_MQ): Likewise.
(INSN2_MOD_GPR_MHI, INSN2_MOD_GPR_MM): Likewise.
(INSN2_MOD_GPR_MN): Likewise.
gas/
* config/tc-mips.c (gpr_mod_mask): Remove INSN2_MOD_GPR_MB,
INSN2_MOD_GPR_MC, INSN2_MOD_GPR_ME, INSN2_MOD_GPR_MG,
INSN2_MOD_GPR_MHI, INSN2_MOD_GPR_MJ, INSN2_MOD_GPR_MM,
INSN2_MOD_GPR_MN, INSN2_MOD_GPR_MP and INSN2_MOD_GPR_MQ opcode
register use checks.
(gpr_read_mask): Add INSN2_READ_GPR_MC, INSN2_READ_GPR_ME
INSN2_READ_GPR_MG, INSN2_READ_GPR_MJ, INSN2_READ_GPR_MMN,
INSN2_READ_GPR_MP and INSN2_READ_GPR_MQ opcode register use
checks.
(gpr_write_mask): Replace INSN2_WRITE_GPR_S opcode register
use flag with INSN_WRITE_GPR_S. Add INSN2_WRITE_GPR_MB,
INSN2_WRITE_GPR_MHI, INSN2_WRITE_GPR_MJ and INSN2_WRITE_GPR_MP
opcode register use checks.
(can_swap_branch_p): Enable microMIPS branch swapping.
(append_insn): Likewise.
gas/testsuite/
* gas/mips/micromips.d: Update according to changes to enable
microMIPS branch swapping.
* gas/mips/micromips-trap.d: Likewise.
* gas/mips/micromips@jal-svr4pic.d: Likewise.
* gas/mips/micromips@loc-swap.d: Likewise.
* gas/mips/micromips@loc-swap-dis.d: Likewise.
opcodes/
* micromips-opc.c (MOD_mb, MOD_mc, MOD_md): Remove macros.
(MOD_me, MOD_mf, MOD_mg, MOD_mhi, MOD_mj, MOD_ml): Likewise.
(MOD_mm, MOD_mn, MOD_mp, MOD_mq, MOD_sp): Likewise.
(WR_mb, RD_mc, RD_md, WR_md, RD_me, RD_mf, WR_mf): New macros.
(RD_mg, WR_mhi, RD_mj, WR_mj, RD_ml, RD_mmn): Likewise.
(RD_mp, WR_mp, RD_mq, RD_sp, WR_sp): Likewise.
(WR_s): Update macro.
(micromips_opcodes): Update register use flags of: "addiu",
"addiupc", "addiur1sp", "addiur2", "addius5", "addiusp", "addu",
"and", "andi", "beq", "beqz", "bne", "bnez", "di", "ei", "j",
"jalr", "jalrs", "jr", "jraddiusp", "jrc", "lbu", "lhu", "li",
"lui", "lw", "lwm", "mfhi", "mflo", "move", "movep", "not",
"nor", "or", "ori", "sb", "sh", "sll", "srl", "subu", "sw",
"swm" and "xor" instructions.
2011-08-09 14:25:29 +00:00
ea783ef3a0
include/opcode/
...
* sparc.h: Document new format codes '4', '5', and '('.
(OPF_LOW4, RS3): New macros.
opcodes/
* sparc-dis.c (v9a_ast_reg_names): Add "cps".
(X_RS3): New macro.
(print_insn_sparc): Handle '4', '5', and '(' format codes.
Accept %asr numbers below 28.
* sparc-opc.c (sparc_opcodes): Add entries for HPC and VIS3
instructions.
gas/
* config/tc-sparc.c (v9a_asr_table): Add "cps".
(sparc_ip): Handle '4', '5' and '(' format codes.
gas/testsuite
* gas/sparc/hpcvis3.d: New test.
* gas/sparc/hpcvis3.s: New test source.
* gas/sparc/sparc.exp: Run new test.
2011-08-05 16:52:50 +00:00
13077567ee
Update gas/i386/x86-64-branch.d to support win64.
...
2011-08-05 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/x86-64-branch.d: Pass -dw to objdump and support
win64.
2011-08-05 14:11:43 +00:00
cfba7fd516
Add a testcase for group error.
...
2011-08-04 H.J. Lu <hongjiu.lu@intel.com>
* gas/elf/bad-group.d: New.
* gas/elf/bad-group.err: Likewise.
* gas/elf/bad-group.s: Likewise.
* gas/elf/elf.exp: Run bad-group.
2011-08-04 20:20:11 +00:00
877807f8c4
* config/tc-arm.c (do_t_strexbh): New.
...
(insns): Update accordingly.
* gas/arm/strex-bad-t.d: New testcase.
* gas/arm/strex-bad-t.s: Likewise.
* gas/arm/strex-bad-t.l: Likewise.
* gas/arm/strex-t.s: Likewise.
* gas/arm/strex-t.d: Likewise.
2011-08-03 11:35:56 +00:00
d7921315ba
Check R_X86_64_32 overflow and allow R_X86_64_64 for x32.
...
bfd/
2011-08-01 H.J. Lu <hongjiu.lu@intel.com>
PR ld/13048
* archures.c (bfd_mach_i386_intel_syntax): New.
(bfd_mach_i386_i8086): Updated.
(bfd_mach_i386_i386): Likewise.
(bfd_mach_x86_64): Likewise.
(bfd_mach_x64_32): Likewise.
(bfd_mach_i386_i386_intel_syntax): Likewise.
(bfd_mach_x86_64_intel_syntax): Likewise.
(bfd_mach_x64_32_intel_syntax): Likewise.
(bfd_mach_l1om): Likewise.
(bfd_mach_l1om_intel_syntax): Likewise.
(bfd_mach_k1om): Likewise.
(bfd_mach_k1om_intel_syntax): Likewise.
* bfd-in2.h: Regenerated.
* cpu-i386.c (bfd_i386_compatible): Check mach instead of
bits_per_address.
(bfd_x64_32_arch_intel_syntax): Set bits_per_address to 64.
(bfd_x64_32_arch): Likewise.
* elf64-x86-64.c: Include "libiberty.h".
(x86_64_elf_howto_table): Append x32 R_X86_64_32.
(elf_x86_64_rtype_to_howto): Support x32 R_X86_64_32.
(elf_x86_64_reloc_type_lookup): Likewise.
(elf_x86_64_reloc_name_lookup): Likewise.
(elf_x86_64_relocate_section): Likewise.
(elf_x86_64_check_relocs): Allow R_X86_64_64 relocations for x32.
gas/
2011-08-01 H.J. Lu <hongjiu.lu@intel.com>
PR ld/13048
* config/tc-i386.c (handle_quad): Removed.
(md_pseudo_table): Remove "quad".
(tc_gen_reloc): Don't check BFD_RELOC_64 for disallow_64bit_reloc.
(x86_dwarf2_addr_size): New.
* config/tc-i386.h (x86_dwarf2_addr_size): New.
(DWARF2_ADDR_SIZE): Likewise.
gas/testsuite/
2011-08-01 H.J. Lu <hongjiu.lu@intel.com>
PR ld/13048
* gas/i386/ilp32/ilp32.exp: Don't run inval.
* gas/i386/ilp32/inval.l: Removed.
* gas/i386/ilp32/inval.s: Likewise.
* gas/i386/ilp32/quad.d: Expect R_X86_64_64 instead of
R_X86_64_32.
* gas/i386/ilp32/x86-64-pcrel.s: Add tests for movabs.
* gas/i386/ilp32/x86-64-pcrel.d: Updated.
ld/testsuite/
2011-08-01 H.J. Lu <hongjiu.lu@intel.com>
PR ld/13048
* ld-x86-64/ilp32-6.d: New.
* ld-x86-64/ilp32-6.s: Likewise.
* ld-x86-64/ilp32-7.d: Likewise.
* ld-x86-64/ilp32-7.s: Likewise.
* ld-x86-64/ilp32-8.d: Likewise.
* ld-x86-64/ilp32-8.s: Likewise.
* ld-x86-64/ilp32-9.d: Likewise.
* ld-x86-64/ilp32-9.s: Likewise.
* ld-x86-64/x86-64.exp: Run ilp32-6, ilp32-7, ilp32-8 and ilp32-9.
opcodes/
2011-08-01 H.J. Lu <hongjiu.lu@intel.com>
PR ld/13048
* i386-dis.c (print_insn): Optimize info->mach check.
2011-08-01 23:04:23 +00:00
00f51a41a8
Add Disp32S to 64bit call.
...
gas/testsuite/
2011-08-01 H.J. Lu <hongjiu.lu@intel.com>
PR gas/13046
* gas/i386/x86-64-branch.s: Add tests for direct branch.
* gas/i386/x86-64-branch.d: Updated.
* gas/i386/ilp32/x86-64-branch.d: Likewise.
opcodes/
2011-08-01 H.J. Lu <hongjiu.lu@intel.com>
PR gas/13046
* i386-opc.tbl: Add Disp32S to 64bit call.
* i386-tbl.h: Regenerated.
2011-08-01 19:25:48 +00:00
8c9461a4de
* gas/elf/warn-2.s: Add other types of NOP insn.
2011-07-29 11:02:40 +00:00
9aec20268e
* dwarf2dbg.c (out_debug_line): Ignore non-normal segments, with a
...
warning.
* doc/as.texinfo (Offset): Document .offset directive.
testsuite/
* gas/elf/warn-2.s: New.
2011-07-28 16:35:48 +00:00
53d780c93d
* config/tc-rx.c (md_convert_frag): Fix encoding of beq.a
...
synthetic instruction.
* gas/rx/r-bcc.d: Update expected disassembly of synthetic beq.a
instruction.
2011-07-26 14:09:36 +00:00
df58fc944d
bfd/
...
2011-02-25 Chao-ying Fu <fu@mips.com>
Ilie Garbacea <ilie@mips.com>
Maciej W. Rozycki <macro@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Catherine Moore <clm@codesourcery.com>
Richard Sandiford <rdsandiford@googlemail.com>
* archures.c (bfd_mach_mips_micromips): New macro.
* cpu-mips.c (I_micromips): New enum value.
(arch_info_struct): Add bfd_mach_mips_micromips.
* elfxx-mips.h (_bfd_mips_elf_is_target_special_symbol): New
prototype.
(_bfd_mips_elf_relax_section): Likewise.
(_bfd_mips16_elf_reloc_unshuffle): Rename to...
(_bfd_mips_elf_reloc_unshuffle): ... this. Handle microMIPS
ASE.
(_bfd_mips16_elf_reloc_shuffle): Rename to...
(_bfd_mips_elf_reloc_shuffle): ... this. Handle microMIPS ASE.
(gprel16_reloc_p): Handle microMIPS ASE.
(literal_reloc_p): New function.
* elf32-mips.c (elf_micromips_howto_table_rel): New variable.
(_bfd_mips_elf32_gprel16_reloc): Handle microMIPS ASE.
(mips16_gprel_reloc): Update for _bfd_mips_elf_reloc_unshuffle
and _bfd_mips_elf_reloc_shuffle changes.
(mips_elf_gprel32_reloc): Update comment.
(micromips_reloc_map): New variable.
(bfd_elf32_bfd_reloc_type_lookup): Handle microMIPS ASE.
(mips_elf32_rtype_to_howto): Likewise.
(mips_info_to_howto_rel): Likewise.
(bfd_elf32_bfd_is_target_special_symbol): Define.
(bfd_elf32_bfd_relax_section): Likewise.
* elf64-mips.c (micromips_elf64_howto_table_rel): New variable.
(micromips_elf64_howto_table_rela): Likewise.
(mips16_gprel_reloc): Update for _bfd_mips_elf_reloc_unshuffle
and _bfd_mips_elf_reloc_shuffle changes.
(micromips_reloc_map): Likewise.
(bfd_elf64_bfd_reloc_type_lookup): Handle microMIPS ASE.
(bfd_elf64_bfd_reloc_name_lookup): Likewise.
(mips_elf64_rtype_to_howto): Likewise.
(bfd_elf64_bfd_is_target_special_symbol): Define.
* elfn32-mips.c (elf_micromips_howto_table_rel): New variable.
(elf_micromips_howto_table_rela): Likewise.
(mips16_gprel_reloc): Update for _bfd_mips_elf_reloc_unshuffle
and _bfd_mips_elf_reloc_shuffle changes.
(micromips_reloc_map): Likewise.
(bfd_elf32_bfd_reloc_type_lookup): Handle microMIPS ASE.
(bfd_elf32_bfd_reloc_name_lookup): Likewise.
(mips_elf_n32_rtype_to_howto): Likewise.
(bfd_elf32_bfd_is_target_special_symbol): Define.
* elfxx-mips.c (LA25_LUI_MICROMIPS_1): New macro.
(LA25_LUI_MICROMIPS_2): Likewise.
(LA25_J_MICROMIPS_1, LA25_J_MICROMIPS_2): Likewise.
(LA25_ADDIU_MICROMIPS_1, LA25_ADDIU_MICROMIPS_2): Likewise.
(TLS_RELOC_P): Handle microMIPS ASE.
(mips_elf_create_stub_symbol): Adjust value of stub symbol if
target is a microMIPS function.
(micromips_reloc_p): New function.
(micromips_reloc_shuffle_p): Likewise.
(got16_reloc_p, call16_reloc_p): Handle microMIPS ASE.
(got_disp_reloc_p, got_page_reloc_p): New functions.
(got_ofst_reloc_p): Likewise.
(got_hi16_reloc_p, got_lo16_reloc_p): Likewise.
(call_hi16_reloc_p, call_lo16_reloc_p): Likewise.
(hi16_reloc_p, lo16_reloc_p, jal_reloc_p): Handle microMIPS ASE.
(micromips_branch_reloc_p): New function.
(tls_gd_reloc_p, tls_ldm_reloc_p): Likewise.
(tls_gottprel_reloc_p): Likewise.
(_bfd_mips16_elf_reloc_unshuffle): Rename to...
(_bfd_mips_elf_reloc_unshuffle): ... this. Handle microMIPS
ASE.
(_bfd_mips16_elf_reloc_shuffle): Rename to...
(_bfd_mips_elf_reloc_shuffle): ... this. Handle microMIPS ASE.
(_bfd_mips_elf_lo16_reloc): Handle microMIPS ASE.
(mips_tls_got_index, mips_elf_got_page): Likewise.
(mips_elf_create_local_got_entry): Likewise.
(mips_elf_relocation_needs_la25_stub): Likewise.
(mips_elf_calculate_relocation): Likewise.
(mips_elf_perform_relocation): Likewise.
(_bfd_mips_elf_symbol_processing): Likewise.
(_bfd_mips_elf_add_symbol_hook): Likewise.
(_bfd_mips_elf_link_output_symbol_hook): Likewise.
(mips_elf_add_lo16_rel_addend): Likewise.
(_bfd_mips_elf_check_relocs): Likewise.
(mips_elf_adjust_addend): Likewise.
(_bfd_mips_elf_relocate_section): Likewise.
(mips_elf_create_la25_stub): Likewise.
(_bfd_mips_vxworks_finish_dynamic_symbol): Likewise.
(_bfd_mips_elf_gc_sweep_hook): Likewise.
(_bfd_mips_elf_is_target_special_symbol): New function.
(mips_elf_relax_delete_bytes): Likewise.
(opcode_descriptor): New structure.
(RA): New macro.
(OP32_SREG, OP32_TREG, OP16_VALID_REG): Likewise.
(b_insns_32, bc_insn_32, bz_insn_32, bzal_insn_32): New variables.
(beq_insn_32): Likewise.
(b_insn_16, bz_insn_16): New variables.
(BZC32_REG_FIELD): New macro.
(bz_rs_insns_32, bz_rt_insns_32): New variables.
(bzc_insns_32, bz_insns_16):Likewise.
(BZ16_REG, BZ16_REG_FIELD): New macros.
(jal_insn_32_bd16, jal_insn_32_bd32): New variables.
(jal_x_insn_32_bd32): Likewise.
(j_insn_32, jalr_insn_32): Likewise.
(ds_insns_32_bd16, ds_insns_32_bd32): Likewise.
(jalr_insn_16_bd16, jalr_insn_16_bd32, jr_insn_16): Likewise.
(JR16_REG): New macro.
(ds_insns_16_bd16): New variable.
(lui_insn): Likewise.
(addiu_insn, addiupc_insn): Likewise.
(ADDIUPC_REG_FIELD): New macro.
(MOVE32_RD, MOVE32_RS): Likewise.
(MOVE16_RD_FIELD, MOVE16_RS_FIELD): Likewise.
(move_insns_32, move_insns_16): New variables.
(nop_insn_32, nop_insn_16): Likewise.
(MATCH): New macro.
(find_match): New function.
(check_br16_dslot, check_br32_dslot): Likewise.
(check_br16, check_br32): Likewise.
(IS_BITSIZE): New macro.
(check_4byte_branch): New function.
(_bfd_mips_elf_relax_section): Likewise.
(_bfd_mips_elf_merge_private_bfd_data): Disallow linking MIPS16
and microMIPS modules together.
(_bfd_mips_elf_print_private_bfd_data): Handle microMIPS ASE.
* reloc.c (BFD_RELOC_MICROMIPS_7_PCREL_S1): New relocation.
(BFD_RELOC_MICROMIPS_10_PCREL_S1): Likewise.
(BFD_RELOC_MICROMIPS_16_PCREL_S1): Likewise.
(BFD_RELOC_MICROMIPS_GPREL16): Likewise.
(BFD_RELOC_MICROMIPS_JMP, BFD_RELOC_MICROMIPS_HI16): Likewise.
(BFD_RELOC_MICROMIPS_HI16_S): Likewise.
(BFD_RELOC_MICROMIPS_LO16): Likewise.
(BFD_RELOC_MICROMIPS_LITERAL): Likewise.
(BFD_RELOC_MICROMIPS_GOT16): Likewise.
(BFD_RELOC_MICROMIPS_CALL16): Likewise.
(BFD_RELOC_MICROMIPS_GOT_HI16): Likewise.
(BFD_RELOC_MICROMIPS_GOT_LO16): Likewise.
(BFD_RELOC_MICROMIPS_CALL_HI16): Likewise.
(BFD_RELOC_MICROMIPS_CALL_LO16): Likewise.
(BFD_RELOC_MICROMIPS_SUB): Likewise.
(BFD_RELOC_MICROMIPS_GOT_PAGE): Likewise.
(BFD_RELOC_MICROMIPS_GOT_OFST): Likewise.
(BFD_RELOC_MICROMIPS_GOT_DISP): Likewise.
(BFD_RELOC_MICROMIPS_HIGHEST): Likewise.
(BFD_RELOC_MICROMIPS_HIGHER): Likewise.
(BFD_RELOC_MICROMIPS_SCN_DISP): Likewise.
(BFD_RELOC_MICROMIPS_JALR): Likewise.
(BFD_RELOC_MICROMIPS_TLS_GD): Likewise.
(BFD_RELOC_MICROMIPS_TLS_LDM): Likewise.
(BFD_RELOC_MICROMIPS_TLS_DTPREL_HI16): Likewise.
(BFD_RELOC_MICROMIPS_TLS_DTPREL_LO16): Likewise.
(BFD_RELOC_MICROMIPS_TLS_GOTTPREL): Likewise.
(BFD_RELOC_MICROMIPS_TLS_TPREL_HI16): Likewise.
(BFD_RELOC_MICROMIPS_TLS_TPREL_LO16): Likewise.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
binutils/
2011-02-25 Chao-ying Fu <fu@mips.com>
Maciej W. Rozycki <macro@codesourcery.com>
* readelf.c (get_machine_flags): Handle microMIPS ASE.
(get_mips_symbol_other): Likewise.
gas/
2011-02-25 Maciej W. Rozycki <macro@codesourcery.com>
Chao-ying Fu <fu@mips.com>
Richard Sandiford <rdsandiford@googlemail.com>
* config/tc-mips.h (mips_segment_info): Add one bit for
microMIPS.
(TC_LABEL_IS_LOCAL): New macro.
(mips_label_is_local): New prototype.
* config/tc-mips.c (S0, S7): New macros.
(emit_branch_likely_macro): New variable.
(mips_set_options): Add micromips.
(mips_opts): Initialise micromips to -1.
(file_ase_micromips): New variable.
(CPU_HAS_MICROMIPS): New macro.
(hilo_interlocks): Set for microMIPS too.
(gpr_interlocks): Likewise.
(cop_interlocks): Likewise.
(cop_mem_interlocks): Likewise.
(HAVE_CODE_COMPRESSION): New macro.
(micromips_op_hash): New variable.
(micromips_nop16_insn, micromips_nop32_insn): New variables.
(NOP_INSN): Handle microMIPS ASE.
(mips32_to_micromips_reg_b_map): New macro.
(mips32_to_micromips_reg_c_map): Likewise.
(mips32_to_micromips_reg_d_map): Likewise.
(mips32_to_micromips_reg_e_map): Likewise.
(mips32_to_micromips_reg_f_map): Likewise.
(mips32_to_micromips_reg_g_map): Likewise.
(mips32_to_micromips_reg_l_map): Likewise.
(mips32_to_micromips_reg_n_map): Likewise.
(mips32_to_micromips_reg_h_map): New variable.
(mips32_to_micromips_reg_m_map): Likewise.
(mips32_to_micromips_reg_q_map): Likewise.
(micromips_to_32_reg_h_map): New variable.
(micromips_to_32_reg_i_map): Likewise.
(micromips_to_32_reg_m_map): Likewise.
(micromips_to_32_reg_q_map): Likewise.
(micromips_to_32_reg_b_map): New macro.
(micromips_to_32_reg_c_map): Likewise.
(micromips_to_32_reg_d_map): Likewise.
(micromips_to_32_reg_e_map): Likewise.
(micromips_to_32_reg_f_map): Likewise.
(micromips_to_32_reg_g_map): Likewise.
(micromips_to_32_reg_l_map): Likewise.
(micromips_to_32_reg_n_map): Likewise.
(micromips_imm_b_map, micromips_imm_c_map): New macros.
(RELAX_DELAY_SLOT_16BIT): New macro.
(RELAX_DELAY_SLOT_SIZE_FIRST): Likewise.
(RELAX_DELAY_SLOT_SIZE_SECOND): Likewise.
(RELAX_MICROMIPS_ENCODE, RELAX_MICROMIPS_P): New macros.
(RELAX_MICROMIPS_TYPE, RELAX_MICROMIPS_AT): Likewise.
(RELAX_MICROMIPS_U16BIT, RELAX_MICROMIPS_UNCOND): Likewise.
(RELAX_MICROMIPS_COMPACT, RELAX_MICROMIPS_LINK): Likewise.
(RELAX_MICROMIPS_RELAX32, RELAX_MICROMIPS_TOOFAR16): Likewise.
(RELAX_MICROMIPS_MARK_TOOFAR16): Likewise.
(RELAX_MICROMIPS_CLEAR_TOOFAR16): Likewise.
(RELAX_MICROMIPS_TOOFAR32): Likewise.
(RELAX_MICROMIPS_MARK_TOOFAR32): Likewise.
(RELAX_MICROMIPS_CLEAR_TOOFAR32): Likewise.
(INSERT_OPERAND, EXTRACT_OPERAND): Handle microMIPS ASE.
(mips_macro_warning): Add delay_slot_16bit_p, delay_slot_32bit_p,
fsize and insns.
(mips_mark_labels): New function.
(mips16_small, mips16_ext): Remove variables, replacing with...
(forced_insn_size): ... this.
(append_insn, mips16_ip): Update accordingly.
(micromips_insn_length): New function.
(insn_length): Return the length of microMIPS instructions.
(mips_record_mips16_mode): Rename to...
(mips_record_compressed_mode): ... this. Handle microMIPS ASE.
(install_insn): Handle microMIPS ASE.
(reglist_lookup): New function.
(is_size_valid, is_delay_slot_valid): Likewise.
(md_begin): Handle microMIPS ASE.
(md_assemble): Likewise. Update for append_insn interface change.
(micromips_reloc_p): New function.
(got16_reloc_p): Handle microMIPS ASE.
(hi16_reloc_p): Likewise.
(lo16_reloc_p): Likewise.
(jmp_reloc_p): New function.
(jalr_reloc_p): Likewise.
(matching_lo_reloc): Handle microMIPS ASE.
(insn_uses_reg, reg_needs_delay): Likewise.
(mips_move_labels): Likewise.
(mips16_mark_labels): Rename to...
(mips_compressed_mark_labels): ... this. Handle microMIPS ASE.
(gpr_mod_mask): New function.
(gpr_read_mask, gpr_write_mask): Handle microMIPS ASE.
(fpr_read_mask, fpr_write_mask): Likewise.
(insns_between, nops_for_vr4130, nops_for_insn): Likewise.
(fix_loongson2f_nop, fix_loongson2f_jump): Likewise.
(MICROMIPS_LABEL_CHAR): New macro.
(micromips_target_label, micromips_target_name): New variables.
(micromips_label_name, micromips_label_expr): New functions.
(micromips_label_inc, micromips_add_label): Likewise.
(mips_label_is_local): Likewise.
(micromips_map_reloc): Likewise.
(can_swap_branch_p): Handle microMIPS ASE.
(append_insn): Add expansionp argument. Handle microMIPS ASE.
(start_noreorder, end_noreorder): Handle microMIPS ASE.
(macro_start, macro_warning, macro_end): Likewise.
(brk_fmt, cop12_fmt, jalr_fmt, lui_fmt): New variables.
(mem12_fmt, mfhl_fmt, shft_fmt, trap_fmt): Likewise.
(BRK_FMT, COP12_FMT, JALR_FMT, LUI_FMT): New macros.
(MEM12_FMT, MFHL_FMT, SHFT_FMT, TRAP_FMT): Likewise.
(macro_build): Handle microMIPS ASE. Update for append_insn
interface change.
(mips16_macro_build): Update for append_insn interface change.
(macro_build_jalr): Handle microMIPS ASE.
(macro_build_lui): Likewise. Simplify.
(load_register): Handle microMIPS ASE.
(load_address): Likewise.
(move_register): Likewise.
(macro_build_branch_likely): New function.
(macro_build_branch_ccl): Likewise.
(macro_build_branch_rs): Likewise.
(macro_build_branch_rsrt): Likewise.
(macro): Handle microMIPS ASE.
(validate_micromips_insn): New function.
(expr_const_in_range): Likewise.
(mips_ip): Handle microMIPS ASE.
(options): Add OPTION_MICROMIPS and OPTION_NO_MICROMIPS.
(md_longopts): Add mmicromips and mno-micromips.
(md_parse_option): Handle OPTION_MICROMIPS and
OPTION_NO_MICROMIPS.
(mips_after_parse_args): Handle microMIPS ASE.
(md_pcrel_from): Handle microMIPS relocations.
(mips_force_relocation): Likewise.
(md_apply_fix): Likewise.
(mips_align): Handle microMIPS ASE.
(s_mipsset): Likewise.
(s_cpload, s_cpsetup, s_cpreturn): Use relocation wrappers.
(s_dtprel_internal): Likewise.
(s_gpword, s_gpdword): Likewise.
(s_insn): Handle microMIPS ASE.
(s_mips_stab): Likewise.
(relaxed_micromips_32bit_branch_length): New function.
(relaxed_micromips_16bit_branch_length): New function.
(md_estimate_size_before_relax): Handle microMIPS ASE.
(mips_fix_adjustable): Likewise.
(tc_gen_reloc): Handle microMIPS relocations.
(mips_relax_frag): Handle microMIPS ASE.
(md_convert_frag): Likewise.
(mips_frob_file_after_relocs): Likewise.
(mips_elf_final_processing): Likewise.
(mips_nop_opcode): Likewise.
(mips_handle_align): Likewise.
(md_show_usage): Handle microMIPS options.
* symbols.c (TC_LABEL_IS_LOCAL): New macro.
(S_IS_LOCAL): Add a TC_LABEL_IS_LOCAL check.
* doc/as.texinfo (Target MIPS options): Add -mmicromips and
-mno-micromips.
(-mmicromips, -mno-micromips): New options.
* doc/c-mips.texi (-mmicromips, -mno-micromips): New options.
(MIPS ISA): Document .set micromips and .set nomicromips.
(MIPS insn): Update for microMIPS support.
gas/testsuite/
2011-02-25 Maciej W. Rozycki <macro@codesourcery.com>
Chao-ying Fu <fu@mips.com>
Richard Sandiford <rdsandiford@googlemail.com>
* gas/mips/micromips.d: New test.
* gas/mips/micromips-branch-delay.d: Likewise.
* gas/mips/micromips-branch-relax.d: Likewise.
* gas/mips/micromips-branch-relax-pic.d: Likewise.
* gas/mips/micromips-size-1.d: Likewise.
* gas/mips/micromips-trap.d: Likewise.
* gas/mips/micromips.l: New stderr output.
* gas/mips/micromips-branch-delay.l: Likewise.
* gas/mips/micromips-branch-relax.l: Likewise.
* gas/mips/micromips-branch-relax-pic.l: Likewise.
* gas/mips/micromips-size-0.l: New list test.
* gas/mips/micromips-size-1.l: New stderr output.
* gas/mips/micromips.s: New test source.
* gas/mips/micromips-branch-delay.s: Likewise.
* gas/mips/micromips-branch-relax.s: Likewise.
* gas/mips/micromips-size-0.s: Likewise.
* gas/mips/micromips-size-1.s: Likewise.
* gas/mips/mips.exp: Run the new tests.
* gas/mips/dli.s: Use .p2align.
* gas/mips/elf_ase_micromips.d: New test.
* gas/mips/elf_ase_micromips-2.d: Likewise.
* gas/mips/micromips@abs.d: Likewise.
* gas/mips/micromips@add.d: Likewise.
* gas/mips/micromips@alnv_ps-swap.d: Likewise.
* gas/mips/micromips@and.d: Likewise.
* gas/mips/micromips@beq.d: Likewise.
* gas/mips/micromips@bge.d: Likewise.
* gas/mips/micromips@bgeu.d: Likewise.
* gas/mips/micromips@blt.d: Likewise.
* gas/mips/micromips@bltu.d: Likewise.
* gas/mips/micromips@branch-likely.d: Likewise.
* gas/mips/micromips@branch-misc-1.d: Likewise.
* gas/mips/micromips@branch-misc-2-64.d: Likewise.
* gas/mips/micromips@branch-misc-2.d: Likewise.
* gas/mips/micromips@branch-misc-2pic-64.d: Likewise.
* gas/mips/micromips@branch-misc-2pic.d: Likewise.
* gas/mips/micromips@branch-misc-4-64.d: Likewise.
* gas/mips/micromips@branch-misc-4.d: Likewise.
* gas/mips/micromips@branch-self.d: Likewise.
* gas/mips/micromips@cache.d: Likewise.
* gas/mips/micromips@daddi.d: Likewise.
* gas/mips/micromips@dli.d: Likewise.
* gas/mips/micromips@elf-jal.d: Likewise.
* gas/mips/micromips@elf-rel2.d: Likewise.
* gas/mips/micromips@elfel-rel2.d: Likewise.
* gas/mips/micromips@elf-rel4.d: Likewise.
* gas/mips/micromips@jal-svr4pic.d: Likewise.
* gas/mips/micromips@jal-svr4pic-noreorder.d: Likewise.
* gas/mips/micromips@lb-svr4pic-ilocks.d: Likewise.
* gas/mips/micromips@li.d: Likewise.
* gas/mips/micromips@loc-swap-dis.d: Likewise.
* gas/mips/micromips@loc-swap.d: Likewise.
* gas/mips/micromips@mips1-fp.d: Likewise.
* gas/mips/micromips@mips32-cp2.d: Likewise.
* gas/mips/micromips@mips32-imm.d: Likewise.
* gas/mips/micromips@mips32-sf32.d: Likewise.
* gas/mips/micromips@mips32.d: Likewise.
* gas/mips/micromips@mips32r2-cp2.d: Likewise.
* gas/mips/micromips@mips32r2-fp32.d: Likewise.
* gas/mips/micromips@mips32r2-sync.d: Likewise.
* gas/mips/micromips@mips32r2.d: Likewise.
* gas/mips/micromips@mips4-branch-likely.d: Likewise.
* gas/mips/micromips@mips4-fp.d: Likewise.
* gas/mips/micromips@mips4.d: Likewise.
* gas/mips/micromips@mips5.d: Likewise.
* gas/mips/micromips@mips64-cp2.d: Likewise.
* gas/mips/micromips@mips64.d: Likewise.
* gas/mips/micromips@mips64r2.d: Likewise.
* gas/mips/micromips@pref.d: Likewise.
* gas/mips/micromips@relax-at.d: Likewise.
* gas/mips/micromips@relax.d: Likewise.
* gas/mips/micromips@rol-hw.d: Likewise.
* gas/mips/micromips@uld2-eb.d: Likewise.
* gas/mips/micromips@uld2-el.d: Likewise.
* gas/mips/micromips@ulh2-eb.d: Likewise.
* gas/mips/micromips@ulh2-el.d: Likewise.
* gas/mips/micromips@ulw2-eb-ilocks.d: Likewise.
* gas/mips/micromips@ulw2-el-ilocks.d: Likewise.
* gas/mips/cache.d: Likewise.
* gas/mips/daddi.d: Likewise.
* gas/mips/mips32-imm.d: Likewise.
* gas/mips/pref.d: Likewise.
* gas/mips/elf-rel27.d: Handle microMIPS ASE.
* gas/mips/l_d.d: Likewise.
* gas/mips/l_d-n32.d: Likewise.
* gas/mips/l_d-n64.d: Likewise.
* gas/mips/ld.d: Likewise.
* gas/mips/ld-n32.d: Likewise.
* gas/mips/ld-n64.d: Likewise.
* gas/mips/s_d.d: Likewise.
* gas/mips/s_d-n32.d: Likewise.
* gas/mips/s_d-n64.d: Likewise.
* gas/mips/sd.d: Likewise.
* gas/mips/sd-n32.d: Likewise.
* gas/mips/sd-n64.d: Likewise.
* gas/mips/mips32.d: Update immediates.
* gas/mips/micromips@mips32-cp2.s: New test source.
* gas/mips/micromips@mips32-imm.s: Likewise.
* gas/mips/micromips@mips32r2-cp2.s: Likewise.
* gas/mips/micromips@mips64-cp2.s: Likewise.
* gas/mips/cache.s: Likewise.
* gas/mips/daddi.s: Likewise.
* gas/mips/mips32-imm.s: Likewise.
* gas/mips/elf-rel4.s: Handle microMIPS ASE.
* gas/mips/lb-pic.s: Likewise.
* gas/mips/ld.s: Likewise.
* gas/mips/mips32.s: Likewise.
* gas/mips/mips.exp: Add the micromips arch. Exclude mips16e
from micromips. Run mips32-imm.
* gas/mips/jal-mask-11.d: New test.
* gas/mips/jal-mask-12.d: Likewise.
* gas/mips/micromips@jal-mask-11.d: Likewise.
* gas/mips/jal-mask-1.s: Source for the new tests.
* gas/mips/jal-mask-21.d: New test.
* gas/mips/jal-mask-22.d: Likewise.
* gas/mips/micromips@jal-mask-12.d: Likewise.
* gas/mips/jal-mask-2.s: Source for the new tests.
* gas/mips/mips.exp: Run the new tests.
* gas/mips/mips16-e.d: Add --special-syms to `objdump'.
* gas/mips/tmips16-e.d: Likewise.
* gas/mips/mipsel16-e.d: Likewise.
* gas/mips/tmipsel16-e.d: Likewise.
* gas/mips/and.s: Adjust padding.
* gas/mips/beq.s: Likewise.
* gas/mips/bge.s: Likewise.
* gas/mips/bgeu.s: Likewise.
* gas/mips/blt.s: Likewise.
* gas/mips/bltu.s: Likewise.
* gas/mips/branch-misc-2.s: Likewise.
* gas/mips/jal.s: Likewise.
* gas/mips/li.s: Likewise.
* gas/mips/mips4.s: Likewise.
* gas/mips/mips4-fp.s: Likewise.
* gas/mips/relax.s: Likewise.
* gas/mips/and.d: Update accordingly.
* gas/mips/elf-jal.d: Likewise.
* gas/mips/jal.d: Likewise.
* gas/mips/li.d: Likewise.
* gas/mips/relax-at.d: Likewise.
* gas/mips/relax.d: Likewise.
include/elf/
2011-02-25 Chao-ying Fu <fu@mips.com>
Maciej W. Rozycki <macro@codesourcery.com>
* mips.h (R_MICROMIPS_min): New relocations.
(R_MICROMIPS_26_S1): Likewise.
(R_MICROMIPS_HI16, R_MICROMIPS_LO16): Likewise.
(R_MICROMIPS_GPREL16, R_MICROMIPS_LITERAL): Likewise.
(R_MICROMIPS_GOT16, R_MICROMIPS_PC7_S1): Likewise.
(R_MICROMIPS_PC10_S1, R_MICROMIPS_PC16_S1): Likewise.
(R_MICROMIPS_CALL16, R_MICROMIPS_GOT_DISP): Likewise.
(R_MICROMIPS_GOT_PAGE, R_MICROMIPS_GOT_OFST): Likewise.
(R_MICROMIPS_GOT_HI16, R_MICROMIPS_GOT_LO16): Likewise.
(R_MICROMIPS_SUB, R_MICROMIPS_HIGHER): Likewise.
(R_MICROMIPS_HIGHEST, R_MICROMIPS_CALL_HI16): Likewise.
(R_MICROMIPS_CALL_LO16, R_MICROMIPS_SCN_DISP): Likewise.
(R_MICROMIPS_JALR, R_MICROMIPS_HI0_LO16): Likewise.
(R_MICROMIPS_TLS_GD, R_MICROMIPS_TLS_LDM): Likewise.
(R_MICROMIPS_TLS_DTPREL_HI, R_MICROMIPS_TLS_DTPREL_LO): Likewise.
(R_MICROMIPS_TLS_GOTTPREL): Likewise.
(R_MICROMIPS_TLS_TPREL_HI16): Likewise.
(R_MICROMIPS_TLS_TPREL_LO16): Likewise.
(R_MICROMIPS_GPREL7_S2, R_MICROMIPS_PC23_S2): Likewise.
(R_MICROMIPS_max): Likewise.
(EF_MIPS_ARCH_ASE_MICROMIPS): New macro.
(STO_MIPS_ISA, STO_MIPS_FLAGS): Likewise.
(ELF_ST_IS_MIPS_PLT, ELF_ST_SET_MIPS_PLT): Likewise.
(STO_MICROMIPS): Likewise.
(ELF_ST_IS_MICROMIPS, ELF_ST_SET_MICROMIPS): Likewise.
(ELF_ST_IS_COMPRESSED): Likewise.
(STO_MIPS_PLT, STO_MIPS_PIC): Rework.
(ELF_ST_IS_MIPS_PIC, ELF_ST_SET_MIPS_PIC): Likewise.
(STO_MIPS16, ELF_ST_IS_MIPS16, ELF_ST_SET_MIPS16): Likewise.
include/opcode/
2011-02-25 Chao-ying Fu <fu@mips.com>
Maciej W. Rozycki <macro@codesourcery.com>
* mips.h (OP_MASK_EXTLSB, OP_SH_EXTLSB): New macros.
(OP_MASK_STYPE, OP_SH_STYPE): Likewise.
(OP_MASK_CODE10, OP_SH_CODE10): Likewise.
(OP_MASK_TRAP, OP_SH_TRAP): Likewise.
(OP_MASK_OFFSET12, OP_SH_OFFSET12): Likewise.
(OP_MASK_OFFSET10, OP_SH_OFFSET10): Likewise.
(OP_MASK_RS3, OP_SH_RS3): Likewise.
(OP_MASK_MB, OP_SH_MB, OP_MASK_MC, OP_SH_MC): Likewise.
(OP_MASK_MD, OP_SH_MD, OP_MASK_ME, OP_SH_ME): Likewise.
(OP_MASK_MF, OP_SH_MF, OP_MASK_MG, OP_SH_MG): Likewise.
(OP_MASK_MJ, OP_SH_MJ, OP_MASK_ML, OP_SH_ML): Likewise.
(OP_MASK_MP, OP_SH_MP, OP_MASK_MQ, OP_SH_MQ): Likewise.
(OP_MASK_IMMA, OP_SH_IMMA, OP_MASK_IMMB, OP_SH_IMMB): Likewise.
(OP_MASK_IMMC, OP_SH_IMMC, OP_MASK_IMMF, OP_SH_IMMF): Likewise.
(OP_MASK_IMMG, OP_SH_IMMG, OP_MASK_IMMH, OP_SH_IMMH): Likewise.
(OP_MASK_IMMI, OP_SH_IMMI, OP_MASK_IMMJ, OP_SH_IMMJ): Likewise.
(OP_MASK_IMML, OP_SH_IMML, OP_MASK_IMMM, OP_SH_IMMM): Likewise.
(OP_MASK_IMMN, OP_SH_IMMN, OP_MASK_IMMO, OP_SH_IMMO): Likewise.
(OP_MASK_IMMP, OP_SH_IMMP, OP_MASK_IMMQ, OP_SH_IMMQ): Likewise.
(OP_MASK_IMMU, OP_SH_IMMU, OP_MASK_IMMW, OP_SH_IMMW): Likewise.
(OP_MASK_IMMX, OP_SH_IMMX, OP_MASK_IMMY, OP_SH_IMMY): Likewise.
(INSN_WRITE_GPR_S): New macro.
(INSN2_BRANCH_DELAY_16BIT, INSN2_BRANCH_DELAY_32BIT): Likewise.
(INSN2_READ_FPR_D): Likewise.
(INSN2_MOD_GPR_MB, INSN2_MOD_GPR_MC): Likewise.
(INSN2_MOD_GPR_MD, INSN2_MOD_GPR_ME): Likewise.
(INSN2_MOD_GPR_MF, INSN2_MOD_GPR_MG): Likewise.
(INSN2_MOD_GPR_MJ, INSN2_MOD_GPR_MP): Likewise.
(INSN2_MOD_GPR_MQ, INSN2_MOD_SP): Likewise.
(INSN2_READ_GPR_31, INSN2_READ_GP, INSN2_READ_PC): Likewise.
(INSN2_UNCOND_BRANCH, INSN2_COND_BRANCH): Likewise.
(INSN2_MOD_GPR_MHI, INSN2_MOD_GPR_MM, INSN2_MOD_GPR_MN): Likewise.
(CPU_MICROMIPS): New macro.
(M_BC1FL, M_BC1TL, M_BC2FL, M_BC2TL): New enum values.
(M_BEQL, M_BGEZ, M_BGEZL, M_BGEZALL, M_BGTZ, M_BGTZL): Likewise.
(M_BLEZ, M_BLEZL, M_BLTZ, M_BLTZL, M_BLTZALL, M_BNEL): Likewise.
(M_CACHE_OB, M_JALS_1, M_JALS_2, M_JALS_A): Likewise.
(M_LDC2_OB, M_LDL_OB, M_LDM_AB, M_LDM_OB): Likewise.
(M_LDP_AB, M_LDP_OB, M_LDR_OB, M_LL_OB, M_LLD_OB): Likewise.
(M_LWC2_OB, M_LWL_OB, M_LWM_AB, M_LWM_OB): Likewise.
(M_LWP_AB, M_LWP_OB, M_LWR_OB): Likewise.
(M_LWU_OB, M_PREF_OB, M_SC_OB, M_SCD_OB): Likewise.
(M_SDC2_OB, M_SDL_OB, M_SDM_AB, M_SDM_OB): Likewise.
(M_SDP_AB, M_SDP_OB, M_SDR_OB): Likewise.
(M_SWC2_OB, M_SWL_OB, M_SWM_AB, M_SWM_OB): Likewise.
(M_SWP_AB, M_SWP_OB, M_SWR_OB): Likewise.
(MICROMIPSOP_MASK_MAJOR, MICROMIPSOP_SH_MAJOR): New macros.
(MICROMIPSOP_MASK_IMMEDIATE, MICROMIPSOP_SH_IMMEDIATE): Likewise.
(MICROMIPSOP_MASK_DELTA, MICROMIPSOP_SH_DELTA): Likewise.
(MICROMIPSOP_MASK_CODE10, MICROMIPSOP_SH_CODE10): Likewise.
(MICROMIPSOP_MASK_TRAP, MICROMIPSOP_SH_TRAP): Likewise.
(MICROMIPSOP_MASK_SHAMT, MICROMIPSOP_SH_SHAMT): Likewise.
(MICROMIPSOP_MASK_TARGET, MICROMIPSOP_SH_TARGET): Likewise.
(MICROMIPSOP_MASK_EXTLSB, MICROMIPSOP_SH_EXTLSB): Likewise.
(MICROMIPSOP_MASK_EXTMSBD, MICROMIPSOP_SH_EXTMSBD): Likewise.
(MICROMIPSOP_MASK_INSMSB, MICROMIPSOP_SH_INSMSB): Likewise.
(MICROMIPSOP_MASK_CODE, MICROMIPSOP_SH_CODE): Likewise.
(MICROMIPSOP_MASK_CODE2, MICROMIPSOP_SH_CODE2): Likewise.
(MICROMIPSOP_MASK_CACHE, MICROMIPSOP_SH_CACHE): Likewise.
(MICROMIPSOP_MASK_SEL, MICROMIPSOP_SH_SEL): Likewise.
(MICROMIPSOP_MASK_OFFSET12, MICROMIPSOP_SH_OFFSET12): Likewise.
(MICROMIPSOP_MASK_3BITPOS, MICROMIPSOP_SH_3BITPOS): Likewise.
(MICROMIPSOP_MASK_STYPE, MICROMIPSOP_SH_STYPE): Likewise.
(MICROMIPSOP_MASK_OFFSET10, MICROMIPSOP_SH_OFFSET10): Likewise.
(MICROMIPSOP_MASK_RS, MICROMIPSOP_SH_RS): Likewise.
(MICROMIPSOP_MASK_RT, MICROMIPSOP_SH_RT): Likewise.
(MICROMIPSOP_MASK_RD, MICROMIPSOP_SH_RD): Likewise.
(MICROMIPSOP_MASK_FS, MICROMIPSOP_SH_FS): Likewise.
(MICROMIPSOP_MASK_FT, MICROMIPSOP_SH_FT): Likewise.
(MICROMIPSOP_MASK_FD, MICROMIPSOP_SH_FD): Likewise.
(MICROMIPSOP_MASK_FR, MICROMIPSOP_SH_FR): Likewise.
(MICROMIPSOP_MASK_RS3, MICROMIPSOP_SH_RS3): Likewise.
(MICROMIPSOP_MASK_PREFX, MICROMIPSOP_SH_PREFX): Likewise.
(MICROMIPSOP_MASK_BCC, MICROMIPSOP_SH_BCC): Likewise.
(MICROMIPSOP_MASK_CCC, MICROMIPSOP_SH_CCC): Likewise.
(MICROMIPSOP_MASK_COPZ, MICROMIPSOP_SH_COPZ): Likewise.
(MICROMIPSOP_MASK_MB, MICROMIPSOP_SH_MB): Likewise.
(MICROMIPSOP_MASK_MC, MICROMIPSOP_SH_MC): Likewise.
(MICROMIPSOP_MASK_MD, MICROMIPSOP_SH_MD): Likewise.
(MICROMIPSOP_MASK_ME, MICROMIPSOP_SH_ME): Likewise.
(MICROMIPSOP_MASK_MF, MICROMIPSOP_SH_MF): Likewise.
(MICROMIPSOP_MASK_MG, MICROMIPSOP_SH_MG): Likewise.
(MICROMIPSOP_MASK_MH, MICROMIPSOP_SH_MH): Likewise.
(MICROMIPSOP_MASK_MI, MICROMIPSOP_SH_MI): Likewise.
(MICROMIPSOP_MASK_MJ, MICROMIPSOP_SH_MJ): Likewise.
(MICROMIPSOP_MASK_ML, MICROMIPSOP_SH_ML): Likewise.
(MICROMIPSOP_MASK_MM, MICROMIPSOP_SH_MM): Likewise.
(MICROMIPSOP_MASK_MN, MICROMIPSOP_SH_MN): Likewise.
(MICROMIPSOP_MASK_MP, MICROMIPSOP_SH_MP): Likewise.
(MICROMIPSOP_MASK_MQ, MICROMIPSOP_SH_MQ): Likewise.
(MICROMIPSOP_MASK_IMMA, MICROMIPSOP_SH_IMMA): Likewise.
(MICROMIPSOP_MASK_IMMB, MICROMIPSOP_SH_IMMB): Likewise.
(MICROMIPSOP_MASK_IMMC, MICROMIPSOP_SH_IMMC): Likewise.
(MICROMIPSOP_MASK_IMMD, MICROMIPSOP_SH_IMMD): Likewise.
(MICROMIPSOP_MASK_IMME, MICROMIPSOP_SH_IMME): Likewise.
(MICROMIPSOP_MASK_IMMF, MICROMIPSOP_SH_IMMF): Likewise.
(MICROMIPSOP_MASK_IMMG, MICROMIPSOP_SH_IMMG): Likewise.
(MICROMIPSOP_MASK_IMMH, MICROMIPSOP_SH_IMMH): Likewise.
(MICROMIPSOP_MASK_IMMI, MICROMIPSOP_SH_IMMI): Likewise.
(MICROMIPSOP_MASK_IMMJ, MICROMIPSOP_SH_IMMJ): Likewise.
(MICROMIPSOP_MASK_IMML, MICROMIPSOP_SH_IMML): Likewise.
(MICROMIPSOP_MASK_IMMM, MICROMIPSOP_SH_IMMM): Likewise.
(MICROMIPSOP_MASK_IMMN, MICROMIPSOP_SH_IMMN): Likewise.
(MICROMIPSOP_MASK_IMMO, MICROMIPSOP_SH_IMMO): Likewise.
(MICROMIPSOP_MASK_IMMP, MICROMIPSOP_SH_IMMP): Likewise.
(MICROMIPSOP_MASK_IMMQ, MICROMIPSOP_SH_IMMQ): Likewise.
(MICROMIPSOP_MASK_IMMU, MICROMIPSOP_SH_IMMU): Likewise.
(MICROMIPSOP_MASK_IMMW, MICROMIPSOP_SH_IMMW): Likewise.
(MICROMIPSOP_MASK_IMMX, MICROMIPSOP_SH_IMMX): Likewise.
(MICROMIPSOP_MASK_IMMY, MICROMIPSOP_SH_IMMY): Likewise.
(MICROMIPSOP_MASK_CODE, MICROMIPSOP_SH_CODE): Likewise.
(MICROMIPSOP_MASK_CODE2, MICROMIPSOP_SH_CODE2): Likewise.
(MICROMIPSOP_MASK_CACHE, MICROMIPSOP_SH_CACHE): Likewise.
(MICROMIPSOP_MASK_CODE20, MICROMIPSOP_SH_CODE20): Likewise.
(MICROMIPSOP_MASK_PERFREG, MICROMIPSOP_SH_PERFREG): Likewise.
(MICROMIPSOP_MASK_CODE19, MICROMIPSOP_SH_CODE19): Likewise.
(MICROMIPSOP_MASK_ALN, MICROMIPSOP_SH_ALN): Likewise.
(MICROMIPSOP_MASK_VECBYTE, MICROMIPSOP_SH_VECBYTE): Likewise.
(MICROMIPSOP_MASK_VECALIGN, MICROMIPSOP_SH_VECALIGN): Likewise.
(MICROMIPSOP_MASK_DSPACC, MICROMIPSOP_SH_DSPACC): Likewise.
(MICROMIPSOP_MASK_DSPACC_S, MICROMIPSOP_SH_DSPACC_S): Likewise.
(MICROMIPSOP_MASK_DSPSFT, MICROMIPSOP_SH_DSPSFT): Likewise.
(MICROMIPSOP_MASK_DSPSFT_7, MICROMIPSOP_SH_DSPSFT_7): Likewise.
(MICROMIPSOP_MASK_SA3, MICROMIPSOP_SH_SA3): Likewise.
(MICROMIPSOP_MASK_SA4, MICROMIPSOP_SH_SA4): Likewise.
(MICROMIPSOP_MASK_IMM8, MICROMIPSOP_SH_IMM8): Likewise.
(MICROMIPSOP_MASK_IMM10, MICROMIPSOP_SH_IMM10): Likewise.
(MICROMIPSOP_MASK_WRDSP, MICROMIPSOP_SH_WRDSP): Likewise.
(MICROMIPSOP_MASK_RDDSP, MICROMIPSOP_SH_RDDSP): Likewise.
(MICROMIPSOP_MASK_BP, MICROMIPSOP_SH_BP): Likewise.
(MICROMIPSOP_MASK_MT_U, MICROMIPSOP_SH_MT_U): Likewise.
(MICROMIPSOP_MASK_MT_H, MICROMIPSOP_SH_MT_H): Likewise.
(MICROMIPSOP_MASK_MTACC_T, MICROMIPSOP_SH_MTACC_T): Likewise.
(MICROMIPSOP_MASK_MTACC_D, MICROMIPSOP_SH_MTACC_D): Likewise.
(MICROMIPSOP_MASK_BBITIND, MICROMIPSOP_SH_BBITIND): Likewise.
(MICROMIPSOP_MASK_CINSPOS, MICROMIPSOP_SH_CINSPOS): Likewise.
(MICROMIPSOP_MASK_CINSLM1, MICROMIPSOP_SH_CINSLM1): Likewise.
(MICROMIPSOP_MASK_SEQI, MICROMIPSOP_SH_SEQI): Likewise.
(micromips_opcodes): New declaration.
(bfd_micromips_num_opcodes): Likewise.
ld/testsuite/
2011-02-25 Catherine Moore <clm@codesourcery.com>
Chao-ying Fu <fu@mips.com>
Maciej W. Rozycki <macro@codesourcery.com>
* lib/ld-lib.exp (run_dump_test): Support distinct assembler
flags for the same source named multiple times.
* ld-mips-elf/jalx-1.s: New test source.
* ld-mips-elf/jalx-1.d: New test output.
* ld-mips-elf/jalx-1.ld: New test linker script.
* ld-mips-elf/jalx-2-main.s: New test source.
* ld-mips-elf/jalx-2-ex.s: Likewise.
* ld-mips-elf/jalx-2-printf.s: Likewise.
* ld-mips-elf/jalx-2.dd: New test output.
* ld-mips-elf/jalx-2.ld: New test linker script.
* ld-mips-elf/mips16-and-micromips.d: New test.
* ld-mips-elf/mips-elf.exp: Run the new tests
opcodes/
2011-02-25 Chao-ying Fu <fu@mips.com>
Maciej W. Rozycki <macro@codesourcery.com>
* micromips-opc.c: New file.
* mips-dis.c (micromips_to_32_reg_b_map): New array.
(micromips_to_32_reg_c_map, micromips_to_32_reg_d_map): Likewise.
(micromips_to_32_reg_e_map, micromips_to_32_reg_f_map): Likewise.
(micromips_to_32_reg_g_map, micromips_to_32_reg_l_map): Likewise.
(micromips_to_32_reg_q_map): Likewise.
(micromips_imm_b_map, micromips_imm_c_map): Likewise.
(micromips_ase): New variable.
(is_micromips): New function.
(set_default_mips_dis_options): Handle microMIPS ASE.
(print_insn_micromips): New function.
(is_compressed_mode_p): Likewise.
(_print_insn_mips): Handle microMIPS instructions.
* Makefile.am (CFILES): Add micromips-opc.c.
* configure.in (bfd_mips_arch): Add micromips-opc.lo.
* Makefile.in: Regenerate.
* configure: Regenerate.
* mips-dis.c (micromips_to_32_reg_h_map): New variable.
(micromips_to_32_reg_i_map): Likewise.
(micromips_to_32_reg_m_map): Likewise.
(micromips_to_32_reg_n_map): New macro.
2011-07-24 14:20:15 +00:00
7a9068fe16
Add initial Intel K1OM support.
...
bfd/
2011-07-22 H.J. Lu <hongjiu.lu@intel.com>
* Makefile.am (ALL_MACHINES): Add cpu-k1om.lo.
(ALL_MACHINES_CFILES): Add cpu-k1om.c.
* Makefile.in: Regenerated.
* archures.c (bfd_architecture): Add bfd_arch_k1om.
(bfd_k1om_arch): New.
(bfd_archures_list): Add &bfd_k1om_arch.
* bfd-in2.h: Regenerated.
* config.bfd (targ64_selvecs): Add bfd_elf64_k1om_vec if
bfd_elf64_x86_64_vec is supported. Add bfd_elf64_k1om_freebsd_vec
if bfd_elf64_x86_64_freebsd_vec is supported.
(targ_selvecs): Likewise.
* configure.in: Support bfd_elf64_k1om_vec and
bfd_elf64_k1om_freebsd_vec.
* configure: Regenerated.
* cpu-k1om.c: New.
* elf64-x86-64.c (elf64_k1om_elf_object_p): New.
(bfd_elf64_k1om_vec): Likewise.
(bfd_elf64_k1om_freebsd_vec): Likewise.
* targets.c (bfd_elf64_k1om_vec): New.
(bfd_elf64_k1om_freebsd_vec): Likewise.
(_bfd_target_vector): Add bfd_elf64_k1om_vec and
bfd_elf64_k1om_freebsd_vec.
binutils/
2011-07-22 H.J. Lu <hongjiu.lu@intel.com>
* dwarf.c (init_dwarf_regnames): Handle EM_K1OM.
* elfedit.c (elf_machine): Support EM_K1OM.
(elf_class): Likewise.
* readelf.c (guess_is_rela): Handle EM_K1OM.
(dump_relocations): Likewise.
(get_machine_name): Likewise.
(get_section_type_name): Likewise.
(get_elf_section_flags): Likewise.
(process_section_headers): Likewise.
(get_symbol_index_type): Likewise.
(is_32bit_abs_reloc): Likewise.
(is_32bit_pcrel_reloc): Likewise.
(is_64bit_abs_reloc): Likewise.
(is_64bit_pcrel_reloc): Likewise.
(is_none_reloc): Likewise.
* doc/binutils.texi: Mention K1OM for elfedit.
binutils/testsuite/
2011-07-22 H.J. Lu <hongjiu.lu@intel.com>
* binutils-all/elfedit.exp: Run elfedit-4.
* binutils-all/elfedit-4.d: New.
gas/
2011-07-22 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (cpu_arch): Add k1om.
(i386_align_code): Handle PROCESSOR_K1OM.
(check_cpu_arch_compatible): Check EM_K1OM.
(i386_arch): Handle Intel K1OM.
(i386_mach): Return bfd_mach_k1om for Intel K1OM.
(i386_target_format): Return ELF_TARGET_K1OM_FORMAT for Intel
K1OM.
* config/tc-i386.h (ELF_TARGET_K1OM_FORMAT): New.
(processor_type): Add PROCESSOR_K1OM.
* doc/c-i386.texi: Document k1om.
gas/testsuite/
2011-07-22 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/k1om.d: New.
* gas/i386/k1om-inval.l: Likewise.
* gas/i386/k1om-inval.s: Likewise.
* gas/i386/i386.exp: Run k1om-inval and k1om.
include/elf/
2011-07-22 H.J. Lu <hongjiu.lu@intel.com>
* common.h (EM_K1OM): New.
ld/
2011-07-22 H.J. Lu <hongjiu.lu@intel.com>
* Makefile.am (ALL_64_EMULATIONS): Add eelf_k1om.o and
eelf_k1om_fbsd.o
(eelf_k1om.c): New.
(eelf_k1om_fbsd.c): Likewise.
* Makefile.in: Regenerated.
* configure.tgt (targ64_extra_emuls): Add elf_k1om if elf_x86_64
is supported. Add elf_k1om_fbsd if elf_x86_64_fbsd is supported.
(targ_extra_emuls): Likewise.
* emulparams/elf_k1om.sh: New.
* emulparams/elf_k1om_fbsd.sh: Likewise.
ld/testsuite/
2011-07-22 H.J. Lu <hongjiu.lu@intel.com>
* ld-x86-64/abs-k1om.d: New.
* ld-x86-64/protected2-k1om.d: Likewise.
* ld-x86-64/protected3-k1om.d: Likewise.
* ld-x86-64/x86-64.exp: Run abs-k1om, protected2-k1om and
protected3-k1om.
opcodes/
2011-07-22 H.J. Lu <hongjiu.lu@intel.com>
* configure.in: Handle bfd_k1om_arch.
* configure: Regenerated.
* disassemble.c (disassembler): Handle bfd_k1om_arch.
* i386-dis.c (print_insn): Handle bfd_mach_k1om and
bfd_mach_k1om_intel_syntax.
* i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to
~(CpuL1OM|CpuK1OM). Add CPU_K1OM_FLAGS.
(cpu_flags): Add CpuK1OM.
* i386-opc.h (CpuK1OM): New.
(i386_cpu_flags): Add cpuk1om.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2011-07-22 20:22:38 +00:00
97fd0b2f39
* gas/mips/loc-swap.s: Add file missing from a previous commit.
2011-07-04 22:48:42 +00:00
e3a82c8e75
gas/
...
* config/tc-mips.c (append_insn): Make sure DWARF-2 location
information is properly adjusted for branches that get swapped.
gas/testsuite/
* gas/mips/loc-swap.d: New test case for DWARF-2 location with
branch swapping.
* gas/mips/loc-swap-dis.d: Likewise.
* gas/mips/mips16@loc-swap.d: Likewise, MIPS16 version.
* gas/mips/mips16@loc-swap-dis.d: Likewise.
* gas/mips/loc-swap.s: Source for the new tests.
* gas/mips/mips.exp: Run the new tests.
2011-07-04 19:27:28 +00:00
4cb0953da2
Fix rorx in BMI2.
...
gas/testsuite/
2011-06-30 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2011)
* gas/i386/bmi2.s: Correct rorx tests.
* gas/i386/x86-64-bmi2.s: Likewise.
* gas/i386/bmi2-intel.d: Updated.
* gas/i386/bmi2.d: Likewise.
* gas/i386/x86-64-bmi2-intel.d: Likewise.
* gas/i386/x86-64-bmi2.d: Likewise.
opcodes/
2011-06-30 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2011)
* i386-dis.c (vex_len_table): Correct rorxS.
* i386-opc.tbl: Correct rorx.
* i386-tbl.h: Regenerated.
2011-06-30 15:44:55 +00:00
5f4cb1986d
* gas/arm/addthumb2err.s: New test file.
...
* gas/arm/addthumb2err.d: Test control file.
* gas/arm/addthumb2err.l: Expected error messages.
* config/tc-arm.c (do_t_add_sub): Only allow LSL shifts of less
than 4 in Thumb mode.
2011-06-30 13:42:46 +00:00
68246214df
PR gas/12931
...
* gas/arm/blx-bad.d: Add exrta nop at end of disassembly.
* gas/arm/inst-po-be.d: Add exrta nop at end of disassembly.
* gas/arm/inst-po.d: Add exrta nop at end of disassembly.
2011-06-30 13:07:21 +00:00
f1d0450fe0
PR 12848
...
* gas/arm/thumb-b-bad.s: New test.
* gas/arm/thumb-b-bad.d: Test control file.
* gas/arm/thumb-b-bad.l: Expected error output.
2011-06-30 13:05:04 +00:00
4c26037942
gas/
...
* config/tc-mips.c (insn_uses_reg): Delete.
(gpr_read_mask, gpr_write_mask): New functions.
(fpr_read_mask, fpr_write_mask): Likewise.
(insns_between, nops_for_vr4130, append_insn): Use them.
gas/testsuite/
* gas/mips/mips16-e.d, gas/mips/mips16-f.d,
gas/mips/mipsel16-e.d, gas/mips/mipsel16-f.d,
gas/mips/tmips16-e.d, gas/mips/tmips16-f.d,
gas/mips/tmipsel16-e.d, gas/mips/tmipsel16-f.d: Fix GPR mask.
* gas/mips/reginfo-1.s, gas/mips/reginfo-1a.d,
gas/mips/reginfo-1b.d: New tests.
* gas/mips/mips.exp: Run them.
2011-06-29 20:39:00 +00:00
02b1ab82d7
gas/
...
* config/tc-mips.c (md_mips_end): Call mips_emit_delays.
gas/testsuite/
* gas/mips/24k-triple-stores-9.d: Add -z to dump options and
explicitly match one nop.
* gas/mips/24k-triple-stores-10.d: Likewise.
* gas/mips/24k-triple-stores-11.d: Likewise.
* gas/mips/lifloat.d: Likewise.
* gas/mips/trunc.d: Likewise 1 extra nop.
* gas/mips/vr4111.d: Likewise 2 nops.
2011-06-29 20:35:05 +00:00
cec256b1fc
Remove previous patch, committed in error.
2011-06-26 09:19:17 +00:00
96124ee0cf
gas/
...
* config/tc-mips.c (insn_uses_reg): Delete.
(gpr_read_mask, gpr_write_mask): New functions.
(fpr_read_mask, fpr_write_mask): Likewise.
(insns_between, nops_for_vr4130, append_insn): Use them.
gas/testsuite/
* gas/mips/mips16-e.d, gas/mips/mips16-f.d,
gas/mips/mipsel16-e.d, gas/mips/mipsel16-f.d,
gas/mips/tmips16-e.d, gas/mips/tmips16-f.d,
gas/mips/tmipsel16-e.d, gas/mips/tmipsel16-f.d: Fix GPR mask.
2011-06-26 09:16:35 +00:00
ab9794cf6a
gas/
...
* config/tc-mips.c (fix_24k_record_store_info): If the previous
instruction was a store, and the next instructions are unknown,
assume the worst.
gas/testsuite/
* gas/mips/24k-branch-delay-1.d: Do not allow stores to be put
into delay slots.
* gas/mips/24k-triple-stores-1.d: Put the first nop after the
second store, rather than the first.
* gas/mips/24k-triple-stores-2.d: Likewise.
* gas/mips/24k-triple-stores-4.d: Likewise.
* gas/mips/24k-triple-stores-8.d: Likewise.
* gas/mips/24k-triple-stores-3.d: Remove first nop.
* gas/mips/24k-triple-stores-5.d: Likewise.
* gas/mips/24k-triple-stores-6.d: Likewise.
* gas/mips/24k-triple-stores-7.d: Likewise.
* gas/mips/24k-triple-stores-9.d: Add a nop after the second store.
Expect a nop at the end.
* gas/mips/24k-triple-stores-10.d: Put the first nop after the
second store, rather than the first. Expect a nop at the end.
2011-06-26 08:32:50 +00:00
932d1a1b03
gas/
...
PR gas/12915
* config/tc-mips.c (nops_for_vr4130, nops_for_24k, nops_for_insn)
(nops_for_sequence, nops_for_insn_or_target): Add ignore parameters.
(mips_emit_delays, start_noreorder): Update accordingly.
(append_insn): Likewise. Revert original fix for this PR
and use the ignore parameter instead.
gas/testsuite/
* gas/mips/vr4130.s: Add some more ".set noreorder" tests.
* gas/mips/vr4130.d: Update accordingly.
2011-06-25 10:11:46 +00:00
f77ef3e29a
gas/
...
PR gas/12915
* config/tc-mips.c (append_insn): Only consider hazards between the
pre-noreorder block and ip.
gas/testsuite/
* gas/mips/pr12915.s, gas/mips/pr12915.d: New test.
* gas/mips/mips.exp: Run it.
2011-06-23 20:21:38 +00:00
5f1af56b76
2011-06-21 Sameera Deshpande <sameera.deshpande@arm.com>
...
* gas/config/tc-arm.c (vfp_conv): Add check on range of immediate operand
in vcvt instruction between floating-point and fixed-point.
(operand_parse_code): Add "OP_oI32z".
(parse_operands): OP_oI32z case added.
* gas/testsuite/gas/arm/vcvt-bad.d: New test.
* gas/testsuite/gas/arm/vcvt-bad.l: Likewise.
* gas/testsuite/gas/arm/vcvt-bad.s: Likewise.
* gas/testsuite/gas/arm/vcvt.d: Likewise.
* gas/testsuite/gas/arm/vcvt.s: Likewise.
2011-06-21 15:34:27 +00:00
2fb4b302aa
gas/
...
2011-06-14 Tristan Gingold <gingold@adacore.com>
* config/tc-ppc.h (struct ppc_tc_sy): Complete comment on within.
(tc_new_dot_label): Define.
(ppc_new_dot_label): Declare.
* config/tc-ppc.c (ppc_frob_label): Set within target field.
(ppc_fix_adjustable): Use this field to adjust the reloc.
(ppc_new_dot_label): New function.
gas/testsuite/
2011-06-14 Tristan Gingold <gingold@adacore.com>
* gas/ppc/test1xcoff32.d: Adjust for csect anchor.
2011-06-14 09:03:52 +00:00
aa137e4d51
* Makefile.am (ALL_MACHINES): Add cpu-tilegx.lo and cpu-tilepro.lo.
...
(ALL_MACHINE_CFILES): Add cpu-tilegx.c and cpu-tilepro.c.
(BFD32_BACKENDS): Add elf32-tilegx.lo, elf32-tilepro.lo,
and elfxx-tilegx.lo.
(BFD32_BACKENDS_CFILES): Add elf32-tilegx.c elf32-tilepro.c, and
elfxx-tilegx.c.
(BFD64_BACKENDS): Add elf64-tilegx.lo.
(BFD64_BACKENDS_CFILES): Add elf64-tilegx.c.
* Makefile.in: Regenerate.
* arctures.c (bfd_architecture): Define bfd_arch_tilepro,
bfd_arch_tilegx, bfd_mach_tilepro, bfd_mach_tilegx.
(bfd_arch_info): Add bfd_tilegx_arch, bfd_tilepro_arch.
(bfd_archures_list): Add bfd_tilegx_arch, bfd_tilepro_arch.
bfd-in2.h: Regenerate.
* config.bfd: Handle tilegx-*-* and tilepro-*-*.
* configure.in: Handle bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec,
and bfd_elf64_tilegx_vec.
* configure: Regenerate.
* elf-bfd.h (enum elf_target_id): Define TILEGX_ELF_DATA and
TILEPRO_ELF_DATA.
* libbfd.h: Regenerate.
* reloc.c: Add BFD_RELOC_TILEPRO_{COPY, GLOB_DAT, JMP_SLOT,
RELATIVE, BROFF_X1, JOFFLONG_X1, JOFFLONG_X1_PLT, IMM8_X0,
IMM8_Y0, IMM8_X1, IMM8_Y1, DEST_IMM8_X1, MT_IMM15_X1, MF_IMM15_X1,
IMM16_X0, IMM16_X1, IMM16_X0_LO, IMM16_X1_LO, IMM16_X0_HI,
IMM16_X1_HI, IMM16_X0_HA, IMM16_X1_HA, IMM16_X0_PCREL,
IMM16_X1_PCREL, IMM16_X0_LO_PCREL, IMM16_X1_LO_PCREL,
IMM16_X0_HI_PCREL, IMM16_X1_HI_PCREL, IMM16_X0_HA_PCREL,
IMM16_X1_HA_PCREL, IMM16_X0_GOT, IMM16_X1_GOT, IMM16_X0_GOT_LO,
IMM16_X1_GOT_LO, IMM16_X0_GOT_HI, IMM16_X1_GOT_HI,
IMM16_X0_GOT_HA, IMM16_X1_GOT_HA, MMSTART_X0, MMEND_X0,
MMSTART_X1, MMEND_X1, SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1,
IMM16_X0_TLS_GD, IMM16_X1_TLS_GD, IMM16_X0_TLS_GD_LO,
IMM16_X1_TLS_GD_LO, IMM16_X0_TLS_GD_HI, IMM16_X1_TLS_GD_HI,
IMM16_X0_TLS_GD_HA, IMM16_X1_TLS_GD_HA, IMM16_X0_TLS_IE,
IMM16_X1_TLS_IE, IMM16_X0_TLS_IE_LO, IMM16_X1_TLS_IE_LO,
IMM16_X0_TLS_IE_HI, IMM16_X1_TLS_IE_HI, IMM16_X0_TLS_IE_HA,
IMM16_X1_TLS_IE_HA, TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32}
Add BFD_RELOC_TILEGX_{HW0, HW1, HW2, HW3, HW0_LAST, HW1_LAST,
HW2_LAST, COPY, GLOB_DAT, JMP_SLOT, RELATIVE, BROFF_X1,
JUMPOFF_X1, JUMPOFF_X1_PLT, IMM8_X0, IMM8_Y0, IMM8_X1, IMM8_Y1,
DEST_IMM8_X1, MT_IMM14_X1, MF_IMM14_X1, MMSTART_X0, MMEND_X0,
SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1, IMM16_X0_HW0,
IMM16_X1_HW0, IMM16_X0_HW1, IMM16_X1_HW1, IMM16_X0_HW2,
IMM16_X1_HW2, IMM16_X0_HW3, IMM16_X1_HW3, IMM16_X0_HW0_LAST,
IMM16_X1_HW0_LAST, IMM16_X0_HW1_LAST, IMM16_X1_HW1_LAST,
IMM16_X0_HW2_LAST, IMM16_X1_HW2_LAST, IMM16_X0_HW0_PCREL,
IMM16_X1_HW0_PCREL, IMM16_X0_HW1_PCREL, IMM16_X1_HW1_PCREL,
IMM16_X0_HW2_PCREL, IMM16_X1_HW2_PCREL, IMM16_X0_HW3_PCREL,
IMM16_X1_HW3_PCREL, IMM16_X0_HW0_LAST_PCREL,
IMM16_X1_HW0_LAST_PCREL, IMM16_X0_HW1_LAST_PCREL,
IMM16_X1_HW1_LAST_PCREL, IMM16_X0_HW2_LAST_PCREL,
IMM16_X1_HW2_LAST_PCREL, IMM16_X0_HW0_GOT, IMM16_X1_HW0_GOT,
IMM16_X0_HW1_GOT, IMM16_X1_HW1_GOT, IMM16_X0_HW2_GOT,
IMM16_X1_HW2_GOT, IMM16_X0_HW3_GOT, IMM16_X1_HW3_GOT,
IMM16_X0_HW0_LAST_GOT, IMM16_X1_HW0_LAST_GOT,
IMM16_X0_HW1_LAST_GOT, IMM16_X1_HW1_LAST_GOT,
IMM16_X0_HW2_LAST_GOT, IMM16_X1_HW2_LAST_GOT, IMM16_X0_HW0_TLS_GD,
IMM16_X1_HW0_TLS_GD, IMM16_X0_HW1_TLS_GD, IMM16_X1_HW1_TLS_GD,
IMM16_X0_HW2_TLS_GD, IMM16_X1_HW2_TLS_GD, IMM16_X0_HW3_TLS_GD,
IMM16_X1_HW3_TLS_GD, IMM16_X0_HW0_LAST_TLS_GD,
IMM16_X1_HW0_LAST_TLS_GD, IMM16_X0_HW1_LAST_TLS_GD,
IMM16_X1_HW1_LAST_TLS_GD, IMM16_X0_HW2_LAST_TLS_GD,
IMM16_X1_HW2_LAST_TLS_GD, IMM16_X0_HW0_TLS_IE,
IMM16_X1_HW0_TLS_IE, IMM16_X0_HW1_TLS_IE, IMM16_X1_HW1_TLS_IE,
IMM16_X0_HW2_TLS_IE, IMM16_X1_HW2_TLS_IE, IMM16_X0_HW3_TLS_IE,
IMM16_X1_HW3_TLS_IE, IMM16_X0_HW0_LAST_TLS_IE,
IMM16_X1_HW0_LAST_TLS_IE, IMM16_X0_HW1_LAST_TLS_IE,
IMM16_X1_HW1_LAST_TLS_IE, IMM16_X0_HW2_LAST_TLS_IE,
IMM16_X1_HW2_LAST_TLS_IE, TLS_DTPMOD64, TLS_DTPOFF64, TLS_TPOFF64,
TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32}
* targets.c (bfd_elf32_tilegx_vec): Declare.
(bfd_elf32_tilepro_vec): Declare.
(bfd_elf64_tilegx_vec): Declare.
(bfd_target_vector): Add bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec,
and bfd_elf64_tilegx_vec.
* cpu-tilegx.c: New file.
* cpu-tilepro.c: New file.
* elf32-tilepro.h: New file.
* elf32-tilepro.c: New file.
* elf32-tilegx.c: New file.
* elf32-tilegx.h: New file.
* elf64-tilegx.c: New file.
* elf64-tilegx.h: New file.
* elfxx-tilegx.c: New file.
* elfxx-tilegx.h: New file.
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-tilegx.c and
config/tc-tilepro.c.
(TARGET_CPU_HFILES): Add config/tc-tilegx.h and
config/tc-tilepro.h.
* Makefile.in: Regenerate.
* configure.tgt (tilepro-*-*): New.
(tilegx-*-*): Likewise.
* config/tc-tilegx.c: New file.
* config/tc-tilegx.h: Likewise.
* config/tc-tilepro.h: Likewise.
* config/tc-tilepro.c: Likewise.
* doc/Makefile.am (CPU_DOCS): Add c-tilegx.texi and
c-tilepro.texi.
* doc/Makefile.in: Regenerate.
* doc/all.texi (TILEGX): Define.
(TILEPRO): Define.
* doc/as.texinfo: Add Tile-Gx and TILEPro documentation. Include
c-tilegx.texi and c-tilepro.texi.
* doc/c-tilegx.texi: New.
* doc/c-tilepro.texi: New.
* gas/tilepro/t_constants.s: New file.
* gas/tilepro/t_constants.d: Likewise.
* gas/tilepro/t_insns.s: Likewise.
* gas/tilepro/tilepro.exp: Likewise.
* gas/tilepro/t_insns.d: Likewise.
* gas/tilegx/tilegx.exp: Likewise.
* gas/tilegx/t_insns.d: Likewise.
* gas/tilegx/t_insns.s: Likewise.
* dis-asm.h (print_insn_tilegx): Declare.
(print_insn_tilepro): Likewise.
* tilegx.h: New file.
* tilepro.h: New file.
* common.h: Add EM_TILEGX.
* tilegx.h: New file.
* tilepro.h: New file.
* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32tilegx.c and
eelf32tilepro.c.
(ALL_64_EMULATION_SOURCES): Add eelf64tilegx.c.
(eelf32tilegx.c): New target.
(eelf32tilepro.c): Likewise.
(eelf64tilegx.c): Likewise.
* Makefile.in: Regenerate.
* configure.tgt: Handle tilegx-*-* and tilepro-*-*.
* emulparams/elf32tilegx.sh: New file.
* emulparams/elf64tilegx.sh: New file.
* emulparams/elf32tilepro.sh: New file.
* ld-elf/eh5.d: Don't run on tile*.
* ld-srec/srec.exp: xfail on tile*.
* ld-tilegx/external.s: New file.
* ld-tilegx/reloc.d: New file.
* ld-tilegx/reloc.s: New file.
* ld-tilegx/tilegx.exp: New file.
* ld-tilepro/external.s: New file.
* ld-tilepro/reloc.d: New file.
* ld-tilepro/reloc.s: New file.
* ld-tilepro/tilepro.exp: New file.
* Makefile.am (TARGET_LIBOPCODES_CFILES): Add tilegx-dis.c,
tilegx-opc.c, tilepro-dis.c, and tilepro-opc.c.
* Makefile.in: Regenerate.
* configure.in: Handle bfd_tilegx_arch and bfd_tilepro_arch.
* configure: Regenerate.
* disassemble.c (disassembler): Add ARCH_tilegx and ARCH_tilepro.
* po/POTFILES.in: Regenerate.
* tilegx-dis.c: New file.
* tilegx-opc.c: New file.
* tilepro-dis.c: New file.
* tilepro-opc.c: New file.
2011-06-13 15:18:54 +00:00
af199b0601
PR gas/12854
...
Add additional checks for extraneous shifts and extra tests in the testsuite.
2011-06-13 12:50:18 +00:00
94342ec38b
PR gas/12854
...
* gas/arm/shift-bad.s: New test.
* gas/arm/shift-bad.l: Expcted error output.
* gas/arm/shift-bad.s: New control file.
* config/tc-arm.c (do_shift): Do not allow shift operations at the
end of a register based shift insn.
(do_t_shift): Likewise.
2011-06-13 09:57:35 +00:00
551497ed0e
Update lzcnt testcases.
...
2011-06-12 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/arch-10-lzcnt.d: Updated.
* gas/i386/x86-64-arch-2-lzcnt.d: Likewise.
2011-06-13 02:41:24 +00:00
6c30d220f1
Support AVX Programming Reference (June, 2011).
...
gas/
2011-06-10 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2011)
* config/tc-i386.c (i386_error): Add invalid_vsib_address and
unsupported_vector_index_register.
(cpu_arch): Add .avx2, .bmi2, .lzcnt and .invpcid.
(check_VecOperands): New.
(match_template): Call check_VecOperands. Handle
invalid_vsib_address and unsupported_vector_index_register.
(build_modrm_byte): Support VecSIB. Check register-only source
operand when two source operands are swapped.
(i386_index_check): Allow Xmm/Ymm index registers.
* doc/c-i386.texi: Document avx2/.avx2, bmi2/.bmi2, lzcnt/.lzcnt
and invpcid./invpcid.
gas/testsuite/
2011-06-10 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2011)
* gas/i386/arch-10-1.l: Updated.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/arch-10.s: Add LZCNT to comments.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/arch-10-lzcnt.d: New.
* gas/i386/avx-gather-intel.d: Likewise.
* gas/i386/avx-gather.d: Likewise.
* gas/i386/avx-gather.s: Likewise.
* gas/i386/avx2-intel.d: Likewise.
* gas/i386/avx2.d: Likewise.
* gas/i386/avx2.s: Likewise
* gas/i386/avx256int-intel.d: Likewise.
* gas/i386/avx256int.d: Likewise.
* gas/i386/avx256int.s: Likewise.
* gas/i386/bmi2-intel.d: Likewise.
* gas/i386/bmi2.d: Likewise.
* gas/i386/bmi2.s: Likewise.
* gas/i386/inval-invpcid.l:Likewise.
* gas/i386/inval-invpcid.s: Likewise.
* gas/i386/invpcid-intel.d: Likewise.
* gas/i386/invpcid.d: Likewise.
* gas/i386/invpcid.s: Likewise.
* gas/i386/x86-64-arch-2-lzcnt.d: Likewise.
* gas/i386/x86-64-avx-gather-intel.d: Likewise.
* gas/i386/x86-64-avx-gather.d: Likewise.
* gas/i386/x86-64-avx-gather.s: Likewise.
* gas/i386/x86-64-avx2-intel.d: Likewise.
* gas/i386/x86-64-avx2.d: Likewise.
* gas/i386/x86-64-avx2.s: Likewise.
* gas/i386/x86-64-avx256int-intel.d: Likewise.
* gas/i386/x86-64-avx256int.d: Likewise.
* gas/i386/x86-64-avx256int.s: Likewise.
* gas/i386/x86-64-bmi2-intel.d: Likewise.
* gas/i386/x86-64-bmi2.d: Likewise.
* gas/i386/x86-64-bmi2.s: Likewise.
* gas/i386/x86-64-inval-invpcid.l: Likewise.
* gas/i386/x86-64-inval-invpcid.s: Likewise.
* gas/i386/x86-64-invpcid-intel.d: Likewise.
* gas/i386/x86-64-invpcid.d: Likewise.
* gas/i386/x86-64-invpcid.s: Likewise.
opcodes/
2011-06-10 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2011)
* i386-dis.c (XMGatherQ): New.
* i386-dis.c (EXxmm_mb): New.
(EXxmm_mb): Likewise.
(EXxmm_mw): Likewise.
(EXxmm_md): Likewise.
(EXxmm_mq): Likewise.
(EXxmmdw): Likewise.
(EXxmmqd): Likewise.
(VexGatherQ): Likewise.
(MVexVSIBDWpX): Likewise.
(MVexVSIBQWpX): Likewise.
(xmm_mb_mode): Likewise.
(xmm_mw_mode): Likewise.
(xmm_md_mode): Likewise.
(xmm_mq_mode): Likewise.
(xmmdw_mode): Likewise.
(xmmqd_mode): Likewise.
(ymmxmm_mode): Likewise.
(vex_vsib_d_w_dq_mode): Likewise.
(vex_vsib_q_w_dq_mode): Likewise.
(MOD_VEX_0F385A_PREFIX_2): Likewise.
(MOD_VEX_0F388C_PREFIX_2): Likewise.
(MOD_VEX_0F388E_PREFIX_2): Likewise.
(PREFIX_0F3882): Likewise.
(PREFIX_VEX_0F3816): Likewise.
(PREFIX_VEX_0F3836): Likewise.
(PREFIX_VEX_0F3845): Likewise.
(PREFIX_VEX_0F3846): Likewise.
(PREFIX_VEX_0F3847): Likewise.
(PREFIX_VEX_0F3858): Likewise.
(PREFIX_VEX_0F3859): Likewise.
(PREFIX_VEX_0F385A): Likewise.
(PREFIX_VEX_0F3878): Likewise.
(PREFIX_VEX_0F3879): Likewise.
(PREFIX_VEX_0F388C): Likewise.
(PREFIX_VEX_0F388E): Likewise.
(PREFIX_VEX_0F3890..PREFIX_VEX_0F3893): Likewise.
(PREFIX_VEX_0F38F5): Likewise.
(PREFIX_VEX_0F38F6): Likewise.
(PREFIX_VEX_0F3A00): Likewise.
(PREFIX_VEX_0F3A01): Likewise.
(PREFIX_VEX_0F3A02): Likewise.
(PREFIX_VEX_0F3A38): Likewise.
(PREFIX_VEX_0F3A39): Likewise.
(PREFIX_VEX_0F3A46): Likewise.
(PREFIX_VEX_0F3AF0): Likewise.
(VEX_LEN_0F3816_P_2): Likewise.
(VEX_LEN_0F3819_P_2): Likewise.
(VEX_LEN_0F3836_P_2): Likewise.
(VEX_LEN_0F385A_P_2_M_0): Likewise.
(VEX_LEN_0F38F5_P_0): Likewise.
(VEX_LEN_0F38F5_P_1): Likewise.
(VEX_LEN_0F38F5_P_3): Likewise.
(VEX_LEN_0F38F6_P_3): Likewise.
(VEX_LEN_0F38F7_P_1): Likewise.
(VEX_LEN_0F38F7_P_2): Likewise.
(VEX_LEN_0F38F7_P_3): Likewise.
(VEX_LEN_0F3A00_P_2): Likewise.
(VEX_LEN_0F3A01_P_2): Likewise.
(VEX_LEN_0F3A38_P_2): Likewise.
(VEX_LEN_0F3A39_P_2): Likewise.
(VEX_LEN_0F3A46_P_2): Likewise.
(VEX_LEN_0F3AF0_P_3): Likewise.
(VEX_W_0F3816_P_2): Likewise.
(VEX_W_0F3818_P_2): Likewise.
(VEX_W_0F3819_P_2): Likewise.
(VEX_W_0F3836_P_2): Likewise.
(VEX_W_0F3846_P_2): Likewise.
(VEX_W_0F3858_P_2): Likewise.
(VEX_W_0F3859_P_2): Likewise.
(VEX_W_0F385A_P_2_M_0): Likewise.
(VEX_W_0F3878_P_2): Likewise.
(VEX_W_0F3879_P_2): Likewise.
(VEX_W_0F3A00_P_2): Likewise.
(VEX_W_0F3A01_P_2): Likewise.
(VEX_W_0F3A02_P_2): Likewise.
(VEX_W_0F3A38_P_2): Likewise.
(VEX_W_0F3A39_P_2): Likewise.
(VEX_W_0F3A46_P_2): Likewise.
(MOD_VEX_0F3818_PREFIX_2): Removed.
(MOD_VEX_0F3819_PREFIX_2): Likewise.
(VEX_LEN_0F60_P_2..VEX_LEN_0F6D_P_2): Likewise.
(VEX_LEN_0F70_P_1..VEX_LEN_0F76_P_2): Likewise.
(VEX_LEN_0FD1_P_2..VEX_LEN_0FD5_P_2): Likewise.
(VEX_LEN_0FD7_P_2_M_1..VEX_LEN_0F3819_P_2_M_0): Likewise.
(VEX_LEN_0F381C_P_2..VEX_LEN_0F3840_P_2): Likewise.
(VEX_LEN_0F3A0E_P_2): Likewise.
(VEX_LEN_0F3A0F_P_2): Likewise.
(VEX_LEN_0F3A42_P_2): Likewise.
(VEX_LEN_0F3A4C_P_2): Likewise.
(VEX_W_0F3818_P_2_M_0): Likewise.
(VEX_W_0F3819_P_2_M_0): Likewise.
(prefix_table): Updated.
(three_byte_table): Likewise.
(vex_table): Likewise.
(vex_len_table): Likewise.
(vex_w_table): Likewise.
(mod_table): Likewise.
(putop): Handle "LW".
(intel_operand_size): Handle xmm_mb_mode, xmm_mw_mode,
xmm_md_mode, xmm_mq_mode, xmmdw_mode, xmmqd_mode, ymmxmm_mode,
vex_vsib_d_w_dq_mode, vex_vsib_q_w_dq_mode.
(OP_EX): Likewise.
(OP_E_memory): Handle vex_vsib_d_w_dq_mode and
vex_vsib_q_w_dq_mode.
(OP_XMM): Handle vex_vsib_q_w_dq_mode.
(OP_VEX): Likewise.
* i386-gen.c (cpu_flag_init): Add CpuAVX2 to CPU_ANY_SSE_FLAGS
and CPU_ANY_AVX_FLAGS. Add CPU_BMI2_FLAGS, CPU_LZCNT_FLAGS,
CPU_INVPCID_FLAGS and CPU_AVX2_FLAGS.
(cpu_flags): Add CpuAVX2, CpuBMI2, CpuLZCNT and CpuINVPCID.
(opcode_modifiers): Add VecSIB.
* i386-opc.h (CpuAVX2): New.
(CpuBMI2): Likewise.
(CpuLZCNT): Likewise.
(CpuINVPCID): Likewise.
(VecSIB128): Likewise.
(VecSIB256): Likewise.
(VecSIB): Likewise.
(i386_cpu_flags): Add cpuavx2, cpubmi2, cpulzcnt and cpuinvpcid.
(i386_opcode_modifier): Add vecsib.
* i386-opc.tbl: Add invpcid, AVX2 and BMI2 instructions.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2011-06-10 21:27:40 +00:00
c56791bbad
2011-06-09 James Greenhalgh <james.greenhalgh@arm.com>
...
* config/tc-arm.c (do_ldrd): Warn in unpredictable cases.
2011-06-09 James Greenhalgh <james.greenhalgh@arm.com>
* gas/arm/ldrd-unpredicatble.d: New testcase.
* gas/arm/ldrd-unpredicatble.s: Likewise.
* gas/arm/ldrd-unpredicatble.l: Likewise.
2011-06-09 09:59:34 +00:00
26d97720ed
gas/
...
* config/tc-arm.c (parse_address_main): Handle -0 offsets.
(encode_arm_addr_mode_2): Set default sign of zero here ...
(encode_arm_addr_mode_3): ... and here.
(encode_arm_cp_address): ... and here.
(md_apply_fix): Use default sign of zero here.
gas/testsuite/
* gas/arm/inst.d: Adjust for signed zero offsets.
* gas/arm/ldst-offset0.d: New test.
* gas/arm/ldst-offset0.s: New test.
* gas/arm/offset-1.d: New test.
* gas/arm/offset-1.s: New test.
ld/testsuite/
Adjust tests for zero offset formatting.
* ld-arm/cortex-a8-fix-bcc-plt.d: Adjust.
* ld-arm/farcall-arm-arm-pic-veneer.d: Adjust.
* ld-arm/farcall-arm-thumb.d: Adjust.
* ld-arm/farcall-group-size2.d: Adjust.
* ld-arm/farcall-group.d: Adjust.
* ld-arm/farcall-mix.d: Adjust.
* ld-arm/farcall-mix2.d: Adjust.
* ld-arm/farcall-mixed-lib-v4t.d: Adjust.
* ld-arm/farcall-mixed-lib.d: Adjust.
* ld-arm/farcall-thumb-arm-blx-pic-veneer.d: Adjust.
* ld-arm/farcall-thumb-arm-pic-veneer.d: Adjust.
* ld-arm/farcall-thumb-thumb.d: Adjust.
* ld-arm/ifunc-10.dd: Adjust.
* ld-arm/ifunc-3.dd: Adjust.
* ld-arm/ifunc-4.dd: Adjust.
* ld-arm/ifunc-5.dd: Adjust.
* ld-arm/ifunc-6.dd: Adjust.
* ld-arm/ifunc-7.dd: Adjust.
* ld-arm/ifunc-8.dd: Adjust.
* ld-arm/jump-reloc-veneers-long.d: Adjust.
* ld-arm/tls-longplt-lib.d: Adjust.
* ld-arm/tls-thumb1.d: Adjust.
opcodes/
* arm-dis.c (print_insn_coprocessor): Explicitly print #-0
as address offset.
(print_arm_address): Likewise. Elide positive #0 appropriately.
(print_insn_arm): Likewise.
2011-06-02 15:32:10 +00:00
3b2f079304
2011-05-31 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (arm_cpus): Add Cortex-R5.
(arm_extensions): Allow idiv on ARMv7-R.
* doc/c-arm.text: Update idiv extension restrictions.
gas/testsuite/
* gas/arm/arm-idiv-bad.d: New test.
* gas/arm/arm-idiv-bad.s: New test.
* gas/arm/arm-idiv-bad.l: New test.
* gas/arm/arm-idiv.d: New test.
* gas/arm/arm-idiv.s: New test.
include/
* opcode/arm.h (ARM_ARCH_V7R_IDIV): Define.
2011-05-31 14:12:55 +00:00
b58843019a
2011-05-31 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (arm_force_relocation): Resolve all pc-relative
loads.
gas/testsuite/
* gas/arm/ldr-global.d: New test.
* gas/arm/ldr-global.s: New test.
2011-05-31 14:10:07 +00:00
10960bfbce
2011-05-31 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (do_t_branch): Avoid relaxing branches to constant
addresses.
gas/testsuite/
* arm/t2-branch-global.d: New test.
* arm/t2-branch-global.s: New test.
2011-05-31 14:04:13 +00:00
c8fa16ed5a
2011-05-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
...
* config/tc-s390.c (md_gather_operands): Fix check for floating
register pair operands.
2011-05-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* opcode/s390.h: Replace S390_OPERAND_REG_EVEN with
S390_OPERAND_REG_PAIR.
2011-05-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* s390-opc.c: Replace S390_OPERAND_REG_EVEN with
S390_OPERAND_REG_PAIR. Fix INSTR_RRF_0UFEF instruction type.
* s390-opc.txt: Fix cxr instruction type.
2011-05-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* gas/s390/esa-g5.d: Fix fp register pair operands.
* gas/s390/esa-g5.s: Likewise.
* gas/s390/zarch-z196.d: Likewise.
* gas/s390/zarch-z196.s: Likewise.
* gas/s390/zarch-z9-109.d: Likewise.
* gas/s390/zarch-z9-109.s: Likewise.
* gas/s390/zarch-z9-ec.d: Likewise.
* gas/s390/zarch-z9-ec.s: Likewise.
2011-05-24 16:13:31 +00:00
5e4b319cdc
2011-05-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
...
* config/tc-s390.c (md_gather_operands): Emit an error for odd
numbered registers used as register pair operand.
2011-05-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* opcode/s390.h: Add S390_OPCODE_REG_EVEN flag.
2011-05-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* s390-opc.c: Add new instruction types marking register pair
operands.
* s390-opc.txt: Match instructions having register pair operands
to the new instruction types.
2011-05-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* gas/s390/esa-g5.d: Fix register pair operands.
* gas/s390/esa-g5.s: Likewise.
* gas/s390/esa-z9-109.d: Likewise.
* gas/s390/esa-z9-109.s: Likewise.
* gas/s390/zarch-z196.d: Likewise.
* gas/s390/zarch-z196.s: Likewise.
* gas/s390/zarch-z9-109.d: Likewise.
* gas/s390/zarch-z9-109.s: Likewise.
* gas/s390/zarch-z900.d: Likewise.
* gas/s390/zarch-z900.s: Likewise.
* gas/s390/zarch-z990.d: Likewise.
* gas/s390/zarch-z990.s: Likewise.
2011-05-24 13:33:57 +00:00
Ulrich Weigand
Michael Eager
Maciej W. Rozycki
Alan Modra
Iain Sandoe
Andreas Krebbel
Christian Groessler
Roland McGrath
Peter Bergner
Yufeng Zhang
Dave Anglin
Richard Earnshaw
Nagajyothi Eggone
Nick Clifton
H.J. Lu
Richard Sandiford
Hans-Peter Nilsson
Matthew Gretton-Dann
David S. Miller
Jan Beulich
James Lemke
Sean Keys
Sandra Loosemore
Andreas Schwab
Arnold Metselaar
DJ Delorie
Kai Tietz
Tristan Gingold
Jie Zhang
Andrew Pinski
Julian Brown
Nathan Sidwell
Paul Brook