Commit Graph

185 Commits

Author SHA1 Message Date
Tristan Gingold 15e6ed8cbf Regenerate pot files. 2017-07-03 17:02:01 +02:00
Pip Cet 62ecb94c4a Add support for disassembling WebAssembly opcodes.
include	* dis-asm.h: Add prototypes for wasm32 disassembler.

opcodes	* Makefile.am: Add wasm32-dis.c.
	* configure.ac: Add wasm32-dis.c to wasm32 target.
	* disassemble.c: Add wasm32 disassembler code.
	* wasm32-dis.c: New file.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
	* po/POTFILES.in: Regenerate.
	* po/opcodes.pot: Regenerate.

gas	* testsuite/gas/wasm32/allinsn.d: Adjust test for disassembler
	changes.
	* testsuite/gas/wasm32/disass.d: New test.
	* testsuite/gas/wasm32/disass.s: New test.
	* testsuite/gas/wasm32/disass-2.d: New test.
	* testsuite/gas/wasm32/disass-2.s: New test.
	* testsuite/gas/wasm32/reloc.d: Adjust test for changed reloc
	names.
	* testsuite/gas/wasm32/reloc.s: Update test for changed assembler
	syntax.
	* testsuite/gas/wasm32/wasm32.exp: Run new tests.  Expect allinsn
	test to succeed.
2017-04-06 17:20:02 +01:00
Pip Cet f96bd6c2d7 Add support for the WebAssembly file format and the wasm32 ELF conversion to gas and the binutils.
binutils * readelf.c: Add support for wasm32 ELF format WebAssembly files.
	(guess_is_rela): Likewise.
	(dump_relocations): Likewise.
	(is_32bit_abs_reloc): Likewise.
	(is_none_reloc_): Likewise.
	* NEWS: Mention the new support.
	* testsuite/lib/binutils-common.exp (is_elf_format): Mark wasm32
	as ELF target.
	(supports_gnu_unique): Mark wasm32 as supporting STB_GNU_UNIQUE.
	* testsuite/binutils-all/nm.exp: Mark wasm32 as requiring .size annotations.
	* testsuite/binutils-all/wasm32: New directory.
	* testsuite/binutils-all/wasm32/create-wasm.d: New file.
	* testsuite/binutils-all/wasm32/create-wasm.s: Likewise.
	* testsuite/binutils-all/wasm32/custom-section.d: Likewise.
	* testsuite/binutils-all/wasm32/custom-section.s: Likewise.
	* testsuite/binutils-all/wasm32/invalid-wasm-1.d: Likewise.
	* testsuite/binutils-all/wasm32/invalid-wasm-1.s: Likewise.
	* testsuite/binutils-all/wasm32/long-sections.d: Likewise.
	* testsuite/binutils-all/wasm32/long-sections.s: Likewise.
	* testsuite/binutils-all/wasm32/parse-wasm.d: Likewise.
	* testsuite/binutils-all/wasm32/parse-wasm.s: Likewise.
	* testsuite/binutils-all/wasm32/parse-wasm-2.d: Likewise.
	* testsuite/binutils-all/wasm32/parse-wasm-2.s: Likewise.
	* testsuite/binutils-all/wasm32/prepared-section.d: Likewise.
	* testsuite/binutils-all/wasm32/prepared-section.s: Likewise.
	* testsuite/binutils-all/wasm32/wasm32.exp: New file, run tests.

gas	* config/tc-wasm32.h: New file: Add WebAssembly assembler target.
	* config/tc-wasm32.c: New file: Add WebAssembly assembler target.
	* Makefile.am: Add WebAssembly assembler target.
	* configure.tgt: Add WebAssembly assembler target.
	* doc/c-wasm32.texi: New file: Start documenting WebAssembly
	assembler.
	* doc/all.texi: Define WASM32.
	* doc/as.texinfo: Add WebAssembly entries.
	* NEWS: Mention the new support.
	* Makefile.in: Regenerate.
	* po/gas.pot: Regenerate.
	* po/POTFILES.in: Regenerate.
	* testsuite/gas/wasm32: New directory.
	* testsuite/gas/wasm32/allinsn.d: New file.
	* testsuite/gas/wasm32/allinsn.s: New file.
	* testsuite/gas/wasm32/illegal.l: New file.
	* testsuite/gas/wasm32/illegal.s: New file.
	* testsuite/gas/wasm32/illegal-2.l: New file.
	* testsuite/gas/wasm32/illegal-2.s: New file.
	* testsuite/gas/wasm32/illegal-3.l: New file.
	* testsuite/gas/wasm32/illegal-3.s: New file.
	* testsuite/gas/wasm32/illegal-4.l: New file.
	* testsuite/gas/wasm32/illegal-4.s: New file.
	* testsuite/gas/wasm32/illegal-5.l: New file.
	* testsuite/gas/wasm32/illegal-5.s: New file.
	* testsuite/gas/wasm32/illegal-6.l: New file.
	* testsuite/gas/wasm32/illegal-6.s: New file.
	* testsuite/gas/wasm32/illegal-7.l: New file.
	* testsuite/gas/wasm32/illegal-7.s: New file.
	* testsuite/gas/wasm32/illegal-8.l: New file.
	* testsuite/gas/wasm32/illegal-8.s: New file.
	* testsuite/gas/wasm32/illegal-9.l: New file.
	* testsuite/gas/wasm32/illegal-9.s: New file.
	* testsuite/gas/wasm32/illegal-10.l: New file.
	* testsuite/gas/wasm32/illegal-10.s: New file.
	* testsuite/gas/wasm32/illegal-11.l: New file.
	* testsuite/gas/wasm32/illegal-11.s: New file.
	* testsuite/gas/wasm32/illegal-12.l: New file.
	* testsuite/gas/wasm32/illegal-12.s: New file.
	* testsuite/gas/wasm32/illegal-13.l: New file.
	* testsuite/gas/wasm32/illegal-13.s: New file.
	* testsuite/gas/wasm32/illegal-14.l: New file.
	* testsuite/gas/wasm32/illegal-14.s: New file.
	* testsuite/gas/wasm32/illegal-15.l: New file.
	* testsuite/gas/wasm32/illegal-15.s: New file.
	* testsuite/gas/wasm32/illegal-16.l: New file.
	* testsuite/gas/wasm32/illegal-16.s: New file.
	* testsuite/gas/wasm32/illegal-17.l: New file.
	* testsuite/gas/wasm32/illegal-17.s: New file.
	* testsuite/gas/wasm32/illegal-18.l: New file.
	* testsuite/gas/wasm32/illegal-18.s: New file.
	* testsuite/gas/wasm32/illegal-19.l: New file.
	* testsuite/gas/wasm32/illegal-19.s: New file.
	* testsuite/gas/wasm32/illegal-20.l: New file.
	* testsuite/gas/wasm32/illegal-20.s: New file.
	* testsuite/gas/wasm32/illegal-21.l: New file.
	* testsuite/gas/wasm32/illegal-21.s: New file.
	* testsuite/gas/wasm32/illegal-22.l: New file.
	* testsuite/gas/wasm32/illegal-22.s: New file.
	* testsuite/gas/wasm32/illegal-24.l: New file.
	* testsuite/gas/wasm32/illegal-24.s: New file.
	* testsuite/gas/wasm32/illegal-25.l: New file.
	* testsuite/gas/wasm32/illegal-25.s: New file.
	* testsuite/gas/wasm32/reloc.d: New file.
	* testsuite/gas/wasm32/reloc.s: New file.
	* testsuite/gas/wasm32/wasm32.exp: New tests for WebAssembly
	architecture.

opcodes * configure.ac: Add (empty) bfd_wasm32_arch target.
	* configure: Regenerate
	* po/opcodes.pot: Regenerate.

include	* opcode/wasm.h: New file to support wasm32 architecture.
	* elf/wasm32.h: Add R_WASM32_32 relocation.

bfd	* elf32-wasm32.c: Add relocation code, two relocs.
	* reloc.c: Add wasm32 relocations.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Regenerate.
	* bfd/po/bfd.pot: Regenerate.
2017-03-30 10:57:21 +01:00
Peter Bergner 65b48a8140 GDB: Add support for the new set/show disassembler-options commands.
This commit adds support to GDB so that it can modify the disassembler-options
value that is passed to the disassembler, similar to objdump's -M option.
Currently, the only supported targets are ARM, PowerPC and S/390, but
adding support for a new target(s) is not difficult.

include/
	* dis-asm.h (disasm_options_t): New typedef.
	(parse_arm_disassembler_option): Remove prototype.
	(set_arm_regname_option): Likewise.
	(get_arm_regnames): Likewise.
	(get_arm_regname_num_options): Likewise.
	(disassemble_init_s390): New prototype.
	(disassembler_options_powerpc): Likewise.
	(disassembler_options_arm): Likewise.
	(disassembler_options_s390): Likewise.
	(remove_whitespace_and_extra_commas): Likewise.
	(disassembler_options_cmp): Likewise.
	(next_disassembler_option): New inline function.
	(FOR_EACH_DISASSEMBLER_OPTION): New macro.

opcodes/
	* disassemble.c Include "safe-ctype.h".
	(disassemble_init_for_target): Handle s390 init.
	(remove_whitespace_and_extra_commas): New function.
	(disassembler_options_cmp): Likewise.
	* arm-dis.c: Include "libiberty.h".
	(NUM_ELEM): Delete.
	(regnames): Use long disassembler style names.
	Add force-thumb and no-force-thumb options.
	(NUM_ARM_REGNAMES): Rename from this...
	(NUM_ARM_OPTIONS): ...to this.  Use ARRAY_SIZE.
	(get_arm_regname_num_options): Delete.
	(set_arm_regname_option): Likewise.
	(get_arm_regnames): Likewise.
	(parse_disassembler_options): Likewise.
	(parse_arm_disassembler_option): Rename from this...
	(parse_arm_disassembler_options): ...to this.  Make static.
	Use new FOR_EACH_DISASSEMBLER_OPTION macro to scan over options.
	(print_insn): Use parse_arm_disassembler_options.
	(disassembler_options_arm): New function.
	(print_arm_disassembler_options): Handle updated regnames.
	* ppc-dis.c: Include "libiberty.h".
	(ppc_opts): Add "32" and "64" entries.
	(ppc_parse_cpu): Use ARRAY_SIZE and disassembler_options_cmp.
	(powerpc_init_dialect): Add break to switch statement.
	Use new FOR_EACH_DISASSEMBLER_OPTION macro.
	(disassembler_options_powerpc): New function.
	(print_ppc_disassembler_options): Use ARRAY_SIZE.
	Remove printing of "32" and "64".
	* s390-dis.c: Include "libiberty.h".
	(init_flag): Remove unneeded variable.
	(struct s390_options_t): New structure type.
	(options): New structure.
	(init_disasm): Rename from this...
	(disassemble_init_s390): ...to this.  Add initializations for
	current_arch_mask and option_use_insn_len_bits_p.  Remove init_flag.
	(print_insn_s390): Delete call to init_disasm.
	(disassembler_options_s390): New function.
	(print_s390_disassembler_options): Print using information from
	struct 'options'.
	* po/opcodes.pot: Regenerate.

binutils/
	* objdump.c (main): Use remove_whitespace_and_extra_commas.

gdb/
	* NEWS: Mention new set/show disassembler-options commands.
	* doc/gdb.texinfo: Document new set/show disassembler-options commands.
	* disasm.c: Include "arch-utils.h", "gdbcmd.h" and "safe-ctype.h".
	(prospective_options): New static variable.
	(gdb_disassembler::gdb_disassembler): Initialize
	m_di.disassembler_options.
	(gdb_buffered_insn_length_init_dis): Initilize di->disassembler_options.
	(get_disassembler_options): New function.
	(set_disassembler_options): Likewise.
	(set_disassembler_options_sfunc): Likewise.
	(show_disassembler_options_sfunc): Likewise.
	(disassembler_options_completer): Likewise.
	(_initialize_disasm): Likewise.
	* disasm.h (get_disassembler_options): New prototype.
	(set_disassembler_options): Likewise.
	* gdbarch.sh (gdbarch_disassembler_options): New variable.
	(gdbarch_verify_disassembler_options): Likewise.
	* gdbarch.c: Regenerate.
	* gdbarch.h: Likewise.
	* arm-tdep.c (num_disassembly_options): Delete.
	(set_disassembly_style): Likewise.
	(arm_disassembler_options): New static variable.
	(set_disassembly_style_sfunc): Convert short style name into long
	option name.  Call set_disassembler_options.
	(show_disassembly_style_sfunc): New function.
	(arm_gdbarch_init): Call set_gdbarch_disassembler_options and
	set_gdbarch_verify_disassembler_options.
	(_initialize_arm_tdep): Delete regnames variable and update callers.
	(arm_disassembler_options): Initialize.
	(disasm_options): New variable.
	(num_disassembly_options): Rename from this...
	(num_disassembly_styles): ...to this.  Compute by scanning through
	disasm_options.
	(valid_disassembly_styles): Initialize using disasm_options.
	Remove calls to parse_arm_disassembler_option, get_arm_regnames and
	set_arm_regname_option.
	Pass show_disassembly_style_sfunc to the "disassembler" setshow command.
	* rs6000-tdep.c (powerpc_disassembler_options): New static variable.
	(rs6000_gdbarch_init): Call set_gdbarch_disassembler_options and
	set_gdbarch_verify_disassembler_options.
	* s390-tdep.c (s390_disassembler_options): New static variable.
	(s390_gdbarch_init):all set_gdbarch_disassembler_options and
	set_gdbarch_verify_disassembler_options.

gdb/testsuite/
	* gdb.arch/powerpc-power.exp: Delete test.
	* gdb.arch/powerpc-power.s: Likewise.
	* gdb.disasm/disassembler-options.exp: New test.
	* gdb.arch/powerpc-altivec.exp: Likewise.
	* gdb.arch/powerpc-altivec.s: Likewise.
	* gdb.arch/powerpc-altivec2.exp: Likewise.
	* gdb.arch/powerpc-altivec2.s: Likewise.
	* gdb.arch/powerpc-altivec3.exp: Likewise.
	* gdb.arch/powerpc-altivec3.s: Likewise.
	* gdb.arch/powerpc-power7.exp: Likewise.
	* gdb.arch/powerpc-power7.s: Likewise.
	* gdb.arch/powerpc-power8.exp: Likewise.
	* gdb.arch/powerpc-power8.s: Likewise.
	* gdb.arch/powerpc-power9.exp: Likewise.
	* gdb.arch/powerpc-power9.s: Likewise.
	* gdb.arch/powerpc-vsx.exp: Likewise.
	* gdb.arch/powerpc-vsx.s: Likewise.
	* gdb.arch/powerpc-vsx2.exp: Likewise.
	* gdb.arch/powerpc-vsx2.s: Likewise.
	* gdb.arch/powerpc-vsx3.exp: Likewise.
	* gdb.arch/powerpc-vsx3.s: Likewise.
	* gdb.arch/arm-disassembler-options.exp: Likewise.
	* gdb.arch/powerpc-disassembler-options.exp: Likewise.
	* gdb.arch/s390-disassembler-options.exp: Likewise.
2017-02-28 12:32:07 -06:00
Nick Clifton add3afb219 Updated Irish translation for the opcodes library.
* po/ga.po: Updated Irish translation.
2017-01-20 12:25:07 +00:00
Nick Clifton f90c58d593 Add new Serbian translation for the opcodes library.
* po/sr.po: New Serbian translation.
	* configure.ac (ALL_LINGUAS): Add sr.
	* configure: Regenerate.
2017-01-03 15:51:11 +00:00
Alan Modra 2571583aed Update year range in copyright notice of all files. 2017-01-02 14:08:56 +10:30
Dimitar Dimitrov 1114684964 PRU Opcode Port
opcodes/
	* Makefile.am: Add PRU source files.
	* configure.ac: Add PRU target.
	* disassemble.c (disassembler): Register PRU arch.
	* pru-dis.c: New file.
	* pru-opc.c: New file.
	* Makefile.in: Regenerate.
	* configure: Regenerate.

Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>
2016-12-31 12:02:50 +10:30
Tristan Gingold e0e7a9d436 Regenerate pot files. 2016-12-23 09:32:28 +01:00
Alan Modra dd1d944e23 Add opcodes RISC-V dependencies
* Makefile.am (TARGET_LIBOPCODES_CFILES): Add riscv files.
	* Makefile.in: Regenerate.
	* po/POTFILES.in: Regenerate.
2016-12-20 12:26:08 +10:30
Alan Modra 6f2750feaf Copyright update for binutils 2016-01-01 23:00:01 +10:30
Nick Clifton f8c2a96547 Update translations.
binutils * po/ca.po: New Catalan translation.
	* configure.ac (ALL_LINGUAS): Add ca.
	* configure: Regenerate.

gas	* po/fr.po: Updated French translation.
	* po/uk.po: Updated Ukraninan translation.
	* po/zh_CN.po: New simplified Chinese translation.
	* configure.ac (ALL_LINGUAS): Add zh_CN.
	* configure: Regenerate.

opcodes	* po/zh_CN.po: Updated simplified Chinese translation.
2015-11-20 12:35:43 +00:00
Nick Clifton b08b78e7d4 Updare French translation for binutils and German translation for opcodes. 2015-09-28 16:34:00 +01:00
Nick Clifton f9d3ecaa78 Updated translations for various binutils components.
gold	* po/fi.po: Updated Finnish translation.

opcodes	* po/fr.po: Updated French translation.

gprof	* po/da.po: Update Danish translation.
2015-04-29 16:26:14 +01:00
Alan Modra 3f8107ab38 FT32 initial support
FT32 is a new 32-bit RISC core developed by FTDI for embedded applications.

	* configure.ac: Add FT32 support.
	* configure: Regenerate.
bfd/
	* Makefile.am: Add FT32 files.
	* archures.c (enum bfd_architecture): Add bfd_arch_ft32.
	(bfd_mach_ft32): Define.
	(bfd_ft32_arch): Declare.
	(bfd_archures_list): Add bfd_ft32_arch.
	* config.bfd: Handle FT32.
	* configure.ac: Likewise.
	* cpu-ft32.c: New file.
	* elf32-ft32.c: New file.
	* reloc.c (BFD_RELOC_FT32_10, BFD_RELOC_FT32_20, BFD_RELOC_FT32_17,
	BFD_RELOC_FT32_18): Define.
	* targets.c (_bfd_target_vector): Add ft32_elf32_vec.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
	* po/SRC-POTFILES.in: Regenerate.
binutils/
	* readelf.c: Add FT32 support.
gas/
	* Makefile.am: Add FT32 files.
	* config/tc-ft32.c: New file.
	* config/tc-ft32.h: New file.
	* configure.tgt: Add FT32 support.
	* Makefile.in: Regenerate.
	* po/POTFILES.in: Regenerate.
gas/testsuite/
	* gas/ft32/ft32.exp: New file.
	* gas/ft32/insn.d: New file.
	* gas/ft32/insn.s: New file.
include/
	* dis-asm.h (print_insn_ft32): Declare.
include/elf/
	* common.h (EM_FT32): Define.
	* ft32.h: New file.
include/opcode/
	* ft32.h: New file.
ld/
	* Makefile.am: Add FT32 files.
	* configure.tgt: Handle FT32 target.
	* emulparams/elf32ft32.sh: New file.
	* scripttempl/ft32.sc: New file.
	* Makefile.in: Regenerate.
opcodes/
	* Makefile.am: Add FT32 files.
	* configure.ac: Handle FT32.
	* disassemble.c (disassembler): Call print_insn_ft32.
	* ft32-dis.c: New file.
	* ft32-opc.c: New file.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
	* po/POTFILES.in: Regenerate.
2015-01-28 16:25:18 +10:30
Alan Modra b90efa5b79 ChangeLog rotatation and copyright year update 2015-01-02 00:53:45 +10:30
Eric Botcazou 1945cfa59d Add Visium support to opcodes
include/
	* dis-asm.h (print_insn_visium): Declare.
include/opcode/
	* visium.h: New file.
opcodes/
	* configure.ac: Add Visium support.
	* configure: Regenerate.
	* Makefile.am (TARGET_LIBOPCODES_CFILES): Add visium-dis.c and
	visium-opc.c.
	* Makefile.in: Regenerate.
	* disassemble.c (ARCH_visium): Define if ARCH_all.
	(disassembler): Deal with bfd_arch_visium if ARCH_visium.
	* visium-dis.c: New file.
	* visium-opc.c: Likewise.
	* po/POTFILES.in: Regenerate.
2014-12-06 16:25:55 +01:00
Nick Clifton ba241f2d5a Import updated translations supplied by the Translation Project.
bfd, binutils, gprof, opcodes:
	* po/fi.po: Updated Finnish translation.

	binutils:
	* po/sv.po: Updated Swedish translation.

	gprof:
	* po/hu.po: New Hungarian translation.
2014-11-03 12:26:48 +00:00
Nick Clifton 64b588b51e Updated/new translations provided by the Translations Project. 2014-10-29 16:34:04 +00:00
Alan Modra a9e18c6a3c Regenerate files for openrisk -> or1k change
bfd/
	* po/SRC-POTFILES.in: Regenerate.
	* configure: Regenerate.
gas/
	* po/POTFILES.in: Regenerate.
opcodes/
	* po/POTFILES.in: Regenerate.
2014-04-26 23:03:04 +09:30
Alan Modra 4b95cf5c0c Update copyright years 2014-03-05 22:16:15 +10:30
Alan Modra c1c69e839e binutils potfiles regen
Adds nds32 files to POTFILES.in
2014-02-10 09:59:35 +10:30
Nick Clifton 34c911a458 * msp430-decode.opc: New.
* msp430-decode.c: New/generated.
	* Makefile.am (TARGET_LIBOPCODES_CFILES): Add msp430-decode.c.
	(MAINTAINER_CLEANFILES): Likewise.
	Add rule to build msp430-decode.c frommsp430decode.opc
        using the opc2c program.
	* Makefile.in: Regenerate.
	* configure.in: Add msp430-decode.lo to msp430 architecture files.
	* configure: Regenerate.

	* msp430-decode.h: New.
2013-06-21 15:01:57 +00:00
Alan Modra 545093a450 * po/POTFILES.in: Regenerate.
* rl78-decode.c: Regenerate.
	* rx-decode.c: Regenerate.
2013-02-04 06:04:33 +00:00
Alan Modra 6febeb7413 Regenerate. 2012-11-08 03:03:26 +00:00
Nick Clifton eb80cb8751 * po/vi.po: Updated Vietnamese translation.
* po/uk.po: New Ukranian translation.
	* configure.in (ALL_LINGUAS): Add uk.
	* configure: Regenerate.
2012-08-17 14:33:27 +00:00
Nick Clifton 3c892704a9 Updated Vietnamese translation. 2012-08-09 14:46:44 +00:00
Alan Modra 488916061e * h8300-dis.c: Fix printf arg warnings.
* i960-dis.c: Likewise.
	* mips-dis.c: Likewise.
	* pdp11-dis.c: Likewise.
	* sh-dis.c: Likewise.
	* v850-dis.c: Likewise.
	* configure.in: Formatting.
	* configure: Regenerate.
	* rl78-decode.c: Regenerate.
	* po/POTFILES.in: Regenerate.
2012-08-01 00:41:35 +00:00
Nick Clifton a6dc81d2ab Updated translations 2012-07-30 08:43:46 +00:00
Nick Clifton 4c6a93d362 * po/vi.po: Updated Vietnamese translation.
* po/uk.po: New Ukranian translation.
	* configure.in (ALL_LINGUAS): Add uk.
	* configure: Regenerate.
2012-06-28 14:36:01 +00:00
Nick Clifton eda81062a6 * po/it.po: Updated Italian translation. 2011-11-25 09:19:07 +00:00
Nick Clifton 207d428dce * po/it.po: New Italian translation.
* configure.in (ALL_LINGUAS): Add it.
	* configure: Regenerate.
	* po/opcodes.pot: Regenerate.
2011-11-02 12:02:22 +00:00
Nick Clifton cfb8c0921c bfd:
* Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo .
	(ALL_MACHINES_CFILES): Add cpu-epiphany.c .
	(BFD32_BACKENDS): Add elf32-epiphany.lo .
	(BFD32_BACKENDS_CFILES): Add elf32-epiphany.c .
	* Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate.
	* archures.c (bfd_arch_epiphany): Add.
	(bfd_mach_epiphany16, bfd_mach_epiphany32): Define.
	(bfd_epiphany_arch): Declare.
	(bfd_archures_list): Add &bfd_epiphany_arch.
	* config.bfd (epiphany-*-elf): New target case.
	* configure.in (bfd_elf32_epiphany_vec): New target vector case.
	* reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation.
	(BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise.
	(BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise.
	(BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise.
	* targets.c (bfd_elf32_epiphany_vec): Declare.
	(_bfd_target_vector): Add bfd_elf32_epiphany_vec.
	* po/SRC-POTFILES.in, po/bfd.pot: Regenerate.
	* cpu-epiphany.c, elf32-epiphany.c: New files.
binutils:
	* readelf.c (include "elf/epiphany.h")
	(guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY.
	(get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise.
	(is_16bit_abs_reloc, is_none_reloc): Likewise.
	* po/binutils.pot: Regenerate.
cpu:
	* cpu/epiphany.cpu, cpu/epiphany.opc: New files.
gas:
	* NEWS: Mention addition of Adapteva Epiphany support.
	* config/tc-epiphany.c, config/tc-epiphany.h: New files.
	* Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c .
	(TARGET_CPU_HFILES): Add config/tc-epiphany.h .
	* Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate.
	* configure.in: Also set using_cgen for epiphany.
	* configure.tgt: Handle epiphany.
	* doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi .
	* doc/all.texi: Set EPIPHANY.
	* doc/as.texinfo: Add EPIPHANY-specific text.
	* doc/c-epiphany.texi: New file.
	* po/gas.pot: Regenerate.
gas/testsuite:
	* gas/epiphany: New directory.
include:
	* dis-asm.h (print_insn_epiphany): Declare.
	* elf/epiphany.h: New file.
	* elf/common.h (EM_ADAPTEVA_EPIPHANY): Define.
ld:
	* NEWS: Mention addition of Adapteva Epiphany support.
	* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c .
	(eelf32epiphany.c): New rule.
	* Makefile.in: Regenerate.
	* configure.tgt: Handle epiphany-*-elf.
	* po/ld.pot: Regenerate.
	* testsuite/ld-srec/srec.exp: xfail epiphany.
	* emulparams/elf32epiphany.sh: New file.
opcodes:
	* Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h .
	(TARGET_LIBOPCODES_CFILES): Add  epiphany-asm.c, epiphany-desc.c,
	epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c .
	(CLEANFILES): Add stamp-epiphany.
	(EPIPHANY_DEPS): Set.  Make CGEN-generated Epiphany files depend on it.
	(stamp-epiphany): New rule.
	* Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate.
	* configure.in: Handle bfd_epiphany_arch.
	* disassemble.c (ARCH_epiphany): Define.
	(disassembler): Handle bfd_arch_epiphany.
	* epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files.
	* epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise.
	* epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
Nick Clifton d569865703 Updated Bulgarian, Spanish, Finnish, French, Russian and Ukranian translations. 2011-10-10 16:12:24 +00:00
Nick Clifton 7cf8042268 Updated Spanish translations. 2011-08-26 15:15:52 +00:00
Nick Clifton aa137e4d51 * Makefile.am (ALL_MACHINES): Add cpu-tilegx.lo and cpu-tilepro.lo.
(ALL_MACHINE_CFILES): Add cpu-tilegx.c and cpu-tilepro.c.
    (BFD32_BACKENDS): Add elf32-tilegx.lo, elf32-tilepro.lo,
    and elfxx-tilegx.lo.
    (BFD32_BACKENDS_CFILES): Add elf32-tilegx.c elf32-tilepro.c, and
    elfxx-tilegx.c.
    (BFD64_BACKENDS): Add elf64-tilegx.lo.
    (BFD64_BACKENDS_CFILES): Add elf64-tilegx.c.
    * Makefile.in: Regenerate.
    * arctures.c (bfd_architecture): Define bfd_arch_tilepro,
    bfd_arch_tilegx, bfd_mach_tilepro, bfd_mach_tilegx.
    (bfd_arch_info): Add bfd_tilegx_arch, bfd_tilepro_arch.
    (bfd_archures_list): Add bfd_tilegx_arch, bfd_tilepro_arch.
    bfd-in2.h: Regenerate.
    * config.bfd: Handle tilegx-*-* and tilepro-*-*.
    * configure.in: Handle bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec,
    and bfd_elf64_tilegx_vec.
    * configure: Regenerate.
    * elf-bfd.h (enum elf_target_id): Define TILEGX_ELF_DATA and
    TILEPRO_ELF_DATA.
    * libbfd.h: Regenerate.
    * reloc.c: Add BFD_RELOC_TILEPRO_{COPY, GLOB_DAT, JMP_SLOT,
    RELATIVE, BROFF_X1, JOFFLONG_X1, JOFFLONG_X1_PLT, IMM8_X0,
    IMM8_Y0, IMM8_X1, IMM8_Y1, DEST_IMM8_X1, MT_IMM15_X1, MF_IMM15_X1,
    IMM16_X0, IMM16_X1, IMM16_X0_LO, IMM16_X1_LO, IMM16_X0_HI,
    IMM16_X1_HI, IMM16_X0_HA, IMM16_X1_HA, IMM16_X0_PCREL,
    IMM16_X1_PCREL, IMM16_X0_LO_PCREL, IMM16_X1_LO_PCREL,
    IMM16_X0_HI_PCREL, IMM16_X1_HI_PCREL, IMM16_X0_HA_PCREL,
    IMM16_X1_HA_PCREL, IMM16_X0_GOT, IMM16_X1_GOT, IMM16_X0_GOT_LO,
    IMM16_X1_GOT_LO, IMM16_X0_GOT_HI, IMM16_X1_GOT_HI,
    IMM16_X0_GOT_HA, IMM16_X1_GOT_HA, MMSTART_X0, MMEND_X0,
    MMSTART_X1, MMEND_X1, SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1,
    IMM16_X0_TLS_GD, IMM16_X1_TLS_GD, IMM16_X0_TLS_GD_LO,
    IMM16_X1_TLS_GD_LO, IMM16_X0_TLS_GD_HI, IMM16_X1_TLS_GD_HI,
    IMM16_X0_TLS_GD_HA, IMM16_X1_TLS_GD_HA, IMM16_X0_TLS_IE,
    IMM16_X1_TLS_IE, IMM16_X0_TLS_IE_LO, IMM16_X1_TLS_IE_LO,
    IMM16_X0_TLS_IE_HI, IMM16_X1_TLS_IE_HI, IMM16_X0_TLS_IE_HA,
    IMM16_X1_TLS_IE_HA, TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32}
    Add BFD_RELOC_TILEGX_{HW0, HW1, HW2, HW3, HW0_LAST, HW1_LAST,
    HW2_LAST, COPY, GLOB_DAT, JMP_SLOT, RELATIVE, BROFF_X1,
    JUMPOFF_X1, JUMPOFF_X1_PLT, IMM8_X0, IMM8_Y0, IMM8_X1, IMM8_Y1,
    DEST_IMM8_X1, MT_IMM14_X1, MF_IMM14_X1, MMSTART_X0, MMEND_X0,
    SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1, IMM16_X0_HW0,
    IMM16_X1_HW0, IMM16_X0_HW1, IMM16_X1_HW1, IMM16_X0_HW2,
    IMM16_X1_HW2, IMM16_X0_HW3, IMM16_X1_HW3, IMM16_X0_HW0_LAST,
    IMM16_X1_HW0_LAST, IMM16_X0_HW1_LAST, IMM16_X1_HW1_LAST,
    IMM16_X0_HW2_LAST, IMM16_X1_HW2_LAST, IMM16_X0_HW0_PCREL,
    IMM16_X1_HW0_PCREL, IMM16_X0_HW1_PCREL, IMM16_X1_HW1_PCREL,
    IMM16_X0_HW2_PCREL, IMM16_X1_HW2_PCREL, IMM16_X0_HW3_PCREL,
    IMM16_X1_HW3_PCREL, IMM16_X0_HW0_LAST_PCREL,
    IMM16_X1_HW0_LAST_PCREL, IMM16_X0_HW1_LAST_PCREL,
    IMM16_X1_HW1_LAST_PCREL, IMM16_X0_HW2_LAST_PCREL,
    IMM16_X1_HW2_LAST_PCREL, IMM16_X0_HW0_GOT, IMM16_X1_HW0_GOT,
    IMM16_X0_HW1_GOT, IMM16_X1_HW1_GOT, IMM16_X0_HW2_GOT,
    IMM16_X1_HW2_GOT, IMM16_X0_HW3_GOT, IMM16_X1_HW3_GOT,
    IMM16_X0_HW0_LAST_GOT, IMM16_X1_HW0_LAST_GOT,
    IMM16_X0_HW1_LAST_GOT, IMM16_X1_HW1_LAST_GOT,
    IMM16_X0_HW2_LAST_GOT, IMM16_X1_HW2_LAST_GOT, IMM16_X0_HW0_TLS_GD,
    IMM16_X1_HW0_TLS_GD, IMM16_X0_HW1_TLS_GD, IMM16_X1_HW1_TLS_GD,
    IMM16_X0_HW2_TLS_GD, IMM16_X1_HW2_TLS_GD, IMM16_X0_HW3_TLS_GD,
    IMM16_X1_HW3_TLS_GD, IMM16_X0_HW0_LAST_TLS_GD,
    IMM16_X1_HW0_LAST_TLS_GD, IMM16_X0_HW1_LAST_TLS_GD,
    IMM16_X1_HW1_LAST_TLS_GD, IMM16_X0_HW2_LAST_TLS_GD,
    IMM16_X1_HW2_LAST_TLS_GD, IMM16_X0_HW0_TLS_IE,
    IMM16_X1_HW0_TLS_IE, IMM16_X0_HW1_TLS_IE, IMM16_X1_HW1_TLS_IE,
    IMM16_X0_HW2_TLS_IE, IMM16_X1_HW2_TLS_IE, IMM16_X0_HW3_TLS_IE,
    IMM16_X1_HW3_TLS_IE, IMM16_X0_HW0_LAST_TLS_IE,
    IMM16_X1_HW0_LAST_TLS_IE, IMM16_X0_HW1_LAST_TLS_IE,
    IMM16_X1_HW1_LAST_TLS_IE, IMM16_X0_HW2_LAST_TLS_IE,
    IMM16_X1_HW2_LAST_TLS_IE, TLS_DTPMOD64, TLS_DTPOFF64, TLS_TPOFF64,
    TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32}
    * targets.c (bfd_elf32_tilegx_vec): Declare.
    (bfd_elf32_tilepro_vec): Declare.
    (bfd_elf64_tilegx_vec): Declare.
    (bfd_target_vector): Add bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec,
    and bfd_elf64_tilegx_vec.
    * cpu-tilegx.c: New file.
    * cpu-tilepro.c: New file.
    * elf32-tilepro.h: New file.
    * elf32-tilepro.c: New file.
    * elf32-tilegx.c: New file.
    * elf32-tilegx.h: New file.
    * elf64-tilegx.c: New file.
    * elf64-tilegx.h: New file.
    * elfxx-tilegx.c: New file.
    * elfxx-tilegx.h: New file.

	* Makefile.am (TARGET_CPU_CFILES): Add config/tc-tilegx.c and
	config/tc-tilepro.c.
	(TARGET_CPU_HFILES): Add config/tc-tilegx.h and
	config/tc-tilepro.h.
	* Makefile.in: Regenerate.
	* configure.tgt (tilepro-*-*): New.
	(tilegx-*-*): Likewise.
	* config/tc-tilegx.c: New file.
	* config/tc-tilegx.h: Likewise.
	* config/tc-tilepro.h: Likewise.
	* config/tc-tilepro.c: Likewise.
	* doc/Makefile.am (CPU_DOCS): Add c-tilegx.texi and
	c-tilepro.texi.
	* doc/Makefile.in: Regenerate.
	* doc/all.texi (TILEGX): Define.
	(TILEPRO): Define.
	* doc/as.texinfo: Add Tile-Gx and TILEPro documentation.  Include
	c-tilegx.texi and c-tilepro.texi.
	* doc/c-tilegx.texi: New.
	* doc/c-tilepro.texi: New.

        * gas/tilepro/t_constants.s: New file.
	* gas/tilepro/t_constants.d: Likewise.
	* gas/tilepro/t_insns.s: Likewise.
	* gas/tilepro/tilepro.exp: Likewise.
	* gas/tilepro/t_insns.d: Likewise.
	* gas/tilegx/tilegx.exp: Likewise.
	* gas/tilegx/t_insns.d: Likewise.
	* gas/tilegx/t_insns.s: Likewise.

	* dis-asm.h (print_insn_tilegx): Declare.
	(print_insn_tilepro): Likewise.

	* tilegx.h: New file.
	* tilepro.h: New file.

	* common.h: Add EM_TILEGX.
	* tilegx.h: New file.
	* tilepro.h: New file.

	* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32tilegx.c and
	eelf32tilepro.c.
	(ALL_64_EMULATION_SOURCES): Add eelf64tilegx.c.
	(eelf32tilegx.c): New target.
	(eelf32tilepro.c): Likewise.
	(eelf64tilegx.c): Likewise.
	* Makefile.in: Regenerate.
	* configure.tgt: Handle tilegx-*-* and tilepro-*-*.
	* emulparams/elf32tilegx.sh: New file.
	* emulparams/elf64tilegx.sh: New file.
	* emulparams/elf32tilepro.sh: New file.

	* ld-elf/eh5.d: Don't run on tile*.
	* ld-srec/srec.exp: xfail on tile*.
	* ld-tilegx/external.s: New file.
	* ld-tilegx/reloc.d: New file.
	* ld-tilegx/reloc.s: New file.
	* ld-tilegx/tilegx.exp: New file.
	* ld-tilepro/external.s: New file.
	* ld-tilepro/reloc.d: New file.
	* ld-tilepro/reloc.s: New file.
	* ld-tilepro/tilepro.exp: New file.

	* Makefile.am (TARGET_LIBOPCODES_CFILES): Add tilegx-dis.c,
	tilegx-opc.c, tilepro-dis.c, and tilepro-opc.c.
	* Makefile.in: Regenerate.
	* configure.in: Handle bfd_tilegx_arch and bfd_tilepro_arch.
	* configure: Regenerate.
	* disassemble.c (disassembler): Add ARCH_tilegx and ARCH_tilepro.
	* po/POTFILES.in: Regenerate.
	* tilegx-dis.c: New file.
	* tilegx-opc.c: New file.
	* tilepro-dis.c: New file.
	* tilepro-opc.c: New file.
2011-06-13 15:18:54 +00:00
Nick Clifton cc643b88f1 Fix spelling mistakes. 2011-06-02 13:43:24 +00:00
Nick Clifton b4e7b88557 Updated Danish, Esperanto and French translations. 2011-04-27 10:02:27 +00:00
Nick Clifton 4be0c94123 Updated Danish translation. 2011-02-01 13:14:40 +00:00
Nick Clifton f74656046a * po/da.po: Updated Danish translation. 2011-01-10 13:51:10 +00:00
Alan Modra 1de34e0afe Update translations 2010-11-25 06:08:52 +00:00
Nick Clifton 8e295ce05a Updated translations. 2010-11-10 14:39:10 +00:00
Tristan Gingold 2ee0aedfb8 bfd/
2010-11-05  Tristan Gingold  <gingold@adacore.com>

	* po/bfd.pot: Regenerate

binutils/
2010-11-05  Tristan Gingold  <gingold@adacore.com>

	* po/binutils.pot: Regenerate

gas/
2010-11-05  Tristan Gingold  <gingold@adacore.com>

	* po/gas.pot: Regenerate
	* po/POTFILES.in: Regenerate

gprof/
2010-11-05  Tristan Gingold  <gingold@adacore.com>

	* po/gprof.pot: Regenerate

ld/
2010-11-05  Tristan Gingold  <gingold@adacore.com>

	* po/ld.pot: Regenerate
	* po/POTFILES.in: Regenerate

opcodes/
2010-11-05  Tristan Gingold  <gingold@adacore.com>

	* po/opcodes.pot: Regenerate
2010-11-05 10:25:11 +00:00
Alan Modra 360cfc9c8b remove maxq-coff port 2010-06-29 04:17:34 +00:00
Nick Clifton 3e01a7fd46 Updated Spanish translations. 2010-05-05 15:28:26 +00:00
Nick Clifton 9c9c98a59d Updated translation templates.
Updated Bulgarian translation.
Updated Finnish translations.
Updated French translations.
Updated Vietnamese translations.
2010-04-22 14:37:16 +00:00
Nick Clifton ab7875de80 Updated Vietnamese translation. 2010-02-15 10:09:39 +00:00
Nick Clifton 41327c9d6d Updated Indonesian translation. 2009-11-11 09:36:08 +00:00
Nick Clifton 245caaea22 Updated Finnish translation 2009-10-06 15:44:40 +00:00
Nick Clifton 8a00d39205 Updated French and Vietnamese translations. 2009-09-23 10:09:19 +00:00