* bandor.s: New file.
* bandornot.s: New file.
* bclr.s: New file.
* bld.s: New file.
* bldnot.s: New file.
* bset.s: New file.
* bst.s: New file.
* bxor.s: New file.
* clip.s: New file.
* div.s: New file.
* fail.s: New file, make sure fail works.
* fsca.s: New file.
* fsrra.s: New file.
* mov.s: New file.
* mulr.s: New file.
* pass.s: New file, make sure pass works.
* pushpop.s: New file.
* resbank.s: New file.
* testutils.inc (bf8k, bt8k, assertmem): New macros.
2003-07-23 Richard Sandiford <rsandifo@redhat.com>
* compile.c (sim_resume): Make sure that dst.reg refers to the
right register byte in mova/sz.l @(dd,RnL),ERn.
2003-07-21 Richard Sandiford <rsandifo@redhat.com>
* compile.c (sim_resume): Zero-extend immediate to muls, mulsu,
mulxs, divs and divxs.
sim/testsuite/sim/h8300/ChangeLog:
2003-07-22 Michael Snyder <msnyder@redhat.com>
* mul.s: Don't try to use negative immediate (it's always
unsigned).
* div.s: Ditto.
* utils-fpu.inc (enable_fpu, ckm_fp_cc): New macros.
(clrset_fp_cc): Fix mask used for upper 7 condition codes.
* utils-mdmx.inc: Include utils-fpu.inc.
(enable_mdmx): Use enable_fpu.
* utils-fpu.inc: New file.
* utils-mdmx.inc: New file.
* mdmx-ob.s: New file.
* mdmx-ob-sb1.s: New file.
* basic.exp: Run new mdmx-ob and mdmx-ob-sb1 tests.
* sim/mips/basic.exp (run_hilo_test): New procedure.
(models): Only list models that are included in the configuration.
(submodels): New variable, set to submodels of the above.
(mips64vr-*-elf, mips64vrel-*-elf): New configuration stanza.
Run hilo-hazard-[123].s.
* frv.c (frvbf_iacc_cut): Rework, taking rounding into account.
testsuite/
* sim/frv/fr400/scutss.cgs: Fix tests to account for rounding.
Add some new ones.
2004-01-26 Chris Demetriou <cgd@broadcom.com>
* configure.in (mips*-*-*): Configure in testsuite.
* configure: Regenerate.
[ sim/testsuite/ChangeLog ]
2004-01-26 Chris Demetriou <cgd@broadcom.com>
* sim/mips: New directory. Tests for the MIPS simulator.
[ sim/testsuite/sim/mips/ChangeLog ]
2004-01-26 Chris Demetriou <cgd@broadcom.com>
* basic.exp: New file.
* testutils.inc: New file.
* sanity.s: New file.
* sim/frv/testutils.inc (or_gr_immed): New macro.
* sim/frv/fp_exception-fr550.cgs: Write insns using
unaligned registers into the program in order to
cause the required exceptions.
* sim/frv/fp_exception.cgs: Ditto.
* sim/frv/regalign.cgs: Ditto.
* sim/frv/fr550: New subdirectory.
* sim/frv/fr400/*.cgs: Add fr550 as appropriate.
* sim/frv/fr500/*.cgs: Add fr550 as appropriate.
* sim/frv/interrupts/*.cgs: Add fr550 as appropriate.
* sim/frv/interrupts/*-fr550.cgs: New test cases for fr550.
* sim/frv/interrupts/Ipipe-fr400.cgs: New file.
* sim/frv/interrupts/Ipipe-fr500.cgs: New file.
* sim/frv/interrupts/Ipipe.cgs: Remove (replaced by above).
* cmpw.s: Add test for less-than-zero immediate.
* shll.s: Test for shll reg, reg.
* shlr.s: Test for shlr reg, reg.
* mova.s: Add dozens of new mova tests.
* lib/sim-defs.exp (run_sim_test): Include a description such as
"assembling" or "linking" that identifies the phase a test fails
in, for easier analysis of failures.
* lib/sim-defs.exp (run_sm_test): Correct comment. "output" and
"xerror" options do not use a list of machines. Clear options from
previous test case. Use "$cpu_option" to identify the machine to the
assembler, if specified.
instead of sim_trace() to run the program; include support for ``-o''
option (operating environment); when a signal occurs, only continue
execution when operating environment mode.
Update d10v.
* sim/fr30/ldres.cgs: New testcase.
* sim/fr30/stres.cgs: New testcase.
* sim/fr30/copop.cgs: New testcase.
* sim/fr30/copld.cgs: New testcase.
* sim/fr30/copst.cgs: New testcase.
* sim/fr30/copsv.cgs: New testcase.
* sim/fr30/nop.cgs: New testcase.
* sim/fr30/andccr.cgs: New testcase.
* sim/fr30/orccr.cgs: New testcase.
* sim/fr30/addsp.cgs: New testcase.
* sim/fr30/stilm.cgs: New testcase.
* sim/fr30/extsb.cgs: New testcase.
* sim/fr30/extub.cgs: New testcase.
* sim/fr30/extsh.cgs: New testcase.
* sim/fr30/extuh.cgs: New testcase.
* sim/fr30/enter.cgs: New testcase.
* sim/fr30/leave.cgs: New testcase.
* sim/fr30/xchb.cgs: New testcase.
* sim/fr30/dmovb.cgs: New testcase.
* sim/fr30/dmov.cgs: New testcase.
* sim/fr30/dmovh.cgs: New testcase.
* sim/fr30/testutils.inc (take_branch{_d},no_branch{_d}): New macros.
* sim/fr30/ret.cgs: Add tests fir ret:d.
* sim/fr30/inte.cgs: New testcase.
* sim/fr30/reti.cgs: New testcase.
* sim/fr30/bra.cgs: New testcase.
* sim/fr30/bno.cgs: New testcase.
* sim/fr30/beq.cgs: New testcase.
* sim/fr30/bne.cgs: New testcase.
* sim/fr30/bc.cgs: New testcase.
* sim/fr30/bnc.cgs: New testcase.
* sim/fr30/bn.cgs: New testcase.
* sim/fr30/bp.cgs: New testcase.
* sim/fr30/bv.cgs: New testcase.
* sim/fr30/bnv.cgs: New testcase.
* sim/fr30/blt.cgs: New testcase.
* sim/fr30/bge.cgs: New testcase.
* sim/fr30/ble.cgs: New testcase.
* sim/fr30/bgt.cgs: New testcase.
* sim/fr30/bls.cgs: New testcase.
* sim/fr30/bhi.cgs: New testcase.
* sim/fr30/call.cgs: Test ret here as well.
* sim/fr30/ld.cgs: Remove bogus comment.
* sim/fr30/testutils.inc (save_rp,restore_rp): New macros.
* sim/fr30/div.ms: New testcase.
* sim/fr30/st.cgs: New testcase.
* sim/fr30/sth.cgs: New testcase.
* sim/fr30/stb.cgs: New testcase.
* sim/fr30/mov.cgs: New testcase.
* sim/fr30/jmp.cgs: New testcase.
* sim/fr30/ret.cgs: New testcase.
* sim/fr30/int.cgs: New testcase.
* sim/fr30/div0s.cgs: New testcase.
* sim/fr30/div0u.cgs: New testcase.
* sim/fr30/div1.cgs: New testcase.
* sim/fr30/div2.cgs: New testcase.
* sim/fr30/div3.cgs: New testcase.
* sim/fr30/div4s.cgs: New testcase.
* sim/fr30/testutils.inc (mvi_h_dr,set_dbits,test_dbits): New Macros.
* sim/fr30/testutils.inc (set_s_user): Correct Mask.
(set_s_system): Correct Mask.
* sim/fr30/ld.cgs (ld): Move previously failing test back
into place.
* sim/fr30/ldm0.cgs: New testcase.
* sim/fr30/ldm1.cgs: New testcase.
* sim/fr30/stm0.cgs: New testcase.
* sim/fr30/stm1.cgs: New testcase.
* sim/fr30/ld.cgs: Implement more loads.
* sim/fr30/call.cgs: New testcase.
* sim/fr30/testutils.inc (testr_h_dr): New macro.
(set_s_user,set_s_system): New macros.
[d30v/ChangeLog]
1998-11-06 Frank Ch. Eigler <fche@cygnus.com>
* d30v-insns (do_mvfacc): Use loop to limit shift count to 63 .. 0.
[testsuite/d30v-elf/ChangeLog]
1998-11-06 Frank Ch. Eigler <fche@cygnus.com>
* do-shifts.S: Add test for large mvfacc shifts.
Thu Oct 29 12:07:06 1998 Frank Ch. Eigler <fche@cygnus.com>
* t-psrlvw.s (test_psrlvw): Add test for sign-extension in insn.
* t-padsbh.s: New test.
* t-mult1.s: New test.
* Makefile.in: Run them.
Tue Jun 16 09:03:37 1998 Frank Ch. Eigler <fche@cygnus.com>
* t-cop2.s: Reorder instruction blocks to prevent "Out of bounds"
messages during test execution. Added dummy branch labels for BC2*
instructions.
* t-cop2.brn: Use --sky-debug option instead of env var.
* t-cop2.vuexpect: Updated for with new disassembly format.
* sky_sce_fast.exp: Don't compare GIF outputs for
--float-type=fast.
* sce_test{17,33,49}.dvpasm: Use ".DmaPackVif 1" option to
exercise assembler / PKE.
* rw-vureg.c: Cast memcpy operand to allay warning.
which is now a list of options controlling the behaviour of sim_run.
* sim/sky/sky-defs.tcl (run_trc_test): Update to new way of
environment variables to sim_run.
Wed Jun 10 15:56:10 1998 Frank Ch. Eigler <fche@cygnus.com>
* sim/sky/t-int.c: New file to test sky hardware
interrupts.
* sim/sky/t-int-handler.s: New file for null interrupt
handler.
* sim/sky/t-int.brn: New file to build new test.
Mon Jun 1 18:54:22 1998 Frank Ch. Eigler <fche@cygnus.com>
* lib/sim-defs.exp (sim_run): Add possible environment variable
list to simulator run.
start-sanitize-sky
* sim/sky/sky-defs.tcl: Use it.
* sim/sky/t-pke2.vif1out: Update to match recent word-precise
tracking table change in sim/mips/sky-pke.c.
* sim/sky/t-pke3.trc: Ditto.
* sim/sky/t-pke4.vif0expect: Ditto.
end-sanitize-sky
Mon May 18 10:37:47 1998 Doug Evans <devans@canuck.cygnus.com>