d2f18ae42a
2003-06-27 Michael Snyder <msnyder@redhat.com>
...
* gencode.c (op tab): Implement movca.l.
2003-07-23 21:23:32 +00:00
9e1d0fc1a1
2003-06-27 Michael Snyder <msnyder@redhat.com>
...
* gencode.c (op movsxy_tab): Fix an error in the bit pattern.
2003-07-23 21:17:33 +00:00
15dee5d561
2003-06-27 Michael Snyder <msnyder@redhat.com>
...
* gencode.c (gensim_caselist): The movy instructions use
registers R6 and R7 (not R4 and R5 like the movx insns).
2003-07-23 21:14:54 +00:00
e22fef83d7
2003-07-22 Michael Snyder <msnyder@redhat.com>
...
* compile.c (sim_resume): Revert 6-24 change, it does not
work with gdb breakpoints.
2003-07-22 19:07:30 +00:00
55acb21b1f
2003-07-17 Michael Snyder <msnyder@redhat.com>
...
* compile.c (sim_resume): Handle shll reg, reg and shlr reg, reg.
2003-07-18 00:10:41 +00:00
0f42aa719d
2003-07-17 Michael Snyder <msnyder@redhat.com>
...
* compile.c (decode): IMM16 is always zero-extended.
2003-07-18 00:08:23 +00:00
e53a5a69d7
2003-07-03 Michael Snyder <msnyder@redhat.com>
...
* gencode.c (movs): Fix a couple of text transpositions.
2003-07-04 00:03:52 +00:00
f0861129d5
2003-06-24 Michael Snyder <msnyder@redhat.com>
...
* sim-main.h (SIM_WIFSTOPPED, SIM_WSTOPSIG): Define.
* compile.c (sim_resume): Use the above to return stop signal.
2003-07-02 19:04:58 +00:00
0b2828595e
2003-06-27 Michael Snyder <msnyder@redhat.com>
...
* gencode.c (op movsxy_tab): Fix up some copy/paste errors
in name: s/REG_x/REG_y/.
2003-06-28 01:34:47 +00:00
8dc30ef74a
2003-06-27 Michael Snyder <msnyder@redhat.com>
...
* gencode.c (op tab): Move misplaced semicolon.
2003-06-27 21:18:42 +00:00
ac59bf8dbf
2003-06-23 Michael Snyder <msnyder@redhat.com>
...
* nrun.c (main): Delete h8/300 ifdef (sim now handles signals).
2003-06-23 18:03:17 +00:00
72f536bd78
2003-06-23 Michael Snyder <msnyder@redhat.com>
...
* sim-reg.c: Fix cut-and-paste bug in comment.
2003-06-23 17:59:08 +00:00
345d88d96e
2003-06-22 Andrew Cagney <cagney@redhat.com>
...
Written by matthew green <mrg@redhat.com>, with fixes from Aldy
Hernandez <aldyh@redhat.com>, Jim Wilson <wilson@redhat.com>, and
Nick Clifton <nickc@redhat.com>.
* ppc-instructions: Include altivec.igen and e500.igen.
(model_busy, model_data): Add vr_busy and vscr_busy.
(model_trace_release): Trace vr_busy and vscr_busy.
(model_new_cycle): Update vr_busy and vscr_busy.
(model_make_busy): Update vr_busy and vscr_busy.
* registers.c (register_description): Add Altivec and e500
registers.
* psim.c (psim_read_register, psim_read_register): Handle Altivec
and e500 registers.
* ppc-spr-table (SPEFSCR): Add VRSAVE and SPEFSCR registers.
* configure.in (sim_filter): When *altivec* add "av". When *spe*
or *simd* add e500.
(sim_float): When *altivec* define WITH_ALTIVEC. When *spe* add
WITH_E500.
* configure: Re-generate.
* e500.igen, altivec.igen: New files.
* e500_expression.h, altivec_expression.h: New files.
* idecode_expression.h: Update copyright. Include
"e500_expression.h" and "altivec_expression.h".
* e500_registers.h, altivec_registers.h: New files.
* registers.h: Update copyright. Include "e500_registers.h" and
"altivec_registers.h".
(registers): Add Altivec and e500 specific registers.
* Makefile.in (IDECODE_H): Add "idecode_e500.h" and
"idecode_altivec.h".
(REGISTERS_H): Add "e500_registers.h" and "altivec_registers.h".
(tmp-igen): Add dependencies on altivec.igen and e500.igen .
2003-06-22 16:48:12 +00:00
ea0869653a
2003-06-22 Andrew Cagney <cagney@redhat.com>
...
* interp.c (xfer_mem): Simplify. Only do a single partial
transfer. Problem reported by Tom Rix.
2003-06-22 13:38:28 +00:00
1f1b28179f
2003-06-22 Andrew Cagney <cagney@redhat.com>
...
From matthew green <mrg@redhat.com>:
* sim-fpu.h: Update copyright.
(sim_fpu_fraction, sim_fpu_guard): New prototypes.
* sim-fpu.c: Update copyright.
(sim_fpu_fraction, sim_fpu_guard): New inline functions.
2003-06-22 13:36:26 +00:00
4056a1ef29
Oops! Committed to much, reverting :-(
2003-06-22 13:31:57 +00:00
89c0d7ddd7
Fix changelog
2003-06-22 13:29:17 +00:00
911b23336b
2003-06-22 Andrew Cagney <cagney@redhat.com>
...
Problems reported by Joshua LeVasseur.
* emul_chirp.c: Update copyright.
(chirp_emul_nextprop): Return the first property.
* hw_htab.c: Update copyright.
(htab_decode_hash_table): Fix check for htab size.
2003-06-22 13:03:40 +00:00
945d18fb9c
2003-06-21 Andrew Cagney <cagney@redhat.com>
...
* interrupts.c: Update copyright.
(external_interrupt): Fix test for already pending interrupt.
Problem found by Joshua LeVasseur.
2003-06-22 04:03:15 +00:00
21f86aab13
2003-06-21 Andrew Cagney <cagney@redhat.com>
...
* ppc-instructions: Add missing +8 line. Found by blofeldus at
yahoo.com.
2003-06-22 01:52:34 +00:00
0f2f1341dd
2003-06-21 Andrew Cagney <cagney@redhat.com>
...
From Ian Lance Taylor <ian@airs.com>:
* hw_nvram.c (hw_nvram_init_address): Correct call to memset--swap
second and third arguments.
2003-06-22 01:16:38 +00:00
61ca1de73a
2003-06-21 Andrew Cagney <cagney@redhat.com>
...
* hw_com.c (hw_com_device_init_data): Check that the output, and
not input file opened. Pointed out by masahino tky3.3web.ne.jp.
2003-06-22 00:51:44 +00:00
6ec8fa7a80
2003-06-17 Doug Evans <dje@sebabeach.org>
...
* cgen-trace.h (sim_disasm_read_memory): Update args to be compatible
with disassemble_info:read_memory_func.
* cgen-trace.c (sim_disasm_read_memory): Ditto.
2003-06-20 17:27:10 +00:00
601cecf016
2003-06-20 Andrew Cagney <cagney@redhat.com>
...
* sim_calls.c (sim_create_inferior): Assert that
psim_write_register succeeded.
(sim_fetch_register, sim_store_register): Make "regname" constant.
Delete Altivec hack. Return result from psim_read_register /
psim_write_register.
* psim.h (psim_read_register, psim_write_register): Change return
type to int. Update comments.
* psim.c: Update copyright.
(psim_stack): Assert that the psim_read_register worked.
(psim_read_register, psim_read_register): Return the register's
size. Allocate the cooked buffer dynamically.
* hw_register.c: Update copyright.
(do_register_init): Check that psim_write_register succeeded.
* hw_init.c: Update copyright.
(create_ppc_elf_stack_frame, create_ppc_aix_stack_frame): Assert
that the register transfer worked.
2003-06-20 13:32:34 +00:00
d81bb16ac0
2003-06-19 Andrew Cagney <cagney@redhat.com>
...
* ld-insn.h: Update copyright.
(cache_fields): Define.
(insn_table_fields): Add insn_field_6 and insn_field_7.
(load_insn_table): Pass in the "cache_rules".
* ld-insn.c: Update copyright.
(load_insn_table): Add parameter "cache_rules". Handle "cache",
"computed" and "scratch" fields.
(main): Pass "cache_rules" to load_insn_table.
* ld-cache.h: Update copyright.
(append_cache_table): Declare.
* ld-cache.c: Update copyright.
(append_cache_table): New function.
(load_cache_table): Call.
* gen-model.c: Include "ld-cache.h".
* gen-itable.c: Include "ld-cache.h".
* igen.c: Move #include "ld-cache.h" to earlier. Update
copyright.
(main): Permit a NULL "cache_rules". Pass address of
"cache_rules" to load_insn_table.
* Makefile.in (tmp-ld-insn): Add "ld-cache.o".
(tmp-igen): Do not include ppc-cache-rules.
(gen-itable.o, gen-model.o): Add "ld-cache.h".
* ppc-cache-rules: Delete file.
* ppc-instructions: Add cache rules.
2003-06-20 03:59:33 +00:00
8d64d0fdca
2003-06-19 Andrew Cagney <cagney@redhat.com>
...
* Makefile.in (ICACHE_CFLAGS, SEMANTICS_CFLAGS): Delete.
(SIM_FPU_FLAGS): Define.
(icache.o): Delete explicit compile command.
(semantics.o, idecode.o): Delete explicit compile command.
(NOWARN_CFLAGS, STD_CFLAGS): Append SIM_FPU_CFLAGS.
* gen-support.c (gen_support_c): Generate #include of
"sim-inline.h" and "sim-fpu.h", but conditional on
HAVE_COMMON_FPU.
* gen-idecode.c (gen_idecode_c): Ditto.
* igen.c (gen_icache_c, gen_semantics_c): Wrap #include of
"sim-inline.h" and "sim-fpu.h" in HAVE_COMMON_FPU conditional.
Move to before "support.h".
* Makefile.in, gen-support.c, gen-idecode.c, igen.c: Update
copyright.
2003-06-19 18:42:30 +00:00
3df3a316d3
2003-05-30 Alexandre Oliva <aoliva@redhat.com>
...
* allinsn.exp: Fix typos introduced on 2003-05-27.
2003-05-29 Michael Snyder <msnyder@redhat.com>
* tas.s: Use er4 for h8h and h8s, er3 for h8sx.
2003-05-28 Michael Snyder <msnyder@redhat.com>
* subs.s: New file.
* subx.s: New file.
* allinsn.exp: Add new subs and subx tests.
* testutils.inc: Simplify (and fix) set_carry_flag.
(clear_carry_flag, set_zero_flag, clear_zero_flag...): New macros.
* addx.s: Use simplified set_carry_flag.
2003-05-27 Michael Snyder <msnyder@redhat.com>
* tas.s: New file.
* band.s: New file.
* biand.s: New file.
* allinsn.exp: Add tas, band, biand tests.
* brabc.s: Add abs8 test.
* bset.s: Add bset/ne, bclr/ne tests.
2003-05-23 Michael Snyder <msnyder@redhat.com>
* and.b.s: Add andc exr.
* or.b.s: Add orc.exr.
* xor.b.s: Add xor exr.
* jmp.s: Fix 8-bit indirect test. Add 7-bit vector test.
2003-05-22 Michael Snyder <msnyder@redhat.com>
* stack.s: Add rte/l and rts/l tests.
* allinsn.exp: Add stack tests.
2003-05-21 Michael Snyder <msnyder@redhat.com>
* stack.s: New file: test stack operations.
* stack.s: Add bsr, jsr tests.
* stack.s: Add trapa, rte tests.
* div.s: Corrections for size of dividend.
2003-05-20 Michael Snyder <msnyder@redhat.com>
* mul.s: Corrections for unsigned multiply.
* div.s: New file, test div instructions.
* allinsn.exp: Add div test.
2003-05-19 Michael Snyder <msnyder@redhat.com>
* mul.s: New file, test mul instructions.
* allinsn.exp: Add mul test.
2003-06-19 02:40:12 +00:00
9f70f8ec04
2003-06-18 Michael Snyder <msnyder@redhat.com>
...
* compile.c: Replace "Hitachi" with "Renesas".
(decode): Distinguish AV_H8S from AV_H8H.
(sim_resume): H8SX can use any register for TAS.
(decode): Add support for VECIND.
(sim_resume): Implement rte/l and rts/l.
(GETSR): New macro (actually old macro reincarnated).
(decode): Add handling for IMM2.
(sim_resume): Drop extra block around jmp, jsr, rts.
Add handling for trapa and rte.
For divxu.b, change 0xffff mask to 0xff.
(set_h8300h): Add bfd_mach_h8300sxn machine.
2003-06-19 02:14:14 +00:00
18ad32b593
2003-06-18 Corinna Vinschen <vinschen@redhat.com>
...
* sim-main.h (enum h8_regnum): Turn around order of MACH, MACL
and SBR, VBR (for benefit of gdb).
2003-06-19 01:54:22 +00:00
173b1c982a
2003-06-05 Michael Snyder <msnyder@redhat.com>
...
* compile.c (sim_fetch_register): Handle SBR, VBR, MACH, MACL.
(sim_store_register): Ditto.
2003-06-19 00:49:33 +00:00
9a1d84fb16
2003-06-17 Richard Sandiford <rsandifo@redhat.com>
...
* mips.igen (do_dmultx): Fix check for negative operands.
2003-06-18 01:12:03 +00:00
27ebfdf49b
2003-06-04 Michael Snyder <msnyder@redhat.com>
...
* compile.c (sim_info): Fix typo in output.
* h8300/compile.c (set_h8300h): Replace 'flag' arguments
with a bfd_machine argument, and decode it inline.
Check for bfd_mach_h8300hn and bfd_mach_h8300sn.
2003-06-05 02:18:01 +00:00
828c9ae668
2003-06-04 Michael Snyder <msnyder@redhat.com>
...
* common/run.c (main): Remove SIM_H8300 ifdef.
(usage): Ditto.
* common/sim-options.c (STANDARD_OPTIONS): Add SIM_H8300SX.
(standard_options): Add '-x' for h8/300sx.
(standard_option_handler): Add case for SIM_H8300SX.
2003-06-05 02:17:29 +00:00
e8c1a4e716
2003-06-04 Michael Snyder <msnyder@redhat.com>
...
* compile.c (sim_info): Fix typo in output.
2003-06-04 18:28:21 +00:00
dc5c3759e0
2003-06-03 Michael Snyder <msnyder@redhat.com>
...
* h8300/compile.c: Add h8300sx insns and addressing modes.
* h8300/sim-main.h: Replaces h8300/inst.h.
* h8300/Makefile.in: Tweak to bring in some sim/common stuff.
2003-06-03 21:38:27 +00:00
ae451ac6d4
Use $(SHELL) whenever we invoke move-if-change.
2003-05-16 07:11:43 +00:00
a27a0651eb
2003-04-13 Michael Snyder <msnyder@redhat.com>
...
* sim/h8300: New directory. Tests for Renesas h8/300 family.
2003-05-14 22:59:12 +00:00
cd44367114
New ChangeLog
2003-05-14 21:08:29 +00:00
32ebdc4ce3
2003-05-14 Michael Snyder <msnyder@redhat.com>
...
* addb.s, addw.s, addl.s, addw.s, addx.s, andb.s, andw.s, andl.s,
bfld.s, brabc.s, bra.s, bset.s, cmpb.s, cmpw.s, cmpl.s, daa.s,
das.s, dec.s, extw.s, extl.s, inc.s, jmp.s, ldc.s, ldm.s, mac.s,
mova.s, movb.s, movw.s, movl.s, movmd.s, movsd.s, neg.s, nop.s,
not.s, orb.s, orw.s, orl.s, rotl.s, rotr.s, rotxl.s, rotxr.s,
shal.s, shar.s, shll.s, shlr.s, stc.s, subb.s, subw.s, subl.s,
xorb.s, xorw.s, xorl.s: New files.
* allinsn.exp: New file.
2003-05-14 21:07:55 +00:00
105e800205
Remove for renaming with 8.3 dos-compatible names.
2003-05-14 20:58:21 +00:00
ab12e95ba6
Remove, rename using dos-compatible 8.3 names.
2003-05-14 20:01:55 +00:00
f6684c3170
Index: gdb/ChangeLog
...
2003-05-07 Andrew Cagney <cagney@redhat.com>
* d10v-tdep.c (remote_d10v_translate_xfer_address): Add
"regcache".
(d10v_print_registers_info): Update.
(d10v_dmap_register, d10v_imap_register): Delete functions.
(struct gdbarch_tdep): Add "regcache" parameter to "dmap_register"
and "imap_register".
(d10v_ts2_dmap_register, d10v_ts2_imap_register): Add "regcache".
(d10v_ts3_dmap_register, d10v_ts3_imap_register): Add "regcache".
* arch-utils.c (generic_remote_translate_xfer_address): Add
"regcache" and "gdbarch" parameters.
* gdbarch.sh (REMOTE_TRANSLATE_XFER_ADDRESS): Add "regcache"
parameter. Change class to multi-arch.
* gdbarch.h, gdbarch.c: Re-generate.
* remote.c (remote_xfer_memory): Use
gdbarch_remote_translate_xfer_address.
Index: include/gdb/ChangeLog
2003-05-07 Andrew Cagney <cagney@redhat.com>
* sim-d10v.h (sim_d10v_translate_addr): Add regcache parameter.
(sim_d10v_translate_imap_addr): Add regcache parameter.
(sim_d10v_translate_dmap_addr): Ditto.
Index: sim/d10v/ChangeLog
2003-05-07 Andrew Cagney <cagney@redhat.com>
* interp.c (sim_d10v_translate_addr): Add "regcache" parameter.
(sim_d10v_translate_imap_addr): Ditto.
(sim_d10v_translate_dmap_addr): Ditto.
(xfer_mem): Pass NULL regcache to sim_d10v_translate_addr.
(dmem_addr): Pass NULL regcache to sim_d10v_translate_dmap_addr.
(dmap_register, imap_register): Add "regcache" parameter.
(imem_addr): Pass NULL regcache to sim_d10v_translate_imap_addr.
(sim_fetch_register): Pass NULL regcache to imap_register and
dmap_register.
2003-05-07 19:21:13 +00:00
dd69d29260
[igen/ChangeLog]
...
2003-05-03 Chris Demetriou <cgd@broadcom.com>
* compare_igen_models: Tweak attribution slightly.
[mips/ChangeLog]
2003-05-03 Chris Demetriou <cgd@broadcom.com>
* cp1.c: Tweak attribution slightly.
* cp1.h: Likewise.
* mdmx.c: Likewise.
* mdmx.igen: Likewise.
* mips3d.igen: Likewise.
* sb1.igen: Likewise.
2003-05-02 22:17:21 +00:00
601da3163f
Fix changelog.
2003-04-16 00:58:40 +00:00
bcd0068ecf
2003-04-15 Richard Sandiford <rsandifo@redhat.com>
...
* vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
unsigned operands.
2003-04-16 00:52:08 +00:00
80d35d9032
2003-04-13 Michael Snyder <msnyder@redhat.com>
...
* Make-common.in (sim-events.o, sim-config.o): Depend on sim-main.h.
2003-04-13 17:45:11 +00:00
b7f97e9cb4
2003-04-13 Michael Snyder <msnyder@redhat.com>
...
* compile.c (sim_resume): Implement 'daa' and 'das' instructions.
2003-04-13 17:06:29 +00:00
5fe8b0dfe1
2003-04-13 Michael Snyder <msnyder@redhat.com>
...
* configure.in: Add testsuite to extra_subdirs.
* configure: Regenerate.
2003-04-13 Michael Snyder <msnyder@redhat.com>
* sim/h8300: New directory. Tests for Hitachi h8/300 family.
2003-04-13 16:44:57 +00:00
c88931b0ed
Only call XScale_check_memacc if in XScale mode.
2003-04-13 08:54:06 +00:00
1eec9e335d
oops - omitted from previous delta
2003-04-07 10:09:54 +00:00
ebc115b7bb
* simops.c (OP_40): Delete. Move code to...
...
* v850-igen.c (): ...Here. Sign extend the first operand.
* simops.h (OP_40): Remove prototype.
2003-04-06 08:51:04 +00:00
49634642a5
Add tests for ARM simulator.
2003-04-01 11:07:58 +00:00
3a3d6f654d
Remove use of __IWMMXT__.
2003-03-30 10:39:22 +00:00
0f026fd00c
Add iWMMXt support to ARM simulator
2003-03-27 17:13:33 +00:00
dd97b6fd7d
fix date on latest ChangeLog entry.
2003-03-20 12:32:05 +00:00
f603c8fe44
Add Cirrus Maverick support to arm simulator
2003-03-20 12:25:07 +00:00
d1360fb06a
Added Commandline Support.
...
2003-03-20 D.Venkatasubramanian <dvenkat@noida.hcltech.com>
* compile.c (cmdline_location): Added function to
return the location of 8-bit (256 locations) where the
Command Line arguments would be stored.
(decode): Added a TRAP to 0xcc for Commandline
processing using pseudo opcode O_SYS_CMDLINE.
(sim_resume): Added handling of O_SYS_CMDLINE Trap.
(sim_create_inferior): Setting a pointer to
Commandline Args array.
* inst.h: Added a new variable ptr_command_line for
storing pointer to Commandline array.
2003-03-20 06:00:25 +00:00
bf17422685
File I/O Support added.
...
2003-03-14 D.Venkatasubramanian <dvenkat@noida.hcltech.com>
* compile.c (decode): Added code for some more magic traps.
* compile.c (sim_resume): Added support for File I/O system
calls through callback to host_system.
System calls provided support for :
open, read, write, lseek, close, stat, fstat
Only basic support for stat and fstat.
2003-03-14 04:12:01 +00:00
0d9fd8f1d0
(SWIWrite0): Catch big-endian bug when printing characters
2003-03-02 10:28:29 +00:00
9b9f7b3ccd
* Makefile.in (SIM_EXTRA_CFLAGS): Set WITH_TARGET_ADDRESS_BITSIZE
...
to 32 to support memory bank switching; temporarily use 32-bit for
WORD_BITSIZE to avoid a bug in sim-common.
2003-03-02 10:03:40 +00:00
876fec0252
2003-03-01 Andrew Cagney <cagney@redhat.com>
...
* sim-engine.c (sim_engine_halt): If jmpbuf is invalid, abort.
(sim_engine_vabort): Ditto.
2003-03-01 20:54:22 +00:00
00416c6ed6
* interp.c (sim_fetch_register): Only store a single byte for
...
1 byte registers.
2003-03-01 16:00:09 +00:00
6b4a89357a
Index: arm/ChangeLog
...
2003-02-27 Andrew Cagney <cagney@redhat.com>
* wrapper.c (sim_create_inferior, sim_open): Rename _bfd to bfd.
Index: common/ChangeLog
2003-02-27 Andrew Cagney <cagney@redhat.com>
* sim-utils.h (sim_analyze_program, sim_load_file): Rename _bfd to bfd.
* sim-hload.c (sim_load), sim-base.h (sim_state_base): Ditto.
* nrun.c (main): Ditto.
Index: d10v/ChangeLog
2003-02-27 Andrew Cagney <cagney@redhat.com>
* interp.c (sim_open, sim_create_inferior): Rename _bfd to bfd.
Index: erc32/ChangeLog
2003-02-27 Andrew Cagney <cagney@redhat.com>
* interf.c (sim_open, sim_create_inferior): Rename _bfd to bfd.
Index: h8300/ChangeLog
2003-02-27 Andrew Cagney <cagney@redhat.com>
* compile.c (sim_open, sim_create_inferior): Rename _bfd to bfd.
Index: h8500/ChangeLog
2003-02-27 Andrew Cagney <cagney@redhat.com>
* compile.c (sim_open, sim_create_inferior): Rename _bfd to bfd.
Index: i960/ChangeLog
2003-02-27 Andrew Cagney <cagney@redhat.com>
* sim-if.c (sim_open, sim_create_inferior): Rename _bfd to bfd.
Index: m32r/ChangeLog
2003-02-27 Andrew Cagney <cagney@redhat.com>
* sim-if.c (sim_open, sim_create_inferior): Rename _bfd to bfd.
Index: m68hc11/ChangeLog
2003-02-27 Andrew Cagney <cagney@redhat.com>
* interp.c (sim_prepare_for_program, sim_open)
(sim_create_inferior): Rename _bfd to bfd.
Index: mcore/ChangeLog
2003-02-27 Andrew Cagney <cagney@redhat.com>
* interp.c (sim_open, sim_create_inferior): Rename _bfd to bfd.
Index: mips/ChangeLog
2003-02-27 Andrew Cagney <cagney@redhat.com>
* interp.c (sim_open):
(sim_create_inferior):
Index: mn10200/ChangeLog
2003-02-27 Andrew Cagney <cagney@redhat.com>
* interp.c (sim_open, sim_create_inferior): Rename _bfd to bfd.
Index: mn10300/ChangeLog
2003-02-27 Andrew Cagney <cagney@redhat.com>
* interp.c (sim_open, sim_create_inferior, sim_open)
(sim_create_inferior): Rename _bfd to bfd.
Index: ppc/ChangeLog
2003-02-27 Andrew Cagney <cagney@redhat.com>
* sim_calls.c (sim_open, sim_create_inferior): Rename _bfd to bfd.
Index: sh/ChangeLog
2003-02-27 Andrew Cagney <cagney@redhat.com>
* interp.c (init_dsp, sim_open, sim_create_inferior): Rename _bfd
to bfd.
Index: v850/ChangeLog
2003-02-27 Andrew Cagney <cagney@redhat.com>
* interp.c (sim_open, sim_create_inferior): Rename _bfd to bfd.
Index: z8k/ChangeLog
2003-02-27 Andrew Cagney <cagney@redhat.com>
* iface.c (sim_open, sim_create_inferior): Rename _bfd to bfd.
2003-02-27 23:26:34 +00:00
dbd7cd63b9
Index: common/ChangeLog
...
2003-02-26 Andrew Cagney <cagney@redhat.com>
* sim-engine.h (sim_engine_abort): Add noreturn attribute.
(sim_engine_vabort): Ditto.
(sim_engine_halt, sim_engine_restart): Ditto.
Index: mn10300/ChangeLog
2003-02-26 Andrew Cagney <cagney@redhat.com>
* am33.igen: Call sim_engine_abort instead of abort.
2003-02-26 23:27:09 +00:00
bb6317d347
2003-02-26 David Carlton <carlton@math.stanford.edu>
...
* dv-mn103tim.c (read_special_timer6_reg): Add break after
empty default: label.
(write_special_timer6_reg): Ditto.
Update copyright.
2003-02-26 17:04:19 +00:00
1bbd6057d5
cgen:
...
* cpu/sh64-media.cpu (make-mextr): Fix setting of count.
sim/sh64:
* sem-media-switch.c, sem-media.c: Regenerate.
2003-02-21 20:05:42 +00:00
836cc9f493
Index: include/gdb/ChangeLog
...
2003-02-20 Andrew Cagney <ac131313@redhat.com>
* remote-sim.c (gdbsim_insert_breakpoint)
(gdbsim_remove_breakpoint): Delete #ifdef SIM_HAS_BREAKPOINTS
code.
Index: include/gdb/ChangeLog
2003-02-20 Andrew Cagney <ac131313@redhat.com>
* remote-sim.h (SIM_RC): Delete unused SIM_RC_UNKNOWN_BREAKPOINT,
SIM_RC_INSUFFICIENT_RESOURCES and SIM_RC_DUPLICATE_BREAKPOINT.
(sim_set_breakpoint, sim_clear_breakpoint): Delete declarations.
(sim_clear_all_breakpoints, sim_enable_breakpoint): Ditto.
(sim_enable_all_breakpoints, sim_disable_breakpoint): Ditto.
(sim_disable_all_breakpoints): Ditto.
Index: sim/common/ChangeLog
2003-02-20 Andrew Cagney <ac131313@redhat.com>
* Make-common.in (SIM_NEW_COMMON_OBJS): Remove sim-break.o
(sim-break_h): Delete macro.
(sim-break.o): Delete rule.
* sim-break.c: Delete file.
* sim-break.h: Delete file.
* sim-base.h [SIM_HAVE_BREAKPOINTS]: Don't include "sim-break.h".
(STATE_BREAKPOINTS): Delete macro.
(sim_state_base): Delete field breakpoints.
* sim-module.c (modules) [SIM_HAVE_BREAKPOINTS]: Don't add
sim_break_install to array.
2003-02-20 14:37:59 +00:00
2bc8946db8
Commit Sh2E addition
2003-02-06 10:42:33 +00:00
ec38ce9947
* compile.c (init_pointers): Abort if wreg never gets initialized.
...
(sim_resume): Fix the handling of exts.w and extu.w.
2003-02-05 23:10:27 +00:00
ad4cda162b
* compile.c (sim_resume): Fix the handling of bxor.
2003-02-01 03:00:14 +00:00
837fd61c26
Missed one...
2003-01-16 20:03:30 +00:00
a4f27e3e0a
2003-01-16 Michael Snyder <msnyder@redhat.com>
...
* compile.c: Change K&R function definitions to ISO.
(fetch): Make static, and eliminate unused parameter 'n'.
2003-01-16 19:54:35 +00:00
d29e330fda
2003-01-14 Chris Demetriou <cgd@broadcom.com>
...
* mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
2003-01-14 19:01:41 +00:00
a2353a08ac
2003-01-14 Chris Demetriou <cgd@broadcom.com>
...
* mips.igen (EI, DI): Remove.
2003-01-14 18:15:08 +00:00
45fdcabea2
2003-01-10 Ben Elliston <bje@redhat.com>
...
* README.Cygnus: Rename from this ..
* README: .. to this.
2003-01-10 05:27:17 +00:00
7f53bce4e3
* remove duplicated entry from 2002-05-17 on 2002-05-20.
...
* s/SWI_TARGET_SWITCHES/SIM_TARGET_SWITCHES/.
2003-01-10 04:51:58 +00:00
45a15d6f78
* run.c (usage): Fix typos.
2003-01-08 17:18:29 +00:00
805517776c
2003-01-05 Richard Sandiford <rsandifo@redhat.com>
...
* Makefile.in (tmp-run-multi): Fix mips16 filter.
2003-01-06 01:57:40 +00:00
4c54fc26ed
2003-01-04 Richard Sandiford <rsandifo@redhat.com>
...
Andrew Cagney <ac131313@redhat.com>
Gavin Romig-Koch <gavin@redhat.com>
Graydon Hoare <graydon@redhat.com>
Aldy Hernandez <aldyh@redhat.com>
Dave Brolley <brolley@redhat.com>
Chris Demetriou <cgd@broadcom.com>
* configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
(sim_mach_default): New variable.
(mips64vr-*-*, mips64vrel-*-*): New configurations.
Add a new simulator generator, MULTI.
* configure: Regenerate.
* Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
(multi-run.o): New dependency.
(SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
(tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
(tmp-multi): Combine them.
(BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
(clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
(distclean-extra): New rule.
* sim-main.h: Include bfd.h.
(MIPS_MACH): New macro.
* mips.igen (vr4120, vr5400, vr5500): New models.
(clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
* vr.igen: Replace with new version.
2003-01-05 07:56:59 +00:00
e6c674b896
2003-01-04 Chris Demetriou <cgd@broadcom.com>
...
* configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
* configure: Regenerate.
2003-01-05 06:13:51 +00:00
28f50ac815
2002-12-31 Chris Demetriou <cgd@broadcom.com>
...
* sim-main.h (check_branch_bug, mark_branch_bug): Remove.
* mips.igen: Remove all invocations of check_branch_bug and
mark_branch_bug.
2002-12-31 21:31:32 +00:00
d0fe2f7e74
* compile.c: Fix formatting.
...
* inst.h: Likewise.
2002-12-26 05:44:46 +00:00
574654558a
* arch.c,arch.h,cpuall.h: Regenerate.
...
* cpu.c,cpu.h,decode.c,decode.h,model.c,sem-switch.c,sem.c: Regenerate.
* cpux.c,cpux.h,decodex.c,decodex.h,modelx.c,semx-switch.c: Regenerate.
2002-12-20 02:26:35 +00:00
5071ffe6bf
2002-12-16 Chris Demetriou <cgd@broadcom.com>
...
* tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
2002-12-17 07:27:53 +00:00
0da2b66558
2002-11-30 Andrew Cagney <cagney@redhat.com>
...
* simops.c: Use int, 1, 0 instead of boolean, true and false.
* sim-main.h: Ditto.
2002-11-30 18:01:30 +00:00
6c0a25e9f8
2002-11-28 Andrew Cagney <cagney@redhat.com>
...
* sim-main.h: Only include "idecode.h" once.
* Makefile.in (SIM_EXTRA_DEPS): Define.
2002-11-28 18:08:26 +00:00
127a77fee0
2002-11-27 Richard Sandiford <rsandifo@redhat.com>
...
* sim-fpu.c (sim_fpu_inv): Use sim_fpu_div.
2002-11-28 01:32:03 +00:00
b85e4829fa
2002-11-22 Andrew Cagney <ac131313@redhat.com>
...
* dv-core.c: Update copyright. sim/common contributed to the FSF.
* dv-glue.c, dv-pal.c, hw-base.c, hw-base.h, hw-device.c: Ditto.
* hw-device.h, hw-handles.c, hw-handles.h: Ditto.
* hw-instances.c, hw-instances.h, hw-properties.c: Ditto.
* hw-properties.h, hw-tree.c, hw-tree.h, sim-alu.h: Ditto.
* sim-basics.h, sim-bits.c, sim-bits.h, sim-config.c: Ditto.
* sim-config.h, sim-core.c, sim-core.h, sim-endian.c: Ditto.
* sim-endian.h, sim-events.c, sim-events.h, sim-inline.c: Ditto.
* sim-inline.h, sim-io.c, sim-io.h, sim-n-bits.h: Ditto.
* sim-n-core.h, sim-n-endian.h, sim-types.h: Ditto.
2002-11-23 01:12:05 +00:00
1fdb3c684d
2002-11-22 Andrew Cagney <cagney@redhat.com>
...
* gen.c (name_cmp): Rename format_name_cmp.
(insn_list_insert): When a merge, compare the format name and
instruction name. Add trace messages.
2002-11-22 23:20:46 +00:00
4e0bf4c4d0
2002-11-21 Andrew Cagney <ac131313@redhat.com>
...
* filter.c: Re-indent.
* filter.h, filter_host.h, gen-engine.c, gen-engine.h: Ditto.
* gen-icache.c, gen-icache.h, gen-idecode.c: Ditto.
* gen-idecode.h, gen-itable.c, gen-itable.h: Ditto.
* gen-model.c, gen-model.h, gen-semantics.c: Ditto.
* gen-semantics.h, gen-support.c, gen-support.h: Ditto.
* gen.c, gen.h, igen.c, igen.h, ld-cache.c, ld-cache.h: Ditto.
* ld-decode.c, ld-decode.h, ld-insn.c, ld-insn.h, lf.c: Ditto.
* lf.h, misc.c, misc.h, table.c, table.h: Ditto.
2002-11-22 04:20:49 +00:00
feaee4bdbb
2002-11-21 Andrew Cagney <ac131313@redhat.com>
...
* Makefile.in: Update copyright. IGEN contributed to the FSF.
* filter.c, filter.h, filter_host.c, filter_host.h: Ditto.
* gen-engine.c, gen-engine.h, gen-icache.c, gen-icache.h: Ditto.
* gen-idecode.c, gen-idecode.h, gen-itable.c: Ditto.
* gen-itable.h, gen-model.c, gen-model.h, gen-semantics.c: Ditto.
* gen-semantics.h, gen-support.c, gen-support.h, gen.c: Ditto.
* gen.h, igen.c, igen.h, ld-cache.c, ld-cache.h: Ditto.
* ld-decode.c, ld-decode.h, ld-insn.c, ld-insn.h, lf.c: Ditto.
* lf.h, misc.c, misc.h, table.c, table.h: Ditto.
2002-11-22 04:09:40 +00:00
d25b15536c
Index: common/ChangeLog
...
2002-11-13 Andrew Cagney <cagney@redhat.com>
* run.c (main): Remove SIM_HAVE_ENVIRONMENT from #endif.
Index: d10v/ChangeLog
2002-11-13 Andrew Cagney <cagney@redhat.com>
* simops.c: Include <string.h>.
2002-11-14 02:54:14 +00:00
ac835424b5
2002-11-06 Richard Sandiford <rsandifo@redhat.com>
...
* gen-engine.c (print_engine_issue_prefix_hook): Don't add the
global prefix to ENGINE_ISSUE_PREFIX_HOOK.
(print_engine_issue_postfix_hook): Likewise ENGINE_ISSUE_POSTFIX_HOOK.
2002-11-06 18:41:09 +00:00
d690312feb
2002-11-06 Richard Sandiford <rsandifo@redhat.com>
...
* Make-common.in (SIM_EXTRA_DISTCLEAN): New macro.
(distclean): Depend on it.
2002-11-06 18:40:25 +00:00
7c3e3b337e
* cgen-trace.h: Test __BFD_H_SEEN__ rather than BFD_VERSION.
2002-10-14 10:55:39 +00:00
fd8f4948fe
gcc uses trap 33 for profiling, but the simulator didn't support it.
...
This patch fixes the gcc.dg/nest.c failures for sh-elf.
Fri Oct 11 16:22:28 2002 J"orn Rennecke <joern.rennecke@superh.com>
* interp.c (trap): Return int. Take extra parameter for address
of the trap instruction. Changed all callers.
Add case 33 for profiling.
* gencode.c (trapa): Handle trap 33 using the trap function.
Add read of vector for generic traps.
2002-10-11 15:31:28 +00:00
30458d39d6
Fix handling of v850e bit-twiddle instructions.
...
* simops.c (OP_E6077E0): And op1 with 7 after reading register, not
before.
(BIT_CHANGE_OP): Likewise.
2002-09-30 20:11:08 +00:00
058f270dea
Add support for -m option. Fix PR gdb/433.
2002-09-27 23:57:50 +00:00
fe1198e63e
2002-09-27 Andrew Cagney <ac131313@redhat.com>
...
* hw_disk.c (hw_disk_init_address): Set device type to "block",
not "disk".
2002-09-27 21:02:14 +00:00
2e8162cedb
Fix bug in support for trap instruction.
...
* simops (OP_10007E0): Don't subtract 4 from PC.
2002-09-27 18:59:08 +00:00
5d6a173dca
Remove v850ea references
2002-09-19 07:52:02 +00:00
7ede505aef
2002-08-29 Dave Brolley <brolley@redhat.com>
...
* Make-common.in (CGEN_READ_SCM): Remove ../../cgen/stamp-cgen.
2002-08-29 19:27:52 +00:00
e551c2572e
Makefile.in: Add gen-zero-r0 option.
...
sim-main.h (GPR_SET, GPR_CLEAR): Define.
simops.c (OP_24007E0): Sign extend the imm9 operand of a mul instruction.
2002-08-29 16:59:20 +00:00
051b807af7
2002-08-28 Dave Brolley <brolley@redhat.com>
...
* gen-support.c (gen_support_h): Generate
'#define semantic_illegal <PREFIX>_semantic_illegal'.
2002-08-28 16:01:31 +00:00
a926ab2fb9
* MAINTAINERS: Change my mailing address.
2002-08-24 22:43:50 +00:00
dff11de0d8
2002-08-22 Chris Demetriou <cgd@broadcom.com>
...
* compare_igen_models: New script.
2002-08-23 06:26:05 +00:00
2ec3c90a77
oops - fix typo in previous delta
2002-08-16 09:38:09 +00:00
c7a7b500fd
Catch and ignore SWIs of -1, they can be caused by an interrupted system
...
call being resumed by GDB.
2002-08-15 14:28:55 +00:00
099d1b506b
* dv-m68hc11eepr.c (struct m68hc11eepr ): Use const char* for filename.
2002-08-13 09:01:16 +00:00
31c7c532ab
* interp.c (sim_prepare_for_program): Look up the image for the
...
reset vector and set cpu_use_elf_start to 1 if not found.
(sim_open): Do not set cpu_use_elf_start.
2002-08-13 08:52:02 +00:00
3976210097
* interp.c (sim_hw_configure): Return 1 for success.
...
(sim_prepare_for_program): Use the sim_hw_configure exit code to
return SIM_RC_FAIL.
2002-08-13 08:47:18 +00:00
ca156d780d
Fix english and ChangeLog entry
2002-08-13 08:40:32 +00:00
7230d80931
* dv-m68hc11.c (m68hc11cpu_io_read_buffer): Translate memory
...
bank window to some virtual address to read from extended memory.
(m68hc11cpu_io_write_buffer): Likewise for writing.
(attach_m68hc11_regs): When use_bank property is defined, attached
to the 68HC12 16K memory bank window.
* interp.c (sim_hw_configure): Create memory region for banked
memory.
2002-08-13 08:38:09 +00:00
dcceded28a
* interp.c (sim_hw_configure): Connect port-X to cpu-write-port.
...
* dv-m68hc11.c (m68hc11cpu_ports): Add cpu-write-port input.
(m68hc11cpu_port_event): Handle CPU_WRITE_PORT event.
2002-08-13 08:10:45 +00:00
abea9e28ea
* dv-m68hc11.c (m68hc11cpu_io_write): Fix to update IO mapping
...
when IO mapping changed, not when internal RAM mapping is changed.
2002-08-13 07:57:18 +00:00
63f36def60
* m68hc11_sim.c (cpu_special): Handle call and rtc instructions.
...
* sim-main.h (M6812_CALL_INDIRECT): Add to enum.
(m6811_regs): Add page register.
(cpu_set_page, cpu_get_page): New macros.
(phys_to_virt): New function.
(cpu_get_indexed_operand_addr, cpu_return): Declare.
* gencode.c: Identify indirect addressing mode for call and fix daa.
(gen_function_entry): New param to tell if src8/dst8 locals are
necessary.
(gen_interpreter): Use it to avoid generation of unused variables.
* interp.c (sim_fetch_register): Allow to read page register; page
register, A, B and CCR are only 1 byte wide.
(sim_store_register): Likewise for writing.
2002-08-13 07:46:09 +00:00
06e7837e0f
2002-07-30 Chris Demetriou <cgd@broadcom.com>
...
* mips.igen (do_load_double, do_store_double): New functions.
(LDC1, SDC1): Rename to...
(LDC1b, SDC1b): respectively.
(LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
2002-07-31 05:44:54 +00:00
2265c243fc
2002-07-29 Michael Snyder <msnyder@redhat.com>
...
* cp1.c (fp_recip2): Modify initialization expression so that
GCC will recognize it as constant.
2002-07-29 23:17:10 +00:00
a64bfde32f
Add dependences to Makefile.in and include sim-h8300 in compile.c
2002-07-29 17:01:57 +00:00
de0a1e42d0
Delete w65 directory.
2002-07-18 00:05:41 +00:00
75c4388adb
Index: sim/common/ChangeLog
...
2002-07-17 Andrew Cagney <cagney@redhat.com>
* run-sim.h: Add #ifdef RUN_SIM_H wrapper.
(sim_set_callbacks, sim_size, sim_trace)
(sim_set_trace, sim_set_profile_size, sim_kill): Declare. Moved
to here from "gdb/remote-sim.h".
Index: include/gdb/ChangeLog
2002-07-17 Andrew Cagney <cagney@redhat.com>
* remote-sim.h: Update copyright.
(sim_set_callbacks, sim_size, sim_trace)
(sim_set_trace, sim_set_profile_size, sim_kill): Delete. Moved to
"sim/common/run-sim.h".
2002-07-17 21:20:09 +00:00
2f14585c74
include/gdb:
...
* sim-sh.h: Add enum constants for sh[1-4], sh3e, sh3?-dsp,
renumbering the sh-dsp registers to use distinct numbers.
sim/sh:
* Makefile.in (interp.o): Depend on $(srcroot)/include/gdb/sim-sh.h.
* interp.c: Include "gdb/sim-sh.h".
(sim_store_register, sim_fetch_register): Use constants defined there.
gdb:
* sh-tdep.c (sh_dsp_register_sim_regno): New function.
(sh_gdbarch_init): Use it for sh-dsp.
2002-07-17 18:43:28 +00:00
7a3085c168
Obsolete fr30.
2002-07-16 14:30:14 +00:00
39248af88f
* sim-resume.c (sim_resume): Add local variable sig_to_deliver to
...
avoid possible longjmp problems with automatic variable siggnal.
2002-07-15 16:13:12 +00:00
076043f24e
From 2002-07-11 Momchil Velikov <velco@fadata.bg>:
...
* Make-common.in (installdirs): Make $(libdir) too, needed when
installing libsim.a.
2002-07-14 17:03:39 +00:00
3fbeef0be8
Obsolete the d30v.
2002-07-14 00:15:20 +00:00
630ace253a
Add checks to catch invaliud XScale MIA, MIAPH and MIAxy instructions.
2002-07-05 14:12:01 +00:00
6504452655
2002-06-24 Richard Sandiford <rsandifo@redhat.com>
...
* sh64.c: Update path of "callback.h".
2002-06-20 Elena Zannoni <ezannoni@redhat.com>
* sh64.c: Include correct file for register numbers.
2002-06-24 13:26:07 +00:00
bf1024d698
* Makefile.in (INTL_SRC): Define.
...
(INTL_CFLAGS): Define.
(INTL_DIR): Define.
(STD_CFLAGS): Add INTL_CFLAGS.
2002-06-22 19:10:34 +00:00
7b77dec665
Set correct value for ADP_Stopped_RunTimeError
2002-06-21 06:58:36 +00:00
a2f8b4f350
2002-06-18 Chris Demetriou <cgd@broadcom.com>
...
* mdmx.c (SD_): Delete.
(Unpredictable): Re-define, for now, to directly invoke
unpredictable_action().
(mdmx_acc_op): Fix error in .ob immediate handling.
2002-06-18 22:15:03 +00:00
b4b6c9398a
* interp.c (sim_firmware_command): Initialize `address'.
2002-06-18 21:32:15 +00:00
dc9feb5c97
* interp.c (sim_resume): Fix setting of bus error for
...
instruction fetch.
2002-06-18 15:54:44 +00:00
2796179517
* hw-events.c (hw_event_queue_schedule): Initialize `dummy'.
2002-06-17 23:53:45 +00:00
57af9c8bc0
* d10v_sim.h (SET_PSW_BIT): Add cast to avoid inverting an enum.
2002-06-17 23:37:43 +00:00
d62274a397
* simops.c (trace_result): Fix printf formatting.
2002-06-17 21:49:05 +00:00
bf96209254
* sim-memopt.c: Include <unistd.h>.
...
(do_memopt_add): Fix printf format.
* sim-events.c (sim_events_schedule): Initialize ``dummy''.
2002-06-17 21:45:55 +00:00
78e731cd36
* gen.c (gen_entry_expand_opcode): Initialize ``value'' to -1 and
...
``t'' to NULL.
* igen.c (main): Add default case to switch.
* gen-icache.c (print_icache_extraction): Ditto.
2002-06-17 21:44:06 +00:00
b74317ff8e
* Makefile.in (BUILD_CFLAGS): Remove -O0.
2002-06-17 21:03:40 +00:00
47243d69f7
2002-06-17 Elena Zannoni <ezannoni@redhat.com>
...
* psim.c (psim_options): Don't choke when gdb invokes us with
the --architecture option, just ignore it.
2002-06-17 19:58:39 +00:00
c8cca39f98
Import current --enable-gdb-build-warnings.
2002-06-16 16:33:35 +00:00
3832c25c18
* Makefile.in (autoconf-changelog autoheader-changelog): Let name,
...
id, date and host to be overriden by NAME, ID, DATE and HOST
respectfully. Use ISO dates.
2002-06-16 15:59:34 +00:00
3d2957e64e
Fix for transfers across segments.
2002-06-15 11:01:34 +00:00
e7e8118132
2002-06-14 Chris Demetriou <cgd@broadcom.com>
...
Ed Satterthwaite <ehs@broadcom.com>
* mips3d.igen: New file which contains MIPS-3D ASE instructions.
* Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
* mips.igen: Include mips3d.igen.
(mips3d): New model name for MIPS-3D ASE instructions.
(CVT.W.fmt): Don't use this instruction for word (source) format
instructions.
* cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
(fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
(fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
(NR_FRAC_GUARD, IMPLICIT_1): New macros.
* sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
(RSquareRoot1, RSquareRoot2): New macros.
(fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
(fp_rsqrt2): New functions.
* configure.in: Add MIPS-3D support to mipsisa64 simulator.
* configure: Regenerate.
2002-06-14 18:49:09 +00:00
eab549520a
fix attribution in previous changelog entry
2002-06-14 04:49:15 +00:00
3a2b820ef3
2002-06-13 Chris Demetriou <cgd@broadcom.com>
...
* cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
(value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
(fp_inv_sqrt, fpu_format_name): Add paired-single support.
(convert): Note that this function is not used for paired-single
format conversions.
(ps_lower, ps_upper, pack_ps, convert_ps): New functions.
* mips.igen (FMT, MOVtf.fmt): Add paired-single support.
(check_fmt_p): Enable paired-single support.
(ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
(PUU.PS): New instructions.
(CVT.S.fmt): Don't use this instruction for paired-single format
destinations.
* sim-main.h (FP_formats): New value 'fmt_ps.'
(ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
(PSLower, PSUpper, PackPS, ConvertPS): New macros.
2002-06-14 04:44:11 +00:00
d18ea9c2b8
2002-06-12 Chris Demetriou <cgd@broadcom.com>
...
* mips.igen: Fix formatting of function calls in
many FP operations.
2002-06-12 23:32:05 +00:00
95fd5cee7d
2002-06-12 Chris Demetriou <cgd@broadcom.com>
...
* mips.igen (MOVN, MOVZ): Trace result.
(TNEI): Print "tnei" as the opcode name in traces.
(CEIL.W): Add disassembly string for traces.
(RSQRT.fmt): Make location of disassembly string consistent
with other instructions.
2002-06-12 23:20:56 +00:00
4f0d55aeaa
2002-06-12 Chris Demetriou <cgd@broadcom.com>
...
* mips.igen (X): Delete unused function.
2002-06-12 22:22:41 +00:00
26216b9822
Add the file include/gdb/sim-arm.h defining an enum that specifies the
...
register numbering used by the GDB<->SIM interface.
2002-06-12 21:19:43 +00:00
307041b752
missed 2 in 2002. oops.
2002-06-12 00:46:41 +00:00
7d7d930f7a
002-06-09 Aldy Hernandez <aldyh@redhat.com>
...
* sim-fpu.c (unpack_fpu): Initialize exponent for
sim_fpu_class_zero.
(i2fpu): Same.
(sim_fpu_sqrt): Same.
2002-06-12 00:46:11 +00:00
3c25f8c7b0
Move include/callback.h and include/remote-sim.h to include/gdb/.
...
Update accordingly.
2002-06-09 15:45:54 +00:00
983b727e70
Fix name of enum used in cast (sim_fetch_register, sim_store_register).
2002-06-08 22:19:56 +00:00
f3c08b7e16
2002-06-07 Chris Demetriou <cgd@broadcom.com>
...
Ed Satterthwaite <ehs@broadcom.com>
* cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
(fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
* sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
(fp_nmsub): New prototypes.
(RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
(NegMultiplySub): New defines.
* mips.igen (RSQRT.fmt): Use RSquareRoot().
(MADD.D, MADD.S): Replace with...
(MADD.fmt): New instruction.
(MSUB.D, MSUB.S): Replace with...
(MSUB.fmt): New instruction.
(NMADD.D, NMADD.S): Replace with...
(NMADD.fmt): New instruction.
(NMSUB.D, MSUB.S): Replace with...
(NMSUB.fmt): New instruction.
2002-06-08 03:05:23 +00:00
52714ff9ee
2002-06-07 Chris Demetriou <cgd@broadcom.com>
...
Ed Satterthwaite <ehs@broadcom.com>
* cp1.c: Fix more comment spelling and formatting.
(value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
(denorm_mode): New function.
(fpu_unary, fpu_binary): Round results after operation, collect
status from rounding operations, and update the FCSR.
(convert): Collect status from integer conversions and rounding
operations, and update the FCSR. Adjust NaN values that result
from conversions. Convert to use sim_io_eprintf rather than
fprintf, and remove some debugging code.
* cp1.h (fenr_FS): New define.
2002-06-07 22:55:49 +00:00
577d8c4b5a
2002-06-07 Chris Demetriou <cgd@broadcom.com>
...
* cp1.c (convert): Remove unusable debugging code, and move MIPS
rounding mode to sim FP rounding mode flag conversion code into...
(rounding_mode): New function.
2002-06-07 16:50:42 +00:00
196496eda0
2002-06-07 Chris Demetriou <cgd@broadcom.com>
...
* cp1.c: Clean up formatting of a few comments.
(value_fpr): Reformat switch statement.
2002-06-07 16:43:19 +00:00
cfe9ea23c7
2002-06-06 Chris Demetriou <cgd@broadcom.com>
...
Ed Satterthwaite <ehs@broadcom.com>
* cp1.h: New file.
* sim-main.h: Include cp1.h.
(SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
(FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
(FP_RM_TOMINF, GETRM): Remove. Moved to cp1.h.
(FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
(value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
(ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
* cp1.c: Don't include sim-fpu.h; already included by
sim-main.h. Clean up formatting of some comments.
(NaN, Equal, Less): Remove.
(test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
(fp_cmp): New functions.
* mips.igen (do_c_cond_fmt): Remove.
(C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
Compare. Add result tracing.
(CxC1): Remove, replace with...
(CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
(DMxC1): Remove, replace with...
(DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
(MxC1): Remove, replace with...
(MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
2002-06-07 00:13:24 +00:00
c93abbccf2
* Makefile.in (ChangeLog): New makefile variable.
...
* README-HACKING: Mention the ChangeLog makefile variable.
2002-06-06 16:33:45 +00:00
73fa0d3fb2
* writecode.c (lookup_inst): Generate inverse table on-the-fly.
...
(z8k_inv_list): Delete global.
(DIRTY_HACK): Delete macro.
(makelist): Delete global.
(main): Delete code making a list. Delete dirty hack code. Use
lookup_inst instead of z8k_inv_list.
* list.c: Delete file.
* Makefile.in (writecode): Do not link in list.o.
(list.o): Delete target.
2002-06-06 15:50:50 +00:00
ee7254b0cc
2002-06-04 Chris Demetriou <cgd@broadcom.com>
...
* sim-main.h (FGRIDX): Remove, replace all uses with...
(FGR_BASE): New macro.
(FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
(_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
(NR_FGR, FGR): Likewise.
* interp.c: Replace all uses of FGRIDX with FGR_BASE.
* mips.igen: Likewise.
2002-06-04 22:38:41 +00:00
d3eb724f81
2002-06-04 Chris Demetriou <cgd@broadcom.com>
...
* cp1.c: Add an FSF Copyright notice to this file.
2002-06-04 16:35:24 +00:00
ba46ddd0cf
2002-06-04 Chris Demetriou <cgd@broadcom.com>
...
Ed Satterthwaite <ehs@broadcom.com>
* cp1.c (Infinity): Remove.
* sim-main.h (Infinity): Likewise.
* cp1.c (fp_unary, fp_binary): New functions.
(fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
(fp_sqrt): New functions, implemented in terms of the above.
(AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
(Recip, SquareRoot): Remove (replaced by functions above).
* sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
(fp_recip, fp_sqrt): New prototypes.
(AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
(Recip, SquareRoot): Replace prototypes with #defines which
invoke the functions above.
2002-06-04 16:17:20 +00:00
18d8a52d00
2002-06-03 Chris Demetriou <cgd@broadcom.com>
...
* sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
(Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
file, remove PARAMS from prototypes.
(value_fpr, store_fpr, convert): Likewise. Use SIM_STATE to provide
simulator state arguments.
(ValueFPR, StoreFPR, Convert): Move lower in file. Use SIM_ARGS to
pass simulator state arguments.
* cp1.c (SD): Redefine as CPU_STATE(cpu).
(store_fpr, convert): Remove 'sd' argument.
(value_fpr): Likewise. Convert to use 'SD' instead.
2002-06-04 01:35:23 +00:00
0f154cbd1c
2002-06-03 Chris Demetriou <cgd@broadcom.com>
...
* cp1.c (Min, Max): Remove #if 0'd functions.
* sim-main.h (Min, Max): Remove.
2002-06-04 00:18:46 +00:00
e80fc1523d
2002-06-03 Chris Demetriou <cgd@broadcom.com>
...
* cp1.c: fix formatting of switch case and default labels.
* interp.c: Likewise.
* sim-main.c: Likewise.
2002-06-03 22:30:52 +00:00
bad673a9cb
2002-06-03 Chris Demetriou <cgd@broadcom.com>
...
* cp1.c: Clean up comments which describe FP formats.
(FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
2002-06-03 22:05:15 +00:00
7cbea0890e
2002-06-03 Chris Demetriou <cgd@broadcom.com>
...
Ed Satterthwaite <ehs@broadcom.com>
* configure.in (mipsisa64sb1*-*-*): New target for supporting
Broadcom SiByte SB-1 processor configurations.
* configure: Regenerate.
* sb1.igen: New file.
* mips.igen: Include sb1.igen.
(sb1): New model.
* Makefile.in (IGEN_INCLUDE): Add sb1.igen.
* mdmx.igen: Add "sb1" model to all appropriate functions and
instructions.
* mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
(ob_func, ob_acc): Reference the above.
(qh_acc): Adjust to keep the same size as ob_acc.
* sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
(MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
2002-06-03 21:00:29 +00:00
909daa8222
2002-06-03 Chris Demetriou <cgd@broadcom.com>
...
* Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
2002-06-03 18:35:19 +00:00
4e62efb8f8
* gen-engine.c (print_run_body): Avoid multi-line strings.
...
* lf.c (lf_print__gnu_copyleft): Likewise.
2002-06-03 16:04:31 +00:00
676ab6a01e
Use current date in ChangeLog entry.
2002-06-03 00:47:14 +00:00
c7675842d8
2002-05-28 Elena Zannoni <ezannoni@redhat.com>
...
From Jason Eckhardt <jle@redhat.com>
* d10v_sim.h (INC_ADDR): Correctly handle the case where MOD_E is
less than MOD_S (post-decrement).
2002-06-03 00:36:02 +00:00
f4f1b9f102
2002-06-02 Chris Demetriou <cgd@broadcom.com>
...
Ed Satterthwaite <ehs@broadcom.com>
* mips.igen (mdmx): New (pseudo-)model.
* mdmx.c, mdmx.igen: New files.
* Makefile.in (SIM_OBJS): Add mdmx.o.
* sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
New typedefs.
(ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
(MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
(MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
(MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
(MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
(MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
(MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
(MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
(MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
(MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
(MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
(MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
(SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
(qh_fmtsel): New macros.
(_sim_cpu): New member "acc".
(mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
(mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
2002-06-02 07:39:26 +00:00
e4045cdb95
Delete TiC80, no longer supported by GDB.
2002-06-01 23:23:28 +00:00
18c0df9e1b
Fill-out d10v enum so that there are no ``=''.
2002-06-01 18:15:43 +00:00
dbec3bef45
* run.c: Fix formatting.
2002-05-31 02:17:26 +00:00
d7a97a9b1c
* lf.c (lf_print__gnu_copyleft): Convert multiline strings to
...
compatible format.
* gen-idecode.c (print_run_until_stop_body): Likewise.
* gen-model.c (gen_model_c): Likewise.
2002-05-30 15:07:06 +00:00
5aa682b2e0
Set the FSR and FAR registers if a Data Abort is detected.
2002-05-29 19:01:36 +00:00
1aa5e64f43
2002-05-28 Elena Zannoni <ezannoni@redhat.com>
...
* interp.c (sim_create_inferior): Add comment.
From Alan Matsuoka <alanm@redhat.com>:
From 2001-04-27 Jason Eckhardt <jle@cygnus.com>:
* simops.c (OP_4400): Output "mvf0f" instead of "mf0f".
(OP_4401): Output "mvf0t" instead of "mf0t".
(OP_460B): Do not output a flag register.
(OP_4609): Do not output a flag register.
2002-05-28 15:49:52 +00:00
10b57fcbd7
Only perform access checks if 'check' is set.
...
Report unknown machine numbers.
Formatting tidy ups.
2002-05-27 14:12:00 +00:00
7378e198a5
Thumb BL instruction: Do not set LR to pc + 2, it has already been advanced.
2002-05-27 13:30:36 +00:00
b91b96f4f6
* sim-d10v.h: Delete file. Moved to include/gdb/.
...
* sim-d10v.h: New file. Moved from include/sim-d10v.h.
* Makefile.in (INCLUDE): Add "gdb/sim-d10v.h".
* interp.c: Include "gdb/sim-d10v.h" instead of "sim-d10v.h".
* d10v-tdep.c: Include "gdb/sim-d10v.h" instead of "sim-d10v.h".
* Makefile.in (sim_d10v_h): Update definition.
2002-05-24 00:12:18 +00:00
2984e11475
When decoding a BLX(1) instruction do not add in the second bit of the base
...
address - this has already been accounted for.
2002-05-23 12:38:31 +00:00
8b2440b731
Simulate XScale BCUMOD register
2002-05-21 20:28:26 +00:00
de4112fa38
Add support for target specific command line switches to old-style simualtors.
...
Make use of this support in the ARM simulator to add a --swi-support= switch
to select whcih SWI protocols to emulate.
2002-05-20 14:32:50 +00:00
d13351445b
* compile.c: Fix formatting.
2002-05-19 12:52:54 +00:00
c3f4437ee1
* compile.c: Fix formatting.
2002-05-18 11:40:19 +00:00
6147b1f62b
* compile.c: Add absented opcodes: LDC, STC, EEPMOV, TAS.
2002-05-17 19:22:14 +00:00
fc97460264
h8300: Add support of EXR register
2002-05-17 19:19:24 +00:00
a8cdafbd4e
* h8300s now new target, not alias of h8300h
2002-05-17 19:09:13 +00:00
f6225c9615
*compile.c: Add additional CCR flags (I,UI,H,U)
2002-05-17 18:55:13 +00:00
3b02cf9281
* compile.c: Change literal regnumbers to REGNUMS.
2002-05-17 18:47:14 +00:00
1c509ca821
print_insn_sh cleanup:
...
include:
* dis-asm.h (print_insn_shl, print_insn_sh64l): Remove prototype.
gdb:
* sh-tdep.c (gdb_print_insn_sh64): Delete.
(gdb_print_insn_sh): Just set info->endian and use print_insn_sh.
(sh_gdbarch_init): Always use gdb_print_insn_sh.
opcodes:
* disassemble.c (disassembler): Just use print_insn_sh for bfd_arch_sh.
* sh-dis.c (LITTLE_BIT): Delete.
(print_insn_sh, print_insn_shl): Deleted.
(print_insn_shx): Renamed to
(print_insn_sh). No longer static. Handle SHmedia instructions.
Use info->endian to determine endianness.
* sh64-dis.c (print_insn_sh64, print_insn_sh64l): Delete.
(print_insn_sh64x): No longer static. Renamed to
(print_insn_sh64). Removed pfun_compact and endian arguments.
If we got an uneven address to indicate SHmedia, adjust it.
Return -2 for SHcompact instructions.
sim/sh64:
* sim-if.c (sh64_disassemble_insn): Use print_insn_sh instead of
print_insn_shl.
2002-05-17 14:36:46 +00:00
2be99286c5
* MAINTAINERS: Update my email address.
2002-05-16 13:38:55 +00:00
ace4f296f5
Uses sim callback interface for system calls in RedBoot SWI support.
2002-05-09 10:29:08 +00:00
d8512e6afd
Support the RedBoot SWI in ARM mode and some of its system calls.
2002-05-09 10:14:12 +00:00
5accf1ff56
[ common/ChangeLog ]
...
2002-05-01 Chris Demetriou <cgd@broadcom.com>
* callback.c: Use 'deprecated' rather than 'depreciated.'
[ igen/ChangeLog ]
2002-05-01 Chris Demetriou <cgd@broadcom.com>
* igen.c: Use 'deprecated' rather than 'depreciated.'
[ mips/ChangeLog ]
2002-05-01 Chris Demetriou <cgd@broadcom.com>
* interp.c: Use 'deprecated' rather than 'depreciated.'
* sim-main.h: Likewise.
2002-05-01 23:26:32 +00:00
402586aa26
2002-05-01 Chris Demetriou <cgd@broadcom.com>
...
* cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
which wouldn't compile anyway.
* sim-main.h (unpredictable_action): New function prototype.
(Unpredictable): Define to call igen function unpredictable().
(NotWordValue): New macro to call igen function not_word_value().
(UndefinedResult): Remove.
* interp.c (undefined_result): Remove.
(unpredictable_action): New function.
* mips.igen (not_word_value, unpredictable): New functions.
(ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
(CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
(do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
NotWordValue() to check for unpredictable inputs, then
Unpredictable() to handle them.
2002-05-01 17:26:14 +00:00
d1b0a5b4a9
Handle CLASS_IGNORE and ARG_NIM4.
2002-04-29 16:50:29 +00:00
c9b9995a38
2002-02-24 Chris Demetriou <cgd@broadcom.com>
...
* mips.igen: Fix formatting of calls to Unpredictable().
2002-04-25 05:37:03 +00:00
e101598283
Revert previous change.
2002-04-20 16:39:46 +00:00
b882a66bfc
* interp.c (sim_open): Disable chunk of code that wrote code in
...
vector table entries.
2002-04-18 19:47:14 +00:00
d395ade3db
2002-04-15 Elena Zannoni <ezannoni@redhat.com>
...
* sim_calls.c (sim_fetch_register, sim_store_register): Return -1 for
AltiVec registers as a temporary stopgap.
2002-04-15 16:32:55 +00:00
23c7880c01
2002-03-24 David O'Brien <obrien@FreeBSD.org>
...
* ppc/hw_disk.c: Export a disk device property.
This is needed by the FreeBSD/powerpc porting effort.
2002-03-25 04:39:20 +00:00
e7b564aa85
* gen.c (format_name_cmp): New function.
...
(insn_list_insert): Use the instruction field name as an
additional key. Different field names indicate different
semantics.
2002-03-24 00:43:28 +00:00
ec80ed8088
From 2001-12-09 Julien Ducourthial <jducourt@noos.fr>:
...
* ppc-instructions (lswx): Do the register control with the
register count. Initialize the right register in the loop.
(mtfsfi) : Correct prefix for the instruction.
2002-03-23 21:18:31 +00:00
c429b7ddd8
2002-03-19 Chris Demetriou <cgd@broadcom.com>
...
* cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
(FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
unused definitions.
2002-03-20 07:24:20 +00:00
37d146fa1d
2002-03-19 Chris Demetriou <cgd@broadcom.com>
...
* cp1.c: Fix many formatting issues.
2002-03-20 07:10:37 +00:00
07892c0b5a
2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
...
* cp1.c (fpu_format_name): New function to replace...
(DOFMT): This. Delete, and update all callers.
(fpu_rounding_mode_name): New function to replace...
(RMMODE): This. Delete, and update all callers.
2002-03-20 06:42:05 +00:00
487f79b73c
2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
...
* interp.c: Move FPU support routines from here to...
* cp1.c: Here. New file.
* Makefile.in (SIM_OBJS): Add cp1.o to object list.
(cp1.o): New target.
2002-03-20 01:35:13 +00:00
ae60d3ddec
Increase default memory size to 8MB.
2002-03-18 21:43:15 +00:00
1e799e28c1
2002-03-12 Chris Demetriou <cgd@broadcom.com>
...
* configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
* mips.igen (mips32, mips64): New models, add to all instructions
and functions as appropriate.
(loadstore_ea, check_u64): New variant for model mips64.
(check_fmt_p): New variant for models mipsV and mips64, remove
mipsV model marking fro other variant.
(SLL) Rename to...
(SLLa) this.
(CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
for mips32 and mips64.
(DCLO, DCLZ): New instructions for mips64.
2002-03-12 22:53:01 +00:00
82f728dbb8
2002-03-07 Chris Demetriou <cgd@broadcom.com>
...
* mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
immediate or code as a hex value with the "%#lx" format.
(ANDI): Likewise, and fix printed instruction name.
2002-03-08 00:37:14 +00:00
6225b4b7fc
2002-03-07 Chris Demetriou <cgd@broadcom.com>
...
* igen.c (print_itrace_format): Add support for a new "%#lx" format.
2002-03-08 00:36:32 +00:00
86596dc8e0
* m68hc11_sim.c (cpu_move8): Call sim_engine_abort in default case.
...
(cpu_move16): Likewise.
(sim_memory_error): Use sim_io_printf.
(cpu_option_handler): Fix compilation warning.
* interp.c (sim_hw_configure): Fix compilation warning;
remove m68hc12sio@2 device.
(sim_open): Likewise.
* dv-m68hc11tim.c (m68hc11tim_port_event): Fix clear of TFLG2
flags when reset.
(cycle_to_string): Improve convertion of cpu cycle number.
(m68hc11tim_info): Print info about PACNT.
(m68hc11tim_io_write_buffer): Fix clearing of TFLG2; handle
TCTL1 and TCTL2 registers.
* dv-m68hc11.c (m68hc11_info): Print 6811 current running mode.
2002-03-07 19:17:04 +00:00
827ec39a5a
* interp.c (sim_hw_configure): Save the HW cpu pointer in the
...
cpu struct.
(sim_hw_configure): Connect the capture input/output events.
* sim-main.h (_sim_cpu): New member hw_cpu.
(m68hc11cpu_set_oscillator): Declare.
(m68hc11cpu_clear_oscillator): Declare.
(m68hc11cpu_set_port): Declare.
* dv-m68hc11.c (m68hc11_options): New for oscillator commands.
(m68hc11cpu_ports): New input ports and output ports to reflect
the HC11 IOs.
(m68hc11_delete): Cleanup any running oscillator.
(attach_m68hc11_regs): Create the input oscillators.
(make_oscillator): New function.
(find_oscillator): New function.
(oscillator_handler): New function.
(reset_oscillators): New function.
(m68hc11cpu_port_event): Handle the new input ports.
(m68hc11cpu_set_oscillator): New function.
(m68hc11cpu_clear_oscillator): New function.
(get_frequency): New function.
(m68hc11_option_handler): New function.
(m68hc11cpu_set_port): New function.
(m68hc11cpu_io_write): Post the port output events.
* dv-m68hc11spi.c (set_bit_port): Use m68hc11cpu_set_port to set
the output port value.
* dv-m68hc11tim.c (m68hc11tim_port_event): Handle CAPTURE event
by latching the TCNT value in the register.
2002-03-07 19:12:44 +00:00
5abb9efa08
* sim-main.h (cpu_frame, cpu_frame_list): Remove.
...
(cpu_frame_reg, cpu_print_frame): Remove.
(cpu_m68hc11_push_uint8, cpu_m68hc11_pop_uint8): Cleanup.
(cpu_m68hc11_push_uint16, cpu_m68hc11_pop_uint16): Likewise.
(cpu_m68hc12_push_uint8, cpu_m68hc12_push_uint16): Likewise.
(cpu_m68hc12_pop_uint8, cpu_m68hc12_pop_uint16): Likewise.
* m68hc11_sim.c (cpu_find_frame): Remove.
(cpu_create_frame_list): Remove.
(cpu_remove_frame_list, cpu_create_frame, cpu_free_frame): Remove.
(cpu_frame_reg, cpu_print_frame, cpu_update_frame): Remove.
(cpu_call): Cleanup to remove #if HAVE_FRAME and calls to the above.
(cpu_update_frame): Likewise.
(cpu_return): Likewise.
(cpu_reset): Likewise.
(cpu_initialize): Likewise.
* interp.c (sim_do_command): Remove call to cpu_print_frame.
2002-03-07 19:06:34 +00:00
261289656f
* interrupts.c (interrupts_reset): New function, setup interrupt
...
vector address according to cpu mode.
(interrupts_initialize): Move reset portion to the above.
(interrupt_names): New table to give a name to interrupts.
(idefs): Handle pulse accumulator interrupts.
(interrupts_info): Print the interrupt history.
(interrupt_option_handler): New function.
(interrupt_options): New table of options.
(interrupts_update_pending): Keep track of when interrupts are
raised and implement breakpoint-on-raise-interrupt.
(interrupts_process): Keep track of when interrupts are taken
and implement breakpoint-on-interrupt.
* interrupts.h (struct interrupt_history): Define.
(struct interrupt): Keep track of the interrupt history.
(interrupts_reset): Declare.
(interrupts_initialize): Update prototype.
* m68hc11_sim.c (cpu_reset): Reset interrupts.
(cpu_initialize): Cleanup.
2002-03-07 18:59:38 +00:00
44befb9ff7
* MAINTAINERS: Record self as maintainer of m68hc11 simulator.
2002-03-06 20:15:53 +00:00
b96e7ef1a0
2002-03-05 Chris Demetriou <cgd@broadcom.com>
...
* sim-main.h (UndefinedResult, Unpredictable): New macros
which currently do nothing.
2002-03-06 06:46:29 +00:00
d35d4f709f
2002-03-05 Chris Demetriou <cgd@broadcom.com>
...
* sim-main.h (status_UX, status_SX, status_KX, status_TS)
(status_PX, status_MX, status_CU0, status_CU1, status_CU2)
(status_CU3): New definitions.
* sim-main.h (ExceptionCause): Add new values for MIPS32
and MIPS64: MDMX, MCheck, CacheErr. Update comments
for DebugBreakPoint and NMIReset to note their status in
MIPS32 and MIPS64.
(SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
(SignalExceptionCacheErr): New exception macros.
2002-03-06 06:21:17 +00:00
3ad6f714f2
2002-03-05 Chris Demetriou <cgd@broadcom.com>
...
* mips.igen (check_fpu): Enable check for coprocessor 1 usability.
* sim-main.h (COP_Usable): Define, but for now coprocessor 1
is always enabled.
(SignalExceptionCoProcessorUnusable): Take as argument the
unusable coprocessor number.
2002-03-06 05:41:40 +00:00
97a88e93be
fix month on 4 of my recent entries (*sigh*)
2002-03-05 22:25:06 +00:00
86b77b471b
2002-03-05 Chris Demetriou <cgd@broadcom.com>
...
* mips.igen: Fix formatting of all SignalException calls.
2002-03-05 22:24:24 +00:00
3dea6720b3
2002-02-05 Chris Demetriou <cgd@broadcom.com>
...
* sim-main.h (SIGNEXTEND): Remove.
2002-03-05 19:22:13 +00:00
b5040d49af
2002-02-04 Chris Demetriou <cgd@broadcom.com>
...
* mips.igen: Remove gencode comment from top of file, fix
spelling in another comment.
2002-03-05 07:34:01 +00:00
8612006bd7
2002-02-04 Chris Demetriou <cgd@broadcom.com>
...
* mips.igen (check_fmt, check_fmt_p): New functions to check
whether specific floating point formats are usable.
(ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
(FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
(ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
Use the new functions.
(do_c_cond_fmt): Remove format checks...
(C.cond.fmta, C.cond.fmtb): And move them into all callers.
2002-03-05 03:14:56 +00:00
9b17d183bf
2002-02-03 Chris Demetriou <cgd@broadcom.com>
...
* mips.igen: Fix formatting of check_fpu calls.
2002-03-04 04:14:51 +00:00
41774c9d7b
2002-03-03 Chris Demetriou <cgd@broadcom.com>
...
* mips.igen (FLOOR.L.fmt): Store correct destination register.
2002-03-04 04:06:47 +00:00
4a0bd8769a
2002-03-03 Chris Demetriou <cgd@broadcom.com>
...
* mips.igen: Remove whitespace at end of lines.
2002-03-04 03:19:49 +00:00
09297648e2
2002-03-02 Chris Demetriou <cgd@broadcom.com>
...
* mips.igen (loadstore_ea): New function to do effective
address calculations.
(do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
CACHE): Use loadstore_ea to do effective address computations.
2002-03-03 07:36:42 +00:00
043b7057fd
2002-03-02 Chris Demetriou <cgd@broadcom.com>
...
* interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
* mips.igen (LL, CxC1, MxC1): Likewise.
2002-03-03 06:49:43 +00:00
c1e8ada406
2002-03-02 Chris Demetriou <cgd@broadcom.com>
...
* mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
Don't split opcode fields by hand, use the opcode field values
provided by igen.
2002-03-03 02:11:23 +00:00
3e1dca16f2
2002-03-01 Chris Demetriou <cgd@broadcom.com>
...
* mips.igen (do_divu): Fix spacing.
* mips.igen (do_dsllv): Move to be right before DSLLV,
to match the rest of the do_<shift> functions.
2002-03-01 23:51:18 +00:00
fff8d27d23
2002-03-01 Chris Demetriou <cgd@broadcom.com>
...
* mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
DSRL32, do_dsrlv): Trace inputs and results.
2002-03-01 23:40:51 +00:00
ce93e51a12
* vaporous abdication
2002-03-01 21:51:21 +00:00
0d3e762b2f
2002-03-01 Chris Demetriou <cgd@broadcom.com>
...
* mips.igen (CACHE): Provide instruction-printing string.
* interp.c (signal_exception): Comment tokens after #endif.
2002-03-01 19:55:42 +00:00
eb5fcf9324
2002-02-28 Chris Demetriou <cgd@broadcom.com>
...
* mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
(MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
LWC1, SWC1): Add "f" to filter, since these are FP instructions.
2002-03-01 07:53:46 +00:00
bb22bd7d9e
2002-02-28 Chris Demetriou <cgd@broadcom.com>
...
* mips.igen (DSRA32, DSRAV): Fix order of arguments in
instruction-printing string.
(LWU): Use '64' as the filter flag.
2002-03-01 07:34:57 +00:00
91a177cf81
2002-02-28 Chris Demetriou <cgd@broadcom.com>
...
* mips.igen (SDXC1): Fix instruction-printing string.
2002-03-01 06:40:28 +00:00
387f484ade
2002-02-28 Chris Demetriou <cgd@broadcom.com>
...
* mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
filter flags "32,f".
2002-03-01 06:34:21 +00:00
3d81f39116
2002-02-27 Chris Demetriou <cgd@broadcom.com>
...
* mips.igen (PREFX): This is a 64-bit instruction, use '64'
as the filter flag.
2002-02-28 07:07:56 +00:00
af5107af97
2002-02-27 Chris Demetriou <cgd@broadcom.com>
...
* mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
add a comma) so that it more closely match the MIPS ISA
documentation opcode partitioning.
(PREF): Put useful names on opcode fields, and include
instruction-printing string.
2002-02-28 07:01:14 +00:00
ca97154034
2002-02-27 Chris Demetriou <cgd@broadcom.com>
...
* mips.igen (check_u64): New function which in the future will
check whether 64-bit instructions are usable and signal an
exception if not. Currently a no-op.
(DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
* mips.igen (check_fpu): New function which in the future will
check whether FPU instructions are usable and signal an exception
if not. Currently a no-op.
(ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
2002-02-28 02:57:34 +00:00
1c47a468ec
2002-02-27 Chris Demetriou <cgd@broadcom.com>
...
* mips.igen (do_load_left, do_load_right): Move to be immediately
following do_load.
(do_store_left, do_store_right): Move to be immediately following
do_store.
2002-02-27 22:46:35 +00:00
603a98e7a1
2002-02-27 Chris Demetriou <cgd@broadcom.com>
...
* mips.igen (mipsV): New model name. Also, add it to
all instructions and functions where it is appropriate.
2002-02-27 21:52:52 +00:00
080fe24b58
Fix PR gdb/287. From wiz at danbala. Then->than and typos.
2002-02-25 02:13:10 +00:00
b3ba81f8ee
* armos.c (SWIWrite0): Use generic host_callback mechanism
...
for supported OS functions "open", "close", "write", etc.
(SWIopen): Likewise.
(SWIread): Likewise.
(SWIwrite): Likewise.
(SWIflen): Likewise.
(ARMul_OSHandleSWI): Likewise.
2002-02-21 20:22:49 +00:00
c5d00cc701
2002-02-18 Chris Demetriou <cgd@broadcom.com>
...
* mips.igen: For all functions and instructions, list model
names that support that instruction one per line.
2002-02-19 08:10:44 +00:00
Michael Snyder