The cris sim hit a few failures after the recent getopt logic, and the
expected output showed a few ways we can improve things to better match
other utils.
The compiler/C library should produce reasonable code for htonl/ntohl,
and at least glibc tries pretty hard to always produce good code for
them. This logic only had support for 32-bit x86 systems anymore, and
it's unlikely people were even opting into this, so drop it all.
The compiler should produce reasonable code here in general, so punt the
various arch checks and bswap defines. This code will eventually go away
entirely when we convert it to the common memory code.
Fix a long standing todo where we let getopt write directly to stderr
when an invalid option is passed. Use the sim io funcs instead as they
go through the filtered callbacks that gdb wants.
Clean up some more remains of WITH_DEVICES that escaped notice.
We also clean up GETTWI/SETTWI defines in a few ports where they
were copied & pasted and are unused as they happen to be near the
device code.
The --enable-sim-hostendian flag was purely so people had an escape route
for when cross-compiling. This is because historically, AC_C_BIGENDIAN
did not work in those cases. That was fixed a while ago though, so we can
require that macro everywhere now and simplify a good bit of code.
Rather than re-invent endian defines, as well as maintain our own list
of OS & arch-specific includes, punt all that logic in favor of the bfd
ones already set up and maintained elsewhere. We already rely on the
bfd library, so leveraging the endian aspect should be fine.
The iq2000/m32r/sh64 option parsing logic appears to have always been
dead. At least iq2000/sh64 are simply copy & paste rot from m32r.
The lm32 option parsing hack here hasn't been needed for a while -- this
was fixed back in commit 11409fac6b in the
common code.
The global current_state handle to the current simulator state is a
design idea that was half implemented, but never really cleaned up.
The point was to have a global variable pointing to the state so that
funcs could more quickly & easily access the state anywhere. We've
instead moved in the direction of passing state around everywhere and
don't have any intention of moving back.
I also can't find any references to gdb using this variable, or to
cgen related "dump_regs" functions, both of which were used in the
comments related to this code.
When connecting to the simulator in gdb, we don't want it to exit on
us when we pass down unknown/invalid/help/etc... options. Plumb down
the kind argument so we can handle both gdb & psim interfaces.
We can leverage the cpu->regs array rather than going through the
function helpers to get nice compact code.
Further, fix up the return values: return -1 when we can't find a
register (and let the caller write out warnings), return 2/4 when
we actually write out that amount, and handle the zero reg.
This array isn't used anywhere, and the init phase actually corrupts
some memory because the array has 18 elements but tries to set the
19th (ZERO) position.
This change tracks the "closed" state of file descriptors 0, 1, and 2,
introducing the function fdbad() to emul_netbsd.c and emul_unix.c.
Note that a function of the same name and purpose exists in
sim/common/callback.c.
This patch eliminates all of the "unresolved testcases" when testing
GDB against the powerpc simulator.
This occurs because the powerpc simulator closes, on behalf of the
testcase, the file descriptors associated with stdin, stdout, and
stderr. GDB still needs these descriptors to communicate with the
user or, in this case, with the testing framework.
The disasm framework reserves the private_data field for the disassemblers
themselves, not for people who use the disassembler. Instead, there is an
application_data field for callers such as the sim. Switch to it to avoid
random corruption/crashes when the disassemblers use private_data.
Pretty much all targets are using this module already, so add it to the
common list of objects. The only oddball out here is cris and that's
because it supports loading via an offset for all the phdrs. We drop
support for that.
No arch is using this anymore, and we want all new ports using the
hardware framework instead. Punt WITH_DEVICES and the two callbacks
device_io_{read,write}_buffer.
We can also punt the tconfig.h file as no port is using it anymore.
This fixes in-tree builds that get confused by picking up the wrong
one (common/ vs <port>/) caused by commit ae7d0cac8c.
Any port that needs to set up a global define can use their own
sim-main.h file that they must provide regardless.
The bfin port is using the WITH_DEVICES framework for two reasons:
- get access to the cpu making the request (if available)
- check the alignment & size for core & system MMRs
We addressed the first part with commit dea10706e9,
and we handle the second part with this commit. Arguably this is more
correct too because trying to do bad reads/writes directly (when devices
support is disabled) often results in bad memory accesses.
As part of this clean up, we also adjust all of the existing logic that
would reject invalid accesses: the code was relying on the checks never
returning, but that's not the case when things like gdb (via the user's
commands) are making the requests. Thus we'd still end up with bad mem
accesses, or sometimes gdb being hung due to while(1) loops.
Now we can connect (most of) these models into any address and have them
work correctly.
We set up an array of 3 elements and then index into it with a 2bit
value. We check the range before we actually use the pointer, but
the indexing is enough to make asan upset, so just stuff a fourth
value in there to keep things simple.
The bfin port has been using the device callback largely so it could be
passed the cpu when available. Add this logic to the common core code
so all ports get access to the active cpu.
The semantics of these buffer functions are changed slightly in that
errors halt the engine synchronously rather than returning the length
to the caller. We'll probably adjust this in a follow up commit.
The bfin code isn't updated just yet as it has a bit more logic in the
device layer that needs to be unwound at which point we can delete it
entirely.
The only unique thing about mip's sim_{read,write} helpers is the call to
address_translation on the incoming address. When we look closer at that
function though, we see it's just a stub that maps physical to virtual,
and the cache/return values are hardcoded. If we delete this function,
we can then collapse all the callers and drop the custom sim_{read,write}
logic entirely.
Some day we might want to add MMU support, but when we do, we'll want to
have the common layers handle things so all targets benefit.
The point of passing down the cpu to core reads/writes is to signal which
cpu is making the access. For system accesses (such as internal memory
initialization), passing the cpu down doesn't make sense, and in the case
of early init like cris, can cause crashes. Since the cpu isn't fully set
up at this point, if the core code tries to access some fields (like the
PC reg), it'll crash. While cris shouldn't be doing this setup here (it
should be in the inferior stage), we'll deal with that later.
For targets that process argv in sim_create_inferior, improve the code:
- provide more details in the comment
- make the check for when to re-init more robust
- clean out legacy sim_copy_argv code
This will be cleaned up more in the future when we have a common inferior
creation function, but at least help new ports get it right until then.
The frv port used the device logic to support a single cache address,
and the comments around that are "these were merely copied from a diff
port and are unused", plus the code to attach the memory is "#if 0".
Just punt it all.
The m32r port was using the device framework to handle two devices: the
cache and uart registers. Both can be implemented in the newer hardware
framework instead which allows us to drop the device logic entirely, as
well as delete the tconfig.h file.
While creating the new uart device model, I also added support for using
stdin to read/write data rather than only supporting sockets.
This has been lightly tested as there doesn't appear to be test coverage
for the code already. If anyone still cares about this port, then they
should (hopefully) file bug reports.
The cris port was using the device framework to handle two addresses when
the --cris-900000xx flag was specified. That can be implemented using the
newer hardware framework instead which allows us to drop the device logic
entirely, as well as delete the tconfig.h file. Basically we create a new
cris_900000xx device model and move the read logic out of devices.c and
into that. The rest of the devices logic was callback to the hardware
framework already.
Much like we autodetect the path to the run program when there is none
set explicitly, do the same for the rvdummy program. Otherwise the
default make check fails to execute the helper properly.
These trace calls don't seem to add anything useful and break the cris
hw tests, so punt them. They were disabled before commit 6d519a4606
but were re-enabled as part of TRACE macro cleanups.
Rather than include this for some targets, set it up so we can build it
all the time via the common code. This makes it easier for targets to
opt into it when they're ready, increases build coverage, and allows us
to centralize much of the logic.
We also get to delete tconfig.h from two more targets -- they were
setting WITH_DEVICES to 0 which has the same behavior as not defining
it at all.
While the SIM_HAVE_MODEL knob is gone, we now have WITH_MODEL_P, but it
is only used by the common sim-model code. We use it to declare dummy
model lists when the arch hasn't created its own.
The "MACH" and "MODEL" names are a bit generic and collide with symbols
used by other sections of code (like h8300's opcodes). Since these are
sim-specific types, they really should have a "SIM_" prefix.
Only four targets implement this function, and three of them do nothing.
The 4th merely calls abort. Since calls to this function are followed
by calls to sim_hw_abort or sim_io_error, this is largely useless. In
the two places where we don't, replace the call with sim_engine_abort.
We want to kill off the WITH_DEVICES logic in favor of WITH_HW, so this
is a good first step.
We enable WITH_CALLBACK_MEMORY everywhere and don't provide a way to
turn it off, and no target does so. Make it unconditional for all
to keep things simple.
Since the core always provides CPU_INDEX, use it. The current code
doesn't actually use it even though it should since it doesn't include
the right headers.
Most targets already default to loading code via their LMA, but for
a few, this means the default changes from loading VMA to LMA. It's
better to have the different targets be consistent, and allows some
code clean up.
We've moved custom option install for other targets to sim_open, so update
cris too. It's the last one using MODULE_LIST, so we can drop that from
the common code too.
This code relies on the old sim-break module, but that was deleted in 2003.
The module only existed for gdb to tell the sim to set breakpoints on its
behalf, but then that logic was abandoned in favor of gdb knowing all about
proper breakpoints (since it does already for non-sim targets). Some dead
code lived on in the older ports though -- clean it up now.
We build & bundle the watchpoint module everywhere, but we don't make
the command line flags available by default. A few targets opted in,
but most did not. Just enable the flag for everyone. Not all targets
will respect the flags (making them nops), but shouldn't be a big deal.
This is how we handle other common modules already.
No target has used this, and it's a cheap hack in place in using the
common memory module. We want everyone using that though, so drop
support for flatmem entirely.
Fix occurrences of left-shifting negative constants in C code.
sim/arm/ChangeLog:
* thumbemu.c (handle_T2_insn): Fix left shift of negative value.
* armemu.c (handle_v6_insn): Likewise.
sim/avr/ChangeLog:
* interp.c (sign_ext): Fix left shift of negative value.
sim/mips/ChangeLog:
* micromips.igen (process_isa_mode): Fix left shift of negative
value.
sim/msp430/ChangeLog:
* msp430-sim.c (get_op, put_op): Fix left shift of negative value.
sim/v850/ChangeLog:
* simops.c (v850_bins): Fix left shift of negative value.
* aarch64/simulator.c (system_get): New function. Provides read
access to the dczid system register.
(do_mrs): New function - implements the MRS instruction.
(dexSystem): Call do_mrs for the MRS instruction. Halt on
unimplemented system instructions.
* msp430-sim.c (sim_open): Check for needed memory at address
0x500 not 0x200.
(get_op): Add support for F5 hardware multiply addresses.
(put_op): Likewise.
POSIX does not define $< behavior in ordinary rules, so avoid its use
to fix building on non-GNU make setups.
Reported-by: Christopher January <chris.january@allinea.com>
Keeping track of the right printf formats for the various types can be
a pretty big hassle, especially in common code which has to support a
variety of bitsizes. Take a page from the existing standards and add
a set of PRI macros which hide the details in a common header.
This is not entirely useful as avr doesn't (yet) store its register
state in the cpu state, but it does allow for switching to the common
code for these functions.
Having this be a config option doesn't make sense: the code size is
pretty much the same (as all the logic is still active), and if it's
disabled, the sim throws an error if you try to use it. That means
we can't break sims that weren't using it before by enabling it all
the time.
Building a gdb that includes the PPC sim in C++ mode fails to link with:
(...)s.o compile-object-load.o compile-object-run.o compile-loc2c.o compile-c-support.o inflow.o init.o \
../sim/ppc/libsim.a ../readline/libreadline.a ../opcodes/libopcodes.a ../bfd/libbfd.a -lz ../libiberty/libiberty.a ../libdecnumber/libdecnumber.a -ldl -ldl -lncurses -lm -ldl -lguile-2.0 -lgc -lpthread -ldl -lutil -lm -lpython2.7 -Xlinker -export-dynamic -lexpat -llzma -lbabeltrace -lbabeltrace-ctf ../libiberty/libiberty.a build-gnulib/import/libgnu.a
../sim/ppc/libsim.a(sim_calls.o): In function `sim_open':
/home/pedro/gdb/mygit/cxx-convertion/src/sim/ppc/sim_calls.c:73: undefined reference to `printf_filtered'
/home/pedro/gdb/mygit/cxx-convertion/src/sim/ppc/sim_calls.c:73: undefined reference to `printf_filtered'
../sim/ppc/libsim.a(sim_calls.o): In function `sim_close':
/home/pedro/gdb/mygit/cxx-convertion/src/sim/ppc/sim_calls.c:93: undefined reference to `printf_filtered'
/home/pedro/gdb/mygit/cxx-convertion/src/sim/ppc/sim_calls.c:93: undefined reference to `printf_filtered'
../sim/ppc/libsim.a(sim_calls.o): In function `sim_load':
/home/pedro/gdb/mygit/cxx-convertion/src/sim/ppc/sim_calls.c:102: undefined reference to `printf_filtered'
../sim/ppc/libsim.a(sim_calls.o):/home/pedro/gdb/mygit/cxx-convertion/src/sim/ppc/sim_calls.c:102: more undefined references to `printf_filtered' follow
collect2: error: ld returned 1 exit status
The undefined references come from TRACE macro calls, which expand to
calls to printf_filtered.
But note that the sim's 'printf_filtered' is actually a #define to
'sim_io_printf_filtered', in sim_callbacks.h :
#define printf_filtered sim_io_printf_filtered
AFAICS, this is not meant to call gdb's printf_filtered function. The
ChangeLog entry that added the printf_filtered macro reads:
Tue Jul 30 21:12:24 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
* sim_callbacks.h (sim_io_printf_filtered): Replace
printf_filtered with a local simulator specific version. Add
#define printf_filtered to simplify updating of existing code.
That is, just another incomplete/partial transition. Maybe prior to
1996 this was really meant to call gdb's printf_filtered version.
The reference to printf_filtered appears because sim_calls.c, the
compilation unit that fails to link, has this at the top:
#undef printf_filtered /* blow away the mapping */
presumably so that this further below:
void
sim_io_printf_filtered(const char *fmt,
...)
{
(...)
callbacks->printf_filtered(callbacks, "%s", message);
}
works. So those TRACE macros instances in sim_calls.c just happen to
work because gdb is linked in, which satisfies the 'printf_filtered'
reference, when GDB is built in C mode. When built in C++ mode, the
problem is exposed, as GDB's printf_filtered is mangled.
The fix here is to make the TRACE macro call sim_io_printf_filtered
directly.
(Standalone "run" doesn't fail to link simply because the offending
routines are not part of its link.)
sim/ppc/ChangeLog
2015-11-17 Pedro Alves <palves@redhat.com>
* debug.h (TRACE, ITRACE, DTRACE, DITRACE, PTRACE): Call
sim_io_printf_filtered instead of printf_filtered.
Now that all arches (for the most part) have moved over, move sim-stop.o,
sim-reason.o, and sim-reg.o to the common object list and out of all the
arch ports.
Now that we have access to the sim state everywhere, we can convert to
the common engine logic for overall processing. This frees us up from
tracking exception state ourselves.
The cr16 port has a lot of translation/offset logic baked into it, but
it all looks like copy & paste from the d10v port rather than something
the cr16 port wants.
By itself, this commit doesn't really change anything. It lays the
groundwork for using the cpu state in follow up commits, both for
engine state and for cpu state. Splitting things up this way so it
is easier to see how things have changed.
Now that we have access to the sim state everywhere, we can convert to
the common engine logic for overall processing. This frees us up from
tracking exception state ourselves.
By itself, this commit doesn't really change anything. It lays the
groundwork for using the cpu state in follow up commits, both for
engine state and for cpu state. Splitting things up this way so it
is easier to see how things have changed.
This avoids using global variables to hold the cpu state so we can
better integrate with the sim common code.
There's also a minor fix here where we move the pc register back into
the state that is accessible by the asints array. When it was pulled
out previously, the reg store/fetch functions broke, but no one really
noticed as the mcore gdb port was dropped a while back.
This is not entirely useful as mcore doesn't (yet) store its register
state in the cpu state, but it does allow for switching to the common
code for these functions.
Other than the nice advantage of all sims having to declare one fewer
common function, this also fixes leakage in pretty much every sim.
Many were not freeing any resources, and a few were inconsistent as
to the ones they did. Now we have a single module that takes care of
all the logic for us.
Most of the non-cgen based ones could be deleted outright. The cgen
ones required adding a callback to the arch-specific cleanup func.
The few that still have close callbacks are to manage their internal
state.
We do not convert erc32, m32c, ppc, rl78, or rx as they do not use
the common sim core.
Sometimes in tests, we need supplemental files like linker scripts or
board helper files. There's no way to set those flags in the tests
currently and relative paths don't work (breaks out of tree builds).
Update the main option parser to replace some strings on the fly. Now
tests can do things like:
Long term we'll want to switch the framework to use the dejagnu helpers
like dg-xxx that gcc & gdb utilize. But that'll require more rework.
When handling left saturated ashifts with negative immediates, they
should be treated as right ashifts. This matches hardware behavior.
Reported-by: Igor Rayak <igorr@gitatechnologies.com>
The FT32 simulator was not correctly simulating the behavior of the
program memory (PM) write port. When it is locked, writes to the
data register do nothing.
2015-09-25 Andrew Bennett <andrew.bennett@imgtec.com>
Ali Lown <ali.lown@imgtec.com>
sim/common/
* sim-bits.h (EXTEND6): New macro.
(EXTEND12): New macro.
(EXTEND25): New macro.
sim/mips/
* Makefile.in (tmp-micromips): New rule.
(tmp-mach-multi): Add support for micromips.
* configure.ac (mips*-sde-elf* | mips*-mti-elf*): Made a multi sim
that works for both mips64 and micromips64.
(mipsisa32r2*-*-*): Made a multi sim that works for mips32 and
micromips32.
Add build support for micromips.
* dsp.igen (do_ph_s_absq, do_w_s_absq, do_qb_s_absq, do_addsc,
do_addwc, do_bitrev, do_extpv, do_extrv, do_extrv_s_h, do_insv,
do_lxx do_modsub, do_mthlip, do_mulsaq_s_w_ph, do_ph_packrl, do_qb_pick
do_ph_pick, do_qb_ph_precequ, do_qb_ph_preceu, do_w_preceq
do_w_ph_precrq, do_ph_qb_precrq, do_w_ph_rs_precrq do_qb_w_raddu,
do_rddsp, do_repl, do_shilov, do_ph_shl, do_qb_shl do_w_s_shllv,
do_ph_shrlv, do_w_r_shrav, do_wrdsp, do_qb_shrav, do_append,
do_balign, do_ph_w_mulsa, do_ph_qb_precr, do_prepend): New functions.
Refactored instruction code to use these functions.
* dsp2.igen: Refactored instruction code to use the new functions.
* interp.c (decode_coproc): Refactored to work with any instruction
encoding.
(isa_mode): New variable
(RSVD_INSTRUCTION): Changed to 0x00000039.
* m16.igen (BREAK16): Refactored instruction to use do_break16.
(JALX32): Add mips32, mips64, mips32r2 and mips64r2 models.
* micromips.dc: New file.
* micromips.igen: New file.
* micromips16.dc: New file.
* micromipsdsp.igen: New file.
* micromipsrun.c: New file.
* mips.igen (do_swc1): Changed to work with any instruction encoding.
(do_add do_addi do_andi do_dadd do_daddi do_dsll32 do_dsra32
do_dsrl32, do_dsub, do_break, do_break16, do_clo, do_clz, do_dclo
do_dclz, do_lb, do_lh, do_lwr, do_lwl, do_lwc, do_lw, do_lwu, do_lhu
do_ldc, do_lbu, do_ll, do_lld, do_lui, do_madd, do_dsp_madd, do_maddu
do_dsp_maddu, do_dsp_mfhi, do_dsp_mflo, do_movn, do_movz, do_msub
do_dsp_msub, do_msubu, do_dsp_msubu, do_mthi, do_dsp_mthi, do_mtlo
do_dsp_mtlo, do_mul, do_dsp_mult, do_dsp_multu, do_pref, do_sc, do_scd
do_sub, do_sw, do_teq, do_teqi, do_tge, do_tgei, do_tgeiu, do_tgeu, do_tlt
do_tlti, do_tltiu, do_tltu, do_tne, do_tnei, do_abs_fmt, do_add_fmt
do_alnv_ps, do_c_cond_fmt, do_ceil_fmt, do_cfc1, do_ctc1, do_cvt_d_fmt
do_cvt_l_fmt, do_cvt_ps_s, do_cvt_s_fmt, do_cvt_s_pl, do_cvt_s_pu
do_cvt_w_fmt, do_div_fmt, do_dmfc1b, do_dmtc1b, do_floor_fmt, do_luxc1_32
do_luxc1_64, do_lwc1, do_lwxc1, do_madd_fmt, do_mfc1b, do_mov_fmt, do_movtf
do_movtf_fmt, do_movn_fmt, do_movz_fmt, do_msub_fmt, do_mtc1b, do_mul_fmt
do_neg_fmt, do_nmadd_fmt, do_nmsub_fmt, do_pll_ps, do_plu_ps, do_pul_ps
do_puu_ps, do_recip_fmt, do_round_fmt, do_rsqrt_fmt, do_prefx, do_sdc1
do_suxc1_32, do_suxc1_64, do_sqrt_fmt, do_sub_fmt, do_swc1, do_swxc1
do_trunc_fmt): New functions, refactored from existing instructions.
Refactored instruction code to use these functions.
(RSVD): Changed to use new reserved instruction.
(loadstore_ea, not_word_value, unpredictable, check_mt_hilo, check_mf_hilo,
check_mult_hilo, check_div_hilo, check_u64, do_luxc1_32, do_sdc1, do_suxc1_32,
check_fmt_p, check_fpu, do_load_double, do_store_double): Added micromips32
and micromips64 models.
Added include for micromips.igen and micromipsdsp.igen
Add micromips32 and micromips64 models.
(DecodeCoproc): Updated to use new macro definition.
* mips3264r2.igen (do_dsbh, do_dshd, do_dext, do_dextm, do_dextu, do_di,
do_dins, do_dinsm, do_ei, do_ext, do_mfhc1, do_mthc1, do_ins, do_dinsu,
do_seb, do_seh do_rdhwr, do_wsbh): New functions.
Refactored instruction code to use these functions.
* sim-main.h (CP0_operation): New enum.
(DecodeCoproc): Updated macro.
(IMEM32_MICROMIPS, IMEM16_MICROMIPS, MICROMIPS_MINOR_OPCODE,
MICROMIPS_DELAYSLOT_SIZE_ANY, MICROMIPS_DELAYSLOT_SIZE_16, MICROMIPS_DELAYSLOT_SIZE_32,
ISA_MODE_MIPS32 and ISA_MODE_MICROMIPS): New defines.
(sim_state): Add isa_mode field.
sim/testsuite/sim/mips/
* basic.exp (run_micromips_test, run_sim_tests): New functions
Add support for micromips tests.
* hilo-hazard-4.s: New file.
* testutils.inc (_dowrite): Changed reserved instruction encoding.
(writemsg): Moved the la and li instructions before the data they are
assigned to, which prevents a bug where MIPS32 relocations are used instead
of micromips relocations when building for micromips.
The FT32 simulator has character output, of course. This patch
adds character input, which lets the simulator run interactive
FT32 applications, e.g. language interpreters.
* Makefile.in (SIM_EXTRA_CFLAGS): Add -lm.
* armdefs.h (ARMdval, ARMfval): New types.
(ARM_VFP_reg): New union.
(struct ARMul_State): Add VFP_Reg and FPSCR fields.
(VFP_fval, VFP_uword, VFP_sword, VFP_dval, VFP_dword): Accessor
macros for the new VFP_Reg field.
* armemu.c (handle_v6_insn): Add code to handle MOVW, MOVT,
QADD16, QASX, QSAX, QSUB16, QADD8, QSUB8, UADD16, USUB16, UADD8,
USUB8, SEL, REV, REV16, RBIT, BFC, BFI, SBFX and UBFX
instructions.
(handle_VFP_move): New function.
(ARMul_Emulate16): Add checks for newly supported v6
instructions. Add support for VMRS, VMOV and MRC instructions.
(Multiply64): Allow nRdHi == nRm and/or nRdLo == nRm when
operating in v6 mode.
* armemu.h (t_resolved): Define.
* armsupp.c: Include math.h.
(handle_VFP_xfer): New function. Handles VMOV, VSTM, VSTR, VPUSH,
VSTM, VLDM and VPOP instructions.
(ARMul_LDC): Test for co-processor 10 or 11 and pass call to the
new handle_VFP_xfer function.
(ARMul_STC): Likewise.
(handle_VFP_op): New function. Handles VMLA, VMLS, VNMLA, VNMLS,
VNMUL, VMUL, VADD, VSUB, VDIV, VMOV, VABS, VNEG, VSQRT, VCMP,
VCMPE and VCVT instructions.
(ARMul_CDP): Test for co-processor 10 or 11 and pass call to the
new handle_VFP_op function.
* thumbemu.c (tBIT, tBITS, ntBIT, ntBITS): New macros.
(test_cond): New function. Tests a condition and returns non-zero
if the condition has been met.
(handle_IT_block): New function.
(in_IT_block): New function.
(IT_block_allow): New function.
(ThumbExpandImm): New function.
(handle_T2_insn): New function. Handles T2 thumb instructions.
(handle_v6_thumb_insn): Add next_instr and pc parameters.
(ARMul_ThumbDecode): Add support for IT blocks. Add support for
v6 instructions.
* wrapper.c (sim_create_inferior): Detect a thumb address and call
SETT appropriately.
The bfin/msp430 ports already had trace logic set up for reading/writing
cpu registers, albeit using different unrelated levels (core & vpu). Add
a proper register class for these and for other ports.
This helper macro has largely the same behavior as libiberty's lbasename.
There is a slight nuance related to colons, but it's not clear what the
point of that is, and the code implies that it just wants the basename.
Since --trace-debug is for people hacking on the sim sources rather than
people just using the sim, default it to off. This matches the behavior
of other debug knobs we have.
Since we always include the raw syscall number when tracing, also
including it in the name when it's unknown is redundant. Simplify
the code by using a constant string.
The new helpers for walking the maps tested the wrong value for exiting
the for loop. This caused crashes when looking up entries that were not
in the map.
Many ports have the same sim syscall logic, so add some helpers to handle
all the common details. The arches still have to deal with the unpacking
and packing of the syscall arguments, but the rest of the sim<->callback
glue is now shared.
When tracing, we often want to display the human readable name for the
various syscall/errno values. Rather than make each target duplicate
the lookup, extend the existing maps to include the string directly,
and add helper functions to look up the constants.
While most targets are autogenerated (from libgloss), the bfin/cris
targets have custom maps for the Linux ABI which need to be updated
by hand.
The Blackfin port had some TRACE_xxx macros for easily logging trace data.
Use these as a base for common ones that have a simple form and match the
existing sets of helper macros.
The cgen code declares some macros/funcs using the trace_xxx prefix, but
the code isn't generic and only works with cgen targets. This is blocking
the creation of new common trace functions.
Let's blindly add cgen_xxx prefixes to all these symbols. Some already
use this convention to avoid conflicts, so it makes sense to align them.
In the future we might want to move some to the common trace core, but
one thing at a time.
First we convert the ETRACE_P to STRACE_EVENTS_P. This means we move from
using the sim_events.trace storage to the common sim_state_base.trace_data
array. With that deleted, the common trace init code can be simplified so
the sim state works the same as the sim cpu.
This is the only sim that sets up its own WITH_TRACE mask and it conflicts
with the user setting their own list at configure time. Drop it to match
all the other sims.
The syscall path was the only code checking the custom exception state
after recent cleanups. Once we change that to the common engine halt
function, we can delete that state entirely.
This also helps highlight some other dead code that we can cull.
These printf statements are showing "word" objects which are typedefed
from long, so make sure to use l with %x when printing them to avoid
warnings from gcc.
Re-use the existing memory core that handles reads/writes.
The verbose command is converted to the common --verbose flag
since only a few call sites use it now.
In preparation for converting to the common memory framework, the custom
commands get in our way. But when we realize that gdb support has been
dropped for mcore, it makes things a bit easier: the main runner does not
let you run arbitrary commands once simulation starts.
So lets disable watchpoint support until it can be converted to the common
watchpoint logic. There's already an ifdef to let us do that.
We straight up drop support for the dumpmem command (no other sim supports
this, and if it's a feature people want, we can add a common func) and the
clearstats command (not a big deal -- just restart your simulation).
We leave in place the verbose check points as a follow up commit will cut
that over to common logic.
Now that libgloss has a header tracking the syscalls for this arch, we
can update the database to include it for the symbolic constants/maps.
Then we can switch the mcore syscall callbacks over to the common ones.
Since newlib no longer shares the same repo as binutils/gdb, we have to go
searching further afield to locate the sources. We still look at the top
level for newlib, but if that is not found, we also try up one dir outside
of this source tree. It sucks, but better than the status quo (no workie).
Change data ordering in emulated memory from target order (big endian)
to host order. Improves performance and simplifies most memory
operations. Requires some byte twisting during stores on little
endian hosts (intel). Also removed support for little-endian binaries.
Now that we've unified sim-cpu, we can delete the duplicate sim-engine
hooks -- these targets defined these only because they didn't fully
implement the sim-cpu callbacks.
Since every target typedefs this the same way, move it to the common code.
We have to leave Blackfin behind here for now because of inter-dependencies
on types and headers: sim-base.h includes sim-model.h which needs types in
machs.h which needs types in bfim-sim.h which needs SIM_CPU.
Almost every target defines sim_cia the same way -- either using the
address_word type directly, or a type of equivalent size. The only
odd one out is sh64 (who has 32bit address_word and 64bit cia), and
even that case doesn't seem to make sense. We'll put off clean up
though of sh64 and at least set up a sensible default for everyone.
Re-use the existing memory core that handles reads/writes.
This drops support for the dumpmem command, but gdb itself has
support for dumping memory regions.
The verbose command is converted to the common --verbose flag
since only two call sites use it now.
Support for the clearstats command is dropped entirely, but no
other sim really does this, and the same thing can be done by
reloading. If it's important (clearing cycle stats) to someone,
we can add a common function for it.
The CIA_{GET,SET} macros serve the same function as CPU_PC_{GET,SET}
except the latter adds a layer of indirection via the sim state. This
lets models set up different functions at runtime and doesn't reach so
directly into the arch-specific cpu state.
It also doesn't make sense to have two sets of macros that do exactly
the same thing, so lets standardize on the one that gets us more.
Now that all the targets are utilizing CPU_PC_{FETCH,STORE}, and the
cpu state is multicore, and the STATE_CPU defines match, we can move
it all to the common code.
This sets up the sim_state structure and the cpu member to match what we
do in most other sims, and what the common code suggests. This is a step
to unifying on the sim-cpu.o object.
The old run frontend had a --version option, but the new common
sim-options file does not. Restore support for that so we can
get version info out of `run` when using the new frontend.
With sim-hrw.o being built & linked in the common list, some people are
getting linking errors now for these targets. Move the main objects that
provide these functions before the common list to avoid that.
Nick Clifton
Mike Frysinger
Tristan Gingold
Joel Brobecker
Kevin Buettner
Dominik Vogt
Pedro Alves
James Bowman
Andrew Bennett
H.J. Lu
Mike Stump
DJ Delorie
Senthil Kumar Selvaraj
Jiri Gaisler
Hans-Peter Nilsson