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binutils-gdb/bfd/elfnn-aarch64.c

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[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
/* AArch64-specific support for NN-bit ELF.
Update year range in copyright notice of binutils files
2020-01-01 08:57:01 +01:00
Copyright (C) 2009-2020 Free Software Foundation, Inc.
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
Contributed by ARM Ltd.
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; see the file COPYING3. If not,
see <http://www.gnu.org/licenses/>. */
/* Notes on implementation:
Thread Local Store (TLS)
Overview:
The implementation currently supports both traditional TLS and TLS
descriptors, but only general dynamic (GD).
For traditional TLS the assembler will present us with code
fragments of the form:
adrp x0, :tlsgd:foo
BFD whitespace fixes Binutils is supposed to use tabs. In my git config I have whitespace = indent-with-non-tab,space-before-tab,trailing-space and I got annoyed enough seeing red in "git diff" output to fix the problems. * doc/header.sed: Trim trailing space when splitting lines. * aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-cris.c, * aout-ns32k.c, * aout-target.h, * aout-tic30.c, * aoutf1.h, * aoutx.h, * arc-got.h, * arc-plt.def, * arc-plt.h, * archive.c, * archive64.c, * archures.c, * armnetbsd.c, * bfd-in.h, * bfd.c, * bfdio.c, * binary.c, * bout.c, * cache.c, * cisco-core.c, * coff-alpha.c, * coff-apollo.c, * coff-arm.c, * coff-h8300.c, * coff-i386.c, * coff-i860.c, * coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mcore.c, * coff-mips.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-stgo32.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * compress.c, * corefile.c, * cpu-alpha.c, * cpu-arm.c, * cpu-avr.c, * cpu-bfin.c, * cpu-cr16.c, * cpu-cr16c.c, * cpu-crx.c, * cpu-d10v.c, * cpu-frv.c, * cpu-ft32.c, * cpu-i370.c, * cpu-i960.c, * cpu-ia64-opc.c, * cpu-ip2k.c, * cpu-lm32.c, * cpu-m32r.c, * cpu-mcore.c, * cpu-microblaze.c, * cpu-mips.c, * cpu-moxie.c, * cpu-mt.c, * cpu-nios2.c, * cpu-ns32k.c, * cpu-or1k.c, * cpu-powerpc.c, * cpu-pru.c, * cpu-sh.c, * cpu-spu.c, * cpu-v850.c, * cpu-v850_rh850.c, * cpu-xgate.c, * cpu-z80.c, * dwarf1.c, * dwarf2.c, * ecoff.c, * ecofflink.c, * ecoffswap.h, * elf-bfd.h, * elf-eh-frame.c, * elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf-s390-common.c, * elf-strtab.c, * elf-vxworks.c, * elf.c, * elf32-am33lin.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-avr.h, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-i860.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68hc1x.c, * elf32-m68hc1x.h, * elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nds32.h, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score.h, * elf32-score7.c, * elf32-sh-symbian.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilegx.c, * elf32-tilegx.h, * elf32-tilepro.c, * elf32-tilepro.h, * elf32-v850.c, * elf32-vax.c, * elf32-wasm32.c, * elf32-xc16x.c, * elf32-xgate.c, * elf32-xgate.h, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-tilegx.c, * elf64-tilegx.h, * elf64-x86-64.c, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-aarch64.h, * elfxx-ia64.c, * elfxx-ia64.h, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * elfxx-x86.h, * freebsd.h, * hash.c, * host-aout.c, * hp300hpux.c, * hppabsd-core.c, * hpux-core.c, * i386aout.c, * i386linux.c, * i386lynx.c, * i386mach3.c, * i386msdos.c, * i386netbsd.c, * ieee.c, * ihex.c, * irix-core.c, * libaout.h, * libbfd-in.h, * libbfd.c, * libcoff-in.h, * libnlm.h, * libpei.h, * libxcoff.h, * linker.c, * lynx-core.c, * m68k4knetbsd.c, * m68klinux.c, * m68knetbsd.c, * m88kmach3.c, * mach-o-aarch64.c, * mach-o-arm.c, * mach-o-i386.c, * mach-o-target.c, * mach-o-x86-64.c, * mach-o.c, * mach-o.h, * merge.c, * mipsbsd.c, * mmo.c, * netbsd.h, * netbsd-core.c, * newsos3.c, * nlm-target.h, * nlm32-ppc.c, * nlm32-sparc.c, * nlmcode.h, * ns32k.h, * ns32knetbsd.c, * oasys.c, * opncls.c, * pc532-mach.c, * pdp11.c, * pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-mips.c, * pe-x86_64.c, * peXXigen.c, * pef.c, * pef.h, * pei-arm.c, * pei-i386.c, * pei-mcore.c, * pei-x86_64.c, * peicode.h, * plugin.c, * ppcboot.c, * ptrace-core.c, * reloc.c, * riscix.c, * rs6000-core.c, * section.c, * som.c, * som.h, * sparclinux.c, * sparcnetbsd.c, * srec.c, * stabs.c, * sunos.c, * syms.c, * targets.c, * tekhex.c, * trad-core.c, * vax1knetbsd.c, * vaxnetbsd.c, * verilog.c, * versados.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * wasm-module.c, * wasm-module.h, * xcofflink.c, * xsym.c, * xsym.h: Whitespace fixes. * bfd-in2.h, * libbfd.h, * libcoff.h: Regenerate.
2017-12-05 23:56:00 +01:00
R_AARCH64_TLSGD_ADR_PAGE21(foo)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
add x0, :tlsgd_lo12:foo
BFD whitespace fixes Binutils is supposed to use tabs. In my git config I have whitespace = indent-with-non-tab,space-before-tab,trailing-space and I got annoyed enough seeing red in "git diff" output to fix the problems. * doc/header.sed: Trim trailing space when splitting lines. * aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-cris.c, * aout-ns32k.c, * aout-target.h, * aout-tic30.c, * aoutf1.h, * aoutx.h, * arc-got.h, * arc-plt.def, * arc-plt.h, * archive.c, * archive64.c, * archures.c, * armnetbsd.c, * bfd-in.h, * bfd.c, * bfdio.c, * binary.c, * bout.c, * cache.c, * cisco-core.c, * coff-alpha.c, * coff-apollo.c, * coff-arm.c, * coff-h8300.c, * coff-i386.c, * coff-i860.c, * coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mcore.c, * coff-mips.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-stgo32.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * compress.c, * corefile.c, * cpu-alpha.c, * cpu-arm.c, * cpu-avr.c, * cpu-bfin.c, * cpu-cr16.c, * cpu-cr16c.c, * cpu-crx.c, * cpu-d10v.c, * cpu-frv.c, * cpu-ft32.c, * cpu-i370.c, * cpu-i960.c, * cpu-ia64-opc.c, * cpu-ip2k.c, * cpu-lm32.c, * cpu-m32r.c, * cpu-mcore.c, * cpu-microblaze.c, * cpu-mips.c, * cpu-moxie.c, * cpu-mt.c, * cpu-nios2.c, * cpu-ns32k.c, * cpu-or1k.c, * cpu-powerpc.c, * cpu-pru.c, * cpu-sh.c, * cpu-spu.c, * cpu-v850.c, * cpu-v850_rh850.c, * cpu-xgate.c, * cpu-z80.c, * dwarf1.c, * dwarf2.c, * ecoff.c, * ecofflink.c, * ecoffswap.h, * elf-bfd.h, * elf-eh-frame.c, * elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf-s390-common.c, * elf-strtab.c, * elf-vxworks.c, * elf.c, * elf32-am33lin.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-avr.h, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-i860.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68hc1x.c, * elf32-m68hc1x.h, * elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nds32.h, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score.h, * elf32-score7.c, * elf32-sh-symbian.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilegx.c, * elf32-tilegx.h, * elf32-tilepro.c, * elf32-tilepro.h, * elf32-v850.c, * elf32-vax.c, * elf32-wasm32.c, * elf32-xc16x.c, * elf32-xgate.c, * elf32-xgate.h, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-tilegx.c, * elf64-tilegx.h, * elf64-x86-64.c, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-aarch64.h, * elfxx-ia64.c, * elfxx-ia64.h, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * elfxx-x86.h, * freebsd.h, * hash.c, * host-aout.c, * hp300hpux.c, * hppabsd-core.c, * hpux-core.c, * i386aout.c, * i386linux.c, * i386lynx.c, * i386mach3.c, * i386msdos.c, * i386netbsd.c, * ieee.c, * ihex.c, * irix-core.c, * libaout.h, * libbfd-in.h, * libbfd.c, * libcoff-in.h, * libnlm.h, * libpei.h, * libxcoff.h, * linker.c, * lynx-core.c, * m68k4knetbsd.c, * m68klinux.c, * m68knetbsd.c, * m88kmach3.c, * mach-o-aarch64.c, * mach-o-arm.c, * mach-o-i386.c, * mach-o-target.c, * mach-o-x86-64.c, * mach-o.c, * mach-o.h, * merge.c, * mipsbsd.c, * mmo.c, * netbsd.h, * netbsd-core.c, * newsos3.c, * nlm-target.h, * nlm32-ppc.c, * nlm32-sparc.c, * nlmcode.h, * ns32k.h, * ns32knetbsd.c, * oasys.c, * opncls.c, * pc532-mach.c, * pdp11.c, * pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-mips.c, * pe-x86_64.c, * peXXigen.c, * pef.c, * pef.h, * pei-arm.c, * pei-i386.c, * pei-mcore.c, * pei-x86_64.c, * peicode.h, * plugin.c, * ppcboot.c, * ptrace-core.c, * reloc.c, * riscix.c, * rs6000-core.c, * section.c, * som.c, * som.h, * sparclinux.c, * sparcnetbsd.c, * srec.c, * stabs.c, * sunos.c, * syms.c, * targets.c, * tekhex.c, * trad-core.c, * vax1knetbsd.c, * vaxnetbsd.c, * verilog.c, * versados.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * wasm-module.c, * wasm-module.h, * xcofflink.c, * xsym.c, * xsym.h: Whitespace fixes. * bfd-in2.h, * libbfd.h, * libcoff.h: Regenerate.
2017-12-05 23:56:00 +01:00
R_AARCH64_TLSGD_ADD_LO12_NC(foo)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
bl __tls_get_addr
nop
For TLS descriptors the assembler will present us with code
fragments of the form:
BFD whitespace fixes Binutils is supposed to use tabs. In my git config I have whitespace = indent-with-non-tab,space-before-tab,trailing-space and I got annoyed enough seeing red in "git diff" output to fix the problems. * doc/header.sed: Trim trailing space when splitting lines. * aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-cris.c, * aout-ns32k.c, * aout-target.h, * aout-tic30.c, * aoutf1.h, * aoutx.h, * arc-got.h, * arc-plt.def, * arc-plt.h, * archive.c, * archive64.c, * archures.c, * armnetbsd.c, * bfd-in.h, * bfd.c, * bfdio.c, * binary.c, * bout.c, * cache.c, * cisco-core.c, * coff-alpha.c, * coff-apollo.c, * coff-arm.c, * coff-h8300.c, * coff-i386.c, * coff-i860.c, * coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mcore.c, * coff-mips.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-stgo32.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * compress.c, * corefile.c, * cpu-alpha.c, * cpu-arm.c, * cpu-avr.c, * cpu-bfin.c, * cpu-cr16.c, * cpu-cr16c.c, * cpu-crx.c, * cpu-d10v.c, * cpu-frv.c, * cpu-ft32.c, * cpu-i370.c, * cpu-i960.c, * cpu-ia64-opc.c, * cpu-ip2k.c, * cpu-lm32.c, * cpu-m32r.c, * cpu-mcore.c, * cpu-microblaze.c, * cpu-mips.c, * cpu-moxie.c, * cpu-mt.c, * cpu-nios2.c, * cpu-ns32k.c, * cpu-or1k.c, * cpu-powerpc.c, * cpu-pru.c, * cpu-sh.c, * cpu-spu.c, * cpu-v850.c, * cpu-v850_rh850.c, * cpu-xgate.c, * cpu-z80.c, * dwarf1.c, * dwarf2.c, * ecoff.c, * ecofflink.c, * ecoffswap.h, * elf-bfd.h, * elf-eh-frame.c, * elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf-s390-common.c, * elf-strtab.c, * elf-vxworks.c, * elf.c, * elf32-am33lin.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-avr.h, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-i860.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68hc1x.c, * elf32-m68hc1x.h, * elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nds32.h, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score.h, * elf32-score7.c, * elf32-sh-symbian.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilegx.c, * elf32-tilegx.h, * elf32-tilepro.c, * elf32-tilepro.h, * elf32-v850.c, * elf32-vax.c, * elf32-wasm32.c, * elf32-xc16x.c, * elf32-xgate.c, * elf32-xgate.h, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-tilegx.c, * elf64-tilegx.h, * elf64-x86-64.c, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-aarch64.h, * elfxx-ia64.c, * elfxx-ia64.h, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * elfxx-x86.h, * freebsd.h, * hash.c, * host-aout.c, * hp300hpux.c, * hppabsd-core.c, * hpux-core.c, * i386aout.c, * i386linux.c, * i386lynx.c, * i386mach3.c, * i386msdos.c, * i386netbsd.c, * ieee.c, * ihex.c, * irix-core.c, * libaout.h, * libbfd-in.h, * libbfd.c, * libcoff-in.h, * libnlm.h, * libpei.h, * libxcoff.h, * linker.c, * lynx-core.c, * m68k4knetbsd.c, * m68klinux.c, * m68knetbsd.c, * m88kmach3.c, * mach-o-aarch64.c, * mach-o-arm.c, * mach-o-i386.c, * mach-o-target.c, * mach-o-x86-64.c, * mach-o.c, * mach-o.h, * merge.c, * mipsbsd.c, * mmo.c, * netbsd.h, * netbsd-core.c, * newsos3.c, * nlm-target.h, * nlm32-ppc.c, * nlm32-sparc.c, * nlmcode.h, * ns32k.h, * ns32knetbsd.c, * oasys.c, * opncls.c, * pc532-mach.c, * pdp11.c, * pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-mips.c, * pe-x86_64.c, * peXXigen.c, * pef.c, * pef.h, * pei-arm.c, * pei-i386.c, * pei-mcore.c, * pei-x86_64.c, * peicode.h, * plugin.c, * ppcboot.c, * ptrace-core.c, * reloc.c, * riscix.c, * rs6000-core.c, * section.c, * som.c, * som.h, * sparclinux.c, * sparcnetbsd.c, * srec.c, * stabs.c, * sunos.c, * syms.c, * targets.c, * tekhex.c, * trad-core.c, * vax1knetbsd.c, * vaxnetbsd.c, * verilog.c, * versados.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * wasm-module.c, * wasm-module.h, * xcofflink.c, * xsym.c, * xsym.h: Whitespace fixes. * bfd-in2.h, * libbfd.h, * libcoff.h: Regenerate.
2017-12-05 23:56:00 +01:00
adrp x0, :tlsdesc:foo R_AARCH64_TLSDESC_ADR_PAGE21(foo)
ldr x1, [x0, #:tlsdesc_lo12:foo] R_AARCH64_TLSDESC_LD64_LO12(foo)
add x0, x0, #:tlsdesc_lo12:foo R_AARCH64_TLSDESC_ADD_LO12(foo)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
.tlsdesccall foo
BFD whitespace fixes Binutils is supposed to use tabs. In my git config I have whitespace = indent-with-non-tab,space-before-tab,trailing-space and I got annoyed enough seeing red in "git diff" output to fix the problems. * doc/header.sed: Trim trailing space when splitting lines. * aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-cris.c, * aout-ns32k.c, * aout-target.h, * aout-tic30.c, * aoutf1.h, * aoutx.h, * arc-got.h, * arc-plt.def, * arc-plt.h, * archive.c, * archive64.c, * archures.c, * armnetbsd.c, * bfd-in.h, * bfd.c, * bfdio.c, * binary.c, * bout.c, * cache.c, * cisco-core.c, * coff-alpha.c, * coff-apollo.c, * coff-arm.c, * coff-h8300.c, * coff-i386.c, * coff-i860.c, * coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mcore.c, * coff-mips.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-stgo32.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * compress.c, * corefile.c, * cpu-alpha.c, * cpu-arm.c, * cpu-avr.c, * cpu-bfin.c, * cpu-cr16.c, * cpu-cr16c.c, * cpu-crx.c, * cpu-d10v.c, * cpu-frv.c, * cpu-ft32.c, * cpu-i370.c, * cpu-i960.c, * cpu-ia64-opc.c, * cpu-ip2k.c, * cpu-lm32.c, * cpu-m32r.c, * cpu-mcore.c, * cpu-microblaze.c, * cpu-mips.c, * cpu-moxie.c, * cpu-mt.c, * cpu-nios2.c, * cpu-ns32k.c, * cpu-or1k.c, * cpu-powerpc.c, * cpu-pru.c, * cpu-sh.c, * cpu-spu.c, * cpu-v850.c, * cpu-v850_rh850.c, * cpu-xgate.c, * cpu-z80.c, * dwarf1.c, * dwarf2.c, * ecoff.c, * ecofflink.c, * ecoffswap.h, * elf-bfd.h, * elf-eh-frame.c, * elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf-s390-common.c, * elf-strtab.c, * elf-vxworks.c, * elf.c, * elf32-am33lin.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-avr.h, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-i860.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68hc1x.c, * elf32-m68hc1x.h, * elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nds32.h, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score.h, * elf32-score7.c, * elf32-sh-symbian.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilegx.c, * elf32-tilegx.h, * elf32-tilepro.c, * elf32-tilepro.h, * elf32-v850.c, * elf32-vax.c, * elf32-wasm32.c, * elf32-xc16x.c, * elf32-xgate.c, * elf32-xgate.h, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-tilegx.c, * elf64-tilegx.h, * elf64-x86-64.c, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-aarch64.h, * elfxx-ia64.c, * elfxx-ia64.h, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * elfxx-x86.h, * freebsd.h, * hash.c, * host-aout.c, * hp300hpux.c, * hppabsd-core.c, * hpux-core.c, * i386aout.c, * i386linux.c, * i386lynx.c, * i386mach3.c, * i386msdos.c, * i386netbsd.c, * ieee.c, * ihex.c, * irix-core.c, * libaout.h, * libbfd-in.h, * libbfd.c, * libcoff-in.h, * libnlm.h, * libpei.h, * libxcoff.h, * linker.c, * lynx-core.c, * m68k4knetbsd.c, * m68klinux.c, * m68knetbsd.c, * m88kmach3.c, * mach-o-aarch64.c, * mach-o-arm.c, * mach-o-i386.c, * mach-o-target.c, * mach-o-x86-64.c, * mach-o.c, * mach-o.h, * merge.c, * mipsbsd.c, * mmo.c, * netbsd.h, * netbsd-core.c, * newsos3.c, * nlm-target.h, * nlm32-ppc.c, * nlm32-sparc.c, * nlmcode.h, * ns32k.h, * ns32knetbsd.c, * oasys.c, * opncls.c, * pc532-mach.c, * pdp11.c, * pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-mips.c, * pe-x86_64.c, * peXXigen.c, * pef.c, * pef.h, * pei-arm.c, * pei-i386.c, * pei-mcore.c, * pei-x86_64.c, * peicode.h, * plugin.c, * ppcboot.c, * ptrace-core.c, * reloc.c, * riscix.c, * rs6000-core.c, * section.c, * som.c, * som.h, * sparclinux.c, * sparcnetbsd.c, * srec.c, * stabs.c, * sunos.c, * syms.c, * targets.c, * tekhex.c, * trad-core.c, * vax1knetbsd.c, * vaxnetbsd.c, * verilog.c, * versados.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * wasm-module.c, * wasm-module.h, * xcofflink.c, * xsym.c, * xsym.h: Whitespace fixes. * bfd-in2.h, * libbfd.h, * libcoff.h: Regenerate.
2017-12-05 23:56:00 +01:00
blr x1 R_AARCH64_TLSDESC_CALL(foo)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
The relocations R_AARCH64_TLSGD_{ADR_PREL21,ADD_LO12_NC} against foo
indicate that foo is thread local and should be accessed via the
traditional TLS mechanims.
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
The relocations R_AARCH64_TLSDESC_{ADR_PAGE21,LD64_LO12_NC,ADD_LO12_NC}
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
against foo indicate that 'foo' is thread local and should be accessed
via a TLS descriptor mechanism.
The precise instruction sequence is only relevant from the
perspective of linker relaxation which is currently not implemented.
The static linker must detect that 'foo' is a TLS object and
allocate a double GOT entry. The GOT entry must be created for both
global and local TLS symbols. Note that this is different to none
TLS local objects which do not need a GOT entry.
In the traditional TLS mechanism, the double GOT entry is used to
provide the tls_index structure, containing module and offset
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
entries. The static linker places the relocation R_AARCH64_TLS_DTPMOD
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
on the module entry. The loader will subsequently fixup this
relocation with the module identity.
For global traditional TLS symbols the static linker places an
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
R_AARCH64_TLS_DTPREL relocation on the offset entry. The loader
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
will subsequently fixup the offset. For local TLS symbols the static
linker fixes up offset.
In the TLS descriptor mechanism the double GOT entry is used to
provide the descriptor. The static linker places the relocation
R_AARCH64_TLSDESC on the first GOT slot. The loader will
subsequently fix this up.
Implementation:
The handling of TLS symbols is implemented across a number of
different backend functions. The following is a top level view of
what processing is performed where.
The TLS implementation maintains state information for each TLS
symbol. The state information for local and global symbols is kept
in different places. Global symbols use generic BFD structures while
local symbols use backend specific structures that are allocated and
maintained entirely by the backend.
The flow:
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
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elfNN_aarch64_check_relocs()
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
This function is invoked for each relocation.
The TLS relocations R_AARCH64_TLSGD_{ADR_PREL21,ADD_LO12_NC} and
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
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R_AARCH64_TLSDESC_{ADR_PAGE21,LD64_LO12_NC,ADD_LO12_NC} are
Add support for 64-bit ARM architecture: AArch64
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spotted. One time creation of local symbol data structures are
created when the first local symbol is seen.
The reference count for a symbol is incremented. The GOT type for
each symbol is marked as general dynamic.
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
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elfNN_aarch64_allocate_dynrelocs ()
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
For each global with positive reference count we allocate a double
GOT slot. For a traditional TLS symbol we allocate space for two
relocation entries on the GOT, for a TLS descriptor symbol we
allocate space for one relocation on the slot. Record the GOT offset
for this symbol.
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
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elfNN_aarch64_size_dynamic_sections ()
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
Iterate all input BFDS, look for in the local symbol data structure
constructed earlier for local TLS symbols and allocate them double
GOT slots along with space for a single GOT relocation. Update the
local symbol structure to record the GOT offset allocated.
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_relocate_section ()
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
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Calls elfNN_aarch64_final_link_relocate ()
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
Emit the relevant TLS relocations against the GOT for each TLS
symbol. For local TLS symbols emit the GOT offset directly. The GOT
relocations are emitted once the first time a TLS symbol is
encountered. The implementation uses the LSB of the GOT offset to
flag that the relevant GOT relocations for a symbol have been
emitted. All of the TLS code that uses the GOT offset needs to take
care to mask out this flag bit before using the offset.
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_final_link_relocate ()
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
Fixup the R_AARCH64_TLSGD_{ADR_PREL21, ADD_LO12_NC} relocations. */
#include "sysdep.h"
#include "bfd.h"
#include "libiberty.h"
#include "libbfd.h"
#include "elf-bfd.h"
#include "bfdlink.h"
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
#include "objalloc.h"
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
#include "elf/aarch64.h"
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
#include "elfxx-aarch64.h"
aarch64 bfd.h tidy bfd/ * bfd-in.h: Move aarch64 declarations and defines.. * cpu-aarch64.h: ..to here, new file.. * elfxx-aarch64.h: ..and here. * cpu-aarch64.c: Include cpu-aarch64.h. * elfnn-aarch64.c: Likewise. * bfd-in2.h: Regenerate. ld/ * emultempl/aarch64elf.em: Include elfxx-aarch64.h.
2019-09-23 02:34:50 +02:00
#include "cpu-aarch64.h"
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
#define ARCH_SIZE NN
#if ARCH_SIZE == 64
#define AARCH64_R(NAME) R_AARCH64_ ## NAME
#define AARCH64_R_STR(NAME) "R_AARCH64_" #NAME
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
#define HOWTO64(...) HOWTO (__VA_ARGS__)
#define HOWTO32(...) EMPTY_HOWTO (0)
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
#define LOG_FILE_ALIGN 3
Rename R_AARCH64_TLSDESC_LD64_LO12_NC to R_AARCH64_TLSDESC_LD64_LO12 and R_AARCH64_TLSDESC_ADD_LO12_NC to R_AARCH64_TLSDESC_ADD_LO12. PR binutils/21202 include * elf/aarch64.h (R_AARCH64_TLSDESC_LD64_LO12_NC): Rename to R_AARCH64_TLSDESC_LD64_LO12. (R_AARCH64_TLSDESC_ADD_LO12_NC): Rename to R_AARCH64_TLSDESC_ADD_LO12_NC. bfd * reloc.c (BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC): Rename to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12. (BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC): Rename to BFD_RELOC_AARCH64_TLSDESC_ADD_LO12. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elfnn-aarch64.c (IS_AARCH64_TLS_RELAX_RELOC): Update reloc names. (IS_AARCH64_TLSDESC_RELOC): Likewise. (elfNN_aarch64_howto_table): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. gas * config/tc-aarch64.c (reloc_table): Rename BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12. Rname BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC to BFD_RELOC_AARCH64_TLSDESC_ADD_LO12. (md_apply_fix): Likewise. (aarch64_force_relocation): Likewise. * testsuite/gas/aarch64/tls.d: Update regexp. ld * testsuite/ld-aarch64/ifunc-5r-local.d: Update regexp.
2017-03-13 10:58:04 +01:00
#define BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC BFD_RELOC_AARCH64_TLSDESC_LD64_LO12
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
#endif
#if ARCH_SIZE == 32
#define AARCH64_R(NAME) R_AARCH64_P32_ ## NAME
#define AARCH64_R_STR(NAME) "R_AARCH64_P32_" #NAME
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
#define HOWTO64(...) EMPTY_HOWTO (0)
#define HOWTO32(...) HOWTO (__VA_ARGS__)
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
#define LOG_FILE_ALIGN 2
BFD whitespace fixes Binutils is supposed to use tabs. In my git config I have whitespace = indent-with-non-tab,space-before-tab,trailing-space and I got annoyed enough seeing red in "git diff" output to fix the problems. * doc/header.sed: Trim trailing space when splitting lines. * aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-cris.c, * aout-ns32k.c, * aout-target.h, * aout-tic30.c, * aoutf1.h, * aoutx.h, * arc-got.h, * arc-plt.def, * arc-plt.h, * archive.c, * archive64.c, * archures.c, * armnetbsd.c, * bfd-in.h, * bfd.c, * bfdio.c, * binary.c, * bout.c, * cache.c, * cisco-core.c, * coff-alpha.c, * coff-apollo.c, * coff-arm.c, * coff-h8300.c, * coff-i386.c, * coff-i860.c, * coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mcore.c, * coff-mips.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-stgo32.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * compress.c, * corefile.c, * cpu-alpha.c, * cpu-arm.c, * cpu-avr.c, * cpu-bfin.c, * cpu-cr16.c, * cpu-cr16c.c, * cpu-crx.c, * cpu-d10v.c, * cpu-frv.c, * cpu-ft32.c, * cpu-i370.c, * cpu-i960.c, * cpu-ia64-opc.c, * cpu-ip2k.c, * cpu-lm32.c, * cpu-m32r.c, * cpu-mcore.c, * cpu-microblaze.c, * cpu-mips.c, * cpu-moxie.c, * cpu-mt.c, * cpu-nios2.c, * cpu-ns32k.c, * cpu-or1k.c, * cpu-powerpc.c, * cpu-pru.c, * cpu-sh.c, * cpu-spu.c, * cpu-v850.c, * cpu-v850_rh850.c, * cpu-xgate.c, * cpu-z80.c, * dwarf1.c, * dwarf2.c, * ecoff.c, * ecofflink.c, * ecoffswap.h, * elf-bfd.h, * elf-eh-frame.c, * elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf-s390-common.c, * elf-strtab.c, * elf-vxworks.c, * elf.c, * elf32-am33lin.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-avr.h, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-i860.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68hc1x.c, * elf32-m68hc1x.h, * elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nds32.h, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score.h, * elf32-score7.c, * elf32-sh-symbian.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilegx.c, * elf32-tilegx.h, * elf32-tilepro.c, * elf32-tilepro.h, * elf32-v850.c, * elf32-vax.c, * elf32-wasm32.c, * elf32-xc16x.c, * elf32-xgate.c, * elf32-xgate.h, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-tilegx.c, * elf64-tilegx.h, * elf64-x86-64.c, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-aarch64.h, * elfxx-ia64.c, * elfxx-ia64.h, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * elfxx-x86.h, * freebsd.h, * hash.c, * host-aout.c, * hp300hpux.c, * hppabsd-core.c, * hpux-core.c, * i386aout.c, * i386linux.c, * i386lynx.c, * i386mach3.c, * i386msdos.c, * i386netbsd.c, * ieee.c, * ihex.c, * irix-core.c, * libaout.h, * libbfd-in.h, * libbfd.c, * libcoff-in.h, * libnlm.h, * libpei.h, * libxcoff.h, * linker.c, * lynx-core.c, * m68k4knetbsd.c, * m68klinux.c, * m68knetbsd.c, * m88kmach3.c, * mach-o-aarch64.c, * mach-o-arm.c, * mach-o-i386.c, * mach-o-target.c, * mach-o-x86-64.c, * mach-o.c, * mach-o.h, * merge.c, * mipsbsd.c, * mmo.c, * netbsd.h, * netbsd-core.c, * newsos3.c, * nlm-target.h, * nlm32-ppc.c, * nlm32-sparc.c, * nlmcode.h, * ns32k.h, * ns32knetbsd.c, * oasys.c, * opncls.c, * pc532-mach.c, * pdp11.c, * pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-mips.c, * pe-x86_64.c, * peXXigen.c, * pef.c, * pef.h, * pei-arm.c, * pei-i386.c, * pei-mcore.c, * pei-x86_64.c, * peicode.h, * plugin.c, * ppcboot.c, * ptrace-core.c, * reloc.c, * riscix.c, * rs6000-core.c, * section.c, * som.c, * som.h, * sparclinux.c, * sparcnetbsd.c, * srec.c, * stabs.c, * sunos.c, * syms.c, * targets.c, * tekhex.c, * trad-core.c, * vax1knetbsd.c, * vaxnetbsd.c, * verilog.c, * versados.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * wasm-module.c, * wasm-module.h, * xcofflink.c, * xsym.c, * xsym.h: Whitespace fixes. * bfd-in2.h, * libbfd.h, * libcoff.h: Regenerate.
2017-12-05 23:56:00 +01:00
#define BFD_RELOC_AARCH64_TLSDESC_LD32_LO12 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC
#define R_AARCH64_P32_TLSDESC_ADD_LO12 R_AARCH64_P32_TLSDESC_ADD_LO12_NC
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
#endif
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
#define IS_AARCH64_TLS_RELOC(R_TYPE) \
[AArch64] Sort TLS reloc types alphabetically
2015-07-17 14:03:26 +02:00
((R_TYPE) == BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21 \
Add ADR :tlsgd: directive and TLSGD_ADR_PREL21 support.
2015-02-13 08:13:57 +01:00
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_ADR_PREL21 \
[GAS][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC support. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * reloc.c (BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC): New entry. * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC. * libbfd.h: Regenerate. * bfd-in2.h: Likewise gas/ 2015-10-02 Renlin Li <renlin.li@arm.com> * config/tc-aarch64.c (reloc_table): New relocation modifier tlsgd_g0_nc. (process_movw_reloc_info): Support BFD_RELOC_AARCH64_TLSGD_MOVW_G1. (md_apply_fix): Likewise. (aarch64_force_relocation): Likewise. gas/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * gas/aarch64/reloc-tlsgd_g0_nc.d: New. * gas/aarch64/reloc-tlsgd_g0_nc.s: New.
2015-10-02 17:28:49 +02:00
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC \
[GAS][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G1 support. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * reloc.c (BFD_RELOC_AARCH64_TLSGD_MOVW_G1): New entry. * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for BFD_RELOC_AARCH64_TLSGD_MOVW_G1. * bfd-in2.h: Regenerate. * libbfd.h: Likewise. gas/ 2015-10-02 Renlin Li <renlin.li@arm.com> * config/tc-aarch64.c (reloc_table): New relocation modifier tlsgd_g1. (process_movw_reloc_info): Support BFD_RELOC_AARCH64_TLSGD_MOVW_G1. (md_apply_fix): Likewise. (aarch64_force_relocation): Likewise. gas/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * gas/aarch64/reloc-tlsgd_g1.s: New. * gas/aarch64/reloc-tlsgd_g1.s: New.
2015-10-02 17:04:09 +02:00
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_MOVW_G1 \
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC \
[AArch64] Sort TLS reloc types alphabetically
2015-07-17 14:03:26 +02:00
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC \
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19 \
[AArch64] Sort TLS reloc types alphabetically
2015-07-17 14:03:26 +02:00
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1 \
[AArch64][4/6] LD support TLSLD move/add relocation types 2015-08-19 Jiong Wang <jiong.wang@arm.com> bfd/ PR ld/18276 * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize new relocation types, including BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2. (elfNN_aarch64_final_link_relocate): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ * ld-aarch64/emit-relocs-87.s: New testcase. * ld-aarch64/emit-relocs-88.s: Likewise. * ld-aarch64/emit-relocs-88-overflow.s: Likewise. * ld-aarch64/emit-relocs-89.s: Likewise. * ld-aarch64/emit-relocs-90.s: Likewise. * ld-aarch64/emit-relocs-90-overflow.s: Likewise. * ld-aarch64/emit-relocs-523.s: Likewise. * ld-aarch64/emit-relocs-524.s: Likewise. * ld-aarch64/emit-relocs-525.s: Likewise. * ld-aarch64/emit-relocs-527.s: Likewise. * ld-aarch64/emit-relocs-526.s: Likewise. * ld-aarch64/emit-relocs-528.s: Likewise. * ld-aarch64/emit-relocs-528-overflow.s: Likewise. * ld-aarch64/emit-relocs-87.d: New expectation file. * ld-aarch64/emit-relocs-88.d: Likewise. * ld-aarch64/emit-relocs-88-overflow.d: Likewise. * ld-aarch64/emit-relocs-89.d: Likewise. * ld-aarch64/emit-relocs-90.d: Likewise. * ld-aarch64/emit-relocs-90-overflow.d: Likewise. * ld-aarch64/emit-relocs-91.d: Likewise. * ld-aarch64/emit-relocs-523.d: Likewise. * ld-aarch64/emit-relocs-524.d: Likewise. * ld-aarch64/emit-relocs-525.d: Likewise. * ld-aarch64/emit-relocs-526.d: Likewise. * ld-aarch64/emit-relocs-527.d: Likewise. * ld-aarch64/emit-relocs-528.d: Likewise. * ld-aarch64/emit-relocs-528-overflow.d: Likewise. * ld-aarch64/aarch64-elf.exp: Run new testcases.
2015-08-19 12:18:25 +02:00
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12 \
[AArch64][8/8] LD support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12 2015-08-11 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12. (aarch64_reloc_got_type): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ * ld-aarch64/emit-relocs-529.s: New testcase. * ld-aarch64/emit-relocs-529-overflow.s: Likewise. * ld-aarch64/emit-relocs-86.s: Likewise. * ld-aarch64/emit-relocs-86-overflow.s: Likewise. * ld-aarch64/emit-relocs-529.d: New expectation file. * ld-aarch64/emit-relocs-529-overflow.d: Likewise. * ld-aarch64/emit-relocs-86.d: Likewise. * ld-aarch64/emit-relocs-86-overflow.d: Likewise. * ld-aarch64/aarch64-elf.exp: Run new testcases.
2015-08-11 18:44:30 +02:00
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12 \
[AArch64][2/6] LD support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC 2015-08-19 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC. (aarch64_reloc_got_type): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ * ld-aarch64/emit-relocs-530.s: New testcase. * ld-aarch64/emit-relocs-92.s: Likewise. * ld-aarch64/emit-relocs-530.d: New expectation file. * ld-aarch64/emit-relocs-92.d: Likewise. * ld-aarch64/aarch64-elf.exp: Run new testcases.
2015-08-19 11:58:13 +02:00
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC \
[AArch64][6/8] LD support BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC 2015-08-11 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC. (aarch64_reloc_got_type): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ * ld-aarch64/tls-small-ld.s: Update testcase.
2015-08-11 18:20:17 +02:00
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC \
[AArch64][3/8] LD support BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21 2015-08-11 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21. (aarch64_reloc_got_type): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ * ld-aarch64/tls-small-ld.s: New file. * ld-aarch64/tls-small-ld.d: Likewise. * ld-aarch64/aarch64-elf.exp: Run new test.
2015-08-11 18:05:34 +02:00
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21 \
[AArch64][3/3] LD support BFD_RELOC_AARCH64_TLSLD_ADR_PREL21
2015-07-16 16:46:21 +02:00
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADR_PREL21 \
[AArch64][6/6] LD support TLSLD load/store relocation types 2015-08-19 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize new relocation types, including BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12, BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC, BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12, BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC, BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12, BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC, BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12, BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC. (elfNN_aarch64_final_link_relocate): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ * ld-aarch64/emit-relocs-531.s: New testcase. * ld-aarch64/emit-relocs-531-overflow.s: Likewise. * ld-aarch64/emit-relocs-532.s: Likewise. * ld-aarch64/emit-relocs-533.s: Likewise. * ld-aarch64/emit-relocs-533-overflow.s: Likewise. * ld-aarch64/emit-relocs-534.s: Likewise. * ld-aarch64/emit-relocs-535.s: Likewise. * ld-aarch64/emit-relocs-535-overflow.s: Likewise. * ld-aarch64/emit-relocs-536.s: Likewise. * ld-aarch64/emit-relocs-537.s: Likewise. * ld-aarch64/emit-relocs-537-overflow.s: Likewise. * ld-aarch64/emit-relocs-538.s: Likewise. * ld-aarch64/emit-relocs-531.d: New expectation file. * ld-aarch64/emit-relocs-531-overflow.d: Likewise. * ld-aarch64/emit-relocs-532.d: Likewise. * ld-aarch64/emit-relocs-533.d: Likewise. * ld-aarch64/emit-relocs-533-overflow.d: Likewise. * ld-aarch64/emit-relocs-534.d: Likewise. * ld-aarch64/emit-relocs-535.d: Likewise. * ld-aarch64/emit-relocs-535-overflow.d: Likewise. * ld-aarch64/emit-relocs-536.d: Likewise. * ld-aarch64/emit-relocs-537.d: Likewise. * ld-aarch64/emit-relocs-537-overflow.d: Likewise. * ld-aarch64/emit-relocs-538.d: Likewise. * ld-aarch64/aarch64-elf.exp: Run new testcases.
2015-08-19 12:26:56 +02:00
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12 \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12 \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12 \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12 \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC \
[AArch64][4/6] LD support TLSLD move/add relocation types 2015-08-19 Jiong Wang <jiong.wang@arm.com> bfd/ PR ld/18276 * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize new relocation types, including BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2. (elfNN_aarch64_final_link_relocate): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ * ld-aarch64/emit-relocs-87.s: New testcase. * ld-aarch64/emit-relocs-88.s: Likewise. * ld-aarch64/emit-relocs-88-overflow.s: Likewise. * ld-aarch64/emit-relocs-89.s: Likewise. * ld-aarch64/emit-relocs-90.s: Likewise. * ld-aarch64/emit-relocs-90-overflow.s: Likewise. * ld-aarch64/emit-relocs-523.s: Likewise. * ld-aarch64/emit-relocs-524.s: Likewise. * ld-aarch64/emit-relocs-525.s: Likewise. * ld-aarch64/emit-relocs-527.s: Likewise. * ld-aarch64/emit-relocs-526.s: Likewise. * ld-aarch64/emit-relocs-528.s: Likewise. * ld-aarch64/emit-relocs-528-overflow.s: Likewise. * ld-aarch64/emit-relocs-87.d: New expectation file. * ld-aarch64/emit-relocs-88.d: Likewise. * ld-aarch64/emit-relocs-88-overflow.d: Likewise. * ld-aarch64/emit-relocs-89.d: Likewise. * ld-aarch64/emit-relocs-90.d: Likewise. * ld-aarch64/emit-relocs-90-overflow.d: Likewise. * ld-aarch64/emit-relocs-91.d: Likewise. * ld-aarch64/emit-relocs-523.d: Likewise. * ld-aarch64/emit-relocs-524.d: Likewise. * ld-aarch64/emit-relocs-525.d: Likewise. * ld-aarch64/emit-relocs-526.d: Likewise. * ld-aarch64/emit-relocs-527.d: Likewise. * ld-aarch64/emit-relocs-528.d: Likewise. * ld-aarch64/emit-relocs-528-overflow.d: Likewise. * ld-aarch64/aarch64-elf.exp: Run new testcases.
2015-08-19 12:18:25 +02:00
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0 \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1 \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2 \
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12 \
[AArch64] Sort TLS reloc types alphabetically
2015-07-17 14:03:26 +02:00
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12 \
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC \
[2/2][LD][AARCH64]Add BFD_RELOC_AARCH64_TLSLE_LDST8/16/32/64_TPREL_LO12 support in LD. This patch adds the following relocation support into binutils bfd linker. BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12, BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC, BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12, BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC, BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12, BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC, BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12, BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC. Those relocations includes both ip64 and ilp32 variant.
2018-03-28 19:06:05 +02:00
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12 \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12 \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12 \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12 \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC \
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0 \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC \
[AArch64] Sort TLS reloc types alphabetically
2015-07-17 14:03:26 +02:00
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1 \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2 \
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
|| (R_TYPE) == BFD_RELOC_AARCH64_TLS_DTPMOD \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLS_DTPREL \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLS_TPREL \
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
|| IS_AARCH64_TLSDESC_RELOC ((R_TYPE)))
[AArch64]Speed up linking speed by skipping unncessary TLS reloc type check 2015-08-11 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (IS_AARCH64_TLS_RELAX_RELOC): New. (aarch64_can_relax_tls): Use the new IS_AARCH64_TLS_RELAX_RELOC.
2015-08-11 23:05:39 +02:00
#define IS_AARCH64_TLS_RELAX_RELOC(R_TYPE) \
Rename R_AARCH64_TLSDESC_LD64_LO12_NC to R_AARCH64_TLSDESC_LD64_LO12 and R_AARCH64_TLSDESC_ADD_LO12_NC to R_AARCH64_TLSDESC_ADD_LO12. PR binutils/21202 include * elf/aarch64.h (R_AARCH64_TLSDESC_LD64_LO12_NC): Rename to R_AARCH64_TLSDESC_LD64_LO12. (R_AARCH64_TLSDESC_ADD_LO12_NC): Rename to R_AARCH64_TLSDESC_ADD_LO12_NC. bfd * reloc.c (BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC): Rename to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12. (BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC): Rename to BFD_RELOC_AARCH64_TLSDESC_ADD_LO12. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elfnn-aarch64.c (IS_AARCH64_TLS_RELAX_RELOC): Update reloc names. (IS_AARCH64_TLSDESC_RELOC): Likewise. (elfNN_aarch64_howto_table): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. gas * config/tc-aarch64.c (reloc_table): Rename BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12. Rname BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC to BFD_RELOC_AARCH64_TLSDESC_ADD_LO12. (md_apply_fix): Likewise. (aarch64_force_relocation): Likewise. * testsuite/gas/aarch64/tls.d: Update regexp. ld * testsuite/ld-aarch64/ifunc-5r-local.d: Update regexp.
2017-03-13 10:58:04 +01:00
((R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_ADD \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_ADD_LO12 \
[AArch64] Sort IS_AARCH64_TLS_RELAX_RELOC in alphabetic order This can also speedup the check as TLSDESC is the default model for global/local dynamic that the big "||" check can finish more quickly than putting them at the bottom. 2015-09-09 Jiong. Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (IS_AARCH64_TLS_RELAX_RELOC): Sort alphabetically.
2015-09-09 15:25:33 +02:00
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21 \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_CALL \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_LD_PREL19 \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_LDNN_LO12_NC \
[LD][AARCH64]Add TLSDESC support for large memory model. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_tls_transition_without_check): Add relax transitions for TLSDESC_ADD, TLSDESC_LDR, TLSDESC_OFF_G0_NC, TLSDESC_OFF_G1. (aarch64_tls_transition_without_check): Add relaxation support. (aarch64_reloc_got_type): Add support. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/aarch64-elf.exp: Run new test. * ld-aarch64/tls-large-desc.d: New. * ld-aarch64/tls-large-desc.s: New. * ld-aarch64/tls-relax-large-desc-ie.d: New. * ld-aarch64/tls-relax-large-desc-ie.s: New. * ld-aarch64/tls-relax-large-desc-le.d: New. * ld-aarch64/tls-relax-large-desc-le.s: New.
2015-10-02 18:43:08 +02:00
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_LDR \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_OFF_G1 \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_LDR \
[AArch64] Sort IS_AARCH64_TLS_RELAX_RELOC in alphabetic order This can also speedup the check as TLSDESC is the default model for global/local dynamic that the big "||" check can finish more quickly than putting them at the bottom. 2015-09-09 Jiong. Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (IS_AARCH64_TLS_RELAX_RELOC): Sort alphabetically.
2015-09-09 15:25:33 +02:00
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21 \
[AArch64]Speed up linking speed by skipping unncessary TLS reloc type check 2015-08-11 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (IS_AARCH64_TLS_RELAX_RELOC): New. (aarch64_can_relax_tls): Use the new IS_AARCH64_TLS_RELAX_RELOC.
2015-08-11 23:05:39 +02:00
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_ADR_PREL21 \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC \
[BFD][AARCH64]Add TLSGD relaxation support under large memory model. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c(IS_AARCH64_TLS_RELAX_RELOC): Add relaxation support for TLSGD_MOVW_G0_NC and TLSGD_MOVW_G1. (aarch64_tls_transition_without_check): Likewise (elfNN_aarch64_tls_relax): Likwise. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/aarch64-elf.exp: run new test * ld-aarch64/tls-relax-large-gd-ie.d: New. * ld-aarch64/tls-relax-large-gd-ie.s: New. * ld-aarch64/tls-relax-large-gd-le.d: New. * ld-aarch64/tls-relax-large-gd-le.s: New.
2015-10-02 18:22:36 +02:00
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_MOVW_G1 \
[AArch64]Speed up linking speed by skipping unncessary TLS reloc type check 2015-08-11 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (IS_AARCH64_TLS_RELAX_RELOC): New. (aarch64_can_relax_tls): Use the new IS_AARCH64_TLS_RELAX_RELOC.
2015-08-11 23:05:39 +02:00
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19 \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_LDNN_GOTTPREL_LO12_NC \
[AArch64] Relax TLS local dynamic traditional into local executable The linker relaxation logic will be: Code sequence I (tiny): 0x00 adr x0, :tlsldm:x 0x04 bl __tls_get_addr | V 0x00 mrs x0, tpidr_el0 0x04 add x0, x0, TCB_SIZE Code sequence II (small): 0x00 adrp a0, :tlsldm:x 0x04 add a0, #:tlsldm_lo12:x 0x08 bl __tls_get_addr | V 0x00 mrs x0, tpidr_el0 0x04 add x0, x0, TCB_SIZE 0x08 nop 2015-09-09 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_tls_transition_without_check): Support three TLS local dynamic traditional relocations types. (elfNN_aarch64_tls_relax): Support TLS local dynamic traditional to local executable relaxation. ld/testsuite/ * ld-aarch64/tls-relax-ld-le-tiny.s: New testcase. * ld-aarch64/tls-relax-ld-le-small.s: Likewise. * ld-aarch64/tls-relax-ld-le-tiny.d: New expectation file. * ld-aarch64/tls-relax-ld-le-small.d: Likewise. * ld-aarch64/aarch64-elf.exp: Run new testcases.
2015-09-09 15:19:28 +02:00
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21 \
[AArch64] Sort IS_AARCH64_TLS_RELAX_RELOC in alphabetic order This can also speedup the check as TLSDESC is the default model for global/local dynamic that the big "||" check can finish more quickly than putting them at the bottom. 2015-09-09 Jiong. Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (IS_AARCH64_TLS_RELAX_RELOC): Sort alphabetically.
2015-09-09 15:25:33 +02:00
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADR_PREL21)
[AArch64]Speed up linking speed by skipping unncessary TLS reloc type check 2015-08-11 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (IS_AARCH64_TLS_RELAX_RELOC): New. (aarch64_can_relax_tls): Use the new IS_AARCH64_TLS_RELAX_RELOC.
2015-08-11 23:05:39 +02:00
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
#define IS_AARCH64_TLSDESC_RELOC(R_TYPE) \
[AArch64] Sort TLS reloc types alphabetically
2015-07-17 14:03:26 +02:00
((R_TYPE) == BFD_RELOC_AARCH64_TLSDESC \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_ADD \
Rename R_AARCH64_TLSDESC_LD64_LO12_NC to R_AARCH64_TLSDESC_LD64_LO12 and R_AARCH64_TLSDESC_ADD_LO12_NC to R_AARCH64_TLSDESC_ADD_LO12. PR binutils/21202 include * elf/aarch64.h (R_AARCH64_TLSDESC_LD64_LO12_NC): Rename to R_AARCH64_TLSDESC_LD64_LO12. (R_AARCH64_TLSDESC_ADD_LO12_NC): Rename to R_AARCH64_TLSDESC_ADD_LO12_NC. bfd * reloc.c (BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC): Rename to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12. (BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC): Rename to BFD_RELOC_AARCH64_TLSDESC_ADD_LO12. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elfnn-aarch64.c (IS_AARCH64_TLS_RELAX_RELOC): Update reloc names. (IS_AARCH64_TLSDESC_RELOC): Likewise. (elfNN_aarch64_howto_table): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. gas * config/tc-aarch64.c (reloc_table): Rename BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12. Rname BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC to BFD_RELOC_AARCH64_TLSDESC_ADD_LO12. (md_apply_fix): Likewise. (aarch64_force_relocation): Likewise. * testsuite/gas/aarch64/tls.d: Update regexp. ld * testsuite/ld-aarch64/ifunc-5r-local.d: Update regexp.
2017-03-13 10:58:04 +01:00
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_ADD_LO12 \
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 \
[AArch64] Add support for :tlsdesc: and TLSDESC_ADR_PREL21
2015-02-18 16:36:40 +01:00
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21 \
[AArch64] Sort TLS reloc types alphabetically
2015-07-17 14:03:26 +02:00
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_CALL \
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC \
Rename R_AARCH64_TLSDESC_LD64_LO12_NC to R_AARCH64_TLSDESC_LD64_LO12 and R_AARCH64_TLSDESC_ADD_LO12_NC to R_AARCH64_TLSDESC_ADD_LO12. PR binutils/21202 include * elf/aarch64.h (R_AARCH64_TLSDESC_LD64_LO12_NC): Rename to R_AARCH64_TLSDESC_LD64_LO12. (R_AARCH64_TLSDESC_ADD_LO12_NC): Rename to R_AARCH64_TLSDESC_ADD_LO12_NC. bfd * reloc.c (BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC): Rename to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12. (BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC): Rename to BFD_RELOC_AARCH64_TLSDESC_ADD_LO12. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elfnn-aarch64.c (IS_AARCH64_TLS_RELAX_RELOC): Update reloc names. (IS_AARCH64_TLSDESC_RELOC): Likewise. (elfNN_aarch64_howto_table): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. gas * config/tc-aarch64.c (reloc_table): Rename BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12. Rname BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC to BFD_RELOC_AARCH64_TLSDESC_ADD_LO12. (md_apply_fix): Likewise. (aarch64_force_relocation): Likewise. * testsuite/gas/aarch64/tls.d: Update regexp. ld * testsuite/ld-aarch64/ifunc-5r-local.d: Update regexp.
2017-03-13 10:58:04 +01:00
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_LD64_LO12 \
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_LDR \
[AArch64] Sort TLS reloc types alphabetically
2015-07-17 14:03:26 +02:00
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_LD_PREL19 \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_OFF_G1)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
[AArch64] Allow COPY relocation elimination As discussed at the PR, this patch tries to avoid COPY relocation generation and propagate the original relocation into runtime if it was relocating on writable section. The ELIMINATE_COPY_RELOCS has been set to true and it's underlying infrastructure has been improved so that the COPY reloc elimination at least working on absoluate relocations (ABS64) on AArch64. BFD linker copy relocation elimination framwork requires the backend to always allocate dynrelocs for all those relocation types that are possible to introduce copy relocations. This is for adjust_dynamic_symbol hook to be able to get all symbol reference information. Should one symbol is referenced by more than one relocations, if there is any of them needs copy relocation then linker should generate it. bfd/ PR ld/21532 * elfnn-aarch64.c (ELIMINATE_COPY_RELOCS): Set to 1. (elfNN_aarch64_final_link_relocate): Also propagate relocations to runtime for if there needs copy relocation elimination. (need_copy_relocation_p): New function. Return true for symbol with pc-relative references and if it's against read-only sections. (elfNN_aarch64_adjust_dynamic_symbol): Use need_copy_relocation_p. (elfNN_aarch64_check_relocs): Allocate dynrelocs for relocation types that are related with accessing external objects. (elfNN_aarch64_gc_sweep_hook): Sync the relocation types with the change in elfNN_aarch64_check_relocs. ld/ * testsuite/ld-aarch64/copy-reloc-exe-2.s: New test source file. * testsuite/ld-aarch64/copy-reloc-2.d: New test. * testsuite/ld-aarch64/copy-reloc-exe-eliminate.s: New test source file. * testsuite/ld-aarch64/copy-reloc-eliminate.d: New test. * testsuite/ld-aarch64/copy-reloc-so.s: Define new global objects. * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests.
2017-06-15 17:51:01 +02:00
#define ELIMINATE_COPY_RELOCS 1
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* Return size of a relocation entry. HTAB is the bfd's
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elf_aarch64_link_hash_entry. */
#define RELOC_SIZE(HTAB) (sizeof (ElfNN_External_Rela))
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
/* GOT Entry size - 8 bytes in ELF64 and 4 bytes in ELF32. */
BFD whitespace fixes Binutils is supposed to use tabs. In my git config I have whitespace = indent-with-non-tab,space-before-tab,trailing-space and I got annoyed enough seeing red in "git diff" output to fix the problems. * doc/header.sed: Trim trailing space when splitting lines. * aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-cris.c, * aout-ns32k.c, * aout-target.h, * aout-tic30.c, * aoutf1.h, * aoutx.h, * arc-got.h, * arc-plt.def, * arc-plt.h, * archive.c, * archive64.c, * archures.c, * armnetbsd.c, * bfd-in.h, * bfd.c, * bfdio.c, * binary.c, * bout.c, * cache.c, * cisco-core.c, * coff-alpha.c, * coff-apollo.c, * coff-arm.c, * coff-h8300.c, * coff-i386.c, * coff-i860.c, * coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mcore.c, * coff-mips.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-stgo32.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * compress.c, * corefile.c, * cpu-alpha.c, * cpu-arm.c, * cpu-avr.c, * cpu-bfin.c, * cpu-cr16.c, * cpu-cr16c.c, * cpu-crx.c, * cpu-d10v.c, * cpu-frv.c, * cpu-ft32.c, * cpu-i370.c, * cpu-i960.c, * cpu-ia64-opc.c, * cpu-ip2k.c, * cpu-lm32.c, * cpu-m32r.c, * cpu-mcore.c, * cpu-microblaze.c, * cpu-mips.c, * cpu-moxie.c, * cpu-mt.c, * cpu-nios2.c, * cpu-ns32k.c, * cpu-or1k.c, * cpu-powerpc.c, * cpu-pru.c, * cpu-sh.c, * cpu-spu.c, * cpu-v850.c, * cpu-v850_rh850.c, * cpu-xgate.c, * cpu-z80.c, * dwarf1.c, * dwarf2.c, * ecoff.c, * ecofflink.c, * ecoffswap.h, * elf-bfd.h, * elf-eh-frame.c, * elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf-s390-common.c, * elf-strtab.c, * elf-vxworks.c, * elf.c, * elf32-am33lin.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-avr.h, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-i860.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68hc1x.c, * elf32-m68hc1x.h, * elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nds32.h, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score.h, * elf32-score7.c, * elf32-sh-symbian.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilegx.c, * elf32-tilegx.h, * elf32-tilepro.c, * elf32-tilepro.h, * elf32-v850.c, * elf32-vax.c, * elf32-wasm32.c, * elf32-xc16x.c, * elf32-xgate.c, * elf32-xgate.h, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-tilegx.c, * elf64-tilegx.h, * elf64-x86-64.c, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-aarch64.h, * elfxx-ia64.c, * elfxx-ia64.h, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * elfxx-x86.h, * freebsd.h, * hash.c, * host-aout.c, * hp300hpux.c, * hppabsd-core.c, * hpux-core.c, * i386aout.c, * i386linux.c, * i386lynx.c, * i386mach3.c, * i386msdos.c, * i386netbsd.c, * ieee.c, * ihex.c, * irix-core.c, * libaout.h, * libbfd-in.h, * libbfd.c, * libcoff-in.h, * libnlm.h, * libpei.h, * libxcoff.h, * linker.c, * lynx-core.c, * m68k4knetbsd.c, * m68klinux.c, * m68knetbsd.c, * m88kmach3.c, * mach-o-aarch64.c, * mach-o-arm.c, * mach-o-i386.c, * mach-o-target.c, * mach-o-x86-64.c, * mach-o.c, * mach-o.h, * merge.c, * mipsbsd.c, * mmo.c, * netbsd.h, * netbsd-core.c, * newsos3.c, * nlm-target.h, * nlm32-ppc.c, * nlm32-sparc.c, * nlmcode.h, * ns32k.h, * ns32knetbsd.c, * oasys.c, * opncls.c, * pc532-mach.c, * pdp11.c, * pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-mips.c, * pe-x86_64.c, * peXXigen.c, * pef.c, * pef.h, * pei-arm.c, * pei-i386.c, * pei-mcore.c, * pei-x86_64.c, * peicode.h, * plugin.c, * ppcboot.c, * ptrace-core.c, * reloc.c, * riscix.c, * rs6000-core.c, * section.c, * som.c, * som.h, * sparclinux.c, * sparcnetbsd.c, * srec.c, * stabs.c, * sunos.c, * syms.c, * targets.c, * tekhex.c, * trad-core.c, * vax1knetbsd.c, * vaxnetbsd.c, * verilog.c, * versados.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * wasm-module.c, * wasm-module.h, * xcofflink.c, * xsym.c, * xsym.h: Whitespace fixes. * bfd-in2.h, * libbfd.h, * libcoff.h: Regenerate.
2017-12-05 23:56:00 +01:00
#define GOT_ENTRY_SIZE (ARCH_SIZE / 8)
#define PLT_ENTRY_SIZE (32)
#define PLT_SMALL_ENTRY_SIZE (16)
#define PLT_TLSDESC_ENTRY_SIZE (32)
[BFD, LD, AArch64, 2/3] Add --force-bti to enable BTI and to select BTI enabled PLTs This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds a new ld command line option: --force-bti. In the presence of this option, the linker enables BTI with the GNU_PROPERTY_AARCH64_FEATURE_1_BTI feature. This gives out warning in case of missing gnu notes for BTI in inputs. 2) It also defines a new set of BTI enabled PLTs. These are used either when all the inputs are marked with GNU_PROPERTY_AARCH64_FEATURE_1_BTI or when the new --force-bti option is used. This required adding new fields in elf_aarch64_link_hash_table so that we could make the PLT related information more generic. 3) It also defines a dynamic tag DT_AARCH64_BTI_PLT. The linker uses this whenever it picks BTI enabled PLTs. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * bfd-in.h (aarch64_plt_type, aarch64_enable_bti_type): New. (aarch64_bti_pac_info): New. (bfd_elf64_aarch64_set_options): Add aarch64_bti_pac_info argument. (bfd_elf32_aarch64_set_options): Likewise. * bfd-in2.h: Regenerate * elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): New. (PLT_BTI_SMALL_ENTRY_SIZE, PLT_BTI_TLSDESC_ENTRY_SIZE): New. (elfNN_aarch64_small_plt0_bti_entry): New. (elfNN_aarch64_small_plt_bti_entry): New. (elfNN_aarch64_tlsdesc_small_plt_bti_entry): New. (elf_aarch64_obj_tdata): Add no_bti_warn and plt_type fields. (elf_aarch64_link_hash_table): Add plt0_entry, plt_entry and tlsdesc_plt_entry_size fields. (elfNN_aarch64_link_hash_table_create): Initialise the new fields. (setup_plt_values): New helper function. (bfd_elfNN_aarch64_set_options): Use new bp_info to set plt sizes and bti enable type. (elfNN_aarch64_allocate_dynrelocs): Use new size members instead of fixed macros. (elfNN_aarch64_size_dynamic_sections): Likewise and add checks. (elfNN_aarch64_create_small_pltn_entry): Use new generic pointers to plt stubs instead of fixed ones and update filling them according to the need for bti. (elfNN_aarch64_init_small_plt0_entry): Likewise. (elfNN_aarch64_finish_dynamic_sections): Likewise. (get_plt_type, elfNN_aarch64_get_synthetic_symtab): New. (elfNN_aarch64_plt_sym_val): Update size accordingly. (elfNN_aarch64_link_setup_gnu_properties): Set up plts if BTI GNU NOTE is set. (bfd_elfNN_get_synthetic_symtab): Define. (elfNN_aarch64_merge_gnu_properties): Give out warning with --force-bti and mising BTI NOTE SECTION. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * readelf.c (get_aarch64_dynamic_type): New. (get_dynamic_type): Use above for EM_AARCH64. (dynamic_section_aarch64_val): New. (process_dynamic_section): Use above for EM_AARCH64. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * elf/aarch64.h (DT_AARCH64_BTI_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * NEWS: Document --force-bti. * emultempl/aarch64elf.em (plt_type, bti_type, OPTION_FORCE_BTI): New. (PARSE_AND_LIST_SHORTOPTS, PARSE_AND_LIST_OPTIONS): Add force-bti. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FORCE_BTI. * testsuite/ld-aarch64/aarch64-elf.exp: Add all the tests below. * testsuite/ld-aarch64/bti-plt-1.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: New test. * testsuite/ld-aarch64/bti-plt-2.s: New test. * testsuite/ld-aarch64/bti-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-3.d: New test. * testsuite/ld-aarch64/bti-plt-4.d: New test. * testsuite/ld-aarch64/bti-plt-5.d: New test. * testsuite/ld-aarch64/bti-plt-6.d: New test. * testsuite/ld-aarch64/bti-plt-7.d: New test. * testsuite/ld-aarch64/bti-plt-so.s: New test. * testsuite/ld-aarch64/bti-plt.ld: New test.
2019-03-13 11:54:30 +01:00
/* PLT sizes with BTI insn. */
[BFD, AArch64] Improve bti/pac plts. This patch aims to improve the definitions of BTI and PAC based PLTs. The following changes are made: * PLT0 does not need PAC instructions since the PLTGOT[2] (and PLTGOT[1]) are readonly so they cannot be corrupted at runtime. Thus both PAC plt0 and BTI+PAC plt0 are removed and we can use basic plt0 and BTI plt0 instead, respectively. * We can remove the extra padding nops when we add the new bti instructions. BTI plt0 and BTI TLSDESC plt are updated. * For better performance PLTn could be padded to 24bytes. Both BTI pltn and PAC pltn are updated. *** bfd/ChangeLog *** 2019-04-25 Sudakshina Das <sudi.das@arm.com> * elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): Remove. (PLT_BTI_TLSDESC_ENTRY_SIZE): Remove. (PLT_PAC_ENTRY_SIZE, PLT_BTI_PAC_ENTRY_SIZE): Remove. (PLT_BTI_SMALL_ENTRY_SIZE, PLT_PAC_SMALL_ENTRY_SIZE): Update. (elfNN_aarch64_small_plt0_pac_entry): Remove. (elfNN_aarch64_small_plt0_bti_pac_entry): Remove. (elfNN_aarch64_small_plt0_bti_entry): Update. (elfNN_aarch64_small_plt_bti_entry): Update. (elfNN_aarch64_small_plt_pac_entry): Update. (elfNN_aarch64_tlsdesc_small_plt_bti_entry): Update. (setup_plt_values): Setup new entries. (elfNN_aarch64_finish_dynamic_sections): Remove size change. (elfNN_aarch64_plt_sym_val): Likewise. *** ld/ChangeLog *** 2019-04-25 Sudakshina Das <sudi.das@arm.com> * testsuite/ld-aarch64/bti-pac-plt-1.d: Update. * testsuite/ld-aarch64/bti-pac-plt-2.d: Update. * testsuite/ld-aarch64/bti-plt-1.d: Update. * testsuite/ld-aarch64/bti-plt-3.d: Update. * testsuite/ld-aarch64/bti-plt-5.d: Update. * testsuite/ld-aarch64/pac-plt-1.d: Update. * testsuite/ld-aarch64/pac-plt-2.d: Update.
2019-04-25 12:37:25 +02:00
#define PLT_BTI_SMALL_ENTRY_SIZE (24)
[BFD, LD, AArch64, 3/3] Add --pac-plt to enable PLTs protected with PAC. This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds new definitions of PAC enabled PLTs and both BTI and PAC enabled PLTs. 2) It also defines the new dynamic tag DT_AARCH64_PAC_PLT for the PAC enabled PLTs. 3) This patch adds a new ld command line option: --pac-plt. In the presence of this option, the linker uses the PAC enabled PLTs and marks with DT_AARCH64_PAC_PLT. 4) In case both BTI and PAC are enabled the linker should pick PLTs enabled with both and also use dynamic tags for both. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * elfnn-aarch64.c (PLT_PAC_ENTRY_SIZE, PLT_PAC_SMALL_ENTRY_SIZE): New. (PLT_BTI_PAC_ENTRY_SIZE, PLT_BTI_PAC_SMALL_ENTRY_SIZE): New. (setup_plt_values): Account for PAC or PAC and BTI enabled PLTs. (elfNN_aarch64_size_dynamic_sections): Add checks for PLT_BTI_PAC and PLT_PAC_PLT. (elfNN_aarch64_finish_dynamic_sections): Account for PLT_BTI_PAC. (get_plt_type): Add case for DT_AARCH64_PAC_PLT. (elfNN_aarch64_plt_sym_val): Add cases for PLT_BTI_PAC and PLT_PAC. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * readelf.c (get_aarch64_dynamic_type): Add case for DT_AARCH64_PAC_PLT. (dynamic_section_aarch64_val): Likewise. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * elf/aarch64.h (DT_AARCH64_PAC_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * NEWS: Document --pac-plt. * emultempl/aarch64elf.em (OPTION_PAC_PLT): New. (PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS): Add pac-plt. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_PAC_PLT. * testsuite/ld-aarch64/aarch64-elf.exp: Add the following tests. * testsuite/ld-aarch64/bti-pac-plt-1.d: New test. * testsuite/ld-aarch64/bti-pac-plt-2.d: New test. * testsuite/ld-aarch64/pac-plt-1.d: New test. * testsuite/ld-aarch64/pac-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: Add .ifndef directive.
2019-03-13 12:09:10 +01:00
/* PLT sizes with PAC insn. */
[BFD, AArch64] Improve bti/pac plts. This patch aims to improve the definitions of BTI and PAC based PLTs. The following changes are made: * PLT0 does not need PAC instructions since the PLTGOT[2] (and PLTGOT[1]) are readonly so they cannot be corrupted at runtime. Thus both PAC plt0 and BTI+PAC plt0 are removed and we can use basic plt0 and BTI plt0 instead, respectively. * We can remove the extra padding nops when we add the new bti instructions. BTI plt0 and BTI TLSDESC plt are updated. * For better performance PLTn could be padded to 24bytes. Both BTI pltn and PAC pltn are updated. *** bfd/ChangeLog *** 2019-04-25 Sudakshina Das <sudi.das@arm.com> * elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): Remove. (PLT_BTI_TLSDESC_ENTRY_SIZE): Remove. (PLT_PAC_ENTRY_SIZE, PLT_BTI_PAC_ENTRY_SIZE): Remove. (PLT_BTI_SMALL_ENTRY_SIZE, PLT_PAC_SMALL_ENTRY_SIZE): Update. (elfNN_aarch64_small_plt0_pac_entry): Remove. (elfNN_aarch64_small_plt0_bti_pac_entry): Remove. (elfNN_aarch64_small_plt0_bti_entry): Update. (elfNN_aarch64_small_plt_bti_entry): Update. (elfNN_aarch64_small_plt_pac_entry): Update. (elfNN_aarch64_tlsdesc_small_plt_bti_entry): Update. (setup_plt_values): Setup new entries. (elfNN_aarch64_finish_dynamic_sections): Remove size change. (elfNN_aarch64_plt_sym_val): Likewise. *** ld/ChangeLog *** 2019-04-25 Sudakshina Das <sudi.das@arm.com> * testsuite/ld-aarch64/bti-pac-plt-1.d: Update. * testsuite/ld-aarch64/bti-pac-plt-2.d: Update. * testsuite/ld-aarch64/bti-plt-1.d: Update. * testsuite/ld-aarch64/bti-plt-3.d: Update. * testsuite/ld-aarch64/bti-plt-5.d: Update. * testsuite/ld-aarch64/pac-plt-1.d: Update. * testsuite/ld-aarch64/pac-plt-2.d: Update.
2019-04-25 12:37:25 +02:00
#define PLT_PAC_SMALL_ENTRY_SIZE (24)
[BFD, LD, AArch64, 3/3] Add --pac-plt to enable PLTs protected with PAC. This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds new definitions of PAC enabled PLTs and both BTI and PAC enabled PLTs. 2) It also defines the new dynamic tag DT_AARCH64_PAC_PLT for the PAC enabled PLTs. 3) This patch adds a new ld command line option: --pac-plt. In the presence of this option, the linker uses the PAC enabled PLTs and marks with DT_AARCH64_PAC_PLT. 4) In case both BTI and PAC are enabled the linker should pick PLTs enabled with both and also use dynamic tags for both. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * elfnn-aarch64.c (PLT_PAC_ENTRY_SIZE, PLT_PAC_SMALL_ENTRY_SIZE): New. (PLT_BTI_PAC_ENTRY_SIZE, PLT_BTI_PAC_SMALL_ENTRY_SIZE): New. (setup_plt_values): Account for PAC or PAC and BTI enabled PLTs. (elfNN_aarch64_size_dynamic_sections): Add checks for PLT_BTI_PAC and PLT_PAC_PLT. (elfNN_aarch64_finish_dynamic_sections): Account for PLT_BTI_PAC. (get_plt_type): Add case for DT_AARCH64_PAC_PLT. (elfNN_aarch64_plt_sym_val): Add cases for PLT_BTI_PAC and PLT_PAC. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * readelf.c (get_aarch64_dynamic_type): Add case for DT_AARCH64_PAC_PLT. (dynamic_section_aarch64_val): Likewise. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * elf/aarch64.h (DT_AARCH64_PAC_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * NEWS: Document --pac-plt. * emultempl/aarch64elf.em (OPTION_PAC_PLT): New. (PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS): Add pac-plt. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_PAC_PLT. * testsuite/ld-aarch64/aarch64-elf.exp: Add the following tests. * testsuite/ld-aarch64/bti-pac-plt-1.d: New test. * testsuite/ld-aarch64/bti-pac-plt-2.d: New test. * testsuite/ld-aarch64/pac-plt-1.d: New test. * testsuite/ld-aarch64/pac-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: Add .ifndef directive.
2019-03-13 12:09:10 +01:00
/* PLT sizes with BTI and PAC insn. */
#define PLT_BTI_PAC_SMALL_ENTRY_SIZE (24)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
Fix AArch64 relocation handling in ILP32 mode. bfd * elfnn-aarch64.c: Fix relaxations for ILP32 mode. ld * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests. * testsuite/ld-aarch64/tls-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-all-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gd-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-3-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-le-ilp32.d: New test.
2017-01-23 18:07:13 +01:00
/* Encoding of the nop instruction. */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
#define INSN_NOP 0xd503201f
#define aarch64_compute_jump_table_size(htab) \
(((htab)->root.srelplt == NULL) ? 0 \
: (htab)->root.srelplt->reloc_count * GOT_ENTRY_SIZE)
/* The first entry in a procedure linkage table looks like this
if the distance between the PLTGOT and the PLT is < 4GB use
these PLT entries. Note that the dynamic linker gets &PLTGOT[2]
in x16 and needs to work out PLTGOT[1] by using an address of
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
[x16,#-GOT_ENTRY_SIZE]. */
static const bfd_byte elfNN_aarch64_small_plt0_entry[PLT_ENTRY_SIZE] =
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
0xf0, 0x7b, 0xbf, 0xa9, /* stp x16, x30, [sp, #-16]! */
0x10, 0x00, 0x00, 0x90, /* adrp x16, (GOT+16) */
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
#if ARCH_SIZE == 64
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
0x11, 0x0A, 0x40, 0xf9, /* ldr x17, [x16, #PLT_GOT+0x10] */
0x10, 0x42, 0x00, 0x91, /* add x16, x16,#PLT_GOT+0x10 */
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
#else
0x11, 0x0A, 0x40, 0xb9, /* ldr w17, [x16, #PLT_GOT+0x8] */
0x10, 0x22, 0x00, 0x11, /* add w16, w16,#PLT_GOT+0x8 */
#endif
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
0x20, 0x02, 0x1f, 0xd6, /* br x17 */
0x1f, 0x20, 0x03, 0xd5, /* nop */
0x1f, 0x20, 0x03, 0xd5, /* nop */
0x1f, 0x20, 0x03, 0xd5, /* nop */
};
[BFD, AArch64] Improve bti/pac plts. This patch aims to improve the definitions of BTI and PAC based PLTs. The following changes are made: * PLT0 does not need PAC instructions since the PLTGOT[2] (and PLTGOT[1]) are readonly so they cannot be corrupted at runtime. Thus both PAC plt0 and BTI+PAC plt0 are removed and we can use basic plt0 and BTI plt0 instead, respectively. * We can remove the extra padding nops when we add the new bti instructions. BTI plt0 and BTI TLSDESC plt are updated. * For better performance PLTn could be padded to 24bytes. Both BTI pltn and PAC pltn are updated. *** bfd/ChangeLog *** 2019-04-25 Sudakshina Das <sudi.das@arm.com> * elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): Remove. (PLT_BTI_TLSDESC_ENTRY_SIZE): Remove. (PLT_PAC_ENTRY_SIZE, PLT_BTI_PAC_ENTRY_SIZE): Remove. (PLT_BTI_SMALL_ENTRY_SIZE, PLT_PAC_SMALL_ENTRY_SIZE): Update. (elfNN_aarch64_small_plt0_pac_entry): Remove. (elfNN_aarch64_small_plt0_bti_pac_entry): Remove. (elfNN_aarch64_small_plt0_bti_entry): Update. (elfNN_aarch64_small_plt_bti_entry): Update. (elfNN_aarch64_small_plt_pac_entry): Update. (elfNN_aarch64_tlsdesc_small_plt_bti_entry): Update. (setup_plt_values): Setup new entries. (elfNN_aarch64_finish_dynamic_sections): Remove size change. (elfNN_aarch64_plt_sym_val): Likewise. *** ld/ChangeLog *** 2019-04-25 Sudakshina Das <sudi.das@arm.com> * testsuite/ld-aarch64/bti-pac-plt-1.d: Update. * testsuite/ld-aarch64/bti-pac-plt-2.d: Update. * testsuite/ld-aarch64/bti-plt-1.d: Update. * testsuite/ld-aarch64/bti-plt-3.d: Update. * testsuite/ld-aarch64/bti-plt-5.d: Update. * testsuite/ld-aarch64/pac-plt-1.d: Update. * testsuite/ld-aarch64/pac-plt-2.d: Update.
2019-04-25 12:37:25 +02:00
static const bfd_byte elfNN_aarch64_small_plt0_bti_entry[PLT_ENTRY_SIZE] =
[BFD, LD, AArch64, 2/3] Add --force-bti to enable BTI and to select BTI enabled PLTs This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds a new ld command line option: --force-bti. In the presence of this option, the linker enables BTI with the GNU_PROPERTY_AARCH64_FEATURE_1_BTI feature. This gives out warning in case of missing gnu notes for BTI in inputs. 2) It also defines a new set of BTI enabled PLTs. These are used either when all the inputs are marked with GNU_PROPERTY_AARCH64_FEATURE_1_BTI or when the new --force-bti option is used. This required adding new fields in elf_aarch64_link_hash_table so that we could make the PLT related information more generic. 3) It also defines a dynamic tag DT_AARCH64_BTI_PLT. The linker uses this whenever it picks BTI enabled PLTs. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * bfd-in.h (aarch64_plt_type, aarch64_enable_bti_type): New. (aarch64_bti_pac_info): New. (bfd_elf64_aarch64_set_options): Add aarch64_bti_pac_info argument. (bfd_elf32_aarch64_set_options): Likewise. * bfd-in2.h: Regenerate * elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): New. (PLT_BTI_SMALL_ENTRY_SIZE, PLT_BTI_TLSDESC_ENTRY_SIZE): New. (elfNN_aarch64_small_plt0_bti_entry): New. (elfNN_aarch64_small_plt_bti_entry): New. (elfNN_aarch64_tlsdesc_small_plt_bti_entry): New. (elf_aarch64_obj_tdata): Add no_bti_warn and plt_type fields. (elf_aarch64_link_hash_table): Add plt0_entry, plt_entry and tlsdesc_plt_entry_size fields. (elfNN_aarch64_link_hash_table_create): Initialise the new fields. (setup_plt_values): New helper function. (bfd_elfNN_aarch64_set_options): Use new bp_info to set plt sizes and bti enable type. (elfNN_aarch64_allocate_dynrelocs): Use new size members instead of fixed macros. (elfNN_aarch64_size_dynamic_sections): Likewise and add checks. (elfNN_aarch64_create_small_pltn_entry): Use new generic pointers to plt stubs instead of fixed ones and update filling them according to the need for bti. (elfNN_aarch64_init_small_plt0_entry): Likewise. (elfNN_aarch64_finish_dynamic_sections): Likewise. (get_plt_type, elfNN_aarch64_get_synthetic_symtab): New. (elfNN_aarch64_plt_sym_val): Update size accordingly. (elfNN_aarch64_link_setup_gnu_properties): Set up plts if BTI GNU NOTE is set. (bfd_elfNN_get_synthetic_symtab): Define. (elfNN_aarch64_merge_gnu_properties): Give out warning with --force-bti and mising BTI NOTE SECTION. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * readelf.c (get_aarch64_dynamic_type): New. (get_dynamic_type): Use above for EM_AARCH64. (dynamic_section_aarch64_val): New. (process_dynamic_section): Use above for EM_AARCH64. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * elf/aarch64.h (DT_AARCH64_BTI_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * NEWS: Document --force-bti. * emultempl/aarch64elf.em (plt_type, bti_type, OPTION_FORCE_BTI): New. (PARSE_AND_LIST_SHORTOPTS, PARSE_AND_LIST_OPTIONS): Add force-bti. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FORCE_BTI. * testsuite/ld-aarch64/aarch64-elf.exp: Add all the tests below. * testsuite/ld-aarch64/bti-plt-1.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: New test. * testsuite/ld-aarch64/bti-plt-2.s: New test. * testsuite/ld-aarch64/bti-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-3.d: New test. * testsuite/ld-aarch64/bti-plt-4.d: New test. * testsuite/ld-aarch64/bti-plt-5.d: New test. * testsuite/ld-aarch64/bti-plt-6.d: New test. * testsuite/ld-aarch64/bti-plt-7.d: New test. * testsuite/ld-aarch64/bti-plt-so.s: New test. * testsuite/ld-aarch64/bti-plt.ld: New test.
2019-03-13 11:54:30 +01:00
{
0x5f, 0x24, 0x03, 0xd5, /* bti c. */
0xf0, 0x7b, 0xbf, 0xa9, /* stp x16, x30, [sp, #-16]! */
0x10, 0x00, 0x00, 0x90, /* adrp x16, (GOT+16) */
#if ARCH_SIZE == 64
0x11, 0x0A, 0x40, 0xf9, /* ldr x17, [x16, #PLT_GOT+0x10] */
0x10, 0x42, 0x00, 0x91, /* add x16, x16,#PLT_GOT+0x10 */
#else
0x11, 0x0A, 0x40, 0xb9, /* ldr w17, [x16, #PLT_GOT+0x8] */
0x10, 0x22, 0x00, 0x11, /* add w16, w16,#PLT_GOT+0x8 */
#endif
0x20, 0x02, 0x1f, 0xd6, /* br x17 */
0x1f, 0x20, 0x03, 0xd5, /* nop */
0x1f, 0x20, 0x03, 0xd5, /* nop */
[BFD, LD, AArch64, 3/3] Add --pac-plt to enable PLTs protected with PAC. This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds new definitions of PAC enabled PLTs and both BTI and PAC enabled PLTs. 2) It also defines the new dynamic tag DT_AARCH64_PAC_PLT for the PAC enabled PLTs. 3) This patch adds a new ld command line option: --pac-plt. In the presence of this option, the linker uses the PAC enabled PLTs and marks with DT_AARCH64_PAC_PLT. 4) In case both BTI and PAC are enabled the linker should pick PLTs enabled with both and also use dynamic tags for both. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * elfnn-aarch64.c (PLT_PAC_ENTRY_SIZE, PLT_PAC_SMALL_ENTRY_SIZE): New. (PLT_BTI_PAC_ENTRY_SIZE, PLT_BTI_PAC_SMALL_ENTRY_SIZE): New. (setup_plt_values): Account for PAC or PAC and BTI enabled PLTs. (elfNN_aarch64_size_dynamic_sections): Add checks for PLT_BTI_PAC and PLT_PAC_PLT. (elfNN_aarch64_finish_dynamic_sections): Account for PLT_BTI_PAC. (get_plt_type): Add case for DT_AARCH64_PAC_PLT. (elfNN_aarch64_plt_sym_val): Add cases for PLT_BTI_PAC and PLT_PAC. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * readelf.c (get_aarch64_dynamic_type): Add case for DT_AARCH64_PAC_PLT. (dynamic_section_aarch64_val): Likewise. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * elf/aarch64.h (DT_AARCH64_PAC_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * NEWS: Document --pac-plt. * emultempl/aarch64elf.em (OPTION_PAC_PLT): New. (PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS): Add pac-plt. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_PAC_PLT. * testsuite/ld-aarch64/aarch64-elf.exp: Add the following tests. * testsuite/ld-aarch64/bti-pac-plt-1.d: New test. * testsuite/ld-aarch64/bti-pac-plt-2.d: New test. * testsuite/ld-aarch64/pac-plt-1.d: New test. * testsuite/ld-aarch64/pac-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: Add .ifndef directive.
2019-03-13 12:09:10 +01:00
};
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* Per function entry in a procedure linkage table looks like this
if the distance between the PLTGOT and the PLT is < 4GB use
[BFD, LD, AArch64, 2/3] Add --force-bti to enable BTI and to select BTI enabled PLTs This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds a new ld command line option: --force-bti. In the presence of this option, the linker enables BTI with the GNU_PROPERTY_AARCH64_FEATURE_1_BTI feature. This gives out warning in case of missing gnu notes for BTI in inputs. 2) It also defines a new set of BTI enabled PLTs. These are used either when all the inputs are marked with GNU_PROPERTY_AARCH64_FEATURE_1_BTI or when the new --force-bti option is used. This required adding new fields in elf_aarch64_link_hash_table so that we could make the PLT related information more generic. 3) It also defines a dynamic tag DT_AARCH64_BTI_PLT. The linker uses this whenever it picks BTI enabled PLTs. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * bfd-in.h (aarch64_plt_type, aarch64_enable_bti_type): New. (aarch64_bti_pac_info): New. (bfd_elf64_aarch64_set_options): Add aarch64_bti_pac_info argument. (bfd_elf32_aarch64_set_options): Likewise. * bfd-in2.h: Regenerate * elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): New. (PLT_BTI_SMALL_ENTRY_SIZE, PLT_BTI_TLSDESC_ENTRY_SIZE): New. (elfNN_aarch64_small_plt0_bti_entry): New. (elfNN_aarch64_small_plt_bti_entry): New. (elfNN_aarch64_tlsdesc_small_plt_bti_entry): New. (elf_aarch64_obj_tdata): Add no_bti_warn and plt_type fields. (elf_aarch64_link_hash_table): Add plt0_entry, plt_entry and tlsdesc_plt_entry_size fields. (elfNN_aarch64_link_hash_table_create): Initialise the new fields. (setup_plt_values): New helper function. (bfd_elfNN_aarch64_set_options): Use new bp_info to set plt sizes and bti enable type. (elfNN_aarch64_allocate_dynrelocs): Use new size members instead of fixed macros. (elfNN_aarch64_size_dynamic_sections): Likewise and add checks. (elfNN_aarch64_create_small_pltn_entry): Use new generic pointers to plt stubs instead of fixed ones and update filling them according to the need for bti. (elfNN_aarch64_init_small_plt0_entry): Likewise. (elfNN_aarch64_finish_dynamic_sections): Likewise. (get_plt_type, elfNN_aarch64_get_synthetic_symtab): New. (elfNN_aarch64_plt_sym_val): Update size accordingly. (elfNN_aarch64_link_setup_gnu_properties): Set up plts if BTI GNU NOTE is set. (bfd_elfNN_get_synthetic_symtab): Define. (elfNN_aarch64_merge_gnu_properties): Give out warning with --force-bti and mising BTI NOTE SECTION. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * readelf.c (get_aarch64_dynamic_type): New. (get_dynamic_type): Use above for EM_AARCH64. (dynamic_section_aarch64_val): New. (process_dynamic_section): Use above for EM_AARCH64. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * elf/aarch64.h (DT_AARCH64_BTI_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * NEWS: Document --force-bti. * emultempl/aarch64elf.em (plt_type, bti_type, OPTION_FORCE_BTI): New. (PARSE_AND_LIST_SHORTOPTS, PARSE_AND_LIST_OPTIONS): Add force-bti. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FORCE_BTI. * testsuite/ld-aarch64/aarch64-elf.exp: Add all the tests below. * testsuite/ld-aarch64/bti-plt-1.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: New test. * testsuite/ld-aarch64/bti-plt-2.s: New test. * testsuite/ld-aarch64/bti-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-3.d: New test. * testsuite/ld-aarch64/bti-plt-4.d: New test. * testsuite/ld-aarch64/bti-plt-5.d: New test. * testsuite/ld-aarch64/bti-plt-6.d: New test. * testsuite/ld-aarch64/bti-plt-7.d: New test. * testsuite/ld-aarch64/bti-plt-so.s: New test. * testsuite/ld-aarch64/bti-plt.ld: New test.
2019-03-13 11:54:30 +01:00
these PLT entries. Use BTI versions of the PLTs when enabled. */
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
static const bfd_byte elfNN_aarch64_small_plt_entry[PLT_SMALL_ENTRY_SIZE] =
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
0x10, 0x00, 0x00, 0x90, /* adrp x16, PLTGOT + n * 8 */
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
#if ARCH_SIZE == 64
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
0x11, 0x02, 0x40, 0xf9, /* ldr x17, [x16, PLTGOT + n * 8] */
0x10, 0x02, 0x00, 0x91, /* add x16, x16, :lo12:PLTGOT + n * 8 */
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
#else
0x11, 0x02, 0x40, 0xb9, /* ldr w17, [x16, PLTGOT + n * 4] */
0x10, 0x02, 0x00, 0x11, /* add w16, w16, :lo12:PLTGOT + n * 4 */
#endif
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
0x20, 0x02, 0x1f, 0xd6, /* br x17. */
};
[BFD, LD, AArch64, 2/3] Add --force-bti to enable BTI and to select BTI enabled PLTs This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds a new ld command line option: --force-bti. In the presence of this option, the linker enables BTI with the GNU_PROPERTY_AARCH64_FEATURE_1_BTI feature. This gives out warning in case of missing gnu notes for BTI in inputs. 2) It also defines a new set of BTI enabled PLTs. These are used either when all the inputs are marked with GNU_PROPERTY_AARCH64_FEATURE_1_BTI or when the new --force-bti option is used. This required adding new fields in elf_aarch64_link_hash_table so that we could make the PLT related information more generic. 3) It also defines a dynamic tag DT_AARCH64_BTI_PLT. The linker uses this whenever it picks BTI enabled PLTs. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * bfd-in.h (aarch64_plt_type, aarch64_enable_bti_type): New. (aarch64_bti_pac_info): New. (bfd_elf64_aarch64_set_options): Add aarch64_bti_pac_info argument. (bfd_elf32_aarch64_set_options): Likewise. * bfd-in2.h: Regenerate * elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): New. (PLT_BTI_SMALL_ENTRY_SIZE, PLT_BTI_TLSDESC_ENTRY_SIZE): New. (elfNN_aarch64_small_plt0_bti_entry): New. (elfNN_aarch64_small_plt_bti_entry): New. (elfNN_aarch64_tlsdesc_small_plt_bti_entry): New. (elf_aarch64_obj_tdata): Add no_bti_warn and plt_type fields. (elf_aarch64_link_hash_table): Add plt0_entry, plt_entry and tlsdesc_plt_entry_size fields. (elfNN_aarch64_link_hash_table_create): Initialise the new fields. (setup_plt_values): New helper function. (bfd_elfNN_aarch64_set_options): Use new bp_info to set plt sizes and bti enable type. (elfNN_aarch64_allocate_dynrelocs): Use new size members instead of fixed macros. (elfNN_aarch64_size_dynamic_sections): Likewise and add checks. (elfNN_aarch64_create_small_pltn_entry): Use new generic pointers to plt stubs instead of fixed ones and update filling them according to the need for bti. (elfNN_aarch64_init_small_plt0_entry): Likewise. (elfNN_aarch64_finish_dynamic_sections): Likewise. (get_plt_type, elfNN_aarch64_get_synthetic_symtab): New. (elfNN_aarch64_plt_sym_val): Update size accordingly. (elfNN_aarch64_link_setup_gnu_properties): Set up plts if BTI GNU NOTE is set. (bfd_elfNN_get_synthetic_symtab): Define. (elfNN_aarch64_merge_gnu_properties): Give out warning with --force-bti and mising BTI NOTE SECTION. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * readelf.c (get_aarch64_dynamic_type): New. (get_dynamic_type): Use above for EM_AARCH64. (dynamic_section_aarch64_val): New. (process_dynamic_section): Use above for EM_AARCH64. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * elf/aarch64.h (DT_AARCH64_BTI_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * NEWS: Document --force-bti. * emultempl/aarch64elf.em (plt_type, bti_type, OPTION_FORCE_BTI): New. (PARSE_AND_LIST_SHORTOPTS, PARSE_AND_LIST_OPTIONS): Add force-bti. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FORCE_BTI. * testsuite/ld-aarch64/aarch64-elf.exp: Add all the tests below. * testsuite/ld-aarch64/bti-plt-1.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: New test. * testsuite/ld-aarch64/bti-plt-2.s: New test. * testsuite/ld-aarch64/bti-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-3.d: New test. * testsuite/ld-aarch64/bti-plt-4.d: New test. * testsuite/ld-aarch64/bti-plt-5.d: New test. * testsuite/ld-aarch64/bti-plt-6.d: New test. * testsuite/ld-aarch64/bti-plt-7.d: New test. * testsuite/ld-aarch64/bti-plt-so.s: New test. * testsuite/ld-aarch64/bti-plt.ld: New test.
2019-03-13 11:54:30 +01:00
static const bfd_byte
elfNN_aarch64_small_plt_bti_entry[PLT_BTI_SMALL_ENTRY_SIZE] =
{
0x5f, 0x24, 0x03, 0xd5, /* bti c. */
0x10, 0x00, 0x00, 0x90, /* adrp x16, PLTGOT + n * 8 */
#if ARCH_SIZE == 64
0x11, 0x02, 0x40, 0xf9, /* ldr x17, [x16, PLTGOT + n * 8] */
0x10, 0x02, 0x00, 0x91, /* add x16, x16, :lo12:PLTGOT + n * 8 */
#else
0x11, 0x02, 0x40, 0xb9, /* ldr w17, [x16, PLTGOT + n * 4] */
0x10, 0x02, 0x00, 0x11, /* add w16, w16, :lo12:PLTGOT + n * 4 */
#endif
0x20, 0x02, 0x1f, 0xd6, /* br x17. */
[BFD, AArch64] Improve bti/pac plts. This patch aims to improve the definitions of BTI and PAC based PLTs. The following changes are made: * PLT0 does not need PAC instructions since the PLTGOT[2] (and PLTGOT[1]) are readonly so they cannot be corrupted at runtime. Thus both PAC plt0 and BTI+PAC plt0 are removed and we can use basic plt0 and BTI plt0 instead, respectively. * We can remove the extra padding nops when we add the new bti instructions. BTI plt0 and BTI TLSDESC plt are updated. * For better performance PLTn could be padded to 24bytes. Both BTI pltn and PAC pltn are updated. *** bfd/ChangeLog *** 2019-04-25 Sudakshina Das <sudi.das@arm.com> * elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): Remove. (PLT_BTI_TLSDESC_ENTRY_SIZE): Remove. (PLT_PAC_ENTRY_SIZE, PLT_BTI_PAC_ENTRY_SIZE): Remove. (PLT_BTI_SMALL_ENTRY_SIZE, PLT_PAC_SMALL_ENTRY_SIZE): Update. (elfNN_aarch64_small_plt0_pac_entry): Remove. (elfNN_aarch64_small_plt0_bti_pac_entry): Remove. (elfNN_aarch64_small_plt0_bti_entry): Update. (elfNN_aarch64_small_plt_bti_entry): Update. (elfNN_aarch64_small_plt_pac_entry): Update. (elfNN_aarch64_tlsdesc_small_plt_bti_entry): Update. (setup_plt_values): Setup new entries. (elfNN_aarch64_finish_dynamic_sections): Remove size change. (elfNN_aarch64_plt_sym_val): Likewise. *** ld/ChangeLog *** 2019-04-25 Sudakshina Das <sudi.das@arm.com> * testsuite/ld-aarch64/bti-pac-plt-1.d: Update. * testsuite/ld-aarch64/bti-pac-plt-2.d: Update. * testsuite/ld-aarch64/bti-plt-1.d: Update. * testsuite/ld-aarch64/bti-plt-3.d: Update. * testsuite/ld-aarch64/bti-plt-5.d: Update. * testsuite/ld-aarch64/pac-plt-1.d: Update. * testsuite/ld-aarch64/pac-plt-2.d: Update.
2019-04-25 12:37:25 +02:00
0x1f, 0x20, 0x03, 0xd5, /* nop */
[BFD, LD, AArch64, 2/3] Add --force-bti to enable BTI and to select BTI enabled PLTs This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds a new ld command line option: --force-bti. In the presence of this option, the linker enables BTI with the GNU_PROPERTY_AARCH64_FEATURE_1_BTI feature. This gives out warning in case of missing gnu notes for BTI in inputs. 2) It also defines a new set of BTI enabled PLTs. These are used either when all the inputs are marked with GNU_PROPERTY_AARCH64_FEATURE_1_BTI or when the new --force-bti option is used. This required adding new fields in elf_aarch64_link_hash_table so that we could make the PLT related information more generic. 3) It also defines a dynamic tag DT_AARCH64_BTI_PLT. The linker uses this whenever it picks BTI enabled PLTs. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * bfd-in.h (aarch64_plt_type, aarch64_enable_bti_type): New. (aarch64_bti_pac_info): New. (bfd_elf64_aarch64_set_options): Add aarch64_bti_pac_info argument. (bfd_elf32_aarch64_set_options): Likewise. * bfd-in2.h: Regenerate * elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): New. (PLT_BTI_SMALL_ENTRY_SIZE, PLT_BTI_TLSDESC_ENTRY_SIZE): New. (elfNN_aarch64_small_plt0_bti_entry): New. (elfNN_aarch64_small_plt_bti_entry): New. (elfNN_aarch64_tlsdesc_small_plt_bti_entry): New. (elf_aarch64_obj_tdata): Add no_bti_warn and plt_type fields. (elf_aarch64_link_hash_table): Add plt0_entry, plt_entry and tlsdesc_plt_entry_size fields. (elfNN_aarch64_link_hash_table_create): Initialise the new fields. (setup_plt_values): New helper function. (bfd_elfNN_aarch64_set_options): Use new bp_info to set plt sizes and bti enable type. (elfNN_aarch64_allocate_dynrelocs): Use new size members instead of fixed macros. (elfNN_aarch64_size_dynamic_sections): Likewise and add checks. (elfNN_aarch64_create_small_pltn_entry): Use new generic pointers to plt stubs instead of fixed ones and update filling them according to the need for bti. (elfNN_aarch64_init_small_plt0_entry): Likewise. (elfNN_aarch64_finish_dynamic_sections): Likewise. (get_plt_type, elfNN_aarch64_get_synthetic_symtab): New. (elfNN_aarch64_plt_sym_val): Update size accordingly. (elfNN_aarch64_link_setup_gnu_properties): Set up plts if BTI GNU NOTE is set. (bfd_elfNN_get_synthetic_symtab): Define. (elfNN_aarch64_merge_gnu_properties): Give out warning with --force-bti and mising BTI NOTE SECTION. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * readelf.c (get_aarch64_dynamic_type): New. (get_dynamic_type): Use above for EM_AARCH64. (dynamic_section_aarch64_val): New. (process_dynamic_section): Use above for EM_AARCH64. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * elf/aarch64.h (DT_AARCH64_BTI_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * NEWS: Document --force-bti. * emultempl/aarch64elf.em (plt_type, bti_type, OPTION_FORCE_BTI): New. (PARSE_AND_LIST_SHORTOPTS, PARSE_AND_LIST_OPTIONS): Add force-bti. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FORCE_BTI. * testsuite/ld-aarch64/aarch64-elf.exp: Add all the tests below. * testsuite/ld-aarch64/bti-plt-1.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: New test. * testsuite/ld-aarch64/bti-plt-2.s: New test. * testsuite/ld-aarch64/bti-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-3.d: New test. * testsuite/ld-aarch64/bti-plt-4.d: New test. * testsuite/ld-aarch64/bti-plt-5.d: New test. * testsuite/ld-aarch64/bti-plt-6.d: New test. * testsuite/ld-aarch64/bti-plt-7.d: New test. * testsuite/ld-aarch64/bti-plt-so.s: New test. * testsuite/ld-aarch64/bti-plt.ld: New test.
2019-03-13 11:54:30 +01:00
};
[BFD, LD, AArch64, 3/3] Add --pac-plt to enable PLTs protected with PAC. This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds new definitions of PAC enabled PLTs and both BTI and PAC enabled PLTs. 2) It also defines the new dynamic tag DT_AARCH64_PAC_PLT for the PAC enabled PLTs. 3) This patch adds a new ld command line option: --pac-plt. In the presence of this option, the linker uses the PAC enabled PLTs and marks with DT_AARCH64_PAC_PLT. 4) In case both BTI and PAC are enabled the linker should pick PLTs enabled with both and also use dynamic tags for both. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * elfnn-aarch64.c (PLT_PAC_ENTRY_SIZE, PLT_PAC_SMALL_ENTRY_SIZE): New. (PLT_BTI_PAC_ENTRY_SIZE, PLT_BTI_PAC_SMALL_ENTRY_SIZE): New. (setup_plt_values): Account for PAC or PAC and BTI enabled PLTs. (elfNN_aarch64_size_dynamic_sections): Add checks for PLT_BTI_PAC and PLT_PAC_PLT. (elfNN_aarch64_finish_dynamic_sections): Account for PLT_BTI_PAC. (get_plt_type): Add case for DT_AARCH64_PAC_PLT. (elfNN_aarch64_plt_sym_val): Add cases for PLT_BTI_PAC and PLT_PAC. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * readelf.c (get_aarch64_dynamic_type): Add case for DT_AARCH64_PAC_PLT. (dynamic_section_aarch64_val): Likewise. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * elf/aarch64.h (DT_AARCH64_PAC_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * NEWS: Document --pac-plt. * emultempl/aarch64elf.em (OPTION_PAC_PLT): New. (PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS): Add pac-plt. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_PAC_PLT. * testsuite/ld-aarch64/aarch64-elf.exp: Add the following tests. * testsuite/ld-aarch64/bti-pac-plt-1.d: New test. * testsuite/ld-aarch64/bti-pac-plt-2.d: New test. * testsuite/ld-aarch64/pac-plt-1.d: New test. * testsuite/ld-aarch64/pac-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: Add .ifndef directive.
2019-03-13 12:09:10 +01:00
static const bfd_byte
elfNN_aarch64_small_plt_pac_entry[PLT_PAC_SMALL_ENTRY_SIZE] =
{
0x10, 0x00, 0x00, 0x90, /* adrp x16, PLTGOT + n * 8 */
#if ARCH_SIZE == 64
0x11, 0x02, 0x40, 0xf9, /* ldr x17, [x16, PLTGOT + n * 8] */
0x10, 0x02, 0x00, 0x91, /* add x16, x16, :lo12:PLTGOT + n * 8 */
#else
0x11, 0x02, 0x40, 0xb9, /* ldr w17, [x16, PLTGOT + n * 4] */
0x10, 0x02, 0x00, 0x11, /* add w16, w16, :lo12:PLTGOT + n * 4 */
#endif
0x9f, 0x21, 0x03, 0xd5, /* autia1716 */
0x20, 0x02, 0x1f, 0xd6, /* br x17. */
[BFD, AArch64] Improve bti/pac plts. This patch aims to improve the definitions of BTI and PAC based PLTs. The following changes are made: * PLT0 does not need PAC instructions since the PLTGOT[2] (and PLTGOT[1]) are readonly so they cannot be corrupted at runtime. Thus both PAC plt0 and BTI+PAC plt0 are removed and we can use basic plt0 and BTI plt0 instead, respectively. * We can remove the extra padding nops when we add the new bti instructions. BTI plt0 and BTI TLSDESC plt are updated. * For better performance PLTn could be padded to 24bytes. Both BTI pltn and PAC pltn are updated. *** bfd/ChangeLog *** 2019-04-25 Sudakshina Das <sudi.das@arm.com> * elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): Remove. (PLT_BTI_TLSDESC_ENTRY_SIZE): Remove. (PLT_PAC_ENTRY_SIZE, PLT_BTI_PAC_ENTRY_SIZE): Remove. (PLT_BTI_SMALL_ENTRY_SIZE, PLT_PAC_SMALL_ENTRY_SIZE): Update. (elfNN_aarch64_small_plt0_pac_entry): Remove. (elfNN_aarch64_small_plt0_bti_pac_entry): Remove. (elfNN_aarch64_small_plt0_bti_entry): Update. (elfNN_aarch64_small_plt_bti_entry): Update. (elfNN_aarch64_small_plt_pac_entry): Update. (elfNN_aarch64_tlsdesc_small_plt_bti_entry): Update. (setup_plt_values): Setup new entries. (elfNN_aarch64_finish_dynamic_sections): Remove size change. (elfNN_aarch64_plt_sym_val): Likewise. *** ld/ChangeLog *** 2019-04-25 Sudakshina Das <sudi.das@arm.com> * testsuite/ld-aarch64/bti-pac-plt-1.d: Update. * testsuite/ld-aarch64/bti-pac-plt-2.d: Update. * testsuite/ld-aarch64/bti-plt-1.d: Update. * testsuite/ld-aarch64/bti-plt-3.d: Update. * testsuite/ld-aarch64/bti-plt-5.d: Update. * testsuite/ld-aarch64/pac-plt-1.d: Update. * testsuite/ld-aarch64/pac-plt-2.d: Update.
2019-04-25 12:37:25 +02:00
0x1f, 0x20, 0x03, 0xd5, /* nop */
[BFD, LD, AArch64, 3/3] Add --pac-plt to enable PLTs protected with PAC. This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds new definitions of PAC enabled PLTs and both BTI and PAC enabled PLTs. 2) It also defines the new dynamic tag DT_AARCH64_PAC_PLT for the PAC enabled PLTs. 3) This patch adds a new ld command line option: --pac-plt. In the presence of this option, the linker uses the PAC enabled PLTs and marks with DT_AARCH64_PAC_PLT. 4) In case both BTI and PAC are enabled the linker should pick PLTs enabled with both and also use dynamic tags for both. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * elfnn-aarch64.c (PLT_PAC_ENTRY_SIZE, PLT_PAC_SMALL_ENTRY_SIZE): New. (PLT_BTI_PAC_ENTRY_SIZE, PLT_BTI_PAC_SMALL_ENTRY_SIZE): New. (setup_plt_values): Account for PAC or PAC and BTI enabled PLTs. (elfNN_aarch64_size_dynamic_sections): Add checks for PLT_BTI_PAC and PLT_PAC_PLT. (elfNN_aarch64_finish_dynamic_sections): Account for PLT_BTI_PAC. (get_plt_type): Add case for DT_AARCH64_PAC_PLT. (elfNN_aarch64_plt_sym_val): Add cases for PLT_BTI_PAC and PLT_PAC. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * readelf.c (get_aarch64_dynamic_type): Add case for DT_AARCH64_PAC_PLT. (dynamic_section_aarch64_val): Likewise. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * elf/aarch64.h (DT_AARCH64_PAC_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * NEWS: Document --pac-plt. * emultempl/aarch64elf.em (OPTION_PAC_PLT): New. (PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS): Add pac-plt. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_PAC_PLT. * testsuite/ld-aarch64/aarch64-elf.exp: Add the following tests. * testsuite/ld-aarch64/bti-pac-plt-1.d: New test. * testsuite/ld-aarch64/bti-pac-plt-2.d: New test. * testsuite/ld-aarch64/pac-plt-1.d: New test. * testsuite/ld-aarch64/pac-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: Add .ifndef directive.
2019-03-13 12:09:10 +01:00
};
static const bfd_byte
elfNN_aarch64_small_plt_bti_pac_entry[PLT_BTI_PAC_SMALL_ENTRY_SIZE] =
{
0x5f, 0x24, 0x03, 0xd5, /* bti c. */
0x10, 0x00, 0x00, 0x90, /* adrp x16, PLTGOT + n * 8 */
#if ARCH_SIZE == 64
0x11, 0x02, 0x40, 0xf9, /* ldr x17, [x16, PLTGOT + n * 8] */
0x10, 0x02, 0x00, 0x91, /* add x16, x16, :lo12:PLTGOT + n * 8 */
#else
0x11, 0x02, 0x40, 0xb9, /* ldr w17, [x16, PLTGOT + n * 4] */
0x10, 0x02, 0x00, 0x11, /* add w16, w16, :lo12:PLTGOT + n * 4 */
#endif
0x9f, 0x21, 0x03, 0xd5, /* autia1716 */
0x20, 0x02, 0x1f, 0xd6, /* br x17. */
};
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
static const bfd_byte
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_tlsdesc_small_plt_entry[PLT_TLSDESC_ENTRY_SIZE] =
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
0xe2, 0x0f, 0xbf, 0xa9, /* stp x2, x3, [sp, #-16]! */
0x02, 0x00, 0x00, 0x90, /* adrp x2, 0 */
0x03, 0x00, 0x00, 0x90, /* adrp x3, 0 */
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
#if ARCH_SIZE == 64
0x42, 0x00, 0x40, 0xf9, /* ldr x2, [x2, #0] */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
0x63, 0x00, 0x00, 0x91, /* add x3, x3, 0 */
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
#else
0x42, 0x00, 0x40, 0xb9, /* ldr w2, [x2, #0] */
0x63, 0x00, 0x00, 0x11, /* add w3, w3, 0 */
#endif
0x40, 0x00, 0x1f, 0xd6, /* br x2 */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
0x1f, 0x20, 0x03, 0xd5, /* nop */
0x1f, 0x20, 0x03, 0xd5, /* nop */
};
[BFD, LD, AArch64, 2/3] Add --force-bti to enable BTI and to select BTI enabled PLTs This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds a new ld command line option: --force-bti. In the presence of this option, the linker enables BTI with the GNU_PROPERTY_AARCH64_FEATURE_1_BTI feature. This gives out warning in case of missing gnu notes for BTI in inputs. 2) It also defines a new set of BTI enabled PLTs. These are used either when all the inputs are marked with GNU_PROPERTY_AARCH64_FEATURE_1_BTI or when the new --force-bti option is used. This required adding new fields in elf_aarch64_link_hash_table so that we could make the PLT related information more generic. 3) It also defines a dynamic tag DT_AARCH64_BTI_PLT. The linker uses this whenever it picks BTI enabled PLTs. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * bfd-in.h (aarch64_plt_type, aarch64_enable_bti_type): New. (aarch64_bti_pac_info): New. (bfd_elf64_aarch64_set_options): Add aarch64_bti_pac_info argument. (bfd_elf32_aarch64_set_options): Likewise. * bfd-in2.h: Regenerate * elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): New. (PLT_BTI_SMALL_ENTRY_SIZE, PLT_BTI_TLSDESC_ENTRY_SIZE): New. (elfNN_aarch64_small_plt0_bti_entry): New. (elfNN_aarch64_small_plt_bti_entry): New. (elfNN_aarch64_tlsdesc_small_plt_bti_entry): New. (elf_aarch64_obj_tdata): Add no_bti_warn and plt_type fields. (elf_aarch64_link_hash_table): Add plt0_entry, plt_entry and tlsdesc_plt_entry_size fields. (elfNN_aarch64_link_hash_table_create): Initialise the new fields. (setup_plt_values): New helper function. (bfd_elfNN_aarch64_set_options): Use new bp_info to set plt sizes and bti enable type. (elfNN_aarch64_allocate_dynrelocs): Use new size members instead of fixed macros. (elfNN_aarch64_size_dynamic_sections): Likewise and add checks. (elfNN_aarch64_create_small_pltn_entry): Use new generic pointers to plt stubs instead of fixed ones and update filling them according to the need for bti. (elfNN_aarch64_init_small_plt0_entry): Likewise. (elfNN_aarch64_finish_dynamic_sections): Likewise. (get_plt_type, elfNN_aarch64_get_synthetic_symtab): New. (elfNN_aarch64_plt_sym_val): Update size accordingly. (elfNN_aarch64_link_setup_gnu_properties): Set up plts if BTI GNU NOTE is set. (bfd_elfNN_get_synthetic_symtab): Define. (elfNN_aarch64_merge_gnu_properties): Give out warning with --force-bti and mising BTI NOTE SECTION. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * readelf.c (get_aarch64_dynamic_type): New. (get_dynamic_type): Use above for EM_AARCH64. (dynamic_section_aarch64_val): New. (process_dynamic_section): Use above for EM_AARCH64. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * elf/aarch64.h (DT_AARCH64_BTI_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * NEWS: Document --force-bti. * emultempl/aarch64elf.em (plt_type, bti_type, OPTION_FORCE_BTI): New. (PARSE_AND_LIST_SHORTOPTS, PARSE_AND_LIST_OPTIONS): Add force-bti. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FORCE_BTI. * testsuite/ld-aarch64/aarch64-elf.exp: Add all the tests below. * testsuite/ld-aarch64/bti-plt-1.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: New test. * testsuite/ld-aarch64/bti-plt-2.s: New test. * testsuite/ld-aarch64/bti-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-3.d: New test. * testsuite/ld-aarch64/bti-plt-4.d: New test. * testsuite/ld-aarch64/bti-plt-5.d: New test. * testsuite/ld-aarch64/bti-plt-6.d: New test. * testsuite/ld-aarch64/bti-plt-7.d: New test. * testsuite/ld-aarch64/bti-plt-so.s: New test. * testsuite/ld-aarch64/bti-plt.ld: New test.
2019-03-13 11:54:30 +01:00
static const bfd_byte
[BFD, AArch64] Improve bti/pac plts. This patch aims to improve the definitions of BTI and PAC based PLTs. The following changes are made: * PLT0 does not need PAC instructions since the PLTGOT[2] (and PLTGOT[1]) are readonly so they cannot be corrupted at runtime. Thus both PAC plt0 and BTI+PAC plt0 are removed and we can use basic plt0 and BTI plt0 instead, respectively. * We can remove the extra padding nops when we add the new bti instructions. BTI plt0 and BTI TLSDESC plt are updated. * For better performance PLTn could be padded to 24bytes. Both BTI pltn and PAC pltn are updated. *** bfd/ChangeLog *** 2019-04-25 Sudakshina Das <sudi.das@arm.com> * elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): Remove. (PLT_BTI_TLSDESC_ENTRY_SIZE): Remove. (PLT_PAC_ENTRY_SIZE, PLT_BTI_PAC_ENTRY_SIZE): Remove. (PLT_BTI_SMALL_ENTRY_SIZE, PLT_PAC_SMALL_ENTRY_SIZE): Update. (elfNN_aarch64_small_plt0_pac_entry): Remove. (elfNN_aarch64_small_plt0_bti_pac_entry): Remove. (elfNN_aarch64_small_plt0_bti_entry): Update. (elfNN_aarch64_small_plt_bti_entry): Update. (elfNN_aarch64_small_plt_pac_entry): Update. (elfNN_aarch64_tlsdesc_small_plt_bti_entry): Update. (setup_plt_values): Setup new entries. (elfNN_aarch64_finish_dynamic_sections): Remove size change. (elfNN_aarch64_plt_sym_val): Likewise. *** ld/ChangeLog *** 2019-04-25 Sudakshina Das <sudi.das@arm.com> * testsuite/ld-aarch64/bti-pac-plt-1.d: Update. * testsuite/ld-aarch64/bti-pac-plt-2.d: Update. * testsuite/ld-aarch64/bti-plt-1.d: Update. * testsuite/ld-aarch64/bti-plt-3.d: Update. * testsuite/ld-aarch64/bti-plt-5.d: Update. * testsuite/ld-aarch64/pac-plt-1.d: Update. * testsuite/ld-aarch64/pac-plt-2.d: Update.
2019-04-25 12:37:25 +02:00
elfNN_aarch64_tlsdesc_small_plt_bti_entry[PLT_TLSDESC_ENTRY_SIZE] =
[BFD, LD, AArch64, 2/3] Add --force-bti to enable BTI and to select BTI enabled PLTs This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds a new ld command line option: --force-bti. In the presence of this option, the linker enables BTI with the GNU_PROPERTY_AARCH64_FEATURE_1_BTI feature. This gives out warning in case of missing gnu notes for BTI in inputs. 2) It also defines a new set of BTI enabled PLTs. These are used either when all the inputs are marked with GNU_PROPERTY_AARCH64_FEATURE_1_BTI or when the new --force-bti option is used. This required adding new fields in elf_aarch64_link_hash_table so that we could make the PLT related information more generic. 3) It also defines a dynamic tag DT_AARCH64_BTI_PLT. The linker uses this whenever it picks BTI enabled PLTs. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * bfd-in.h (aarch64_plt_type, aarch64_enable_bti_type): New. (aarch64_bti_pac_info): New. (bfd_elf64_aarch64_set_options): Add aarch64_bti_pac_info argument. (bfd_elf32_aarch64_set_options): Likewise. * bfd-in2.h: Regenerate * elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): New. (PLT_BTI_SMALL_ENTRY_SIZE, PLT_BTI_TLSDESC_ENTRY_SIZE): New. (elfNN_aarch64_small_plt0_bti_entry): New. (elfNN_aarch64_small_plt_bti_entry): New. (elfNN_aarch64_tlsdesc_small_plt_bti_entry): New. (elf_aarch64_obj_tdata): Add no_bti_warn and plt_type fields. (elf_aarch64_link_hash_table): Add plt0_entry, plt_entry and tlsdesc_plt_entry_size fields. (elfNN_aarch64_link_hash_table_create): Initialise the new fields. (setup_plt_values): New helper function. (bfd_elfNN_aarch64_set_options): Use new bp_info to set plt sizes and bti enable type. (elfNN_aarch64_allocate_dynrelocs): Use new size members instead of fixed macros. (elfNN_aarch64_size_dynamic_sections): Likewise and add checks. (elfNN_aarch64_create_small_pltn_entry): Use new generic pointers to plt stubs instead of fixed ones and update filling them according to the need for bti. (elfNN_aarch64_init_small_plt0_entry): Likewise. (elfNN_aarch64_finish_dynamic_sections): Likewise. (get_plt_type, elfNN_aarch64_get_synthetic_symtab): New. (elfNN_aarch64_plt_sym_val): Update size accordingly. (elfNN_aarch64_link_setup_gnu_properties): Set up plts if BTI GNU NOTE is set. (bfd_elfNN_get_synthetic_symtab): Define. (elfNN_aarch64_merge_gnu_properties): Give out warning with --force-bti and mising BTI NOTE SECTION. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * readelf.c (get_aarch64_dynamic_type): New. (get_dynamic_type): Use above for EM_AARCH64. (dynamic_section_aarch64_val): New. (process_dynamic_section): Use above for EM_AARCH64. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * elf/aarch64.h (DT_AARCH64_BTI_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * NEWS: Document --force-bti. * emultempl/aarch64elf.em (plt_type, bti_type, OPTION_FORCE_BTI): New. (PARSE_AND_LIST_SHORTOPTS, PARSE_AND_LIST_OPTIONS): Add force-bti. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FORCE_BTI. * testsuite/ld-aarch64/aarch64-elf.exp: Add all the tests below. * testsuite/ld-aarch64/bti-plt-1.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: New test. * testsuite/ld-aarch64/bti-plt-2.s: New test. * testsuite/ld-aarch64/bti-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-3.d: New test. * testsuite/ld-aarch64/bti-plt-4.d: New test. * testsuite/ld-aarch64/bti-plt-5.d: New test. * testsuite/ld-aarch64/bti-plt-6.d: New test. * testsuite/ld-aarch64/bti-plt-7.d: New test. * testsuite/ld-aarch64/bti-plt-so.s: New test. * testsuite/ld-aarch64/bti-plt.ld: New test.
2019-03-13 11:54:30 +01:00
{
0x5f, 0x24, 0x03, 0xd5, /* bti c. */
0xe2, 0x0f, 0xbf, 0xa9, /* stp x2, x3, [sp, #-16]! */
0x02, 0x00, 0x00, 0x90, /* adrp x2, 0 */
0x03, 0x00, 0x00, 0x90, /* adrp x3, 0 */
#if ARCH_SIZE == 64
0x42, 0x00, 0x40, 0xf9, /* ldr x2, [x2, #0] */
0x63, 0x00, 0x00, 0x91, /* add x3, x3, 0 */
#else
0x42, 0x00, 0x40, 0xb9, /* ldr w2, [x2, #0] */
0x63, 0x00, 0x00, 0x11, /* add w3, w3, 0 */
#endif
0x40, 0x00, 0x1f, 0xd6, /* br x2 */
0x1f, 0x20, 0x03, 0xd5, /* nop */
};
BFD whitespace fixes Binutils is supposed to use tabs. In my git config I have whitespace = indent-with-non-tab,space-before-tab,trailing-space and I got annoyed enough seeing red in "git diff" output to fix the problems. * doc/header.sed: Trim trailing space when splitting lines. * aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-cris.c, * aout-ns32k.c, * aout-target.h, * aout-tic30.c, * aoutf1.h, * aoutx.h, * arc-got.h, * arc-plt.def, * arc-plt.h, * archive.c, * archive64.c, * archures.c, * armnetbsd.c, * bfd-in.h, * bfd.c, * bfdio.c, * binary.c, * bout.c, * cache.c, * cisco-core.c, * coff-alpha.c, * coff-apollo.c, * coff-arm.c, * coff-h8300.c, * coff-i386.c, * coff-i860.c, * coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mcore.c, * coff-mips.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-stgo32.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * compress.c, * corefile.c, * cpu-alpha.c, * cpu-arm.c, * cpu-avr.c, * cpu-bfin.c, * cpu-cr16.c, * cpu-cr16c.c, * cpu-crx.c, * cpu-d10v.c, * cpu-frv.c, * cpu-ft32.c, * cpu-i370.c, * cpu-i960.c, * cpu-ia64-opc.c, * cpu-ip2k.c, * cpu-lm32.c, * cpu-m32r.c, * cpu-mcore.c, * cpu-microblaze.c, * cpu-mips.c, * cpu-moxie.c, * cpu-mt.c, * cpu-nios2.c, * cpu-ns32k.c, * cpu-or1k.c, * cpu-powerpc.c, * cpu-pru.c, * cpu-sh.c, * cpu-spu.c, * cpu-v850.c, * cpu-v850_rh850.c, * cpu-xgate.c, * cpu-z80.c, * dwarf1.c, * dwarf2.c, * ecoff.c, * ecofflink.c, * ecoffswap.h, * elf-bfd.h, * elf-eh-frame.c, * elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf-s390-common.c, * elf-strtab.c, * elf-vxworks.c, * elf.c, * elf32-am33lin.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-avr.h, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-i860.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68hc1x.c, * elf32-m68hc1x.h, * elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nds32.h, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score.h, * elf32-score7.c, * elf32-sh-symbian.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilegx.c, * elf32-tilegx.h, * elf32-tilepro.c, * elf32-tilepro.h, * elf32-v850.c, * elf32-vax.c, * elf32-wasm32.c, * elf32-xc16x.c, * elf32-xgate.c, * elf32-xgate.h, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-tilegx.c, * elf64-tilegx.h, * elf64-x86-64.c, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-aarch64.h, * elfxx-ia64.c, * elfxx-ia64.h, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * elfxx-x86.h, * freebsd.h, * hash.c, * host-aout.c, * hp300hpux.c, * hppabsd-core.c, * hpux-core.c, * i386aout.c, * i386linux.c, * i386lynx.c, * i386mach3.c, * i386msdos.c, * i386netbsd.c, * ieee.c, * ihex.c, * irix-core.c, * libaout.h, * libbfd-in.h, * libbfd.c, * libcoff-in.h, * libnlm.h, * libpei.h, * libxcoff.h, * linker.c, * lynx-core.c, * m68k4knetbsd.c, * m68klinux.c, * m68knetbsd.c, * m88kmach3.c, * mach-o-aarch64.c, * mach-o-arm.c, * mach-o-i386.c, * mach-o-target.c, * mach-o-x86-64.c, * mach-o.c, * mach-o.h, * merge.c, * mipsbsd.c, * mmo.c, * netbsd.h, * netbsd-core.c, * newsos3.c, * nlm-target.h, * nlm32-ppc.c, * nlm32-sparc.c, * nlmcode.h, * ns32k.h, * ns32knetbsd.c, * oasys.c, * opncls.c, * pc532-mach.c, * pdp11.c, * pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-mips.c, * pe-x86_64.c, * peXXigen.c, * pef.c, * pef.h, * pei-arm.c, * pei-i386.c, * pei-mcore.c, * pei-x86_64.c, * peicode.h, * plugin.c, * ppcboot.c, * ptrace-core.c, * reloc.c, * riscix.c, * rs6000-core.c, * section.c, * som.c, * som.h, * sparclinux.c, * sparcnetbsd.c, * srec.c, * stabs.c, * sunos.c, * syms.c, * targets.c, * tekhex.c, * trad-core.c, * vax1knetbsd.c, * vaxnetbsd.c, * verilog.c, * versados.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * wasm-module.c, * wasm-module.h, * xcofflink.c, * xsym.c, * xsym.h: Whitespace fixes. * bfd-in2.h, * libbfd.h, * libcoff.h: Regenerate.
2017-12-05 23:56:00 +01:00
#define elf_info_to_howto elfNN_aarch64_info_to_howto
#define elf_info_to_howto_rel elfNN_aarch64_info_to_howto
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
#define AARCH64_ELF_ABI_VERSION 0
/* In case we're on a 32-bit machine, construct a 64-bit "-1" value. */
#define ALL_ONES (~ (bfd_vma) 0)
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
/* Indexed by the bfd interal reloc enumerators.
Therefore, the table needs to be synced with BFD_RELOC_AARCH64_*
in reloc.c. */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
static reloc_howto_type elfNN_aarch64_howto_table[] =
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
EMPTY_HOWTO (0),
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
/* Basic data relocations. */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
Enable R_AARCH64_NONE for 64-bit code. * elfnn-aarch64.c: Unconditionally enable R_AARCH64_NULL and R_AARCH64_NONE. Use HOWTO64 for R_AARCH64_NULL. * relocs.c: Add BFD_RELOC_AARCH64_NULL. * bfd-in2.h: Regenerate. * libbfd.h: Likewise.
2016-05-24 01:38:21 +02:00
/* Deprecated, but retained for backwards compatibility. */
HOWTO64 (R_AARCH64_NULL, /* type */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
0, /* rightshift */
Fallout from recent bfd_reloc_outofrange changes Commit ec93045b and cd21f5da introduced a large number of tic4x and tic54x regressions, due to the new checks being wrong for targets with octets_per_byte != 1. To fix that I introduced a new bfd_get_section_limit_octets and performed the check on octets rather than byte adresses, reducing the number of bfd_octets_per_byte calls. bfd_octets_per_byte is rather expensive.. I then wondered why the same bfd_reloc_outofrange check added to bfd_perform_relocation wasn't also added to bfd_install_relocation. The two functions are virtually identical and ought to remain that way. However, adding the same check to bfd_install_relocation resulted in ld-elf "FAIL Link eh-group.o to eh-group" on many ELF targets, including x64_64-linux. The reason being that eh-group.o has NONE relocs at the end of a section, and most targets give NONE relocs a non-zero size. So if we are to keep the new outofrange check it appears that NONE relocs must have a zero size. * bfd-in.h (bfd_get_section_limit_octets): New define, extracted from.. (bfd_get_section_limit): ..here. * reloc.c (bfd_perform_relocation): Correct bfd_reloc_outofrange check. (bfd_install_relocation, _bfd_final_link_relocate): Add same check here. * elf32-sh.c (sh_elf_reloc): Correct bfd_reloc_outofrange check. * elf32-ppc.c (ppc_elf_addr16_ha_reloc): Remove duplicated bfd_reloc_outofrange check. * bfd-in2.h: Regenerate. * cpu-ns32k.c (_bfd_do_ns32k_reloc_contents): Return bfd_reloc_ok on zero size relocs. * ecoff.c (ecoff_reloc_link_order): Likewise. * elf32-nds32.c (nds32_relocate_contents): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. * reloc.c (_bfd_relocate_contents): Don't bomb on zero size relocs. (_bfd_clear_contents): Likewise. * elfxx-mips.c (mips_elf_obtain_contents): Likewise. (mips_elf_perform_relocation): Likewise. * aoutx.h (aout_link_reloc_link_order): Allow for NULL return from malloc on zero size alloc. * cofflink.c (_bfd_coff_reloc_link_order): Likewise. * elflink.c (elf_reloc_link_order): Likewise. * linker.c (_bfd_generic_reloc_link_order): Likewise. * pdp11.c (aout_link_reloc_link_order): Likewise. * xcofflink.c (xcoff_reloc_link_order): Likewise. * aoutx.h (howto_table_ext): Ensure NONE relocs have size 3, bitsize 0, and complain_overflow_dont. * coff-sparc.c (coff_sparc_howto_table): Likewise. * elf-hppa.h (elf_hppa_howto_table): Likewise. * elf-m10200.c (elf_mn10200_howto_table): Likewise. * elf-m10300.c (elf_mn10300_howto_table): Likewise. * elf32-arc.c (elf_arc_howto_table): Likewise. * elf32-arm.c (elf32_arm_howto_table_1): Likewise. * elf32-avr.c (elf_avr_howto_table): Likewise. * elf32-bfin.c (bfin_howto_table): Likewise. * elf32-cr16.c (cr16_elf_howto_table): Likewise. * elf32-cris.c (cris_elf_howto_table): Likewise. * elf32-crx.c (crx_elf_howto_table): Likewise. * elf32-d10v.c (elf_d10v_howto_table): Likewise. * elf32-d30v.c (elf_d30v_howto_table): Likewise. * elf32-dlx.c (dlx_elf_howto_table): Likewise. * elf32-epiphany.c (epiphany_elf_howto_table): Likewise. * elf32-fr30.c (fr30_elf_howto_table): Likewise. * elf32-frv.c (elf32_frv_howto_table): Likewise. * elf32-h8300.c (h8_elf_howto_table): Likewise. * elf32-i370.c (i370_elf_howto_raw): Likewise. * elf32-i386.c (elf_howto_table): Likewise. * elf32-i860.c (elf32_i860_howto_table): Likewise. * elf32-i960.c (elf32_i960_relocate): Likewise. * elf32-ip2k.c (ip2k_elf_howto_table): Likewise. * elf32-iq2000.c (iq2000_elf_howto_table): Likewise. * elf32-lm32.c (lm32_elf_howto_table): Likewise. * elf32-m32c.c (m32c_elf_howto_table): Likewise. * elf32-m32r.c (m32r_elf_howto_table): Likewise. * elf32-m68hc11.c (elf_m68hc11_howto_table): Likewise. * elf32-m68hc12.c (elf_m68hc11_howto_table): Likewise. * elf32-m68k.c (howto_table): Likewise. * elf32-mcore.c (mcore_elf_howto_raw): Likewise. * elf32-mep.c (mep_elf_howto_table): Likewise. * elf32-metag.c (elf_metag_howto_table): Likewise. * elf32-microblaze.c (microblaze_elf_howto_raw): Likewise. * elf32-mips.c (elf_mips_howto_table_rel): Likewise. * elf32-moxie.c (moxie_elf_howto_table): Likewise. * elf32-msp430.c (elf_msp430_howto_table): Likewise. * elf32-mt.c (mt_elf_howto_table): Likewise. * elf32-nds32.c (nds32_elf_howto_table): Likewise. * elf32-nios2.c (elf_nios2_howto_table_rel): Likewise. * elf32-or1k.c (or1k_elf_howto_table): Likewise. * elf32-pj.c (pj_elf_howto_table): Likewise. * elf32-ppc.c (ppc_elf_howto_raw): Likewise. * elf32-rl78.c (rl78_elf_howto_table): Likewise. * elf32-rx.c (rx_elf_howto_table): Likewise. * elf32-s390.c (elf_howto_table): Likewise. * elf32-score.c (elf32_score_howto_table): Likewise. * elf32-score7.c (elf32_score_howto_table): Likewise. * elf32-sh-relocs.h (R_SH_NONE): Likewise. * elf32-spu.c (elf_howto_table): Likewise. * elf32-tic6x.c (elf32_tic6x_howto_table): Likewise. * elf32-tilepro.c (tilepro_elf_howto_table): Likewise. * elf32-v850.c (v850_elf_howto_table): Likewise. * elf32-vax.c (howto_table): Likewise. * elf32-visium.c (visium_elf_howto_table): Likewise. * elf32-xc16x.c (xc16x_elf_howto_table): Likewise. * elf32-xgate.c (elf_xgate_howto_table): Likewise. * elf32-xstormy16.c (xstormy16_elf_howto_table): Likewise. * elf32-xtensa.c (elf_howto_table): Likewise. * elf64-alpha.c (elf64_alpha_howto_table): Likewise. * elf64-mips.c (mips_elf64_howto_table_rel): Likewise. * elf64-mmix.c (elf_mmix_howto_table): Likewise. * elf64-ppc.c (ppc64_elf_howto_raw): Likewise. * elf64-s390.c (elf_howto_table): Likewise. * elf64-sh64.c (sh_elf64_howto_table): Likewise. * elf64-x86-64.c (x86_64_elf_howto_table): Likewise. * elfn32-mips.c (elf_mips_howto_table_rel): Likewise. * elfnn-aarch64.c (elfNN_aarch64_howto_table): Likewise. (elfNN_aarch64_howto_none): Likewise. * elfxx-ia64.c (ia64_howto_table): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_howto_table): Likewise. * elfxx-tilegx.c (tilegx_elf_howto_table): Likewise. * nlm32-sparc.c (nlm32_sparc_howto_table): Likewise.
2015-01-19 01:06:26 +01:00
3, /* size (0 = byte, 1 = short, 2 = long) */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
0, /* bitsize */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
"R_AARCH64_NULL", /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
0, /* src_mask */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
0, /* dst_mask */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE), /* pcrel_offset */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
HOWTO (R_AARCH64_NONE, /* type */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
0, /* rightshift */
Fallout from recent bfd_reloc_outofrange changes Commit ec93045b and cd21f5da introduced a large number of tic4x and tic54x regressions, due to the new checks being wrong for targets with octets_per_byte != 1. To fix that I introduced a new bfd_get_section_limit_octets and performed the check on octets rather than byte adresses, reducing the number of bfd_octets_per_byte calls. bfd_octets_per_byte is rather expensive.. I then wondered why the same bfd_reloc_outofrange check added to bfd_perform_relocation wasn't also added to bfd_install_relocation. The two functions are virtually identical and ought to remain that way. However, adding the same check to bfd_install_relocation resulted in ld-elf "FAIL Link eh-group.o to eh-group" on many ELF targets, including x64_64-linux. The reason being that eh-group.o has NONE relocs at the end of a section, and most targets give NONE relocs a non-zero size. So if we are to keep the new outofrange check it appears that NONE relocs must have a zero size. * bfd-in.h (bfd_get_section_limit_octets): New define, extracted from.. (bfd_get_section_limit): ..here. * reloc.c (bfd_perform_relocation): Correct bfd_reloc_outofrange check. (bfd_install_relocation, _bfd_final_link_relocate): Add same check here. * elf32-sh.c (sh_elf_reloc): Correct bfd_reloc_outofrange check. * elf32-ppc.c (ppc_elf_addr16_ha_reloc): Remove duplicated bfd_reloc_outofrange check. * bfd-in2.h: Regenerate. * cpu-ns32k.c (_bfd_do_ns32k_reloc_contents): Return bfd_reloc_ok on zero size relocs. * ecoff.c (ecoff_reloc_link_order): Likewise. * elf32-nds32.c (nds32_relocate_contents): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. * reloc.c (_bfd_relocate_contents): Don't bomb on zero size relocs. (_bfd_clear_contents): Likewise. * elfxx-mips.c (mips_elf_obtain_contents): Likewise. (mips_elf_perform_relocation): Likewise. * aoutx.h (aout_link_reloc_link_order): Allow for NULL return from malloc on zero size alloc. * cofflink.c (_bfd_coff_reloc_link_order): Likewise. * elflink.c (elf_reloc_link_order): Likewise. * linker.c (_bfd_generic_reloc_link_order): Likewise. * pdp11.c (aout_link_reloc_link_order): Likewise. * xcofflink.c (xcoff_reloc_link_order): Likewise. * aoutx.h (howto_table_ext): Ensure NONE relocs have size 3, bitsize 0, and complain_overflow_dont. * coff-sparc.c (coff_sparc_howto_table): Likewise. * elf-hppa.h (elf_hppa_howto_table): Likewise. * elf-m10200.c (elf_mn10200_howto_table): Likewise. * elf-m10300.c (elf_mn10300_howto_table): Likewise. * elf32-arc.c (elf_arc_howto_table): Likewise. * elf32-arm.c (elf32_arm_howto_table_1): Likewise. * elf32-avr.c (elf_avr_howto_table): Likewise. * elf32-bfin.c (bfin_howto_table): Likewise. * elf32-cr16.c (cr16_elf_howto_table): Likewise. * elf32-cris.c (cris_elf_howto_table): Likewise. * elf32-crx.c (crx_elf_howto_table): Likewise. * elf32-d10v.c (elf_d10v_howto_table): Likewise. * elf32-d30v.c (elf_d30v_howto_table): Likewise. * elf32-dlx.c (dlx_elf_howto_table): Likewise. * elf32-epiphany.c (epiphany_elf_howto_table): Likewise. * elf32-fr30.c (fr30_elf_howto_table): Likewise. * elf32-frv.c (elf32_frv_howto_table): Likewise. * elf32-h8300.c (h8_elf_howto_table): Likewise. * elf32-i370.c (i370_elf_howto_raw): Likewise. * elf32-i386.c (elf_howto_table): Likewise. * elf32-i860.c (elf32_i860_howto_table): Likewise. * elf32-i960.c (elf32_i960_relocate): Likewise. * elf32-ip2k.c (ip2k_elf_howto_table): Likewise. * elf32-iq2000.c (iq2000_elf_howto_table): Likewise. * elf32-lm32.c (lm32_elf_howto_table): Likewise. * elf32-m32c.c (m32c_elf_howto_table): Likewise. * elf32-m32r.c (m32r_elf_howto_table): Likewise. * elf32-m68hc11.c (elf_m68hc11_howto_table): Likewise. * elf32-m68hc12.c (elf_m68hc11_howto_table): Likewise. * elf32-m68k.c (howto_table): Likewise. * elf32-mcore.c (mcore_elf_howto_raw): Likewise. * elf32-mep.c (mep_elf_howto_table): Likewise. * elf32-metag.c (elf_metag_howto_table): Likewise. * elf32-microblaze.c (microblaze_elf_howto_raw): Likewise. * elf32-mips.c (elf_mips_howto_table_rel): Likewise. * elf32-moxie.c (moxie_elf_howto_table): Likewise. * elf32-msp430.c (elf_msp430_howto_table): Likewise. * elf32-mt.c (mt_elf_howto_table): Likewise. * elf32-nds32.c (nds32_elf_howto_table): Likewise. * elf32-nios2.c (elf_nios2_howto_table_rel): Likewise. * elf32-or1k.c (or1k_elf_howto_table): Likewise. * elf32-pj.c (pj_elf_howto_table): Likewise. * elf32-ppc.c (ppc_elf_howto_raw): Likewise. * elf32-rl78.c (rl78_elf_howto_table): Likewise. * elf32-rx.c (rx_elf_howto_table): Likewise. * elf32-s390.c (elf_howto_table): Likewise. * elf32-score.c (elf32_score_howto_table): Likewise. * elf32-score7.c (elf32_score_howto_table): Likewise. * elf32-sh-relocs.h (R_SH_NONE): Likewise. * elf32-spu.c (elf_howto_table): Likewise. * elf32-tic6x.c (elf32_tic6x_howto_table): Likewise. * elf32-tilepro.c (tilepro_elf_howto_table): Likewise. * elf32-v850.c (v850_elf_howto_table): Likewise. * elf32-vax.c (howto_table): Likewise. * elf32-visium.c (visium_elf_howto_table): Likewise. * elf32-xc16x.c (xc16x_elf_howto_table): Likewise. * elf32-xgate.c (elf_xgate_howto_table): Likewise. * elf32-xstormy16.c (xstormy16_elf_howto_table): Likewise. * elf32-xtensa.c (elf_howto_table): Likewise. * elf64-alpha.c (elf64_alpha_howto_table): Likewise. * elf64-mips.c (mips_elf64_howto_table_rel): Likewise. * elf64-mmix.c (elf_mmix_howto_table): Likewise. * elf64-ppc.c (ppc64_elf_howto_raw): Likewise. * elf64-s390.c (elf_howto_table): Likewise. * elf64-sh64.c (sh_elf64_howto_table): Likewise. * elf64-x86-64.c (x86_64_elf_howto_table): Likewise. * elfn32-mips.c (elf_mips_howto_table_rel): Likewise. * elfnn-aarch64.c (elfNN_aarch64_howto_table): Likewise. (elfNN_aarch64_howto_none): Likewise. * elfxx-ia64.c (ia64_howto_table): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_howto_table): Likewise. * elfxx-tilegx.c (tilegx_elf_howto_table): Likewise. * nlm32-sparc.c (nlm32_sparc_howto_table): Likewise.
2015-01-19 01:06:26 +01:00
3, /* size (0 = byte, 1 = short, 2 = long) */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
0, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
"R_AARCH64_NONE", /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
0, /* src_mask */
0, /* dst_mask */
FALSE), /* pcrel_offset */
/* .xword: (S+A) */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
HOWTO64 (AARCH64_R (ABS64), /* type */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
0, /* rightshift */
4, /* size (4 = long long) */
64, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_unsigned, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (ABS64), /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
ALL_ONES, /* src_mask */
ALL_ONES, /* dst_mask */
FALSE), /* pcrel_offset */
/* .word: (S+A) */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
HOWTO (AARCH64_R (ABS32), /* type */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
32, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_unsigned, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (ABS32), /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
0xffffffff, /* src_mask */
0xffffffff, /* dst_mask */
FALSE), /* pcrel_offset */
/* .half: (S+A) */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
HOWTO (AARCH64_R (ABS16), /* type */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
0, /* rightshift */
1, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_unsigned, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (ABS16), /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
/* .xword: (S+A-P) */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
HOWTO64 (AARCH64_R (PREL64), /* type */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
0, /* rightshift */
4, /* size (4 = long long) */
64, /* bitsize */
TRUE, /* pc_relative */
0, /* bitpos */
complain_overflow_signed, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (PREL64), /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
ALL_ONES, /* src_mask */
ALL_ONES, /* dst_mask */
TRUE), /* pcrel_offset */
/* .word: (S+A-P) */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
HOWTO (AARCH64_R (PREL32), /* type */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
32, /* bitsize */
TRUE, /* pc_relative */
0, /* bitpos */
complain_overflow_signed, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (PREL32), /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
0xffffffff, /* src_mask */
0xffffffff, /* dst_mask */
TRUE), /* pcrel_offset */
/* .half: (S+A-P) */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
HOWTO (AARCH64_R (PREL16), /* type */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
0, /* rightshift */
1, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
TRUE, /* pc_relative */
0, /* bitpos */
complain_overflow_signed, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (PREL16), /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
0xffff, /* src_mask */
0xffff, /* dst_mask */
TRUE), /* pcrel_offset */
/* Group relocations to create a 16, 32, 48 or 64 bit
unsigned data or abs address inline. */
/* MOVZ: ((S+A) >> 0) & 0xffff */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
HOWTO (AARCH64_R (MOVW_UABS_G0), /* type */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_unsigned, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (MOVW_UABS_G0), /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
/* MOVK: ((S+A) >> 0) & 0xffff [no overflow check] */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
HOWTO (AARCH64_R (MOVW_UABS_G0_NC), /* type */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (MOVW_UABS_G0_NC), /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
/* MOVZ: ((S+A) >> 16) & 0xffff */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
HOWTO (AARCH64_R (MOVW_UABS_G1), /* type */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
16, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_unsigned, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (MOVW_UABS_G1), /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
/* MOVK: ((S+A) >> 16) & 0xffff [no overflow check] */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
HOWTO64 (AARCH64_R (MOVW_UABS_G1_NC), /* type */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
16, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (MOVW_UABS_G1_NC), /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
/* MOVZ: ((S+A) >> 32) & 0xffff */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
HOWTO64 (AARCH64_R (MOVW_UABS_G2), /* type */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
32, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_unsigned, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (MOVW_UABS_G2), /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
/* MOVK: ((S+A) >> 32) & 0xffff [no overflow check] */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
HOWTO64 (AARCH64_R (MOVW_UABS_G2_NC), /* type */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
32, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (MOVW_UABS_G2_NC), /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
/* MOVZ: ((S+A) >> 48) & 0xffff */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
HOWTO64 (AARCH64_R (MOVW_UABS_G3), /* type */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
48, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_unsigned, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (MOVW_UABS_G3), /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
/* Group relocations to create high part of a 16, 32, 48 or 64 bit
signed data or abs address inline. Will change instruction
to MOVN or MOVZ depending on sign of calculated value. */
/* MOV[ZN]: ((S+A) >> 0) & 0xffff */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
HOWTO (AARCH64_R (MOVW_SABS_G0), /* type */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
[BFD][AARCH64]Fix MOVW_SABS_G(0,1,2) relocation overflow check. For these three relocations, 17 bit signed value should be used, instead of 16 bit. The bitsize field is changed from 16 to 17, this field in aarch64 backend is used for overflow check only. bfd/ 2016-02-26 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (elfNN_aarch64_howto_table): Fix signed overflow check for MOVW_SABS_G0, MOVW_SABS_G1, MOVW_SABS_G2. ld/ 2016-02-26 Renlin Li <renlin.li@arm.com> * testsuite/ld-aarch64/aarch64-elf.exp: Run new testcases. * testsuite/ld-aarch64/emit-relocs-270.d: Update to use new boundary. * testsuite/ld-aarch64/emit-relocs-271.d: Likewise. * testsuite/ld-aarch64/emit-relocs-272.d: Likewise. * testsuite/ld-aarch64/emit-relocs-270-overflow.d: New. * testsuite/ld-aarch64/emit-relocs-270-overflow.s: New. * testsuite/ld-aarch64/emit-relocs-271-overflow.d: New. * testsuite/ld-aarch64/emit-relocs-271-overflow.s: New. * testsuite/ld-aarch64/emit-relocs-272-overflow.d: New. * testsuite/ld-aarch64/emit-relocs-272-overflow.s: New.
2016-02-26 18:52:34 +01:00
17, /* bitsize */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_signed, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (MOVW_SABS_G0), /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
/* MOV[ZN]: ((S+A) >> 16) & 0xffff */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
HOWTO64 (AARCH64_R (MOVW_SABS_G1), /* type */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
16, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
[BFD][AARCH64]Fix MOVW_SABS_G(0,1,2) relocation overflow check. For these three relocations, 17 bit signed value should be used, instead of 16 bit. The bitsize field is changed from 16 to 17, this field in aarch64 backend is used for overflow check only. bfd/ 2016-02-26 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (elfNN_aarch64_howto_table): Fix signed overflow check for MOVW_SABS_G0, MOVW_SABS_G1, MOVW_SABS_G2. ld/ 2016-02-26 Renlin Li <renlin.li@arm.com> * testsuite/ld-aarch64/aarch64-elf.exp: Run new testcases. * testsuite/ld-aarch64/emit-relocs-270.d: Update to use new boundary. * testsuite/ld-aarch64/emit-relocs-271.d: Likewise. * testsuite/ld-aarch64/emit-relocs-272.d: Likewise. * testsuite/ld-aarch64/emit-relocs-270-overflow.d: New. * testsuite/ld-aarch64/emit-relocs-270-overflow.s: New. * testsuite/ld-aarch64/emit-relocs-271-overflow.d: New. * testsuite/ld-aarch64/emit-relocs-271-overflow.s: New. * testsuite/ld-aarch64/emit-relocs-272-overflow.d: New. * testsuite/ld-aarch64/emit-relocs-272-overflow.s: New.
2016-02-26 18:52:34 +01:00
17, /* bitsize */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_signed, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (MOVW_SABS_G1), /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
/* MOV[ZN]: ((S+A) >> 32) & 0xffff */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
HOWTO64 (AARCH64_R (MOVW_SABS_G2), /* type */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
32, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
[BFD][AARCH64]Fix MOVW_SABS_G(0,1,2) relocation overflow check. For these three relocations, 17 bit signed value should be used, instead of 16 bit. The bitsize field is changed from 16 to 17, this field in aarch64 backend is used for overflow check only. bfd/ 2016-02-26 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (elfNN_aarch64_howto_table): Fix signed overflow check for MOVW_SABS_G0, MOVW_SABS_G1, MOVW_SABS_G2. ld/ 2016-02-26 Renlin Li <renlin.li@arm.com> * testsuite/ld-aarch64/aarch64-elf.exp: Run new testcases. * testsuite/ld-aarch64/emit-relocs-270.d: Update to use new boundary. * testsuite/ld-aarch64/emit-relocs-271.d: Likewise. * testsuite/ld-aarch64/emit-relocs-272.d: Likewise. * testsuite/ld-aarch64/emit-relocs-270-overflow.d: New. * testsuite/ld-aarch64/emit-relocs-270-overflow.s: New. * testsuite/ld-aarch64/emit-relocs-271-overflow.d: New. * testsuite/ld-aarch64/emit-relocs-271-overflow.s: New. * testsuite/ld-aarch64/emit-relocs-272-overflow.d: New. * testsuite/ld-aarch64/emit-relocs-272-overflow.s: New.
2016-02-26 18:52:34 +01:00
17, /* bitsize */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_signed, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (MOVW_SABS_G2), /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
[GAS][AARCH64]Add group relocations to create PC-relative offset. This is a patch to add the gas support for group relocations to create a 16, 32, 48, or 64 bit PC-relative offset inline. The following relocations are added along with the test cases: BFD_RELOC_AARCH64_MOVW_PREL_G0, BFD_RELOC_AARCH64_MOVW_PREL_G0_NC, BFD_RELOC_AARCH64_MOVW_PREL_G1, BFD_RELOC_AARCH64_MOVW_PREL_G1_NC, BFD_RELOC_AARCH64_MOVW_PREL_G2, BFD_RELOC_AARCH64_MOVW_PREL_G2_NC, BFD_RELOC_AARCH64_MOVW_PREL_G3. bfd/ 2018-01-24 Renlin Li <renlin.li@arm.com> * reloc.c: Add BFD_RELOC_AARCH64_MOVW_PREL_G0, BFD_RELOC_AARCH64_MOVW_PREL_G0_NC, BFD_RELOC_AARCH64_MOVW_PREL_G1, BFD_RELOC_AARCH64_MOVW_PREL_G1_NC, BFD_RELOC_AARCH64_MOVW_PREL_G2, BFD_RELOC_AARCH64_MOVW_PREL_G2_NC, BFD_RELOC_AARCH64_MOVW_PREL_G3. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elfnn-aarch64.c (elfNN_aarch64_howto_table): Add entries for BFD_RELOC_AARCH64_MOVW_PREL_G0, BFD_RELOC_AARCH64_MOVW_PREL_G0_NC, BFD_RELOC_AARCH64_MOVW_PREL_G1, BFD_RELOC_AARCH64_MOVW_PREL_G1_NC, BFD_RELOC_AARCH64_MOVW_PREL_G2, BFD_RELOC_AARCH64_MOVW_PREL_G2_NC, BFD_RELOC_AARCH64_MOVW_PREL_G3. gas/ 2018-01-24 Renlin Li <renlin.li@arm.com> * config/tc-aarch64.c (reloc_table): add entries for BFD_RELOC_AARCH64_MOVW_PREL_G0, BFD_RELOC_AARCH64_MOVW_PREL_G0_NC, BFD_RELOC_AARCH64_MOVW_PREL_G1, BFD_RELOC_AARCH64_MOVW_PREL_G1_NC, BFD_RELOC_AARCH64_MOVW_PREL_G2, BFD_RELOC_AARCH64_MOVW_PREL_G2_NC, BFD_RELOC_AARCH64_MOVW_PREL_G3. (process_movw_reloc_info): Supports newly added MOVW_PREL relocations. (md_apply_fix): Likewise * testsuite/gas/aarch64/prel_g0.s: New. * testsuite/gas/aarch64/prel_g0.d: New. * testsuite/gas/aarch64/prel_g0_nc.s: New. * testsuite/gas/aarch64/prel_g0_nc.d: New. * testsuite/gas/aarch64/prel_g1.s: New. * testsuite/gas/aarch64/prel_g1.d: New. * testsuite/gas/aarch64/prel_g1_nc.s: New. * testsuite/gas/aarch64/prel_g1_nc.d: New. * testsuite/gas/aarch64/prel_g2.s: New. * testsuite/gas/aarch64/prel_g2.d: New. * testsuite/gas/aarch64/prel_g2_nc.s: New. * testsuite/gas/aarch64/prel_g2_nc.d: New. * testsuite/gas/aarch64/prel_g3.s: New. * testsuite/gas/aarch64/prel_g3.d: New.
2018-01-18 13:08:40 +01:00
/* Group relocations to create a 16, 32, 48 or 64 bit
PC relative address inline. */
/* MOV[NZ]: ((S+A-P) >> 0) & 0xffff */
Add R_AARCH64_P32_MOVW_PREL_* ELF32 relocs These ilp32 relocations were missing for some reason. bfd/ChangeLog: * elfnn-aarch64.c: Enable MOVW_PREL relocs for ELF32. include/ChangeLog: * elf/aarch64.h (R_AARCH64_P32_MOVW_PREL_G0): Define. (R_AARCH64_P32_MOVW_PREL_G0_NC): Define. (R_AARCH64_P32_MOVW_PREL_G1): Define. ld/ChangeLog: * testsuite/ld-aarch64/aarch64-elf.exp: Add emit-relocs-22 and -23. * testsuite/ld-aarch64/emit-relocs-22.d: New test. * testsuite/ld-aarch64/emit-relocs-22.s: New test. * testsuite/ld-aarch64/emit-relocs-23.d: New test. * testsuite/ld-aarch64/emit-relocs-23.s: New test.
2018-11-28 20:35:04 +01:00
HOWTO (AARCH64_R (MOVW_PREL_G0), /* type */
[GAS][AARCH64]Add group relocations to create PC-relative offset. This is a patch to add the gas support for group relocations to create a 16, 32, 48, or 64 bit PC-relative offset inline. The following relocations are added along with the test cases: BFD_RELOC_AARCH64_MOVW_PREL_G0, BFD_RELOC_AARCH64_MOVW_PREL_G0_NC, BFD_RELOC_AARCH64_MOVW_PREL_G1, BFD_RELOC_AARCH64_MOVW_PREL_G1_NC, BFD_RELOC_AARCH64_MOVW_PREL_G2, BFD_RELOC_AARCH64_MOVW_PREL_G2_NC, BFD_RELOC_AARCH64_MOVW_PREL_G3. bfd/ 2018-01-24 Renlin Li <renlin.li@arm.com> * reloc.c: Add BFD_RELOC_AARCH64_MOVW_PREL_G0, BFD_RELOC_AARCH64_MOVW_PREL_G0_NC, BFD_RELOC_AARCH64_MOVW_PREL_G1, BFD_RELOC_AARCH64_MOVW_PREL_G1_NC, BFD_RELOC_AARCH64_MOVW_PREL_G2, BFD_RELOC_AARCH64_MOVW_PREL_G2_NC, BFD_RELOC_AARCH64_MOVW_PREL_G3. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elfnn-aarch64.c (elfNN_aarch64_howto_table): Add entries for BFD_RELOC_AARCH64_MOVW_PREL_G0, BFD_RELOC_AARCH64_MOVW_PREL_G0_NC, BFD_RELOC_AARCH64_MOVW_PREL_G1, BFD_RELOC_AARCH64_MOVW_PREL_G1_NC, BFD_RELOC_AARCH64_MOVW_PREL_G2, BFD_RELOC_AARCH64_MOVW_PREL_G2_NC, BFD_RELOC_AARCH64_MOVW_PREL_G3. gas/ 2018-01-24 Renlin Li <renlin.li@arm.com> * config/tc-aarch64.c (reloc_table): add entries for BFD_RELOC_AARCH64_MOVW_PREL_G0, BFD_RELOC_AARCH64_MOVW_PREL_G0_NC, BFD_RELOC_AARCH64_MOVW_PREL_G1, BFD_RELOC_AARCH64_MOVW_PREL_G1_NC, BFD_RELOC_AARCH64_MOVW_PREL_G2, BFD_RELOC_AARCH64_MOVW_PREL_G2_NC, BFD_RELOC_AARCH64_MOVW_PREL_G3. (process_movw_reloc_info): Supports newly added MOVW_PREL relocations. (md_apply_fix): Likewise * testsuite/gas/aarch64/prel_g0.s: New. * testsuite/gas/aarch64/prel_g0.d: New. * testsuite/gas/aarch64/prel_g0_nc.s: New. * testsuite/gas/aarch64/prel_g0_nc.d: New. * testsuite/gas/aarch64/prel_g1.s: New. * testsuite/gas/aarch64/prel_g1.d: New. * testsuite/gas/aarch64/prel_g1_nc.s: New. * testsuite/gas/aarch64/prel_g1_nc.d: New. * testsuite/gas/aarch64/prel_g2.s: New. * testsuite/gas/aarch64/prel_g2.d: New. * testsuite/gas/aarch64/prel_g2_nc.s: New. * testsuite/gas/aarch64/prel_g2_nc.d: New. * testsuite/gas/aarch64/prel_g3.s: New. * testsuite/gas/aarch64/prel_g3.d: New.
2018-01-18 13:08:40 +01:00
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
17, /* bitsize */
TRUE, /* pc_relative */
0, /* bitpos */
complain_overflow_signed, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (MOVW_PREL_G0), /* name */
FALSE, /* partial_inplace */
0xffff, /* src_mask */
0xffff, /* dst_mask */
TRUE), /* pcrel_offset */
/* MOVK: ((S+A-P) >> 0) & 0xffff [no overflow check] */
Add R_AARCH64_P32_MOVW_PREL_* ELF32 relocs These ilp32 relocations were missing for some reason. bfd/ChangeLog: * elfnn-aarch64.c: Enable MOVW_PREL relocs for ELF32. include/ChangeLog: * elf/aarch64.h (R_AARCH64_P32_MOVW_PREL_G0): Define. (R_AARCH64_P32_MOVW_PREL_G0_NC): Define. (R_AARCH64_P32_MOVW_PREL_G1): Define. ld/ChangeLog: * testsuite/ld-aarch64/aarch64-elf.exp: Add emit-relocs-22 and -23. * testsuite/ld-aarch64/emit-relocs-22.d: New test. * testsuite/ld-aarch64/emit-relocs-22.s: New test. * testsuite/ld-aarch64/emit-relocs-23.d: New test. * testsuite/ld-aarch64/emit-relocs-23.s: New test.
2018-11-28 20:35:04 +01:00
HOWTO (AARCH64_R (MOVW_PREL_G0_NC), /* type */
[GAS][AARCH64]Add group relocations to create PC-relative offset. This is a patch to add the gas support for group relocations to create a 16, 32, 48, or 64 bit PC-relative offset inline. The following relocations are added along with the test cases: BFD_RELOC_AARCH64_MOVW_PREL_G0, BFD_RELOC_AARCH64_MOVW_PREL_G0_NC, BFD_RELOC_AARCH64_MOVW_PREL_G1, BFD_RELOC_AARCH64_MOVW_PREL_G1_NC, BFD_RELOC_AARCH64_MOVW_PREL_G2, BFD_RELOC_AARCH64_MOVW_PREL_G2_NC, BFD_RELOC_AARCH64_MOVW_PREL_G3. bfd/ 2018-01-24 Renlin Li <renlin.li@arm.com> * reloc.c: Add BFD_RELOC_AARCH64_MOVW_PREL_G0, BFD_RELOC_AARCH64_MOVW_PREL_G0_NC, BFD_RELOC_AARCH64_MOVW_PREL_G1, BFD_RELOC_AARCH64_MOVW_PREL_G1_NC, BFD_RELOC_AARCH64_MOVW_PREL_G2, BFD_RELOC_AARCH64_MOVW_PREL_G2_NC, BFD_RELOC_AARCH64_MOVW_PREL_G3. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elfnn-aarch64.c (elfNN_aarch64_howto_table): Add entries for BFD_RELOC_AARCH64_MOVW_PREL_G0, BFD_RELOC_AARCH64_MOVW_PREL_G0_NC, BFD_RELOC_AARCH64_MOVW_PREL_G1, BFD_RELOC_AARCH64_MOVW_PREL_G1_NC, BFD_RELOC_AARCH64_MOVW_PREL_G2, BFD_RELOC_AARCH64_MOVW_PREL_G2_NC, BFD_RELOC_AARCH64_MOVW_PREL_G3. gas/ 2018-01-24 Renlin Li <renlin.li@arm.com> * config/tc-aarch64.c (reloc_table): add entries for BFD_RELOC_AARCH64_MOVW_PREL_G0, BFD_RELOC_AARCH64_MOVW_PREL_G0_NC, BFD_RELOC_AARCH64_MOVW_PREL_G1, BFD_RELOC_AARCH64_MOVW_PREL_G1_NC, BFD_RELOC_AARCH64_MOVW_PREL_G2, BFD_RELOC_AARCH64_MOVW_PREL_G2_NC, BFD_RELOC_AARCH64_MOVW_PREL_G3. (process_movw_reloc_info): Supports newly added MOVW_PREL relocations. (md_apply_fix): Likewise * testsuite/gas/aarch64/prel_g0.s: New. * testsuite/gas/aarch64/prel_g0.d: New. * testsuite/gas/aarch64/prel_g0_nc.s: New. * testsuite/gas/aarch64/prel_g0_nc.d: New. * testsuite/gas/aarch64/prel_g1.s: New. * testsuite/gas/aarch64/prel_g1.d: New. * testsuite/gas/aarch64/prel_g1_nc.s: New. * testsuite/gas/aarch64/prel_g1_nc.d: New. * testsuite/gas/aarch64/prel_g2.s: New. * testsuite/gas/aarch64/prel_g2.d: New. * testsuite/gas/aarch64/prel_g2_nc.s: New. * testsuite/gas/aarch64/prel_g2_nc.d: New. * testsuite/gas/aarch64/prel_g3.s: New. * testsuite/gas/aarch64/prel_g3.d: New.
2018-01-18 13:08:40 +01:00
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
TRUE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (MOVW_PREL_G0_NC), /* name */
FALSE, /* partial_inplace */
0xffff, /* src_mask */
0xffff, /* dst_mask */
TRUE), /* pcrel_offset */
/* MOV[NZ]: ((S+A-P) >> 16) & 0xffff */
Add R_AARCH64_P32_MOVW_PREL_* ELF32 relocs These ilp32 relocations were missing for some reason. bfd/ChangeLog: * elfnn-aarch64.c: Enable MOVW_PREL relocs for ELF32. include/ChangeLog: * elf/aarch64.h (R_AARCH64_P32_MOVW_PREL_G0): Define. (R_AARCH64_P32_MOVW_PREL_G0_NC): Define. (R_AARCH64_P32_MOVW_PREL_G1): Define. ld/ChangeLog: * testsuite/ld-aarch64/aarch64-elf.exp: Add emit-relocs-22 and -23. * testsuite/ld-aarch64/emit-relocs-22.d: New test. * testsuite/ld-aarch64/emit-relocs-22.s: New test. * testsuite/ld-aarch64/emit-relocs-23.d: New test. * testsuite/ld-aarch64/emit-relocs-23.s: New test.
2018-11-28 20:35:04 +01:00
HOWTO (AARCH64_R (MOVW_PREL_G1), /* type */
[GAS][AARCH64]Add group relocations to create PC-relative offset. This is a patch to add the gas support for group relocations to create a 16, 32, 48, or 64 bit PC-relative offset inline. The following relocations are added along with the test cases: BFD_RELOC_AARCH64_MOVW_PREL_G0, BFD_RELOC_AARCH64_MOVW_PREL_G0_NC, BFD_RELOC_AARCH64_MOVW_PREL_G1, BFD_RELOC_AARCH64_MOVW_PREL_G1_NC, BFD_RELOC_AARCH64_MOVW_PREL_G2, BFD_RELOC_AARCH64_MOVW_PREL_G2_NC, BFD_RELOC_AARCH64_MOVW_PREL_G3. bfd/ 2018-01-24 Renlin Li <renlin.li@arm.com> * reloc.c: Add BFD_RELOC_AARCH64_MOVW_PREL_G0, BFD_RELOC_AARCH64_MOVW_PREL_G0_NC, BFD_RELOC_AARCH64_MOVW_PREL_G1, BFD_RELOC_AARCH64_MOVW_PREL_G1_NC, BFD_RELOC_AARCH64_MOVW_PREL_G2, BFD_RELOC_AARCH64_MOVW_PREL_G2_NC, BFD_RELOC_AARCH64_MOVW_PREL_G3. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elfnn-aarch64.c (elfNN_aarch64_howto_table): Add entries for BFD_RELOC_AARCH64_MOVW_PREL_G0, BFD_RELOC_AARCH64_MOVW_PREL_G0_NC, BFD_RELOC_AARCH64_MOVW_PREL_G1, BFD_RELOC_AARCH64_MOVW_PREL_G1_NC, BFD_RELOC_AARCH64_MOVW_PREL_G2, BFD_RELOC_AARCH64_MOVW_PREL_G2_NC, BFD_RELOC_AARCH64_MOVW_PREL_G3. gas/ 2018-01-24 Renlin Li <renlin.li@arm.com> * config/tc-aarch64.c (reloc_table): add entries for BFD_RELOC_AARCH64_MOVW_PREL_G0, BFD_RELOC_AARCH64_MOVW_PREL_G0_NC, BFD_RELOC_AARCH64_MOVW_PREL_G1, BFD_RELOC_AARCH64_MOVW_PREL_G1_NC, BFD_RELOC_AARCH64_MOVW_PREL_G2, BFD_RELOC_AARCH64_MOVW_PREL_G2_NC, BFD_RELOC_AARCH64_MOVW_PREL_G3. (process_movw_reloc_info): Supports newly added MOVW_PREL relocations. (md_apply_fix): Likewise * testsuite/gas/aarch64/prel_g0.s: New. * testsuite/gas/aarch64/prel_g0.d: New. * testsuite/gas/aarch64/prel_g0_nc.s: New. * testsuite/gas/aarch64/prel_g0_nc.d: New. * testsuite/gas/aarch64/prel_g1.s: New. * testsuite/gas/aarch64/prel_g1.d: New. * testsuite/gas/aarch64/prel_g1_nc.s: New. * testsuite/gas/aarch64/prel_g1_nc.d: New. * testsuite/gas/aarch64/prel_g2.s: New. * testsuite/gas/aarch64/prel_g2.d: New. * testsuite/gas/aarch64/prel_g2_nc.s: New. * testsuite/gas/aarch64/prel_g2_nc.d: New. * testsuite/gas/aarch64/prel_g3.s: New. * testsuite/gas/aarch64/prel_g3.d: New.
2018-01-18 13:08:40 +01:00
16, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
17, /* bitsize */
TRUE, /* pc_relative */
0, /* bitpos */
complain_overflow_signed, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (MOVW_PREL_G1), /* name */
FALSE, /* partial_inplace */
0xffff, /* src_mask */
0xffff, /* dst_mask */
TRUE), /* pcrel_offset */
/* MOVK: ((S+A-P) >> 16) & 0xffff [no overflow check] */
HOWTO64 (AARCH64_R (MOVW_PREL_G1_NC), /* type */
16, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
TRUE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (MOVW_PREL_G1_NC), /* name */
FALSE, /* partial_inplace */
0xffff, /* src_mask */
0xffff, /* dst_mask */
TRUE), /* pcrel_offset */
/* MOV[NZ]: ((S+A-P) >> 32) & 0xffff */
HOWTO64 (AARCH64_R (MOVW_PREL_G2), /* type */
32, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
17, /* bitsize */
TRUE, /* pc_relative */
0, /* bitpos */
complain_overflow_signed, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (MOVW_PREL_G2), /* name */
FALSE, /* partial_inplace */
0xffff, /* src_mask */
0xffff, /* dst_mask */
TRUE), /* pcrel_offset */
/* MOVK: ((S+A-P) >> 32) & 0xffff [no overflow check] */
HOWTO64 (AARCH64_R (MOVW_PREL_G2_NC), /* type */
32, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
TRUE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (MOVW_PREL_G2_NC), /* name */
FALSE, /* partial_inplace */
0xffff, /* src_mask */
0xffff, /* dst_mask */
TRUE), /* pcrel_offset */
/* MOV[NZ]: ((S+A-P) >> 48) & 0xffff */
HOWTO64 (AARCH64_R (MOVW_PREL_G3), /* type */
48, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
TRUE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (MOVW_PREL_G3), /* name */
FALSE, /* partial_inplace */
0xffff, /* src_mask */
0xffff, /* dst_mask */
TRUE), /* pcrel_offset */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* Relocations to generate 19, 21 and 33 bit PC-relative load/store
addresses: PG(x) is (x & ~0xfff). */
/* LD-lit: ((S+A-P) >> 2) & 0x7ffff */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
HOWTO (AARCH64_R (LD_PREL_LO19), /* type */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
2, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
19, /* bitsize */
TRUE, /* pc_relative */
0, /* bitpos */
complain_overflow_signed, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (LD_PREL_LO19), /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
0x7ffff, /* src_mask */
0x7ffff, /* dst_mask */
TRUE), /* pcrel_offset */
/* ADR: (S+A-P) & 0x1fffff */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
HOWTO (AARCH64_R (ADR_PREL_LO21), /* type */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
21, /* bitsize */
TRUE, /* pc_relative */
0, /* bitpos */
complain_overflow_signed, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (ADR_PREL_LO21), /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
0x1fffff, /* src_mask */
0x1fffff, /* dst_mask */
TRUE), /* pcrel_offset */
/* ADRP: ((PG(S+A)-PG(P)) >> 12) & 0x1fffff */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
HOWTO (AARCH64_R (ADR_PREL_PG_HI21), /* type */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
12, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
21, /* bitsize */
TRUE, /* pc_relative */
0, /* bitpos */
complain_overflow_signed, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (ADR_PREL_PG_HI21), /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
0x1fffff, /* src_mask */
0x1fffff, /* dst_mask */
TRUE), /* pcrel_offset */
/* ADRP: ((PG(S+A)-PG(P)) >> 12) & 0x1fffff [no overflow check] */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
HOWTO64 (AARCH64_R (ADR_PREL_PG_HI21_NC), /* type */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
12, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
21, /* bitsize */
TRUE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (ADR_PREL_PG_HI21_NC), /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
0x1fffff, /* src_mask */
0x1fffff, /* dst_mask */
TRUE), /* pcrel_offset */
/* ADD: (S+A) & 0xfff [no overflow check] */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
HOWTO (AARCH64_R (ADD_ABS_LO12_NC), /* type */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
12, /* bitsize */
FALSE, /* pc_relative */
10, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (ADD_ABS_LO12_NC), /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
0x3ffc00, /* src_mask */
0x3ffc00, /* dst_mask */
FALSE), /* pcrel_offset */
/* LD/ST8: (S+A) & 0xfff */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
HOWTO (AARCH64_R (LDST8_ABS_LO12_NC), /* type */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
12, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (LDST8_ABS_LO12_NC), /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
0xfff, /* src_mask */
0xfff, /* dst_mask */
FALSE), /* pcrel_offset */
/* Relocations for control-flow instructions. */
/* TBZ/NZ: ((S+A-P) >> 2) & 0x3fff */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
HOWTO (AARCH64_R (TSTBR14), /* type */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
2, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
14, /* bitsize */
TRUE, /* pc_relative */
0, /* bitpos */
complain_overflow_signed, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (TSTBR14), /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
0x3fff, /* src_mask */
0x3fff, /* dst_mask */
TRUE), /* pcrel_offset */
/* B.cond: ((S+A-P) >> 2) & 0x7ffff */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
HOWTO (AARCH64_R (CONDBR19), /* type */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
2, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
19, /* bitsize */
TRUE, /* pc_relative */
0, /* bitpos */
complain_overflow_signed, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (CONDBR19), /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
0x7ffff, /* src_mask */
0x7ffff, /* dst_mask */
TRUE), /* pcrel_offset */
/* B: ((S+A-P) >> 2) & 0x3ffffff */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
HOWTO (AARCH64_R (JUMP26), /* type */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
2, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
26, /* bitsize */
TRUE, /* pc_relative */
0, /* bitpos */
complain_overflow_signed, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (JUMP26), /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
0x3ffffff, /* src_mask */
0x3ffffff, /* dst_mask */
TRUE), /* pcrel_offset */
/* BL: ((S+A-P) >> 2) & 0x3ffffff */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
HOWTO (AARCH64_R (CALL26), /* type */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
2, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
26, /* bitsize */
TRUE, /* pc_relative */
0, /* bitpos */
complain_overflow_signed, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (CALL26), /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
0x3ffffff, /* src_mask */
0x3ffffff, /* dst_mask */
TRUE), /* pcrel_offset */
/* LD/ST16: (S+A) & 0xffe */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
HOWTO (AARCH64_R (LDST16_ABS_LO12_NC), /* type */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
1, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
12, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (LDST16_ABS_LO12_NC), /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
0xffe, /* src_mask */
0xffe, /* dst_mask */
FALSE), /* pcrel_offset */
/* LD/ST32: (S+A) & 0xffc */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
HOWTO (AARCH64_R (LDST32_ABS_LO12_NC), /* type */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
2, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
12, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (LDST32_ABS_LO12_NC), /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
0xffc, /* src_mask */
0xffc, /* dst_mask */
FALSE), /* pcrel_offset */
/* LD/ST64: (S+A) & 0xff8 */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
HOWTO (AARCH64_R (LDST64_ABS_LO12_NC), /* type */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
3, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
12, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (LDST64_ABS_LO12_NC), /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
0xff8, /* src_mask */
0xff8, /* dst_mask */
FALSE), /* pcrel_offset */
/* LD/ST128: (S+A) & 0xff0 */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
HOWTO (AARCH64_R (LDST128_ABS_LO12_NC), /* type */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
4, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
12, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (LDST128_ABS_LO12_NC), /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
0xff0, /* src_mask */
0xff0, /* dst_mask */
FALSE), /* pcrel_offset */
2012-09-11 Chris Schlumberger-Socha <chris.schlumberger-socha@arm.com> bfd/ * bfd-in2.h: Regenerated. * elf64-aarch64.c (elf64_aarch64_howto_table): Add R_AARCH64_GOT_LD_PREL19 reloc to HOWTO. (elf64_aarch64_reloc_map): Add reloc entry. (aarch64_resolve_relocation): Likewise. (bfd_elf_aarch64_put_addend): Likewise. (aarch64_reloc_got_type): Likewise. (elf64_aarch64_final_link_relocate): Likewise. (lf64_aarch64_check_relocs): Likewise. (elf64_aarch64_check_relocs): New case for R_AARCH64_ADR_PREL_LO21 reloc. * libbfd.h: Regenerated. * reloc.c (R_AARCH64_GOT_LD_PREL19): New reloc. gas/ * config/tc-aarch64.c (reloc_table): Add reloc to table entry. (parse_address_main): Add support for #:<reloc_op>:<symbol>. (parse_operands): Check for unused reloc. (md_apply_fix): New case for reloc. (aarch64_force_relocation): Likewise. gas/testsuite * gas/aarch64/reloc-insn.d (BFD_RELOC_AARCH64_GOT_LD_PREL19): Add expected asm for new reloc test. * gas/aarch64/reloc-insn.s (BFD_RELOC_AARCH64_GOT_LD_PREL19): Add test for reloc. include/ * elf/aarch64.h (R_AARCH64_GOT_LD_PREL19): New reloc. ld/testsuite * ld-aarch64/aarch64-elf.exp: New reloc tests. * ld-aarch64/emit-relocs-309-low-bad.d: New file. Expected asm for test failure (lower bound overflow). * ld-aarch64/emit-relocs-309-low.d: New file. Expected asm for test success (lower bound). * ld-aarch64/emit-relocs-309-up-bad.d: New file. Expected asm for test failure (upper bound overflow). * ld-aarch64/emit-relocs-309-up.d: New file. Expected asm for test success (upper bound). * ld-aarch64/emit-relocs-309.s: New file. Asm for new reloc tests.
2012-09-12 18:25:51 +02:00
/* Set a load-literal immediate field to bits
0x1FFFFC of G(S)-P */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
HOWTO (AARCH64_R (GOT_LD_PREL19), /* type */
2012-09-11 Chris Schlumberger-Socha <chris.schlumberger-socha@arm.com> bfd/ * bfd-in2.h: Regenerated. * elf64-aarch64.c (elf64_aarch64_howto_table): Add R_AARCH64_GOT_LD_PREL19 reloc to HOWTO. (elf64_aarch64_reloc_map): Add reloc entry. (aarch64_resolve_relocation): Likewise. (bfd_elf_aarch64_put_addend): Likewise. (aarch64_reloc_got_type): Likewise. (elf64_aarch64_final_link_relocate): Likewise. (lf64_aarch64_check_relocs): Likewise. (elf64_aarch64_check_relocs): New case for R_AARCH64_ADR_PREL_LO21 reloc. * libbfd.h: Regenerated. * reloc.c (R_AARCH64_GOT_LD_PREL19): New reloc. gas/ * config/tc-aarch64.c (reloc_table): Add reloc to table entry. (parse_address_main): Add support for #:<reloc_op>:<symbol>. (parse_operands): Check for unused reloc. (md_apply_fix): New case for reloc. (aarch64_force_relocation): Likewise. gas/testsuite * gas/aarch64/reloc-insn.d (BFD_RELOC_AARCH64_GOT_LD_PREL19): Add expected asm for new reloc test. * gas/aarch64/reloc-insn.s (BFD_RELOC_AARCH64_GOT_LD_PREL19): Add test for reloc. include/ * elf/aarch64.h (R_AARCH64_GOT_LD_PREL19): New reloc. ld/testsuite * ld-aarch64/aarch64-elf.exp: New reloc tests. * ld-aarch64/emit-relocs-309-low-bad.d: New file. Expected asm for test failure (lower bound overflow). * ld-aarch64/emit-relocs-309-low.d: New file. Expected asm for test success (lower bound). * ld-aarch64/emit-relocs-309-up-bad.d: New file. Expected asm for test failure (upper bound overflow). * ld-aarch64/emit-relocs-309-up.d: New file. Expected asm for test success (upper bound). * ld-aarch64/emit-relocs-309.s: New file. Asm for new reloc tests.
2012-09-12 18:25:51 +02:00
2, /* rightshift */
2, /* size (0 = byte,1 = short,2 = long) */
19, /* bitsize */
TRUE, /* pc_relative */
0, /* bitpos */
complain_overflow_signed, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (GOT_LD_PREL19), /* name */
2012-09-11 Chris Schlumberger-Socha <chris.schlumberger-socha@arm.com> bfd/ * bfd-in2.h: Regenerated. * elf64-aarch64.c (elf64_aarch64_howto_table): Add R_AARCH64_GOT_LD_PREL19 reloc to HOWTO. (elf64_aarch64_reloc_map): Add reloc entry. (aarch64_resolve_relocation): Likewise. (bfd_elf_aarch64_put_addend): Likewise. (aarch64_reloc_got_type): Likewise. (elf64_aarch64_final_link_relocate): Likewise. (lf64_aarch64_check_relocs): Likewise. (elf64_aarch64_check_relocs): New case for R_AARCH64_ADR_PREL_LO21 reloc. * libbfd.h: Regenerated. * reloc.c (R_AARCH64_GOT_LD_PREL19): New reloc. gas/ * config/tc-aarch64.c (reloc_table): Add reloc to table entry. (parse_address_main): Add support for #:<reloc_op>:<symbol>. (parse_operands): Check for unused reloc. (md_apply_fix): New case for reloc. (aarch64_force_relocation): Likewise. gas/testsuite * gas/aarch64/reloc-insn.d (BFD_RELOC_AARCH64_GOT_LD_PREL19): Add expected asm for new reloc test. * gas/aarch64/reloc-insn.s (BFD_RELOC_AARCH64_GOT_LD_PREL19): Add test for reloc. include/ * elf/aarch64.h (R_AARCH64_GOT_LD_PREL19): New reloc. ld/testsuite * ld-aarch64/aarch64-elf.exp: New reloc tests. * ld-aarch64/emit-relocs-309-low-bad.d: New file. Expected asm for test failure (lower bound overflow). * ld-aarch64/emit-relocs-309-low.d: New file. Expected asm for test success (lower bound). * ld-aarch64/emit-relocs-309-up-bad.d: New file. Expected asm for test failure (upper bound overflow). * ld-aarch64/emit-relocs-309-up.d: New file. Expected asm for test success (upper bound). * ld-aarch64/emit-relocs-309.s: New file. Asm for new reloc tests.
2012-09-12 18:25:51 +02:00
FALSE, /* partial_inplace */
0xffffe0, /* src_mask */
0xffffe0, /* dst_mask */
TRUE), /* pcrel_offset */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* Get to the page for the GOT entry for the symbol
(G(S) - P) using an ADRP instruction. */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
HOWTO (AARCH64_R (ADR_GOT_PAGE), /* type */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
12, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
21, /* bitsize */
TRUE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (ADR_GOT_PAGE), /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
0x1fffff, /* src_mask */
0x1fffff, /* dst_mask */
TRUE), /* pcrel_offset */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
/* LD64: GOT offset G(S) & 0xff8 */
HOWTO64 (AARCH64_R (LD64_GOT_LO12_NC), /* type */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
3, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
12, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (LD64_GOT_LO12_NC), /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
0xff8, /* src_mask */
0xff8, /* dst_mask */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
FALSE), /* pcrel_offset */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
/* LD32: GOT offset G(S) & 0xffc */
HOWTO32 (AARCH64_R (LD32_GOT_LO12_NC), /* type */
2, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
12, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (LD32_GOT_LO12_NC), /* name */
FALSE, /* partial_inplace */
0xffc, /* src_mask */
0xffc, /* dst_mask */
FALSE), /* pcrel_offset */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
[GAS][AARCH64]Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC Support. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * reloc.c (BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC): New. * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry MOVW_GOTOFF_G0_NC. * libbfd.h: Regnerate. * bfd-in2.h: Regenerate. gas/ 2015-10-02 Renlin Li <renlin.li@arm.com> * config/tc-aarch64.c (reloc_table): New relocation modifier gotoff_g0_nc. (process_movw_reloc_info): Support gotoff_g0_nc. (md_apply_fix): Likewise. gas/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * gas/aarch64/reloc-gotoff_g0_nc.s: New. * gas/aarch64/reloc-gotoff_g0_nc.d: New.
2015-10-02 16:42:01 +02:00
/* Lower 16 bits of GOT offset for the symbol. */
HOWTO64 (AARCH64_R (MOVW_GOTOFF_G0_NC), /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (MOVW_GOTOFF_G0_NC), /* name */
FALSE, /* partial_inplace */
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
[GAS][AARCH64]Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G1 Support. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * reloc.c (BFD_RELOC_AARCH64_MOVW_GOTOFF_G1): New. * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for MOVW_GOTOFF_G1. * libbfd.h: Regenerate. * bfd-in2.h: Regenerate. gas/ 2015-10-02 Renlin Li <renlin.li@arm.com> * config/tc-aarch64.c (reloc_table): New relocation modifier gotoff_g1. (process_movw_reloc_info): Support newly added modifier. (md_apply_fix): Likewise. gas/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * gas/aarch64/reloc-gotoff_g1.s: New. * gas/aarch64/reloc-gotoff_g1.d: New.
2015-10-02 16:18:51 +02:00
/* Higher 16 bits of GOT offset for the symbol. */
HOWTO64 (AARCH64_R (MOVW_GOTOFF_G1), /* type */
16, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_unsigned, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (MOVW_GOTOFF_G1), /* name */
FALSE, /* partial_inplace */
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
[AArch64] Gas add BFD_RELOC_AARCH64_LD64_GOTOFF_LO15 support 2015-06-15 Renlin Li <renlin.li@arm.com> bfd/ * reloc.c (BFD_RELOC_AARCH64_LD64_GOTOFF_LO15): New entry. * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for BFD_RELOC_AARCH64_LD64_GOTOFF_LO15. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. gas/ * config/tc-aarch64.c (reloc_table): New relocation modifier. (md_apply_fix): Support BFD_RELOC_AARCH64_LD64_GOTOFF_LO15. (aarch64_force_relocation): Ditto gas/testsuite/ * gas/aarch64/reloc-insn.s: Update test * gas/aarch64/reloc-insn.d: Update expected result.
2015-06-15 12:07:37 +02:00
/* LD64: GOT offset for the symbol. */
HOWTO64 (AARCH64_R (LD64_GOTOFF_LO15), /* type */
3, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
12, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_unsigned, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (LD64_GOTOFF_LO15), /* name */
FALSE, /* partial_inplace */
0x7ff8, /* src_mask */
0x7ff8, /* dst_mask */
FALSE), /* pcrel_offset */
[AArch64] GAS support BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14 This patch add BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14 support in Gas. The relocation modifier === :gotpage_lo14:symbol 2015-06-01 Jiong.Wang <jiong.wang@arm.com> bfd/ * reloc.c (BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14): New entry. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14. gas/ * config/tc-aarch64.c (reloc_table): New relocation modifiers. (md_apply_fix): Support BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14. (aarch64_force_relocation): Ditto. gas/testsuite/ * gas/aarch64/ilp32-basic.s: New testcase. * gas/aarch64/ilp32-basic.d: Ditto.
2015-06-01 16:41:54 +02:00
/* LD32: GOT offset to the page address of GOT table.
(G(S) - PAGE (_GLOBAL_OFFSET_TABLE_)) & 0x5ffc. */
HOWTO32 (AARCH64_R (LD32_GOTPAGE_LO14), /* type */
2, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
12, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_unsigned, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (LD32_GOTPAGE_LO14), /* name */
FALSE, /* partial_inplace */
0x5ffc, /* src_mask */
0x5ffc, /* dst_mask */
FALSE), /* pcrel_offset */
[AArch64] GAS Support BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15 2015-06-01 Jiong.Wang <jiong.wang@arm.com> bfd/ * reloc.c (BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15): New entry. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15. gas/ * config/tc-aarch64.c (reloc_table): New relocation modifiers. (md_apply_fix): Support BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15. (aarch64_force_relocation): Ditto. gas/testsuite/ * gas/aarch64/reloc-insn.s: New testcase. * gas/aarch64/reloc-insn.d: Ditto.
2015-06-01 11:22:15 +02:00
/* LD64: GOT offset to the page address of GOT table.
(G(S) - PAGE (_GLOBAL_OFFSET_TABLE_)) & 0x7ff8. */
HOWTO64 (AARCH64_R (LD64_GOTPAGE_LO15), /* type */
3, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
12, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_unsigned, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (LD64_GOTPAGE_LO15), /* name */
FALSE, /* partial_inplace */
0x7ff8, /* src_mask */
0x7ff8, /* dst_mask */
FALSE), /* pcrel_offset */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* Get to the page for the GOT entry for the symbol
(G(S) - P) using an ADRP instruction. */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
HOWTO (AARCH64_R (TLSGD_ADR_PAGE21), /* type */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
12, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
21, /* bitsize */
TRUE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (TLSGD_ADR_PAGE21), /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
0x1fffff, /* src_mask */
0x1fffff, /* dst_mask */
TRUE), /* pcrel_offset */
Add ADR :tlsgd: directive and TLSGD_ADR_PREL21 support.
2015-02-13 08:13:57 +01:00
HOWTO (AARCH64_R (TLSGD_ADR_PREL21), /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
21, /* bitsize */
TRUE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (TLSGD_ADR_PREL21), /* name */
FALSE, /* partial_inplace */
0x1fffff, /* src_mask */
0x1fffff, /* dst_mask */
TRUE), /* pcrel_offset */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* ADD: GOT offset G(S) & 0xff8 [no overflow check] */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
HOWTO (AARCH64_R (TLSGD_ADD_LO12_NC), /* type */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
12, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (TLSGD_ADD_LO12_NC), /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
0xfff, /* src_mask */
0xfff, /* dst_mask */
FALSE), /* pcrel_offset */
[GAS][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC support. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * reloc.c (BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC): New entry. * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC. * libbfd.h: Regenerate. * bfd-in2.h: Likewise gas/ 2015-10-02 Renlin Li <renlin.li@arm.com> * config/tc-aarch64.c (reloc_table): New relocation modifier tlsgd_g0_nc. (process_movw_reloc_info): Support BFD_RELOC_AARCH64_TLSGD_MOVW_G1. (md_apply_fix): Likewise. (aarch64_force_relocation): Likewise. gas/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * gas/aarch64/reloc-tlsgd_g0_nc.d: New. * gas/aarch64/reloc-tlsgd_g0_nc.s: New.
2015-10-02 17:28:49 +02:00
/* Lower 16 bits of GOT offset to tls_index. */
HOWTO64 (AARCH64_R (TLSGD_MOVW_G0_NC), /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (TLSGD_MOVW_G0_NC), /* name */
FALSE, /* partial_inplace */
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
[GAS][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G1 support. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * reloc.c (BFD_RELOC_AARCH64_TLSGD_MOVW_G1): New entry. * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for BFD_RELOC_AARCH64_TLSGD_MOVW_G1. * bfd-in2.h: Regenerate. * libbfd.h: Likewise. gas/ 2015-10-02 Renlin Li <renlin.li@arm.com> * config/tc-aarch64.c (reloc_table): New relocation modifier tlsgd_g1. (process_movw_reloc_info): Support BFD_RELOC_AARCH64_TLSGD_MOVW_G1. (md_apply_fix): Likewise. (aarch64_force_relocation): Likewise. gas/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * gas/aarch64/reloc-tlsgd_g1.s: New. * gas/aarch64/reloc-tlsgd_g1.s: New.
2015-10-02 17:04:09 +02:00
/* Higher 16 bits of GOT offset to tls_index. */
HOWTO64 (AARCH64_R (TLSGD_MOVW_G1), /* type */
16, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_unsigned, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (TLSGD_MOVW_G1), /* name */
FALSE, /* partial_inplace */
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
HOWTO (AARCH64_R (TLSIE_ADR_GOTTPREL_PAGE21), /* type */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
12, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
21, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (TLSIE_ADR_GOTTPREL_PAGE21), /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
0x1fffff, /* src_mask */
0x1fffff, /* dst_mask */
FALSE), /* pcrel_offset */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
HOWTO64 (AARCH64_R (TLSIE_LD64_GOTTPREL_LO12_NC), /* type */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
3, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
12, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (TLSIE_LD64_GOTTPREL_LO12_NC), /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
0xff8, /* src_mask */
0xff8, /* dst_mask */
FALSE), /* pcrel_offset */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
HOWTO32 (AARCH64_R (TLSIE_LD32_GOTTPREL_LO12_NC), /* type */
2, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
12, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (TLSIE_LD32_GOTTPREL_LO12_NC), /* name */
FALSE, /* partial_inplace */
0xffc, /* src_mask */
0xffc, /* dst_mask */
FALSE), /* pcrel_offset */
HOWTO (AARCH64_R (TLSIE_LD_GOTTPREL_PREL19), /* type */
Fixed AArch64 TLS relocation resolution. bfd/ * elf64-aarch64.c (elf64_aarch64_tls_howto_table): Fix shift value for R_AARCH64_TLSIE_LD_GOTTPREL_PREL19, R_AARCH64_TLSLE_MOVW_TPREL_G2, R_AARCH64_TLSLE_MOVW_TPREL_G1, R_AARCH64_TLSLE_MOVW_TPREL_G1_NC, R_AARCH64_TLSLE_ADD_TPREL_HI12. (elf64_aarch64_tlsdesc_howto_table): Fix shift value for R_AARCH64_TLSDESC_LD64_PREL19 and R_AARCH64_TLSDESC_OFF_G1. (elf64_aarch64_final_link_relocate): Add signed_addend when resolving AARCH64_TLSLE_*_TPREL_* relocations. ld/testsuite/ * ld-aarch64/tlsle-symbol-offset.s: New file. * ld-aarch64/tlsle-symbol-offset.d: New file. * ld-aarch64/aarch64-elf.exp: Add tlsle-symbol-offset test.
2012-10-16 18:36:50 +02:00
2, /* rightshift */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
2, /* size (0 = byte, 1 = short, 2 = long) */
Adding support for TLSIE_LD_GOTTREL_PREL19.
2015-02-13 10:57:11 +01:00
19, /* bitsize */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (TLSIE_LD_GOTTPREL_PREL19), /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
0x1ffffc, /* src_mask */
0x1ffffc, /* dst_mask */
FALSE), /* pcrel_offset */
[Binutils][AARCH64]Add TLS IE large memory support. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * reloc.c: Make AARCH64_TLSIE_MOVW_GOTTPREL_G1 and AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC defined in alphabetical order. * libbfd.h: Regenerate. * bfd-in2.h: Likewise. * elfnn-aarch64.c (elfNN_aarch64_howto_table): Make TLSIE_MOVW_GOTTPREL_G1 check overflow. (aarch64_reloc_got_type): Add support for TLSIE_MOVW_GOTTPREL_G1 and TLSIE_MOVW_GOTTPREL_G0_NC. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. gas/ 2015-10-02 Renlin Li <renlin.li@arm.com> * config/tc-aarch64.c (reloc_table): Add two entries for gottprel_g0_nc and gottprel_g1. (process_movw_reloc_info): Add support. (md_apply_fix): Likewise. (aarch64_force_relocation): Likewise. gas/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * gas/aarch64/reloc-gottprel_g0_nc.d: New. * gas/aarch64/reloc-gottprel_g0_nc.s: New. * gas/aarch64/reloc-gottprel_g1.d: New. * gas/aarch64/reloc-gottprel_g1.s: New. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/tls-large-ie.d: New. * ld-aarch64/tls-large-ie.s: New. * ld-aarch64/aarch64-elf.exp: Run new test.
2015-10-02 17:59:46 +02:00
HOWTO64 (AARCH64_R (TLSIE_MOVW_GOTTPREL_G0_NC), /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (TLSIE_MOVW_GOTTPREL_G0_NC), /* name */
FALSE, /* partial_inplace */
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
HOWTO64 (AARCH64_R (TLSIE_MOVW_GOTTPREL_G1), /* type */
16, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_unsigned, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (TLSIE_MOVW_GOTTPREL_G1), /* name */
FALSE, /* partial_inplace */
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
[AArch64][3/6] GAS support TLSLD move/add relocation types 2015-08-19 Jiong Wang <jiong.wang@arm.com> bfd/ * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2): New entries. * elfnn-aarch64.c (elfNN_aarch64_howto_table): Likewise. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. gas/ * config/tc-aarch64.c (reloc_table): New relocation modifiers, "dtprel_hi12", "dtprel_g0", "dtprel_g0_nc", "dtprel_g1", "dtprel_g1_nc", "dtprel_g2". (md_apply_fix): Support new relocation types. (aarch64_force_relocation): Likewise. (process_movw_reloc_info): Likewise. gas/testsuite/ * gas/aarch64/reloc-dtprel_g0.s: New testcase. * gas/aarch64/reloc-dtprel_g0-ilp32.s: Likewise. * gas/aarch64/reloc-dtprel_g0_nc.s: Likewise. * gas/aarch64/reloc-dtprel_g0_nc-ilp32.s: Likewise. * gas/aarch64/reloc-dtprel_g1.s: Likewise. * gas/aarch64/reloc-dtprel_g1-ilp32.s: Likewise. * gas/aarch64/reloc-dtprel_g1_nc.s: Likewise. * gas/aarch64/reloc-dtprel_g2.s: Likewise. * gas/aarch64/reloc-dtprel_hi12.s: Likewise. * gas/aarch64/reloc-dtprel_hi12-ilp32.s: Likewise. * gas/aarch64/reloc-dtprel_g0.d: New expectation file. * gas/aarch64/reloc-dtprel_g0-ilp32.d: Likewise. * gas/aarch64/reloc-dtprel_g0_nc.d: Likewise. * gas/aarch64/reloc-dtprel_g0_nc-ilp32.d: Likewise. * gas/aarch64/reloc-dtprel_g1.d: Likewise. * gas/aarch64/reloc-dtprel_g1-ilp32.d: Likewise. * gas/aarch64/reloc-dtprel_g1_nc.d: Likewise. * gas/aarch64/reloc-dtprel_g2.d: Likewise. * gas/aarch64/reloc-dtprel_hi12.d: Likewise. * gas/aarch64/reloc-dtprel_hi12-ilp32.d: Likewise.
2015-08-19 12:02:34 +02:00
/* ADD: bit[23:12] of byte offset to module TLS base address. */
HOWTO (AARCH64_R (TLSLD_ADD_DTPREL_HI12), /* type */
12, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
12, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_unsigned, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (TLSLD_ADD_DTPREL_HI12), /* name */
FALSE, /* partial_inplace */
0xfff, /* src_mask */
0xfff, /* dst_mask */
FALSE), /* pcrel_offset */
[AArch64][7/8] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12 2015-08-11 Jiong Wang <jiong.wang@arm.com> include/elf/ * aarch64.h (R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12): Define. bfd/ * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12): New entry. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12. gas/ * config/tc-aarch64.c (reloc_table): New relocation modifiers "dtprel_lo12". (md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/reloc-dtprel_lo12-1.s: New testcase. * gas/aarch64/reloc-dtprel_lo12-ilp32-1.s: Likewise. * gas/aarch64/reloc-dtprel_lo12-1.d: New expectation file. * gas/aarch64/reloc-dtprel_lo12-ilp32-1.d: Likewise.
2015-08-11 18:38:49 +02:00
/* Unsigned 12 bit byte offset to module TLS base address. */
HOWTO (AARCH64_R (TLSLD_ADD_DTPREL_LO12), /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
12, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_unsigned, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (TLSLD_ADD_DTPREL_LO12), /* name */
FALSE, /* partial_inplace */
0xfff, /* src_mask */
0xfff, /* dst_mask */
FALSE), /* pcrel_offset */
[AArch64][1/6] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC 2015-08-19 Jiong Wang <jiong.wang@arm.com> bfd/ * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC): New entry. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC. gas/ * config/tc-aarch64.c (reloc_table): New relocation modifiers. (md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/reloc-dtprel_lo12_nc.s: New testcase. * gas/aarch64/reloc-dtprel_lo12_nc-ilp32.s: Likewise. * gas/aarch64/reloc-dtprel_lo12_nc.d: New expectation file. * gas/aarch64/reloc-dtprel_lo12_nc-ilp32.d: Likewise.
2015-08-19 11:57:34 +02:00
/* No overflow check version of BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12. */
HOWTO (AARCH64_R (TLSLD_ADD_DTPREL_LO12_NC), /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
12, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (TLSLD_ADD_DTPREL_LO12_NC), /* name */
FALSE, /* partial_inplace */
0xfff, /* src_mask */
0xfff, /* dst_mask */
FALSE), /* pcrel_offset */
[AArch64][7/8] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12 2015-08-11 Jiong Wang <jiong.wang@arm.com> include/elf/ * aarch64.h (R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12): Define. bfd/ * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12): New entry. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12. gas/ * config/tc-aarch64.c (reloc_table): New relocation modifiers "dtprel_lo12". (md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/reloc-dtprel_lo12-1.s: New testcase. * gas/aarch64/reloc-dtprel_lo12-ilp32-1.s: Likewise. * gas/aarch64/reloc-dtprel_lo12-1.d: New expectation file. * gas/aarch64/reloc-dtprel_lo12-ilp32-1.d: Likewise.
2015-08-11 18:38:49 +02:00
[AArch64][5/8] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC 2015-08-11 Jiong Wang <jiong.wang@arm.com> bfd/ * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC): New entry. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC. gas/ * config/tc-aarch64.c (reloc_table): New relocation modifiers. (md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/reloc-tlsldm_lo12_nc-1.s: New testcase. * gas/aarch64/reloc-tlsldm_lo12_nc-ilp32-1.s: Likewise. * gas/aarch64/reloc-tlsldm_lo12_nc-1.d: New expectation file. * gas/aarch64/reloc-tlsldm_lo12_nc-ilp32-1.d: Likewise.
2015-08-11 18:15:56 +02:00
/* ADD: GOT offset G(S) & 0xff8 [no overflow check] */
HOWTO (AARCH64_R (TLSLD_ADD_LO12_NC), /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
12, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (TLSLD_ADD_LO12_NC), /* name */
FALSE, /* partial_inplace */
0xfff, /* src_mask */
0xfff, /* dst_mask */
FALSE), /* pcrel_offset */
[AArch64][2/8] GAS support BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21 2015-08-11 Jiong Wang <jiong.wang@arm.com> bfd/ * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21): New entry. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21. gas/ * config/tc-aarch64.c (reloc_table): New relocation modifiers. (md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/reloc-tlsldm-page-1.s: New testcase. * gas/aarch64/reloc-tlsldm-page-ilp32-1.s: Likewise. * gas/aarch64/reloc-tlsldm-page-1.d: New expectation file. * gas/aarch64/reloc-tlsldm-page-ilp32-1.d: Likewise.
2015-08-11 17:58:20 +02:00
/* Get to the page for the GOT entry for the symbol
(G(S) - P) using an ADRP instruction. */
HOWTO (AARCH64_R (TLSLD_ADR_PAGE21), /* type */
12, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
21, /* bitsize */
TRUE, /* pc_relative */
0, /* bitpos */
complain_overflow_signed, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (TLSLD_ADR_PAGE21), /* name */
FALSE, /* partial_inplace */
0x1fffff, /* src_mask */
0x1fffff, /* dst_mask */
TRUE), /* pcrel_offset */
[AArch64][2/3] GAS support BFD_RELOC_AARCH64_TLSLD_ADR_PREL21
2015-07-16 16:43:21 +02:00
HOWTO (AARCH64_R (TLSLD_ADR_PREL21), /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
21, /* bitsize */
TRUE, /* pc_relative */
0, /* bitpos */
complain_overflow_signed, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (TLSLD_ADR_PREL21), /* name */
FALSE, /* partial_inplace */
0x1fffff, /* src_mask */
0x1fffff, /* dst_mask */
TRUE), /* pcrel_offset */
[AArch64][5/6] GAS support TLSLD load/store relocation types 2015-08-19 Jiong Wang <jiong.wang@arm.com> bfd/ * reloc.c: New entries, including BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12, BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC, BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12, BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC, BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12, BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC. BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12, BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC. * elfnn-aarch64.c (elfNN_aarch64_howto_table): Likewise. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. gas/ * config/tc-aarch64.c (reloc_table): New relocation types support for dtprel_lo12. (ldst_lo12_determine_real_reloc_type): Support BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12, BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC, BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12, BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC, BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12, BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC, BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12, BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC. (parse_operands): Likewise. (md_apply_fix): Likewise (aarch64_force_relocation): Likewise. (process_movw_reloc_info): Likewise. gas/testsuite/ * gas/aarch64/reloc-dtprel_lo12-ldst8.s: New testcase. * gas/aarch64/reloc-dtprel_lo12_nc-ldstc.s: Likewise. * gas/aarch64/reloc-dtprel_lo12-ldst16.s: Likewise. * gas/aarch64/reloc-dtprel_lo12_nc-ldst16.s: Likewise. * gas/aarch64/reloc-dtprel_lo12-ldst32.s: Likewise. * gas/aarch64/reloc-dtprel_lo12_nc-ldst32.s: Likewise. * gas/aarch64/reloc-dtprel_lo12-ldst64.s: Likewise. * gas/aarch64/reloc-dtprel_lo12_nc-ldst64.s: Likewise. * gas/aarch64/reloc-dtprel_lo12-ldst8.d: New expectation file. * gas/aarch64/reloc-dtprel_lo12_nc-ldst8.d: Likewise. * gas/aarch64/reloc-dtprel_lo12-ldst16.d: Likewise. * gas/aarch64/reloc-dtprel_lo12_nc-ldst16.d: Likewise. * gas/aarch64/reloc-dtprel_lo12-ldst32.d: Likewise. * gas/aarch64/reloc-dtprel_lo12_nc-ldst32.d: Likewise. * gas/aarch64/reloc-dtprel-lo12-ldst64.d: Likewise. * gas/aarch64/reloc-dtprel_lo12_nc-ldst64.d: Likewise.
2015-08-19 12:22:22 +02:00
/* LD/ST16: bit[11:1] of byte offset to module TLS base address. */
HOWTO64 (AARCH64_R (TLSLD_LDST16_DTPREL_LO12), /* type */
1, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
11, /* bitsize */
FALSE, /* pc_relative */
10, /* bitpos */
complain_overflow_unsigned, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (TLSLD_LDST16_DTPREL_LO12), /* name */
FALSE, /* partial_inplace */
0x1ffc00, /* src_mask */
0x1ffc00, /* dst_mask */
FALSE), /* pcrel_offset */
/* Same as BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12, but no overflow check. */
HOWTO64 (AARCH64_R (TLSLD_LDST16_DTPREL_LO12_NC), /* type */
1, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
11, /* bitsize */
FALSE, /* pc_relative */
10, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (TLSLD_LDST16_DTPREL_LO12_NC), /* name */
FALSE, /* partial_inplace */
0x1ffc00, /* src_mask */
0x1ffc00, /* dst_mask */
FALSE), /* pcrel_offset */
/* LD/ST32: bit[11:2] of byte offset to module TLS base address. */
HOWTO64 (AARCH64_R (TLSLD_LDST32_DTPREL_LO12), /* type */
2, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
10, /* bitsize */
FALSE, /* pc_relative */
10, /* bitpos */
complain_overflow_unsigned, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (TLSLD_LDST32_DTPREL_LO12), /* name */
FALSE, /* partial_inplace */
0x3ffc00, /* src_mask */
0x3ffc00, /* dst_mask */
FALSE), /* pcrel_offset */
/* Same as BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12, but no overflow check. */
HOWTO64 (AARCH64_R (TLSLD_LDST32_DTPREL_LO12_NC), /* type */
2, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
10, /* bitsize */
FALSE, /* pc_relative */
10, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (TLSLD_LDST32_DTPREL_LO12_NC), /* name */
FALSE, /* partial_inplace */
0xffc00, /* src_mask */
0xffc00, /* dst_mask */
FALSE), /* pcrel_offset */
/* LD/ST64: bit[11:3] of byte offset to module TLS base address. */
HOWTO64 (AARCH64_R (TLSLD_LDST64_DTPREL_LO12), /* type */
3, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
9, /* bitsize */
FALSE, /* pc_relative */
10, /* bitpos */
complain_overflow_unsigned, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (TLSLD_LDST64_DTPREL_LO12), /* name */
FALSE, /* partial_inplace */
0x3ffc00, /* src_mask */
0x3ffc00, /* dst_mask */
FALSE), /* pcrel_offset */
/* Same as BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12, but no overflow check. */
HOWTO64 (AARCH64_R (TLSLD_LDST64_DTPREL_LO12_NC), /* type */
3, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
9, /* bitsize */
FALSE, /* pc_relative */
10, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (TLSLD_LDST64_DTPREL_LO12_NC), /* name */
FALSE, /* partial_inplace */
0x7fc00, /* src_mask */
0x7fc00, /* dst_mask */
FALSE), /* pcrel_offset */
/* LD/ST8: bit[11:0] of byte offset to module TLS base address. */
HOWTO64 (AARCH64_R (TLSLD_LDST8_DTPREL_LO12), /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
12, /* bitsize */
FALSE, /* pc_relative */
10, /* bitpos */
complain_overflow_unsigned, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (TLSLD_LDST8_DTPREL_LO12), /* name */
FALSE, /* partial_inplace */
0x3ffc00, /* src_mask */
0x3ffc00, /* dst_mask */
FALSE), /* pcrel_offset */
/* Same as BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12, but no overflow check. */
HOWTO64 (AARCH64_R (TLSLD_LDST8_DTPREL_LO12_NC), /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
12, /* bitsize */
FALSE, /* pc_relative */
10, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (TLSLD_LDST8_DTPREL_LO12_NC), /* name */
FALSE, /* partial_inplace */
0x3ffc00, /* src_mask */
0x3ffc00, /* dst_mask */
FALSE), /* pcrel_offset */
[AArch64][3/6] GAS support TLSLD move/add relocation types 2015-08-19 Jiong Wang <jiong.wang@arm.com> bfd/ * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2): New entries. * elfnn-aarch64.c (elfNN_aarch64_howto_table): Likewise. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. gas/ * config/tc-aarch64.c (reloc_table): New relocation modifiers, "dtprel_hi12", "dtprel_g0", "dtprel_g0_nc", "dtprel_g1", "dtprel_g1_nc", "dtprel_g2". (md_apply_fix): Support new relocation types. (aarch64_force_relocation): Likewise. (process_movw_reloc_info): Likewise. gas/testsuite/ * gas/aarch64/reloc-dtprel_g0.s: New testcase. * gas/aarch64/reloc-dtprel_g0-ilp32.s: Likewise. * gas/aarch64/reloc-dtprel_g0_nc.s: Likewise. * gas/aarch64/reloc-dtprel_g0_nc-ilp32.s: Likewise. * gas/aarch64/reloc-dtprel_g1.s: Likewise. * gas/aarch64/reloc-dtprel_g1-ilp32.s: Likewise. * gas/aarch64/reloc-dtprel_g1_nc.s: Likewise. * gas/aarch64/reloc-dtprel_g2.s: Likewise. * gas/aarch64/reloc-dtprel_hi12.s: Likewise. * gas/aarch64/reloc-dtprel_hi12-ilp32.s: Likewise. * gas/aarch64/reloc-dtprel_g0.d: New expectation file. * gas/aarch64/reloc-dtprel_g0-ilp32.d: Likewise. * gas/aarch64/reloc-dtprel_g0_nc.d: Likewise. * gas/aarch64/reloc-dtprel_g0_nc-ilp32.d: Likewise. * gas/aarch64/reloc-dtprel_g1.d: Likewise. * gas/aarch64/reloc-dtprel_g1-ilp32.d: Likewise. * gas/aarch64/reloc-dtprel_g1_nc.d: Likewise. * gas/aarch64/reloc-dtprel_g2.d: Likewise. * gas/aarch64/reloc-dtprel_hi12.d: Likewise. * gas/aarch64/reloc-dtprel_hi12-ilp32.d: Likewise.
2015-08-19 12:02:34 +02:00
/* MOVZ: bit[15:0] of byte offset to module TLS base address. */
HOWTO (AARCH64_R (TLSLD_MOVW_DTPREL_G0), /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_unsigned, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (TLSLD_MOVW_DTPREL_G0), /* name */
FALSE, /* partial_inplace */
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
/* No overflow check version of BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0. */
HOWTO (AARCH64_R (TLSLD_MOVW_DTPREL_G0_NC), /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (TLSLD_MOVW_DTPREL_G0_NC), /* name */
FALSE, /* partial_inplace */
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
/* MOVZ: bit[31:16] of byte offset to module TLS base address. */
HOWTO (AARCH64_R (TLSLD_MOVW_DTPREL_G1), /* type */
16, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_unsigned, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (TLSLD_MOVW_DTPREL_G1), /* name */
FALSE, /* partial_inplace */
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
/* No overflow check version of BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1. */
HOWTO64 (AARCH64_R (TLSLD_MOVW_DTPREL_G1_NC), /* type */
16, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (TLSLD_MOVW_DTPREL_G1_NC), /* name */
FALSE, /* partial_inplace */
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
/* MOVZ: bit[47:32] of byte offset to module TLS base address. */
HOWTO64 (AARCH64_R (TLSLD_MOVW_DTPREL_G2), /* type */
32, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_unsigned, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (TLSLD_MOVW_DTPREL_G2), /* name */
FALSE, /* partial_inplace */
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
HOWTO64 (AARCH64_R (TLSLE_MOVW_TPREL_G2), /* type */
Fixed AArch64 TLS relocation resolution. bfd/ * elf64-aarch64.c (elf64_aarch64_tls_howto_table): Fix shift value for R_AARCH64_TLSIE_LD_GOTTPREL_PREL19, R_AARCH64_TLSLE_MOVW_TPREL_G2, R_AARCH64_TLSLE_MOVW_TPREL_G1, R_AARCH64_TLSLE_MOVW_TPREL_G1_NC, R_AARCH64_TLSLE_ADD_TPREL_HI12. (elf64_aarch64_tlsdesc_howto_table): Fix shift value for R_AARCH64_TLSDESC_LD64_PREL19 and R_AARCH64_TLSDESC_OFF_G1. (elf64_aarch64_final_link_relocate): Add signed_addend when resolving AARCH64_TLSLE_*_TPREL_* relocations. ld/testsuite/ * ld-aarch64/tlsle-symbol-offset.s: New file. * ld-aarch64/tlsle-symbol-offset.d: New file. * ld-aarch64/aarch64-elf.exp: Add tlsle-symbol-offset test.
2012-10-16 18:36:50 +02:00
32, /* rightshift */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
2, /* size (0 = byte, 1 = short, 2 = long) */
Fix field size for TLSLE_MOVW_TPREL_* relocations. The HOWTO table entries for the TLSLE_MOVW_TPREL_* relocations are wrong by inspection. The current implementation does not actually use these field widths for these relocations but they should be corrected.
2015-02-26 22:20:05 +01:00
16, /* bitsize */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* pc_relative */
0, /* bitpos */
[AArch64] Enable overflow check for TLSLE_MOVW_TPREL_G2 bfd/ * elfnn-aarch64.c: (elfNN_aarch64_howto_table): Enable overflow check for TLSLE_MOVW_TPREL_G2. ld/testsuite/ * ld-aarch64/tprel_g2_overflow.s: New testcase. * ld-aarch64/tprel_g2_overflow.d: New expectation file. * ld-aarch64/aarch64-elf.exp: Run new testcase.
2015-01-13 12:21:43 +01:00
complain_overflow_unsigned, /* complain_on_overflow */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (TLSLE_MOVW_TPREL_G2), /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
HOWTO (AARCH64_R (TLSLE_MOVW_TPREL_G1), /* type */
Fixed AArch64 TLS relocation resolution. bfd/ * elf64-aarch64.c (elf64_aarch64_tls_howto_table): Fix shift value for R_AARCH64_TLSIE_LD_GOTTPREL_PREL19, R_AARCH64_TLSLE_MOVW_TPREL_G2, R_AARCH64_TLSLE_MOVW_TPREL_G1, R_AARCH64_TLSLE_MOVW_TPREL_G1_NC, R_AARCH64_TLSLE_ADD_TPREL_HI12. (elf64_aarch64_tlsdesc_howto_table): Fix shift value for R_AARCH64_TLSDESC_LD64_PREL19 and R_AARCH64_TLSDESC_OFF_G1. (elf64_aarch64_final_link_relocate): Add signed_addend when resolving AARCH64_TLSLE_*_TPREL_* relocations. ld/testsuite/ * ld-aarch64/tlsle-symbol-offset.s: New file. * ld-aarch64/tlsle-symbol-offset.d: New file. * ld-aarch64/aarch64-elf.exp: Add tlsle-symbol-offset test.
2012-10-16 18:36:50 +02:00
16, /* rightshift */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
2, /* size (0 = byte, 1 = short, 2 = long) */
Fix field size for TLSLE_MOVW_TPREL_* relocations. The HOWTO table entries for the TLSLE_MOVW_TPREL_* relocations are wrong by inspection. The current implementation does not actually use these field widths for these relocations but they should be corrected.
2015-02-26 22:20:05 +01:00
16, /* bitsize */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (TLSLE_MOVW_TPREL_G1), /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
HOWTO64 (AARCH64_R (TLSLE_MOVW_TPREL_G1_NC), /* type */
Fixed AArch64 TLS relocation resolution. bfd/ * elf64-aarch64.c (elf64_aarch64_tls_howto_table): Fix shift value for R_AARCH64_TLSIE_LD_GOTTPREL_PREL19, R_AARCH64_TLSLE_MOVW_TPREL_G2, R_AARCH64_TLSLE_MOVW_TPREL_G1, R_AARCH64_TLSLE_MOVW_TPREL_G1_NC, R_AARCH64_TLSLE_ADD_TPREL_HI12. (elf64_aarch64_tlsdesc_howto_table): Fix shift value for R_AARCH64_TLSDESC_LD64_PREL19 and R_AARCH64_TLSDESC_OFF_G1. (elf64_aarch64_final_link_relocate): Add signed_addend when resolving AARCH64_TLSLE_*_TPREL_* relocations. ld/testsuite/ * ld-aarch64/tlsle-symbol-offset.s: New file. * ld-aarch64/tlsle-symbol-offset.d: New file. * ld-aarch64/aarch64-elf.exp: Add tlsle-symbol-offset test.
2012-10-16 18:36:50 +02:00
16, /* rightshift */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
2, /* size (0 = byte, 1 = short, 2 = long) */
Fix field size for TLSLE_MOVW_TPREL_* relocations. The HOWTO table entries for the TLSLE_MOVW_TPREL_* relocations are wrong by inspection. The current implementation does not actually use these field widths for these relocations but they should be corrected.
2015-02-26 22:20:05 +01:00
16, /* bitsize */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (TLSLE_MOVW_TPREL_G1_NC), /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
HOWTO (AARCH64_R (TLSLE_MOVW_TPREL_G0), /* type */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
Fix field size for TLSLE_MOVW_TPREL_* relocations. The HOWTO table entries for the TLSLE_MOVW_TPREL_* relocations are wrong by inspection. The current implementation does not actually use these field widths for these relocations but they should be corrected.
2015-02-26 22:20:05 +01:00
16, /* bitsize */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (TLSLE_MOVW_TPREL_G0), /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
HOWTO (AARCH64_R (TLSLE_MOVW_TPREL_G0_NC), /* type */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
Fix field size for TLSLE_MOVW_TPREL_* relocations. The HOWTO table entries for the TLSLE_MOVW_TPREL_* relocations are wrong by inspection. The current implementation does not actually use these field widths for these relocations but they should be corrected.
2015-02-26 22:20:05 +01:00
16, /* bitsize */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (TLSLE_MOVW_TPREL_G0_NC), /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
HOWTO (AARCH64_R (TLSLE_ADD_TPREL_HI12), /* type */
Fixed AArch64 TLS relocation resolution. bfd/ * elf64-aarch64.c (elf64_aarch64_tls_howto_table): Fix shift value for R_AARCH64_TLSIE_LD_GOTTPREL_PREL19, R_AARCH64_TLSLE_MOVW_TPREL_G2, R_AARCH64_TLSLE_MOVW_TPREL_G1, R_AARCH64_TLSLE_MOVW_TPREL_G1_NC, R_AARCH64_TLSLE_ADD_TPREL_HI12. (elf64_aarch64_tlsdesc_howto_table): Fix shift value for R_AARCH64_TLSDESC_LD64_PREL19 and R_AARCH64_TLSDESC_OFF_G1. (elf64_aarch64_final_link_relocate): Add signed_addend when resolving AARCH64_TLSLE_*_TPREL_* relocations. ld/testsuite/ * ld-aarch64/tlsle-symbol-offset.s: New file. * ld-aarch64/tlsle-symbol-offset.d: New file. * ld-aarch64/aarch64-elf.exp: Add tlsle-symbol-offset test.
2012-10-16 18:36:50 +02:00
12, /* rightshift */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
2, /* size (0 = byte, 1 = short, 2 = long) */
12, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
[AArch64] Enable overflow check for R_AARCH64_TLSLE_ADD_TPREL_HI12 bfd/ PR ld/17415 * elfnn-aarch64.c (elfNN_aarch64_howto_table): Mark R_AARCH64_TLSLE_ADD_TPREL_HI12 as complain_overflow_unsigned. * elfxx-aarch64.c (_bfd_aarch64_elf_resolve_relocation): Correct the bit mask. ld/testsuite/ PR ld/17415 * ld-aarch64/pr17415.s: Source file for new test. * ld-aarch64/pr17415.d: Expect file for new test. * ld-aarch64/aarch64-elf.exp: Run the new test.
2015-01-13 12:18:10 +01:00
complain_overflow_unsigned, /* complain_on_overflow */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (TLSLE_ADD_TPREL_HI12), /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
0xfff, /* src_mask */
0xfff, /* dst_mask */
FALSE), /* pcrel_offset */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
HOWTO (AARCH64_R (TLSLE_ADD_TPREL_LO12), /* type */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
12, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
[AArch64] BFD_RELOC_AARCH64_TLSLE_ADD_LO12 should enable overflow check BFD_RELOC_AARCH64_TLSLE_ADD_LO12 is used to generate simplest one-instruction addressing for TLS LE model when tls size is smaller 4K. Linker need to make sure there is no TLS offset overflow. 2015-06-01 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (elfNN_aarch64_howto_table): Set overflow type to complain_overflow_unsigned for BFD_RELOC_AARCH64_TLSLE_ADD_LO12. * elfxx-aarch64.c (_bfd_aarch64_elf_resolve_relocation): Don't use PGOFF for BFD_RELOC_AARCH64_TLSLE_ADD_LO12, that will mask off all potential high overflowed bits. ld/testsuite/ * ld-aarch64/tprel_add_lo12_overflow.s: New testcase. * ld-aarch64/tprel_add_lo12_overflow.d: Nex expectation file. * ld-aarch64/aarch64-elf.exp: Run new testcase.
2015-06-01 11:31:38 +02:00
complain_overflow_unsigned, /* complain_on_overflow */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (TLSLE_ADD_TPREL_LO12), /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
0xfff, /* src_mask */
0xfff, /* dst_mask */
FALSE), /* pcrel_offset */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
HOWTO (AARCH64_R (TLSLE_ADD_TPREL_LO12_NC), /* type */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
12, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (TLSLE_ADD_TPREL_LO12_NC), /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
0xfff, /* src_mask */
0xfff, /* dst_mask */
FALSE), /* pcrel_offset */
[1/2][GAS][AARCH64]Add BFD_RELOC_AARCH64_TLSLE_LDST8/16/32/64_TPREL_LO12 support in GAS. This patch adds the following relocation support into binutils gas. BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12, BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC, BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12, BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC, BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12, BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC, BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12, BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC. Those relocations includes both ip64 and ilp32 variant.
2018-03-28 19:03:55 +02:00
/* LD/ST16: bit[11:1] of byte offset to module TLS base address. */
HOWTO (AARCH64_R (TLSLE_LDST16_TPREL_LO12), /* type */
1, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
11, /* bitsize */
FALSE, /* pc_relative */
10, /* bitpos */
complain_overflow_unsigned, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (TLSLE_LDST16_TPREL_LO12), /* name */
FALSE, /* partial_inplace */
0x1ffc00, /* src_mask */
0x1ffc00, /* dst_mask */
FALSE), /* pcrel_offset */
/* Same as BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12, but no overflow check. */
HOWTO (AARCH64_R (TLSLE_LDST16_TPREL_LO12_NC), /* type */
1, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
11, /* bitsize */
FALSE, /* pc_relative */
10, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (TLSLE_LDST16_TPREL_LO12_NC), /* name */
FALSE, /* partial_inplace */
0x1ffc00, /* src_mask */
0x1ffc00, /* dst_mask */
FALSE), /* pcrel_offset */
/* LD/ST32: bit[11:2] of byte offset to module TLS base address. */
HOWTO (AARCH64_R (TLSLE_LDST32_TPREL_LO12), /* type */
2, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
10, /* bitsize */
FALSE, /* pc_relative */
10, /* bitpos */
complain_overflow_unsigned, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (TLSLE_LDST32_TPREL_LO12), /* name */
FALSE, /* partial_inplace */
0xffc00, /* src_mask */
0xffc00, /* dst_mask */
FALSE), /* pcrel_offset */
/* Same as BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12, but no overflow check. */
HOWTO (AARCH64_R (TLSLE_LDST32_TPREL_LO12_NC), /* type */
2, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
10, /* bitsize */
FALSE, /* pc_relative */
10, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (TLSLE_LDST32_TPREL_LO12_NC), /* name */
FALSE, /* partial_inplace */
0xffc00, /* src_mask */
0xffc00, /* dst_mask */
FALSE), /* pcrel_offset */
/* LD/ST64: bit[11:3] of byte offset to module TLS base address. */
HOWTO (AARCH64_R (TLSLE_LDST64_TPREL_LO12), /* type */
3, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
9, /* bitsize */
FALSE, /* pc_relative */
10, /* bitpos */
complain_overflow_unsigned, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (TLSLE_LDST64_TPREL_LO12), /* name */
FALSE, /* partial_inplace */
0x7fc00, /* src_mask */
0x7fc00, /* dst_mask */
FALSE), /* pcrel_offset */
/* Same as BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12, but no overflow check. */
HOWTO (AARCH64_R (TLSLE_LDST64_TPREL_LO12_NC), /* type */
3, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
9, /* bitsize */
FALSE, /* pc_relative */
10, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (TLSLE_LDST64_TPREL_LO12_NC), /* name */
FALSE, /* partial_inplace */
0x7fc00, /* src_mask */
0x7fc00, /* dst_mask */
FALSE), /* pcrel_offset */
/* LD/ST8: bit[11:0] of byte offset to module TLS base address. */
HOWTO (AARCH64_R (TLSLE_LDST8_TPREL_LO12), /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
12, /* bitsize */
FALSE, /* pc_relative */
10, /* bitpos */
complain_overflow_unsigned, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (TLSLE_LDST8_TPREL_LO12), /* name */
FALSE, /* partial_inplace */
0x3ffc00, /* src_mask */
0x3ffc00, /* dst_mask */
FALSE), /* pcrel_offset */
/* Same as BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12, but no overflow check. */
HOWTO (AARCH64_R (TLSLE_LDST8_TPREL_LO12_NC), /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
12, /* bitsize */
FALSE, /* pc_relative */
10, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (TLSLE_LDST8_TPREL_LO12_NC), /* name */
FALSE, /* partial_inplace */
0x3ffc00, /* src_mask */
0x3ffc00, /* dst_mask */
FALSE), /* pcrel_offset */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
HOWTO (AARCH64_R (TLSDESC_LD_PREL19), /* type */
Fixed AArch64 TLS relocation resolution. bfd/ * elf64-aarch64.c (elf64_aarch64_tls_howto_table): Fix shift value for R_AARCH64_TLSIE_LD_GOTTPREL_PREL19, R_AARCH64_TLSLE_MOVW_TPREL_G2, R_AARCH64_TLSLE_MOVW_TPREL_G1, R_AARCH64_TLSLE_MOVW_TPREL_G1_NC, R_AARCH64_TLSLE_ADD_TPREL_HI12. (elf64_aarch64_tlsdesc_howto_table): Fix shift value for R_AARCH64_TLSDESC_LD64_PREL19 and R_AARCH64_TLSDESC_OFF_G1. (elf64_aarch64_final_link_relocate): Add signed_addend when resolving AARCH64_TLSLE_*_TPREL_* relocations. ld/testsuite/ * ld-aarch64/tlsle-symbol-offset.s: New file. * ld-aarch64/tlsle-symbol-offset.d: New file. * ld-aarch64/aarch64-elf.exp: Add tlsle-symbol-offset test.
2012-10-16 18:36:50 +02:00
2, /* rightshift */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
2, /* size (0 = byte, 1 = short, 2 = long) */
[AArch64] Add support for :tlsdesc: and TLSDESC_LD_PREL19
2015-02-18 16:37:35 +01:00
19, /* bitsize */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
TRUE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (TLSDESC_LD_PREL19), /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
[AArch64] Add support for :tlsdesc: and TLSDESC_LD_PREL19
2015-02-18 16:37:35 +01:00
0x0ffffe0, /* src_mask */
0x0ffffe0, /* dst_mask */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
TRUE), /* pcrel_offset */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
HOWTO (AARCH64_R (TLSDESC_ADR_PREL21), /* type */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
21, /* bitsize */
TRUE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (TLSDESC_ADR_PREL21), /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
0x1fffff, /* src_mask */
0x1fffff, /* dst_mask */
TRUE), /* pcrel_offset */
/* Get to the page for the GOT entry for the symbol
(G(S) - P) using an ADRP instruction. */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
HOWTO (AARCH64_R (TLSDESC_ADR_PAGE21), /* type */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
12, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
21, /* bitsize */
TRUE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (TLSDESC_ADR_PAGE21), /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
0x1fffff, /* src_mask */
0x1fffff, /* dst_mask */
TRUE), /* pcrel_offset */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
/* LD64: GOT offset G(S) & 0xff8. */
Rename R_AARCH64_TLSDESC_LD64_LO12_NC to R_AARCH64_TLSDESC_LD64_LO12 and R_AARCH64_TLSDESC_ADD_LO12_NC to R_AARCH64_TLSDESC_ADD_LO12. PR binutils/21202 include * elf/aarch64.h (R_AARCH64_TLSDESC_LD64_LO12_NC): Rename to R_AARCH64_TLSDESC_LD64_LO12. (R_AARCH64_TLSDESC_ADD_LO12_NC): Rename to R_AARCH64_TLSDESC_ADD_LO12_NC. bfd * reloc.c (BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC): Rename to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12. (BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC): Rename to BFD_RELOC_AARCH64_TLSDESC_ADD_LO12. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elfnn-aarch64.c (IS_AARCH64_TLS_RELAX_RELOC): Update reloc names. (IS_AARCH64_TLSDESC_RELOC): Likewise. (elfNN_aarch64_howto_table): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. gas * config/tc-aarch64.c (reloc_table): Rename BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12. Rname BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC to BFD_RELOC_AARCH64_TLSDESC_ADD_LO12. (md_apply_fix): Likewise. (aarch64_force_relocation): Likewise. * testsuite/gas/aarch64/tls.d: Update regexp. ld * testsuite/ld-aarch64/ifunc-5r-local.d: Update regexp.
2017-03-13 10:58:04 +01:00
HOWTO64 (AARCH64_R (TLSDESC_LD64_LO12), /* type */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
3, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
12, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
Rename R_AARCH64_TLSDESC_LD64_LO12_NC to R_AARCH64_TLSDESC_LD64_LO12 and R_AARCH64_TLSDESC_ADD_LO12_NC to R_AARCH64_TLSDESC_ADD_LO12. PR binutils/21202 include * elf/aarch64.h (R_AARCH64_TLSDESC_LD64_LO12_NC): Rename to R_AARCH64_TLSDESC_LD64_LO12. (R_AARCH64_TLSDESC_ADD_LO12_NC): Rename to R_AARCH64_TLSDESC_ADD_LO12_NC. bfd * reloc.c (BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC): Rename to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12. (BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC): Rename to BFD_RELOC_AARCH64_TLSDESC_ADD_LO12. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elfnn-aarch64.c (IS_AARCH64_TLS_RELAX_RELOC): Update reloc names. (IS_AARCH64_TLSDESC_RELOC): Likewise. (elfNN_aarch64_howto_table): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. gas * config/tc-aarch64.c (reloc_table): Rename BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12. Rname BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC to BFD_RELOC_AARCH64_TLSDESC_ADD_LO12. (md_apply_fix): Likewise. (aarch64_force_relocation): Likewise. * testsuite/gas/aarch64/tls.d: Update regexp. ld * testsuite/ld-aarch64/ifunc-5r-local.d: Update regexp.
2017-03-13 10:58:04 +01:00
AARCH64_R_STR (TLSDESC_LD64_LO12), /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
0xff8, /* src_mask */
0xff8, /* dst_mask */
FALSE), /* pcrel_offset */
/* LD32: GOT offset G(S) & 0xffc. */
HOWTO32 (AARCH64_R (TLSDESC_LD32_LO12_NC), /* type */
2, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
12, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (TLSDESC_LD32_LO12_NC), /* name */
FALSE, /* partial_inplace */
0xffc, /* src_mask */
0xffc, /* dst_mask */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE), /* pcrel_offset */
/* ADD: GOT offset G(S) & 0xfff. */
Rename R_AARCH64_TLSDESC_LD64_LO12_NC to R_AARCH64_TLSDESC_LD64_LO12 and R_AARCH64_TLSDESC_ADD_LO12_NC to R_AARCH64_TLSDESC_ADD_LO12. PR binutils/21202 include * elf/aarch64.h (R_AARCH64_TLSDESC_LD64_LO12_NC): Rename to R_AARCH64_TLSDESC_LD64_LO12. (R_AARCH64_TLSDESC_ADD_LO12_NC): Rename to R_AARCH64_TLSDESC_ADD_LO12_NC. bfd * reloc.c (BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC): Rename to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12. (BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC): Rename to BFD_RELOC_AARCH64_TLSDESC_ADD_LO12. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elfnn-aarch64.c (IS_AARCH64_TLS_RELAX_RELOC): Update reloc names. (IS_AARCH64_TLSDESC_RELOC): Likewise. (elfNN_aarch64_howto_table): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. gas * config/tc-aarch64.c (reloc_table): Rename BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12. Rname BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC to BFD_RELOC_AARCH64_TLSDESC_ADD_LO12. (md_apply_fix): Likewise. (aarch64_force_relocation): Likewise. * testsuite/gas/aarch64/tls.d: Update regexp. ld * testsuite/ld-aarch64/ifunc-5r-local.d: Update regexp.
2017-03-13 10:58:04 +01:00
HOWTO (AARCH64_R (TLSDESC_ADD_LO12), /* type */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
12, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
Rename R_AARCH64_TLSDESC_LD64_LO12_NC to R_AARCH64_TLSDESC_LD64_LO12 and R_AARCH64_TLSDESC_ADD_LO12_NC to R_AARCH64_TLSDESC_ADD_LO12. PR binutils/21202 include * elf/aarch64.h (R_AARCH64_TLSDESC_LD64_LO12_NC): Rename to R_AARCH64_TLSDESC_LD64_LO12. (R_AARCH64_TLSDESC_ADD_LO12_NC): Rename to R_AARCH64_TLSDESC_ADD_LO12_NC. bfd * reloc.c (BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC): Rename to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12. (BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC): Rename to BFD_RELOC_AARCH64_TLSDESC_ADD_LO12. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elfnn-aarch64.c (IS_AARCH64_TLS_RELAX_RELOC): Update reloc names. (IS_AARCH64_TLSDESC_RELOC): Likewise. (elfNN_aarch64_howto_table): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. gas * config/tc-aarch64.c (reloc_table): Rename BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12. Rname BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC to BFD_RELOC_AARCH64_TLSDESC_ADD_LO12. (md_apply_fix): Likewise. (aarch64_force_relocation): Likewise. * testsuite/gas/aarch64/tls.d: Update regexp. ld * testsuite/ld-aarch64/ifunc-5r-local.d: Update regexp.
2017-03-13 10:58:04 +01:00
complain_overflow_dont,/* complain_on_overflow */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
bfd_elf_generic_reloc, /* special_function */
Rename R_AARCH64_TLSDESC_LD64_LO12_NC to R_AARCH64_TLSDESC_LD64_LO12 and R_AARCH64_TLSDESC_ADD_LO12_NC to R_AARCH64_TLSDESC_ADD_LO12. PR binutils/21202 include * elf/aarch64.h (R_AARCH64_TLSDESC_LD64_LO12_NC): Rename to R_AARCH64_TLSDESC_LD64_LO12. (R_AARCH64_TLSDESC_ADD_LO12_NC): Rename to R_AARCH64_TLSDESC_ADD_LO12_NC. bfd * reloc.c (BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC): Rename to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12. (BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC): Rename to BFD_RELOC_AARCH64_TLSDESC_ADD_LO12. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elfnn-aarch64.c (IS_AARCH64_TLS_RELAX_RELOC): Update reloc names. (IS_AARCH64_TLSDESC_RELOC): Likewise. (elfNN_aarch64_howto_table): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. gas * config/tc-aarch64.c (reloc_table): Rename BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12. Rname BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC to BFD_RELOC_AARCH64_TLSDESC_ADD_LO12. (md_apply_fix): Likewise. (aarch64_force_relocation): Likewise. * testsuite/gas/aarch64/tls.d: Update regexp. ld * testsuite/ld-aarch64/ifunc-5r-local.d: Update regexp.
2017-03-13 10:58:04 +01:00
AARCH64_R_STR (TLSDESC_ADD_LO12), /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
0xfff, /* src_mask */
0xfff, /* dst_mask */
FALSE), /* pcrel_offset */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
HOWTO64 (AARCH64_R (TLSDESC_OFF_G1), /* type */
Fixed AArch64 TLS relocation resolution. bfd/ * elf64-aarch64.c (elf64_aarch64_tls_howto_table): Fix shift value for R_AARCH64_TLSIE_LD_GOTTPREL_PREL19, R_AARCH64_TLSLE_MOVW_TPREL_G2, R_AARCH64_TLSLE_MOVW_TPREL_G1, R_AARCH64_TLSLE_MOVW_TPREL_G1_NC, R_AARCH64_TLSLE_ADD_TPREL_HI12. (elf64_aarch64_tlsdesc_howto_table): Fix shift value for R_AARCH64_TLSDESC_LD64_PREL19 and R_AARCH64_TLSDESC_OFF_G1. (elf64_aarch64_final_link_relocate): Add signed_addend when resolving AARCH64_TLSLE_*_TPREL_* relocations. ld/testsuite/ * ld-aarch64/tlsle-symbol-offset.s: New file. * ld-aarch64/tlsle-symbol-offset.d: New file. * ld-aarch64/aarch64-elf.exp: Add tlsle-symbol-offset test.
2012-10-16 18:36:50 +02:00
16, /* rightshift */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
2, /* size (0 = byte, 1 = short, 2 = long) */
12, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
[GAS][AARCH64]Add TLSDESC large memory model support. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (elfNN_aarch64_howto_table): Check overflow for BFD_RELOC_AARCH64_TLSDESC_OFF_G1. gas/ 2015-10-02 Renlin Li <renlin.li@arm.com> * config/tc-aarch64.c (s_tlsdescadd): New. (s_tlsdescldr): New. (md_pseudo_table): Handle tlsdescadd and tlsdescldr pseudo ops. (reloc_table): Add entries for BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC and BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC. (process_movw_reloc_info): Support AARCH64_TLSDESC_OFF_G1 and AARCH64_TLSDESC_OFF_G0_NC. (md_apply_fix): Likewise. (aarch64_force_relocation): Likewise. gas/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * gas/aarch64/reloc-tlsdesc_off_g0_nc.d: New. * gas/aarch64/reloc-tlsdesc_off_g0_nc.s: New. * gas/aarch64/reloc-tlsdesc_off_g1.d: New. * gas/aarch64/reloc-tlsdesc_off_g1.s: New. * gas/aarch64/tls-desc.d: New. * gas/aarch64/tls-desc.s: New.
2015-10-02 18:29:33 +02:00
complain_overflow_unsigned, /* complain_on_overflow */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (TLSDESC_OFF_G1), /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
HOWTO64 (AARCH64_R (TLSDESC_OFF_G0_NC), /* type */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
12, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (TLSDESC_OFF_G0_NC), /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
HOWTO64 (AARCH64_R (TLSDESC_LDR), /* type */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
12, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (TLSDESC_LDR), /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
0x0, /* src_mask */
0x0, /* dst_mask */
FALSE), /* pcrel_offset */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
HOWTO64 (AARCH64_R (TLSDESC_ADD), /* type */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
12, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (TLSDESC_ADD), /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
0x0, /* src_mask */
0x0, /* dst_mask */
FALSE), /* pcrel_offset */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
HOWTO (AARCH64_R (TLSDESC_CALL), /* type */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
Fix field size for TLSDESC_CALL This relocation is a marker and does not result in a modification to the binary. Changing the HOWTO bit field width to reflect this property.
2015-02-18 16:08:34 +01:00
0, /* bitsize */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (TLSDESC_CALL), /* name */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
FALSE, /* partial_inplace */
0x0, /* src_mask */
0x0, /* dst_mask */
FALSE), /* pcrel_offset */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
HOWTO (AARCH64_R (COPY), /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
64, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_bitfield, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (COPY), /* name */
TRUE, /* partial_inplace */
0xffffffff, /* src_mask */
0xffffffff, /* dst_mask */
FALSE), /* pcrel_offset */
HOWTO (AARCH64_R (GLOB_DAT), /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
64, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_bitfield, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (GLOB_DAT), /* name */
TRUE, /* partial_inplace */
0xffffffff, /* src_mask */
0xffffffff, /* dst_mask */
FALSE), /* pcrel_offset */
HOWTO (AARCH64_R (JUMP_SLOT), /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
64, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_bitfield, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (JUMP_SLOT), /* name */
TRUE, /* partial_inplace */
0xffffffff, /* src_mask */
0xffffffff, /* dst_mask */
FALSE), /* pcrel_offset */
HOWTO (AARCH64_R (RELATIVE), /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
64, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_bitfield, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (RELATIVE), /* name */
TRUE, /* partial_inplace */
ALL_ONES, /* src_mask */
ALL_ONES, /* dst_mask */
FALSE), /* pcrel_offset */
HOWTO (AARCH64_R (TLS_DTPMOD), /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
64, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
bfd/ * elfnn-aarch64.c (elfNN_aarch64_howto_table): Use R_AARCH64_TLS_DTPMOD64 instead of R_AARCH64_TLS_DTPMOD; likewise for R_AARCH64_TLS_DTPREL and R_AARCH64_TLS_TPREL. include/elf/ * aarch64.h: Define R_AARCH64_TLS_DTPMOD64, R_AARCH64_TLS_DTPREL64 and R_AARCH64_TLS_TPREL64; guard R_AARCH64_TLS_DTPMOD, R_AARCH64_TLS_DTPREL and R_AARCH64_TLS_TPREL with RELOC_MACROS_GEN_FUNC.
2013-11-13 15:47:04 +01:00
#if ARCH_SIZE == 64
AARCH64_R_STR (TLS_DTPMOD64), /* name */
#else
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (TLS_DTPMOD), /* name */
bfd/ * elfnn-aarch64.c (elfNN_aarch64_howto_table): Use R_AARCH64_TLS_DTPMOD64 instead of R_AARCH64_TLS_DTPMOD; likewise for R_AARCH64_TLS_DTPREL and R_AARCH64_TLS_TPREL. include/elf/ * aarch64.h: Define R_AARCH64_TLS_DTPMOD64, R_AARCH64_TLS_DTPREL64 and R_AARCH64_TLS_TPREL64; guard R_AARCH64_TLS_DTPMOD, R_AARCH64_TLS_DTPREL and R_AARCH64_TLS_TPREL with RELOC_MACROS_GEN_FUNC.
2013-11-13 15:47:04 +01:00
#endif
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
FALSE, /* partial_inplace */
0, /* src_mask */
ALL_ONES, /* dst_mask */
FALSE), /* pc_reloffset */
HOWTO (AARCH64_R (TLS_DTPREL), /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
64, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
bfd/ * elfnn-aarch64.c (elfNN_aarch64_howto_table): Use R_AARCH64_TLS_DTPMOD64 instead of R_AARCH64_TLS_DTPMOD; likewise for R_AARCH64_TLS_DTPREL and R_AARCH64_TLS_TPREL. include/elf/ * aarch64.h: Define R_AARCH64_TLS_DTPMOD64, R_AARCH64_TLS_DTPREL64 and R_AARCH64_TLS_TPREL64; guard R_AARCH64_TLS_DTPMOD, R_AARCH64_TLS_DTPREL and R_AARCH64_TLS_TPREL with RELOC_MACROS_GEN_FUNC.
2013-11-13 15:47:04 +01:00
#if ARCH_SIZE == 64
AARCH64_R_STR (TLS_DTPREL64), /* name */
#else
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (TLS_DTPREL), /* name */
bfd/ * elfnn-aarch64.c (elfNN_aarch64_howto_table): Use R_AARCH64_TLS_DTPMOD64 instead of R_AARCH64_TLS_DTPMOD; likewise for R_AARCH64_TLS_DTPREL and R_AARCH64_TLS_TPREL. include/elf/ * aarch64.h: Define R_AARCH64_TLS_DTPMOD64, R_AARCH64_TLS_DTPREL64 and R_AARCH64_TLS_TPREL64; guard R_AARCH64_TLS_DTPMOD, R_AARCH64_TLS_DTPREL and R_AARCH64_TLS_TPREL with RELOC_MACROS_GEN_FUNC.
2013-11-13 15:47:04 +01:00
#endif
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
FALSE, /* partial_inplace */
0, /* src_mask */
ALL_ONES, /* dst_mask */
FALSE), /* pcrel_offset */
HOWTO (AARCH64_R (TLS_TPREL), /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
64, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
bfd/ * elfnn-aarch64.c (elfNN_aarch64_howto_table): Use R_AARCH64_TLS_DTPMOD64 instead of R_AARCH64_TLS_DTPMOD; likewise for R_AARCH64_TLS_DTPREL and R_AARCH64_TLS_TPREL. include/elf/ * aarch64.h: Define R_AARCH64_TLS_DTPMOD64, R_AARCH64_TLS_DTPREL64 and R_AARCH64_TLS_TPREL64; guard R_AARCH64_TLS_DTPMOD, R_AARCH64_TLS_DTPREL and R_AARCH64_TLS_TPREL with RELOC_MACROS_GEN_FUNC.
2013-11-13 15:47:04 +01:00
#if ARCH_SIZE == 64
AARCH64_R_STR (TLS_TPREL64), /* name */
#else
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
AARCH64_R_STR (TLS_TPREL), /* name */
bfd/ * elfnn-aarch64.c (elfNN_aarch64_howto_table): Use R_AARCH64_TLS_DTPMOD64 instead of R_AARCH64_TLS_DTPMOD; likewise for R_AARCH64_TLS_DTPREL and R_AARCH64_TLS_TPREL. include/elf/ * aarch64.h: Define R_AARCH64_TLS_DTPMOD64, R_AARCH64_TLS_DTPREL64 and R_AARCH64_TLS_TPREL64; guard R_AARCH64_TLS_DTPMOD, R_AARCH64_TLS_DTPREL and R_AARCH64_TLS_TPREL with RELOC_MACROS_GEN_FUNC.
2013-11-13 15:47:04 +01:00
#endif
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
FALSE, /* partial_inplace */
0, /* src_mask */
ALL_ONES, /* dst_mask */
FALSE), /* pcrel_offset */
HOWTO (AARCH64_R (TLSDESC), /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
64, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (TLSDESC), /* name */
FALSE, /* partial_inplace */
0, /* src_mask */
ALL_ONES, /* dst_mask */
FALSE), /* pcrel_offset */
HOWTO (AARCH64_R (IRELATIVE), /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
64, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_bitfield, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (IRELATIVE), /* name */
FALSE, /* partial_inplace */
0, /* src_mask */
ALL_ONES, /* dst_mask */
FALSE), /* pcrel_offset */
EMPTY_HOWTO (0),
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
};
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
static reloc_howto_type elfNN_aarch64_howto_none =
HOWTO (R_AARCH64_NONE, /* type */
0, /* rightshift */
Fallout from recent bfd_reloc_outofrange changes Commit ec93045b and cd21f5da introduced a large number of tic4x and tic54x regressions, due to the new checks being wrong for targets with octets_per_byte != 1. To fix that I introduced a new bfd_get_section_limit_octets and performed the check on octets rather than byte adresses, reducing the number of bfd_octets_per_byte calls. bfd_octets_per_byte is rather expensive.. I then wondered why the same bfd_reloc_outofrange check added to bfd_perform_relocation wasn't also added to bfd_install_relocation. The two functions are virtually identical and ought to remain that way. However, adding the same check to bfd_install_relocation resulted in ld-elf "FAIL Link eh-group.o to eh-group" on many ELF targets, including x64_64-linux. The reason being that eh-group.o has NONE relocs at the end of a section, and most targets give NONE relocs a non-zero size. So if we are to keep the new outofrange check it appears that NONE relocs must have a zero size. * bfd-in.h (bfd_get_section_limit_octets): New define, extracted from.. (bfd_get_section_limit): ..here. * reloc.c (bfd_perform_relocation): Correct bfd_reloc_outofrange check. (bfd_install_relocation, _bfd_final_link_relocate): Add same check here. * elf32-sh.c (sh_elf_reloc): Correct bfd_reloc_outofrange check. * elf32-ppc.c (ppc_elf_addr16_ha_reloc): Remove duplicated bfd_reloc_outofrange check. * bfd-in2.h: Regenerate. * cpu-ns32k.c (_bfd_do_ns32k_reloc_contents): Return bfd_reloc_ok on zero size relocs. * ecoff.c (ecoff_reloc_link_order): Likewise. * elf32-nds32.c (nds32_relocate_contents): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. * reloc.c (_bfd_relocate_contents): Don't bomb on zero size relocs. (_bfd_clear_contents): Likewise. * elfxx-mips.c (mips_elf_obtain_contents): Likewise. (mips_elf_perform_relocation): Likewise. * aoutx.h (aout_link_reloc_link_order): Allow for NULL return from malloc on zero size alloc. * cofflink.c (_bfd_coff_reloc_link_order): Likewise. * elflink.c (elf_reloc_link_order): Likewise. * linker.c (_bfd_generic_reloc_link_order): Likewise. * pdp11.c (aout_link_reloc_link_order): Likewise. * xcofflink.c (xcoff_reloc_link_order): Likewise. * aoutx.h (howto_table_ext): Ensure NONE relocs have size 3, bitsize 0, and complain_overflow_dont. * coff-sparc.c (coff_sparc_howto_table): Likewise. * elf-hppa.h (elf_hppa_howto_table): Likewise. * elf-m10200.c (elf_mn10200_howto_table): Likewise. * elf-m10300.c (elf_mn10300_howto_table): Likewise. * elf32-arc.c (elf_arc_howto_table): Likewise. * elf32-arm.c (elf32_arm_howto_table_1): Likewise. * elf32-avr.c (elf_avr_howto_table): Likewise. * elf32-bfin.c (bfin_howto_table): Likewise. * elf32-cr16.c (cr16_elf_howto_table): Likewise. * elf32-cris.c (cris_elf_howto_table): Likewise. * elf32-crx.c (crx_elf_howto_table): Likewise. * elf32-d10v.c (elf_d10v_howto_table): Likewise. * elf32-d30v.c (elf_d30v_howto_table): Likewise. * elf32-dlx.c (dlx_elf_howto_table): Likewise. * elf32-epiphany.c (epiphany_elf_howto_table): Likewise. * elf32-fr30.c (fr30_elf_howto_table): Likewise. * elf32-frv.c (elf32_frv_howto_table): Likewise. * elf32-h8300.c (h8_elf_howto_table): Likewise. * elf32-i370.c (i370_elf_howto_raw): Likewise. * elf32-i386.c (elf_howto_table): Likewise. * elf32-i860.c (elf32_i860_howto_table): Likewise. * elf32-i960.c (elf32_i960_relocate): Likewise. * elf32-ip2k.c (ip2k_elf_howto_table): Likewise. * elf32-iq2000.c (iq2000_elf_howto_table): Likewise. * elf32-lm32.c (lm32_elf_howto_table): Likewise. * elf32-m32c.c (m32c_elf_howto_table): Likewise. * elf32-m32r.c (m32r_elf_howto_table): Likewise. * elf32-m68hc11.c (elf_m68hc11_howto_table): Likewise. * elf32-m68hc12.c (elf_m68hc11_howto_table): Likewise. * elf32-m68k.c (howto_table): Likewise. * elf32-mcore.c (mcore_elf_howto_raw): Likewise. * elf32-mep.c (mep_elf_howto_table): Likewise. * elf32-metag.c (elf_metag_howto_table): Likewise. * elf32-microblaze.c (microblaze_elf_howto_raw): Likewise. * elf32-mips.c (elf_mips_howto_table_rel): Likewise. * elf32-moxie.c (moxie_elf_howto_table): Likewise. * elf32-msp430.c (elf_msp430_howto_table): Likewise. * elf32-mt.c (mt_elf_howto_table): Likewise. * elf32-nds32.c (nds32_elf_howto_table): Likewise. * elf32-nios2.c (elf_nios2_howto_table_rel): Likewise. * elf32-or1k.c (or1k_elf_howto_table): Likewise. * elf32-pj.c (pj_elf_howto_table): Likewise. * elf32-ppc.c (ppc_elf_howto_raw): Likewise. * elf32-rl78.c (rl78_elf_howto_table): Likewise. * elf32-rx.c (rx_elf_howto_table): Likewise. * elf32-s390.c (elf_howto_table): Likewise. * elf32-score.c (elf32_score_howto_table): Likewise. * elf32-score7.c (elf32_score_howto_table): Likewise. * elf32-sh-relocs.h (R_SH_NONE): Likewise. * elf32-spu.c (elf_howto_table): Likewise. * elf32-tic6x.c (elf32_tic6x_howto_table): Likewise. * elf32-tilepro.c (tilepro_elf_howto_table): Likewise. * elf32-v850.c (v850_elf_howto_table): Likewise. * elf32-vax.c (howto_table): Likewise. * elf32-visium.c (visium_elf_howto_table): Likewise. * elf32-xc16x.c (xc16x_elf_howto_table): Likewise. * elf32-xgate.c (elf_xgate_howto_table): Likewise. * elf32-xstormy16.c (xstormy16_elf_howto_table): Likewise. * elf32-xtensa.c (elf_howto_table): Likewise. * elf64-alpha.c (elf64_alpha_howto_table): Likewise. * elf64-mips.c (mips_elf64_howto_table_rel): Likewise. * elf64-mmix.c (elf_mmix_howto_table): Likewise. * elf64-ppc.c (ppc64_elf_howto_raw): Likewise. * elf64-s390.c (elf_howto_table): Likewise. * elf64-sh64.c (sh_elf64_howto_table): Likewise. * elf64-x86-64.c (x86_64_elf_howto_table): Likewise. * elfn32-mips.c (elf_mips_howto_table_rel): Likewise. * elfnn-aarch64.c (elfNN_aarch64_howto_table): Likewise. (elfNN_aarch64_howto_none): Likewise. * elfxx-ia64.c (ia64_howto_table): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_howto_table): Likewise. * elfxx-tilegx.c (tilegx_elf_howto_table): Likewise. * nlm32-sparc.c (nlm32_sparc_howto_table): Likewise.
2015-01-19 01:06:26 +01:00
3, /* size (0 = byte, 1 = short, 2 = long) */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
0, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont,/* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_AARCH64_NONE", /* name */
FALSE, /* partial_inplace */
0, /* src_mask */
0, /* dst_mask */
FALSE); /* pcrel_offset */
/* Given HOWTO, return the bfd internal relocation enumerator. */
static bfd_reloc_code_real_type
elfNN_aarch64_bfd_reloc_from_howto (reloc_howto_type *howto)
{
const int size
= (int) ARRAY_SIZE (elfNN_aarch64_howto_table);
const ptrdiff_t offset
= howto - elfNN_aarch64_howto_table;
if (offset > 0 && offset < size - 1)
return BFD_RELOC_AARCH64_RELOC_START + offset;
if (howto == &elfNN_aarch64_howto_none)
return BFD_RELOC_AARCH64_NONE;
return BFD_RELOC_AARCH64_RELOC_START;
}
/* Given R_TYPE, return the bfd internal relocation enumerator. */
static bfd_reloc_code_real_type
unrecognized/unsupported reloc message It must get boring translating all the variants we have of unrecognized/unsupported/invalid/unexpected reloc number. This patch cuts down on the number of variations. * aoutx.h, * coff-alpha.c, * coff-i860.c, * coff-m68k.c, * coff-mcore.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-w65.c, * elf-bfd.h, * elf-m10300.c, * elf.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-i370.c, * elf32-i386.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-iq2000.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-sh.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-v850.c, * elf32-vax.c, * elf32-visium.c, * elf32-wasm32.c, * elf32-xgate.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sparc.c, * elf64-x86-64.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-riscv.h, * elfxx-sparc.c, * elfxx-sparc.h, * reloc.c: Standardize unrecognized/unsupported reloc message.
2018-02-21 12:17:07 +01:00
elfNN_aarch64_bfd_reloc_from_type (bfd *abfd, unsigned int r_type)
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
{
static bfd_boolean initialized_p = FALSE;
/* Indexed by R_TYPE, values are offsets in the howto_table. */
static unsigned int offsets[R_AARCH64_end];
Don't compare boolean values against TRUE or FALSE bfd/ * arc-got.h: Don't compare boolean values against TRUE or FALSE. * elf-m10300.c: Likewise. * elf.c: Likewise. * elf32-arc.c: Likewise. * elf32-bfin.c: Likewise. * elf32-m68k.c: Likewise. * elf32-nds32.c: Likewise. * elf32-tilepro.c: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-riscv.c: Likewise. * elfxx-tilegx.c: Likewise. * mach-o.c: Likewise. * peXXigen.c: Likewise. * vms-alpha.c: Likewise. * vms-lib.c: Likewise. opcodes/ * aarch64-asm.c: Don't compare boolean values against TRUE or FALSE. * aarch64-dis.c: Likewise. * aarch64-gen.c: Likewise. * aarch64-opc.c: Likewise. binutils/ * strings.c: Don't compare boolean values against TRUE or FALSE. gas/ * config/tc-aarch64.c: Don't compare booleans against TRUE or FALSE. * config/tc-hppa.c: Likewise. * config/tc-mips.c: Likewise. * config/tc-score7.c: Likewise. ld/ * emultempl/elf32.em: Don't compare boolean values against TRUE or FALSE. * emultempl/pe.em: Likewise. * emultempl/pep.em: Likewise. * emultempl/xtensaelf.em: Likewise.
2017-05-18 07:17:40 +02:00
if (!initialized_p)
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
{
unsigned int i;
for (i = 1; i < ARRAY_SIZE (elfNN_aarch64_howto_table) - 1; ++i)
if (elfNN_aarch64_howto_table[i].type != 0)
offsets[elfNN_aarch64_howto_table[i].type] = i;
initialized_p = TRUE;
}
if (r_type == R_AARCH64_NONE || r_type == R_AARCH64_NULL)
return BFD_RELOC_AARCH64_NONE;
More fixes for memory access violations exposed by fuzzed binaries. PR binutils/17512 * archive.c (do_slurp_bsd_armap): Return if the parsed_size is zero. (bfd_slurp_armap): Zero terminate the name. (bfd_generic_stat_arch_elt): If there is no header, fail. * elf32-arc.c (arc_info_to_howto_rel): Replace BFD_ASSERT with error message. * elf32-avr.c (avr_info_to_howto_rela): Likewise. * elf32-cr16c.c (elf_cr16c_info_to_howto_rel): Likewise. * elf32-cris.c (cris_info_to_howto_rela): Likewise. * elf32-d10v.c (d10v_info_to_howto_rel): Likewise. * elf32-d30v.c (d30v_info_to_howto_rel): Likewise. * elf32-dlx.c (dlx_rtype_to_howto): Likewise. * elf32-epiphany.c (epiphany_info_to_howto_rela): Likewise. * elf32-fr30.c (fr30_info_to_howto_rela): Likewise. * elf32-frv.c (frv_info_to_howto_rela): Likewise. * elf32-i960.c (elf32_i960_info_to_howto_rel): Likewise. * elf32-ip2k.c (ip2k_info_to_howto_rela): Likewise. * elf32-iq2000.c (iq2000_info_to_howto_rela): Likewise. * elf32-lm32.c (lm32_info_to_howto_rela): Likewise. * elf32-m32c.c (m32c_info_to_howto_rela): Likewise. * elf32-m32r.c (m32r_info_to_howto_rel): Likewise. * elf32-m68hc11.c (m68hc11_info_to_howto_rel): Likewise. * elf32-m68hc12.c (m68hc11_info_to_howto_rel): Likewise. * elf32-mep.c (mep_info_to_howto_rela): Likewise. * elf32-metag.c (metag_info_to_howto_rela): Likewise. * elf32-moxie.c (moxie_info_to_howto_rela): Likewise. * elf32-msp430.c (msp430_info_to_howto_rela): Likewise. * elf32-mt.c (mt_info_to_howto_rela): Likewise. * elf32-nds32.c (nds32_info_to_howto_rel): Likewise. * elf32-or1k.c (or1k_info_to_howto_rela): Likewise. * elf32-rl78.c (rl78_info_to_howto_rela): Likewise. * elf32-rx.c (rx_info_to_howto_rela): Likewise. * elf32-v850.c (v850_elf_info_to_howto_rel): Likewise. * elf32-visium.c (visium_info_to_howto_rela): Likewise. * elf32-xgate.c (xgate_info_to_howto_rel): Likewise. * elf32-xtensa.c (elf_xtensa_info_to_howto_rela): Likewise. * elf64-mmix.c (mmix_info_to_howto_rela): Likewise. * elf64-x86-64.c (elf_x86_64_reloc_type_lookup): Likewise. * elfnn-aarch64.c (elfNN_aarch64_bfd_reloc_from_type): Likewise. * elf64-sparc.c (elf64_sparc_slurp_one_reloc_table): Add range checking of reloc symbol index. * mach-o.c (bfd_mach_o_canonicalize_one_reloc): If no symbols have been provided then set the reloc's symbol to undefined. * reloc.c (bfd_generic_get_relocated_section_contents): Add range checking of the reloc to be applied. * versados.c (process_otr): Add more range checks. (versados_canonicalize_reloc): If the section is unknown, set the symbol to undefined. * vms-alpha.c (_bfd_vms_slurp_eisd): Add range checks. (alpha_vms_object_p): Likewise.
2014-12-22 21:59:00 +01:00
/* PR 17512: file: b371e70a. */
if (r_type >= R_AARCH64_end)
{
unrecognized/unsupported reloc message It must get boring translating all the variants we have of unrecognized/unsupported/invalid/unexpected reloc number. This patch cuts down on the number of variations. * aoutx.h, * coff-alpha.c, * coff-i860.c, * coff-m68k.c, * coff-mcore.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-w65.c, * elf-bfd.h, * elf-m10300.c, * elf.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-i370.c, * elf32-i386.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-iq2000.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-sh.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-v850.c, * elf32-vax.c, * elf32-visium.c, * elf32-wasm32.c, * elf32-xgate.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sparc.c, * elf64-x86-64.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-riscv.h, * elfxx-sparc.c, * elfxx-sparc.h, * reloc.c: Standardize unrecognized/unsupported reloc message.
2018-02-21 12:17:07 +01:00
_bfd_error_handler (_("%pB: unsupported relocation type %#x"),
abfd, r_type);
More fixes for memory access violations exposed by fuzzed binaries. PR binutils/17512 * archive.c (do_slurp_bsd_armap): Return if the parsed_size is zero. (bfd_slurp_armap): Zero terminate the name. (bfd_generic_stat_arch_elt): If there is no header, fail. * elf32-arc.c (arc_info_to_howto_rel): Replace BFD_ASSERT with error message. * elf32-avr.c (avr_info_to_howto_rela): Likewise. * elf32-cr16c.c (elf_cr16c_info_to_howto_rel): Likewise. * elf32-cris.c (cris_info_to_howto_rela): Likewise. * elf32-d10v.c (d10v_info_to_howto_rel): Likewise. * elf32-d30v.c (d30v_info_to_howto_rel): Likewise. * elf32-dlx.c (dlx_rtype_to_howto): Likewise. * elf32-epiphany.c (epiphany_info_to_howto_rela): Likewise. * elf32-fr30.c (fr30_info_to_howto_rela): Likewise. * elf32-frv.c (frv_info_to_howto_rela): Likewise. * elf32-i960.c (elf32_i960_info_to_howto_rel): Likewise. * elf32-ip2k.c (ip2k_info_to_howto_rela): Likewise. * elf32-iq2000.c (iq2000_info_to_howto_rela): Likewise. * elf32-lm32.c (lm32_info_to_howto_rela): Likewise. * elf32-m32c.c (m32c_info_to_howto_rela): Likewise. * elf32-m32r.c (m32r_info_to_howto_rel): Likewise. * elf32-m68hc11.c (m68hc11_info_to_howto_rel): Likewise. * elf32-m68hc12.c (m68hc11_info_to_howto_rel): Likewise. * elf32-mep.c (mep_info_to_howto_rela): Likewise. * elf32-metag.c (metag_info_to_howto_rela): Likewise. * elf32-moxie.c (moxie_info_to_howto_rela): Likewise. * elf32-msp430.c (msp430_info_to_howto_rela): Likewise. * elf32-mt.c (mt_info_to_howto_rela): Likewise. * elf32-nds32.c (nds32_info_to_howto_rel): Likewise. * elf32-or1k.c (or1k_info_to_howto_rela): Likewise. * elf32-rl78.c (rl78_info_to_howto_rela): Likewise. * elf32-rx.c (rx_info_to_howto_rela): Likewise. * elf32-v850.c (v850_elf_info_to_howto_rel): Likewise. * elf32-visium.c (visium_info_to_howto_rela): Likewise. * elf32-xgate.c (xgate_info_to_howto_rel): Likewise. * elf32-xtensa.c (elf_xtensa_info_to_howto_rela): Likewise. * elf64-mmix.c (mmix_info_to_howto_rela): Likewise. * elf64-x86-64.c (elf_x86_64_reloc_type_lookup): Likewise. * elfnn-aarch64.c (elfNN_aarch64_bfd_reloc_from_type): Likewise. * elf64-sparc.c (elf64_sparc_slurp_one_reloc_table): Add range checking of reloc symbol index. * mach-o.c (bfd_mach_o_canonicalize_one_reloc): If no symbols have been provided then set the reloc's symbol to undefined. * reloc.c (bfd_generic_get_relocated_section_contents): Add range checking of the reloc to be applied. * versados.c (process_otr): Add more range checks. (versados_canonicalize_reloc): If the section is unknown, set the symbol to undefined. * vms-alpha.c (_bfd_vms_slurp_eisd): Add range checks. (alpha_vms_object_p): Likewise.
2014-12-22 21:59:00 +01:00
bfd_set_error (bfd_error_bad_value);
return BFD_RELOC_AARCH64_NONE;
}
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
return BFD_RELOC_AARCH64_RELOC_START + offsets[r_type];
}
struct elf_aarch64_reloc_map
{
bfd_reloc_code_real_type from;
bfd_reloc_code_real_type to;
};
/* Map bfd generic reloc to AArch64-specific reloc. */
static const struct elf_aarch64_reloc_map elf_aarch64_reloc_map[] =
{
{BFD_RELOC_NONE, BFD_RELOC_AARCH64_NONE},
/* Basic data relocations. */
{BFD_RELOC_CTOR, BFD_RELOC_AARCH64_NN},
{BFD_RELOC_64, BFD_RELOC_AARCH64_64},
{BFD_RELOC_32, BFD_RELOC_AARCH64_32},
{BFD_RELOC_16, BFD_RELOC_AARCH64_16},
{BFD_RELOC_64_PCREL, BFD_RELOC_AARCH64_64_PCREL},
{BFD_RELOC_32_PCREL, BFD_RELOC_AARCH64_32_PCREL},
{BFD_RELOC_16_PCREL, BFD_RELOC_AARCH64_16_PCREL},
};
/* Given the bfd internal relocation enumerator in CODE, return the
corresponding howto entry. */
static reloc_howto_type *
elfNN_aarch64_howto_from_bfd_reloc (bfd_reloc_code_real_type code)
{
unsigned int i;
/* Convert bfd generic reloc to AArch64-specific reloc. */
if (code < BFD_RELOC_AARCH64_RELOC_START
|| code > BFD_RELOC_AARCH64_RELOC_END)
for (i = 0; i < ARRAY_SIZE (elf_aarch64_reloc_map); i++)
if (elf_aarch64_reloc_map[i].from == code)
{
code = elf_aarch64_reloc_map[i].to;
break;
}
if (code > BFD_RELOC_AARCH64_RELOC_START
&& code < BFD_RELOC_AARCH64_RELOC_END)
if (elfNN_aarch64_howto_table[code - BFD_RELOC_AARCH64_RELOC_START].type)
return &elfNN_aarch64_howto_table[code - BFD_RELOC_AARCH64_RELOC_START];
2013-07-27 Andrew Pinski <apinski@cavium.com> * elfnn-aarch64.c (elfNN_aarch64_howto_from_bfd_reloc): Handle BFD_RELOC_AARCH64_NONE explicitly.
2013-07-28 01:58:43 +02:00
if (code == BFD_RELOC_AARCH64_NONE)
return &elfNN_aarch64_howto_none;
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
return NULL;
}
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
static reloc_howto_type *
unrecognized/unsupported reloc message It must get boring translating all the variants we have of unrecognized/unsupported/invalid/unexpected reloc number. This patch cuts down on the number of variations. * aoutx.h, * coff-alpha.c, * coff-i860.c, * coff-m68k.c, * coff-mcore.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-w65.c, * elf-bfd.h, * elf-m10300.c, * elf.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-i370.c, * elf32-i386.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-iq2000.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-sh.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-v850.c, * elf32-vax.c, * elf32-visium.c, * elf32-wasm32.c, * elf32-xgate.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sparc.c, * elf64-x86-64.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-riscv.h, * elfxx-sparc.c, * elfxx-sparc.h, * reloc.c: Standardize unrecognized/unsupported reloc message.
2018-02-21 12:17:07 +01:00
elfNN_aarch64_howto_from_type (bfd *abfd, unsigned int r_type)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
bfd_reloc_code_real_type val;
reloc_howto_type *howto;
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
#if ARCH_SIZE == 32
if (r_type > 256)
{
bfd_set_error (bfd_error_bad_value);
return NULL;
}
#endif
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
if (r_type == R_AARCH64_NONE)
return &elfNN_aarch64_howto_none;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
unrecognized/unsupported reloc message It must get boring translating all the variants we have of unrecognized/unsupported/invalid/unexpected reloc number. This patch cuts down on the number of variations. * aoutx.h, * coff-alpha.c, * coff-i860.c, * coff-m68k.c, * coff-mcore.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-w65.c, * elf-bfd.h, * elf-m10300.c, * elf.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-i370.c, * elf32-i386.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-iq2000.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-sh.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-v850.c, * elf32-vax.c, * elf32-visium.c, * elf32-wasm32.c, * elf32-xgate.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sparc.c, * elf64-x86-64.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-riscv.h, * elfxx-sparc.c, * elfxx-sparc.h, * reloc.c: Standardize unrecognized/unsupported reloc message.
2018-02-21 12:17:07 +01:00
val = elfNN_aarch64_bfd_reloc_from_type (abfd, r_type);
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
howto = elfNN_aarch64_howto_from_bfd_reloc (val);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
if (howto != NULL)
return howto;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
bfd_set_error (bfd_error_bad_value);
return NULL;
}
Have info_to_howto functions return a success/fail status. Check this result. Stop strip from completeing if one of these functions fails. bfd PR 22875 * elf-bfd.h (struct elf_backend_data): Change the return type of the elf_info_to_howto and elf_info_to_howto_rel function pointers to bfd_boolean. * elfcode.h (elf_slurp_reloc_table_from_section): Check the return value from the info_to_howto function and fail if that function failed. * elf32-h8300.c (elf32_h8_relocate_section): Check return value from the info_to_howto function. (elf32_h8_relax_section): Likewise. * elf32-lm32.c (lm32_elf_relocate_section): Likewise. * elf32-m68hc1x.c (elf32_m68hc11_relocate_section): Likewise. * elf32-score.c (s3_bfd_score_elf_relocate_section): Likewise. * elf32-score7.c (s7_bfd_score_elf_relocate_section): Likewise. * elf32-tic6x.c (elf32_tic6x_relocate_section): Likewise. * elf64-ia64-vms.c (elf64_ia64_relocate_section): Likewise. * elf64-sparc.c (elf64_sparc_slurp_one_reloc_table): Likewise. * elf64-x86-64.c (elf_x86_64_tls_transition): Likewise. * elfnn-ia64.c (elfNN_ia64_relocate_section): Likewise. * elfnn-riscv.c (riscv_elf_check_relocs): Likewise. (riscv_elf_relocate_section): Likewise. * elf-hppa.h (elf_hppa_info_to_howto): Change return type to bfd_boolean. Issue an error message, set an error value and return FALSE if the reloc is not recognized. (elf_hppa_info_to_howto_rel): Likewise. * elf-m10200.c (mn10200_info_to_howto): Likewise. * elf-m10300.c (mn10300_info_to_howto): Likewise. * elf.c (_bfd_elf_no_info_to_howto): Likewise. * elf32-arc.c (arc_info_to_howto_rel): Likewise. * elf32-arm.c (elf32_arm_info_to_howto): Likewise. * elf32-avr.c (avr_info_to_howto_rela): Likewise. * elf32-bfin.c (bfin_info_to_howto): Likewise. * elf32-cr16.c (elf_cr16_info_to_howto): Likewise. * elf32-cr16c.c (elf_cr16c_info_to_howto): Likewise. * elf32-cris.c (elf_cr16c_info_to_howto_rel, cris_info_to_howto_rela): Likewise. * elf32-crx.c (elf_crx_info_to_howto): Likewise. * elf32-d10v.c (d10v_info_to_howto_rel): Likewise. * elf32-d30v.c (d30v_info_to_howto_rel, d30v_info_to_howto_rela): Likewise. * elf32-dlx.c (dlx_rtype_to_howto, elf32_dlx_info_to_howto, elf32_dlx_info_to_howto_rel): Likewise. * elf32-epiphany.c (epiphany_info_to_howto_rela): Likewise. * elf32-fr30.c (fr30_info_to_howto_rela): Likewise. * elf32-frv.c (frv_info_to_howto_rela, frvfdpic_info_to_howto_rel): Likewise. * elf32-ft32.c (ft32_info_to_howto_rela): Likewise. * elf32-gen.c (elf_generic_info_to_howto, elf_generic_info_to_howto_rel): Likewise. * elf32-h8300.c (elf32_h8_info_to_howto, elf32_h8_info_to_howto_rel): Likewise. * elf32-i370.c (i370_elf_info_to_howto): Likewise. * elf32-i386.c (elf_i386_reloc_type_lookup, elf_i386_rtype_to_howto, elf_i386_info_to_howto_rel): Likewise. * elf32-i860.c (lookup_howto, elf32_i860_info_to_howto_rela): Likewise. * elf32-i960.c (elf32_i960_info_to_howto_rel): Likewise. * elf32-ip2k.c (ip2k_info_to_howto_rela): Likewise. * elf32-iq2000.c (iq2000_info_to_howto_rela): Likewise. * elf32-lm32.c (lm32_info_to_howto_rela): Likewise. * elf32-m32c.c (m32c_info_to_howto_rela): Likewise. * elf32-m32r.c (m32r_info_to_howto_rel, m32r_info_to_howto): Likewise. * elf32-m68hc11.c (m68hc11_info_to_howto_rel): Likewise. * elf32-m68hc12.c (m68hc11_info_to_howto_rel): Likewise. * elf32-m68k.c (rtype_to_howto): Likewise. * elf32-mcore.c (mcore_elf_info_to_howto): Likewise. * elf32-mep.c (mep_info_to_howto_rela): Likewise. * elf32-metag.c (metag_info_to_howto_rela): Likewise. * elf32-microblaze.c (microblaze_elf_info_to_howto): Likewise. * elf32-mips.c (mips_info_to_howto_rel, mips_info_to_howto_rela): Likewise. * elf32-moxie.c (moxie_info_to_howto_rela): Likewise. * elf32-msp430.c (msp430_info_to_howto_rela): Likewise. * elf32-mt.c (mt_info_to_howto_rela): Likewise. * elf32-nds32.c (nds32_info_to_howto_rel, nds32_info_to_howto): Likewise. * elf32-nios2.c (nios2_elf32_info_to_howto): Likewise. * elf32-or1k.c (or1k_info_to_howto_rela): Likewise. * elf32-pj.c (pj_elf_info_to_howto): Likewise. * elf32-ppc.c (ppc_elf_info_to_howto): Likewise. * elf32-pru.c (pru_elf32_info_to_howto): Likewise. * elf32-rl78.c (rl78_info_to_howto_rela): Likewise. * elf32-rx.c (rx_info_to_howto_rela): Likewise. * elf32-s390.c (elf_s390_info_to_howto): Likewise. * elf32-score.c (s3_bfd_score_info_to_howto, _bfd_score_info_to_howto): Likewise. * elf32-score7.c (s7_bfd_score_info_to_howto): Likewise. * elf32-sh.c (sh_elf_info_to_howto): Likewise. * elf32-spu.c (spu_elf_info_to_howto): Likewise. * elf32-tic6x.c (elf32_tic6x_info_to_howto, elf32_tic6x_info_to_howto_rel): Likewise. * elf32-tilepro.c (tilepro_info_to_howto_rela): Likewise. * elf32-v850.c (v850_elf_info_to_howto_rel, v850_elf_info_to_howto_rela, v800_elf_info_to_howto): Likewise. * elf32-vax.c (rtype_to_howto): Likewise. * elf32-visium.c (visium_info_to_howto_rela): Likewise. * elf32-wasm32.c (elf32_wasm32_rtype_to_howto, elf32_wasm32_info_to_howto_rela): Likewise. * elf32-xc16x.c (elf32_xc16x_info_to_howto): Likewise. * elf32-xgate.c (xgate_info_to_howto_rel): Likewise. * elf32-xstormy16.c (xstormy16_info_to_howto_rela): Likewise. * elf32-xtensa.c (elf_xtensa_info_to_howto_rela): Likewise. * elf64-alpha.c (elf64_alpha_info_to_howto): Likewise. * elf64-gen.c (elf_generic_info_to_howto, elf_generic_info_to_howto_rel): Likewise. * elf64-ia64-vms.c (elf64_ia64_info_to_howto): Likewise. * elf64-mips.c (mips_elf64_info_to_howto_rela): Likewise. * elf64-mmix.c (mmix_info_to_howto_rela): Likewise. * elf64-ppc.c (ppc64_elf_info_to_howto): Likewise. * elf64-s390.c (elf_s390_reloc_type_lookup): Likewise. * elf64-sh64.c (elf_s390_info_to_howto, sh_elf64_info_to_howto): Likewise. * elf64-x86-64.c (elf_x86_64_info_to_howto): Likewise. * elfn32-mips.c (mips_info_to_howto_rel, mips_info_to_howto_rela): Likewise. * elfnn-aarch64.c (elfNN_aarch64_info_to_howto): Likewise. * elfnn-ia64.c (elfNN_ia64_info_to_howto): Likewise. * elfnn-riscv.c (riscv_info_to_howto_rela): Likewise. * elfxx-ia64.c (ia64_elf_reloc_type_lookup): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_info_to_howto): Likewise. * elfxx-tilegx.c (tilegx_info_to_howto_rela): Likewise. * elf32-score.h (s7_bfd_score_info_to_howto): Update prototype. * elfxx-sparc.h (_bfd_sparc_elf_info_to_howto): Update prototype. * elfxx-tilegx.h (tilegx_info_to_howto_rela): Update prototype. * elfxx-target.h (elf_info_to_howto, elf_info_to_howto_rel): Default to NULL. binutils PR 22875 * objcopy.c (copy_object): Check the error status after marking symbols used in relocations. * testsuite/binutils-all/strip-13.s: New test source file. * testsuite/binutils-all/strip-13.s: New test driver file. * testsuite/binutils-all/objcopy.exp: Run the new test.
2018-02-27 11:15:13 +01:00
static bfd_boolean
unrecognized/unsupported reloc message It must get boring translating all the variants we have of unrecognized/unsupported/invalid/unexpected reloc number. This patch cuts down on the number of variations. * aoutx.h, * coff-alpha.c, * coff-i860.c, * coff-m68k.c, * coff-mcore.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-w65.c, * elf-bfd.h, * elf-m10300.c, * elf.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-i370.c, * elf32-i386.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-iq2000.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-sh.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-v850.c, * elf32-vax.c, * elf32-visium.c, * elf32-wasm32.c, * elf32-xgate.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sparc.c, * elf64-x86-64.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-riscv.h, * elfxx-sparc.c, * elfxx-sparc.h, * reloc.c: Standardize unrecognized/unsupported reloc message.
2018-02-21 12:17:07 +01:00
elfNN_aarch64_info_to_howto (bfd *abfd, arelent *bfd_reloc,
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
Elf_Internal_Rela *elf_reloc)
{
unsigned int r_type;
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
r_type = ELFNN_R_TYPE (elf_reloc->r_info);
unrecognized/unsupported reloc message It must get boring translating all the variants we have of unrecognized/unsupported/invalid/unexpected reloc number. This patch cuts down on the number of variations. * aoutx.h, * coff-alpha.c, * coff-i860.c, * coff-m68k.c, * coff-mcore.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-w65.c, * elf-bfd.h, * elf-m10300.c, * elf.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-i370.c, * elf32-i386.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-iq2000.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-sh.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-v850.c, * elf32-vax.c, * elf32-visium.c, * elf32-wasm32.c, * elf32-xgate.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sparc.c, * elf64-x86-64.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-riscv.h, * elfxx-sparc.c, * elfxx-sparc.h, * reloc.c: Standardize unrecognized/unsupported reloc message.
2018-02-21 12:17:07 +01:00
bfd_reloc->howto = elfNN_aarch64_howto_from_type (abfd, r_type);
Have info_to_howto functions return a success/fail status. Check this result. Stop strip from completeing if one of these functions fails. bfd PR 22875 * elf-bfd.h (struct elf_backend_data): Change the return type of the elf_info_to_howto and elf_info_to_howto_rel function pointers to bfd_boolean. * elfcode.h (elf_slurp_reloc_table_from_section): Check the return value from the info_to_howto function and fail if that function failed. * elf32-h8300.c (elf32_h8_relocate_section): Check return value from the info_to_howto function. (elf32_h8_relax_section): Likewise. * elf32-lm32.c (lm32_elf_relocate_section): Likewise. * elf32-m68hc1x.c (elf32_m68hc11_relocate_section): Likewise. * elf32-score.c (s3_bfd_score_elf_relocate_section): Likewise. * elf32-score7.c (s7_bfd_score_elf_relocate_section): Likewise. * elf32-tic6x.c (elf32_tic6x_relocate_section): Likewise. * elf64-ia64-vms.c (elf64_ia64_relocate_section): Likewise. * elf64-sparc.c (elf64_sparc_slurp_one_reloc_table): Likewise. * elf64-x86-64.c (elf_x86_64_tls_transition): Likewise. * elfnn-ia64.c (elfNN_ia64_relocate_section): Likewise. * elfnn-riscv.c (riscv_elf_check_relocs): Likewise. (riscv_elf_relocate_section): Likewise. * elf-hppa.h (elf_hppa_info_to_howto): Change return type to bfd_boolean. Issue an error message, set an error value and return FALSE if the reloc is not recognized. (elf_hppa_info_to_howto_rel): Likewise. * elf-m10200.c (mn10200_info_to_howto): Likewise. * elf-m10300.c (mn10300_info_to_howto): Likewise. * elf.c (_bfd_elf_no_info_to_howto): Likewise. * elf32-arc.c (arc_info_to_howto_rel): Likewise. * elf32-arm.c (elf32_arm_info_to_howto): Likewise. * elf32-avr.c (avr_info_to_howto_rela): Likewise. * elf32-bfin.c (bfin_info_to_howto): Likewise. * elf32-cr16.c (elf_cr16_info_to_howto): Likewise. * elf32-cr16c.c (elf_cr16c_info_to_howto): Likewise. * elf32-cris.c (elf_cr16c_info_to_howto_rel, cris_info_to_howto_rela): Likewise. * elf32-crx.c (elf_crx_info_to_howto): Likewise. * elf32-d10v.c (d10v_info_to_howto_rel): Likewise. * elf32-d30v.c (d30v_info_to_howto_rel, d30v_info_to_howto_rela): Likewise. * elf32-dlx.c (dlx_rtype_to_howto, elf32_dlx_info_to_howto, elf32_dlx_info_to_howto_rel): Likewise. * elf32-epiphany.c (epiphany_info_to_howto_rela): Likewise. * elf32-fr30.c (fr30_info_to_howto_rela): Likewise. * elf32-frv.c (frv_info_to_howto_rela, frvfdpic_info_to_howto_rel): Likewise. * elf32-ft32.c (ft32_info_to_howto_rela): Likewise. * elf32-gen.c (elf_generic_info_to_howto, elf_generic_info_to_howto_rel): Likewise. * elf32-h8300.c (elf32_h8_info_to_howto, elf32_h8_info_to_howto_rel): Likewise. * elf32-i370.c (i370_elf_info_to_howto): Likewise. * elf32-i386.c (elf_i386_reloc_type_lookup, elf_i386_rtype_to_howto, elf_i386_info_to_howto_rel): Likewise. * elf32-i860.c (lookup_howto, elf32_i860_info_to_howto_rela): Likewise. * elf32-i960.c (elf32_i960_info_to_howto_rel): Likewise. * elf32-ip2k.c (ip2k_info_to_howto_rela): Likewise. * elf32-iq2000.c (iq2000_info_to_howto_rela): Likewise. * elf32-lm32.c (lm32_info_to_howto_rela): Likewise. * elf32-m32c.c (m32c_info_to_howto_rela): Likewise. * elf32-m32r.c (m32r_info_to_howto_rel, m32r_info_to_howto): Likewise. * elf32-m68hc11.c (m68hc11_info_to_howto_rel): Likewise. * elf32-m68hc12.c (m68hc11_info_to_howto_rel): Likewise. * elf32-m68k.c (rtype_to_howto): Likewise. * elf32-mcore.c (mcore_elf_info_to_howto): Likewise. * elf32-mep.c (mep_info_to_howto_rela): Likewise. * elf32-metag.c (metag_info_to_howto_rela): Likewise. * elf32-microblaze.c (microblaze_elf_info_to_howto): Likewise. * elf32-mips.c (mips_info_to_howto_rel, mips_info_to_howto_rela): Likewise. * elf32-moxie.c (moxie_info_to_howto_rela): Likewise. * elf32-msp430.c (msp430_info_to_howto_rela): Likewise. * elf32-mt.c (mt_info_to_howto_rela): Likewise. * elf32-nds32.c (nds32_info_to_howto_rel, nds32_info_to_howto): Likewise. * elf32-nios2.c (nios2_elf32_info_to_howto): Likewise. * elf32-or1k.c (or1k_info_to_howto_rela): Likewise. * elf32-pj.c (pj_elf_info_to_howto): Likewise. * elf32-ppc.c (ppc_elf_info_to_howto): Likewise. * elf32-pru.c (pru_elf32_info_to_howto): Likewise. * elf32-rl78.c (rl78_info_to_howto_rela): Likewise. * elf32-rx.c (rx_info_to_howto_rela): Likewise. * elf32-s390.c (elf_s390_info_to_howto): Likewise. * elf32-score.c (s3_bfd_score_info_to_howto, _bfd_score_info_to_howto): Likewise. * elf32-score7.c (s7_bfd_score_info_to_howto): Likewise. * elf32-sh.c (sh_elf_info_to_howto): Likewise. * elf32-spu.c (spu_elf_info_to_howto): Likewise. * elf32-tic6x.c (elf32_tic6x_info_to_howto, elf32_tic6x_info_to_howto_rel): Likewise. * elf32-tilepro.c (tilepro_info_to_howto_rela): Likewise. * elf32-v850.c (v850_elf_info_to_howto_rel, v850_elf_info_to_howto_rela, v800_elf_info_to_howto): Likewise. * elf32-vax.c (rtype_to_howto): Likewise. * elf32-visium.c (visium_info_to_howto_rela): Likewise. * elf32-wasm32.c (elf32_wasm32_rtype_to_howto, elf32_wasm32_info_to_howto_rela): Likewise. * elf32-xc16x.c (elf32_xc16x_info_to_howto): Likewise. * elf32-xgate.c (xgate_info_to_howto_rel): Likewise. * elf32-xstormy16.c (xstormy16_info_to_howto_rela): Likewise. * elf32-xtensa.c (elf_xtensa_info_to_howto_rela): Likewise. * elf64-alpha.c (elf64_alpha_info_to_howto): Likewise. * elf64-gen.c (elf_generic_info_to_howto, elf_generic_info_to_howto_rel): Likewise. * elf64-ia64-vms.c (elf64_ia64_info_to_howto): Likewise. * elf64-mips.c (mips_elf64_info_to_howto_rela): Likewise. * elf64-mmix.c (mmix_info_to_howto_rela): Likewise. * elf64-ppc.c (ppc64_elf_info_to_howto): Likewise. * elf64-s390.c (elf_s390_reloc_type_lookup): Likewise. * elf64-sh64.c (elf_s390_info_to_howto, sh_elf64_info_to_howto): Likewise. * elf64-x86-64.c (elf_x86_64_info_to_howto): Likewise. * elfn32-mips.c (mips_info_to_howto_rel, mips_info_to_howto_rela): Likewise. * elfnn-aarch64.c (elfNN_aarch64_info_to_howto): Likewise. * elfnn-ia64.c (elfNN_ia64_info_to_howto): Likewise. * elfnn-riscv.c (riscv_info_to_howto_rela): Likewise. * elfxx-ia64.c (ia64_elf_reloc_type_lookup): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_info_to_howto): Likewise. * elfxx-tilegx.c (tilegx_info_to_howto_rela): Likewise. * elf32-score.h (s7_bfd_score_info_to_howto): Update prototype. * elfxx-sparc.h (_bfd_sparc_elf_info_to_howto): Update prototype. * elfxx-tilegx.h (tilegx_info_to_howto_rela): Update prototype. * elfxx-target.h (elf_info_to_howto, elf_info_to_howto_rel): Default to NULL. binutils PR 22875 * objcopy.c (copy_object): Check the error status after marking symbols used in relocations. * testsuite/binutils-all/strip-13.s: New test source file. * testsuite/binutils-all/strip-13.s: New test driver file. * testsuite/binutils-all/objcopy.exp: Run the new test.
2018-02-27 11:15:13 +01:00
if (bfd_reloc->howto == NULL)
{
/* xgettext:c-format */
_bfd_error_handler (_("%pB: unsupported relocation type %#x"), abfd, r_type);
return FALSE;
}
return TRUE;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
}
static reloc_howto_type *
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
bfd_reloc_code_real_type code)
{
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
reloc_howto_type *howto = elfNN_aarch64_howto_from_bfd_reloc (code);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
if (howto != NULL)
return howto;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
bfd_set_error (bfd_error_bad_value);
return NULL;
}
static reloc_howto_type *
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
const char *r_name)
{
unsigned int i;
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
for (i = 1; i < ARRAY_SIZE (elfNN_aarch64_howto_table) - 1; ++i)
if (elfNN_aarch64_howto_table[i].name != NULL
&& strcasecmp (elfNN_aarch64_howto_table[i].name, r_name) == 0)
return &elfNN_aarch64_howto_table[i];
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
return NULL;
}
BFD whitespace fixes Binutils is supposed to use tabs. In my git config I have whitespace = indent-with-non-tab,space-before-tab,trailing-space and I got annoyed enough seeing red in "git diff" output to fix the problems. * doc/header.sed: Trim trailing space when splitting lines. * aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-cris.c, * aout-ns32k.c, * aout-target.h, * aout-tic30.c, * aoutf1.h, * aoutx.h, * arc-got.h, * arc-plt.def, * arc-plt.h, * archive.c, * archive64.c, * archures.c, * armnetbsd.c, * bfd-in.h, * bfd.c, * bfdio.c, * binary.c, * bout.c, * cache.c, * cisco-core.c, * coff-alpha.c, * coff-apollo.c, * coff-arm.c, * coff-h8300.c, * coff-i386.c, * coff-i860.c, * coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mcore.c, * coff-mips.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-stgo32.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * compress.c, * corefile.c, * cpu-alpha.c, * cpu-arm.c, * cpu-avr.c, * cpu-bfin.c, * cpu-cr16.c, * cpu-cr16c.c, * cpu-crx.c, * cpu-d10v.c, * cpu-frv.c, * cpu-ft32.c, * cpu-i370.c, * cpu-i960.c, * cpu-ia64-opc.c, * cpu-ip2k.c, * cpu-lm32.c, * cpu-m32r.c, * cpu-mcore.c, * cpu-microblaze.c, * cpu-mips.c, * cpu-moxie.c, * cpu-mt.c, * cpu-nios2.c, * cpu-ns32k.c, * cpu-or1k.c, * cpu-powerpc.c, * cpu-pru.c, * cpu-sh.c, * cpu-spu.c, * cpu-v850.c, * cpu-v850_rh850.c, * cpu-xgate.c, * cpu-z80.c, * dwarf1.c, * dwarf2.c, * ecoff.c, * ecofflink.c, * ecoffswap.h, * elf-bfd.h, * elf-eh-frame.c, * elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf-s390-common.c, * elf-strtab.c, * elf-vxworks.c, * elf.c, * elf32-am33lin.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-avr.h, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-i860.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68hc1x.c, * elf32-m68hc1x.h, * elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nds32.h, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score.h, * elf32-score7.c, * elf32-sh-symbian.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilegx.c, * elf32-tilegx.h, * elf32-tilepro.c, * elf32-tilepro.h, * elf32-v850.c, * elf32-vax.c, * elf32-wasm32.c, * elf32-xc16x.c, * elf32-xgate.c, * elf32-xgate.h, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-tilegx.c, * elf64-tilegx.h, * elf64-x86-64.c, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-aarch64.h, * elfxx-ia64.c, * elfxx-ia64.h, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * elfxx-x86.h, * freebsd.h, * hash.c, * host-aout.c, * hp300hpux.c, * hppabsd-core.c, * hpux-core.c, * i386aout.c, * i386linux.c, * i386lynx.c, * i386mach3.c, * i386msdos.c, * i386netbsd.c, * ieee.c, * ihex.c, * irix-core.c, * libaout.h, * libbfd-in.h, * libbfd.c, * libcoff-in.h, * libnlm.h, * libpei.h, * libxcoff.h, * linker.c, * lynx-core.c, * m68k4knetbsd.c, * m68klinux.c, * m68knetbsd.c, * m88kmach3.c, * mach-o-aarch64.c, * mach-o-arm.c, * mach-o-i386.c, * mach-o-target.c, * mach-o-x86-64.c, * mach-o.c, * mach-o.h, * merge.c, * mipsbsd.c, * mmo.c, * netbsd.h, * netbsd-core.c, * newsos3.c, * nlm-target.h, * nlm32-ppc.c, * nlm32-sparc.c, * nlmcode.h, * ns32k.h, * ns32knetbsd.c, * oasys.c, * opncls.c, * pc532-mach.c, * pdp11.c, * pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-mips.c, * pe-x86_64.c, * peXXigen.c, * pef.c, * pef.h, * pei-arm.c, * pei-i386.c, * pei-mcore.c, * pei-x86_64.c, * peicode.h, * plugin.c, * ppcboot.c, * ptrace-core.c, * reloc.c, * riscix.c, * rs6000-core.c, * section.c, * som.c, * som.h, * sparclinux.c, * sparcnetbsd.c, * srec.c, * stabs.c, * sunos.c, * syms.c, * targets.c, * tekhex.c, * trad-core.c, * vax1knetbsd.c, * vaxnetbsd.c, * verilog.c, * versados.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * wasm-module.c, * wasm-module.h, * xcofflink.c, * xsym.c, * xsym.h: Whitespace fixes. * bfd-in2.h, * libbfd.h, * libcoff.h: Regenerate.
2017-12-05 23:56:00 +01:00
#define TARGET_LITTLE_SYM aarch64_elfNN_le_vec
#define TARGET_LITTLE_NAME "elfNN-littleaarch64"
#define TARGET_BIG_SYM aarch64_elfNN_be_vec
#define TARGET_BIG_NAME "elfNN-bigaarch64"
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* The linker script knows the section names for placement.
The entry_names are used to do simple name mangling on the stubs.
Given a function name, and its type, the stub can be found. The
name can be changed. The only requirement is the %s be present. */
#define STUB_ENTRY_NAME "__%s_veneer"
/* The name of the dynamic interpreter. This is put in the .interp
section. */
#define ELF_DYNAMIC_INTERPRETER "/lib/ld.so.1"
#define AARCH64_MAX_FWD_BRANCH_OFFSET \
(((1 << 25) - 1) << 2)
#define AARCH64_MAX_BWD_BRANCH_OFFSET \
(-((1 << 25) << 2))
#define AARCH64_MAX_ADRP_IMM ((1 << 20) - 1)
#define AARCH64_MIN_ADRP_IMM (-(1 << 20))
static int
aarch64_valid_for_adrp_p (bfd_vma value, bfd_vma place)
{
bfd_signed_vma offset = (bfd_signed_vma) (PG (value) - PG (place)) >> 12;
return offset <= AARCH64_MAX_ADRP_IMM && offset >= AARCH64_MIN_ADRP_IMM;
}
static int
aarch64_valid_branch_p (bfd_vma value, bfd_vma place)
{
bfd_signed_vma offset = (bfd_signed_vma) (value - place);
return (offset <= AARCH64_MAX_FWD_BRANCH_OFFSET
&& offset >= AARCH64_MAX_BWD_BRANCH_OFFSET);
}
static const uint32_t aarch64_adrp_branch_stub [] =
{
0x90000010, /* adrp ip0, X */
/* R_AARCH64_ADR_HI21_PCREL(X) */
0x91000210, /* add ip0, ip0, :lo12:X */
/* R_AARCH64_ADD_ABS_LO12_NC(X) */
0xd61f0200, /* br ip0 */
};
static const uint32_t aarch64_long_branch_stub[] =
{
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
#if ARCH_SIZE == 64
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
0x58000090, /* ldr ip0, 1f */
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
#else
0x18000090, /* ldr wip0, 1f */
#endif
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
0x10000011, /* adr ip1, #0 */
0x8b110210, /* add ip0, ip0, ip1 */
0xd61f0200, /* br ip0 */
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
0x00000000, /* 1: .xword or .word
R_AARCH64_PRELNN(X) + 12
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
*/
0x00000000,
};
[AArch64] Cortex-A53 erratum 835769 linker workaround 2014-10-22 Tejas Belagod <tejas.belagod@arm.com> bfd/ * bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter. * bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise. * elfnn-aarch64.c (aarch64_erratum_835769_stub): New. (elf_aarch64_stub_type): Add new type aarch64_stub_erratum_835769_veneer. (elf_aarch64_stub_hash_entry): New fields for erratum 835769. (aarch64_erratum_835769_fix): New data struct to record erratum 835769. (elf_aarch64_link_hash_table: Global flags for 835769. (aarch64_build_one_stub): Add case for 835769. (aarch64_size_one_stub): Likewise. (aarch64_mem_op_p, aarch64_mlxl_p, aarch64_erratum_sequence,erratum_835769_scan): New. Decode and scan functions for erratum 835769. (elf_aarch64_create_or_find_stub_sec): New. (elfNN_aarch64_size_stubs): Look for erratum 835769 and record them. (bfd_elfNN_aarch64_set_options: Set global flag for 835769. (erratum_835769_branch_to_stub_data, make_branch_to_erratum_835769_stub):New. Connect up all the erratum stubs to occurances by branches. (elfNN_aarch64_write_section): New hook. (aarch64_map_one_stub): Output erratum stub symbol. (elfNN_aarch64_size_dynamic_sections): Init mapping symbol information for erratum 835769. (elf_backend_write_section): Define. ld/ * emultempl/aarch64elf.em: Add command-line option for erratum 835769. ld/testsuite/ * ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum 835769 tests. * ld-aarch64/erratum835769.d: New. * ld-aarch64/erratum835769.s: New.
2014-10-24 12:39:35 +02:00
static const uint32_t aarch64_erratum_835769_stub[] =
{
0x00000000, /* Placeholder for multiply accumulate. */
0x14000000, /* b <label> */
};
[AArch64] Workaround for Cortex A53 erratum 843419 Some early revisions of the Cortex-A53 have an erratum (843419). The details of the erratum are quite complex and involve dynamic conditions. For the purposes of the workaround we have simplified the static conditions to an ADRP in the last two instructions of a 4KByte page, followed within four instructions by a load/store dependent on the ADRP. This patch adds support to conservatively scan for and workaround Cortex A53 erratum 843419. There are two different workaround strategies used. The first is to rewrite ADRP instructions which form part of an erratum sequence with an ADR instruction. In situations where the ADR provides insufficient offset the dependent load or store instruction from the sequence is moved to a stub section and branches are inserted from the original sequence to the relocated instruction and back again. Stub section sizes are rounded up to a multiple of 4096 in order to ensure that the act of inserting work around stubs does not create more errata sequences. Workaround stubs are always inserted into the stub section associated with the input section containing the erratum sequence. This ensures that the fully relocated form of the veneered load store instruction is available at the point in time when the stub section is written.
2015-02-24 13:04:41 +01:00
static const uint32_t aarch64_erratum_843419_stub[] =
{
0x00000000, /* Placeholder for LDR instruction. */
0x14000000, /* b <label> */
};
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* Section name for stubs is the associated section name plus this
string. */
#define STUB_SUFFIX ".stub"
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
enum elf_aarch64_stub_type
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
aarch64_stub_none,
aarch64_stub_adrp_branch,
aarch64_stub_long_branch,
[AArch64] Cortex-A53 erratum 835769 linker workaround 2014-10-22 Tejas Belagod <tejas.belagod@arm.com> bfd/ * bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter. * bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise. * elfnn-aarch64.c (aarch64_erratum_835769_stub): New. (elf_aarch64_stub_type): Add new type aarch64_stub_erratum_835769_veneer. (elf_aarch64_stub_hash_entry): New fields for erratum 835769. (aarch64_erratum_835769_fix): New data struct to record erratum 835769. (elf_aarch64_link_hash_table: Global flags for 835769. (aarch64_build_one_stub): Add case for 835769. (aarch64_size_one_stub): Likewise. (aarch64_mem_op_p, aarch64_mlxl_p, aarch64_erratum_sequence,erratum_835769_scan): New. Decode and scan functions for erratum 835769. (elf_aarch64_create_or_find_stub_sec): New. (elfNN_aarch64_size_stubs): Look for erratum 835769 and record them. (bfd_elfNN_aarch64_set_options: Set global flag for 835769. (erratum_835769_branch_to_stub_data, make_branch_to_erratum_835769_stub):New. Connect up all the erratum stubs to occurances by branches. (elfNN_aarch64_write_section): New hook. (aarch64_map_one_stub): Output erratum stub symbol. (elfNN_aarch64_size_dynamic_sections): Init mapping symbol information for erratum 835769. (elf_backend_write_section): Define. ld/ * emultempl/aarch64elf.em: Add command-line option for erratum 835769. ld/testsuite/ * ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum 835769 tests. * ld-aarch64/erratum835769.d: New. * ld-aarch64/erratum835769.s: New.
2014-10-24 12:39:35 +02:00
aarch64_stub_erratum_835769_veneer,
[AArch64] Workaround for Cortex A53 erratum 843419 Some early revisions of the Cortex-A53 have an erratum (843419). The details of the erratum are quite complex and involve dynamic conditions. For the purposes of the workaround we have simplified the static conditions to an ADRP in the last two instructions of a 4KByte page, followed within four instructions by a load/store dependent on the ADRP. This patch adds support to conservatively scan for and workaround Cortex A53 erratum 843419. There are two different workaround strategies used. The first is to rewrite ADRP instructions which form part of an erratum sequence with an ADR instruction. In situations where the ADR provides insufficient offset the dependent load or store instruction from the sequence is moved to a stub section and branches are inserted from the original sequence to the relocated instruction and back again. Stub section sizes are rounded up to a multiple of 4096 in order to ensure that the act of inserting work around stubs does not create more errata sequences. Workaround stubs are always inserted into the stub section associated with the input section containing the erratum sequence. This ensures that the fully relocated form of the veneered load store instruction is available at the point in time when the stub section is written.
2015-02-24 13:04:41 +01:00
aarch64_stub_erratum_843419_veneer,
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
};
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
struct elf_aarch64_stub_hash_entry
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
/* Base hash table entry structure. */
struct bfd_hash_entry root;
/* The stub section. */
asection *stub_sec;
/* Offset within stub_sec of the beginning of this stub. */
bfd_vma stub_offset;
/* Given the symbol's value and its section we can determine its final
value when building the stubs (so the stub knows where to jump). */
bfd_vma target_value;
asection *target_section;
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
enum elf_aarch64_stub_type stub_type;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* The symbol table entry, if any, that this was derived from. */
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
struct elf_aarch64_link_hash_entry *h;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* Destination symbol type */
unsigned char st_type;
/* Where this stub is being called from, or, in the case of combined
stub sections, the first input section in the group. */
asection *id_sec;
/* The name for the local symbol at the start of this stub. The
stub name in the hash table has to be unique; this does not, so
it can be friendlier. */
char *output_name;
[AArch64] Cortex-A53 erratum 835769 linker workaround 2014-10-22 Tejas Belagod <tejas.belagod@arm.com> bfd/ * bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter. * bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise. * elfnn-aarch64.c (aarch64_erratum_835769_stub): New. (elf_aarch64_stub_type): Add new type aarch64_stub_erratum_835769_veneer. (elf_aarch64_stub_hash_entry): New fields for erratum 835769. (aarch64_erratum_835769_fix): New data struct to record erratum 835769. (elf_aarch64_link_hash_table: Global flags for 835769. (aarch64_build_one_stub): Add case for 835769. (aarch64_size_one_stub): Likewise. (aarch64_mem_op_p, aarch64_mlxl_p, aarch64_erratum_sequence,erratum_835769_scan): New. Decode and scan functions for erratum 835769. (elf_aarch64_create_or_find_stub_sec): New. (elfNN_aarch64_size_stubs): Look for erratum 835769 and record them. (bfd_elfNN_aarch64_set_options: Set global flag for 835769. (erratum_835769_branch_to_stub_data, make_branch_to_erratum_835769_stub):New. Connect up all the erratum stubs to occurances by branches. (elfNN_aarch64_write_section): New hook. (aarch64_map_one_stub): Output erratum stub symbol. (elfNN_aarch64_size_dynamic_sections): Init mapping symbol information for erratum 835769. (elf_backend_write_section): Define. ld/ * emultempl/aarch64elf.em: Add command-line option for erratum 835769. ld/testsuite/ * ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum 835769 tests. * ld-aarch64/erratum835769.d: New. * ld-aarch64/erratum835769.s: New.
2014-10-24 12:39:35 +02:00
/* The instruction which caused this stub to be generated (only valid for
erratum 835769 workaround stubs at present). */
uint32_t veneered_insn;
[AArch64] Workaround for Cortex A53 erratum 843419 Some early revisions of the Cortex-A53 have an erratum (843419). The details of the erratum are quite complex and involve dynamic conditions. For the purposes of the workaround we have simplified the static conditions to an ADRP in the last two instructions of a 4KByte page, followed within four instructions by a load/store dependent on the ADRP. This patch adds support to conservatively scan for and workaround Cortex A53 erratum 843419. There are two different workaround strategies used. The first is to rewrite ADRP instructions which form part of an erratum sequence with an ADR instruction. In situations where the ADR provides insufficient offset the dependent load or store instruction from the sequence is moved to a stub section and branches are inserted from the original sequence to the relocated instruction and back again. Stub section sizes are rounded up to a multiple of 4096 in order to ensure that the act of inserting work around stubs does not create more errata sequences. Workaround stubs are always inserted into the stub section associated with the input section containing the erratum sequence. This ensures that the fully relocated form of the veneered load store instruction is available at the point in time when the stub section is written.
2015-02-24 13:04:41 +01:00
/* In an erratum 843419 workaround stub, the ADRP instruction offset. */
bfd_vma adrp_offset;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
};
/* Used to build a map of a section. This is required for mixed-endian
code/data. */
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
typedef struct elf_elf_section_map
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
bfd_vma vma;
char type;
}
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
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elf_aarch64_section_map;
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typedef struct _aarch64_elf_section_data
{
struct bfd_elf_section_data elf;
unsigned int mapcount;
unsigned int mapsize;
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
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elf_aarch64_section_map *map;
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}
_aarch64_elf_section_data;
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
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#define elf_aarch64_section_data(sec) \
Add support for 64-bit ARM architecture: AArch64
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((_aarch64_elf_section_data *) elf_section_data (sec))
2013-08-25 Andrew Pinski <apinski@cavium.com> * elfnn-aarch64.c (TCB_SIZE): Base on the ARCH_SIZE rather than a fixed size of 16.
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/* The size of the thread control block which is defined to be two pointers. */
#define TCB_SIZE (ARCH_SIZE/8)*2
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struct elf_aarch64_local_symbol
{
unsigned int got_type;
bfd_signed_vma got_refcount;
bfd_vma got_offset;
/* Offset of the GOTPLT entry reserved for the TLS descriptor. The
offset is from the end of the jump table and reserved entries
within the PLTGOT.
The magic value (bfd_vma) -1 indicates that an offset has not be
allocated. */
bfd_vma tlsdesc_got_jump_table_offset;
};
struct elf_aarch64_obj_tdata
{
struct elf_obj_tdata root;
/* local symbol descriptors */
struct elf_aarch64_local_symbol *locals;
/* Zero to warn when linking objects with incompatible enum sizes. */
int no_enum_size_warning;
/* Zero to warn when linking objects with incompatible wchar_t sizes. */
int no_wchar_size_warning;
[BFD, LD, AArch64, 1/3] Add support for GNU PROPERTIES in AArch64 for BTI and PAC This is part of the patch series to add support for BTI and PAC in AArch64 linker. This patch implements the following: 1) This extends in the gnu property support in the linker for AArch64 by defining backend hooks for elf_backend_setup_gnu_properties, elf_backend_merge_gnu_properties and elf_backend_parse_gnu_properties. 2) It defines AArch64 specific GNU property GNU_PROPERTY_AARCH64_FEATURE_1_AND and 2 bit for BTI and PAC in it. 3) It also adds support in readelf.c to read and print these new GNU properties in AArch64. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * elf-properties.c (_bfd_elf_link_setup_gnu_properties): Exclude linker created inputs from merge. * elfnn-aarch64.c (struct elf_aarch64_obj_tdata): Add field for GNU_PROPERTY_AARCH64_FEATURE_1_AND properties. (elfNN_aarch64_link_setup_gnu_properties): New. (elfNN_aarch64_merge_gnu_properties): New. (elf_backend_setup_gnu_properties): Define for AArch64. (elf_backend_merge_gnu_properties): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_link_setup_gnu_properties): Define. (_bfd_aarch64_elf_parse_gnu_properties): Define. (_bfd_aarch64_elf_merge_gnu_properties): Define. * elfxx-aarch64.h (_bfd_aarch64_elf_link_setup_gnu_properties): Declare. (_bfd_aarch64_elf_parse_gnu_properties): Declare. (_bfd_aarch64_elf_merge_gnu_properties): Declare. (elf_backend_parse_gnu_properties): Define for AArch64. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * readelf.c (decode_aarch64_feature_1_and): New. (print_gnu_property_note): Add case for AArch64 gnu notes. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * elf/common.h (GNU_PROPERTY_AARCH64_FEATURE_1_AND): New. (GNU_PROPERTY_AARCH64_FEATURE_1_BTI): New. (GNU_PROPERTY_AARCH64_FEATURE_1_PAC): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * NEWS: Document GNU_PROPERTY_AARCH64_FEATURE_1_BTI and GNU_PROPERTY_AARCH64_FEATURE_1_PAC. * testsuite/ld-aarch64/aarch64-elf.exp: Add run commands for new tests. * testsuite/ld-aarch64/property-bti-pac1.d: New test. * testsuite/ld-aarch64/property-bti-pac1.s: New test. * testsuite/ld-aarch64/property-bti-pac2.d: New test. * testsuite/ld-aarch64/property-bti-pac2.s: New test. * testsuite/ld-aarch64/property-bti-pac3.d: New test.
2019-03-13 11:42:27 +01:00
/* All GNU_PROPERTY_AARCH64_FEATURE_1_AND properties. */
uint32_t gnu_and_prop;
[BFD, LD, AArch64, 2/3] Add --force-bti to enable BTI and to select BTI enabled PLTs This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds a new ld command line option: --force-bti. In the presence of this option, the linker enables BTI with the GNU_PROPERTY_AARCH64_FEATURE_1_BTI feature. This gives out warning in case of missing gnu notes for BTI in inputs. 2) It also defines a new set of BTI enabled PLTs. These are used either when all the inputs are marked with GNU_PROPERTY_AARCH64_FEATURE_1_BTI or when the new --force-bti option is used. This required adding new fields in elf_aarch64_link_hash_table so that we could make the PLT related information more generic. 3) It also defines a dynamic tag DT_AARCH64_BTI_PLT. The linker uses this whenever it picks BTI enabled PLTs. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * bfd-in.h (aarch64_plt_type, aarch64_enable_bti_type): New. (aarch64_bti_pac_info): New. (bfd_elf64_aarch64_set_options): Add aarch64_bti_pac_info argument. (bfd_elf32_aarch64_set_options): Likewise. * bfd-in2.h: Regenerate * elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): New. (PLT_BTI_SMALL_ENTRY_SIZE, PLT_BTI_TLSDESC_ENTRY_SIZE): New. (elfNN_aarch64_small_plt0_bti_entry): New. (elfNN_aarch64_small_plt_bti_entry): New. (elfNN_aarch64_tlsdesc_small_plt_bti_entry): New. (elf_aarch64_obj_tdata): Add no_bti_warn and plt_type fields. (elf_aarch64_link_hash_table): Add plt0_entry, plt_entry and tlsdesc_plt_entry_size fields. (elfNN_aarch64_link_hash_table_create): Initialise the new fields. (setup_plt_values): New helper function. (bfd_elfNN_aarch64_set_options): Use new bp_info to set plt sizes and bti enable type. (elfNN_aarch64_allocate_dynrelocs): Use new size members instead of fixed macros. (elfNN_aarch64_size_dynamic_sections): Likewise and add checks. (elfNN_aarch64_create_small_pltn_entry): Use new generic pointers to plt stubs instead of fixed ones and update filling them according to the need for bti. (elfNN_aarch64_init_small_plt0_entry): Likewise. (elfNN_aarch64_finish_dynamic_sections): Likewise. (get_plt_type, elfNN_aarch64_get_synthetic_symtab): New. (elfNN_aarch64_plt_sym_val): Update size accordingly. (elfNN_aarch64_link_setup_gnu_properties): Set up plts if BTI GNU NOTE is set. (bfd_elfNN_get_synthetic_symtab): Define. (elfNN_aarch64_merge_gnu_properties): Give out warning with --force-bti and mising BTI NOTE SECTION. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * readelf.c (get_aarch64_dynamic_type): New. (get_dynamic_type): Use above for EM_AARCH64. (dynamic_section_aarch64_val): New. (process_dynamic_section): Use above for EM_AARCH64. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * elf/aarch64.h (DT_AARCH64_BTI_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * NEWS: Document --force-bti. * emultempl/aarch64elf.em (plt_type, bti_type, OPTION_FORCE_BTI): New. (PARSE_AND_LIST_SHORTOPTS, PARSE_AND_LIST_OPTIONS): Add force-bti. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FORCE_BTI. * testsuite/ld-aarch64/aarch64-elf.exp: Add all the tests below. * testsuite/ld-aarch64/bti-plt-1.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: New test. * testsuite/ld-aarch64/bti-plt-2.s: New test. * testsuite/ld-aarch64/bti-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-3.d: New test. * testsuite/ld-aarch64/bti-plt-4.d: New test. * testsuite/ld-aarch64/bti-plt-5.d: New test. * testsuite/ld-aarch64/bti-plt-6.d: New test. * testsuite/ld-aarch64/bti-plt-7.d: New test. * testsuite/ld-aarch64/bti-plt-so.s: New test. * testsuite/ld-aarch64/bti-plt.ld: New test.
2019-03-13 11:54:30 +01:00
/* Zero to warn when linking objects with incompatible
GNU_PROPERTY_AARCH64_FEATURE_1_BTI. */
int no_bti_warn;
/* PLT type based on security. */
aarch64_plt_type plt_type;
Add support for 64-bit ARM architecture: AArch64
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};
#define elf_aarch64_tdata(bfd) \
((struct elf_aarch64_obj_tdata *) (bfd)->tdata.any)
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
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#define elf_aarch64_locals(bfd) (elf_aarch64_tdata (bfd)->locals)
Add support for 64-bit ARM architecture: AArch64
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#define is_aarch64_elf(bfd) \
(bfd_get_flavour (bfd) == bfd_target_elf_flavour \
&& elf_tdata (bfd) != NULL \
&& elf_object_id (bfd) == AARCH64_ELF_DATA)
static bfd_boolean
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
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elfNN_aarch64_mkobject (bfd *abfd)
Add support for 64-bit ARM architecture: AArch64
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{
return bfd_elf_allocate_object (abfd, sizeof (struct elf_aarch64_obj_tdata),
AARCH64_ELF_DATA);
}
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
#define elf_aarch64_hash_entry(ent) \
((struct elf_aarch64_link_hash_entry *)(ent))
Add support for 64-bit ARM architecture: AArch64
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#define GOT_UNKNOWN 0
#define GOT_NORMAL 1
#define GOT_TLS_GD 2
#define GOT_TLS_IE 4
#define GOT_TLSDESC_GD 8
#define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLSDESC_GD))
/* AArch64 ELF linker hash entry. */
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
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struct elf_aarch64_link_hash_entry
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
struct elf_link_hash_entry root;
/* Since PLT entries have variable size, we need to record the
index into .got.plt instead of recomputing it from the PLT
offset. */
bfd_signed_vma plt_got_offset;
/* Bit mask representing the type of GOT entry(s) if any required by
this symbol. */
unsigned int got_type;
/* A pointer to the most recently used stub hash entry against this
symbol. */
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
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struct elf_aarch64_stub_hash_entry *stub_cache;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* Offset of the GOTPLT entry reserved for the TLS descriptor. The offset
is from the end of the jump table and reserved entries within the PLTGOT.
The magic value (bfd_vma) -1 indicates that an offset has not
be allocated. */
bfd_vma tlsdesc_got_jump_table_offset;
};
static unsigned int
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_symbol_got_type (struct elf_link_hash_entry *h,
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
bfd *abfd,
unsigned long r_symndx)
{
if (h)
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
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return elf_aarch64_hash_entry (h)->got_type;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
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if (! elf_aarch64_locals (abfd))
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
return GOT_UNKNOWN;
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
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return elf_aarch64_locals (abfd)[r_symndx].got_type;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
}
/* Get the AArch64 elf linker hash table from a link_info structure. */
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
#define elf_aarch64_hash_table(info) \
((struct elf_aarch64_link_hash_table *) ((info)->hash))
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
#define aarch64_stub_hash_lookup(table, string, create, copy) \
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
((struct elf_aarch64_stub_hash_entry *) \
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
bfd_hash_lookup ((table), (string), (create), (copy)))
/* AArch64 ELF linker hash table. */
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
struct elf_aarch64_link_hash_table
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
/* The main hash table. */
struct elf_link_hash_table root;
/* Nonzero to force PIC branch veneers. */
int pic_veneer;
[AArch64] Cortex-A53 erratum 835769 linker workaround 2014-10-22 Tejas Belagod <tejas.belagod@arm.com> bfd/ * bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter. * bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise. * elfnn-aarch64.c (aarch64_erratum_835769_stub): New. (elf_aarch64_stub_type): Add new type aarch64_stub_erratum_835769_veneer. (elf_aarch64_stub_hash_entry): New fields for erratum 835769. (aarch64_erratum_835769_fix): New data struct to record erratum 835769. (elf_aarch64_link_hash_table: Global flags for 835769. (aarch64_build_one_stub): Add case for 835769. (aarch64_size_one_stub): Likewise. (aarch64_mem_op_p, aarch64_mlxl_p, aarch64_erratum_sequence,erratum_835769_scan): New. Decode and scan functions for erratum 835769. (elf_aarch64_create_or_find_stub_sec): New. (elfNN_aarch64_size_stubs): Look for erratum 835769 and record them. (bfd_elfNN_aarch64_set_options: Set global flag for 835769. (erratum_835769_branch_to_stub_data, make_branch_to_erratum_835769_stub):New. Connect up all the erratum stubs to occurances by branches. (elfNN_aarch64_write_section): New hook. (aarch64_map_one_stub): Output erratum stub symbol. (elfNN_aarch64_size_dynamic_sections): Init mapping symbol information for erratum 835769. (elf_backend_write_section): Define. ld/ * emultempl/aarch64elf.em: Add command-line option for erratum 835769. ld/testsuite/ * ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum 835769 tests. * ld-aarch64/erratum835769.d: New. * ld-aarch64/erratum835769.s: New.
2014-10-24 12:39:35 +02:00
/* Fix erratum 835769. */
int fix_erratum_835769;
[AArch64] Workaround for Cortex A53 erratum 843419 Some early revisions of the Cortex-A53 have an erratum (843419). The details of the erratum are quite complex and involve dynamic conditions. For the purposes of the workaround we have simplified the static conditions to an ADRP in the last two instructions of a 4KByte page, followed within four instructions by a load/store dependent on the ADRP. This patch adds support to conservatively scan for and workaround Cortex A53 erratum 843419. There are two different workaround strategies used. The first is to rewrite ADRP instructions which form part of an erratum sequence with an ADR instruction. In situations where the ADR provides insufficient offset the dependent load or store instruction from the sequence is moved to a stub section and branches are inserted from the original sequence to the relocated instruction and back again. Stub section sizes are rounded up to a multiple of 4096 in order to ensure that the act of inserting work around stubs does not create more errata sequences. Workaround stubs are always inserted into the stub section associated with the input section containing the erratum sequence. This ensures that the fully relocated form of the veneered load store instruction is available at the point in time when the stub section is written.
2015-02-24 13:04:41 +01:00
/* Fix erratum 843419. */
AArch64: Implement choice between Cortex-A53 erratum workarounds. (PR ld/24373) The Cortex-A53 erratum currently has two ways it can resolve the erratum when using the flag --fix-cortex-a53-843419: 1) If the address is within the range of an ADR instruction it rewrites the ADRP into an ADR, and those doesn't need the use of a veneer. 2) If the address is not within range, it adds a branch to a veneer which will execute the final bit of the erratum workaround and branch back to the call site. When we do this we always generate the veneers and we always align the size of the text section to 4KB. This is because we only know which workaround we can use after all linking has finished and all addresses are known. This means even though the veneers are not used, we still generate the section and we still change the size of the input section. This is problematic for small memory devices as this would require the user to take about a ~4KB hit in memory even though it's not even used. Since there's no real way to restart the linking process from the final write phase this patch solves the issue by allowing the user more control over which erratum workaround gets used. Concretely this changes the option --fix-cortex-a53-843419 to take optional arguments --fix-cortex-a53-843419[=full|adr|adrp] - full (default): Use both ADRP and ADR workaround. This is equivalent to not specifying any options and is the default behavior before this patch. - adr: Only use the ADR workaround, this will not cause any increase in binary size but linking will fail if the referenced address is out of range of an ADR instruction. - adrp: Use only the ADRP workaround, this will never rewrite your ADRP. In the cases where the user knows how big their binaries are the `adr` option would prevent the unneeded overhead. bfd/ChangeLog: PR ld/24373 * bfd-in.h (enum erratum_84319_opts): New (bfd_elf64_aarch64_set_options, bfd_elf32_aarch64_set_options): Change int to enum erratum_84319_opts. * bfd-in2.h: Regenerate. * elfnn-aarch64.c (struct elf_aarch64_link_hash_table): Change fix_erratum_843419 to use new enum, remove fix_erratum_843419_adr. (_bfd_aarch64_add_stub_entry_after): Conditionally create erratum stub. (aarch64_size_one_stub): Conditionally size erratum 843419 stubs. (_bfd_aarch64_resize_stubs): Amend comment. (elfNN_aarch64_size_stubs): Don't generate stubs when no workaround requested. (bfd_elfNN_aarch64_set_options): Use new fix_erratum_843419 enum. (_bfd_aarch64_erratum_843419_branch_to_stub): Implement selection of erratum workaround. (clear_erratum_843419_entry): Update erratum conditional. ld/ChangeLog: PR ld/24373 * emultempl/aarch64elf.em (PARSE_AND_LIST_LONGOPTS): Add optional args to flags. * NEWS: Add changes to flag. (PARSE_AND_LIST_OPTIONS): Update help descriptions. (PARSE_AND_LIST_ARGS_CASES): Add new options to parser. * testsuite/ld-aarch64/aarch64-elf.exp: Add new run_dump_tests. * testsuite/ld-aarch64/erratum843419-adr.d: New test. * testsuite/ld-aarch64/erratum843419-adrp.d: New test. * testsuite/ld-aarch64/erratum843419-far-adr.d: New test. * testsuite/ld-aarch64/erratum843419-far-full.d: New test. * testsuite/ld-aarch64/erratum843419-far.s: New test. * testsuite/ld-aarch64/erratum843419-full.d: New test. * testsuite/ld-aarch64/erratum843419-near.s: New test. * testsuite/ld-aarch64/erratum843419-no-args.d: New test.
2019-05-21 14:04:08 +02:00
erratum_84319_opts fix_erratum_843419;
[AArch64] Workaround for Cortex A53 erratum 843419 Some early revisions of the Cortex-A53 have an erratum (843419). The details of the erratum are quite complex and involve dynamic conditions. For the purposes of the workaround we have simplified the static conditions to an ADRP in the last two instructions of a 4KByte page, followed within four instructions by a load/store dependent on the ADRP. This patch adds support to conservatively scan for and workaround Cortex A53 erratum 843419. There are two different workaround strategies used. The first is to rewrite ADRP instructions which form part of an erratum sequence with an ADR instruction. In situations where the ADR provides insufficient offset the dependent load or store instruction from the sequence is moved to a stub section and branches are inserted from the original sequence to the relocated instruction and back again. Stub section sizes are rounded up to a multiple of 4096 in order to ensure that the act of inserting work around stubs does not create more errata sequences. Workaround stubs are always inserted into the stub section associated with the input section containing the erratum sequence. This ensures that the fully relocated form of the veneered load store instruction is available at the point in time when the stub section is written.
2015-02-24 13:04:41 +01:00
[AArch64] Also puts value in place for R_AARCH64_RELATIVE When handling absolute relocations for global symbols bind within the shared object, AArch64 will generate one dynamic RELATIVE relocation, but won't apply the value for this absolution relocations at static linking stage. This is different from AArch64 gold linker and x86-64. This is not a bug as AArch64 is RELA, there is only guarantee that relocation addend is placed in the relocation entry. But some system softwares originally writen for x86-64 might assume AArch64 bfd linker gets the same behavior as x86-64, then they could take advantage of this buy skipping those RELATIVE dynamic relocations if the load address is the same as the static linking address. This patch makes AArch64 BFD linker applies absolution relocations at static linking stage for scenario described above. Meanwhile old AArch64 android loader has a bug (PR19163) which relies on current linker behavior as a workaround, so the same option --no-apply-dynamic-relocs added.
2016-05-03 12:59:37 +02:00
/* Don't apply link-time values for dynamic relocations. */
int no_apply_dynamic_relocs;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* The number of bytes in the initial entry in the PLT. */
bfd_size_type plt_header_size;
[BFD, LD, AArch64, 2/3] Add --force-bti to enable BTI and to select BTI enabled PLTs This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds a new ld command line option: --force-bti. In the presence of this option, the linker enables BTI with the GNU_PROPERTY_AARCH64_FEATURE_1_BTI feature. This gives out warning in case of missing gnu notes for BTI in inputs. 2) It also defines a new set of BTI enabled PLTs. These are used either when all the inputs are marked with GNU_PROPERTY_AARCH64_FEATURE_1_BTI or when the new --force-bti option is used. This required adding new fields in elf_aarch64_link_hash_table so that we could make the PLT related information more generic. 3) It also defines a dynamic tag DT_AARCH64_BTI_PLT. The linker uses this whenever it picks BTI enabled PLTs. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * bfd-in.h (aarch64_plt_type, aarch64_enable_bti_type): New. (aarch64_bti_pac_info): New. (bfd_elf64_aarch64_set_options): Add aarch64_bti_pac_info argument. (bfd_elf32_aarch64_set_options): Likewise. * bfd-in2.h: Regenerate * elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): New. (PLT_BTI_SMALL_ENTRY_SIZE, PLT_BTI_TLSDESC_ENTRY_SIZE): New. (elfNN_aarch64_small_plt0_bti_entry): New. (elfNN_aarch64_small_plt_bti_entry): New. (elfNN_aarch64_tlsdesc_small_plt_bti_entry): New. (elf_aarch64_obj_tdata): Add no_bti_warn and plt_type fields. (elf_aarch64_link_hash_table): Add plt0_entry, plt_entry and tlsdesc_plt_entry_size fields. (elfNN_aarch64_link_hash_table_create): Initialise the new fields. (setup_plt_values): New helper function. (bfd_elfNN_aarch64_set_options): Use new bp_info to set plt sizes and bti enable type. (elfNN_aarch64_allocate_dynrelocs): Use new size members instead of fixed macros. (elfNN_aarch64_size_dynamic_sections): Likewise and add checks. (elfNN_aarch64_create_small_pltn_entry): Use new generic pointers to plt stubs instead of fixed ones and update filling them according to the need for bti. (elfNN_aarch64_init_small_plt0_entry): Likewise. (elfNN_aarch64_finish_dynamic_sections): Likewise. (get_plt_type, elfNN_aarch64_get_synthetic_symtab): New. (elfNN_aarch64_plt_sym_val): Update size accordingly. (elfNN_aarch64_link_setup_gnu_properties): Set up plts if BTI GNU NOTE is set. (bfd_elfNN_get_synthetic_symtab): Define. (elfNN_aarch64_merge_gnu_properties): Give out warning with --force-bti and mising BTI NOTE SECTION. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * readelf.c (get_aarch64_dynamic_type): New. (get_dynamic_type): Use above for EM_AARCH64. (dynamic_section_aarch64_val): New. (process_dynamic_section): Use above for EM_AARCH64. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * elf/aarch64.h (DT_AARCH64_BTI_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * NEWS: Document --force-bti. * emultempl/aarch64elf.em (plt_type, bti_type, OPTION_FORCE_BTI): New. (PARSE_AND_LIST_SHORTOPTS, PARSE_AND_LIST_OPTIONS): Add force-bti. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FORCE_BTI. * testsuite/ld-aarch64/aarch64-elf.exp: Add all the tests below. * testsuite/ld-aarch64/bti-plt-1.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: New test. * testsuite/ld-aarch64/bti-plt-2.s: New test. * testsuite/ld-aarch64/bti-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-3.d: New test. * testsuite/ld-aarch64/bti-plt-4.d: New test. * testsuite/ld-aarch64/bti-plt-5.d: New test. * testsuite/ld-aarch64/bti-plt-6.d: New test. * testsuite/ld-aarch64/bti-plt-7.d: New test. * testsuite/ld-aarch64/bti-plt-so.s: New test. * testsuite/ld-aarch64/bti-plt.ld: New test.
2019-03-13 11:54:30 +01:00
/* The bytes of the initial PLT entry. */
const bfd_byte *plt0_entry;
/* The number of bytes in the subsequent PLT entries. */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
bfd_size_type plt_entry_size;
[BFD, LD, AArch64, 2/3] Add --force-bti to enable BTI and to select BTI enabled PLTs This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds a new ld command line option: --force-bti. In the presence of this option, the linker enables BTI with the GNU_PROPERTY_AARCH64_FEATURE_1_BTI feature. This gives out warning in case of missing gnu notes for BTI in inputs. 2) It also defines a new set of BTI enabled PLTs. These are used either when all the inputs are marked with GNU_PROPERTY_AARCH64_FEATURE_1_BTI or when the new --force-bti option is used. This required adding new fields in elf_aarch64_link_hash_table so that we could make the PLT related information more generic. 3) It also defines a dynamic tag DT_AARCH64_BTI_PLT. The linker uses this whenever it picks BTI enabled PLTs. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * bfd-in.h (aarch64_plt_type, aarch64_enable_bti_type): New. (aarch64_bti_pac_info): New. (bfd_elf64_aarch64_set_options): Add aarch64_bti_pac_info argument. (bfd_elf32_aarch64_set_options): Likewise. * bfd-in2.h: Regenerate * elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): New. (PLT_BTI_SMALL_ENTRY_SIZE, PLT_BTI_TLSDESC_ENTRY_SIZE): New. (elfNN_aarch64_small_plt0_bti_entry): New. (elfNN_aarch64_small_plt_bti_entry): New. (elfNN_aarch64_tlsdesc_small_plt_bti_entry): New. (elf_aarch64_obj_tdata): Add no_bti_warn and plt_type fields. (elf_aarch64_link_hash_table): Add plt0_entry, plt_entry and tlsdesc_plt_entry_size fields. (elfNN_aarch64_link_hash_table_create): Initialise the new fields. (setup_plt_values): New helper function. (bfd_elfNN_aarch64_set_options): Use new bp_info to set plt sizes and bti enable type. (elfNN_aarch64_allocate_dynrelocs): Use new size members instead of fixed macros. (elfNN_aarch64_size_dynamic_sections): Likewise and add checks. (elfNN_aarch64_create_small_pltn_entry): Use new generic pointers to plt stubs instead of fixed ones and update filling them according to the need for bti. (elfNN_aarch64_init_small_plt0_entry): Likewise. (elfNN_aarch64_finish_dynamic_sections): Likewise. (get_plt_type, elfNN_aarch64_get_synthetic_symtab): New. (elfNN_aarch64_plt_sym_val): Update size accordingly. (elfNN_aarch64_link_setup_gnu_properties): Set up plts if BTI GNU NOTE is set. (bfd_elfNN_get_synthetic_symtab): Define. (elfNN_aarch64_merge_gnu_properties): Give out warning with --force-bti and mising BTI NOTE SECTION. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * readelf.c (get_aarch64_dynamic_type): New. (get_dynamic_type): Use above for EM_AARCH64. (dynamic_section_aarch64_val): New. (process_dynamic_section): Use above for EM_AARCH64. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * elf/aarch64.h (DT_AARCH64_BTI_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * NEWS: Document --force-bti. * emultempl/aarch64elf.em (plt_type, bti_type, OPTION_FORCE_BTI): New. (PARSE_AND_LIST_SHORTOPTS, PARSE_AND_LIST_OPTIONS): Add force-bti. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FORCE_BTI. * testsuite/ld-aarch64/aarch64-elf.exp: Add all the tests below. * testsuite/ld-aarch64/bti-plt-1.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: New test. * testsuite/ld-aarch64/bti-plt-2.s: New test. * testsuite/ld-aarch64/bti-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-3.d: New test. * testsuite/ld-aarch64/bti-plt-4.d: New test. * testsuite/ld-aarch64/bti-plt-5.d: New test. * testsuite/ld-aarch64/bti-plt-6.d: New test. * testsuite/ld-aarch64/bti-plt-7.d: New test. * testsuite/ld-aarch64/bti-plt-so.s: New test. * testsuite/ld-aarch64/bti-plt.ld: New test.
2019-03-13 11:54:30 +01:00
/* The bytes of the subsequent PLT entry. */
const bfd_byte *plt_entry;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* Small local sym cache. */
struct sym_cache sym_cache;
/* For convenience in allocate_dynrelocs. */
bfd *obfd;
/* The amount of space used by the reserved portion of the sgotplt
section, plus whatever space is used by the jump slots. */
bfd_vma sgotplt_jump_table_size;
/* The stub hash table. */
struct bfd_hash_table stub_hash_table;
/* Linker stub bfd. */
bfd *stub_bfd;
/* Linker call-backs. */
asection *(*add_stub_section) (const char *, asection *);
void (*layout_sections_again) (void);
/* Array to keep track of which stub sections have been created, and
information on stub grouping. */
struct map_stub
{
/* This is the section to which stubs in the group will be
attached. */
asection *link_sec;
/* The stub section. */
asection *stub_sec;
} *stub_group;
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
/* Assorted information used by elfNN_aarch64_size_stubs. */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
unsigned int bfd_count;
Make asection->id and asection->index unsigned These int vars are really unsigned, so make them so. * section.c (struct bfd_section): Make "id" and "index" unsigned. * coff-rs6000.c (_bfd_xcoff_sizeof_headers): Adjust local var to suit. * elf.c (elf_map_symbols): Likewise. * elf64-ppc.c (sym_exists_at): Make "id" param unsigned. (struct ppc_link_hash_table): Make "top_id" and "top_index" unsigned. (ppc64_elf_setup_section_lists): Ditto for local vars. * elf32-arm.c: Similarly to elf64-ppc.c. * elf32-avr.c: Likewise. * elf32-hppa.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-metag.c: Likewise. * elf32-nios2.c: Likewise. * elfnn-aarch64.c: Likewise. * simple.c (struct saved_offsets): Make "section_count" unsigned. * bfd-in2.h: Regenerate.
2015-08-31 01:02:29 +02:00
unsigned int top_index;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
asection **input_list;
aarch64: handle STO_AARCH64_VARIANT_PCS in bfd Propagate STO_AARCH64_VARIANT_PCS st_other attribute to the output and add DT_AARCH64_VARIANT_PCS dynamic tag if necessary. Mismatching attributes are not diagnosed. bfd/ChangeLog: * elfnn-aarch64.c (elfNN_aarch64_merge_symbol_attribute): New function. (struct elf_aarch64_link_hash_table): Add variant_pcs member. (elfNN_aarch64_allocate_dynrelocs): Update variant_pcs. (elfNN_aarch64_size_dynamic_sections): Add DT_AARCH64_VARIANT_PCS. (elf_backend_merge_symbol_attribute): Define. ld/ChangeLog: * testsuite/ld-aarch64/aarch64-elf.exp: Add new tests. * testsuite/ld-aarch64/variant_pcs-1.s: New asm for tests. * testsuite/ld-aarch64/variant_pcs-2.s: New asm for tests. * testsuite/ld-aarch64/variant_pcs-now.d: New test. * testsuite/ld-aarch64/variant_pcs-r.d: New test. * testsuite/ld-aarch64/variant_pcs-shared.d: New test. * testsuite/ld-aarch64/variant_pcs.ld: New linker script for tests.
2019-04-25 16:07:14 +02:00
/* JUMP_SLOT relocs for variant PCS symbols may be present. */
int variant_pcs;
[BFD, LD, AArch64, 2/3] Add --force-bti to enable BTI and to select BTI enabled PLTs This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds a new ld command line option: --force-bti. In the presence of this option, the linker enables BTI with the GNU_PROPERTY_AARCH64_FEATURE_1_BTI feature. This gives out warning in case of missing gnu notes for BTI in inputs. 2) It also defines a new set of BTI enabled PLTs. These are used either when all the inputs are marked with GNU_PROPERTY_AARCH64_FEATURE_1_BTI or when the new --force-bti option is used. This required adding new fields in elf_aarch64_link_hash_table so that we could make the PLT related information more generic. 3) It also defines a dynamic tag DT_AARCH64_BTI_PLT. The linker uses this whenever it picks BTI enabled PLTs. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * bfd-in.h (aarch64_plt_type, aarch64_enable_bti_type): New. (aarch64_bti_pac_info): New. (bfd_elf64_aarch64_set_options): Add aarch64_bti_pac_info argument. (bfd_elf32_aarch64_set_options): Likewise. * bfd-in2.h: Regenerate * elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): New. (PLT_BTI_SMALL_ENTRY_SIZE, PLT_BTI_TLSDESC_ENTRY_SIZE): New. (elfNN_aarch64_small_plt0_bti_entry): New. (elfNN_aarch64_small_plt_bti_entry): New. (elfNN_aarch64_tlsdesc_small_plt_bti_entry): New. (elf_aarch64_obj_tdata): Add no_bti_warn and plt_type fields. (elf_aarch64_link_hash_table): Add plt0_entry, plt_entry and tlsdesc_plt_entry_size fields. (elfNN_aarch64_link_hash_table_create): Initialise the new fields. (setup_plt_values): New helper function. (bfd_elfNN_aarch64_set_options): Use new bp_info to set plt sizes and bti enable type. (elfNN_aarch64_allocate_dynrelocs): Use new size members instead of fixed macros. (elfNN_aarch64_size_dynamic_sections): Likewise and add checks. (elfNN_aarch64_create_small_pltn_entry): Use new generic pointers to plt stubs instead of fixed ones and update filling them according to the need for bti. (elfNN_aarch64_init_small_plt0_entry): Likewise. (elfNN_aarch64_finish_dynamic_sections): Likewise. (get_plt_type, elfNN_aarch64_get_synthetic_symtab): New. (elfNN_aarch64_plt_sym_val): Update size accordingly. (elfNN_aarch64_link_setup_gnu_properties): Set up plts if BTI GNU NOTE is set. (bfd_elfNN_get_synthetic_symtab): Define. (elfNN_aarch64_merge_gnu_properties): Give out warning with --force-bti and mising BTI NOTE SECTION. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * readelf.c (get_aarch64_dynamic_type): New. (get_dynamic_type): Use above for EM_AARCH64. (dynamic_section_aarch64_val): New. (process_dynamic_section): Use above for EM_AARCH64. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * elf/aarch64.h (DT_AARCH64_BTI_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * NEWS: Document --force-bti. * emultempl/aarch64elf.em (plt_type, bti_type, OPTION_FORCE_BTI): New. (PARSE_AND_LIST_SHORTOPTS, PARSE_AND_LIST_OPTIONS): Add force-bti. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FORCE_BTI. * testsuite/ld-aarch64/aarch64-elf.exp: Add all the tests below. * testsuite/ld-aarch64/bti-plt-1.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: New test. * testsuite/ld-aarch64/bti-plt-2.s: New test. * testsuite/ld-aarch64/bti-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-3.d: New test. * testsuite/ld-aarch64/bti-plt-4.d: New test. * testsuite/ld-aarch64/bti-plt-5.d: New test. * testsuite/ld-aarch64/bti-plt-6.d: New test. * testsuite/ld-aarch64/bti-plt-7.d: New test. * testsuite/ld-aarch64/bti-plt-so.s: New test. * testsuite/ld-aarch64/bti-plt.ld: New test.
2019-03-13 11:54:30 +01:00
/* The number of bytes in the PLT enty for the TLS descriptor. */
bfd_size_type tlsdesc_plt_entry_size;
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
/* Used by local STT_GNU_IFUNC symbols. */
htab_t loc_hash_table;
void * loc_hash_memory;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
};
/* Create an entry in an AArch64 ELF linker hash table. */
static struct bfd_hash_entry *
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_link_hash_newfunc (struct bfd_hash_entry *entry,
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
struct bfd_hash_table *table,
const char *string)
{
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
struct elf_aarch64_link_hash_entry *ret =
(struct elf_aarch64_link_hash_entry *) entry;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* Allocate the structure if it has not already been allocated by a
subclass. */
if (ret == NULL)
ret = bfd_hash_allocate (table,
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
sizeof (struct elf_aarch64_link_hash_entry));
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
if (ret == NULL)
return (struct bfd_hash_entry *) ret;
/* Call the allocation method of the superclass. */
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
ret = ((struct elf_aarch64_link_hash_entry *)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
_bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
table, string));
if (ret != NULL)
{
ret->got_type = GOT_UNKNOWN;
ret->plt_got_offset = (bfd_vma) - 1;
ret->stub_cache = NULL;
ret->tlsdesc_got_jump_table_offset = (bfd_vma) - 1;
}
return (struct bfd_hash_entry *) ret;
}
/* Initialize an entry in the stub hash table. */
static struct bfd_hash_entry *
stub_hash_newfunc (struct bfd_hash_entry *entry,
struct bfd_hash_table *table, const char *string)
{
/* Allocate the structure if it has not already been allocated by a
subclass. */
if (entry == NULL)
{
entry = bfd_hash_allocate (table,
sizeof (struct
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elf_aarch64_stub_hash_entry));
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
if (entry == NULL)
return entry;
}
/* Call the allocation method of the superclass. */
entry = bfd_hash_newfunc (entry, table, string);
if (entry != NULL)
{
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
struct elf_aarch64_stub_hash_entry *eh;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* Initialize the local fields. */
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
eh = (struct elf_aarch64_stub_hash_entry *) entry;
[AArch64] Workaround for Cortex A53 erratum 843419 Some early revisions of the Cortex-A53 have an erratum (843419). The details of the erratum are quite complex and involve dynamic conditions. For the purposes of the workaround we have simplified the static conditions to an ADRP in the last two instructions of a 4KByte page, followed within four instructions by a load/store dependent on the ADRP. This patch adds support to conservatively scan for and workaround Cortex A53 erratum 843419. There are two different workaround strategies used. The first is to rewrite ADRP instructions which form part of an erratum sequence with an ADR instruction. In situations where the ADR provides insufficient offset the dependent load or store instruction from the sequence is moved to a stub section and branches are inserted from the original sequence to the relocated instruction and back again. Stub section sizes are rounded up to a multiple of 4096 in order to ensure that the act of inserting work around stubs does not create more errata sequences. Workaround stubs are always inserted into the stub section associated with the input section containing the erratum sequence. This ensures that the fully relocated form of the veneered load store instruction is available at the point in time when the stub section is written.
2015-02-24 13:04:41 +01:00
eh->adrp_offset = 0;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
eh->stub_sec = NULL;
eh->stub_offset = 0;
eh->target_value = 0;
eh->target_section = NULL;
eh->stub_type = aarch64_stub_none;
eh->h = NULL;
eh->id_sec = NULL;
}
return entry;
}
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
/* Compute a hash of a local hash entry. We use elf_link_hash_entry
for local symbol so that we can handle local STT_GNU_IFUNC symbols
as global symbol. We reuse indx and dynstr_index for local symbol
hash since they aren't used by global symbols in this backend. */
static hashval_t
elfNN_aarch64_local_htab_hash (const void *ptr)
{
struct elf_link_hash_entry *h
= (struct elf_link_hash_entry *) ptr;
return ELF_LOCAL_SYMBOL_HASH (h->indx, h->dynstr_index);
}
/* Compare local hash entries. */
static int
elfNN_aarch64_local_htab_eq (const void *ptr1, const void *ptr2)
{
struct elf_link_hash_entry *h1
= (struct elf_link_hash_entry *) ptr1;
struct elf_link_hash_entry *h2
= (struct elf_link_hash_entry *) ptr2;
return h1->indx == h2->indx && h1->dynstr_index == h2->dynstr_index;
}
/* Find and/or create a hash entry for local symbol. */
static struct elf_link_hash_entry *
elfNN_aarch64_get_local_sym_hash (struct elf_aarch64_link_hash_table *htab,
bfd *abfd, const Elf_Internal_Rela *rel,
bfd_boolean create)
{
struct elf_aarch64_link_hash_entry e, *ret;
asection *sec = abfd->sections;
hashval_t h = ELF_LOCAL_SYMBOL_HASH (sec->id,
ELFNN_R_SYM (rel->r_info));
void **slot;
e.root.indx = sec->id;
e.root.dynstr_index = ELFNN_R_SYM (rel->r_info);
slot = htab_find_slot_with_hash (htab->loc_hash_table, &e, h,
create ? INSERT : NO_INSERT);
if (!slot)
return NULL;
if (*slot)
{
ret = (struct elf_aarch64_link_hash_entry *) *slot;
return &ret->root;
}
ret = (struct elf_aarch64_link_hash_entry *)
objalloc_alloc ((struct objalloc *) htab->loc_hash_memory,
sizeof (struct elf_aarch64_link_hash_entry));
if (ret)
{
memset (ret, 0, sizeof (*ret));
ret->root.indx = sec->id;
ret->root.dynstr_index = ELFNN_R_SYM (rel->r_info);
ret->root.dynindx = -1;
*slot = ret;
}
return &ret->root;
}
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* Copy the extra info we tack onto an elf_link_hash_entry. */
static void
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_copy_indirect_symbol (struct bfd_link_info *info,
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
struct elf_link_hash_entry *dir,
struct elf_link_hash_entry *ind)
{
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
struct elf_aarch64_link_hash_entry *edir, *eind;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
edir = (struct elf_aarch64_link_hash_entry *) dir;
eind = (struct elf_aarch64_link_hash_entry *) ind;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
if (ind->root.type == bfd_link_hash_indirect)
{
/* Copy over PLT info. */
if (dir->got.refcount <= 0)
{
edir->got_type = eind->got_type;
eind->got_type = GOT_UNKNOWN;
}
}
_bfd_elf_link_hash_copy_indirect (info, dir, ind);
}
aarch64: handle STO_AARCH64_VARIANT_PCS in bfd Propagate STO_AARCH64_VARIANT_PCS st_other attribute to the output and add DT_AARCH64_VARIANT_PCS dynamic tag if necessary. Mismatching attributes are not diagnosed. bfd/ChangeLog: * elfnn-aarch64.c (elfNN_aarch64_merge_symbol_attribute): New function. (struct elf_aarch64_link_hash_table): Add variant_pcs member. (elfNN_aarch64_allocate_dynrelocs): Update variant_pcs. (elfNN_aarch64_size_dynamic_sections): Add DT_AARCH64_VARIANT_PCS. (elf_backend_merge_symbol_attribute): Define. ld/ChangeLog: * testsuite/ld-aarch64/aarch64-elf.exp: Add new tests. * testsuite/ld-aarch64/variant_pcs-1.s: New asm for tests. * testsuite/ld-aarch64/variant_pcs-2.s: New asm for tests. * testsuite/ld-aarch64/variant_pcs-now.d: New test. * testsuite/ld-aarch64/variant_pcs-r.d: New test. * testsuite/ld-aarch64/variant_pcs-shared.d: New test. * testsuite/ld-aarch64/variant_pcs.ld: New linker script for tests.
2019-04-25 16:07:14 +02:00
/* Merge non-visibility st_other attributes. */
static void
elfNN_aarch64_merge_symbol_attribute (struct elf_link_hash_entry *h,
const Elf_Internal_Sym *isym,
bfd_boolean definition ATTRIBUTE_UNUSED,
bfd_boolean dynamic ATTRIBUTE_UNUSED)
{
unsigned int isym_sto = isym->st_other & ~ELF_ST_VISIBILITY (-1);
unsigned int h_sto = h->other & ~ELF_ST_VISIBILITY (-1);
if (isym_sto == h_sto)
return;
if (isym_sto & ~STO_AARCH64_VARIANT_PCS)
/* Not fatal, this callback cannot fail. */
_bfd_error_handler (_("unknown attribute for symbol `%s': 0x%02x"),
h->root.root.string, isym_sto);
/* Note: Ideally we would warn about any attribute mismatch, but
this api does not allow that without substantial changes. */
if (isym_sto & STO_AARCH64_VARIANT_PCS)
h->other |= STO_AARCH64_VARIANT_PCS;
}
Move link_hash_table_free functions earlier Move some code around, in preparation for a followup patch. * elf-m10300.c, * elf32-arm.c, * elf32-avr.c, * elf32-hppa.c, * elf32-i386.c, * elf32-m68hc1x.c, * elf32-m68k.c, * elf32-metag.c, * elf32-nios2.c, * elf64-ia64-vms.c, * elf64-ppc.c, * elf64-x86-64.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfxx-sparc.c, * xcofflink.c: Move link_hash_table_free functions before their corresponding link_hash_table_create functions.
2014-06-13 11:41:19 +02:00
/* Destroy an AArch64 elf linker hash table. */
static void
Free linker hash table from bfd_close. Also tidies numerous error exit paths in various link_hash_table_create functions that failed to free memory. include/ * bfdlink.h (struct bfd_link_hash_table): Add hash_table_free field. bfd/ * archive.c: Include bfdlink.h. (_bfd_archive_close_and_cleanup): Call linker hash_table_free. * bfd.c (struct bfd): Add is_linker_output field. * elf-bfd.h (_bfd_elf_link_hash_table_free): Update prototype. * linker.c (_bfd_link_hash_table_init): Set up hash_table_free, link.hash and is_linker_output. (_bfd_generic_link_hash_table_free): Replace bfd_link_hash_table* param with bfd*. Assert is_linker_output and link.hash, and clear them before exit. * elf-m10300.c (elf32_mn10300_link_hash_table_free): Replace bfd_link_hash_table* param with bfd*. Hack is_linker_output and link.hash so we can free two linker hash tables. (elf32_mn10300_link_hash_table_create): Create static_hash_table first. Clean up on errors. Set hash_table_free pointer. * elf32-arm.c (elf32_arm_link_hash_table_free): Replace bfd_link_hash_table* param with bfd*. (elf32_arm_link_hash_table_create): Clean up on errors. Set hash_table_free pointer. * elf32-avr.c, * elf32-hppa.c, * elf32-i386.c, * elf32-m68hc1x.c, * elf32-m68k.c, * elf32-metag.c, * elf32-nios2.c, * elf32-xgate.c, * elf64-ia64-vms.c, * elf64-ppc.c, * elf64-x86-64.c, * elflink.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfxx-sparc.c, * xcofflink.c: Similarly. * simple.c (bfd_simple_get_relocated_section_contents): Save and clear link.next before creating linker hash table. Clean up on errors, and restore link.next on exit. * elf32-m68hc1x.h (m68hc11_elf_bfd_link_hash_table_free): Delete. * elf32-xgate.h (xgate_elf_bfd_link_hash_table_free): Delete. * elfxx-sparc.h (_bfd_sparc_elf_link_hash_table_free): Delete. * libcoff-in.h (_bfd_xcoff_bfd_link_hash_table_free): Delete. * hash.c (bfd_hash_table_init_n): Free table on error. * libbfd-in.h (_bfd_generic_link_hash_table_free): Update proto. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * libcoff.h: Regenerate.
2014-06-13 11:41:39 +02:00
elfNN_aarch64_link_hash_table_free (bfd *obfd)
Move link_hash_table_free functions earlier Move some code around, in preparation for a followup patch. * elf-m10300.c, * elf32-arm.c, * elf32-avr.c, * elf32-hppa.c, * elf32-i386.c, * elf32-m68hc1x.c, * elf32-m68k.c, * elf32-metag.c, * elf32-nios2.c, * elf64-ia64-vms.c, * elf64-ppc.c, * elf64-x86-64.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfxx-sparc.c, * xcofflink.c: Move link_hash_table_free functions before their corresponding link_hash_table_create functions.
2014-06-13 11:41:19 +02:00
{
struct elf_aarch64_link_hash_table *ret
Free linker hash table from bfd_close. Also tidies numerous error exit paths in various link_hash_table_create functions that failed to free memory. include/ * bfdlink.h (struct bfd_link_hash_table): Add hash_table_free field. bfd/ * archive.c: Include bfdlink.h. (_bfd_archive_close_and_cleanup): Call linker hash_table_free. * bfd.c (struct bfd): Add is_linker_output field. * elf-bfd.h (_bfd_elf_link_hash_table_free): Update prototype. * linker.c (_bfd_link_hash_table_init): Set up hash_table_free, link.hash and is_linker_output. (_bfd_generic_link_hash_table_free): Replace bfd_link_hash_table* param with bfd*. Assert is_linker_output and link.hash, and clear them before exit. * elf-m10300.c (elf32_mn10300_link_hash_table_free): Replace bfd_link_hash_table* param with bfd*. Hack is_linker_output and link.hash so we can free two linker hash tables. (elf32_mn10300_link_hash_table_create): Create static_hash_table first. Clean up on errors. Set hash_table_free pointer. * elf32-arm.c (elf32_arm_link_hash_table_free): Replace bfd_link_hash_table* param with bfd*. (elf32_arm_link_hash_table_create): Clean up on errors. Set hash_table_free pointer. * elf32-avr.c, * elf32-hppa.c, * elf32-i386.c, * elf32-m68hc1x.c, * elf32-m68k.c, * elf32-metag.c, * elf32-nios2.c, * elf32-xgate.c, * elf64-ia64-vms.c, * elf64-ppc.c, * elf64-x86-64.c, * elflink.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfxx-sparc.c, * xcofflink.c: Similarly. * simple.c (bfd_simple_get_relocated_section_contents): Save and clear link.next before creating linker hash table. Clean up on errors, and restore link.next on exit. * elf32-m68hc1x.h (m68hc11_elf_bfd_link_hash_table_free): Delete. * elf32-xgate.h (xgate_elf_bfd_link_hash_table_free): Delete. * elfxx-sparc.h (_bfd_sparc_elf_link_hash_table_free): Delete. * libcoff-in.h (_bfd_xcoff_bfd_link_hash_table_free): Delete. * hash.c (bfd_hash_table_init_n): Free table on error. * libbfd-in.h (_bfd_generic_link_hash_table_free): Update proto. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * libcoff.h: Regenerate.
2014-06-13 11:41:39 +02:00
= (struct elf_aarch64_link_hash_table *) obfd->link.hash;
Move link_hash_table_free functions earlier Move some code around, in preparation for a followup patch. * elf-m10300.c, * elf32-arm.c, * elf32-avr.c, * elf32-hppa.c, * elf32-i386.c, * elf32-m68hc1x.c, * elf32-m68k.c, * elf32-metag.c, * elf32-nios2.c, * elf64-ia64-vms.c, * elf64-ppc.c, * elf64-x86-64.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfxx-sparc.c, * xcofflink.c: Move link_hash_table_free functions before their corresponding link_hash_table_create functions.
2014-06-13 11:41:19 +02:00
if (ret->loc_hash_table)
htab_delete (ret->loc_hash_table);
if (ret->loc_hash_memory)
objalloc_free ((struct objalloc *) ret->loc_hash_memory);
bfd_hash_table_free (&ret->stub_hash_table);
Free linker hash table from bfd_close. Also tidies numerous error exit paths in various link_hash_table_create functions that failed to free memory. include/ * bfdlink.h (struct bfd_link_hash_table): Add hash_table_free field. bfd/ * archive.c: Include bfdlink.h. (_bfd_archive_close_and_cleanup): Call linker hash_table_free. * bfd.c (struct bfd): Add is_linker_output field. * elf-bfd.h (_bfd_elf_link_hash_table_free): Update prototype. * linker.c (_bfd_link_hash_table_init): Set up hash_table_free, link.hash and is_linker_output. (_bfd_generic_link_hash_table_free): Replace bfd_link_hash_table* param with bfd*. Assert is_linker_output and link.hash, and clear them before exit. * elf-m10300.c (elf32_mn10300_link_hash_table_free): Replace bfd_link_hash_table* param with bfd*. Hack is_linker_output and link.hash so we can free two linker hash tables. (elf32_mn10300_link_hash_table_create): Create static_hash_table first. Clean up on errors. Set hash_table_free pointer. * elf32-arm.c (elf32_arm_link_hash_table_free): Replace bfd_link_hash_table* param with bfd*. (elf32_arm_link_hash_table_create): Clean up on errors. Set hash_table_free pointer. * elf32-avr.c, * elf32-hppa.c, * elf32-i386.c, * elf32-m68hc1x.c, * elf32-m68k.c, * elf32-metag.c, * elf32-nios2.c, * elf32-xgate.c, * elf64-ia64-vms.c, * elf64-ppc.c, * elf64-x86-64.c, * elflink.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfxx-sparc.c, * xcofflink.c: Similarly. * simple.c (bfd_simple_get_relocated_section_contents): Save and clear link.next before creating linker hash table. Clean up on errors, and restore link.next on exit. * elf32-m68hc1x.h (m68hc11_elf_bfd_link_hash_table_free): Delete. * elf32-xgate.h (xgate_elf_bfd_link_hash_table_free): Delete. * elfxx-sparc.h (_bfd_sparc_elf_link_hash_table_free): Delete. * libcoff-in.h (_bfd_xcoff_bfd_link_hash_table_free): Delete. * hash.c (bfd_hash_table_init_n): Free table on error. * libbfd-in.h (_bfd_generic_link_hash_table_free): Update proto. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * libcoff.h: Regenerate.
2014-06-13 11:41:39 +02:00
_bfd_elf_link_hash_table_free (obfd);
Move link_hash_table_free functions earlier Move some code around, in preparation for a followup patch. * elf-m10300.c, * elf32-arm.c, * elf32-avr.c, * elf32-hppa.c, * elf32-i386.c, * elf32-m68hc1x.c, * elf32-m68k.c, * elf32-metag.c, * elf32-nios2.c, * elf64-ia64-vms.c, * elf64-ppc.c, * elf64-x86-64.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfxx-sparc.c, * xcofflink.c: Move link_hash_table_free functions before their corresponding link_hash_table_create functions.
2014-06-13 11:41:19 +02:00
}
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* Create an AArch64 elf linker hash table. */
static struct bfd_link_hash_table *
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_link_hash_table_create (bfd *abfd)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
struct elf_aarch64_link_hash_table *ret;
bfd_size_type to size_t bfd_size_type was invented a long time ago in the K&R days. Many places in binutils ought to be using size_t instead (and there are lots of places that use long or unsigned long that really ought to use size_t too). Note that you can't change everything over to size_t: A 32-bit host needs a larger type than size_t to support reading and processing of 64-bit ELF object files. This patch just tidies some of the more obvious uses of bfd_size_type that could be size_t. There no doubt are more lurking in the source. Incidentally, practically all functions used for output of object files can use size_t and don't need to worry about overflow of size expressions. If you have something like symcount * sizeof (void *) when symcount is counting symbols already in memory then you know that this expression can't overflow since the size of a symbol in memory is larger by far than that of a pointer. * aix386-core.c (aix386_core_file_p): Use size_t for "amt". * aout-target.h (object_p): Likewise. * aout-tic30.c (tic30_aout_object_p): Likewise. * aoutx.h (some_aout_object_p, mkobject, make_empty_symbol), (emit_stringtab, write_syms, link_hash_table_create), (aout_link_write_other_symbol): Likewise. * archive.c (_bfd_generic_mkarchive, bfd_generic_archive_p), (bfd_ar_hdr_from_filesystem, _bfd_write_archive_contents), (_bfd_compute_and_write_armap): Likewise. * archures.c (bfd_arch_list): Likewise. * bfd.c (bfd_record_phdr): Likewise. * binary.c (binary_canonicalize_symtab): Likewise. * cisco-core.c (cisco_core_file_validate): Likewise. * coff-arm.c (coff_arm_link_hash_table_create, find_thumb_glue), (find_arm_glue, record_arm_to_thumb_glue), (record_thumb_to_arm_glue): Likewise. * coff-ppc.c (ppc_coff_link_hash_table_create, record_toc), (ppc_allocate_toc_section): Likewise. * coff-rs6000.c (_bfd_xcoff_mkobject, _bfd_xcoff_archive_p): Likewise. * coff-sh.c (sh_relax_section): Likewise. * coff64-rs6000.c (xcoff64_archive_p): Likewise. * coffcode.h (handle_COMDAT, coff_new_section_hook), (coff_set_alignment_hook, coff_mkobject), (coff_compute_section_file_positions): Likewise. * coffgen.c (coff_make_empty_symbol, coff_bfd_make_debug_symbol), (coff_find_nearest_line_with_names), ( bfd_coff_set_symbol_class): Likewise. * cofflink.c (_bfd_coff_link_hash_table_create), (_bfd_coff_link_input_bfd): Likewise. * dwarf1.c (alloc_dwarf1_unit, alloc_dwarf1_func): Likewise. * dwarf2.c (read_abbrevs, read_attribute_value, add_line_info), (build_line_info_table, sort_line_sequences), (line_info_add_include_dir, line_info_add_file_name), (decode_line_info, scan_unit_for_symbols, parse_comp_unit), (place_sections, _bfd_dwarf2_slurp_debug_info): Likewise. * ecoff.c (_bfd_ecoff_mkobject, _bfd_ecoff_make_empty_symbol), (_bfd_ecoff_find_nearest_line), (_bfd_ecoff_bfd_link_hash_table_create): Likewise. * ecofflink.c (bfd_ecoff_debug_init): Likewise. * elf-hppa.h (_bfd_elf_hppa_gen_reloc_type): Likewise. * elf-m10300.c (mn10300_elf_relax_section), (elf32_mn10300_link_hash_table_create): Likewise. * elf-strtab.c (_bfd_elf_strtab_init): Likewise. * elf.c (make_mapping, copy_elf_program_header): Likewise. * elf32-arm.c (elf32_arm_link_hash_table_create), (elf32_arm_setup_section_lists, elf32_arm_check_relocs), (elf32_arm_new_section_hook): Likewise. * elf32-avr.c (elf_avr_new_section_hook), (elf32_avr_link_hash_table_create, get_local_syms), (elf32_avr_setup_section_lists): Likewise. * elf32-bfin.c (bfinfdpic_elf_link_hash_table_create), (bfin_link_hash_table_create): Likewise. * elf32-cr16.c (elf32_cr16_link_hash_table_create): Likewise. * elf32-cris.c (elf_cris_link_hash_table_create): Likewise. * elf32-csky.c (csky_elf_link_hash_table_create), (csky_elf_check_relocs, elf32_csky_setup_section_lists): Likewise. * elf32-frv.c (frvfdpic_elf_link_hash_table_create): Likewise. * elf32-hppa.c (elf32_hppa_link_hash_table_create), (elf32_hppa_setup_section_lists, get_local_syms): Likewise. * elf32-i386.c (elf_i386_check_relocs): Likewise. * elf32-lm32.c (lm32_elf_link_hash_table_create): Likewise. * elf32-m32r.c (m32r_elf_link_hash_table_create), (m32r_elf_check_relocs): Likewise. * elf32-m68hc1x.c (m68hc11_elf_hash_table_create), (elf32_m68hc11_setup_section_lists), (elf32_m68hc11_size_stubs): Likewise. * elf32-m68k.c (elf_m68k_link_hash_table_create): Likewise. * elf32-metag.c (elf_metag_link_hash_table_create), (elf_metag_setup_section_lists): Likewise. * elf32-microblaze.c (microblaze_elf_link_hash_table_create), (microblaze_elf_check_relocs): Likewise. * elf32-nds32.c (nds32_elf_link_hash_table_create), (nds32_elf_check_relocs): Likewise. * elf32-nios2.c (nios2_elf32_setup_section_lists), (get_local_syms, nios2_elf32_check_relocs), (nios2_elf32_link_hash_table_create): Likewise. * elf32-or1k.c (or1k_elf_link_hash_table_create), (or1k_elf_check_relocs): Likewise. * elf32-ppc.c (ppc_elf_modify_segment_map, update_plt_info): Likewise. * elf32-pru.c (pru_elf32_link_hash_table_create): Likewise. * elf32-s390.c (elf_s390_link_hash_table_create), (elf_s390_check_relocs): Likewise. * elf32-score.c (score_elf_create_got_section), (s3_elf32_score_new_section_hook), (elf32_score_link_hash_table_create): Likewise. * elf32-score7.c (score_elf_create_got_section), (s7_elf32_score_new_section_hook): Likewise. * elf32-sh.c (sh_elf_link_hash_table_create), (sh_elf_check_relocs): Likewise. * elf32-tic6x.c (elf32_tic6x_link_hash_table_create), (elf32_tic6x_new_section_hook, elf32_tic6x_check_relocs): Likewise. * elf32-tilepro.c (tilepro_elf_link_hash_table_create), (tilepro_elf_check_relocs): Likewise. * elf32-v850.c (remember_hi16s_reloc): Likewise. * elf32-vax.c (elf_vax_link_hash_table_create): Likewise. * elf32-xtensa.c (elf_xtensa_link_hash_table_create), (elf_xtensa_new_section_hook): Likewise. * elf64-alpha.c (elf64_alpha_bfd_link_hash_table_create), (get_got_entry, elf64_alpha_check_relocs): Likewise. * elf64-hppa.c (elf64_hppa_hash_table_create): Likewise. * elf64-ia64-vms.c (elf64_ia64_object_p): Likewise. * elf64-mmix.c (mmix_elf_new_section_hook): Likewise. * elf64-ppc.c (ppc64_elf_new_section_hook), (ppc64_elf_link_hash_table_create, update_local_sym_info), (update_plt_info, ppc64_elf_check_relocs): Likewise. * elf64-s390.c (elf_s390_link_hash_table_create), (elf_s390_check_relocs): Likewise. * elf64-x86-64.c (elf_x86_64_check_relocs): Likewise. * elflink.c (bfd_elf_link_record_local_dynamic_symbol), (_bfd_elf_link_find_version_dependencies, elf_link_add_object_symbols), (elf_link_add_archive_symbols, compute_bucket_count), (bfd_elf_size_dynsym_hash_dynstr, _bfd_elf_link_hash_table_create), (bfd_elf_get_bfd_needed_list, elf_link_swap_symbols_out), (bfd_elf_final_link): Likewise. * elfnn-aarch64.c (elfNN_aarch64_link_hash_table_create), (elfNN_aarch64_setup_section_lists, elfNN_aarch64_check_relocs), (elfNN_aarch64_new_section_hook): Likewise. * elfnn-ia64.c (elfNN_ia64_object_p): Likewise. * elfnn-riscv.c (riscv_elf_link_hash_table_create), (riscv_elf_check_relocs): Likewise. * elfxx-mips.c (_bfd_mips_elf_new_section_hook), (_bfd_mips_elf_add_symbol_hook, _bfd_mips_elf_check_relocs), (_bfd_mips_elf_modify_segment_map, _bfd_mips_elf_set_section_contents), (_bfd_mips_elf_link_hash_table_create): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_link_hash_table_create), (_bfd_sparc_elf_check_relocs), (_bfd_sparc_elf_new_section_hook): Likewise. * elfxx-tilegx.c (tilegx_elf_link_hash_table_create), (tilegx_elf_check_relocs): Likewise. * elfxx-x86.c (_bfd_x86_elf_link_hash_table_create): Likewise. * format.c (bfd_check_format_matches): Likewise. * hash.c (_bfd_stringtab_init): Likewise. * ihex.c (ihex_scan): Likewise. * irix-core.c (irix_core_core_file_p): Likewise. * linker.c (bfd_wrapped_link_hash_lookup), (_bfd_generic_link_hash_table_create), (_bfd_generic_reloc_link_order): Likewise. * lynx-core.c (lynx_core_file_p): Likewise. * netbsd-core.c (netbsd_core_file_p): Likewise. * osf-core.c (osf_core_core_file_p): Likewise. * pdp11.c (some_aout_object_p, mkobject, make_empty_symbol), (link_hash_table_create, aout_link_write_other_symbol): Likewise. * peXXigen.c (_bfd_XX_bfd_copy_private_section_data): Likewise. * peicode.h (pe_mkobject): Likewise. * ppcboot.c (ppcboot_mkobject, ppcboot_canonicalize_symtab): Likewise. * ptrace-core.c (ptrace_unix_core_file_p): Likewise. * sco5-core.c (read_uarea): Likewise. * som.c (hppa_som_gen_reloc_type, som_object_p, som_prep_headers), (som_write_fixups, som_write_space_strings, som_write_symbol_strings), (som_finish_writing, som_canonicalize_symtab, som_new_section_hook), (som_bfd_copy_private_section_data, bfd_som_set_section_attributes), (bfd_som_attach_aux_hdr, som_write_armap): Likewise. * srec.c (srec_scan): Likewise. * syms.c (_bfd_generic_make_empty_symbol): Likewise. * targets.c (bfd_target_list): Likewise. * tekhex.c (first_phase, tekhex_sizeof_headers): Likewise. * trad-core.c (trad_unix_core_file_p): Likewise. * vms-alpha.c (vms_initialize, alpha_vms_bfd_link_hash_table_create), (vms_new_section_hook): Likewise. * wasm-module.c (wasm_make_empty_symbol): Likewise. * xcofflink.c (xcoff_get_section_contents), (_bfd_xcoff_bfd_link_hash_table_create, xcoff_set_import_path), (xcoff_find_function, bfd_xcoff_link_record_set, xcoff_build_ldsym), (bfd_xcoff_size_dynamic_sections, xcoff_link_input_bfd): Likewise.
2020-02-19 03:42:00 +01:00
size_t amt = sizeof (struct elf_aarch64_link_hash_table);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
* coff-arm.c (coff_arm_link_hash_table_create): Use bfd_zmalloc. * coff-h8300.c (h8300_coff_link_hash_table_create): Likewise. * m68klinux.c (linux_link_hash_table_create): Likewise. * sparclinux.c (linux_link_hash_table_create): Likewise. * sunos.c (sunos_link_hash_table_create): Likewise. * xcofflink.c (_bfd_xcoff_bfd_link_hash_table_create): Likewise. * elf-m10300.c (elf32_mn10300_link_hash_table_create): Likewise. * elf32-arm.c (elf32_arm_link_hash_table_create): Likewise. * elf32-avr.c (elf32_avr_link_hash_table_create): Likewise. * elf32-cr16.c (elf32_cr16_link_hash_table_create): Likewise. * elf32-cris.c (elf_cris_link_hash_table_create): Likewise. * elf32-hppa.c (elf32_hppa_link_hash_table_create): Likewise. * elf32-i386.c (elf_i386_link_hash_table_create): Likewise. * elf32-lm32.c (lm32_elf_link_hash_table_create): Likewise. * elf32-m32r.c (m32r_elf_link_hash_table_create): Likewise. * elf32-m68hc1x.c (m68hc11_elf_hash_table_create): Likewise. * elf32-m68k.c (elf_m68k_link_hash_table_create): Likewise. * elf32-metag.c (elf_metag_link_hash_table_create): Likewise. * elf32-nios2.c (nios2_elf32_link_hash_table_create): Likewise. * elf32-s390.c (elf_s390_link_hash_table_create): Likewise. * elf32-score.c (elf32_score_link_hash_table_create): Likewise. * elf32-spu.c (spu_elf_link_hash_table_create): Likewise. * elf32-tic6x.c (elf32_tic6x_link_hash_table_create): Likewise. * elf32-vax.c (elf_vax_link_hash_table_create): Likewise. * elf32-xgate.c (xgate_elf_bfd_link_hash_table_create): Likewise. * elf32-xtensa.c (elf_xtensa_link_hash_table_create): Likewise. * elf64-aarch64.c (elf64_aarch64_link_hash_table_create): Likewise. * elf64-s390.c (elf_s390_link_hash_table_create): Likewise. * elf64-sh64.c (sh64_elf64_link_hash_table_create): Likewise. * elf64-x86-64.c (elf_x86_64_link_hash_table_create): Likewise. * elfxx-mips.c (_bfd_mips_elf_link_hash_table_create): Likewise. * elflink.c (_bfd_elf_link_hash_table_create): Likewise. (_bfd_elf_link_hash_table_init): Assume zero fill table on entry.
2013-02-10 05:36:33 +01:00
ret = bfd_zmalloc (amt);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
if (ret == NULL)
return NULL;
if (!_bfd_elf_link_hash_table_init
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
(&ret->root, abfd, elfNN_aarch64_link_hash_newfunc,
sizeof (struct elf_aarch64_link_hash_entry), AARCH64_ELF_DATA))
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
free (ret);
return NULL;
}
ret->plt_header_size = PLT_ENTRY_SIZE;
[BFD, LD, AArch64, 2/3] Add --force-bti to enable BTI and to select BTI enabled PLTs This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds a new ld command line option: --force-bti. In the presence of this option, the linker enables BTI with the GNU_PROPERTY_AARCH64_FEATURE_1_BTI feature. This gives out warning in case of missing gnu notes for BTI in inputs. 2) It also defines a new set of BTI enabled PLTs. These are used either when all the inputs are marked with GNU_PROPERTY_AARCH64_FEATURE_1_BTI or when the new --force-bti option is used. This required adding new fields in elf_aarch64_link_hash_table so that we could make the PLT related information more generic. 3) It also defines a dynamic tag DT_AARCH64_BTI_PLT. The linker uses this whenever it picks BTI enabled PLTs. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * bfd-in.h (aarch64_plt_type, aarch64_enable_bti_type): New. (aarch64_bti_pac_info): New. (bfd_elf64_aarch64_set_options): Add aarch64_bti_pac_info argument. (bfd_elf32_aarch64_set_options): Likewise. * bfd-in2.h: Regenerate * elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): New. (PLT_BTI_SMALL_ENTRY_SIZE, PLT_BTI_TLSDESC_ENTRY_SIZE): New. (elfNN_aarch64_small_plt0_bti_entry): New. (elfNN_aarch64_small_plt_bti_entry): New. (elfNN_aarch64_tlsdesc_small_plt_bti_entry): New. (elf_aarch64_obj_tdata): Add no_bti_warn and plt_type fields. (elf_aarch64_link_hash_table): Add plt0_entry, plt_entry and tlsdesc_plt_entry_size fields. (elfNN_aarch64_link_hash_table_create): Initialise the new fields. (setup_plt_values): New helper function. (bfd_elfNN_aarch64_set_options): Use new bp_info to set plt sizes and bti enable type. (elfNN_aarch64_allocate_dynrelocs): Use new size members instead of fixed macros. (elfNN_aarch64_size_dynamic_sections): Likewise and add checks. (elfNN_aarch64_create_small_pltn_entry): Use new generic pointers to plt stubs instead of fixed ones and update filling them according to the need for bti. (elfNN_aarch64_init_small_plt0_entry): Likewise. (elfNN_aarch64_finish_dynamic_sections): Likewise. (get_plt_type, elfNN_aarch64_get_synthetic_symtab): New. (elfNN_aarch64_plt_sym_val): Update size accordingly. (elfNN_aarch64_link_setup_gnu_properties): Set up plts if BTI GNU NOTE is set. (bfd_elfNN_get_synthetic_symtab): Define. (elfNN_aarch64_merge_gnu_properties): Give out warning with --force-bti and mising BTI NOTE SECTION. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * readelf.c (get_aarch64_dynamic_type): New. (get_dynamic_type): Use above for EM_AARCH64. (dynamic_section_aarch64_val): New. (process_dynamic_section): Use above for EM_AARCH64. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * elf/aarch64.h (DT_AARCH64_BTI_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * NEWS: Document --force-bti. * emultempl/aarch64elf.em (plt_type, bti_type, OPTION_FORCE_BTI): New. (PARSE_AND_LIST_SHORTOPTS, PARSE_AND_LIST_OPTIONS): Add force-bti. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FORCE_BTI. * testsuite/ld-aarch64/aarch64-elf.exp: Add all the tests below. * testsuite/ld-aarch64/bti-plt-1.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: New test. * testsuite/ld-aarch64/bti-plt-2.s: New test. * testsuite/ld-aarch64/bti-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-3.d: New test. * testsuite/ld-aarch64/bti-plt-4.d: New test. * testsuite/ld-aarch64/bti-plt-5.d: New test. * testsuite/ld-aarch64/bti-plt-6.d: New test. * testsuite/ld-aarch64/bti-plt-7.d: New test. * testsuite/ld-aarch64/bti-plt-so.s: New test. * testsuite/ld-aarch64/bti-plt.ld: New test.
2019-03-13 11:54:30 +01:00
ret->plt0_entry = elfNN_aarch64_small_plt0_entry;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
ret->plt_entry_size = PLT_SMALL_ENTRY_SIZE;
[BFD, LD, AArch64, 2/3] Add --force-bti to enable BTI and to select BTI enabled PLTs This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds a new ld command line option: --force-bti. In the presence of this option, the linker enables BTI with the GNU_PROPERTY_AARCH64_FEATURE_1_BTI feature. This gives out warning in case of missing gnu notes for BTI in inputs. 2) It also defines a new set of BTI enabled PLTs. These are used either when all the inputs are marked with GNU_PROPERTY_AARCH64_FEATURE_1_BTI or when the new --force-bti option is used. This required adding new fields in elf_aarch64_link_hash_table so that we could make the PLT related information more generic. 3) It also defines a dynamic tag DT_AARCH64_BTI_PLT. The linker uses this whenever it picks BTI enabled PLTs. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * bfd-in.h (aarch64_plt_type, aarch64_enable_bti_type): New. (aarch64_bti_pac_info): New. (bfd_elf64_aarch64_set_options): Add aarch64_bti_pac_info argument. (bfd_elf32_aarch64_set_options): Likewise. * bfd-in2.h: Regenerate * elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): New. (PLT_BTI_SMALL_ENTRY_SIZE, PLT_BTI_TLSDESC_ENTRY_SIZE): New. (elfNN_aarch64_small_plt0_bti_entry): New. (elfNN_aarch64_small_plt_bti_entry): New. (elfNN_aarch64_tlsdesc_small_plt_bti_entry): New. (elf_aarch64_obj_tdata): Add no_bti_warn and plt_type fields. (elf_aarch64_link_hash_table): Add plt0_entry, plt_entry and tlsdesc_plt_entry_size fields. (elfNN_aarch64_link_hash_table_create): Initialise the new fields. (setup_plt_values): New helper function. (bfd_elfNN_aarch64_set_options): Use new bp_info to set plt sizes and bti enable type. (elfNN_aarch64_allocate_dynrelocs): Use new size members instead of fixed macros. (elfNN_aarch64_size_dynamic_sections): Likewise and add checks. (elfNN_aarch64_create_small_pltn_entry): Use new generic pointers to plt stubs instead of fixed ones and update filling them according to the need for bti. (elfNN_aarch64_init_small_plt0_entry): Likewise. (elfNN_aarch64_finish_dynamic_sections): Likewise. (get_plt_type, elfNN_aarch64_get_synthetic_symtab): New. (elfNN_aarch64_plt_sym_val): Update size accordingly. (elfNN_aarch64_link_setup_gnu_properties): Set up plts if BTI GNU NOTE is set. (bfd_elfNN_get_synthetic_symtab): Define. (elfNN_aarch64_merge_gnu_properties): Give out warning with --force-bti and mising BTI NOTE SECTION. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * readelf.c (get_aarch64_dynamic_type): New. (get_dynamic_type): Use above for EM_AARCH64. (dynamic_section_aarch64_val): New. (process_dynamic_section): Use above for EM_AARCH64. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * elf/aarch64.h (DT_AARCH64_BTI_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * NEWS: Document --force-bti. * emultempl/aarch64elf.em (plt_type, bti_type, OPTION_FORCE_BTI): New. (PARSE_AND_LIST_SHORTOPTS, PARSE_AND_LIST_OPTIONS): Add force-bti. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FORCE_BTI. * testsuite/ld-aarch64/aarch64-elf.exp: Add all the tests below. * testsuite/ld-aarch64/bti-plt-1.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: New test. * testsuite/ld-aarch64/bti-plt-2.s: New test. * testsuite/ld-aarch64/bti-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-3.d: New test. * testsuite/ld-aarch64/bti-plt-4.d: New test. * testsuite/ld-aarch64/bti-plt-5.d: New test. * testsuite/ld-aarch64/bti-plt-6.d: New test. * testsuite/ld-aarch64/bti-plt-7.d: New test. * testsuite/ld-aarch64/bti-plt-so.s: New test. * testsuite/ld-aarch64/bti-plt.ld: New test.
2019-03-13 11:54:30 +01:00
ret->plt_entry = elfNN_aarch64_small_plt_entry;
ret->tlsdesc_plt_entry_size = PLT_TLSDESC_ENTRY_SIZE;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
ret->obfd = abfd;
ELF: Move tlsdesc_plt/tlsdesc_got to elf_link_hash_table All ELF backends with TLS descriptor support have /* The offset into splt of the PLT entry for the TLS descriptor resolver. Special values are 0, if not necessary (or not found to be necessary yet), and -1 if needed but not determined yet. */ bfd_vma tlsdesc_plt; /* The GOT offset for the lazy trampoline. Communicated to the loader via DT_TLSDESC_GOT. The magic value (bfd_vma) -1 indicates an offset is not allocated. */ bfd_vma tlsdesc_got; in symbol hash entry. Move tlsdesc_plt/tlsdesc_got to elf_link_hash_entry to reduce code duplication. * elf-bfd.h (elf_link_hash_entry): Add tlsdesc_plt and tlsdesc_got. * elf32-arm.c (elf32_arm_link_hash_table): Remove tlsdesc_plt and dt_tlsdesc_got. (elf32_arm_size_dynamic_sections): Updated. Clear root.tlsdesc_plt for DF_BIND_NOW. (elf32_arm_finish_dynamic_sections): Updated. (elf32_arm_output_arch_local_syms): Likewise. * elf32-nds32.c (nds32_elf_size_dynamic_sections): Updated. Clear root.tlsdesc_plt for DF_BIND_NOW. (nds32_elf_finish_dynamic_sections): Updated. * elf32-nds32.h (elf_nds32_link_hash_table): Remove dt_tlsdesc_plt and dt_tlsdesc_got. * elf64-x86-64.c (elf_x86_64_finish_dynamic_sections): Updated. * elfnn-aarch64.c (elf_aarch64_link_hash_table): Remove tlsdesc_plt and dt_tlsdesc_got. (elfNN_aarch64_allocate_dynrelocs): Updated. (elfNN_aarch64_finish_dynamic_sections): Likewise. (elfNN_aarch64_size_dynamic_sections): Updated. Clear root.tlsdesc_plt for DF_BIND_NOW. Don't check DF_BIND_NOW twice. * elfxx-x86.c (elf_x86_allocate_dynrelocs): Updated. (_bfd_x86_elf_size_dynamic_sections): Likewise. (_bfd_x86_elf_finish_dynamic_sections): Likewise. * elfxx-x86.h (elf_x86_link_hash_table): Remove tlsdesc_plt and tlsdesc_got.
2020-06-08 13:24:04 +02:00
ret->root.tlsdesc_got = (bfd_vma) - 1;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
sizeof (struct elf_aarch64_stub_hash_entry)))
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
Free linker hash table from bfd_close. Also tidies numerous error exit paths in various link_hash_table_create functions that failed to free memory. include/ * bfdlink.h (struct bfd_link_hash_table): Add hash_table_free field. bfd/ * archive.c: Include bfdlink.h. (_bfd_archive_close_and_cleanup): Call linker hash_table_free. * bfd.c (struct bfd): Add is_linker_output field. * elf-bfd.h (_bfd_elf_link_hash_table_free): Update prototype. * linker.c (_bfd_link_hash_table_init): Set up hash_table_free, link.hash and is_linker_output. (_bfd_generic_link_hash_table_free): Replace bfd_link_hash_table* param with bfd*. Assert is_linker_output and link.hash, and clear them before exit. * elf-m10300.c (elf32_mn10300_link_hash_table_free): Replace bfd_link_hash_table* param with bfd*. Hack is_linker_output and link.hash so we can free two linker hash tables. (elf32_mn10300_link_hash_table_create): Create static_hash_table first. Clean up on errors. Set hash_table_free pointer. * elf32-arm.c (elf32_arm_link_hash_table_free): Replace bfd_link_hash_table* param with bfd*. (elf32_arm_link_hash_table_create): Clean up on errors. Set hash_table_free pointer. * elf32-avr.c, * elf32-hppa.c, * elf32-i386.c, * elf32-m68hc1x.c, * elf32-m68k.c, * elf32-metag.c, * elf32-nios2.c, * elf32-xgate.c, * elf64-ia64-vms.c, * elf64-ppc.c, * elf64-x86-64.c, * elflink.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfxx-sparc.c, * xcofflink.c: Similarly. * simple.c (bfd_simple_get_relocated_section_contents): Save and clear link.next before creating linker hash table. Clean up on errors, and restore link.next on exit. * elf32-m68hc1x.h (m68hc11_elf_bfd_link_hash_table_free): Delete. * elf32-xgate.h (xgate_elf_bfd_link_hash_table_free): Delete. * elfxx-sparc.h (_bfd_sparc_elf_link_hash_table_free): Delete. * libcoff-in.h (_bfd_xcoff_bfd_link_hash_table_free): Delete. * hash.c (bfd_hash_table_init_n): Free table on error. * libbfd-in.h (_bfd_generic_link_hash_table_free): Update proto. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * libcoff.h: Regenerate.
2014-06-13 11:41:39 +02:00
_bfd_elf_link_hash_table_free (abfd);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
return NULL;
}
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
ret->loc_hash_table = htab_try_create (1024,
elfNN_aarch64_local_htab_hash,
elfNN_aarch64_local_htab_eq,
NULL);
ret->loc_hash_memory = objalloc_create ();
if (!ret->loc_hash_table || !ret->loc_hash_memory)
{
Free linker hash table from bfd_close. Also tidies numerous error exit paths in various link_hash_table_create functions that failed to free memory. include/ * bfdlink.h (struct bfd_link_hash_table): Add hash_table_free field. bfd/ * archive.c: Include bfdlink.h. (_bfd_archive_close_and_cleanup): Call linker hash_table_free. * bfd.c (struct bfd): Add is_linker_output field. * elf-bfd.h (_bfd_elf_link_hash_table_free): Update prototype. * linker.c (_bfd_link_hash_table_init): Set up hash_table_free, link.hash and is_linker_output. (_bfd_generic_link_hash_table_free): Replace bfd_link_hash_table* param with bfd*. Assert is_linker_output and link.hash, and clear them before exit. * elf-m10300.c (elf32_mn10300_link_hash_table_free): Replace bfd_link_hash_table* param with bfd*. Hack is_linker_output and link.hash so we can free two linker hash tables. (elf32_mn10300_link_hash_table_create): Create static_hash_table first. Clean up on errors. Set hash_table_free pointer. * elf32-arm.c (elf32_arm_link_hash_table_free): Replace bfd_link_hash_table* param with bfd*. (elf32_arm_link_hash_table_create): Clean up on errors. Set hash_table_free pointer. * elf32-avr.c, * elf32-hppa.c, * elf32-i386.c, * elf32-m68hc1x.c, * elf32-m68k.c, * elf32-metag.c, * elf32-nios2.c, * elf32-xgate.c, * elf64-ia64-vms.c, * elf64-ppc.c, * elf64-x86-64.c, * elflink.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfxx-sparc.c, * xcofflink.c: Similarly. * simple.c (bfd_simple_get_relocated_section_contents): Save and clear link.next before creating linker hash table. Clean up on errors, and restore link.next on exit. * elf32-m68hc1x.h (m68hc11_elf_bfd_link_hash_table_free): Delete. * elf32-xgate.h (xgate_elf_bfd_link_hash_table_free): Delete. * elfxx-sparc.h (_bfd_sparc_elf_link_hash_table_free): Delete. * libcoff-in.h (_bfd_xcoff_bfd_link_hash_table_free): Delete. * hash.c (bfd_hash_table_init_n): Free table on error. * libbfd-in.h (_bfd_generic_link_hash_table_free): Update proto. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * libcoff.h: Regenerate.
2014-06-13 11:41:39 +02:00
elfNN_aarch64_link_hash_table_free (abfd);
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
return NULL;
}
Free linker hash table from bfd_close. Also tidies numerous error exit paths in various link_hash_table_create functions that failed to free memory. include/ * bfdlink.h (struct bfd_link_hash_table): Add hash_table_free field. bfd/ * archive.c: Include bfdlink.h. (_bfd_archive_close_and_cleanup): Call linker hash_table_free. * bfd.c (struct bfd): Add is_linker_output field. * elf-bfd.h (_bfd_elf_link_hash_table_free): Update prototype. * linker.c (_bfd_link_hash_table_init): Set up hash_table_free, link.hash and is_linker_output. (_bfd_generic_link_hash_table_free): Replace bfd_link_hash_table* param with bfd*. Assert is_linker_output and link.hash, and clear them before exit. * elf-m10300.c (elf32_mn10300_link_hash_table_free): Replace bfd_link_hash_table* param with bfd*. Hack is_linker_output and link.hash so we can free two linker hash tables. (elf32_mn10300_link_hash_table_create): Create static_hash_table first. Clean up on errors. Set hash_table_free pointer. * elf32-arm.c (elf32_arm_link_hash_table_free): Replace bfd_link_hash_table* param with bfd*. (elf32_arm_link_hash_table_create): Clean up on errors. Set hash_table_free pointer. * elf32-avr.c, * elf32-hppa.c, * elf32-i386.c, * elf32-m68hc1x.c, * elf32-m68k.c, * elf32-metag.c, * elf32-nios2.c, * elf32-xgate.c, * elf64-ia64-vms.c, * elf64-ppc.c, * elf64-x86-64.c, * elflink.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfxx-sparc.c, * xcofflink.c: Similarly. * simple.c (bfd_simple_get_relocated_section_contents): Save and clear link.next before creating linker hash table. Clean up on errors, and restore link.next on exit. * elf32-m68hc1x.h (m68hc11_elf_bfd_link_hash_table_free): Delete. * elf32-xgate.h (xgate_elf_bfd_link_hash_table_free): Delete. * elfxx-sparc.h (_bfd_sparc_elf_link_hash_table_free): Delete. * libcoff-in.h (_bfd_xcoff_bfd_link_hash_table_free): Delete. * hash.c (bfd_hash_table_init_n): Free table on error. * libbfd-in.h (_bfd_generic_link_hash_table_free): Update proto. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * libcoff.h: Regenerate.
2014-06-13 11:41:39 +02:00
ret->root.root.hash_table_free = elfNN_aarch64_link_hash_table_free;
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
return &ret->root.root;
}
Force the AArch64 linker backend to refuse to link when it encounters unresoleable relocations. * reloc.c (enum bfd_reloc_status): Start values at 2. * bfd-in2.h: Regenerate. * elfnn-aarch64.c (aarch64_relocate): Invert sense of function, so that a TRUE return indicates success. Compare the result of calling _bfd_aarch64_elf_put_addend against bfd_reloc_ok. (build_one_stub): Change sense of tests against aarch64_relocate return value. (elfNN_aarch64_tls_relax): Return bfd_reloc_notsupported, rather than FALSE, when an error is detected. (elfNN_aarch64_final_link_relocate): Likewise. * testsuite/ld-aarch64/pcrel_pic_defined.d: Expect errors not warnings. Expect errors about unsupported relocations. * testsuite/ld-aarch64/pcrel_pic_undefined.d: Likewise.
2017-10-12 14:38:20 +02:00
/* Perform relocation R_TYPE. Returns TRUE upon success, FALSE otherwise. */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
static bfd_boolean
aarch64_relocate (unsigned int r_type, bfd *input_bfd, asection *input_section,
bfd_vma offset, bfd_vma value)
{
reloc_howto_type *howto;
bfd_vma place;
unrecognized/unsupported reloc message It must get boring translating all the variants we have of unrecognized/unsupported/invalid/unexpected reloc number. This patch cuts down on the number of variations. * aoutx.h, * coff-alpha.c, * coff-i860.c, * coff-m68k.c, * coff-mcore.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-w65.c, * elf-bfd.h, * elf-m10300.c, * elf.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-i370.c, * elf32-i386.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-iq2000.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-sh.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-v850.c, * elf32-vax.c, * elf32-visium.c, * elf32-wasm32.c, * elf32-xgate.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sparc.c, * elf64-x86-64.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-riscv.h, * elfxx-sparc.c, * elfxx-sparc.h, * reloc.c: Standardize unrecognized/unsupported reloc message.
2018-02-21 12:17:07 +01:00
howto = elfNN_aarch64_howto_from_type (input_bfd, r_type);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
place = (input_section->output_section->vma + input_section->output_offset
+ offset);
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
unrecognized/unsupported reloc message It must get boring translating all the variants we have of unrecognized/unsupported/invalid/unexpected reloc number. This patch cuts down on the number of variations. * aoutx.h, * coff-alpha.c, * coff-i860.c, * coff-m68k.c, * coff-mcore.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-w65.c, * elf-bfd.h, * elf-m10300.c, * elf.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-i370.c, * elf32-i386.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-iq2000.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-sh.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-v850.c, * elf32-vax.c, * elf32-visium.c, * elf32-wasm32.c, * elf32-xgate.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sparc.c, * elf64-x86-64.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-riscv.h, * elfxx-sparc.c, * elfxx-sparc.h, * reloc.c: Standardize unrecognized/unsupported reloc message.
2018-02-21 12:17:07 +01:00
r_type = elfNN_aarch64_bfd_reloc_from_type (input_bfd, r_type);
AArch64: Fix LD crash on weak and undefined TLS symbols. (PR/24602). This patch fixes a few linker crashes due to TLS code reaching an assert when it shouldn't. The first scenario is with weak TLS symbols that remain weak during linking. In this case the mid-end would not have seen a TLS symbol and so wouldn't have allocated the TLS section. We currently assert here and the linker crashes with a not very useful message. This patch changes this to return the value 0 for the TLS symbol in question emulating what lld and gold and other BFD targets do. However because weak TLS is implementation defined and we don't define any behavior for it I also emit a warning to the user to inform them of such. Secondly when a strong TLS reference is undefined. The linker crashes even after it correctly reported that there is an undefined reference. This changes it so that it gracefully exits and reports a useful error. bfd/ChangeLog: PR ld/24601 * elfnn-aarch64.c (aarch64_relocate): Handle weak TLS and undefined TLS. Also Pass input_bfd to _bfd_aarch64_elf_resolve_relocation. * elfxx-aarch64.c (_bfd_aarch64_elf_resolve_relocation): Use it. * elfxx-aarch64.h (_bfd_aarch64_elf_resolve_relocation): Emit warning for weak TLS. ld/ChangeLog: PR ld/24601 * testsuite/ld-aarch64/aarch64-elf.exp (undef-tls, weak-tls): New. * testsuite/ld-aarch64/undef-tls.d: New test. * testsuite/ld-aarch64/undef-tls.s: New test. * testsuite/ld-aarch64/weak-tls.d: New test. * testsuite/ld-aarch64/weak-tls.s: New test.
2019-08-22 12:35:35 +02:00
value = _bfd_aarch64_elf_resolve_relocation (input_bfd, r_type, place,
value, 0, FALSE);
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
return _bfd_aarch64_elf_put_addend (input_bfd,
input_section->contents + offset, r_type,
Force the AArch64 linker backend to refuse to link when it encounters unresoleable relocations. * reloc.c (enum bfd_reloc_status): Start values at 2. * bfd-in2.h: Regenerate. * elfnn-aarch64.c (aarch64_relocate): Invert sense of function, so that a TRUE return indicates success. Compare the result of calling _bfd_aarch64_elf_put_addend against bfd_reloc_ok. (build_one_stub): Change sense of tests against aarch64_relocate return value. (elfNN_aarch64_tls_relax): Return bfd_reloc_notsupported, rather than FALSE, when an error is detected. (elfNN_aarch64_final_link_relocate): Likewise. * testsuite/ld-aarch64/pcrel_pic_defined.d: Expect errors not warnings. Expect errors about unsupported relocations. * testsuite/ld-aarch64/pcrel_pic_undefined.d: Likewise.
2017-10-12 14:38:20 +02:00
howto, value) == bfd_reloc_ok;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
}
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
static enum elf_aarch64_stub_type
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
aarch64_select_branch_stub (bfd_vma value, bfd_vma place)
{
if (aarch64_valid_for_adrp_p (value, place))
return aarch64_stub_adrp_branch;
return aarch64_stub_long_branch;
}
/* Determine the type of stub needed, if any, for a call. */
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
static enum elf_aarch64_stub_type
[AArch64] Remove redundant calculation of plt stub destination for veneer elfNN_aarch64_size_stubs, the caller of aarch64_type_stub has redirected the final destination of long branch veneer to plt stub if the call should go through it. It's redundant to do the same check and redirect again from scratch inside aarch64_type_stub. bfd/ * elfnn-aarch64. (aarch64_type_of_stub): Remove redundation calcuation for destination. Remove useless function parameters. (elfNN_aarch64_size_stubs): Update parameters for aarch64_type_of_stub.
2016-02-22 13:16:06 +01:00
aarch64_type_of_stub (asection *input_sec,
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
const Elf_Internal_Rela *rel,
[AArch64] Long branch veneer support far symbol defined by --defsym 2015-08-11 Jiong Wang <jiong.wang@arm.com> bfd/ * bfd/elfnn-aarch64.c (aarch64_type_of_stub): New parameter "sym_sec". Loose the check for symbol from ABS section. (elfNN_aarch64_size_stubs): Pass sym_sec. ld/testsuite/ * ld-aarch64/farcall-b-defsym.s: New test. * ld-aarch64/farcall-bl-defsym.s: Likewise. * ld-aarch64/farcall-b-defsym.d: New expectation. * ld-aarch64/farcall-bl-defsym.d: Likewise.
2015-08-11 22:55:52 +02:00
asection *sym_sec,
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
unsigned char st_type,
bfd_vma destination)
{
bfd_vma location;
bfd_signed_vma branch_offset;
unsigned int r_type;
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
enum elf_aarch64_stub_type stub_type = aarch64_stub_none;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
[AArch64] Long branch veneer support far symbol defined by --defsym 2015-08-11 Jiong Wang <jiong.wang@arm.com> bfd/ * bfd/elfnn-aarch64.c (aarch64_type_of_stub): New parameter "sym_sec". Loose the check for symbol from ABS section. (elfNN_aarch64_size_stubs): Pass sym_sec. ld/testsuite/ * ld-aarch64/farcall-b-defsym.s: New test. * ld-aarch64/farcall-bl-defsym.s: Likewise. * ld-aarch64/farcall-b-defsym.d: New expectation. * ld-aarch64/farcall-bl-defsym.d: Likewise.
2015-08-11 22:55:52 +02:00
if (st_type != STT_FUNC
[AArch64] Relax long branch veneer insertion for non STT_FUNC symbol As defined at AArch64 ELF Specification (4.6.7 Call and Jump relocations), symbol with type of non STT_FUNC but in different input section with relocation place should insert long branch veneer also. Meanwhile the current long branch veneer infrastructure havn't considered the situation where the branch destination is "sym_value + rela->addend". This was OK because we only insert veneer for long call destination is STT_FUNC symbol for which the addend is always zero. But as we relax the support to other situations by this patch, we need to handle addend be non-zero value. For example, for static function, relocation against "local symbol" are turned into relocation against "section symbol + offset" where there is a valid addend. bfd/ * elfnn-aarch64.c (aarch64_type_of_stub): Allow insert long branch veneer for sym_sec != input_sec. (elfNN_aarch64_size_stub): Support STT_SECTION symbol. (elfNN_aarch64_final_link_relocate): Take rela addend into account when calculation destination. ld/ * testsuite/ld-aarch64/farcall-section.d: Delete. * testsuite/ld-aarch64/farcall-section.s: Delete. * testsuite/ld-aarch64/farcall-b-section.d: New expectation file. * testsuite/ld-aarch64/farcall-bl-section.d: Likewise. * testsuite/ld-aarch64/farcall-b-section.s: New testcase. * testsuite/ld-aarch64/farcall-bl-section.s: Likewise. * testsuite/ld-aarch64/aarch64-elf.exp: Likewise.
2016-01-20 17:57:59 +01:00
&& (sym_sec == input_sec))
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
return stub_type;
/* Determine where the call point is. */
location = (input_sec->output_offset
+ input_sec->output_section->vma + rel->r_offset);
branch_offset = (bfd_signed_vma) (destination - location);
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
r_type = ELFNN_R_TYPE (rel->r_info);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* We don't want to redirect any old unconditional jump in this way,
only one which is being used for a sibcall, where it is
acceptable for the IP0 and IP1 registers to be clobbered. */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
if ((r_type == AARCH64_R (CALL26) || r_type == AARCH64_R (JUMP26))
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
&& (branch_offset > AARCH64_MAX_FWD_BRANCH_OFFSET
|| branch_offset < AARCH64_MAX_BWD_BRANCH_OFFSET))
{
stub_type = aarch64_stub_long_branch;
}
return stub_type;
}
/* Build a name for an entry in the stub hash table. */
static char *
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_stub_name (const asection *input_section,
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
const asection *sym_sec,
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
const struct elf_aarch64_link_hash_entry *hash,
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
const Elf_Internal_Rela *rel)
{
char *stub_name;
bfd_size_type len;
if (hash)
{
len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 16 + 1;
stub_name = bfd_malloc (len);
if (stub_name != NULL)
snprintf (stub_name, len, "%08x_%s+%" BFD_VMA_FMT "x",
(unsigned int) input_section->id,
hash->root.root.root.string,
rel->r_addend);
}
else
{
len = 8 + 1 + 8 + 1 + 8 + 1 + 16 + 1;
stub_name = bfd_malloc (len);
if (stub_name != NULL)
snprintf (stub_name, len, "%08x_%x:%x+%" BFD_VMA_FMT "x",
(unsigned int) input_section->id,
(unsigned int) sym_sec->id,
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
(unsigned int) ELFNN_R_SYM (rel->r_info),
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
rel->r_addend);
}
return stub_name;
}
[AArch64] Optimize .gnu.hash table size for executable bfd/ * elfnn-aarch64.c (elf_aarch64_hash_symbol): New function. (elf_backend_hash_symbol): Define. ld/ * testsuite/ld-aarch64/aarch64-elf.exp (aarch64elflinktests): New tests. * testsuite/ld-aarch64/func-in-so.s: New test source file. * testsuite/ld-aarch64/func-sym-hash-opt.s: Likewise. * testsuite/ld-aarch64/func-sym-hash-opt.d: New expected test result.
2017-01-20 14:30:32 +01:00
/* Return TRUE if symbol H should be hashed in the `.gnu.hash' section. For
executable PLT slots where the executable never takes the address of those
functions, the function symbols are not added to the hash table. */
static bfd_boolean
elf_aarch64_hash_symbol (struct elf_link_hash_entry *h)
{
if (h->plt.offset != (bfd_vma) -1
&& !h->def_regular
&& !h->pointer_equality_needed)
return FALSE;
return _bfd_elf_hash_symbol (h);
}
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* Look up an entry in the stub hash. Stub entries are cached because
creating the stub name takes a bit of time. */
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
static struct elf_aarch64_stub_hash_entry *
elfNN_aarch64_get_stub_entry (const asection *input_section,
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
const asection *sym_sec,
struct elf_link_hash_entry *hash,
const Elf_Internal_Rela *rel,
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
struct elf_aarch64_link_hash_table *htab)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
struct elf_aarch64_stub_hash_entry *stub_entry;
struct elf_aarch64_link_hash_entry *h =
(struct elf_aarch64_link_hash_entry *) hash;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
const asection *id_sec;
if ((input_section->flags & SEC_CODE) == 0)
return NULL;
/* If this input section is part of a group of sections sharing one
stub section, then use the id of the first section in the group.
Stub names need to include a section id, as there may well be
more than one stub used to reach say, printf, and we need to
distinguish between them. */
id_sec = htab->stub_group[input_section->id].link_sec;
if (h != NULL && h->stub_cache != NULL
&& h->stub_cache->h == h && h->stub_cache->id_sec == id_sec)
{
stub_entry = h->stub_cache;
}
else
{
char *stub_name;
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
stub_name = elfNN_aarch64_stub_name (id_sec, sym_sec, h, rel);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
if (stub_name == NULL)
return NULL;
stub_entry = aarch64_stub_hash_lookup (&htab->stub_hash_table,
stub_name, FALSE, FALSE);
if (h != NULL)
h->stub_cache = stub_entry;
free (stub_name);
}
return stub_entry;
}
[AArch64] Factor stub creation code into _bfd_aarch64_create_stub_section.
2015-03-10 14:16:28 +01:00
/* Create a stub section. */
static asection *
_bfd_aarch64_create_stub_section (asection *section,
struct elf_aarch64_link_hash_table *htab)
{
size_t namelen;
bfd_size_type len;
char *s_name;
namelen = strlen (section->name);
len = namelen + sizeof (STUB_SUFFIX);
s_name = bfd_alloc (htab->stub_bfd, len);
if (s_name == NULL)
return NULL;
memcpy (s_name, section->name, namelen);
memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
return (*htab->add_stub_section) (s_name, section);
}
[AArch64] Factor out _bfd_aarch64_get_stub_for_link_section.
2015-03-02 13:11:40 +01:00
/* Find or create a stub section for a link section.
Fix or create the stub section used to collect stubs attached to
the specified link section. */
static asection *
_bfd_aarch64_get_stub_for_link_section (asection *link_section,
struct elf_aarch64_link_hash_table *htab)
{
if (htab->stub_group[link_section->id].stub_sec == NULL)
htab->stub_group[link_section->id].stub_sec
= _bfd_aarch64_create_stub_section (link_section, htab);
return htab->stub_group[link_section->id].stub_sec;
}
[AArch64] Factor out common behaviour between elf_aarch64_create_or_find_stub_sec and elfNN_aarch64_add_stub
2015-02-28 01:10:21 +01:00
/* Find or create a stub section in the stub group for an input
section. */
static asection *
_bfd_aarch64_create_or_find_stub_sec (asection *section,
struct elf_aarch64_link_hash_table *htab)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
[AArch64] Factor out _bfd_aarch64_get_stub_for_link_section.
2015-03-02 13:11:40 +01:00
asection *link_sec = htab->stub_group[section->id].link_sec;
return _bfd_aarch64_get_stub_for_link_section (link_sec, htab);
[AArch64] Factor out common behaviour between elf_aarch64_create_or_find_stub_sec and elfNN_aarch64_add_stub
2015-02-28 01:10:21 +01:00
}
/* Add a new stub entry in the stub group associated with an input
section to the stub hash. Not all fields of the new stub entry are
initialised. */
static struct elf_aarch64_stub_hash_entry *
_bfd_aarch64_add_stub_entry_in_group (const char *stub_name,
asection *section,
struct elf_aarch64_link_hash_table *htab)
{
asection *link_sec;
asection *stub_sec;
struct elf_aarch64_stub_hash_entry *stub_entry;
link_sec = htab->stub_group[section->id].link_sec;
stub_sec = _bfd_aarch64_create_or_find_stub_sec (section, htab);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* Enter this entry into the linker stub hash table. */
stub_entry = aarch64_stub_hash_lookup (&htab->stub_hash_table, stub_name,
TRUE, FALSE);
if (stub_entry == NULL)
{
Add c-format tags to translatable strings with more than one argument-using formatting token. * aout-adobe.c: Add missing c-format tags for translatable strings. * aout-cris.c: Likewise. * aoutx.h: Likewise. * bfd.c: Likewise. * binary.c: Likewise. * cache.c: Likewise. * coff-alpha.c: Likewise. * coff-arm.c: Likewise. * coff-i860.c: Likewise. * coff-mcore.c: Likewise. * coff-ppc.c: Likewise. * coff-rs6000.c: Likewise. * coff-sh.c: Likewise. * coff-tic4x.c: Likewise. * coff-tic54x.c: Likewise. * coff-tic80.c: Likewise. * coff64-rs6000.c: Likewise. * coffcode.h: Likewise. * coffgen.c: Likewise. * cofflink.c: Likewise. * coffswap.h: Likewise. * cpu-arm.c: Likewise. * dwarf2.c: Likewise. * ecoff.c: Likewise. * elf-attrs.c: Likewise. * elf-eh-frame.c: Likewise. * elf-ifunc.c: Likewise. * elf-m10300.c: Likewise. * elf-s390-common.c: Likewise. * elf.c: Likewise. * elf32-arc.c: Likewise. * elf32-arm.c: Likewise. * elf32-avr.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-d10v.c: Likewise. * elf32-d30v.c: Likewise. * elf32-epiphany.c: Likewise. * elf32-fr30.c: Likewise. * elf32-frv.c: Likewise. * elf32-gen.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i370.c: Likewise. * elf32-i386.c: Likewise. * elf32-i960.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-lm32.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m32r.c: Likewise. * elf32-m68hc11.c: Likewise. * elf32-m68hc12.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mcore.c: Likewise. * elf32-mep.c: Likewise. * elf32-metag.c: Likewise. * elf32-microblaze.c: Likewise. * elf32-moxie.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-nds32.c: Likewise. * elf32-nios2.c: Likewise. * elf32-or1k.c: Likewise. * elf32-pj.c: Likewise. * elf32-ppc.c: Likewise. * elf32-rl78.c: Likewise. * elf32-rx.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-sh-symbian.c: Likewise. * elf32-sh.c: Likewise. * elf32-sh64.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-tilepro.c: Likewise. * elf32-v850.c: Likewise. * elf32-vax.c: Likewise. * elf32-visium.c: Likewise. * elf32-xgate.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-gen.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-mmix.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-sh64.c: Likewise. * elf64-sparc.c: Likewise. * elf64-x86-64.c: Likewise. * elfcode.h: Likewise. * elfcore.h: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * ieee.c: Likewise. * ihex.c: Likewise. * libbfd.c: Likewise. * linker.c: Likewise. * m68klinux.c: Likewise. * mach-o.c: Likewise. * merge.c: Likewise. * mmo.c: Likewise. * oasys.c: Likewise. * pdp11.c: Likewise. * pe-mips.c: Likewise. * peXXigen.c: Likewise. * pei-x86_64.c: Likewise. * peicode.h: Likewise. * ppcboot.c: Likewise. * reloc.c: Likewise. * sparclinux.c: Likewise. * srec.c: Likewise. * stabs.c: Likewise. * vms-alpha.c: Likewise. * vms-lib.c: Likewise. * xcofflink.c: Likewise.
2016-10-19 15:04:34 +02:00
/* xgettext:c-format */
Use %pA and %pB in messages rather than %A and %B First step towards compiler verification of _bfd_error_handler arguments, and better verification of translated messages. bfd/ * bfd.c (_bfd_doprnt, _bfd_doprnt_scan): Handle %pA and %pB in place of %A and %B. * aout-adobe.c: Update all messages using %A and %B. * aout-cris.c: Likewise. * aoutx.h: Likewise. * archive.c: Likewise. * binary.c: Likewise. * cache.c: Likewise. * coff-alpha.c: Likewise. * coff-arm.c: Likewise. * coff-i860.c: Likewise. * coff-mcore.c: Likewise. * coff-ppc.c: Likewise. * coff-rs6000.c: Likewise. * coff-sh.c: Likewise. * coff-tic4x.c: Likewise. * coff-tic54x.c: Likewise. * coff-tic80.c: Likewise. * coff64-rs6000.c: Likewise. * coffcode.h: Likewise. * coffgen.c: Likewise. * cofflink.c: Likewise. * coffswap.h: Likewise. * compress.c: Likewise. * cpu-arm.c: Likewise. * ecoff.c: Likewise. * elf-attrs.c: Likewise. * elf-eh-frame.c: Likewise. * elf-ifunc.c: Likewise. * elf-m10300.c: Likewise. * elf-properties.c: Likewise. * elf-s390-common.c: Likewise. * elf.c: Likewise. * elf32-arc.c: Likewise. * elf32-arm.c: Likewise. * elf32-avr.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-d10v.c: Likewise. * elf32-d30v.c: Likewise. * elf32-epiphany.c: Likewise. * elf32-fr30.c: Likewise. * elf32-frv.c: Likewise. * elf32-gen.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i370.c: Likewise. * elf32-i386.c: Likewise. * elf32-i960.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-lm32.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m32r.c: Likewise. * elf32-m68hc11.c: Likewise. * elf32-m68hc12.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mcore.c: Likewise. * elf32-mep.c: Likewise. * elf32-metag.c: Likewise. * elf32-microblaze.c: Likewise. * elf32-moxie.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-nds32.c: Likewise. * elf32-nios2.c: Likewise. * elf32-or1k.c: Likewise. * elf32-pj.c: Likewise. * elf32-ppc.c: Likewise. * elf32-rl78.c: Likewise. * elf32-rx.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-sh-symbian.c: Likewise. * elf32-sh.c: Likewise. * elf32-sh64.c: Likewise. * elf32-sparc.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-tilepro.c: Likewise. * elf32-v850.c: Likewise. * elf32-vax.c: Likewise. * elf32-visium.c: Likewise. * elf32-wasm32.c: Likewise. * elf32-xgate.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-gen.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-mmix.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-sh64.c: Likewise. * elf64-sparc.c: Likewise. * elf64-x86-64.c: Likewise. * elfcode.h: Likewise. * elfcore.h: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * elfnn-riscv.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * elfxx-x86.c: Likewise. * hpux-core.c: Likewise. * ieee.c: Likewise. * ihex.c: Likewise. * libbfd.c: Likewise. * linker.c: Likewise. * mach-o.c: Likewise. * merge.c: Likewise. * mmo.c: Likewise. * oasys.c: Likewise. * pdp11.c: Likewise. * pe-mips.c: Likewise. * peXXigen.c: Likewise. * peicode.h: Likewise. * reloc.c: Likewise. * rs6000-core.c: Likewise. * srec.c: Likewise. * stabs.c: Likewise. * vms-alpha.c: Likewise. * xcofflink.c: Likewise. ld/ * ldmisc.c (vfinfo): Handle %pA and %pB in place of %A and %B. * ldcref.c: Update all messages using %A and %B. * ldexp.c: Likewise. * ldlang.c: Likewise. * ldmain.c: Likewise. * ldmisc.c: Likewise. * pe-dll.c: Likewise. * plugin.c: Likewise. * emultempl/beos.em: Likewise. * emultempl/cr16elf.em: Likewise. * emultempl/elf32.em: Likewise. * emultempl/m68kcoff.em: Likewise. * emultempl/m68kelf.em: Likewise. * emultempl/mmo.em: Likewise. * emultempl/nds32elf.em: Likewise. * emultempl/pe.em: Likewise. * emultempl/pep.em: Likewise. * emultempl/spuelf.em: Likewise. * emultempl/sunos.em: Likewise. * emultempl/xtensaelf.em: Likewise.
2018-02-19 05:51:40 +01:00
_bfd_error_handler (_("%pB: cannot create stub entry %s"),
Remove syntactic sugar Now that _bfd_error_handler is not a function pointer. * aout-adobe.c: Replace (*_bfd_error_handler) (...) with _bfd_error_handler (...) throughout. * aout-cris.c, * aoutx.h, * archive.c, * bfd.c, * binary.c, * cache.c, * coff-alpha.c, * coff-arm.c, * coff-h8300.c, * coff-i860.c, * coff-mcore.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * cpu-arm.c, * cpu-m68k.c, * cpu-sh.c, * dwarf2.c, * ecoff.c, * elf-eh-frame.c, * elf-m10300.c, * elf.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c, * elf32-cris.c, * elf32-crx.c, * elf32-dlx.c, * elf32-frv.c, * elf32-hppa.c, * elf32-i370.c, * elf32-i386.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc1x.c, * elf32-m68k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-nds32.c, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-rl78.c, * elf32-s390.c, * elf32-score.c, * elf32-score7.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilepro.c, * elf32-v850.c, * elf32-vax.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-x86-64.c, * elfcode.h, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfxx-mips.c, * elfxx-sparc.c, * elfxx-tilegx.c, * hpux-core.c, * i386linux.c, * ieee.c, * ihex.c, * libbfd.c, * linker.c, * m68klinux.c, * mach-o.c, * merge.c, * mmo.c, * oasys.c, * osf-core.c, * pdp11.c, * pe-mips.c, * peXXigen.c, * pef.c, * plugin.c, * reloc.c, * rs6000-core.c, * sco5-core.c, * som.c, * sparclinux.c, * srec.c, * stabs.c, * syms.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * xcofflink.c: Likewise.
2016-09-30 05:30:18 +02:00
section->owner, stub_name);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
return NULL;
}
stub_entry->stub_sec = stub_sec;
stub_entry->stub_offset = 0;
stub_entry->id_sec = link_sec;
return stub_entry;
}
[AArch64] Workaround for Cortex A53 erratum 843419 Some early revisions of the Cortex-A53 have an erratum (843419). The details of the erratum are quite complex and involve dynamic conditions. For the purposes of the workaround we have simplified the static conditions to an ADRP in the last two instructions of a 4KByte page, followed within four instructions by a load/store dependent on the ADRP. This patch adds support to conservatively scan for and workaround Cortex A53 erratum 843419. There are two different workaround strategies used. The first is to rewrite ADRP instructions which form part of an erratum sequence with an ADR instruction. In situations where the ADR provides insufficient offset the dependent load or store instruction from the sequence is moved to a stub section and branches are inserted from the original sequence to the relocated instruction and back again. Stub section sizes are rounded up to a multiple of 4096 in order to ensure that the act of inserting work around stubs does not create more errata sequences. Workaround stubs are always inserted into the stub section associated with the input section containing the erratum sequence. This ensures that the fully relocated form of the veneered load store instruction is available at the point in time when the stub section is written.
2015-02-24 13:04:41 +01:00
/* Add a new stub entry in the final stub section to the stub hash.
Not all fields of the new stub entry are initialised. */
static struct elf_aarch64_stub_hash_entry *
_bfd_aarch64_add_stub_entry_after (const char *stub_name,
asection *link_section,
struct elf_aarch64_link_hash_table *htab)
{
asection *stub_sec;
struct elf_aarch64_stub_hash_entry *stub_entry;
AArch64: Implement choice between Cortex-A53 erratum workarounds. (PR ld/24373) The Cortex-A53 erratum currently has two ways it can resolve the erratum when using the flag --fix-cortex-a53-843419: 1) If the address is within the range of an ADR instruction it rewrites the ADRP into an ADR, and those doesn't need the use of a veneer. 2) If the address is not within range, it adds a branch to a veneer which will execute the final bit of the erratum workaround and branch back to the call site. When we do this we always generate the veneers and we always align the size of the text section to 4KB. This is because we only know which workaround we can use after all linking has finished and all addresses are known. This means even though the veneers are not used, we still generate the section and we still change the size of the input section. This is problematic for small memory devices as this would require the user to take about a ~4KB hit in memory even though it's not even used. Since there's no real way to restart the linking process from the final write phase this patch solves the issue by allowing the user more control over which erratum workaround gets used. Concretely this changes the option --fix-cortex-a53-843419 to take optional arguments --fix-cortex-a53-843419[=full|adr|adrp] - full (default): Use both ADRP and ADR workaround. This is equivalent to not specifying any options and is the default behavior before this patch. - adr: Only use the ADR workaround, this will not cause any increase in binary size but linking will fail if the referenced address is out of range of an ADR instruction. - adrp: Use only the ADRP workaround, this will never rewrite your ADRP. In the cases where the user knows how big their binaries are the `adr` option would prevent the unneeded overhead. bfd/ChangeLog: PR ld/24373 * bfd-in.h (enum erratum_84319_opts): New (bfd_elf64_aarch64_set_options, bfd_elf32_aarch64_set_options): Change int to enum erratum_84319_opts. * bfd-in2.h: Regenerate. * elfnn-aarch64.c (struct elf_aarch64_link_hash_table): Change fix_erratum_843419 to use new enum, remove fix_erratum_843419_adr. (_bfd_aarch64_add_stub_entry_after): Conditionally create erratum stub. (aarch64_size_one_stub): Conditionally size erratum 843419 stubs. (_bfd_aarch64_resize_stubs): Amend comment. (elfNN_aarch64_size_stubs): Don't generate stubs when no workaround requested. (bfd_elfNN_aarch64_set_options): Use new fix_erratum_843419 enum. (_bfd_aarch64_erratum_843419_branch_to_stub): Implement selection of erratum workaround. (clear_erratum_843419_entry): Update erratum conditional. ld/ChangeLog: PR ld/24373 * emultempl/aarch64elf.em (PARSE_AND_LIST_LONGOPTS): Add optional args to flags. * NEWS: Add changes to flag. (PARSE_AND_LIST_OPTIONS): Update help descriptions. (PARSE_AND_LIST_ARGS_CASES): Add new options to parser. * testsuite/ld-aarch64/aarch64-elf.exp: Add new run_dump_tests. * testsuite/ld-aarch64/erratum843419-adr.d: New test. * testsuite/ld-aarch64/erratum843419-adrp.d: New test. * testsuite/ld-aarch64/erratum843419-far-adr.d: New test. * testsuite/ld-aarch64/erratum843419-far-full.d: New test. * testsuite/ld-aarch64/erratum843419-far.s: New test. * testsuite/ld-aarch64/erratum843419-full.d: New test. * testsuite/ld-aarch64/erratum843419-near.s: New test. * testsuite/ld-aarch64/erratum843419-no-args.d: New test.
2019-05-21 14:04:08 +02:00
stub_sec = NULL;
/* Only create the actual stub if we will end up needing it. */
if (htab->fix_erratum_843419 & ERRAT_ADRP)
stub_sec = _bfd_aarch64_get_stub_for_link_section (link_section, htab);
[AArch64] Workaround for Cortex A53 erratum 843419 Some early revisions of the Cortex-A53 have an erratum (843419). The details of the erratum are quite complex and involve dynamic conditions. For the purposes of the workaround we have simplified the static conditions to an ADRP in the last two instructions of a 4KByte page, followed within four instructions by a load/store dependent on the ADRP. This patch adds support to conservatively scan for and workaround Cortex A53 erratum 843419. There are two different workaround strategies used. The first is to rewrite ADRP instructions which form part of an erratum sequence with an ADR instruction. In situations where the ADR provides insufficient offset the dependent load or store instruction from the sequence is moved to a stub section and branches are inserted from the original sequence to the relocated instruction and back again. Stub section sizes are rounded up to a multiple of 4096 in order to ensure that the act of inserting work around stubs does not create more errata sequences. Workaround stubs are always inserted into the stub section associated with the input section containing the erratum sequence. This ensures that the fully relocated form of the veneered load store instruction is available at the point in time when the stub section is written.
2015-02-24 13:04:41 +01:00
stub_entry = aarch64_stub_hash_lookup (&htab->stub_hash_table, stub_name,
TRUE, FALSE);
if (stub_entry == NULL)
{
Remove syntactic sugar Now that _bfd_error_handler is not a function pointer. * aout-adobe.c: Replace (*_bfd_error_handler) (...) with _bfd_error_handler (...) throughout. * aout-cris.c, * aoutx.h, * archive.c, * bfd.c, * binary.c, * cache.c, * coff-alpha.c, * coff-arm.c, * coff-h8300.c, * coff-i860.c, * coff-mcore.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * cpu-arm.c, * cpu-m68k.c, * cpu-sh.c, * dwarf2.c, * ecoff.c, * elf-eh-frame.c, * elf-m10300.c, * elf.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c, * elf32-cris.c, * elf32-crx.c, * elf32-dlx.c, * elf32-frv.c, * elf32-hppa.c, * elf32-i370.c, * elf32-i386.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc1x.c, * elf32-m68k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-nds32.c, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-rl78.c, * elf32-s390.c, * elf32-score.c, * elf32-score7.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilepro.c, * elf32-v850.c, * elf32-vax.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-x86-64.c, * elfcode.h, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfxx-mips.c, * elfxx-sparc.c, * elfxx-tilegx.c, * hpux-core.c, * i386linux.c, * ieee.c, * ihex.c, * libbfd.c, * linker.c, * m68klinux.c, * mach-o.c, * merge.c, * mmo.c, * oasys.c, * osf-core.c, * pdp11.c, * pe-mips.c, * peXXigen.c, * pef.c, * plugin.c, * reloc.c, * rs6000-core.c, * sco5-core.c, * som.c, * sparclinux.c, * srec.c, * stabs.c, * syms.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * xcofflink.c: Likewise.
2016-09-30 05:30:18 +02:00
_bfd_error_handler (_("cannot create stub entry %s"), stub_name);
[AArch64] Workaround for Cortex A53 erratum 843419 Some early revisions of the Cortex-A53 have an erratum (843419). The details of the erratum are quite complex and involve dynamic conditions. For the purposes of the workaround we have simplified the static conditions to an ADRP in the last two instructions of a 4KByte page, followed within four instructions by a load/store dependent on the ADRP. This patch adds support to conservatively scan for and workaround Cortex A53 erratum 843419. There are two different workaround strategies used. The first is to rewrite ADRP instructions which form part of an erratum sequence with an ADR instruction. In situations where the ADR provides insufficient offset the dependent load or store instruction from the sequence is moved to a stub section and branches are inserted from the original sequence to the relocated instruction and back again. Stub section sizes are rounded up to a multiple of 4096 in order to ensure that the act of inserting work around stubs does not create more errata sequences. Workaround stubs are always inserted into the stub section associated with the input section containing the erratum sequence. This ensures that the fully relocated form of the veneered load store instruction is available at the point in time when the stub section is written.
2015-02-24 13:04:41 +01:00
return NULL;
}
stub_entry->stub_sec = stub_sec;
stub_entry->stub_offset = 0;
stub_entry->id_sec = link_section;
return stub_entry;
}
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
static bfd_boolean
aarch64_build_one_stub (struct bfd_hash_entry *gen_entry,
Add support for non-contiguous memory regions 2020-01-06 Christophe Lyon <christophe.lyon@linaro.org> bfd/ * bfd-in2.h: Regenerate. * section.c (asection): Add already_assigned field. (BFD_FAKE_SECTION): Add default initializer for it. * ecoff.c (bfd_debug_section): Initialize already_assigned field. * elf32-arm.c (arm_build_one_stub): Add support for non_contiguous_regions. * elf32-csky.c (csky_build_one_stub): Likewise. * elf32-hppa.c (hppa_build_one_stub): Likewise. * elf32-m68hc11.c (m68hc11_elf_build_one_stub): Likewise. * elf32-m68hc12.c (m68hc12_elf_build_one_stub): Likewise. * elf32-metag.c (metag_build_one_stub): Likewise. * elf32-nios2.c (nios2_build_one_stub): Likewise. * elf64-ppc.c (ppc_build_one_stub): Likewise. (ppc_size_one_stub): Likewise. * elfnn-aarch64.c (aarch64_build_one_stub): Likewise. * elflink.c (elf_link_input_bfd): Likewise. include/ * bfdlink.h (bfd_link_info): Add non_contiguous_regions and non_contiguous_regions_warnings fields. ld/ * ldlang.c (lang_add_section): Add support for non_contiguous_regions. (size_input_section): Likewise. (lang_size_sections_1): Likewise. (process_insert_statements): Likewise. * ldlex.h (option_values): Add OPTION_NON_CONTIGUOUS_REGIONS and OPTION_NON_CONTIGUOUS_REGIONS_WARNINGS. * lexsup.c (ld_options): Add entries for --enable-non-contiguous-regions and --enable-non-contiguous-regions-warnings. (parse_args): Handle it. * NEWS: Add --enable-non-contiguous-regions and --enable-non-contiguous-regions-warnings. * ld.texi: Add --enable-non-contiguous-regions and --enable-non-contiguous-regions-warnings documentation. * emultempl/armelf.em (elf32_arm_add_stub_section): Add SEC_LINKER_CREATED flag. * emultempl/xtensaelf.em (ld_build_required_section_dependence): Emit an error when --enable-non-contiguous-regions is used. * testsuite/ld-elf/non-contiguous.d: New. * testsuite/ld-elf/non-contiguous.ld: New. * testsuite/ld-elf/non-contiguous.s: New. * testsuite/ld-arm/arm-elf.exp: Run the new tests. * testsuite/ld-arm/arm-elf/non-contiguous-arm.s: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm.d: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm.ld: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm2.d: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm3.ld: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm3.d: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm3.ld: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm4.d: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm4.ld: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm5.d: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm5.ld: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm6.d: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm6.ld: New. * testsuite/ld-powerpc/powerpc.exp: Run new tests. * testsuite/ld-powerpc/non-contiguous-powerpc.d: New. * testsuite/ld-powerpc/non-contiguous-powerpc.ld: New. * testsuite/ld-powerpc/non-contiguous-powerpc.sd: New. * testsuite/ld-powerpc/non-contiguous-powerpc64.d: New.
2019-11-25 09:55:37 +01:00
void *in_arg)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
struct elf_aarch64_stub_hash_entry *stub_entry;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
asection *stub_sec;
bfd *stub_bfd;
bfd_byte *loc;
bfd_vma sym_value;
[AArch64] Cortex-A53 erratum 835769 linker workaround 2014-10-22 Tejas Belagod <tejas.belagod@arm.com> bfd/ * bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter. * bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise. * elfnn-aarch64.c (aarch64_erratum_835769_stub): New. (elf_aarch64_stub_type): Add new type aarch64_stub_erratum_835769_veneer. (elf_aarch64_stub_hash_entry): New fields for erratum 835769. (aarch64_erratum_835769_fix): New data struct to record erratum 835769. (elf_aarch64_link_hash_table: Global flags for 835769. (aarch64_build_one_stub): Add case for 835769. (aarch64_size_one_stub): Likewise. (aarch64_mem_op_p, aarch64_mlxl_p, aarch64_erratum_sequence,erratum_835769_scan): New. Decode and scan functions for erratum 835769. (elf_aarch64_create_or_find_stub_sec): New. (elfNN_aarch64_size_stubs): Look for erratum 835769 and record them. (bfd_elfNN_aarch64_set_options: Set global flag for 835769. (erratum_835769_branch_to_stub_data, make_branch_to_erratum_835769_stub):New. Connect up all the erratum stubs to occurances by branches. (elfNN_aarch64_write_section): New hook. (aarch64_map_one_stub): Output erratum stub symbol. (elfNN_aarch64_size_dynamic_sections): Init mapping symbol information for erratum 835769. (elf_backend_write_section): Define. ld/ * emultempl/aarch64elf.em: Add command-line option for erratum 835769. ld/testsuite/ * ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum 835769 tests. * ld-aarch64/erratum835769.d: New. * ld-aarch64/erratum835769.s: New.
2014-10-24 12:39:35 +02:00
bfd_vma veneered_insn_loc;
bfd_vma veneer_entry_loc;
bfd_signed_vma branch_offset = 0;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
unsigned int template_size;
const uint32_t *template;
unsigned int i;
Add support for non-contiguous memory regions 2020-01-06 Christophe Lyon <christophe.lyon@linaro.org> bfd/ * bfd-in2.h: Regenerate. * section.c (asection): Add already_assigned field. (BFD_FAKE_SECTION): Add default initializer for it. * ecoff.c (bfd_debug_section): Initialize already_assigned field. * elf32-arm.c (arm_build_one_stub): Add support for non_contiguous_regions. * elf32-csky.c (csky_build_one_stub): Likewise. * elf32-hppa.c (hppa_build_one_stub): Likewise. * elf32-m68hc11.c (m68hc11_elf_build_one_stub): Likewise. * elf32-m68hc12.c (m68hc12_elf_build_one_stub): Likewise. * elf32-metag.c (metag_build_one_stub): Likewise. * elf32-nios2.c (nios2_build_one_stub): Likewise. * elf64-ppc.c (ppc_build_one_stub): Likewise. (ppc_size_one_stub): Likewise. * elfnn-aarch64.c (aarch64_build_one_stub): Likewise. * elflink.c (elf_link_input_bfd): Likewise. include/ * bfdlink.h (bfd_link_info): Add non_contiguous_regions and non_contiguous_regions_warnings fields. ld/ * ldlang.c (lang_add_section): Add support for non_contiguous_regions. (size_input_section): Likewise. (lang_size_sections_1): Likewise. (process_insert_statements): Likewise. * ldlex.h (option_values): Add OPTION_NON_CONTIGUOUS_REGIONS and OPTION_NON_CONTIGUOUS_REGIONS_WARNINGS. * lexsup.c (ld_options): Add entries for --enable-non-contiguous-regions and --enable-non-contiguous-regions-warnings. (parse_args): Handle it. * NEWS: Add --enable-non-contiguous-regions and --enable-non-contiguous-regions-warnings. * ld.texi: Add --enable-non-contiguous-regions and --enable-non-contiguous-regions-warnings documentation. * emultempl/armelf.em (elf32_arm_add_stub_section): Add SEC_LINKER_CREATED flag. * emultempl/xtensaelf.em (ld_build_required_section_dependence): Emit an error when --enable-non-contiguous-regions is used. * testsuite/ld-elf/non-contiguous.d: New. * testsuite/ld-elf/non-contiguous.ld: New. * testsuite/ld-elf/non-contiguous.s: New. * testsuite/ld-arm/arm-elf.exp: Run the new tests. * testsuite/ld-arm/arm-elf/non-contiguous-arm.s: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm.d: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm.ld: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm2.d: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm3.ld: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm3.d: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm3.ld: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm4.d: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm4.ld: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm5.d: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm5.ld: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm6.d: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm6.ld: New. * testsuite/ld-powerpc/powerpc.exp: Run new tests. * testsuite/ld-powerpc/non-contiguous-powerpc.d: New. * testsuite/ld-powerpc/non-contiguous-powerpc.ld: New. * testsuite/ld-powerpc/non-contiguous-powerpc.sd: New. * testsuite/ld-powerpc/non-contiguous-powerpc64.d: New.
2019-11-25 09:55:37 +01:00
struct bfd_link_info *info;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* Massage our args to the form they really have. */
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
stub_entry = (struct elf_aarch64_stub_hash_entry *) gen_entry;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
Add support for non-contiguous memory regions 2020-01-06 Christophe Lyon <christophe.lyon@linaro.org> bfd/ * bfd-in2.h: Regenerate. * section.c (asection): Add already_assigned field. (BFD_FAKE_SECTION): Add default initializer for it. * ecoff.c (bfd_debug_section): Initialize already_assigned field. * elf32-arm.c (arm_build_one_stub): Add support for non_contiguous_regions. * elf32-csky.c (csky_build_one_stub): Likewise. * elf32-hppa.c (hppa_build_one_stub): Likewise. * elf32-m68hc11.c (m68hc11_elf_build_one_stub): Likewise. * elf32-m68hc12.c (m68hc12_elf_build_one_stub): Likewise. * elf32-metag.c (metag_build_one_stub): Likewise. * elf32-nios2.c (nios2_build_one_stub): Likewise. * elf64-ppc.c (ppc_build_one_stub): Likewise. (ppc_size_one_stub): Likewise. * elfnn-aarch64.c (aarch64_build_one_stub): Likewise. * elflink.c (elf_link_input_bfd): Likewise. include/ * bfdlink.h (bfd_link_info): Add non_contiguous_regions and non_contiguous_regions_warnings fields. ld/ * ldlang.c (lang_add_section): Add support for non_contiguous_regions. (size_input_section): Likewise. (lang_size_sections_1): Likewise. (process_insert_statements): Likewise. * ldlex.h (option_values): Add OPTION_NON_CONTIGUOUS_REGIONS and OPTION_NON_CONTIGUOUS_REGIONS_WARNINGS. * lexsup.c (ld_options): Add entries for --enable-non-contiguous-regions and --enable-non-contiguous-regions-warnings. (parse_args): Handle it. * NEWS: Add --enable-non-contiguous-regions and --enable-non-contiguous-regions-warnings. * ld.texi: Add --enable-non-contiguous-regions and --enable-non-contiguous-regions-warnings documentation. * emultempl/armelf.em (elf32_arm_add_stub_section): Add SEC_LINKER_CREATED flag. * emultempl/xtensaelf.em (ld_build_required_section_dependence): Emit an error when --enable-non-contiguous-regions is used. * testsuite/ld-elf/non-contiguous.d: New. * testsuite/ld-elf/non-contiguous.ld: New. * testsuite/ld-elf/non-contiguous.s: New. * testsuite/ld-arm/arm-elf.exp: Run the new tests. * testsuite/ld-arm/arm-elf/non-contiguous-arm.s: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm.d: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm.ld: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm2.d: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm3.ld: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm3.d: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm3.ld: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm4.d: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm4.ld: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm5.d: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm5.ld: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm6.d: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm6.ld: New. * testsuite/ld-powerpc/powerpc.exp: Run new tests. * testsuite/ld-powerpc/non-contiguous-powerpc.d: New. * testsuite/ld-powerpc/non-contiguous-powerpc.ld: New. * testsuite/ld-powerpc/non-contiguous-powerpc.sd: New. * testsuite/ld-powerpc/non-contiguous-powerpc64.d: New.
2019-11-25 09:55:37 +01:00
info = (struct bfd_link_info *) in_arg;
/* Fail if the target section could not be assigned to an output
section. The user should fix his linker script. */
if (stub_entry->target_section->output_section == NULL
&& info->non_contiguous_regions)
Non-contiguous memory regions support: Avoid calls to abort Use '%F' format when printing error messages to exit cleanly rather than by calling abort(). 2020-03-18 Christophe Lyon <christophe.lyon@linaro.org> bfd/ * elf32-arm.c (arm_build_one_stub): Emit a fatal error message instead of calling abort. * elf32-csky.c (csky_build_one_stub): Likewise. * elf32-hppa.c (hppa_build_one_stub): Likewise. * elf32-m68hc11.c (m68hc11_elf_build_one_stub): Likewise. * elf32-m68hc12.c (m68hc12_elf_build_one_stub): Likewise. * elf32-metag.c (metag_build_one_stub): Likewise. * elf32-nios2.c (nios2_build_one_stub): Likewise. * elf64-ppc.c (ppc_build_one_stub): Likewise. (ppc_size_one_stub): Likewise. * elfnn-aarch64.c (aarch64_build_one_stub): Likewise. ld/ * emultempl/xtensaelf.em: Emit a fatal error message instead of calling abort. * ldlang.c: Likewise. Change-Id: I60deaeeee59d4e7cab06b8a40a3e51837c43a8ab
2020-03-17 16:59:01 +01:00
info->callbacks->einfo (_("%F%P: Could not assign '%pA' to an output section. "
"Retry without "
"--enable-non-contiguous-regions.\n"),
stub_entry->target_section);
Add support for non-contiguous memory regions 2020-01-06 Christophe Lyon <christophe.lyon@linaro.org> bfd/ * bfd-in2.h: Regenerate. * section.c (asection): Add already_assigned field. (BFD_FAKE_SECTION): Add default initializer for it. * ecoff.c (bfd_debug_section): Initialize already_assigned field. * elf32-arm.c (arm_build_one_stub): Add support for non_contiguous_regions. * elf32-csky.c (csky_build_one_stub): Likewise. * elf32-hppa.c (hppa_build_one_stub): Likewise. * elf32-m68hc11.c (m68hc11_elf_build_one_stub): Likewise. * elf32-m68hc12.c (m68hc12_elf_build_one_stub): Likewise. * elf32-metag.c (metag_build_one_stub): Likewise. * elf32-nios2.c (nios2_build_one_stub): Likewise. * elf64-ppc.c (ppc_build_one_stub): Likewise. (ppc_size_one_stub): Likewise. * elfnn-aarch64.c (aarch64_build_one_stub): Likewise. * elflink.c (elf_link_input_bfd): Likewise. include/ * bfdlink.h (bfd_link_info): Add non_contiguous_regions and non_contiguous_regions_warnings fields. ld/ * ldlang.c (lang_add_section): Add support for non_contiguous_regions. (size_input_section): Likewise. (lang_size_sections_1): Likewise. (process_insert_statements): Likewise. * ldlex.h (option_values): Add OPTION_NON_CONTIGUOUS_REGIONS and OPTION_NON_CONTIGUOUS_REGIONS_WARNINGS. * lexsup.c (ld_options): Add entries for --enable-non-contiguous-regions and --enable-non-contiguous-regions-warnings. (parse_args): Handle it. * NEWS: Add --enable-non-contiguous-regions and --enable-non-contiguous-regions-warnings. * ld.texi: Add --enable-non-contiguous-regions and --enable-non-contiguous-regions-warnings documentation. * emultempl/armelf.em (elf32_arm_add_stub_section): Add SEC_LINKER_CREATED flag. * emultempl/xtensaelf.em (ld_build_required_section_dependence): Emit an error when --enable-non-contiguous-regions is used. * testsuite/ld-elf/non-contiguous.d: New. * testsuite/ld-elf/non-contiguous.ld: New. * testsuite/ld-elf/non-contiguous.s: New. * testsuite/ld-arm/arm-elf.exp: Run the new tests. * testsuite/ld-arm/arm-elf/non-contiguous-arm.s: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm.d: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm.ld: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm2.d: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm3.ld: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm3.d: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm3.ld: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm4.d: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm4.ld: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm5.d: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm5.ld: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm6.d: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm6.ld: New. * testsuite/ld-powerpc/powerpc.exp: Run new tests. * testsuite/ld-powerpc/non-contiguous-powerpc.d: New. * testsuite/ld-powerpc/non-contiguous-powerpc.ld: New. * testsuite/ld-powerpc/non-contiguous-powerpc.sd: New. * testsuite/ld-powerpc/non-contiguous-powerpc64.d: New.
2019-11-25 09:55:37 +01:00
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
stub_sec = stub_entry->stub_sec;
/* Make a note of the offset within the stubs for this entry. */
stub_entry->stub_offset = stub_sec->size;
loc = stub_sec->contents + stub_entry->stub_offset;
stub_bfd = stub_sec->owner;
/* This is the address of the stub destination. */
sym_value = (stub_entry->target_value
+ stub_entry->target_section->output_offset
+ stub_entry->target_section->output_section->vma);
if (stub_entry->stub_type == aarch64_stub_long_branch)
{
bfd_vma place = (stub_entry->stub_offset + stub_sec->output_section->vma
+ stub_sec->output_offset);
/* See if we can relax the stub. */
if (aarch64_valid_for_adrp_p (sym_value, place))
stub_entry->stub_type = aarch64_select_branch_stub (sym_value, place);
}
switch (stub_entry->stub_type)
{
case aarch64_stub_adrp_branch:
template = aarch64_adrp_branch_stub;
template_size = sizeof (aarch64_adrp_branch_stub);
break;
case aarch64_stub_long_branch:
template = aarch64_long_branch_stub;
template_size = sizeof (aarch64_long_branch_stub);
break;
[AArch64] Cortex-A53 erratum 835769 linker workaround 2014-10-22 Tejas Belagod <tejas.belagod@arm.com> bfd/ * bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter. * bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise. * elfnn-aarch64.c (aarch64_erratum_835769_stub): New. (elf_aarch64_stub_type): Add new type aarch64_stub_erratum_835769_veneer. (elf_aarch64_stub_hash_entry): New fields for erratum 835769. (aarch64_erratum_835769_fix): New data struct to record erratum 835769. (elf_aarch64_link_hash_table: Global flags for 835769. (aarch64_build_one_stub): Add case for 835769. (aarch64_size_one_stub): Likewise. (aarch64_mem_op_p, aarch64_mlxl_p, aarch64_erratum_sequence,erratum_835769_scan): New. Decode and scan functions for erratum 835769. (elf_aarch64_create_or_find_stub_sec): New. (elfNN_aarch64_size_stubs): Look for erratum 835769 and record them. (bfd_elfNN_aarch64_set_options: Set global flag for 835769. (erratum_835769_branch_to_stub_data, make_branch_to_erratum_835769_stub):New. Connect up all the erratum stubs to occurances by branches. (elfNN_aarch64_write_section): New hook. (aarch64_map_one_stub): Output erratum stub symbol. (elfNN_aarch64_size_dynamic_sections): Init mapping symbol information for erratum 835769. (elf_backend_write_section): Define. ld/ * emultempl/aarch64elf.em: Add command-line option for erratum 835769. ld/testsuite/ * ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum 835769 tests. * ld-aarch64/erratum835769.d: New. * ld-aarch64/erratum835769.s: New.
2014-10-24 12:39:35 +02:00
case aarch64_stub_erratum_835769_veneer:
template = aarch64_erratum_835769_stub;
template_size = sizeof (aarch64_erratum_835769_stub);
break;
[AArch64] Workaround for Cortex A53 erratum 843419 Some early revisions of the Cortex-A53 have an erratum (843419). The details of the erratum are quite complex and involve dynamic conditions. For the purposes of the workaround we have simplified the static conditions to an ADRP in the last two instructions of a 4KByte page, followed within four instructions by a load/store dependent on the ADRP. This patch adds support to conservatively scan for and workaround Cortex A53 erratum 843419. There are two different workaround strategies used. The first is to rewrite ADRP instructions which form part of an erratum sequence with an ADR instruction. In situations where the ADR provides insufficient offset the dependent load or store instruction from the sequence is moved to a stub section and branches are inserted from the original sequence to the relocated instruction and back again. Stub section sizes are rounded up to a multiple of 4096 in order to ensure that the act of inserting work around stubs does not create more errata sequences. Workaround stubs are always inserted into the stub section associated with the input section containing the erratum sequence. This ensures that the fully relocated form of the veneered load store instruction is available at the point in time when the stub section is written.
2015-02-24 13:04:41 +01:00
case aarch64_stub_erratum_843419_veneer:
template = aarch64_erratum_843419_stub;
template_size = sizeof (aarch64_erratum_843419_stub);
break;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
default:
[AArch64] Call abort() consistently in unhandled stub switch statements. Ensure we hard stop via abort() for unhandled stub types rather than continuing either silently (or noisly with a BFD_FAIL()). Call abort() giving a hard stop rather than BFD_FAIL () for unhandled stub types.
2015-03-02 13:12:37 +01:00
abort ();
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
}
for (i = 0; i < (template_size / sizeof template[0]); i++)
{
bfd_putl32 (template[i], loc);
loc += 4;
}
template_size = (template_size + 7) & ~7;
stub_sec->size += template_size;
switch (stub_entry->stub_type)
{
case aarch64_stub_adrp_branch:
Force the AArch64 linker backend to refuse to link when it encounters unresoleable relocations. * reloc.c (enum bfd_reloc_status): Start values at 2. * bfd-in2.h: Regenerate. * elfnn-aarch64.c (aarch64_relocate): Invert sense of function, so that a TRUE return indicates success. Compare the result of calling _bfd_aarch64_elf_put_addend against bfd_reloc_ok. (build_one_stub): Change sense of tests against aarch64_relocate return value. (elfNN_aarch64_tls_relax): Return bfd_reloc_notsupported, rather than FALSE, when an error is detected. (elfNN_aarch64_final_link_relocate): Likewise. * testsuite/ld-aarch64/pcrel_pic_defined.d: Expect errors not warnings. Expect errors about unsupported relocations. * testsuite/ld-aarch64/pcrel_pic_undefined.d: Likewise.
2017-10-12 14:38:20 +02:00
if (!aarch64_relocate (AARCH64_R (ADR_PREL_PG_HI21), stub_bfd, stub_sec,
stub_entry->stub_offset, sym_value))
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* The stub would not have been relaxed if the offset was out
of range. */
BFD_FAIL ();
Force the AArch64 linker backend to refuse to link when it encounters unresoleable relocations. * reloc.c (enum bfd_reloc_status): Start values at 2. * bfd-in2.h: Regenerate. * elfnn-aarch64.c (aarch64_relocate): Invert sense of function, so that a TRUE return indicates success. Compare the result of calling _bfd_aarch64_elf_put_addend against bfd_reloc_ok. (build_one_stub): Change sense of tests against aarch64_relocate return value. (elfNN_aarch64_tls_relax): Return bfd_reloc_notsupported, rather than FALSE, when an error is detected. (elfNN_aarch64_final_link_relocate): Likewise. * testsuite/ld-aarch64/pcrel_pic_defined.d: Expect errors not warnings. Expect errors about unsupported relocations. * testsuite/ld-aarch64/pcrel_pic_undefined.d: Likewise.
2017-10-12 14:38:20 +02:00
if (!aarch64_relocate (AARCH64_R (ADD_ABS_LO12_NC), stub_bfd, stub_sec,
stub_entry->stub_offset + 4, sym_value))
[AArch64] Fix branch stubs for BE 2015-03-26 Tejas Belagod <tejas.belagod@arm.com> ld/testsuite * ld-aarch64/farcall-back-be.d: New. bfd/ * elfnn-aarch64.c (aarch64_build_one_stub): Replace the call to generic _bfd_final_link_relocate with aarch64_relocate.
2015-03-26 17:20:38 +01:00
BFD_FAIL ();
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
break;
case aarch64_stub_long_branch:
/* We want the value relative to the address 12 bytes back from the
BFD whitespace fixes Binutils is supposed to use tabs. In my git config I have whitespace = indent-with-non-tab,space-before-tab,trailing-space and I got annoyed enough seeing red in "git diff" output to fix the problems. * doc/header.sed: Trim trailing space when splitting lines. * aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-cris.c, * aout-ns32k.c, * aout-target.h, * aout-tic30.c, * aoutf1.h, * aoutx.h, * arc-got.h, * arc-plt.def, * arc-plt.h, * archive.c, * archive64.c, * archures.c, * armnetbsd.c, * bfd-in.h, * bfd.c, * bfdio.c, * binary.c, * bout.c, * cache.c, * cisco-core.c, * coff-alpha.c, * coff-apollo.c, * coff-arm.c, * coff-h8300.c, * coff-i386.c, * coff-i860.c, * coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mcore.c, * coff-mips.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-stgo32.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * compress.c, * corefile.c, * cpu-alpha.c, * cpu-arm.c, * cpu-avr.c, * cpu-bfin.c, * cpu-cr16.c, * cpu-cr16c.c, * cpu-crx.c, * cpu-d10v.c, * cpu-frv.c, * cpu-ft32.c, * cpu-i370.c, * cpu-i960.c, * cpu-ia64-opc.c, * cpu-ip2k.c, * cpu-lm32.c, * cpu-m32r.c, * cpu-mcore.c, * cpu-microblaze.c, * cpu-mips.c, * cpu-moxie.c, * cpu-mt.c, * cpu-nios2.c, * cpu-ns32k.c, * cpu-or1k.c, * cpu-powerpc.c, * cpu-pru.c, * cpu-sh.c, * cpu-spu.c, * cpu-v850.c, * cpu-v850_rh850.c, * cpu-xgate.c, * cpu-z80.c, * dwarf1.c, * dwarf2.c, * ecoff.c, * ecofflink.c, * ecoffswap.h, * elf-bfd.h, * elf-eh-frame.c, * elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf-s390-common.c, * elf-strtab.c, * elf-vxworks.c, * elf.c, * elf32-am33lin.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-avr.h, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-i860.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68hc1x.c, * elf32-m68hc1x.h, * elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nds32.h, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score.h, * elf32-score7.c, * elf32-sh-symbian.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilegx.c, * elf32-tilegx.h, * elf32-tilepro.c, * elf32-tilepro.h, * elf32-v850.c, * elf32-vax.c, * elf32-wasm32.c, * elf32-xc16x.c, * elf32-xgate.c, * elf32-xgate.h, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-tilegx.c, * elf64-tilegx.h, * elf64-x86-64.c, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-aarch64.h, * elfxx-ia64.c, * elfxx-ia64.h, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * elfxx-x86.h, * freebsd.h, * hash.c, * host-aout.c, * hp300hpux.c, * hppabsd-core.c, * hpux-core.c, * i386aout.c, * i386linux.c, * i386lynx.c, * i386mach3.c, * i386msdos.c, * i386netbsd.c, * ieee.c, * ihex.c, * irix-core.c, * libaout.h, * libbfd-in.h, * libbfd.c, * libcoff-in.h, * libnlm.h, * libpei.h, * libxcoff.h, * linker.c, * lynx-core.c, * m68k4knetbsd.c, * m68klinux.c, * m68knetbsd.c, * m88kmach3.c, * mach-o-aarch64.c, * mach-o-arm.c, * mach-o-i386.c, * mach-o-target.c, * mach-o-x86-64.c, * mach-o.c, * mach-o.h, * merge.c, * mipsbsd.c, * mmo.c, * netbsd.h, * netbsd-core.c, * newsos3.c, * nlm-target.h, * nlm32-ppc.c, * nlm32-sparc.c, * nlmcode.h, * ns32k.h, * ns32knetbsd.c, * oasys.c, * opncls.c, * pc532-mach.c, * pdp11.c, * pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-mips.c, * pe-x86_64.c, * peXXigen.c, * pef.c, * pef.h, * pei-arm.c, * pei-i386.c, * pei-mcore.c, * pei-x86_64.c, * peicode.h, * plugin.c, * ppcboot.c, * ptrace-core.c, * reloc.c, * riscix.c, * rs6000-core.c, * section.c, * som.c, * som.h, * sparclinux.c, * sparcnetbsd.c, * srec.c, * stabs.c, * sunos.c, * syms.c, * targets.c, * tekhex.c, * trad-core.c, * vax1knetbsd.c, * vaxnetbsd.c, * verilog.c, * versados.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * wasm-module.c, * wasm-module.h, * xcofflink.c, * xsym.c, * xsym.h: Whitespace fixes. * bfd-in2.h, * libbfd.h, * libcoff.h: Regenerate.
2017-12-05 23:56:00 +01:00
value itself. */
Force the AArch64 linker backend to refuse to link when it encounters unresoleable relocations. * reloc.c (enum bfd_reloc_status): Start values at 2. * bfd-in2.h: Regenerate. * elfnn-aarch64.c (aarch64_relocate): Invert sense of function, so that a TRUE return indicates success. Compare the result of calling _bfd_aarch64_elf_put_addend against bfd_reloc_ok. (build_one_stub): Change sense of tests against aarch64_relocate return value. (elfNN_aarch64_tls_relax): Return bfd_reloc_notsupported, rather than FALSE, when an error is detected. (elfNN_aarch64_final_link_relocate): Likewise. * testsuite/ld-aarch64/pcrel_pic_defined.d: Expect errors not warnings. Expect errors about unsupported relocations. * testsuite/ld-aarch64/pcrel_pic_undefined.d: Likewise.
2017-10-12 14:38:20 +02:00
if (!aarch64_relocate (AARCH64_R (PRELNN), stub_bfd, stub_sec,
stub_entry->stub_offset + 16, sym_value + 12))
[AArch64] Fix branch stubs for BE 2015-03-26 Tejas Belagod <tejas.belagod@arm.com> ld/testsuite * ld-aarch64/farcall-back-be.d: New. bfd/ * elfnn-aarch64.c (aarch64_build_one_stub): Replace the call to generic _bfd_final_link_relocate with aarch64_relocate.
2015-03-26 17:20:38 +01:00
BFD_FAIL ();
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
break;
[AArch64] Cortex-A53 erratum 835769 linker workaround 2014-10-22 Tejas Belagod <tejas.belagod@arm.com> bfd/ * bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter. * bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise. * elfnn-aarch64.c (aarch64_erratum_835769_stub): New. (elf_aarch64_stub_type): Add new type aarch64_stub_erratum_835769_veneer. (elf_aarch64_stub_hash_entry): New fields for erratum 835769. (aarch64_erratum_835769_fix): New data struct to record erratum 835769. (elf_aarch64_link_hash_table: Global flags for 835769. (aarch64_build_one_stub): Add case for 835769. (aarch64_size_one_stub): Likewise. (aarch64_mem_op_p, aarch64_mlxl_p, aarch64_erratum_sequence,erratum_835769_scan): New. Decode and scan functions for erratum 835769. (elf_aarch64_create_or_find_stub_sec): New. (elfNN_aarch64_size_stubs): Look for erratum 835769 and record them. (bfd_elfNN_aarch64_set_options: Set global flag for 835769. (erratum_835769_branch_to_stub_data, make_branch_to_erratum_835769_stub):New. Connect up all the erratum stubs to occurances by branches. (elfNN_aarch64_write_section): New hook. (aarch64_map_one_stub): Output erratum stub symbol. (elfNN_aarch64_size_dynamic_sections): Init mapping symbol information for erratum 835769. (elf_backend_write_section): Define. ld/ * emultempl/aarch64elf.em: Add command-line option for erratum 835769. ld/testsuite/ * ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum 835769 tests. * ld-aarch64/erratum835769.d: New. * ld-aarch64/erratum835769.s: New.
2014-10-24 12:39:35 +02:00
case aarch64_stub_erratum_835769_veneer:
veneered_insn_loc = stub_entry->target_section->output_section->vma
+ stub_entry->target_section->output_offset
+ stub_entry->target_value;
veneer_entry_loc = stub_entry->stub_sec->output_section->vma
+ stub_entry->stub_sec->output_offset
+ stub_entry->stub_offset;
branch_offset = veneered_insn_loc - veneer_entry_loc;
branch_offset >>= 2;
branch_offset &= 0x3ffffff;
bfd_putl32 (stub_entry->veneered_insn,
stub_sec->contents + stub_entry->stub_offset);
bfd_putl32 (template[1] | branch_offset,
stub_sec->contents + stub_entry->stub_offset + 4);
break;
[AArch64] Workaround for Cortex A53 erratum 843419 Some early revisions of the Cortex-A53 have an erratum (843419). The details of the erratum are quite complex and involve dynamic conditions. For the purposes of the workaround we have simplified the static conditions to an ADRP in the last two instructions of a 4KByte page, followed within four instructions by a load/store dependent on the ADRP. This patch adds support to conservatively scan for and workaround Cortex A53 erratum 843419. There are two different workaround strategies used. The first is to rewrite ADRP instructions which form part of an erratum sequence with an ADR instruction. In situations where the ADR provides insufficient offset the dependent load or store instruction from the sequence is moved to a stub section and branches are inserted from the original sequence to the relocated instruction and back again. Stub section sizes are rounded up to a multiple of 4096 in order to ensure that the act of inserting work around stubs does not create more errata sequences. Workaround stubs are always inserted into the stub section associated with the input section containing the erratum sequence. This ensures that the fully relocated form of the veneered load store instruction is available at the point in time when the stub section is written.
2015-02-24 13:04:41 +01:00
case aarch64_stub_erratum_843419_veneer:
Force the AArch64 linker backend to refuse to link when it encounters unresoleable relocations. * reloc.c (enum bfd_reloc_status): Start values at 2. * bfd-in2.h: Regenerate. * elfnn-aarch64.c (aarch64_relocate): Invert sense of function, so that a TRUE return indicates success. Compare the result of calling _bfd_aarch64_elf_put_addend against bfd_reloc_ok. (build_one_stub): Change sense of tests against aarch64_relocate return value. (elfNN_aarch64_tls_relax): Return bfd_reloc_notsupported, rather than FALSE, when an error is detected. (elfNN_aarch64_final_link_relocate): Likewise. * testsuite/ld-aarch64/pcrel_pic_defined.d: Expect errors not warnings. Expect errors about unsupported relocations. * testsuite/ld-aarch64/pcrel_pic_undefined.d: Likewise.
2017-10-12 14:38:20 +02:00
if (!aarch64_relocate (AARCH64_R (JUMP26), stub_bfd, stub_sec,
stub_entry->stub_offset + 4, sym_value + 4))
[AArch64] Workaround for Cortex A53 erratum 843419 Some early revisions of the Cortex-A53 have an erratum (843419). The details of the erratum are quite complex and involve dynamic conditions. For the purposes of the workaround we have simplified the static conditions to an ADRP in the last two instructions of a 4KByte page, followed within four instructions by a load/store dependent on the ADRP. This patch adds support to conservatively scan for and workaround Cortex A53 erratum 843419. There are two different workaround strategies used. The first is to rewrite ADRP instructions which form part of an erratum sequence with an ADR instruction. In situations where the ADR provides insufficient offset the dependent load or store instruction from the sequence is moved to a stub section and branches are inserted from the original sequence to the relocated instruction and back again. Stub section sizes are rounded up to a multiple of 4096 in order to ensure that the act of inserting work around stubs does not create more errata sequences. Workaround stubs are always inserted into the stub section associated with the input section containing the erratum sequence. This ensures that the fully relocated form of the veneered load store instruction is available at the point in time when the stub section is written.
2015-02-24 13:04:41 +01:00
BFD_FAIL ();
break;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
default:
[AArch64] Call abort() consistently in unhandled stub switch statements. Ensure we hard stop via abort() for unhandled stub types rather than continuing either silently (or noisly with a BFD_FAIL()). Call abort() giving a hard stop rather than BFD_FAIL () for unhandled stub types.
2015-03-02 13:12:37 +01:00
abort ();
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
}
return TRUE;
}
/* As above, but don't actually build the stub. Just bump offset so
we know stub section sizes. */
static bfd_boolean
AArch64: Implement choice between Cortex-A53 erratum workarounds. (PR ld/24373) The Cortex-A53 erratum currently has two ways it can resolve the erratum when using the flag --fix-cortex-a53-843419: 1) If the address is within the range of an ADR instruction it rewrites the ADRP into an ADR, and those doesn't need the use of a veneer. 2) If the address is not within range, it adds a branch to a veneer which will execute the final bit of the erratum workaround and branch back to the call site. When we do this we always generate the veneers and we always align the size of the text section to 4KB. This is because we only know which workaround we can use after all linking has finished and all addresses are known. This means even though the veneers are not used, we still generate the section and we still change the size of the input section. This is problematic for small memory devices as this would require the user to take about a ~4KB hit in memory even though it's not even used. Since there's no real way to restart the linking process from the final write phase this patch solves the issue by allowing the user more control over which erratum workaround gets used. Concretely this changes the option --fix-cortex-a53-843419 to take optional arguments --fix-cortex-a53-843419[=full|adr|adrp] - full (default): Use both ADRP and ADR workaround. This is equivalent to not specifying any options and is the default behavior before this patch. - adr: Only use the ADR workaround, this will not cause any increase in binary size but linking will fail if the referenced address is out of range of an ADR instruction. - adrp: Use only the ADRP workaround, this will never rewrite your ADRP. In the cases where the user knows how big their binaries are the `adr` option would prevent the unneeded overhead. bfd/ChangeLog: PR ld/24373 * bfd-in.h (enum erratum_84319_opts): New (bfd_elf64_aarch64_set_options, bfd_elf32_aarch64_set_options): Change int to enum erratum_84319_opts. * bfd-in2.h: Regenerate. * elfnn-aarch64.c (struct elf_aarch64_link_hash_table): Change fix_erratum_843419 to use new enum, remove fix_erratum_843419_adr. (_bfd_aarch64_add_stub_entry_after): Conditionally create erratum stub. (aarch64_size_one_stub): Conditionally size erratum 843419 stubs. (_bfd_aarch64_resize_stubs): Amend comment. (elfNN_aarch64_size_stubs): Don't generate stubs when no workaround requested. (bfd_elfNN_aarch64_set_options): Use new fix_erratum_843419 enum. (_bfd_aarch64_erratum_843419_branch_to_stub): Implement selection of erratum workaround. (clear_erratum_843419_entry): Update erratum conditional. ld/ChangeLog: PR ld/24373 * emultempl/aarch64elf.em (PARSE_AND_LIST_LONGOPTS): Add optional args to flags. * NEWS: Add changes to flag. (PARSE_AND_LIST_OPTIONS): Update help descriptions. (PARSE_AND_LIST_ARGS_CASES): Add new options to parser. * testsuite/ld-aarch64/aarch64-elf.exp: Add new run_dump_tests. * testsuite/ld-aarch64/erratum843419-adr.d: New test. * testsuite/ld-aarch64/erratum843419-adrp.d: New test. * testsuite/ld-aarch64/erratum843419-far-adr.d: New test. * testsuite/ld-aarch64/erratum843419-far-full.d: New test. * testsuite/ld-aarch64/erratum843419-far.s: New test. * testsuite/ld-aarch64/erratum843419-full.d: New test. * testsuite/ld-aarch64/erratum843419-near.s: New test. * testsuite/ld-aarch64/erratum843419-no-args.d: New test.
2019-05-21 14:04:08 +02:00
aarch64_size_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
struct elf_aarch64_stub_hash_entry *stub_entry;
AArch64: Implement choice between Cortex-A53 erratum workarounds. (PR ld/24373) The Cortex-A53 erratum currently has two ways it can resolve the erratum when using the flag --fix-cortex-a53-843419: 1) If the address is within the range of an ADR instruction it rewrites the ADRP into an ADR, and those doesn't need the use of a veneer. 2) If the address is not within range, it adds a branch to a veneer which will execute the final bit of the erratum workaround and branch back to the call site. When we do this we always generate the veneers and we always align the size of the text section to 4KB. This is because we only know which workaround we can use after all linking has finished and all addresses are known. This means even though the veneers are not used, we still generate the section and we still change the size of the input section. This is problematic for small memory devices as this would require the user to take about a ~4KB hit in memory even though it's not even used. Since there's no real way to restart the linking process from the final write phase this patch solves the issue by allowing the user more control over which erratum workaround gets used. Concretely this changes the option --fix-cortex-a53-843419 to take optional arguments --fix-cortex-a53-843419[=full|adr|adrp] - full (default): Use both ADRP and ADR workaround. This is equivalent to not specifying any options and is the default behavior before this patch. - adr: Only use the ADR workaround, this will not cause any increase in binary size but linking will fail if the referenced address is out of range of an ADR instruction. - adrp: Use only the ADRP workaround, this will never rewrite your ADRP. In the cases where the user knows how big their binaries are the `adr` option would prevent the unneeded overhead. bfd/ChangeLog: PR ld/24373 * bfd-in.h (enum erratum_84319_opts): New (bfd_elf64_aarch64_set_options, bfd_elf32_aarch64_set_options): Change int to enum erratum_84319_opts. * bfd-in2.h: Regenerate. * elfnn-aarch64.c (struct elf_aarch64_link_hash_table): Change fix_erratum_843419 to use new enum, remove fix_erratum_843419_adr. (_bfd_aarch64_add_stub_entry_after): Conditionally create erratum stub. (aarch64_size_one_stub): Conditionally size erratum 843419 stubs. (_bfd_aarch64_resize_stubs): Amend comment. (elfNN_aarch64_size_stubs): Don't generate stubs when no workaround requested. (bfd_elfNN_aarch64_set_options): Use new fix_erratum_843419 enum. (_bfd_aarch64_erratum_843419_branch_to_stub): Implement selection of erratum workaround. (clear_erratum_843419_entry): Update erratum conditional. ld/ChangeLog: PR ld/24373 * emultempl/aarch64elf.em (PARSE_AND_LIST_LONGOPTS): Add optional args to flags. * NEWS: Add changes to flag. (PARSE_AND_LIST_OPTIONS): Update help descriptions. (PARSE_AND_LIST_ARGS_CASES): Add new options to parser. * testsuite/ld-aarch64/aarch64-elf.exp: Add new run_dump_tests. * testsuite/ld-aarch64/erratum843419-adr.d: New test. * testsuite/ld-aarch64/erratum843419-adrp.d: New test. * testsuite/ld-aarch64/erratum843419-far-adr.d: New test. * testsuite/ld-aarch64/erratum843419-far-full.d: New test. * testsuite/ld-aarch64/erratum843419-far.s: New test. * testsuite/ld-aarch64/erratum843419-full.d: New test. * testsuite/ld-aarch64/erratum843419-near.s: New test. * testsuite/ld-aarch64/erratum843419-no-args.d: New test.
2019-05-21 14:04:08 +02:00
struct elf_aarch64_link_hash_table *htab;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
int size;
/* Massage our args to the form they really have. */
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
stub_entry = (struct elf_aarch64_stub_hash_entry *) gen_entry;
AArch64: Implement choice between Cortex-A53 erratum workarounds. (PR ld/24373) The Cortex-A53 erratum currently has two ways it can resolve the erratum when using the flag --fix-cortex-a53-843419: 1) If the address is within the range of an ADR instruction it rewrites the ADRP into an ADR, and those doesn't need the use of a veneer. 2) If the address is not within range, it adds a branch to a veneer which will execute the final bit of the erratum workaround and branch back to the call site. When we do this we always generate the veneers and we always align the size of the text section to 4KB. This is because we only know which workaround we can use after all linking has finished and all addresses are known. This means even though the veneers are not used, we still generate the section and we still change the size of the input section. This is problematic for small memory devices as this would require the user to take about a ~4KB hit in memory even though it's not even used. Since there's no real way to restart the linking process from the final write phase this patch solves the issue by allowing the user more control over which erratum workaround gets used. Concretely this changes the option --fix-cortex-a53-843419 to take optional arguments --fix-cortex-a53-843419[=full|adr|adrp] - full (default): Use both ADRP and ADR workaround. This is equivalent to not specifying any options and is the default behavior before this patch. - adr: Only use the ADR workaround, this will not cause any increase in binary size but linking will fail if the referenced address is out of range of an ADR instruction. - adrp: Use only the ADRP workaround, this will never rewrite your ADRP. In the cases where the user knows how big their binaries are the `adr` option would prevent the unneeded overhead. bfd/ChangeLog: PR ld/24373 * bfd-in.h (enum erratum_84319_opts): New (bfd_elf64_aarch64_set_options, bfd_elf32_aarch64_set_options): Change int to enum erratum_84319_opts. * bfd-in2.h: Regenerate. * elfnn-aarch64.c (struct elf_aarch64_link_hash_table): Change fix_erratum_843419 to use new enum, remove fix_erratum_843419_adr. (_bfd_aarch64_add_stub_entry_after): Conditionally create erratum stub. (aarch64_size_one_stub): Conditionally size erratum 843419 stubs. (_bfd_aarch64_resize_stubs): Amend comment. (elfNN_aarch64_size_stubs): Don't generate stubs when no workaround requested. (bfd_elfNN_aarch64_set_options): Use new fix_erratum_843419 enum. (_bfd_aarch64_erratum_843419_branch_to_stub): Implement selection of erratum workaround. (clear_erratum_843419_entry): Update erratum conditional. ld/ChangeLog: PR ld/24373 * emultempl/aarch64elf.em (PARSE_AND_LIST_LONGOPTS): Add optional args to flags. * NEWS: Add changes to flag. (PARSE_AND_LIST_OPTIONS): Update help descriptions. (PARSE_AND_LIST_ARGS_CASES): Add new options to parser. * testsuite/ld-aarch64/aarch64-elf.exp: Add new run_dump_tests. * testsuite/ld-aarch64/erratum843419-adr.d: New test. * testsuite/ld-aarch64/erratum843419-adrp.d: New test. * testsuite/ld-aarch64/erratum843419-far-adr.d: New test. * testsuite/ld-aarch64/erratum843419-far-full.d: New test. * testsuite/ld-aarch64/erratum843419-far.s: New test. * testsuite/ld-aarch64/erratum843419-full.d: New test. * testsuite/ld-aarch64/erratum843419-near.s: New test. * testsuite/ld-aarch64/erratum843419-no-args.d: New test.
2019-05-21 14:04:08 +02:00
htab = (struct elf_aarch64_link_hash_table *) in_arg;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
switch (stub_entry->stub_type)
{
case aarch64_stub_adrp_branch:
size = sizeof (aarch64_adrp_branch_stub);
break;
case aarch64_stub_long_branch:
size = sizeof (aarch64_long_branch_stub);
break;
[AArch64] Cortex-A53 erratum 835769 linker workaround 2014-10-22 Tejas Belagod <tejas.belagod@arm.com> bfd/ * bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter. * bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise. * elfnn-aarch64.c (aarch64_erratum_835769_stub): New. (elf_aarch64_stub_type): Add new type aarch64_stub_erratum_835769_veneer. (elf_aarch64_stub_hash_entry): New fields for erratum 835769. (aarch64_erratum_835769_fix): New data struct to record erratum 835769. (elf_aarch64_link_hash_table: Global flags for 835769. (aarch64_build_one_stub): Add case for 835769. (aarch64_size_one_stub): Likewise. (aarch64_mem_op_p, aarch64_mlxl_p, aarch64_erratum_sequence,erratum_835769_scan): New. Decode and scan functions for erratum 835769. (elf_aarch64_create_or_find_stub_sec): New. (elfNN_aarch64_size_stubs): Look for erratum 835769 and record them. (bfd_elfNN_aarch64_set_options: Set global flag for 835769. (erratum_835769_branch_to_stub_data, make_branch_to_erratum_835769_stub):New. Connect up all the erratum stubs to occurances by branches. (elfNN_aarch64_write_section): New hook. (aarch64_map_one_stub): Output erratum stub symbol. (elfNN_aarch64_size_dynamic_sections): Init mapping symbol information for erratum 835769. (elf_backend_write_section): Define. ld/ * emultempl/aarch64elf.em: Add command-line option for erratum 835769. ld/testsuite/ * ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum 835769 tests. * ld-aarch64/erratum835769.d: New. * ld-aarch64/erratum835769.s: New.
2014-10-24 12:39:35 +02:00
case aarch64_stub_erratum_835769_veneer:
size = sizeof (aarch64_erratum_835769_stub);
break;
[AArch64] Workaround for Cortex A53 erratum 843419 Some early revisions of the Cortex-A53 have an erratum (843419). The details of the erratum are quite complex and involve dynamic conditions. For the purposes of the workaround we have simplified the static conditions to an ADRP in the last two instructions of a 4KByte page, followed within four instructions by a load/store dependent on the ADRP. This patch adds support to conservatively scan for and workaround Cortex A53 erratum 843419. There are two different workaround strategies used. The first is to rewrite ADRP instructions which form part of an erratum sequence with an ADR instruction. In situations where the ADR provides insufficient offset the dependent load or store instruction from the sequence is moved to a stub section and branches are inserted from the original sequence to the relocated instruction and back again. Stub section sizes are rounded up to a multiple of 4096 in order to ensure that the act of inserting work around stubs does not create more errata sequences. Workaround stubs are always inserted into the stub section associated with the input section containing the erratum sequence. This ensures that the fully relocated form of the veneered load store instruction is available at the point in time when the stub section is written.
2015-02-24 13:04:41 +01:00
case aarch64_stub_erratum_843419_veneer:
AArch64: Implement choice between Cortex-A53 erratum workarounds. (PR ld/24373) The Cortex-A53 erratum currently has two ways it can resolve the erratum when using the flag --fix-cortex-a53-843419: 1) If the address is within the range of an ADR instruction it rewrites the ADRP into an ADR, and those doesn't need the use of a veneer. 2) If the address is not within range, it adds a branch to a veneer which will execute the final bit of the erratum workaround and branch back to the call site. When we do this we always generate the veneers and we always align the size of the text section to 4KB. This is because we only know which workaround we can use after all linking has finished and all addresses are known. This means even though the veneers are not used, we still generate the section and we still change the size of the input section. This is problematic for small memory devices as this would require the user to take about a ~4KB hit in memory even though it's not even used. Since there's no real way to restart the linking process from the final write phase this patch solves the issue by allowing the user more control over which erratum workaround gets used. Concretely this changes the option --fix-cortex-a53-843419 to take optional arguments --fix-cortex-a53-843419[=full|adr|adrp] - full (default): Use both ADRP and ADR workaround. This is equivalent to not specifying any options and is the default behavior before this patch. - adr: Only use the ADR workaround, this will not cause any increase in binary size but linking will fail if the referenced address is out of range of an ADR instruction. - adrp: Use only the ADRP workaround, this will never rewrite your ADRP. In the cases where the user knows how big their binaries are the `adr` option would prevent the unneeded overhead. bfd/ChangeLog: PR ld/24373 * bfd-in.h (enum erratum_84319_opts): New (bfd_elf64_aarch64_set_options, bfd_elf32_aarch64_set_options): Change int to enum erratum_84319_opts. * bfd-in2.h: Regenerate. * elfnn-aarch64.c (struct elf_aarch64_link_hash_table): Change fix_erratum_843419 to use new enum, remove fix_erratum_843419_adr. (_bfd_aarch64_add_stub_entry_after): Conditionally create erratum stub. (aarch64_size_one_stub): Conditionally size erratum 843419 stubs. (_bfd_aarch64_resize_stubs): Amend comment. (elfNN_aarch64_size_stubs): Don't generate stubs when no workaround requested. (bfd_elfNN_aarch64_set_options): Use new fix_erratum_843419 enum. (_bfd_aarch64_erratum_843419_branch_to_stub): Implement selection of erratum workaround. (clear_erratum_843419_entry): Update erratum conditional. ld/ChangeLog: PR ld/24373 * emultempl/aarch64elf.em (PARSE_AND_LIST_LONGOPTS): Add optional args to flags. * NEWS: Add changes to flag. (PARSE_AND_LIST_OPTIONS): Update help descriptions. (PARSE_AND_LIST_ARGS_CASES): Add new options to parser. * testsuite/ld-aarch64/aarch64-elf.exp: Add new run_dump_tests. * testsuite/ld-aarch64/erratum843419-adr.d: New test. * testsuite/ld-aarch64/erratum843419-adrp.d: New test. * testsuite/ld-aarch64/erratum843419-far-adr.d: New test. * testsuite/ld-aarch64/erratum843419-far-full.d: New test. * testsuite/ld-aarch64/erratum843419-far.s: New test. * testsuite/ld-aarch64/erratum843419-full.d: New test. * testsuite/ld-aarch64/erratum843419-near.s: New test. * testsuite/ld-aarch64/erratum843419-no-args.d: New test.
2019-05-21 14:04:08 +02:00
{
if (htab->fix_erratum_843419 == ERRAT_ADR)
return TRUE;
size = sizeof (aarch64_erratum_843419_stub);
}
[AArch64] Workaround for Cortex A53 erratum 843419 Some early revisions of the Cortex-A53 have an erratum (843419). The details of the erratum are quite complex and involve dynamic conditions. For the purposes of the workaround we have simplified the static conditions to an ADRP in the last two instructions of a 4KByte page, followed within four instructions by a load/store dependent on the ADRP. This patch adds support to conservatively scan for and workaround Cortex A53 erratum 843419. There are two different workaround strategies used. The first is to rewrite ADRP instructions which form part of an erratum sequence with an ADR instruction. In situations where the ADR provides insufficient offset the dependent load or store instruction from the sequence is moved to a stub section and branches are inserted from the original sequence to the relocated instruction and back again. Stub section sizes are rounded up to a multiple of 4096 in order to ensure that the act of inserting work around stubs does not create more errata sequences. Workaround stubs are always inserted into the stub section associated with the input section containing the erratum sequence. This ensures that the fully relocated form of the veneered load store instruction is available at the point in time when the stub section is written.
2015-02-24 13:04:41 +01:00
break;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
default:
[AArch64] Call abort() consistently in unhandled stub switch statements. Ensure we hard stop via abort() for unhandled stub types rather than continuing either silently (or noisly with a BFD_FAIL()). Call abort() giving a hard stop rather than BFD_FAIL () for unhandled stub types.
2015-03-02 13:12:37 +01:00
abort ();
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
}
size = (size + 7) & ~7;
stub_entry->stub_sec->size += size;
return TRUE;
}
/* External entry points for sizing and building linker stubs. */
/* Set up various things so that we can make a list of input sections
for each output section included in the link. Returns -1 on error,
0 when no stubs will be needed, and 1 on success. */
int
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_setup_section_lists (bfd *output_bfd,
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
struct bfd_link_info *info)
{
bfd *input_bfd;
unsigned int bfd_count;
Make asection->id and asection->index unsigned These int vars are really unsigned, so make them so. * section.c (struct bfd_section): Make "id" and "index" unsigned. * coff-rs6000.c (_bfd_xcoff_sizeof_headers): Adjust local var to suit. * elf.c (elf_map_symbols): Likewise. * elf64-ppc.c (sym_exists_at): Make "id" param unsigned. (struct ppc_link_hash_table): Make "top_id" and "top_index" unsigned. (ppc64_elf_setup_section_lists): Ditto for local vars. * elf32-arm.c: Similarly to elf64-ppc.c. * elf32-avr.c: Likewise. * elf32-hppa.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-metag.c: Likewise. * elf32-nios2.c: Likewise. * elfnn-aarch64.c: Likewise. * simple.c (struct saved_offsets): Make "section_count" unsigned. * bfd-in2.h: Regenerate.
2015-08-31 01:02:29 +02:00
unsigned int top_id, top_index;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
asection *section;
asection **input_list, **list;
bfd_size_type to size_t bfd_size_type was invented a long time ago in the K&R days. Many places in binutils ought to be using size_t instead (and there are lots of places that use long or unsigned long that really ought to use size_t too). Note that you can't change everything over to size_t: A 32-bit host needs a larger type than size_t to support reading and processing of 64-bit ELF object files. This patch just tidies some of the more obvious uses of bfd_size_type that could be size_t. There no doubt are more lurking in the source. Incidentally, practically all functions used for output of object files can use size_t and don't need to worry about overflow of size expressions. If you have something like symcount * sizeof (void *) when symcount is counting symbols already in memory then you know that this expression can't overflow since the size of a symbol in memory is larger by far than that of a pointer. * aix386-core.c (aix386_core_file_p): Use size_t for "amt". * aout-target.h (object_p): Likewise. * aout-tic30.c (tic30_aout_object_p): Likewise. * aoutx.h (some_aout_object_p, mkobject, make_empty_symbol), (emit_stringtab, write_syms, link_hash_table_create), (aout_link_write_other_symbol): Likewise. * archive.c (_bfd_generic_mkarchive, bfd_generic_archive_p), (bfd_ar_hdr_from_filesystem, _bfd_write_archive_contents), (_bfd_compute_and_write_armap): Likewise. * archures.c (bfd_arch_list): Likewise. * bfd.c (bfd_record_phdr): Likewise. * binary.c (binary_canonicalize_symtab): Likewise. * cisco-core.c (cisco_core_file_validate): Likewise. * coff-arm.c (coff_arm_link_hash_table_create, find_thumb_glue), (find_arm_glue, record_arm_to_thumb_glue), (record_thumb_to_arm_glue): Likewise. * coff-ppc.c (ppc_coff_link_hash_table_create, record_toc), (ppc_allocate_toc_section): Likewise. * coff-rs6000.c (_bfd_xcoff_mkobject, _bfd_xcoff_archive_p): Likewise. * coff-sh.c (sh_relax_section): Likewise. * coff64-rs6000.c (xcoff64_archive_p): Likewise. * coffcode.h (handle_COMDAT, coff_new_section_hook), (coff_set_alignment_hook, coff_mkobject), (coff_compute_section_file_positions): Likewise. * coffgen.c (coff_make_empty_symbol, coff_bfd_make_debug_symbol), (coff_find_nearest_line_with_names), ( bfd_coff_set_symbol_class): Likewise. * cofflink.c (_bfd_coff_link_hash_table_create), (_bfd_coff_link_input_bfd): Likewise. * dwarf1.c (alloc_dwarf1_unit, alloc_dwarf1_func): Likewise. * dwarf2.c (read_abbrevs, read_attribute_value, add_line_info), (build_line_info_table, sort_line_sequences), (line_info_add_include_dir, line_info_add_file_name), (decode_line_info, scan_unit_for_symbols, parse_comp_unit), (place_sections, _bfd_dwarf2_slurp_debug_info): Likewise. * ecoff.c (_bfd_ecoff_mkobject, _bfd_ecoff_make_empty_symbol), (_bfd_ecoff_find_nearest_line), (_bfd_ecoff_bfd_link_hash_table_create): Likewise. * ecofflink.c (bfd_ecoff_debug_init): Likewise. * elf-hppa.h (_bfd_elf_hppa_gen_reloc_type): Likewise. * elf-m10300.c (mn10300_elf_relax_section), (elf32_mn10300_link_hash_table_create): Likewise. * elf-strtab.c (_bfd_elf_strtab_init): Likewise. * elf.c (make_mapping, copy_elf_program_header): Likewise. * elf32-arm.c (elf32_arm_link_hash_table_create), (elf32_arm_setup_section_lists, elf32_arm_check_relocs), (elf32_arm_new_section_hook): Likewise. * elf32-avr.c (elf_avr_new_section_hook), (elf32_avr_link_hash_table_create, get_local_syms), (elf32_avr_setup_section_lists): Likewise. * elf32-bfin.c (bfinfdpic_elf_link_hash_table_create), (bfin_link_hash_table_create): Likewise. * elf32-cr16.c (elf32_cr16_link_hash_table_create): Likewise. * elf32-cris.c (elf_cris_link_hash_table_create): Likewise. * elf32-csky.c (csky_elf_link_hash_table_create), (csky_elf_check_relocs, elf32_csky_setup_section_lists): Likewise. * elf32-frv.c (frvfdpic_elf_link_hash_table_create): Likewise. * elf32-hppa.c (elf32_hppa_link_hash_table_create), (elf32_hppa_setup_section_lists, get_local_syms): Likewise. * elf32-i386.c (elf_i386_check_relocs): Likewise. * elf32-lm32.c (lm32_elf_link_hash_table_create): Likewise. * elf32-m32r.c (m32r_elf_link_hash_table_create), (m32r_elf_check_relocs): Likewise. * elf32-m68hc1x.c (m68hc11_elf_hash_table_create), (elf32_m68hc11_setup_section_lists), (elf32_m68hc11_size_stubs): Likewise. * elf32-m68k.c (elf_m68k_link_hash_table_create): Likewise. * elf32-metag.c (elf_metag_link_hash_table_create), (elf_metag_setup_section_lists): Likewise. * elf32-microblaze.c (microblaze_elf_link_hash_table_create), (microblaze_elf_check_relocs): Likewise. * elf32-nds32.c (nds32_elf_link_hash_table_create), (nds32_elf_check_relocs): Likewise. * elf32-nios2.c (nios2_elf32_setup_section_lists), (get_local_syms, nios2_elf32_check_relocs), (nios2_elf32_link_hash_table_create): Likewise. * elf32-or1k.c (or1k_elf_link_hash_table_create), (or1k_elf_check_relocs): Likewise. * elf32-ppc.c (ppc_elf_modify_segment_map, update_plt_info): Likewise. * elf32-pru.c (pru_elf32_link_hash_table_create): Likewise. * elf32-s390.c (elf_s390_link_hash_table_create), (elf_s390_check_relocs): Likewise. * elf32-score.c (score_elf_create_got_section), (s3_elf32_score_new_section_hook), (elf32_score_link_hash_table_create): Likewise. * elf32-score7.c (score_elf_create_got_section), (s7_elf32_score_new_section_hook): Likewise. * elf32-sh.c (sh_elf_link_hash_table_create), (sh_elf_check_relocs): Likewise. * elf32-tic6x.c (elf32_tic6x_link_hash_table_create), (elf32_tic6x_new_section_hook, elf32_tic6x_check_relocs): Likewise. * elf32-tilepro.c (tilepro_elf_link_hash_table_create), (tilepro_elf_check_relocs): Likewise. * elf32-v850.c (remember_hi16s_reloc): Likewise. * elf32-vax.c (elf_vax_link_hash_table_create): Likewise. * elf32-xtensa.c (elf_xtensa_link_hash_table_create), (elf_xtensa_new_section_hook): Likewise. * elf64-alpha.c (elf64_alpha_bfd_link_hash_table_create), (get_got_entry, elf64_alpha_check_relocs): Likewise. * elf64-hppa.c (elf64_hppa_hash_table_create): Likewise. * elf64-ia64-vms.c (elf64_ia64_object_p): Likewise. * elf64-mmix.c (mmix_elf_new_section_hook): Likewise. * elf64-ppc.c (ppc64_elf_new_section_hook), (ppc64_elf_link_hash_table_create, update_local_sym_info), (update_plt_info, ppc64_elf_check_relocs): Likewise. * elf64-s390.c (elf_s390_link_hash_table_create), (elf_s390_check_relocs): Likewise. * elf64-x86-64.c (elf_x86_64_check_relocs): Likewise. * elflink.c (bfd_elf_link_record_local_dynamic_symbol), (_bfd_elf_link_find_version_dependencies, elf_link_add_object_symbols), (elf_link_add_archive_symbols, compute_bucket_count), (bfd_elf_size_dynsym_hash_dynstr, _bfd_elf_link_hash_table_create), (bfd_elf_get_bfd_needed_list, elf_link_swap_symbols_out), (bfd_elf_final_link): Likewise. * elfnn-aarch64.c (elfNN_aarch64_link_hash_table_create), (elfNN_aarch64_setup_section_lists, elfNN_aarch64_check_relocs), (elfNN_aarch64_new_section_hook): Likewise. * elfnn-ia64.c (elfNN_ia64_object_p): Likewise. * elfnn-riscv.c (riscv_elf_link_hash_table_create), (riscv_elf_check_relocs): Likewise. * elfxx-mips.c (_bfd_mips_elf_new_section_hook), (_bfd_mips_elf_add_symbol_hook, _bfd_mips_elf_check_relocs), (_bfd_mips_elf_modify_segment_map, _bfd_mips_elf_set_section_contents), (_bfd_mips_elf_link_hash_table_create): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_link_hash_table_create), (_bfd_sparc_elf_check_relocs), (_bfd_sparc_elf_new_section_hook): Likewise. * elfxx-tilegx.c (tilegx_elf_link_hash_table_create), (tilegx_elf_check_relocs): Likewise. * elfxx-x86.c (_bfd_x86_elf_link_hash_table_create): Likewise. * format.c (bfd_check_format_matches): Likewise. * hash.c (_bfd_stringtab_init): Likewise. * ihex.c (ihex_scan): Likewise. * irix-core.c (irix_core_core_file_p): Likewise. * linker.c (bfd_wrapped_link_hash_lookup), (_bfd_generic_link_hash_table_create), (_bfd_generic_reloc_link_order): Likewise. * lynx-core.c (lynx_core_file_p): Likewise. * netbsd-core.c (netbsd_core_file_p): Likewise. * osf-core.c (osf_core_core_file_p): Likewise. * pdp11.c (some_aout_object_p, mkobject, make_empty_symbol), (link_hash_table_create, aout_link_write_other_symbol): Likewise. * peXXigen.c (_bfd_XX_bfd_copy_private_section_data): Likewise. * peicode.h (pe_mkobject): Likewise. * ppcboot.c (ppcboot_mkobject, ppcboot_canonicalize_symtab): Likewise. * ptrace-core.c (ptrace_unix_core_file_p): Likewise. * sco5-core.c (read_uarea): Likewise. * som.c (hppa_som_gen_reloc_type, som_object_p, som_prep_headers), (som_write_fixups, som_write_space_strings, som_write_symbol_strings), (som_finish_writing, som_canonicalize_symtab, som_new_section_hook), (som_bfd_copy_private_section_data, bfd_som_set_section_attributes), (bfd_som_attach_aux_hdr, som_write_armap): Likewise. * srec.c (srec_scan): Likewise. * syms.c (_bfd_generic_make_empty_symbol): Likewise. * targets.c (bfd_target_list): Likewise. * tekhex.c (first_phase, tekhex_sizeof_headers): Likewise. * trad-core.c (trad_unix_core_file_p): Likewise. * vms-alpha.c (vms_initialize, alpha_vms_bfd_link_hash_table_create), (vms_new_section_hook): Likewise. * wasm-module.c (wasm_make_empty_symbol): Likewise. * xcofflink.c (xcoff_get_section_contents), (_bfd_xcoff_bfd_link_hash_table_create, xcoff_set_import_path), (xcoff_find_function, bfd_xcoff_link_record_set, xcoff_build_ldsym), (bfd_xcoff_size_dynamic_sections, xcoff_link_input_bfd): Likewise.
2020-02-19 03:42:00 +01:00
size_t amt;
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
struct elf_aarch64_link_hash_table *htab =
elf_aarch64_hash_table (info);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
if (!is_elf_hash_table (htab))
return 0;
/* Count the number of input BFDs and find the top input section id. */
for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
Make bfd.link_next field a union This field of struct bfd is currently only used to chain together linker input files. This patch prepares to use the field to stash the linker hash table, which is always created on the linker output file. bfd/ * bfd.c (struct bfd): Replace link_next with a union. * aoutx.h, * bfd.c, * coff-ppc.c, * coff-rs6000.c, * cofflink.c, * ecoff.c, * elf-m10300.c, * elf32-arm.c, * elf32-avr.c, * elf32-hppa.c, * elf32-i386.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc1x.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-nds32.c, * elf32-nios2.c, * elf32-or1k.c, * elf32-ppc.c, * elf32-rl78.c, * elf32-s390.c, * elf32-score.c, * elf32-score7.c, * elf32-sh.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilepro.c, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-x86-64.c, * elflink.c, * elfnn-aarch64.c, * elfxx-mips.c, * elfxx-sparc.c, * elfxx-tilegx.c, * linker.c, * pdp11.c, * peXXigen.c, * simple.c, * sunos.c, * vms-alpha.c, * xcofflink.c: Update for above. * bfd-in2.h: Regenerate. include/ * bfdlink.h: Update for bfd.link_next change. ld/ * emultempl/cr16elf.em, * emultempl/elf32.em, * emultempl/genelf.em, * emultempl/m68kcoff.em, * emultempl/m68kelf.em, * emultempl/nds32elf.em, * emultempl/pe.em, * emultempl/pep.em, * ldlang.c, * ldmain.c, * pe-dll.c: Update for bfd.link_next change.
2014-06-13 11:40:57 +02:00
input_bfd != NULL; input_bfd = input_bfd->link.next)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
bfd_count += 1;
for (section = input_bfd->sections;
section != NULL; section = section->next)
{
if (top_id < section->id)
top_id = section->id;
}
}
htab->bfd_count = bfd_count;
amt = sizeof (struct map_stub) * (top_id + 1);
htab->stub_group = bfd_zmalloc (amt);
if (htab->stub_group == NULL)
return -1;
/* We can't use output_bfd->section_count here to find the top output
section index as some sections may have been removed, and
_bfd_strip_section_from_output doesn't renumber the indices. */
for (section = output_bfd->sections, top_index = 0;
section != NULL; section = section->next)
{
if (top_index < section->index)
top_index = section->index;
}
htab->top_index = top_index;
amt = sizeof (asection *) * (top_index + 1);
input_list = bfd_malloc (amt);
htab->input_list = input_list;
if (input_list == NULL)
return -1;
/* For sections we aren't interested in, mark their entries with a
value we can check later. */
list = input_list + top_index;
do
*list = bfd_abs_section_ptr;
while (list-- != input_list);
for (section = output_bfd->sections;
section != NULL; section = section->next)
{
if ((section->flags & SEC_CODE) != 0)
input_list[section->index] = NULL;
}
return 1;
}
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
/* Used by elfNN_aarch64_next_input_section and group_sections. */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
#define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
/* The linker repeatedly calls this function for each input section,
in the order that input sections are linked into output sections.
Build lists of input sections to determine groupings between which
we may insert linker stubs. */
void
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_next_input_section (struct bfd_link_info *info, asection *isec)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
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struct elf_aarch64_link_hash_table *htab =
elf_aarch64_hash_table (info);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
if (isec->output_section->index <= htab->top_index)
{
asection **list = htab->input_list + isec->output_section->index;
[binutils-gdb][ld][AArch64] Fix group_sections algorithm PR ld/25665 * bfd/elfnn-aarch64.c (group_sections): Copy implementation from elf32-arm.c. * testsuite/ld-aarch64/aarch64-elf.exp: Add new test. * testsuite/ld-aarch64/farcall-group.s: New large group test. * testsuite/ld-aarch64/farcall-group.d: Likewise.
2020-05-04 16:51:56 +02:00
if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
/* Steal the link_sec pointer for our list. */
/* This happens to make the list in reverse order,
which is what we want. */
PREV_SEC (isec) = *list;
*list = isec;
}
}
}
/* See whether we can group stub sections together. Grouping stub
sections may result in fewer stubs. More importantly, we need to
put all .init* and .fini* stubs at the beginning of the .init or
.fini output sections respectively, because glibc splits the
_init and _fini functions into multiple parts. Putting a stub in
the middle of a function is not a good idea. */
static void
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
group_sections (struct elf_aarch64_link_hash_table *htab,
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
bfd_size_type stub_group_size,
[binutils-gdb][ld][AArch64] Fix group_sections algorithm PR ld/25665 * bfd/elfnn-aarch64.c (group_sections): Copy implementation from elf32-arm.c. * testsuite/ld-aarch64/aarch64-elf.exp: Add new test. * testsuite/ld-aarch64/farcall-group.s: New large group test. * testsuite/ld-aarch64/farcall-group.d: Likewise.
2020-05-04 16:51:56 +02:00
bfd_boolean stubs_always_after_branch)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
[binutils-gdb][ld][AArch64] Fix group_sections algorithm PR ld/25665 * bfd/elfnn-aarch64.c (group_sections): Copy implementation from elf32-arm.c. * testsuite/ld-aarch64/aarch64-elf.exp: Add new test. * testsuite/ld-aarch64/farcall-group.s: New large group test. * testsuite/ld-aarch64/farcall-group.d: Likewise.
2020-05-04 16:51:56 +02:00
asection **list = htab->input_list;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
do
{
asection *tail = *list;
[binutils-gdb][ld][AArch64] Fix group_sections algorithm PR ld/25665 * bfd/elfnn-aarch64.c (group_sections): Copy implementation from elf32-arm.c. * testsuite/ld-aarch64/aarch64-elf.exp: Add new test. * testsuite/ld-aarch64/farcall-group.s: New large group test. * testsuite/ld-aarch64/farcall-group.d: Likewise.
2020-05-04 16:51:56 +02:00
asection *head;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
if (tail == bfd_abs_section_ptr)
continue;
[binutils-gdb][ld][AArch64] Fix group_sections algorithm PR ld/25665 * bfd/elfnn-aarch64.c (group_sections): Copy implementation from elf32-arm.c. * testsuite/ld-aarch64/aarch64-elf.exp: Add new test. * testsuite/ld-aarch64/farcall-group.s: New large group test. * testsuite/ld-aarch64/farcall-group.d: Likewise.
2020-05-04 16:51:56 +02:00
/* Reverse the list: we must avoid placing stubs at the
beginning of the section because the beginning of the text
section may be required for an interrupt vector in bare metal
code. */
#define NEXT_SEC PREV_SEC
head = NULL;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
while (tail != NULL)
[binutils-gdb][ld][AArch64] Fix group_sections algorithm PR ld/25665 * bfd/elfnn-aarch64.c (group_sections): Copy implementation from elf32-arm.c. * testsuite/ld-aarch64/aarch64-elf.exp: Add new test. * testsuite/ld-aarch64/farcall-group.s: New large group test. * testsuite/ld-aarch64/farcall-group.d: Likewise.
2020-05-04 16:51:56 +02:00
{
/* Pop from tail. */
asection *item = tail;
tail = PREV_SEC (item);
/* Push on head. */
NEXT_SEC (item) = head;
head = item;
}
while (head != NULL)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
asection *curr;
[binutils-gdb][ld][AArch64] Fix group_sections algorithm PR ld/25665 * bfd/elfnn-aarch64.c (group_sections): Copy implementation from elf32-arm.c. * testsuite/ld-aarch64/aarch64-elf.exp: Add new test. * testsuite/ld-aarch64/farcall-group.s: New large group test. * testsuite/ld-aarch64/farcall-group.d: Likewise.
2020-05-04 16:51:56 +02:00
asection *next;
bfd_vma stub_group_start = head->output_offset;
bfd_vma end_of_next;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
[binutils-gdb][ld][AArch64] Fix group_sections algorithm PR ld/25665 * bfd/elfnn-aarch64.c (group_sections): Copy implementation from elf32-arm.c. * testsuite/ld-aarch64/aarch64-elf.exp: Add new test. * testsuite/ld-aarch64/farcall-group.s: New large group test. * testsuite/ld-aarch64/farcall-group.d: Likewise.
2020-05-04 16:51:56 +02:00
curr = head;
while (NEXT_SEC (curr) != NULL)
{
next = NEXT_SEC (curr);
end_of_next = next->output_offset + next->size;
if (end_of_next - stub_group_start >= stub_group_size)
/* End of NEXT is too far from start, so stop. */
break;
/* Add NEXT to the group. */
curr = next;
}
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
[binutils-gdb][ld][AArch64] Fix group_sections algorithm PR ld/25665 * bfd/elfnn-aarch64.c (group_sections): Copy implementation from elf32-arm.c. * testsuite/ld-aarch64/aarch64-elf.exp: Add new test. * testsuite/ld-aarch64/farcall-group.s: New large group test. * testsuite/ld-aarch64/farcall-group.d: Likewise.
2020-05-04 16:51:56 +02:00
/* OK, the size from the start to the start of CURR is less
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
than stub_group_size and thus can be handled by one stub
[binutils-gdb][ld][AArch64] Fix group_sections algorithm PR ld/25665 * bfd/elfnn-aarch64.c (group_sections): Copy implementation from elf32-arm.c. * testsuite/ld-aarch64/aarch64-elf.exp: Add new test. * testsuite/ld-aarch64/farcall-group.s: New large group test. * testsuite/ld-aarch64/farcall-group.d: Likewise.
2020-05-04 16:51:56 +02:00
section. (Or the head section is itself larger than
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
stub_group_size, in which case we may be toast.)
We should really be keeping track of the total size of
stubs added here, as stubs contribute to the final output
section size. */
do
{
[binutils-gdb][ld][AArch64] Fix group_sections algorithm PR ld/25665 * bfd/elfnn-aarch64.c (group_sections): Copy implementation from elf32-arm.c. * testsuite/ld-aarch64/aarch64-elf.exp: Add new test. * testsuite/ld-aarch64/farcall-group.s: New large group test. * testsuite/ld-aarch64/farcall-group.d: Likewise.
2020-05-04 16:51:56 +02:00
next = NEXT_SEC (head);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* Set up this stub group. */
[binutils-gdb][ld][AArch64] Fix group_sections algorithm PR ld/25665 * bfd/elfnn-aarch64.c (group_sections): Copy implementation from elf32-arm.c. * testsuite/ld-aarch64/aarch64-elf.exp: Add new test. * testsuite/ld-aarch64/farcall-group.s: New large group test. * testsuite/ld-aarch64/farcall-group.d: Likewise.
2020-05-04 16:51:56 +02:00
htab->stub_group[head->id].link_sec = curr;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
}
[binutils-gdb][ld][AArch64] Fix group_sections algorithm PR ld/25665 * bfd/elfnn-aarch64.c (group_sections): Copy implementation from elf32-arm.c. * testsuite/ld-aarch64/aarch64-elf.exp: Add new test. * testsuite/ld-aarch64/farcall-group.s: New large group test. * testsuite/ld-aarch64/farcall-group.d: Likewise.
2020-05-04 16:51:56 +02:00
while (head != curr && (head = next) != NULL);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* But wait, there's more! Input sections up to stub_group_size
[binutils-gdb][ld][AArch64] Fix group_sections algorithm PR ld/25665 * bfd/elfnn-aarch64.c (group_sections): Copy implementation from elf32-arm.c. * testsuite/ld-aarch64/aarch64-elf.exp: Add new test. * testsuite/ld-aarch64/farcall-group.s: New large group test. * testsuite/ld-aarch64/farcall-group.d: Likewise.
2020-05-04 16:51:56 +02:00
bytes after the stub section can be handled by it too. */
if (!stubs_always_after_branch)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
[binutils-gdb][ld][AArch64] Fix group_sections algorithm PR ld/25665 * bfd/elfnn-aarch64.c (group_sections): Copy implementation from elf32-arm.c. * testsuite/ld-aarch64/aarch64-elf.exp: Add new test. * testsuite/ld-aarch64/farcall-group.s: New large group test. * testsuite/ld-aarch64/farcall-group.d: Likewise.
2020-05-04 16:51:56 +02:00
stub_group_start = curr->output_offset + curr->size;
while (next != NULL)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
[binutils-gdb][ld][AArch64] Fix group_sections algorithm PR ld/25665 * bfd/elfnn-aarch64.c (group_sections): Copy implementation from elf32-arm.c. * testsuite/ld-aarch64/aarch64-elf.exp: Add new test. * testsuite/ld-aarch64/farcall-group.s: New large group test. * testsuite/ld-aarch64/farcall-group.d: Likewise.
2020-05-04 16:51:56 +02:00
end_of_next = next->output_offset + next->size;
if (end_of_next - stub_group_start >= stub_group_size)
/* End of NEXT is too far from stubs, so stop. */
break;
/* Add NEXT to the stub group. */
head = next;
next = NEXT_SEC (head);
htab->stub_group[head->id].link_sec = curr;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
}
}
[binutils-gdb][ld][AArch64] Fix group_sections algorithm PR ld/25665 * bfd/elfnn-aarch64.c (group_sections): Copy implementation from elf32-arm.c. * testsuite/ld-aarch64/aarch64-elf.exp: Add new test. * testsuite/ld-aarch64/farcall-group.s: New large group test. * testsuite/ld-aarch64/farcall-group.d: Likewise.
2020-05-04 16:51:56 +02:00
head = next;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
}
}
[binutils-gdb][ld][AArch64] Fix group_sections algorithm PR ld/25665 * bfd/elfnn-aarch64.c (group_sections): Copy implementation from elf32-arm.c. * testsuite/ld-aarch64/aarch64-elf.exp: Add new test. * testsuite/ld-aarch64/farcall-group.s: New large group test. * testsuite/ld-aarch64/farcall-group.d: Likewise.
2020-05-04 16:51:56 +02:00
while (list++ != htab->input_list + htab->top_index);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
free (htab->input_list);
}
[binutils-gdb][ld][AArch64] Fix group_sections algorithm PR ld/25665 * bfd/elfnn-aarch64.c (group_sections): Copy implementation from elf32-arm.c. * testsuite/ld-aarch64/aarch64-elf.exp: Add new test. * testsuite/ld-aarch64/farcall-group.s: New large group test. * testsuite/ld-aarch64/farcall-group.d: Likewise.
2020-05-04 16:51:56 +02:00
#undef PREV_SEC
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
#undef PREV_SEC
[AArch64] Cortex-A53 erratum 835769 linker workaround 2014-10-22 Tejas Belagod <tejas.belagod@arm.com> bfd/ * bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter. * bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise. * elfnn-aarch64.c (aarch64_erratum_835769_stub): New. (elf_aarch64_stub_type): Add new type aarch64_stub_erratum_835769_veneer. (elf_aarch64_stub_hash_entry): New fields for erratum 835769. (aarch64_erratum_835769_fix): New data struct to record erratum 835769. (elf_aarch64_link_hash_table: Global flags for 835769. (aarch64_build_one_stub): Add case for 835769. (aarch64_size_one_stub): Likewise. (aarch64_mem_op_p, aarch64_mlxl_p, aarch64_erratum_sequence,erratum_835769_scan): New. Decode and scan functions for erratum 835769. (elf_aarch64_create_or_find_stub_sec): New. (elfNN_aarch64_size_stubs): Look for erratum 835769 and record them. (bfd_elfNN_aarch64_set_options: Set global flag for 835769. (erratum_835769_branch_to_stub_data, make_branch_to_erratum_835769_stub):New. Connect up all the erratum stubs to occurances by branches. (elfNN_aarch64_write_section): New hook. (aarch64_map_one_stub): Output erratum stub symbol. (elfNN_aarch64_size_dynamic_sections): Init mapping symbol information for erratum 835769. (elf_backend_write_section): Define. ld/ * emultempl/aarch64elf.em: Add command-line option for erratum 835769. ld/testsuite/ * ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum 835769 tests. * ld-aarch64/erratum835769.d: New. * ld-aarch64/erratum835769.s: New.
2014-10-24 12:39:35 +02:00
#define AARCH64_BITS(x, pos, n) (((x) >> (pos)) & ((1 << (n)) - 1))
#define AARCH64_RT(insn) AARCH64_BITS (insn, 0, 5)
#define AARCH64_RT2(insn) AARCH64_BITS (insn, 10, 5)
#define AARCH64_RA(insn) AARCH64_BITS (insn, 10, 5)
#define AARCH64_RD(insn) AARCH64_BITS (insn, 0, 5)
#define AARCH64_RN(insn) AARCH64_BITS (insn, 5, 5)
#define AARCH64_RM(insn) AARCH64_BITS (insn, 16, 5)
#define AARCH64_MAC(insn) (((insn) & 0xff000000) == 0x9b000000)
#define AARCH64_BIT(insn, n) AARCH64_BITS (insn, n, 1)
#define AARCH64_OP31(insn) AARCH64_BITS (insn, 21, 3)
#define AARCH64_ZR 0x1f
/* All ld/st ops. See C4-182 of the ARM ARM. The encoding space for
LD_PCREL, LDST_RO, LDST_UI and LDST_UIMM cover prefetch ops. */
#define AARCH64_LD(insn) (AARCH64_BIT (insn, 22) == 1)
#define AARCH64_LDST(insn) (((insn) & 0x0a000000) == 0x08000000)
#define AARCH64_LDST_EX(insn) (((insn) & 0x3f000000) == 0x08000000)
#define AARCH64_LDST_PCREL(insn) (((insn) & 0x3b000000) == 0x18000000)
#define AARCH64_LDST_NAP(insn) (((insn) & 0x3b800000) == 0x28000000)
#define AARCH64_LDSTP_PI(insn) (((insn) & 0x3b800000) == 0x28800000)
#define AARCH64_LDSTP_O(insn) (((insn) & 0x3b800000) == 0x29000000)
#define AARCH64_LDSTP_PRE(insn) (((insn) & 0x3b800000) == 0x29800000)
#define AARCH64_LDST_UI(insn) (((insn) & 0x3b200c00) == 0x38000000)
#define AARCH64_LDST_PIIMM(insn) (((insn) & 0x3b200c00) == 0x38000400)
#define AARCH64_LDST_U(insn) (((insn) & 0x3b200c00) == 0x38000800)
#define AARCH64_LDST_PREIMM(insn) (((insn) & 0x3b200c00) == 0x38000c00)
#define AARCH64_LDST_RO(insn) (((insn) & 0x3b200c00) == 0x38200800)
#define AARCH64_LDST_UIMM(insn) (((insn) & 0x3b000000) == 0x39000000)
#define AARCH64_LDST_SIMD_M(insn) (((insn) & 0xbfbf0000) == 0x0c000000)
#define AARCH64_LDST_SIMD_M_PI(insn) (((insn) & 0xbfa00000) == 0x0c800000)
#define AARCH64_LDST_SIMD_S(insn) (((insn) & 0xbf9f0000) == 0x0d000000)
#define AARCH64_LDST_SIMD_S_PI(insn) (((insn) & 0xbf800000) == 0x0d800000)
[AArch64] Tidy up in aarch64_mem_op_p().
2015-03-12 13:11:07 +01:00
/* Classify an INSN if it is indeed a load/store.
Return TRUE if INSN is a LD/ST instruction otherwise return FALSE.
For scalar LD/ST instructions PAIR is FALSE, RT is returned and RT2
is set equal to RT.
Fix AArch64 relocation handling in ILP32 mode. bfd * elfnn-aarch64.c: Fix relaxations for ILP32 mode. ld * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests. * testsuite/ld-aarch64/tls-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-all-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gd-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-3-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-le-ilp32.d: New test.
2017-01-23 18:07:13 +01:00
For LD/ST pair instructions PAIR is TRUE, RT and RT2 are returned. */
[AArch64] Cortex-A53 erratum 835769 linker workaround 2014-10-22 Tejas Belagod <tejas.belagod@arm.com> bfd/ * bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter. * bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise. * elfnn-aarch64.c (aarch64_erratum_835769_stub): New. (elf_aarch64_stub_type): Add new type aarch64_stub_erratum_835769_veneer. (elf_aarch64_stub_hash_entry): New fields for erratum 835769. (aarch64_erratum_835769_fix): New data struct to record erratum 835769. (elf_aarch64_link_hash_table: Global flags for 835769. (aarch64_build_one_stub): Add case for 835769. (aarch64_size_one_stub): Likewise. (aarch64_mem_op_p, aarch64_mlxl_p, aarch64_erratum_sequence,erratum_835769_scan): New. Decode and scan functions for erratum 835769. (elf_aarch64_create_or_find_stub_sec): New. (elfNN_aarch64_size_stubs): Look for erratum 835769 and record them. (bfd_elfNN_aarch64_set_options: Set global flag for 835769. (erratum_835769_branch_to_stub_data, make_branch_to_erratum_835769_stub):New. Connect up all the erratum stubs to occurances by branches. (elfNN_aarch64_write_section): New hook. (aarch64_map_one_stub): Output erratum stub symbol. (elfNN_aarch64_size_dynamic_sections): Init mapping symbol information for erratum 835769. (elf_backend_write_section): Define. ld/ * emultempl/aarch64elf.em: Add command-line option for erratum 835769. ld/testsuite/ * ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum 835769 tests. * ld-aarch64/erratum835769.d: New. * ld-aarch64/erratum835769.s: New.
2014-10-24 12:39:35 +02:00
static bfd_boolean
[AArch64] Tidy up in aarch64_mem_op_p().
2015-03-12 13:11:07 +01:00
aarch64_mem_op_p (uint32_t insn, unsigned int *rt, unsigned int *rt2,
[AArch64] Cortex-A53 erratum 835769 linker workaround 2014-10-22 Tejas Belagod <tejas.belagod@arm.com> bfd/ * bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter. * bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise. * elfnn-aarch64.c (aarch64_erratum_835769_stub): New. (elf_aarch64_stub_type): Add new type aarch64_stub_erratum_835769_veneer. (elf_aarch64_stub_hash_entry): New fields for erratum 835769. (aarch64_erratum_835769_fix): New data struct to record erratum 835769. (elf_aarch64_link_hash_table: Global flags for 835769. (aarch64_build_one_stub): Add case for 835769. (aarch64_size_one_stub): Likewise. (aarch64_mem_op_p, aarch64_mlxl_p, aarch64_erratum_sequence,erratum_835769_scan): New. Decode and scan functions for erratum 835769. (elf_aarch64_create_or_find_stub_sec): New. (elfNN_aarch64_size_stubs): Look for erratum 835769 and record them. (bfd_elfNN_aarch64_set_options: Set global flag for 835769. (erratum_835769_branch_to_stub_data, make_branch_to_erratum_835769_stub):New. Connect up all the erratum stubs to occurances by branches. (elfNN_aarch64_write_section): New hook. (aarch64_map_one_stub): Output erratum stub symbol. (elfNN_aarch64_size_dynamic_sections): Init mapping symbol information for erratum 835769. (elf_backend_write_section): Define. ld/ * emultempl/aarch64elf.em: Add command-line option for erratum 835769. ld/testsuite/ * ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum 835769 tests. * ld-aarch64/erratum835769.d: New. * ld-aarch64/erratum835769.s: New.
2014-10-24 12:39:35 +02:00
bfd_boolean *pair, bfd_boolean *load)
{
uint32_t opcode;
unsigned int r;
uint32_t opc = 0;
uint32_t v = 0;
uint32_t opc_v = 0;
Fix spelling typos.
2017-07-18 17:58:14 +02:00
/* Bail out quickly if INSN doesn't fall into the load-store
[AArch64] Cortex-A53 erratum 835769 linker workaround 2014-10-22 Tejas Belagod <tejas.belagod@arm.com> bfd/ * bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter. * bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise. * elfnn-aarch64.c (aarch64_erratum_835769_stub): New. (elf_aarch64_stub_type): Add new type aarch64_stub_erratum_835769_veneer. (elf_aarch64_stub_hash_entry): New fields for erratum 835769. (aarch64_erratum_835769_fix): New data struct to record erratum 835769. (elf_aarch64_link_hash_table: Global flags for 835769. (aarch64_build_one_stub): Add case for 835769. (aarch64_size_one_stub): Likewise. (aarch64_mem_op_p, aarch64_mlxl_p, aarch64_erratum_sequence,erratum_835769_scan): New. Decode and scan functions for erratum 835769. (elf_aarch64_create_or_find_stub_sec): New. (elfNN_aarch64_size_stubs): Look for erratum 835769 and record them. (bfd_elfNN_aarch64_set_options: Set global flag for 835769. (erratum_835769_branch_to_stub_data, make_branch_to_erratum_835769_stub):New. Connect up all the erratum stubs to occurances by branches. (elfNN_aarch64_write_section): New hook. (aarch64_map_one_stub): Output erratum stub symbol. (elfNN_aarch64_size_dynamic_sections): Init mapping symbol information for erratum 835769. (elf_backend_write_section): Define. ld/ * emultempl/aarch64elf.em: Add command-line option for erratum 835769. ld/testsuite/ * ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum 835769 tests. * ld-aarch64/erratum835769.d: New. * ld-aarch64/erratum835769.s: New.
2014-10-24 12:39:35 +02:00
encoding space. */
if (!AARCH64_LDST (insn))
return FALSE;
*pair = FALSE;
*load = FALSE;
if (AARCH64_LDST_EX (insn))
{
*rt = AARCH64_RT (insn);
[AArch64] Tidy up in aarch64_mem_op_p().
2015-03-12 13:11:07 +01:00
*rt2 = *rt;
[AArch64] Cortex-A53 erratum 835769 linker workaround 2014-10-22 Tejas Belagod <tejas.belagod@arm.com> bfd/ * bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter. * bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise. * elfnn-aarch64.c (aarch64_erratum_835769_stub): New. (elf_aarch64_stub_type): Add new type aarch64_stub_erratum_835769_veneer. (elf_aarch64_stub_hash_entry): New fields for erratum 835769. (aarch64_erratum_835769_fix): New data struct to record erratum 835769. (elf_aarch64_link_hash_table: Global flags for 835769. (aarch64_build_one_stub): Add case for 835769. (aarch64_size_one_stub): Likewise. (aarch64_mem_op_p, aarch64_mlxl_p, aarch64_erratum_sequence,erratum_835769_scan): New. Decode and scan functions for erratum 835769. (elf_aarch64_create_or_find_stub_sec): New. (elfNN_aarch64_size_stubs): Look for erratum 835769 and record them. (bfd_elfNN_aarch64_set_options: Set global flag for 835769. (erratum_835769_branch_to_stub_data, make_branch_to_erratum_835769_stub):New. Connect up all the erratum stubs to occurances by branches. (elfNN_aarch64_write_section): New hook. (aarch64_map_one_stub): Output erratum stub symbol. (elfNN_aarch64_size_dynamic_sections): Init mapping symbol information for erratum 835769. (elf_backend_write_section): Define. ld/ * emultempl/aarch64elf.em: Add command-line option for erratum 835769. ld/testsuite/ * ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum 835769 tests. * ld-aarch64/erratum835769.d: New. * ld-aarch64/erratum835769.s: New.
2014-10-24 12:39:35 +02:00
if (AARCH64_BIT (insn, 21) == 1)
BFD whitespace fixes Binutils is supposed to use tabs. In my git config I have whitespace = indent-with-non-tab,space-before-tab,trailing-space and I got annoyed enough seeing red in "git diff" output to fix the problems. * doc/header.sed: Trim trailing space when splitting lines. * aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-cris.c, * aout-ns32k.c, * aout-target.h, * aout-tic30.c, * aoutf1.h, * aoutx.h, * arc-got.h, * arc-plt.def, * arc-plt.h, * archive.c, * archive64.c, * archures.c, * armnetbsd.c, * bfd-in.h, * bfd.c, * bfdio.c, * binary.c, * bout.c, * cache.c, * cisco-core.c, * coff-alpha.c, * coff-apollo.c, * coff-arm.c, * coff-h8300.c, * coff-i386.c, * coff-i860.c, * coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mcore.c, * coff-mips.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-stgo32.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * compress.c, * corefile.c, * cpu-alpha.c, * cpu-arm.c, * cpu-avr.c, * cpu-bfin.c, * cpu-cr16.c, * cpu-cr16c.c, * cpu-crx.c, * cpu-d10v.c, * cpu-frv.c, * cpu-ft32.c, * cpu-i370.c, * cpu-i960.c, * cpu-ia64-opc.c, * cpu-ip2k.c, * cpu-lm32.c, * cpu-m32r.c, * cpu-mcore.c, * cpu-microblaze.c, * cpu-mips.c, * cpu-moxie.c, * cpu-mt.c, * cpu-nios2.c, * cpu-ns32k.c, * cpu-or1k.c, * cpu-powerpc.c, * cpu-pru.c, * cpu-sh.c, * cpu-spu.c, * cpu-v850.c, * cpu-v850_rh850.c, * cpu-xgate.c, * cpu-z80.c, * dwarf1.c, * dwarf2.c, * ecoff.c, * ecofflink.c, * ecoffswap.h, * elf-bfd.h, * elf-eh-frame.c, * elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf-s390-common.c, * elf-strtab.c, * elf-vxworks.c, * elf.c, * elf32-am33lin.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-avr.h, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-i860.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68hc1x.c, * elf32-m68hc1x.h, * elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nds32.h, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score.h, * elf32-score7.c, * elf32-sh-symbian.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilegx.c, * elf32-tilegx.h, * elf32-tilepro.c, * elf32-tilepro.h, * elf32-v850.c, * elf32-vax.c, * elf32-wasm32.c, * elf32-xc16x.c, * elf32-xgate.c, * elf32-xgate.h, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-tilegx.c, * elf64-tilegx.h, * elf64-x86-64.c, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-aarch64.h, * elfxx-ia64.c, * elfxx-ia64.h, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * elfxx-x86.h, * freebsd.h, * hash.c, * host-aout.c, * hp300hpux.c, * hppabsd-core.c, * hpux-core.c, * i386aout.c, * i386linux.c, * i386lynx.c, * i386mach3.c, * i386msdos.c, * i386netbsd.c, * ieee.c, * ihex.c, * irix-core.c, * libaout.h, * libbfd-in.h, * libbfd.c, * libcoff-in.h, * libnlm.h, * libpei.h, * libxcoff.h, * linker.c, * lynx-core.c, * m68k4knetbsd.c, * m68klinux.c, * m68knetbsd.c, * m88kmach3.c, * mach-o-aarch64.c, * mach-o-arm.c, * mach-o-i386.c, * mach-o-target.c, * mach-o-x86-64.c, * mach-o.c, * mach-o.h, * merge.c, * mipsbsd.c, * mmo.c, * netbsd.h, * netbsd-core.c, * newsos3.c, * nlm-target.h, * nlm32-ppc.c, * nlm32-sparc.c, * nlmcode.h, * ns32k.h, * ns32knetbsd.c, * oasys.c, * opncls.c, * pc532-mach.c, * pdp11.c, * pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-mips.c, * pe-x86_64.c, * peXXigen.c, * pef.c, * pef.h, * pei-arm.c, * pei-i386.c, * pei-mcore.c, * pei-x86_64.c, * peicode.h, * plugin.c, * ppcboot.c, * ptrace-core.c, * reloc.c, * riscix.c, * rs6000-core.c, * section.c, * som.c, * som.h, * sparclinux.c, * sparcnetbsd.c, * srec.c, * stabs.c, * sunos.c, * syms.c, * targets.c, * tekhex.c, * trad-core.c, * vax1knetbsd.c, * vaxnetbsd.c, * verilog.c, * versados.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * wasm-module.c, * wasm-module.h, * xcofflink.c, * xsym.c, * xsym.h: Whitespace fixes. * bfd-in2.h, * libbfd.h, * libcoff.h: Regenerate.
2017-12-05 23:56:00 +01:00
{
[AArch64] Cortex-A53 erratum 835769 linker workaround 2014-10-22 Tejas Belagod <tejas.belagod@arm.com> bfd/ * bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter. * bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise. * elfnn-aarch64.c (aarch64_erratum_835769_stub): New. (elf_aarch64_stub_type): Add new type aarch64_stub_erratum_835769_veneer. (elf_aarch64_stub_hash_entry): New fields for erratum 835769. (aarch64_erratum_835769_fix): New data struct to record erratum 835769. (elf_aarch64_link_hash_table: Global flags for 835769. (aarch64_build_one_stub): Add case for 835769. (aarch64_size_one_stub): Likewise. (aarch64_mem_op_p, aarch64_mlxl_p, aarch64_erratum_sequence,erratum_835769_scan): New. Decode and scan functions for erratum 835769. (elf_aarch64_create_or_find_stub_sec): New. (elfNN_aarch64_size_stubs): Look for erratum 835769 and record them. (bfd_elfNN_aarch64_set_options: Set global flag for 835769. (erratum_835769_branch_to_stub_data, make_branch_to_erratum_835769_stub):New. Connect up all the erratum stubs to occurances by branches. (elfNN_aarch64_write_section): New hook. (aarch64_map_one_stub): Output erratum stub symbol. (elfNN_aarch64_size_dynamic_sections): Init mapping symbol information for erratum 835769. (elf_backend_write_section): Define. ld/ * emultempl/aarch64elf.em: Add command-line option for erratum 835769. ld/testsuite/ * ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum 835769 tests. * ld-aarch64/erratum835769.d: New. * ld-aarch64/erratum835769.s: New.
2014-10-24 12:39:35 +02:00
*pair = TRUE;
[AArch64] Tidy up in aarch64_mem_op_p().
2015-03-12 13:11:07 +01:00
*rt2 = AARCH64_RT2 (insn);
[AArch64] Cortex-A53 erratum 835769 linker workaround 2014-10-22 Tejas Belagod <tejas.belagod@arm.com> bfd/ * bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter. * bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise. * elfnn-aarch64.c (aarch64_erratum_835769_stub): New. (elf_aarch64_stub_type): Add new type aarch64_stub_erratum_835769_veneer. (elf_aarch64_stub_hash_entry): New fields for erratum 835769. (aarch64_erratum_835769_fix): New data struct to record erratum 835769. (elf_aarch64_link_hash_table: Global flags for 835769. (aarch64_build_one_stub): Add case for 835769. (aarch64_size_one_stub): Likewise. (aarch64_mem_op_p, aarch64_mlxl_p, aarch64_erratum_sequence,erratum_835769_scan): New. Decode and scan functions for erratum 835769. (elf_aarch64_create_or_find_stub_sec): New. (elfNN_aarch64_size_stubs): Look for erratum 835769 and record them. (bfd_elfNN_aarch64_set_options: Set global flag for 835769. (erratum_835769_branch_to_stub_data, make_branch_to_erratum_835769_stub):New. Connect up all the erratum stubs to occurances by branches. (elfNN_aarch64_write_section): New hook. (aarch64_map_one_stub): Output erratum stub symbol. (elfNN_aarch64_size_dynamic_sections): Init mapping symbol information for erratum 835769. (elf_backend_write_section): Define. ld/ * emultempl/aarch64elf.em: Add command-line option for erratum 835769. ld/testsuite/ * ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum 835769 tests. * ld-aarch64/erratum835769.d: New. * ld-aarch64/erratum835769.s: New.
2014-10-24 12:39:35 +02:00
}
*load = AARCH64_LD (insn);
return TRUE;
}
else if (AARCH64_LDST_NAP (insn)
|| AARCH64_LDSTP_PI (insn)
|| AARCH64_LDSTP_O (insn)
|| AARCH64_LDSTP_PRE (insn))
{
*pair = TRUE;
*rt = AARCH64_RT (insn);
[AArch64] Tidy up in aarch64_mem_op_p().
2015-03-12 13:11:07 +01:00
*rt2 = AARCH64_RT2 (insn);
[AArch64] Cortex-A53 erratum 835769 linker workaround 2014-10-22 Tejas Belagod <tejas.belagod@arm.com> bfd/ * bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter. * bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise. * elfnn-aarch64.c (aarch64_erratum_835769_stub): New. (elf_aarch64_stub_type): Add new type aarch64_stub_erratum_835769_veneer. (elf_aarch64_stub_hash_entry): New fields for erratum 835769. (aarch64_erratum_835769_fix): New data struct to record erratum 835769. (elf_aarch64_link_hash_table: Global flags for 835769. (aarch64_build_one_stub): Add case for 835769. (aarch64_size_one_stub): Likewise. (aarch64_mem_op_p, aarch64_mlxl_p, aarch64_erratum_sequence,erratum_835769_scan): New. Decode and scan functions for erratum 835769. (elf_aarch64_create_or_find_stub_sec): New. (elfNN_aarch64_size_stubs): Look for erratum 835769 and record them. (bfd_elfNN_aarch64_set_options: Set global flag for 835769. (erratum_835769_branch_to_stub_data, make_branch_to_erratum_835769_stub):New. Connect up all the erratum stubs to occurances by branches. (elfNN_aarch64_write_section): New hook. (aarch64_map_one_stub): Output erratum stub symbol. (elfNN_aarch64_size_dynamic_sections): Init mapping symbol information for erratum 835769. (elf_backend_write_section): Define. ld/ * emultempl/aarch64elf.em: Add command-line option for erratum 835769. ld/testsuite/ * ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum 835769 tests. * ld-aarch64/erratum835769.d: New. * ld-aarch64/erratum835769.s: New.
2014-10-24 12:39:35 +02:00
*load = AARCH64_LD (insn);
return TRUE;
}
else if (AARCH64_LDST_PCREL (insn)
|| AARCH64_LDST_UI (insn)
|| AARCH64_LDST_PIIMM (insn)
|| AARCH64_LDST_U (insn)
|| AARCH64_LDST_PREIMM (insn)
|| AARCH64_LDST_RO (insn)
|| AARCH64_LDST_UIMM (insn))
{
*rt = AARCH64_RT (insn);
[AArch64] Tidy up in aarch64_mem_op_p().
2015-03-12 13:11:07 +01:00
*rt2 = *rt;
[AArch64] Cortex-A53 erratum 835769 linker workaround 2014-10-22 Tejas Belagod <tejas.belagod@arm.com> bfd/ * bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter. * bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise. * elfnn-aarch64.c (aarch64_erratum_835769_stub): New. (elf_aarch64_stub_type): Add new type aarch64_stub_erratum_835769_veneer. (elf_aarch64_stub_hash_entry): New fields for erratum 835769. (aarch64_erratum_835769_fix): New data struct to record erratum 835769. (elf_aarch64_link_hash_table: Global flags for 835769. (aarch64_build_one_stub): Add case for 835769. (aarch64_size_one_stub): Likewise. (aarch64_mem_op_p, aarch64_mlxl_p, aarch64_erratum_sequence,erratum_835769_scan): New. Decode and scan functions for erratum 835769. (elf_aarch64_create_or_find_stub_sec): New. (elfNN_aarch64_size_stubs): Look for erratum 835769 and record them. (bfd_elfNN_aarch64_set_options: Set global flag for 835769. (erratum_835769_branch_to_stub_data, make_branch_to_erratum_835769_stub):New. Connect up all the erratum stubs to occurances by branches. (elfNN_aarch64_write_section): New hook. (aarch64_map_one_stub): Output erratum stub symbol. (elfNN_aarch64_size_dynamic_sections): Init mapping symbol information for erratum 835769. (elf_backend_write_section): Define. ld/ * emultempl/aarch64elf.em: Add command-line option for erratum 835769. ld/testsuite/ * ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum 835769 tests. * ld-aarch64/erratum835769.d: New. * ld-aarch64/erratum835769.s: New.
2014-10-24 12:39:35 +02:00
if (AARCH64_LDST_PCREL (insn))
*load = TRUE;
opc = AARCH64_BITS (insn, 22, 2);
v = AARCH64_BIT (insn, 26);
opc_v = opc | (v << 2);
*load = (opc_v == 1 || opc_v == 2 || opc_v == 3
|| opc_v == 5 || opc_v == 7);
return TRUE;
}
else if (AARCH64_LDST_SIMD_M (insn)
|| AARCH64_LDST_SIMD_M_PI (insn))
{
*rt = AARCH64_RT (insn);
*load = AARCH64_BIT (insn, 22);
opcode = (insn >> 12) & 0xf;
switch (opcode)
{
case 0:
case 2:
[AArch64] Tidy up in aarch64_mem_op_p().
2015-03-12 13:11:07 +01:00
*rt2 = *rt + 3;
[AArch64] Cortex-A53 erratum 835769 linker workaround 2014-10-22 Tejas Belagod <tejas.belagod@arm.com> bfd/ * bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter. * bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise. * elfnn-aarch64.c (aarch64_erratum_835769_stub): New. (elf_aarch64_stub_type): Add new type aarch64_stub_erratum_835769_veneer. (elf_aarch64_stub_hash_entry): New fields for erratum 835769. (aarch64_erratum_835769_fix): New data struct to record erratum 835769. (elf_aarch64_link_hash_table: Global flags for 835769. (aarch64_build_one_stub): Add case for 835769. (aarch64_size_one_stub): Likewise. (aarch64_mem_op_p, aarch64_mlxl_p, aarch64_erratum_sequence,erratum_835769_scan): New. Decode and scan functions for erratum 835769. (elf_aarch64_create_or_find_stub_sec): New. (elfNN_aarch64_size_stubs): Look for erratum 835769 and record them. (bfd_elfNN_aarch64_set_options: Set global flag for 835769. (erratum_835769_branch_to_stub_data, make_branch_to_erratum_835769_stub):New. Connect up all the erratum stubs to occurances by branches. (elfNN_aarch64_write_section): New hook. (aarch64_map_one_stub): Output erratum stub symbol. (elfNN_aarch64_size_dynamic_sections): Init mapping symbol information for erratum 835769. (elf_backend_write_section): Define. ld/ * emultempl/aarch64elf.em: Add command-line option for erratum 835769. ld/testsuite/ * ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum 835769 tests. * ld-aarch64/erratum835769.d: New. * ld-aarch64/erratum835769.s: New.
2014-10-24 12:39:35 +02:00
break;
case 4:
case 6:
[AArch64] Tidy up in aarch64_mem_op_p().
2015-03-12 13:11:07 +01:00
*rt2 = *rt + 2;
[AArch64] Cortex-A53 erratum 835769 linker workaround 2014-10-22 Tejas Belagod <tejas.belagod@arm.com> bfd/ * bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter. * bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise. * elfnn-aarch64.c (aarch64_erratum_835769_stub): New. (elf_aarch64_stub_type): Add new type aarch64_stub_erratum_835769_veneer. (elf_aarch64_stub_hash_entry): New fields for erratum 835769. (aarch64_erratum_835769_fix): New data struct to record erratum 835769. (elf_aarch64_link_hash_table: Global flags for 835769. (aarch64_build_one_stub): Add case for 835769. (aarch64_size_one_stub): Likewise. (aarch64_mem_op_p, aarch64_mlxl_p, aarch64_erratum_sequence,erratum_835769_scan): New. Decode and scan functions for erratum 835769. (elf_aarch64_create_or_find_stub_sec): New. (elfNN_aarch64_size_stubs): Look for erratum 835769 and record them. (bfd_elfNN_aarch64_set_options: Set global flag for 835769. (erratum_835769_branch_to_stub_data, make_branch_to_erratum_835769_stub):New. Connect up all the erratum stubs to occurances by branches. (elfNN_aarch64_write_section): New hook. (aarch64_map_one_stub): Output erratum stub symbol. (elfNN_aarch64_size_dynamic_sections): Init mapping symbol information for erratum 835769. (elf_backend_write_section): Define. ld/ * emultempl/aarch64elf.em: Add command-line option for erratum 835769. ld/testsuite/ * ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum 835769 tests. * ld-aarch64/erratum835769.d: New. * ld-aarch64/erratum835769.s: New.
2014-10-24 12:39:35 +02:00
break;
case 7:
[AArch64] Tidy up in aarch64_mem_op_p().
2015-03-12 13:11:07 +01:00
*rt2 = *rt;
[AArch64] Cortex-A53 erratum 835769 linker workaround 2014-10-22 Tejas Belagod <tejas.belagod@arm.com> bfd/ * bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter. * bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise. * elfnn-aarch64.c (aarch64_erratum_835769_stub): New. (elf_aarch64_stub_type): Add new type aarch64_stub_erratum_835769_veneer. (elf_aarch64_stub_hash_entry): New fields for erratum 835769. (aarch64_erratum_835769_fix): New data struct to record erratum 835769. (elf_aarch64_link_hash_table: Global flags for 835769. (aarch64_build_one_stub): Add case for 835769. (aarch64_size_one_stub): Likewise. (aarch64_mem_op_p, aarch64_mlxl_p, aarch64_erratum_sequence,erratum_835769_scan): New. Decode and scan functions for erratum 835769. (elf_aarch64_create_or_find_stub_sec): New. (elfNN_aarch64_size_stubs): Look for erratum 835769 and record them. (bfd_elfNN_aarch64_set_options: Set global flag for 835769. (erratum_835769_branch_to_stub_data, make_branch_to_erratum_835769_stub):New. Connect up all the erratum stubs to occurances by branches. (elfNN_aarch64_write_section): New hook. (aarch64_map_one_stub): Output erratum stub symbol. (elfNN_aarch64_size_dynamic_sections): Init mapping symbol information for erratum 835769. (elf_backend_write_section): Define. ld/ * emultempl/aarch64elf.em: Add command-line option for erratum 835769. ld/testsuite/ * ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum 835769 tests. * ld-aarch64/erratum835769.d: New. * ld-aarch64/erratum835769.s: New.
2014-10-24 12:39:35 +02:00
break;
case 8:
case 10:
[AArch64] Tidy up in aarch64_mem_op_p().
2015-03-12 13:11:07 +01:00
*rt2 = *rt + 1;
[AArch64] Cortex-A53 erratum 835769 linker workaround 2014-10-22 Tejas Belagod <tejas.belagod@arm.com> bfd/ * bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter. * bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise. * elfnn-aarch64.c (aarch64_erratum_835769_stub): New. (elf_aarch64_stub_type): Add new type aarch64_stub_erratum_835769_veneer. (elf_aarch64_stub_hash_entry): New fields for erratum 835769. (aarch64_erratum_835769_fix): New data struct to record erratum 835769. (elf_aarch64_link_hash_table: Global flags for 835769. (aarch64_build_one_stub): Add case for 835769. (aarch64_size_one_stub): Likewise. (aarch64_mem_op_p, aarch64_mlxl_p, aarch64_erratum_sequence,erratum_835769_scan): New. Decode and scan functions for erratum 835769. (elf_aarch64_create_or_find_stub_sec): New. (elfNN_aarch64_size_stubs): Look for erratum 835769 and record them. (bfd_elfNN_aarch64_set_options: Set global flag for 835769. (erratum_835769_branch_to_stub_data, make_branch_to_erratum_835769_stub):New. Connect up all the erratum stubs to occurances by branches. (elfNN_aarch64_write_section): New hook. (aarch64_map_one_stub): Output erratum stub symbol. (elfNN_aarch64_size_dynamic_sections): Init mapping symbol information for erratum 835769. (elf_backend_write_section): Define. ld/ * emultempl/aarch64elf.em: Add command-line option for erratum 835769. ld/testsuite/ * ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum 835769 tests. * ld-aarch64/erratum835769.d: New. * ld-aarch64/erratum835769.s: New.
2014-10-24 12:39:35 +02:00
break;
default:
return FALSE;
}
return TRUE;
}
else if (AARCH64_LDST_SIMD_S (insn)
|| AARCH64_LDST_SIMD_S_PI (insn))
{
*rt = AARCH64_RT (insn);
r = (insn >> 21) & 1;
*load = AARCH64_BIT (insn, 22);
opcode = (insn >> 13) & 0x7;
switch (opcode)
{
case 0:
case 2:
case 4:
[AArch64] Tidy up in aarch64_mem_op_p().
2015-03-12 13:11:07 +01:00
*rt2 = *rt + r;
[AArch64] Cortex-A53 erratum 835769 linker workaround 2014-10-22 Tejas Belagod <tejas.belagod@arm.com> bfd/ * bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter. * bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise. * elfnn-aarch64.c (aarch64_erratum_835769_stub): New. (elf_aarch64_stub_type): Add new type aarch64_stub_erratum_835769_veneer. (elf_aarch64_stub_hash_entry): New fields for erratum 835769. (aarch64_erratum_835769_fix): New data struct to record erratum 835769. (elf_aarch64_link_hash_table: Global flags for 835769. (aarch64_build_one_stub): Add case for 835769. (aarch64_size_one_stub): Likewise. (aarch64_mem_op_p, aarch64_mlxl_p, aarch64_erratum_sequence,erratum_835769_scan): New. Decode and scan functions for erratum 835769. (elf_aarch64_create_or_find_stub_sec): New. (elfNN_aarch64_size_stubs): Look for erratum 835769 and record them. (bfd_elfNN_aarch64_set_options: Set global flag for 835769. (erratum_835769_branch_to_stub_data, make_branch_to_erratum_835769_stub):New. Connect up all the erratum stubs to occurances by branches. (elfNN_aarch64_write_section): New hook. (aarch64_map_one_stub): Output erratum stub symbol. (elfNN_aarch64_size_dynamic_sections): Init mapping symbol information for erratum 835769. (elf_backend_write_section): Define. ld/ * emultempl/aarch64elf.em: Add command-line option for erratum 835769. ld/testsuite/ * ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum 835769 tests. * ld-aarch64/erratum835769.d: New. * ld-aarch64/erratum835769.s: New.
2014-10-24 12:39:35 +02:00
break;
case 1:
case 3:
case 5:
[AArch64] Tidy up in aarch64_mem_op_p().
2015-03-12 13:11:07 +01:00
*rt2 = *rt + (r == 0 ? 2 : 3);
[AArch64] Cortex-A53 erratum 835769 linker workaround 2014-10-22 Tejas Belagod <tejas.belagod@arm.com> bfd/ * bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter. * bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise. * elfnn-aarch64.c (aarch64_erratum_835769_stub): New. (elf_aarch64_stub_type): Add new type aarch64_stub_erratum_835769_veneer. (elf_aarch64_stub_hash_entry): New fields for erratum 835769. (aarch64_erratum_835769_fix): New data struct to record erratum 835769. (elf_aarch64_link_hash_table: Global flags for 835769. (aarch64_build_one_stub): Add case for 835769. (aarch64_size_one_stub): Likewise. (aarch64_mem_op_p, aarch64_mlxl_p, aarch64_erratum_sequence,erratum_835769_scan): New. Decode and scan functions for erratum 835769. (elf_aarch64_create_or_find_stub_sec): New. (elfNN_aarch64_size_stubs): Look for erratum 835769 and record them. (bfd_elfNN_aarch64_set_options: Set global flag for 835769. (erratum_835769_branch_to_stub_data, make_branch_to_erratum_835769_stub):New. Connect up all the erratum stubs to occurances by branches. (elfNN_aarch64_write_section): New hook. (aarch64_map_one_stub): Output erratum stub symbol. (elfNN_aarch64_size_dynamic_sections): Init mapping symbol information for erratum 835769. (elf_backend_write_section): Define. ld/ * emultempl/aarch64elf.em: Add command-line option for erratum 835769. ld/testsuite/ * ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum 835769 tests. * ld-aarch64/erratum835769.d: New. * ld-aarch64/erratum835769.s: New.
2014-10-24 12:39:35 +02:00
break;
case 6:
[AArch64] Tidy up in aarch64_mem_op_p().
2015-03-12 13:11:07 +01:00
*rt2 = *rt + r;
[AArch64] Cortex-A53 erratum 835769 linker workaround 2014-10-22 Tejas Belagod <tejas.belagod@arm.com> bfd/ * bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter. * bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise. * elfnn-aarch64.c (aarch64_erratum_835769_stub): New. (elf_aarch64_stub_type): Add new type aarch64_stub_erratum_835769_veneer. (elf_aarch64_stub_hash_entry): New fields for erratum 835769. (aarch64_erratum_835769_fix): New data struct to record erratum 835769. (elf_aarch64_link_hash_table: Global flags for 835769. (aarch64_build_one_stub): Add case for 835769. (aarch64_size_one_stub): Likewise. (aarch64_mem_op_p, aarch64_mlxl_p, aarch64_erratum_sequence,erratum_835769_scan): New. Decode and scan functions for erratum 835769. (elf_aarch64_create_or_find_stub_sec): New. (elfNN_aarch64_size_stubs): Look for erratum 835769 and record them. (bfd_elfNN_aarch64_set_options: Set global flag for 835769. (erratum_835769_branch_to_stub_data, make_branch_to_erratum_835769_stub):New. Connect up all the erratum stubs to occurances by branches. (elfNN_aarch64_write_section): New hook. (aarch64_map_one_stub): Output erratum stub symbol. (elfNN_aarch64_size_dynamic_sections): Init mapping symbol information for erratum 835769. (elf_backend_write_section): Define. ld/ * emultempl/aarch64elf.em: Add command-line option for erratum 835769. ld/testsuite/ * ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum 835769 tests. * ld-aarch64/erratum835769.d: New. * ld-aarch64/erratum835769.s: New.
2014-10-24 12:39:35 +02:00
break;
case 7:
[AArch64] Tidy up in aarch64_mem_op_p().
2015-03-12 13:11:07 +01:00
*rt2 = *rt + (r == 0 ? 2 : 3);
[AArch64] Cortex-A53 erratum 835769 linker workaround 2014-10-22 Tejas Belagod <tejas.belagod@arm.com> bfd/ * bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter. * bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise. * elfnn-aarch64.c (aarch64_erratum_835769_stub): New. (elf_aarch64_stub_type): Add new type aarch64_stub_erratum_835769_veneer. (elf_aarch64_stub_hash_entry): New fields for erratum 835769. (aarch64_erratum_835769_fix): New data struct to record erratum 835769. (elf_aarch64_link_hash_table: Global flags for 835769. (aarch64_build_one_stub): Add case for 835769. (aarch64_size_one_stub): Likewise. (aarch64_mem_op_p, aarch64_mlxl_p, aarch64_erratum_sequence,erratum_835769_scan): New. Decode and scan functions for erratum 835769. (elf_aarch64_create_or_find_stub_sec): New. (elfNN_aarch64_size_stubs): Look for erratum 835769 and record them. (bfd_elfNN_aarch64_set_options: Set global flag for 835769. (erratum_835769_branch_to_stub_data, make_branch_to_erratum_835769_stub):New. Connect up all the erratum stubs to occurances by branches. (elfNN_aarch64_write_section): New hook. (aarch64_map_one_stub): Output erratum stub symbol. (elfNN_aarch64_size_dynamic_sections): Init mapping symbol information for erratum 835769. (elf_backend_write_section): Define. ld/ * emultempl/aarch64elf.em: Add command-line option for erratum 835769. ld/testsuite/ * ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum 835769 tests. * ld-aarch64/erratum835769.d: New. * ld-aarch64/erratum835769.s: New.
2014-10-24 12:39:35 +02:00
break;
default:
return FALSE;
}
return TRUE;
}
return FALSE;
}
/* Return TRUE if INSN is multiply-accumulate. */
static bfd_boolean
aarch64_mlxl_p (uint32_t insn)
{
uint32_t op31 = AARCH64_OP31 (insn);
if (AARCH64_MAC (insn)
&& (op31 == 0 || op31 == 1 || op31 == 5)
/* Exclude MUL instructions which are encoded as a multiple accumulate
with RA = XZR. */
&& AARCH64_RA (insn) != AARCH64_ZR)
return TRUE;
return FALSE;
}
/* Some early revisions of the Cortex-A53 have an erratum (835769) whereby
it is possible for a 64-bit multiply-accumulate instruction to generate an
incorrect result. The details are quite complex and hard to
determine statically, since branches in the code may exist in some
circumstances, but all cases end with a memory (load, store, or
prefetch) instruction followed immediately by the multiply-accumulate
operation. We employ a linker patching technique, by moving the potentially
affected multiply-accumulate instruction into a patch region and replacing
the original instruction with a branch to the patch. This function checks
if INSN_1 is the memory operation followed by a multiply-accumulate
operation (INSN_2). Return TRUE if an erratum sequence is found, FALSE
if INSN_1 and INSN_2 are safe. */
static bfd_boolean
aarch64_erratum_sequence (uint32_t insn_1, uint32_t insn_2)
{
uint32_t rt;
[AArch64] Tidy up in aarch64_mem_op_p().
2015-03-12 13:11:07 +01:00
uint32_t rt2;
[AArch64] Cortex-A53 erratum 835769 linker workaround 2014-10-22 Tejas Belagod <tejas.belagod@arm.com> bfd/ * bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter. * bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise. * elfnn-aarch64.c (aarch64_erratum_835769_stub): New. (elf_aarch64_stub_type): Add new type aarch64_stub_erratum_835769_veneer. (elf_aarch64_stub_hash_entry): New fields for erratum 835769. (aarch64_erratum_835769_fix): New data struct to record erratum 835769. (elf_aarch64_link_hash_table: Global flags for 835769. (aarch64_build_one_stub): Add case for 835769. (aarch64_size_one_stub): Likewise. (aarch64_mem_op_p, aarch64_mlxl_p, aarch64_erratum_sequence,erratum_835769_scan): New. Decode and scan functions for erratum 835769. (elf_aarch64_create_or_find_stub_sec): New. (elfNN_aarch64_size_stubs): Look for erratum 835769 and record them. (bfd_elfNN_aarch64_set_options: Set global flag for 835769. (erratum_835769_branch_to_stub_data, make_branch_to_erratum_835769_stub):New. Connect up all the erratum stubs to occurances by branches. (elfNN_aarch64_write_section): New hook. (aarch64_map_one_stub): Output erratum stub symbol. (elfNN_aarch64_size_dynamic_sections): Init mapping symbol information for erratum 835769. (elf_backend_write_section): Define. ld/ * emultempl/aarch64elf.em: Add command-line option for erratum 835769. ld/testsuite/ * ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum 835769 tests. * ld-aarch64/erratum835769.d: New. * ld-aarch64/erratum835769.s: New.
2014-10-24 12:39:35 +02:00
uint32_t rn;
uint32_t rm;
uint32_t ra;
bfd_boolean pair;
bfd_boolean load;
if (aarch64_mlxl_p (insn_2)
[AArch64] Tidy up in aarch64_mem_op_p().
2015-03-12 13:11:07 +01:00
&& aarch64_mem_op_p (insn_1, &rt, &rt2, &pair, &load))
[AArch64] Cortex-A53 erratum 835769 linker workaround 2014-10-22 Tejas Belagod <tejas.belagod@arm.com> bfd/ * bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter. * bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise. * elfnn-aarch64.c (aarch64_erratum_835769_stub): New. (elf_aarch64_stub_type): Add new type aarch64_stub_erratum_835769_veneer. (elf_aarch64_stub_hash_entry): New fields for erratum 835769. (aarch64_erratum_835769_fix): New data struct to record erratum 835769. (elf_aarch64_link_hash_table: Global flags for 835769. (aarch64_build_one_stub): Add case for 835769. (aarch64_size_one_stub): Likewise. (aarch64_mem_op_p, aarch64_mlxl_p, aarch64_erratum_sequence,erratum_835769_scan): New. Decode and scan functions for erratum 835769. (elf_aarch64_create_or_find_stub_sec): New. (elfNN_aarch64_size_stubs): Look for erratum 835769 and record them. (bfd_elfNN_aarch64_set_options: Set global flag for 835769. (erratum_835769_branch_to_stub_data, make_branch_to_erratum_835769_stub):New. Connect up all the erratum stubs to occurances by branches. (elfNN_aarch64_write_section): New hook. (aarch64_map_one_stub): Output erratum stub symbol. (elfNN_aarch64_size_dynamic_sections): Init mapping symbol information for erratum 835769. (elf_backend_write_section): Define. ld/ * emultempl/aarch64elf.em: Add command-line option for erratum 835769. ld/testsuite/ * ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum 835769 tests. * ld-aarch64/erratum835769.d: New. * ld-aarch64/erratum835769.s: New.
2014-10-24 12:39:35 +02:00
{
/* Any SIMD memory op is independent of the subsequent MLA
by definition of the erratum. */
if (AARCH64_BIT (insn_1, 26))
return TRUE;
/* If not SIMD, check for integer memory ops and MLA relationship. */
rn = AARCH64_RN (insn_2);
ra = AARCH64_RA (insn_2);
rm = AARCH64_RM (insn_2);
/* If this is a load and there's a true(RAW) dependency, we are safe
and this is not an erratum sequence. */
if (load &&
(rt == rn || rt == rm || rt == ra
[AArch64] Tidy up in aarch64_mem_op_p().
2015-03-12 13:11:07 +01:00
|| (pair && (rt2 == rn || rt2 == rm || rt2 == ra))))
[AArch64] Cortex-A53 erratum 835769 linker workaround 2014-10-22 Tejas Belagod <tejas.belagod@arm.com> bfd/ * bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter. * bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise. * elfnn-aarch64.c (aarch64_erratum_835769_stub): New. (elf_aarch64_stub_type): Add new type aarch64_stub_erratum_835769_veneer. (elf_aarch64_stub_hash_entry): New fields for erratum 835769. (aarch64_erratum_835769_fix): New data struct to record erratum 835769. (elf_aarch64_link_hash_table: Global flags for 835769. (aarch64_build_one_stub): Add case for 835769. (aarch64_size_one_stub): Likewise. (aarch64_mem_op_p, aarch64_mlxl_p, aarch64_erratum_sequence,erratum_835769_scan): New. Decode and scan functions for erratum 835769. (elf_aarch64_create_or_find_stub_sec): New. (elfNN_aarch64_size_stubs): Look for erratum 835769 and record them. (bfd_elfNN_aarch64_set_options: Set global flag for 835769. (erratum_835769_branch_to_stub_data, make_branch_to_erratum_835769_stub):New. Connect up all the erratum stubs to occurances by branches. (elfNN_aarch64_write_section): New hook. (aarch64_map_one_stub): Output erratum stub symbol. (elfNN_aarch64_size_dynamic_sections): Init mapping symbol information for erratum 835769. (elf_backend_write_section): Define. ld/ * emultempl/aarch64elf.em: Add command-line option for erratum 835769. ld/testsuite/ * ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum 835769 tests. * ld-aarch64/erratum835769.d: New. * ld-aarch64/erratum835769.s: New.
2014-10-24 12:39:35 +02:00
return FALSE;
/* We conservatively put out stubs for all other cases (including
writebacks). */
return TRUE;
}
return FALSE;
}
[AArch64] Cortex-A53 Erratum 835769 -- sort maps 2014-11-24 Tejas Belagod <tejas.belagod@arm.com> bfd/ * elfnn-aarch64.c (elf_aarch64_compare_mapping): New. (erratum_835769_scan): Sort map list.
2014-11-24 14:43:39 +01:00
/* Used to order a list of mapping symbols by address. */
static int
elf_aarch64_compare_mapping (const void *a, const void *b)
{
const elf_aarch64_section_map *amap = (const elf_aarch64_section_map *) a;
const elf_aarch64_section_map *bmap = (const elf_aarch64_section_map *) b;
if (amap->vma > bmap->vma)
return 1;
else if (amap->vma < bmap->vma)
return -1;
else if (amap->type > bmap->type)
/* Ensure results do not depend on the host qsort for objects with
multiple mapping symbols at the same address by sorting on type
after vma. */
return 1;
else if (amap->type < bmap->type)
return -1;
else
return 0;
}
[AArch64] Flip sense of erratum_835769_scan.
2015-03-20 19:49:29 +01:00
Factor out _bfd_aarch64_erratum_835769_stub_name
2015-03-20 19:54:59 +01:00
static char *
_bfd_aarch64_erratum_835769_stub_name (unsigned num_fixes)
{
char *stub_name = (char *) bfd_malloc
(strlen ("__erratum_835769_veneer_") + 16);
Fix compile time warning message for the AArch64 BFD backend, about a possible attempt to call sprintf on a NULL buffer pointer. * elfnn-aarch64.c (_bfd_aarch64_erratum_835769_stub_name): Check for malloc returning NULL. (_bfd_aarch64_erratum_843419_fixup): Check for _bfd_aarch64_erratum_835769_stub_name returning NULL.
2018-06-25 13:49:14 +02:00
if (stub_name != NULL)
sprintf (stub_name,"__erratum_835769_veneer_%d", num_fixes);
Factor out _bfd_aarch64_erratum_835769_stub_name
2015-03-20 19:54:59 +01:00
return stub_name;
}
[AArch64] Workaround for Cortex A53 erratum 843419 Some early revisions of the Cortex-A53 have an erratum (843419). The details of the erratum are quite complex and involve dynamic conditions. For the purposes of the workaround we have simplified the static conditions to an ADRP in the last two instructions of a 4KByte page, followed within four instructions by a load/store dependent on the ADRP. This patch adds support to conservatively scan for and workaround Cortex A53 erratum 843419. There are two different workaround strategies used. The first is to rewrite ADRP instructions which form part of an erratum sequence with an ADR instruction. In situations where the ADR provides insufficient offset the dependent load or store instruction from the sequence is moved to a stub section and branches are inserted from the original sequence to the relocated instruction and back again. Stub section sizes are rounded up to a multiple of 4096 in order to ensure that the act of inserting work around stubs does not create more errata sequences. Workaround stubs are always inserted into the stub section associated with the input section containing the erratum sequence. This ensures that the fully relocated form of the veneered load store instruction is available at the point in time when the stub section is written.
2015-02-24 13:04:41 +01:00
/* Scan for Cortex-A53 erratum 835769 sequence.
[AArch64] Flip sense of erratum_835769_scan.
2015-03-20 19:49:29 +01:00
Return TRUE else FALSE on abnormal termination. */
[AArch64] Cortex-A53 erratum 835769 linker workaround 2014-10-22 Tejas Belagod <tejas.belagod@arm.com> bfd/ * bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter. * bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise. * elfnn-aarch64.c (aarch64_erratum_835769_stub): New. (elf_aarch64_stub_type): Add new type aarch64_stub_erratum_835769_veneer. (elf_aarch64_stub_hash_entry): New fields for erratum 835769. (aarch64_erratum_835769_fix): New data struct to record erratum 835769. (elf_aarch64_link_hash_table: Global flags for 835769. (aarch64_build_one_stub): Add case for 835769. (aarch64_size_one_stub): Likewise. (aarch64_mem_op_p, aarch64_mlxl_p, aarch64_erratum_sequence,erratum_835769_scan): New. Decode and scan functions for erratum 835769. (elf_aarch64_create_or_find_stub_sec): New. (elfNN_aarch64_size_stubs): Look for erratum 835769 and record them. (bfd_elfNN_aarch64_set_options: Set global flag for 835769. (erratum_835769_branch_to_stub_data, make_branch_to_erratum_835769_stub):New. Connect up all the erratum stubs to occurances by branches. (elfNN_aarch64_write_section): New hook. (aarch64_map_one_stub): Output erratum stub symbol. (elfNN_aarch64_size_dynamic_sections): Init mapping symbol information for erratum 835769. (elf_backend_write_section): Define. ld/ * emultempl/aarch64elf.em: Add command-line option for erratum 835769. ld/testsuite/ * ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum 835769 tests. * ld-aarch64/erratum835769.d: New. * ld-aarch64/erratum835769.s: New.
2014-10-24 12:39:35 +02:00
static bfd_boolean
[AArch64] Refactor generation of 835769 workaround stubs. This patch recognizes that we only need to perform one scan for the 835769 errata and that this scan can take place before we insert branch stubs. The erratum scan code is relocated and adjusted to create stub entries directly rather than populating an intermediate representation. Since stub entries are created immediately we can drop the adhoc stub size adjustment code and allow the generic stub sizing code to deal with 835769 stub entries. This patch restructures the code but does not change the workaround used to deal with erratum 83679, the exact placement of workaround stubs in the final image may change slightly after this patch due to stubs being created in a different order.
2015-03-20 20:08:00 +01:00
_bfd_aarch64_erratum_835769_scan (bfd *input_bfd,
struct bfd_link_info *info,
unsigned int *num_fixes_p)
[AArch64] Cortex-A53 erratum 835769 linker workaround 2014-10-22 Tejas Belagod <tejas.belagod@arm.com> bfd/ * bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter. * bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise. * elfnn-aarch64.c (aarch64_erratum_835769_stub): New. (elf_aarch64_stub_type): Add new type aarch64_stub_erratum_835769_veneer. (elf_aarch64_stub_hash_entry): New fields for erratum 835769. (aarch64_erratum_835769_fix): New data struct to record erratum 835769. (elf_aarch64_link_hash_table: Global flags for 835769. (aarch64_build_one_stub): Add case for 835769. (aarch64_size_one_stub): Likewise. (aarch64_mem_op_p, aarch64_mlxl_p, aarch64_erratum_sequence,erratum_835769_scan): New. Decode and scan functions for erratum 835769. (elf_aarch64_create_or_find_stub_sec): New. (elfNN_aarch64_size_stubs): Look for erratum 835769 and record them. (bfd_elfNN_aarch64_set_options: Set global flag for 835769. (erratum_835769_branch_to_stub_data, make_branch_to_erratum_835769_stub):New. Connect up all the erratum stubs to occurances by branches. (elfNN_aarch64_write_section): New hook. (aarch64_map_one_stub): Output erratum stub symbol. (elfNN_aarch64_size_dynamic_sections): Init mapping symbol information for erratum 835769. (elf_backend_write_section): Define. ld/ * emultempl/aarch64elf.em: Add command-line option for erratum 835769. ld/testsuite/ * ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum 835769 tests. * ld-aarch64/erratum835769.d: New. * ld-aarch64/erratum835769.s: New.
2014-10-24 12:39:35 +02:00
{
asection *section;
struct elf_aarch64_link_hash_table *htab = elf_aarch64_hash_table (info);
unsigned int num_fixes = *num_fixes_p;
if (htab == NULL)
[AArch64] Flip sense of erratum_835769_scan.
2015-03-20 19:49:29 +01:00
return TRUE;
[AArch64] Cortex-A53 erratum 835769 linker workaround 2014-10-22 Tejas Belagod <tejas.belagod@arm.com> bfd/ * bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter. * bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise. * elfnn-aarch64.c (aarch64_erratum_835769_stub): New. (elf_aarch64_stub_type): Add new type aarch64_stub_erratum_835769_veneer. (elf_aarch64_stub_hash_entry): New fields for erratum 835769. (aarch64_erratum_835769_fix): New data struct to record erratum 835769. (elf_aarch64_link_hash_table: Global flags for 835769. (aarch64_build_one_stub): Add case for 835769. (aarch64_size_one_stub): Likewise. (aarch64_mem_op_p, aarch64_mlxl_p, aarch64_erratum_sequence,erratum_835769_scan): New. Decode and scan functions for erratum 835769. (elf_aarch64_create_or_find_stub_sec): New. (elfNN_aarch64_size_stubs): Look for erratum 835769 and record them. (bfd_elfNN_aarch64_set_options: Set global flag for 835769. (erratum_835769_branch_to_stub_data, make_branch_to_erratum_835769_stub):New. Connect up all the erratum stubs to occurances by branches. (elfNN_aarch64_write_section): New hook. (aarch64_map_one_stub): Output erratum stub symbol. (elfNN_aarch64_size_dynamic_sections): Init mapping symbol information for erratum 835769. (elf_backend_write_section): Define. ld/ * emultempl/aarch64elf.em: Add command-line option for erratum 835769. ld/testsuite/ * ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum 835769 tests. * ld-aarch64/erratum835769.d: New. * ld-aarch64/erratum835769.s: New.
2014-10-24 12:39:35 +02:00
for (section = input_bfd->sections;
section != NULL;
section = section->next)
{
bfd_byte *contents = NULL;
struct _aarch64_elf_section_data *sec_data;
unsigned int span;
if (elf_section_type (section) != SHT_PROGBITS
|| (elf_section_flags (section) & SHF_EXECINSTR) == 0
|| (section->flags & SEC_EXCLUDE) != 0
|| (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
|| (section->output_section == bfd_abs_section_ptr))
continue;
if (elf_section_data (section)->this_hdr.contents != NULL)
contents = elf_section_data (section)->this_hdr.contents;
else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
[AArch64] Flip sense of erratum_835769_scan.
2015-03-20 19:49:29 +01:00
return FALSE;
[AArch64] Cortex-A53 erratum 835769 linker workaround 2014-10-22 Tejas Belagod <tejas.belagod@arm.com> bfd/ * bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter. * bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise. * elfnn-aarch64.c (aarch64_erratum_835769_stub): New. (elf_aarch64_stub_type): Add new type aarch64_stub_erratum_835769_veneer. (elf_aarch64_stub_hash_entry): New fields for erratum 835769. (aarch64_erratum_835769_fix): New data struct to record erratum 835769. (elf_aarch64_link_hash_table: Global flags for 835769. (aarch64_build_one_stub): Add case for 835769. (aarch64_size_one_stub): Likewise. (aarch64_mem_op_p, aarch64_mlxl_p, aarch64_erratum_sequence,erratum_835769_scan): New. Decode and scan functions for erratum 835769. (elf_aarch64_create_or_find_stub_sec): New. (elfNN_aarch64_size_stubs): Look for erratum 835769 and record them. (bfd_elfNN_aarch64_set_options: Set global flag for 835769. (erratum_835769_branch_to_stub_data, make_branch_to_erratum_835769_stub):New. Connect up all the erratum stubs to occurances by branches. (elfNN_aarch64_write_section): New hook. (aarch64_map_one_stub): Output erratum stub symbol. (elfNN_aarch64_size_dynamic_sections): Init mapping symbol information for erratum 835769. (elf_backend_write_section): Define. ld/ * emultempl/aarch64elf.em: Add command-line option for erratum 835769. ld/testsuite/ * ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum 835769 tests. * ld-aarch64/erratum835769.d: New. * ld-aarch64/erratum835769.s: New.
2014-10-24 12:39:35 +02:00
sec_data = elf_aarch64_section_data (section);
[AArch64] Cortex-A53 Erratum 835769 -- sort maps 2014-11-24 Tejas Belagod <tejas.belagod@arm.com> bfd/ * elfnn-aarch64.c (elf_aarch64_compare_mapping): New. (erratum_835769_scan): Sort map list.
2014-11-24 14:43:39 +01:00
qsort (sec_data->map, sec_data->mapcount,
sizeof (elf_aarch64_section_map), elf_aarch64_compare_mapping);
[AArch64] Cortex-A53 erratum 835769 linker workaround 2014-10-22 Tejas Belagod <tejas.belagod@arm.com> bfd/ * bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter. * bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise. * elfnn-aarch64.c (aarch64_erratum_835769_stub): New. (elf_aarch64_stub_type): Add new type aarch64_stub_erratum_835769_veneer. (elf_aarch64_stub_hash_entry): New fields for erratum 835769. (aarch64_erratum_835769_fix): New data struct to record erratum 835769. (elf_aarch64_link_hash_table: Global flags for 835769. (aarch64_build_one_stub): Add case for 835769. (aarch64_size_one_stub): Likewise. (aarch64_mem_op_p, aarch64_mlxl_p, aarch64_erratum_sequence,erratum_835769_scan): New. Decode and scan functions for erratum 835769. (elf_aarch64_create_or_find_stub_sec): New. (elfNN_aarch64_size_stubs): Look for erratum 835769 and record them. (bfd_elfNN_aarch64_set_options: Set global flag for 835769. (erratum_835769_branch_to_stub_data, make_branch_to_erratum_835769_stub):New. Connect up all the erratum stubs to occurances by branches. (elfNN_aarch64_write_section): New hook. (aarch64_map_one_stub): Output erratum stub symbol. (elfNN_aarch64_size_dynamic_sections): Init mapping symbol information for erratum 835769. (elf_backend_write_section): Define. ld/ * emultempl/aarch64elf.em: Add command-line option for erratum 835769. ld/testsuite/ * ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum 835769 tests. * ld-aarch64/erratum835769.d: New. * ld-aarch64/erratum835769.s: New.
2014-10-24 12:39:35 +02:00
for (span = 0; span < sec_data->mapcount; span++)
{
unsigned int span_start = sec_data->map[span].vma;
unsigned int span_end = ((span == sec_data->mapcount - 1)
? sec_data->map[0].vma + section->size
: sec_data->map[span + 1].vma);
unsigned int i;
char span_type = sec_data->map[span].type;
if (span_type == 'd')
continue;
for (i = span_start; i + 4 < span_end; i += 4)
{
uint32_t insn_1 = bfd_getl32 (contents + i);
uint32_t insn_2 = bfd_getl32 (contents + i + 4);
if (aarch64_erratum_sequence (insn_1, insn_2))
{
[AArch64] Refactor generation of 835769 workaround stubs. This patch recognizes that we only need to perform one scan for the 835769 errata and that this scan can take place before we insert branch stubs. The erratum scan code is relocated and adjusted to create stub entries directly rather than populating an intermediate representation. Since stub entries are created immediately we can drop the adhoc stub size adjustment code and allow the generic stub sizing code to deal with 835769 stub entries. This patch restructures the code but does not change the workaround used to deal with erratum 83679, the exact placement of workaround stubs in the final image may change slightly after this patch due to stubs being created in a different order.
2015-03-20 20:08:00 +01:00
struct elf_aarch64_stub_hash_entry *stub_entry;
Factor out _bfd_aarch64_erratum_835769_stub_name
2015-03-20 19:54:59 +01:00
char *stub_name = _bfd_aarch64_erratum_835769_stub_name (num_fixes);
if (! stub_name)
[AArch64] Flip sense of erratum_835769_scan.
2015-03-20 19:49:29 +01:00
return FALSE;
[AArch64] Cortex-A53 erratum 835769 linker workaround 2014-10-22 Tejas Belagod <tejas.belagod@arm.com> bfd/ * bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter. * bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise. * elfnn-aarch64.c (aarch64_erratum_835769_stub): New. (elf_aarch64_stub_type): Add new type aarch64_stub_erratum_835769_veneer. (elf_aarch64_stub_hash_entry): New fields for erratum 835769. (aarch64_erratum_835769_fix): New data struct to record erratum 835769. (elf_aarch64_link_hash_table: Global flags for 835769. (aarch64_build_one_stub): Add case for 835769. (aarch64_size_one_stub): Likewise. (aarch64_mem_op_p, aarch64_mlxl_p, aarch64_erratum_sequence,erratum_835769_scan): New. Decode and scan functions for erratum 835769. (elf_aarch64_create_or_find_stub_sec): New. (elfNN_aarch64_size_stubs): Look for erratum 835769 and record them. (bfd_elfNN_aarch64_set_options: Set global flag for 835769. (erratum_835769_branch_to_stub_data, make_branch_to_erratum_835769_stub):New. Connect up all the erratum stubs to occurances by branches. (elfNN_aarch64_write_section): New hook. (aarch64_map_one_stub): Output erratum stub symbol. (elfNN_aarch64_size_dynamic_sections): Init mapping symbol information for erratum 835769. (elf_backend_write_section): Define. ld/ * emultempl/aarch64elf.em: Add command-line option for erratum 835769. ld/testsuite/ * ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum 835769 tests. * ld-aarch64/erratum835769.d: New. * ld-aarch64/erratum835769.s: New.
2014-10-24 12:39:35 +02:00
[AArch64] Refactor generation of 835769 workaround stubs. This patch recognizes that we only need to perform one scan for the 835769 errata and that this scan can take place before we insert branch stubs. The erratum scan code is relocated and adjusted to create stub entries directly rather than populating an intermediate representation. Since stub entries are created immediately we can drop the adhoc stub size adjustment code and allow the generic stub sizing code to deal with 835769 stub entries. This patch restructures the code but does not change the workaround used to deal with erratum 83679, the exact placement of workaround stubs in the final image may change slightly after this patch due to stubs being created in a different order.
2015-03-20 20:08:00 +01:00
stub_entry = _bfd_aarch64_add_stub_entry_in_group (stub_name,
section,
htab);
if (! stub_entry)
return FALSE;
[AArch64] Cortex-A53 erratum 835769 linker workaround 2014-10-22 Tejas Belagod <tejas.belagod@arm.com> bfd/ * bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter. * bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise. * elfnn-aarch64.c (aarch64_erratum_835769_stub): New. (elf_aarch64_stub_type): Add new type aarch64_stub_erratum_835769_veneer. (elf_aarch64_stub_hash_entry): New fields for erratum 835769. (aarch64_erratum_835769_fix): New data struct to record erratum 835769. (elf_aarch64_link_hash_table: Global flags for 835769. (aarch64_build_one_stub): Add case for 835769. (aarch64_size_one_stub): Likewise. (aarch64_mem_op_p, aarch64_mlxl_p, aarch64_erratum_sequence,erratum_835769_scan): New. Decode and scan functions for erratum 835769. (elf_aarch64_create_or_find_stub_sec): New. (elfNN_aarch64_size_stubs): Look for erratum 835769 and record them. (bfd_elfNN_aarch64_set_options: Set global flag for 835769. (erratum_835769_branch_to_stub_data, make_branch_to_erratum_835769_stub):New. Connect up all the erratum stubs to occurances by branches. (elfNN_aarch64_write_section): New hook. (aarch64_map_one_stub): Output erratum stub symbol. (elfNN_aarch64_size_dynamic_sections): Init mapping symbol information for erratum 835769. (elf_backend_write_section): Define. ld/ * emultempl/aarch64elf.em: Add command-line option for erratum 835769. ld/testsuite/ * ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum 835769 tests. * ld-aarch64/erratum835769.d: New. * ld-aarch64/erratum835769.s: New.
2014-10-24 12:39:35 +02:00
[AArch64] Refactor generation of 835769 workaround stubs. This patch recognizes that we only need to perform one scan for the 835769 errata and that this scan can take place before we insert branch stubs. The erratum scan code is relocated and adjusted to create stub entries directly rather than populating an intermediate representation. Since stub entries are created immediately we can drop the adhoc stub size adjustment code and allow the generic stub sizing code to deal with 835769 stub entries. This patch restructures the code but does not change the workaround used to deal with erratum 83679, the exact placement of workaround stubs in the final image may change slightly after this patch due to stubs being created in a different order.
2015-03-20 20:08:00 +01:00
stub_entry->stub_type = aarch64_stub_erratum_835769_veneer;
stub_entry->target_section = section;
stub_entry->target_value = i + 4;
stub_entry->veneered_insn = insn_2;
stub_entry->output_name = stub_name;
[AArch64] Cortex-A53 erratum 835769 linker workaround 2014-10-22 Tejas Belagod <tejas.belagod@arm.com> bfd/ * bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter. * bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise. * elfnn-aarch64.c (aarch64_erratum_835769_stub): New. (elf_aarch64_stub_type): Add new type aarch64_stub_erratum_835769_veneer. (elf_aarch64_stub_hash_entry): New fields for erratum 835769. (aarch64_erratum_835769_fix): New data struct to record erratum 835769. (elf_aarch64_link_hash_table: Global flags for 835769. (aarch64_build_one_stub): Add case for 835769. (aarch64_size_one_stub): Likewise. (aarch64_mem_op_p, aarch64_mlxl_p, aarch64_erratum_sequence,erratum_835769_scan): New. Decode and scan functions for erratum 835769. (elf_aarch64_create_or_find_stub_sec): New. (elfNN_aarch64_size_stubs): Look for erratum 835769 and record them. (bfd_elfNN_aarch64_set_options: Set global flag for 835769. (erratum_835769_branch_to_stub_data, make_branch_to_erratum_835769_stub):New. Connect up all the erratum stubs to occurances by branches. (elfNN_aarch64_write_section): New hook. (aarch64_map_one_stub): Output erratum stub symbol. (elfNN_aarch64_size_dynamic_sections): Init mapping symbol information for erratum 835769. (elf_backend_write_section): Define. ld/ * emultempl/aarch64elf.em: Add command-line option for erratum 835769. ld/testsuite/ * ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum 835769 tests. * ld-aarch64/erratum835769.d: New. * ld-aarch64/erratum835769.s: New.
2014-10-24 12:39:35 +02:00
num_fixes++;
}
}
}
if (elf_section_data (section)->this_hdr.contents == NULL)
free (contents);
}
[AArch64] Adjust veneer count.
2015-03-25 15:39:14 +01:00
*num_fixes_p = num_fixes;
[AArch64] Flip sense of erratum_835769_scan.
2015-03-20 19:49:29 +01:00
return TRUE;
[AArch64] Cortex-A53 erratum 835769 linker workaround 2014-10-22 Tejas Belagod <tejas.belagod@arm.com> bfd/ * bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter. * bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise. * elfnn-aarch64.c (aarch64_erratum_835769_stub): New. (elf_aarch64_stub_type): Add new type aarch64_stub_erratum_835769_veneer. (elf_aarch64_stub_hash_entry): New fields for erratum 835769. (aarch64_erratum_835769_fix): New data struct to record erratum 835769. (elf_aarch64_link_hash_table: Global flags for 835769. (aarch64_build_one_stub): Add case for 835769. (aarch64_size_one_stub): Likewise. (aarch64_mem_op_p, aarch64_mlxl_p, aarch64_erratum_sequence,erratum_835769_scan): New. Decode and scan functions for erratum 835769. (elf_aarch64_create_or_find_stub_sec): New. (elfNN_aarch64_size_stubs): Look for erratum 835769 and record them. (bfd_elfNN_aarch64_set_options: Set global flag for 835769. (erratum_835769_branch_to_stub_data, make_branch_to_erratum_835769_stub):New. Connect up all the erratum stubs to occurances by branches. (elfNN_aarch64_write_section): New hook. (aarch64_map_one_stub): Output erratum stub symbol. (elfNN_aarch64_size_dynamic_sections): Init mapping symbol information for erratum 835769. (elf_backend_write_section): Define. ld/ * emultempl/aarch64elf.em: Add command-line option for erratum 835769. ld/testsuite/ * ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum 835769 tests. * ld-aarch64/erratum835769.d: New. * ld-aarch64/erratum835769.s: New.
2014-10-24 12:39:35 +02:00
}
[AArch64] Factor out _bfd_aarch64_resize_stubs()
2015-03-20 21:20:35 +01:00
[AArch64] Workaround for Cortex A53 erratum 843419 Some early revisions of the Cortex-A53 have an erratum (843419). The details of the erratum are quite complex and involve dynamic conditions. For the purposes of the workaround we have simplified the static conditions to an ADRP in the last two instructions of a 4KByte page, followed within four instructions by a load/store dependent on the ADRP. This patch adds support to conservatively scan for and workaround Cortex A53 erratum 843419. There are two different workaround strategies used. The first is to rewrite ADRP instructions which form part of an erratum sequence with an ADR instruction. In situations where the ADR provides insufficient offset the dependent load or store instruction from the sequence is moved to a stub section and branches are inserted from the original sequence to the relocated instruction and back again. Stub section sizes are rounded up to a multiple of 4096 in order to ensure that the act of inserting work around stubs does not create more errata sequences. Workaround stubs are always inserted into the stub section associated with the input section containing the erratum sequence. This ensures that the fully relocated form of the veneered load store instruction is available at the point in time when the stub section is written.
2015-02-24 13:04:41 +01:00
/* Test if instruction INSN is ADRP. */
static bfd_boolean
_bfd_aarch64_adrp_p (uint32_t insn)
{
AArch64: Fix regression in Cortex A53 erratum when PIE. (PR ld/23904) The fix for PR ld/22263 causes TLS relocations using ADRP to be relaxed into MOVZ, however this causes issues for the erratum code. The erratum code scans the input sections looking for ADRP instructions and notes their location in the stream. It then later tries to find them again in order to generate the linker stubs. Due to the relaxation it instead finds a MOVZ and hard aborts. Since this relaxation is a valid one, and in which case the erratum no longer applies, it shouldn't abort but instead just continue. This changes the TLS relaxation code such that when it finds an ADRP and it relaxes it, it removes the erratum entry from the work list by changing the stub type into none so the stub is ignored. The entry is not actually removed as removal is a more expensive operation and we have already allocated the memory anyway. The clearing is done for IE->LE and GD->LE relaxations, and a testcase is added for the IE case. The GD case I believe to be impossible to get together with the erratum sequence due to the required BL which would break the sequence. However to cover all basis I have added the guard there as well. build on native hardware and regtested on aarch64-none-elf, aarch64-none-elf (32 bit host), aarch64-none-linux-gnu, aarch64-none-linux-gnu (32 bit host) Cross-compiled and regtested on aarch64-none-linux-gnu, aarch64_be-none-linux-gnu Testcase in PR23940 tested and works as expected now and benchmarks ran on A53 showing no regressions and no issues. bfd/ChangeLog: PR ld/23904 * elfnn-aarch64.c (_bfd_aarch64_adrp_p): Use existing constants. (_bfd_aarch64_erratum_843419_branch_to_stub): Use _bfd_aarch64_adrp_p. (struct erratum_835769_branch_to_stub_clear_data): New. (_bfd_aarch64_erratum_843419_clear_stub): New. (clear_erratum_843419_entry): New. (elfNN_aarch64_tls_relax): Use it. (elfNN_aarch64_relocate_section): Pass input_section. (aarch64_map_one_stub): Handle branch type none as valid. ld/ChangeLog: PR ld/23904 * testsuite/ld-aarch64/aarch64-elf.exp: Add erratum843419_tls_ie. * testsuite/ld-aarch64/erratum843419_tls_ie.d: New test. * testsuite/ld-aarch64/erratum843419_tls_ie.s: New test.
2018-11-27 13:33:21 +01:00
return ((insn & AARCH64_ADRP_OP_MASK) == AARCH64_ADRP_OP);
[AArch64] Workaround for Cortex A53 erratum 843419 Some early revisions of the Cortex-A53 have an erratum (843419). The details of the erratum are quite complex and involve dynamic conditions. For the purposes of the workaround we have simplified the static conditions to an ADRP in the last two instructions of a 4KByte page, followed within four instructions by a load/store dependent on the ADRP. This patch adds support to conservatively scan for and workaround Cortex A53 erratum 843419. There are two different workaround strategies used. The first is to rewrite ADRP instructions which form part of an erratum sequence with an ADR instruction. In situations where the ADR provides insufficient offset the dependent load or store instruction from the sequence is moved to a stub section and branches are inserted from the original sequence to the relocated instruction and back again. Stub section sizes are rounded up to a multiple of 4096 in order to ensure that the act of inserting work around stubs does not create more errata sequences. Workaround stubs are always inserted into the stub section associated with the input section containing the erratum sequence. This ensures that the fully relocated form of the veneered load store instruction is available at the point in time when the stub section is written.
2015-02-24 13:04:41 +01:00
}
/* Helper predicate to look for cortex-a53 erratum 843419 sequence 1. */
static bfd_boolean
_bfd_aarch64_erratum_843419_sequence_p (uint32_t insn_1, uint32_t insn_2,
uint32_t insn_3)
{
uint32_t rt;
uint32_t rt2;
bfd_boolean pair;
bfd_boolean load;
return (aarch64_mem_op_p (insn_2, &rt, &rt2, &pair, &load)
&& (!pair
|| (pair && !load))
&& AARCH64_LDST_UIMM (insn_3)
&& AARCH64_RN (insn_3) == AARCH64_RD (insn_1));
}
/* Test for the presence of Cortex-A53 erratum 843419 instruction sequence.
Return TRUE if section CONTENTS at offset I contains one of the
erratum 843419 sequences, otherwise return FALSE. If a sequence is
seen set P_VENEER_I to the offset of the final LOAD/STORE
instruction in the sequence.
*/
static bfd_boolean
_bfd_aarch64_erratum_843419_p (bfd_byte *contents, bfd_vma vma,
bfd_vma i, bfd_vma span_end,
bfd_vma *p_veneer_i)
{
uint32_t insn_1 = bfd_getl32 (contents + i);
if (!_bfd_aarch64_adrp_p (insn_1))
return FALSE;
if (span_end < i + 12)
return FALSE;
uint32_t insn_2 = bfd_getl32 (contents + i + 4);
uint32_t insn_3 = bfd_getl32 (contents + i + 8);
if ((vma & 0xfff) != 0xff8 && (vma & 0xfff) != 0xffc)
return FALSE;
if (_bfd_aarch64_erratum_843419_sequence_p (insn_1, insn_2, insn_3))
{
*p_veneer_i = i + 8;
return TRUE;
}
if (span_end < i + 16)
return FALSE;
uint32_t insn_4 = bfd_getl32 (contents + i + 12);
if (_bfd_aarch64_erratum_843419_sequence_p (insn_1, insn_2, insn_4))
{
*p_veneer_i = i + 12;
return TRUE;
}
return FALSE;
}
[AArch64] Factor out _bfd_aarch64_resize_stubs()
2015-03-20 21:20:35 +01:00
/* Resize all stub sections. */
static void
_bfd_aarch64_resize_stubs (struct elf_aarch64_link_hash_table *htab)
{
asection *section;
/* OK, we've added some stubs. Find out the new size of the
stub sections. */
for (section = htab->stub_bfd->sections;
section != NULL; section = section->next)
{
/* Ignore non-stub sections. */
if (!strstr (section->name, STUB_SUFFIX))
continue;
section->size = 0;
}
bfd_hash_traverse (&htab->stub_hash_table, aarch64_size_one_stub, htab);
[AArch64] Implement branch over stub section. Ensure that injection of a stub section does not break a link where there is an xpectation that flow of control can pass from one input section to another simply by linking the input sections in series. The solution here is to allow stub sections to be inserted after any input section (existing behaviour), but inject an additional branch at the start of each stub section such that control flow falling into the stub section will branch over the stub section.
2015-03-22 09:31:18 +01:00
for (section = htab->stub_bfd->sections;
section != NULL; section = section->next)
{
if (!strstr (section->name, STUB_SUFFIX))
continue;
Ensure 8-byte alignment for AArch64 stubs. PR 22903 bfd * elfnn-aarch64.c (_bfd_aarch64_resize_stubs): Add 8 bytes for branch and nop instead of 4. (elfNN_arch64_build_stubs): Add nop after branch. Increase size by 8 instead of 4. ld * emultempl/aarch64elf.em (elf${ELFSIZE}_aarch64_add_stub_section): Give stub_sec 8 byte alignment. * emulparams/aarch64cloudabi.sh (NOP): Set to 0x1f2003d5. * emulparams/aarch64elf.sh (NOP): Likewise. * emulparams/aarch64elf32.sh (NOP): Likewise. * emulparams/aarch64fbsd.sh (NOP): Likewise. * emulparams/aarch64linux.sh (NOP): Likewise. * emulparams/aarch64linux32.sh (NOP): Likewise. * testsuite/ld-aarch64/erratum835769.d: Adjust for added nop. * testsuite/ld-aarch64/erratum843419.d: Likewise. * testsuite/ld-aarch64/farcall-b-defsym.d: Likewise. * testsuite/ld-aarch64/farcall-b-none-function.d: Likewise. * testsuite/ld-aarch64/farcall-b-plt.d: Likewise. * testsuite/ld-aarch64/farcall-b-section.d: Likewise. * testsuite/ld-aarch64/farcall-b.d: Likewise. * testsuite/ld-aarch64/farcall-back.d: Likewise. * testsuite/ld-aarch64/farcall-bl-defsym.d: Likewise. * testsuite/ld-aarch64/farcall-bl-none-function.d: Likewise. * testsuite/ld-aarch64/farcall-bl-plt.d: Likewise. * testsuite/ld-aarch64/farcall-bl-section.d: Likewise. * testsuite/ld-aarch64/farcall-bl.d: Likewise.
2018-03-02 11:47:25 +01:00
/* Add space for a branch. Add 8 bytes to keep section 8 byte aligned,
as long branch stubs contain a 64-bit address. */
[AArch64] Implement branch over stub section. Ensure that injection of a stub section does not break a link where there is an xpectation that flow of control can pass from one input section to another simply by linking the input sections in series. The solution here is to allow stub sections to be inserted after any input section (existing behaviour), but inject an additional branch at the start of each stub section such that control flow falling into the stub section will branch over the stub section.
2015-03-22 09:31:18 +01:00
if (section->size)
Ensure 8-byte alignment for AArch64 stubs. PR 22903 bfd * elfnn-aarch64.c (_bfd_aarch64_resize_stubs): Add 8 bytes for branch and nop instead of 4. (elfNN_arch64_build_stubs): Add nop after branch. Increase size by 8 instead of 4. ld * emultempl/aarch64elf.em (elf${ELFSIZE}_aarch64_add_stub_section): Give stub_sec 8 byte alignment. * emulparams/aarch64cloudabi.sh (NOP): Set to 0x1f2003d5. * emulparams/aarch64elf.sh (NOP): Likewise. * emulparams/aarch64elf32.sh (NOP): Likewise. * emulparams/aarch64fbsd.sh (NOP): Likewise. * emulparams/aarch64linux.sh (NOP): Likewise. * emulparams/aarch64linux32.sh (NOP): Likewise. * testsuite/ld-aarch64/erratum835769.d: Adjust for added nop. * testsuite/ld-aarch64/erratum843419.d: Likewise. * testsuite/ld-aarch64/farcall-b-defsym.d: Likewise. * testsuite/ld-aarch64/farcall-b-none-function.d: Likewise. * testsuite/ld-aarch64/farcall-b-plt.d: Likewise. * testsuite/ld-aarch64/farcall-b-section.d: Likewise. * testsuite/ld-aarch64/farcall-b.d: Likewise. * testsuite/ld-aarch64/farcall-back.d: Likewise. * testsuite/ld-aarch64/farcall-bl-defsym.d: Likewise. * testsuite/ld-aarch64/farcall-bl-none-function.d: Likewise. * testsuite/ld-aarch64/farcall-bl-plt.d: Likewise. * testsuite/ld-aarch64/farcall-bl-section.d: Likewise. * testsuite/ld-aarch64/farcall-bl.d: Likewise.
2018-03-02 11:47:25 +01:00
section->size += 8;
[AArch64] Workaround for Cortex A53 erratum 843419 Some early revisions of the Cortex-A53 have an erratum (843419). The details of the erratum are quite complex and involve dynamic conditions. For the purposes of the workaround we have simplified the static conditions to an ADRP in the last two instructions of a 4KByte page, followed within four instructions by a load/store dependent on the ADRP. This patch adds support to conservatively scan for and workaround Cortex A53 erratum 843419. There are two different workaround strategies used. The first is to rewrite ADRP instructions which form part of an erratum sequence with an ADR instruction. In situations where the ADR provides insufficient offset the dependent load or store instruction from the sequence is moved to a stub section and branches are inserted from the original sequence to the relocated instruction and back again. Stub section sizes are rounded up to a multiple of 4096 in order to ensure that the act of inserting work around stubs does not create more errata sequences. Workaround stubs are always inserted into the stub section associated with the input section containing the erratum sequence. This ensures that the fully relocated form of the veneered load store instruction is available at the point in time when the stub section is written.
2015-02-24 13:04:41 +01:00
/* Ensure all stub sections have a size which is a multiple of
4096. This is important in order to ensure that the insertion
of stub sections does not in itself move existing code around
AArch64: Implement choice between Cortex-A53 erratum workarounds. (PR ld/24373) The Cortex-A53 erratum currently has two ways it can resolve the erratum when using the flag --fix-cortex-a53-843419: 1) If the address is within the range of an ADR instruction it rewrites the ADRP into an ADR, and those doesn't need the use of a veneer. 2) If the address is not within range, it adds a branch to a veneer which will execute the final bit of the erratum workaround and branch back to the call site. When we do this we always generate the veneers and we always align the size of the text section to 4KB. This is because we only know which workaround we can use after all linking has finished and all addresses are known. This means even though the veneers are not used, we still generate the section and we still change the size of the input section. This is problematic for small memory devices as this would require the user to take about a ~4KB hit in memory even though it's not even used. Since there's no real way to restart the linking process from the final write phase this patch solves the issue by allowing the user more control over which erratum workaround gets used. Concretely this changes the option --fix-cortex-a53-843419 to take optional arguments --fix-cortex-a53-843419[=full|adr|adrp] - full (default): Use both ADRP and ADR workaround. This is equivalent to not specifying any options and is the default behavior before this patch. - adr: Only use the ADR workaround, this will not cause any increase in binary size but linking will fail if the referenced address is out of range of an ADR instruction. - adrp: Use only the ADRP workaround, this will never rewrite your ADRP. In the cases where the user knows how big their binaries are the `adr` option would prevent the unneeded overhead. bfd/ChangeLog: PR ld/24373 * bfd-in.h (enum erratum_84319_opts): New (bfd_elf64_aarch64_set_options, bfd_elf32_aarch64_set_options): Change int to enum erratum_84319_opts. * bfd-in2.h: Regenerate. * elfnn-aarch64.c (struct elf_aarch64_link_hash_table): Change fix_erratum_843419 to use new enum, remove fix_erratum_843419_adr. (_bfd_aarch64_add_stub_entry_after): Conditionally create erratum stub. (aarch64_size_one_stub): Conditionally size erratum 843419 stubs. (_bfd_aarch64_resize_stubs): Amend comment. (elfNN_aarch64_size_stubs): Don't generate stubs when no workaround requested. (bfd_elfNN_aarch64_set_options): Use new fix_erratum_843419 enum. (_bfd_aarch64_erratum_843419_branch_to_stub): Implement selection of erratum workaround. (clear_erratum_843419_entry): Update erratum conditional. ld/ChangeLog: PR ld/24373 * emultempl/aarch64elf.em (PARSE_AND_LIST_LONGOPTS): Add optional args to flags. * NEWS: Add changes to flag. (PARSE_AND_LIST_OPTIONS): Update help descriptions. (PARSE_AND_LIST_ARGS_CASES): Add new options to parser. * testsuite/ld-aarch64/aarch64-elf.exp: Add new run_dump_tests. * testsuite/ld-aarch64/erratum843419-adr.d: New test. * testsuite/ld-aarch64/erratum843419-adrp.d: New test. * testsuite/ld-aarch64/erratum843419-far-adr.d: New test. * testsuite/ld-aarch64/erratum843419-far-full.d: New test. * testsuite/ld-aarch64/erratum843419-far.s: New test. * testsuite/ld-aarch64/erratum843419-full.d: New test. * testsuite/ld-aarch64/erratum843419-near.s: New test. * testsuite/ld-aarch64/erratum843419-no-args.d: New test.
2019-05-21 14:04:08 +02:00
in such a way that new errata sequences are created. We only do this
when the ADRP workaround is enabled. If only the ADR workaround is
enabled then the stubs workaround won't ever be used. */
if (htab->fix_erratum_843419 & ERRAT_ADRP)
[AArch64] Workaround for Cortex A53 erratum 843419 Some early revisions of the Cortex-A53 have an erratum (843419). The details of the erratum are quite complex and involve dynamic conditions. For the purposes of the workaround we have simplified the static conditions to an ADRP in the last two instructions of a 4KByte page, followed within four instructions by a load/store dependent on the ADRP. This patch adds support to conservatively scan for and workaround Cortex A53 erratum 843419. There are two different workaround strategies used. The first is to rewrite ADRP instructions which form part of an erratum sequence with an ADR instruction. In situations where the ADR provides insufficient offset the dependent load or store instruction from the sequence is moved to a stub section and branches are inserted from the original sequence to the relocated instruction and back again. Stub section sizes are rounded up to a multiple of 4096 in order to ensure that the act of inserting work around stubs does not create more errata sequences. Workaround stubs are always inserted into the stub section associated with the input section containing the erratum sequence. This ensures that the fully relocated form of the veneered load store instruction is available at the point in time when the stub section is written.
2015-02-24 13:04:41 +01:00
if (section->size)
section->size = BFD_ALIGN (section->size, 0x1000);
}
}
Ensure 8-byte alignment for AArch64 stubs. PR 22903 bfd * elfnn-aarch64.c (_bfd_aarch64_resize_stubs): Add 8 bytes for branch and nop instead of 4. (elfNN_arch64_build_stubs): Add nop after branch. Increase size by 8 instead of 4. ld * emultempl/aarch64elf.em (elf${ELFSIZE}_aarch64_add_stub_section): Give stub_sec 8 byte alignment. * emulparams/aarch64cloudabi.sh (NOP): Set to 0x1f2003d5. * emulparams/aarch64elf.sh (NOP): Likewise. * emulparams/aarch64elf32.sh (NOP): Likewise. * emulparams/aarch64fbsd.sh (NOP): Likewise. * emulparams/aarch64linux.sh (NOP): Likewise. * emulparams/aarch64linux32.sh (NOP): Likewise. * testsuite/ld-aarch64/erratum835769.d: Adjust for added nop. * testsuite/ld-aarch64/erratum843419.d: Likewise. * testsuite/ld-aarch64/farcall-b-defsym.d: Likewise. * testsuite/ld-aarch64/farcall-b-none-function.d: Likewise. * testsuite/ld-aarch64/farcall-b-plt.d: Likewise. * testsuite/ld-aarch64/farcall-b-section.d: Likewise. * testsuite/ld-aarch64/farcall-b.d: Likewise. * testsuite/ld-aarch64/farcall-back.d: Likewise. * testsuite/ld-aarch64/farcall-bl-defsym.d: Likewise. * testsuite/ld-aarch64/farcall-bl-none-function.d: Likewise. * testsuite/ld-aarch64/farcall-bl-plt.d: Likewise. * testsuite/ld-aarch64/farcall-bl-section.d: Likewise. * testsuite/ld-aarch64/farcall-bl.d: Likewise.
2018-03-02 11:47:25 +01:00
/* Construct an erratum 843419 workaround stub name. */
[AArch64] Workaround for Cortex A53 erratum 843419 Some early revisions of the Cortex-A53 have an erratum (843419). The details of the erratum are quite complex and involve dynamic conditions. For the purposes of the workaround we have simplified the static conditions to an ADRP in the last two instructions of a 4KByte page, followed within four instructions by a load/store dependent on the ADRP. This patch adds support to conservatively scan for and workaround Cortex A53 erratum 843419. There are two different workaround strategies used. The first is to rewrite ADRP instructions which form part of an erratum sequence with an ADR instruction. In situations where the ADR provides insufficient offset the dependent load or store instruction from the sequence is moved to a stub section and branches are inserted from the original sequence to the relocated instruction and back again. Stub section sizes are rounded up to a multiple of 4096 in order to ensure that the act of inserting work around stubs does not create more errata sequences. Workaround stubs are always inserted into the stub section associated with the input section containing the erratum sequence. This ensures that the fully relocated form of the veneered load store instruction is available at the point in time when the stub section is written.
2015-02-24 13:04:41 +01:00
static char *
_bfd_aarch64_erratum_843419_stub_name (asection *input_section,
bfd_vma offset)
{
const bfd_size_type len = 8 + 4 + 1 + 8 + 1 + 16 + 1;
char *stub_name = bfd_malloc (len);
if (stub_name != NULL)
snprintf (stub_name, len, "e843419@%04x_%08x_%" BFD_VMA_FMT "x",
input_section->owner->id,
input_section->id,
offset);
return stub_name;
}
/* Build a stub_entry structure describing an 843419 fixup.
The stub_entry constructed is populated with the bit pattern INSN
of the instruction located at OFFSET within input SECTION.
Returns TRUE on success. */
static bfd_boolean
_bfd_aarch64_erratum_843419_fixup (uint32_t insn,
bfd_vma adrp_offset,
bfd_vma ldst_offset,
asection *section,
struct bfd_link_info *info)
{
struct elf_aarch64_link_hash_table *htab = elf_aarch64_hash_table (info);
char *stub_name;
struct elf_aarch64_stub_hash_entry *stub_entry;
stub_name = _bfd_aarch64_erratum_843419_stub_name (section, ldst_offset);
Fix compile time warning message for the AArch64 BFD backend, about a possible attempt to call sprintf on a NULL buffer pointer. * elfnn-aarch64.c (_bfd_aarch64_erratum_835769_stub_name): Check for malloc returning NULL. (_bfd_aarch64_erratum_843419_fixup): Check for _bfd_aarch64_erratum_835769_stub_name returning NULL.
2018-06-25 13:49:14 +02:00
if (stub_name == NULL)
return FALSE;
[AArch64] Workaround for Cortex A53 erratum 843419 Some early revisions of the Cortex-A53 have an erratum (843419). The details of the erratum are quite complex and involve dynamic conditions. For the purposes of the workaround we have simplified the static conditions to an ADRP in the last two instructions of a 4KByte page, followed within four instructions by a load/store dependent on the ADRP. This patch adds support to conservatively scan for and workaround Cortex A53 erratum 843419. There are two different workaround strategies used. The first is to rewrite ADRP instructions which form part of an erratum sequence with an ADR instruction. In situations where the ADR provides insufficient offset the dependent load or store instruction from the sequence is moved to a stub section and branches are inserted from the original sequence to the relocated instruction and back again. Stub section sizes are rounded up to a multiple of 4096 in order to ensure that the act of inserting work around stubs does not create more errata sequences. Workaround stubs are always inserted into the stub section associated with the input section containing the erratum sequence. This ensures that the fully relocated form of the veneered load store instruction is available at the point in time when the stub section is written.
2015-02-24 13:04:41 +01:00
stub_entry = aarch64_stub_hash_lookup (&htab->stub_hash_table, stub_name,
FALSE, FALSE);
if (stub_entry)
{
free (stub_name);
return TRUE;
}
/* We always place an 843419 workaround veneer in the stub section
attached to the input section in which an erratum sequence has
been found. This ensures that later in the link process (in
elfNN_aarch64_write_section) when we copy the veneered
instruction from the input section into the stub section the
copied instruction will have had any relocations applied to it.
If we placed workaround veneers in any other stub section then we
could not assume that all relocations have been processed on the
corresponding input section at the point we output the stub
Fix compile time warning message for the AArch64 BFD backend, about a possible attempt to call sprintf on a NULL buffer pointer. * elfnn-aarch64.c (_bfd_aarch64_erratum_835769_stub_name): Check for malloc returning NULL. (_bfd_aarch64_erratum_843419_fixup): Check for _bfd_aarch64_erratum_835769_stub_name returning NULL.
2018-06-25 13:49:14 +02:00
section. */
[AArch64] Workaround for Cortex A53 erratum 843419 Some early revisions of the Cortex-A53 have an erratum (843419). The details of the erratum are quite complex and involve dynamic conditions. For the purposes of the workaround we have simplified the static conditions to an ADRP in the last two instructions of a 4KByte page, followed within four instructions by a load/store dependent on the ADRP. This patch adds support to conservatively scan for and workaround Cortex A53 erratum 843419. There are two different workaround strategies used. The first is to rewrite ADRP instructions which form part of an erratum sequence with an ADR instruction. In situations where the ADR provides insufficient offset the dependent load or store instruction from the sequence is moved to a stub section and branches are inserted from the original sequence to the relocated instruction and back again. Stub section sizes are rounded up to a multiple of 4096 in order to ensure that the act of inserting work around stubs does not create more errata sequences. Workaround stubs are always inserted into the stub section associated with the input section containing the erratum sequence. This ensures that the fully relocated form of the veneered load store instruction is available at the point in time when the stub section is written.
2015-02-24 13:04:41 +01:00
stub_entry = _bfd_aarch64_add_stub_entry_after (stub_name, section, htab);
if (stub_entry == NULL)
{
free (stub_name);
return FALSE;
}
stub_entry->adrp_offset = adrp_offset;
stub_entry->target_value = ldst_offset;
stub_entry->target_section = section;
stub_entry->stub_type = aarch64_stub_erratum_843419_veneer;
stub_entry->veneered_insn = insn;
stub_entry->output_name = stub_name;
return TRUE;
}
/* Scan an input section looking for the signature of erratum 843419.
Scans input SECTION in INPUT_BFD looking for erratum 843419
signatures, for each signature found a stub_entry is created
describing the location of the erratum for subsequent fixup.
Return TRUE on successful scan, FALSE on failure to scan.
*/
static bfd_boolean
_bfd_aarch64_erratum_843419_scan (bfd *input_bfd, asection *section,
struct bfd_link_info *info)
{
struct elf_aarch64_link_hash_table *htab = elf_aarch64_hash_table (info);
if (htab == NULL)
return TRUE;
if (elf_section_type (section) != SHT_PROGBITS
|| (elf_section_flags (section) & SHF_EXECINSTR) == 0
|| (section->flags & SEC_EXCLUDE) != 0
|| (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
|| (section->output_section == bfd_abs_section_ptr))
return TRUE;
do
{
bfd_byte *contents = NULL;
struct _aarch64_elf_section_data *sec_data;
unsigned int span;
if (elf_section_data (section)->this_hdr.contents != NULL)
contents = elf_section_data (section)->this_hdr.contents;
else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
return FALSE;
sec_data = elf_aarch64_section_data (section);
qsort (sec_data->map, sec_data->mapcount,
sizeof (elf_aarch64_section_map), elf_aarch64_compare_mapping);
for (span = 0; span < sec_data->mapcount; span++)
{
unsigned int span_start = sec_data->map[span].vma;
unsigned int span_end = ((span == sec_data->mapcount - 1)
? sec_data->map[0].vma + section->size
: sec_data->map[span + 1].vma);
unsigned int i;
char span_type = sec_data->map[span].type;
if (span_type == 'd')
continue;
for (i = span_start; i + 8 < span_end; i += 4)
{
bfd_vma vma = (section->output_section->vma
+ section->output_offset
+ i);
bfd_vma veneer_i;
if (_bfd_aarch64_erratum_843419_p
(contents, vma, i, span_end, &veneer_i))
{
uint32_t insn = bfd_getl32 (contents + veneer_i);
if (!_bfd_aarch64_erratum_843419_fixup (insn, i, veneer_i,
section, info))
return FALSE;
}
}
}
if (elf_section_data (section)->this_hdr.contents == NULL)
free (contents);
[AArch64] Implement branch over stub section. Ensure that injection of a stub section does not break a link where there is an xpectation that flow of control can pass from one input section to another simply by linking the input sections in series. The solution here is to allow stub sections to be inserted after any input section (existing behaviour), but inject an additional branch at the start of each stub section such that control flow falling into the stub section will branch over the stub section.
2015-03-22 09:31:18 +01:00
}
[AArch64] Workaround for Cortex A53 erratum 843419 Some early revisions of the Cortex-A53 have an erratum (843419). The details of the erratum are quite complex and involve dynamic conditions. For the purposes of the workaround we have simplified the static conditions to an ADRP in the last two instructions of a 4KByte page, followed within four instructions by a load/store dependent on the ADRP. This patch adds support to conservatively scan for and workaround Cortex A53 erratum 843419. There are two different workaround strategies used. The first is to rewrite ADRP instructions which form part of an erratum sequence with an ADR instruction. In situations where the ADR provides insufficient offset the dependent load or store instruction from the sequence is moved to a stub section and branches are inserted from the original sequence to the relocated instruction and back again. Stub section sizes are rounded up to a multiple of 4096 in order to ensure that the act of inserting work around stubs does not create more errata sequences. Workaround stubs are always inserted into the stub section associated with the input section containing the erratum sequence. This ensures that the fully relocated form of the veneered load store instruction is available at the point in time when the stub section is written.
2015-02-24 13:04:41 +01:00
while (0);
return TRUE;
[AArch64] Implement branch over stub section. Ensure that injection of a stub section does not break a link where there is an xpectation that flow of control can pass from one input section to another simply by linking the input sections in series. The solution here is to allow stub sections to be inserted after any input section (existing behaviour), but inject an additional branch at the start of each stub section such that control flow falling into the stub section will branch over the stub section.
2015-03-22 09:31:18 +01:00
}
[AArch64] Factor out _bfd_aarch64_resize_stubs()
2015-03-20 21:20:35 +01:00
[AArch64] Workaround for Cortex A53 erratum 843419 Some early revisions of the Cortex-A53 have an erratum (843419). The details of the erratum are quite complex and involve dynamic conditions. For the purposes of the workaround we have simplified the static conditions to an ADRP in the last two instructions of a 4KByte page, followed within four instructions by a load/store dependent on the ADRP. This patch adds support to conservatively scan for and workaround Cortex A53 erratum 843419. There are two different workaround strategies used. The first is to rewrite ADRP instructions which form part of an erratum sequence with an ADR instruction. In situations where the ADR provides insufficient offset the dependent load or store instruction from the sequence is moved to a stub section and branches are inserted from the original sequence to the relocated instruction and back again. Stub section sizes are rounded up to a multiple of 4096 in order to ensure that the act of inserting work around stubs does not create more errata sequences. Workaround stubs are always inserted into the stub section associated with the input section containing the erratum sequence. This ensures that the fully relocated form of the veneered load store instruction is available at the point in time when the stub section is written.
2015-02-24 13:04:41 +01:00
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* Determine and set the size of the stub section for a final link.
The basic idea here is to examine all the relocations looking for
PC-relative calls to a target that is unreachable with a "bl"
instruction. */
bfd_boolean
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_size_stubs (bfd *output_bfd,
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
bfd *stub_bfd,
struct bfd_link_info *info,
bfd_signed_vma group_size,
asection * (*add_stub_section) (const char *,
asection *),
void (*layout_sections_again) (void))
{
bfd_size_type stub_group_size;
bfd_boolean stubs_always_before_branch;
[AArch64] Refactor generation of 835769 workaround stubs. This patch recognizes that we only need to perform one scan for the 835769 errata and that this scan can take place before we insert branch stubs. The erratum scan code is relocated and adjusted to create stub entries directly rather than populating an intermediate representation. Since stub entries are created immediately we can drop the adhoc stub size adjustment code and allow the generic stub sizing code to deal with 835769 stub entries. This patch restructures the code but does not change the workaround used to deal with erratum 83679, the exact placement of workaround stubs in the final image may change slightly after this patch due to stubs being created in a different order.
2015-03-20 20:08:00 +01:00
bfd_boolean stub_changed = FALSE;
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
struct elf_aarch64_link_hash_table *htab = elf_aarch64_hash_table (info);
[AArch64] Cortex-A53 erratum 835769 linker workaround 2014-10-22 Tejas Belagod <tejas.belagod@arm.com> bfd/ * bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter. * bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise. * elfnn-aarch64.c (aarch64_erratum_835769_stub): New. (elf_aarch64_stub_type): Add new type aarch64_stub_erratum_835769_veneer. (elf_aarch64_stub_hash_entry): New fields for erratum 835769. (aarch64_erratum_835769_fix): New data struct to record erratum 835769. (elf_aarch64_link_hash_table: Global flags for 835769. (aarch64_build_one_stub): Add case for 835769. (aarch64_size_one_stub): Likewise. (aarch64_mem_op_p, aarch64_mlxl_p, aarch64_erratum_sequence,erratum_835769_scan): New. Decode and scan functions for erratum 835769. (elf_aarch64_create_or_find_stub_sec): New. (elfNN_aarch64_size_stubs): Look for erratum 835769 and record them. (bfd_elfNN_aarch64_set_options: Set global flag for 835769. (erratum_835769_branch_to_stub_data, make_branch_to_erratum_835769_stub):New. Connect up all the erratum stubs to occurances by branches. (elfNN_aarch64_write_section): New hook. (aarch64_map_one_stub): Output erratum stub symbol. (elfNN_aarch64_size_dynamic_sections): Init mapping symbol information for erratum 835769. (elf_backend_write_section): Define. ld/ * emultempl/aarch64elf.em: Add command-line option for erratum 835769. ld/testsuite/ * ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum 835769 tests. * ld-aarch64/erratum835769.d: New. * ld-aarch64/erratum835769.s: New.
2014-10-24 12:39:35 +02:00
unsigned int num_erratum_835769_fixes = 0;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* Propagate mach to stub bfd, because it may not have been
finalized when we created stub_bfd. */
bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
bfd_get_mach (output_bfd));
/* Stash our params away. */
htab->stub_bfd = stub_bfd;
htab->add_stub_section = add_stub_section;
htab->layout_sections_again = layout_sections_again;
stubs_always_before_branch = group_size < 0;
if (group_size < 0)
stub_group_size = -group_size;
else
stub_group_size = group_size;
if (stub_group_size == 1)
{
/* Default values. */
bfd/ * bfd-in.h (bfd_elf64_aarch64_set_options): Add 'extern'. * bfd-in2.h: Re-generated. * elf64-aarch64.c (RELOC_SECTION): Removed. (SWAP_RELOC_IN, SWAP_RELOC_OUT): Ditto. (AARCH64_ELF_OS_ABI_VERSION): Ditto. (elf64_aarch64_link_hash_traverse): Ditto. (elf64_aarch64_size_stubs): Change 'Aarch64' to 'AArch64' in the comment. opcodes/ * aarch64-dis.c (EMBEDDED_ENV): Remove the check on it. (SYMTAB_AVAILABLE): Removed. (#include "elf/aarch64.h): Ditto.
2013-06-20 18:01:35 +02:00
/* AArch64 branch range is +-128MB. The value used is 1MB less. */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
stub_group_size = 127 * 1024 * 1024;
}
group_sections (htab, stub_group_size, stubs_always_before_branch);
[AArch64] Workaround for Cortex A53 erratum 843419 Some early revisions of the Cortex-A53 have an erratum (843419). The details of the erratum are quite complex and involve dynamic conditions. For the purposes of the workaround we have simplified the static conditions to an ADRP in the last two instructions of a 4KByte page, followed within four instructions by a load/store dependent on the ADRP. This patch adds support to conservatively scan for and workaround Cortex A53 erratum 843419. There are two different workaround strategies used. The first is to rewrite ADRP instructions which form part of an erratum sequence with an ADR instruction. In situations where the ADR provides insufficient offset the dependent load or store instruction from the sequence is moved to a stub section and branches are inserted from the original sequence to the relocated instruction and back again. Stub section sizes are rounded up to a multiple of 4096 in order to ensure that the act of inserting work around stubs does not create more errata sequences. Workaround stubs are always inserted into the stub section associated with the input section containing the erratum sequence. This ensures that the fully relocated form of the veneered load store instruction is available at the point in time when the stub section is written.
2015-02-24 13:04:41 +01:00
(*htab->layout_sections_again) ();
[AArch64] Refactor generation of 835769 workaround stubs. This patch recognizes that we only need to perform one scan for the 835769 errata and that this scan can take place before we insert branch stubs. The erratum scan code is relocated and adjusted to create stub entries directly rather than populating an intermediate representation. Since stub entries are created immediately we can drop the adhoc stub size adjustment code and allow the generic stub sizing code to deal with 835769 stub entries. This patch restructures the code but does not change the workaround used to deal with erratum 83679, the exact placement of workaround stubs in the final image may change slightly after this patch due to stubs being created in a different order.
2015-03-20 20:08:00 +01:00
if (htab->fix_erratum_835769)
{
bfd *input_bfd;
for (input_bfd = info->input_bfds;
input_bfd != NULL; input_bfd = input_bfd->link.next)
elf_backend_section_flags and _bfd_elf_init_private_section_data I was looking at elf_backend_section_flags as a means of setting SEC_SMALL_DATA for .sdata, .sbss and the like, and condidered adding an asection* parameter to access the section name easily before realising that hdr->bfd_section of course makes the section available. So no new parameter needed. In fact the flagword* parameter isn't needed either, so out it goes. The patch also tidies some horrible code in _bfd_elf_new_section_hook that can change whether known ABI sections have sh_type and sh_flags set up depending on which of the bfd_make_section functions is used. (Some of those set section flags before _bfd_elf_new_section_hook is called, others leave the flags zero.) The function also had some hacks for .init_array and .fini_array to affect how _bfd_elf_init_private_section_data behaved for those sections. It's cleaner to do that in _bfd_elf_init_private_section_data. So that all goes and we now init sh_type and sh_flags for all known ABI sections in _bfd_elf_new_section_hook. _bfd_elf_init_private_section_data is changed to suit, and now doesn't just single out SHT_INIT_ARRAY and SHT_FINI_ARRAY but rather any of the special section types. The _bfd_elf_new_section_hook change resulting in +FAIL: ld-aarch64/erratum835769-843419 exposing some errors in the aarch64 backend. elfNN_aarch64_size_stubs should not be looking at linker created sections in the stub bfd. Nor should code like "symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr" be run without first checking that input_bfd is ELF. * elf-bfd.h (elf_backend_section_flags): Remove flagword* param. * elf.c (_bfd_elf_make_section_from_shdr): Set section flags before calling elf_backend_section_flags with adjusted params. Use newsect->flags past that point. (_bfd_elf_new_section_hook): Always set sh_type and sh_flags for special sections. (_bfd_elf_init_private_section_data): Allow normal sh_type sections to have their type overridden, and all sh_flags but processor and os specific. * elf32-arm.c (elf32_arm_section_flags): Adjust for changed params. * elf32-mep.c (mep_elf_section_flags): Likewise. * elf32-nios2.c (nios2_elf32_section_flags): Likewise. * elf64-alpha.c (elf64_alpha_section_flags): Likewise. * elf64-ia64-vms.c (elf64_ia64_section_flags): Likewise. * elfnn-ia64.c (elfNN_ia64_section_flags): Likewise. * elfnn-aarch64.c (elfNN_aarch64_size_stubs): Exclude the linker stub BFD and non-aarch64 input files when scanning for stubs.
2020-03-02 00:46:02 +01:00
{
if (!is_aarch64_elf (input_bfd)
|| (input_bfd->flags & BFD_LINKER_CREATED) != 0)
continue;
if (!_bfd_aarch64_erratum_835769_scan (input_bfd, info,
&num_erratum_835769_fixes))
return FALSE;
}
[AArch64] Refactor generation of 835769 workaround stubs. This patch recognizes that we only need to perform one scan for the 835769 errata and that this scan can take place before we insert branch stubs. The erratum scan code is relocated and adjusted to create stub entries directly rather than populating an intermediate representation. Since stub entries are created immediately we can drop the adhoc stub size adjustment code and allow the generic stub sizing code to deal with 835769 stub entries. This patch restructures the code but does not change the workaround used to deal with erratum 83679, the exact placement of workaround stubs in the final image may change slightly after this patch due to stubs being created in a different order.
2015-03-20 20:08:00 +01:00
[AArch64] Workaround for Cortex A53 erratum 843419 Some early revisions of the Cortex-A53 have an erratum (843419). The details of the erratum are quite complex and involve dynamic conditions. For the purposes of the workaround we have simplified the static conditions to an ADRP in the last two instructions of a 4KByte page, followed within four instructions by a load/store dependent on the ADRP. This patch adds support to conservatively scan for and workaround Cortex A53 erratum 843419. There are two different workaround strategies used. The first is to rewrite ADRP instructions which form part of an erratum sequence with an ADR instruction. In situations where the ADR provides insufficient offset the dependent load or store instruction from the sequence is moved to a stub section and branches are inserted from the original sequence to the relocated instruction and back again. Stub section sizes are rounded up to a multiple of 4096 in order to ensure that the act of inserting work around stubs does not create more errata sequences. Workaround stubs are always inserted into the stub section associated with the input section containing the erratum sequence. This ensures that the fully relocated form of the veneered load store instruction is available at the point in time when the stub section is written.
2015-02-24 13:04:41 +01:00
_bfd_aarch64_resize_stubs (htab);
(*htab->layout_sections_again) ();
}
AArch64: Implement choice between Cortex-A53 erratum workarounds. (PR ld/24373) The Cortex-A53 erratum currently has two ways it can resolve the erratum when using the flag --fix-cortex-a53-843419: 1) If the address is within the range of an ADR instruction it rewrites the ADRP into an ADR, and those doesn't need the use of a veneer. 2) If the address is not within range, it adds a branch to a veneer which will execute the final bit of the erratum workaround and branch back to the call site. When we do this we always generate the veneers and we always align the size of the text section to 4KB. This is because we only know which workaround we can use after all linking has finished and all addresses are known. This means even though the veneers are not used, we still generate the section and we still change the size of the input section. This is problematic for small memory devices as this would require the user to take about a ~4KB hit in memory even though it's not even used. Since there's no real way to restart the linking process from the final write phase this patch solves the issue by allowing the user more control over which erratum workaround gets used. Concretely this changes the option --fix-cortex-a53-843419 to take optional arguments --fix-cortex-a53-843419[=full|adr|adrp] - full (default): Use both ADRP and ADR workaround. This is equivalent to not specifying any options and is the default behavior before this patch. - adr: Only use the ADR workaround, this will not cause any increase in binary size but linking will fail if the referenced address is out of range of an ADR instruction. - adrp: Use only the ADRP workaround, this will never rewrite your ADRP. In the cases where the user knows how big their binaries are the `adr` option would prevent the unneeded overhead. bfd/ChangeLog: PR ld/24373 * bfd-in.h (enum erratum_84319_opts): New (bfd_elf64_aarch64_set_options, bfd_elf32_aarch64_set_options): Change int to enum erratum_84319_opts. * bfd-in2.h: Regenerate. * elfnn-aarch64.c (struct elf_aarch64_link_hash_table): Change fix_erratum_843419 to use new enum, remove fix_erratum_843419_adr. (_bfd_aarch64_add_stub_entry_after): Conditionally create erratum stub. (aarch64_size_one_stub): Conditionally size erratum 843419 stubs. (_bfd_aarch64_resize_stubs): Amend comment. (elfNN_aarch64_size_stubs): Don't generate stubs when no workaround requested. (bfd_elfNN_aarch64_set_options): Use new fix_erratum_843419 enum. (_bfd_aarch64_erratum_843419_branch_to_stub): Implement selection of erratum workaround. (clear_erratum_843419_entry): Update erratum conditional. ld/ChangeLog: PR ld/24373 * emultempl/aarch64elf.em (PARSE_AND_LIST_LONGOPTS): Add optional args to flags. * NEWS: Add changes to flag. (PARSE_AND_LIST_OPTIONS): Update help descriptions. (PARSE_AND_LIST_ARGS_CASES): Add new options to parser. * testsuite/ld-aarch64/aarch64-elf.exp: Add new run_dump_tests. * testsuite/ld-aarch64/erratum843419-adr.d: New test. * testsuite/ld-aarch64/erratum843419-adrp.d: New test. * testsuite/ld-aarch64/erratum843419-far-adr.d: New test. * testsuite/ld-aarch64/erratum843419-far-full.d: New test. * testsuite/ld-aarch64/erratum843419-far.s: New test. * testsuite/ld-aarch64/erratum843419-full.d: New test. * testsuite/ld-aarch64/erratum843419-near.s: New test. * testsuite/ld-aarch64/erratum843419-no-args.d: New test.
2019-05-21 14:04:08 +02:00
if (htab->fix_erratum_843419 != ERRAT_NONE)
[AArch64] Workaround for Cortex A53 erratum 843419 Some early revisions of the Cortex-A53 have an erratum (843419). The details of the erratum are quite complex and involve dynamic conditions. For the purposes of the workaround we have simplified the static conditions to an ADRP in the last two instructions of a 4KByte page, followed within four instructions by a load/store dependent on the ADRP. This patch adds support to conservatively scan for and workaround Cortex A53 erratum 843419. There are two different workaround strategies used. The first is to rewrite ADRP instructions which form part of an erratum sequence with an ADR instruction. In situations where the ADR provides insufficient offset the dependent load or store instruction from the sequence is moved to a stub section and branches are inserted from the original sequence to the relocated instruction and back again. Stub section sizes are rounded up to a multiple of 4096 in order to ensure that the act of inserting work around stubs does not create more errata sequences. Workaround stubs are always inserted into the stub section associated with the input section containing the erratum sequence. This ensures that the fully relocated form of the veneered load store instruction is available at the point in time when the stub section is written.
2015-02-24 13:04:41 +01:00
{
bfd *input_bfd;
for (input_bfd = info->input_bfds;
input_bfd != NULL;
input_bfd = input_bfd->link.next)
{
asection *section;
elf_backend_section_flags and _bfd_elf_init_private_section_data I was looking at elf_backend_section_flags as a means of setting SEC_SMALL_DATA for .sdata, .sbss and the like, and condidered adding an asection* parameter to access the section name easily before realising that hdr->bfd_section of course makes the section available. So no new parameter needed. In fact the flagword* parameter isn't needed either, so out it goes. The patch also tidies some horrible code in _bfd_elf_new_section_hook that can change whether known ABI sections have sh_type and sh_flags set up depending on which of the bfd_make_section functions is used. (Some of those set section flags before _bfd_elf_new_section_hook is called, others leave the flags zero.) The function also had some hacks for .init_array and .fini_array to affect how _bfd_elf_init_private_section_data behaved for those sections. It's cleaner to do that in _bfd_elf_init_private_section_data. So that all goes and we now init sh_type and sh_flags for all known ABI sections in _bfd_elf_new_section_hook. _bfd_elf_init_private_section_data is changed to suit, and now doesn't just single out SHT_INIT_ARRAY and SHT_FINI_ARRAY but rather any of the special section types. The _bfd_elf_new_section_hook change resulting in +FAIL: ld-aarch64/erratum835769-843419 exposing some errors in the aarch64 backend. elfNN_aarch64_size_stubs should not be looking at linker created sections in the stub bfd. Nor should code like "symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr" be run without first checking that input_bfd is ELF. * elf-bfd.h (elf_backend_section_flags): Remove flagword* param. * elf.c (_bfd_elf_make_section_from_shdr): Set section flags before calling elf_backend_section_flags with adjusted params. Use newsect->flags past that point. (_bfd_elf_new_section_hook): Always set sh_type and sh_flags for special sections. (_bfd_elf_init_private_section_data): Allow normal sh_type sections to have their type overridden, and all sh_flags but processor and os specific. * elf32-arm.c (elf32_arm_section_flags): Adjust for changed params. * elf32-mep.c (mep_elf_section_flags): Likewise. * elf32-nios2.c (nios2_elf32_section_flags): Likewise. * elf64-alpha.c (elf64_alpha_section_flags): Likewise. * elf64-ia64-vms.c (elf64_ia64_section_flags): Likewise. * elfnn-ia64.c (elfNN_ia64_section_flags): Likewise. * elfnn-aarch64.c (elfNN_aarch64_size_stubs): Exclude the linker stub BFD and non-aarch64 input files when scanning for stubs.
2020-03-02 00:46:02 +01:00
if (!is_aarch64_elf (input_bfd)
|| (input_bfd->flags & BFD_LINKER_CREATED) != 0)
continue;
[AArch64] Workaround for Cortex A53 erratum 843419 Some early revisions of the Cortex-A53 have an erratum (843419). The details of the erratum are quite complex and involve dynamic conditions. For the purposes of the workaround we have simplified the static conditions to an ADRP in the last two instructions of a 4KByte page, followed within four instructions by a load/store dependent on the ADRP. This patch adds support to conservatively scan for and workaround Cortex A53 erratum 843419. There are two different workaround strategies used. The first is to rewrite ADRP instructions which form part of an erratum sequence with an ADR instruction. In situations where the ADR provides insufficient offset the dependent load or store instruction from the sequence is moved to a stub section and branches are inserted from the original sequence to the relocated instruction and back again. Stub section sizes are rounded up to a multiple of 4096 in order to ensure that the act of inserting work around stubs does not create more errata sequences. Workaround stubs are always inserted into the stub section associated with the input section containing the erratum sequence. This ensures that the fully relocated form of the veneered load store instruction is available at the point in time when the stub section is written.
2015-02-24 13:04:41 +01:00
for (section = input_bfd->sections;
section != NULL;
section = section->next)
if (!_bfd_aarch64_erratum_843419_scan (input_bfd, section, info))
return FALSE;
}
_bfd_aarch64_resize_stubs (htab);
(*htab->layout_sections_again) ();
[AArch64] Refactor generation of 835769 workaround stubs. This patch recognizes that we only need to perform one scan for the 835769 errata and that this scan can take place before we insert branch stubs. The erratum scan code is relocated and adjusted to create stub entries directly rather than populating an intermediate representation. Since stub entries are created immediately we can drop the adhoc stub size adjustment code and allow the generic stub sizing code to deal with 835769 stub entries. This patch restructures the code but does not change the workaround used to deal with erratum 83679, the exact placement of workaround stubs in the final image may change slightly after this patch due to stubs being created in a different order.
2015-03-20 20:08:00 +01:00
}
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
while (1)
{
bfd *input_bfd;
[AArch64] Remove unused variable.
2015-03-22 08:59:48 +01:00
for (input_bfd = info->input_bfds;
input_bfd != NULL; input_bfd = input_bfd->link.next)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
Elf_Internal_Shdr *symtab_hdr;
asection *section;
Elf_Internal_Sym *local_syms = NULL;
elf_backend_section_flags and _bfd_elf_init_private_section_data I was looking at elf_backend_section_flags as a means of setting SEC_SMALL_DATA for .sdata, .sbss and the like, and condidered adding an asection* parameter to access the section name easily before realising that hdr->bfd_section of course makes the section available. So no new parameter needed. In fact the flagword* parameter isn't needed either, so out it goes. The patch also tidies some horrible code in _bfd_elf_new_section_hook that can change whether known ABI sections have sh_type and sh_flags set up depending on which of the bfd_make_section functions is used. (Some of those set section flags before _bfd_elf_new_section_hook is called, others leave the flags zero.) The function also had some hacks for .init_array and .fini_array to affect how _bfd_elf_init_private_section_data behaved for those sections. It's cleaner to do that in _bfd_elf_init_private_section_data. So that all goes and we now init sh_type and sh_flags for all known ABI sections in _bfd_elf_new_section_hook. _bfd_elf_init_private_section_data is changed to suit, and now doesn't just single out SHT_INIT_ARRAY and SHT_FINI_ARRAY but rather any of the special section types. The _bfd_elf_new_section_hook change resulting in +FAIL: ld-aarch64/erratum835769-843419 exposing some errors in the aarch64 backend. elfNN_aarch64_size_stubs should not be looking at linker created sections in the stub bfd. Nor should code like "symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr" be run without first checking that input_bfd is ELF. * elf-bfd.h (elf_backend_section_flags): Remove flagword* param. * elf.c (_bfd_elf_make_section_from_shdr): Set section flags before calling elf_backend_section_flags with adjusted params. Use newsect->flags past that point. (_bfd_elf_new_section_hook): Always set sh_type and sh_flags for special sections. (_bfd_elf_init_private_section_data): Allow normal sh_type sections to have their type overridden, and all sh_flags but processor and os specific. * elf32-arm.c (elf32_arm_section_flags): Adjust for changed params. * elf32-mep.c (mep_elf_section_flags): Likewise. * elf32-nios2.c (nios2_elf32_section_flags): Likewise. * elf64-alpha.c (elf64_alpha_section_flags): Likewise. * elf64-ia64-vms.c (elf64_ia64_section_flags): Likewise. * elfnn-ia64.c (elfNN_ia64_section_flags): Likewise. * elfnn-aarch64.c (elfNN_aarch64_size_stubs): Exclude the linker stub BFD and non-aarch64 input files when scanning for stubs.
2020-03-02 00:46:02 +01:00
if (!is_aarch64_elf (input_bfd)
|| (input_bfd->flags & BFD_LINKER_CREATED) != 0)
continue;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* We'll need the symbol table in a second. */
symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
if (symtab_hdr->sh_info == 0)
continue;
/* Walk over each section attached to the input bfd. */
for (section = input_bfd->sections;
section != NULL; section = section->next)
{
Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
/* If there aren't any relocs, then there's nothing more
to do. */
if ((section->flags & SEC_RELOC) == 0
|| section->reloc_count == 0
|| (section->flags & SEC_CODE) == 0)
continue;
/* If this section is a link-once section that will be
discarded, then don't create any stubs. */
if (section->output_section == NULL
|| section->output_section->owner != output_bfd)
continue;
/* Get the relocs. */
internal_relocs
= _bfd_elf_link_read_relocs (input_bfd, section, NULL,
NULL, info->keep_memory);
if (internal_relocs == NULL)
goto error_ret_free_local;
/* Now examine each relocation. */
irela = internal_relocs;
irelaend = irela + section->reloc_count;
for (; irela < irelaend; irela++)
{
unsigned int r_type, r_indx;
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
enum elf_aarch64_stub_type stub_type;
struct elf_aarch64_stub_hash_entry *stub_entry;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
asection *sym_sec;
bfd_vma sym_value;
bfd_vma destination;
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
struct elf_aarch64_link_hash_entry *hash;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
const char *sym_name;
char *stub_name;
const asection *id_sec;
unsigned char st_type;
bfd_size_type len;
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
r_type = ELFNN_R_TYPE (irela->r_info);
r_indx = ELFNN_R_SYM (irela->r_info);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
if (r_type >= (unsigned int) R_AARCH64_end)
{
bfd_set_error (bfd_error_bad_value);
error_ret_free_internal:
if (elf_section_data (section)->relocs == NULL)
free (internal_relocs);
goto error_ret_free_local;
}
/* Only look for stubs on unconditional branch and
branch and link instructions. */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
if (r_type != (unsigned int) AARCH64_R (CALL26)
&& r_type != (unsigned int) AARCH64_R (JUMP26))
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
continue;
/* Now determine the call target, its name, value,
section. */
sym_sec = NULL;
sym_value = 0;
destination = 0;
hash = NULL;
sym_name = NULL;
if (r_indx < symtab_hdr->sh_info)
{
/* It's a local symbol. */
Elf_Internal_Sym *sym;
Elf_Internal_Shdr *hdr;
if (local_syms == NULL)
{
local_syms
= (Elf_Internal_Sym *) symtab_hdr->contents;
if (local_syms == NULL)
local_syms
= bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
symtab_hdr->sh_info, 0,
NULL, NULL, NULL);
if (local_syms == NULL)
goto error_ret_free_internal;
}
sym = local_syms + r_indx;
hdr = elf_elfsections (input_bfd)[sym->st_shndx];
sym_sec = hdr->bfd_section;
if (!sym_sec)
/* This is an undefined symbol. It can never
be resolved. */
continue;
if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
sym_value = sym->st_value;
destination = (sym_value + irela->r_addend
+ sym_sec->output_offset
+ sym_sec->output_section->vma);
st_type = ELF_ST_TYPE (sym->st_info);
sym_name
= bfd_elf_string_from_elf_section (input_bfd,
symtab_hdr->sh_link,
sym->st_name);
}
else
{
int e_indx;
e_indx = r_indx - symtab_hdr->sh_info;
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
hash = ((struct elf_aarch64_link_hash_entry *)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
elf_sym_hashes (input_bfd)[e_indx]);
while (hash->root.root.type == bfd_link_hash_indirect
|| hash->root.root.type == bfd_link_hash_warning)
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
hash = ((struct elf_aarch64_link_hash_entry *)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
hash->root.root.u.i.link);
if (hash->root.root.type == bfd_link_hash_defined
|| hash->root.root.type == bfd_link_hash_defweak)
{
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
struct elf_aarch64_link_hash_table *globals =
elf_aarch64_hash_table (info);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
sym_sec = hash->root.root.u.def.section;
sym_value = hash->root.root.u.def.value;
/* For a destination in a shared library,
use the PLT stub as target address to
decide whether a branch stub is
needed. */
if (globals->root.splt != NULL && hash != NULL
&& hash->root.plt.offset != (bfd_vma) - 1)
{
sym_sec = globals->root.splt;
sym_value = hash->root.plt.offset;
if (sym_sec->output_section != NULL)
destination = (sym_value
+ sym_sec->output_offset
+
sym_sec->output_section->vma);
}
else if (sym_sec->output_section != NULL)
destination = (sym_value + irela->r_addend
+ sym_sec->output_offset
+ sym_sec->output_section->vma);
}
else if (hash->root.root.type == bfd_link_hash_undefined
|| (hash->root.root.type
== bfd_link_hash_undefweak))
{
/* For a shared library, use the PLT stub as
target address to decide whether a long
branch stub is needed.
For absolute code, they cannot be handled. */
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
struct elf_aarch64_link_hash_table *globals =
elf_aarch64_hash_table (info);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
if (globals->root.splt != NULL && hash != NULL
&& hash->root.plt.offset != (bfd_vma) - 1)
{
sym_sec = globals->root.splt;
sym_value = hash->root.plt.offset;
if (sym_sec->output_section != NULL)
destination = (sym_value
+ sym_sec->output_offset
+
sym_sec->output_section->vma);
}
else
continue;
}
else
{
bfd_set_error (bfd_error_bad_value);
goto error_ret_free_internal;
}
st_type = ELF_ST_TYPE (hash->root.type);
sym_name = hash->root.root.root.string;
}
/* Determine what (if any) linker stub is needed. */
[AArch64] Remove redundant calculation of plt stub destination for veneer elfNN_aarch64_size_stubs, the caller of aarch64_type_stub has redirected the final destination of long branch veneer to plt stub if the call should go through it. It's redundant to do the same check and redirect again from scratch inside aarch64_type_stub. bfd/ * elfnn-aarch64. (aarch64_type_of_stub): Remove redundation calcuation for destination. Remove useless function parameters. (elfNN_aarch64_size_stubs): Update parameters for aarch64_type_of_stub.
2016-02-22 13:16:06 +01:00
stub_type = aarch64_type_of_stub (section, irela, sym_sec,
st_type, destination);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
if (stub_type == aarch64_stub_none)
continue;
/* Support for grouping stub sections. */
id_sec = htab->stub_group[section->id].link_sec;
/* Get the name of this stub. */
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
stub_name = elfNN_aarch64_stub_name (id_sec, sym_sec, hash,
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
irela);
if (!stub_name)
goto error_ret_free_internal;
stub_entry =
aarch64_stub_hash_lookup (&htab->stub_hash_table,
stub_name, FALSE, FALSE);
if (stub_entry != NULL)
{
/* The proper stub has already been created. */
free (stub_name);
Fix AArch64 stub layout algorithm to allow for the fact that section layut might change a stub's target location. PR 23560 * elfnn-aarch64.c (elfNN_aarch64_size_stubs): Always update the stub's target, since it may have been changed after the layout.
2018-08-22 11:04:09 +02:00
/* Always update this stub's target since it may have
changed after layout. */
stub_entry->target_value = sym_value + irela->r_addend;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
continue;
}
[AArch64] Factor out common behaviour between elf_aarch64_create_or_find_stub_sec and elfNN_aarch64_add_stub
2015-02-28 01:10:21 +01:00
stub_entry = _bfd_aarch64_add_stub_entry_in_group
(stub_name, section, htab);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
if (stub_entry == NULL)
{
free (stub_name);
goto error_ret_free_internal;
}
[AArch64] Relax long branch veneer insertion for non STT_FUNC symbol As defined at AArch64 ELF Specification (4.6.7 Call and Jump relocations), symbol with type of non STT_FUNC but in different input section with relocation place should insert long branch veneer also. Meanwhile the current long branch veneer infrastructure havn't considered the situation where the branch destination is "sym_value + rela->addend". This was OK because we only insert veneer for long call destination is STT_FUNC symbol for which the addend is always zero. But as we relax the support to other situations by this patch, we need to handle addend be non-zero value. For example, for static function, relocation against "local symbol" are turned into relocation against "section symbol + offset" where there is a valid addend. bfd/ * elfnn-aarch64.c (aarch64_type_of_stub): Allow insert long branch veneer for sym_sec != input_sec. (elfNN_aarch64_size_stub): Support STT_SECTION symbol. (elfNN_aarch64_final_link_relocate): Take rela addend into account when calculation destination. ld/ * testsuite/ld-aarch64/farcall-section.d: Delete. * testsuite/ld-aarch64/farcall-section.s: Delete. * testsuite/ld-aarch64/farcall-b-section.d: New expectation file. * testsuite/ld-aarch64/farcall-bl-section.d: Likewise. * testsuite/ld-aarch64/farcall-b-section.s: New testcase. * testsuite/ld-aarch64/farcall-bl-section.s: Likewise. * testsuite/ld-aarch64/aarch64-elf.exp: Likewise.
2016-01-20 17:57:59 +01:00
stub_entry->target_value = sym_value + irela->r_addend;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
stub_entry->target_section = sym_sec;
stub_entry->stub_type = stub_type;
stub_entry->h = hash;
stub_entry->st_type = st_type;
if (sym_name == NULL)
sym_name = "unnamed";
len = sizeof (STUB_ENTRY_NAME) + strlen (sym_name);
stub_entry->output_name = bfd_alloc (htab->stub_bfd, len);
if (stub_entry->output_name == NULL)
{
free (stub_name);
goto error_ret_free_internal;
}
snprintf (stub_entry->output_name, len, STUB_ENTRY_NAME,
sym_name);
stub_changed = TRUE;
}
/* We're done with the internal relocs, free them. */
if (elf_section_data (section)->relocs == NULL)
free (internal_relocs);
}
}
if (!stub_changed)
break;
[AArch64] Factor out _bfd_aarch64_resize_stubs()
2015-03-20 21:20:35 +01:00
_bfd_aarch64_resize_stubs (htab);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* Ask the linker to do its stuff. */
(*htab->layout_sections_again) ();
stub_changed = FALSE;
}
return TRUE;
Indent labels Labels don't go in the first column according to standard emacs C indent rules, and I got annoyed enough at seeing diff -p show a label rather than the function name to fix this. bfd/ * aoutx.h: Indent labels correctly. Format error strings. * archive.c: Likewise. * archive64.c: Likewise. * coff-arm.c: Likewise. * coff-rs6000.c: Likewise. * coff-stgo32.c: Likewise. * cpu-arm.c: Likewise. * dwarf2.c: Likewise. * elf-ifunc.c: Likewise. * elf-properties.c: Likewise. * elf-s390-common.c: Likewise. * elf-strtab.c: Likewise. * elf.c: Likewise. * elf32-arm.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cr16.c: Likewise. * elf32-csky.c: Likewise. * elf32-i386.c: Likewise. * elf32-m68k.c: Likewise. * elf32-msp430.c: Likewise. * elf32-nds32.c: Likewise. * elf32-nios2.c: Likewise. * elf32-pru.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-x86-64.c: Likewise. * elfcode.h: Likewise. * elfcore.h: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * elfnn-riscv.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-x86.c: Likewise. * i386lynx.c: Likewise. * merge.c: Likewise. * pdp11.c: Likewise. * plugin.c: Likewise. * reloc.c: Likewise. binutils/ * elfedit.c: Indent labels correctly. * readelf.c: Likewise. * resres.c: Likewise. gas/ * config/obj-elf.c: Indent labels correctly. * config/obj-macho.c: Likewise. * config/tc-aarch64.c: Likewise. * config/tc-alpha.c: Likewise. * config/tc-arm.c: Likewise. * config/tc-cr16.c: Likewise. * config/tc-crx.c: Likewise. * config/tc-frv.c: Likewise. * config/tc-i386-intel.c: Likewise. * config/tc-i386.c: Likewise. * config/tc-ia64.c: Likewise. * config/tc-mn10200.c: Likewise. * config/tc-mn10300.c: Likewise. * config/tc-nds32.c: Likewise. * config/tc-riscv.c: Likewise. * config/tc-s12z.c: Likewise. * config/tc-xtensa.c: Likewise. * config/tc-z80.c: Likewise. * read.c: Likewise. * symbols.c: Likewise. * write.c: Likewise. ld/ * emultempl/cskyelf.em: Indent labels correctly. * ldfile.c: Likewise. * ldlang.c: Likewise. * plugin.c: Likewise. opcodes/ * aarch64-asm.c: Indent labels correctly. * aarch64-dis.c: Likewise. * aarch64-gen.c: Likewise. * aarch64-opc.c: Likewise. * alpha-dis.c: Likewise. * i386-dis.c: Likewise. * nds32-asm.c: Likewise. * nfp-dis.c: Likewise. * visium-dis.c: Likewise.
2020-02-25 06:04:46 +01:00
error_ret_free_local:
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
return FALSE;
}
/* Build all the stubs associated with the current output file. The
stubs are kept in a hash table attached to the main linker hash
table. We also set up the .plt entries for statically linked PIC
functions here. This function is called via aarch64_elf_finish in the
linker. */
bfd_boolean
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_build_stubs (struct bfd_link_info *info)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
asection *stub_sec;
struct bfd_hash_table *table;
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
struct elf_aarch64_link_hash_table *htab;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
htab = elf_aarch64_hash_table (info);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
for (stub_sec = htab->stub_bfd->sections;
stub_sec != NULL; stub_sec = stub_sec->next)
{
bfd_size_type size;
/* Ignore non-stub sections. */
if (!strstr (stub_sec->name, STUB_SUFFIX))
continue;
/* Allocate memory to hold the linker stubs. */
size = stub_sec->size;
stub_sec->contents = bfd_zalloc (htab->stub_bfd, size);
if (stub_sec->contents == NULL && size != 0)
return FALSE;
stub_sec->size = 0;
[AArch64] Implement branch over stub section. Ensure that injection of a stub section does not break a link where there is an xpectation that flow of control can pass from one input section to another simply by linking the input sections in series. The solution here is to allow stub sections to be inserted after any input section (existing behaviour), but inject an additional branch at the start of each stub section such that control flow falling into the stub section will branch over the stub section.
2015-03-22 09:31:18 +01:00
Ensure 8-byte alignment for AArch64 stubs. PR 22903 bfd * elfnn-aarch64.c (_bfd_aarch64_resize_stubs): Add 8 bytes for branch and nop instead of 4. (elfNN_arch64_build_stubs): Add nop after branch. Increase size by 8 instead of 4. ld * emultempl/aarch64elf.em (elf${ELFSIZE}_aarch64_add_stub_section): Give stub_sec 8 byte alignment. * emulparams/aarch64cloudabi.sh (NOP): Set to 0x1f2003d5. * emulparams/aarch64elf.sh (NOP): Likewise. * emulparams/aarch64elf32.sh (NOP): Likewise. * emulparams/aarch64fbsd.sh (NOP): Likewise. * emulparams/aarch64linux.sh (NOP): Likewise. * emulparams/aarch64linux32.sh (NOP): Likewise. * testsuite/ld-aarch64/erratum835769.d: Adjust for added nop. * testsuite/ld-aarch64/erratum843419.d: Likewise. * testsuite/ld-aarch64/farcall-b-defsym.d: Likewise. * testsuite/ld-aarch64/farcall-b-none-function.d: Likewise. * testsuite/ld-aarch64/farcall-b-plt.d: Likewise. * testsuite/ld-aarch64/farcall-b-section.d: Likewise. * testsuite/ld-aarch64/farcall-b.d: Likewise. * testsuite/ld-aarch64/farcall-back.d: Likewise. * testsuite/ld-aarch64/farcall-bl-defsym.d: Likewise. * testsuite/ld-aarch64/farcall-bl-none-function.d: Likewise. * testsuite/ld-aarch64/farcall-bl-plt.d: Likewise. * testsuite/ld-aarch64/farcall-bl-section.d: Likewise. * testsuite/ld-aarch64/farcall-bl.d: Likewise.
2018-03-02 11:47:25 +01:00
/* Add a branch around the stub section, and a nop, to keep it 8 byte
aligned, as long branch stubs contain a 64-bit address. */
[AArch64] Implement branch over stub section. Ensure that injection of a stub section does not break a link where there is an xpectation that flow of control can pass from one input section to another simply by linking the input sections in series. The solution here is to allow stub sections to be inserted after any input section (existing behaviour), but inject an additional branch at the start of each stub section such that control flow falling into the stub section will branch over the stub section.
2015-03-22 09:31:18 +01:00
bfd_putl32 (0x14000000 | (size >> 2), stub_sec->contents);
Ensure 8-byte alignment for AArch64 stubs. PR 22903 bfd * elfnn-aarch64.c (_bfd_aarch64_resize_stubs): Add 8 bytes for branch and nop instead of 4. (elfNN_arch64_build_stubs): Add nop after branch. Increase size by 8 instead of 4. ld * emultempl/aarch64elf.em (elf${ELFSIZE}_aarch64_add_stub_section): Give stub_sec 8 byte alignment. * emulparams/aarch64cloudabi.sh (NOP): Set to 0x1f2003d5. * emulparams/aarch64elf.sh (NOP): Likewise. * emulparams/aarch64elf32.sh (NOP): Likewise. * emulparams/aarch64fbsd.sh (NOP): Likewise. * emulparams/aarch64linux.sh (NOP): Likewise. * emulparams/aarch64linux32.sh (NOP): Likewise. * testsuite/ld-aarch64/erratum835769.d: Adjust for added nop. * testsuite/ld-aarch64/erratum843419.d: Likewise. * testsuite/ld-aarch64/farcall-b-defsym.d: Likewise. * testsuite/ld-aarch64/farcall-b-none-function.d: Likewise. * testsuite/ld-aarch64/farcall-b-plt.d: Likewise. * testsuite/ld-aarch64/farcall-b-section.d: Likewise. * testsuite/ld-aarch64/farcall-b.d: Likewise. * testsuite/ld-aarch64/farcall-back.d: Likewise. * testsuite/ld-aarch64/farcall-bl-defsym.d: Likewise. * testsuite/ld-aarch64/farcall-bl-none-function.d: Likewise. * testsuite/ld-aarch64/farcall-bl-plt.d: Likewise. * testsuite/ld-aarch64/farcall-bl-section.d: Likewise. * testsuite/ld-aarch64/farcall-bl.d: Likewise.
2018-03-02 11:47:25 +01:00
bfd_putl32 (INSN_NOP, stub_sec->contents + 4);
stub_sec->size += 8;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
}
/* Build the stubs as directed by the stub hash table. */
table = &htab->stub_hash_table;
bfd_hash_traverse (table, aarch64_build_one_stub, info);
return TRUE;
}
/* Add an entry to the code/data map for section SEC. */
static void
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_section_map_add (asection *sec, char type, bfd_vma vma)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
struct _aarch64_elf_section_data *sec_data =
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elf_aarch64_section_data (sec);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
unsigned int newidx;
if (sec_data->map == NULL)
{
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
sec_data->map = bfd_malloc (sizeof (elf_aarch64_section_map));
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
sec_data->mapcount = 0;
sec_data->mapsize = 1;
}
newidx = sec_data->mapcount++;
if (sec_data->mapcount > sec_data->mapsize)
{
sec_data->mapsize *= 2;
sec_data->map = bfd_realloc_or_free
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
(sec_data->map, sec_data->mapsize * sizeof (elf_aarch64_section_map));
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
}
if (sec_data->map)
{
sec_data->map[newidx].vma = vma;
sec_data->map[newidx].type = type;
}
}
/* Initialise maps of insn/data for input BFDs. */
void
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
bfd_elfNN_aarch64_init_maps (bfd *abfd)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
Elf_Internal_Sym *isymbuf;
Elf_Internal_Shdr *hdr;
unsigned int i, localsyms;
/* Make sure that we are dealing with an AArch64 elf binary. */
if (!is_aarch64_elf (abfd))
return;
if ((abfd->flags & DYNAMIC) != 0)
[AArch64] Cortex-A53 erratum 835769 linker workaround 2014-10-22 Tejas Belagod <tejas.belagod@arm.com> bfd/ * bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter. * bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise. * elfnn-aarch64.c (aarch64_erratum_835769_stub): New. (elf_aarch64_stub_type): Add new type aarch64_stub_erratum_835769_veneer. (elf_aarch64_stub_hash_entry): New fields for erratum 835769. (aarch64_erratum_835769_fix): New data struct to record erratum 835769. (elf_aarch64_link_hash_table: Global flags for 835769. (aarch64_build_one_stub): Add case for 835769. (aarch64_size_one_stub): Likewise. (aarch64_mem_op_p, aarch64_mlxl_p, aarch64_erratum_sequence,erratum_835769_scan): New. Decode and scan functions for erratum 835769. (elf_aarch64_create_or_find_stub_sec): New. (elfNN_aarch64_size_stubs): Look for erratum 835769 and record them. (bfd_elfNN_aarch64_set_options: Set global flag for 835769. (erratum_835769_branch_to_stub_data, make_branch_to_erratum_835769_stub):New. Connect up all the erratum stubs to occurances by branches. (elfNN_aarch64_write_section): New hook. (aarch64_map_one_stub): Output erratum stub symbol. (elfNN_aarch64_size_dynamic_sections): Init mapping symbol information for erratum 835769. (elf_backend_write_section): Define. ld/ * emultempl/aarch64elf.em: Add command-line option for erratum 835769. ld/testsuite/ * ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum 835769 tests. * ld-aarch64/erratum835769.d: New. * ld-aarch64/erratum835769.s: New.
2014-10-24 12:39:35 +02:00
return;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
hdr = &elf_symtab_hdr (abfd);
localsyms = hdr->sh_info;
/* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
should contain the number of local symbols, which should come before any
global symbols. Mapping symbols are always local. */
isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL, NULL);
/* No internal symbols read? Skip this BFD. */
if (isymbuf == NULL)
return;
for (i = 0; i < localsyms; i++)
{
Elf_Internal_Sym *isym = &isymbuf[i];
asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
const char *name;
if (sec != NULL && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
{
name = bfd_elf_string_from_elf_section (abfd,
hdr->sh_link,
isym->st_name);
if (bfd_is_aarch64_special_symbol_name
(name, BFD_AARCH64_SPECIAL_SYM_TYPE_MAP))
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_section_map_add (sec, name[1], isym->st_value);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
}
}
}
[BFD, LD, AArch64, 2/3] Add --force-bti to enable BTI and to select BTI enabled PLTs This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds a new ld command line option: --force-bti. In the presence of this option, the linker enables BTI with the GNU_PROPERTY_AARCH64_FEATURE_1_BTI feature. This gives out warning in case of missing gnu notes for BTI in inputs. 2) It also defines a new set of BTI enabled PLTs. These are used either when all the inputs are marked with GNU_PROPERTY_AARCH64_FEATURE_1_BTI or when the new --force-bti option is used. This required adding new fields in elf_aarch64_link_hash_table so that we could make the PLT related information more generic. 3) It also defines a dynamic tag DT_AARCH64_BTI_PLT. The linker uses this whenever it picks BTI enabled PLTs. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * bfd-in.h (aarch64_plt_type, aarch64_enable_bti_type): New. (aarch64_bti_pac_info): New. (bfd_elf64_aarch64_set_options): Add aarch64_bti_pac_info argument. (bfd_elf32_aarch64_set_options): Likewise. * bfd-in2.h: Regenerate * elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): New. (PLT_BTI_SMALL_ENTRY_SIZE, PLT_BTI_TLSDESC_ENTRY_SIZE): New. (elfNN_aarch64_small_plt0_bti_entry): New. (elfNN_aarch64_small_plt_bti_entry): New. (elfNN_aarch64_tlsdesc_small_plt_bti_entry): New. (elf_aarch64_obj_tdata): Add no_bti_warn and plt_type fields. (elf_aarch64_link_hash_table): Add plt0_entry, plt_entry and tlsdesc_plt_entry_size fields. (elfNN_aarch64_link_hash_table_create): Initialise the new fields. (setup_plt_values): New helper function. (bfd_elfNN_aarch64_set_options): Use new bp_info to set plt sizes and bti enable type. (elfNN_aarch64_allocate_dynrelocs): Use new size members instead of fixed macros. (elfNN_aarch64_size_dynamic_sections): Likewise and add checks. (elfNN_aarch64_create_small_pltn_entry): Use new generic pointers to plt stubs instead of fixed ones and update filling them according to the need for bti. (elfNN_aarch64_init_small_plt0_entry): Likewise. (elfNN_aarch64_finish_dynamic_sections): Likewise. (get_plt_type, elfNN_aarch64_get_synthetic_symtab): New. (elfNN_aarch64_plt_sym_val): Update size accordingly. (elfNN_aarch64_link_setup_gnu_properties): Set up plts if BTI GNU NOTE is set. (bfd_elfNN_get_synthetic_symtab): Define. (elfNN_aarch64_merge_gnu_properties): Give out warning with --force-bti and mising BTI NOTE SECTION. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * readelf.c (get_aarch64_dynamic_type): New. (get_dynamic_type): Use above for EM_AARCH64. (dynamic_section_aarch64_val): New. (process_dynamic_section): Use above for EM_AARCH64. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * elf/aarch64.h (DT_AARCH64_BTI_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * NEWS: Document --force-bti. * emultempl/aarch64elf.em (plt_type, bti_type, OPTION_FORCE_BTI): New. (PARSE_AND_LIST_SHORTOPTS, PARSE_AND_LIST_OPTIONS): Add force-bti. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FORCE_BTI. * testsuite/ld-aarch64/aarch64-elf.exp: Add all the tests below. * testsuite/ld-aarch64/bti-plt-1.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: New test. * testsuite/ld-aarch64/bti-plt-2.s: New test. * testsuite/ld-aarch64/bti-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-3.d: New test. * testsuite/ld-aarch64/bti-plt-4.d: New test. * testsuite/ld-aarch64/bti-plt-5.d: New test. * testsuite/ld-aarch64/bti-plt-6.d: New test. * testsuite/ld-aarch64/bti-plt-7.d: New test. * testsuite/ld-aarch64/bti-plt-so.s: New test. * testsuite/ld-aarch64/bti-plt.ld: New test.
2019-03-13 11:54:30 +01:00
static void
setup_plt_values (struct bfd_link_info *link_info,
aarch64_plt_type plt_type)
{
struct elf_aarch64_link_hash_table *globals;
globals = elf_aarch64_hash_table (link_info);
[BFD, LD, AArch64, 3/3] Add --pac-plt to enable PLTs protected with PAC. This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds new definitions of PAC enabled PLTs and both BTI and PAC enabled PLTs. 2) It also defines the new dynamic tag DT_AARCH64_PAC_PLT for the PAC enabled PLTs. 3) This patch adds a new ld command line option: --pac-plt. In the presence of this option, the linker uses the PAC enabled PLTs and marks with DT_AARCH64_PAC_PLT. 4) In case both BTI and PAC are enabled the linker should pick PLTs enabled with both and also use dynamic tags for both. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * elfnn-aarch64.c (PLT_PAC_ENTRY_SIZE, PLT_PAC_SMALL_ENTRY_SIZE): New. (PLT_BTI_PAC_ENTRY_SIZE, PLT_BTI_PAC_SMALL_ENTRY_SIZE): New. (setup_plt_values): Account for PAC or PAC and BTI enabled PLTs. (elfNN_aarch64_size_dynamic_sections): Add checks for PLT_BTI_PAC and PLT_PAC_PLT. (elfNN_aarch64_finish_dynamic_sections): Account for PLT_BTI_PAC. (get_plt_type): Add case for DT_AARCH64_PAC_PLT. (elfNN_aarch64_plt_sym_val): Add cases for PLT_BTI_PAC and PLT_PAC. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * readelf.c (get_aarch64_dynamic_type): Add case for DT_AARCH64_PAC_PLT. (dynamic_section_aarch64_val): Likewise. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * elf/aarch64.h (DT_AARCH64_PAC_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * NEWS: Document --pac-plt. * emultempl/aarch64elf.em (OPTION_PAC_PLT): New. (PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS): Add pac-plt. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_PAC_PLT. * testsuite/ld-aarch64/aarch64-elf.exp: Add the following tests. * testsuite/ld-aarch64/bti-pac-plt-1.d: New test. * testsuite/ld-aarch64/bti-pac-plt-2.d: New test. * testsuite/ld-aarch64/pac-plt-1.d: New test. * testsuite/ld-aarch64/pac-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: Add .ifndef directive.
2019-03-13 12:09:10 +01:00
if (plt_type == PLT_BTI_PAC)
{
[BFD, AArch64] Improve bti/pac plts. This patch aims to improve the definitions of BTI and PAC based PLTs. The following changes are made: * PLT0 does not need PAC instructions since the PLTGOT[2] (and PLTGOT[1]) are readonly so they cannot be corrupted at runtime. Thus both PAC plt0 and BTI+PAC plt0 are removed and we can use basic plt0 and BTI plt0 instead, respectively. * We can remove the extra padding nops when we add the new bti instructions. BTI plt0 and BTI TLSDESC plt are updated. * For better performance PLTn could be padded to 24bytes. Both BTI pltn and PAC pltn are updated. *** bfd/ChangeLog *** 2019-04-25 Sudakshina Das <sudi.das@arm.com> * elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): Remove. (PLT_BTI_TLSDESC_ENTRY_SIZE): Remove. (PLT_PAC_ENTRY_SIZE, PLT_BTI_PAC_ENTRY_SIZE): Remove. (PLT_BTI_SMALL_ENTRY_SIZE, PLT_PAC_SMALL_ENTRY_SIZE): Update. (elfNN_aarch64_small_plt0_pac_entry): Remove. (elfNN_aarch64_small_plt0_bti_pac_entry): Remove. (elfNN_aarch64_small_plt0_bti_entry): Update. (elfNN_aarch64_small_plt_bti_entry): Update. (elfNN_aarch64_small_plt_pac_entry): Update. (elfNN_aarch64_tlsdesc_small_plt_bti_entry): Update. (setup_plt_values): Setup new entries. (elfNN_aarch64_finish_dynamic_sections): Remove size change. (elfNN_aarch64_plt_sym_val): Likewise. *** ld/ChangeLog *** 2019-04-25 Sudakshina Das <sudi.das@arm.com> * testsuite/ld-aarch64/bti-pac-plt-1.d: Update. * testsuite/ld-aarch64/bti-pac-plt-2.d: Update. * testsuite/ld-aarch64/bti-plt-1.d: Update. * testsuite/ld-aarch64/bti-plt-3.d: Update. * testsuite/ld-aarch64/bti-plt-5.d: Update. * testsuite/ld-aarch64/pac-plt-1.d: Update. * testsuite/ld-aarch64/pac-plt-2.d: Update.
2019-04-25 12:37:25 +02:00
globals->plt0_entry = elfNN_aarch64_small_plt0_bti_entry;
[BFD, LD, AArch64, 3/3] Add --pac-plt to enable PLTs protected with PAC. This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds new definitions of PAC enabled PLTs and both BTI and PAC enabled PLTs. 2) It also defines the new dynamic tag DT_AARCH64_PAC_PLT for the PAC enabled PLTs. 3) This patch adds a new ld command line option: --pac-plt. In the presence of this option, the linker uses the PAC enabled PLTs and marks with DT_AARCH64_PAC_PLT. 4) In case both BTI and PAC are enabled the linker should pick PLTs enabled with both and also use dynamic tags for both. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * elfnn-aarch64.c (PLT_PAC_ENTRY_SIZE, PLT_PAC_SMALL_ENTRY_SIZE): New. (PLT_BTI_PAC_ENTRY_SIZE, PLT_BTI_PAC_SMALL_ENTRY_SIZE): New. (setup_plt_values): Account for PAC or PAC and BTI enabled PLTs. (elfNN_aarch64_size_dynamic_sections): Add checks for PLT_BTI_PAC and PLT_PAC_PLT. (elfNN_aarch64_finish_dynamic_sections): Account for PLT_BTI_PAC. (get_plt_type): Add case for DT_AARCH64_PAC_PLT. (elfNN_aarch64_plt_sym_val): Add cases for PLT_BTI_PAC and PLT_PAC. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * readelf.c (get_aarch64_dynamic_type): Add case for DT_AARCH64_PAC_PLT. (dynamic_section_aarch64_val): Likewise. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * elf/aarch64.h (DT_AARCH64_PAC_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * NEWS: Document --pac-plt. * emultempl/aarch64elf.em (OPTION_PAC_PLT): New. (PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS): Add pac-plt. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_PAC_PLT. * testsuite/ld-aarch64/aarch64-elf.exp: Add the following tests. * testsuite/ld-aarch64/bti-pac-plt-1.d: New test. * testsuite/ld-aarch64/bti-pac-plt-2.d: New test. * testsuite/ld-aarch64/pac-plt-1.d: New test. * testsuite/ld-aarch64/pac-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: Add .ifndef directive.
2019-03-13 12:09:10 +01:00
/* Only in ET_EXEC we need PLTn with BTI. */
if (bfd_link_pde (link_info))
{
globals->plt_entry_size = PLT_BTI_PAC_SMALL_ENTRY_SIZE;
globals->plt_entry = elfNN_aarch64_small_plt_bti_pac_entry;
}
else
{
globals->plt_entry_size = PLT_PAC_SMALL_ENTRY_SIZE;
globals->plt_entry = elfNN_aarch64_small_plt_pac_entry;
}
}
else if (plt_type == PLT_BTI)
[BFD, LD, AArch64, 2/3] Add --force-bti to enable BTI and to select BTI enabled PLTs This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds a new ld command line option: --force-bti. In the presence of this option, the linker enables BTI with the GNU_PROPERTY_AARCH64_FEATURE_1_BTI feature. This gives out warning in case of missing gnu notes for BTI in inputs. 2) It also defines a new set of BTI enabled PLTs. These are used either when all the inputs are marked with GNU_PROPERTY_AARCH64_FEATURE_1_BTI or when the new --force-bti option is used. This required adding new fields in elf_aarch64_link_hash_table so that we could make the PLT related information more generic. 3) It also defines a dynamic tag DT_AARCH64_BTI_PLT. The linker uses this whenever it picks BTI enabled PLTs. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * bfd-in.h (aarch64_plt_type, aarch64_enable_bti_type): New. (aarch64_bti_pac_info): New. (bfd_elf64_aarch64_set_options): Add aarch64_bti_pac_info argument. (bfd_elf32_aarch64_set_options): Likewise. * bfd-in2.h: Regenerate * elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): New. (PLT_BTI_SMALL_ENTRY_SIZE, PLT_BTI_TLSDESC_ENTRY_SIZE): New. (elfNN_aarch64_small_plt0_bti_entry): New. (elfNN_aarch64_small_plt_bti_entry): New. (elfNN_aarch64_tlsdesc_small_plt_bti_entry): New. (elf_aarch64_obj_tdata): Add no_bti_warn and plt_type fields. (elf_aarch64_link_hash_table): Add plt0_entry, plt_entry and tlsdesc_plt_entry_size fields. (elfNN_aarch64_link_hash_table_create): Initialise the new fields. (setup_plt_values): New helper function. (bfd_elfNN_aarch64_set_options): Use new bp_info to set plt sizes and bti enable type. (elfNN_aarch64_allocate_dynrelocs): Use new size members instead of fixed macros. (elfNN_aarch64_size_dynamic_sections): Likewise and add checks. (elfNN_aarch64_create_small_pltn_entry): Use new generic pointers to plt stubs instead of fixed ones and update filling them according to the need for bti. (elfNN_aarch64_init_small_plt0_entry): Likewise. (elfNN_aarch64_finish_dynamic_sections): Likewise. (get_plt_type, elfNN_aarch64_get_synthetic_symtab): New. (elfNN_aarch64_plt_sym_val): Update size accordingly. (elfNN_aarch64_link_setup_gnu_properties): Set up plts if BTI GNU NOTE is set. (bfd_elfNN_get_synthetic_symtab): Define. (elfNN_aarch64_merge_gnu_properties): Give out warning with --force-bti and mising BTI NOTE SECTION. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * readelf.c (get_aarch64_dynamic_type): New. (get_dynamic_type): Use above for EM_AARCH64. (dynamic_section_aarch64_val): New. (process_dynamic_section): Use above for EM_AARCH64. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * elf/aarch64.h (DT_AARCH64_BTI_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * NEWS: Document --force-bti. * emultempl/aarch64elf.em (plt_type, bti_type, OPTION_FORCE_BTI): New. (PARSE_AND_LIST_SHORTOPTS, PARSE_AND_LIST_OPTIONS): Add force-bti. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FORCE_BTI. * testsuite/ld-aarch64/aarch64-elf.exp: Add all the tests below. * testsuite/ld-aarch64/bti-plt-1.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: New test. * testsuite/ld-aarch64/bti-plt-2.s: New test. * testsuite/ld-aarch64/bti-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-3.d: New test. * testsuite/ld-aarch64/bti-plt-4.d: New test. * testsuite/ld-aarch64/bti-plt-5.d: New test. * testsuite/ld-aarch64/bti-plt-6.d: New test. * testsuite/ld-aarch64/bti-plt-7.d: New test. * testsuite/ld-aarch64/bti-plt-so.s: New test. * testsuite/ld-aarch64/bti-plt.ld: New test.
2019-03-13 11:54:30 +01:00
{
globals->plt0_entry = elfNN_aarch64_small_plt0_bti_entry;
/* Only in ET_EXEC we need PLTn with BTI. */
if (bfd_link_pde (link_info))
{
globals->plt_entry_size = PLT_BTI_SMALL_ENTRY_SIZE;
globals->plt_entry = elfNN_aarch64_small_plt_bti_entry;
}
}
[BFD, LD, AArch64, 3/3] Add --pac-plt to enable PLTs protected with PAC. This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds new definitions of PAC enabled PLTs and both BTI and PAC enabled PLTs. 2) It also defines the new dynamic tag DT_AARCH64_PAC_PLT for the PAC enabled PLTs. 3) This patch adds a new ld command line option: --pac-plt. In the presence of this option, the linker uses the PAC enabled PLTs and marks with DT_AARCH64_PAC_PLT. 4) In case both BTI and PAC are enabled the linker should pick PLTs enabled with both and also use dynamic tags for both. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * elfnn-aarch64.c (PLT_PAC_ENTRY_SIZE, PLT_PAC_SMALL_ENTRY_SIZE): New. (PLT_BTI_PAC_ENTRY_SIZE, PLT_BTI_PAC_SMALL_ENTRY_SIZE): New. (setup_plt_values): Account for PAC or PAC and BTI enabled PLTs. (elfNN_aarch64_size_dynamic_sections): Add checks for PLT_BTI_PAC and PLT_PAC_PLT. (elfNN_aarch64_finish_dynamic_sections): Account for PLT_BTI_PAC. (get_plt_type): Add case for DT_AARCH64_PAC_PLT. (elfNN_aarch64_plt_sym_val): Add cases for PLT_BTI_PAC and PLT_PAC. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * readelf.c (get_aarch64_dynamic_type): Add case for DT_AARCH64_PAC_PLT. (dynamic_section_aarch64_val): Likewise. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * elf/aarch64.h (DT_AARCH64_PAC_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * NEWS: Document --pac-plt. * emultempl/aarch64elf.em (OPTION_PAC_PLT): New. (PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS): Add pac-plt. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_PAC_PLT. * testsuite/ld-aarch64/aarch64-elf.exp: Add the following tests. * testsuite/ld-aarch64/bti-pac-plt-1.d: New test. * testsuite/ld-aarch64/bti-pac-plt-2.d: New test. * testsuite/ld-aarch64/pac-plt-1.d: New test. * testsuite/ld-aarch64/pac-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: Add .ifndef directive.
2019-03-13 12:09:10 +01:00
else if (plt_type == PLT_PAC)
{
globals->plt_entry_size = PLT_PAC_SMALL_ENTRY_SIZE;
globals->plt_entry = elfNN_aarch64_small_plt_pac_entry;
}
[BFD, LD, AArch64, 2/3] Add --force-bti to enable BTI and to select BTI enabled PLTs This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds a new ld command line option: --force-bti. In the presence of this option, the linker enables BTI with the GNU_PROPERTY_AARCH64_FEATURE_1_BTI feature. This gives out warning in case of missing gnu notes for BTI in inputs. 2) It also defines a new set of BTI enabled PLTs. These are used either when all the inputs are marked with GNU_PROPERTY_AARCH64_FEATURE_1_BTI or when the new --force-bti option is used. This required adding new fields in elf_aarch64_link_hash_table so that we could make the PLT related information more generic. 3) It also defines a dynamic tag DT_AARCH64_BTI_PLT. The linker uses this whenever it picks BTI enabled PLTs. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * bfd-in.h (aarch64_plt_type, aarch64_enable_bti_type): New. (aarch64_bti_pac_info): New. (bfd_elf64_aarch64_set_options): Add aarch64_bti_pac_info argument. (bfd_elf32_aarch64_set_options): Likewise. * bfd-in2.h: Regenerate * elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): New. (PLT_BTI_SMALL_ENTRY_SIZE, PLT_BTI_TLSDESC_ENTRY_SIZE): New. (elfNN_aarch64_small_plt0_bti_entry): New. (elfNN_aarch64_small_plt_bti_entry): New. (elfNN_aarch64_tlsdesc_small_plt_bti_entry): New. (elf_aarch64_obj_tdata): Add no_bti_warn and plt_type fields. (elf_aarch64_link_hash_table): Add plt0_entry, plt_entry and tlsdesc_plt_entry_size fields. (elfNN_aarch64_link_hash_table_create): Initialise the new fields. (setup_plt_values): New helper function. (bfd_elfNN_aarch64_set_options): Use new bp_info to set plt sizes and bti enable type. (elfNN_aarch64_allocate_dynrelocs): Use new size members instead of fixed macros. (elfNN_aarch64_size_dynamic_sections): Likewise and add checks. (elfNN_aarch64_create_small_pltn_entry): Use new generic pointers to plt stubs instead of fixed ones and update filling them according to the need for bti. (elfNN_aarch64_init_small_plt0_entry): Likewise. (elfNN_aarch64_finish_dynamic_sections): Likewise. (get_plt_type, elfNN_aarch64_get_synthetic_symtab): New. (elfNN_aarch64_plt_sym_val): Update size accordingly. (elfNN_aarch64_link_setup_gnu_properties): Set up plts if BTI GNU NOTE is set. (bfd_elfNN_get_synthetic_symtab): Define. (elfNN_aarch64_merge_gnu_properties): Give out warning with --force-bti and mising BTI NOTE SECTION. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * readelf.c (get_aarch64_dynamic_type): New. (get_dynamic_type): Use above for EM_AARCH64. (dynamic_section_aarch64_val): New. (process_dynamic_section): Use above for EM_AARCH64. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * elf/aarch64.h (DT_AARCH64_BTI_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * NEWS: Document --force-bti. * emultempl/aarch64elf.em (plt_type, bti_type, OPTION_FORCE_BTI): New. (PARSE_AND_LIST_SHORTOPTS, PARSE_AND_LIST_OPTIONS): Add force-bti. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FORCE_BTI. * testsuite/ld-aarch64/aarch64-elf.exp: Add all the tests below. * testsuite/ld-aarch64/bti-plt-1.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: New test. * testsuite/ld-aarch64/bti-plt-2.s: New test. * testsuite/ld-aarch64/bti-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-3.d: New test. * testsuite/ld-aarch64/bti-plt-4.d: New test. * testsuite/ld-aarch64/bti-plt-5.d: New test. * testsuite/ld-aarch64/bti-plt-6.d: New test. * testsuite/ld-aarch64/bti-plt-7.d: New test. * testsuite/ld-aarch64/bti-plt-so.s: New test. * testsuite/ld-aarch64/bti-plt.ld: New test.
2019-03-13 11:54:30 +01:00
}
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* Set option values needed during linking. */
void
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
bfd_elfNN_aarch64_set_options (struct bfd *output_bfd,
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
struct bfd_link_info *link_info,
int no_enum_warn,
[AArch64] Cortex-A53 erratum 835769 linker workaround 2014-10-22 Tejas Belagod <tejas.belagod@arm.com> bfd/ * bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter. * bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise. * elfnn-aarch64.c (aarch64_erratum_835769_stub): New. (elf_aarch64_stub_type): Add new type aarch64_stub_erratum_835769_veneer. (elf_aarch64_stub_hash_entry): New fields for erratum 835769. (aarch64_erratum_835769_fix): New data struct to record erratum 835769. (elf_aarch64_link_hash_table: Global flags for 835769. (aarch64_build_one_stub): Add case for 835769. (aarch64_size_one_stub): Likewise. (aarch64_mem_op_p, aarch64_mlxl_p, aarch64_erratum_sequence,erratum_835769_scan): New. Decode and scan functions for erratum 835769. (elf_aarch64_create_or_find_stub_sec): New. (elfNN_aarch64_size_stubs): Look for erratum 835769 and record them. (bfd_elfNN_aarch64_set_options: Set global flag for 835769. (erratum_835769_branch_to_stub_data, make_branch_to_erratum_835769_stub):New. Connect up all the erratum stubs to occurances by branches. (elfNN_aarch64_write_section): New hook. (aarch64_map_one_stub): Output erratum stub symbol. (elfNN_aarch64_size_dynamic_sections): Init mapping symbol information for erratum 835769. (elf_backend_write_section): Define. ld/ * emultempl/aarch64elf.em: Add command-line option for erratum 835769. ld/testsuite/ * ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum 835769 tests. * ld-aarch64/erratum835769.d: New. * ld-aarch64/erratum835769.s: New.
2014-10-24 12:39:35 +02:00
int no_wchar_warn, int pic_veneer,
[AArch64] Workaround for Cortex A53 erratum 843419 Some early revisions of the Cortex-A53 have an erratum (843419). The details of the erratum are quite complex and involve dynamic conditions. For the purposes of the workaround we have simplified the static conditions to an ADRP in the last two instructions of a 4KByte page, followed within four instructions by a load/store dependent on the ADRP. This patch adds support to conservatively scan for and workaround Cortex A53 erratum 843419. There are two different workaround strategies used. The first is to rewrite ADRP instructions which form part of an erratum sequence with an ADR instruction. In situations where the ADR provides insufficient offset the dependent load or store instruction from the sequence is moved to a stub section and branches are inserted from the original sequence to the relocated instruction and back again. Stub section sizes are rounded up to a multiple of 4096 in order to ensure that the act of inserting work around stubs does not create more errata sequences. Workaround stubs are always inserted into the stub section associated with the input section containing the erratum sequence. This ensures that the fully relocated form of the veneered load store instruction is available at the point in time when the stub section is written.
2015-02-24 13:04:41 +01:00
int fix_erratum_835769,
AArch64: Implement choice between Cortex-A53 erratum workarounds. (PR ld/24373) The Cortex-A53 erratum currently has two ways it can resolve the erratum when using the flag --fix-cortex-a53-843419: 1) If the address is within the range of an ADR instruction it rewrites the ADRP into an ADR, and those doesn't need the use of a veneer. 2) If the address is not within range, it adds a branch to a veneer which will execute the final bit of the erratum workaround and branch back to the call site. When we do this we always generate the veneers and we always align the size of the text section to 4KB. This is because we only know which workaround we can use after all linking has finished and all addresses are known. This means even though the veneers are not used, we still generate the section and we still change the size of the input section. This is problematic for small memory devices as this would require the user to take about a ~4KB hit in memory even though it's not even used. Since there's no real way to restart the linking process from the final write phase this patch solves the issue by allowing the user more control over which erratum workaround gets used. Concretely this changes the option --fix-cortex-a53-843419 to take optional arguments --fix-cortex-a53-843419[=full|adr|adrp] - full (default): Use both ADRP and ADR workaround. This is equivalent to not specifying any options and is the default behavior before this patch. - adr: Only use the ADR workaround, this will not cause any increase in binary size but linking will fail if the referenced address is out of range of an ADR instruction. - adrp: Use only the ADRP workaround, this will never rewrite your ADRP. In the cases where the user knows how big their binaries are the `adr` option would prevent the unneeded overhead. bfd/ChangeLog: PR ld/24373 * bfd-in.h (enum erratum_84319_opts): New (bfd_elf64_aarch64_set_options, bfd_elf32_aarch64_set_options): Change int to enum erratum_84319_opts. * bfd-in2.h: Regenerate. * elfnn-aarch64.c (struct elf_aarch64_link_hash_table): Change fix_erratum_843419 to use new enum, remove fix_erratum_843419_adr. (_bfd_aarch64_add_stub_entry_after): Conditionally create erratum stub. (aarch64_size_one_stub): Conditionally size erratum 843419 stubs. (_bfd_aarch64_resize_stubs): Amend comment. (elfNN_aarch64_size_stubs): Don't generate stubs when no workaround requested. (bfd_elfNN_aarch64_set_options): Use new fix_erratum_843419 enum. (_bfd_aarch64_erratum_843419_branch_to_stub): Implement selection of erratum workaround. (clear_erratum_843419_entry): Update erratum conditional. ld/ChangeLog: PR ld/24373 * emultempl/aarch64elf.em (PARSE_AND_LIST_LONGOPTS): Add optional args to flags. * NEWS: Add changes to flag. (PARSE_AND_LIST_OPTIONS): Update help descriptions. (PARSE_AND_LIST_ARGS_CASES): Add new options to parser. * testsuite/ld-aarch64/aarch64-elf.exp: Add new run_dump_tests. * testsuite/ld-aarch64/erratum843419-adr.d: New test. * testsuite/ld-aarch64/erratum843419-adrp.d: New test. * testsuite/ld-aarch64/erratum843419-far-adr.d: New test. * testsuite/ld-aarch64/erratum843419-far-full.d: New test. * testsuite/ld-aarch64/erratum843419-far.s: New test. * testsuite/ld-aarch64/erratum843419-full.d: New test. * testsuite/ld-aarch64/erratum843419-near.s: New test. * testsuite/ld-aarch64/erratum843419-no-args.d: New test.
2019-05-21 14:04:08 +02:00
erratum_84319_opts fix_erratum_843419,
[BFD, LD, AArch64, 2/3] Add --force-bti to enable BTI and to select BTI enabled PLTs This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds a new ld command line option: --force-bti. In the presence of this option, the linker enables BTI with the GNU_PROPERTY_AARCH64_FEATURE_1_BTI feature. This gives out warning in case of missing gnu notes for BTI in inputs. 2) It also defines a new set of BTI enabled PLTs. These are used either when all the inputs are marked with GNU_PROPERTY_AARCH64_FEATURE_1_BTI or when the new --force-bti option is used. This required adding new fields in elf_aarch64_link_hash_table so that we could make the PLT related information more generic. 3) It also defines a dynamic tag DT_AARCH64_BTI_PLT. The linker uses this whenever it picks BTI enabled PLTs. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * bfd-in.h (aarch64_plt_type, aarch64_enable_bti_type): New. (aarch64_bti_pac_info): New. (bfd_elf64_aarch64_set_options): Add aarch64_bti_pac_info argument. (bfd_elf32_aarch64_set_options): Likewise. * bfd-in2.h: Regenerate * elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): New. (PLT_BTI_SMALL_ENTRY_SIZE, PLT_BTI_TLSDESC_ENTRY_SIZE): New. (elfNN_aarch64_small_plt0_bti_entry): New. (elfNN_aarch64_small_plt_bti_entry): New. (elfNN_aarch64_tlsdesc_small_plt_bti_entry): New. (elf_aarch64_obj_tdata): Add no_bti_warn and plt_type fields. (elf_aarch64_link_hash_table): Add plt0_entry, plt_entry and tlsdesc_plt_entry_size fields. (elfNN_aarch64_link_hash_table_create): Initialise the new fields. (setup_plt_values): New helper function. (bfd_elfNN_aarch64_set_options): Use new bp_info to set plt sizes and bti enable type. (elfNN_aarch64_allocate_dynrelocs): Use new size members instead of fixed macros. (elfNN_aarch64_size_dynamic_sections): Likewise and add checks. (elfNN_aarch64_create_small_pltn_entry): Use new generic pointers to plt stubs instead of fixed ones and update filling them according to the need for bti. (elfNN_aarch64_init_small_plt0_entry): Likewise. (elfNN_aarch64_finish_dynamic_sections): Likewise. (get_plt_type, elfNN_aarch64_get_synthetic_symtab): New. (elfNN_aarch64_plt_sym_val): Update size accordingly. (elfNN_aarch64_link_setup_gnu_properties): Set up plts if BTI GNU NOTE is set. (bfd_elfNN_get_synthetic_symtab): Define. (elfNN_aarch64_merge_gnu_properties): Give out warning with --force-bti and mising BTI NOTE SECTION. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * readelf.c (get_aarch64_dynamic_type): New. (get_dynamic_type): Use above for EM_AARCH64. (dynamic_section_aarch64_val): New. (process_dynamic_section): Use above for EM_AARCH64. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * elf/aarch64.h (DT_AARCH64_BTI_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * NEWS: Document --force-bti. * emultempl/aarch64elf.em (plt_type, bti_type, OPTION_FORCE_BTI): New. (PARSE_AND_LIST_SHORTOPTS, PARSE_AND_LIST_OPTIONS): Add force-bti. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FORCE_BTI. * testsuite/ld-aarch64/aarch64-elf.exp: Add all the tests below. * testsuite/ld-aarch64/bti-plt-1.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: New test. * testsuite/ld-aarch64/bti-plt-2.s: New test. * testsuite/ld-aarch64/bti-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-3.d: New test. * testsuite/ld-aarch64/bti-plt-4.d: New test. * testsuite/ld-aarch64/bti-plt-5.d: New test. * testsuite/ld-aarch64/bti-plt-6.d: New test. * testsuite/ld-aarch64/bti-plt-7.d: New test. * testsuite/ld-aarch64/bti-plt-so.s: New test. * testsuite/ld-aarch64/bti-plt.ld: New test.
2019-03-13 11:54:30 +01:00
int no_apply_dynamic_relocs,
aarch64_bti_pac_info bp_info)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
struct elf_aarch64_link_hash_table *globals;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
globals = elf_aarch64_hash_table (link_info);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
globals->pic_veneer = pic_veneer;
[AArch64] Cortex-A53 erratum 835769 linker workaround 2014-10-22 Tejas Belagod <tejas.belagod@arm.com> bfd/ * bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter. * bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise. * elfnn-aarch64.c (aarch64_erratum_835769_stub): New. (elf_aarch64_stub_type): Add new type aarch64_stub_erratum_835769_veneer. (elf_aarch64_stub_hash_entry): New fields for erratum 835769. (aarch64_erratum_835769_fix): New data struct to record erratum 835769. (elf_aarch64_link_hash_table: Global flags for 835769. (aarch64_build_one_stub): Add case for 835769. (aarch64_size_one_stub): Likewise. (aarch64_mem_op_p, aarch64_mlxl_p, aarch64_erratum_sequence,erratum_835769_scan): New. Decode and scan functions for erratum 835769. (elf_aarch64_create_or_find_stub_sec): New. (elfNN_aarch64_size_stubs): Look for erratum 835769 and record them. (bfd_elfNN_aarch64_set_options: Set global flag for 835769. (erratum_835769_branch_to_stub_data, make_branch_to_erratum_835769_stub):New. Connect up all the erratum stubs to occurances by branches. (elfNN_aarch64_write_section): New hook. (aarch64_map_one_stub): Output erratum stub symbol. (elfNN_aarch64_size_dynamic_sections): Init mapping symbol information for erratum 835769. (elf_backend_write_section): Define. ld/ * emultempl/aarch64elf.em: Add command-line option for erratum 835769. ld/testsuite/ * ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum 835769 tests. * ld-aarch64/erratum835769.d: New. * ld-aarch64/erratum835769.s: New.
2014-10-24 12:39:35 +02:00
globals->fix_erratum_835769 = fix_erratum_835769;
AArch64: Implement choice between Cortex-A53 erratum workarounds. (PR ld/24373) The Cortex-A53 erratum currently has two ways it can resolve the erratum when using the flag --fix-cortex-a53-843419: 1) If the address is within the range of an ADR instruction it rewrites the ADRP into an ADR, and those doesn't need the use of a veneer. 2) If the address is not within range, it adds a branch to a veneer which will execute the final bit of the erratum workaround and branch back to the call site. When we do this we always generate the veneers and we always align the size of the text section to 4KB. This is because we only know which workaround we can use after all linking has finished and all addresses are known. This means even though the veneers are not used, we still generate the section and we still change the size of the input section. This is problematic for small memory devices as this would require the user to take about a ~4KB hit in memory even though it's not even used. Since there's no real way to restart the linking process from the final write phase this patch solves the issue by allowing the user more control over which erratum workaround gets used. Concretely this changes the option --fix-cortex-a53-843419 to take optional arguments --fix-cortex-a53-843419[=full|adr|adrp] - full (default): Use both ADRP and ADR workaround. This is equivalent to not specifying any options and is the default behavior before this patch. - adr: Only use the ADR workaround, this will not cause any increase in binary size but linking will fail if the referenced address is out of range of an ADR instruction. - adrp: Use only the ADRP workaround, this will never rewrite your ADRP. In the cases where the user knows how big their binaries are the `adr` option would prevent the unneeded overhead. bfd/ChangeLog: PR ld/24373 * bfd-in.h (enum erratum_84319_opts): New (bfd_elf64_aarch64_set_options, bfd_elf32_aarch64_set_options): Change int to enum erratum_84319_opts. * bfd-in2.h: Regenerate. * elfnn-aarch64.c (struct elf_aarch64_link_hash_table): Change fix_erratum_843419 to use new enum, remove fix_erratum_843419_adr. (_bfd_aarch64_add_stub_entry_after): Conditionally create erratum stub. (aarch64_size_one_stub): Conditionally size erratum 843419 stubs. (_bfd_aarch64_resize_stubs): Amend comment. (elfNN_aarch64_size_stubs): Don't generate stubs when no workaround requested. (bfd_elfNN_aarch64_set_options): Use new fix_erratum_843419 enum. (_bfd_aarch64_erratum_843419_branch_to_stub): Implement selection of erratum workaround. (clear_erratum_843419_entry): Update erratum conditional. ld/ChangeLog: PR ld/24373 * emultempl/aarch64elf.em (PARSE_AND_LIST_LONGOPTS): Add optional args to flags. * NEWS: Add changes to flag. (PARSE_AND_LIST_OPTIONS): Update help descriptions. (PARSE_AND_LIST_ARGS_CASES): Add new options to parser. * testsuite/ld-aarch64/aarch64-elf.exp: Add new run_dump_tests. * testsuite/ld-aarch64/erratum843419-adr.d: New test. * testsuite/ld-aarch64/erratum843419-adrp.d: New test. * testsuite/ld-aarch64/erratum843419-far-adr.d: New test. * testsuite/ld-aarch64/erratum843419-far-full.d: New test. * testsuite/ld-aarch64/erratum843419-far.s: New test. * testsuite/ld-aarch64/erratum843419-full.d: New test. * testsuite/ld-aarch64/erratum843419-near.s: New test. * testsuite/ld-aarch64/erratum843419-no-args.d: New test.
2019-05-21 14:04:08 +02:00
/* If the default options are used, then ERRAT_ADR will be set by default
which will enable the ADRP->ADR workaround for the erratum 843419
workaround. */
[AArch64] Workaround for Cortex A53 erratum 843419 Some early revisions of the Cortex-A53 have an erratum (843419). The details of the erratum are quite complex and involve dynamic conditions. For the purposes of the workaround we have simplified the static conditions to an ADRP in the last two instructions of a 4KByte page, followed within four instructions by a load/store dependent on the ADRP. This patch adds support to conservatively scan for and workaround Cortex A53 erratum 843419. There are two different workaround strategies used. The first is to rewrite ADRP instructions which form part of an erratum sequence with an ADR instruction. In situations where the ADR provides insufficient offset the dependent load or store instruction from the sequence is moved to a stub section and branches are inserted from the original sequence to the relocated instruction and back again. Stub section sizes are rounded up to a multiple of 4096 in order to ensure that the act of inserting work around stubs does not create more errata sequences. Workaround stubs are always inserted into the stub section associated with the input section containing the erratum sequence. This ensures that the fully relocated form of the veneered load store instruction is available at the point in time when the stub section is written.
2015-02-24 13:04:41 +01:00
globals->fix_erratum_843419 = fix_erratum_843419;
[AArch64] Also puts value in place for R_AARCH64_RELATIVE When handling absolute relocations for global symbols bind within the shared object, AArch64 will generate one dynamic RELATIVE relocation, but won't apply the value for this absolution relocations at static linking stage. This is different from AArch64 gold linker and x86-64. This is not a bug as AArch64 is RELA, there is only guarantee that relocation addend is placed in the relocation entry. But some system softwares originally writen for x86-64 might assume AArch64 bfd linker gets the same behavior as x86-64, then they could take advantage of this buy skipping those RELATIVE dynamic relocations if the load address is the same as the static linking address. This patch makes AArch64 BFD linker applies absolution relocations at static linking stage for scenario described above. Meanwhile old AArch64 android loader has a bug (PR19163) which relies on current linker behavior as a workaround, so the same option --no-apply-dynamic-relocs added.
2016-05-03 12:59:37 +02:00
globals->no_apply_dynamic_relocs = no_apply_dynamic_relocs;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
BFD_ASSERT (is_aarch64_elf (output_bfd));
elf_aarch64_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
elf_aarch64_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn;
[BFD, LD, AArch64, 2/3] Add --force-bti to enable BTI and to select BTI enabled PLTs This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds a new ld command line option: --force-bti. In the presence of this option, the linker enables BTI with the GNU_PROPERTY_AARCH64_FEATURE_1_BTI feature. This gives out warning in case of missing gnu notes for BTI in inputs. 2) It also defines a new set of BTI enabled PLTs. These are used either when all the inputs are marked with GNU_PROPERTY_AARCH64_FEATURE_1_BTI or when the new --force-bti option is used. This required adding new fields in elf_aarch64_link_hash_table so that we could make the PLT related information more generic. 3) It also defines a dynamic tag DT_AARCH64_BTI_PLT. The linker uses this whenever it picks BTI enabled PLTs. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * bfd-in.h (aarch64_plt_type, aarch64_enable_bti_type): New. (aarch64_bti_pac_info): New. (bfd_elf64_aarch64_set_options): Add aarch64_bti_pac_info argument. (bfd_elf32_aarch64_set_options): Likewise. * bfd-in2.h: Regenerate * elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): New. (PLT_BTI_SMALL_ENTRY_SIZE, PLT_BTI_TLSDESC_ENTRY_SIZE): New. (elfNN_aarch64_small_plt0_bti_entry): New. (elfNN_aarch64_small_plt_bti_entry): New. (elfNN_aarch64_tlsdesc_small_plt_bti_entry): New. (elf_aarch64_obj_tdata): Add no_bti_warn and plt_type fields. (elf_aarch64_link_hash_table): Add plt0_entry, plt_entry and tlsdesc_plt_entry_size fields. (elfNN_aarch64_link_hash_table_create): Initialise the new fields. (setup_plt_values): New helper function. (bfd_elfNN_aarch64_set_options): Use new bp_info to set plt sizes and bti enable type. (elfNN_aarch64_allocate_dynrelocs): Use new size members instead of fixed macros. (elfNN_aarch64_size_dynamic_sections): Likewise and add checks. (elfNN_aarch64_create_small_pltn_entry): Use new generic pointers to plt stubs instead of fixed ones and update filling them according to the need for bti. (elfNN_aarch64_init_small_plt0_entry): Likewise. (elfNN_aarch64_finish_dynamic_sections): Likewise. (get_plt_type, elfNN_aarch64_get_synthetic_symtab): New. (elfNN_aarch64_plt_sym_val): Update size accordingly. (elfNN_aarch64_link_setup_gnu_properties): Set up plts if BTI GNU NOTE is set. (bfd_elfNN_get_synthetic_symtab): Define. (elfNN_aarch64_merge_gnu_properties): Give out warning with --force-bti and mising BTI NOTE SECTION. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * readelf.c (get_aarch64_dynamic_type): New. (get_dynamic_type): Use above for EM_AARCH64. (dynamic_section_aarch64_val): New. (process_dynamic_section): Use above for EM_AARCH64. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * elf/aarch64.h (DT_AARCH64_BTI_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * NEWS: Document --force-bti. * emultempl/aarch64elf.em (plt_type, bti_type, OPTION_FORCE_BTI): New. (PARSE_AND_LIST_SHORTOPTS, PARSE_AND_LIST_OPTIONS): Add force-bti. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FORCE_BTI. * testsuite/ld-aarch64/aarch64-elf.exp: Add all the tests below. * testsuite/ld-aarch64/bti-plt-1.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: New test. * testsuite/ld-aarch64/bti-plt-2.s: New test. * testsuite/ld-aarch64/bti-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-3.d: New test. * testsuite/ld-aarch64/bti-plt-4.d: New test. * testsuite/ld-aarch64/bti-plt-5.d: New test. * testsuite/ld-aarch64/bti-plt-6.d: New test. * testsuite/ld-aarch64/bti-plt-7.d: New test. * testsuite/ld-aarch64/bti-plt-so.s: New test. * testsuite/ld-aarch64/bti-plt.ld: New test.
2019-03-13 11:54:30 +01:00
switch (bp_info.bti_type)
{
case BTI_WARN:
elf_aarch64_tdata (output_bfd)->no_bti_warn = 0;
elf_aarch64_tdata (output_bfd)->gnu_and_prop
|= GNU_PROPERTY_AARCH64_FEATURE_1_BTI;
break;
default:
break;
}
elf_aarch64_tdata (output_bfd)->plt_type = bp_info.plt_type;
setup_plt_values (link_info, bp_info.plt_type);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
}
static bfd_vma
aarch64_calculate_got_entry_vma (struct elf_link_hash_entry *h,
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
struct elf_aarch64_link_hash_table
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
*globals, struct bfd_link_info *info,
bfd_vma value, bfd *output_bfd,
bfd_boolean *unresolved_reloc_p)
{
bfd_vma off = (bfd_vma) - 1;
asection *basegot = globals->root.sgot;
bfd_boolean dyn = globals->root.dynamic_sections_created;
if (h != NULL)
{
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
BFD_ASSERT (basegot != NULL);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
off = h->got.offset;
BFD_ASSERT (off != (bfd_vma) - 1);
Add output_type to bfd_link_info The "shared" field in bfd_link_info is set for both DSO and and PIE. There are separate fields for executable and relocatable outputs. This patch adds an "output_type" field: enum output_type { type_unknown = 0, type_executable, type_dll, type_relocatable }; and a "pic" field to bfd_link_info to replace shared, executable and relocatable fields so that we can use the "output_type" field to check for output type and the "pic" field check if output is PIC. Macros, bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie, are provided to check for output features. bfd/ * bfd/aoutx.h: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * bfd/bout.c: Likewise. * bfd/coff-alpha.c: Likewise. * bfd/coff-arm.c: Likewise. * bfd/coff-i386.c: Likewise. * bfd/coff-i960.c: Likewise. * bfd/coff-m68k.c: Likewise. * bfd/coff-mcore.c: Likewise. * bfd/coff-mips.c: Likewise. * bfd/coff-ppc.c: Likewise. * bfd/coff-rs6000.c: Likewise. * bfd/coff-sh.c: Likewise. * bfd/coff-tic80.c: Likewise. * bfd/coff-x86_64.c: Likewise. * bfd/coff64-rs6000.c: Likewise. * bfd/coffgen.c: Likewise. * bfd/cofflink.c: Likewise. * bfd/ecoff.c: Likewise. * bfd/ecofflink.c: Likewise. * bfd/elf-bfd.h: Likewise. * bfd/elf-eh-frame.c: Likewise. * bfd/elf-ifunc.c: Likewise. * bfd/elf-m10200.c: Likewise. * bfd/elf-m10300.c: Likewise. * bfd/elf-s390-common.c: Likewise. * bfd/elf-vxworks.c: Likewise. * bfd/elf.c: Likewise. * bfd/elf32-arm.c: Likewise. * bfd/elf32-avr.c: Likewise. * bfd/elf32-bfin.c: Likewise. * bfd/elf32-cr16.c: Likewise. * bfd/elf32-cr16c.c: Likewise. * bfd/elf32-cris.c: Likewise. * bfd/elf32-crx.c: Likewise. * bfd/elf32-d10v.c: Likewise. * bfd/elf32-dlx.c: Likewise. * bfd/elf32-epiphany.c: Likewise. * bfd/elf32-fr30.c: Likewise. * bfd/elf32-frv.c: Likewise. * bfd/elf32-ft32.c: Likewise. * bfd/elf32-h8300.c: Likewise. * bfd/elf32-hppa.c: Likewise. * bfd/elf32-i370.c: Likewise. * bfd/elf32-i386.c: Likewise. * bfd/elf32-i860.c: Likewise. * bfd/elf32-ip2k.c: Likewise. * bfd/elf32-iq2000.c: Likewise. * bfd/elf32-lm32.c: Likewise. * bfd/elf32-m32c.c: Likewise. * bfd/elf32-m32r.c: Likewise. * bfd/elf32-m68hc11.c: Likewise. * bfd/elf32-m68hc1x.c: Likewise. * bfd/elf32-m68k.c: Likewise. * bfd/elf32-mcore.c: Likewise. * bfd/elf32-mep.c: Likewise. * bfd/elf32-metag.c: Likewise. * bfd/elf32-microblaze.c: Likewise. * bfd/elf32-moxie.c: Likewise. * bfd/elf32-msp430.c: Likewise. * bfd/elf32-mt.c: Likewise. * bfd/elf32-nds32.c: Likewise. * bfd/elf32-nios2.c: Likewise. * bfd/elf32-or1k.c: Likewise. * bfd/elf32-ppc.c: Likewise. * bfd/elf32-rl78.c: Likewise. * bfd/elf32-rx.c: Likewise. * bfd/elf32-s390.c: Likewise. * bfd/elf32-score.c: Likewise. * bfd/elf32-score7.c: Likewise. * bfd/elf32-sh-symbian.c: Likewise. * bfd/elf32-sh.c: Likewise. * bfd/elf32-sh64.c: Likewise. * bfd/elf32-spu.c: Likewise. * bfd/elf32-tic6x.c: Likewise. * bfd/elf32-tilepro.c: Likewise. * bfd/elf32-v850.c: Likewise. * bfd/elf32-vax.c: Likewise. * bfd/elf32-visium.c: Likewise. * bfd/elf32-xc16x.c: Likewise. * bfd/elf32-xstormy16.c: Likewise. * bfd/elf32-xtensa.c: Likewise. * bfd/elf64-alpha.c: Likewise. * bfd/elf64-hppa.c: Likewise. * bfd/elf64-ia64-vms.c: Likewise. * bfd/elf64-mmix.c: Likewise. * bfd/elf64-ppc.c: Likewise. * bfd/elf64-s390.c: Likewise. * bfd/elf64-sh64.c: Likewise. * bfd/elf64-x86-64.c: Likewise. * bfd/elflink.c: Likewise. * bfd/elfnn-aarch64.c: Likewise. * bfd/elfnn-ia64.c: Likewise. * bfd/elfxx-mips.c: Likewise. * bfd/elfxx-sparc.c: Likewise. * bfd/elfxx-tilegx.c: Likewise. * bfd/i386linux.c: Likewise. * bfd/linker.c: Likewise. * bfd/m68klinux.c: Likewise. * bfd/pdp11.c: Likewise. * bfd/pe-mips.c: Likewise. * bfd/peXXigen.c: Likewise. * bfd/reloc.c: Likewise. * bfd/reloc16.c: Likewise. * bfd/sparclinux.c: Likewise. * bfd/sunos.c: Likewise. * bfd/vms-alpha.c: Likewise. * bfd/xcofflink.c: Likewise. include/ * include/bfdlink.h (output_type): New enum. (bfd_link_executable): New macro. (bfd_link_dll): Likewise. (bfd_link_relocatable): Likewise. (bfd_link_pic): Likewise. (bfd_link_pie): Likewise. (bfd_link_info): Remove shared, executable, pie and relocatable. Add output_type and pic. ld/ * ld/ldctor.c: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * ld/ldemul.c: Likewise. * ld/ldfile.c: Likewise. * ld/ldlang.c: Likewise. * ld/ldmain.c: Likewise. * ld/ldwrite.c: Likewise. * ld/lexsup.c: Likewise. * ld/pe-dll.c: Likewise. * ld/plugin.c: Likewise. * ld/emultempl/aarch64elf.em: Likewise. * ld/emultempl/aix.em: Likewise. * ld/emultempl/alphaelf.em: Likewise. * ld/emultempl/armcoff.em: Likewise. * ld/emultempl/armelf.em: Likewise. * ld/emultempl/avrelf.em: Likewise. * ld/emultempl/beos.em: Likewise. * ld/emultempl/cr16elf.em: Likewise. * ld/emultempl/elf-generic.em: Likewise. * ld/emultempl/elf32.em: Likewise. * ld/emultempl/genelf.em: Likewise. * ld/emultempl/generic.em: Likewise. * ld/emultempl/gld960.em: Likewise. * ld/emultempl/gld960c.em: Likewise. * ld/emultempl/hppaelf.em: Likewise. * ld/emultempl/irix.em: Likewise. * ld/emultempl/linux.em: Likewise. * ld/emultempl/lnk960.em: Likewise. * ld/emultempl/m68hc1xelf.em: Likewise. * ld/emultempl/m68kcoff.em: Likewise. * ld/emultempl/m68kelf.em: Likewise. * ld/emultempl/metagelf.em: Likewise. * ld/emultempl/mipself.em: Likewise. * ld/emultempl/mmo.em: Likewise. * ld/emultempl/msp430.em: Likewise. * ld/emultempl/nds32elf.em: Likewise. * ld/emultempl/needrelax.em: Likewise. * ld/emultempl/nios2elf.em: Likewise. * ld/emultempl/pe.em: Likewise. * ld/emultempl/pep.em: Likewise. * ld/emultempl/ppc32elf.em: Likewise. * ld/emultempl/ppc64elf.em: Likewise. * ld/emultempl/sh64elf.em: Likewise. * ld/emultempl/solaris2.em: Likewise. * ld/emultempl/spuelf.em: Likewise. * ld/emultempl/sunos.em: Likewise. * ld/emultempl/tic6xdsbt.em: Likewise. * ld/emultempl/ticoff.em: Likewise. * ld/emultempl/v850elf.em: Likewise. * ld/emultempl/vms.em: Likewise. * ld/emultempl/vxworks.em: Likewise.
2015-08-18 14:51:03 +02:00
if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h)
|| (bfd_link_pic (info)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
&& SYMBOL_REFERENCES_LOCAL (info, h))
|| (ELF_ST_VISIBILITY (h->other)
&& h->root.type == bfd_link_hash_undefweak))
{
/* This is actually a static link, or it is a -Bsymbolic link
and the symbol is defined locally. We must initialize this
entry in the global offset table. Since the offset must
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
always be a multiple of 8 (4 in the case of ILP32), we use
the least significant bit to record whether we have
initialized it already.
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
When doing a dynamic link, we create a .rel(a).got relocation
entry to initialize the value. This is done in the
finish_dynamic_symbol routine. */
if ((off & 1) != 0)
off &= ~1;
else
{
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
bfd_put_NN (output_bfd, value, basegot->contents + off);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
h->got.offset |= 1;
}
}
else
*unresolved_reloc_p = FALSE;
off = off + basegot->output_section->vma + basegot->output_offset;
}
return off;
}
/* Change R_TYPE to a more efficient access model where possible,
return the new reloc type. */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
static bfd_reloc_code_real_type
aarch64_tls_transition_without_check (bfd_reloc_code_real_type r_type,
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
struct elf_link_hash_entry *h)
{
bfd_boolean is_local = h == NULL;
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
switch (r_type)
{
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
case BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21:
[AArch64/BFD] Sort relocation case labels alphabetically 2015-05-19 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_tls_transition_without_check): Sort relocation case labels alphabetically. (elfNN_aarch64_final_link_relocate): Ditto. (elfNN_aarch64_tls_relax): Ditto. (elfNN_aarch64_relocate_section): Ditto. (elfNN_aarch64_gc_sweep_hook): Ditto. (elfNN_aarch64_check_relocs): Ditto. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Ditto. (_bfd_aarch64_elf_resolve_relocation): Ditto.
2015-05-20 11:58:43 +02:00
case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21:
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
return (is_local
? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1
: BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21);
[AArch64] Add support for :tlsdesc: and TLSDESC_ADR_PREL21
2015-02-18 16:36:40 +01:00
case BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21:
return (is_local
? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC
: r_type);
[AArch64] Add support for :tlsdesc: and TLSDESC_LD_PREL19
2015-02-18 16:37:35 +01:00
case BFD_RELOC_AARCH64_TLSDESC_LD_PREL19:
return (is_local
? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1
: BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19);
[LD][AARCH64]Add TLSDESC support for large memory model. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_tls_transition_without_check): Add relax transitions for TLSDESC_ADD, TLSDESC_LDR, TLSDESC_OFF_G0_NC, TLSDESC_OFF_G1. (aarch64_tls_transition_without_check): Add relaxation support. (aarch64_reloc_got_type): Add support. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/aarch64-elf.exp: Run new test. * ld-aarch64/tls-large-desc.d: New. * ld-aarch64/tls-large-desc.s: New. * ld-aarch64/tls-relax-large-desc-ie.d: New. * ld-aarch64/tls-relax-large-desc-ie.s: New. * ld-aarch64/tls-relax-large-desc-le.d: New. * ld-aarch64/tls-relax-large-desc-le.s: New.
2015-10-02 18:43:08 +02:00
case BFD_RELOC_AARCH64_TLSDESC_LDR:
return (is_local
? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC
: BFD_RELOC_AARCH64_NONE);
case BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC:
return (is_local
? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC
: BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC);
case BFD_RELOC_AARCH64_TLSDESC_OFF_G1:
return (is_local
? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2
: BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1);
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
case BFD_RELOC_AARCH64_TLSDESC_LDNN_LO12_NC:
[AArch64/BFD] Sort relocation case labels alphabetically 2015-05-19 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_tls_transition_without_check): Sort relocation case labels alphabetically. (elfNN_aarch64_final_link_relocate): Ditto. (elfNN_aarch64_tls_relax): Ditto. (elfNN_aarch64_relocate_section): Ditto. (elfNN_aarch64_gc_sweep_hook): Ditto. (elfNN_aarch64_check_relocs): Ditto. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Ditto. (_bfd_aarch64_elf_resolve_relocation): Ditto.
2015-05-20 11:58:43 +02:00
case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
return (is_local
? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC
: BFD_RELOC_AARCH64_TLSIE_LDNN_GOTTPREL_LO12_NC);
case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
return is_local ? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1 : r_type;
case BFD_RELOC_AARCH64_TLSIE_LDNN_GOTTPREL_LO12_NC:
return is_local ? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC : r_type;
Adding support for TLSIE_LD_GOTTREL_PREL19.
2015-02-13 10:57:11 +01:00
case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
return r_type;
Add ADR :tlsgd: directive and TLSGD_ADR_PREL21 support.
2015-02-13 08:13:57 +01:00
case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21:
return (is_local
? BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12
: BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19);
[LD][AARCH64]Add TLSDESC support for large memory model. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_tls_transition_without_check): Add relax transitions for TLSDESC_ADD, TLSDESC_LDR, TLSDESC_OFF_G0_NC, TLSDESC_OFF_G1. (aarch64_tls_transition_without_check): Add relaxation support. (aarch64_reloc_got_type): Add support. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/aarch64-elf.exp: Run new test. * ld-aarch64/tls-large-desc.d: New. * ld-aarch64/tls-large-desc.s: New. * ld-aarch64/tls-relax-large-desc-ie.d: New. * ld-aarch64/tls-relax-large-desc-ie.s: New. * ld-aarch64/tls-relax-large-desc-le.d: New. * ld-aarch64/tls-relax-large-desc-le.s: New.
2015-10-02 18:43:08 +02:00
case BFD_RELOC_AARCH64_TLSDESC_ADD:
Rename R_AARCH64_TLSDESC_LD64_LO12_NC to R_AARCH64_TLSDESC_LD64_LO12 and R_AARCH64_TLSDESC_ADD_LO12_NC to R_AARCH64_TLSDESC_ADD_LO12. PR binutils/21202 include * elf/aarch64.h (R_AARCH64_TLSDESC_LD64_LO12_NC): Rename to R_AARCH64_TLSDESC_LD64_LO12. (R_AARCH64_TLSDESC_ADD_LO12_NC): Rename to R_AARCH64_TLSDESC_ADD_LO12_NC. bfd * reloc.c (BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC): Rename to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12. (BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC): Rename to BFD_RELOC_AARCH64_TLSDESC_ADD_LO12. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elfnn-aarch64.c (IS_AARCH64_TLS_RELAX_RELOC): Update reloc names. (IS_AARCH64_TLSDESC_RELOC): Likewise. (elfNN_aarch64_howto_table): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. gas * config/tc-aarch64.c (reloc_table): Rename BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12. Rname BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC to BFD_RELOC_AARCH64_TLSDESC_ADD_LO12. (md_apply_fix): Likewise. (aarch64_force_relocation): Likewise. * testsuite/gas/aarch64/tls.d: Update regexp. ld * testsuite/ld-aarch64/ifunc-5r-local.d: Update regexp.
2017-03-13 10:58:04 +01:00
case BFD_RELOC_AARCH64_TLSDESC_ADD_LO12:
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
case BFD_RELOC_AARCH64_TLSDESC_CALL:
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* Instructions with these relocations will become NOPs. */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
return BFD_RELOC_AARCH64_NONE;
[AArch64] Relax TLS local dynamic traditional into local executable The linker relaxation logic will be: Code sequence I (tiny): 0x00 adr x0, :tlsldm:x 0x04 bl __tls_get_addr | V 0x00 mrs x0, tpidr_el0 0x04 add x0, x0, TCB_SIZE Code sequence II (small): 0x00 adrp a0, :tlsldm:x 0x04 add a0, #:tlsldm_lo12:x 0x08 bl __tls_get_addr | V 0x00 mrs x0, tpidr_el0 0x04 add x0, x0, TCB_SIZE 0x08 nop 2015-09-09 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_tls_transition_without_check): Support three TLS local dynamic traditional relocations types. (elfNN_aarch64_tls_relax): Support TLS local dynamic traditional to local executable relaxation. ld/testsuite/ * ld-aarch64/tls-relax-ld-le-tiny.s: New testcase. * ld-aarch64/tls-relax-ld-le-small.s: Likewise. * ld-aarch64/tls-relax-ld-le-tiny.d: New expectation file. * ld-aarch64/tls-relax-ld-le-small.d: Likewise. * ld-aarch64/aarch64-elf.exp: Run new testcases.
2015-09-09 15:19:28 +02:00
case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
return is_local ? BFD_RELOC_AARCH64_NONE : r_type;
[BFD][AARCH64]Add TLSGD relaxation support under large memory model. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c(IS_AARCH64_TLS_RELAX_RELOC): Add relaxation support for TLSGD_MOVW_G0_NC and TLSGD_MOVW_G1. (aarch64_tls_transition_without_check): Likewise (elfNN_aarch64_tls_relax): Likwise. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/aarch64-elf.exp: run new test * ld-aarch64/tls-relax-large-gd-ie.d: New. * ld-aarch64/tls-relax-large-gd-ie.s: New. * ld-aarch64/tls-relax-large-gd-le.d: New. * ld-aarch64/tls-relax-large-gd-le.s: New.
2015-10-02 18:22:36 +02:00
#if ARCH_SIZE == 64
case BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC:
return is_local
? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC
: BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC;
case BFD_RELOC_AARCH64_TLSGD_MOVW_G1:
return is_local
? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2
: BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1;
#endif
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
default:
break;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
}
return r_type;
}
static unsigned int
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
aarch64_reloc_got_type (bfd_reloc_code_real_type r_type)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
switch (r_type)
{
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
case BFD_RELOC_AARCH64_ADR_GOT_PAGE:
case BFD_RELOC_AARCH64_GOT_LD_PREL19:
[AArch64] BFD support BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14 This patch add BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14 relocation supoprt in bfd linker. 2015-06-01 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_reloc_got_type): Support BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14. (elfNN_aarch64_final_link_relocate): Ditto. (elfNN_aarch64_gc_swap_hook): Ditto. (elfNN_aarch64_check_relocs): Ditto. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Ditto. ld/testsuite/ * ld-aarch64/emit-relocs-28.s: New test file. * ld-aarch64/emit-relocs-28.d: Ditto. * ld-aarch64/aarch64-elf.exp: Run new test.
2015-06-01 16:45:25 +02:00
case BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14:
[AArch64/BFD] Sort relocation case labels alphabetically 2015-05-19 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_tls_transition_without_check): Sort relocation case labels alphabetically. (elfNN_aarch64_final_link_relocate): Ditto. (elfNN_aarch64_tls_relax): Ditto. (elfNN_aarch64_relocate_section): Ditto. (elfNN_aarch64_gc_sweep_hook): Ditto. (elfNN_aarch64_check_relocs): Ditto. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Ditto. (_bfd_aarch64_elf_resolve_relocation): Ditto.
2015-05-20 11:58:43 +02:00
case BFD_RELOC_AARCH64_LD32_GOT_LO12_NC:
[LD][AARCH64]Add BFD_RELOC_AARCH64_LD64_GOTOFF_LO15 Support. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_reloc_got_type): Add BFD_RELOC_AARCH64_LD_64_GOTOFF_LO15 support. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise (elfNN_aarch64_final_link_relocate): Calculate offset within GOT. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/emit-relocs-310.d: New. * ld-aarch64/emit-relocs-310.s: New. * ld-aarch64/aarch64-elf.exp: Run the test.
2015-10-02 15:51:26 +02:00
case BFD_RELOC_AARCH64_LD64_GOTOFF_LO15:
[AArch64] BFD Support BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15 2015-06-01 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_reloc_got_type): Support BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15. (elfNN_aarch64_final_link_relocate): Ditto. (elfNN_aarch64_gc_swap_hook): Ditto. (elfNN_aarch64_check_relocs): Ditto. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Ditto. ld/testsuite/ * ld-aarch64/emit-relocs-313.s: New test file. * ld-aarch64/emit-relocs-313.d: Ditto. * ld-aarch64/aarch64-elf.exp: Run new test.
2015-06-01 11:26:00 +02:00
case BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15:
[AArch64/BFD] Sort relocation case labels alphabetically 2015-05-19 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_tls_transition_without_check): Sort relocation case labels alphabetically. (elfNN_aarch64_final_link_relocate): Ditto. (elfNN_aarch64_tls_relax): Ditto. (elfNN_aarch64_relocate_section): Ditto. (elfNN_aarch64_gc_sweep_hook): Ditto. (elfNN_aarch64_check_relocs): Ditto. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Ditto. (_bfd_aarch64_elf_resolve_relocation): Ditto.
2015-05-20 11:58:43 +02:00
case BFD_RELOC_AARCH64_LD64_GOT_LO12_NC:
[LD][AARCH64]Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC Support. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_reloc_got_type): Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC support. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/aarch64-elf.exp: Run new test. * ld-aarch64/emit-relocs-301.d: New. * ld-aarch64/emit-relocs-301.s: New.
2015-10-02 16:54:40 +02:00
case BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC:
[LD][AARCH64]Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G1 Support. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_reloc_got_type): Add support for BFD_RELOC_AARCH64_MOVW_GOTOFF_G1. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise (elfNN_aarch64_final_link_relocate): Calculate offset within GOT. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/emit-relocs-302.d: New. * ld-aarch64/emit-relocs-302.s: New. * ld-aarch64/aarch64-elf.exp: Run the new test.
2015-10-02 16:29:41 +02:00
case BFD_RELOC_AARCH64_MOVW_GOTOFF_G1:
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
return GOT_NORMAL;
[AArch64/BFD] Sort relocation case labels alphabetically 2015-05-19 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_tls_transition_without_check): Sort relocation case labels alphabetically. (elfNN_aarch64_final_link_relocate): Ditto. (elfNN_aarch64_tls_relax): Ditto. (elfNN_aarch64_relocate_section): Ditto. (elfNN_aarch64_gc_sweep_hook): Ditto. (elfNN_aarch64_check_relocs): Ditto. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Ditto. (_bfd_aarch64_elf_resolve_relocation): Ditto.
2015-05-20 11:58:43 +02:00
case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21:
Add ADR :tlsgd: directive and TLSGD_ADR_PREL21 support.
2015-02-13 08:13:57 +01:00
case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21:
[LD][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC support. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_reloc_got_type): Add BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC support. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/emit-relocs-516.d: New. * ld-aarch64/emit-relocs-516.s: New. * ld-aarch64/aarch64-elf.exp: Run new test.
2015-10-02 17:37:22 +02:00
case BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC:
[LD][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G1 support. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_reloc_got_type): Add BFD_RELOC_AARCH64_TLSGD_MOVW_G1 support. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/emit-relocs-515.d: New. * ld-aarch64/emit-relocs-515.s: New. * ld-aarch64/aarch64-elf.exp: Run new test.
2015-10-02 17:21:31 +02:00
case BFD_RELOC_AARCH64_TLSGD_MOVW_G1:
[AArch64][6/8] LD support BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC 2015-08-11 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC. (aarch64_reloc_got_type): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ * ld-aarch64/tls-small-ld.s: Update testcase.
2015-08-11 18:20:17 +02:00
case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
[AArch64][3/8] LD support BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21 2015-08-11 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21. (aarch64_reloc_got_type): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ * ld-aarch64/tls-small-ld.s: New file. * ld-aarch64/tls-small-ld.d: Likewise. * ld-aarch64/aarch64-elf.exp: Run new test.
2015-08-11 18:05:34 +02:00
case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
[AArch64][3/3] LD support BFD_RELOC_AARCH64_TLSLD_ADR_PREL21
2015-07-16 16:46:21 +02:00
case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
return GOT_TLS_GD;
[LD][AARCH64]Add TLSDESC support for large memory model. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_tls_transition_without_check): Add relax transitions for TLSDESC_ADD, TLSDESC_LDR, TLSDESC_OFF_G0_NC, TLSDESC_OFF_G1. (aarch64_tls_transition_without_check): Add relaxation support. (aarch64_reloc_got_type): Add support. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/aarch64-elf.exp: Run new test. * ld-aarch64/tls-large-desc.d: New. * ld-aarch64/tls-large-desc.s: New. * ld-aarch64/tls-relax-large-desc-ie.d: New. * ld-aarch64/tls-relax-large-desc-ie.s: New. * ld-aarch64/tls-relax-large-desc-le.d: New. * ld-aarch64/tls-relax-large-desc-le.s: New.
2015-10-02 18:43:08 +02:00
case BFD_RELOC_AARCH64_TLSDESC_ADD:
Rename R_AARCH64_TLSDESC_LD64_LO12_NC to R_AARCH64_TLSDESC_LD64_LO12 and R_AARCH64_TLSDESC_ADD_LO12_NC to R_AARCH64_TLSDESC_ADD_LO12. PR binutils/21202 include * elf/aarch64.h (R_AARCH64_TLSDESC_LD64_LO12_NC): Rename to R_AARCH64_TLSDESC_LD64_LO12. (R_AARCH64_TLSDESC_ADD_LO12_NC): Rename to R_AARCH64_TLSDESC_ADD_LO12_NC. bfd * reloc.c (BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC): Rename to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12. (BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC): Rename to BFD_RELOC_AARCH64_TLSDESC_ADD_LO12. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elfnn-aarch64.c (IS_AARCH64_TLS_RELAX_RELOC): Update reloc names. (IS_AARCH64_TLSDESC_RELOC): Likewise. (elfNN_aarch64_howto_table): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. gas * config/tc-aarch64.c (reloc_table): Rename BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12. Rname BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC to BFD_RELOC_AARCH64_TLSDESC_ADD_LO12. (md_apply_fix): Likewise. (aarch64_force_relocation): Likewise. * testsuite/gas/aarch64/tls.d: Update regexp. ld * testsuite/ld-aarch64/ifunc-5r-local.d: Update regexp.
2017-03-13 10:58:04 +01:00
case BFD_RELOC_AARCH64_TLSDESC_ADD_LO12:
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
case BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21:
[AArch64] Add support for :tlsdesc: and TLSDESC_ADR_PREL21
2015-02-18 16:36:40 +01:00
case BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21:
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
case BFD_RELOC_AARCH64_TLSDESC_CALL:
case BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC:
Rename R_AARCH64_TLSDESC_LD64_LO12_NC to R_AARCH64_TLSDESC_LD64_LO12 and R_AARCH64_TLSDESC_ADD_LO12_NC to R_AARCH64_TLSDESC_ADD_LO12. PR binutils/21202 include * elf/aarch64.h (R_AARCH64_TLSDESC_LD64_LO12_NC): Rename to R_AARCH64_TLSDESC_LD64_LO12. (R_AARCH64_TLSDESC_ADD_LO12_NC): Rename to R_AARCH64_TLSDESC_ADD_LO12_NC. bfd * reloc.c (BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC): Rename to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12. (BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC): Rename to BFD_RELOC_AARCH64_TLSDESC_ADD_LO12. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elfnn-aarch64.c (IS_AARCH64_TLS_RELAX_RELOC): Update reloc names. (IS_AARCH64_TLSDESC_RELOC): Likewise. (elfNN_aarch64_howto_table): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. gas * config/tc-aarch64.c (reloc_table): Rename BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12. Rname BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC to BFD_RELOC_AARCH64_TLSDESC_ADD_LO12. (md_apply_fix): Likewise. (aarch64_force_relocation): Likewise. * testsuite/gas/aarch64/tls.d: Update regexp. ld * testsuite/ld-aarch64/ifunc-5r-local.d: Update regexp.
2017-03-13 10:58:04 +01:00
case BFD_RELOC_AARCH64_TLSDESC_LD64_LO12:
[AArch64] Add support for :tlsdesc: and TLSDESC_LD_PREL19
2015-02-18 16:37:35 +01:00
case BFD_RELOC_AARCH64_TLSDESC_LD_PREL19:
[LD][AARCH64]Add TLSDESC support for large memory model. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_tls_transition_without_check): Add relax transitions for TLSDESC_ADD, TLSDESC_LDR, TLSDESC_OFF_G0_NC, TLSDESC_OFF_G1. (aarch64_tls_transition_without_check): Add relaxation support. (aarch64_reloc_got_type): Add support. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/aarch64-elf.exp: Run new test. * ld-aarch64/tls-large-desc.d: New. * ld-aarch64/tls-large-desc.s: New. * ld-aarch64/tls-relax-large-desc-ie.d: New. * ld-aarch64/tls-relax-large-desc-ie.s: New. * ld-aarch64/tls-relax-large-desc-le.d: New. * ld-aarch64/tls-relax-large-desc-le.s: New.
2015-10-02 18:43:08 +02:00
case BFD_RELOC_AARCH64_TLSDESC_LDR:
case BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC:
case BFD_RELOC_AARCH64_TLSDESC_OFF_G1:
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
return GOT_TLSDESC_GD;
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC:
[AArch64/BFD] Sort relocation case labels alphabetically 2015-05-19 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_tls_transition_without_check): Sort relocation case labels alphabetically. (elfNN_aarch64_final_link_relocate): Ditto. (elfNN_aarch64_tls_relax): Ditto. (elfNN_aarch64_relocate_section): Ditto. (elfNN_aarch64_gc_sweep_hook): Ditto. (elfNN_aarch64_check_relocs): Ditto. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Ditto. (_bfd_aarch64_elf_resolve_relocation): Ditto.
2015-05-20 11:58:43 +02:00
case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
Adding support for TLSIE_LD_GOTTREL_PREL19.
2015-02-13 10:57:11 +01:00
case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
[Binutils][AARCH64]Add TLS IE large memory support. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * reloc.c: Make AARCH64_TLSIE_MOVW_GOTTPREL_G1 and AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC defined in alphabetical order. * libbfd.h: Regenerate. * bfd-in2.h: Likewise. * elfnn-aarch64.c (elfNN_aarch64_howto_table): Make TLSIE_MOVW_GOTTPREL_G1 check overflow. (aarch64_reloc_got_type): Add support for TLSIE_MOVW_GOTTPREL_G1 and TLSIE_MOVW_GOTTPREL_G0_NC. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. gas/ 2015-10-02 Renlin Li <renlin.li@arm.com> * config/tc-aarch64.c (reloc_table): Add two entries for gottprel_g0_nc and gottprel_g1. (process_movw_reloc_info): Add support. (md_apply_fix): Likewise. (aarch64_force_relocation): Likewise. gas/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * gas/aarch64/reloc-gottprel_g0_nc.d: New. * gas/aarch64/reloc-gottprel_g0_nc.s: New. * gas/aarch64/reloc-gottprel_g1.d: New. * gas/aarch64/reloc-gottprel_g1.s: New. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/tls-large-ie.d: New. * ld-aarch64/tls-large-ie.s: New. * ld-aarch64/aarch64-elf.exp: Run new test.
2015-10-02 17:59:46 +02:00
case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC:
case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1:
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
return GOT_TLS_IE;
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
default:
break;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
}
return GOT_UNKNOWN;
}
static bfd_boolean
aarch64_can_relax_tls (bfd *input_bfd,
struct bfd_link_info *info,
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
bfd_reloc_code_real_type r_type,
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
struct elf_link_hash_entry *h,
unsigned long r_symndx)
{
unsigned int symbol_got_type;
unsigned int reloc_got_type;
[AArch64]Speed up linking speed by skipping unncessary TLS reloc type check 2015-08-11 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (IS_AARCH64_TLS_RELAX_RELOC): New. (aarch64_can_relax_tls): Use the new IS_AARCH64_TLS_RELAX_RELOC.
2015-08-11 23:05:39 +02:00
if (! IS_AARCH64_TLS_RELAX_RELOC (r_type))
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
return FALSE;
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
symbol_got_type = elfNN_aarch64_symbol_got_type (h, input_bfd, r_symndx);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
reloc_got_type = aarch64_reloc_got_type (r_type);
if (symbol_got_type == GOT_TLS_IE && GOT_TLS_GD_ANY_P (reloc_got_type))
return TRUE;
[PR ld/22263] aarch64: Avoid dynamic TLS relocs in PIE No dynamic relocs are needed for TLS defined in an executable, the TP relative offset is known at link time. Fixes FAIL: Build pr22263-1 bfd/ PR ld/22263 * elfnn-aarch64.c (elfNN_aarch64_relocate_section): Use bfd_link_executable instead of bfd_link_pic for TLS. (elfNN_aarch64_allocate_dynrelocs): Likewise. (aarch64_can_relax_tls): Likewise.
2017-11-15 18:40:04 +01:00
if (!bfd_link_executable (info))
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
return FALSE;
if (h && h->root.type == bfd_link_hash_undefweak)
return FALSE;
return TRUE;
}
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
/* Given the relocation code R_TYPE, return the relaxed bfd reloc
enumerator. */
static bfd_reloc_code_real_type
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
aarch64_tls_transition (bfd *input_bfd,
struct bfd_link_info *info,
unsigned int r_type,
struct elf_link_hash_entry *h,
unsigned long r_symndx)
{
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
bfd_reloc_code_real_type bfd_r_type
unrecognized/unsupported reloc message It must get boring translating all the variants we have of unrecognized/unsupported/invalid/unexpected reloc number. This patch cuts down on the number of variations. * aoutx.h, * coff-alpha.c, * coff-i860.c, * coff-m68k.c, * coff-mcore.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-w65.c, * elf-bfd.h, * elf-m10300.c, * elf.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-i370.c, * elf32-i386.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-iq2000.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-sh.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-v850.c, * elf32-vax.c, * elf32-visium.c, * elf32-wasm32.c, * elf32-xgate.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sparc.c, * elf64-x86-64.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-riscv.h, * elfxx-sparc.c, * elfxx-sparc.h, * reloc.c: Standardize unrecognized/unsupported reloc message.
2018-02-21 12:17:07 +01:00
= elfNN_aarch64_bfd_reloc_from_type (input_bfd, r_type);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
if (! aarch64_can_relax_tls (input_bfd, info, bfd_r_type, h, r_symndx))
return bfd_r_type;
return aarch64_tls_transition_without_check (bfd_r_type, h);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
}
/* Return the base VMA address which should be subtracted from real addresses
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
when resolving R_AARCH64_TLS_DTPREL relocation. */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
static bfd_vma
dtpoff_base (struct bfd_link_info *info)
{
/* If tls_sec is NULL, we should have signalled an error already. */
BFD_ASSERT (elf_hash_table (info)->tls_sec != NULL);
return elf_hash_table (info)->tls_sec->vma;
}
/* Return the base VMA address which should be subtracted from real addresses
when resolving R_AARCH64_TLS_GOTTPREL64 relocations. */
static bfd_vma
tpoff_base (struct bfd_link_info *info)
{
struct elf_link_hash_table *htab = elf_hash_table (info);
/* If tls_sec is NULL, we should have signalled an error already. */
bfd/elfnn-aarch64.c: Cleanup a couple of TLS functions Add an assert and remove an unused line of code. bfd/ChangeLog: 2014-06-04 Will Newton <will.newton@linaro.org> * elfnn-aarch64.c (tpoff_base): Make test of tls_sec being non-NULL into an assert. (elfNN_aarch64_tls_relax): Remove unused code.
2014-05-21 17:49:57 +02:00
BFD_ASSERT (htab->tls_sec != NULL);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
bfd_vma base = align_power ((bfd_vma) TCB_SIZE,
htab->tls_sec->alignment_power);
return htab->tls_sec->vma - base;
}
static bfd_vma *
symbol_got_offset_ref (bfd *input_bfd, struct elf_link_hash_entry *h,
unsigned long r_symndx)
{
/* Calculate the address of the GOT entry for symbol
referred to in h. */
if (h != NULL)
return &h->got.offset;
else
{
/* local symbol */
struct elf_aarch64_local_symbol *l;
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
l = elf_aarch64_locals (input_bfd);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
return &l[r_symndx].got_offset;
}
}
static void
symbol_got_offset_mark (bfd *input_bfd, struct elf_link_hash_entry *h,
unsigned long r_symndx)
{
bfd_vma *p;
p = symbol_got_offset_ref (input_bfd, h, r_symndx);
*p |= 1;
}
static int
symbol_got_offset_mark_p (bfd *input_bfd, struct elf_link_hash_entry *h,
unsigned long r_symndx)
{
bfd_vma value;
value = * symbol_got_offset_ref (input_bfd, h, r_symndx);
return value & 1;
}
static bfd_vma
symbol_got_offset (bfd *input_bfd, struct elf_link_hash_entry *h,
unsigned long r_symndx)
{
bfd_vma value;
value = * symbol_got_offset_ref (input_bfd, h, r_symndx);
value &= ~1;
return value;
}
static bfd_vma *
symbol_tlsdesc_got_offset_ref (bfd *input_bfd, struct elf_link_hash_entry *h,
unsigned long r_symndx)
{
/* Calculate the address of the GOT entry for symbol
referred to in h. */
if (h != NULL)
{
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
struct elf_aarch64_link_hash_entry *eh;
eh = (struct elf_aarch64_link_hash_entry *) h;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
return &eh->tlsdesc_got_jump_table_offset;
}
else
{
/* local symbol */
struct elf_aarch64_local_symbol *l;
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
l = elf_aarch64_locals (input_bfd);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
return &l[r_symndx].tlsdesc_got_jump_table_offset;
}
}
static void
symbol_tlsdesc_got_offset_mark (bfd *input_bfd, struct elf_link_hash_entry *h,
unsigned long r_symndx)
{
bfd_vma *p;
p = symbol_tlsdesc_got_offset_ref (input_bfd, h, r_symndx);
*p |= 1;
}
static int
symbol_tlsdesc_got_offset_mark_p (bfd *input_bfd,
struct elf_link_hash_entry *h,
unsigned long r_symndx)
{
bfd_vma value;
value = * symbol_tlsdesc_got_offset_ref (input_bfd, h, r_symndx);
return value & 1;
}
static bfd_vma
symbol_tlsdesc_got_offset (bfd *input_bfd, struct elf_link_hash_entry *h,
unsigned long r_symndx)
{
bfd_vma value;
value = * symbol_tlsdesc_got_offset_ref (input_bfd, h, r_symndx);
value &= ~1;
return value;
}
[AArch64] Cortex-A53 erratum 835769 linker workaround 2014-10-22 Tejas Belagod <tejas.belagod@arm.com> bfd/ * bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter. * bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise. * elfnn-aarch64.c (aarch64_erratum_835769_stub): New. (elf_aarch64_stub_type): Add new type aarch64_stub_erratum_835769_veneer. (elf_aarch64_stub_hash_entry): New fields for erratum 835769. (aarch64_erratum_835769_fix): New data struct to record erratum 835769. (elf_aarch64_link_hash_table: Global flags for 835769. (aarch64_build_one_stub): Add case for 835769. (aarch64_size_one_stub): Likewise. (aarch64_mem_op_p, aarch64_mlxl_p, aarch64_erratum_sequence,erratum_835769_scan): New. Decode and scan functions for erratum 835769. (elf_aarch64_create_or_find_stub_sec): New. (elfNN_aarch64_size_stubs): Look for erratum 835769 and record them. (bfd_elfNN_aarch64_set_options: Set global flag for 835769. (erratum_835769_branch_to_stub_data, make_branch_to_erratum_835769_stub):New. Connect up all the erratum stubs to occurances by branches. (elfNN_aarch64_write_section): New hook. (aarch64_map_one_stub): Output erratum stub symbol. (elfNN_aarch64_size_dynamic_sections): Init mapping symbol information for erratum 835769. (elf_backend_write_section): Define. ld/ * emultempl/aarch64elf.em: Add command-line option for erratum 835769. ld/testsuite/ * ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum 835769 tests. * ld-aarch64/erratum835769.d: New. * ld-aarch64/erratum835769.s: New.
2014-10-24 12:39:35 +02:00
/* Data for make_branch_to_erratum_835769_stub(). */
struct erratum_835769_branch_to_stub_data
{
[AArch64] Workaround for Cortex A53 erratum 843419 Some early revisions of the Cortex-A53 have an erratum (843419). The details of the erratum are quite complex and involve dynamic conditions. For the purposes of the workaround we have simplified the static conditions to an ADRP in the last two instructions of a 4KByte page, followed within four instructions by a load/store dependent on the ADRP. This patch adds support to conservatively scan for and workaround Cortex A53 erratum 843419. There are two different workaround strategies used. The first is to rewrite ADRP instructions which form part of an erratum sequence with an ADR instruction. In situations where the ADR provides insufficient offset the dependent load or store instruction from the sequence is moved to a stub section and branches are inserted from the original sequence to the relocated instruction and back again. Stub section sizes are rounded up to a multiple of 4096 in order to ensure that the act of inserting work around stubs does not create more errata sequences. Workaround stubs are always inserted into the stub section associated with the input section containing the erratum sequence. This ensures that the fully relocated form of the veneered load store instruction is available at the point in time when the stub section is written.
2015-02-24 13:04:41 +01:00
struct bfd_link_info *info;
[AArch64] Cortex-A53 erratum 835769 linker workaround 2014-10-22 Tejas Belagod <tejas.belagod@arm.com> bfd/ * bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter. * bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise. * elfnn-aarch64.c (aarch64_erratum_835769_stub): New. (elf_aarch64_stub_type): Add new type aarch64_stub_erratum_835769_veneer. (elf_aarch64_stub_hash_entry): New fields for erratum 835769. (aarch64_erratum_835769_fix): New data struct to record erratum 835769. (elf_aarch64_link_hash_table: Global flags for 835769. (aarch64_build_one_stub): Add case for 835769. (aarch64_size_one_stub): Likewise. (aarch64_mem_op_p, aarch64_mlxl_p, aarch64_erratum_sequence,erratum_835769_scan): New. Decode and scan functions for erratum 835769. (elf_aarch64_create_or_find_stub_sec): New. (elfNN_aarch64_size_stubs): Look for erratum 835769 and record them. (bfd_elfNN_aarch64_set_options: Set global flag for 835769. (erratum_835769_branch_to_stub_data, make_branch_to_erratum_835769_stub):New. Connect up all the erratum stubs to occurances by branches. (elfNN_aarch64_write_section): New hook. (aarch64_map_one_stub): Output erratum stub symbol. (elfNN_aarch64_size_dynamic_sections): Init mapping symbol information for erratum 835769. (elf_backend_write_section): Define. ld/ * emultempl/aarch64elf.em: Add command-line option for erratum 835769. ld/testsuite/ * ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum 835769 tests. * ld-aarch64/erratum835769.d: New. * ld-aarch64/erratum835769.s: New.
2014-10-24 12:39:35 +02:00
asection *output_section;
bfd_byte *contents;
};
/* Helper to insert branches to erratum 835769 stubs in the right
places for a particular section. */
static bfd_boolean
make_branch_to_erratum_835769_stub (struct bfd_hash_entry *gen_entry,
void *in_arg)
{
struct elf_aarch64_stub_hash_entry *stub_entry;
struct erratum_835769_branch_to_stub_data *data;
bfd_byte *contents;
unsigned long branch_insn = 0;
bfd_vma veneered_insn_loc, veneer_entry_loc;
bfd_signed_vma branch_offset;
unsigned int target;
bfd *abfd;
stub_entry = (struct elf_aarch64_stub_hash_entry *) gen_entry;
data = (struct erratum_835769_branch_to_stub_data *) in_arg;
if (stub_entry->target_section != data->output_section
|| stub_entry->stub_type != aarch64_stub_erratum_835769_veneer)
return TRUE;
contents = data->contents;
veneered_insn_loc = stub_entry->target_section->output_section->vma
+ stub_entry->target_section->output_offset
+ stub_entry->target_value;
veneer_entry_loc = stub_entry->stub_sec->output_section->vma
+ stub_entry->stub_sec->output_offset
+ stub_entry->stub_offset;
branch_offset = veneer_entry_loc - veneered_insn_loc;
abfd = stub_entry->target_section->owner;
if (!aarch64_valid_branch_p (veneer_entry_loc, veneered_insn_loc))
Remove syntactic sugar Now that _bfd_error_handler is not a function pointer. * aout-adobe.c: Replace (*_bfd_error_handler) (...) with _bfd_error_handler (...) throughout. * aout-cris.c, * aoutx.h, * archive.c, * bfd.c, * binary.c, * cache.c, * coff-alpha.c, * coff-arm.c, * coff-h8300.c, * coff-i860.c, * coff-mcore.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * cpu-arm.c, * cpu-m68k.c, * cpu-sh.c, * dwarf2.c, * ecoff.c, * elf-eh-frame.c, * elf-m10300.c, * elf.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c, * elf32-cris.c, * elf32-crx.c, * elf32-dlx.c, * elf32-frv.c, * elf32-hppa.c, * elf32-i370.c, * elf32-i386.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc1x.c, * elf32-m68k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-nds32.c, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-rl78.c, * elf32-s390.c, * elf32-score.c, * elf32-score7.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilepro.c, * elf32-v850.c, * elf32-vax.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-x86-64.c, * elfcode.h, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfxx-mips.c, * elfxx-sparc.c, * elfxx-tilegx.c, * hpux-core.c, * i386linux.c, * ieee.c, * ihex.c, * libbfd.c, * linker.c, * m68klinux.c, * mach-o.c, * merge.c, * mmo.c, * oasys.c, * osf-core.c, * pdp11.c, * pe-mips.c, * peXXigen.c, * pef.c, * plugin.c, * reloc.c, * rs6000-core.c, * sco5-core.c, * som.c, * sparclinux.c, * srec.c, * stabs.c, * syms.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * xcofflink.c: Likewise.
2016-09-30 05:30:18 +02:00
_bfd_error_handler
ARM and AArch64 messages More standarization of error/warning messages. The ARM backend has some multi-line error messages, which don't fit particularly well with the GNU coding standard insistence that error messages shouldn't be capitalized or have a full-stop. I've replaced the line breaks with semicolons. So for instance the following system/path/to/ld: myobject.o: invalid special symbol `foo'. system/path/to/ld: It must be a global or weak function symbol. becomes system/path/to/ld: myobject.o: invalid special symbol `foo'; it must be a global or weak function symbol bfd/ * elf32-arm.c, * elfnn-aarch64.c: Standardize error/warning messages. ld/ * testsuite/ld-aarch64/reloc-overflow-bad.d, * testsuite/ld-arm/attr-merge-9.out, * testsuite/ld-arm/attr-merge-arch-2.d, * testsuite/ld-arm/attr-merge-unknown-1.d, * testsuite/ld-arm/attr-merge-unknown-2.d, * testsuite/ld-arm/attr-merge-unknown-2r.d, * testsuite/ld-arm/attr-merge-unknown-3.d, * testsuite/ld-arm/cmse-implib-errors.out, * testsuite/ld-arm/cmse-new-earlier-later-implib.out, * testsuite/ld-arm/cmse-new-implib-no-output.out, * testsuite/ld-arm/cmse-new-implib-not-sg-in-implib.out, * testsuite/ld-arm/cmse-new-implib.out, * testsuite/ld-arm/cmse-new-wrong-implib.out, * testsuite/ld-arm/cmse-veneers-no-gnu_sgstubs.out, * testsuite/ld-arm/cmse-veneers-wrong-entryfct.out, * testsuite/ld-arm/group-relocs-alu-bad-2.d, * testsuite/ld-arm/group-relocs-alu-bad.d, * testsuite/ld-arm/group-relocs-ldc-bad-2.d, * testsuite/ld-arm/group-relocs-ldc-bad.d, * testsuite/ld-arm/group-relocs-ldr-bad-2.d, * testsuite/ld-arm/group-relocs-ldr-bad.d, * testsuite/ld-arm/group-relocs-ldrs-bad-2.d, * testsuite/ld-arm/group-relocs-ldrs-bad.d, * testsuite/ld-arm/stm32l4xx-cannot-fix-far-ldm.d: Update.
2018-02-21 03:34:48 +01:00
(_("%pB: error: erratum 835769 stub out "
Remove syntactic sugar Now that _bfd_error_handler is not a function pointer. * aout-adobe.c: Replace (*_bfd_error_handler) (...) with _bfd_error_handler (...) throughout. * aout-cris.c, * aoutx.h, * archive.c, * bfd.c, * binary.c, * cache.c, * coff-alpha.c, * coff-arm.c, * coff-h8300.c, * coff-i860.c, * coff-mcore.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * cpu-arm.c, * cpu-m68k.c, * cpu-sh.c, * dwarf2.c, * ecoff.c, * elf-eh-frame.c, * elf-m10300.c, * elf.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c, * elf32-cris.c, * elf32-crx.c, * elf32-dlx.c, * elf32-frv.c, * elf32-hppa.c, * elf32-i370.c, * elf32-i386.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc1x.c, * elf32-m68k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-nds32.c, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-rl78.c, * elf32-s390.c, * elf32-score.c, * elf32-score7.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilepro.c, * elf32-v850.c, * elf32-vax.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-x86-64.c, * elfcode.h, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfxx-mips.c, * elfxx-sparc.c, * elfxx-tilegx.c, * hpux-core.c, * i386linux.c, * ieee.c, * ihex.c, * libbfd.c, * linker.c, * m68klinux.c, * mach-o.c, * merge.c, * mmo.c, * oasys.c, * osf-core.c, * pdp11.c, * pe-mips.c, * peXXigen.c, * pef.c, * plugin.c, * reloc.c, * rs6000-core.c, * sco5-core.c, * som.c, * sparclinux.c, * srec.c, * stabs.c, * syms.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * xcofflink.c: Likewise.
2016-09-30 05:30:18 +02:00
"of range (input file too large)"), abfd);
[AArch64] Cortex-A53 erratum 835769 linker workaround 2014-10-22 Tejas Belagod <tejas.belagod@arm.com> bfd/ * bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter. * bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise. * elfnn-aarch64.c (aarch64_erratum_835769_stub): New. (elf_aarch64_stub_type): Add new type aarch64_stub_erratum_835769_veneer. (elf_aarch64_stub_hash_entry): New fields for erratum 835769. (aarch64_erratum_835769_fix): New data struct to record erratum 835769. (elf_aarch64_link_hash_table: Global flags for 835769. (aarch64_build_one_stub): Add case for 835769. (aarch64_size_one_stub): Likewise. (aarch64_mem_op_p, aarch64_mlxl_p, aarch64_erratum_sequence,erratum_835769_scan): New. Decode and scan functions for erratum 835769. (elf_aarch64_create_or_find_stub_sec): New. (elfNN_aarch64_size_stubs): Look for erratum 835769 and record them. (bfd_elfNN_aarch64_set_options: Set global flag for 835769. (erratum_835769_branch_to_stub_data, make_branch_to_erratum_835769_stub):New. Connect up all the erratum stubs to occurances by branches. (elfNN_aarch64_write_section): New hook. (aarch64_map_one_stub): Output erratum stub symbol. (elfNN_aarch64_size_dynamic_sections): Init mapping symbol information for erratum 835769. (elf_backend_write_section): Define. ld/ * emultempl/aarch64elf.em: Add command-line option for erratum 835769. ld/testsuite/ * ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum 835769 tests. * ld-aarch64/erratum835769.d: New. * ld-aarch64/erratum835769.s: New.
2014-10-24 12:39:35 +02:00
target = stub_entry->target_value;
branch_insn = 0x14000000;
branch_offset >>= 2;
branch_offset &= 0x3ffffff;
branch_insn |= branch_offset;
bfd_putl32 (branch_insn, &contents[target]);
return TRUE;
}
[AArch64] Workaround for Cortex A53 erratum 843419 Some early revisions of the Cortex-A53 have an erratum (843419). The details of the erratum are quite complex and involve dynamic conditions. For the purposes of the workaround we have simplified the static conditions to an ADRP in the last two instructions of a 4KByte page, followed within four instructions by a load/store dependent on the ADRP. This patch adds support to conservatively scan for and workaround Cortex A53 erratum 843419. There are two different workaround strategies used. The first is to rewrite ADRP instructions which form part of an erratum sequence with an ADR instruction. In situations where the ADR provides insufficient offset the dependent load or store instruction from the sequence is moved to a stub section and branches are inserted from the original sequence to the relocated instruction and back again. Stub section sizes are rounded up to a multiple of 4096 in order to ensure that the act of inserting work around stubs does not create more errata sequences. Workaround stubs are always inserted into the stub section associated with the input section containing the erratum sequence. This ensures that the fully relocated form of the veneered load store instruction is available at the point in time when the stub section is written.
2015-02-24 13:04:41 +01:00
static bfd_boolean
_bfd_aarch64_erratum_843419_branch_to_stub (struct bfd_hash_entry *gen_entry,
void *in_arg)
{
struct elf_aarch64_stub_hash_entry *stub_entry
= (struct elf_aarch64_stub_hash_entry *) gen_entry;
struct erratum_835769_branch_to_stub_data *data
= (struct erratum_835769_branch_to_stub_data *) in_arg;
struct bfd_link_info *info;
struct elf_aarch64_link_hash_table *htab;
bfd_byte *contents;
asection *section;
bfd *abfd;
bfd_vma place;
uint32_t insn;
info = data->info;
contents = data->contents;
section = data->output_section;
htab = elf_aarch64_hash_table (info);
if (stub_entry->target_section != section
|| stub_entry->stub_type != aarch64_stub_erratum_843419_veneer)
return TRUE;
AArch64: Implement choice between Cortex-A53 erratum workarounds. (PR ld/24373) The Cortex-A53 erratum currently has two ways it can resolve the erratum when using the flag --fix-cortex-a53-843419: 1) If the address is within the range of an ADR instruction it rewrites the ADRP into an ADR, and those doesn't need the use of a veneer. 2) If the address is not within range, it adds a branch to a veneer which will execute the final bit of the erratum workaround and branch back to the call site. When we do this we always generate the veneers and we always align the size of the text section to 4KB. This is because we only know which workaround we can use after all linking has finished and all addresses are known. This means even though the veneers are not used, we still generate the section and we still change the size of the input section. This is problematic for small memory devices as this would require the user to take about a ~4KB hit in memory even though it's not even used. Since there's no real way to restart the linking process from the final write phase this patch solves the issue by allowing the user more control over which erratum workaround gets used. Concretely this changes the option --fix-cortex-a53-843419 to take optional arguments --fix-cortex-a53-843419[=full|adr|adrp] - full (default): Use both ADRP and ADR workaround. This is equivalent to not specifying any options and is the default behavior before this patch. - adr: Only use the ADR workaround, this will not cause any increase in binary size but linking will fail if the referenced address is out of range of an ADR instruction. - adrp: Use only the ADRP workaround, this will never rewrite your ADRP. In the cases where the user knows how big their binaries are the `adr` option would prevent the unneeded overhead. bfd/ChangeLog: PR ld/24373 * bfd-in.h (enum erratum_84319_opts): New (bfd_elf64_aarch64_set_options, bfd_elf32_aarch64_set_options): Change int to enum erratum_84319_opts. * bfd-in2.h: Regenerate. * elfnn-aarch64.c (struct elf_aarch64_link_hash_table): Change fix_erratum_843419 to use new enum, remove fix_erratum_843419_adr. (_bfd_aarch64_add_stub_entry_after): Conditionally create erratum stub. (aarch64_size_one_stub): Conditionally size erratum 843419 stubs. (_bfd_aarch64_resize_stubs): Amend comment. (elfNN_aarch64_size_stubs): Don't generate stubs when no workaround requested. (bfd_elfNN_aarch64_set_options): Use new fix_erratum_843419 enum. (_bfd_aarch64_erratum_843419_branch_to_stub): Implement selection of erratum workaround. (clear_erratum_843419_entry): Update erratum conditional. ld/ChangeLog: PR ld/24373 * emultempl/aarch64elf.em (PARSE_AND_LIST_LONGOPTS): Add optional args to flags. * NEWS: Add changes to flag. (PARSE_AND_LIST_OPTIONS): Update help descriptions. (PARSE_AND_LIST_ARGS_CASES): Add new options to parser. * testsuite/ld-aarch64/aarch64-elf.exp: Add new run_dump_tests. * testsuite/ld-aarch64/erratum843419-adr.d: New test. * testsuite/ld-aarch64/erratum843419-adrp.d: New test. * testsuite/ld-aarch64/erratum843419-far-adr.d: New test. * testsuite/ld-aarch64/erratum843419-far-full.d: New test. * testsuite/ld-aarch64/erratum843419-far.s: New test. * testsuite/ld-aarch64/erratum843419-full.d: New test. * testsuite/ld-aarch64/erratum843419-near.s: New test. * testsuite/ld-aarch64/erratum843419-no-args.d: New test.
2019-05-21 14:04:08 +02:00
BFD_ASSERT (((htab->fix_erratum_843419 & ERRAT_ADRP) && stub_entry->stub_sec)
|| (htab->fix_erratum_843419 & ERRAT_ADR));
/* Only update the stub section if we have one. We should always have one if
we're allowed to use the ADRP errata workaround, otherwise it is not
required. */
if (stub_entry->stub_sec)
{
insn = bfd_getl32 (contents + stub_entry->target_value);
bfd_putl32 (insn,
stub_entry->stub_sec->contents + stub_entry->stub_offset);
}
[AArch64] Workaround for Cortex A53 erratum 843419 Some early revisions of the Cortex-A53 have an erratum (843419). The details of the erratum are quite complex and involve dynamic conditions. For the purposes of the workaround we have simplified the static conditions to an ADRP in the last two instructions of a 4KByte page, followed within four instructions by a load/store dependent on the ADRP. This patch adds support to conservatively scan for and workaround Cortex A53 erratum 843419. There are two different workaround strategies used. The first is to rewrite ADRP instructions which form part of an erratum sequence with an ADR instruction. In situations where the ADR provides insufficient offset the dependent load or store instruction from the sequence is moved to a stub section and branches are inserted from the original sequence to the relocated instruction and back again. Stub section sizes are rounded up to a multiple of 4096 in order to ensure that the act of inserting work around stubs does not create more errata sequences. Workaround stubs are always inserted into the stub section associated with the input section containing the erratum sequence. This ensures that the fully relocated form of the veneered load store instruction is available at the point in time when the stub section is written.
2015-02-24 13:04:41 +01:00
place = (section->output_section->vma + section->output_offset
+ stub_entry->adrp_offset);
insn = bfd_getl32 (contents + stub_entry->adrp_offset);
AArch64: Fix regression in Cortex A53 erratum when PIE. (PR ld/23904) The fix for PR ld/22263 causes TLS relocations using ADRP to be relaxed into MOVZ, however this causes issues for the erratum code. The erratum code scans the input sections looking for ADRP instructions and notes their location in the stream. It then later tries to find them again in order to generate the linker stubs. Due to the relaxation it instead finds a MOVZ and hard aborts. Since this relaxation is a valid one, and in which case the erratum no longer applies, it shouldn't abort but instead just continue. This changes the TLS relaxation code such that when it finds an ADRP and it relaxes it, it removes the erratum entry from the work list by changing the stub type into none so the stub is ignored. The entry is not actually removed as removal is a more expensive operation and we have already allocated the memory anyway. The clearing is done for IE->LE and GD->LE relaxations, and a testcase is added for the IE case. The GD case I believe to be impossible to get together with the erratum sequence due to the required BL which would break the sequence. However to cover all basis I have added the guard there as well. build on native hardware and regtested on aarch64-none-elf, aarch64-none-elf (32 bit host), aarch64-none-linux-gnu, aarch64-none-linux-gnu (32 bit host) Cross-compiled and regtested on aarch64-none-linux-gnu, aarch64_be-none-linux-gnu Testcase in PR23940 tested and works as expected now and benchmarks ran on A53 showing no regressions and no issues. bfd/ChangeLog: PR ld/23904 * elfnn-aarch64.c (_bfd_aarch64_adrp_p): Use existing constants. (_bfd_aarch64_erratum_843419_branch_to_stub): Use _bfd_aarch64_adrp_p. (struct erratum_835769_branch_to_stub_clear_data): New. (_bfd_aarch64_erratum_843419_clear_stub): New. (clear_erratum_843419_entry): New. (elfNN_aarch64_tls_relax): Use it. (elfNN_aarch64_relocate_section): Pass input_section. (aarch64_map_one_stub): Handle branch type none as valid. ld/ChangeLog: PR ld/23904 * testsuite/ld-aarch64/aarch64-elf.exp: Add erratum843419_tls_ie. * testsuite/ld-aarch64/erratum843419_tls_ie.d: New test. * testsuite/ld-aarch64/erratum843419_tls_ie.s: New test.
2018-11-27 13:33:21 +01:00
if (!_bfd_aarch64_adrp_p (insn))
[AArch64] Workaround for Cortex A53 erratum 843419 Some early revisions of the Cortex-A53 have an erratum (843419). The details of the erratum are quite complex and involve dynamic conditions. For the purposes of the workaround we have simplified the static conditions to an ADRP in the last two instructions of a 4KByte page, followed within four instructions by a load/store dependent on the ADRP. This patch adds support to conservatively scan for and workaround Cortex A53 erratum 843419. There are two different workaround strategies used. The first is to rewrite ADRP instructions which form part of an erratum sequence with an ADR instruction. In situations where the ADR provides insufficient offset the dependent load or store instruction from the sequence is moved to a stub section and branches are inserted from the original sequence to the relocated instruction and back again. Stub section sizes are rounded up to a multiple of 4096 in order to ensure that the act of inserting work around stubs does not create more errata sequences. Workaround stubs are always inserted into the stub section associated with the input section containing the erratum sequence. This ensures that the fully relocated form of the veneered load store instruction is available at the point in time when the stub section is written.
2015-02-24 13:04:41 +01:00
abort ();
bfd_signed_vma imm =
(_bfd_aarch64_sign_extend
((bfd_vma) _bfd_aarch64_decode_adrp_imm (insn) << 12, 33)
- (place & 0xfff));
AArch64: Implement choice between Cortex-A53 erratum workarounds. (PR ld/24373) The Cortex-A53 erratum currently has two ways it can resolve the erratum when using the flag --fix-cortex-a53-843419: 1) If the address is within the range of an ADR instruction it rewrites the ADRP into an ADR, and those doesn't need the use of a veneer. 2) If the address is not within range, it adds a branch to a veneer which will execute the final bit of the erratum workaround and branch back to the call site. When we do this we always generate the veneers and we always align the size of the text section to 4KB. This is because we only know which workaround we can use after all linking has finished and all addresses are known. This means even though the veneers are not used, we still generate the section and we still change the size of the input section. This is problematic for small memory devices as this would require the user to take about a ~4KB hit in memory even though it's not even used. Since there's no real way to restart the linking process from the final write phase this patch solves the issue by allowing the user more control over which erratum workaround gets used. Concretely this changes the option --fix-cortex-a53-843419 to take optional arguments --fix-cortex-a53-843419[=full|adr|adrp] - full (default): Use both ADRP and ADR workaround. This is equivalent to not specifying any options and is the default behavior before this patch. - adr: Only use the ADR workaround, this will not cause any increase in binary size but linking will fail if the referenced address is out of range of an ADR instruction. - adrp: Use only the ADRP workaround, this will never rewrite your ADRP. In the cases where the user knows how big their binaries are the `adr` option would prevent the unneeded overhead. bfd/ChangeLog: PR ld/24373 * bfd-in.h (enum erratum_84319_opts): New (bfd_elf64_aarch64_set_options, bfd_elf32_aarch64_set_options): Change int to enum erratum_84319_opts. * bfd-in2.h: Regenerate. * elfnn-aarch64.c (struct elf_aarch64_link_hash_table): Change fix_erratum_843419 to use new enum, remove fix_erratum_843419_adr. (_bfd_aarch64_add_stub_entry_after): Conditionally create erratum stub. (aarch64_size_one_stub): Conditionally size erratum 843419 stubs. (_bfd_aarch64_resize_stubs): Amend comment. (elfNN_aarch64_size_stubs): Don't generate stubs when no workaround requested. (bfd_elfNN_aarch64_set_options): Use new fix_erratum_843419 enum. (_bfd_aarch64_erratum_843419_branch_to_stub): Implement selection of erratum workaround. (clear_erratum_843419_entry): Update erratum conditional. ld/ChangeLog: PR ld/24373 * emultempl/aarch64elf.em (PARSE_AND_LIST_LONGOPTS): Add optional args to flags. * NEWS: Add changes to flag. (PARSE_AND_LIST_OPTIONS): Update help descriptions. (PARSE_AND_LIST_ARGS_CASES): Add new options to parser. * testsuite/ld-aarch64/aarch64-elf.exp: Add new run_dump_tests. * testsuite/ld-aarch64/erratum843419-adr.d: New test. * testsuite/ld-aarch64/erratum843419-adrp.d: New test. * testsuite/ld-aarch64/erratum843419-far-adr.d: New test. * testsuite/ld-aarch64/erratum843419-far-full.d: New test. * testsuite/ld-aarch64/erratum843419-far.s: New test. * testsuite/ld-aarch64/erratum843419-full.d: New test. * testsuite/ld-aarch64/erratum843419-near.s: New test. * testsuite/ld-aarch64/erratum843419-no-args.d: New test.
2019-05-21 14:04:08 +02:00
if ((htab->fix_erratum_843419 & ERRAT_ADR)
[AArch64] Workaround for Cortex A53 erratum 843419 Some early revisions of the Cortex-A53 have an erratum (843419). The details of the erratum are quite complex and involve dynamic conditions. For the purposes of the workaround we have simplified the static conditions to an ADRP in the last two instructions of a 4KByte page, followed within four instructions by a load/store dependent on the ADRP. This patch adds support to conservatively scan for and workaround Cortex A53 erratum 843419. There are two different workaround strategies used. The first is to rewrite ADRP instructions which form part of an erratum sequence with an ADR instruction. In situations where the ADR provides insufficient offset the dependent load or store instruction from the sequence is moved to a stub section and branches are inserted from the original sequence to the relocated instruction and back again. Stub section sizes are rounded up to a multiple of 4096 in order to ensure that the act of inserting work around stubs does not create more errata sequences. Workaround stubs are always inserted into the stub section associated with the input section containing the erratum sequence. This ensures that the fully relocated form of the veneered load store instruction is available at the point in time when the stub section is written.
2015-02-24 13:04:41 +01:00
&& (imm >= AARCH64_MIN_ADRP_IMM && imm <= AARCH64_MAX_ADRP_IMM))
{
insn = (_bfd_aarch64_reencode_adr_imm (AARCH64_ADR_OP, imm)
| AARCH64_RT (insn));
bfd_putl32 (insn, contents + stub_entry->adrp_offset);
AArch64: Implement choice between Cortex-A53 erratum workarounds. (PR ld/24373) The Cortex-A53 erratum currently has two ways it can resolve the erratum when using the flag --fix-cortex-a53-843419: 1) If the address is within the range of an ADR instruction it rewrites the ADRP into an ADR, and those doesn't need the use of a veneer. 2) If the address is not within range, it adds a branch to a veneer which will execute the final bit of the erratum workaround and branch back to the call site. When we do this we always generate the veneers and we always align the size of the text section to 4KB. This is because we only know which workaround we can use after all linking has finished and all addresses are known. This means even though the veneers are not used, we still generate the section and we still change the size of the input section. This is problematic for small memory devices as this would require the user to take about a ~4KB hit in memory even though it's not even used. Since there's no real way to restart the linking process from the final write phase this patch solves the issue by allowing the user more control over which erratum workaround gets used. Concretely this changes the option --fix-cortex-a53-843419 to take optional arguments --fix-cortex-a53-843419[=full|adr|adrp] - full (default): Use both ADRP and ADR workaround. This is equivalent to not specifying any options and is the default behavior before this patch. - adr: Only use the ADR workaround, this will not cause any increase in binary size but linking will fail if the referenced address is out of range of an ADR instruction. - adrp: Use only the ADRP workaround, this will never rewrite your ADRP. In the cases where the user knows how big their binaries are the `adr` option would prevent the unneeded overhead. bfd/ChangeLog: PR ld/24373 * bfd-in.h (enum erratum_84319_opts): New (bfd_elf64_aarch64_set_options, bfd_elf32_aarch64_set_options): Change int to enum erratum_84319_opts. * bfd-in2.h: Regenerate. * elfnn-aarch64.c (struct elf_aarch64_link_hash_table): Change fix_erratum_843419 to use new enum, remove fix_erratum_843419_adr. (_bfd_aarch64_add_stub_entry_after): Conditionally create erratum stub. (aarch64_size_one_stub): Conditionally size erratum 843419 stubs. (_bfd_aarch64_resize_stubs): Amend comment. (elfNN_aarch64_size_stubs): Don't generate stubs when no workaround requested. (bfd_elfNN_aarch64_set_options): Use new fix_erratum_843419 enum. (_bfd_aarch64_erratum_843419_branch_to_stub): Implement selection of erratum workaround. (clear_erratum_843419_entry): Update erratum conditional. ld/ChangeLog: PR ld/24373 * emultempl/aarch64elf.em (PARSE_AND_LIST_LONGOPTS): Add optional args to flags. * NEWS: Add changes to flag. (PARSE_AND_LIST_OPTIONS): Update help descriptions. (PARSE_AND_LIST_ARGS_CASES): Add new options to parser. * testsuite/ld-aarch64/aarch64-elf.exp: Add new run_dump_tests. * testsuite/ld-aarch64/erratum843419-adr.d: New test. * testsuite/ld-aarch64/erratum843419-adrp.d: New test. * testsuite/ld-aarch64/erratum843419-far-adr.d: New test. * testsuite/ld-aarch64/erratum843419-far-full.d: New test. * testsuite/ld-aarch64/erratum843419-far.s: New test. * testsuite/ld-aarch64/erratum843419-full.d: New test. * testsuite/ld-aarch64/erratum843419-near.s: New test. * testsuite/ld-aarch64/erratum843419-no-args.d: New test.
2019-05-21 14:04:08 +02:00
/* Stub is not needed, don't map it out. */
stub_entry->stub_type = aarch64_stub_none;
[AArch64] Workaround for Cortex A53 erratum 843419 Some early revisions of the Cortex-A53 have an erratum (843419). The details of the erratum are quite complex and involve dynamic conditions. For the purposes of the workaround we have simplified the static conditions to an ADRP in the last two instructions of a 4KByte page, followed within four instructions by a load/store dependent on the ADRP. This patch adds support to conservatively scan for and workaround Cortex A53 erratum 843419. There are two different workaround strategies used. The first is to rewrite ADRP instructions which form part of an erratum sequence with an ADR instruction. In situations where the ADR provides insufficient offset the dependent load or store instruction from the sequence is moved to a stub section and branches are inserted from the original sequence to the relocated instruction and back again. Stub section sizes are rounded up to a multiple of 4096 in order to ensure that the act of inserting work around stubs does not create more errata sequences. Workaround stubs are always inserted into the stub section associated with the input section containing the erratum sequence. This ensures that the fully relocated form of the veneered load store instruction is available at the point in time when the stub section is written.
2015-02-24 13:04:41 +01:00
}
AArch64: Implement choice between Cortex-A53 erratum workarounds. (PR ld/24373) The Cortex-A53 erratum currently has two ways it can resolve the erratum when using the flag --fix-cortex-a53-843419: 1) If the address is within the range of an ADR instruction it rewrites the ADRP into an ADR, and those doesn't need the use of a veneer. 2) If the address is not within range, it adds a branch to a veneer which will execute the final bit of the erratum workaround and branch back to the call site. When we do this we always generate the veneers and we always align the size of the text section to 4KB. This is because we only know which workaround we can use after all linking has finished and all addresses are known. This means even though the veneers are not used, we still generate the section and we still change the size of the input section. This is problematic for small memory devices as this would require the user to take about a ~4KB hit in memory even though it's not even used. Since there's no real way to restart the linking process from the final write phase this patch solves the issue by allowing the user more control over which erratum workaround gets used. Concretely this changes the option --fix-cortex-a53-843419 to take optional arguments --fix-cortex-a53-843419[=full|adr|adrp] - full (default): Use both ADRP and ADR workaround. This is equivalent to not specifying any options and is the default behavior before this patch. - adr: Only use the ADR workaround, this will not cause any increase in binary size but linking will fail if the referenced address is out of range of an ADR instruction. - adrp: Use only the ADRP workaround, this will never rewrite your ADRP. In the cases where the user knows how big their binaries are the `adr` option would prevent the unneeded overhead. bfd/ChangeLog: PR ld/24373 * bfd-in.h (enum erratum_84319_opts): New (bfd_elf64_aarch64_set_options, bfd_elf32_aarch64_set_options): Change int to enum erratum_84319_opts. * bfd-in2.h: Regenerate. * elfnn-aarch64.c (struct elf_aarch64_link_hash_table): Change fix_erratum_843419 to use new enum, remove fix_erratum_843419_adr. (_bfd_aarch64_add_stub_entry_after): Conditionally create erratum stub. (aarch64_size_one_stub): Conditionally size erratum 843419 stubs. (_bfd_aarch64_resize_stubs): Amend comment. (elfNN_aarch64_size_stubs): Don't generate stubs when no workaround requested. (bfd_elfNN_aarch64_set_options): Use new fix_erratum_843419 enum. (_bfd_aarch64_erratum_843419_branch_to_stub): Implement selection of erratum workaround. (clear_erratum_843419_entry): Update erratum conditional. ld/ChangeLog: PR ld/24373 * emultempl/aarch64elf.em (PARSE_AND_LIST_LONGOPTS): Add optional args to flags. * NEWS: Add changes to flag. (PARSE_AND_LIST_OPTIONS): Update help descriptions. (PARSE_AND_LIST_ARGS_CASES): Add new options to parser. * testsuite/ld-aarch64/aarch64-elf.exp: Add new run_dump_tests. * testsuite/ld-aarch64/erratum843419-adr.d: New test. * testsuite/ld-aarch64/erratum843419-adrp.d: New test. * testsuite/ld-aarch64/erratum843419-far-adr.d: New test. * testsuite/ld-aarch64/erratum843419-far-full.d: New test. * testsuite/ld-aarch64/erratum843419-far.s: New test. * testsuite/ld-aarch64/erratum843419-full.d: New test. * testsuite/ld-aarch64/erratum843419-near.s: New test. * testsuite/ld-aarch64/erratum843419-no-args.d: New test.
2019-05-21 14:04:08 +02:00
else if (htab->fix_erratum_843419 & ERRAT_ADRP)
[AArch64] Workaround for Cortex A53 erratum 843419 Some early revisions of the Cortex-A53 have an erratum (843419). The details of the erratum are quite complex and involve dynamic conditions. For the purposes of the workaround we have simplified the static conditions to an ADRP in the last two instructions of a 4KByte page, followed within four instructions by a load/store dependent on the ADRP. This patch adds support to conservatively scan for and workaround Cortex A53 erratum 843419. There are two different workaround strategies used. The first is to rewrite ADRP instructions which form part of an erratum sequence with an ADR instruction. In situations where the ADR provides insufficient offset the dependent load or store instruction from the sequence is moved to a stub section and branches are inserted from the original sequence to the relocated instruction and back again. Stub section sizes are rounded up to a multiple of 4096 in order to ensure that the act of inserting work around stubs does not create more errata sequences. Workaround stubs are always inserted into the stub section associated with the input section containing the erratum sequence. This ensures that the fully relocated form of the veneered load store instruction is available at the point in time when the stub section is written.
2015-02-24 13:04:41 +01:00
{
bfd_vma veneered_insn_loc;
bfd_vma veneer_entry_loc;
bfd_signed_vma branch_offset;
uint32_t branch_insn;
veneered_insn_loc = stub_entry->target_section->output_section->vma
+ stub_entry->target_section->output_offset
+ stub_entry->target_value;
veneer_entry_loc = stub_entry->stub_sec->output_section->vma
+ stub_entry->stub_sec->output_offset
+ stub_entry->stub_offset;
branch_offset = veneer_entry_loc - veneered_insn_loc;
abfd = stub_entry->target_section->owner;
if (!aarch64_valid_branch_p (veneer_entry_loc, veneered_insn_loc))
Remove syntactic sugar Now that _bfd_error_handler is not a function pointer. * aout-adobe.c: Replace (*_bfd_error_handler) (...) with _bfd_error_handler (...) throughout. * aout-cris.c, * aoutx.h, * archive.c, * bfd.c, * binary.c, * cache.c, * coff-alpha.c, * coff-arm.c, * coff-h8300.c, * coff-i860.c, * coff-mcore.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * cpu-arm.c, * cpu-m68k.c, * cpu-sh.c, * dwarf2.c, * ecoff.c, * elf-eh-frame.c, * elf-m10300.c, * elf.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c, * elf32-cris.c, * elf32-crx.c, * elf32-dlx.c, * elf32-frv.c, * elf32-hppa.c, * elf32-i370.c, * elf32-i386.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc1x.c, * elf32-m68k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-nds32.c, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-rl78.c, * elf32-s390.c, * elf32-score.c, * elf32-score7.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilepro.c, * elf32-v850.c, * elf32-vax.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-x86-64.c, * elfcode.h, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfxx-mips.c, * elfxx-sparc.c, * elfxx-tilegx.c, * hpux-core.c, * i386linux.c, * ieee.c, * ihex.c, * libbfd.c, * linker.c, * m68klinux.c, * mach-o.c, * merge.c, * mmo.c, * oasys.c, * osf-core.c, * pdp11.c, * pe-mips.c, * peXXigen.c, * pef.c, * plugin.c, * reloc.c, * rs6000-core.c, * sco5-core.c, * som.c, * sparclinux.c, * srec.c, * stabs.c, * syms.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * xcofflink.c: Likewise.
2016-09-30 05:30:18 +02:00
_bfd_error_handler
ARM and AArch64 messages More standarization of error/warning messages. The ARM backend has some multi-line error messages, which don't fit particularly well with the GNU coding standard insistence that error messages shouldn't be capitalized or have a full-stop. I've replaced the line breaks with semicolons. So for instance the following system/path/to/ld: myobject.o: invalid special symbol `foo'. system/path/to/ld: It must be a global or weak function symbol. becomes system/path/to/ld: myobject.o: invalid special symbol `foo'; it must be a global or weak function symbol bfd/ * elf32-arm.c, * elfnn-aarch64.c: Standardize error/warning messages. ld/ * testsuite/ld-aarch64/reloc-overflow-bad.d, * testsuite/ld-arm/attr-merge-9.out, * testsuite/ld-arm/attr-merge-arch-2.d, * testsuite/ld-arm/attr-merge-unknown-1.d, * testsuite/ld-arm/attr-merge-unknown-2.d, * testsuite/ld-arm/attr-merge-unknown-2r.d, * testsuite/ld-arm/attr-merge-unknown-3.d, * testsuite/ld-arm/cmse-implib-errors.out, * testsuite/ld-arm/cmse-new-earlier-later-implib.out, * testsuite/ld-arm/cmse-new-implib-no-output.out, * testsuite/ld-arm/cmse-new-implib-not-sg-in-implib.out, * testsuite/ld-arm/cmse-new-implib.out, * testsuite/ld-arm/cmse-new-wrong-implib.out, * testsuite/ld-arm/cmse-veneers-no-gnu_sgstubs.out, * testsuite/ld-arm/cmse-veneers-wrong-entryfct.out, * testsuite/ld-arm/group-relocs-alu-bad-2.d, * testsuite/ld-arm/group-relocs-alu-bad.d, * testsuite/ld-arm/group-relocs-ldc-bad-2.d, * testsuite/ld-arm/group-relocs-ldc-bad.d, * testsuite/ld-arm/group-relocs-ldr-bad-2.d, * testsuite/ld-arm/group-relocs-ldr-bad.d, * testsuite/ld-arm/group-relocs-ldrs-bad-2.d, * testsuite/ld-arm/group-relocs-ldrs-bad.d, * testsuite/ld-arm/stm32l4xx-cannot-fix-far-ldm.d: Update.
2018-02-21 03:34:48 +01:00
(_("%pB: error: erratum 843419 stub out "
[AArch64] Workaround for Cortex A53 erratum 843419 Some early revisions of the Cortex-A53 have an erratum (843419). The details of the erratum are quite complex and involve dynamic conditions. For the purposes of the workaround we have simplified the static conditions to an ADRP in the last two instructions of a 4KByte page, followed within four instructions by a load/store dependent on the ADRP. This patch adds support to conservatively scan for and workaround Cortex A53 erratum 843419. There are two different workaround strategies used. The first is to rewrite ADRP instructions which form part of an erratum sequence with an ADR instruction. In situations where the ADR provides insufficient offset the dependent load or store instruction from the sequence is moved to a stub section and branches are inserted from the original sequence to the relocated instruction and back again. Stub section sizes are rounded up to a multiple of 4096 in order to ensure that the act of inserting work around stubs does not create more errata sequences. Workaround stubs are always inserted into the stub section associated with the input section containing the erratum sequence. This ensures that the fully relocated form of the veneered load store instruction is available at the point in time when the stub section is written.
2015-02-24 13:04:41 +01:00
"of range (input file too large)"), abfd);
branch_insn = 0x14000000;
branch_offset >>= 2;
branch_offset &= 0x3ffffff;
branch_insn |= branch_offset;
bfd_putl32 (branch_insn, contents + stub_entry->target_value);
}
AArch64: Implement choice between Cortex-A53 erratum workarounds. (PR ld/24373) The Cortex-A53 erratum currently has two ways it can resolve the erratum when using the flag --fix-cortex-a53-843419: 1) If the address is within the range of an ADR instruction it rewrites the ADRP into an ADR, and those doesn't need the use of a veneer. 2) If the address is not within range, it adds a branch to a veneer which will execute the final bit of the erratum workaround and branch back to the call site. When we do this we always generate the veneers and we always align the size of the text section to 4KB. This is because we only know which workaround we can use after all linking has finished and all addresses are known. This means even though the veneers are not used, we still generate the section and we still change the size of the input section. This is problematic for small memory devices as this would require the user to take about a ~4KB hit in memory even though it's not even used. Since there's no real way to restart the linking process from the final write phase this patch solves the issue by allowing the user more control over which erratum workaround gets used. Concretely this changes the option --fix-cortex-a53-843419 to take optional arguments --fix-cortex-a53-843419[=full|adr|adrp] - full (default): Use both ADRP and ADR workaround. This is equivalent to not specifying any options and is the default behavior before this patch. - adr: Only use the ADR workaround, this will not cause any increase in binary size but linking will fail if the referenced address is out of range of an ADR instruction. - adrp: Use only the ADRP workaround, this will never rewrite your ADRP. In the cases where the user knows how big their binaries are the `adr` option would prevent the unneeded overhead. bfd/ChangeLog: PR ld/24373 * bfd-in.h (enum erratum_84319_opts): New (bfd_elf64_aarch64_set_options, bfd_elf32_aarch64_set_options): Change int to enum erratum_84319_opts. * bfd-in2.h: Regenerate. * elfnn-aarch64.c (struct elf_aarch64_link_hash_table): Change fix_erratum_843419 to use new enum, remove fix_erratum_843419_adr. (_bfd_aarch64_add_stub_entry_after): Conditionally create erratum stub. (aarch64_size_one_stub): Conditionally size erratum 843419 stubs. (_bfd_aarch64_resize_stubs): Amend comment. (elfNN_aarch64_size_stubs): Don't generate stubs when no workaround requested. (bfd_elfNN_aarch64_set_options): Use new fix_erratum_843419 enum. (_bfd_aarch64_erratum_843419_branch_to_stub): Implement selection of erratum workaround. (clear_erratum_843419_entry): Update erratum conditional. ld/ChangeLog: PR ld/24373 * emultempl/aarch64elf.em (PARSE_AND_LIST_LONGOPTS): Add optional args to flags. * NEWS: Add changes to flag. (PARSE_AND_LIST_OPTIONS): Update help descriptions. (PARSE_AND_LIST_ARGS_CASES): Add new options to parser. * testsuite/ld-aarch64/aarch64-elf.exp: Add new run_dump_tests. * testsuite/ld-aarch64/erratum843419-adr.d: New test. * testsuite/ld-aarch64/erratum843419-adrp.d: New test. * testsuite/ld-aarch64/erratum843419-far-adr.d: New test. * testsuite/ld-aarch64/erratum843419-far-full.d: New test. * testsuite/ld-aarch64/erratum843419-far.s: New test. * testsuite/ld-aarch64/erratum843419-full.d: New test. * testsuite/ld-aarch64/erratum843419-near.s: New test. * testsuite/ld-aarch64/erratum843419-no-args.d: New test.
2019-05-21 14:04:08 +02:00
else
{
abfd = stub_entry->target_section->owner;
_bfd_error_handler
AArch64: Fix -Werror on build This patch fixes a hardcoded `l` specifier on a `bfd_signed_vma`. Instead this now uses BFD_VMA_FMT which fixes the build on 32 bit hosts. Committed under the obvious rule. bfd/ChangeLog: PR ld/24373 * elfnn-aarch64.c (_bfd_aarch64_erratum_843419_branch_to_stub): Fix print formatter.
2019-05-21 18:15:36 +02:00
(_("%pB: error: erratum 843419 immediate 0x%" BFD_VMA_FMT "x "
AArch64: Implement choice between Cortex-A53 erratum workarounds. (PR ld/24373) The Cortex-A53 erratum currently has two ways it can resolve the erratum when using the flag --fix-cortex-a53-843419: 1) If the address is within the range of an ADR instruction it rewrites the ADRP into an ADR, and those doesn't need the use of a veneer. 2) If the address is not within range, it adds a branch to a veneer which will execute the final bit of the erratum workaround and branch back to the call site. When we do this we always generate the veneers and we always align the size of the text section to 4KB. This is because we only know which workaround we can use after all linking has finished and all addresses are known. This means even though the veneers are not used, we still generate the section and we still change the size of the input section. This is problematic for small memory devices as this would require the user to take about a ~4KB hit in memory even though it's not even used. Since there's no real way to restart the linking process from the final write phase this patch solves the issue by allowing the user more control over which erratum workaround gets used. Concretely this changes the option --fix-cortex-a53-843419 to take optional arguments --fix-cortex-a53-843419[=full|adr|adrp] - full (default): Use both ADRP and ADR workaround. This is equivalent to not specifying any options and is the default behavior before this patch. - adr: Only use the ADR workaround, this will not cause any increase in binary size but linking will fail if the referenced address is out of range of an ADR instruction. - adrp: Use only the ADRP workaround, this will never rewrite your ADRP. In the cases where the user knows how big their binaries are the `adr` option would prevent the unneeded overhead. bfd/ChangeLog: PR ld/24373 * bfd-in.h (enum erratum_84319_opts): New (bfd_elf64_aarch64_set_options, bfd_elf32_aarch64_set_options): Change int to enum erratum_84319_opts. * bfd-in2.h: Regenerate. * elfnn-aarch64.c (struct elf_aarch64_link_hash_table): Change fix_erratum_843419 to use new enum, remove fix_erratum_843419_adr. (_bfd_aarch64_add_stub_entry_after): Conditionally create erratum stub. (aarch64_size_one_stub): Conditionally size erratum 843419 stubs. (_bfd_aarch64_resize_stubs): Amend comment. (elfNN_aarch64_size_stubs): Don't generate stubs when no workaround requested. (bfd_elfNN_aarch64_set_options): Use new fix_erratum_843419 enum. (_bfd_aarch64_erratum_843419_branch_to_stub): Implement selection of erratum workaround. (clear_erratum_843419_entry): Update erratum conditional. ld/ChangeLog: PR ld/24373 * emultempl/aarch64elf.em (PARSE_AND_LIST_LONGOPTS): Add optional args to flags. * NEWS: Add changes to flag. (PARSE_AND_LIST_OPTIONS): Update help descriptions. (PARSE_AND_LIST_ARGS_CASES): Add new options to parser. * testsuite/ld-aarch64/aarch64-elf.exp: Add new run_dump_tests. * testsuite/ld-aarch64/erratum843419-adr.d: New test. * testsuite/ld-aarch64/erratum843419-adrp.d: New test. * testsuite/ld-aarch64/erratum843419-far-adr.d: New test. * testsuite/ld-aarch64/erratum843419-far-full.d: New test. * testsuite/ld-aarch64/erratum843419-far.s: New test. * testsuite/ld-aarch64/erratum843419-full.d: New test. * testsuite/ld-aarch64/erratum843419-near.s: New test. * testsuite/ld-aarch64/erratum843419-no-args.d: New test.
2019-05-21 14:04:08 +02:00
"out of range for ADR (input file too large) and "
"--fix-cortex-a53-843419=adr used. Run the linker with "
"--fix-cortex-a53-843419=full instead"), abfd, imm);
bfd_set_error (bfd_error_bad_value);
/* This function is called inside a hashtable traversal and the error
handlers called above turn into non-fatal errors. Which means this
case ld returns an exit code 0 and also produces a broken object file.
To prevent this, issue a hard abort. */
BFD_FAIL ();
}
[AArch64] Workaround for Cortex A53 erratum 843419 Some early revisions of the Cortex-A53 have an erratum (843419). The details of the erratum are quite complex and involve dynamic conditions. For the purposes of the workaround we have simplified the static conditions to an ADRP in the last two instructions of a 4KByte page, followed within four instructions by a load/store dependent on the ADRP. This patch adds support to conservatively scan for and workaround Cortex A53 erratum 843419. There are two different workaround strategies used. The first is to rewrite ADRP instructions which form part of an erratum sequence with an ADR instruction. In situations where the ADR provides insufficient offset the dependent load or store instruction from the sequence is moved to a stub section and branches are inserted from the original sequence to the relocated instruction and back again. Stub section sizes are rounded up to a multiple of 4096 in order to ensure that the act of inserting work around stubs does not create more errata sequences. Workaround stubs are always inserted into the stub section associated with the input section containing the erratum sequence. This ensures that the fully relocated form of the veneered load store instruction is available at the point in time when the stub section is written.
2015-02-24 13:04:41 +01:00
return TRUE;
}
[AArch64] Cortex-A53 erratum 835769 linker workaround 2014-10-22 Tejas Belagod <tejas.belagod@arm.com> bfd/ * bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter. * bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise. * elfnn-aarch64.c (aarch64_erratum_835769_stub): New. (elf_aarch64_stub_type): Add new type aarch64_stub_erratum_835769_veneer. (elf_aarch64_stub_hash_entry): New fields for erratum 835769. (aarch64_erratum_835769_fix): New data struct to record erratum 835769. (elf_aarch64_link_hash_table: Global flags for 835769. (aarch64_build_one_stub): Add case for 835769. (aarch64_size_one_stub): Likewise. (aarch64_mem_op_p, aarch64_mlxl_p, aarch64_erratum_sequence,erratum_835769_scan): New. Decode and scan functions for erratum 835769. (elf_aarch64_create_or_find_stub_sec): New. (elfNN_aarch64_size_stubs): Look for erratum 835769 and record them. (bfd_elfNN_aarch64_set_options: Set global flag for 835769. (erratum_835769_branch_to_stub_data, make_branch_to_erratum_835769_stub):New. Connect up all the erratum stubs to occurances by branches. (elfNN_aarch64_write_section): New hook. (aarch64_map_one_stub): Output erratum stub symbol. (elfNN_aarch64_size_dynamic_sections): Init mapping symbol information for erratum 835769. (elf_backend_write_section): Define. ld/ * emultempl/aarch64elf.em: Add command-line option for erratum 835769. ld/testsuite/ * ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum 835769 tests. * ld-aarch64/erratum835769.d: New. * ld-aarch64/erratum835769.s: New.
2014-10-24 12:39:35 +02:00
static bfd_boolean
elfNN_aarch64_write_section (bfd *output_bfd ATTRIBUTE_UNUSED,
struct bfd_link_info *link_info,
asection *sec,
bfd_byte *contents)
{
struct elf_aarch64_link_hash_table *globals =
[AArch64] Adjust layout of elfNN_aarch64_write_section.
2015-03-13 15:50:26 +01:00
elf_aarch64_hash_table (link_info);
[AArch64] Cortex-A53 erratum 835769 linker workaround 2014-10-22 Tejas Belagod <tejas.belagod@arm.com> bfd/ * bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter. * bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise. * elfnn-aarch64.c (aarch64_erratum_835769_stub): New. (elf_aarch64_stub_type): Add new type aarch64_stub_erratum_835769_veneer. (elf_aarch64_stub_hash_entry): New fields for erratum 835769. (aarch64_erratum_835769_fix): New data struct to record erratum 835769. (elf_aarch64_link_hash_table: Global flags for 835769. (aarch64_build_one_stub): Add case for 835769. (aarch64_size_one_stub): Likewise. (aarch64_mem_op_p, aarch64_mlxl_p, aarch64_erratum_sequence,erratum_835769_scan): New. Decode and scan functions for erratum 835769. (elf_aarch64_create_or_find_stub_sec): New. (elfNN_aarch64_size_stubs): Look for erratum 835769 and record them. (bfd_elfNN_aarch64_set_options: Set global flag for 835769. (erratum_835769_branch_to_stub_data, make_branch_to_erratum_835769_stub):New. Connect up all the erratum stubs to occurances by branches. (elfNN_aarch64_write_section): New hook. (aarch64_map_one_stub): Output erratum stub symbol. (elfNN_aarch64_size_dynamic_sections): Init mapping symbol information for erratum 835769. (elf_backend_write_section): Define. ld/ * emultempl/aarch64elf.em: Add command-line option for erratum 835769. ld/testsuite/ * ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum 835769 tests. * ld-aarch64/erratum835769.d: New. * ld-aarch64/erratum835769.s: New.
2014-10-24 12:39:35 +02:00
if (globals == NULL)
return FALSE;
/* Fix code to point to erratum 835769 stubs. */
if (globals->fix_erratum_835769)
{
struct erratum_835769_branch_to_stub_data data;
[AArch64] Workaround for Cortex A53 erratum 843419 Some early revisions of the Cortex-A53 have an erratum (843419). The details of the erratum are quite complex and involve dynamic conditions. For the purposes of the workaround we have simplified the static conditions to an ADRP in the last two instructions of a 4KByte page, followed within four instructions by a load/store dependent on the ADRP. This patch adds support to conservatively scan for and workaround Cortex A53 erratum 843419. There are two different workaround strategies used. The first is to rewrite ADRP instructions which form part of an erratum sequence with an ADR instruction. In situations where the ADR provides insufficient offset the dependent load or store instruction from the sequence is moved to a stub section and branches are inserted from the original sequence to the relocated instruction and back again. Stub section sizes are rounded up to a multiple of 4096 in order to ensure that the act of inserting work around stubs does not create more errata sequences. Workaround stubs are always inserted into the stub section associated with the input section containing the erratum sequence. This ensures that the fully relocated form of the veneered load store instruction is available at the point in time when the stub section is written.
2015-02-24 13:04:41 +01:00
data.info = link_info;
[AArch64] Cortex-A53 erratum 835769 linker workaround 2014-10-22 Tejas Belagod <tejas.belagod@arm.com> bfd/ * bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter. * bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise. * elfnn-aarch64.c (aarch64_erratum_835769_stub): New. (elf_aarch64_stub_type): Add new type aarch64_stub_erratum_835769_veneer. (elf_aarch64_stub_hash_entry): New fields for erratum 835769. (aarch64_erratum_835769_fix): New data struct to record erratum 835769. (elf_aarch64_link_hash_table: Global flags for 835769. (aarch64_build_one_stub): Add case for 835769. (aarch64_size_one_stub): Likewise. (aarch64_mem_op_p, aarch64_mlxl_p, aarch64_erratum_sequence,erratum_835769_scan): New. Decode and scan functions for erratum 835769. (elf_aarch64_create_or_find_stub_sec): New. (elfNN_aarch64_size_stubs): Look for erratum 835769 and record them. (bfd_elfNN_aarch64_set_options: Set global flag for 835769. (erratum_835769_branch_to_stub_data, make_branch_to_erratum_835769_stub):New. Connect up all the erratum stubs to occurances by branches. (elfNN_aarch64_write_section): New hook. (aarch64_map_one_stub): Output erratum stub symbol. (elfNN_aarch64_size_dynamic_sections): Init mapping symbol information for erratum 835769. (elf_backend_write_section): Define. ld/ * emultempl/aarch64elf.em: Add command-line option for erratum 835769. ld/testsuite/ * ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum 835769 tests. * ld-aarch64/erratum835769.d: New. * ld-aarch64/erratum835769.s: New.
2014-10-24 12:39:35 +02:00
data.output_section = sec;
data.contents = contents;
bfd_hash_traverse (&globals->stub_hash_table,
make_branch_to_erratum_835769_stub, &data);
}
[AArch64] Workaround for Cortex A53 erratum 843419 Some early revisions of the Cortex-A53 have an erratum (843419). The details of the erratum are quite complex and involve dynamic conditions. For the purposes of the workaround we have simplified the static conditions to an ADRP in the last two instructions of a 4KByte page, followed within four instructions by a load/store dependent on the ADRP. This patch adds support to conservatively scan for and workaround Cortex A53 erratum 843419. There are two different workaround strategies used. The first is to rewrite ADRP instructions which form part of an erratum sequence with an ADR instruction. In situations where the ADR provides insufficient offset the dependent load or store instruction from the sequence is moved to a stub section and branches are inserted from the original sequence to the relocated instruction and back again. Stub section sizes are rounded up to a multiple of 4096 in order to ensure that the act of inserting work around stubs does not create more errata sequences. Workaround stubs are always inserted into the stub section associated with the input section containing the erratum sequence. This ensures that the fully relocated form of the veneered load store instruction is available at the point in time when the stub section is written.
2015-02-24 13:04:41 +01:00
if (globals->fix_erratum_843419)
{
struct erratum_835769_branch_to_stub_data data;
data.info = link_info;
data.output_section = sec;
data.contents = contents;
bfd_hash_traverse (&globals->stub_hash_table,
_bfd_aarch64_erratum_843419_branch_to_stub, &data);
}
[AArch64] Cortex-A53 erratum 835769 linker workaround 2014-10-22 Tejas Belagod <tejas.belagod@arm.com> bfd/ * bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter. * bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise. * elfnn-aarch64.c (aarch64_erratum_835769_stub): New. (elf_aarch64_stub_type): Add new type aarch64_stub_erratum_835769_veneer. (elf_aarch64_stub_hash_entry): New fields for erratum 835769. (aarch64_erratum_835769_fix): New data struct to record erratum 835769. (elf_aarch64_link_hash_table: Global flags for 835769. (aarch64_build_one_stub): Add case for 835769. (aarch64_size_one_stub): Likewise. (aarch64_mem_op_p, aarch64_mlxl_p, aarch64_erratum_sequence,erratum_835769_scan): New. Decode and scan functions for erratum 835769. (elf_aarch64_create_or_find_stub_sec): New. (elfNN_aarch64_size_stubs): Look for erratum 835769 and record them. (bfd_elfNN_aarch64_set_options: Set global flag for 835769. (erratum_835769_branch_to_stub_data, make_branch_to_erratum_835769_stub):New. Connect up all the erratum stubs to occurances by branches. (elfNN_aarch64_write_section): New hook. (aarch64_map_one_stub): Output erratum stub symbol. (elfNN_aarch64_size_dynamic_sections): Init mapping symbol information for erratum 835769. (elf_backend_write_section): Define. ld/ * emultempl/aarch64elf.em: Add command-line option for erratum 835769. ld/testsuite/ * ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum 835769 tests. * ld-aarch64/erratum835769.d: New. * ld-aarch64/erratum835769.s: New.
2014-10-24 12:39:35 +02:00
return FALSE;
}
[AArch64] Remove duplicated code when handling some GOT relocations types There are quite a few duplicated code supporting several GP based relocation types. They are: BFD_RELOC_AARCH64_LD64_GOTOFF_LO15 BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC BFD_RELOC_AARCH64_MOVW_GOTOFF_G1 These relocation types are supposed to be used for large memory model PIC/pic mode under which we will have an initialized GP register points to the base of GOT table, then these relocations are supposed to put the distance between GOT entry and GOT table base address into the related instructions. So, the parameters required to calculate the relocation should be the same as BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15 etc, all of them are require the GOT entry address and GOT table base address to perform the relocation. This patch has removed those duplicated code when handling above listed relocation types, grouped them with others as relocation types that are require GOT table base address during performing relocation, reused the existed GOT handling code. The relocation calculation for these types before and after this patch should be identical. bfd/ * elfnn-aarch64.c (aarch64_relocation_aginst_gp_p): New function. (elfNN_aarch64_final_link_relocate): Delete duplicated code for BFD_RELOC_AARCH64_LD64_GOTOFF_LO15, BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC, BFD_RELOC_AARCH64_MOVW_GOTOFF_G1. * elfxx-aarch64.c (_bfd_aarch64_elf_resolve_relocation): Optimize the support for them.
2017-06-29 12:45:24 +02:00
/* Return TRUE if RELOC is a relocation against the base of GOT table. */
static bfd_boolean
aarch64_relocation_aginst_gp_p (bfd_reloc_code_real_type reloc)
{
return (reloc == BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14
|| reloc == BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15
|| reloc == BFD_RELOC_AARCH64_LD64_GOTOFF_LO15
|| reloc == BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC
|| reloc == BFD_RELOC_AARCH64_MOVW_GOTOFF_G1);
}
[AArch64] Remove redundant tls relax in elfNN_aarch64_final_link_relocate bfd/ * elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Remove redundant aarch64_tls_transition check.
2016-05-11 12:55:02 +02:00
/* Perform a relocation as part of a final link. The input relocation type
should be TLS relaxed. */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
static bfd_reloc_status_type
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_final_link_relocate (reloc_howto_type *howto,
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
bfd *input_bfd,
bfd *output_bfd,
asection *input_section,
bfd_byte *contents,
Elf_Internal_Rela *rel,
bfd_vma value,
struct bfd_link_info *info,
asection *sym_sec,
struct elf_link_hash_entry *h,
bfd_boolean *unresolved_reloc_p,
bfd_boolean save_addend,
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
bfd_vma *saved_addend,
Elf_Internal_Sym *sym)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
Elf_Internal_Shdr *symtab_hdr;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
unsigned int r_type = howto->type;
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
bfd_reloc_code_real_type bfd_r_type
= elfNN_aarch64_bfd_reloc_from_howto (howto);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
unsigned long r_symndx;
bfd_byte *hit_data = contents + rel->r_offset;
-Og warning fixes Found when building with gcc 4.9.4 using -Og. bfd/ * elf-eh-frame.c (offset_adjust): Avoid false positive gcc warning. * elflink.c (bfd_elf_size_dynsym_hash_dynstr): Likewise. * elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Likewise. ld/ * emultempl/msp430.em (eval_upper_either_sections): Make base_sec_name a const char*. (eval_lower_either_sections): Likewise. (msp430_elf_after_allocation): Likewise, and don't needlessly concat and free. Warning fix.
2017-09-02 03:30:02 +02:00
bfd_vma place, off, got_entry_addr = 0;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
bfd_signed_vma signed_addend;
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
struct elf_aarch64_link_hash_table *globals;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
bfd_boolean weak_undef_p;
[AArch64] Only override the symbol dynamic decision on undefined weak symbol This fix is an adaption of the x86-64 PR ld/21402 fix to AArch64. After the generic code deciding one symbol is not dynamic, AArch64 backend only overrides the decision on undefined weak symbols. bfd/ PR ld/21402 * elfnn-aarch64.c (elfNN_aarch64_allocate_dynrelocs): Only make undefined weak symbols into dynamic. (elfNN_aarch64_final_link_relocate): Generate runtime RELATIVE relocation for non-dynamic symbols. (elfNN_aarch64_finish_dynamic_symbol): Add sanity check.
2017-06-29 12:47:43 +02:00
bfd_boolean relative_reloc;
[AArch64] PR18270, fix handling of GOT entry for local symbol 2015-04-24 Jiong. Wang <jiong.wang@arm.com> bfd/ PR ld/18270 * elfnn-aarch64.c (elfNN_aarch64_size_dynamic): Count local symbol for GOT_NORMAL for both sgot/srelgot section. (elfNN_aarch64_final_link_relocate): Relocate against GOT entry address and generate necessary runtime relocation for GOT entry.
2015-04-25 00:25:28 +02:00
asection *base_got;
[AArch64] Only override the symbol dynamic decision on undefined weak symbol This fix is an adaption of the x86-64 PR ld/21402 fix to AArch64. After the generic code deciding one symbol is not dynamic, AArch64 backend only overrides the decision on undefined weak symbols. bfd/ PR ld/21402 * elfnn-aarch64.c (elfNN_aarch64_allocate_dynrelocs): Only make undefined weak symbols into dynamic. (elfNN_aarch64_final_link_relocate): Generate runtime RELATIVE relocation for non-dynamic symbols. (elfNN_aarch64_finish_dynamic_symbol): Add sanity check.
2017-06-29 12:47:43 +02:00
bfd_vma orig_value = value;
aarch64: Check UNDEFWEAK_NO_DYNAMIC_RELOC Don't generate dynamic relocation against weak undefined symbol if it is resolved to zero. FIXME: UNDEFWEAK_NO_DYNAMIC_RELOC may need to be checked in more places. PR ld/22269 * elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Don't generate dynamic relocation if UNDEFWEAK_NO_DYNAMIC_RELOC is true. (elfNN_aarch64_allocate_dynrelocs): Discard dynamic relocations if UNDEFWEAK_NO_DYNAMIC_RELOC is true.
2017-10-14 19:23:48 +02:00
bfd_boolean resolved_to_zero;
[PR20402][LD][AARCH64]Don't emit RELATIVE relocation for absolute symbols which are resolved at static linking time. For absolute symbols which are forced local or not dynamic, the ABS relocation should be resolved at static linking time. Originally, an RELATIVE/ABS relocation will be generated even for absolution symbols for the dynamic linker to resolve. bfd/ 2018-03-07 Renlin Li <renlin.li@arm.com> PR ld/20402 * elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Check absolute symbol, and don't emit relocation in specific case. ld/ 2018-03-07 Renlin Li <renlin.li@arm.com> PR ld/20402 * testsuite/ld-aarch64/aarch64-elf.exp: Run new test. * testsuite/ld-aarch64/pr20402.s: New. * testsuite/ld-aarch64/pr20402.d: New.
2018-03-07 10:27:45 +01:00
bfd_boolean abs_symbol_p;
[PATCH v3] aarch64: Emit jump slot for conditional branch to undefined symbols The linker silently writes out a conditional branch to 0 if the target symbol in R_AARCH64_CONDBR19 or R_AARCH64_TSTBR14 relocations is undefined. Emit a PLT instead so that behaviour is the same for these relocations as the llvm linker. The special behaviour for undefined weak symbols, where conditional branches to such symbols result in a branch unto themselves, has been retained. This is because the weak-undefined.s test explicitly checks for that, leading me to conclude that it's expected behaviour. bfd * elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Club BFD_RELOC_AARCH64_BRANCH19 and BFD_RELOC_AARCH64_TSTBR14 cases with BFD_RELOC_AARCH64_JUMP26. (elfNN_aarch64_check_relocs): Likewise. ld * testsuite/ld-aarch64/aarch64-elf.exp: New test emit-relocs-560. * testsuite/ld-aarch64/emit-relocs-560.d: New file. * testsuite/ld-aarch64/emit-relocs-560.s: New file.
2020-05-19 12:07:52 +02:00
bfd_boolean via_plt_p;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
globals = elf_aarch64_hash_table (info);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
symtab_hdr = &elf_symtab_hdr (input_bfd);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
BFD_ASSERT (is_aarch64_elf (input_bfd));
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
r_symndx = ELFNN_R_SYM (rel->r_info);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
place = input_section->output_section->vma
+ input_section->output_offset + rel->r_offset;
/* Get addend, accumulating the addend for consecutive relocs
which refer to the same offset. */
signed_addend = saved_addend ? *saved_addend : 0;
signed_addend += rel->r_addend;
weak_undef_p = (h ? h->root.type == bfd_link_hash_undefweak
: bfd_is_und_section (sym_sec));
BFD: Use `bfd_is_abs_symbol' to determine whether a symbol is absolute Use `bfd_is_abs_symbol' to determine whether a symbol is absolute, avoiding a problem with ordinary symbols defined in a linker script outside an output section definition. Such symbols have its owning section set to the absolute section up to the final link phase. A flag has been added to the link hash to identify such symbols. Rather than checking the flag by hand, use the macro that does it uniformly for all users. bfd/ * elf32-nds32.c (nds32_elf_relax_loadstore): Use `bfd_is_abs_symbol' rather than `bfd_is_abs_section' in checking whether the symbol is absolute. (nds32_elf_relax_lo12): Likewise. * elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_check_relocs): Likewise. * xcofflink.c (xcoff_need_ldrel_p): Likewise. (bfd_xcoff_import_symbol): Likewise. (xcoff_write_global_symbol): Likewise.
2018-07-17 21:04:53 +02:00
abs_symbol_p = h != NULL && bfd_is_abs_symbol (&h->root);
[PR20402][LD][AARCH64]Don't emit RELATIVE relocation for absolute symbols which are resolved at static linking time. For absolute symbols which are forced local or not dynamic, the ABS relocation should be resolved at static linking time. Originally, an RELATIVE/ABS relocation will be generated even for absolution symbols for the dynamic linker to resolve. bfd/ 2018-03-07 Renlin Li <renlin.li@arm.com> PR ld/20402 * elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Check absolute symbol, and don't emit relocation in specific case. ld/ 2018-03-07 Renlin Li <renlin.li@arm.com> PR ld/20402 * testsuite/ld-aarch64/aarch64-elf.exp: Run new test. * testsuite/ld-aarch64/pr20402.s: New. * testsuite/ld-aarch64/pr20402.d: New.
2018-03-07 10:27:45 +01:00
[PATCH v3] aarch64: Emit jump slot for conditional branch to undefined symbols The linker silently writes out a conditional branch to 0 if the target symbol in R_AARCH64_CONDBR19 or R_AARCH64_TSTBR14 relocations is undefined. Emit a PLT instead so that behaviour is the same for these relocations as the llvm linker. The special behaviour for undefined weak symbols, where conditional branches to such symbols result in a branch unto themselves, has been retained. This is because the weak-undefined.s test explicitly checks for that, leading me to conclude that it's expected behaviour. bfd * elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Club BFD_RELOC_AARCH64_BRANCH19 and BFD_RELOC_AARCH64_TSTBR14 cases with BFD_RELOC_AARCH64_JUMP26. (elfNN_aarch64_check_relocs): Likewise. ld * testsuite/ld-aarch64/aarch64-elf.exp: New test emit-relocs-560. * testsuite/ld-aarch64/emit-relocs-560.d: New file. * testsuite/ld-aarch64/emit-relocs-560.s: New file.
2020-05-19 12:07:52 +02:00
via_plt_p = (globals->root.splt != NULL && h != NULL
&& h->plt.offset != (bfd_vma) - 1);
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
/* Since STT_GNU_IFUNC symbol must go through PLT, we handle
it here if it is defined in a non-shared object. */
if (h != NULL
&& h->type == STT_GNU_IFUNC
&& h->def_regular)
{
asection *plt;
const char *name;
[AArch64] BFD Support BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15 2015-06-01 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_reloc_got_type): Support BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15. (elfNN_aarch64_final_link_relocate): Ditto. (elfNN_aarch64_gc_swap_hook): Ditto. (elfNN_aarch64_check_relocs): Ditto. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Ditto. ld/testsuite/ * ld-aarch64/emit-relocs-313.s: New test file. * ld-aarch64/emit-relocs-313.d: Ditto. * ld-aarch64/aarch64-elf.exp: Run new test.
2015-06-01 11:26:00 +02:00
bfd_vma addend = 0;
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
[AArch64] Skip IFUNC relocations in debug sections Skip IFUNC relocations in debug sections ignored by ld.so. Fixes the following ld test failures on aarch64: FAIL: Build libpr18808.so FAIL: Build libpr18808.so_2 FAIL: Run pr18808 aborting at bfd/elfnn-aarch64.c:4986 in elf64_aarch64_final_link_relocate. bfd/ PR ld/18808 * elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Skip IFUNC relocations in debug sections, change abort to _bfd_error_handler.
2017-08-17 15:48:03 +02:00
if ((input_section->flags & SEC_ALLOC) == 0)
{
Fix Sparc, s390 and AArch64 targets so that they can handle relocs against ifunc symbols found in note sections. Following on from PR 22929, I have found the same problem exists with other ifunc supporting targets too. Plus see this link for the bug being reported against the s390x binutils for Fedora rawhide: https://bugzilla.redhat.com/show_bug.cgi?id=1553705 So I am going to check in the patch below which applies the same change that H.J. made for the x86_64 target to the other affected targets. (Specifically: S390, AArch64 and Sparc). Plus it adds a new test to the linker testsuite to make sure that this problem stays fixed. bfd * elf64-s390.c (elf_s390_relocate_section): Move check for relocations against non-allocated sections to before the code that handles ifunc relocations. * elf32-s390.c (elf_s390_relocate_section): Likewise. * elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Treat relocs against IFUNC symbols in non-allocated sections as relocs against FUNC symbols. * elfxx-sparc.c (_bfd_sparc_elf_relocate_section): Likewise. ld * testsuite/ld-ifunc/ifuncmod5.s: New test. Checks that targets that support IFUNC symbols can handle relocations against those symbols in NOTE sections. * testsuite/ld-ifunc/ifuncmod5.d: New file: Driver for the new test. * testsuite/ld-ifunc/ifunc.exp: Run the new test.
2018-03-09 15:37:36 +01:00
/* If this is a SHT_NOTE section without SHF_ALLOC, treat
STT_GNU_IFUNC symbol as STT_FUNC. */
if (elf_section_type (input_section) == SHT_NOTE)
goto skip_ifunc;
[AArch64] Skip IFUNC relocations in debug sections Skip IFUNC relocations in debug sections ignored by ld.so. Fixes the following ld test failures on aarch64: FAIL: Build libpr18808.so FAIL: Build libpr18808.so_2 FAIL: Run pr18808 aborting at bfd/elfnn-aarch64.c:4986 in elf64_aarch64_final_link_relocate. bfd/ PR ld/18808 * elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Skip IFUNC relocations in debug sections, change abort to _bfd_error_handler.
2017-08-17 15:48:03 +02:00
/* Dynamic relocs are not propagated for SEC_DEBUGGING
sections because such sections are not SEC_ALLOC and
thus ld.so will not process them. */
if ((input_section->flags & SEC_DEBUGGING) != 0)
return bfd_reloc_ok;
if (h->root.root.string)
name = h->root.root.string;
else
name = bfd_elf_sym_name (input_bfd, symtab_hdr, sym, NULL);
_bfd_error_handler
/* xgettext:c-format */
%L conversions * bfd-in.h: Include inttypes.h or if not available define PRId64, PRIu64 and PRIx64. * bfd.c (_bfd_doprnt, _bfd_doprnt_scan): Remove support for L modifier to print bfd_vma. * coff-arm.c, * coff-mcore.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-tic80.c, * coffcode.h, * coffgen.c, * cofflink.c, * compress.c, * dwarf2.c, * elf-m10300.c, * elf.c, * elf32-arc.c, * elf32-arm.c, * elf32-bfin.c, * elf32-cris.c, * elf32-hppa.c, * elf32-i386.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32r.c, * elf32-m68k.c, * elf32-metag.c, * elf32-nds32.c, * elf32-nios2.c, * elf32-ppc.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score7.c, * elf32-sh.c, * elf32-sh64.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilepro.c, * elf32-v850.c, * elf32-vax.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mmix.c, * elf64-s390.c, * elf64-sh64.c, * elf64-x86-64.c, * elfcode.h, * elfcore.h, * elflink.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-mips.c, * elfxx-sparc.c, * elfxx-tilegx.c, * ieee.c, * ihex.c, * mach-o.c, * merge.c, * mmo.c, * peXXigen.c, * xcofflink.c: Replace use of Lx modifier with PRIx64, and cast input to uint64_t, and similarly for Ld and Lu. * bfd-in2.h: Regenerate.
2018-02-19 09:04:15 +01:00
(_("%pB(%pA+%#" PRIx64 "): "
"unresolvable %s relocation against symbol `%s'"),
input_bfd, input_section, (uint64_t) rel->r_offset,
howto->name, name);
[AArch64] Skip IFUNC relocations in debug sections Skip IFUNC relocations in debug sections ignored by ld.so. Fixes the following ld test failures on aarch64: FAIL: Build libpr18808.so FAIL: Build libpr18808.so_2 FAIL: Run pr18808 aborting at bfd/elfnn-aarch64.c:4986 in elf64_aarch64_final_link_relocate. bfd/ PR ld/18808 * elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Skip IFUNC relocations in debug sections, change abort to _bfd_error_handler.
2017-08-17 15:48:03 +02:00
bfd_set_error (bfd_error_bad_value);
Force the AArch64 linker backend to refuse to link when it encounters unresoleable relocations. * reloc.c (enum bfd_reloc_status): Start values at 2. * bfd-in2.h: Regenerate. * elfnn-aarch64.c (aarch64_relocate): Invert sense of function, so that a TRUE return indicates success. Compare the result of calling _bfd_aarch64_elf_put_addend against bfd_reloc_ok. (build_one_stub): Change sense of tests against aarch64_relocate return value. (elfNN_aarch64_tls_relax): Return bfd_reloc_notsupported, rather than FALSE, when an error is detected. (elfNN_aarch64_final_link_relocate): Likewise. * testsuite/ld-aarch64/pcrel_pic_defined.d: Expect errors not warnings. Expect errors about unsupported relocations. * testsuite/ld-aarch64/pcrel_pic_undefined.d: Likewise.
2017-10-12 14:38:20 +02:00
return bfd_reloc_notsupported;
[AArch64] Skip IFUNC relocations in debug sections Skip IFUNC relocations in debug sections ignored by ld.so. Fixes the following ld test failures on aarch64: FAIL: Build libpr18808.so FAIL: Build libpr18808.so_2 FAIL: Run pr18808 aborting at bfd/elfnn-aarch64.c:4986 in elf64_aarch64_final_link_relocate. bfd/ PR ld/18808 * elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Skip IFUNC relocations in debug sections, change abort to _bfd_error_handler.
2017-08-17 15:48:03 +02:00
}
else if (h->plt.offset == (bfd_vma) -1)
goto bad_ifunc_reloc;
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
/* STT_GNU_IFUNC symbol must go through PLT. */
plt = globals->root.splt ? globals->root.splt : globals->root.iplt;
value = (plt->output_section->vma + plt->output_offset + h->plt.offset);
switch (bfd_r_type)
{
default:
Indent labels Labels don't go in the first column according to standard emacs C indent rules, and I got annoyed enough at seeing diff -p show a label rather than the function name to fix this. bfd/ * aoutx.h: Indent labels correctly. Format error strings. * archive.c: Likewise. * archive64.c: Likewise. * coff-arm.c: Likewise. * coff-rs6000.c: Likewise. * coff-stgo32.c: Likewise. * cpu-arm.c: Likewise. * dwarf2.c: Likewise. * elf-ifunc.c: Likewise. * elf-properties.c: Likewise. * elf-s390-common.c: Likewise. * elf-strtab.c: Likewise. * elf.c: Likewise. * elf32-arm.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cr16.c: Likewise. * elf32-csky.c: Likewise. * elf32-i386.c: Likewise. * elf32-m68k.c: Likewise. * elf32-msp430.c: Likewise. * elf32-nds32.c: Likewise. * elf32-nios2.c: Likewise. * elf32-pru.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-x86-64.c: Likewise. * elfcode.h: Likewise. * elfcore.h: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * elfnn-riscv.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-x86.c: Likewise. * i386lynx.c: Likewise. * merge.c: Likewise. * pdp11.c: Likewise. * plugin.c: Likewise. * reloc.c: Likewise. binutils/ * elfedit.c: Indent labels correctly. * readelf.c: Likewise. * resres.c: Likewise. gas/ * config/obj-elf.c: Indent labels correctly. * config/obj-macho.c: Likewise. * config/tc-aarch64.c: Likewise. * config/tc-alpha.c: Likewise. * config/tc-arm.c: Likewise. * config/tc-cr16.c: Likewise. * config/tc-crx.c: Likewise. * config/tc-frv.c: Likewise. * config/tc-i386-intel.c: Likewise. * config/tc-i386.c: Likewise. * config/tc-ia64.c: Likewise. * config/tc-mn10200.c: Likewise. * config/tc-mn10300.c: Likewise. * config/tc-nds32.c: Likewise. * config/tc-riscv.c: Likewise. * config/tc-s12z.c: Likewise. * config/tc-xtensa.c: Likewise. * config/tc-z80.c: Likewise. * read.c: Likewise. * symbols.c: Likewise. * write.c: Likewise. ld/ * emultempl/cskyelf.em: Indent labels correctly. * ldfile.c: Likewise. * ldlang.c: Likewise. * plugin.c: Likewise. opcodes/ * aarch64-asm.c: Indent labels correctly. * aarch64-dis.c: Likewise. * aarch64-gen.c: Likewise. * aarch64-opc.c: Likewise. * alpha-dis.c: Likewise. * i386-dis.c: Likewise. * nds32-asm.c: Likewise. * nfp-dis.c: Likewise. * visium-dis.c: Likewise.
2020-02-25 06:04:46 +01:00
bad_ifunc_reloc:
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
if (h->root.root.string)
name = h->root.root.string;
else
name = bfd_elf_sym_name (input_bfd, symtab_hdr, sym,
NULL);
Remove syntactic sugar Now that _bfd_error_handler is not a function pointer. * aout-adobe.c: Replace (*_bfd_error_handler) (...) with _bfd_error_handler (...) throughout. * aout-cris.c, * aoutx.h, * archive.c, * bfd.c, * binary.c, * cache.c, * coff-alpha.c, * coff-arm.c, * coff-h8300.c, * coff-i860.c, * coff-mcore.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * cpu-arm.c, * cpu-m68k.c, * cpu-sh.c, * dwarf2.c, * ecoff.c, * elf-eh-frame.c, * elf-m10300.c, * elf.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c, * elf32-cris.c, * elf32-crx.c, * elf32-dlx.c, * elf32-frv.c, * elf32-hppa.c, * elf32-i370.c, * elf32-i386.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc1x.c, * elf32-m68k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-nds32.c, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-rl78.c, * elf32-s390.c, * elf32-score.c, * elf32-score7.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilepro.c, * elf32-v850.c, * elf32-vax.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-x86-64.c, * elfcode.h, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfxx-mips.c, * elfxx-sparc.c, * elfxx-tilegx.c, * hpux-core.c, * i386linux.c, * ieee.c, * ihex.c, * libbfd.c, * linker.c, * m68klinux.c, * mach-o.c, * merge.c, * mmo.c, * oasys.c, * osf-core.c, * pdp11.c, * pe-mips.c, * peXXigen.c, * pef.c, * plugin.c, * reloc.c, * rs6000-core.c, * sco5-core.c, * som.c, * sparclinux.c, * srec.c, * stabs.c, * syms.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * xcofflink.c: Likewise.
2016-09-30 05:30:18 +02:00
_bfd_error_handler
Add c-format tags to translatable strings with more than one argument-using formatting token. * aout-adobe.c: Add missing c-format tags for translatable strings. * aout-cris.c: Likewise. * aoutx.h: Likewise. * bfd.c: Likewise. * binary.c: Likewise. * cache.c: Likewise. * coff-alpha.c: Likewise. * coff-arm.c: Likewise. * coff-i860.c: Likewise. * coff-mcore.c: Likewise. * coff-ppc.c: Likewise. * coff-rs6000.c: Likewise. * coff-sh.c: Likewise. * coff-tic4x.c: Likewise. * coff-tic54x.c: Likewise. * coff-tic80.c: Likewise. * coff64-rs6000.c: Likewise. * coffcode.h: Likewise. * coffgen.c: Likewise. * cofflink.c: Likewise. * coffswap.h: Likewise. * cpu-arm.c: Likewise. * dwarf2.c: Likewise. * ecoff.c: Likewise. * elf-attrs.c: Likewise. * elf-eh-frame.c: Likewise. * elf-ifunc.c: Likewise. * elf-m10300.c: Likewise. * elf-s390-common.c: Likewise. * elf.c: Likewise. * elf32-arc.c: Likewise. * elf32-arm.c: Likewise. * elf32-avr.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-d10v.c: Likewise. * elf32-d30v.c: Likewise. * elf32-epiphany.c: Likewise. * elf32-fr30.c: Likewise. * elf32-frv.c: Likewise. * elf32-gen.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i370.c: Likewise. * elf32-i386.c: Likewise. * elf32-i960.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-lm32.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m32r.c: Likewise. * elf32-m68hc11.c: Likewise. * elf32-m68hc12.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mcore.c: Likewise. * elf32-mep.c: Likewise. * elf32-metag.c: Likewise. * elf32-microblaze.c: Likewise. * elf32-moxie.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-nds32.c: Likewise. * elf32-nios2.c: Likewise. * elf32-or1k.c: Likewise. * elf32-pj.c: Likewise. * elf32-ppc.c: Likewise. * elf32-rl78.c: Likewise. * elf32-rx.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-sh-symbian.c: Likewise. * elf32-sh.c: Likewise. * elf32-sh64.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-tilepro.c: Likewise. * elf32-v850.c: Likewise. * elf32-vax.c: Likewise. * elf32-visium.c: Likewise. * elf32-xgate.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-gen.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-mmix.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-sh64.c: Likewise. * elf64-sparc.c: Likewise. * elf64-x86-64.c: Likewise. * elfcode.h: Likewise. * elfcore.h: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * ieee.c: Likewise. * ihex.c: Likewise. * libbfd.c: Likewise. * linker.c: Likewise. * m68klinux.c: Likewise. * mach-o.c: Likewise. * merge.c: Likewise. * mmo.c: Likewise. * oasys.c: Likewise. * pdp11.c: Likewise. * pe-mips.c: Likewise. * peXXigen.c: Likewise. * pei-x86_64.c: Likewise. * peicode.h: Likewise. * ppcboot.c: Likewise. * reloc.c: Likewise. * sparclinux.c: Likewise. * srec.c: Likewise. * stabs.c: Likewise. * vms-alpha.c: Likewise. * vms-lib.c: Likewise. * xcofflink.c: Likewise.
2016-10-19 15:04:34 +02:00
/* xgettext:c-format */
Use %pA and %pB in messages rather than %A and %B First step towards compiler verification of _bfd_error_handler arguments, and better verification of translated messages. bfd/ * bfd.c (_bfd_doprnt, _bfd_doprnt_scan): Handle %pA and %pB in place of %A and %B. * aout-adobe.c: Update all messages using %A and %B. * aout-cris.c: Likewise. * aoutx.h: Likewise. * archive.c: Likewise. * binary.c: Likewise. * cache.c: Likewise. * coff-alpha.c: Likewise. * coff-arm.c: Likewise. * coff-i860.c: Likewise. * coff-mcore.c: Likewise. * coff-ppc.c: Likewise. * coff-rs6000.c: Likewise. * coff-sh.c: Likewise. * coff-tic4x.c: Likewise. * coff-tic54x.c: Likewise. * coff-tic80.c: Likewise. * coff64-rs6000.c: Likewise. * coffcode.h: Likewise. * coffgen.c: Likewise. * cofflink.c: Likewise. * coffswap.h: Likewise. * compress.c: Likewise. * cpu-arm.c: Likewise. * ecoff.c: Likewise. * elf-attrs.c: Likewise. * elf-eh-frame.c: Likewise. * elf-ifunc.c: Likewise. * elf-m10300.c: Likewise. * elf-properties.c: Likewise. * elf-s390-common.c: Likewise. * elf.c: Likewise. * elf32-arc.c: Likewise. * elf32-arm.c: Likewise. * elf32-avr.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-d10v.c: Likewise. * elf32-d30v.c: Likewise. * elf32-epiphany.c: Likewise. * elf32-fr30.c: Likewise. * elf32-frv.c: Likewise. * elf32-gen.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i370.c: Likewise. * elf32-i386.c: Likewise. * elf32-i960.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-lm32.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m32r.c: Likewise. * elf32-m68hc11.c: Likewise. * elf32-m68hc12.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mcore.c: Likewise. * elf32-mep.c: Likewise. * elf32-metag.c: Likewise. * elf32-microblaze.c: Likewise. * elf32-moxie.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-nds32.c: Likewise. * elf32-nios2.c: Likewise. * elf32-or1k.c: Likewise. * elf32-pj.c: Likewise. * elf32-ppc.c: Likewise. * elf32-rl78.c: Likewise. * elf32-rx.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-sh-symbian.c: Likewise. * elf32-sh.c: Likewise. * elf32-sh64.c: Likewise. * elf32-sparc.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-tilepro.c: Likewise. * elf32-v850.c: Likewise. * elf32-vax.c: Likewise. * elf32-visium.c: Likewise. * elf32-wasm32.c: Likewise. * elf32-xgate.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-gen.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-mmix.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-sh64.c: Likewise. * elf64-sparc.c: Likewise. * elf64-x86-64.c: Likewise. * elfcode.h: Likewise. * elfcore.h: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * elfnn-riscv.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * elfxx-x86.c: Likewise. * hpux-core.c: Likewise. * ieee.c: Likewise. * ihex.c: Likewise. * libbfd.c: Likewise. * linker.c: Likewise. * mach-o.c: Likewise. * merge.c: Likewise. * mmo.c: Likewise. * oasys.c: Likewise. * pdp11.c: Likewise. * pe-mips.c: Likewise. * peXXigen.c: Likewise. * peicode.h: Likewise. * reloc.c: Likewise. * rs6000-core.c: Likewise. * srec.c: Likewise. * stabs.c: Likewise. * vms-alpha.c: Likewise. * xcofflink.c: Likewise. ld/ * ldmisc.c (vfinfo): Handle %pA and %pB in place of %A and %B. * ldcref.c: Update all messages using %A and %B. * ldexp.c: Likewise. * ldlang.c: Likewise. * ldmain.c: Likewise. * ldmisc.c: Likewise. * pe-dll.c: Likewise. * plugin.c: Likewise. * emultempl/beos.em: Likewise. * emultempl/cr16elf.em: Likewise. * emultempl/elf32.em: Likewise. * emultempl/m68kcoff.em: Likewise. * emultempl/m68kelf.em: Likewise. * emultempl/mmo.em: Likewise. * emultempl/nds32elf.em: Likewise. * emultempl/pe.em: Likewise. * emultempl/pep.em: Likewise. * emultempl/spuelf.em: Likewise. * emultempl/sunos.em: Likewise. * emultempl/xtensaelf.em: Likewise.
2018-02-19 05:51:40 +01:00
(_("%pB: relocation %s against STT_GNU_IFUNC "
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
"symbol `%s' isn't handled by %s"), input_bfd,
howto->name, name, __FUNCTION__);
bfd_set_error (bfd_error_bad_value);
Force the AArch64 linker backend to refuse to link when it encounters unresoleable relocations. * reloc.c (enum bfd_reloc_status): Start values at 2. * bfd-in2.h: Regenerate. * elfnn-aarch64.c (aarch64_relocate): Invert sense of function, so that a TRUE return indicates success. Compare the result of calling _bfd_aarch64_elf_put_addend against bfd_reloc_ok. (build_one_stub): Change sense of tests against aarch64_relocate return value. (elfNN_aarch64_tls_relax): Return bfd_reloc_notsupported, rather than FALSE, when an error is detected. (elfNN_aarch64_final_link_relocate): Likewise. * testsuite/ld-aarch64/pcrel_pic_defined.d: Expect errors not warnings. Expect errors about unsupported relocations. * testsuite/ld-aarch64/pcrel_pic_undefined.d: Likewise.
2017-10-12 14:38:20 +02:00
return bfd_reloc_notsupported;
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
case BFD_RELOC_AARCH64_NN:
if (rel->r_addend != 0)
{
if (h->root.root.string)
name = h->root.root.string;
else
name = bfd_elf_sym_name (input_bfd, symtab_hdr,
sym, NULL);
Remove syntactic sugar Now that _bfd_error_handler is not a function pointer. * aout-adobe.c: Replace (*_bfd_error_handler) (...) with _bfd_error_handler (...) throughout. * aout-cris.c, * aoutx.h, * archive.c, * bfd.c, * binary.c, * cache.c, * coff-alpha.c, * coff-arm.c, * coff-h8300.c, * coff-i860.c, * coff-mcore.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * cpu-arm.c, * cpu-m68k.c, * cpu-sh.c, * dwarf2.c, * ecoff.c, * elf-eh-frame.c, * elf-m10300.c, * elf.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c, * elf32-cris.c, * elf32-crx.c, * elf32-dlx.c, * elf32-frv.c, * elf32-hppa.c, * elf32-i370.c, * elf32-i386.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc1x.c, * elf32-m68k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-nds32.c, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-rl78.c, * elf32-s390.c, * elf32-score.c, * elf32-score7.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilepro.c, * elf32-v850.c, * elf32-vax.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-x86-64.c, * elfcode.h, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfxx-mips.c, * elfxx-sparc.c, * elfxx-tilegx.c, * hpux-core.c, * i386linux.c, * ieee.c, * ihex.c, * libbfd.c, * linker.c, * m68klinux.c, * mach-o.c, * merge.c, * mmo.c, * oasys.c, * osf-core.c, * pdp11.c, * pe-mips.c, * peXXigen.c, * pef.c, * plugin.c, * reloc.c, * rs6000-core.c, * sco5-core.c, * som.c, * sparclinux.c, * srec.c, * stabs.c, * syms.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * xcofflink.c: Likewise.
2016-09-30 05:30:18 +02:00
_bfd_error_handler
Add c-format tags to translatable strings with more than one argument-using formatting token. * aout-adobe.c: Add missing c-format tags for translatable strings. * aout-cris.c: Likewise. * aoutx.h: Likewise. * bfd.c: Likewise. * binary.c: Likewise. * cache.c: Likewise. * coff-alpha.c: Likewise. * coff-arm.c: Likewise. * coff-i860.c: Likewise. * coff-mcore.c: Likewise. * coff-ppc.c: Likewise. * coff-rs6000.c: Likewise. * coff-sh.c: Likewise. * coff-tic4x.c: Likewise. * coff-tic54x.c: Likewise. * coff-tic80.c: Likewise. * coff64-rs6000.c: Likewise. * coffcode.h: Likewise. * coffgen.c: Likewise. * cofflink.c: Likewise. * coffswap.h: Likewise. * cpu-arm.c: Likewise. * dwarf2.c: Likewise. * ecoff.c: Likewise. * elf-attrs.c: Likewise. * elf-eh-frame.c: Likewise. * elf-ifunc.c: Likewise. * elf-m10300.c: Likewise. * elf-s390-common.c: Likewise. * elf.c: Likewise. * elf32-arc.c: Likewise. * elf32-arm.c: Likewise. * elf32-avr.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-d10v.c: Likewise. * elf32-d30v.c: Likewise. * elf32-epiphany.c: Likewise. * elf32-fr30.c: Likewise. * elf32-frv.c: Likewise. * elf32-gen.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i370.c: Likewise. * elf32-i386.c: Likewise. * elf32-i960.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-lm32.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m32r.c: Likewise. * elf32-m68hc11.c: Likewise. * elf32-m68hc12.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mcore.c: Likewise. * elf32-mep.c: Likewise. * elf32-metag.c: Likewise. * elf32-microblaze.c: Likewise. * elf32-moxie.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-nds32.c: Likewise. * elf32-nios2.c: Likewise. * elf32-or1k.c: Likewise. * elf32-pj.c: Likewise. * elf32-ppc.c: Likewise. * elf32-rl78.c: Likewise. * elf32-rx.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-sh-symbian.c: Likewise. * elf32-sh.c: Likewise. * elf32-sh64.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-tilepro.c: Likewise. * elf32-v850.c: Likewise. * elf32-vax.c: Likewise. * elf32-visium.c: Likewise. * elf32-xgate.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-gen.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-mmix.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-sh64.c: Likewise. * elf64-sparc.c: Likewise. * elf64-x86-64.c: Likewise. * elfcode.h: Likewise. * elfcore.h: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * ieee.c: Likewise. * ihex.c: Likewise. * libbfd.c: Likewise. * linker.c: Likewise. * m68klinux.c: Likewise. * mach-o.c: Likewise. * merge.c: Likewise. * mmo.c: Likewise. * oasys.c: Likewise. * pdp11.c: Likewise. * pe-mips.c: Likewise. * peXXigen.c: Likewise. * pei-x86_64.c: Likewise. * peicode.h: Likewise. * ppcboot.c: Likewise. * reloc.c: Likewise. * sparclinux.c: Likewise. * srec.c: Likewise. * stabs.c: Likewise. * vms-alpha.c: Likewise. * vms-lib.c: Likewise. * xcofflink.c: Likewise.
2016-10-19 15:04:34 +02:00
/* xgettext:c-format */
Use %pA and %pB in messages rather than %A and %B First step towards compiler verification of _bfd_error_handler arguments, and better verification of translated messages. bfd/ * bfd.c (_bfd_doprnt, _bfd_doprnt_scan): Handle %pA and %pB in place of %A and %B. * aout-adobe.c: Update all messages using %A and %B. * aout-cris.c: Likewise. * aoutx.h: Likewise. * archive.c: Likewise. * binary.c: Likewise. * cache.c: Likewise. * coff-alpha.c: Likewise. * coff-arm.c: Likewise. * coff-i860.c: Likewise. * coff-mcore.c: Likewise. * coff-ppc.c: Likewise. * coff-rs6000.c: Likewise. * coff-sh.c: Likewise. * coff-tic4x.c: Likewise. * coff-tic54x.c: Likewise. * coff-tic80.c: Likewise. * coff64-rs6000.c: Likewise. * coffcode.h: Likewise. * coffgen.c: Likewise. * cofflink.c: Likewise. * coffswap.h: Likewise. * compress.c: Likewise. * cpu-arm.c: Likewise. * ecoff.c: Likewise. * elf-attrs.c: Likewise. * elf-eh-frame.c: Likewise. * elf-ifunc.c: Likewise. * elf-m10300.c: Likewise. * elf-properties.c: Likewise. * elf-s390-common.c: Likewise. * elf.c: Likewise. * elf32-arc.c: Likewise. * elf32-arm.c: Likewise. * elf32-avr.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-d10v.c: Likewise. * elf32-d30v.c: Likewise. * elf32-epiphany.c: Likewise. * elf32-fr30.c: Likewise. * elf32-frv.c: Likewise. * elf32-gen.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i370.c: Likewise. * elf32-i386.c: Likewise. * elf32-i960.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-lm32.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m32r.c: Likewise. * elf32-m68hc11.c: Likewise. * elf32-m68hc12.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mcore.c: Likewise. * elf32-mep.c: Likewise. * elf32-metag.c: Likewise. * elf32-microblaze.c: Likewise. * elf32-moxie.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-nds32.c: Likewise. * elf32-nios2.c: Likewise. * elf32-or1k.c: Likewise. * elf32-pj.c: Likewise. * elf32-ppc.c: Likewise. * elf32-rl78.c: Likewise. * elf32-rx.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-sh-symbian.c: Likewise. * elf32-sh.c: Likewise. * elf32-sh64.c: Likewise. * elf32-sparc.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-tilepro.c: Likewise. * elf32-v850.c: Likewise. * elf32-vax.c: Likewise. * elf32-visium.c: Likewise. * elf32-wasm32.c: Likewise. * elf32-xgate.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-gen.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-mmix.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-sh64.c: Likewise. * elf64-sparc.c: Likewise. * elf64-x86-64.c: Likewise. * elfcode.h: Likewise. * elfcore.h: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * elfnn-riscv.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * elfxx-x86.c: Likewise. * hpux-core.c: Likewise. * ieee.c: Likewise. * ihex.c: Likewise. * libbfd.c: Likewise. * linker.c: Likewise. * mach-o.c: Likewise. * merge.c: Likewise. * mmo.c: Likewise. * oasys.c: Likewise. * pdp11.c: Likewise. * pe-mips.c: Likewise. * peXXigen.c: Likewise. * peicode.h: Likewise. * reloc.c: Likewise. * rs6000-core.c: Likewise. * srec.c: Likewise. * stabs.c: Likewise. * vms-alpha.c: Likewise. * xcofflink.c: Likewise. ld/ * ldmisc.c (vfinfo): Handle %pA and %pB in place of %A and %B. * ldcref.c: Update all messages using %A and %B. * ldexp.c: Likewise. * ldlang.c: Likewise. * ldmain.c: Likewise. * ldmisc.c: Likewise. * pe-dll.c: Likewise. * plugin.c: Likewise. * emultempl/beos.em: Likewise. * emultempl/cr16elf.em: Likewise. * emultempl/elf32.em: Likewise. * emultempl/m68kcoff.em: Likewise. * emultempl/m68kelf.em: Likewise. * emultempl/mmo.em: Likewise. * emultempl/nds32elf.em: Likewise. * emultempl/pe.em: Likewise. * emultempl/pep.em: Likewise. * emultempl/spuelf.em: Likewise. * emultempl/sunos.em: Likewise. * emultempl/xtensaelf.em: Likewise.
2018-02-19 05:51:40 +01:00
(_("%pB: relocation %s against STT_GNU_IFUNC "
%L conversions * bfd-in.h: Include inttypes.h or if not available define PRId64, PRIu64 and PRIx64. * bfd.c (_bfd_doprnt, _bfd_doprnt_scan): Remove support for L modifier to print bfd_vma. * coff-arm.c, * coff-mcore.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-tic80.c, * coffcode.h, * coffgen.c, * cofflink.c, * compress.c, * dwarf2.c, * elf-m10300.c, * elf.c, * elf32-arc.c, * elf32-arm.c, * elf32-bfin.c, * elf32-cris.c, * elf32-hppa.c, * elf32-i386.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32r.c, * elf32-m68k.c, * elf32-metag.c, * elf32-nds32.c, * elf32-nios2.c, * elf32-ppc.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score7.c, * elf32-sh.c, * elf32-sh64.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilepro.c, * elf32-v850.c, * elf32-vax.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mmix.c, * elf64-s390.c, * elf64-sh64.c, * elf64-x86-64.c, * elfcode.h, * elfcore.h, * elflink.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-mips.c, * elfxx-sparc.c, * elfxx-tilegx.c, * ieee.c, * ihex.c, * mach-o.c, * merge.c, * mmo.c, * peXXigen.c, * xcofflink.c: Replace use of Lx modifier with PRIx64, and cast input to uint64_t, and similarly for Ld and Lu. * bfd-in2.h: Regenerate.
2018-02-19 09:04:15 +01:00
"symbol `%s' has non-zero addend: %" PRId64),
input_bfd, howto->name, name, (int64_t) rel->r_addend);
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
bfd_set_error (bfd_error_bad_value);
Force the AArch64 linker backend to refuse to link when it encounters unresoleable relocations. * reloc.c (enum bfd_reloc_status): Start values at 2. * bfd-in2.h: Regenerate. * elfnn-aarch64.c (aarch64_relocate): Invert sense of function, so that a TRUE return indicates success. Compare the result of calling _bfd_aarch64_elf_put_addend against bfd_reloc_ok. (build_one_stub): Change sense of tests against aarch64_relocate return value. (elfNN_aarch64_tls_relax): Return bfd_reloc_notsupported, rather than FALSE, when an error is detected. (elfNN_aarch64_final_link_relocate): Likewise. * testsuite/ld-aarch64/pcrel_pic_defined.d: Expect errors not warnings. Expect errors about unsupported relocations. * testsuite/ld-aarch64/pcrel_pic_undefined.d: Likewise.
2017-10-12 14:38:20 +02:00
return bfd_reloc_notsupported;
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
}
/* Generate dynamic relocation only when there is a
non-GOT reference in a shared object. */
Add output_type to bfd_link_info The "shared" field in bfd_link_info is set for both DSO and and PIE. There are separate fields for executable and relocatable outputs. This patch adds an "output_type" field: enum output_type { type_unknown = 0, type_executable, type_dll, type_relocatable }; and a "pic" field to bfd_link_info to replace shared, executable and relocatable fields so that we can use the "output_type" field to check for output type and the "pic" field check if output is PIC. Macros, bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie, are provided to check for output features. bfd/ * bfd/aoutx.h: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * bfd/bout.c: Likewise. * bfd/coff-alpha.c: Likewise. * bfd/coff-arm.c: Likewise. * bfd/coff-i386.c: Likewise. * bfd/coff-i960.c: Likewise. * bfd/coff-m68k.c: Likewise. * bfd/coff-mcore.c: Likewise. * bfd/coff-mips.c: Likewise. * bfd/coff-ppc.c: Likewise. * bfd/coff-rs6000.c: Likewise. * bfd/coff-sh.c: Likewise. * bfd/coff-tic80.c: Likewise. * bfd/coff-x86_64.c: Likewise. * bfd/coff64-rs6000.c: Likewise. * bfd/coffgen.c: Likewise. * bfd/cofflink.c: Likewise. * bfd/ecoff.c: Likewise. * bfd/ecofflink.c: Likewise. * bfd/elf-bfd.h: Likewise. * bfd/elf-eh-frame.c: Likewise. * bfd/elf-ifunc.c: Likewise. * bfd/elf-m10200.c: Likewise. * bfd/elf-m10300.c: Likewise. * bfd/elf-s390-common.c: Likewise. * bfd/elf-vxworks.c: Likewise. * bfd/elf.c: Likewise. * bfd/elf32-arm.c: Likewise. * bfd/elf32-avr.c: Likewise. * bfd/elf32-bfin.c: Likewise. * bfd/elf32-cr16.c: Likewise. * bfd/elf32-cr16c.c: Likewise. * bfd/elf32-cris.c: Likewise. * bfd/elf32-crx.c: Likewise. * bfd/elf32-d10v.c: Likewise. * bfd/elf32-dlx.c: Likewise. * bfd/elf32-epiphany.c: Likewise. * bfd/elf32-fr30.c: Likewise. * bfd/elf32-frv.c: Likewise. * bfd/elf32-ft32.c: Likewise. * bfd/elf32-h8300.c: Likewise. * bfd/elf32-hppa.c: Likewise. * bfd/elf32-i370.c: Likewise. * bfd/elf32-i386.c: Likewise. * bfd/elf32-i860.c: Likewise. * bfd/elf32-ip2k.c: Likewise. * bfd/elf32-iq2000.c: Likewise. * bfd/elf32-lm32.c: Likewise. * bfd/elf32-m32c.c: Likewise. * bfd/elf32-m32r.c: Likewise. * bfd/elf32-m68hc11.c: Likewise. * bfd/elf32-m68hc1x.c: Likewise. * bfd/elf32-m68k.c: Likewise. * bfd/elf32-mcore.c: Likewise. * bfd/elf32-mep.c: Likewise. * bfd/elf32-metag.c: Likewise. * bfd/elf32-microblaze.c: Likewise. * bfd/elf32-moxie.c: Likewise. * bfd/elf32-msp430.c: Likewise. * bfd/elf32-mt.c: Likewise. * bfd/elf32-nds32.c: Likewise. * bfd/elf32-nios2.c: Likewise. * bfd/elf32-or1k.c: Likewise. * bfd/elf32-ppc.c: Likewise. * bfd/elf32-rl78.c: Likewise. * bfd/elf32-rx.c: Likewise. * bfd/elf32-s390.c: Likewise. * bfd/elf32-score.c: Likewise. * bfd/elf32-score7.c: Likewise. * bfd/elf32-sh-symbian.c: Likewise. * bfd/elf32-sh.c: Likewise. * bfd/elf32-sh64.c: Likewise. * bfd/elf32-spu.c: Likewise. * bfd/elf32-tic6x.c: Likewise. * bfd/elf32-tilepro.c: Likewise. * bfd/elf32-v850.c: Likewise. * bfd/elf32-vax.c: Likewise. * bfd/elf32-visium.c: Likewise. * bfd/elf32-xc16x.c: Likewise. * bfd/elf32-xstormy16.c: Likewise. * bfd/elf32-xtensa.c: Likewise. * bfd/elf64-alpha.c: Likewise. * bfd/elf64-hppa.c: Likewise. * bfd/elf64-ia64-vms.c: Likewise. * bfd/elf64-mmix.c: Likewise. * bfd/elf64-ppc.c: Likewise. * bfd/elf64-s390.c: Likewise. * bfd/elf64-sh64.c: Likewise. * bfd/elf64-x86-64.c: Likewise. * bfd/elflink.c: Likewise. * bfd/elfnn-aarch64.c: Likewise. * bfd/elfnn-ia64.c: Likewise. * bfd/elfxx-mips.c: Likewise. * bfd/elfxx-sparc.c: Likewise. * bfd/elfxx-tilegx.c: Likewise. * bfd/i386linux.c: Likewise. * bfd/linker.c: Likewise. * bfd/m68klinux.c: Likewise. * bfd/pdp11.c: Likewise. * bfd/pe-mips.c: Likewise. * bfd/peXXigen.c: Likewise. * bfd/reloc.c: Likewise. * bfd/reloc16.c: Likewise. * bfd/sparclinux.c: Likewise. * bfd/sunos.c: Likewise. * bfd/vms-alpha.c: Likewise. * bfd/xcofflink.c: Likewise. include/ * include/bfdlink.h (output_type): New enum. (bfd_link_executable): New macro. (bfd_link_dll): Likewise. (bfd_link_relocatable): Likewise. (bfd_link_pic): Likewise. (bfd_link_pie): Likewise. (bfd_link_info): Remove shared, executable, pie and relocatable. Add output_type and pic. ld/ * ld/ldctor.c: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * ld/ldemul.c: Likewise. * ld/ldfile.c: Likewise. * ld/ldlang.c: Likewise. * ld/ldmain.c: Likewise. * ld/ldwrite.c: Likewise. * ld/lexsup.c: Likewise. * ld/pe-dll.c: Likewise. * ld/plugin.c: Likewise. * ld/emultempl/aarch64elf.em: Likewise. * ld/emultempl/aix.em: Likewise. * ld/emultempl/alphaelf.em: Likewise. * ld/emultempl/armcoff.em: Likewise. * ld/emultempl/armelf.em: Likewise. * ld/emultempl/avrelf.em: Likewise. * ld/emultempl/beos.em: Likewise. * ld/emultempl/cr16elf.em: Likewise. * ld/emultempl/elf-generic.em: Likewise. * ld/emultempl/elf32.em: Likewise. * ld/emultempl/genelf.em: Likewise. * ld/emultempl/generic.em: Likewise. * ld/emultempl/gld960.em: Likewise. * ld/emultempl/gld960c.em: Likewise. * ld/emultempl/hppaelf.em: Likewise. * ld/emultempl/irix.em: Likewise. * ld/emultempl/linux.em: Likewise. * ld/emultempl/lnk960.em: Likewise. * ld/emultempl/m68hc1xelf.em: Likewise. * ld/emultempl/m68kcoff.em: Likewise. * ld/emultempl/m68kelf.em: Likewise. * ld/emultempl/metagelf.em: Likewise. * ld/emultempl/mipself.em: Likewise. * ld/emultempl/mmo.em: Likewise. * ld/emultempl/msp430.em: Likewise. * ld/emultempl/nds32elf.em: Likewise. * ld/emultempl/needrelax.em: Likewise. * ld/emultempl/nios2elf.em: Likewise. * ld/emultempl/pe.em: Likewise. * ld/emultempl/pep.em: Likewise. * ld/emultempl/ppc32elf.em: Likewise. * ld/emultempl/ppc64elf.em: Likewise. * ld/emultempl/sh64elf.em: Likewise. * ld/emultempl/solaris2.em: Likewise. * ld/emultempl/spuelf.em: Likewise. * ld/emultempl/sunos.em: Likewise. * ld/emultempl/tic6xdsbt.em: Likewise. * ld/emultempl/ticoff.em: Likewise. * ld/emultempl/v850elf.em: Likewise. * ld/emultempl/vms.em: Likewise. * ld/emultempl/vxworks.em: Likewise.
2015-08-18 14:51:03 +02:00
if (bfd_link_pic (info) && h->non_got_ref)
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
{
Elf_Internal_Rela outrel;
asection *sreloc;
/* Need a dynamic relocation to get the real function
address. */
outrel.r_offset = _bfd_elf_section_offset (output_bfd,
info,
input_section,
rel->r_offset);
if (outrel.r_offset == (bfd_vma) -1
|| outrel.r_offset == (bfd_vma) -2)
abort ();
outrel.r_offset += (input_section->output_section->vma
+ input_section->output_offset);
if (h->dynindx == -1
|| h->forced_local
Add output_type to bfd_link_info The "shared" field in bfd_link_info is set for both DSO and and PIE. There are separate fields for executable and relocatable outputs. This patch adds an "output_type" field: enum output_type { type_unknown = 0, type_executable, type_dll, type_relocatable }; and a "pic" field to bfd_link_info to replace shared, executable and relocatable fields so that we can use the "output_type" field to check for output type and the "pic" field check if output is PIC. Macros, bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie, are provided to check for output features. bfd/ * bfd/aoutx.h: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * bfd/bout.c: Likewise. * bfd/coff-alpha.c: Likewise. * bfd/coff-arm.c: Likewise. * bfd/coff-i386.c: Likewise. * bfd/coff-i960.c: Likewise. * bfd/coff-m68k.c: Likewise. * bfd/coff-mcore.c: Likewise. * bfd/coff-mips.c: Likewise. * bfd/coff-ppc.c: Likewise. * bfd/coff-rs6000.c: Likewise. * bfd/coff-sh.c: Likewise. * bfd/coff-tic80.c: Likewise. * bfd/coff-x86_64.c: Likewise. * bfd/coff64-rs6000.c: Likewise. * bfd/coffgen.c: Likewise. * bfd/cofflink.c: Likewise. * bfd/ecoff.c: Likewise. * bfd/ecofflink.c: Likewise. * bfd/elf-bfd.h: Likewise. * bfd/elf-eh-frame.c: Likewise. * bfd/elf-ifunc.c: Likewise. * bfd/elf-m10200.c: Likewise. * bfd/elf-m10300.c: Likewise. * bfd/elf-s390-common.c: Likewise. * bfd/elf-vxworks.c: Likewise. * bfd/elf.c: Likewise. * bfd/elf32-arm.c: Likewise. * bfd/elf32-avr.c: Likewise. * bfd/elf32-bfin.c: Likewise. * bfd/elf32-cr16.c: Likewise. * bfd/elf32-cr16c.c: Likewise. * bfd/elf32-cris.c: Likewise. * bfd/elf32-crx.c: Likewise. * bfd/elf32-d10v.c: Likewise. * bfd/elf32-dlx.c: Likewise. * bfd/elf32-epiphany.c: Likewise. * bfd/elf32-fr30.c: Likewise. * bfd/elf32-frv.c: Likewise. * bfd/elf32-ft32.c: Likewise. * bfd/elf32-h8300.c: Likewise. * bfd/elf32-hppa.c: Likewise. * bfd/elf32-i370.c: Likewise. * bfd/elf32-i386.c: Likewise. * bfd/elf32-i860.c: Likewise. * bfd/elf32-ip2k.c: Likewise. * bfd/elf32-iq2000.c: Likewise. * bfd/elf32-lm32.c: Likewise. * bfd/elf32-m32c.c: Likewise. * bfd/elf32-m32r.c: Likewise. * bfd/elf32-m68hc11.c: Likewise. * bfd/elf32-m68hc1x.c: Likewise. * bfd/elf32-m68k.c: Likewise. * bfd/elf32-mcore.c: Likewise. * bfd/elf32-mep.c: Likewise. * bfd/elf32-metag.c: Likewise. * bfd/elf32-microblaze.c: Likewise. * bfd/elf32-moxie.c: Likewise. * bfd/elf32-msp430.c: Likewise. * bfd/elf32-mt.c: Likewise. * bfd/elf32-nds32.c: Likewise. * bfd/elf32-nios2.c: Likewise. * bfd/elf32-or1k.c: Likewise. * bfd/elf32-ppc.c: Likewise. * bfd/elf32-rl78.c: Likewise. * bfd/elf32-rx.c: Likewise. * bfd/elf32-s390.c: Likewise. * bfd/elf32-score.c: Likewise. * bfd/elf32-score7.c: Likewise. * bfd/elf32-sh-symbian.c: Likewise. * bfd/elf32-sh.c: Likewise. * bfd/elf32-sh64.c: Likewise. * bfd/elf32-spu.c: Likewise. * bfd/elf32-tic6x.c: Likewise. * bfd/elf32-tilepro.c: Likewise. * bfd/elf32-v850.c: Likewise. * bfd/elf32-vax.c: Likewise. * bfd/elf32-visium.c: Likewise. * bfd/elf32-xc16x.c: Likewise. * bfd/elf32-xstormy16.c: Likewise. * bfd/elf32-xtensa.c: Likewise. * bfd/elf64-alpha.c: Likewise. * bfd/elf64-hppa.c: Likewise. * bfd/elf64-ia64-vms.c: Likewise. * bfd/elf64-mmix.c: Likewise. * bfd/elf64-ppc.c: Likewise. * bfd/elf64-s390.c: Likewise. * bfd/elf64-sh64.c: Likewise. * bfd/elf64-x86-64.c: Likewise. * bfd/elflink.c: Likewise. * bfd/elfnn-aarch64.c: Likewise. * bfd/elfnn-ia64.c: Likewise. * bfd/elfxx-mips.c: Likewise. * bfd/elfxx-sparc.c: Likewise. * bfd/elfxx-tilegx.c: Likewise. * bfd/i386linux.c: Likewise. * bfd/linker.c: Likewise. * bfd/m68klinux.c: Likewise. * bfd/pdp11.c: Likewise. * bfd/pe-mips.c: Likewise. * bfd/peXXigen.c: Likewise. * bfd/reloc.c: Likewise. * bfd/reloc16.c: Likewise. * bfd/sparclinux.c: Likewise. * bfd/sunos.c: Likewise. * bfd/vms-alpha.c: Likewise. * bfd/xcofflink.c: Likewise. include/ * include/bfdlink.h (output_type): New enum. (bfd_link_executable): New macro. (bfd_link_dll): Likewise. (bfd_link_relocatable): Likewise. (bfd_link_pic): Likewise. (bfd_link_pie): Likewise. (bfd_link_info): Remove shared, executable, pie and relocatable. Add output_type and pic. ld/ * ld/ldctor.c: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * ld/ldemul.c: Likewise. * ld/ldfile.c: Likewise. * ld/ldlang.c: Likewise. * ld/ldmain.c: Likewise. * ld/ldwrite.c: Likewise. * ld/lexsup.c: Likewise. * ld/pe-dll.c: Likewise. * ld/plugin.c: Likewise. * ld/emultempl/aarch64elf.em: Likewise. * ld/emultempl/aix.em: Likewise. * ld/emultempl/alphaelf.em: Likewise. * ld/emultempl/armcoff.em: Likewise. * ld/emultempl/armelf.em: Likewise. * ld/emultempl/avrelf.em: Likewise. * ld/emultempl/beos.em: Likewise. * ld/emultempl/cr16elf.em: Likewise. * ld/emultempl/elf-generic.em: Likewise. * ld/emultempl/elf32.em: Likewise. * ld/emultempl/genelf.em: Likewise. * ld/emultempl/generic.em: Likewise. * ld/emultempl/gld960.em: Likewise. * ld/emultempl/gld960c.em: Likewise. * ld/emultempl/hppaelf.em: Likewise. * ld/emultempl/irix.em: Likewise. * ld/emultempl/linux.em: Likewise. * ld/emultempl/lnk960.em: Likewise. * ld/emultempl/m68hc1xelf.em: Likewise. * ld/emultempl/m68kcoff.em: Likewise. * ld/emultempl/m68kelf.em: Likewise. * ld/emultempl/metagelf.em: Likewise. * ld/emultempl/mipself.em: Likewise. * ld/emultempl/mmo.em: Likewise. * ld/emultempl/msp430.em: Likewise. * ld/emultempl/nds32elf.em: Likewise. * ld/emultempl/needrelax.em: Likewise. * ld/emultempl/nios2elf.em: Likewise. * ld/emultempl/pe.em: Likewise. * ld/emultempl/pep.em: Likewise. * ld/emultempl/ppc32elf.em: Likewise. * ld/emultempl/ppc64elf.em: Likewise. * ld/emultempl/sh64elf.em: Likewise. * ld/emultempl/solaris2.em: Likewise. * ld/emultempl/spuelf.em: Likewise. * ld/emultempl/sunos.em: Likewise. * ld/emultempl/tic6xdsbt.em: Likewise. * ld/emultempl/ticoff.em: Likewise. * ld/emultempl/v850elf.em: Likewise. * ld/emultempl/vms.em: Likewise. * ld/emultempl/vxworks.em: Likewise.
2015-08-18 14:51:03 +02:00
|| bfd_link_executable (info))
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
{
/* This symbol is resolved locally. */
outrel.r_info = ELFNN_R_INFO (0, AARCH64_R (IRELATIVE));
outrel.r_addend = (h->root.u.def.value
+ h->root.u.def.section->output_section->vma
+ h->root.u.def.section->output_offset);
}
else
{
outrel.r_info = ELFNN_R_INFO (h->dynindx, r_type);
outrel.r_addend = 0;
}
sreloc = globals->root.irelifunc;
elf_append_rela (output_bfd, sreloc, &outrel);
/* If this reloc is against an external symbol, we
do not want to fiddle with the addend. Otherwise,
we need to include the symbol value so that it
becomes an addend for the dynamic reloc. For an
internal symbol, we have updated addend. */
return bfd_reloc_ok;
}
/* FALLTHROUGH */
case BFD_RELOC_AARCH64_CALL26:
[AArch64/BFD] Sort relocation case labels alphabetically 2015-05-19 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_tls_transition_without_check): Sort relocation case labels alphabetically. (elfNN_aarch64_final_link_relocate): Ditto. (elfNN_aarch64_tls_relax): Ditto. (elfNN_aarch64_relocate_section): Ditto. (elfNN_aarch64_gc_sweep_hook): Ditto. (elfNN_aarch64_check_relocs): Ditto. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Ditto. (_bfd_aarch64_elf_resolve_relocation): Ditto.
2015-05-20 11:58:43 +02:00
case BFD_RELOC_AARCH64_JUMP26:
AArch64: Fix LD crash on weak and undefined TLS symbols. (PR/24602). This patch fixes a few linker crashes due to TLS code reaching an assert when it shouldn't. The first scenario is with weak TLS symbols that remain weak during linking. In this case the mid-end would not have seen a TLS symbol and so wouldn't have allocated the TLS section. We currently assert here and the linker crashes with a not very useful message. This patch changes this to return the value 0 for the TLS symbol in question emulating what lld and gold and other BFD targets do. However because weak TLS is implementation defined and we don't define any behavior for it I also emit a warning to the user to inform them of such. Secondly when a strong TLS reference is undefined. The linker crashes even after it correctly reported that there is an undefined reference. This changes it so that it gracefully exits and reports a useful error. bfd/ChangeLog: PR ld/24601 * elfnn-aarch64.c (aarch64_relocate): Handle weak TLS and undefined TLS. Also Pass input_bfd to _bfd_aarch64_elf_resolve_relocation. * elfxx-aarch64.c (_bfd_aarch64_elf_resolve_relocation): Use it. * elfxx-aarch64.h (_bfd_aarch64_elf_resolve_relocation): Emit warning for weak TLS. ld/ChangeLog: PR ld/24601 * testsuite/ld-aarch64/aarch64-elf.exp (undef-tls, weak-tls): New. * testsuite/ld-aarch64/undef-tls.d: New test. * testsuite/ld-aarch64/undef-tls.s: New test. * testsuite/ld-aarch64/weak-tls.d: New test. * testsuite/ld-aarch64/weak-tls.s: New test.
2019-08-22 12:35:35 +02:00
value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
place, value,
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
signed_addend,
weak_undef_p);
return _bfd_aarch64_elf_put_addend (input_bfd, hit_data, bfd_r_type,
howto, value);
case BFD_RELOC_AARCH64_ADR_GOT_PAGE:
case BFD_RELOC_AARCH64_GOT_LD_PREL19:
[AArch64] BFD support BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14 This patch add BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14 relocation supoprt in bfd linker. 2015-06-01 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_reloc_got_type): Support BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14. (elfNN_aarch64_final_link_relocate): Ditto. (elfNN_aarch64_gc_swap_hook): Ditto. (elfNN_aarch64_check_relocs): Ditto. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Ditto. ld/testsuite/ * ld-aarch64/emit-relocs-28.s: New test file. * ld-aarch64/emit-relocs-28.d: Ditto. * ld-aarch64/aarch64-elf.exp: Run new test.
2015-06-01 16:45:25 +02:00
case BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14:
[AArch64/BFD] Sort relocation case labels alphabetically 2015-05-19 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_tls_transition_without_check): Sort relocation case labels alphabetically. (elfNN_aarch64_final_link_relocate): Ditto. (elfNN_aarch64_tls_relax): Ditto. (elfNN_aarch64_relocate_section): Ditto. (elfNN_aarch64_gc_sweep_hook): Ditto. (elfNN_aarch64_check_relocs): Ditto. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Ditto. (_bfd_aarch64_elf_resolve_relocation): Ditto.
2015-05-20 11:58:43 +02:00
case BFD_RELOC_AARCH64_LD32_GOT_LO12_NC:
[AArch64] BFD Support BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15 2015-06-01 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_reloc_got_type): Support BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15. (elfNN_aarch64_final_link_relocate): Ditto. (elfNN_aarch64_gc_swap_hook): Ditto. (elfNN_aarch64_check_relocs): Ditto. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Ditto. ld/testsuite/ * ld-aarch64/emit-relocs-313.s: New test file. * ld-aarch64/emit-relocs-313.d: Ditto. * ld-aarch64/aarch64-elf.exp: Run new test.
2015-06-01 11:26:00 +02:00
case BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15:
[LD][AARCH64]Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC Support. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_reloc_got_type): Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC support. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/aarch64-elf.exp: Run new test. * ld-aarch64/emit-relocs-301.d: New. * ld-aarch64/emit-relocs-301.s: New.
2015-10-02 16:54:40 +02:00
case BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC:
[LD][AARCH64]Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G1 Support. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_reloc_got_type): Add support for BFD_RELOC_AARCH64_MOVW_GOTOFF_G1. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise (elfNN_aarch64_final_link_relocate): Calculate offset within GOT. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/emit-relocs-302.d: New. * ld-aarch64/emit-relocs-302.s: New. * ld-aarch64/aarch64-elf.exp: Run the new test.
2015-10-02 16:29:41 +02:00
case BFD_RELOC_AARCH64_MOVW_GOTOFF_G1:
[LD][AARCH64]Add BFD_RELOC_AARCH64_LD64_GOTOFF_LO15 Support. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_reloc_got_type): Add BFD_RELOC_AARCH64_LD_64_GOTOFF_LO15 support. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise (elfNN_aarch64_final_link_relocate): Calculate offset within GOT. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/emit-relocs-310.d: New. * ld-aarch64/emit-relocs-310.s: New. * ld-aarch64/aarch64-elf.exp: Run the test.
2015-10-02 15:51:26 +02:00
case BFD_RELOC_AARCH64_LD64_GOTOFF_LO15:
[AArch64/BFD] Sort relocation case labels alphabetically 2015-05-19 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_tls_transition_without_check): Sort relocation case labels alphabetically. (elfNN_aarch64_final_link_relocate): Ditto. (elfNN_aarch64_tls_relax): Ditto. (elfNN_aarch64_relocate_section): Ditto. (elfNN_aarch64_gc_sweep_hook): Ditto. (elfNN_aarch64_check_relocs): Ditto. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Ditto. (_bfd_aarch64_elf_resolve_relocation): Ditto.
2015-05-20 11:58:43 +02:00
case BFD_RELOC_AARCH64_LD64_GOT_LO12_NC:
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
base_got = globals->root.sgot;
off = h->got.offset;
if (base_got == NULL)
abort ();
if (off == (bfd_vma) -1)
{
bfd_vma plt_index;
/* We can't use h->got.offset here to save state, or
even just remember the offset, as finish_dynamic_symbol
would use that as offset into .got. */
if (globals->root.splt != NULL)
{
bfd/elfnn-aarch64.c: Fix miscalculation of GOTPLT offset for ifunc syms. The .got.plt header size was not being correctly taken into account when calculating the offset for relocations against ifunc symbols. bfd/ChangeLog: 2013-11-26 Will Newton <will.newton@linaro.org> * elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Ensure PLT_INDEX is calculated using correct header size. ld/testsuite/ChangeLog: 2013-11-26 Will Newton <will.newton@linaro.org> * ld-aarch64/aarch64-elf.exp: Add ifunc-21 test. * ld-aarch64/ifunc-21.d: New file. * ld-aarch64/ifunc-21.s: Likewise.
2013-11-25 12:07:07 +01:00
plt_index = ((h->plt.offset - globals->plt_header_size) /
globals->plt_entry_size);
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
off = (plt_index + 3) * GOT_ENTRY_SIZE;
base_got = globals->root.sgotplt;
}
else
{
plt_index = h->plt.offset / globals->plt_entry_size;
off = plt_index * GOT_ENTRY_SIZE;
base_got = globals->root.igotplt;
}
if (h->dynindx == -1
|| h->forced_local
|| info->symbolic)
{
/* This references the local definition. We must
initialize this entry in the global offset table.
Since the offset must always be a multiple of 8,
we use the least significant bit to record
whether we have initialized it already.
When doing a dynamic link, we create a .rela.got
relocation entry to initialize the value. This
is done in the finish_dynamic_symbol routine. */
if ((off & 1) != 0)
off &= ~1;
else
{
bfd_put_NN (output_bfd, value,
base_got->contents + off);
/* Note that this is harmless as -1 | 1 still is -1. */
h->got.offset |= 1;
}
}
value = (base_got->output_section->vma
+ base_got->output_offset + off);
}
else
value = aarch64_calculate_got_entry_vma (h, globals, info,
value, output_bfd,
unresolved_reloc_p);
[BFD][AARCH64]Refactor to facilitate further large memory model support patches. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Change if to switch statement.
2015-10-02 15:35:06 +02:00
[AArch64] Remove duplicated code when handling some GOT relocations types There are quite a few duplicated code supporting several GP based relocation types. They are: BFD_RELOC_AARCH64_LD64_GOTOFF_LO15 BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC BFD_RELOC_AARCH64_MOVW_GOTOFF_G1 These relocation types are supposed to be used for large memory model PIC/pic mode under which we will have an initialized GP register points to the base of GOT table, then these relocations are supposed to put the distance between GOT entry and GOT table base address into the related instructions. So, the parameters required to calculate the relocation should be the same as BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15 etc, all of them are require the GOT entry address and GOT table base address to perform the relocation. This patch has removed those duplicated code when handling above listed relocation types, grouped them with others as relocation types that are require GOT table base address during performing relocation, reused the existed GOT handling code. The relocation calculation for these types before and after this patch should be identical. bfd/ * elfnn-aarch64.c (aarch64_relocation_aginst_gp_p): New function. (elfNN_aarch64_final_link_relocate): Delete duplicated code for BFD_RELOC_AARCH64_LD64_GOTOFF_LO15, BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC, BFD_RELOC_AARCH64_MOVW_GOTOFF_G1. * elfxx-aarch64.c (_bfd_aarch64_elf_resolve_relocation): Optimize the support for them.
2017-06-29 12:45:24 +02:00
if (aarch64_relocation_aginst_gp_p (bfd_r_type))
addend = (globals->root.sgot->output_section->vma
+ globals->root.sgot->output_offset);
[BFD][AARCH64]Refactor to facilitate further large memory model support patches. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Change if to switch statement.
2015-10-02 15:35:06 +02:00
AArch64: Fix LD crash on weak and undefined TLS symbols. (PR/24602). This patch fixes a few linker crashes due to TLS code reaching an assert when it shouldn't. The first scenario is with weak TLS symbols that remain weak during linking. In this case the mid-end would not have seen a TLS symbol and so wouldn't have allocated the TLS section. We currently assert here and the linker crashes with a not very useful message. This patch changes this to return the value 0 for the TLS symbol in question emulating what lld and gold and other BFD targets do. However because weak TLS is implementation defined and we don't define any behavior for it I also emit a warning to the user to inform them of such. Secondly when a strong TLS reference is undefined. The linker crashes even after it correctly reported that there is an undefined reference. This changes it so that it gracefully exits and reports a useful error. bfd/ChangeLog: PR ld/24601 * elfnn-aarch64.c (aarch64_relocate): Handle weak TLS and undefined TLS. Also Pass input_bfd to _bfd_aarch64_elf_resolve_relocation. * elfxx-aarch64.c (_bfd_aarch64_elf_resolve_relocation): Use it. * elfxx-aarch64.h (_bfd_aarch64_elf_resolve_relocation): Emit warning for weak TLS. ld/ChangeLog: PR ld/24601 * testsuite/ld-aarch64/aarch64-elf.exp (undef-tls, weak-tls): New. * testsuite/ld-aarch64/undef-tls.d: New test. * testsuite/ld-aarch64/undef-tls.s: New test. * testsuite/ld-aarch64/weak-tls.d: New test. * testsuite/ld-aarch64/weak-tls.s: New test.
2019-08-22 12:35:35 +02:00
value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
place, value,
[AArch64] BFD Support BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15 2015-06-01 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_reloc_got_type): Support BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15. (elfNN_aarch64_final_link_relocate): Ditto. (elfNN_aarch64_gc_swap_hook): Ditto. (elfNN_aarch64_check_relocs): Ditto. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Ditto. ld/testsuite/ * ld-aarch64/emit-relocs-313.s: New test file. * ld-aarch64/emit-relocs-313.d: Ditto. * ld-aarch64/aarch64-elf.exp: Run new test.
2015-06-01 11:26:00 +02:00
addend, weak_undef_p);
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
return _bfd_aarch64_elf_put_addend (input_bfd, hit_data, bfd_r_type, howto, value);
case BFD_RELOC_AARCH64_ADD_LO12:
[AArch64/BFD] Sort relocation case labels alphabetically 2015-05-19 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_tls_transition_without_check): Sort relocation case labels alphabetically. (elfNN_aarch64_final_link_relocate): Ditto. (elfNN_aarch64_tls_relax): Ditto. (elfNN_aarch64_relocate_section): Ditto. (elfNN_aarch64_gc_sweep_hook): Ditto. (elfNN_aarch64_check_relocs): Ditto. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Ditto. (_bfd_aarch64_elf_resolve_relocation): Ditto.
2015-05-20 11:58:43 +02:00
case BFD_RELOC_AARCH64_ADR_HI21_PCREL:
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
break;
}
}
Fix Sparc, s390 and AArch64 targets so that they can handle relocs against ifunc symbols found in note sections. Following on from PR 22929, I have found the same problem exists with other ifunc supporting targets too. Plus see this link for the bug being reported against the s390x binutils for Fedora rawhide: https://bugzilla.redhat.com/show_bug.cgi?id=1553705 So I am going to check in the patch below which applies the same change that H.J. made for the x86_64 target to the other affected targets. (Specifically: S390, AArch64 and Sparc). Plus it adds a new test to the linker testsuite to make sure that this problem stays fixed. bfd * elf64-s390.c (elf_s390_relocate_section): Move check for relocations against non-allocated sections to before the code that handles ifunc relocations. * elf32-s390.c (elf_s390_relocate_section): Likewise. * elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Treat relocs against IFUNC symbols in non-allocated sections as relocs against FUNC symbols. * elfxx-sparc.c (_bfd_sparc_elf_relocate_section): Likewise. ld * testsuite/ld-ifunc/ifuncmod5.s: New test. Checks that targets that support IFUNC symbols can handle relocations against those symbols in NOTE sections. * testsuite/ld-ifunc/ifuncmod5.d: New file: Driver for the new test. * testsuite/ld-ifunc/ifunc.exp: Run the new test.
2018-03-09 15:37:36 +01:00
skip_ifunc:
aarch64: Check UNDEFWEAK_NO_DYNAMIC_RELOC Don't generate dynamic relocation against weak undefined symbol if it is resolved to zero. FIXME: UNDEFWEAK_NO_DYNAMIC_RELOC may need to be checked in more places. PR ld/22269 * elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Don't generate dynamic relocation if UNDEFWEAK_NO_DYNAMIC_RELOC is true. (elfNN_aarch64_allocate_dynrelocs): Discard dynamic relocations if UNDEFWEAK_NO_DYNAMIC_RELOC is true.
2017-10-14 19:23:48 +02:00
resolved_to_zero = (h != NULL
&& UNDEFWEAK_NO_DYNAMIC_RELOC (info, h));
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
switch (bfd_r_type)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
case BFD_RELOC_AARCH64_NONE:
[LD][AARCH64]Add TLSDESC support for large memory model. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_tls_transition_without_check): Add relax transitions for TLSDESC_ADD, TLSDESC_LDR, TLSDESC_OFF_G0_NC, TLSDESC_OFF_G1. (aarch64_tls_transition_without_check): Add relaxation support. (aarch64_reloc_got_type): Add support. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/aarch64-elf.exp: Run new test. * ld-aarch64/tls-large-desc.d: New. * ld-aarch64/tls-large-desc.s: New. * ld-aarch64/tls-relax-large-desc-ie.d: New. * ld-aarch64/tls-relax-large-desc-ie.s: New. * ld-aarch64/tls-relax-large-desc-le.d: New. * ld-aarch64/tls-relax-large-desc-le.s: New.
2015-10-02 18:43:08 +02:00
case BFD_RELOC_AARCH64_TLSDESC_ADD:
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
case BFD_RELOC_AARCH64_TLSDESC_CALL:
[LD][AARCH64]Add TLSDESC support for large memory model. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_tls_transition_without_check): Add relax transitions for TLSDESC_ADD, TLSDESC_LDR, TLSDESC_OFF_G0_NC, TLSDESC_OFF_G1. (aarch64_tls_transition_without_check): Add relaxation support. (aarch64_reloc_got_type): Add support. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/aarch64-elf.exp: Run new test. * ld-aarch64/tls-large-desc.d: New. * ld-aarch64/tls-large-desc.s: New. * ld-aarch64/tls-relax-large-desc-ie.d: New. * ld-aarch64/tls-relax-large-desc-ie.s: New. * ld-aarch64/tls-relax-large-desc-le.d: New. * ld-aarch64/tls-relax-large-desc-le.s: New.
2015-10-02 18:43:08 +02:00
case BFD_RELOC_AARCH64_TLSDESC_LDR:
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
*unresolved_reloc_p = FALSE;
return bfd_reloc_ok;
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
case BFD_RELOC_AARCH64_NN:
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* When generating a shared object or relocatable executable, these
BFD whitespace fixes Binutils is supposed to use tabs. In my git config I have whitespace = indent-with-non-tab,space-before-tab,trailing-space and I got annoyed enough seeing red in "git diff" output to fix the problems. * doc/header.sed: Trim trailing space when splitting lines. * aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-cris.c, * aout-ns32k.c, * aout-target.h, * aout-tic30.c, * aoutf1.h, * aoutx.h, * arc-got.h, * arc-plt.def, * arc-plt.h, * archive.c, * archive64.c, * archures.c, * armnetbsd.c, * bfd-in.h, * bfd.c, * bfdio.c, * binary.c, * bout.c, * cache.c, * cisco-core.c, * coff-alpha.c, * coff-apollo.c, * coff-arm.c, * coff-h8300.c, * coff-i386.c, * coff-i860.c, * coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mcore.c, * coff-mips.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-stgo32.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * compress.c, * corefile.c, * cpu-alpha.c, * cpu-arm.c, * cpu-avr.c, * cpu-bfin.c, * cpu-cr16.c, * cpu-cr16c.c, * cpu-crx.c, * cpu-d10v.c, * cpu-frv.c, * cpu-ft32.c, * cpu-i370.c, * cpu-i960.c, * cpu-ia64-opc.c, * cpu-ip2k.c, * cpu-lm32.c, * cpu-m32r.c, * cpu-mcore.c, * cpu-microblaze.c, * cpu-mips.c, * cpu-moxie.c, * cpu-mt.c, * cpu-nios2.c, * cpu-ns32k.c, * cpu-or1k.c, * cpu-powerpc.c, * cpu-pru.c, * cpu-sh.c, * cpu-spu.c, * cpu-v850.c, * cpu-v850_rh850.c, * cpu-xgate.c, * cpu-z80.c, * dwarf1.c, * dwarf2.c, * ecoff.c, * ecofflink.c, * ecoffswap.h, * elf-bfd.h, * elf-eh-frame.c, * elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf-s390-common.c, * elf-strtab.c, * elf-vxworks.c, * elf.c, * elf32-am33lin.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-avr.h, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-i860.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68hc1x.c, * elf32-m68hc1x.h, * elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nds32.h, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score.h, * elf32-score7.c, * elf32-sh-symbian.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilegx.c, * elf32-tilegx.h, * elf32-tilepro.c, * elf32-tilepro.h, * elf32-v850.c, * elf32-vax.c, * elf32-wasm32.c, * elf32-xc16x.c, * elf32-xgate.c, * elf32-xgate.h, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-tilegx.c, * elf64-tilegx.h, * elf64-x86-64.c, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-aarch64.h, * elfxx-ia64.c, * elfxx-ia64.h, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * elfxx-x86.h, * freebsd.h, * hash.c, * host-aout.c, * hp300hpux.c, * hppabsd-core.c, * hpux-core.c, * i386aout.c, * i386linux.c, * i386lynx.c, * i386mach3.c, * i386msdos.c, * i386netbsd.c, * ieee.c, * ihex.c, * irix-core.c, * libaout.h, * libbfd-in.h, * libbfd.c, * libcoff-in.h, * libnlm.h, * libpei.h, * libxcoff.h, * linker.c, * lynx-core.c, * m68k4knetbsd.c, * m68klinux.c, * m68knetbsd.c, * m88kmach3.c, * mach-o-aarch64.c, * mach-o-arm.c, * mach-o-i386.c, * mach-o-target.c, * mach-o-x86-64.c, * mach-o.c, * mach-o.h, * merge.c, * mipsbsd.c, * mmo.c, * netbsd.h, * netbsd-core.c, * newsos3.c, * nlm-target.h, * nlm32-ppc.c, * nlm32-sparc.c, * nlmcode.h, * ns32k.h, * ns32knetbsd.c, * oasys.c, * opncls.c, * pc532-mach.c, * pdp11.c, * pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-mips.c, * pe-x86_64.c, * peXXigen.c, * pef.c, * pef.h, * pei-arm.c, * pei-i386.c, * pei-mcore.c, * pei-x86_64.c, * peicode.h, * plugin.c, * ppcboot.c, * ptrace-core.c, * reloc.c, * riscix.c, * rs6000-core.c, * section.c, * som.c, * som.h, * sparclinux.c, * sparcnetbsd.c, * srec.c, * stabs.c, * sunos.c, * syms.c, * targets.c, * tekhex.c, * trad-core.c, * vax1knetbsd.c, * vaxnetbsd.c, * verilog.c, * versados.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * wasm-module.c, * wasm-module.h, * xcofflink.c, * xsym.c, * xsym.h: Whitespace fixes. * bfd-in2.h, * libbfd.h, * libcoff.h: Regenerate.
2017-12-05 23:56:00 +01:00
relocations are copied into the output file to be resolved at
run time. */
[AArch64] Allow COPY relocation elimination As discussed at the PR, this patch tries to avoid COPY relocation generation and propagate the original relocation into runtime if it was relocating on writable section. The ELIMINATE_COPY_RELOCS has been set to true and it's underlying infrastructure has been improved so that the COPY reloc elimination at least working on absoluate relocations (ABS64) on AArch64. BFD linker copy relocation elimination framwork requires the backend to always allocate dynrelocs for all those relocation types that are possible to introduce copy relocations. This is for adjust_dynamic_symbol hook to be able to get all symbol reference information. Should one symbol is referenced by more than one relocations, if there is any of them needs copy relocation then linker should generate it. bfd/ PR ld/21532 * elfnn-aarch64.c (ELIMINATE_COPY_RELOCS): Set to 1. (elfNN_aarch64_final_link_relocate): Also propagate relocations to runtime for if there needs copy relocation elimination. (need_copy_relocation_p): New function. Return true for symbol with pc-relative references and if it's against read-only sections. (elfNN_aarch64_adjust_dynamic_symbol): Use need_copy_relocation_p. (elfNN_aarch64_check_relocs): Allocate dynrelocs for relocation types that are related with accessing external objects. (elfNN_aarch64_gc_sweep_hook): Sync the relocation types with the change in elfNN_aarch64_check_relocs. ld/ * testsuite/ld-aarch64/copy-reloc-exe-2.s: New test source file. * testsuite/ld-aarch64/copy-reloc-2.d: New test. * testsuite/ld-aarch64/copy-reloc-exe-eliminate.s: New test source file. * testsuite/ld-aarch64/copy-reloc-eliminate.d: New test. * testsuite/ld-aarch64/copy-reloc-so.s: Define new global objects. * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests.
2017-06-15 17:51:01 +02:00
if (((bfd_link_pic (info)
|| globals->root.is_relocatable_executable)
&& (input_section->flags & SEC_ALLOC)
&& (h == NULL
aarch64: Check UNDEFWEAK_NO_DYNAMIC_RELOC Don't generate dynamic relocation against weak undefined symbol if it is resolved to zero. FIXME: UNDEFWEAK_NO_DYNAMIC_RELOC may need to be checked in more places. PR ld/22269 * elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Don't generate dynamic relocation if UNDEFWEAK_NO_DYNAMIC_RELOC is true. (elfNN_aarch64_allocate_dynrelocs): Discard dynamic relocations if UNDEFWEAK_NO_DYNAMIC_RELOC is true.
2017-10-14 19:23:48 +02:00
|| (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
&& !resolved_to_zero)
[AArch64] Allow COPY relocation elimination As discussed at the PR, this patch tries to avoid COPY relocation generation and propagate the original relocation into runtime if it was relocating on writable section. The ELIMINATE_COPY_RELOCS has been set to true and it's underlying infrastructure has been improved so that the COPY reloc elimination at least working on absoluate relocations (ABS64) on AArch64. BFD linker copy relocation elimination framwork requires the backend to always allocate dynrelocs for all those relocation types that are possible to introduce copy relocations. This is for adjust_dynamic_symbol hook to be able to get all symbol reference information. Should one symbol is referenced by more than one relocations, if there is any of them needs copy relocation then linker should generate it. bfd/ PR ld/21532 * elfnn-aarch64.c (ELIMINATE_COPY_RELOCS): Set to 1. (elfNN_aarch64_final_link_relocate): Also propagate relocations to runtime for if there needs copy relocation elimination. (need_copy_relocation_p): New function. Return true for symbol with pc-relative references and if it's against read-only sections. (elfNN_aarch64_adjust_dynamic_symbol): Use need_copy_relocation_p. (elfNN_aarch64_check_relocs): Allocate dynrelocs for relocation types that are related with accessing external objects. (elfNN_aarch64_gc_sweep_hook): Sync the relocation types with the change in elfNN_aarch64_check_relocs. ld/ * testsuite/ld-aarch64/copy-reloc-exe-2.s: New test source file. * testsuite/ld-aarch64/copy-reloc-2.d: New test. * testsuite/ld-aarch64/copy-reloc-exe-eliminate.s: New test source file. * testsuite/ld-aarch64/copy-reloc-eliminate.d: New test. * testsuite/ld-aarch64/copy-reloc-so.s: Define new global objects. * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests.
2017-06-15 17:51:01 +02:00
|| h->root.type != bfd_link_hash_undefweak))
/* Or we are creating an executable, we may need to keep relocations
for symbols satisfied by a dynamic library if we manage to avoid
copy relocs for the symbol. */
|| (ELIMINATE_COPY_RELOCS
&& !bfd_link_pic (info)
&& h != NULL
&& (input_section->flags & SEC_ALLOC)
&& h->dynindx != -1
&& !h->non_got_ref
&& ((h->def_dynamic
&& !h->def_regular)
|| h->root.type == bfd_link_hash_undefweak
|| h->root.type == bfd_link_hash_undefined)))
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
Elf_Internal_Rela outrel;
bfd_byte *loc;
bfd_boolean skip, relocate;
asection *sreloc;
*unresolved_reloc_p = FALSE;
skip = FALSE;
relocate = FALSE;
outrel.r_addend = signed_addend;
outrel.r_offset =
_bfd_elf_section_offset (output_bfd, info, input_section,
rel->r_offset);
if (outrel.r_offset == (bfd_vma) - 1)
skip = TRUE;
else if (outrel.r_offset == (bfd_vma) - 2)
{
skip = TRUE;
relocate = TRUE;
}
[PR20402][LD][AARCH64]Don't emit RELATIVE relocation for absolute symbols which are resolved at static linking time. For absolute symbols which are forced local or not dynamic, the ABS relocation should be resolved at static linking time. Originally, an RELATIVE/ABS relocation will be generated even for absolution symbols for the dynamic linker to resolve. bfd/ 2018-03-07 Renlin Li <renlin.li@arm.com> PR ld/20402 * elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Check absolute symbol, and don't emit relocation in specific case. ld/ 2018-03-07 Renlin Li <renlin.li@arm.com> PR ld/20402 * testsuite/ld-aarch64/aarch64-elf.exp: Run new test. * testsuite/ld-aarch64/pr20402.s: New. * testsuite/ld-aarch64/pr20402.d: New.
2018-03-07 10:27:45 +01:00
else if (abs_symbol_p)
{
/* Local absolute symbol. */
skip = (h->forced_local || (h->dynindx == -1));
relocate = skip;
}
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
outrel.r_offset += (input_section->output_section->vma
+ input_section->output_offset);
if (skip)
memset (&outrel, 0, sizeof outrel);
else if (h != NULL
&& h->dynindx != -1
Add output_type to bfd_link_info The "shared" field in bfd_link_info is set for both DSO and and PIE. There are separate fields for executable and relocatable outputs. This patch adds an "output_type" field: enum output_type { type_unknown = 0, type_executable, type_dll, type_relocatable }; and a "pic" field to bfd_link_info to replace shared, executable and relocatable fields so that we can use the "output_type" field to check for output type and the "pic" field check if output is PIC. Macros, bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie, are provided to check for output features. bfd/ * bfd/aoutx.h: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * bfd/bout.c: Likewise. * bfd/coff-alpha.c: Likewise. * bfd/coff-arm.c: Likewise. * bfd/coff-i386.c: Likewise. * bfd/coff-i960.c: Likewise. * bfd/coff-m68k.c: Likewise. * bfd/coff-mcore.c: Likewise. * bfd/coff-mips.c: Likewise. * bfd/coff-ppc.c: Likewise. * bfd/coff-rs6000.c: Likewise. * bfd/coff-sh.c: Likewise. * bfd/coff-tic80.c: Likewise. * bfd/coff-x86_64.c: Likewise. * bfd/coff64-rs6000.c: Likewise. * bfd/coffgen.c: Likewise. * bfd/cofflink.c: Likewise. * bfd/ecoff.c: Likewise. * bfd/ecofflink.c: Likewise. * bfd/elf-bfd.h: Likewise. * bfd/elf-eh-frame.c: Likewise. * bfd/elf-ifunc.c: Likewise. * bfd/elf-m10200.c: Likewise. * bfd/elf-m10300.c: Likewise. * bfd/elf-s390-common.c: Likewise. * bfd/elf-vxworks.c: Likewise. * bfd/elf.c: Likewise. * bfd/elf32-arm.c: Likewise. * bfd/elf32-avr.c: Likewise. * bfd/elf32-bfin.c: Likewise. * bfd/elf32-cr16.c: Likewise. * bfd/elf32-cr16c.c: Likewise. * bfd/elf32-cris.c: Likewise. * bfd/elf32-crx.c: Likewise. * bfd/elf32-d10v.c: Likewise. * bfd/elf32-dlx.c: Likewise. * bfd/elf32-epiphany.c: Likewise. * bfd/elf32-fr30.c: Likewise. * bfd/elf32-frv.c: Likewise. * bfd/elf32-ft32.c: Likewise. * bfd/elf32-h8300.c: Likewise. * bfd/elf32-hppa.c: Likewise. * bfd/elf32-i370.c: Likewise. * bfd/elf32-i386.c: Likewise. * bfd/elf32-i860.c: Likewise. * bfd/elf32-ip2k.c: Likewise. * bfd/elf32-iq2000.c: Likewise. * bfd/elf32-lm32.c: Likewise. * bfd/elf32-m32c.c: Likewise. * bfd/elf32-m32r.c: Likewise. * bfd/elf32-m68hc11.c: Likewise. * bfd/elf32-m68hc1x.c: Likewise. * bfd/elf32-m68k.c: Likewise. * bfd/elf32-mcore.c: Likewise. * bfd/elf32-mep.c: Likewise. * bfd/elf32-metag.c: Likewise. * bfd/elf32-microblaze.c: Likewise. * bfd/elf32-moxie.c: Likewise. * bfd/elf32-msp430.c: Likewise. * bfd/elf32-mt.c: Likewise. * bfd/elf32-nds32.c: Likewise. * bfd/elf32-nios2.c: Likewise. * bfd/elf32-or1k.c: Likewise. * bfd/elf32-ppc.c: Likewise. * bfd/elf32-rl78.c: Likewise. * bfd/elf32-rx.c: Likewise. * bfd/elf32-s390.c: Likewise. * bfd/elf32-score.c: Likewise. * bfd/elf32-score7.c: Likewise. * bfd/elf32-sh-symbian.c: Likewise. * bfd/elf32-sh.c: Likewise. * bfd/elf32-sh64.c: Likewise. * bfd/elf32-spu.c: Likewise. * bfd/elf32-tic6x.c: Likewise. * bfd/elf32-tilepro.c: Likewise. * bfd/elf32-v850.c: Likewise. * bfd/elf32-vax.c: Likewise. * bfd/elf32-visium.c: Likewise. * bfd/elf32-xc16x.c: Likewise. * bfd/elf32-xstormy16.c: Likewise. * bfd/elf32-xtensa.c: Likewise. * bfd/elf64-alpha.c: Likewise. * bfd/elf64-hppa.c: Likewise. * bfd/elf64-ia64-vms.c: Likewise. * bfd/elf64-mmix.c: Likewise. * bfd/elf64-ppc.c: Likewise. * bfd/elf64-s390.c: Likewise. * bfd/elf64-sh64.c: Likewise. * bfd/elf64-x86-64.c: Likewise. * bfd/elflink.c: Likewise. * bfd/elfnn-aarch64.c: Likewise. * bfd/elfnn-ia64.c: Likewise. * bfd/elfxx-mips.c: Likewise. * bfd/elfxx-sparc.c: Likewise. * bfd/elfxx-tilegx.c: Likewise. * bfd/i386linux.c: Likewise. * bfd/linker.c: Likewise. * bfd/m68klinux.c: Likewise. * bfd/pdp11.c: Likewise. * bfd/pe-mips.c: Likewise. * bfd/peXXigen.c: Likewise. * bfd/reloc.c: Likewise. * bfd/reloc16.c: Likewise. * bfd/sparclinux.c: Likewise. * bfd/sunos.c: Likewise. * bfd/vms-alpha.c: Likewise. * bfd/xcofflink.c: Likewise. include/ * include/bfdlink.h (output_type): New enum. (bfd_link_executable): New macro. (bfd_link_dll): Likewise. (bfd_link_relocatable): Likewise. (bfd_link_pic): Likewise. (bfd_link_pie): Likewise. (bfd_link_info): Remove shared, executable, pie and relocatable. Add output_type and pic. ld/ * ld/ldctor.c: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * ld/ldemul.c: Likewise. * ld/ldfile.c: Likewise. * ld/ldlang.c: Likewise. * ld/ldmain.c: Likewise. * ld/ldwrite.c: Likewise. * ld/lexsup.c: Likewise. * ld/pe-dll.c: Likewise. * ld/plugin.c: Likewise. * ld/emultempl/aarch64elf.em: Likewise. * ld/emultempl/aix.em: Likewise. * ld/emultempl/alphaelf.em: Likewise. * ld/emultempl/armcoff.em: Likewise. * ld/emultempl/armelf.em: Likewise. * ld/emultempl/avrelf.em: Likewise. * ld/emultempl/beos.em: Likewise. * ld/emultempl/cr16elf.em: Likewise. * ld/emultempl/elf-generic.em: Likewise. * ld/emultempl/elf32.em: Likewise. * ld/emultempl/genelf.em: Likewise. * ld/emultempl/generic.em: Likewise. * ld/emultempl/gld960.em: Likewise. * ld/emultempl/gld960c.em: Likewise. * ld/emultempl/hppaelf.em: Likewise. * ld/emultempl/irix.em: Likewise. * ld/emultempl/linux.em: Likewise. * ld/emultempl/lnk960.em: Likewise. * ld/emultempl/m68hc1xelf.em: Likewise. * ld/emultempl/m68kcoff.em: Likewise. * ld/emultempl/m68kelf.em: Likewise. * ld/emultempl/metagelf.em: Likewise. * ld/emultempl/mipself.em: Likewise. * ld/emultempl/mmo.em: Likewise. * ld/emultempl/msp430.em: Likewise. * ld/emultempl/nds32elf.em: Likewise. * ld/emultempl/needrelax.em: Likewise. * ld/emultempl/nios2elf.em: Likewise. * ld/emultempl/pe.em: Likewise. * ld/emultempl/pep.em: Likewise. * ld/emultempl/ppc32elf.em: Likewise. * ld/emultempl/ppc64elf.em: Likewise. * ld/emultempl/sh64elf.em: Likewise. * ld/emultempl/solaris2.em: Likewise. * ld/emultempl/spuelf.em: Likewise. * ld/emultempl/sunos.em: Likewise. * ld/emultempl/tic6xdsbt.em: Likewise. * ld/emultempl/ticoff.em: Likewise. * ld/emultempl/v850elf.em: Likewise. * ld/emultempl/vms.em: Likewise. * ld/emultempl/vxworks.em: Likewise.
2015-08-18 14:51:03 +02:00
&& (!bfd_link_pic (info)
[PR20402][LD][AARCH64]Don't emit RELATIVE relocation for absolute symbols which are resolved at static linking time. For absolute symbols which are forced local or not dynamic, the ABS relocation should be resolved at static linking time. Originally, an RELATIVE/ABS relocation will be generated even for absolution symbols for the dynamic linker to resolve. bfd/ 2018-03-07 Renlin Li <renlin.li@arm.com> PR ld/20402 * elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Check absolute symbol, and don't emit relocation in specific case. ld/ 2018-03-07 Renlin Li <renlin.li@arm.com> PR ld/20402 * testsuite/ld-aarch64/aarch64-elf.exp: Run new test. * testsuite/ld-aarch64/pr20402.s: New. * testsuite/ld-aarch64/pr20402.d: New.
2018-03-07 10:27:45 +01:00
|| !(bfd_link_pie (info) || SYMBOLIC_BIND (info, h))
Add output_type to bfd_link_info The "shared" field in bfd_link_info is set for both DSO and and PIE. There are separate fields for executable and relocatable outputs. This patch adds an "output_type" field: enum output_type { type_unknown = 0, type_executable, type_dll, type_relocatable }; and a "pic" field to bfd_link_info to replace shared, executable and relocatable fields so that we can use the "output_type" field to check for output type and the "pic" field check if output is PIC. Macros, bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie, are provided to check for output features. bfd/ * bfd/aoutx.h: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * bfd/bout.c: Likewise. * bfd/coff-alpha.c: Likewise. * bfd/coff-arm.c: Likewise. * bfd/coff-i386.c: Likewise. * bfd/coff-i960.c: Likewise. * bfd/coff-m68k.c: Likewise. * bfd/coff-mcore.c: Likewise. * bfd/coff-mips.c: Likewise. * bfd/coff-ppc.c: Likewise. * bfd/coff-rs6000.c: Likewise. * bfd/coff-sh.c: Likewise. * bfd/coff-tic80.c: Likewise. * bfd/coff-x86_64.c: Likewise. * bfd/coff64-rs6000.c: Likewise. * bfd/coffgen.c: Likewise. * bfd/cofflink.c: Likewise. * bfd/ecoff.c: Likewise. * bfd/ecofflink.c: Likewise. * bfd/elf-bfd.h: Likewise. * bfd/elf-eh-frame.c: Likewise. * bfd/elf-ifunc.c: Likewise. * bfd/elf-m10200.c: Likewise. * bfd/elf-m10300.c: Likewise. * bfd/elf-s390-common.c: Likewise. * bfd/elf-vxworks.c: Likewise. * bfd/elf.c: Likewise. * bfd/elf32-arm.c: Likewise. * bfd/elf32-avr.c: Likewise. * bfd/elf32-bfin.c: Likewise. * bfd/elf32-cr16.c: Likewise. * bfd/elf32-cr16c.c: Likewise. * bfd/elf32-cris.c: Likewise. * bfd/elf32-crx.c: Likewise. * bfd/elf32-d10v.c: Likewise. * bfd/elf32-dlx.c: Likewise. * bfd/elf32-epiphany.c: Likewise. * bfd/elf32-fr30.c: Likewise. * bfd/elf32-frv.c: Likewise. * bfd/elf32-ft32.c: Likewise. * bfd/elf32-h8300.c: Likewise. * bfd/elf32-hppa.c: Likewise. * bfd/elf32-i370.c: Likewise. * bfd/elf32-i386.c: Likewise. * bfd/elf32-i860.c: Likewise. * bfd/elf32-ip2k.c: Likewise. * bfd/elf32-iq2000.c: Likewise. * bfd/elf32-lm32.c: Likewise. * bfd/elf32-m32c.c: Likewise. * bfd/elf32-m32r.c: Likewise. * bfd/elf32-m68hc11.c: Likewise. * bfd/elf32-m68hc1x.c: Likewise. * bfd/elf32-m68k.c: Likewise. * bfd/elf32-mcore.c: Likewise. * bfd/elf32-mep.c: Likewise. * bfd/elf32-metag.c: Likewise. * bfd/elf32-microblaze.c: Likewise. * bfd/elf32-moxie.c: Likewise. * bfd/elf32-msp430.c: Likewise. * bfd/elf32-mt.c: Likewise. * bfd/elf32-nds32.c: Likewise. * bfd/elf32-nios2.c: Likewise. * bfd/elf32-or1k.c: Likewise. * bfd/elf32-ppc.c: Likewise. * bfd/elf32-rl78.c: Likewise. * bfd/elf32-rx.c: Likewise. * bfd/elf32-s390.c: Likewise. * bfd/elf32-score.c: Likewise. * bfd/elf32-score7.c: Likewise. * bfd/elf32-sh-symbian.c: Likewise. * bfd/elf32-sh.c: Likewise. * bfd/elf32-sh64.c: Likewise. * bfd/elf32-spu.c: Likewise. * bfd/elf32-tic6x.c: Likewise. * bfd/elf32-tilepro.c: Likewise. * bfd/elf32-v850.c: Likewise. * bfd/elf32-vax.c: Likewise. * bfd/elf32-visium.c: Likewise. * bfd/elf32-xc16x.c: Likewise. * bfd/elf32-xstormy16.c: Likewise. * bfd/elf32-xtensa.c: Likewise. * bfd/elf64-alpha.c: Likewise. * bfd/elf64-hppa.c: Likewise. * bfd/elf64-ia64-vms.c: Likewise. * bfd/elf64-mmix.c: Likewise. * bfd/elf64-ppc.c: Likewise. * bfd/elf64-s390.c: Likewise. * bfd/elf64-sh64.c: Likewise. * bfd/elf64-x86-64.c: Likewise. * bfd/elflink.c: Likewise. * bfd/elfnn-aarch64.c: Likewise. * bfd/elfnn-ia64.c: Likewise. * bfd/elfxx-mips.c: Likewise. * bfd/elfxx-sparc.c: Likewise. * bfd/elfxx-tilegx.c: Likewise. * bfd/i386linux.c: Likewise. * bfd/linker.c: Likewise. * bfd/m68klinux.c: Likewise. * bfd/pdp11.c: Likewise. * bfd/pe-mips.c: Likewise. * bfd/peXXigen.c: Likewise. * bfd/reloc.c: Likewise. * bfd/reloc16.c: Likewise. * bfd/sparclinux.c: Likewise. * bfd/sunos.c: Likewise. * bfd/vms-alpha.c: Likewise. * bfd/xcofflink.c: Likewise. include/ * include/bfdlink.h (output_type): New enum. (bfd_link_executable): New macro. (bfd_link_dll): Likewise. (bfd_link_relocatable): Likewise. (bfd_link_pic): Likewise. (bfd_link_pie): Likewise. (bfd_link_info): Remove shared, executable, pie and relocatable. Add output_type and pic. ld/ * ld/ldctor.c: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * ld/ldemul.c: Likewise. * ld/ldfile.c: Likewise. * ld/ldlang.c: Likewise. * ld/ldmain.c: Likewise. * ld/ldwrite.c: Likewise. * ld/lexsup.c: Likewise. * ld/pe-dll.c: Likewise. * ld/plugin.c: Likewise. * ld/emultempl/aarch64elf.em: Likewise. * ld/emultempl/aix.em: Likewise. * ld/emultempl/alphaelf.em: Likewise. * ld/emultempl/armcoff.em: Likewise. * ld/emultempl/armelf.em: Likewise. * ld/emultempl/avrelf.em: Likewise. * ld/emultempl/beos.em: Likewise. * ld/emultempl/cr16elf.em: Likewise. * ld/emultempl/elf-generic.em: Likewise. * ld/emultempl/elf32.em: Likewise. * ld/emultempl/genelf.em: Likewise. * ld/emultempl/generic.em: Likewise. * ld/emultempl/gld960.em: Likewise. * ld/emultempl/gld960c.em: Likewise. * ld/emultempl/hppaelf.em: Likewise. * ld/emultempl/irix.em: Likewise. * ld/emultempl/linux.em: Likewise. * ld/emultempl/lnk960.em: Likewise. * ld/emultempl/m68hc1xelf.em: Likewise. * ld/emultempl/m68kcoff.em: Likewise. * ld/emultempl/m68kelf.em: Likewise. * ld/emultempl/metagelf.em: Likewise. * ld/emultempl/mipself.em: Likewise. * ld/emultempl/mmo.em: Likewise. * ld/emultempl/msp430.em: Likewise. * ld/emultempl/nds32elf.em: Likewise. * ld/emultempl/needrelax.em: Likewise. * ld/emultempl/nios2elf.em: Likewise. * ld/emultempl/pe.em: Likewise. * ld/emultempl/pep.em: Likewise. * ld/emultempl/ppc32elf.em: Likewise. * ld/emultempl/ppc64elf.em: Likewise. * ld/emultempl/sh64elf.em: Likewise. * ld/emultempl/solaris2.em: Likewise. * ld/emultempl/spuelf.em: Likewise. * ld/emultempl/sunos.em: Likewise. * ld/emultempl/tic6xdsbt.em: Likewise. * ld/emultempl/ticoff.em: Likewise. * ld/emultempl/v850elf.em: Likewise. * ld/emultempl/vms.em: Likewise. * ld/emultempl/vxworks.em: Likewise.
2015-08-18 14:51:03 +02:00
|| !h->def_regular))
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
outrel.r_info = ELFNN_R_INFO (h->dynindx, r_type);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
else
{
int symbol;
/* On SVR4-ish systems, the dynamic loader cannot
relocate the text and data segments independently,
so the symbol does not matter. */
symbol = 0;
[AArch64] Also puts value in place for R_AARCH64_RELATIVE When handling absolute relocations for global symbols bind within the shared object, AArch64 will generate one dynamic RELATIVE relocation, but won't apply the value for this absolution relocations at static linking stage. This is different from AArch64 gold linker and x86-64. This is not a bug as AArch64 is RELA, there is only guarantee that relocation addend is placed in the relocation entry. But some system softwares originally writen for x86-64 might assume AArch64 bfd linker gets the same behavior as x86-64, then they could take advantage of this buy skipping those RELATIVE dynamic relocations if the load address is the same as the static linking address. This patch makes AArch64 BFD linker applies absolution relocations at static linking stage for scenario described above. Meanwhile old AArch64 android loader has a bug (PR19163) which relies on current linker behavior as a workaround, so the same option --no-apply-dynamic-relocs added.
2016-05-03 12:59:37 +02:00
relocate = globals->no_apply_dynamic_relocs ? FALSE : TRUE;
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
outrel.r_info = ELFNN_R_INFO (symbol, AARCH64_R (RELATIVE));
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
outrel.r_addend += value;
}
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
sreloc = elf_section_data (input_section)->sreloc;
if (sreloc == NULL || sreloc->contents == NULL)
return bfd_reloc_notsupported;
loc = sreloc->contents + sreloc->reloc_count++ * RELOC_SIZE (globals);
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
bfd_elfNN_swap_reloca_out (output_bfd, &outrel, loc);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
if (sreloc->reloc_count * RELOC_SIZE (globals) > sreloc->size)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
/* Sanity to check that we have previously allocated
sufficient space in the relocation section for the
number of relocations we actually want to emit. */
abort ();
}
/* If this reloc is against an external symbol, we do not want to
fiddle with the addend. Otherwise, we need to include the symbol
value so that it becomes an addend for the dynamic reloc. */
if (!relocate)
return bfd_reloc_ok;
return _bfd_final_link_relocate (howto, input_bfd, input_section,
contents, rel->r_offset, value,
signed_addend);
}
else
value += signed_addend;
break;
[PATCH v3] aarch64: Emit jump slot for conditional branch to undefined symbols The linker silently writes out a conditional branch to 0 if the target symbol in R_AARCH64_CONDBR19 or R_AARCH64_TSTBR14 relocations is undefined. Emit a PLT instead so that behaviour is the same for these relocations as the llvm linker. The special behaviour for undefined weak symbols, where conditional branches to such symbols result in a branch unto themselves, has been retained. This is because the weak-undefined.s test explicitly checks for that, leading me to conclude that it's expected behaviour. bfd * elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Club BFD_RELOC_AARCH64_BRANCH19 and BFD_RELOC_AARCH64_TSTBR14 cases with BFD_RELOC_AARCH64_JUMP26. (elfNN_aarch64_check_relocs): Likewise. ld * testsuite/ld-aarch64/aarch64-elf.exp: New test emit-relocs-560. * testsuite/ld-aarch64/emit-relocs-560.d: New file. * testsuite/ld-aarch64/emit-relocs-560.s: New file.
2020-05-19 12:07:52 +02:00
case BFD_RELOC_AARCH64_BRANCH19:
case BFD_RELOC_AARCH64_TSTBR14:
/* A conditional branch to an undefined weak symbol is converted to a
branch to itself. */
if (weak_undef_p && !via_plt_p)
{
value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
place, value,
signed_addend,
weak_undef_p);
break;
}
/* Fall through. */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
case BFD_RELOC_AARCH64_CALL26:
[AArch64/BFD] Sort relocation case labels alphabetically 2015-05-19 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_tls_transition_without_check): Sort relocation case labels alphabetically. (elfNN_aarch64_final_link_relocate): Ditto. (elfNN_aarch64_tls_relax): Ditto. (elfNN_aarch64_relocate_section): Ditto. (elfNN_aarch64_gc_sweep_hook): Ditto. (elfNN_aarch64_check_relocs): Ditto. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Ditto. (_bfd_aarch64_elf_resolve_relocation): Ditto.
2015-05-20 11:58:43 +02:00
case BFD_RELOC_AARCH64_JUMP26:
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
asection *splt = globals->root.splt;
/* A call to an undefined weak symbol is converted to a jump to
the next instruction unless a PLT entry will be created.
The jump to the next instruction is optimized as a NOP.
Do the same for local undefined symbols. */
if (weak_undef_p && ! via_plt_p)
{
bfd_putl32 (INSN_NOP, hit_data);
return bfd_reloc_ok;
}
/* If the call goes through a PLT entry, make sure to
check distance to the right destination address. */
if (via_plt_p)
[AArch64] PR18668, repair long branch veneer for plt stub 2015-08-11 Jiong Wang <jiong.wang@arm.com> bfd/ PR ld/18668 * elfnn-aarch64.c (aarch64_type_of_stub): Update destination for calls go through plt stub. (elfNN_aarch64_final_link_relocate): Adjust code logic for CALL26, JUMP26 relocation to support inserting veneer for call to plt stub. ld/testsuite/ * ld-aarch64/farcall-b-gsym.s: New test. * ld-aarch64/farcall-b-plt.s: Likewise. * ld-aarch64/farcall-bl-plt.s: Likewise. * ld-aarch64/farcall-b-gsym.d: New expect file. * ld-aarch64/farcall-b-plt.d: Likewise. * ld-aarch64/farcall-bl-plt.d: Likewise.
2015-08-11 22:44:31 +02:00
value = (splt->output_section->vma
+ splt->output_offset + h->plt.offset);
/* Check if a stub has to be inserted because the destination
is too far away. */
struct elf_aarch64_stub_hash_entry *stub_entry = NULL;
[AArch64] Relax long branch veneer insertion for non STT_FUNC symbol As defined at AArch64 ELF Specification (4.6.7 Call and Jump relocations), symbol with type of non STT_FUNC but in different input section with relocation place should insert long branch veneer also. Meanwhile the current long branch veneer infrastructure havn't considered the situation where the branch destination is "sym_value + rela->addend". This was OK because we only insert veneer for long call destination is STT_FUNC symbol for which the addend is always zero. But as we relax the support to other situations by this patch, we need to handle addend be non-zero value. For example, for static function, relocation against "local symbol" are turned into relocation against "section symbol + offset" where there is a valid addend. bfd/ * elfnn-aarch64.c (aarch64_type_of_stub): Allow insert long branch veneer for sym_sec != input_sec. (elfNN_aarch64_size_stub): Support STT_SECTION symbol. (elfNN_aarch64_final_link_relocate): Take rela addend into account when calculation destination. ld/ * testsuite/ld-aarch64/farcall-section.d: Delete. * testsuite/ld-aarch64/farcall-section.s: Delete. * testsuite/ld-aarch64/farcall-b-section.d: New expectation file. * testsuite/ld-aarch64/farcall-bl-section.d: Likewise. * testsuite/ld-aarch64/farcall-b-section.s: New testcase. * testsuite/ld-aarch64/farcall-bl-section.s: Likewise. * testsuite/ld-aarch64/aarch64-elf.exp: Likewise.
2016-01-20 17:57:59 +01:00
/* If the branch destination is directed to plt stub, "value" will be
the final destination, otherwise we should plus signed_addend, it may
contain non-zero value, for example call to local function symbol
which are turned into "sec_sym + sec_off", and sec_off is kept in
signed_addend. */
if (! aarch64_valid_branch_p (via_plt_p ? value : value + signed_addend,
place))
[AArch64] PR18668, repair long branch veneer for plt stub 2015-08-11 Jiong Wang <jiong.wang@arm.com> bfd/ PR ld/18668 * elfnn-aarch64.c (aarch64_type_of_stub): Update destination for calls go through plt stub. (elfNN_aarch64_final_link_relocate): Adjust code logic for CALL26, JUMP26 relocation to support inserting veneer for call to plt stub. ld/testsuite/ * ld-aarch64/farcall-b-gsym.s: New test. * ld-aarch64/farcall-b-plt.s: Likewise. * ld-aarch64/farcall-bl-plt.s: Likewise. * ld-aarch64/farcall-b-gsym.d: New expect file. * ld-aarch64/farcall-b-plt.d: Likewise. * ld-aarch64/farcall-bl-plt.d: Likewise.
2015-08-11 22:44:31 +02:00
/* The target is out of reach, so redirect the branch to
the local stub for this function. */
stub_entry = elfNN_aarch64_get_stub_entry (input_section, sym_sec, h,
rel, globals);
if (stub_entry != NULL)
[AArch64] Relax long branch veneer insertion for non STT_FUNC symbol As defined at AArch64 ELF Specification (4.6.7 Call and Jump relocations), symbol with type of non STT_FUNC but in different input section with relocation place should insert long branch veneer also. Meanwhile the current long branch veneer infrastructure havn't considered the situation where the branch destination is "sym_value + rela->addend". This was OK because we only insert veneer for long call destination is STT_FUNC symbol for which the addend is always zero. But as we relax the support to other situations by this patch, we need to handle addend be non-zero value. For example, for static function, relocation against "local symbol" are turned into relocation against "section symbol + offset" where there is a valid addend. bfd/ * elfnn-aarch64.c (aarch64_type_of_stub): Allow insert long branch veneer for sym_sec != input_sec. (elfNN_aarch64_size_stub): Support STT_SECTION symbol. (elfNN_aarch64_final_link_relocate): Take rela addend into account when calculation destination. ld/ * testsuite/ld-aarch64/farcall-section.d: Delete. * testsuite/ld-aarch64/farcall-section.s: Delete. * testsuite/ld-aarch64/farcall-b-section.d: New expectation file. * testsuite/ld-aarch64/farcall-bl-section.d: Likewise. * testsuite/ld-aarch64/farcall-b-section.s: New testcase. * testsuite/ld-aarch64/farcall-bl-section.s: Likewise. * testsuite/ld-aarch64/aarch64-elf.exp: Likewise.
2016-01-20 17:57:59 +01:00
{
value = (stub_entry->stub_offset
+ stub_entry->stub_sec->output_offset
+ stub_entry->stub_sec->output_section->vma);
/* We have redirected the destination to stub entry address,
so ignore any addend record in the original rela entry. */
signed_addend = 0;
}
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
}
AArch64: Fix LD crash on weak and undefined TLS symbols. (PR/24602). This patch fixes a few linker crashes due to TLS code reaching an assert when it shouldn't. The first scenario is with weak TLS symbols that remain weak during linking. In this case the mid-end would not have seen a TLS symbol and so wouldn't have allocated the TLS section. We currently assert here and the linker crashes with a not very useful message. This patch changes this to return the value 0 for the TLS symbol in question emulating what lld and gold and other BFD targets do. However because weak TLS is implementation defined and we don't define any behavior for it I also emit a warning to the user to inform them of such. Secondly when a strong TLS reference is undefined. The linker crashes even after it correctly reported that there is an undefined reference. This changes it so that it gracefully exits and reports a useful error. bfd/ChangeLog: PR ld/24601 * elfnn-aarch64.c (aarch64_relocate): Handle weak TLS and undefined TLS. Also Pass input_bfd to _bfd_aarch64_elf_resolve_relocation. * elfxx-aarch64.c (_bfd_aarch64_elf_resolve_relocation): Use it. * elfxx-aarch64.h (_bfd_aarch64_elf_resolve_relocation): Emit warning for weak TLS. ld/ChangeLog: PR ld/24601 * testsuite/ld-aarch64/aarch64-elf.exp (undef-tls, weak-tls): New. * testsuite/ld-aarch64/undef-tls.d: New test. * testsuite/ld-aarch64/undef-tls.s: New test. * testsuite/ld-aarch64/weak-tls.d: New test. * testsuite/ld-aarch64/weak-tls.s: New test.
2019-08-22 12:35:35 +02:00
value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
place, value,
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
signed_addend, weak_undef_p);
[AArch64] PR18668, repair long branch veneer for plt stub 2015-08-11 Jiong Wang <jiong.wang@arm.com> bfd/ PR ld/18668 * elfnn-aarch64.c (aarch64_type_of_stub): Update destination for calls go through plt stub. (elfNN_aarch64_final_link_relocate): Adjust code logic for CALL26, JUMP26 relocation to support inserting veneer for call to plt stub. ld/testsuite/ * ld-aarch64/farcall-b-gsym.s: New test. * ld-aarch64/farcall-b-plt.s: Likewise. * ld-aarch64/farcall-bl-plt.s: Likewise. * ld-aarch64/farcall-b-gsym.d: New expect file. * ld-aarch64/farcall-b-plt.d: Likewise. * ld-aarch64/farcall-bl-plt.d: Likewise.
2015-08-11 22:44:31 +02:00
*unresolved_reloc_p = FALSE;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
break;
[AArch64] Improve PC-relative relocation check for shared library 2015-04-24 Jiong. Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Reject PC-relative relocation for external symbol. ld/testsuite/ * ld-aarch64/pcrel.s: New testcase. * ld-aarch64/pcrel_pic_defiend_local.d: New expect file. * ld-aarch64/pcrel_pic_undefined.d: Ditto. * ld-aarch64/aarch64-elf.exp: Run them.
2015-04-24 23:35:04 +02:00
case BFD_RELOC_AARCH64_16_PCREL:
case BFD_RELOC_AARCH64_32_PCREL:
case BFD_RELOC_AARCH64_64_PCREL:
[AArch64/BFD] Sort relocation case labels alphabetically 2015-05-19 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_tls_transition_without_check): Sort relocation case labels alphabetically. (elfNN_aarch64_final_link_relocate): Ditto. (elfNN_aarch64_tls_relax): Ditto. (elfNN_aarch64_relocate_section): Ditto. (elfNN_aarch64_gc_sweep_hook): Ditto. (elfNN_aarch64_check_relocs): Ditto. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Ditto. (_bfd_aarch64_elf_resolve_relocation): Ditto.
2015-05-20 11:58:43 +02:00
case BFD_RELOC_AARCH64_ADR_HI21_NC_PCREL:
case BFD_RELOC_AARCH64_ADR_HI21_PCREL:
case BFD_RELOC_AARCH64_ADR_LO21_PCREL:
case BFD_RELOC_AARCH64_LD_LO19_PCREL:
[LD][AARCH64]Add group relocations to create PC-relative offset. This is a patch to add linker support for group relocations to create a 16, 32, 48, or 64 bit PC-relative offset inline. The following relocations are added along with the test cases: BFD_RELOC_AARCH64_MOVW_PREL_G0, BFD_RELOC_AARCH64_MOVW_PREL_G0_NC, BFD_RELOC_AARCH64_MOVW_PREL_G1, BFD_RELOC_AARCH64_MOVW_PREL_G1_NC, BFD_RELOC_AARCH64_MOVW_PREL_G2, BFD_RELOC_AARCH64_MOVW_PREL_G2_NC, BFD_RELOC_AARCH64_MOVW_PREL_G3. bfd/ 2018-01-24 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Add support for BFD_RELOC_AARCH64_MOVW_PREL_G0, BFD_RELOC_AARCH64_MOVW_PREL_G0_NC, BFD_RELOC_AARCH64_MOVW_PREL_G1, BFD_RELOC_AARCH64_MOVW_PREL_G1_NC, BFD_RELOC_AARCH64_MOVW_PREL_G2, BFD_RELOC_AARCH64_MOVW_PREL_G2_NC, BFD_RELOC_AARCH64_MOVW_PREL_G3. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/ 2018-01-24 Renlin Li <renlin.li@arm.com> * testsuite/ld-aarch64/aarch64-elf.exp: Run new testes. * testsuite/ld-aarch64/emit-relocs-287.s: Fix test case. * testsuite/ld-aarch64/emit-relocs-287.d: Fix expected output. * testsuite/ld-aarch64/emit-relocs-287-overflow.s: New. * testsuite/ld-aarch64/emit-relocs-287-overflow.d: New. * testsuite/ld-aarch64/emit-relocs-288.d: New. * testsuite/ld-aarch64/emit-relocs-288.s: New. * testsuite/ld-aarch64/emit-relocs-289.d: New. * testsuite/ld-aarch64/emit-relocs-289.s: New. * testsuite/ld-aarch64/emit-relocs-289-overflow.s: New. * testsuite/ld-aarch64/emit-relocs-289-overflow.d: New. * testsuite/ld-aarch64/emit-relocs-290.d: New. * testsuite/ld-aarch64/emit-relocs-290.s: New. * testsuite/ld-aarch64/emit-relocs-291.d: New. * testsuite/ld-aarch64/emit-relocs-291.s: New. * testsuite/ld-aarch64/emit-relocs-291-overflow.s: New. * testsuite/ld-aarch64/emit-relocs-291-overflow.d: New. * testsuite/ld-aarch64/emit-relocs-292.d: New. * testsuite/ld-aarch64/emit-relocs-292.s: New. * testsuite/ld-aarch64/emit-relocs-293.d: New. * testsuite/ld-aarch64/emit-relocs-293.s: New.
2018-01-18 13:17:55 +01:00
case BFD_RELOC_AARCH64_MOVW_PREL_G0:
case BFD_RELOC_AARCH64_MOVW_PREL_G0_NC:
case BFD_RELOC_AARCH64_MOVW_PREL_G1:
case BFD_RELOC_AARCH64_MOVW_PREL_G1_NC:
case BFD_RELOC_AARCH64_MOVW_PREL_G2:
case BFD_RELOC_AARCH64_MOVW_PREL_G2_NC:
case BFD_RELOC_AARCH64_MOVW_PREL_G3:
Add output_type to bfd_link_info The "shared" field in bfd_link_info is set for both DSO and and PIE. There are separate fields for executable and relocatable outputs. This patch adds an "output_type" field: enum output_type { type_unknown = 0, type_executable, type_dll, type_relocatable }; and a "pic" field to bfd_link_info to replace shared, executable and relocatable fields so that we can use the "output_type" field to check for output type and the "pic" field check if output is PIC. Macros, bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie, are provided to check for output features. bfd/ * bfd/aoutx.h: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * bfd/bout.c: Likewise. * bfd/coff-alpha.c: Likewise. * bfd/coff-arm.c: Likewise. * bfd/coff-i386.c: Likewise. * bfd/coff-i960.c: Likewise. * bfd/coff-m68k.c: Likewise. * bfd/coff-mcore.c: Likewise. * bfd/coff-mips.c: Likewise. * bfd/coff-ppc.c: Likewise. * bfd/coff-rs6000.c: Likewise. * bfd/coff-sh.c: Likewise. * bfd/coff-tic80.c: Likewise. * bfd/coff-x86_64.c: Likewise. * bfd/coff64-rs6000.c: Likewise. * bfd/coffgen.c: Likewise. * bfd/cofflink.c: Likewise. * bfd/ecoff.c: Likewise. * bfd/ecofflink.c: Likewise. * bfd/elf-bfd.h: Likewise. * bfd/elf-eh-frame.c: Likewise. * bfd/elf-ifunc.c: Likewise. * bfd/elf-m10200.c: Likewise. * bfd/elf-m10300.c: Likewise. * bfd/elf-s390-common.c: Likewise. * bfd/elf-vxworks.c: Likewise. * bfd/elf.c: Likewise. * bfd/elf32-arm.c: Likewise. * bfd/elf32-avr.c: Likewise. * bfd/elf32-bfin.c: Likewise. * bfd/elf32-cr16.c: Likewise. * bfd/elf32-cr16c.c: Likewise. * bfd/elf32-cris.c: Likewise. * bfd/elf32-crx.c: Likewise. * bfd/elf32-d10v.c: Likewise. * bfd/elf32-dlx.c: Likewise. * bfd/elf32-epiphany.c: Likewise. * bfd/elf32-fr30.c: Likewise. * bfd/elf32-frv.c: Likewise. * bfd/elf32-ft32.c: Likewise. * bfd/elf32-h8300.c: Likewise. * bfd/elf32-hppa.c: Likewise. * bfd/elf32-i370.c: Likewise. * bfd/elf32-i386.c: Likewise. * bfd/elf32-i860.c: Likewise. * bfd/elf32-ip2k.c: Likewise. * bfd/elf32-iq2000.c: Likewise. * bfd/elf32-lm32.c: Likewise. * bfd/elf32-m32c.c: Likewise. * bfd/elf32-m32r.c: Likewise. * bfd/elf32-m68hc11.c: Likewise. * bfd/elf32-m68hc1x.c: Likewise. * bfd/elf32-m68k.c: Likewise. * bfd/elf32-mcore.c: Likewise. * bfd/elf32-mep.c: Likewise. * bfd/elf32-metag.c: Likewise. * bfd/elf32-microblaze.c: Likewise. * bfd/elf32-moxie.c: Likewise. * bfd/elf32-msp430.c: Likewise. * bfd/elf32-mt.c: Likewise. * bfd/elf32-nds32.c: Likewise. * bfd/elf32-nios2.c: Likewise. * bfd/elf32-or1k.c: Likewise. * bfd/elf32-ppc.c: Likewise. * bfd/elf32-rl78.c: Likewise. * bfd/elf32-rx.c: Likewise. * bfd/elf32-s390.c: Likewise. * bfd/elf32-score.c: Likewise. * bfd/elf32-score7.c: Likewise. * bfd/elf32-sh-symbian.c: Likewise. * bfd/elf32-sh.c: Likewise. * bfd/elf32-sh64.c: Likewise. * bfd/elf32-spu.c: Likewise. * bfd/elf32-tic6x.c: Likewise. * bfd/elf32-tilepro.c: Likewise. * bfd/elf32-v850.c: Likewise. * bfd/elf32-vax.c: Likewise. * bfd/elf32-visium.c: Likewise. * bfd/elf32-xc16x.c: Likewise. * bfd/elf32-xstormy16.c: Likewise. * bfd/elf32-xtensa.c: Likewise. * bfd/elf64-alpha.c: Likewise. * bfd/elf64-hppa.c: Likewise. * bfd/elf64-ia64-vms.c: Likewise. * bfd/elf64-mmix.c: Likewise. * bfd/elf64-ppc.c: Likewise. * bfd/elf64-s390.c: Likewise. * bfd/elf64-sh64.c: Likewise. * bfd/elf64-x86-64.c: Likewise. * bfd/elflink.c: Likewise. * bfd/elfnn-aarch64.c: Likewise. * bfd/elfnn-ia64.c: Likewise. * bfd/elfxx-mips.c: Likewise. * bfd/elfxx-sparc.c: Likewise. * bfd/elfxx-tilegx.c: Likewise. * bfd/i386linux.c: Likewise. * bfd/linker.c: Likewise. * bfd/m68klinux.c: Likewise. * bfd/pdp11.c: Likewise. * bfd/pe-mips.c: Likewise. * bfd/peXXigen.c: Likewise. * bfd/reloc.c: Likewise. * bfd/reloc16.c: Likewise. * bfd/sparclinux.c: Likewise. * bfd/sunos.c: Likewise. * bfd/vms-alpha.c: Likewise. * bfd/xcofflink.c: Likewise. include/ * include/bfdlink.h (output_type): New enum. (bfd_link_executable): New macro. (bfd_link_dll): Likewise. (bfd_link_relocatable): Likewise. (bfd_link_pic): Likewise. (bfd_link_pie): Likewise. (bfd_link_info): Remove shared, executable, pie and relocatable. Add output_type and pic. ld/ * ld/ldctor.c: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * ld/ldemul.c: Likewise. * ld/ldfile.c: Likewise. * ld/ldlang.c: Likewise. * ld/ldmain.c: Likewise. * ld/ldwrite.c: Likewise. * ld/lexsup.c: Likewise. * ld/pe-dll.c: Likewise. * ld/plugin.c: Likewise. * ld/emultempl/aarch64elf.em: Likewise. * ld/emultempl/aix.em: Likewise. * ld/emultempl/alphaelf.em: Likewise. * ld/emultempl/armcoff.em: Likewise. * ld/emultempl/armelf.em: Likewise. * ld/emultempl/avrelf.em: Likewise. * ld/emultempl/beos.em: Likewise. * ld/emultempl/cr16elf.em: Likewise. * ld/emultempl/elf-generic.em: Likewise. * ld/emultempl/elf32.em: Likewise. * ld/emultempl/genelf.em: Likewise. * ld/emultempl/generic.em: Likewise. * ld/emultempl/gld960.em: Likewise. * ld/emultempl/gld960c.em: Likewise. * ld/emultempl/hppaelf.em: Likewise. * ld/emultempl/irix.em: Likewise. * ld/emultempl/linux.em: Likewise. * ld/emultempl/lnk960.em: Likewise. * ld/emultempl/m68hc1xelf.em: Likewise. * ld/emultempl/m68kcoff.em: Likewise. * ld/emultempl/m68kelf.em: Likewise. * ld/emultempl/metagelf.em: Likewise. * ld/emultempl/mipself.em: Likewise. * ld/emultempl/mmo.em: Likewise. * ld/emultempl/msp430.em: Likewise. * ld/emultempl/nds32elf.em: Likewise. * ld/emultempl/needrelax.em: Likewise. * ld/emultempl/nios2elf.em: Likewise. * ld/emultempl/pe.em: Likewise. * ld/emultempl/pep.em: Likewise. * ld/emultempl/ppc32elf.em: Likewise. * ld/emultempl/ppc64elf.em: Likewise. * ld/emultempl/sh64elf.em: Likewise. * ld/emultempl/solaris2.em: Likewise. * ld/emultempl/spuelf.em: Likewise. * ld/emultempl/sunos.em: Likewise. * ld/emultempl/tic6xdsbt.em: Likewise. * ld/emultempl/ticoff.em: Likewise. * ld/emultempl/v850elf.em: Likewise. * ld/emultempl/vms.em: Likewise. * ld/emultempl/vxworks.em: Likewise.
2015-08-18 14:51:03 +02:00
if (bfd_link_pic (info)
[AArch64] Improve PC-relative relocation check for shared library 2015-04-24 Jiong. Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Reject PC-relative relocation for external symbol. ld/testsuite/ * ld-aarch64/pcrel.s: New testcase. * ld-aarch64/pcrel_pic_defiend_local.d: New expect file. * ld-aarch64/pcrel_pic_undefined.d: Ditto. * ld-aarch64/aarch64-elf.exp: Run them.
2015-04-24 23:35:04 +02:00
&& (input_section->flags & SEC_ALLOC) != 0
&& (input_section->flags & SEC_READONLY) != 0
[AArch64] Use SYMBOL_REFERENCES_LOCAL in one symbol check For some pc-relative relocations we want to allow them under PIC mode while a normal global symbol defined in the same dynamic object can still bind externally through copy relocation. So, we should not allow pc-relative relocation against such symbol. SYMBOL_REFERENCES_LOCAL should be used and is more accurate than the original individual checks. bfd/ * elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Use SYMBOL_REFERENCES_LOCAL. ld/ * testsuite/ld-aarch64/aarch64-elf.exp: Update test name * testsuite/ld-aarch64/pcrel.s: Add new testcases. * testsuite/ld-aarch64/pcrel_pic_undefined.d: Update the expected warnings. * testsuite/ld-aarch64/pcrel_pic_defined_local.d: Rename ... * testsuite/ld-aarch64/pcrel_pic_defined.d: ... to this. Update expected warnings.
2017-06-16 15:20:38 +02:00
&& !SYMBOL_REFERENCES_LOCAL (info, h))
[AArch64] Improve PC-relative relocation check for shared library 2015-04-24 Jiong. Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Reject PC-relative relocation for external symbol. ld/testsuite/ * ld-aarch64/pcrel.s: New testcase. * ld-aarch64/pcrel_pic_defiend_local.d: New expect file. * ld-aarch64/pcrel_pic_undefined.d: Ditto. * ld-aarch64/aarch64-elf.exp: Run them.
2015-04-24 23:35:04 +02:00
{
int howto_index = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
Remove syntactic sugar Now that _bfd_error_handler is not a function pointer. * aout-adobe.c: Replace (*_bfd_error_handler) (...) with _bfd_error_handler (...) throughout. * aout-cris.c, * aoutx.h, * archive.c, * bfd.c, * binary.c, * cache.c, * coff-alpha.c, * coff-arm.c, * coff-h8300.c, * coff-i860.c, * coff-mcore.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * cpu-arm.c, * cpu-m68k.c, * cpu-sh.c, * dwarf2.c, * ecoff.c, * elf-eh-frame.c, * elf-m10300.c, * elf.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c, * elf32-cris.c, * elf32-crx.c, * elf32-dlx.c, * elf32-frv.c, * elf32-hppa.c, * elf32-i370.c, * elf32-i386.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc1x.c, * elf32-m68k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-nds32.c, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-rl78.c, * elf32-s390.c, * elf32-score.c, * elf32-score7.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilepro.c, * elf32-v850.c, * elf32-vax.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-x86-64.c, * elfcode.h, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfxx-mips.c, * elfxx-sparc.c, * elfxx-tilegx.c, * hpux-core.c, * i386linux.c, * ieee.c, * ihex.c, * libbfd.c, * linker.c, * m68klinux.c, * mach-o.c, * merge.c, * mmo.c, * oasys.c, * osf-core.c, * pdp11.c, * pe-mips.c, * peXXigen.c, * pef.c, * plugin.c, * reloc.c, * rs6000-core.c, * sco5-core.c, * som.c, * sparclinux.c, * srec.c, * stabs.c, * syms.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * xcofflink.c: Likewise.
2016-09-30 05:30:18 +02:00
_bfd_error_handler
Add c-format tags to translatable strings with more than one argument-using formatting token. * aout-adobe.c: Add missing c-format tags for translatable strings. * aout-cris.c: Likewise. * aoutx.h: Likewise. * bfd.c: Likewise. * binary.c: Likewise. * cache.c: Likewise. * coff-alpha.c: Likewise. * coff-arm.c: Likewise. * coff-i860.c: Likewise. * coff-mcore.c: Likewise. * coff-ppc.c: Likewise. * coff-rs6000.c: Likewise. * coff-sh.c: Likewise. * coff-tic4x.c: Likewise. * coff-tic54x.c: Likewise. * coff-tic80.c: Likewise. * coff64-rs6000.c: Likewise. * coffcode.h: Likewise. * coffgen.c: Likewise. * cofflink.c: Likewise. * coffswap.h: Likewise. * cpu-arm.c: Likewise. * dwarf2.c: Likewise. * ecoff.c: Likewise. * elf-attrs.c: Likewise. * elf-eh-frame.c: Likewise. * elf-ifunc.c: Likewise. * elf-m10300.c: Likewise. * elf-s390-common.c: Likewise. * elf.c: Likewise. * elf32-arc.c: Likewise. * elf32-arm.c: Likewise. * elf32-avr.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-d10v.c: Likewise. * elf32-d30v.c: Likewise. * elf32-epiphany.c: Likewise. * elf32-fr30.c: Likewise. * elf32-frv.c: Likewise. * elf32-gen.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i370.c: Likewise. * elf32-i386.c: Likewise. * elf32-i960.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-lm32.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m32r.c: Likewise. * elf32-m68hc11.c: Likewise. * elf32-m68hc12.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mcore.c: Likewise. * elf32-mep.c: Likewise. * elf32-metag.c: Likewise. * elf32-microblaze.c: Likewise. * elf32-moxie.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-nds32.c: Likewise. * elf32-nios2.c: Likewise. * elf32-or1k.c: Likewise. * elf32-pj.c: Likewise. * elf32-ppc.c: Likewise. * elf32-rl78.c: Likewise. * elf32-rx.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-sh-symbian.c: Likewise. * elf32-sh.c: Likewise. * elf32-sh64.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-tilepro.c: Likewise. * elf32-v850.c: Likewise. * elf32-vax.c: Likewise. * elf32-visium.c: Likewise. * elf32-xgate.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-gen.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-mmix.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-sh64.c: Likewise. * elf64-sparc.c: Likewise. * elf64-x86-64.c: Likewise. * elfcode.h: Likewise. * elfcore.h: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * ieee.c: Likewise. * ihex.c: Likewise. * libbfd.c: Likewise. * linker.c: Likewise. * m68klinux.c: Likewise. * mach-o.c: Likewise. * merge.c: Likewise. * mmo.c: Likewise. * oasys.c: Likewise. * pdp11.c: Likewise. * pe-mips.c: Likewise. * peXXigen.c: Likewise. * pei-x86_64.c: Likewise. * peicode.h: Likewise. * ppcboot.c: Likewise. * reloc.c: Likewise. * sparclinux.c: Likewise. * srec.c: Likewise. * stabs.c: Likewise. * vms-alpha.c: Likewise. * vms-lib.c: Likewise. * xcofflink.c: Likewise.
2016-10-19 15:04:34 +02:00
/* xgettext:c-format */
Use %pA and %pB in messages rather than %A and %B First step towards compiler verification of _bfd_error_handler arguments, and better verification of translated messages. bfd/ * bfd.c (_bfd_doprnt, _bfd_doprnt_scan): Handle %pA and %pB in place of %A and %B. * aout-adobe.c: Update all messages using %A and %B. * aout-cris.c: Likewise. * aoutx.h: Likewise. * archive.c: Likewise. * binary.c: Likewise. * cache.c: Likewise. * coff-alpha.c: Likewise. * coff-arm.c: Likewise. * coff-i860.c: Likewise. * coff-mcore.c: Likewise. * coff-ppc.c: Likewise. * coff-rs6000.c: Likewise. * coff-sh.c: Likewise. * coff-tic4x.c: Likewise. * coff-tic54x.c: Likewise. * coff-tic80.c: Likewise. * coff64-rs6000.c: Likewise. * coffcode.h: Likewise. * coffgen.c: Likewise. * cofflink.c: Likewise. * coffswap.h: Likewise. * compress.c: Likewise. * cpu-arm.c: Likewise. * ecoff.c: Likewise. * elf-attrs.c: Likewise. * elf-eh-frame.c: Likewise. * elf-ifunc.c: Likewise. * elf-m10300.c: Likewise. * elf-properties.c: Likewise. * elf-s390-common.c: Likewise. * elf.c: Likewise. * elf32-arc.c: Likewise. * elf32-arm.c: Likewise. * elf32-avr.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-d10v.c: Likewise. * elf32-d30v.c: Likewise. * elf32-epiphany.c: Likewise. * elf32-fr30.c: Likewise. * elf32-frv.c: Likewise. * elf32-gen.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i370.c: Likewise. * elf32-i386.c: Likewise. * elf32-i960.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-lm32.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m32r.c: Likewise. * elf32-m68hc11.c: Likewise. * elf32-m68hc12.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mcore.c: Likewise. * elf32-mep.c: Likewise. * elf32-metag.c: Likewise. * elf32-microblaze.c: Likewise. * elf32-moxie.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-nds32.c: Likewise. * elf32-nios2.c: Likewise. * elf32-or1k.c: Likewise. * elf32-pj.c: Likewise. * elf32-ppc.c: Likewise. * elf32-rl78.c: Likewise. * elf32-rx.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-sh-symbian.c: Likewise. * elf32-sh.c: Likewise. * elf32-sh64.c: Likewise. * elf32-sparc.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-tilepro.c: Likewise. * elf32-v850.c: Likewise. * elf32-vax.c: Likewise. * elf32-visium.c: Likewise. * elf32-wasm32.c: Likewise. * elf32-xgate.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-gen.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-mmix.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-sh64.c: Likewise. * elf64-sparc.c: Likewise. * elf64-x86-64.c: Likewise. * elfcode.h: Likewise. * elfcore.h: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * elfnn-riscv.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * elfxx-x86.c: Likewise. * hpux-core.c: Likewise. * ieee.c: Likewise. * ihex.c: Likewise. * libbfd.c: Likewise. * linker.c: Likewise. * mach-o.c: Likewise. * merge.c: Likewise. * mmo.c: Likewise. * oasys.c: Likewise. * pdp11.c: Likewise. * pe-mips.c: Likewise. * peXXigen.c: Likewise. * peicode.h: Likewise. * reloc.c: Likewise. * rs6000-core.c: Likewise. * srec.c: Likewise. * stabs.c: Likewise. * vms-alpha.c: Likewise. * xcofflink.c: Likewise. ld/ * ldmisc.c (vfinfo): Handle %pA and %pB in place of %A and %B. * ldcref.c: Update all messages using %A and %B. * ldexp.c: Likewise. * ldlang.c: Likewise. * ldmain.c: Likewise. * ldmisc.c: Likewise. * pe-dll.c: Likewise. * plugin.c: Likewise. * emultempl/beos.em: Likewise. * emultempl/cr16elf.em: Likewise. * emultempl/elf32.em: Likewise. * emultempl/m68kcoff.em: Likewise. * emultempl/m68kelf.em: Likewise. * emultempl/mmo.em: Likewise. * emultempl/nds32elf.em: Likewise. * emultempl/pe.em: Likewise. * emultempl/pep.em: Likewise. * emultempl/spuelf.em: Likewise. * emultempl/sunos.em: Likewise. * emultempl/xtensaelf.em: Likewise.
2018-02-19 05:51:40 +01:00
(_("%pB: relocation %s against symbol `%s' which may bind "
[AArch64] Use SYMBOL_REFERENCES_LOCAL in one symbol check For some pc-relative relocations we want to allow them under PIC mode while a normal global symbol defined in the same dynamic object can still bind externally through copy relocation. So, we should not allow pc-relative relocation against such symbol. SYMBOL_REFERENCES_LOCAL should be used and is more accurate than the original individual checks. bfd/ * elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Use SYMBOL_REFERENCES_LOCAL. ld/ * testsuite/ld-aarch64/aarch64-elf.exp: Update test name * testsuite/ld-aarch64/pcrel.s: Add new testcases. * testsuite/ld-aarch64/pcrel_pic_undefined.d: Update the expected warnings. * testsuite/ld-aarch64/pcrel_pic_defined_local.d: Rename ... * testsuite/ld-aarch64/pcrel_pic_defined.d: ... to this. Update expected warnings.
2017-06-16 15:20:38 +02:00
"externally can not be used when making a shared object; "
"recompile with -fPIC"),
[AArch64] Improve PC-relative relocation check for shared library 2015-04-24 Jiong. Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Reject PC-relative relocation for external symbol. ld/testsuite/ * ld-aarch64/pcrel.s: New testcase. * ld-aarch64/pcrel_pic_defiend_local.d: New expect file. * ld-aarch64/pcrel_pic_undefined.d: Ditto. * ld-aarch64/aarch64-elf.exp: Run them.
2015-04-24 23:35:04 +02:00
input_bfd, elfNN_aarch64_howto_table[howto_index].name,
h->root.root.string);
bfd_set_error (bfd_error_bad_value);
Force the AArch64 linker backend to refuse to link when it encounters unresoleable relocations. * reloc.c (enum bfd_reloc_status): Start values at 2. * bfd-in2.h: Regenerate. * elfnn-aarch64.c (aarch64_relocate): Invert sense of function, so that a TRUE return indicates success. Compare the result of calling _bfd_aarch64_elf_put_addend against bfd_reloc_ok. (build_one_stub): Change sense of tests against aarch64_relocate return value. (elfNN_aarch64_tls_relax): Return bfd_reloc_notsupported, rather than FALSE, when an error is detected. (elfNN_aarch64_final_link_relocate): Likewise. * testsuite/ld-aarch64/pcrel_pic_defined.d: Expect errors not warnings. Expect errors about unsupported relocations. * testsuite/ld-aarch64/pcrel_pic_undefined.d: Likewise.
2017-10-12 14:38:20 +02:00
return bfd_reloc_notsupported;
[AArch64] Improve PC-relative relocation check for shared library 2015-04-24 Jiong. Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Reject PC-relative relocation for external symbol. ld/testsuite/ * ld-aarch64/pcrel.s: New testcase. * ld-aarch64/pcrel_pic_defiend_local.d: New expect file. * ld-aarch64/pcrel_pic_undefined.d: Ditto. * ld-aarch64/aarch64-elf.exp: Run them.
2015-04-24 23:35:04 +02:00
}
-Wimplicit-fallthrough warning fixes Comment changes. bfd/ * coff-h8300.c: Spell fall through comments consistently. * coffgen.c: Likewise. * elf32-hppa.c: Likewise. * elf32-ppc.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf64-ppc.c: Likewise. * elfxx-aarch64.c: Likewise. * elfxx-mips.c: Likewise. * cpu-ns32k.c: Add missing fall through comments. * elf-m10300.c: Likewise. * elf32-arm.c: Likewise. * elf32-avr.c: Likewise. * elf32-bfin.c: Likewise. * elf32-frv.c: Likewise. * elf32-i386.c: Likewise. * elf32-microblaze.c: Likewise. * elf32-nds32.c: Likewise. * elf32-ppc.c: Likewise. * elf32-rl78.c: Likewise. * elf32-rx.c: Likewise. * elf32-s390.c: Likewise. * elf32-sh.c: Likewise. * elf32-tic6x.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-x86-64.c: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * ieee.c: Likewise. * oasys.c: Likewise. * pdp11.c: Likewise. * srec.c: Likewise. * versados.c: Likewise. opcodes/ * aarch64-opc.c: Spell fall through comments consistently. * i386-dis.c: Likewise. * aarch64-dis.c: Add missing fall through comments. * aarch64-opc.c: Likewise. * arc-dis.c: Likewise. * arm-dis.c: Likewise. * i386-dis.c: Likewise. * m68k-dis.c: Likewise. * mep-asm.c: Likewise. * ns32k-dis.c: Likewise. * sh-dis.c: Likewise. * tic4x-dis.c: Likewise. * tic6x-dis.c: Likewise. * vax-dis.c: Likewise. binutils/ * dlltool.c: Spell fall through comments consistently. * objcopy.c: Likewise. * readelf.c: Likewise. * dwarf.c: Add missing fall through comments. * elfcomm.c: Likewise. * sysinfo.y: Likewise. * readelf.c: Likewise. Also remove extraneous comments. gas/ * app.c: Add missing fall through comments. * dw2gencfi.c: Likewise. * expr.c: Likewise. * config/tc-alpha.c: Likewise. * config/tc-arc.c: Likewise. * config/tc-arm.c: Likewise. * config/tc-cr16.c: Likewise. * config/tc-crx.c: Likewise. * config/tc-dlx.c: Likewise. * config/tc-h8300.c: Likewise. * config/tc-hppa.c: Likewise. * config/tc-i370.c: Likewise. * config/tc-i386.c: Likewise. * config/tc-i960.c: Likewise. * config/tc-ia64.c: Likewise. * config/tc-m68hc11.c: Likewise. * config/tc-m68k.c: Likewise. * config/tc-mep.c: Likewise. * config/tc-metag.c: Likewise. * config/tc-microblaze.c: Likewise. * config/tc-mips.c: Likewise. * config/tc-ns32k.c: Likewise. * config/tc-rx.c: Likewise. * config/tc-score.c: Likewise. * config/tc-score7.c: Likewise. * config/tc-sh.c: Likewise. * config/tc-tic4x.c: Likewise. * config/tc-vax.c: Likewise. * config/tc-xstormy16.c: Likewise. * config/tc-z80.c: Likewise. * config/tc-z8k.c: Likewise. * config/obj-elf.c: Likewise. * config/tc-i386.c: Likewise. * depend.c: Spell fall through comments consistently. * config/tc-arm.c: Likewise. * config/tc-d10v.c: Likewise. * config/tc-i960.c: Likewise. * config/tc-ia64.c: Likewise. * config/tc-m68k.c: Likewise. * config/tc-mcore.c: Likewise. * config/tc-mep.c: Likewise. * config/tc-ns32k.c: Likewise. * config/tc-visium.c: Likewise. * config/tc-xstormy16.c: Likewise. * config/tc-z8k.c: Likewise. gprof/ * gprof.c: Add missing fall through comments. ld/ * lexsup.c: Spell fall through comments consistently and add missing fall through comments.
2016-10-05 09:47:02 +02:00
/* Fall through. */
[AArch64] Improve PC-relative relocation check for shared library 2015-04-24 Jiong. Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Reject PC-relative relocation for external symbol. ld/testsuite/ * ld-aarch64/pcrel.s: New testcase. * ld-aarch64/pcrel_pic_defiend_local.d: New expect file. * ld-aarch64/pcrel_pic_undefined.d: Ditto. * ld-aarch64/aarch64-elf.exp: Run them.
2015-04-24 23:35:04 +02:00
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
case BFD_RELOC_AARCH64_16:
Revert "ABS32" This reverts commit 30bdf5c82e5734ac9f0b18eb7af631806d419270.
2016-02-24 15:51:12 +01:00
#if ARCH_SIZE == 64
case BFD_RELOC_AARCH64_32:
#endif
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
case BFD_RELOC_AARCH64_ADD_LO12:
[AArch64/BFD] Sort relocation case labels alphabetically 2015-05-19 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_tls_transition_without_check): Sort relocation case labels alphabetically. (elfNN_aarch64_final_link_relocate): Ditto. (elfNN_aarch64_tls_relax): Ditto. (elfNN_aarch64_relocate_section): Ditto. (elfNN_aarch64_gc_sweep_hook): Ditto. (elfNN_aarch64_check_relocs): Ditto. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Ditto. (_bfd_aarch64_elf_resolve_relocation): Ditto.
2015-05-20 11:58:43 +02:00
case BFD_RELOC_AARCH64_LDST128_LO12:
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
case BFD_RELOC_AARCH64_LDST16_LO12:
case BFD_RELOC_AARCH64_LDST32_LO12:
case BFD_RELOC_AARCH64_LDST64_LO12:
[AArch64/BFD] Sort relocation case labels alphabetically 2015-05-19 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_tls_transition_without_check): Sort relocation case labels alphabetically. (elfNN_aarch64_final_link_relocate): Ditto. (elfNN_aarch64_tls_relax): Ditto. (elfNN_aarch64_relocate_section): Ditto. (elfNN_aarch64_gc_sweep_hook): Ditto. (elfNN_aarch64_check_relocs): Ditto. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Ditto. (_bfd_aarch64_elf_resolve_relocation): Ditto.
2015-05-20 11:58:43 +02:00
case BFD_RELOC_AARCH64_LDST8_LO12:
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
case BFD_RELOC_AARCH64_MOVW_G0:
case BFD_RELOC_AARCH64_MOVW_G0_NC:
[AArch64/BFD] Sort relocation case labels alphabetically 2015-05-19 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_tls_transition_without_check): Sort relocation case labels alphabetically. (elfNN_aarch64_final_link_relocate): Ditto. (elfNN_aarch64_tls_relax): Ditto. (elfNN_aarch64_relocate_section): Ditto. (elfNN_aarch64_gc_sweep_hook): Ditto. (elfNN_aarch64_check_relocs): Ditto. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Ditto. (_bfd_aarch64_elf_resolve_relocation): Ditto.
2015-05-20 11:58:43 +02:00
case BFD_RELOC_AARCH64_MOVW_G0_S:
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
case BFD_RELOC_AARCH64_MOVW_G1:
case BFD_RELOC_AARCH64_MOVW_G1_NC:
[AArch64/BFD] Sort relocation case labels alphabetically 2015-05-19 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_tls_transition_without_check): Sort relocation case labels alphabetically. (elfNN_aarch64_final_link_relocate): Ditto. (elfNN_aarch64_tls_relax): Ditto. (elfNN_aarch64_relocate_section): Ditto. (elfNN_aarch64_gc_sweep_hook): Ditto. (elfNN_aarch64_check_relocs): Ditto. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Ditto. (_bfd_aarch64_elf_resolve_relocation): Ditto.
2015-05-20 11:58:43 +02:00
case BFD_RELOC_AARCH64_MOVW_G1_S:
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
case BFD_RELOC_AARCH64_MOVW_G2:
case BFD_RELOC_AARCH64_MOVW_G2_NC:
[AArch64/BFD] Sort relocation case labels alphabetically 2015-05-19 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_tls_transition_without_check): Sort relocation case labels alphabetically. (elfNN_aarch64_final_link_relocate): Ditto. (elfNN_aarch64_tls_relax): Ditto. (elfNN_aarch64_relocate_section): Ditto. (elfNN_aarch64_gc_sweep_hook): Ditto. (elfNN_aarch64_check_relocs): Ditto. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Ditto. (_bfd_aarch64_elf_resolve_relocation): Ditto.
2015-05-20 11:58:43 +02:00
case BFD_RELOC_AARCH64_MOVW_G2_S:
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
case BFD_RELOC_AARCH64_MOVW_G3:
AArch64: Fix LD crash on weak and undefined TLS symbols. (PR/24602). This patch fixes a few linker crashes due to TLS code reaching an assert when it shouldn't. The first scenario is with weak TLS symbols that remain weak during linking. In this case the mid-end would not have seen a TLS symbol and so wouldn't have allocated the TLS section. We currently assert here and the linker crashes with a not very useful message. This patch changes this to return the value 0 for the TLS symbol in question emulating what lld and gold and other BFD targets do. However because weak TLS is implementation defined and we don't define any behavior for it I also emit a warning to the user to inform them of such. Secondly when a strong TLS reference is undefined. The linker crashes even after it correctly reported that there is an undefined reference. This changes it so that it gracefully exits and reports a useful error. bfd/ChangeLog: PR ld/24601 * elfnn-aarch64.c (aarch64_relocate): Handle weak TLS and undefined TLS. Also Pass input_bfd to _bfd_aarch64_elf_resolve_relocation. * elfxx-aarch64.c (_bfd_aarch64_elf_resolve_relocation): Use it. * elfxx-aarch64.h (_bfd_aarch64_elf_resolve_relocation): Emit warning for weak TLS. ld/ChangeLog: PR ld/24601 * testsuite/ld-aarch64/aarch64-elf.exp (undef-tls, weak-tls): New. * testsuite/ld-aarch64/undef-tls.d: New test. * testsuite/ld-aarch64/undef-tls.s: New test. * testsuite/ld-aarch64/weak-tls.d: New test. * testsuite/ld-aarch64/weak-tls.s: New test.
2019-08-22 12:35:35 +02:00
value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
place, value,
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
signed_addend, weak_undef_p);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
break;
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
case BFD_RELOC_AARCH64_ADR_GOT_PAGE:
case BFD_RELOC_AARCH64_GOT_LD_PREL19:
[AArch64] BFD support BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14 This patch add BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14 relocation supoprt in bfd linker. 2015-06-01 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_reloc_got_type): Support BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14. (elfNN_aarch64_final_link_relocate): Ditto. (elfNN_aarch64_gc_swap_hook): Ditto. (elfNN_aarch64_check_relocs): Ditto. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Ditto. ld/testsuite/ * ld-aarch64/emit-relocs-28.s: New test file. * ld-aarch64/emit-relocs-28.d: Ditto. * ld-aarch64/aarch64-elf.exp: Run new test.
2015-06-01 16:45:25 +02:00
case BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14:
[AArch64/BFD] Sort relocation case labels alphabetically 2015-05-19 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_tls_transition_without_check): Sort relocation case labels alphabetically. (elfNN_aarch64_final_link_relocate): Ditto. (elfNN_aarch64_tls_relax): Ditto. (elfNN_aarch64_relocate_section): Ditto. (elfNN_aarch64_gc_sweep_hook): Ditto. (elfNN_aarch64_check_relocs): Ditto. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Ditto. (_bfd_aarch64_elf_resolve_relocation): Ditto.
2015-05-20 11:58:43 +02:00
case BFD_RELOC_AARCH64_LD32_GOT_LO12_NC:
[AArch64] BFD Support BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15 2015-06-01 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_reloc_got_type): Support BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15. (elfNN_aarch64_final_link_relocate): Ditto. (elfNN_aarch64_gc_swap_hook): Ditto. (elfNN_aarch64_check_relocs): Ditto. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Ditto. ld/testsuite/ * ld-aarch64/emit-relocs-313.s: New test file. * ld-aarch64/emit-relocs-313.d: Ditto. * ld-aarch64/aarch64-elf.exp: Run new test.
2015-06-01 11:26:00 +02:00
case BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15:
[AArch64/BFD] Sort relocation case labels alphabetically 2015-05-19 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_tls_transition_without_check): Sort relocation case labels alphabetically. (elfNN_aarch64_final_link_relocate): Ditto. (elfNN_aarch64_tls_relax): Ditto. (elfNN_aarch64_relocate_section): Ditto. (elfNN_aarch64_gc_sweep_hook): Ditto. (elfNN_aarch64_check_relocs): Ditto. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Ditto. (_bfd_aarch64_elf_resolve_relocation): Ditto.
2015-05-20 11:58:43 +02:00
case BFD_RELOC_AARCH64_LD64_GOT_LO12_NC:
[AArch64] Remove duplicated code when handling some GOT relocations types There are quite a few duplicated code supporting several GP based relocation types. They are: BFD_RELOC_AARCH64_LD64_GOTOFF_LO15 BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC BFD_RELOC_AARCH64_MOVW_GOTOFF_G1 These relocation types are supposed to be used for large memory model PIC/pic mode under which we will have an initialized GP register points to the base of GOT table, then these relocations are supposed to put the distance between GOT entry and GOT table base address into the related instructions. So, the parameters required to calculate the relocation should be the same as BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15 etc, all of them are require the GOT entry address and GOT table base address to perform the relocation. This patch has removed those duplicated code when handling above listed relocation types, grouped them with others as relocation types that are require GOT table base address during performing relocation, reused the existed GOT handling code. The relocation calculation for these types before and after this patch should be identical. bfd/ * elfnn-aarch64.c (aarch64_relocation_aginst_gp_p): New function. (elfNN_aarch64_final_link_relocate): Delete duplicated code for BFD_RELOC_AARCH64_LD64_GOTOFF_LO15, BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC, BFD_RELOC_AARCH64_MOVW_GOTOFF_G1. * elfxx-aarch64.c (_bfd_aarch64_elf_resolve_relocation): Optimize the support for them.
2017-06-29 12:45:24 +02:00
case BFD_RELOC_AARCH64_LD64_GOTOFF_LO15:
case BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC:
case BFD_RELOC_AARCH64_MOVW_GOTOFF_G1:
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
if (globals->root.sgot == NULL)
BFD_ASSERT (h != NULL);
[AArch64] Only override the symbol dynamic decision on undefined weak symbol This fix is an adaption of the x86-64 PR ld/21402 fix to AArch64. After the generic code deciding one symbol is not dynamic, AArch64 backend only overrides the decision on undefined weak symbols. bfd/ PR ld/21402 * elfnn-aarch64.c (elfNN_aarch64_allocate_dynrelocs): Only make undefined weak symbols into dynamic. (elfNN_aarch64_final_link_relocate): Generate runtime RELATIVE relocation for non-dynamic symbols. (elfNN_aarch64_finish_dynamic_symbol): Add sanity check.
2017-06-29 12:47:43 +02:00
relative_reloc = FALSE;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
if (h != NULL)
{
[AArch64] BFD Support BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15 2015-06-01 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_reloc_got_type): Support BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15. (elfNN_aarch64_final_link_relocate): Ditto. (elfNN_aarch64_gc_swap_hook): Ditto. (elfNN_aarch64_check_relocs): Ditto. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Ditto. ld/testsuite/ * ld-aarch64/emit-relocs-313.s: New test file. * ld-aarch64/emit-relocs-313.d: Ditto. * ld-aarch64/aarch64-elf.exp: Run new test.
2015-06-01 11:26:00 +02:00
bfd_vma addend = 0;
[AArch64] Only override the symbol dynamic decision on undefined weak symbol This fix is an adaption of the x86-64 PR ld/21402 fix to AArch64. After the generic code deciding one symbol is not dynamic, AArch64 backend only overrides the decision on undefined weak symbols. bfd/ PR ld/21402 * elfnn-aarch64.c (elfNN_aarch64_allocate_dynrelocs): Only make undefined weak symbols into dynamic. (elfNN_aarch64_final_link_relocate): Generate runtime RELATIVE relocation for non-dynamic symbols. (elfNN_aarch64_finish_dynamic_symbol): Add sanity check.
2017-06-29 12:47:43 +02:00
/* If a symbol is not dynamic and is not undefined weak, bind it
locally and generate a RELATIVE relocation under PIC mode.
NOTE: one symbol may be referenced by several relocations, we
should only generate one RELATIVE relocation for that symbol.
Therefore, check GOT offset mark first. */
if (h->dynindx == -1
&& !h->forced_local
&& h->root.type != bfd_link_hash_undefweak
&& bfd_link_pic (info)
&& !symbol_got_offset_mark_p (input_bfd, h, r_symndx))
relative_reloc = TRUE;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
value = aarch64_calculate_got_entry_vma (h, globals, info, value,
output_bfd,
unresolved_reloc_p);
[AArch64] Only override the symbol dynamic decision on undefined weak symbol This fix is an adaption of the x86-64 PR ld/21402 fix to AArch64. After the generic code deciding one symbol is not dynamic, AArch64 backend only overrides the decision on undefined weak symbols. bfd/ PR ld/21402 * elfnn-aarch64.c (elfNN_aarch64_allocate_dynrelocs): Only make undefined weak symbols into dynamic. (elfNN_aarch64_final_link_relocate): Generate runtime RELATIVE relocation for non-dynamic symbols. (elfNN_aarch64_finish_dynamic_symbol): Add sanity check.
2017-06-29 12:47:43 +02:00
/* Record the GOT entry address which will be used when generating
RELATIVE relocation. */
if (relative_reloc)
got_entry_addr = value;
[AArch64] Remove duplicated code when handling some GOT relocations types There are quite a few duplicated code supporting several GP based relocation types. They are: BFD_RELOC_AARCH64_LD64_GOTOFF_LO15 BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC BFD_RELOC_AARCH64_MOVW_GOTOFF_G1 These relocation types are supposed to be used for large memory model PIC/pic mode under which we will have an initialized GP register points to the base of GOT table, then these relocations are supposed to put the distance between GOT entry and GOT table base address into the related instructions. So, the parameters required to calculate the relocation should be the same as BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15 etc, all of them are require the GOT entry address and GOT table base address to perform the relocation. This patch has removed those duplicated code when handling above listed relocation types, grouped them with others as relocation types that are require GOT table base address during performing relocation, reused the existed GOT handling code. The relocation calculation for these types before and after this patch should be identical. bfd/ * elfnn-aarch64.c (aarch64_relocation_aginst_gp_p): New function. (elfNN_aarch64_final_link_relocate): Delete duplicated code for BFD_RELOC_AARCH64_LD64_GOTOFF_LO15, BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC, BFD_RELOC_AARCH64_MOVW_GOTOFF_G1. * elfxx-aarch64.c (_bfd_aarch64_elf_resolve_relocation): Optimize the support for them.
2017-06-29 12:45:24 +02:00
if (aarch64_relocation_aginst_gp_p (bfd_r_type))
[AArch64] BFD Support BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15 2015-06-01 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_reloc_got_type): Support BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15. (elfNN_aarch64_final_link_relocate): Ditto. (elfNN_aarch64_gc_swap_hook): Ditto. (elfNN_aarch64_check_relocs): Ditto. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Ditto. ld/testsuite/ * ld-aarch64/emit-relocs-313.s: New test file. * ld-aarch64/emit-relocs-313.d: Ditto. * ld-aarch64/aarch64-elf.exp: Run new test.
2015-06-01 11:26:00 +02:00
addend = (globals->root.sgot->output_section->vma
+ globals->root.sgot->output_offset);
AArch64: Fix LD crash on weak and undefined TLS symbols. (PR/24602). This patch fixes a few linker crashes due to TLS code reaching an assert when it shouldn't. The first scenario is with weak TLS symbols that remain weak during linking. In this case the mid-end would not have seen a TLS symbol and so wouldn't have allocated the TLS section. We currently assert here and the linker crashes with a not very useful message. This patch changes this to return the value 0 for the TLS symbol in question emulating what lld and gold and other BFD targets do. However because weak TLS is implementation defined and we don't define any behavior for it I also emit a warning to the user to inform them of such. Secondly when a strong TLS reference is undefined. The linker crashes even after it correctly reported that there is an undefined reference. This changes it so that it gracefully exits and reports a useful error. bfd/ChangeLog: PR ld/24601 * elfnn-aarch64.c (aarch64_relocate): Handle weak TLS and undefined TLS. Also Pass input_bfd to _bfd_aarch64_elf_resolve_relocation. * elfxx-aarch64.c (_bfd_aarch64_elf_resolve_relocation): Use it. * elfxx-aarch64.h (_bfd_aarch64_elf_resolve_relocation): Emit warning for weak TLS. ld/ChangeLog: PR ld/24601 * testsuite/ld-aarch64/aarch64-elf.exp (undef-tls, weak-tls): New. * testsuite/ld-aarch64/undef-tls.d: New test. * testsuite/ld-aarch64/undef-tls.s: New test. * testsuite/ld-aarch64/weak-tls.d: New test. * testsuite/ld-aarch64/weak-tls.s: New test.
2019-08-22 12:35:35 +02:00
value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
place, value,
[AArch64] BFD Support BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15 2015-06-01 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_reloc_got_type): Support BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15. (elfNN_aarch64_final_link_relocate): Ditto. (elfNN_aarch64_gc_swap_hook): Ditto. (elfNN_aarch64_check_relocs): Ditto. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Ditto. ld/testsuite/ * ld-aarch64/emit-relocs-313.s: New test file. * ld-aarch64/emit-relocs-313.d: Ditto. * ld-aarch64/aarch64-elf.exp: Run new test.
2015-06-01 11:26:00 +02:00
addend, weak_undef_p);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
}
[AArch64] PR18270, fix handling of GOT entry for local symbol 2015-04-24 Jiong. Wang <jiong.wang@arm.com> bfd/ PR ld/18270 * elfnn-aarch64.c (elfNN_aarch64_size_dynamic): Count local symbol for GOT_NORMAL for both sgot/srelgot section. (elfNN_aarch64_final_link_relocate): Relocate against GOT entry address and generate necessary runtime relocation for GOT entry.
2015-04-25 00:25:28 +02:00
else
{
[AArch64] BFD Support BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15 2015-06-01 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_reloc_got_type): Support BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15. (elfNN_aarch64_final_link_relocate): Ditto. (elfNN_aarch64_gc_swap_hook): Ditto. (elfNN_aarch64_check_relocs): Ditto. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Ditto. ld/testsuite/ * ld-aarch64/emit-relocs-313.s: New test file. * ld-aarch64/emit-relocs-313.d: Ditto. * ld-aarch64/aarch64-elf.exp: Run new test.
2015-06-01 11:26:00 +02:00
bfd_vma addend = 0;
[AArch64] PR18270, fix handling of GOT entry for local symbol 2015-04-24 Jiong. Wang <jiong.wang@arm.com> bfd/ PR ld/18270 * elfnn-aarch64.c (elfNN_aarch64_size_dynamic): Count local symbol for GOT_NORMAL for both sgot/srelgot section. (elfNN_aarch64_final_link_relocate): Relocate against GOT entry address and generate necessary runtime relocation for GOT entry.
2015-04-25 00:25:28 +02:00
struct elf_aarch64_local_symbol *locals
= elf_aarch64_locals (input_bfd);
if (locals == NULL)
{
int howto_index = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
Remove syntactic sugar Now that _bfd_error_handler is not a function pointer. * aout-adobe.c: Replace (*_bfd_error_handler) (...) with _bfd_error_handler (...) throughout. * aout-cris.c, * aoutx.h, * archive.c, * bfd.c, * binary.c, * cache.c, * coff-alpha.c, * coff-arm.c, * coff-h8300.c, * coff-i860.c, * coff-mcore.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * cpu-arm.c, * cpu-m68k.c, * cpu-sh.c, * dwarf2.c, * ecoff.c, * elf-eh-frame.c, * elf-m10300.c, * elf.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c, * elf32-cris.c, * elf32-crx.c, * elf32-dlx.c, * elf32-frv.c, * elf32-hppa.c, * elf32-i370.c, * elf32-i386.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc1x.c, * elf32-m68k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-nds32.c, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-rl78.c, * elf32-s390.c, * elf32-score.c, * elf32-score7.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilepro.c, * elf32-v850.c, * elf32-vax.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-x86-64.c, * elfcode.h, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfxx-mips.c, * elfxx-sparc.c, * elfxx-tilegx.c, * hpux-core.c, * i386linux.c, * ieee.c, * ihex.c, * libbfd.c, * linker.c, * m68klinux.c, * mach-o.c, * merge.c, * mmo.c, * oasys.c, * osf-core.c, * pdp11.c, * pe-mips.c, * peXXigen.c, * pef.c, * plugin.c, * reloc.c, * rs6000-core.c, * sco5-core.c, * som.c, * sparclinux.c, * srec.c, * stabs.c, * syms.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * xcofflink.c: Likewise.
2016-09-30 05:30:18 +02:00
_bfd_error_handler
Add c-format tags to translatable strings with more than one argument-using formatting token. * aout-adobe.c: Add missing c-format tags for translatable strings. * aout-cris.c: Likewise. * aoutx.h: Likewise. * bfd.c: Likewise. * binary.c: Likewise. * cache.c: Likewise. * coff-alpha.c: Likewise. * coff-arm.c: Likewise. * coff-i860.c: Likewise. * coff-mcore.c: Likewise. * coff-ppc.c: Likewise. * coff-rs6000.c: Likewise. * coff-sh.c: Likewise. * coff-tic4x.c: Likewise. * coff-tic54x.c: Likewise. * coff-tic80.c: Likewise. * coff64-rs6000.c: Likewise. * coffcode.h: Likewise. * coffgen.c: Likewise. * cofflink.c: Likewise. * coffswap.h: Likewise. * cpu-arm.c: Likewise. * dwarf2.c: Likewise. * ecoff.c: Likewise. * elf-attrs.c: Likewise. * elf-eh-frame.c: Likewise. * elf-ifunc.c: Likewise. * elf-m10300.c: Likewise. * elf-s390-common.c: Likewise. * elf.c: Likewise. * elf32-arc.c: Likewise. * elf32-arm.c: Likewise. * elf32-avr.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-d10v.c: Likewise. * elf32-d30v.c: Likewise. * elf32-epiphany.c: Likewise. * elf32-fr30.c: Likewise. * elf32-frv.c: Likewise. * elf32-gen.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i370.c: Likewise. * elf32-i386.c: Likewise. * elf32-i960.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-lm32.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m32r.c: Likewise. * elf32-m68hc11.c: Likewise. * elf32-m68hc12.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mcore.c: Likewise. * elf32-mep.c: Likewise. * elf32-metag.c: Likewise. * elf32-microblaze.c: Likewise. * elf32-moxie.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-nds32.c: Likewise. * elf32-nios2.c: Likewise. * elf32-or1k.c: Likewise. * elf32-pj.c: Likewise. * elf32-ppc.c: Likewise. * elf32-rl78.c: Likewise. * elf32-rx.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-sh-symbian.c: Likewise. * elf32-sh.c: Likewise. * elf32-sh64.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-tilepro.c: Likewise. * elf32-v850.c: Likewise. * elf32-vax.c: Likewise. * elf32-visium.c: Likewise. * elf32-xgate.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-gen.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-mmix.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-sh64.c: Likewise. * elf64-sparc.c: Likewise. * elf64-x86-64.c: Likewise. * elfcode.h: Likewise. * elfcore.h: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * ieee.c: Likewise. * ihex.c: Likewise. * libbfd.c: Likewise. * linker.c: Likewise. * m68klinux.c: Likewise. * mach-o.c: Likewise. * merge.c: Likewise. * mmo.c: Likewise. * oasys.c: Likewise. * pdp11.c: Likewise. * pe-mips.c: Likewise. * peXXigen.c: Likewise. * pei-x86_64.c: Likewise. * peicode.h: Likewise. * ppcboot.c: Likewise. * reloc.c: Likewise. * sparclinux.c: Likewise. * srec.c: Likewise. * stabs.c: Likewise. * vms-alpha.c: Likewise. * vms-lib.c: Likewise. * xcofflink.c: Likewise.
2016-10-19 15:04:34 +02:00
/* xgettext:c-format */
ARM and AArch64 messages More standarization of error/warning messages. The ARM backend has some multi-line error messages, which don't fit particularly well with the GNU coding standard insistence that error messages shouldn't be capitalized or have a full-stop. I've replaced the line breaks with semicolons. So for instance the following system/path/to/ld: myobject.o: invalid special symbol `foo'. system/path/to/ld: It must be a global or weak function symbol. becomes system/path/to/ld: myobject.o: invalid special symbol `foo'; it must be a global or weak function symbol bfd/ * elf32-arm.c, * elfnn-aarch64.c: Standardize error/warning messages. ld/ * testsuite/ld-aarch64/reloc-overflow-bad.d, * testsuite/ld-arm/attr-merge-9.out, * testsuite/ld-arm/attr-merge-arch-2.d, * testsuite/ld-arm/attr-merge-unknown-1.d, * testsuite/ld-arm/attr-merge-unknown-2.d, * testsuite/ld-arm/attr-merge-unknown-2r.d, * testsuite/ld-arm/attr-merge-unknown-3.d, * testsuite/ld-arm/cmse-implib-errors.out, * testsuite/ld-arm/cmse-new-earlier-later-implib.out, * testsuite/ld-arm/cmse-new-implib-no-output.out, * testsuite/ld-arm/cmse-new-implib-not-sg-in-implib.out, * testsuite/ld-arm/cmse-new-implib.out, * testsuite/ld-arm/cmse-new-wrong-implib.out, * testsuite/ld-arm/cmse-veneers-no-gnu_sgstubs.out, * testsuite/ld-arm/cmse-veneers-wrong-entryfct.out, * testsuite/ld-arm/group-relocs-alu-bad-2.d, * testsuite/ld-arm/group-relocs-alu-bad.d, * testsuite/ld-arm/group-relocs-ldc-bad-2.d, * testsuite/ld-arm/group-relocs-ldc-bad.d, * testsuite/ld-arm/group-relocs-ldr-bad-2.d, * testsuite/ld-arm/group-relocs-ldr-bad.d, * testsuite/ld-arm/group-relocs-ldrs-bad-2.d, * testsuite/ld-arm/group-relocs-ldrs-bad.d, * testsuite/ld-arm/stm32l4xx-cannot-fix-far-ldm.d: Update.
2018-02-21 03:34:48 +01:00
(_("%pB: local symbol descriptor table be NULL when applying "
[AArch64] PR18270, fix handling of GOT entry for local symbol 2015-04-24 Jiong. Wang <jiong.wang@arm.com> bfd/ PR ld/18270 * elfnn-aarch64.c (elfNN_aarch64_size_dynamic): Count local symbol for GOT_NORMAL for both sgot/srelgot section. (elfNN_aarch64_final_link_relocate): Relocate against GOT entry address and generate necessary runtime relocation for GOT entry.
2015-04-25 00:25:28 +02:00
"relocation %s against local symbol"),
input_bfd, elfNN_aarch64_howto_table[howto_index].name);
abort ();
}
off = symbol_got_offset (input_bfd, h, r_symndx);
base_got = globals->root.sgot;
[AArch64] Only override the symbol dynamic decision on undefined weak symbol This fix is an adaption of the x86-64 PR ld/21402 fix to AArch64. After the generic code deciding one symbol is not dynamic, AArch64 backend only overrides the decision on undefined weak symbols. bfd/ PR ld/21402 * elfnn-aarch64.c (elfNN_aarch64_allocate_dynrelocs): Only make undefined weak symbols into dynamic. (elfNN_aarch64_final_link_relocate): Generate runtime RELATIVE relocation for non-dynamic symbols. (elfNN_aarch64_finish_dynamic_symbol): Add sanity check.
2017-06-29 12:47:43 +02:00
got_entry_addr = (base_got->output_section->vma
+ base_got->output_offset + off);
[AArch64] PR18270, fix handling of GOT entry for local symbol 2015-04-24 Jiong. Wang <jiong.wang@arm.com> bfd/ PR ld/18270 * elfnn-aarch64.c (elfNN_aarch64_size_dynamic): Count local symbol for GOT_NORMAL for both sgot/srelgot section. (elfNN_aarch64_final_link_relocate): Relocate against GOT entry address and generate necessary runtime relocation for GOT entry.
2015-04-25 00:25:28 +02:00
if (!symbol_got_offset_mark_p (input_bfd, h, r_symndx))
{
bfd_put_64 (output_bfd, value, base_got->contents + off);
[AArch64] Only override the symbol dynamic decision on undefined weak symbol This fix is an adaption of the x86-64 PR ld/21402 fix to AArch64. After the generic code deciding one symbol is not dynamic, AArch64 backend only overrides the decision on undefined weak symbols. bfd/ PR ld/21402 * elfnn-aarch64.c (elfNN_aarch64_allocate_dynrelocs): Only make undefined weak symbols into dynamic. (elfNN_aarch64_final_link_relocate): Generate runtime RELATIVE relocation for non-dynamic symbols. (elfNN_aarch64_finish_dynamic_symbol): Add sanity check.
2017-06-29 12:47:43 +02:00
/* For local symbol, we have done absolute relocation in static
linking stage. While for shared library, we need to update the
content of GOT entry according to the shared object's runtime
base address. So, we need to generate a R_AARCH64_RELATIVE reloc
for dynamic linker. */
Add output_type to bfd_link_info The "shared" field in bfd_link_info is set for both DSO and and PIE. There are separate fields for executable and relocatable outputs. This patch adds an "output_type" field: enum output_type { type_unknown = 0, type_executable, type_dll, type_relocatable }; and a "pic" field to bfd_link_info to replace shared, executable and relocatable fields so that we can use the "output_type" field to check for output type and the "pic" field check if output is PIC. Macros, bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie, are provided to check for output features. bfd/ * bfd/aoutx.h: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * bfd/bout.c: Likewise. * bfd/coff-alpha.c: Likewise. * bfd/coff-arm.c: Likewise. * bfd/coff-i386.c: Likewise. * bfd/coff-i960.c: Likewise. * bfd/coff-m68k.c: Likewise. * bfd/coff-mcore.c: Likewise. * bfd/coff-mips.c: Likewise. * bfd/coff-ppc.c: Likewise. * bfd/coff-rs6000.c: Likewise. * bfd/coff-sh.c: Likewise. * bfd/coff-tic80.c: Likewise. * bfd/coff-x86_64.c: Likewise. * bfd/coff64-rs6000.c: Likewise. * bfd/coffgen.c: Likewise. * bfd/cofflink.c: Likewise. * bfd/ecoff.c: Likewise. * bfd/ecofflink.c: Likewise. * bfd/elf-bfd.h: Likewise. * bfd/elf-eh-frame.c: Likewise. * bfd/elf-ifunc.c: Likewise. * bfd/elf-m10200.c: Likewise. * bfd/elf-m10300.c: Likewise. * bfd/elf-s390-common.c: Likewise. * bfd/elf-vxworks.c: Likewise. * bfd/elf.c: Likewise. * bfd/elf32-arm.c: Likewise. * bfd/elf32-avr.c: Likewise. * bfd/elf32-bfin.c: Likewise. * bfd/elf32-cr16.c: Likewise. * bfd/elf32-cr16c.c: Likewise. * bfd/elf32-cris.c: Likewise. * bfd/elf32-crx.c: Likewise. * bfd/elf32-d10v.c: Likewise. * bfd/elf32-dlx.c: Likewise. * bfd/elf32-epiphany.c: Likewise. * bfd/elf32-fr30.c: Likewise. * bfd/elf32-frv.c: Likewise. * bfd/elf32-ft32.c: Likewise. * bfd/elf32-h8300.c: Likewise. * bfd/elf32-hppa.c: Likewise. * bfd/elf32-i370.c: Likewise. * bfd/elf32-i386.c: Likewise. * bfd/elf32-i860.c: Likewise. * bfd/elf32-ip2k.c: Likewise. * bfd/elf32-iq2000.c: Likewise. * bfd/elf32-lm32.c: Likewise. * bfd/elf32-m32c.c: Likewise. * bfd/elf32-m32r.c: Likewise. * bfd/elf32-m68hc11.c: Likewise. * bfd/elf32-m68hc1x.c: Likewise. * bfd/elf32-m68k.c: Likewise. * bfd/elf32-mcore.c: Likewise. * bfd/elf32-mep.c: Likewise. * bfd/elf32-metag.c: Likewise. * bfd/elf32-microblaze.c: Likewise. * bfd/elf32-moxie.c: Likewise. * bfd/elf32-msp430.c: Likewise. * bfd/elf32-mt.c: Likewise. * bfd/elf32-nds32.c: Likewise. * bfd/elf32-nios2.c: Likewise. * bfd/elf32-or1k.c: Likewise. * bfd/elf32-ppc.c: Likewise. * bfd/elf32-rl78.c: Likewise. * bfd/elf32-rx.c: Likewise. * bfd/elf32-s390.c: Likewise. * bfd/elf32-score.c: Likewise. * bfd/elf32-score7.c: Likewise. * bfd/elf32-sh-symbian.c: Likewise. * bfd/elf32-sh.c: Likewise. * bfd/elf32-sh64.c: Likewise. * bfd/elf32-spu.c: Likewise. * bfd/elf32-tic6x.c: Likewise. * bfd/elf32-tilepro.c: Likewise. * bfd/elf32-v850.c: Likewise. * bfd/elf32-vax.c: Likewise. * bfd/elf32-visium.c: Likewise. * bfd/elf32-xc16x.c: Likewise. * bfd/elf32-xstormy16.c: Likewise. * bfd/elf32-xtensa.c: Likewise. * bfd/elf64-alpha.c: Likewise. * bfd/elf64-hppa.c: Likewise. * bfd/elf64-ia64-vms.c: Likewise. * bfd/elf64-mmix.c: Likewise. * bfd/elf64-ppc.c: Likewise. * bfd/elf64-s390.c: Likewise. * bfd/elf64-sh64.c: Likewise. * bfd/elf64-x86-64.c: Likewise. * bfd/elflink.c: Likewise. * bfd/elfnn-aarch64.c: Likewise. * bfd/elfnn-ia64.c: Likewise. * bfd/elfxx-mips.c: Likewise. * bfd/elfxx-sparc.c: Likewise. * bfd/elfxx-tilegx.c: Likewise. * bfd/i386linux.c: Likewise. * bfd/linker.c: Likewise. * bfd/m68klinux.c: Likewise. * bfd/pdp11.c: Likewise. * bfd/pe-mips.c: Likewise. * bfd/peXXigen.c: Likewise. * bfd/reloc.c: Likewise. * bfd/reloc16.c: Likewise. * bfd/sparclinux.c: Likewise. * bfd/sunos.c: Likewise. * bfd/vms-alpha.c: Likewise. * bfd/xcofflink.c: Likewise. include/ * include/bfdlink.h (output_type): New enum. (bfd_link_executable): New macro. (bfd_link_dll): Likewise. (bfd_link_relocatable): Likewise. (bfd_link_pic): Likewise. (bfd_link_pie): Likewise. (bfd_link_info): Remove shared, executable, pie and relocatable. Add output_type and pic. ld/ * ld/ldctor.c: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * ld/ldemul.c: Likewise. * ld/ldfile.c: Likewise. * ld/ldlang.c: Likewise. * ld/ldmain.c: Likewise. * ld/ldwrite.c: Likewise. * ld/lexsup.c: Likewise. * ld/pe-dll.c: Likewise. * ld/plugin.c: Likewise. * ld/emultempl/aarch64elf.em: Likewise. * ld/emultempl/aix.em: Likewise. * ld/emultempl/alphaelf.em: Likewise. * ld/emultempl/armcoff.em: Likewise. * ld/emultempl/armelf.em: Likewise. * ld/emultempl/avrelf.em: Likewise. * ld/emultempl/beos.em: Likewise. * ld/emultempl/cr16elf.em: Likewise. * ld/emultempl/elf-generic.em: Likewise. * ld/emultempl/elf32.em: Likewise. * ld/emultempl/genelf.em: Likewise. * ld/emultempl/generic.em: Likewise. * ld/emultempl/gld960.em: Likewise. * ld/emultempl/gld960c.em: Likewise. * ld/emultempl/hppaelf.em: Likewise. * ld/emultempl/irix.em: Likewise. * ld/emultempl/linux.em: Likewise. * ld/emultempl/lnk960.em: Likewise. * ld/emultempl/m68hc1xelf.em: Likewise. * ld/emultempl/m68kcoff.em: Likewise. * ld/emultempl/m68kelf.em: Likewise. * ld/emultempl/metagelf.em: Likewise. * ld/emultempl/mipself.em: Likewise. * ld/emultempl/mmo.em: Likewise. * ld/emultempl/msp430.em: Likewise. * ld/emultempl/nds32elf.em: Likewise. * ld/emultempl/needrelax.em: Likewise. * ld/emultempl/nios2elf.em: Likewise. * ld/emultempl/pe.em: Likewise. * ld/emultempl/pep.em: Likewise. * ld/emultempl/ppc32elf.em: Likewise. * ld/emultempl/ppc64elf.em: Likewise. * ld/emultempl/sh64elf.em: Likewise. * ld/emultempl/solaris2.em: Likewise. * ld/emultempl/spuelf.em: Likewise. * ld/emultempl/sunos.em: Likewise. * ld/emultempl/tic6xdsbt.em: Likewise. * ld/emultempl/ticoff.em: Likewise. * ld/emultempl/v850elf.em: Likewise. * ld/emultempl/vms.em: Likewise. * ld/emultempl/vxworks.em: Likewise.
2015-08-18 14:51:03 +02:00
if (bfd_link_pic (info))
[AArch64] Only override the symbol dynamic decision on undefined weak symbol This fix is an adaption of the x86-64 PR ld/21402 fix to AArch64. After the generic code deciding one symbol is not dynamic, AArch64 backend only overrides the decision on undefined weak symbols. bfd/ PR ld/21402 * elfnn-aarch64.c (elfNN_aarch64_allocate_dynrelocs): Only make undefined weak symbols into dynamic. (elfNN_aarch64_final_link_relocate): Generate runtime RELATIVE relocation for non-dynamic symbols. (elfNN_aarch64_finish_dynamic_symbol): Add sanity check.
2017-06-29 12:47:43 +02:00
relative_reloc = TRUE;
[AArch64] PR18270, fix handling of GOT entry for local symbol 2015-04-24 Jiong. Wang <jiong.wang@arm.com> bfd/ PR ld/18270 * elfnn-aarch64.c (elfNN_aarch64_size_dynamic): Count local symbol for GOT_NORMAL for both sgot/srelgot section. (elfNN_aarch64_final_link_relocate): Relocate against GOT entry address and generate necessary runtime relocation for GOT entry.
2015-04-25 00:25:28 +02:00
symbol_got_offset_mark (input_bfd, h, r_symndx);
}
/* Update the relocation value to GOT entry addr as we have transformed
the direct data access into indirect data access through GOT. */
value = got_entry_addr;
[AArch64] BFD Support BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15 2015-06-01 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_reloc_got_type): Support BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15. (elfNN_aarch64_final_link_relocate): Ditto. (elfNN_aarch64_gc_swap_hook): Ditto. (elfNN_aarch64_check_relocs): Ditto. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Ditto. ld/testsuite/ * ld-aarch64/emit-relocs-313.s: New test file. * ld-aarch64/emit-relocs-313.d: Ditto. * ld-aarch64/aarch64-elf.exp: Run new test.
2015-06-01 11:26:00 +02:00
[AArch64] Remove duplicated code when handling some GOT relocations types There are quite a few duplicated code supporting several GP based relocation types. They are: BFD_RELOC_AARCH64_LD64_GOTOFF_LO15 BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC BFD_RELOC_AARCH64_MOVW_GOTOFF_G1 These relocation types are supposed to be used for large memory model PIC/pic mode under which we will have an initialized GP register points to the base of GOT table, then these relocations are supposed to put the distance between GOT entry and GOT table base address into the related instructions. So, the parameters required to calculate the relocation should be the same as BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15 etc, all of them are require the GOT entry address and GOT table base address to perform the relocation. This patch has removed those duplicated code when handling above listed relocation types, grouped them with others as relocation types that are require GOT table base address during performing relocation, reused the existed GOT handling code. The relocation calculation for these types before and after this patch should be identical. bfd/ * elfnn-aarch64.c (aarch64_relocation_aginst_gp_p): New function. (elfNN_aarch64_final_link_relocate): Delete duplicated code for BFD_RELOC_AARCH64_LD64_GOTOFF_LO15, BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC, BFD_RELOC_AARCH64_MOVW_GOTOFF_G1. * elfxx-aarch64.c (_bfd_aarch64_elf_resolve_relocation): Optimize the support for them.
2017-06-29 12:45:24 +02:00
if (aarch64_relocation_aginst_gp_p (bfd_r_type))
[AArch64] BFD Support BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15 2015-06-01 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_reloc_got_type): Support BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15. (elfNN_aarch64_final_link_relocate): Ditto. (elfNN_aarch64_gc_swap_hook): Ditto. (elfNN_aarch64_check_relocs): Ditto. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Ditto. ld/testsuite/ * ld-aarch64/emit-relocs-313.s: New test file. * ld-aarch64/emit-relocs-313.d: Ditto. * ld-aarch64/aarch64-elf.exp: Run new test.
2015-06-01 11:26:00 +02:00
addend = base_got->output_section->vma + base_got->output_offset;
AArch64: Fix LD crash on weak and undefined TLS symbols. (PR/24602). This patch fixes a few linker crashes due to TLS code reaching an assert when it shouldn't. The first scenario is with weak TLS symbols that remain weak during linking. In this case the mid-end would not have seen a TLS symbol and so wouldn't have allocated the TLS section. We currently assert here and the linker crashes with a not very useful message. This patch changes this to return the value 0 for the TLS symbol in question emulating what lld and gold and other BFD targets do. However because weak TLS is implementation defined and we don't define any behavior for it I also emit a warning to the user to inform them of such. Secondly when a strong TLS reference is undefined. The linker crashes even after it correctly reported that there is an undefined reference. This changes it so that it gracefully exits and reports a useful error. bfd/ChangeLog: PR ld/24601 * elfnn-aarch64.c (aarch64_relocate): Handle weak TLS and undefined TLS. Also Pass input_bfd to _bfd_aarch64_elf_resolve_relocation. * elfxx-aarch64.c (_bfd_aarch64_elf_resolve_relocation): Use it. * elfxx-aarch64.h (_bfd_aarch64_elf_resolve_relocation): Emit warning for weak TLS. ld/ChangeLog: PR ld/24601 * testsuite/ld-aarch64/aarch64-elf.exp (undef-tls, weak-tls): New. * testsuite/ld-aarch64/undef-tls.d: New test. * testsuite/ld-aarch64/undef-tls.s: New test. * testsuite/ld-aarch64/weak-tls.d: New test. * testsuite/ld-aarch64/weak-tls.s: New test.
2019-08-22 12:35:35 +02:00
value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
place, value,
[AArch64] BFD Support BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15 2015-06-01 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_reloc_got_type): Support BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15. (elfNN_aarch64_final_link_relocate): Ditto. (elfNN_aarch64_gc_swap_hook): Ditto. (elfNN_aarch64_check_relocs): Ditto. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Ditto. ld/testsuite/ * ld-aarch64/emit-relocs-313.s: New test file. * ld-aarch64/emit-relocs-313.d: Ditto. * ld-aarch64/aarch64-elf.exp: Run new test.
2015-06-01 11:26:00 +02:00
addend, weak_undef_p);
[AArch64] PR18270, fix handling of GOT entry for local symbol 2015-04-24 Jiong. Wang <jiong.wang@arm.com> bfd/ PR ld/18270 * elfnn-aarch64.c (elfNN_aarch64_size_dynamic): Count local symbol for GOT_NORMAL for both sgot/srelgot section. (elfNN_aarch64_final_link_relocate): Relocate against GOT entry address and generate necessary runtime relocation for GOT entry.
2015-04-25 00:25:28 +02:00
}
[AArch64] Only override the symbol dynamic decision on undefined weak symbol This fix is an adaption of the x86-64 PR ld/21402 fix to AArch64. After the generic code deciding one symbol is not dynamic, AArch64 backend only overrides the decision on undefined weak symbols. bfd/ PR ld/21402 * elfnn-aarch64.c (elfNN_aarch64_allocate_dynrelocs): Only make undefined weak symbols into dynamic. (elfNN_aarch64_final_link_relocate): Generate runtime RELATIVE relocation for non-dynamic symbols. (elfNN_aarch64_finish_dynamic_symbol): Add sanity check.
2017-06-29 12:47:43 +02:00
if (relative_reloc)
{
asection *s;
Elf_Internal_Rela outrel;
s = globals->root.srelgot;
if (s == NULL)
abort ();
outrel.r_offset = got_entry_addr;
outrel.r_info = ELFNN_R_INFO (0, AARCH64_R (RELATIVE));
outrel.r_addend = orig_value;
elf_append_rela (output_bfd, s, &outrel);
}
[LD][AARCH64]Add BFD_RELOC_AARCH64_LD64_GOTOFF_LO15 Support. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_reloc_got_type): Add BFD_RELOC_AARCH64_LD_64_GOTOFF_LO15 support. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise (elfNN_aarch64_final_link_relocate): Calculate offset within GOT. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/emit-relocs-310.d: New. * ld-aarch64/emit-relocs-310.s: New. * ld-aarch64/aarch64-elf.exp: Run the test.
2015-10-02 15:51:26 +02:00
break;
[AArch64/BFD] Sort relocation case labels alphabetically 2015-05-19 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_tls_transition_without_check): Sort relocation case labels alphabetically. (elfNN_aarch64_final_link_relocate): Ditto. (elfNN_aarch64_tls_relax): Ditto. (elfNN_aarch64_relocate_section): Ditto. (elfNN_aarch64_gc_sweep_hook): Ditto. (elfNN_aarch64_check_relocs): Ditto. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Ditto. (_bfd_aarch64_elf_resolve_relocation): Ditto.
2015-05-20 11:58:43 +02:00
case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21:
Add ADR :tlsgd: directive and TLSGD_ADR_PREL21 support.
2015-02-13 08:13:57 +01:00
case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21:
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC:
[AArch64/BFD] Sort relocation case labels alphabetically 2015-05-19 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_tls_transition_without_check): Sort relocation case labels alphabetically. (elfNN_aarch64_final_link_relocate): Ditto. (elfNN_aarch64_tls_relax): Ditto. (elfNN_aarch64_relocate_section): Ditto. (elfNN_aarch64_gc_sweep_hook): Ditto. (elfNN_aarch64_check_relocs): Ditto. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Ditto. (_bfd_aarch64_elf_resolve_relocation): Ditto.
2015-05-20 11:58:43 +02:00
case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
Adding support for TLSIE_LD_GOTTREL_PREL19.
2015-02-13 10:57:11 +01:00
case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
[AArch64][6/8] LD support BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC 2015-08-11 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC. (aarch64_reloc_got_type): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ * ld-aarch64/tls-small-ld.s: Update testcase.
2015-08-11 18:20:17 +02:00
case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
[AArch64][3/8] LD support BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21 2015-08-11 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21. (aarch64_reloc_got_type): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ * ld-aarch64/tls-small-ld.s: New file. * ld-aarch64/tls-small-ld.d: Likewise. * ld-aarch64/aarch64-elf.exp: Run new test.
2015-08-11 18:05:34 +02:00
case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
[AArch64][3/3] LD support BFD_RELOC_AARCH64_TLSLD_ADR_PREL21
2015-07-16 16:46:21 +02:00
case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
if (globals->root.sgot == NULL)
return bfd_reloc_notsupported;
value = (symbol_got_offset (input_bfd, h, r_symndx)
+ globals->root.sgot->output_section->vma
2014-01-14 Michael Hudson-Doyle <michael.hudson@linaro.org> Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org> bfd/ * elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Use correct offset while calculating relocation address. (elfNN_aarch64_create_small_pltn_entry): Likewise. (elfNN_aarch64_init_small_plt0_entry): Likewise.
2014-01-14 15:53:50 +01:00
+ globals->root.sgot->output_offset);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
AArch64: Fix LD crash on weak and undefined TLS symbols. (PR/24602). This patch fixes a few linker crashes due to TLS code reaching an assert when it shouldn't. The first scenario is with weak TLS symbols that remain weak during linking. In this case the mid-end would not have seen a TLS symbol and so wouldn't have allocated the TLS section. We currently assert here and the linker crashes with a not very useful message. This patch changes this to return the value 0 for the TLS symbol in question emulating what lld and gold and other BFD targets do. However because weak TLS is implementation defined and we don't define any behavior for it I also emit a warning to the user to inform them of such. Secondly when a strong TLS reference is undefined. The linker crashes even after it correctly reported that there is an undefined reference. This changes it so that it gracefully exits and reports a useful error. bfd/ChangeLog: PR ld/24601 * elfnn-aarch64.c (aarch64_relocate): Handle weak TLS and undefined TLS. Also Pass input_bfd to _bfd_aarch64_elf_resolve_relocation. * elfxx-aarch64.c (_bfd_aarch64_elf_resolve_relocation): Use it. * elfxx-aarch64.h (_bfd_aarch64_elf_resolve_relocation): Emit warning for weak TLS. ld/ChangeLog: PR ld/24601 * testsuite/ld-aarch64/aarch64-elf.exp (undef-tls, weak-tls): New. * testsuite/ld-aarch64/undef-tls.d: New test. * testsuite/ld-aarch64/undef-tls.s: New test. * testsuite/ld-aarch64/weak-tls.d: New test. * testsuite/ld-aarch64/weak-tls.s: New test.
2019-08-22 12:35:35 +02:00
value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
place, value,
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
0, weak_undef_p);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
*unresolved_reloc_p = FALSE;
break;
[LD][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC support. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_reloc_got_type): Add BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC support. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/emit-relocs-516.d: New. * ld-aarch64/emit-relocs-516.s: New. * ld-aarch64/aarch64-elf.exp: Run new test.
2015-10-02 17:37:22 +02:00
case BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC:
[LD][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G1 support. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_reloc_got_type): Add BFD_RELOC_AARCH64_TLSGD_MOVW_G1 support. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/emit-relocs-515.d: New. * ld-aarch64/emit-relocs-515.s: New. * ld-aarch64/aarch64-elf.exp: Run new test.
2015-10-02 17:21:31 +02:00
case BFD_RELOC_AARCH64_TLSGD_MOVW_G1:
[Binutils][AARCH64]Add TLS IE large memory support. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * reloc.c: Make AARCH64_TLSIE_MOVW_GOTTPREL_G1 and AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC defined in alphabetical order. * libbfd.h: Regenerate. * bfd-in2.h: Likewise. * elfnn-aarch64.c (elfNN_aarch64_howto_table): Make TLSIE_MOVW_GOTTPREL_G1 check overflow. (aarch64_reloc_got_type): Add support for TLSIE_MOVW_GOTTPREL_G1 and TLSIE_MOVW_GOTTPREL_G0_NC. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. gas/ 2015-10-02 Renlin Li <renlin.li@arm.com> * config/tc-aarch64.c (reloc_table): Add two entries for gottprel_g0_nc and gottprel_g1. (process_movw_reloc_info): Add support. (md_apply_fix): Likewise. (aarch64_force_relocation): Likewise. gas/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * gas/aarch64/reloc-gottprel_g0_nc.d: New. * gas/aarch64/reloc-gottprel_g0_nc.s: New. * gas/aarch64/reloc-gottprel_g1.d: New. * gas/aarch64/reloc-gottprel_g1.s: New. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/tls-large-ie.d: New. * ld-aarch64/tls-large-ie.s: New. * ld-aarch64/aarch64-elf.exp: Run new test.
2015-10-02 17:59:46 +02:00
case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC:
case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1:
[LD][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G1 support. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_reloc_got_type): Add BFD_RELOC_AARCH64_TLSGD_MOVW_G1 support. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/emit-relocs-515.d: New. * ld-aarch64/emit-relocs-515.s: New. * ld-aarch64/aarch64-elf.exp: Run new test.
2015-10-02 17:21:31 +02:00
if (globals->root.sgot == NULL)
return bfd_reloc_notsupported;
value = symbol_got_offset (input_bfd, h, r_symndx);
AArch64: Fix LD crash on weak and undefined TLS symbols. (PR/24602). This patch fixes a few linker crashes due to TLS code reaching an assert when it shouldn't. The first scenario is with weak TLS symbols that remain weak during linking. In this case the mid-end would not have seen a TLS symbol and so wouldn't have allocated the TLS section. We currently assert here and the linker crashes with a not very useful message. This patch changes this to return the value 0 for the TLS symbol in question emulating what lld and gold and other BFD targets do. However because weak TLS is implementation defined and we don't define any behavior for it I also emit a warning to the user to inform them of such. Secondly when a strong TLS reference is undefined. The linker crashes even after it correctly reported that there is an undefined reference. This changes it so that it gracefully exits and reports a useful error. bfd/ChangeLog: PR ld/24601 * elfnn-aarch64.c (aarch64_relocate): Handle weak TLS and undefined TLS. Also Pass input_bfd to _bfd_aarch64_elf_resolve_relocation. * elfxx-aarch64.c (_bfd_aarch64_elf_resolve_relocation): Use it. * elfxx-aarch64.h (_bfd_aarch64_elf_resolve_relocation): Emit warning for weak TLS. ld/ChangeLog: PR ld/24601 * testsuite/ld-aarch64/aarch64-elf.exp (undef-tls, weak-tls): New. * testsuite/ld-aarch64/undef-tls.d: New test. * testsuite/ld-aarch64/undef-tls.s: New test. * testsuite/ld-aarch64/weak-tls.d: New test. * testsuite/ld-aarch64/weak-tls.s: New test.
2019-08-22 12:35:35 +02:00
value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
place, value,
[LD][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G1 support. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_reloc_got_type): Add BFD_RELOC_AARCH64_TLSGD_MOVW_G1 support. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/emit-relocs-515.d: New. * ld-aarch64/emit-relocs-515.s: New. * ld-aarch64/aarch64-elf.exp: Run new test.
2015-10-02 17:21:31 +02:00
0, weak_undef_p);
*unresolved_reloc_p = FALSE;
break;
[AArch64][4/6] LD support TLSLD move/add relocation types 2015-08-19 Jiong Wang <jiong.wang@arm.com> bfd/ PR ld/18276 * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize new relocation types, including BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2. (elfNN_aarch64_final_link_relocate): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ * ld-aarch64/emit-relocs-87.s: New testcase. * ld-aarch64/emit-relocs-88.s: Likewise. * ld-aarch64/emit-relocs-88-overflow.s: Likewise. * ld-aarch64/emit-relocs-89.s: Likewise. * ld-aarch64/emit-relocs-90.s: Likewise. * ld-aarch64/emit-relocs-90-overflow.s: Likewise. * ld-aarch64/emit-relocs-523.s: Likewise. * ld-aarch64/emit-relocs-524.s: Likewise. * ld-aarch64/emit-relocs-525.s: Likewise. * ld-aarch64/emit-relocs-527.s: Likewise. * ld-aarch64/emit-relocs-526.s: Likewise. * ld-aarch64/emit-relocs-528.s: Likewise. * ld-aarch64/emit-relocs-528-overflow.s: Likewise. * ld-aarch64/emit-relocs-87.d: New expectation file. * ld-aarch64/emit-relocs-88.d: Likewise. * ld-aarch64/emit-relocs-88-overflow.d: Likewise. * ld-aarch64/emit-relocs-89.d: Likewise. * ld-aarch64/emit-relocs-90.d: Likewise. * ld-aarch64/emit-relocs-90-overflow.d: Likewise. * ld-aarch64/emit-relocs-91.d: Likewise. * ld-aarch64/emit-relocs-523.d: Likewise. * ld-aarch64/emit-relocs-524.d: Likewise. * ld-aarch64/emit-relocs-525.d: Likewise. * ld-aarch64/emit-relocs-526.d: Likewise. * ld-aarch64/emit-relocs-527.d: Likewise. * ld-aarch64/emit-relocs-528.d: Likewise. * ld-aarch64/emit-relocs-528-overflow.d: Likewise. * ld-aarch64/aarch64-elf.exp: Run new testcases.
2015-08-19 12:18:25 +02:00
case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12:
[AArch64][8/8] LD support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12 2015-08-11 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12. (aarch64_reloc_got_type): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ * ld-aarch64/emit-relocs-529.s: New testcase. * ld-aarch64/emit-relocs-529-overflow.s: Likewise. * ld-aarch64/emit-relocs-86.s: Likewise. * ld-aarch64/emit-relocs-86-overflow.s: Likewise. * ld-aarch64/emit-relocs-529.d: New expectation file. * ld-aarch64/emit-relocs-529-overflow.d: Likewise. * ld-aarch64/emit-relocs-86.d: Likewise. * ld-aarch64/emit-relocs-86-overflow.d: Likewise. * ld-aarch64/aarch64-elf.exp: Run new testcases.
2015-08-11 18:44:30 +02:00
case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12:
[AArch64][2/6] LD support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC 2015-08-19 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC. (aarch64_reloc_got_type): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ * ld-aarch64/emit-relocs-530.s: New testcase. * ld-aarch64/emit-relocs-92.s: Likewise. * ld-aarch64/emit-relocs-530.d: New expectation file. * ld-aarch64/emit-relocs-92.d: Likewise. * ld-aarch64/aarch64-elf.exp: Run new testcases.
2015-08-19 11:58:13 +02:00
case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC:
[AArch64][6/6] LD support TLSLD load/store relocation types 2015-08-19 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize new relocation types, including BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12, BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC, BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12, BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC, BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12, BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC, BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12, BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC. (elfNN_aarch64_final_link_relocate): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ * ld-aarch64/emit-relocs-531.s: New testcase. * ld-aarch64/emit-relocs-531-overflow.s: Likewise. * ld-aarch64/emit-relocs-532.s: Likewise. * ld-aarch64/emit-relocs-533.s: Likewise. * ld-aarch64/emit-relocs-533-overflow.s: Likewise. * ld-aarch64/emit-relocs-534.s: Likewise. * ld-aarch64/emit-relocs-535.s: Likewise. * ld-aarch64/emit-relocs-535-overflow.s: Likewise. * ld-aarch64/emit-relocs-536.s: Likewise. * ld-aarch64/emit-relocs-537.s: Likewise. * ld-aarch64/emit-relocs-537-overflow.s: Likewise. * ld-aarch64/emit-relocs-538.s: Likewise. * ld-aarch64/emit-relocs-531.d: New expectation file. * ld-aarch64/emit-relocs-531-overflow.d: Likewise. * ld-aarch64/emit-relocs-532.d: Likewise. * ld-aarch64/emit-relocs-533.d: Likewise. * ld-aarch64/emit-relocs-533-overflow.d: Likewise. * ld-aarch64/emit-relocs-534.d: Likewise. * ld-aarch64/emit-relocs-535.d: Likewise. * ld-aarch64/emit-relocs-535-overflow.d: Likewise. * ld-aarch64/emit-relocs-536.d: Likewise. * ld-aarch64/emit-relocs-537.d: Likewise. * ld-aarch64/emit-relocs-537-overflow.d: Likewise. * ld-aarch64/emit-relocs-538.d: Likewise. * ld-aarch64/aarch64-elf.exp: Run new testcases.
2015-08-19 12:26:56 +02:00
case BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12:
case BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12:
case BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12:
case BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12:
case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC:
[AArch64][4/6] LD support TLSLD move/add relocation types 2015-08-19 Jiong Wang <jiong.wang@arm.com> bfd/ PR ld/18276 * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize new relocation types, including BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2. (elfNN_aarch64_final_link_relocate): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ * ld-aarch64/emit-relocs-87.s: New testcase. * ld-aarch64/emit-relocs-88.s: Likewise. * ld-aarch64/emit-relocs-88-overflow.s: Likewise. * ld-aarch64/emit-relocs-89.s: Likewise. * ld-aarch64/emit-relocs-90.s: Likewise. * ld-aarch64/emit-relocs-90-overflow.s: Likewise. * ld-aarch64/emit-relocs-523.s: Likewise. * ld-aarch64/emit-relocs-524.s: Likewise. * ld-aarch64/emit-relocs-525.s: Likewise. * ld-aarch64/emit-relocs-527.s: Likewise. * ld-aarch64/emit-relocs-526.s: Likewise. * ld-aarch64/emit-relocs-528.s: Likewise. * ld-aarch64/emit-relocs-528-overflow.s: Likewise. * ld-aarch64/emit-relocs-87.d: New expectation file. * ld-aarch64/emit-relocs-88.d: Likewise. * ld-aarch64/emit-relocs-88-overflow.d: Likewise. * ld-aarch64/emit-relocs-89.d: Likewise. * ld-aarch64/emit-relocs-90.d: Likewise. * ld-aarch64/emit-relocs-90-overflow.d: Likewise. * ld-aarch64/emit-relocs-91.d: Likewise. * ld-aarch64/emit-relocs-523.d: Likewise. * ld-aarch64/emit-relocs-524.d: Likewise. * ld-aarch64/emit-relocs-525.d: Likewise. * ld-aarch64/emit-relocs-526.d: Likewise. * ld-aarch64/emit-relocs-527.d: Likewise. * ld-aarch64/emit-relocs-528.d: Likewise. * ld-aarch64/emit-relocs-528-overflow.d: Likewise. * ld-aarch64/aarch64-elf.exp: Run new testcases.
2015-08-19 12:18:25 +02:00
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0:
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC:
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1:
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC:
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2:
AArch64: Fix LD crash on weak and undefined TLS symbols. (PR/24602). This patch fixes a few linker crashes due to TLS code reaching an assert when it shouldn't. The first scenario is with weak TLS symbols that remain weak during linking. In this case the mid-end would not have seen a TLS symbol and so wouldn't have allocated the TLS section. We currently assert here and the linker crashes with a not very useful message. This patch changes this to return the value 0 for the TLS symbol in question emulating what lld and gold and other BFD targets do. However because weak TLS is implementation defined and we don't define any behavior for it I also emit a warning to the user to inform them of such. Secondly when a strong TLS reference is undefined. The linker crashes even after it correctly reported that there is an undefined reference. This changes it so that it gracefully exits and reports a useful error. bfd/ChangeLog: PR ld/24601 * elfnn-aarch64.c (aarch64_relocate): Handle weak TLS and undefined TLS. Also Pass input_bfd to _bfd_aarch64_elf_resolve_relocation. * elfxx-aarch64.c (_bfd_aarch64_elf_resolve_relocation): Use it. * elfxx-aarch64.h (_bfd_aarch64_elf_resolve_relocation): Emit warning for weak TLS. ld/ChangeLog: PR ld/24601 * testsuite/ld-aarch64/aarch64-elf.exp (undef-tls, weak-tls): New. * testsuite/ld-aarch64/undef-tls.d: New test. * testsuite/ld-aarch64/undef-tls.s: New test. * testsuite/ld-aarch64/weak-tls.d: New test. * testsuite/ld-aarch64/weak-tls.s: New test.
2019-08-22 12:35:35 +02:00
{
if (!(weak_undef_p || elf_hash_table (info)->tls_sec))
{
int howto_index = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
_bfd_error_handler
/* xgettext:c-format */
(_("%pB: TLS relocation %s against undefined symbol `%s'"),
input_bfd, elfNN_aarch64_howto_table[howto_index].name,
h->root.root.string);
bfd_set_error (bfd_error_bad_value);
return bfd_reloc_notsupported;
}
bfd_vma def_value
= weak_undef_p ? 0 : signed_addend - dtpoff_base (info);
value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
place, value,
def_value, weak_undef_p);
break;
}
[AArch64][8/8] LD support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12 2015-08-11 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12. (aarch64_reloc_got_type): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ * ld-aarch64/emit-relocs-529.s: New testcase. * ld-aarch64/emit-relocs-529-overflow.s: Likewise. * ld-aarch64/emit-relocs-86.s: Likewise. * ld-aarch64/emit-relocs-86-overflow.s: Likewise. * ld-aarch64/emit-relocs-529.d: New expectation file. * ld-aarch64/emit-relocs-529-overflow.d: Likewise. * ld-aarch64/emit-relocs-86.d: Likewise. * ld-aarch64/emit-relocs-86-overflow.d: Likewise. * ld-aarch64/aarch64-elf.exp: Run new testcases.
2015-08-11 18:44:30 +02:00
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12:
case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12:
case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
[2/2][LD][AARCH64]Add BFD_RELOC_AARCH64_TLSLE_LDST8/16/32/64_TPREL_LO12 support in LD. This patch adds the following relocation support into binutils bfd linker. BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12, BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC, BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12, BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC, BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12, BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC, BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12, BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC. Those relocations includes both ip64 and ilp32 variant.
2018-03-28 19:06:05 +02:00
case BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12:
case BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12:
case BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12:
case BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12:
case BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC:
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0:
case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC:
case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1:
case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC:
case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2:
AArch64: Fix LD crash on weak and undefined TLS symbols. (PR/24602). This patch fixes a few linker crashes due to TLS code reaching an assert when it shouldn't. The first scenario is with weak TLS symbols that remain weak during linking. In this case the mid-end would not have seen a TLS symbol and so wouldn't have allocated the TLS section. We currently assert here and the linker crashes with a not very useful message. This patch changes this to return the value 0 for the TLS symbol in question emulating what lld and gold and other BFD targets do. However because weak TLS is implementation defined and we don't define any behavior for it I also emit a warning to the user to inform them of such. Secondly when a strong TLS reference is undefined. The linker crashes even after it correctly reported that there is an undefined reference. This changes it so that it gracefully exits and reports a useful error. bfd/ChangeLog: PR ld/24601 * elfnn-aarch64.c (aarch64_relocate): Handle weak TLS and undefined TLS. Also Pass input_bfd to _bfd_aarch64_elf_resolve_relocation. * elfxx-aarch64.c (_bfd_aarch64_elf_resolve_relocation): Use it. * elfxx-aarch64.h (_bfd_aarch64_elf_resolve_relocation): Emit warning for weak TLS. ld/ChangeLog: PR ld/24601 * testsuite/ld-aarch64/aarch64-elf.exp (undef-tls, weak-tls): New. * testsuite/ld-aarch64/undef-tls.d: New test. * testsuite/ld-aarch64/undef-tls.s: New test. * testsuite/ld-aarch64/weak-tls.d: New test. * testsuite/ld-aarch64/weak-tls.s: New test.
2019-08-22 12:35:35 +02:00
{
if (!(weak_undef_p || elf_hash_table (info)->tls_sec))
{
int howto_index = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
_bfd_error_handler
/* xgettext:c-format */
(_("%pB: TLS relocation %s against undefined symbol `%s'"),
input_bfd, elfNN_aarch64_howto_table[howto_index].name,
h->root.root.string);
bfd_set_error (bfd_error_bad_value);
return bfd_reloc_notsupported;
}
bfd_vma def_value
= weak_undef_p ? 0 : signed_addend - tpoff_base (info);
value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
place, value,
def_value, weak_undef_p);
*unresolved_reloc_p = FALSE;
break;
}
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
Rename R_AARCH64_TLSDESC_LD64_LO12_NC to R_AARCH64_TLSDESC_LD64_LO12 and R_AARCH64_TLSDESC_ADD_LO12_NC to R_AARCH64_TLSDESC_ADD_LO12. PR binutils/21202 include * elf/aarch64.h (R_AARCH64_TLSDESC_LD64_LO12_NC): Rename to R_AARCH64_TLSDESC_LD64_LO12. (R_AARCH64_TLSDESC_ADD_LO12_NC): Rename to R_AARCH64_TLSDESC_ADD_LO12_NC. bfd * reloc.c (BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC): Rename to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12. (BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC): Rename to BFD_RELOC_AARCH64_TLSDESC_ADD_LO12. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elfnn-aarch64.c (IS_AARCH64_TLS_RELAX_RELOC): Update reloc names. (IS_AARCH64_TLSDESC_RELOC): Likewise. (elfNN_aarch64_howto_table): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. gas * config/tc-aarch64.c (reloc_table): Rename BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12. Rname BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC to BFD_RELOC_AARCH64_TLSDESC_ADD_LO12. (md_apply_fix): Likewise. (aarch64_force_relocation): Likewise. * testsuite/gas/aarch64/tls.d: Update regexp. ld * testsuite/ld-aarch64/ifunc-5r-local.d: Update regexp.
2017-03-13 10:58:04 +01:00
case BFD_RELOC_AARCH64_TLSDESC_ADD_LO12:
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
case BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21:
[AArch64] Add support for :tlsdesc: and TLSDESC_ADR_PREL21
2015-02-18 16:36:40 +01:00
case BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21:
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
case BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC:
Rename R_AARCH64_TLSDESC_LD64_LO12_NC to R_AARCH64_TLSDESC_LD64_LO12 and R_AARCH64_TLSDESC_ADD_LO12_NC to R_AARCH64_TLSDESC_ADD_LO12. PR binutils/21202 include * elf/aarch64.h (R_AARCH64_TLSDESC_LD64_LO12_NC): Rename to R_AARCH64_TLSDESC_LD64_LO12. (R_AARCH64_TLSDESC_ADD_LO12_NC): Rename to R_AARCH64_TLSDESC_ADD_LO12_NC. bfd * reloc.c (BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC): Rename to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12. (BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC): Rename to BFD_RELOC_AARCH64_TLSDESC_ADD_LO12. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elfnn-aarch64.c (IS_AARCH64_TLS_RELAX_RELOC): Update reloc names. (IS_AARCH64_TLSDESC_RELOC): Likewise. (elfNN_aarch64_howto_table): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. gas * config/tc-aarch64.c (reloc_table): Rename BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12. Rname BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC to BFD_RELOC_AARCH64_TLSDESC_ADD_LO12. (md_apply_fix): Likewise. (aarch64_force_relocation): Likewise. * testsuite/gas/aarch64/tls.d: Update regexp. ld * testsuite/ld-aarch64/ifunc-5r-local.d: Update regexp.
2017-03-13 10:58:04 +01:00
case BFD_RELOC_AARCH64_TLSDESC_LD64_LO12:
[AArch64] Add support for :tlsdesc: and TLSDESC_LD_PREL19
2015-02-18 16:37:35 +01:00
case BFD_RELOC_AARCH64_TLSDESC_LD_PREL19:
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
if (globals->root.sgot == NULL)
return bfd_reloc_notsupported;
value = (symbol_tlsdesc_got_offset (input_bfd, h, r_symndx)
+ globals->root.sgotplt->output_section->vma
2014-01-14 Michael Hudson-Doyle <michael.hudson@linaro.org> Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org> bfd/ * elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Use correct offset while calculating relocation address. (elfNN_aarch64_create_small_pltn_entry): Likewise. (elfNN_aarch64_init_small_plt0_entry): Likewise.
2014-01-14 15:53:50 +01:00
+ globals->root.sgotplt->output_offset
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
+ globals->sgotplt_jump_table_size);
AArch64: Fix LD crash on weak and undefined TLS symbols. (PR/24602). This patch fixes a few linker crashes due to TLS code reaching an assert when it shouldn't. The first scenario is with weak TLS symbols that remain weak during linking. In this case the mid-end would not have seen a TLS symbol and so wouldn't have allocated the TLS section. We currently assert here and the linker crashes with a not very useful message. This patch changes this to return the value 0 for the TLS symbol in question emulating what lld and gold and other BFD targets do. However because weak TLS is implementation defined and we don't define any behavior for it I also emit a warning to the user to inform them of such. Secondly when a strong TLS reference is undefined. The linker crashes even after it correctly reported that there is an undefined reference. This changes it so that it gracefully exits and reports a useful error. bfd/ChangeLog: PR ld/24601 * elfnn-aarch64.c (aarch64_relocate): Handle weak TLS and undefined TLS. Also Pass input_bfd to _bfd_aarch64_elf_resolve_relocation. * elfxx-aarch64.c (_bfd_aarch64_elf_resolve_relocation): Use it. * elfxx-aarch64.h (_bfd_aarch64_elf_resolve_relocation): Emit warning for weak TLS. ld/ChangeLog: PR ld/24601 * testsuite/ld-aarch64/aarch64-elf.exp (undef-tls, weak-tls): New. * testsuite/ld-aarch64/undef-tls.d: New test. * testsuite/ld-aarch64/undef-tls.s: New test. * testsuite/ld-aarch64/weak-tls.d: New test. * testsuite/ld-aarch64/weak-tls.s: New test.
2019-08-22 12:35:35 +02:00
value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
place, value,
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
0, weak_undef_p);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
*unresolved_reloc_p = FALSE;
break;
[LD][AARCH64]Add TLSDESC support for large memory model. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_tls_transition_without_check): Add relax transitions for TLSDESC_ADD, TLSDESC_LDR, TLSDESC_OFF_G0_NC, TLSDESC_OFF_G1. (aarch64_tls_transition_without_check): Add relaxation support. (aarch64_reloc_got_type): Add support. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/aarch64-elf.exp: Run new test. * ld-aarch64/tls-large-desc.d: New. * ld-aarch64/tls-large-desc.s: New. * ld-aarch64/tls-relax-large-desc-ie.d: New. * ld-aarch64/tls-relax-large-desc-ie.s: New. * ld-aarch64/tls-relax-large-desc-le.d: New. * ld-aarch64/tls-relax-large-desc-le.s: New.
2015-10-02 18:43:08 +02:00
case BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC:
case BFD_RELOC_AARCH64_TLSDESC_OFF_G1:
if (globals->root.sgot == NULL)
return bfd_reloc_notsupported;
value = (symbol_tlsdesc_got_offset (input_bfd, h, r_symndx)
+ globals->root.sgotplt->output_section->vma
+ globals->root.sgotplt->output_offset
+ globals->sgotplt_jump_table_size);
value -= (globals->root.sgot->output_section->vma
+ globals->root.sgot->output_offset);
AArch64: Fix LD crash on weak and undefined TLS symbols. (PR/24602). This patch fixes a few linker crashes due to TLS code reaching an assert when it shouldn't. The first scenario is with weak TLS symbols that remain weak during linking. In this case the mid-end would not have seen a TLS symbol and so wouldn't have allocated the TLS section. We currently assert here and the linker crashes with a not very useful message. This patch changes this to return the value 0 for the TLS symbol in question emulating what lld and gold and other BFD targets do. However because weak TLS is implementation defined and we don't define any behavior for it I also emit a warning to the user to inform them of such. Secondly when a strong TLS reference is undefined. The linker crashes even after it correctly reported that there is an undefined reference. This changes it so that it gracefully exits and reports a useful error. bfd/ChangeLog: PR ld/24601 * elfnn-aarch64.c (aarch64_relocate): Handle weak TLS and undefined TLS. Also Pass input_bfd to _bfd_aarch64_elf_resolve_relocation. * elfxx-aarch64.c (_bfd_aarch64_elf_resolve_relocation): Use it. * elfxx-aarch64.h (_bfd_aarch64_elf_resolve_relocation): Emit warning for weak TLS. ld/ChangeLog: PR ld/24601 * testsuite/ld-aarch64/aarch64-elf.exp (undef-tls, weak-tls): New. * testsuite/ld-aarch64/undef-tls.d: New test. * testsuite/ld-aarch64/undef-tls.s: New test. * testsuite/ld-aarch64/weak-tls.d: New test. * testsuite/ld-aarch64/weak-tls.s: New test.
2019-08-22 12:35:35 +02:00
value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
place, value,
[LD][AARCH64]Add TLSDESC support for large memory model. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_tls_transition_without_check): Add relax transitions for TLSDESC_ADD, TLSDESC_LDR, TLSDESC_OFF_G0_NC, TLSDESC_OFF_G1. (aarch64_tls_transition_without_check): Add relaxation support. (aarch64_reloc_got_type): Add support. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/aarch64-elf.exp: Run new test. * ld-aarch64/tls-large-desc.d: New. * ld-aarch64/tls-large-desc.s: New. * ld-aarch64/tls-relax-large-desc-ie.d: New. * ld-aarch64/tls-relax-large-desc-ie.s: New. * ld-aarch64/tls-relax-large-desc-le.d: New. * ld-aarch64/tls-relax-large-desc-le.s: New.
2015-10-02 18:43:08 +02:00
0, weak_undef_p);
*unresolved_reloc_p = FALSE;
break;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
default:
return bfd_reloc_notsupported;
}
if (saved_addend)
*saved_addend = value;
/* Only apply the final relocation in a sequence. */
if (save_addend)
return bfd_reloc_continue;
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
return _bfd_aarch64_elf_put_addend (input_bfd, hit_data, bfd_r_type,
howto, value);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
}
Fix AArch64 relocation handling in ILP32 mode. bfd * elfnn-aarch64.c: Fix relaxations for ILP32 mode. ld * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests. * testsuite/ld-aarch64/tls-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-all-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gd-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-3-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-le-ilp32.d: New test.
2017-01-23 18:07:13 +01:00
/* LP64 and ILP32 operates on x- and w-registers respectively.
Next definitions take into account the difference between
corresponding machine codes. R means x-register if the target
arch is LP64, and w-register if the target is ILP32. */
#if ARCH_SIZE == 64
# define add_R0_R0 (0x91000000)
# define add_R0_R0_R1 (0x8b000020)
# define add_R0_R1 (0x91400020)
# define ldr_R0 (0x58000000)
# define ldr_R0_mask(i) (i & 0xffffffe0)
# define ldr_R0_x0 (0xf9400000)
# define ldr_hw_R0 (0xf2a00000)
# define movk_R0 (0xf2800000)
# define movz_R0 (0xd2a00000)
# define movz_hw_R0 (0xd2c00000)
#else /*ARCH_SIZE == 32 */
# define add_R0_R0 (0x11000000)
# define add_R0_R0_R1 (0x0b000020)
# define add_R0_R1 (0x11400020)
# define ldr_R0 (0x18000000)
# define ldr_R0_mask(i) (i & 0xbfffffe0)
# define ldr_R0_x0 (0xb9400000)
# define ldr_hw_R0 (0x72a00000)
# define movk_R0 (0x72800000)
# define movz_R0 (0x52a00000)
# define movz_hw_R0 (0x52c00000)
#endif
AArch64: Fix regression in Cortex A53 erratum when PIE. (PR ld/23904) The fix for PR ld/22263 causes TLS relocations using ADRP to be relaxed into MOVZ, however this causes issues for the erratum code. The erratum code scans the input sections looking for ADRP instructions and notes their location in the stream. It then later tries to find them again in order to generate the linker stubs. Due to the relaxation it instead finds a MOVZ and hard aborts. Since this relaxation is a valid one, and in which case the erratum no longer applies, it shouldn't abort but instead just continue. This changes the TLS relaxation code such that when it finds an ADRP and it relaxes it, it removes the erratum entry from the work list by changing the stub type into none so the stub is ignored. The entry is not actually removed as removal is a more expensive operation and we have already allocated the memory anyway. The clearing is done for IE->LE and GD->LE relaxations, and a testcase is added for the IE case. The GD case I believe to be impossible to get together with the erratum sequence due to the required BL which would break the sequence. However to cover all basis I have added the guard there as well. build on native hardware and regtested on aarch64-none-elf, aarch64-none-elf (32 bit host), aarch64-none-linux-gnu, aarch64-none-linux-gnu (32 bit host) Cross-compiled and regtested on aarch64-none-linux-gnu, aarch64_be-none-linux-gnu Testcase in PR23940 tested and works as expected now and benchmarks ran on A53 showing no regressions and no issues. bfd/ChangeLog: PR ld/23904 * elfnn-aarch64.c (_bfd_aarch64_adrp_p): Use existing constants. (_bfd_aarch64_erratum_843419_branch_to_stub): Use _bfd_aarch64_adrp_p. (struct erratum_835769_branch_to_stub_clear_data): New. (_bfd_aarch64_erratum_843419_clear_stub): New. (clear_erratum_843419_entry): New. (elfNN_aarch64_tls_relax): Use it. (elfNN_aarch64_relocate_section): Pass input_section. (aarch64_map_one_stub): Handle branch type none as valid. ld/ChangeLog: PR ld/23904 * testsuite/ld-aarch64/aarch64-elf.exp: Add erratum843419_tls_ie. * testsuite/ld-aarch64/erratum843419_tls_ie.d: New test. * testsuite/ld-aarch64/erratum843419_tls_ie.s: New test.
2018-11-27 13:33:21 +01:00
/* Structure to hold payload for _bfd_aarch64_erratum_843419_clear_stub,
it is used to identify the stub information to reset. */
struct erratum_843419_branch_to_stub_clear_data
{
bfd_vma adrp_offset;
asection *output_section;
};
/* Clear the erratum information for GEN_ENTRY if the ADRP_OFFSET and
section inside IN_ARG matches. The clearing is done by setting the
stub_type to none. */
static bfd_boolean
_bfd_aarch64_erratum_843419_clear_stub (struct bfd_hash_entry *gen_entry,
void *in_arg)
{
struct elf_aarch64_stub_hash_entry *stub_entry
= (struct elf_aarch64_stub_hash_entry *) gen_entry;
struct erratum_843419_branch_to_stub_clear_data *data
= (struct erratum_843419_branch_to_stub_clear_data *) in_arg;
if (stub_entry->target_section != data->output_section
|| stub_entry->stub_type != aarch64_stub_erratum_843419_veneer
|| stub_entry->adrp_offset != data->adrp_offset)
return TRUE;
/* Change the stub type instead of removing the entry, removing from the hash
table would be slower and we have already reserved the memory for the entry
so there wouldn't be much gain. Changing the stub also keeps around a
record of what was there before. */
stub_entry->stub_type = aarch64_stub_none;
/* We're done and there could have been only one matching stub at that
particular offset, so abort further traversal. */
return FALSE;
}
/* TLS Relaxations may relax an adrp sequence that matches the erratum 843419
sequence. In this case the erratum no longer applies and we need to remove
the entry from the pending stub generation. This clears matching adrp insn
at ADRP_OFFSET in INPUT_SECTION in the stub table defined in GLOBALS. */
static void
clear_erratum_843419_entry (struct elf_aarch64_link_hash_table *globals,
bfd_vma adrp_offset, asection *input_section)
{
AArch64: Implement choice between Cortex-A53 erratum workarounds. (PR ld/24373) The Cortex-A53 erratum currently has two ways it can resolve the erratum when using the flag --fix-cortex-a53-843419: 1) If the address is within the range of an ADR instruction it rewrites the ADRP into an ADR, and those doesn't need the use of a veneer. 2) If the address is not within range, it adds a branch to a veneer which will execute the final bit of the erratum workaround and branch back to the call site. When we do this we always generate the veneers and we always align the size of the text section to 4KB. This is because we only know which workaround we can use after all linking has finished and all addresses are known. This means even though the veneers are not used, we still generate the section and we still change the size of the input section. This is problematic for small memory devices as this would require the user to take about a ~4KB hit in memory even though it's not even used. Since there's no real way to restart the linking process from the final write phase this patch solves the issue by allowing the user more control over which erratum workaround gets used. Concretely this changes the option --fix-cortex-a53-843419 to take optional arguments --fix-cortex-a53-843419[=full|adr|adrp] - full (default): Use both ADRP and ADR workaround. This is equivalent to not specifying any options and is the default behavior before this patch. - adr: Only use the ADR workaround, this will not cause any increase in binary size but linking will fail if the referenced address is out of range of an ADR instruction. - adrp: Use only the ADRP workaround, this will never rewrite your ADRP. In the cases where the user knows how big their binaries are the `adr` option would prevent the unneeded overhead. bfd/ChangeLog: PR ld/24373 * bfd-in.h (enum erratum_84319_opts): New (bfd_elf64_aarch64_set_options, bfd_elf32_aarch64_set_options): Change int to enum erratum_84319_opts. * bfd-in2.h: Regenerate. * elfnn-aarch64.c (struct elf_aarch64_link_hash_table): Change fix_erratum_843419 to use new enum, remove fix_erratum_843419_adr. (_bfd_aarch64_add_stub_entry_after): Conditionally create erratum stub. (aarch64_size_one_stub): Conditionally size erratum 843419 stubs. (_bfd_aarch64_resize_stubs): Amend comment. (elfNN_aarch64_size_stubs): Don't generate stubs when no workaround requested. (bfd_elfNN_aarch64_set_options): Use new fix_erratum_843419 enum. (_bfd_aarch64_erratum_843419_branch_to_stub): Implement selection of erratum workaround. (clear_erratum_843419_entry): Update erratum conditional. ld/ChangeLog: PR ld/24373 * emultempl/aarch64elf.em (PARSE_AND_LIST_LONGOPTS): Add optional args to flags. * NEWS: Add changes to flag. (PARSE_AND_LIST_OPTIONS): Update help descriptions. (PARSE_AND_LIST_ARGS_CASES): Add new options to parser. * testsuite/ld-aarch64/aarch64-elf.exp: Add new run_dump_tests. * testsuite/ld-aarch64/erratum843419-adr.d: New test. * testsuite/ld-aarch64/erratum843419-adrp.d: New test. * testsuite/ld-aarch64/erratum843419-far-adr.d: New test. * testsuite/ld-aarch64/erratum843419-far-full.d: New test. * testsuite/ld-aarch64/erratum843419-far.s: New test. * testsuite/ld-aarch64/erratum843419-full.d: New test. * testsuite/ld-aarch64/erratum843419-near.s: New test. * testsuite/ld-aarch64/erratum843419-no-args.d: New test.
2019-05-21 14:04:08 +02:00
if (globals->fix_erratum_843419 & ERRAT_ADRP)
AArch64: Fix regression in Cortex A53 erratum when PIE. (PR ld/23904) The fix for PR ld/22263 causes TLS relocations using ADRP to be relaxed into MOVZ, however this causes issues for the erratum code. The erratum code scans the input sections looking for ADRP instructions and notes their location in the stream. It then later tries to find them again in order to generate the linker stubs. Due to the relaxation it instead finds a MOVZ and hard aborts. Since this relaxation is a valid one, and in which case the erratum no longer applies, it shouldn't abort but instead just continue. This changes the TLS relaxation code such that when it finds an ADRP and it relaxes it, it removes the erratum entry from the work list by changing the stub type into none so the stub is ignored. The entry is not actually removed as removal is a more expensive operation and we have already allocated the memory anyway. The clearing is done for IE->LE and GD->LE relaxations, and a testcase is added for the IE case. The GD case I believe to be impossible to get together with the erratum sequence due to the required BL which would break the sequence. However to cover all basis I have added the guard there as well. build on native hardware and regtested on aarch64-none-elf, aarch64-none-elf (32 bit host), aarch64-none-linux-gnu, aarch64-none-linux-gnu (32 bit host) Cross-compiled and regtested on aarch64-none-linux-gnu, aarch64_be-none-linux-gnu Testcase in PR23940 tested and works as expected now and benchmarks ran on A53 showing no regressions and no issues. bfd/ChangeLog: PR ld/23904 * elfnn-aarch64.c (_bfd_aarch64_adrp_p): Use existing constants. (_bfd_aarch64_erratum_843419_branch_to_stub): Use _bfd_aarch64_adrp_p. (struct erratum_835769_branch_to_stub_clear_data): New. (_bfd_aarch64_erratum_843419_clear_stub): New. (clear_erratum_843419_entry): New. (elfNN_aarch64_tls_relax): Use it. (elfNN_aarch64_relocate_section): Pass input_section. (aarch64_map_one_stub): Handle branch type none as valid. ld/ChangeLog: PR ld/23904 * testsuite/ld-aarch64/aarch64-elf.exp: Add erratum843419_tls_ie. * testsuite/ld-aarch64/erratum843419_tls_ie.d: New test. * testsuite/ld-aarch64/erratum843419_tls_ie.s: New test.
2018-11-27 13:33:21 +01:00
{
struct erratum_843419_branch_to_stub_clear_data data;
data.adrp_offset = adrp_offset;
data.output_section = input_section;
bfd_hash_traverse (&globals->stub_hash_table,
_bfd_aarch64_erratum_843419_clear_stub, &data);
}
}
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* Handle TLS relaxations. Relaxing is possible for symbols that use
R_AARCH64_TLSDESC_ADR_{PAGE, LD64_LO12_NC, ADD_LO12_NC} during a static
link.
Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
is to then call final_link_relocate. Return other values in the
case of error. */
static bfd_reloc_status_type
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_tls_relax (struct elf_aarch64_link_hash_table *globals,
AArch64: Fix regression in Cortex A53 erratum when PIE. (PR ld/23904) The fix for PR ld/22263 causes TLS relocations using ADRP to be relaxed into MOVZ, however this causes issues for the erratum code. The erratum code scans the input sections looking for ADRP instructions and notes their location in the stream. It then later tries to find them again in order to generate the linker stubs. Due to the relaxation it instead finds a MOVZ and hard aborts. Since this relaxation is a valid one, and in which case the erratum no longer applies, it shouldn't abort but instead just continue. This changes the TLS relaxation code such that when it finds an ADRP and it relaxes it, it removes the erratum entry from the work list by changing the stub type into none so the stub is ignored. The entry is not actually removed as removal is a more expensive operation and we have already allocated the memory anyway. The clearing is done for IE->LE and GD->LE relaxations, and a testcase is added for the IE case. The GD case I believe to be impossible to get together with the erratum sequence due to the required BL which would break the sequence. However to cover all basis I have added the guard there as well. build on native hardware and regtested on aarch64-none-elf, aarch64-none-elf (32 bit host), aarch64-none-linux-gnu, aarch64-none-linux-gnu (32 bit host) Cross-compiled and regtested on aarch64-none-linux-gnu, aarch64_be-none-linux-gnu Testcase in PR23940 tested and works as expected now and benchmarks ran on A53 showing no regressions and no issues. bfd/ChangeLog: PR ld/23904 * elfnn-aarch64.c (_bfd_aarch64_adrp_p): Use existing constants. (_bfd_aarch64_erratum_843419_branch_to_stub): Use _bfd_aarch64_adrp_p. (struct erratum_835769_branch_to_stub_clear_data): New. (_bfd_aarch64_erratum_843419_clear_stub): New. (clear_erratum_843419_entry): New. (elfNN_aarch64_tls_relax): Use it. (elfNN_aarch64_relocate_section): Pass input_section. (aarch64_map_one_stub): Handle branch type none as valid. ld/ChangeLog: PR ld/23904 * testsuite/ld-aarch64/aarch64-elf.exp: Add erratum843419_tls_ie. * testsuite/ld-aarch64/erratum843419_tls_ie.d: New test. * testsuite/ld-aarch64/erratum843419_tls_ie.s: New test.
2018-11-27 13:33:21 +01:00
bfd *input_bfd, asection *input_section,
bfd_byte *contents, Elf_Internal_Rela *rel,
struct elf_link_hash_entry *h)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
bfd_boolean is_local = h == NULL;
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
unsigned int r_type = ELFNN_R_TYPE (rel->r_info);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
unsigned long insn;
BFD_ASSERT (globals && input_bfd && contents && rel);
unrecognized/unsupported reloc message It must get boring translating all the variants we have of unrecognized/unsupported/invalid/unexpected reloc number. This patch cuts down on the number of variations. * aoutx.h, * coff-alpha.c, * coff-i860.c, * coff-m68k.c, * coff-mcore.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-w65.c, * elf-bfd.h, * elf-m10300.c, * elf.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-i370.c, * elf32-i386.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-iq2000.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-sh.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-v850.c, * elf32-vax.c, * elf32-visium.c, * elf32-wasm32.c, * elf32-xgate.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sparc.c, * elf64-x86-64.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-riscv.h, * elfxx-sparc.c, * elfxx-sparc.h, * reloc.c: Standardize unrecognized/unsupported reloc message.
2018-02-21 12:17:07 +01:00
switch (elfNN_aarch64_bfd_reloc_from_type (input_bfd, r_type))
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
case BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21:
[AArch64/BFD] Sort relocation case labels alphabetically 2015-05-19 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_tls_transition_without_check): Sort relocation case labels alphabetically. (elfNN_aarch64_final_link_relocate): Ditto. (elfNN_aarch64_tls_relax): Ditto. (elfNN_aarch64_relocate_section): Ditto. (elfNN_aarch64_gc_sweep_hook): Ditto. (elfNN_aarch64_check_relocs): Ditto. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Ditto. (_bfd_aarch64_elf_resolve_relocation): Ditto.
2015-05-20 11:58:43 +02:00
case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21:
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
if (is_local)
{
/* GD->LE relaxation:
Fix AArch64 relocation handling in ILP32 mode. bfd * elfnn-aarch64.c: Fix relaxations for ILP32 mode. ld * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests. * testsuite/ld-aarch64/tls-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-all-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gd-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-3-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-le-ilp32.d: New test.
2017-01-23 18:07:13 +01:00
adrp x0, :tlsgd:var => movz R0, :tprel_g1:var
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
or
Fix AArch64 relocation handling in ILP32 mode. bfd * elfnn-aarch64.c: Fix relaxations for ILP32 mode. ld * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests. * testsuite/ld-aarch64/tls-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-all-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gd-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-3-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-le-ilp32.d: New test.
2017-01-23 18:07:13 +01:00
adrp x0, :tlsdesc:var => movz R0, :tprel_g1:var
Where R is x for LP64, and w for ILP32. */
bfd_putl32 (movz_R0, contents + rel->r_offset);
AArch64: Fix regression in Cortex A53 erratum when PIE. (PR ld/23904) The fix for PR ld/22263 causes TLS relocations using ADRP to be relaxed into MOVZ, however this causes issues for the erratum code. The erratum code scans the input sections looking for ADRP instructions and notes their location in the stream. It then later tries to find them again in order to generate the linker stubs. Due to the relaxation it instead finds a MOVZ and hard aborts. Since this relaxation is a valid one, and in which case the erratum no longer applies, it shouldn't abort but instead just continue. This changes the TLS relaxation code such that when it finds an ADRP and it relaxes it, it removes the erratum entry from the work list by changing the stub type into none so the stub is ignored. The entry is not actually removed as removal is a more expensive operation and we have already allocated the memory anyway. The clearing is done for IE->LE and GD->LE relaxations, and a testcase is added for the IE case. The GD case I believe to be impossible to get together with the erratum sequence due to the required BL which would break the sequence. However to cover all basis I have added the guard there as well. build on native hardware and regtested on aarch64-none-elf, aarch64-none-elf (32 bit host), aarch64-none-linux-gnu, aarch64-none-linux-gnu (32 bit host) Cross-compiled and regtested on aarch64-none-linux-gnu, aarch64_be-none-linux-gnu Testcase in PR23940 tested and works as expected now and benchmarks ran on A53 showing no regressions and no issues. bfd/ChangeLog: PR ld/23904 * elfnn-aarch64.c (_bfd_aarch64_adrp_p): Use existing constants. (_bfd_aarch64_erratum_843419_branch_to_stub): Use _bfd_aarch64_adrp_p. (struct erratum_835769_branch_to_stub_clear_data): New. (_bfd_aarch64_erratum_843419_clear_stub): New. (clear_erratum_843419_entry): New. (elfNN_aarch64_tls_relax): Use it. (elfNN_aarch64_relocate_section): Pass input_section. (aarch64_map_one_stub): Handle branch type none as valid. ld/ChangeLog: PR ld/23904 * testsuite/ld-aarch64/aarch64-elf.exp: Add erratum843419_tls_ie. * testsuite/ld-aarch64/erratum843419_tls_ie.d: New test. * testsuite/ld-aarch64/erratum843419_tls_ie.s: New test.
2018-11-27 13:33:21 +01:00
/* We have relaxed the adrp into a mov, we may have to clear any
pending erratum fixes. */
clear_erratum_843419_entry (globals, rel->r_offset, input_section);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
return bfd_reloc_continue;
}
else
{
/* GD->IE relaxation:
adrp x0, :tlsgd:var => adrp x0, :gottprel:var
or
adrp x0, :tlsdesc:var => adrp x0, :gottprel:var
*/
return bfd_reloc_continue;
}
[AArch64] Add support for :tlsdesc: and TLSDESC_ADR_PREL21
2015-02-18 16:36:40 +01:00
case BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21:
BFD_ASSERT (0);
break;
[AArch64] Add support for :tlsdesc: and TLSDESC_LD_PREL19
2015-02-18 16:37:35 +01:00
case BFD_RELOC_AARCH64_TLSDESC_LD_PREL19:
if (is_local)
{
/* Tiny TLSDESC->LE relaxation:
BFD whitespace fixes Binutils is supposed to use tabs. In my git config I have whitespace = indent-with-non-tab,space-before-tab,trailing-space and I got annoyed enough seeing red in "git diff" output to fix the problems. * doc/header.sed: Trim trailing space when splitting lines. * aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-cris.c, * aout-ns32k.c, * aout-target.h, * aout-tic30.c, * aoutf1.h, * aoutx.h, * arc-got.h, * arc-plt.def, * arc-plt.h, * archive.c, * archive64.c, * archures.c, * armnetbsd.c, * bfd-in.h, * bfd.c, * bfdio.c, * binary.c, * bout.c, * cache.c, * cisco-core.c, * coff-alpha.c, * coff-apollo.c, * coff-arm.c, * coff-h8300.c, * coff-i386.c, * coff-i860.c, * coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mcore.c, * coff-mips.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-stgo32.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * compress.c, * corefile.c, * cpu-alpha.c, * cpu-arm.c, * cpu-avr.c, * cpu-bfin.c, * cpu-cr16.c, * cpu-cr16c.c, * cpu-crx.c, * cpu-d10v.c, * cpu-frv.c, * cpu-ft32.c, * cpu-i370.c, * cpu-i960.c, * cpu-ia64-opc.c, * cpu-ip2k.c, * cpu-lm32.c, * cpu-m32r.c, * cpu-mcore.c, * cpu-microblaze.c, * cpu-mips.c, * cpu-moxie.c, * cpu-mt.c, * cpu-nios2.c, * cpu-ns32k.c, * cpu-or1k.c, * cpu-powerpc.c, * cpu-pru.c, * cpu-sh.c, * cpu-spu.c, * cpu-v850.c, * cpu-v850_rh850.c, * cpu-xgate.c, * cpu-z80.c, * dwarf1.c, * dwarf2.c, * ecoff.c, * ecofflink.c, * ecoffswap.h, * elf-bfd.h, * elf-eh-frame.c, * elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf-s390-common.c, * elf-strtab.c, * elf-vxworks.c, * elf.c, * elf32-am33lin.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-avr.h, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-i860.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68hc1x.c, * elf32-m68hc1x.h, * elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nds32.h, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score.h, * elf32-score7.c, * elf32-sh-symbian.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilegx.c, * elf32-tilegx.h, * elf32-tilepro.c, * elf32-tilepro.h, * elf32-v850.c, * elf32-vax.c, * elf32-wasm32.c, * elf32-xc16x.c, * elf32-xgate.c, * elf32-xgate.h, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-tilegx.c, * elf64-tilegx.h, * elf64-x86-64.c, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-aarch64.h, * elfxx-ia64.c, * elfxx-ia64.h, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * elfxx-x86.h, * freebsd.h, * hash.c, * host-aout.c, * hp300hpux.c, * hppabsd-core.c, * hpux-core.c, * i386aout.c, * i386linux.c, * i386lynx.c, * i386mach3.c, * i386msdos.c, * i386netbsd.c, * ieee.c, * ihex.c, * irix-core.c, * libaout.h, * libbfd-in.h, * libbfd.c, * libcoff-in.h, * libnlm.h, * libpei.h, * libxcoff.h, * linker.c, * lynx-core.c, * m68k4knetbsd.c, * m68klinux.c, * m68knetbsd.c, * m88kmach3.c, * mach-o-aarch64.c, * mach-o-arm.c, * mach-o-i386.c, * mach-o-target.c, * mach-o-x86-64.c, * mach-o.c, * mach-o.h, * merge.c, * mipsbsd.c, * mmo.c, * netbsd.h, * netbsd-core.c, * newsos3.c, * nlm-target.h, * nlm32-ppc.c, * nlm32-sparc.c, * nlmcode.h, * ns32k.h, * ns32knetbsd.c, * oasys.c, * opncls.c, * pc532-mach.c, * pdp11.c, * pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-mips.c, * pe-x86_64.c, * peXXigen.c, * pef.c, * pef.h, * pei-arm.c, * pei-i386.c, * pei-mcore.c, * pei-x86_64.c, * peicode.h, * plugin.c, * ppcboot.c, * ptrace-core.c, * reloc.c, * riscix.c, * rs6000-core.c, * section.c, * som.c, * som.h, * sparclinux.c, * sparcnetbsd.c, * srec.c, * stabs.c, * sunos.c, * syms.c, * targets.c, * tekhex.c, * trad-core.c, * vax1knetbsd.c, * vaxnetbsd.c, * verilog.c, * versados.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * wasm-module.c, * wasm-module.h, * xcofflink.c, * xsym.c, * xsym.h: Whitespace fixes. * bfd-in2.h, * libbfd.h, * libcoff.h: Regenerate.
2017-12-05 23:56:00 +01:00
ldr x1, :tlsdesc:var => movz R0, #:tprel_g1:var
adr x0, :tlsdesc:var => movk R0, #:tprel_g0_nc:var
[AArch64] Add support for :tlsdesc: and TLSDESC_LD_PREL19
2015-02-18 16:37:35 +01:00
.tlsdesccall var
BFD whitespace fixes Binutils is supposed to use tabs. In my git config I have whitespace = indent-with-non-tab,space-before-tab,trailing-space and I got annoyed enough seeing red in "git diff" output to fix the problems. * doc/header.sed: Trim trailing space when splitting lines. * aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-cris.c, * aout-ns32k.c, * aout-target.h, * aout-tic30.c, * aoutf1.h, * aoutx.h, * arc-got.h, * arc-plt.def, * arc-plt.h, * archive.c, * archive64.c, * archures.c, * armnetbsd.c, * bfd-in.h, * bfd.c, * bfdio.c, * binary.c, * bout.c, * cache.c, * cisco-core.c, * coff-alpha.c, * coff-apollo.c, * coff-arm.c, * coff-h8300.c, * coff-i386.c, * coff-i860.c, * coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mcore.c, * coff-mips.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-stgo32.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * compress.c, * corefile.c, * cpu-alpha.c, * cpu-arm.c, * cpu-avr.c, * cpu-bfin.c, * cpu-cr16.c, * cpu-cr16c.c, * cpu-crx.c, * cpu-d10v.c, * cpu-frv.c, * cpu-ft32.c, * cpu-i370.c, * cpu-i960.c, * cpu-ia64-opc.c, * cpu-ip2k.c, * cpu-lm32.c, * cpu-m32r.c, * cpu-mcore.c, * cpu-microblaze.c, * cpu-mips.c, * cpu-moxie.c, * cpu-mt.c, * cpu-nios2.c, * cpu-ns32k.c, * cpu-or1k.c, * cpu-powerpc.c, * cpu-pru.c, * cpu-sh.c, * cpu-spu.c, * cpu-v850.c, * cpu-v850_rh850.c, * cpu-xgate.c, * cpu-z80.c, * dwarf1.c, * dwarf2.c, * ecoff.c, * ecofflink.c, * ecoffswap.h, * elf-bfd.h, * elf-eh-frame.c, * elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf-s390-common.c, * elf-strtab.c, * elf-vxworks.c, * elf.c, * elf32-am33lin.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-avr.h, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-i860.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68hc1x.c, * elf32-m68hc1x.h, * elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nds32.h, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score.h, * elf32-score7.c, * elf32-sh-symbian.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilegx.c, * elf32-tilegx.h, * elf32-tilepro.c, * elf32-tilepro.h, * elf32-v850.c, * elf32-vax.c, * elf32-wasm32.c, * elf32-xc16x.c, * elf32-xgate.c, * elf32-xgate.h, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-tilegx.c, * elf64-tilegx.h, * elf64-x86-64.c, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-aarch64.h, * elfxx-ia64.c, * elfxx-ia64.h, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * elfxx-x86.h, * freebsd.h, * hash.c, * host-aout.c, * hp300hpux.c, * hppabsd-core.c, * hpux-core.c, * i386aout.c, * i386linux.c, * i386lynx.c, * i386mach3.c, * i386msdos.c, * i386netbsd.c, * ieee.c, * ihex.c, * irix-core.c, * libaout.h, * libbfd-in.h, * libbfd.c, * libcoff-in.h, * libnlm.h, * libpei.h, * libxcoff.h, * linker.c, * lynx-core.c, * m68k4knetbsd.c, * m68klinux.c, * m68knetbsd.c, * m88kmach3.c, * mach-o-aarch64.c, * mach-o-arm.c, * mach-o-i386.c, * mach-o-target.c, * mach-o-x86-64.c, * mach-o.c, * mach-o.h, * merge.c, * mipsbsd.c, * mmo.c, * netbsd.h, * netbsd-core.c, * newsos3.c, * nlm-target.h, * nlm32-ppc.c, * nlm32-sparc.c, * nlmcode.h, * ns32k.h, * ns32knetbsd.c, * oasys.c, * opncls.c, * pc532-mach.c, * pdp11.c, * pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-mips.c, * pe-x86_64.c, * peXXigen.c, * pef.c, * pef.h, * pei-arm.c, * pei-i386.c, * pei-mcore.c, * pei-x86_64.c, * peicode.h, * plugin.c, * ppcboot.c, * ptrace-core.c, * reloc.c, * riscix.c, * rs6000-core.c, * section.c, * som.c, * som.h, * sparclinux.c, * sparcnetbsd.c, * srec.c, * stabs.c, * sunos.c, * syms.c, * targets.c, * tekhex.c, * trad-core.c, * vax1knetbsd.c, * vaxnetbsd.c, * verilog.c, * versados.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * wasm-module.c, * wasm-module.h, * xcofflink.c, * xsym.c, * xsym.h: Whitespace fixes. * bfd-in2.h, * libbfd.h, * libcoff.h: Regenerate.
2017-12-05 23:56:00 +01:00
blr x1 => nop
Fix AArch64 relocation handling in ILP32 mode. bfd * elfnn-aarch64.c: Fix relaxations for ILP32 mode. ld * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests. * testsuite/ld-aarch64/tls-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-all-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gd-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-3-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-le-ilp32.d: New test.
2017-01-23 18:07:13 +01:00
Where R is x for LP64, and w for ILP32. */
[AArch64] Add support for :tlsdesc: and TLSDESC_LD_PREL19
2015-02-18 16:37:35 +01:00
BFD_ASSERT (ELFNN_R_TYPE (rel[1].r_info) == AARCH64_R (TLSDESC_ADR_PREL21));
BFD_ASSERT (ELFNN_R_TYPE (rel[2].r_info) == AARCH64_R (TLSDESC_CALL));
rel[1].r_info = ELFNN_R_INFO (ELFNN_R_SYM (rel->r_info),
AARCH64_R (TLSLE_MOVW_TPREL_G0_NC));
rel[2].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
Fix AArch64 relocation handling in ILP32 mode. bfd * elfnn-aarch64.c: Fix relaxations for ILP32 mode. ld * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests. * testsuite/ld-aarch64/tls-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-all-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gd-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-3-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-le-ilp32.d: New test.
2017-01-23 18:07:13 +01:00
bfd_putl32 (movz_R0, contents + rel->r_offset);
bfd_putl32 (movk_R0, contents + rel->r_offset + 4);
[AArch64] Add support for :tlsdesc: and TLSDESC_LD_PREL19
2015-02-18 16:37:35 +01:00
bfd_putl32 (INSN_NOP, contents + rel->r_offset + 8);
return bfd_reloc_continue;
}
else
{
/* Tiny TLSDESC->IE relaxation:
BFD whitespace fixes Binutils is supposed to use tabs. In my git config I have whitespace = indent-with-non-tab,space-before-tab,trailing-space and I got annoyed enough seeing red in "git diff" output to fix the problems. * doc/header.sed: Trim trailing space when splitting lines. * aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-cris.c, * aout-ns32k.c, * aout-target.h, * aout-tic30.c, * aoutf1.h, * aoutx.h, * arc-got.h, * arc-plt.def, * arc-plt.h, * archive.c, * archive64.c, * archures.c, * armnetbsd.c, * bfd-in.h, * bfd.c, * bfdio.c, * binary.c, * bout.c, * cache.c, * cisco-core.c, * coff-alpha.c, * coff-apollo.c, * coff-arm.c, * coff-h8300.c, * coff-i386.c, * coff-i860.c, * coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mcore.c, * coff-mips.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-stgo32.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * compress.c, * corefile.c, * cpu-alpha.c, * cpu-arm.c, * cpu-avr.c, * cpu-bfin.c, * cpu-cr16.c, * cpu-cr16c.c, * cpu-crx.c, * cpu-d10v.c, * cpu-frv.c, * cpu-ft32.c, * cpu-i370.c, * cpu-i960.c, * cpu-ia64-opc.c, * cpu-ip2k.c, * cpu-lm32.c, * cpu-m32r.c, * cpu-mcore.c, * cpu-microblaze.c, * cpu-mips.c, * cpu-moxie.c, * cpu-mt.c, * cpu-nios2.c, * cpu-ns32k.c, * cpu-or1k.c, * cpu-powerpc.c, * cpu-pru.c, * cpu-sh.c, * cpu-spu.c, * cpu-v850.c, * cpu-v850_rh850.c, * cpu-xgate.c, * cpu-z80.c, * dwarf1.c, * dwarf2.c, * ecoff.c, * ecofflink.c, * ecoffswap.h, * elf-bfd.h, * elf-eh-frame.c, * elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf-s390-common.c, * elf-strtab.c, * elf-vxworks.c, * elf.c, * elf32-am33lin.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-avr.h, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-i860.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68hc1x.c, * elf32-m68hc1x.h, * elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nds32.h, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score.h, * elf32-score7.c, * elf32-sh-symbian.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilegx.c, * elf32-tilegx.h, * elf32-tilepro.c, * elf32-tilepro.h, * elf32-v850.c, * elf32-vax.c, * elf32-wasm32.c, * elf32-xc16x.c, * elf32-xgate.c, * elf32-xgate.h, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-tilegx.c, * elf64-tilegx.h, * elf64-x86-64.c, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-aarch64.h, * elfxx-ia64.c, * elfxx-ia64.h, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * elfxx-x86.h, * freebsd.h, * hash.c, * host-aout.c, * hp300hpux.c, * hppabsd-core.c, * hpux-core.c, * i386aout.c, * i386linux.c, * i386lynx.c, * i386mach3.c, * i386msdos.c, * i386netbsd.c, * ieee.c, * ihex.c, * irix-core.c, * libaout.h, * libbfd-in.h, * libbfd.c, * libcoff-in.h, * libnlm.h, * libpei.h, * libxcoff.h, * linker.c, * lynx-core.c, * m68k4knetbsd.c, * m68klinux.c, * m68knetbsd.c, * m88kmach3.c, * mach-o-aarch64.c, * mach-o-arm.c, * mach-o-i386.c, * mach-o-target.c, * mach-o-x86-64.c, * mach-o.c, * mach-o.h, * merge.c, * mipsbsd.c, * mmo.c, * netbsd.h, * netbsd-core.c, * newsos3.c, * nlm-target.h, * nlm32-ppc.c, * nlm32-sparc.c, * nlmcode.h, * ns32k.h, * ns32knetbsd.c, * oasys.c, * opncls.c, * pc532-mach.c, * pdp11.c, * pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-mips.c, * pe-x86_64.c, * peXXigen.c, * pef.c, * pef.h, * pei-arm.c, * pei-i386.c, * pei-mcore.c, * pei-x86_64.c, * peicode.h, * plugin.c, * ppcboot.c, * ptrace-core.c, * reloc.c, * riscix.c, * rs6000-core.c, * section.c, * som.c, * som.h, * sparclinux.c, * sparcnetbsd.c, * srec.c, * stabs.c, * sunos.c, * syms.c, * targets.c, * tekhex.c, * trad-core.c, * vax1knetbsd.c, * vaxnetbsd.c, * verilog.c, * versados.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * wasm-module.c, * wasm-module.h, * xcofflink.c, * xsym.c, * xsym.h: Whitespace fixes. * bfd-in2.h, * libbfd.h, * libcoff.h: Regenerate.
2017-12-05 23:56:00 +01:00
ldr x1, :tlsdesc:var => ldr x0, :gottprel:var
adr x0, :tlsdesc:var => nop
[AArch64] Add support for :tlsdesc: and TLSDESC_LD_PREL19
2015-02-18 16:37:35 +01:00
.tlsdesccall var
BFD whitespace fixes Binutils is supposed to use tabs. In my git config I have whitespace = indent-with-non-tab,space-before-tab,trailing-space and I got annoyed enough seeing red in "git diff" output to fix the problems. * doc/header.sed: Trim trailing space when splitting lines. * aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-cris.c, * aout-ns32k.c, * aout-target.h, * aout-tic30.c, * aoutf1.h, * aoutx.h, * arc-got.h, * arc-plt.def, * arc-plt.h, * archive.c, * archive64.c, * archures.c, * armnetbsd.c, * bfd-in.h, * bfd.c, * bfdio.c, * binary.c, * bout.c, * cache.c, * cisco-core.c, * coff-alpha.c, * coff-apollo.c, * coff-arm.c, * coff-h8300.c, * coff-i386.c, * coff-i860.c, * coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mcore.c, * coff-mips.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-stgo32.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * compress.c, * corefile.c, * cpu-alpha.c, * cpu-arm.c, * cpu-avr.c, * cpu-bfin.c, * cpu-cr16.c, * cpu-cr16c.c, * cpu-crx.c, * cpu-d10v.c, * cpu-frv.c, * cpu-ft32.c, * cpu-i370.c, * cpu-i960.c, * cpu-ia64-opc.c, * cpu-ip2k.c, * cpu-lm32.c, * cpu-m32r.c, * cpu-mcore.c, * cpu-microblaze.c, * cpu-mips.c, * cpu-moxie.c, * cpu-mt.c, * cpu-nios2.c, * cpu-ns32k.c, * cpu-or1k.c, * cpu-powerpc.c, * cpu-pru.c, * cpu-sh.c, * cpu-spu.c, * cpu-v850.c, * cpu-v850_rh850.c, * cpu-xgate.c, * cpu-z80.c, * dwarf1.c, * dwarf2.c, * ecoff.c, * ecofflink.c, * ecoffswap.h, * elf-bfd.h, * elf-eh-frame.c, * elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf-s390-common.c, * elf-strtab.c, * elf-vxworks.c, * elf.c, * elf32-am33lin.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-avr.h, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-i860.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68hc1x.c, * elf32-m68hc1x.h, * elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nds32.h, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score.h, * elf32-score7.c, * elf32-sh-symbian.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilegx.c, * elf32-tilegx.h, * elf32-tilepro.c, * elf32-tilepro.h, * elf32-v850.c, * elf32-vax.c, * elf32-wasm32.c, * elf32-xc16x.c, * elf32-xgate.c, * elf32-xgate.h, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-tilegx.c, * elf64-tilegx.h, * elf64-x86-64.c, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-aarch64.h, * elfxx-ia64.c, * elfxx-ia64.h, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * elfxx-x86.h, * freebsd.h, * hash.c, * host-aout.c, * hp300hpux.c, * hppabsd-core.c, * hpux-core.c, * i386aout.c, * i386linux.c, * i386lynx.c, * i386mach3.c, * i386msdos.c, * i386netbsd.c, * ieee.c, * ihex.c, * irix-core.c, * libaout.h, * libbfd-in.h, * libbfd.c, * libcoff-in.h, * libnlm.h, * libpei.h, * libxcoff.h, * linker.c, * lynx-core.c, * m68k4knetbsd.c, * m68klinux.c, * m68knetbsd.c, * m88kmach3.c, * mach-o-aarch64.c, * mach-o-arm.c, * mach-o-i386.c, * mach-o-target.c, * mach-o-x86-64.c, * mach-o.c, * mach-o.h, * merge.c, * mipsbsd.c, * mmo.c, * netbsd.h, * netbsd-core.c, * newsos3.c, * nlm-target.h, * nlm32-ppc.c, * nlm32-sparc.c, * nlmcode.h, * ns32k.h, * ns32knetbsd.c, * oasys.c, * opncls.c, * pc532-mach.c, * pdp11.c, * pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-mips.c, * pe-x86_64.c, * peXXigen.c, * pef.c, * pef.h, * pei-arm.c, * pei-i386.c, * pei-mcore.c, * pei-x86_64.c, * peicode.h, * plugin.c, * ppcboot.c, * ptrace-core.c, * reloc.c, * riscix.c, * rs6000-core.c, * section.c, * som.c, * som.h, * sparclinux.c, * sparcnetbsd.c, * srec.c, * stabs.c, * sunos.c, * syms.c, * targets.c, * tekhex.c, * trad-core.c, * vax1knetbsd.c, * vaxnetbsd.c, * verilog.c, * versados.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * wasm-module.c, * wasm-module.h, * xcofflink.c, * xsym.c, * xsym.h: Whitespace fixes. * bfd-in2.h, * libbfd.h, * libcoff.h: Regenerate.
2017-12-05 23:56:00 +01:00
blr x1 => nop
[AArch64] Add support for :tlsdesc: and TLSDESC_LD_PREL19
2015-02-18 16:37:35 +01:00
*/
BFD_ASSERT (ELFNN_R_TYPE (rel[1].r_info) == AARCH64_R (TLSDESC_ADR_PREL21));
BFD_ASSERT (ELFNN_R_TYPE (rel[2].r_info) == AARCH64_R (TLSDESC_CALL));
rel[1].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
rel[2].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
Fix AArch64 relocation handling in ILP32 mode. bfd * elfnn-aarch64.c: Fix relaxations for ILP32 mode. ld * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests. * testsuite/ld-aarch64/tls-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-all-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gd-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-3-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-le-ilp32.d: New test.
2017-01-23 18:07:13 +01:00
bfd_putl32 (ldr_R0, contents + rel->r_offset);
[AArch64] Add support for :tlsdesc: and TLSDESC_LD_PREL19
2015-02-18 16:37:35 +01:00
bfd_putl32 (INSN_NOP, contents + rel->r_offset + 4);
bfd_putl32 (INSN_NOP, contents + rel->r_offset + 8);
return bfd_reloc_continue;
}
Add ADR :tlsgd: directive and TLSGD_ADR_PREL21 support.
2015-02-13 08:13:57 +01:00
case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21:
if (is_local)
{
/* Tiny GD->LE relaxation:
BFD whitespace fixes Binutils is supposed to use tabs. In my git config I have whitespace = indent-with-non-tab,space-before-tab,trailing-space and I got annoyed enough seeing red in "git diff" output to fix the problems. * doc/header.sed: Trim trailing space when splitting lines. * aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-cris.c, * aout-ns32k.c, * aout-target.h, * aout-tic30.c, * aoutf1.h, * aoutx.h, * arc-got.h, * arc-plt.def, * arc-plt.h, * archive.c, * archive64.c, * archures.c, * armnetbsd.c, * bfd-in.h, * bfd.c, * bfdio.c, * binary.c, * bout.c, * cache.c, * cisco-core.c, * coff-alpha.c, * coff-apollo.c, * coff-arm.c, * coff-h8300.c, * coff-i386.c, * coff-i860.c, * coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mcore.c, * coff-mips.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-stgo32.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * compress.c, * corefile.c, * cpu-alpha.c, * cpu-arm.c, * cpu-avr.c, * cpu-bfin.c, * cpu-cr16.c, * cpu-cr16c.c, * cpu-crx.c, * cpu-d10v.c, * cpu-frv.c, * cpu-ft32.c, * cpu-i370.c, * cpu-i960.c, * cpu-ia64-opc.c, * cpu-ip2k.c, * cpu-lm32.c, * cpu-m32r.c, * cpu-mcore.c, * cpu-microblaze.c, * cpu-mips.c, * cpu-moxie.c, * cpu-mt.c, * cpu-nios2.c, * cpu-ns32k.c, * cpu-or1k.c, * cpu-powerpc.c, * cpu-pru.c, * cpu-sh.c, * cpu-spu.c, * cpu-v850.c, * cpu-v850_rh850.c, * cpu-xgate.c, * cpu-z80.c, * dwarf1.c, * dwarf2.c, * ecoff.c, * ecofflink.c, * ecoffswap.h, * elf-bfd.h, * elf-eh-frame.c, * elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf-s390-common.c, * elf-strtab.c, * elf-vxworks.c, * elf.c, * elf32-am33lin.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-avr.h, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-i860.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68hc1x.c, * elf32-m68hc1x.h, * elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nds32.h, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score.h, * elf32-score7.c, * elf32-sh-symbian.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilegx.c, * elf32-tilegx.h, * elf32-tilepro.c, * elf32-tilepro.h, * elf32-v850.c, * elf32-vax.c, * elf32-wasm32.c, * elf32-xc16x.c, * elf32-xgate.c, * elf32-xgate.h, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-tilegx.c, * elf64-tilegx.h, * elf64-x86-64.c, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-aarch64.h, * elfxx-ia64.c, * elfxx-ia64.h, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * elfxx-x86.h, * freebsd.h, * hash.c, * host-aout.c, * hp300hpux.c, * hppabsd-core.c, * hpux-core.c, * i386aout.c, * i386linux.c, * i386lynx.c, * i386mach3.c, * i386msdos.c, * i386netbsd.c, * ieee.c, * ihex.c, * irix-core.c, * libaout.h, * libbfd-in.h, * libbfd.c, * libcoff-in.h, * libnlm.h, * libpei.h, * libxcoff.h, * linker.c, * lynx-core.c, * m68k4knetbsd.c, * m68klinux.c, * m68knetbsd.c, * m88kmach3.c, * mach-o-aarch64.c, * mach-o-arm.c, * mach-o-i386.c, * mach-o-target.c, * mach-o-x86-64.c, * mach-o.c, * mach-o.h, * merge.c, * mipsbsd.c, * mmo.c, * netbsd.h, * netbsd-core.c, * newsos3.c, * nlm-target.h, * nlm32-ppc.c, * nlm32-sparc.c, * nlmcode.h, * ns32k.h, * ns32knetbsd.c, * oasys.c, * opncls.c, * pc532-mach.c, * pdp11.c, * pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-mips.c, * pe-x86_64.c, * peXXigen.c, * pef.c, * pef.h, * pei-arm.c, * pei-i386.c, * pei-mcore.c, * pei-x86_64.c, * peicode.h, * plugin.c, * ppcboot.c, * ptrace-core.c, * reloc.c, * riscix.c, * rs6000-core.c, * section.c, * som.c, * som.h, * sparclinux.c, * sparcnetbsd.c, * srec.c, * stabs.c, * sunos.c, * syms.c, * targets.c, * tekhex.c, * trad-core.c, * vax1knetbsd.c, * vaxnetbsd.c, * verilog.c, * versados.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * wasm-module.c, * wasm-module.h, * xcofflink.c, * xsym.c, * xsym.h: Whitespace fixes. * bfd-in2.h, * libbfd.h, * libcoff.h: Regenerate.
2017-12-05 23:56:00 +01:00
adr x0, :tlsgd:var => mrs x1, tpidr_el0
bl __tls_get_addr => add R0, R1, #:tprel_hi12:x, lsl #12
nop => add R0, R0, #:tprel_lo12_nc:x
Fix AArch64 relocation handling in ILP32 mode. bfd * elfnn-aarch64.c: Fix relaxations for ILP32 mode. ld * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests. * testsuite/ld-aarch64/tls-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-all-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gd-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-3-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-le-ilp32.d: New test.
2017-01-23 18:07:13 +01:00
Where R is x for LP64, and x for Ilp32. */
Add ADR :tlsgd: directive and TLSGD_ADR_PREL21 support.
2015-02-13 08:13:57 +01:00
/* First kill the tls_get_addr reloc on the bl instruction. */
BFD_ASSERT (rel->r_offset + 4 == rel[1].r_offset);
bfd_putl32 (0xd53bd041, contents + rel->r_offset + 0);
Fix AArch64 relocation handling in ILP32 mode. bfd * elfnn-aarch64.c: Fix relaxations for ILP32 mode. ld * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests. * testsuite/ld-aarch64/tls-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-all-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gd-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-3-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-le-ilp32.d: New test.
2017-01-23 18:07:13 +01:00
bfd_putl32 (add_R0_R1, contents + rel->r_offset + 4);
bfd_putl32 (add_R0_R0, contents + rel->r_offset + 8);
Add ADR :tlsgd: directive and TLSGD_ADR_PREL21 support.
2015-02-13 08:13:57 +01:00
rel[1].r_info = ELFNN_R_INFO (ELFNN_R_SYM (rel->r_info),
AARCH64_R (TLSLE_ADD_TPREL_LO12_NC));
rel[1].r_offset = rel->r_offset + 8;
/* Move the current relocation to the second instruction in
the sequence. */
rel->r_offset += 4;
rel->r_info = ELFNN_R_INFO (ELFNN_R_SYM (rel->r_info),
AARCH64_R (TLSLE_ADD_TPREL_HI12));
return bfd_reloc_continue;
}
else
{
/* Tiny GD->IE relaxation:
BFD whitespace fixes Binutils is supposed to use tabs. In my git config I have whitespace = indent-with-non-tab,space-before-tab,trailing-space and I got annoyed enough seeing red in "git diff" output to fix the problems. * doc/header.sed: Trim trailing space when splitting lines. * aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-cris.c, * aout-ns32k.c, * aout-target.h, * aout-tic30.c, * aoutf1.h, * aoutx.h, * arc-got.h, * arc-plt.def, * arc-plt.h, * archive.c, * archive64.c, * archures.c, * armnetbsd.c, * bfd-in.h, * bfd.c, * bfdio.c, * binary.c, * bout.c, * cache.c, * cisco-core.c, * coff-alpha.c, * coff-apollo.c, * coff-arm.c, * coff-h8300.c, * coff-i386.c, * coff-i860.c, * coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mcore.c, * coff-mips.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-stgo32.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * compress.c, * corefile.c, * cpu-alpha.c, * cpu-arm.c, * cpu-avr.c, * cpu-bfin.c, * cpu-cr16.c, * cpu-cr16c.c, * cpu-crx.c, * cpu-d10v.c, * cpu-frv.c, * cpu-ft32.c, * cpu-i370.c, * cpu-i960.c, * cpu-ia64-opc.c, * cpu-ip2k.c, * cpu-lm32.c, * cpu-m32r.c, * cpu-mcore.c, * cpu-microblaze.c, * cpu-mips.c, * cpu-moxie.c, * cpu-mt.c, * cpu-nios2.c, * cpu-ns32k.c, * cpu-or1k.c, * cpu-powerpc.c, * cpu-pru.c, * cpu-sh.c, * cpu-spu.c, * cpu-v850.c, * cpu-v850_rh850.c, * cpu-xgate.c, * cpu-z80.c, * dwarf1.c, * dwarf2.c, * ecoff.c, * ecofflink.c, * ecoffswap.h, * elf-bfd.h, * elf-eh-frame.c, * elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf-s390-common.c, * elf-strtab.c, * elf-vxworks.c, * elf.c, * elf32-am33lin.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-avr.h, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-i860.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68hc1x.c, * elf32-m68hc1x.h, * elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nds32.h, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score.h, * elf32-score7.c, * elf32-sh-symbian.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilegx.c, * elf32-tilegx.h, * elf32-tilepro.c, * elf32-tilepro.h, * elf32-v850.c, * elf32-vax.c, * elf32-wasm32.c, * elf32-xc16x.c, * elf32-xgate.c, * elf32-xgate.h, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-tilegx.c, * elf64-tilegx.h, * elf64-x86-64.c, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-aarch64.h, * elfxx-ia64.c, * elfxx-ia64.h, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * elfxx-x86.h, * freebsd.h, * hash.c, * host-aout.c, * hp300hpux.c, * hppabsd-core.c, * hpux-core.c, * i386aout.c, * i386linux.c, * i386lynx.c, * i386mach3.c, * i386msdos.c, * i386netbsd.c, * ieee.c, * ihex.c, * irix-core.c, * libaout.h, * libbfd-in.h, * libbfd.c, * libcoff-in.h, * libnlm.h, * libpei.h, * libxcoff.h, * linker.c, * lynx-core.c, * m68k4knetbsd.c, * m68klinux.c, * m68knetbsd.c, * m88kmach3.c, * mach-o-aarch64.c, * mach-o-arm.c, * mach-o-i386.c, * mach-o-target.c, * mach-o-x86-64.c, * mach-o.c, * mach-o.h, * merge.c, * mipsbsd.c, * mmo.c, * netbsd.h, * netbsd-core.c, * newsos3.c, * nlm-target.h, * nlm32-ppc.c, * nlm32-sparc.c, * nlmcode.h, * ns32k.h, * ns32knetbsd.c, * oasys.c, * opncls.c, * pc532-mach.c, * pdp11.c, * pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-mips.c, * pe-x86_64.c, * peXXigen.c, * pef.c, * pef.h, * pei-arm.c, * pei-i386.c, * pei-mcore.c, * pei-x86_64.c, * peicode.h, * plugin.c, * ppcboot.c, * ptrace-core.c, * reloc.c, * riscix.c, * rs6000-core.c, * section.c, * som.c, * som.h, * sparclinux.c, * sparcnetbsd.c, * srec.c, * stabs.c, * sunos.c, * syms.c, * targets.c, * tekhex.c, * trad-core.c, * vax1knetbsd.c, * vaxnetbsd.c, * verilog.c, * versados.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * wasm-module.c, * wasm-module.h, * xcofflink.c, * xsym.c, * xsym.h: Whitespace fixes. * bfd-in2.h, * libbfd.h, * libcoff.h: Regenerate.
2017-12-05 23:56:00 +01:00
adr x0, :tlsgd:var => ldr R0, :gottprel:var
bl __tls_get_addr => mrs x1, tpidr_el0
nop => add R0, R0, R1
Fix AArch64 relocation handling in ILP32 mode. bfd * elfnn-aarch64.c: Fix relaxations for ILP32 mode. ld * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests. * testsuite/ld-aarch64/tls-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-all-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gd-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-3-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-le-ilp32.d: New test.
2017-01-23 18:07:13 +01:00
Where R is x for LP64, and w for Ilp32. */
Add ADR :tlsgd: directive and TLSGD_ADR_PREL21 support.
2015-02-13 08:13:57 +01:00
/* First kill the tls_get_addr reloc on the bl instruction. */
BFD_ASSERT (rel->r_offset + 4 == rel[1].r_offset);
rel[1].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
Fix AArch64 relocation handling in ILP32 mode. bfd * elfnn-aarch64.c: Fix relaxations for ILP32 mode. ld * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests. * testsuite/ld-aarch64/tls-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-all-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gd-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-3-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-le-ilp32.d: New test.
2017-01-23 18:07:13 +01:00
bfd_putl32 (ldr_R0, contents + rel->r_offset);
Add ADR :tlsgd: directive and TLSGD_ADR_PREL21 support.
2015-02-13 08:13:57 +01:00
bfd_putl32 (0xd53bd041, contents + rel->r_offset + 4);
Fix AArch64 relocation handling in ILP32 mode. bfd * elfnn-aarch64.c: Fix relaxations for ILP32 mode. ld * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests. * testsuite/ld-aarch64/tls-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-all-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gd-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-3-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-le-ilp32.d: New test.
2017-01-23 18:07:13 +01:00
bfd_putl32 (add_R0_R0_R1, contents + rel->r_offset + 8);
Add ADR :tlsgd: directive and TLSGD_ADR_PREL21 support.
2015-02-13 08:13:57 +01:00
return bfd_reloc_continue;
}
[BFD][AARCH64]Add TLSGD relaxation support under large memory model. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c(IS_AARCH64_TLS_RELAX_RELOC): Add relaxation support for TLSGD_MOVW_G0_NC and TLSGD_MOVW_G1. (aarch64_tls_transition_without_check): Likewise (elfNN_aarch64_tls_relax): Likwise. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/aarch64-elf.exp: run new test * ld-aarch64/tls-relax-large-gd-ie.d: New. * ld-aarch64/tls-relax-large-gd-ie.s: New. * ld-aarch64/tls-relax-large-gd-le.d: New. * ld-aarch64/tls-relax-large-gd-le.s: New.
2015-10-02 18:22:36 +02:00
#if ARCH_SIZE == 64
case BFD_RELOC_AARCH64_TLSGD_MOVW_G1:
BFD_ASSERT (ELFNN_R_TYPE (rel[1].r_info) == AARCH64_R (TLSGD_MOVW_G0_NC));
BFD_ASSERT (rel->r_offset + 12 == rel[2].r_offset);
BFD_ASSERT (ELFNN_R_TYPE (rel[2].r_info) == AARCH64_R (CALL26));
if (is_local)
{
/* Large GD->LE relaxation:
BFD whitespace fixes Binutils is supposed to use tabs. In my git config I have whitespace = indent-with-non-tab,space-before-tab,trailing-space and I got annoyed enough seeing red in "git diff" output to fix the problems. * doc/header.sed: Trim trailing space when splitting lines. * aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-cris.c, * aout-ns32k.c, * aout-target.h, * aout-tic30.c, * aoutf1.h, * aoutx.h, * arc-got.h, * arc-plt.def, * arc-plt.h, * archive.c, * archive64.c, * archures.c, * armnetbsd.c, * bfd-in.h, * bfd.c, * bfdio.c, * binary.c, * bout.c, * cache.c, * cisco-core.c, * coff-alpha.c, * coff-apollo.c, * coff-arm.c, * coff-h8300.c, * coff-i386.c, * coff-i860.c, * coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mcore.c, * coff-mips.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-stgo32.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * compress.c, * corefile.c, * cpu-alpha.c, * cpu-arm.c, * cpu-avr.c, * cpu-bfin.c, * cpu-cr16.c, * cpu-cr16c.c, * cpu-crx.c, * cpu-d10v.c, * cpu-frv.c, * cpu-ft32.c, * cpu-i370.c, * cpu-i960.c, * cpu-ia64-opc.c, * cpu-ip2k.c, * cpu-lm32.c, * cpu-m32r.c, * cpu-mcore.c, * cpu-microblaze.c, * cpu-mips.c, * cpu-moxie.c, * cpu-mt.c, * cpu-nios2.c, * cpu-ns32k.c, * cpu-or1k.c, * cpu-powerpc.c, * cpu-pru.c, * cpu-sh.c, * cpu-spu.c, * cpu-v850.c, * cpu-v850_rh850.c, * cpu-xgate.c, * cpu-z80.c, * dwarf1.c, * dwarf2.c, * ecoff.c, * ecofflink.c, * ecoffswap.h, * elf-bfd.h, * elf-eh-frame.c, * elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf-s390-common.c, * elf-strtab.c, * elf-vxworks.c, * elf.c, * elf32-am33lin.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-avr.h, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-i860.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68hc1x.c, * elf32-m68hc1x.h, * elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nds32.h, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score.h, * elf32-score7.c, * elf32-sh-symbian.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilegx.c, * elf32-tilegx.h, * elf32-tilepro.c, * elf32-tilepro.h, * elf32-v850.c, * elf32-vax.c, * elf32-wasm32.c, * elf32-xc16x.c, * elf32-xgate.c, * elf32-xgate.h, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-tilegx.c, * elf64-tilegx.h, * elf64-x86-64.c, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-aarch64.h, * elfxx-ia64.c, * elfxx-ia64.h, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * elfxx-x86.h, * freebsd.h, * hash.c, * host-aout.c, * hp300hpux.c, * hppabsd-core.c, * hpux-core.c, * i386aout.c, * i386linux.c, * i386lynx.c, * i386mach3.c, * i386msdos.c, * i386netbsd.c, * ieee.c, * ihex.c, * irix-core.c, * libaout.h, * libbfd-in.h, * libbfd.c, * libcoff-in.h, * libnlm.h, * libpei.h, * libxcoff.h, * linker.c, * lynx-core.c, * m68k4knetbsd.c, * m68klinux.c, * m68knetbsd.c, * m88kmach3.c, * mach-o-aarch64.c, * mach-o-arm.c, * mach-o-i386.c, * mach-o-target.c, * mach-o-x86-64.c, * mach-o.c, * mach-o.h, * merge.c, * mipsbsd.c, * mmo.c, * netbsd.h, * netbsd-core.c, * newsos3.c, * nlm-target.h, * nlm32-ppc.c, * nlm32-sparc.c, * nlmcode.h, * ns32k.h, * ns32knetbsd.c, * oasys.c, * opncls.c, * pc532-mach.c, * pdp11.c, * pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-mips.c, * pe-x86_64.c, * peXXigen.c, * pef.c, * pef.h, * pei-arm.c, * pei-i386.c, * pei-mcore.c, * pei-x86_64.c, * peicode.h, * plugin.c, * ppcboot.c, * ptrace-core.c, * reloc.c, * riscix.c, * rs6000-core.c, * section.c, * som.c, * som.h, * sparclinux.c, * sparcnetbsd.c, * srec.c, * stabs.c, * sunos.c, * syms.c, * targets.c, * tekhex.c, * trad-core.c, * vax1knetbsd.c, * vaxnetbsd.c, * verilog.c, * versados.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * wasm-module.c, * wasm-module.h, * xcofflink.c, * xsym.c, * xsym.h: Whitespace fixes. * bfd-in2.h, * libbfd.h, * libcoff.h: Regenerate.
2017-12-05 23:56:00 +01:00
movz x0, #:tlsgd_g1:var => movz x0, #:tprel_g2:var, lsl #32
[BFD][AARCH64]Add TLSGD relaxation support under large memory model. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c(IS_AARCH64_TLS_RELAX_RELOC): Add relaxation support for TLSGD_MOVW_G0_NC and TLSGD_MOVW_G1. (aarch64_tls_transition_without_check): Likewise (elfNN_aarch64_tls_relax): Likwise. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/aarch64-elf.exp: run new test * ld-aarch64/tls-relax-large-gd-ie.d: New. * ld-aarch64/tls-relax-large-gd-ie.s: New. * ld-aarch64/tls-relax-large-gd-le.d: New. * ld-aarch64/tls-relax-large-gd-le.s: New.
2015-10-02 18:22:36 +02:00
movk x0, #:tlsgd_g0_nc:var => movk x0, #:tprel_g1_nc:var, lsl #16
BFD whitespace fixes Binutils is supposed to use tabs. In my git config I have whitespace = indent-with-non-tab,space-before-tab,trailing-space and I got annoyed enough seeing red in "git diff" output to fix the problems. * doc/header.sed: Trim trailing space when splitting lines. * aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-cris.c, * aout-ns32k.c, * aout-target.h, * aout-tic30.c, * aoutf1.h, * aoutx.h, * arc-got.h, * arc-plt.def, * arc-plt.h, * archive.c, * archive64.c, * archures.c, * armnetbsd.c, * bfd-in.h, * bfd.c, * bfdio.c, * binary.c, * bout.c, * cache.c, * cisco-core.c, * coff-alpha.c, * coff-apollo.c, * coff-arm.c, * coff-h8300.c, * coff-i386.c, * coff-i860.c, * coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mcore.c, * coff-mips.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-stgo32.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * compress.c, * corefile.c, * cpu-alpha.c, * cpu-arm.c, * cpu-avr.c, * cpu-bfin.c, * cpu-cr16.c, * cpu-cr16c.c, * cpu-crx.c, * cpu-d10v.c, * cpu-frv.c, * cpu-ft32.c, * cpu-i370.c, * cpu-i960.c, * cpu-ia64-opc.c, * cpu-ip2k.c, * cpu-lm32.c, * cpu-m32r.c, * cpu-mcore.c, * cpu-microblaze.c, * cpu-mips.c, * cpu-moxie.c, * cpu-mt.c, * cpu-nios2.c, * cpu-ns32k.c, * cpu-or1k.c, * cpu-powerpc.c, * cpu-pru.c, * cpu-sh.c, * cpu-spu.c, * cpu-v850.c, * cpu-v850_rh850.c, * cpu-xgate.c, * cpu-z80.c, * dwarf1.c, * dwarf2.c, * ecoff.c, * ecofflink.c, * ecoffswap.h, * elf-bfd.h, * elf-eh-frame.c, * elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf-s390-common.c, * elf-strtab.c, * elf-vxworks.c, * elf.c, * elf32-am33lin.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-avr.h, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-i860.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68hc1x.c, * elf32-m68hc1x.h, * elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nds32.h, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score.h, * elf32-score7.c, * elf32-sh-symbian.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilegx.c, * elf32-tilegx.h, * elf32-tilepro.c, * elf32-tilepro.h, * elf32-v850.c, * elf32-vax.c, * elf32-wasm32.c, * elf32-xc16x.c, * elf32-xgate.c, * elf32-xgate.h, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-tilegx.c, * elf64-tilegx.h, * elf64-x86-64.c, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-aarch64.h, * elfxx-ia64.c, * elfxx-ia64.h, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * elfxx-x86.h, * freebsd.h, * hash.c, * host-aout.c, * hp300hpux.c, * hppabsd-core.c, * hpux-core.c, * i386aout.c, * i386linux.c, * i386lynx.c, * i386mach3.c, * i386msdos.c, * i386netbsd.c, * ieee.c, * ihex.c, * irix-core.c, * libaout.h, * libbfd-in.h, * libbfd.c, * libcoff-in.h, * libnlm.h, * libpei.h, * libxcoff.h, * linker.c, * lynx-core.c, * m68k4knetbsd.c, * m68klinux.c, * m68knetbsd.c, * m88kmach3.c, * mach-o-aarch64.c, * mach-o-arm.c, * mach-o-i386.c, * mach-o-target.c, * mach-o-x86-64.c, * mach-o.c, * mach-o.h, * merge.c, * mipsbsd.c, * mmo.c, * netbsd.h, * netbsd-core.c, * newsos3.c, * nlm-target.h, * nlm32-ppc.c, * nlm32-sparc.c, * nlmcode.h, * ns32k.h, * ns32knetbsd.c, * oasys.c, * opncls.c, * pc532-mach.c, * pdp11.c, * pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-mips.c, * pe-x86_64.c, * peXXigen.c, * pef.c, * pef.h, * pei-arm.c, * pei-i386.c, * pei-mcore.c, * pei-x86_64.c, * peicode.h, * plugin.c, * ppcboot.c, * ptrace-core.c, * reloc.c, * riscix.c, * rs6000-core.c, * section.c, * som.c, * som.h, * sparclinux.c, * sparcnetbsd.c, * srec.c, * stabs.c, * sunos.c, * syms.c, * targets.c, * tekhex.c, * trad-core.c, * vax1knetbsd.c, * vaxnetbsd.c, * verilog.c, * versados.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * wasm-module.c, * wasm-module.h, * xcofflink.c, * xsym.c, * xsym.h: Whitespace fixes. * bfd-in2.h, * libbfd.h, * libcoff.h: Regenerate.
2017-12-05 23:56:00 +01:00
add x0, gp, x0 => movk x0, #:tprel_g0_nc:var
bl __tls_get_addr => mrs x1, tpidr_el0
nop => add x0, x0, x1
[BFD][AARCH64]Add TLSGD relaxation support under large memory model. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c(IS_AARCH64_TLS_RELAX_RELOC): Add relaxation support for TLSGD_MOVW_G0_NC and TLSGD_MOVW_G1. (aarch64_tls_transition_without_check): Likewise (elfNN_aarch64_tls_relax): Likwise. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/aarch64-elf.exp: run new test * ld-aarch64/tls-relax-large-gd-ie.d: New. * ld-aarch64/tls-relax-large-gd-ie.s: New. * ld-aarch64/tls-relax-large-gd-le.d: New. * ld-aarch64/tls-relax-large-gd-le.s: New.
2015-10-02 18:22:36 +02:00
*/
rel[2].r_info = ELFNN_R_INFO (ELFNN_R_SYM (rel->r_info),
AARCH64_R (TLSLE_MOVW_TPREL_G0_NC));
rel[2].r_offset = rel->r_offset + 8;
Fix AArch64 relocation handling in ILP32 mode. bfd * elfnn-aarch64.c: Fix relaxations for ILP32 mode. ld * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests. * testsuite/ld-aarch64/tls-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-all-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gd-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-3-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-le-ilp32.d: New test.
2017-01-23 18:07:13 +01:00
bfd_putl32 (movz_hw_R0, contents + rel->r_offset + 0);
bfd_putl32 (ldr_hw_R0, contents + rel->r_offset + 4);
bfd_putl32 (movk_R0, contents + rel->r_offset + 8);
[BFD][AARCH64]Add TLSGD relaxation support under large memory model. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c(IS_AARCH64_TLS_RELAX_RELOC): Add relaxation support for TLSGD_MOVW_G0_NC and TLSGD_MOVW_G1. (aarch64_tls_transition_without_check): Likewise (elfNN_aarch64_tls_relax): Likwise. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/aarch64-elf.exp: run new test * ld-aarch64/tls-relax-large-gd-ie.d: New. * ld-aarch64/tls-relax-large-gd-ie.s: New. * ld-aarch64/tls-relax-large-gd-le.d: New. * ld-aarch64/tls-relax-large-gd-le.s: New.
2015-10-02 18:22:36 +02:00
bfd_putl32 (0xd53bd041, contents + rel->r_offset + 12);
Fix AArch64 relocation handling in ILP32 mode. bfd * elfnn-aarch64.c: Fix relaxations for ILP32 mode. ld * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests. * testsuite/ld-aarch64/tls-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-all-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gd-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-3-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-le-ilp32.d: New test.
2017-01-23 18:07:13 +01:00
bfd_putl32 (add_R0_R0_R1, contents + rel->r_offset + 16);
[BFD][AARCH64]Add TLSGD relaxation support under large memory model. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c(IS_AARCH64_TLS_RELAX_RELOC): Add relaxation support for TLSGD_MOVW_G0_NC and TLSGD_MOVW_G1. (aarch64_tls_transition_without_check): Likewise (elfNN_aarch64_tls_relax): Likwise. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/aarch64-elf.exp: run new test * ld-aarch64/tls-relax-large-gd-ie.d: New. * ld-aarch64/tls-relax-large-gd-ie.s: New. * ld-aarch64/tls-relax-large-gd-le.d: New. * ld-aarch64/tls-relax-large-gd-le.s: New.
2015-10-02 18:22:36 +02:00
}
else
{
/* Large GD->IE relaxation:
BFD whitespace fixes Binutils is supposed to use tabs. In my git config I have whitespace = indent-with-non-tab,space-before-tab,trailing-space and I got annoyed enough seeing red in "git diff" output to fix the problems. * doc/header.sed: Trim trailing space when splitting lines. * aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-cris.c, * aout-ns32k.c, * aout-target.h, * aout-tic30.c, * aoutf1.h, * aoutx.h, * arc-got.h, * arc-plt.def, * arc-plt.h, * archive.c, * archive64.c, * archures.c, * armnetbsd.c, * bfd-in.h, * bfd.c, * bfdio.c, * binary.c, * bout.c, * cache.c, * cisco-core.c, * coff-alpha.c, * coff-apollo.c, * coff-arm.c, * coff-h8300.c, * coff-i386.c, * coff-i860.c, * coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mcore.c, * coff-mips.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-stgo32.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * compress.c, * corefile.c, * cpu-alpha.c, * cpu-arm.c, * cpu-avr.c, * cpu-bfin.c, * cpu-cr16.c, * cpu-cr16c.c, * cpu-crx.c, * cpu-d10v.c, * cpu-frv.c, * cpu-ft32.c, * cpu-i370.c, * cpu-i960.c, * cpu-ia64-opc.c, * cpu-ip2k.c, * cpu-lm32.c, * cpu-m32r.c, * cpu-mcore.c, * cpu-microblaze.c, * cpu-mips.c, * cpu-moxie.c, * cpu-mt.c, * cpu-nios2.c, * cpu-ns32k.c, * cpu-or1k.c, * cpu-powerpc.c, * cpu-pru.c, * cpu-sh.c, * cpu-spu.c, * cpu-v850.c, * cpu-v850_rh850.c, * cpu-xgate.c, * cpu-z80.c, * dwarf1.c, * dwarf2.c, * ecoff.c, * ecofflink.c, * ecoffswap.h, * elf-bfd.h, * elf-eh-frame.c, * elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf-s390-common.c, * elf-strtab.c, * elf-vxworks.c, * elf.c, * elf32-am33lin.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-avr.h, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-i860.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68hc1x.c, * elf32-m68hc1x.h, * elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nds32.h, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score.h, * elf32-score7.c, * elf32-sh-symbian.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilegx.c, * elf32-tilegx.h, * elf32-tilepro.c, * elf32-tilepro.h, * elf32-v850.c, * elf32-vax.c, * elf32-wasm32.c, * elf32-xc16x.c, * elf32-xgate.c, * elf32-xgate.h, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-tilegx.c, * elf64-tilegx.h, * elf64-x86-64.c, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-aarch64.h, * elfxx-ia64.c, * elfxx-ia64.h, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * elfxx-x86.h, * freebsd.h, * hash.c, * host-aout.c, * hp300hpux.c, * hppabsd-core.c, * hpux-core.c, * i386aout.c, * i386linux.c, * i386lynx.c, * i386mach3.c, * i386msdos.c, * i386netbsd.c, * ieee.c, * ihex.c, * irix-core.c, * libaout.h, * libbfd-in.h, * libbfd.c, * libcoff-in.h, * libnlm.h, * libpei.h, * libxcoff.h, * linker.c, * lynx-core.c, * m68k4knetbsd.c, * m68klinux.c, * m68knetbsd.c, * m88kmach3.c, * mach-o-aarch64.c, * mach-o-arm.c, * mach-o-i386.c, * mach-o-target.c, * mach-o-x86-64.c, * mach-o.c, * mach-o.h, * merge.c, * mipsbsd.c, * mmo.c, * netbsd.h, * netbsd-core.c, * newsos3.c, * nlm-target.h, * nlm32-ppc.c, * nlm32-sparc.c, * nlmcode.h, * ns32k.h, * ns32knetbsd.c, * oasys.c, * opncls.c, * pc532-mach.c, * pdp11.c, * pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-mips.c, * pe-x86_64.c, * peXXigen.c, * pef.c, * pef.h, * pei-arm.c, * pei-i386.c, * pei-mcore.c, * pei-x86_64.c, * peicode.h, * plugin.c, * ppcboot.c, * ptrace-core.c, * reloc.c, * riscix.c, * rs6000-core.c, * section.c, * som.c, * som.h, * sparclinux.c, * sparcnetbsd.c, * srec.c, * stabs.c, * sunos.c, * syms.c, * targets.c, * tekhex.c, * trad-core.c, * vax1knetbsd.c, * vaxnetbsd.c, * verilog.c, * versados.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * wasm-module.c, * wasm-module.h, * xcofflink.c, * xsym.c, * xsym.h: Whitespace fixes. * bfd-in2.h, * libbfd.h, * libcoff.h: Regenerate.
2017-12-05 23:56:00 +01:00
movz x0, #:tlsgd_g1:var => movz x0, #:gottprel_g1:var, lsl #16
[BFD][AARCH64]Add TLSGD relaxation support under large memory model. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c(IS_AARCH64_TLS_RELAX_RELOC): Add relaxation support for TLSGD_MOVW_G0_NC and TLSGD_MOVW_G1. (aarch64_tls_transition_without_check): Likewise (elfNN_aarch64_tls_relax): Likwise. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/aarch64-elf.exp: run new test * ld-aarch64/tls-relax-large-gd-ie.d: New. * ld-aarch64/tls-relax-large-gd-ie.s: New. * ld-aarch64/tls-relax-large-gd-le.d: New. * ld-aarch64/tls-relax-large-gd-le.s: New.
2015-10-02 18:22:36 +02:00
movk x0, #:tlsgd_g0_nc:var => movk x0, #:gottprel_g0_nc:var
BFD whitespace fixes Binutils is supposed to use tabs. In my git config I have whitespace = indent-with-non-tab,space-before-tab,trailing-space and I got annoyed enough seeing red in "git diff" output to fix the problems. * doc/header.sed: Trim trailing space when splitting lines. * aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-cris.c, * aout-ns32k.c, * aout-target.h, * aout-tic30.c, * aoutf1.h, * aoutx.h, * arc-got.h, * arc-plt.def, * arc-plt.h, * archive.c, * archive64.c, * archures.c, * armnetbsd.c, * bfd-in.h, * bfd.c, * bfdio.c, * binary.c, * bout.c, * cache.c, * cisco-core.c, * coff-alpha.c, * coff-apollo.c, * coff-arm.c, * coff-h8300.c, * coff-i386.c, * coff-i860.c, * coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mcore.c, * coff-mips.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-stgo32.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * compress.c, * corefile.c, * cpu-alpha.c, * cpu-arm.c, * cpu-avr.c, * cpu-bfin.c, * cpu-cr16.c, * cpu-cr16c.c, * cpu-crx.c, * cpu-d10v.c, * cpu-frv.c, * cpu-ft32.c, * cpu-i370.c, * cpu-i960.c, * cpu-ia64-opc.c, * cpu-ip2k.c, * cpu-lm32.c, * cpu-m32r.c, * cpu-mcore.c, * cpu-microblaze.c, * cpu-mips.c, * cpu-moxie.c, * cpu-mt.c, * cpu-nios2.c, * cpu-ns32k.c, * cpu-or1k.c, * cpu-powerpc.c, * cpu-pru.c, * cpu-sh.c, * cpu-spu.c, * cpu-v850.c, * cpu-v850_rh850.c, * cpu-xgate.c, * cpu-z80.c, * dwarf1.c, * dwarf2.c, * ecoff.c, * ecofflink.c, * ecoffswap.h, * elf-bfd.h, * elf-eh-frame.c, * elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf-s390-common.c, * elf-strtab.c, * elf-vxworks.c, * elf.c, * elf32-am33lin.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-avr.h, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-i860.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68hc1x.c, * elf32-m68hc1x.h, * elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nds32.h, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score.h, * elf32-score7.c, * elf32-sh-symbian.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilegx.c, * elf32-tilegx.h, * elf32-tilepro.c, * elf32-tilepro.h, * elf32-v850.c, * elf32-vax.c, * elf32-wasm32.c, * elf32-xc16x.c, * elf32-xgate.c, * elf32-xgate.h, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-tilegx.c, * elf64-tilegx.h, * elf64-x86-64.c, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-aarch64.h, * elfxx-ia64.c, * elfxx-ia64.h, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * elfxx-x86.h, * freebsd.h, * hash.c, * host-aout.c, * hp300hpux.c, * hppabsd-core.c, * hpux-core.c, * i386aout.c, * i386linux.c, * i386lynx.c, * i386mach3.c, * i386msdos.c, * i386netbsd.c, * ieee.c, * ihex.c, * irix-core.c, * libaout.h, * libbfd-in.h, * libbfd.c, * libcoff-in.h, * libnlm.h, * libpei.h, * libxcoff.h, * linker.c, * lynx-core.c, * m68k4knetbsd.c, * m68klinux.c, * m68knetbsd.c, * m88kmach3.c, * mach-o-aarch64.c, * mach-o-arm.c, * mach-o-i386.c, * mach-o-target.c, * mach-o-x86-64.c, * mach-o.c, * mach-o.h, * merge.c, * mipsbsd.c, * mmo.c, * netbsd.h, * netbsd-core.c, * newsos3.c, * nlm-target.h, * nlm32-ppc.c, * nlm32-sparc.c, * nlmcode.h, * ns32k.h, * ns32knetbsd.c, * oasys.c, * opncls.c, * pc532-mach.c, * pdp11.c, * pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-mips.c, * pe-x86_64.c, * peXXigen.c, * pef.c, * pef.h, * pei-arm.c, * pei-i386.c, * pei-mcore.c, * pei-x86_64.c, * peicode.h, * plugin.c, * ppcboot.c, * ptrace-core.c, * reloc.c, * riscix.c, * rs6000-core.c, * section.c, * som.c, * som.h, * sparclinux.c, * sparcnetbsd.c, * srec.c, * stabs.c, * sunos.c, * syms.c, * targets.c, * tekhex.c, * trad-core.c, * vax1knetbsd.c, * vaxnetbsd.c, * verilog.c, * versados.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * wasm-module.c, * wasm-module.h, * xcofflink.c, * xsym.c, * xsym.h: Whitespace fixes. * bfd-in2.h, * libbfd.h, * libcoff.h: Regenerate.
2017-12-05 23:56:00 +01:00
add x0, gp, x0 => ldr x0, [gp, x0]
bl __tls_get_addr => mrs x1, tpidr_el0
nop => add x0, x0, x1
[BFD][AARCH64]Add TLSGD relaxation support under large memory model. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c(IS_AARCH64_TLS_RELAX_RELOC): Add relaxation support for TLSGD_MOVW_G0_NC and TLSGD_MOVW_G1. (aarch64_tls_transition_without_check): Likewise (elfNN_aarch64_tls_relax): Likwise. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/aarch64-elf.exp: run new test * ld-aarch64/tls-relax-large-gd-ie.d: New. * ld-aarch64/tls-relax-large-gd-ie.s: New. * ld-aarch64/tls-relax-large-gd-le.d: New. * ld-aarch64/tls-relax-large-gd-le.s: New.
2015-10-02 18:22:36 +02:00
*/
rel[2].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
bfd_putl32 (0xd2a80000, contents + rel->r_offset + 0);
Fix AArch64 relocation handling in ILP32 mode. bfd * elfnn-aarch64.c: Fix relaxations for ILP32 mode. ld * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests. * testsuite/ld-aarch64/tls-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-all-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gd-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-3-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-le-ilp32.d: New test.
2017-01-23 18:07:13 +01:00
bfd_putl32 (ldr_R0, contents + rel->r_offset + 8);
[BFD][AARCH64]Add TLSGD relaxation support under large memory model. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c(IS_AARCH64_TLS_RELAX_RELOC): Add relaxation support for TLSGD_MOVW_G0_NC and TLSGD_MOVW_G1. (aarch64_tls_transition_without_check): Likewise (elfNN_aarch64_tls_relax): Likwise. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/aarch64-elf.exp: run new test * ld-aarch64/tls-relax-large-gd-ie.d: New. * ld-aarch64/tls-relax-large-gd-ie.s: New. * ld-aarch64/tls-relax-large-gd-le.d: New. * ld-aarch64/tls-relax-large-gd-le.s: New.
2015-10-02 18:22:36 +02:00
bfd_putl32 (0xd53bd041, contents + rel->r_offset + 12);
Fix AArch64 relocation handling in ILP32 mode. bfd * elfnn-aarch64.c: Fix relaxations for ILP32 mode. ld * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests. * testsuite/ld-aarch64/tls-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-all-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gd-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-3-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-le-ilp32.d: New test.
2017-01-23 18:07:13 +01:00
bfd_putl32 (add_R0_R0_R1, contents + rel->r_offset + 16);
[BFD][AARCH64]Add TLSGD relaxation support under large memory model. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c(IS_AARCH64_TLS_RELAX_RELOC): Add relaxation support for TLSGD_MOVW_G0_NC and TLSGD_MOVW_G1. (aarch64_tls_transition_without_check): Likewise (elfNN_aarch64_tls_relax): Likwise. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/aarch64-elf.exp: run new test * ld-aarch64/tls-relax-large-gd-ie.d: New. * ld-aarch64/tls-relax-large-gd-ie.s: New. * ld-aarch64/tls-relax-large-gd-le.d: New. * ld-aarch64/tls-relax-large-gd-le.s: New.
2015-10-02 18:22:36 +02:00
}
return bfd_reloc_continue;
case BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC:
return bfd_reloc_continue;
#endif
Adding support for TLSIE_LD_GOTTREL_PREL19.
2015-02-13 10:57:11 +01:00
case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
return bfd_reloc_continue;
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
case BFD_RELOC_AARCH64_TLSDESC_LDNN_LO12_NC:
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
if (is_local)
{
/* GD->LE relaxation:
ldr xd, [x0, #:tlsdesc_lo12:var] => movk x0, :tprel_g0_nc:var
Fix AArch64 relocation handling in ILP32 mode. bfd * elfnn-aarch64.c: Fix relaxations for ILP32 mode. ld * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests. * testsuite/ld-aarch64/tls-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-all-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gd-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-3-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-le-ilp32.d: New test.
2017-01-23 18:07:13 +01:00
Where R is x for lp64 mode, and w for ILP32 mode. */
bfd_putl32 (movk_R0, contents + rel->r_offset);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
return bfd_reloc_continue;
}
else
{
/* GD->IE relaxation:
Fix AArch64 relocation handling in ILP32 mode. bfd * elfnn-aarch64.c: Fix relaxations for ILP32 mode. ld * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests. * testsuite/ld-aarch64/tls-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-all-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gd-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-3-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-le-ilp32.d: New test.
2017-01-23 18:07:13 +01:00
ldr xd, [x0, #:tlsdesc_lo12:var] => ldr R0, [x0, #:gottprel_lo12:var]
Where R is x for lp64 mode, and w for ILP32 mode. */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
insn = bfd_getl32 (contents + rel->r_offset);
Fix AArch64 relocation handling in ILP32 mode. bfd * elfnn-aarch64.c: Fix relaxations for ILP32 mode. ld * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests. * testsuite/ld-aarch64/tls-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-all-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gd-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-3-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-le-ilp32.d: New test.
2017-01-23 18:07:13 +01:00
bfd_putl32 (ldr_R0_mask (insn), contents + rel->r_offset);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
return bfd_reloc_continue;
}
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
if (is_local)
{
/* GD->LE relaxation
BFD whitespace fixes Binutils is supposed to use tabs. In my git config I have whitespace = indent-with-non-tab,space-before-tab,trailing-space and I got annoyed enough seeing red in "git diff" output to fix the problems. * doc/header.sed: Trim trailing space when splitting lines. * aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-cris.c, * aout-ns32k.c, * aout-target.h, * aout-tic30.c, * aoutf1.h, * aoutx.h, * arc-got.h, * arc-plt.def, * arc-plt.h, * archive.c, * archive64.c, * archures.c, * armnetbsd.c, * bfd-in.h, * bfd.c, * bfdio.c, * binary.c, * bout.c, * cache.c, * cisco-core.c, * coff-alpha.c, * coff-apollo.c, * coff-arm.c, * coff-h8300.c, * coff-i386.c, * coff-i860.c, * coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mcore.c, * coff-mips.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-stgo32.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * compress.c, * corefile.c, * cpu-alpha.c, * cpu-arm.c, * cpu-avr.c, * cpu-bfin.c, * cpu-cr16.c, * cpu-cr16c.c, * cpu-crx.c, * cpu-d10v.c, * cpu-frv.c, * cpu-ft32.c, * cpu-i370.c, * cpu-i960.c, * cpu-ia64-opc.c, * cpu-ip2k.c, * cpu-lm32.c, * cpu-m32r.c, * cpu-mcore.c, * cpu-microblaze.c, * cpu-mips.c, * cpu-moxie.c, * cpu-mt.c, * cpu-nios2.c, * cpu-ns32k.c, * cpu-or1k.c, * cpu-powerpc.c, * cpu-pru.c, * cpu-sh.c, * cpu-spu.c, * cpu-v850.c, * cpu-v850_rh850.c, * cpu-xgate.c, * cpu-z80.c, * dwarf1.c, * dwarf2.c, * ecoff.c, * ecofflink.c, * ecoffswap.h, * elf-bfd.h, * elf-eh-frame.c, * elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf-s390-common.c, * elf-strtab.c, * elf-vxworks.c, * elf.c, * elf32-am33lin.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-avr.h, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-i860.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68hc1x.c, * elf32-m68hc1x.h, * elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nds32.h, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score.h, * elf32-score7.c, * elf32-sh-symbian.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilegx.c, * elf32-tilegx.h, * elf32-tilepro.c, * elf32-tilepro.h, * elf32-v850.c, * elf32-vax.c, * elf32-wasm32.c, * elf32-xc16x.c, * elf32-xgate.c, * elf32-xgate.h, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-tilegx.c, * elf64-tilegx.h, * elf64-x86-64.c, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-aarch64.h, * elfxx-ia64.c, * elfxx-ia64.h, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * elfxx-x86.h, * freebsd.h, * hash.c, * host-aout.c, * hp300hpux.c, * hppabsd-core.c, * hpux-core.c, * i386aout.c, * i386linux.c, * i386lynx.c, * i386mach3.c, * i386msdos.c, * i386netbsd.c, * ieee.c, * ihex.c, * irix-core.c, * libaout.h, * libbfd-in.h, * libbfd.c, * libcoff-in.h, * libnlm.h, * libpei.h, * libxcoff.h, * linker.c, * lynx-core.c, * m68k4knetbsd.c, * m68klinux.c, * m68knetbsd.c, * m88kmach3.c, * mach-o-aarch64.c, * mach-o-arm.c, * mach-o-i386.c, * mach-o-target.c, * mach-o-x86-64.c, * mach-o.c, * mach-o.h, * merge.c, * mipsbsd.c, * mmo.c, * netbsd.h, * netbsd-core.c, * newsos3.c, * nlm-target.h, * nlm32-ppc.c, * nlm32-sparc.c, * nlmcode.h, * ns32k.h, * ns32knetbsd.c, * oasys.c, * opncls.c, * pc532-mach.c, * pdp11.c, * pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-mips.c, * pe-x86_64.c, * peXXigen.c, * pef.c, * pef.h, * pei-arm.c, * pei-i386.c, * pei-mcore.c, * pei-x86_64.c, * peicode.h, * plugin.c, * ppcboot.c, * ptrace-core.c, * reloc.c, * riscix.c, * rs6000-core.c, * section.c, * som.c, * som.h, * sparclinux.c, * sparcnetbsd.c, * srec.c, * stabs.c, * sunos.c, * syms.c, * targets.c, * tekhex.c, * trad-core.c, * vax1knetbsd.c, * vaxnetbsd.c, * verilog.c, * versados.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * wasm-module.c, * wasm-module.h, * xcofflink.c, * xsym.c, * xsym.h: Whitespace fixes. * bfd-in2.h, * libbfd.h, * libcoff.h: Regenerate.
2017-12-05 23:56:00 +01:00
add x0, #:tlsgd_lo12:var => movk R0, :tprel_g0_nc:var
bl __tls_get_addr => mrs x1, tpidr_el0
nop => add R0, R1, R0
Fix AArch64 relocation handling in ILP32 mode. bfd * elfnn-aarch64.c: Fix relaxations for ILP32 mode. ld * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests. * testsuite/ld-aarch64/tls-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-all-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gd-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-3-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-le-ilp32.d: New test.
2017-01-23 18:07:13 +01:00
Where R is x for lp64 mode, and w for ILP32 mode. */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* First kill the tls_get_addr reloc on the bl instruction. */
BFD_ASSERT (rel->r_offset + 4 == rel[1].r_offset);
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
rel[1].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
Fix AArch64 relocation handling in ILP32 mode. bfd * elfnn-aarch64.c: Fix relaxations for ILP32 mode. ld * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests. * testsuite/ld-aarch64/tls-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-all-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gd-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-3-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-le-ilp32.d: New test.
2017-01-23 18:07:13 +01:00
bfd_putl32 (movk_R0, contents + rel->r_offset);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
bfd_putl32 (0xd53bd041, contents + rel->r_offset + 4);
Fix AArch64 relocation handling in ILP32 mode. bfd * elfnn-aarch64.c: Fix relaxations for ILP32 mode. ld * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests. * testsuite/ld-aarch64/tls-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-all-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gd-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-3-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-le-ilp32.d: New test.
2017-01-23 18:07:13 +01:00
bfd_putl32 (add_R0_R0_R1, contents + rel->r_offset + 8);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
return bfd_reloc_continue;
}
else
{
/* GD->IE relaxation
BFD whitespace fixes Binutils is supposed to use tabs. In my git config I have whitespace = indent-with-non-tab,space-before-tab,trailing-space and I got annoyed enough seeing red in "git diff" output to fix the problems. * doc/header.sed: Trim trailing space when splitting lines. * aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-cris.c, * aout-ns32k.c, * aout-target.h, * aout-tic30.c, * aoutf1.h, * aoutx.h, * arc-got.h, * arc-plt.def, * arc-plt.h, * archive.c, * archive64.c, * archures.c, * armnetbsd.c, * bfd-in.h, * bfd.c, * bfdio.c, * binary.c, * bout.c, * cache.c, * cisco-core.c, * coff-alpha.c, * coff-apollo.c, * coff-arm.c, * coff-h8300.c, * coff-i386.c, * coff-i860.c, * coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mcore.c, * coff-mips.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-stgo32.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * compress.c, * corefile.c, * cpu-alpha.c, * cpu-arm.c, * cpu-avr.c, * cpu-bfin.c, * cpu-cr16.c, * cpu-cr16c.c, * cpu-crx.c, * cpu-d10v.c, * cpu-frv.c, * cpu-ft32.c, * cpu-i370.c, * cpu-i960.c, * cpu-ia64-opc.c, * cpu-ip2k.c, * cpu-lm32.c, * cpu-m32r.c, * cpu-mcore.c, * cpu-microblaze.c, * cpu-mips.c, * cpu-moxie.c, * cpu-mt.c, * cpu-nios2.c, * cpu-ns32k.c, * cpu-or1k.c, * cpu-powerpc.c, * cpu-pru.c, * cpu-sh.c, * cpu-spu.c, * cpu-v850.c, * cpu-v850_rh850.c, * cpu-xgate.c, * cpu-z80.c, * dwarf1.c, * dwarf2.c, * ecoff.c, * ecofflink.c, * ecoffswap.h, * elf-bfd.h, * elf-eh-frame.c, * elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf-s390-common.c, * elf-strtab.c, * elf-vxworks.c, * elf.c, * elf32-am33lin.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-avr.h, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-i860.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68hc1x.c, * elf32-m68hc1x.h, * elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nds32.h, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score.h, * elf32-score7.c, * elf32-sh-symbian.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilegx.c, * elf32-tilegx.h, * elf32-tilepro.c, * elf32-tilepro.h, * elf32-v850.c, * elf32-vax.c, * elf32-wasm32.c, * elf32-xc16x.c, * elf32-xgate.c, * elf32-xgate.h, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-tilegx.c, * elf64-tilegx.h, * elf64-x86-64.c, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-aarch64.h, * elfxx-ia64.c, * elfxx-ia64.h, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * elfxx-x86.h, * freebsd.h, * hash.c, * host-aout.c, * hp300hpux.c, * hppabsd-core.c, * hpux-core.c, * i386aout.c, * i386linux.c, * i386lynx.c, * i386mach3.c, * i386msdos.c, * i386netbsd.c, * ieee.c, * ihex.c, * irix-core.c, * libaout.h, * libbfd-in.h, * libbfd.c, * libcoff-in.h, * libnlm.h, * libpei.h, * libxcoff.h, * linker.c, * lynx-core.c, * m68k4knetbsd.c, * m68klinux.c, * m68knetbsd.c, * m88kmach3.c, * mach-o-aarch64.c, * mach-o-arm.c, * mach-o-i386.c, * mach-o-target.c, * mach-o-x86-64.c, * mach-o.c, * mach-o.h, * merge.c, * mipsbsd.c, * mmo.c, * netbsd.h, * netbsd-core.c, * newsos3.c, * nlm-target.h, * nlm32-ppc.c, * nlm32-sparc.c, * nlmcode.h, * ns32k.h, * ns32knetbsd.c, * oasys.c, * opncls.c, * pc532-mach.c, * pdp11.c, * pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-mips.c, * pe-x86_64.c, * peXXigen.c, * pef.c, * pef.h, * pei-arm.c, * pei-i386.c, * pei-mcore.c, * pei-x86_64.c, * peicode.h, * plugin.c, * ppcboot.c, * ptrace-core.c, * reloc.c, * riscix.c, * rs6000-core.c, * section.c, * som.c, * som.h, * sparclinux.c, * sparcnetbsd.c, * srec.c, * stabs.c, * sunos.c, * syms.c, * targets.c, * tekhex.c, * trad-core.c, * vax1knetbsd.c, * vaxnetbsd.c, * verilog.c, * versados.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * wasm-module.c, * wasm-module.h, * xcofflink.c, * xsym.c, * xsym.h: Whitespace fixes. * bfd-in2.h, * libbfd.h, * libcoff.h: Regenerate.
2017-12-05 23:56:00 +01:00
ADD x0, #:tlsgd_lo12:var => ldr R0, [x0, #:gottprel_lo12:var]
BL __tls_get_addr => mrs x1, tpidr_el0
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
R_AARCH64_CALL26
BFD whitespace fixes Binutils is supposed to use tabs. In my git config I have whitespace = indent-with-non-tab,space-before-tab,trailing-space and I got annoyed enough seeing red in "git diff" output to fix the problems. * doc/header.sed: Trim trailing space when splitting lines. * aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-cris.c, * aout-ns32k.c, * aout-target.h, * aout-tic30.c, * aoutf1.h, * aoutx.h, * arc-got.h, * arc-plt.def, * arc-plt.h, * archive.c, * archive64.c, * archures.c, * armnetbsd.c, * bfd-in.h, * bfd.c, * bfdio.c, * binary.c, * bout.c, * cache.c, * cisco-core.c, * coff-alpha.c, * coff-apollo.c, * coff-arm.c, * coff-h8300.c, * coff-i386.c, * coff-i860.c, * coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mcore.c, * coff-mips.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-stgo32.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * compress.c, * corefile.c, * cpu-alpha.c, * cpu-arm.c, * cpu-avr.c, * cpu-bfin.c, * cpu-cr16.c, * cpu-cr16c.c, * cpu-crx.c, * cpu-d10v.c, * cpu-frv.c, * cpu-ft32.c, * cpu-i370.c, * cpu-i960.c, * cpu-ia64-opc.c, * cpu-ip2k.c, * cpu-lm32.c, * cpu-m32r.c, * cpu-mcore.c, * cpu-microblaze.c, * cpu-mips.c, * cpu-moxie.c, * cpu-mt.c, * cpu-nios2.c, * cpu-ns32k.c, * cpu-or1k.c, * cpu-powerpc.c, * cpu-pru.c, * cpu-sh.c, * cpu-spu.c, * cpu-v850.c, * cpu-v850_rh850.c, * cpu-xgate.c, * cpu-z80.c, * dwarf1.c, * dwarf2.c, * ecoff.c, * ecofflink.c, * ecoffswap.h, * elf-bfd.h, * elf-eh-frame.c, * elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf-s390-common.c, * elf-strtab.c, * elf-vxworks.c, * elf.c, * elf32-am33lin.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-avr.h, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-i860.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68hc1x.c, * elf32-m68hc1x.h, * elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nds32.h, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score.h, * elf32-score7.c, * elf32-sh-symbian.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilegx.c, * elf32-tilegx.h, * elf32-tilepro.c, * elf32-tilepro.h, * elf32-v850.c, * elf32-vax.c, * elf32-wasm32.c, * elf32-xc16x.c, * elf32-xgate.c, * elf32-xgate.h, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-tilegx.c, * elf64-tilegx.h, * elf64-x86-64.c, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-aarch64.h, * elfxx-ia64.c, * elfxx-ia64.h, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * elfxx-x86.h, * freebsd.h, * hash.c, * host-aout.c, * hp300hpux.c, * hppabsd-core.c, * hpux-core.c, * i386aout.c, * i386linux.c, * i386lynx.c, * i386mach3.c, * i386msdos.c, * i386netbsd.c, * ieee.c, * ihex.c, * irix-core.c, * libaout.h, * libbfd-in.h, * libbfd.c, * libcoff-in.h, * libnlm.h, * libpei.h, * libxcoff.h, * linker.c, * lynx-core.c, * m68k4knetbsd.c, * m68klinux.c, * m68knetbsd.c, * m88kmach3.c, * mach-o-aarch64.c, * mach-o-arm.c, * mach-o-i386.c, * mach-o-target.c, * mach-o-x86-64.c, * mach-o.c, * mach-o.h, * merge.c, * mipsbsd.c, * mmo.c, * netbsd.h, * netbsd-core.c, * newsos3.c, * nlm-target.h, * nlm32-ppc.c, * nlm32-sparc.c, * nlmcode.h, * ns32k.h, * ns32knetbsd.c, * oasys.c, * opncls.c, * pc532-mach.c, * pdp11.c, * pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-mips.c, * pe-x86_64.c, * peXXigen.c, * pef.c, * pef.h, * pei-arm.c, * pei-i386.c, * pei-mcore.c, * pei-x86_64.c, * peicode.h, * plugin.c, * ppcboot.c, * ptrace-core.c, * reloc.c, * riscix.c, * rs6000-core.c, * section.c, * som.c, * som.h, * sparclinux.c, * sparcnetbsd.c, * srec.c, * stabs.c, * sunos.c, * syms.c, * targets.c, * tekhex.c, * trad-core.c, * vax1knetbsd.c, * vaxnetbsd.c, * verilog.c, * versados.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * wasm-module.c, * wasm-module.h, * xcofflink.c, * xsym.c, * xsym.h: Whitespace fixes. * bfd-in2.h, * libbfd.h, * libcoff.h: Regenerate.
2017-12-05 23:56:00 +01:00
NOP => add R0, R1, R0
Fix accesses to the GOT for AARCH64 operating in 32-bit mode. PR ld/20868 bfd * elfnn-aarch64.c (elfNN_aarch64_tls_relax): Use 32-bit accesses to the GOT when operating in 32-bit mode. ld * testsuite/ld-aarch64/tls-relax-gd-ie-ilp32.d: New test. * testsuite/ld-aarch64/relocs-ilp32.ld: Linker script for the new test. * testsuite/ld-aarch64/aarch64-elf.exp: Run the new test.
2016-12-01 13:31:51 +01:00
Where R is x for lp64 mode, and w for ilp32 mode. */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
BFD_ASSERT (ELFNN_R_TYPE (rel[1].r_info) == AARCH64_R (CALL26));
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* Remove the relocation on the BL instruction. */
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
rel[1].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* We choose to fixup the BL and NOP instructions using the
offset from the second relocation to allow flexibility in
scheduling instructions between the ADD and BL. */
Fix AArch64 relocation handling in ILP32 mode. bfd * elfnn-aarch64.c: Fix relaxations for ILP32 mode. ld * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests. * testsuite/ld-aarch64/tls-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-all-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gd-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-3-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-le-ilp32.d: New test.
2017-01-23 18:07:13 +01:00
bfd_putl32 (ldr_R0_x0, contents + rel->r_offset);
Fix accesses to the GOT for AARCH64 operating in 32-bit mode. PR ld/20868 bfd * elfnn-aarch64.c (elfNN_aarch64_tls_relax): Use 32-bit accesses to the GOT when operating in 32-bit mode. ld * testsuite/ld-aarch64/tls-relax-gd-ie-ilp32.d: New test. * testsuite/ld-aarch64/relocs-ilp32.ld: Linker script for the new test. * testsuite/ld-aarch64/aarch64-elf.exp: Run the new test.
2016-12-01 13:31:51 +01:00
bfd_putl32 (0xd53bd041, contents + rel[1].r_offset);
Fix AArch64 relocation handling in ILP32 mode. bfd * elfnn-aarch64.c: Fix relaxations for ILP32 mode. ld * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests. * testsuite/ld-aarch64/tls-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-all-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gd-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-3-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-le-ilp32.d: New test.
2017-01-23 18:07:13 +01:00
bfd_putl32 (add_R0_R0_R1, contents + rel[1].r_offset + 4);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
return bfd_reloc_continue;
}
[LD][AARCH64]Add TLSDESC support for large memory model. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_tls_transition_without_check): Add relax transitions for TLSDESC_ADD, TLSDESC_LDR, TLSDESC_OFF_G0_NC, TLSDESC_OFF_G1. (aarch64_tls_transition_without_check): Add relaxation support. (aarch64_reloc_got_type): Add support. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/aarch64-elf.exp: Run new test. * ld-aarch64/tls-large-desc.d: New. * ld-aarch64/tls-large-desc.s: New. * ld-aarch64/tls-relax-large-desc-ie.d: New. * ld-aarch64/tls-relax-large-desc-ie.s: New. * ld-aarch64/tls-relax-large-desc-le.d: New. * ld-aarch64/tls-relax-large-desc-le.s: New.
2015-10-02 18:43:08 +02:00
case BFD_RELOC_AARCH64_TLSDESC_ADD:
Rename R_AARCH64_TLSDESC_LD64_LO12_NC to R_AARCH64_TLSDESC_LD64_LO12 and R_AARCH64_TLSDESC_ADD_LO12_NC to R_AARCH64_TLSDESC_ADD_LO12. PR binutils/21202 include * elf/aarch64.h (R_AARCH64_TLSDESC_LD64_LO12_NC): Rename to R_AARCH64_TLSDESC_LD64_LO12. (R_AARCH64_TLSDESC_ADD_LO12_NC): Rename to R_AARCH64_TLSDESC_ADD_LO12_NC. bfd * reloc.c (BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC): Rename to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12. (BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC): Rename to BFD_RELOC_AARCH64_TLSDESC_ADD_LO12. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elfnn-aarch64.c (IS_AARCH64_TLS_RELAX_RELOC): Update reloc names. (IS_AARCH64_TLSDESC_RELOC): Likewise. (elfNN_aarch64_howto_table): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. gas * config/tc-aarch64.c (reloc_table): Rename BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12. Rname BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC to BFD_RELOC_AARCH64_TLSDESC_ADD_LO12. (md_apply_fix): Likewise. (aarch64_force_relocation): Likewise. * testsuite/gas/aarch64/tls.d: Update regexp. ld * testsuite/ld-aarch64/ifunc-5r-local.d: Update regexp.
2017-03-13 10:58:04 +01:00
case BFD_RELOC_AARCH64_TLSDESC_ADD_LO12:
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
case BFD_RELOC_AARCH64_TLSDESC_CALL:
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* GD->IE/LE relaxation:
BFD whitespace fixes Binutils is supposed to use tabs. In my git config I have whitespace = indent-with-non-tab,space-before-tab,trailing-space and I got annoyed enough seeing red in "git diff" output to fix the problems. * doc/header.sed: Trim trailing space when splitting lines. * aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-cris.c, * aout-ns32k.c, * aout-target.h, * aout-tic30.c, * aoutf1.h, * aoutx.h, * arc-got.h, * arc-plt.def, * arc-plt.h, * archive.c, * archive64.c, * archures.c, * armnetbsd.c, * bfd-in.h, * bfd.c, * bfdio.c, * binary.c, * bout.c, * cache.c, * cisco-core.c, * coff-alpha.c, * coff-apollo.c, * coff-arm.c, * coff-h8300.c, * coff-i386.c, * coff-i860.c, * coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mcore.c, * coff-mips.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-stgo32.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * compress.c, * corefile.c, * cpu-alpha.c, * cpu-arm.c, * cpu-avr.c, * cpu-bfin.c, * cpu-cr16.c, * cpu-cr16c.c, * cpu-crx.c, * cpu-d10v.c, * cpu-frv.c, * cpu-ft32.c, * cpu-i370.c, * cpu-i960.c, * cpu-ia64-opc.c, * cpu-ip2k.c, * cpu-lm32.c, * cpu-m32r.c, * cpu-mcore.c, * cpu-microblaze.c, * cpu-mips.c, * cpu-moxie.c, * cpu-mt.c, * cpu-nios2.c, * cpu-ns32k.c, * cpu-or1k.c, * cpu-powerpc.c, * cpu-pru.c, * cpu-sh.c, * cpu-spu.c, * cpu-v850.c, * cpu-v850_rh850.c, * cpu-xgate.c, * cpu-z80.c, * dwarf1.c, * dwarf2.c, * ecoff.c, * ecofflink.c, * ecoffswap.h, * elf-bfd.h, * elf-eh-frame.c, * elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf-s390-common.c, * elf-strtab.c, * elf-vxworks.c, * elf.c, * elf32-am33lin.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-avr.h, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-i860.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68hc1x.c, * elf32-m68hc1x.h, * elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nds32.h, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score.h, * elf32-score7.c, * elf32-sh-symbian.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilegx.c, * elf32-tilegx.h, * elf32-tilepro.c, * elf32-tilepro.h, * elf32-v850.c, * elf32-vax.c, * elf32-wasm32.c, * elf32-xc16x.c, * elf32-xgate.c, * elf32-xgate.h, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-tilegx.c, * elf64-tilegx.h, * elf64-x86-64.c, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-aarch64.h, * elfxx-ia64.c, * elfxx-ia64.h, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * elfxx-x86.h, * freebsd.h, * hash.c, * host-aout.c, * hp300hpux.c, * hppabsd-core.c, * hpux-core.c, * i386aout.c, * i386linux.c, * i386lynx.c, * i386mach3.c, * i386msdos.c, * i386netbsd.c, * ieee.c, * ihex.c, * irix-core.c, * libaout.h, * libbfd-in.h, * libbfd.c, * libcoff-in.h, * libnlm.h, * libpei.h, * libxcoff.h, * linker.c, * lynx-core.c, * m68k4knetbsd.c, * m68klinux.c, * m68knetbsd.c, * m88kmach3.c, * mach-o-aarch64.c, * mach-o-arm.c, * mach-o-i386.c, * mach-o-target.c, * mach-o-x86-64.c, * mach-o.c, * mach-o.h, * merge.c, * mipsbsd.c, * mmo.c, * netbsd.h, * netbsd-core.c, * newsos3.c, * nlm-target.h, * nlm32-ppc.c, * nlm32-sparc.c, * nlmcode.h, * ns32k.h, * ns32knetbsd.c, * oasys.c, * opncls.c, * pc532-mach.c, * pdp11.c, * pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-mips.c, * pe-x86_64.c, * peXXigen.c, * pef.c, * pef.h, * pei-arm.c, * pei-i386.c, * pei-mcore.c, * pei-x86_64.c, * peicode.h, * plugin.c, * ppcboot.c, * ptrace-core.c, * reloc.c, * riscix.c, * rs6000-core.c, * section.c, * som.c, * som.h, * sparclinux.c, * sparcnetbsd.c, * srec.c, * stabs.c, * sunos.c, * syms.c, * targets.c, * tekhex.c, * trad-core.c, * vax1knetbsd.c, * vaxnetbsd.c, * verilog.c, * versados.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * wasm-module.c, * wasm-module.h, * xcofflink.c, * xsym.c, * xsym.h: Whitespace fixes. * bfd-in2.h, * libbfd.h, * libcoff.h: Regenerate.
2017-12-05 23:56:00 +01:00
add x0, x0, #:tlsdesc_lo12:var => nop
blr xd => nop
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
*/
bfd_putl32 (INSN_NOP, contents + rel->r_offset);
return bfd_reloc_ok;
[LD][AARCH64]Add TLSDESC support for large memory model. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_tls_transition_without_check): Add relax transitions for TLSDESC_ADD, TLSDESC_LDR, TLSDESC_OFF_G0_NC, TLSDESC_OFF_G1. (aarch64_tls_transition_without_check): Add relaxation support. (aarch64_reloc_got_type): Add support. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/aarch64-elf.exp: Run new test. * ld-aarch64/tls-large-desc.d: New. * ld-aarch64/tls-large-desc.s: New. * ld-aarch64/tls-relax-large-desc-ie.d: New. * ld-aarch64/tls-relax-large-desc-ie.s: New. * ld-aarch64/tls-relax-large-desc-le.d: New. * ld-aarch64/tls-relax-large-desc-le.s: New.
2015-10-02 18:43:08 +02:00
case BFD_RELOC_AARCH64_TLSDESC_LDR:
if (is_local)
{
/* GD->LE relaxation:
Fix AArch64 relocation handling in ILP32 mode. bfd * elfnn-aarch64.c: Fix relaxations for ILP32 mode. ld * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests. * testsuite/ld-aarch64/tls-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-all-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gd-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-3-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-le-ilp32.d: New test.
2017-01-23 18:07:13 +01:00
ldr xd, [gp, xn] => movk R0, #:tprel_g0_nc:var
Where R is x for lp64 mode, and w for ILP32 mode. */
bfd_putl32 (movk_R0, contents + rel->r_offset);
[LD][AARCH64]Add TLSDESC support for large memory model. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_tls_transition_without_check): Add relax transitions for TLSDESC_ADD, TLSDESC_LDR, TLSDESC_OFF_G0_NC, TLSDESC_OFF_G1. (aarch64_tls_transition_without_check): Add relaxation support. (aarch64_reloc_got_type): Add support. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/aarch64-elf.exp: Run new test. * ld-aarch64/tls-large-desc.d: New. * ld-aarch64/tls-large-desc.s: New. * ld-aarch64/tls-relax-large-desc-ie.d: New. * ld-aarch64/tls-relax-large-desc-ie.s: New. * ld-aarch64/tls-relax-large-desc-le.d: New. * ld-aarch64/tls-relax-large-desc-le.s: New.
2015-10-02 18:43:08 +02:00
return bfd_reloc_continue;
}
else
{
/* GD->IE relaxation:
Fix AArch64 relocation handling in ILP32 mode. bfd * elfnn-aarch64.c: Fix relaxations for ILP32 mode. ld * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests. * testsuite/ld-aarch64/tls-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-all-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gd-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-3-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-le-ilp32.d: New test.
2017-01-23 18:07:13 +01:00
ldr xd, [gp, xn] => ldr R0, [gp, xn]
Where R is x for lp64 mode, and w for ILP32 mode. */
[LD][AARCH64]Add TLSDESC support for large memory model. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_tls_transition_without_check): Add relax transitions for TLSDESC_ADD, TLSDESC_LDR, TLSDESC_OFF_G0_NC, TLSDESC_OFF_G1. (aarch64_tls_transition_without_check): Add relaxation support. (aarch64_reloc_got_type): Add support. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/aarch64-elf.exp: Run new test. * ld-aarch64/tls-large-desc.d: New. * ld-aarch64/tls-large-desc.s: New. * ld-aarch64/tls-relax-large-desc-ie.d: New. * ld-aarch64/tls-relax-large-desc-ie.s: New. * ld-aarch64/tls-relax-large-desc-le.d: New. * ld-aarch64/tls-relax-large-desc-le.s: New.
2015-10-02 18:43:08 +02:00
insn = bfd_getl32 (contents + rel->r_offset);
Fix AArch64 relocation handling in ILP32 mode. bfd * elfnn-aarch64.c: Fix relaxations for ILP32 mode. ld * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests. * testsuite/ld-aarch64/tls-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-all-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gd-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-3-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-le-ilp32.d: New test.
2017-01-23 18:07:13 +01:00
bfd_putl32 (ldr_R0_mask (insn), contents + rel->r_offset);
[LD][AARCH64]Add TLSDESC support for large memory model. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_tls_transition_without_check): Add relax transitions for TLSDESC_ADD, TLSDESC_LDR, TLSDESC_OFF_G0_NC, TLSDESC_OFF_G1. (aarch64_tls_transition_without_check): Add relaxation support. (aarch64_reloc_got_type): Add support. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/aarch64-elf.exp: Run new test. * ld-aarch64/tls-large-desc.d: New. * ld-aarch64/tls-large-desc.s: New. * ld-aarch64/tls-relax-large-desc-ie.d: New. * ld-aarch64/tls-relax-large-desc-ie.s: New. * ld-aarch64/tls-relax-large-desc-le.d: New. * ld-aarch64/tls-relax-large-desc-le.s: New.
2015-10-02 18:43:08 +02:00
return bfd_reloc_ok;
}
case BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC:
/* GD->LE relaxation:
Fix AArch64 relocation handling in ILP32 mode. bfd * elfnn-aarch64.c: Fix relaxations for ILP32 mode. ld * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests. * testsuite/ld-aarch64/tls-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-all-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gd-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-3-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-le-ilp32.d: New test.
2017-01-23 18:07:13 +01:00
movk xd, #:tlsdesc_off_g0_nc:var => movk R0, #:tprel_g1_nc:var, lsl #16
[LD][AARCH64]Add TLSDESC support for large memory model. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_tls_transition_without_check): Add relax transitions for TLSDESC_ADD, TLSDESC_LDR, TLSDESC_OFF_G0_NC, TLSDESC_OFF_G1. (aarch64_tls_transition_without_check): Add relaxation support. (aarch64_reloc_got_type): Add support. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/aarch64-elf.exp: Run new test. * ld-aarch64/tls-large-desc.d: New. * ld-aarch64/tls-large-desc.s: New. * ld-aarch64/tls-relax-large-desc-ie.d: New. * ld-aarch64/tls-relax-large-desc-ie.s: New. * ld-aarch64/tls-relax-large-desc-le.d: New. * ld-aarch64/tls-relax-large-desc-le.s: New.
2015-10-02 18:43:08 +02:00
GD->IE relaxation:
Fix AArch64 relocation handling in ILP32 mode. bfd * elfnn-aarch64.c: Fix relaxations for ILP32 mode. ld * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests. * testsuite/ld-aarch64/tls-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-all-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gd-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-3-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-le-ilp32.d: New test.
2017-01-23 18:07:13 +01:00
movk xd, #:tlsdesc_off_g0_nc:var => movk Rd, #:gottprel_g0_nc:var
Where R is x for lp64 mode, and w for ILP32 mode. */
[LD][AARCH64]Add TLSDESC support for large memory model. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_tls_transition_without_check): Add relax transitions for TLSDESC_ADD, TLSDESC_LDR, TLSDESC_OFF_G0_NC, TLSDESC_OFF_G1. (aarch64_tls_transition_without_check): Add relaxation support. (aarch64_reloc_got_type): Add support. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/aarch64-elf.exp: Run new test. * ld-aarch64/tls-large-desc.d: New. * ld-aarch64/tls-large-desc.s: New. * ld-aarch64/tls-relax-large-desc-ie.d: New. * ld-aarch64/tls-relax-large-desc-ie.s: New. * ld-aarch64/tls-relax-large-desc-le.d: New. * ld-aarch64/tls-relax-large-desc-le.s: New.
2015-10-02 18:43:08 +02:00
if (is_local)
Fix AArch64 relocation handling in ILP32 mode. bfd * elfnn-aarch64.c: Fix relaxations for ILP32 mode. ld * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests. * testsuite/ld-aarch64/tls-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-all-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gd-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-3-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-le-ilp32.d: New test.
2017-01-23 18:07:13 +01:00
bfd_putl32 (ldr_hw_R0, contents + rel->r_offset);
[LD][AARCH64]Add TLSDESC support for large memory model. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_tls_transition_without_check): Add relax transitions for TLSDESC_ADD, TLSDESC_LDR, TLSDESC_OFF_G0_NC, TLSDESC_OFF_G1. (aarch64_tls_transition_without_check): Add relaxation support. (aarch64_reloc_got_type): Add support. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/aarch64-elf.exp: Run new test. * ld-aarch64/tls-large-desc.d: New. * ld-aarch64/tls-large-desc.s: New. * ld-aarch64/tls-relax-large-desc-ie.d: New. * ld-aarch64/tls-relax-large-desc-ie.s: New. * ld-aarch64/tls-relax-large-desc-le.d: New. * ld-aarch64/tls-relax-large-desc-le.s: New.
2015-10-02 18:43:08 +02:00
return bfd_reloc_continue;
case BFD_RELOC_AARCH64_TLSDESC_OFF_G1:
if (is_local)
{
/* GD->LE relaxation:
Fix AArch64 relocation handling in ILP32 mode. bfd * elfnn-aarch64.c: Fix relaxations for ILP32 mode. ld * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests. * testsuite/ld-aarch64/tls-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-all-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gd-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-3-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-le-ilp32.d: New test.
2017-01-23 18:07:13 +01:00
movz xd, #:tlsdesc_off_g1:var => movz R0, #:tprel_g2:var, lsl #32
Where R is x for lp64 mode, and w for ILP32 mode. */
bfd_putl32 (movz_hw_R0, contents + rel->r_offset);
[LD][AARCH64]Add TLSDESC support for large memory model. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_tls_transition_without_check): Add relax transitions for TLSDESC_ADD, TLSDESC_LDR, TLSDESC_OFF_G0_NC, TLSDESC_OFF_G1. (aarch64_tls_transition_without_check): Add relaxation support. (aarch64_reloc_got_type): Add support. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/aarch64-elf.exp: Run new test. * ld-aarch64/tls-large-desc.d: New. * ld-aarch64/tls-large-desc.s: New. * ld-aarch64/tls-relax-large-desc-ie.d: New. * ld-aarch64/tls-relax-large-desc-ie.s: New. * ld-aarch64/tls-relax-large-desc-le.d: New. * ld-aarch64/tls-relax-large-desc-le.s: New.
2015-10-02 18:43:08 +02:00
return bfd_reloc_continue;
}
else
{
/* GD->IE relaxation:
Fix AArch64 relocation handling in ILP32 mode. bfd * elfnn-aarch64.c: Fix relaxations for ILP32 mode. ld * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests. * testsuite/ld-aarch64/tls-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-all-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gd-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-3-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-le-ilp32.d: New test.
2017-01-23 18:07:13 +01:00
movz xd, #:tlsdesc_off_g1:var => movz Rd, #:gottprel_g1:var, lsl #16
Where R is x for lp64 mode, and w for ILP32 mode. */
[LD][AARCH64]Add TLSDESC support for large memory model. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_tls_transition_without_check): Add relax transitions for TLSDESC_ADD, TLSDESC_LDR, TLSDESC_OFF_G0_NC, TLSDESC_OFF_G1. (aarch64_tls_transition_without_check): Add relaxation support. (aarch64_reloc_got_type): Add support. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/aarch64-elf.exp: Run new test. * ld-aarch64/tls-large-desc.d: New. * ld-aarch64/tls-large-desc.s: New. * ld-aarch64/tls-relax-large-desc-ie.d: New. * ld-aarch64/tls-relax-large-desc-ie.s: New. * ld-aarch64/tls-relax-large-desc-le.d: New. * ld-aarch64/tls-relax-large-desc-le.s: New.
2015-10-02 18:43:08 +02:00
insn = bfd_getl32 (contents + rel->r_offset);
Fix AArch64 relocation handling in ILP32 mode. bfd * elfnn-aarch64.c: Fix relaxations for ILP32 mode. ld * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests. * testsuite/ld-aarch64/tls-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-all-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gd-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-3-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-le-ilp32.d: New test.
2017-01-23 18:07:13 +01:00
bfd_putl32 (movz_R0 | (insn & 0x1f), contents + rel->r_offset);
[LD][AARCH64]Add TLSDESC support for large memory model. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_tls_transition_without_check): Add relax transitions for TLSDESC_ADD, TLSDESC_LDR, TLSDESC_OFF_G0_NC, TLSDESC_OFF_G1. (aarch64_tls_transition_without_check): Add relaxation support. (aarch64_reloc_got_type): Add support. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/aarch64-elf.exp: Run new test. * ld-aarch64/tls-large-desc.d: New. * ld-aarch64/tls-large-desc.s: New. * ld-aarch64/tls-relax-large-desc-ie.d: New. * ld-aarch64/tls-relax-large-desc-ie.s: New. * ld-aarch64/tls-relax-large-desc-le.d: New. * ld-aarch64/tls-relax-large-desc-le.s: New.
2015-10-02 18:43:08 +02:00
return bfd_reloc_continue;
}
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* IE->LE relaxation:
BFD whitespace fixes Binutils is supposed to use tabs. In my git config I have whitespace = indent-with-non-tab,space-before-tab,trailing-space and I got annoyed enough seeing red in "git diff" output to fix the problems. * doc/header.sed: Trim trailing space when splitting lines. * aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-cris.c, * aout-ns32k.c, * aout-target.h, * aout-tic30.c, * aoutf1.h, * aoutx.h, * arc-got.h, * arc-plt.def, * arc-plt.h, * archive.c, * archive64.c, * archures.c, * armnetbsd.c, * bfd-in.h, * bfd.c, * bfdio.c, * binary.c, * bout.c, * cache.c, * cisco-core.c, * coff-alpha.c, * coff-apollo.c, * coff-arm.c, * coff-h8300.c, * coff-i386.c, * coff-i860.c, * coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mcore.c, * coff-mips.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-stgo32.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * compress.c, * corefile.c, * cpu-alpha.c, * cpu-arm.c, * cpu-avr.c, * cpu-bfin.c, * cpu-cr16.c, * cpu-cr16c.c, * cpu-crx.c, * cpu-d10v.c, * cpu-frv.c, * cpu-ft32.c, * cpu-i370.c, * cpu-i960.c, * cpu-ia64-opc.c, * cpu-ip2k.c, * cpu-lm32.c, * cpu-m32r.c, * cpu-mcore.c, * cpu-microblaze.c, * cpu-mips.c, * cpu-moxie.c, * cpu-mt.c, * cpu-nios2.c, * cpu-ns32k.c, * cpu-or1k.c, * cpu-powerpc.c, * cpu-pru.c, * cpu-sh.c, * cpu-spu.c, * cpu-v850.c, * cpu-v850_rh850.c, * cpu-xgate.c, * cpu-z80.c, * dwarf1.c, * dwarf2.c, * ecoff.c, * ecofflink.c, * ecoffswap.h, * elf-bfd.h, * elf-eh-frame.c, * elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf-s390-common.c, * elf-strtab.c, * elf-vxworks.c, * elf.c, * elf32-am33lin.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-avr.h, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-i860.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68hc1x.c, * elf32-m68hc1x.h, * elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nds32.h, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score.h, * elf32-score7.c, * elf32-sh-symbian.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilegx.c, * elf32-tilegx.h, * elf32-tilepro.c, * elf32-tilepro.h, * elf32-v850.c, * elf32-vax.c, * elf32-wasm32.c, * elf32-xc16x.c, * elf32-xgate.c, * elf32-xgate.h, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-tilegx.c, * elf64-tilegx.h, * elf64-x86-64.c, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-aarch64.h, * elfxx-ia64.c, * elfxx-ia64.h, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * elfxx-x86.h, * freebsd.h, * hash.c, * host-aout.c, * hp300hpux.c, * hppabsd-core.c, * hpux-core.c, * i386aout.c, * i386linux.c, * i386lynx.c, * i386mach3.c, * i386msdos.c, * i386netbsd.c, * ieee.c, * ihex.c, * irix-core.c, * libaout.h, * libbfd-in.h, * libbfd.c, * libcoff-in.h, * libnlm.h, * libpei.h, * libxcoff.h, * linker.c, * lynx-core.c, * m68k4knetbsd.c, * m68klinux.c, * m68knetbsd.c, * m88kmach3.c, * mach-o-aarch64.c, * mach-o-arm.c, * mach-o-i386.c, * mach-o-target.c, * mach-o-x86-64.c, * mach-o.c, * mach-o.h, * merge.c, * mipsbsd.c, * mmo.c, * netbsd.h, * netbsd-core.c, * newsos3.c, * nlm-target.h, * nlm32-ppc.c, * nlm32-sparc.c, * nlmcode.h, * ns32k.h, * ns32knetbsd.c, * oasys.c, * opncls.c, * pc532-mach.c, * pdp11.c, * pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-mips.c, * pe-x86_64.c, * peXXigen.c, * pef.c, * pef.h, * pei-arm.c, * pei-i386.c, * pei-mcore.c, * pei-x86_64.c, * peicode.h, * plugin.c, * ppcboot.c, * ptrace-core.c, * reloc.c, * riscix.c, * rs6000-core.c, * section.c, * som.c, * som.h, * sparclinux.c, * sparcnetbsd.c, * srec.c, * stabs.c, * sunos.c, * syms.c, * targets.c, * tekhex.c, * trad-core.c, * vax1knetbsd.c, * vaxnetbsd.c, * verilog.c, * versados.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * wasm-module.c, * wasm-module.h, * xcofflink.c, * xsym.c, * xsym.h: Whitespace fixes. * bfd-in2.h, * libbfd.h, * libcoff.h: Regenerate.
2017-12-05 23:56:00 +01:00
adrp xd, :gottprel:var => movz Rd, :tprel_g1:var
Fix AArch64 relocation handling in ILP32 mode. bfd * elfnn-aarch64.c: Fix relaxations for ILP32 mode. ld * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests. * testsuite/ld-aarch64/tls-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-all-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gd-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-3-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-le-ilp32.d: New test.
2017-01-23 18:07:13 +01:00
Where R is x for lp64 mode, and w for ILP32 mode. */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
if (is_local)
{
insn = bfd_getl32 (contents + rel->r_offset);
Fix AArch64 relocation handling in ILP32 mode. bfd * elfnn-aarch64.c: Fix relaxations for ILP32 mode. ld * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests. * testsuite/ld-aarch64/tls-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-all-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gd-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-3-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-le-ilp32.d: New test.
2017-01-23 18:07:13 +01:00
bfd_putl32 (movz_R0 | (insn & 0x1f), contents + rel->r_offset);
AArch64: Fix regression in Cortex A53 erratum when PIE. (PR ld/23904) The fix for PR ld/22263 causes TLS relocations using ADRP to be relaxed into MOVZ, however this causes issues for the erratum code. The erratum code scans the input sections looking for ADRP instructions and notes their location in the stream. It then later tries to find them again in order to generate the linker stubs. Due to the relaxation it instead finds a MOVZ and hard aborts. Since this relaxation is a valid one, and in which case the erratum no longer applies, it shouldn't abort but instead just continue. This changes the TLS relaxation code such that when it finds an ADRP and it relaxes it, it removes the erratum entry from the work list by changing the stub type into none so the stub is ignored. The entry is not actually removed as removal is a more expensive operation and we have already allocated the memory anyway. The clearing is done for IE->LE and GD->LE relaxations, and a testcase is added for the IE case. The GD case I believe to be impossible to get together with the erratum sequence due to the required BL which would break the sequence. However to cover all basis I have added the guard there as well. build on native hardware and regtested on aarch64-none-elf, aarch64-none-elf (32 bit host), aarch64-none-linux-gnu, aarch64-none-linux-gnu (32 bit host) Cross-compiled and regtested on aarch64-none-linux-gnu, aarch64_be-none-linux-gnu Testcase in PR23940 tested and works as expected now and benchmarks ran on A53 showing no regressions and no issues. bfd/ChangeLog: PR ld/23904 * elfnn-aarch64.c (_bfd_aarch64_adrp_p): Use existing constants. (_bfd_aarch64_erratum_843419_branch_to_stub): Use _bfd_aarch64_adrp_p. (struct erratum_835769_branch_to_stub_clear_data): New. (_bfd_aarch64_erratum_843419_clear_stub): New. (clear_erratum_843419_entry): New. (elfNN_aarch64_tls_relax): Use it. (elfNN_aarch64_relocate_section): Pass input_section. (aarch64_map_one_stub): Handle branch type none as valid. ld/ChangeLog: PR ld/23904 * testsuite/ld-aarch64/aarch64-elf.exp: Add erratum843419_tls_ie. * testsuite/ld-aarch64/erratum843419_tls_ie.d: New test. * testsuite/ld-aarch64/erratum843419_tls_ie.s: New test.
2018-11-27 13:33:21 +01:00
/* We have relaxed the adrp into a mov, we may have to clear any
pending erratum fixes. */
clear_erratum_843419_entry (globals, rel->r_offset, input_section);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
}
return bfd_reloc_continue;
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
case BFD_RELOC_AARCH64_TLSIE_LDNN_GOTTPREL_LO12_NC:
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* IE->LE relaxation:
BFD whitespace fixes Binutils is supposed to use tabs. In my git config I have whitespace = indent-with-non-tab,space-before-tab,trailing-space and I got annoyed enough seeing red in "git diff" output to fix the problems. * doc/header.sed: Trim trailing space when splitting lines. * aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-cris.c, * aout-ns32k.c, * aout-target.h, * aout-tic30.c, * aoutf1.h, * aoutx.h, * arc-got.h, * arc-plt.def, * arc-plt.h, * archive.c, * archive64.c, * archures.c, * armnetbsd.c, * bfd-in.h, * bfd.c, * bfdio.c, * binary.c, * bout.c, * cache.c, * cisco-core.c, * coff-alpha.c, * coff-apollo.c, * coff-arm.c, * coff-h8300.c, * coff-i386.c, * coff-i860.c, * coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mcore.c, * coff-mips.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-stgo32.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * compress.c, * corefile.c, * cpu-alpha.c, * cpu-arm.c, * cpu-avr.c, * cpu-bfin.c, * cpu-cr16.c, * cpu-cr16c.c, * cpu-crx.c, * cpu-d10v.c, * cpu-frv.c, * cpu-ft32.c, * cpu-i370.c, * cpu-i960.c, * cpu-ia64-opc.c, * cpu-ip2k.c, * cpu-lm32.c, * cpu-m32r.c, * cpu-mcore.c, * cpu-microblaze.c, * cpu-mips.c, * cpu-moxie.c, * cpu-mt.c, * cpu-nios2.c, * cpu-ns32k.c, * cpu-or1k.c, * cpu-powerpc.c, * cpu-pru.c, * cpu-sh.c, * cpu-spu.c, * cpu-v850.c, * cpu-v850_rh850.c, * cpu-xgate.c, * cpu-z80.c, * dwarf1.c, * dwarf2.c, * ecoff.c, * ecofflink.c, * ecoffswap.h, * elf-bfd.h, * elf-eh-frame.c, * elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf-s390-common.c, * elf-strtab.c, * elf-vxworks.c, * elf.c, * elf32-am33lin.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-avr.h, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-i860.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68hc1x.c, * elf32-m68hc1x.h, * elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nds32.h, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score.h, * elf32-score7.c, * elf32-sh-symbian.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilegx.c, * elf32-tilegx.h, * elf32-tilepro.c, * elf32-tilepro.h, * elf32-v850.c, * elf32-vax.c, * elf32-wasm32.c, * elf32-xc16x.c, * elf32-xgate.c, * elf32-xgate.h, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-tilegx.c, * elf64-tilegx.h, * elf64-x86-64.c, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-aarch64.h, * elfxx-ia64.c, * elfxx-ia64.h, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * elfxx-x86.h, * freebsd.h, * hash.c, * host-aout.c, * hp300hpux.c, * hppabsd-core.c, * hpux-core.c, * i386aout.c, * i386linux.c, * i386lynx.c, * i386mach3.c, * i386msdos.c, * i386netbsd.c, * ieee.c, * ihex.c, * irix-core.c, * libaout.h, * libbfd-in.h, * libbfd.c, * libcoff-in.h, * libnlm.h, * libpei.h, * libxcoff.h, * linker.c, * lynx-core.c, * m68k4knetbsd.c, * m68klinux.c, * m68knetbsd.c, * m88kmach3.c, * mach-o-aarch64.c, * mach-o-arm.c, * mach-o-i386.c, * mach-o-target.c, * mach-o-x86-64.c, * mach-o.c, * mach-o.h, * merge.c, * mipsbsd.c, * mmo.c, * netbsd.h, * netbsd-core.c, * newsos3.c, * nlm-target.h, * nlm32-ppc.c, * nlm32-sparc.c, * nlmcode.h, * ns32k.h, * ns32knetbsd.c, * oasys.c, * opncls.c, * pc532-mach.c, * pdp11.c, * pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-mips.c, * pe-x86_64.c, * peXXigen.c, * pef.c, * pef.h, * pei-arm.c, * pei-i386.c, * pei-mcore.c, * pei-x86_64.c, * peicode.h, * plugin.c, * ppcboot.c, * ptrace-core.c, * reloc.c, * riscix.c, * rs6000-core.c, * section.c, * som.c, * som.h, * sparclinux.c, * sparcnetbsd.c, * srec.c, * stabs.c, * sunos.c, * syms.c, * targets.c, * tekhex.c, * trad-core.c, * vax1knetbsd.c, * vaxnetbsd.c, * verilog.c, * versados.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * wasm-module.c, * wasm-module.h, * xcofflink.c, * xsym.c, * xsym.h: Whitespace fixes. * bfd-in2.h, * libbfd.h, * libcoff.h: Regenerate.
2017-12-05 23:56:00 +01:00
ldr xd, [xm, #:gottprel_lo12:var] => movk Rd, :tprel_g0_nc:var
Fix AArch64 relocation handling in ILP32 mode. bfd * elfnn-aarch64.c: Fix relaxations for ILP32 mode. ld * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests. * testsuite/ld-aarch64/tls-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-all-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gd-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-3-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-le-ilp32.d: New test.
2017-01-23 18:07:13 +01:00
Where R is x for lp64 mode, and w for ILP32 mode. */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
if (is_local)
{
insn = bfd_getl32 (contents + rel->r_offset);
Fix AArch64 relocation handling in ILP32 mode. bfd * elfnn-aarch64.c: Fix relaxations for ILP32 mode. ld * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests. * testsuite/ld-aarch64/tls-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-all-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gd-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-3-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-le-ilp32.d: New test.
2017-01-23 18:07:13 +01:00
bfd_putl32 (movk_R0 | (insn & 0x1f), contents + rel->r_offset);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
}
return bfd_reloc_continue;
[AArch64] Relax TLS local dynamic traditional into local executable The linker relaxation logic will be: Code sequence I (tiny): 0x00 adr x0, :tlsldm:x 0x04 bl __tls_get_addr | V 0x00 mrs x0, tpidr_el0 0x04 add x0, x0, TCB_SIZE Code sequence II (small): 0x00 adrp a0, :tlsldm:x 0x04 add a0, #:tlsldm_lo12:x 0x08 bl __tls_get_addr | V 0x00 mrs x0, tpidr_el0 0x04 add x0, x0, TCB_SIZE 0x08 nop 2015-09-09 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_tls_transition_without_check): Support three TLS local dynamic traditional relocations types. (elfNN_aarch64_tls_relax): Support TLS local dynamic traditional to local executable relaxation. ld/testsuite/ * ld-aarch64/tls-relax-ld-le-tiny.s: New testcase. * ld-aarch64/tls-relax-ld-le-small.s: Likewise. * ld-aarch64/tls-relax-ld-le-tiny.d: New expectation file. * ld-aarch64/tls-relax-ld-le-small.d: Likewise. * ld-aarch64/aarch64-elf.exp: Run new testcases.
2015-09-09 15:19:28 +02:00
case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
/* LD->LE relaxation (tiny):
adr x0, :tlsldm:x => mrs x0, tpidr_el0
ld: aarch64: fix TLS relaxation where TCB_SIZE is used TCB_SIZE is 2*sizeof(void *), which is 0x10 for lp64, and 0x8 for ilp32. During relaxation, ld goes to do a replace: bl __tls_get_addr => add R0, R0, TCB_SIZE But actual implementation is: bfd_putl32 (0x91004000, contents + rel->r_offset + 4); Which is equivalent of add x0, x0, 0x10. This is wrong for ilp32. The possible fix for it is: bfd_putl32 (0x91000000 | (TCB_SIZE<<10), contents + rel->r_offset + 4); But ilp32 also needs w-registers, so it's simpler to put proper instruction in #if/#else condition. There are 2 such relaxations in elfNN_aarch64_tls_relax(), and so 2 new tests added for ilp32 mode to test it. Yury * bfd/elfnn-aarch64.c: fix TLS relaxations for ilp32 where TCB_SIZE is used. * ld/testsuite/ld-aarch64/aarch64-elf.exp: Add tests for the case. * ld/testsuite/ld-aarch64/tls-relax-ld-le-small-ilp32.d: New file. * ld/testsuite/ld-aarch64/tls-relax-ld-le-tiny-ilp32.d: New file. Signed-off-by: Yury Norov <ynorov@caviumnetworks.com>
2016-12-03 14:20:43 +01:00
bl __tls_get_addr => add R0, R0, TCB_SIZE
Where R is x for lp64 mode, and w for ilp32 mode. */
[AArch64] Relax TLS local dynamic traditional into local executable The linker relaxation logic will be: Code sequence I (tiny): 0x00 adr x0, :tlsldm:x 0x04 bl __tls_get_addr | V 0x00 mrs x0, tpidr_el0 0x04 add x0, x0, TCB_SIZE Code sequence II (small): 0x00 adrp a0, :tlsldm:x 0x04 add a0, #:tlsldm_lo12:x 0x08 bl __tls_get_addr | V 0x00 mrs x0, tpidr_el0 0x04 add x0, x0, TCB_SIZE 0x08 nop 2015-09-09 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_tls_transition_without_check): Support three TLS local dynamic traditional relocations types. (elfNN_aarch64_tls_relax): Support TLS local dynamic traditional to local executable relaxation. ld/testsuite/ * ld-aarch64/tls-relax-ld-le-tiny.s: New testcase. * ld-aarch64/tls-relax-ld-le-small.s: Likewise. * ld-aarch64/tls-relax-ld-le-tiny.d: New expectation file. * ld-aarch64/tls-relax-ld-le-small.d: Likewise. * ld-aarch64/aarch64-elf.exp: Run new testcases.
2015-09-09 15:19:28 +02:00
if (is_local)
{
BFD_ASSERT (rel->r_offset + 4 == rel[1].r_offset);
BFD_ASSERT (ELFNN_R_TYPE (rel[1].r_info) == AARCH64_R (CALL26));
/* No need of CALL26 relocation for tls_get_addr. */
rel[1].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
bfd_putl32 (0xd53bd040, contents + rel->r_offset + 0);
Fix AArch64 relocation handling in ILP32 mode. bfd * elfnn-aarch64.c: Fix relaxations for ILP32 mode. ld * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests. * testsuite/ld-aarch64/tls-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-all-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gd-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-3-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-le-ilp32.d: New test.
2017-01-23 18:07:13 +01:00
bfd_putl32 (add_R0_R0 | (TCB_SIZE << 10),
contents + rel->r_offset + 4);
[AArch64] Relax TLS local dynamic traditional into local executable The linker relaxation logic will be: Code sequence I (tiny): 0x00 adr x0, :tlsldm:x 0x04 bl __tls_get_addr | V 0x00 mrs x0, tpidr_el0 0x04 add x0, x0, TCB_SIZE Code sequence II (small): 0x00 adrp a0, :tlsldm:x 0x04 add a0, #:tlsldm_lo12:x 0x08 bl __tls_get_addr | V 0x00 mrs x0, tpidr_el0 0x04 add x0, x0, TCB_SIZE 0x08 nop 2015-09-09 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_tls_transition_without_check): Support three TLS local dynamic traditional relocations types. (elfNN_aarch64_tls_relax): Support TLS local dynamic traditional to local executable relaxation. ld/testsuite/ * ld-aarch64/tls-relax-ld-le-tiny.s: New testcase. * ld-aarch64/tls-relax-ld-le-small.s: Likewise. * ld-aarch64/tls-relax-ld-le-tiny.d: New expectation file. * ld-aarch64/tls-relax-ld-le-small.d: Likewise. * ld-aarch64/aarch64-elf.exp: Run new testcases.
2015-09-09 15:19:28 +02:00
return bfd_reloc_ok;
}
return bfd_reloc_continue;
case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
/* LD->LE relaxation (small):
adrp x0, :tlsldm:x => mrs x0, tpidr_el0
*/
if (is_local)
{
bfd_putl32 (0xd53bd040, contents + rel->r_offset);
return bfd_reloc_ok;
}
return bfd_reloc_continue;
case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
/* LD->LE relaxation (small):
ld: aarch64: fix TLS relaxation where TCB_SIZE is used TCB_SIZE is 2*sizeof(void *), which is 0x10 for lp64, and 0x8 for ilp32. During relaxation, ld goes to do a replace: bl __tls_get_addr => add R0, R0, TCB_SIZE But actual implementation is: bfd_putl32 (0x91004000, contents + rel->r_offset + 4); Which is equivalent of add x0, x0, 0x10. This is wrong for ilp32. The possible fix for it is: bfd_putl32 (0x91000000 | (TCB_SIZE<<10), contents + rel->r_offset + 4); But ilp32 also needs w-registers, so it's simpler to put proper instruction in #if/#else condition. There are 2 such relaxations in elfNN_aarch64_tls_relax(), and so 2 new tests added for ilp32 mode to test it. Yury * bfd/elfnn-aarch64.c: fix TLS relaxations for ilp32 where TCB_SIZE is used. * ld/testsuite/ld-aarch64/aarch64-elf.exp: Add tests for the case. * ld/testsuite/ld-aarch64/tls-relax-ld-le-small-ilp32.d: New file. * ld/testsuite/ld-aarch64/tls-relax-ld-le-tiny-ilp32.d: New file. Signed-off-by: Yury Norov <ynorov@caviumnetworks.com>
2016-12-03 14:20:43 +01:00
add x0, #:tlsldm_lo12:x => add R0, R0, TCB_SIZE
[AArch64] Relax TLS local dynamic traditional into local executable The linker relaxation logic will be: Code sequence I (tiny): 0x00 adr x0, :tlsldm:x 0x04 bl __tls_get_addr | V 0x00 mrs x0, tpidr_el0 0x04 add x0, x0, TCB_SIZE Code sequence II (small): 0x00 adrp a0, :tlsldm:x 0x04 add a0, #:tlsldm_lo12:x 0x08 bl __tls_get_addr | V 0x00 mrs x0, tpidr_el0 0x04 add x0, x0, TCB_SIZE 0x08 nop 2015-09-09 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_tls_transition_without_check): Support three TLS local dynamic traditional relocations types. (elfNN_aarch64_tls_relax): Support TLS local dynamic traditional to local executable relaxation. ld/testsuite/ * ld-aarch64/tls-relax-ld-le-tiny.s: New testcase. * ld-aarch64/tls-relax-ld-le-small.s: Likewise. * ld-aarch64/tls-relax-ld-le-tiny.d: New expectation file. * ld-aarch64/tls-relax-ld-le-small.d: Likewise. * ld-aarch64/aarch64-elf.exp: Run new testcases.
2015-09-09 15:19:28 +02:00
bl __tls_get_addr => nop
ld: aarch64: fix TLS relaxation where TCB_SIZE is used TCB_SIZE is 2*sizeof(void *), which is 0x10 for lp64, and 0x8 for ilp32. During relaxation, ld goes to do a replace: bl __tls_get_addr => add R0, R0, TCB_SIZE But actual implementation is: bfd_putl32 (0x91004000, contents + rel->r_offset + 4); Which is equivalent of add x0, x0, 0x10. This is wrong for ilp32. The possible fix for it is: bfd_putl32 (0x91000000 | (TCB_SIZE<<10), contents + rel->r_offset + 4); But ilp32 also needs w-registers, so it's simpler to put proper instruction in #if/#else condition. There are 2 such relaxations in elfNN_aarch64_tls_relax(), and so 2 new tests added for ilp32 mode to test it. Yury * bfd/elfnn-aarch64.c: fix TLS relaxations for ilp32 where TCB_SIZE is used. * ld/testsuite/ld-aarch64/aarch64-elf.exp: Add tests for the case. * ld/testsuite/ld-aarch64/tls-relax-ld-le-small-ilp32.d: New file. * ld/testsuite/ld-aarch64/tls-relax-ld-le-tiny-ilp32.d: New file. Signed-off-by: Yury Norov <ynorov@caviumnetworks.com>
2016-12-03 14:20:43 +01:00
Where R is x for lp64 mode, and w for ilp32 mode. */
[AArch64] Relax TLS local dynamic traditional into local executable The linker relaxation logic will be: Code sequence I (tiny): 0x00 adr x0, :tlsldm:x 0x04 bl __tls_get_addr | V 0x00 mrs x0, tpidr_el0 0x04 add x0, x0, TCB_SIZE Code sequence II (small): 0x00 adrp a0, :tlsldm:x 0x04 add a0, #:tlsldm_lo12:x 0x08 bl __tls_get_addr | V 0x00 mrs x0, tpidr_el0 0x04 add x0, x0, TCB_SIZE 0x08 nop 2015-09-09 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_tls_transition_without_check): Support three TLS local dynamic traditional relocations types. (elfNN_aarch64_tls_relax): Support TLS local dynamic traditional to local executable relaxation. ld/testsuite/ * ld-aarch64/tls-relax-ld-le-tiny.s: New testcase. * ld-aarch64/tls-relax-ld-le-small.s: Likewise. * ld-aarch64/tls-relax-ld-le-tiny.d: New expectation file. * ld-aarch64/tls-relax-ld-le-small.d: Likewise. * ld-aarch64/aarch64-elf.exp: Run new testcases.
2015-09-09 15:19:28 +02:00
if (is_local)
{
BFD_ASSERT (rel->r_offset + 4 == rel[1].r_offset);
BFD_ASSERT (ELFNN_R_TYPE (rel[1].r_info) == AARCH64_R (CALL26));
/* No need of CALL26 relocation for tls_get_addr. */
rel[1].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
Fix AArch64 relocation handling in ILP32 mode. bfd * elfnn-aarch64.c: Fix relaxations for ILP32 mode. ld * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests. * testsuite/ld-aarch64/tls-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-all-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gd-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-3-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-le-ilp32.d: New test.
2017-01-23 18:07:13 +01:00
bfd_putl32 (add_R0_R0 | (TCB_SIZE << 10),
contents + rel->r_offset + 0);
ld: aarch64: fix TLS relaxation where TCB_SIZE is used TCB_SIZE is 2*sizeof(void *), which is 0x10 for lp64, and 0x8 for ilp32. During relaxation, ld goes to do a replace: bl __tls_get_addr => add R0, R0, TCB_SIZE But actual implementation is: bfd_putl32 (0x91004000, contents + rel->r_offset + 4); Which is equivalent of add x0, x0, 0x10. This is wrong for ilp32. The possible fix for it is: bfd_putl32 (0x91000000 | (TCB_SIZE<<10), contents + rel->r_offset + 4); But ilp32 also needs w-registers, so it's simpler to put proper instruction in #if/#else condition. There are 2 such relaxations in elfNN_aarch64_tls_relax(), and so 2 new tests added for ilp32 mode to test it. Yury * bfd/elfnn-aarch64.c: fix TLS relaxations for ilp32 where TCB_SIZE is used. * ld/testsuite/ld-aarch64/aarch64-elf.exp: Add tests for the case. * ld/testsuite/ld-aarch64/tls-relax-ld-le-small-ilp32.d: New file. * ld/testsuite/ld-aarch64/tls-relax-ld-le-tiny-ilp32.d: New file. Signed-off-by: Yury Norov <ynorov@caviumnetworks.com>
2016-12-03 14:20:43 +01:00
bfd_putl32 (INSN_NOP, contents + rel->r_offset + 4);
[AArch64] Relax TLS local dynamic traditional into local executable The linker relaxation logic will be: Code sequence I (tiny): 0x00 adr x0, :tlsldm:x 0x04 bl __tls_get_addr | V 0x00 mrs x0, tpidr_el0 0x04 add x0, x0, TCB_SIZE Code sequence II (small): 0x00 adrp a0, :tlsldm:x 0x04 add a0, #:tlsldm_lo12:x 0x08 bl __tls_get_addr | V 0x00 mrs x0, tpidr_el0 0x04 add x0, x0, TCB_SIZE 0x08 nop 2015-09-09 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_tls_transition_without_check): Support three TLS local dynamic traditional relocations types. (elfNN_aarch64_tls_relax): Support TLS local dynamic traditional to local executable relaxation. ld/testsuite/ * ld-aarch64/tls-relax-ld-le-tiny.s: New testcase. * ld-aarch64/tls-relax-ld-le-small.s: Likewise. * ld-aarch64/tls-relax-ld-le-tiny.d: New expectation file. * ld-aarch64/tls-relax-ld-le-small.d: Likewise. * ld-aarch64/aarch64-elf.exp: Run new testcases.
2015-09-09 15:19:28 +02:00
return bfd_reloc_ok;
}
return bfd_reloc_continue;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
default:
return bfd_reloc_continue;
}
return bfd_reloc_ok;
}
/* Relocate an AArch64 ELF section. */
static bfd_boolean
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_relocate_section (bfd *output_bfd,
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
struct bfd_link_info *info,
bfd *input_bfd,
asection *input_section,
bfd_byte *contents,
Elf_Internal_Rela *relocs,
Elf_Internal_Sym *local_syms,
asection **local_sections)
{
Elf_Internal_Shdr *symtab_hdr;
struct elf_link_hash_entry **sym_hashes;
Elf_Internal_Rela *rel;
Elf_Internal_Rela *relend;
const char *name;
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
struct elf_aarch64_link_hash_table *globals;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
bfd_boolean save_addend = FALSE;
bfd_vma addend = 0;
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
globals = elf_aarch64_hash_table (info);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
symtab_hdr = &elf_symtab_hdr (input_bfd);
sym_hashes = elf_sym_hashes (input_bfd);
rel = relocs;
relend = relocs + input_section->reloc_count;
for (; rel < relend; rel++)
{
unsigned int r_type;
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
bfd_reloc_code_real_type bfd_r_type;
bfd_reloc_code_real_type relaxed_bfd_r_type;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
reloc_howto_type *howto;
unsigned long r_symndx;
Elf_Internal_Sym *sym;
asection *sec;
struct elf_link_hash_entry *h;
bfd_vma relocation;
bfd_reloc_status_type r;
arelent bfd_reloc;
char sym_type;
bfd_boolean unresolved_reloc = FALSE;
char *error_message = NULL;
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
r_symndx = ELFNN_R_SYM (rel->r_info);
r_type = ELFNN_R_TYPE (rel->r_info);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
unrecognized/unsupported reloc message It must get boring translating all the variants we have of unrecognized/unsupported/invalid/unexpected reloc number. This patch cuts down on the number of variations. * aoutx.h, * coff-alpha.c, * coff-i860.c, * coff-m68k.c, * coff-mcore.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-w65.c, * elf-bfd.h, * elf-m10300.c, * elf.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-i370.c, * elf32-i386.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-iq2000.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-sh.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-v850.c, * elf32-vax.c, * elf32-visium.c, * elf32-wasm32.c, * elf32-xgate.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sparc.c, * elf64-x86-64.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-riscv.h, * elfxx-sparc.c, * elfxx-sparc.h, * reloc.c: Standardize unrecognized/unsupported reloc message.
2018-02-21 12:17:07 +01:00
bfd_reloc.howto = elfNN_aarch64_howto_from_type (input_bfd, r_type);
howto = bfd_reloc.howto;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
* elf64-aarch64.c (elf64_aarch64_check_relocs): Move relocation error check up and add error message.
2013-04-29 10:33:51 +02:00
if (howto == NULL)
Improve "unrecognized relocation" error messages to add the suggestion that the linker might be out of date. PR 21803 * reloc.c (_bfd_unrecognized_reloc): New function. Reports an unrecognized reloc and sets the bfd_error value. * libbfd.h: Regenerate. * elf32-arm.c (elf32_arm_final_link_relocate): Use the new function. * elf32-i386.c (elf_i386_relocate_section): Likewise. * elf32-tilepro.c (tilepro_elf_relocate_section): Likewise. * elf64-x86-64.c (elf_x86_64_relocate_section): Likewise. * elfnn-aarch64.c (elfNN_aarch64_relocate_section): Likewise. * elfxx-tilegx.c (tilegx_elf_relocate_section): Likewise.
2017-07-24 12:27:33 +02:00
return _bfd_unrecognized_reloc (input_bfd, input_section, r_type);
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
bfd_r_type = elfNN_aarch64_bfd_reloc_from_howto (howto);
* elf64-aarch64.c (elf64_aarch64_check_relocs): Move relocation error check up and add error message.
2013-04-29 10:33:51 +02:00
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
h = NULL;
sym = NULL;
sec = NULL;
if (r_symndx < symtab_hdr->sh_info)
{
sym = local_syms + r_symndx;
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
sym_type = ELFNN_ST_TYPE (sym->st_info);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
sec = local_sections[r_symndx];
/* An object file might have a reference to a local
undefined symbol. This is a daft object file, but we
should at least do something about it. */
if (r_type != R_AARCH64_NONE && r_type != R_AARCH64_NULL
&& bfd_is_und_section (sec)
&& ELF_ST_BIND (sym->st_info) != STB_WEAK)
Return void from linker callbacks The ldmain.c implementation of these linker callback functions always return true, so any code handling a false return is dead. What's more, some of the bfd backends abort if ever a false return is seen, and there seems to be some confusion in gdb's compile-object-load.c. The return value was never meant to be "oh yes, a multiple_definition error occurred", but rather "out of memory or other catastrophic failure". This patch removes the status return on the callbacks that always return true. I kept the return status for "notice" because that one does happen to need to return "out of memory". include/ * bfdlink.h (struct bfd_link_callbacks): Update comments. Return void from multiple_definition, multiple_common, add_to_set, constructor, warning, undefined_symbol, reloc_overflow, reloc_dangerous and unattached_reloc. bfd/ * aoutx.h: Adjust linker callback calls throughout file, removing dead code. * bout.c: Likewise. * coff-alpha.c: Likewise. * coff-arm.c: Likewise. * coff-h8300.c: Likewise. * coff-h8500.c: Likewise. * coff-i960.c: Likewise. * coff-mcore.c: Likewise. * coff-mips.c: Likewise. * coff-ppc.c: Likewise. * coff-rs6000.c: Likewise. * coff-sh.c: Likewise. * coff-tic80.c: Likewise. * coff-w65.c: Likewise. * coff-z80.c: Likewise. * coff-z8k.c: Likewise. * coff64-rs6000.c: Likewise. * cofflink.c: Likewise. * ecoff.c: Likewise. * elf-bfd.h: Likewise. * elf-m10200.c: Likewise. * elf-m10300.c: Likewise. * elf32-arc.c: Likewise. * elf32-arm.c: Likewise. * elf32-avr.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-d10v.c: Likewise. * elf32-epiphany.c: Likewise. * elf32-fr30.c: Likewise. * elf32-frv.c: Likewise. * elf32-ft32.c: Likewise. * elf32-h8300.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i370.c: Likewise. * elf32-i386.c: Likewise. * elf32-i860.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-lm32.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m32r.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mep.c: Likewise. * elf32-metag.c: Likewise. * elf32-microblaze.c: Likewise. * elf32-moxie.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-nds32.c: Likewise. * elf32-nios2.c: Likewise. * elf32-or1k.c: Likewise. * elf32-ppc.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-sh.c: Likewise. * elf32-sh64.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-tilepro.c: Likewise. * elf32-v850.c: Likewise. * elf32-vax.c: Likewise. * elf32-visium.c: Likewise. * elf32-xstormy16.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-mmix.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-sh64.c: Likewise. * elf64-x86-64.c: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * linker.c: Likewise. * pdp11.c: Likewise. * pe-mips.c: Likewise. * reloc.c: Likewise. * reloc16.c: Likewise. * simple.c: Likewise. * vms-alpha.c: Likewise. * xcofflink.c: Likewise. * elf32-rl78.c (get_symbol_value, get_romstart, get_ramstart): Delete status param. Adjust calls to these and linker callbacks throughout. * elf32-rx.c: (get_symbol_value, get_gp, get_romstart, get_ramstart): Delete status param. Adjust calls to these and linker callbacks throughout. ld/ * ldmain.c (multiple_definition, multiple_common, add_to_set, constructor_callback, warning_callback, undefined_symbol, reloc_overflow, reloc_dangerous, unattached_reloc): Return void. * emultempl/elf32.em: Adjust callback calls. gdb/ * compile/compile-object-load.c (link_callbacks_multiple_definition, link_callbacks_warning, link_callbacks_undefined_symbol, link_callbacks_undefined_symbol, link_callbacks_reloc_overflow, link_callbacks_reloc_dangerous, link_callbacks_unattached_reloc): Return void.
2016-05-27 09:50:55 +02:00
(*info->callbacks->undefined_symbol)
(info, bfd_elf_string_from_elf_section
(input_bfd, symtab_hdr->sh_link, sym->st_name),
input_bfd, input_section, rel->r_offset, TRUE);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
/* Relocate against local STT_GNU_IFUNC symbol. */
Add output_type to bfd_link_info The "shared" field in bfd_link_info is set for both DSO and and PIE. There are separate fields for executable and relocatable outputs. This patch adds an "output_type" field: enum output_type { type_unknown = 0, type_executable, type_dll, type_relocatable }; and a "pic" field to bfd_link_info to replace shared, executable and relocatable fields so that we can use the "output_type" field to check for output type and the "pic" field check if output is PIC. Macros, bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie, are provided to check for output features. bfd/ * bfd/aoutx.h: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * bfd/bout.c: Likewise. * bfd/coff-alpha.c: Likewise. * bfd/coff-arm.c: Likewise. * bfd/coff-i386.c: Likewise. * bfd/coff-i960.c: Likewise. * bfd/coff-m68k.c: Likewise. * bfd/coff-mcore.c: Likewise. * bfd/coff-mips.c: Likewise. * bfd/coff-ppc.c: Likewise. * bfd/coff-rs6000.c: Likewise. * bfd/coff-sh.c: Likewise. * bfd/coff-tic80.c: Likewise. * bfd/coff-x86_64.c: Likewise. * bfd/coff64-rs6000.c: Likewise. * bfd/coffgen.c: Likewise. * bfd/cofflink.c: Likewise. * bfd/ecoff.c: Likewise. * bfd/ecofflink.c: Likewise. * bfd/elf-bfd.h: Likewise. * bfd/elf-eh-frame.c: Likewise. * bfd/elf-ifunc.c: Likewise. * bfd/elf-m10200.c: Likewise. * bfd/elf-m10300.c: Likewise. * bfd/elf-s390-common.c: Likewise. * bfd/elf-vxworks.c: Likewise. * bfd/elf.c: Likewise. * bfd/elf32-arm.c: Likewise. * bfd/elf32-avr.c: Likewise. * bfd/elf32-bfin.c: Likewise. * bfd/elf32-cr16.c: Likewise. * bfd/elf32-cr16c.c: Likewise. * bfd/elf32-cris.c: Likewise. * bfd/elf32-crx.c: Likewise. * bfd/elf32-d10v.c: Likewise. * bfd/elf32-dlx.c: Likewise. * bfd/elf32-epiphany.c: Likewise. * bfd/elf32-fr30.c: Likewise. * bfd/elf32-frv.c: Likewise. * bfd/elf32-ft32.c: Likewise. * bfd/elf32-h8300.c: Likewise. * bfd/elf32-hppa.c: Likewise. * bfd/elf32-i370.c: Likewise. * bfd/elf32-i386.c: Likewise. * bfd/elf32-i860.c: Likewise. * bfd/elf32-ip2k.c: Likewise. * bfd/elf32-iq2000.c: Likewise. * bfd/elf32-lm32.c: Likewise. * bfd/elf32-m32c.c: Likewise. * bfd/elf32-m32r.c: Likewise. * bfd/elf32-m68hc11.c: Likewise. * bfd/elf32-m68hc1x.c: Likewise. * bfd/elf32-m68k.c: Likewise. * bfd/elf32-mcore.c: Likewise. * bfd/elf32-mep.c: Likewise. * bfd/elf32-metag.c: Likewise. * bfd/elf32-microblaze.c: Likewise. * bfd/elf32-moxie.c: Likewise. * bfd/elf32-msp430.c: Likewise. * bfd/elf32-mt.c: Likewise. * bfd/elf32-nds32.c: Likewise. * bfd/elf32-nios2.c: Likewise. * bfd/elf32-or1k.c: Likewise. * bfd/elf32-ppc.c: Likewise. * bfd/elf32-rl78.c: Likewise. * bfd/elf32-rx.c: Likewise. * bfd/elf32-s390.c: Likewise. * bfd/elf32-score.c: Likewise. * bfd/elf32-score7.c: Likewise. * bfd/elf32-sh-symbian.c: Likewise. * bfd/elf32-sh.c: Likewise. * bfd/elf32-sh64.c: Likewise. * bfd/elf32-spu.c: Likewise. * bfd/elf32-tic6x.c: Likewise. * bfd/elf32-tilepro.c: Likewise. * bfd/elf32-v850.c: Likewise. * bfd/elf32-vax.c: Likewise. * bfd/elf32-visium.c: Likewise. * bfd/elf32-xc16x.c: Likewise. * bfd/elf32-xstormy16.c: Likewise. * bfd/elf32-xtensa.c: Likewise. * bfd/elf64-alpha.c: Likewise. * bfd/elf64-hppa.c: Likewise. * bfd/elf64-ia64-vms.c: Likewise. * bfd/elf64-mmix.c: Likewise. * bfd/elf64-ppc.c: Likewise. * bfd/elf64-s390.c: Likewise. * bfd/elf64-sh64.c: Likewise. * bfd/elf64-x86-64.c: Likewise. * bfd/elflink.c: Likewise. * bfd/elfnn-aarch64.c: Likewise. * bfd/elfnn-ia64.c: Likewise. * bfd/elfxx-mips.c: Likewise. * bfd/elfxx-sparc.c: Likewise. * bfd/elfxx-tilegx.c: Likewise. * bfd/i386linux.c: Likewise. * bfd/linker.c: Likewise. * bfd/m68klinux.c: Likewise. * bfd/pdp11.c: Likewise. * bfd/pe-mips.c: Likewise. * bfd/peXXigen.c: Likewise. * bfd/reloc.c: Likewise. * bfd/reloc16.c: Likewise. * bfd/sparclinux.c: Likewise. * bfd/sunos.c: Likewise. * bfd/vms-alpha.c: Likewise. * bfd/xcofflink.c: Likewise. include/ * include/bfdlink.h (output_type): New enum. (bfd_link_executable): New macro. (bfd_link_dll): Likewise. (bfd_link_relocatable): Likewise. (bfd_link_pic): Likewise. (bfd_link_pie): Likewise. (bfd_link_info): Remove shared, executable, pie and relocatable. Add output_type and pic. ld/ * ld/ldctor.c: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * ld/ldemul.c: Likewise. * ld/ldfile.c: Likewise. * ld/ldlang.c: Likewise. * ld/ldmain.c: Likewise. * ld/ldwrite.c: Likewise. * ld/lexsup.c: Likewise. * ld/pe-dll.c: Likewise. * ld/plugin.c: Likewise. * ld/emultempl/aarch64elf.em: Likewise. * ld/emultempl/aix.em: Likewise. * ld/emultempl/alphaelf.em: Likewise. * ld/emultempl/armcoff.em: Likewise. * ld/emultempl/armelf.em: Likewise. * ld/emultempl/avrelf.em: Likewise. * ld/emultempl/beos.em: Likewise. * ld/emultempl/cr16elf.em: Likewise. * ld/emultempl/elf-generic.em: Likewise. * ld/emultempl/elf32.em: Likewise. * ld/emultempl/genelf.em: Likewise. * ld/emultempl/generic.em: Likewise. * ld/emultempl/gld960.em: Likewise. * ld/emultempl/gld960c.em: Likewise. * ld/emultempl/hppaelf.em: Likewise. * ld/emultempl/irix.em: Likewise. * ld/emultempl/linux.em: Likewise. * ld/emultempl/lnk960.em: Likewise. * ld/emultempl/m68hc1xelf.em: Likewise. * ld/emultempl/m68kcoff.em: Likewise. * ld/emultempl/m68kelf.em: Likewise. * ld/emultempl/metagelf.em: Likewise. * ld/emultempl/mipself.em: Likewise. * ld/emultempl/mmo.em: Likewise. * ld/emultempl/msp430.em: Likewise. * ld/emultempl/nds32elf.em: Likewise. * ld/emultempl/needrelax.em: Likewise. * ld/emultempl/nios2elf.em: Likewise. * ld/emultempl/pe.em: Likewise. * ld/emultempl/pep.em: Likewise. * ld/emultempl/ppc32elf.em: Likewise. * ld/emultempl/ppc64elf.em: Likewise. * ld/emultempl/sh64elf.em: Likewise. * ld/emultempl/solaris2.em: Likewise. * ld/emultempl/spuelf.em: Likewise. * ld/emultempl/sunos.em: Likewise. * ld/emultempl/tic6xdsbt.em: Likewise. * ld/emultempl/ticoff.em: Likewise. * ld/emultempl/v850elf.em: Likewise. * ld/emultempl/vms.em: Likewise. * ld/emultempl/vxworks.em: Likewise.
2015-08-18 14:51:03 +02:00
if (!bfd_link_relocatable (info)
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
&& ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC)
{
h = elfNN_aarch64_get_local_sym_hash (globals, input_bfd,
rel, FALSE);
if (h == NULL)
abort ();
/* Set STT_GNU_IFUNC symbol value. */
h->root.u.def.value = sym->st_value;
h->root.u.def.section = sec;
}
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
}
else
{
Pass ignored unresolved relocations to ld backend bfd/ PR ld/4409 * elf-bfd.h (RELOC_FOR_GLOBAL_SYMBOL): Add an argument for error ignored. * elf-m10200.c (mn10200_elf_relocate_section): Updated. * elf-m10300.c (mn10300_elf_relocate_section): Likewise. * elf32-arm.c (elf32_arm_relocate_section): Likewise. * elf32-avr.c (elf32_avr_relocate_section): Likewise. * elf32-bfin.c (bfinfdpic_relocate_section): Likewise. (bfin_relocate_section): Likewise. * elf32-cr16.c (elf32_cr16_relocate_section): Likewise. * elf32-cr16c.c (elf32_cr16c_relocate_section): Likewise. * elf32-cris.c (cris_elf_relocate_section): Likewise. * elf32-crx.c (elf32_crx_relocate_section): Likewise. * elf32-d10v.c (elf32_d10v_relocate_section): Likewise. * elf32-epiphany.c (epiphany_elf_relocate_section): Likewise. * elf32-fr30.c (fr30_elf_relocate_section): Likewise. * elf32-frv.c (elf32_frv_relocate_section): Likewise. * elf32-h8300.c (elf32_h8_relocate_section): Likewise. * elf32-hppa.c (elf32_hppa_relocate_section): Likewise. * elf32-i386.c (elf_i386_relocate_section): Likewise. * elf32-i860.c (elf32_i860_relocate_section): Likewise. * elf32-ip2k.c (ip2k_elf_relocate_section): Likewise. * elf32-iq2000.c (iq2000_elf_relocate_section): Likewise. * elf32-lm32.c (lm32_elf_relocate_section): Likewise. * elf32-m68hc1x.c (elf32_m68hc11_relocate_section): Likewise. * elf32-m68k.c (elf_m68k_relocate_section): Likewise. * elf32-metag.c (elf_metag_relocate_section): Likewise. * elf32-microblaze.c (microblaze_elf_relocate_section): Likewise. * elf32-mcore.c (mcore_elf_relocate_section): Likewise. * elf32-mep.c (mep_elf_relocate_section): Likewise. * elf32-moxie.c (moxie_elf_relocate_section): Likewise. * elf32-msp430.c (elf32_msp430_relocate_section): Likewise. * elf32-mt.c (mt_elf_relocate_section): Likewise. * elf32-nios2.c (nios2_elf32_relocate_section): Likewise. * elf32-openrisc.c (openrisc_elf_relocate_section): Likewise. * elf32-ppc.c (ppc_elf_relocate_section): Likewise. * elf32-rl78.c (rl78_elf_relocate_section): Likewise. * elf32-rx.c (rx_elf_relocate_section): Likewise. * elf32-tic6x.c (elf32_tic6x_relocate_section): Likewise. * elf32-tilepro.c (tilepro_elf_relocate_section): Likewise. * elf32-s390.c (elf_s390_relocate_section): Likewise. * elf32-v850.c (v850_elf_relocate_section): Likewise. * elf32-vax.c (elf_vax_relocate_section): Likewise. * elf32-xc16x.c (elf32_xc16x_relocate_section): Likewise. * elf32-xstormy16.c (xstormy16_elf_relocate_section): Likewise. * elf32-xtensa.c (elf_xtensa_relocate_section): Likewise. * elf64-alpha.c (elf64_alpha_relocate_section): Likewise. * elf64-ia64-vms.c (elf64_ia64_relocate_section): Likewise. * elf64-mmix.c (mmix_elf_relocate_section): Likewise. * elf64-ppc.c (ppc64_elf_relocate_section): Likewise. * elf64-s390.c (elf_s390_relocate_section): Likewise. * elf64-x86-64.c (elf64_x86_64_relocate_section): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_relocate_section): Likewise. * elfxx-tilegx.c (tilegx_elf_relocate_section): Likewise. * elfnn-aarch64.c (elfNN_aarch64_relocate_section): Likewise. * elfnn-ia64.c (elfNN_ia64_relocate_section): Skip if error from RELOC_FOR_GLOBAL_SYMBOL in executable is ignored. ld/testsuite/ PR ld/4409 * ld-ia64/error1.d: New file. * ld-ia64/error1.s: Likewise. * ld-ia64/error2.d: Likewise. * ld-ia64/error3.d: Likewise.
2013-11-05 19:29:44 +01:00
bfd_boolean warned, ignored;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
r_symndx, symtab_hdr, sym_hashes,
h, sec, relocation,
Pass ignored unresolved relocations to ld backend bfd/ PR ld/4409 * elf-bfd.h (RELOC_FOR_GLOBAL_SYMBOL): Add an argument for error ignored. * elf-m10200.c (mn10200_elf_relocate_section): Updated. * elf-m10300.c (mn10300_elf_relocate_section): Likewise. * elf32-arm.c (elf32_arm_relocate_section): Likewise. * elf32-avr.c (elf32_avr_relocate_section): Likewise. * elf32-bfin.c (bfinfdpic_relocate_section): Likewise. (bfin_relocate_section): Likewise. * elf32-cr16.c (elf32_cr16_relocate_section): Likewise. * elf32-cr16c.c (elf32_cr16c_relocate_section): Likewise. * elf32-cris.c (cris_elf_relocate_section): Likewise. * elf32-crx.c (elf32_crx_relocate_section): Likewise. * elf32-d10v.c (elf32_d10v_relocate_section): Likewise. * elf32-epiphany.c (epiphany_elf_relocate_section): Likewise. * elf32-fr30.c (fr30_elf_relocate_section): Likewise. * elf32-frv.c (elf32_frv_relocate_section): Likewise. * elf32-h8300.c (elf32_h8_relocate_section): Likewise. * elf32-hppa.c (elf32_hppa_relocate_section): Likewise. * elf32-i386.c (elf_i386_relocate_section): Likewise. * elf32-i860.c (elf32_i860_relocate_section): Likewise. * elf32-ip2k.c (ip2k_elf_relocate_section): Likewise. * elf32-iq2000.c (iq2000_elf_relocate_section): Likewise. * elf32-lm32.c (lm32_elf_relocate_section): Likewise. * elf32-m68hc1x.c (elf32_m68hc11_relocate_section): Likewise. * elf32-m68k.c (elf_m68k_relocate_section): Likewise. * elf32-metag.c (elf_metag_relocate_section): Likewise. * elf32-microblaze.c (microblaze_elf_relocate_section): Likewise. * elf32-mcore.c (mcore_elf_relocate_section): Likewise. * elf32-mep.c (mep_elf_relocate_section): Likewise. * elf32-moxie.c (moxie_elf_relocate_section): Likewise. * elf32-msp430.c (elf32_msp430_relocate_section): Likewise. * elf32-mt.c (mt_elf_relocate_section): Likewise. * elf32-nios2.c (nios2_elf32_relocate_section): Likewise. * elf32-openrisc.c (openrisc_elf_relocate_section): Likewise. * elf32-ppc.c (ppc_elf_relocate_section): Likewise. * elf32-rl78.c (rl78_elf_relocate_section): Likewise. * elf32-rx.c (rx_elf_relocate_section): Likewise. * elf32-tic6x.c (elf32_tic6x_relocate_section): Likewise. * elf32-tilepro.c (tilepro_elf_relocate_section): Likewise. * elf32-s390.c (elf_s390_relocate_section): Likewise. * elf32-v850.c (v850_elf_relocate_section): Likewise. * elf32-vax.c (elf_vax_relocate_section): Likewise. * elf32-xc16x.c (elf32_xc16x_relocate_section): Likewise. * elf32-xstormy16.c (xstormy16_elf_relocate_section): Likewise. * elf32-xtensa.c (elf_xtensa_relocate_section): Likewise. * elf64-alpha.c (elf64_alpha_relocate_section): Likewise. * elf64-ia64-vms.c (elf64_ia64_relocate_section): Likewise. * elf64-mmix.c (mmix_elf_relocate_section): Likewise. * elf64-ppc.c (ppc64_elf_relocate_section): Likewise. * elf64-s390.c (elf_s390_relocate_section): Likewise. * elf64-x86-64.c (elf64_x86_64_relocate_section): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_relocate_section): Likewise. * elfxx-tilegx.c (tilegx_elf_relocate_section): Likewise. * elfnn-aarch64.c (elfNN_aarch64_relocate_section): Likewise. * elfnn-ia64.c (elfNN_ia64_relocate_section): Skip if error from RELOC_FOR_GLOBAL_SYMBOL in executable is ignored. ld/testsuite/ PR ld/4409 * ld-ia64/error1.d: New file. * ld-ia64/error1.s: Likewise. * ld-ia64/error2.d: Likewise. * ld-ia64/error3.d: Likewise.
2013-11-05 19:29:44 +01:00
unresolved_reloc, warned, ignored);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
sym_type = h->type;
}
if (sec != NULL && discarded_section (sec))
RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
rel, 1, relend, howto, 0, contents);
Add output_type to bfd_link_info The "shared" field in bfd_link_info is set for both DSO and and PIE. There are separate fields for executable and relocatable outputs. This patch adds an "output_type" field: enum output_type { type_unknown = 0, type_executable, type_dll, type_relocatable }; and a "pic" field to bfd_link_info to replace shared, executable and relocatable fields so that we can use the "output_type" field to check for output type and the "pic" field check if output is PIC. Macros, bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie, are provided to check for output features. bfd/ * bfd/aoutx.h: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * bfd/bout.c: Likewise. * bfd/coff-alpha.c: Likewise. * bfd/coff-arm.c: Likewise. * bfd/coff-i386.c: Likewise. * bfd/coff-i960.c: Likewise. * bfd/coff-m68k.c: Likewise. * bfd/coff-mcore.c: Likewise. * bfd/coff-mips.c: Likewise. * bfd/coff-ppc.c: Likewise. * bfd/coff-rs6000.c: Likewise. * bfd/coff-sh.c: Likewise. * bfd/coff-tic80.c: Likewise. * bfd/coff-x86_64.c: Likewise. * bfd/coff64-rs6000.c: Likewise. * bfd/coffgen.c: Likewise. * bfd/cofflink.c: Likewise. * bfd/ecoff.c: Likewise. * bfd/ecofflink.c: Likewise. * bfd/elf-bfd.h: Likewise. * bfd/elf-eh-frame.c: Likewise. * bfd/elf-ifunc.c: Likewise. * bfd/elf-m10200.c: Likewise. * bfd/elf-m10300.c: Likewise. * bfd/elf-s390-common.c: Likewise. * bfd/elf-vxworks.c: Likewise. * bfd/elf.c: Likewise. * bfd/elf32-arm.c: Likewise. * bfd/elf32-avr.c: Likewise. * bfd/elf32-bfin.c: Likewise. * bfd/elf32-cr16.c: Likewise. * bfd/elf32-cr16c.c: Likewise. * bfd/elf32-cris.c: Likewise. * bfd/elf32-crx.c: Likewise. * bfd/elf32-d10v.c: Likewise. * bfd/elf32-dlx.c: Likewise. * bfd/elf32-epiphany.c: Likewise. * bfd/elf32-fr30.c: Likewise. * bfd/elf32-frv.c: Likewise. * bfd/elf32-ft32.c: Likewise. * bfd/elf32-h8300.c: Likewise. * bfd/elf32-hppa.c: Likewise. * bfd/elf32-i370.c: Likewise. * bfd/elf32-i386.c: Likewise. * bfd/elf32-i860.c: Likewise. * bfd/elf32-ip2k.c: Likewise. * bfd/elf32-iq2000.c: Likewise. * bfd/elf32-lm32.c: Likewise. * bfd/elf32-m32c.c: Likewise. * bfd/elf32-m32r.c: Likewise. * bfd/elf32-m68hc11.c: Likewise. * bfd/elf32-m68hc1x.c: Likewise. * bfd/elf32-m68k.c: Likewise. * bfd/elf32-mcore.c: Likewise. * bfd/elf32-mep.c: Likewise. * bfd/elf32-metag.c: Likewise. * bfd/elf32-microblaze.c: Likewise. * bfd/elf32-moxie.c: Likewise. * bfd/elf32-msp430.c: Likewise. * bfd/elf32-mt.c: Likewise. * bfd/elf32-nds32.c: Likewise. * bfd/elf32-nios2.c: Likewise. * bfd/elf32-or1k.c: Likewise. * bfd/elf32-ppc.c: Likewise. * bfd/elf32-rl78.c: Likewise. * bfd/elf32-rx.c: Likewise. * bfd/elf32-s390.c: Likewise. * bfd/elf32-score.c: Likewise. * bfd/elf32-score7.c: Likewise. * bfd/elf32-sh-symbian.c: Likewise. * bfd/elf32-sh.c: Likewise. * bfd/elf32-sh64.c: Likewise. * bfd/elf32-spu.c: Likewise. * bfd/elf32-tic6x.c: Likewise. * bfd/elf32-tilepro.c: Likewise. * bfd/elf32-v850.c: Likewise. * bfd/elf32-vax.c: Likewise. * bfd/elf32-visium.c: Likewise. * bfd/elf32-xc16x.c: Likewise. * bfd/elf32-xstormy16.c: Likewise. * bfd/elf32-xtensa.c: Likewise. * bfd/elf64-alpha.c: Likewise. * bfd/elf64-hppa.c: Likewise. * bfd/elf64-ia64-vms.c: Likewise. * bfd/elf64-mmix.c: Likewise. * bfd/elf64-ppc.c: Likewise. * bfd/elf64-s390.c: Likewise. * bfd/elf64-sh64.c: Likewise. * bfd/elf64-x86-64.c: Likewise. * bfd/elflink.c: Likewise. * bfd/elfnn-aarch64.c: Likewise. * bfd/elfnn-ia64.c: Likewise. * bfd/elfxx-mips.c: Likewise. * bfd/elfxx-sparc.c: Likewise. * bfd/elfxx-tilegx.c: Likewise. * bfd/i386linux.c: Likewise. * bfd/linker.c: Likewise. * bfd/m68klinux.c: Likewise. * bfd/pdp11.c: Likewise. * bfd/pe-mips.c: Likewise. * bfd/peXXigen.c: Likewise. * bfd/reloc.c: Likewise. * bfd/reloc16.c: Likewise. * bfd/sparclinux.c: Likewise. * bfd/sunos.c: Likewise. * bfd/vms-alpha.c: Likewise. * bfd/xcofflink.c: Likewise. include/ * include/bfdlink.h (output_type): New enum. (bfd_link_executable): New macro. (bfd_link_dll): Likewise. (bfd_link_relocatable): Likewise. (bfd_link_pic): Likewise. (bfd_link_pie): Likewise. (bfd_link_info): Remove shared, executable, pie and relocatable. Add output_type and pic. ld/ * ld/ldctor.c: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * ld/ldemul.c: Likewise. * ld/ldfile.c: Likewise. * ld/ldlang.c: Likewise. * ld/ldmain.c: Likewise. * ld/ldwrite.c: Likewise. * ld/lexsup.c: Likewise. * ld/pe-dll.c: Likewise. * ld/plugin.c: Likewise. * ld/emultempl/aarch64elf.em: Likewise. * ld/emultempl/aix.em: Likewise. * ld/emultempl/alphaelf.em: Likewise. * ld/emultempl/armcoff.em: Likewise. * ld/emultempl/armelf.em: Likewise. * ld/emultempl/avrelf.em: Likewise. * ld/emultempl/beos.em: Likewise. * ld/emultempl/cr16elf.em: Likewise. * ld/emultempl/elf-generic.em: Likewise. * ld/emultempl/elf32.em: Likewise. * ld/emultempl/genelf.em: Likewise. * ld/emultempl/generic.em: Likewise. * ld/emultempl/gld960.em: Likewise. * ld/emultempl/gld960c.em: Likewise. * ld/emultempl/hppaelf.em: Likewise. * ld/emultempl/irix.em: Likewise. * ld/emultempl/linux.em: Likewise. * ld/emultempl/lnk960.em: Likewise. * ld/emultempl/m68hc1xelf.em: Likewise. * ld/emultempl/m68kcoff.em: Likewise. * ld/emultempl/m68kelf.em: Likewise. * ld/emultempl/metagelf.em: Likewise. * ld/emultempl/mipself.em: Likewise. * ld/emultempl/mmo.em: Likewise. * ld/emultempl/msp430.em: Likewise. * ld/emultempl/nds32elf.em: Likewise. * ld/emultempl/needrelax.em: Likewise. * ld/emultempl/nios2elf.em: Likewise. * ld/emultempl/pe.em: Likewise. * ld/emultempl/pep.em: Likewise. * ld/emultempl/ppc32elf.em: Likewise. * ld/emultempl/ppc64elf.em: Likewise. * ld/emultempl/sh64elf.em: Likewise. * ld/emultempl/solaris2.em: Likewise. * ld/emultempl/spuelf.em: Likewise. * ld/emultempl/sunos.em: Likewise. * ld/emultempl/tic6xdsbt.em: Likewise. * ld/emultempl/ticoff.em: Likewise. * ld/emultempl/v850elf.em: Likewise. * ld/emultempl/vms.em: Likewise. * ld/emultempl/vxworks.em: Likewise.
2015-08-18 14:51:03 +02:00
if (bfd_link_relocatable (info))
Enable elf_backend_rela_normal for AArch64 If we are generating non-relocatable object and --emit-relocs specified, aarch64 ld is actually generating wrong addend for rela entry when relocate against local symbol. for example, for simple testcase foo.c === const char * const a = "foo"; const char * foo () { return a; } bar.c === const char * const b = "bar"; const char * bar () { return b; } aarch64-none-linux-gnu-ld --emit-relocs -o x.o foo.o bar.o aarch64-none-linux-gnu-readelf -r x.o ... R_AARCH64_ADR_PRE 0000000000400018 .rodata + 0 ... R_AARCH64_ADD_ABS 0000000000400018 .rodata + 0 ... R_AARCH64_ADR_PRE 0000000000400018 .rodata + 0 ... R_AARCH64_ADD_ABS 0000000000400018 .rodata + 0 while it should be: ... R_AARCH64_ADR_PRE 0000000000400018 .rodata + 0 ... R_AARCH64_ADD_ABS 0000000000400018 .rodata + 0 ... R_AARCH64_ADR_PRE 0000000000400018 .rodata + 10 ... R_AARCH64_ADD_ABS 0000000000400018 .rodata + 10 bfd generic code could actually handle this properly, but only when elf_backend_rela_normal set to '1'. this patch enable this and remove those target specific hack. bfd/ * elfnn-aarch64.c (elf_backend_rela_normal): Set to 1. (elfNN_aarch64_relocate_section): Remove duplicated addend adjustment when info->relocatable be true. ld/testsuite/ * ld-aarch64/emit-relocs-local-addend-bar.s: * New source file. * ld-aarch64/emit-relocs-local-addend-foo.s: * Likewise. * ld-aarch64/emit-relocs-local-addend.d: * New testcase. * ld-aarch64/local-addend-r.d: Likewise.
2014-07-08 10:29:06 +02:00
continue;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
if (h != NULL)
name = h->root.root.string;
else
{
name = (bfd_elf_string_from_elf_section
(input_bfd, symtab_hdr->sh_link, sym->st_name));
if (name == NULL || *name == '\0')
bfd_section_* macros This large patch removes the unnecessary bfd parameter from various bfd section macros and functions. The bfd is hardly ever used and if needed for the bfd_set_section_* or bfd_rename_section functions can be found via section->owner except for the com, und, abs, and ind std_section special sections. Those sections shouldn't be modified anyway. The patch also removes various bfd_get_section_<field> macros, replacing their use with bfd_section_<field>, and adds bfd_set_section_lma. I've also fixed a minor bug in gas where compressed section renaming was done directly rather than calling bfd_rename_section. This would have broken bfd_get_section_by_name and similar functions, but that hardly mattered at such a late stage in gas processing. bfd/ * bfd-in.h (bfd_get_section_name, bfd_get_section_vma), (bfd_get_section_lma, bfd_get_section_alignment), (bfd_get_section_size, bfd_get_section_flags), (bfd_get_section_userdata): Delete. (bfd_section_name, bfd_section_size, bfd_section_vma), (bfd_section_lma, bfd_section_alignment): Lose bfd parameter. (bfd_section_flags, bfd_section_userdata): New. (bfd_is_com_section): Rename parameter. * section.c (bfd_set_section_userdata, bfd_set_section_vma), (bfd_set_section_alignment, bfd_set_section_flags, bfd_rename_section), (bfd_set_section_size): Delete bfd parameter, rename section parameter. (bfd_set_section_lma): New. * bfd-in2.h: Regenerate. * mach-o.c (bfd_mach_o_init_section_from_mach_o): Delete bfd param, update callers. * aoutx.h, * bfd.c, * coff-alpha.c, * coff-arm.c, * coff-mips.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * compress.c, * ecoff.c, * elf-eh-frame.c, * elf-hppa.h, * elf-ifunc.c, * elf-m10200.c, * elf-m10300.c, * elf-properties.c, * elf-s390-common.c, * elf-vxworks.c, * elf.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-csky.c, * elf32-d10v.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-ip2k.c, * elf32-iq2000.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc1x.c, * elf32-m68k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nios2.c, * elf32-or1k.c, * elf32-ppc.c, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score7.c, * elf32-sh.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilepro.c, * elf32-v850.c, * elf32-vax.c, * elf32-visium.c, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-bpf.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sparc.c, * elf64-x86-64.c, * elflink.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-mips.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * i386msdos.c, * linker.c, * mach-o.c, * mmo.c, * opncls.c, * pdp11.c, * pei-x86_64.c, * peicode.h, * reloc.c, * section.c, * syms.c, * vms-alpha.c, * xcofflink.c: Update throughout for bfd section macro and function changes. binutils/ * addr2line.c, * bucomm.c, * coffgrok.c, * dlltool.c, * nm.c, * objcopy.c, * objdump.c, * od-elf32_avr.c, * od-macho.c, * od-xcoff.c, * prdbg.c, * rdcoff.c, * rddbg.c, * rescoff.c, * resres.c, * size.c, * srconv.c, * strings.c, * windmc.c: Update throughout for bfd section macro and function changes. gas/ * as.c, * as.h, * dw2gencfi.c, * dwarf2dbg.c, * ecoff.c, * read.c, * stabs.c, * subsegs.c, * subsegs.h, * write.c, * config/obj-coff-seh.c, * config/obj-coff.c, * config/obj-ecoff.c, * config/obj-elf.c, * config/obj-macho.c, * config/obj-som.c, * config/tc-aarch64.c, * config/tc-alpha.c, * config/tc-arc.c, * config/tc-arm.c, * config/tc-avr.c, * config/tc-bfin.c, * config/tc-bpf.c, * config/tc-d10v.c, * config/tc-d30v.c, * config/tc-epiphany.c, * config/tc-fr30.c, * config/tc-frv.c, * config/tc-h8300.c, * config/tc-hppa.c, * config/tc-i386.c, * config/tc-ia64.c, * config/tc-ip2k.c, * config/tc-iq2000.c, * config/tc-lm32.c, * config/tc-m32c.c, * config/tc-m32r.c, * config/tc-m68hc11.c, * config/tc-mep.c, * config/tc-microblaze.c, * config/tc-mips.c, * config/tc-mmix.c, * config/tc-mn10200.c, * config/tc-mn10300.c, * config/tc-msp430.c, * config/tc-mt.c, * config/tc-nds32.c, * config/tc-or1k.c, * config/tc-ppc.c, * config/tc-pru.c, * config/tc-rl78.c, * config/tc-rx.c, * config/tc-s12z.c, * config/tc-s390.c, * config/tc-score.c, * config/tc-score7.c, * config/tc-sh.c, * config/tc-sparc.c, * config/tc-spu.c, * config/tc-tic4x.c, * config/tc-tic54x.c, * config/tc-tic6x.c, * config/tc-tilegx.c, * config/tc-tilepro.c, * config/tc-v850.c, * config/tc-visium.c, * config/tc-wasm32.c, * config/tc-xc16x.c, * config/tc-xgate.c, * config/tc-xstormy16.c, * config/tc-xtensa.c, * config/tc-z8k.c: Update throughout for bfd section macro and function changes. * write.c (compress_debug): Use bfd_rename_section. gdb/ * aarch64-linux-tdep.c, * arm-tdep.c, * auto-load.c, * coff-pe-read.c, * coffread.c, * corelow.c, * dbxread.c, * dicos-tdep.c, * dwarf2-frame.c, * dwarf2read.c, * elfread.c, * exec.c, * fbsd-tdep.c, * gcore.c, * gdb_bfd.c, * gdb_bfd.h, * hppa-tdep.c, * i386-cygwin-tdep.c, * i386-fbsd-tdep.c, * i386-linux-tdep.c, * jit.c, * linux-tdep.c, * machoread.c, * maint.c, * mdebugread.c, * minidebug.c, * mips-linux-tdep.c, * mips-sde-tdep.c, * mips-tdep.c, * mipsread.c, * nto-tdep.c, * objfiles.c, * objfiles.h, * osabi.c, * ppc-linux-tdep.c, * ppc64-tdep.c, * record-btrace.c, * record-full.c, * remote.c, * rs6000-aix-tdep.c, * rs6000-tdep.c, * s390-linux-tdep.c, * s390-tdep.c, * solib-aix.c, * solib-dsbt.c, * solib-frv.c, * solib-spu.c, * solib-svr4.c, * solib-target.c, * spu-linux-nat.c, * spu-tdep.c, * symfile-mem.c, * symfile.c, * symmisc.c, * symtab.c, * target.c, * windows-nat.c, * xcoffread.c, * cli/cli-dump.c, * compile/compile-object-load.c, * mi/mi-interp.c: Update throughout for bfd section macro and function changes. * gcore (gcore_create_callback): Use bfd_set_section_lma. * spu-tdep.c (spu_overlay_new_objfile): Likewise. gprof/ * corefile.c, * symtab.c: Update throughout for bfd section macro and function changes. ld/ * ldcref.c, * ldctor.c, * ldelf.c, * ldlang.c, * pe-dll.c, * emultempl/aarch64elf.em, * emultempl/aix.em, * emultempl/armcoff.em, * emultempl/armelf.em, * emultempl/cr16elf.em, * emultempl/cskyelf.em, * emultempl/m68hc1xelf.em, * emultempl/m68kelf.em, * emultempl/mipself.em, * emultempl/mmix-elfnmmo.em, * emultempl/mmo.em, * emultempl/msp430.em, * emultempl/nios2elf.em, * emultempl/pe.em, * emultempl/pep.em, * emultempl/ppc64elf.em, * emultempl/xtensaelf.em: Update throughout for bfd section macro and function changes. libctf/ * ctf-open-bfd.c: Update throughout for bfd section macro changes. opcodes/ * arc-ext.c: Update throughout for bfd section macro changes. sim/ * common/sim-load.c, * common/sim-utils.c, * cris/sim-if.c, * erc32/func.c, * lm32/sim-if.c, * m32c/load.c, * m32c/trace.c, * m68hc11/interp.c, * ppc/hw_htab.c, * ppc/hw_init.c, * rl78/load.c, * rl78/trace.c, * rx/gdb-if.c, * rx/load.c, * rx/trace.c: Update throughout for bfd section macro changes.
2019-09-16 12:55:17 +02:00
name = bfd_section_name (sec);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
}
if (r_symndx != 0
&& r_type != R_AARCH64_NONE
&& r_type != R_AARCH64_NULL
&& (h == NULL
|| h->root.type == bfd_link_hash_defined
|| h->root.type == bfd_link_hash_defweak)
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
&& IS_AARCH64_TLS_RELOC (bfd_r_type) != (sym_type == STT_TLS))
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
Remove syntactic sugar Now that _bfd_error_handler is not a function pointer. * aout-adobe.c: Replace (*_bfd_error_handler) (...) with _bfd_error_handler (...) throughout. * aout-cris.c, * aoutx.h, * archive.c, * bfd.c, * binary.c, * cache.c, * coff-alpha.c, * coff-arm.c, * coff-h8300.c, * coff-i860.c, * coff-mcore.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * cpu-arm.c, * cpu-m68k.c, * cpu-sh.c, * dwarf2.c, * ecoff.c, * elf-eh-frame.c, * elf-m10300.c, * elf.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c, * elf32-cris.c, * elf32-crx.c, * elf32-dlx.c, * elf32-frv.c, * elf32-hppa.c, * elf32-i370.c, * elf32-i386.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc1x.c, * elf32-m68k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-nds32.c, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-rl78.c, * elf32-s390.c, * elf32-score.c, * elf32-score7.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilepro.c, * elf32-v850.c, * elf32-vax.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-x86-64.c, * elfcode.h, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfxx-mips.c, * elfxx-sparc.c, * elfxx-tilegx.c, * hpux-core.c, * i386linux.c, * ieee.c, * ihex.c, * libbfd.c, * linker.c, * m68klinux.c, * mach-o.c, * merge.c, * mmo.c, * oasys.c, * osf-core.c, * pdp11.c, * pe-mips.c, * peXXigen.c, * pef.c, * plugin.c, * reloc.c, * rs6000-core.c, * sco5-core.c, * som.c, * sparclinux.c, * srec.c, * stabs.c, * syms.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * xcofflink.c: Likewise.
2016-09-30 05:30:18 +02:00
_bfd_error_handler
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
((sym_type == STT_TLS
Add c-format tags to translatable strings with more than one argument-using formatting token. * aout-adobe.c: Add missing c-format tags for translatable strings. * aout-cris.c: Likewise. * aoutx.h: Likewise. * bfd.c: Likewise. * binary.c: Likewise. * cache.c: Likewise. * coff-alpha.c: Likewise. * coff-arm.c: Likewise. * coff-i860.c: Likewise. * coff-mcore.c: Likewise. * coff-ppc.c: Likewise. * coff-rs6000.c: Likewise. * coff-sh.c: Likewise. * coff-tic4x.c: Likewise. * coff-tic54x.c: Likewise. * coff-tic80.c: Likewise. * coff64-rs6000.c: Likewise. * coffcode.h: Likewise. * coffgen.c: Likewise. * cofflink.c: Likewise. * coffswap.h: Likewise. * cpu-arm.c: Likewise. * dwarf2.c: Likewise. * ecoff.c: Likewise. * elf-attrs.c: Likewise. * elf-eh-frame.c: Likewise. * elf-ifunc.c: Likewise. * elf-m10300.c: Likewise. * elf-s390-common.c: Likewise. * elf.c: Likewise. * elf32-arc.c: Likewise. * elf32-arm.c: Likewise. * elf32-avr.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-d10v.c: Likewise. * elf32-d30v.c: Likewise. * elf32-epiphany.c: Likewise. * elf32-fr30.c: Likewise. * elf32-frv.c: Likewise. * elf32-gen.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i370.c: Likewise. * elf32-i386.c: Likewise. * elf32-i960.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-lm32.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m32r.c: Likewise. * elf32-m68hc11.c: Likewise. * elf32-m68hc12.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mcore.c: Likewise. * elf32-mep.c: Likewise. * elf32-metag.c: Likewise. * elf32-microblaze.c: Likewise. * elf32-moxie.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-nds32.c: Likewise. * elf32-nios2.c: Likewise. * elf32-or1k.c: Likewise. * elf32-pj.c: Likewise. * elf32-ppc.c: Likewise. * elf32-rl78.c: Likewise. * elf32-rx.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-sh-symbian.c: Likewise. * elf32-sh.c: Likewise. * elf32-sh64.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-tilepro.c: Likewise. * elf32-v850.c: Likewise. * elf32-vax.c: Likewise. * elf32-visium.c: Likewise. * elf32-xgate.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-gen.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-mmix.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-sh64.c: Likewise. * elf64-sparc.c: Likewise. * elf64-x86-64.c: Likewise. * elfcode.h: Likewise. * elfcore.h: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * ieee.c: Likewise. * ihex.c: Likewise. * libbfd.c: Likewise. * linker.c: Likewise. * m68klinux.c: Likewise. * mach-o.c: Likewise. * merge.c: Likewise. * mmo.c: Likewise. * oasys.c: Likewise. * pdp11.c: Likewise. * pe-mips.c: Likewise. * peXXigen.c: Likewise. * pei-x86_64.c: Likewise. * peicode.h: Likewise. * ppcboot.c: Likewise. * reloc.c: Likewise. * sparclinux.c: Likewise. * srec.c: Likewise. * stabs.c: Likewise. * vms-alpha.c: Likewise. * vms-lib.c: Likewise. * xcofflink.c: Likewise.
2016-10-19 15:04:34 +02:00
/* xgettext:c-format */
%L conversions * bfd-in.h: Include inttypes.h or if not available define PRId64, PRIu64 and PRIx64. * bfd.c (_bfd_doprnt, _bfd_doprnt_scan): Remove support for L modifier to print bfd_vma. * coff-arm.c, * coff-mcore.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-tic80.c, * coffcode.h, * coffgen.c, * cofflink.c, * compress.c, * dwarf2.c, * elf-m10300.c, * elf.c, * elf32-arc.c, * elf32-arm.c, * elf32-bfin.c, * elf32-cris.c, * elf32-hppa.c, * elf32-i386.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32r.c, * elf32-m68k.c, * elf32-metag.c, * elf32-nds32.c, * elf32-nios2.c, * elf32-ppc.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score7.c, * elf32-sh.c, * elf32-sh64.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilepro.c, * elf32-v850.c, * elf32-vax.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mmix.c, * elf64-s390.c, * elf64-sh64.c, * elf64-x86-64.c, * elfcode.h, * elfcore.h, * elflink.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-mips.c, * elfxx-sparc.c, * elfxx-tilegx.c, * ieee.c, * ihex.c, * mach-o.c, * merge.c, * mmo.c, * peXXigen.c, * xcofflink.c: Replace use of Lx modifier with PRIx64, and cast input to uint64_t, and similarly for Ld and Lu. * bfd-in2.h: Regenerate.
2018-02-19 09:04:15 +01:00
? _("%pB(%pA+%#" PRIx64 "): %s used with TLS symbol %s")
Add c-format tags to translatable strings with more than one argument-using formatting token. * aout-adobe.c: Add missing c-format tags for translatable strings. * aout-cris.c: Likewise. * aoutx.h: Likewise. * bfd.c: Likewise. * binary.c: Likewise. * cache.c: Likewise. * coff-alpha.c: Likewise. * coff-arm.c: Likewise. * coff-i860.c: Likewise. * coff-mcore.c: Likewise. * coff-ppc.c: Likewise. * coff-rs6000.c: Likewise. * coff-sh.c: Likewise. * coff-tic4x.c: Likewise. * coff-tic54x.c: Likewise. * coff-tic80.c: Likewise. * coff64-rs6000.c: Likewise. * coffcode.h: Likewise. * coffgen.c: Likewise. * cofflink.c: Likewise. * coffswap.h: Likewise. * cpu-arm.c: Likewise. * dwarf2.c: Likewise. * ecoff.c: Likewise. * elf-attrs.c: Likewise. * elf-eh-frame.c: Likewise. * elf-ifunc.c: Likewise. * elf-m10300.c: Likewise. * elf-s390-common.c: Likewise. * elf.c: Likewise. * elf32-arc.c: Likewise. * elf32-arm.c: Likewise. * elf32-avr.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-d10v.c: Likewise. * elf32-d30v.c: Likewise. * elf32-epiphany.c: Likewise. * elf32-fr30.c: Likewise. * elf32-frv.c: Likewise. * elf32-gen.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i370.c: Likewise. * elf32-i386.c: Likewise. * elf32-i960.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-lm32.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m32r.c: Likewise. * elf32-m68hc11.c: Likewise. * elf32-m68hc12.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mcore.c: Likewise. * elf32-mep.c: Likewise. * elf32-metag.c: Likewise. * elf32-microblaze.c: Likewise. * elf32-moxie.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-nds32.c: Likewise. * elf32-nios2.c: Likewise. * elf32-or1k.c: Likewise. * elf32-pj.c: Likewise. * elf32-ppc.c: Likewise. * elf32-rl78.c: Likewise. * elf32-rx.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-sh-symbian.c: Likewise. * elf32-sh.c: Likewise. * elf32-sh64.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-tilepro.c: Likewise. * elf32-v850.c: Likewise. * elf32-vax.c: Likewise. * elf32-visium.c: Likewise. * elf32-xgate.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-gen.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-mmix.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-sh64.c: Likewise. * elf64-sparc.c: Likewise. * elf64-x86-64.c: Likewise. * elfcode.h: Likewise. * elfcore.h: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * ieee.c: Likewise. * ihex.c: Likewise. * libbfd.c: Likewise. * linker.c: Likewise. * m68klinux.c: Likewise. * mach-o.c: Likewise. * merge.c: Likewise. * mmo.c: Likewise. * oasys.c: Likewise. * pdp11.c: Likewise. * pe-mips.c: Likewise. * peXXigen.c: Likewise. * pei-x86_64.c: Likewise. * peicode.h: Likewise. * ppcboot.c: Likewise. * reloc.c: Likewise. * sparclinux.c: Likewise. * srec.c: Likewise. * stabs.c: Likewise. * vms-alpha.c: Likewise. * vms-lib.c: Likewise. * xcofflink.c: Likewise.
2016-10-19 15:04:34 +02:00
/* xgettext:c-format */
%L conversions * bfd-in.h: Include inttypes.h or if not available define PRId64, PRIu64 and PRIx64. * bfd.c (_bfd_doprnt, _bfd_doprnt_scan): Remove support for L modifier to print bfd_vma. * coff-arm.c, * coff-mcore.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-tic80.c, * coffcode.h, * coffgen.c, * cofflink.c, * compress.c, * dwarf2.c, * elf-m10300.c, * elf.c, * elf32-arc.c, * elf32-arm.c, * elf32-bfin.c, * elf32-cris.c, * elf32-hppa.c, * elf32-i386.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32r.c, * elf32-m68k.c, * elf32-metag.c, * elf32-nds32.c, * elf32-nios2.c, * elf32-ppc.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score7.c, * elf32-sh.c, * elf32-sh64.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilepro.c, * elf32-v850.c, * elf32-vax.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mmix.c, * elf64-s390.c, * elf64-sh64.c, * elf64-x86-64.c, * elfcode.h, * elfcore.h, * elflink.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-mips.c, * elfxx-sparc.c, * elfxx-tilegx.c, * ieee.c, * ihex.c, * mach-o.c, * merge.c, * mmo.c, * peXXigen.c, * xcofflink.c: Replace use of Lx modifier with PRIx64, and cast input to uint64_t, and similarly for Ld and Lu. * bfd-in2.h: Regenerate.
2018-02-19 09:04:15 +01:00
: _("%pB(%pA+%#" PRIx64 "): %s used with non-TLS symbol %s")),
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
input_bfd,
%L conversions * bfd-in.h: Include inttypes.h or if not available define PRId64, PRIu64 and PRIx64. * bfd.c (_bfd_doprnt, _bfd_doprnt_scan): Remove support for L modifier to print bfd_vma. * coff-arm.c, * coff-mcore.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-tic80.c, * coffcode.h, * coffgen.c, * cofflink.c, * compress.c, * dwarf2.c, * elf-m10300.c, * elf.c, * elf32-arc.c, * elf32-arm.c, * elf32-bfin.c, * elf32-cris.c, * elf32-hppa.c, * elf32-i386.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32r.c, * elf32-m68k.c, * elf32-metag.c, * elf32-nds32.c, * elf32-nios2.c, * elf32-ppc.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score7.c, * elf32-sh.c, * elf32-sh64.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilepro.c, * elf32-v850.c, * elf32-vax.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mmix.c, * elf64-s390.c, * elf64-sh64.c, * elf64-x86-64.c, * elfcode.h, * elfcore.h, * elflink.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-mips.c, * elfxx-sparc.c, * elfxx-tilegx.c, * ieee.c, * ihex.c, * mach-o.c, * merge.c, * mmo.c, * peXXigen.c, * xcofflink.c: Replace use of Lx modifier with PRIx64, and cast input to uint64_t, and similarly for Ld and Lu. * bfd-in2.h: Regenerate.
2018-02-19 09:04:15 +01:00
input_section, (uint64_t) rel->r_offset, howto->name, name);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
}
/* We relax only if we can see that there can be a valid transition
BFD whitespace fixes Binutils is supposed to use tabs. In my git config I have whitespace = indent-with-non-tab,space-before-tab,trailing-space and I got annoyed enough seeing red in "git diff" output to fix the problems. * doc/header.sed: Trim trailing space when splitting lines. * aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-cris.c, * aout-ns32k.c, * aout-target.h, * aout-tic30.c, * aoutf1.h, * aoutx.h, * arc-got.h, * arc-plt.def, * arc-plt.h, * archive.c, * archive64.c, * archures.c, * armnetbsd.c, * bfd-in.h, * bfd.c, * bfdio.c, * binary.c, * bout.c, * cache.c, * cisco-core.c, * coff-alpha.c, * coff-apollo.c, * coff-arm.c, * coff-h8300.c, * coff-i386.c, * coff-i860.c, * coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mcore.c, * coff-mips.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-stgo32.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * compress.c, * corefile.c, * cpu-alpha.c, * cpu-arm.c, * cpu-avr.c, * cpu-bfin.c, * cpu-cr16.c, * cpu-cr16c.c, * cpu-crx.c, * cpu-d10v.c, * cpu-frv.c, * cpu-ft32.c, * cpu-i370.c, * cpu-i960.c, * cpu-ia64-opc.c, * cpu-ip2k.c, * cpu-lm32.c, * cpu-m32r.c, * cpu-mcore.c, * cpu-microblaze.c, * cpu-mips.c, * cpu-moxie.c, * cpu-mt.c, * cpu-nios2.c, * cpu-ns32k.c, * cpu-or1k.c, * cpu-powerpc.c, * cpu-pru.c, * cpu-sh.c, * cpu-spu.c, * cpu-v850.c, * cpu-v850_rh850.c, * cpu-xgate.c, * cpu-z80.c, * dwarf1.c, * dwarf2.c, * ecoff.c, * ecofflink.c, * ecoffswap.h, * elf-bfd.h, * elf-eh-frame.c, * elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf-s390-common.c, * elf-strtab.c, * elf-vxworks.c, * elf.c, * elf32-am33lin.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-avr.h, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-i860.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68hc1x.c, * elf32-m68hc1x.h, * elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nds32.h, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score.h, * elf32-score7.c, * elf32-sh-symbian.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilegx.c, * elf32-tilegx.h, * elf32-tilepro.c, * elf32-tilepro.h, * elf32-v850.c, * elf32-vax.c, * elf32-wasm32.c, * elf32-xc16x.c, * elf32-xgate.c, * elf32-xgate.h, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-tilegx.c, * elf64-tilegx.h, * elf64-x86-64.c, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-aarch64.h, * elfxx-ia64.c, * elfxx-ia64.h, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * elfxx-x86.h, * freebsd.h, * hash.c, * host-aout.c, * hp300hpux.c, * hppabsd-core.c, * hpux-core.c, * i386aout.c, * i386linux.c, * i386lynx.c, * i386mach3.c, * i386msdos.c, * i386netbsd.c, * ieee.c, * ihex.c, * irix-core.c, * libaout.h, * libbfd-in.h, * libbfd.c, * libcoff-in.h, * libnlm.h, * libpei.h, * libxcoff.h, * linker.c, * lynx-core.c, * m68k4knetbsd.c, * m68klinux.c, * m68knetbsd.c, * m88kmach3.c, * mach-o-aarch64.c, * mach-o-arm.c, * mach-o-i386.c, * mach-o-target.c, * mach-o-x86-64.c, * mach-o.c, * mach-o.h, * merge.c, * mipsbsd.c, * mmo.c, * netbsd.h, * netbsd-core.c, * newsos3.c, * nlm-target.h, * nlm32-ppc.c, * nlm32-sparc.c, * nlmcode.h, * ns32k.h, * ns32knetbsd.c, * oasys.c, * opncls.c, * pc532-mach.c, * pdp11.c, * pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-mips.c, * pe-x86_64.c, * peXXigen.c, * pef.c, * pef.h, * pei-arm.c, * pei-i386.c, * pei-mcore.c, * pei-x86_64.c, * peicode.h, * plugin.c, * ppcboot.c, * ptrace-core.c, * reloc.c, * riscix.c, * rs6000-core.c, * section.c, * som.c, * som.h, * sparclinux.c, * sparcnetbsd.c, * srec.c, * stabs.c, * sunos.c, * syms.c, * targets.c, * tekhex.c, * trad-core.c, * vax1knetbsd.c, * vaxnetbsd.c, * verilog.c, * versados.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * wasm-module.c, * wasm-module.h, * xcofflink.c, * xsym.c, * xsym.h: Whitespace fixes. * bfd-in2.h, * libbfd.h, * libcoff.h: Regenerate.
2017-12-05 23:56:00 +01:00
from a reloc type to another.
We call elfNN_aarch64_final_link_relocate unless we're completely
done, i.e., the relaxation produced the final output we want. */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
relaxed_bfd_r_type = aarch64_tls_transition (input_bfd, info, r_type,
h, r_symndx);
if (relaxed_bfd_r_type != bfd_r_type)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
bfd_r_type = relaxed_bfd_r_type;
howto = elfNN_aarch64_howto_from_bfd_reloc (bfd_r_type);
BFD_ASSERT (howto != NULL);
r_type = howto->type;
AArch64: Fix regression in Cortex A53 erratum when PIE. (PR ld/23904) The fix for PR ld/22263 causes TLS relocations using ADRP to be relaxed into MOVZ, however this causes issues for the erratum code. The erratum code scans the input sections looking for ADRP instructions and notes their location in the stream. It then later tries to find them again in order to generate the linker stubs. Due to the relaxation it instead finds a MOVZ and hard aborts. Since this relaxation is a valid one, and in which case the erratum no longer applies, it shouldn't abort but instead just continue. This changes the TLS relaxation code such that when it finds an ADRP and it relaxes it, it removes the erratum entry from the work list by changing the stub type into none so the stub is ignored. The entry is not actually removed as removal is a more expensive operation and we have already allocated the memory anyway. The clearing is done for IE->LE and GD->LE relaxations, and a testcase is added for the IE case. The GD case I believe to be impossible to get together with the erratum sequence due to the required BL which would break the sequence. However to cover all basis I have added the guard there as well. build on native hardware and regtested on aarch64-none-elf, aarch64-none-elf (32 bit host), aarch64-none-linux-gnu, aarch64-none-linux-gnu (32 bit host) Cross-compiled and regtested on aarch64-none-linux-gnu, aarch64_be-none-linux-gnu Testcase in PR23940 tested and works as expected now and benchmarks ran on A53 showing no regressions and no issues. bfd/ChangeLog: PR ld/23904 * elfnn-aarch64.c (_bfd_aarch64_adrp_p): Use existing constants. (_bfd_aarch64_erratum_843419_branch_to_stub): Use _bfd_aarch64_adrp_p. (struct erratum_835769_branch_to_stub_clear_data): New. (_bfd_aarch64_erratum_843419_clear_stub): New. (clear_erratum_843419_entry): New. (elfNN_aarch64_tls_relax): Use it. (elfNN_aarch64_relocate_section): Pass input_section. (aarch64_map_one_stub): Handle branch type none as valid. ld/ChangeLog: PR ld/23904 * testsuite/ld-aarch64/aarch64-elf.exp: Add erratum843419_tls_ie. * testsuite/ld-aarch64/erratum843419_tls_ie.d: New test. * testsuite/ld-aarch64/erratum843419_tls_ie.s: New test.
2018-11-27 13:33:21 +01:00
r = elfNN_aarch64_tls_relax (globals, input_bfd, input_section,
contents, rel, h);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
unresolved_reloc = 0;
}
else
r = bfd_reloc_continue;
/* There may be multiple consecutive relocations for the
BFD whitespace fixes Binutils is supposed to use tabs. In my git config I have whitespace = indent-with-non-tab,space-before-tab,trailing-space and I got annoyed enough seeing red in "git diff" output to fix the problems. * doc/header.sed: Trim trailing space when splitting lines. * aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-cris.c, * aout-ns32k.c, * aout-target.h, * aout-tic30.c, * aoutf1.h, * aoutx.h, * arc-got.h, * arc-plt.def, * arc-plt.h, * archive.c, * archive64.c, * archures.c, * armnetbsd.c, * bfd-in.h, * bfd.c, * bfdio.c, * binary.c, * bout.c, * cache.c, * cisco-core.c, * coff-alpha.c, * coff-apollo.c, * coff-arm.c, * coff-h8300.c, * coff-i386.c, * coff-i860.c, * coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mcore.c, * coff-mips.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-stgo32.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * compress.c, * corefile.c, * cpu-alpha.c, * cpu-arm.c, * cpu-avr.c, * cpu-bfin.c, * cpu-cr16.c, * cpu-cr16c.c, * cpu-crx.c, * cpu-d10v.c, * cpu-frv.c, * cpu-ft32.c, * cpu-i370.c, * cpu-i960.c, * cpu-ia64-opc.c, * cpu-ip2k.c, * cpu-lm32.c, * cpu-m32r.c, * cpu-mcore.c, * cpu-microblaze.c, * cpu-mips.c, * cpu-moxie.c, * cpu-mt.c, * cpu-nios2.c, * cpu-ns32k.c, * cpu-or1k.c, * cpu-powerpc.c, * cpu-pru.c, * cpu-sh.c, * cpu-spu.c, * cpu-v850.c, * cpu-v850_rh850.c, * cpu-xgate.c, * cpu-z80.c, * dwarf1.c, * dwarf2.c, * ecoff.c, * ecofflink.c, * ecoffswap.h, * elf-bfd.h, * elf-eh-frame.c, * elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf-s390-common.c, * elf-strtab.c, * elf-vxworks.c, * elf.c, * elf32-am33lin.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-avr.h, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-i860.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68hc1x.c, * elf32-m68hc1x.h, * elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nds32.h, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score.h, * elf32-score7.c, * elf32-sh-symbian.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilegx.c, * elf32-tilegx.h, * elf32-tilepro.c, * elf32-tilepro.h, * elf32-v850.c, * elf32-vax.c, * elf32-wasm32.c, * elf32-xc16x.c, * elf32-xgate.c, * elf32-xgate.h, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-tilegx.c, * elf64-tilegx.h, * elf64-x86-64.c, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-aarch64.h, * elfxx-ia64.c, * elfxx-ia64.h, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * elfxx-x86.h, * freebsd.h, * hash.c, * host-aout.c, * hp300hpux.c, * hppabsd-core.c, * hpux-core.c, * i386aout.c, * i386linux.c, * i386lynx.c, * i386mach3.c, * i386msdos.c, * i386netbsd.c, * ieee.c, * ihex.c, * irix-core.c, * libaout.h, * libbfd-in.h, * libbfd.c, * libcoff-in.h, * libnlm.h, * libpei.h, * libxcoff.h, * linker.c, * lynx-core.c, * m68k4knetbsd.c, * m68klinux.c, * m68knetbsd.c, * m88kmach3.c, * mach-o-aarch64.c, * mach-o-arm.c, * mach-o-i386.c, * mach-o-target.c, * mach-o-x86-64.c, * mach-o.c, * mach-o.h, * merge.c, * mipsbsd.c, * mmo.c, * netbsd.h, * netbsd-core.c, * newsos3.c, * nlm-target.h, * nlm32-ppc.c, * nlm32-sparc.c, * nlmcode.h, * ns32k.h, * ns32knetbsd.c, * oasys.c, * opncls.c, * pc532-mach.c, * pdp11.c, * pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-mips.c, * pe-x86_64.c, * peXXigen.c, * pef.c, * pef.h, * pei-arm.c, * pei-i386.c, * pei-mcore.c, * pei-x86_64.c, * peicode.h, * plugin.c, * ppcboot.c, * ptrace-core.c, * reloc.c, * riscix.c, * rs6000-core.c, * section.c, * som.c, * som.h, * sparclinux.c, * sparcnetbsd.c, * srec.c, * stabs.c, * sunos.c, * syms.c, * targets.c, * tekhex.c, * trad-core.c, * vax1knetbsd.c, * vaxnetbsd.c, * verilog.c, * versados.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * wasm-module.c, * wasm-module.h, * xcofflink.c, * xsym.c, * xsym.h: Whitespace fixes. * bfd-in2.h, * libbfd.h, * libcoff.h: Regenerate.
2017-12-05 23:56:00 +01:00
same offset. In that case we are supposed to treat the
output of each relocation as the addend for the next. */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
if (rel + 1 < relend
&& rel->r_offset == rel[1].r_offset
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
&& ELFNN_R_TYPE (rel[1].r_info) != R_AARCH64_NONE
&& ELFNN_R_TYPE (rel[1].r_info) != R_AARCH64_NULL)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
save_addend = TRUE;
else
save_addend = FALSE;
if (r == bfd_reloc_continue)
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
r = elfNN_aarch64_final_link_relocate (howto, input_bfd, output_bfd,
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
input_section, contents, rel,
relocation, info, sec,
h, &unresolved_reloc,
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
save_addend, &addend, sym);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
unrecognized/unsupported reloc message It must get boring translating all the variants we have of unrecognized/unsupported/invalid/unexpected reloc number. This patch cuts down on the number of variations. * aoutx.h, * coff-alpha.c, * coff-i860.c, * coff-m68k.c, * coff-mcore.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-w65.c, * elf-bfd.h, * elf-m10300.c, * elf.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-i370.c, * elf32-i386.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-iq2000.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-sh.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-v850.c, * elf32-vax.c, * elf32-visium.c, * elf32-wasm32.c, * elf32-xgate.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sparc.c, * elf64-x86-64.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-riscv.h, * elfxx-sparc.c, * elfxx-sparc.h, * reloc.c: Standardize unrecognized/unsupported reloc message.
2018-02-21 12:17:07 +01:00
switch (elfNN_aarch64_bfd_reloc_from_type (input_bfd, r_type))
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
[AArch64/BFD] Sort relocation case labels alphabetically 2015-05-19 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_tls_transition_without_check): Sort relocation case labels alphabetically. (elfNN_aarch64_final_link_relocate): Ditto. (elfNN_aarch64_tls_relax): Ditto. (elfNN_aarch64_relocate_section): Ditto. (elfNN_aarch64_gc_sweep_hook): Ditto. (elfNN_aarch64_check_relocs): Ditto. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Ditto. (_bfd_aarch64_elf_resolve_relocation): Ditto.
2015-05-20 11:58:43 +02:00
case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21:
Add ADR :tlsgd: directive and TLSGD_ADR_PREL21 support.
2015-02-13 08:13:57 +01:00
case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21:
[LD][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC support. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_reloc_got_type): Add BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC support. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/emit-relocs-516.d: New. * ld-aarch64/emit-relocs-516.s: New. * ld-aarch64/aarch64-elf.exp: Run new test.
2015-10-02 17:37:22 +02:00
case BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC:
[LD][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G1 support. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_reloc_got_type): Add BFD_RELOC_AARCH64_TLSGD_MOVW_G1 support. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/emit-relocs-515.d: New. * ld-aarch64/emit-relocs-515.s: New. * ld-aarch64/aarch64-elf.exp: Run new test.
2015-10-02 17:21:31 +02:00
case BFD_RELOC_AARCH64_TLSGD_MOVW_G1:
[AArch64][6/8] LD support BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC 2015-08-11 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC. (aarch64_reloc_got_type): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ * ld-aarch64/tls-small-ld.s: Update testcase.
2015-08-11 18:20:17 +02:00
case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
[AArch64][3/8] LD support BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21 2015-08-11 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21. (aarch64_reloc_got_type): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ * ld-aarch64/tls-small-ld.s: New file. * ld-aarch64/tls-small-ld.d: Likewise. * ld-aarch64/aarch64-elf.exp: Run new test.
2015-08-11 18:05:34 +02:00
case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
[AArch64][3/3] LD support BFD_RELOC_AARCH64_TLSLD_ADR_PREL21
2015-07-16 16:46:21 +02:00
case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
if (! symbol_got_offset_mark_p (input_bfd, h, r_symndx))
{
bfd_boolean need_relocs = FALSE;
bfd_byte *loc;
int indx;
bfd_vma off;
off = symbol_got_offset (input_bfd, h, r_symndx);
indx = h && h->dynindx != -1 ? h->dynindx : 0;
need_relocs =
[PR ld/22263] aarch64: Avoid dynamic TLS relocs in PIE No dynamic relocs are needed for TLS defined in an executable, the TP relative offset is known at link time. Fixes FAIL: Build pr22263-1 bfd/ PR ld/22263 * elfnn-aarch64.c (elfNN_aarch64_relocate_section): Use bfd_link_executable instead of bfd_link_pic for TLS. (elfNN_aarch64_allocate_dynrelocs): Likewise. (aarch64_can_relax_tls): Likewise.
2017-11-15 18:40:04 +01:00
(!bfd_link_executable (info) || indx != 0) &&
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
(h == NULL
|| ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
|| h->root.type != bfd_link_hash_undefweak);
BFD_ASSERT (globals->root.srelgot != NULL);
if (need_relocs)
{
Elf_Internal_Rela rela;
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
rela.r_info = ELFNN_R_INFO (indx, AARCH64_R (TLS_DTPMOD));
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
rela.r_addend = 0;
rela.r_offset = globals->root.sgot->output_section->vma +
globals->root.sgot->output_offset + off;
loc = globals->root.srelgot->contents;
loc += globals->root.srelgot->reloc_count++
* RELOC_SIZE (htab);
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
bfd_elfNN_swap_reloca_out (output_bfd, &rela, loc);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
[AArch64][3/8] LD support BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21 2015-08-11 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21. (aarch64_reloc_got_type): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ * ld-aarch64/tls-small-ld.s: New file. * ld-aarch64/tls-small-ld.d: Likewise. * ld-aarch64/aarch64-elf.exp: Run new test.
2015-08-11 18:05:34 +02:00
bfd_reloc_code_real_type real_type =
unrecognized/unsupported reloc message It must get boring translating all the variants we have of unrecognized/unsupported/invalid/unexpected reloc number. This patch cuts down on the number of variations. * aoutx.h, * coff-alpha.c, * coff-i860.c, * coff-m68k.c, * coff-mcore.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-w65.c, * elf-bfd.h, * elf-m10300.c, * elf.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-i370.c, * elf32-i386.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-iq2000.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-sh.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-v850.c, * elf32-vax.c, * elf32-visium.c, * elf32-wasm32.c, * elf32-xgate.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sparc.c, * elf64-x86-64.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-riscv.h, * elfxx-sparc.c, * elfxx-sparc.h, * reloc.c: Standardize unrecognized/unsupported reloc message.
2018-02-21 12:17:07 +01:00
elfNN_aarch64_bfd_reloc_from_type (input_bfd, r_type);
[AArch64][3/8] LD support BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21 2015-08-11 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21. (aarch64_reloc_got_type): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ * ld-aarch64/tls-small-ld.s: New file. * ld-aarch64/tls-small-ld.d: Likewise. * ld-aarch64/aarch64-elf.exp: Run new test.
2015-08-11 18:05:34 +02:00
if (real_type == BFD_RELOC_AARCH64_TLSLD_ADR_PREL21
[AArch64][6/8] LD support BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC 2015-08-11 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC. (aarch64_reloc_got_type): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ * ld-aarch64/tls-small-ld.s: Update testcase.
2015-08-11 18:20:17 +02:00
|| real_type == BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21
|| real_type == BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC)
[AArch64][3/3] LD support BFD_RELOC_AARCH64_TLSLD_ADR_PREL21
2015-07-16 16:46:21 +02:00
{
/* For local dynamic, don't generate DTPREL in any case.
Initialize the DTPREL slot into zero, so we get module
base address when invoke runtime TLS resolver. */
bfd_put_NN (output_bfd, 0,
globals->root.sgot->contents + off
+ GOT_ENTRY_SIZE);
}
else if (indx == 0)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
bfd_put_NN (output_bfd,
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
relocation - dtpoff_base (info),
globals->root.sgot->contents + off
+ GOT_ENTRY_SIZE);
}
else
{
/* This TLS symbol is global. We emit a
relocation to fixup the tls offset at load
time. */
rela.r_info =
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
ELFNN_R_INFO (indx, AARCH64_R (TLS_DTPREL));
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
rela.r_addend = 0;
rela.r_offset =
(globals->root.sgot->output_section->vma
+ globals->root.sgot->output_offset + off
+ GOT_ENTRY_SIZE);
loc = globals->root.srelgot->contents;
loc += globals->root.srelgot->reloc_count++
* RELOC_SIZE (globals);
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
bfd_elfNN_swap_reloca_out (output_bfd, &rela, loc);
bfd_put_NN (output_bfd, (bfd_vma) 0,
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
globals->root.sgot->contents + off
+ GOT_ENTRY_SIZE);
}
}
else
{
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
bfd_put_NN (output_bfd, (bfd_vma) 1,
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
globals->root.sgot->contents + off);
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
bfd_put_NN (output_bfd,
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
relocation - dtpoff_base (info),
globals->root.sgot->contents + off
+ GOT_ENTRY_SIZE);
}
symbol_got_offset_mark (input_bfd, h, r_symndx);
}
break;
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
case BFD_RELOC_AARCH64_TLSIE_LDNN_GOTTPREL_LO12_NC:
Adding support for TLSIE_LD_GOTTREL_PREL19.
2015-02-13 10:57:11 +01:00
case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
[Binutils][AARCH64]Add TLS IE large memory support. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * reloc.c: Make AARCH64_TLSIE_MOVW_GOTTPREL_G1 and AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC defined in alphabetical order. * libbfd.h: Regenerate. * bfd-in2.h: Likewise. * elfnn-aarch64.c (elfNN_aarch64_howto_table): Make TLSIE_MOVW_GOTTPREL_G1 check overflow. (aarch64_reloc_got_type): Add support for TLSIE_MOVW_GOTTPREL_G1 and TLSIE_MOVW_GOTTPREL_G0_NC. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. gas/ 2015-10-02 Renlin Li <renlin.li@arm.com> * config/tc-aarch64.c (reloc_table): Add two entries for gottprel_g0_nc and gottprel_g1. (process_movw_reloc_info): Add support. (md_apply_fix): Likewise. (aarch64_force_relocation): Likewise. gas/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * gas/aarch64/reloc-gottprel_g0_nc.d: New. * gas/aarch64/reloc-gottprel_g0_nc.s: New. * gas/aarch64/reloc-gottprel_g1.d: New. * gas/aarch64/reloc-gottprel_g1.s: New. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/tls-large-ie.d: New. * ld-aarch64/tls-large-ie.s: New. * ld-aarch64/aarch64-elf.exp: Run new test.
2015-10-02 17:59:46 +02:00
case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC:
case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1:
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
if (! symbol_got_offset_mark_p (input_bfd, h, r_symndx))
{
bfd_boolean need_relocs = FALSE;
bfd_byte *loc;
int indx;
bfd_vma off;
off = symbol_got_offset (input_bfd, h, r_symndx);
indx = h && h->dynindx != -1 ? h->dynindx : 0;
need_relocs =
[PR ld/22263] aarch64: Avoid dynamic TLS relocs in PIE No dynamic relocs are needed for TLS defined in an executable, the TP relative offset is known at link time. Fixes FAIL: Build pr22263-1 bfd/ PR ld/22263 * elfnn-aarch64.c (elfNN_aarch64_relocate_section): Use bfd_link_executable instead of bfd_link_pic for TLS. (elfNN_aarch64_allocate_dynrelocs): Likewise. (aarch64_can_relax_tls): Likewise.
2017-11-15 18:40:04 +01:00
(!bfd_link_executable (info) || indx != 0) &&
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
(h == NULL
|| ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
|| h->root.type != bfd_link_hash_undefweak);
BFD_ASSERT (globals->root.srelgot != NULL);
if (need_relocs)
{
Elf_Internal_Rela rela;
if (indx == 0)
rela.r_addend = relocation - dtpoff_base (info);
else
rela.r_addend = 0;
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
rela.r_info = ELFNN_R_INFO (indx, AARCH64_R (TLS_TPREL));
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
rela.r_offset = globals->root.sgot->output_section->vma +
globals->root.sgot->output_offset + off;
loc = globals->root.srelgot->contents;
loc += globals->root.srelgot->reloc_count++
* RELOC_SIZE (htab);
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
bfd_elfNN_swap_reloca_out (output_bfd, &rela, loc);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
bfd_put_NN (output_bfd, rela.r_addend,
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
globals->root.sgot->contents + off);
}
else
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
bfd_put_NN (output_bfd, relocation - tpoff_base (info),
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
globals->root.sgot->contents + off);
symbol_got_offset_mark (input_bfd, h, r_symndx);
}
break;
Rename R_AARCH64_TLSDESC_LD64_LO12_NC to R_AARCH64_TLSDESC_LD64_LO12 and R_AARCH64_TLSDESC_ADD_LO12_NC to R_AARCH64_TLSDESC_ADD_LO12. PR binutils/21202 include * elf/aarch64.h (R_AARCH64_TLSDESC_LD64_LO12_NC): Rename to R_AARCH64_TLSDESC_LD64_LO12. (R_AARCH64_TLSDESC_ADD_LO12_NC): Rename to R_AARCH64_TLSDESC_ADD_LO12_NC. bfd * reloc.c (BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC): Rename to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12. (BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC): Rename to BFD_RELOC_AARCH64_TLSDESC_ADD_LO12. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elfnn-aarch64.c (IS_AARCH64_TLS_RELAX_RELOC): Update reloc names. (IS_AARCH64_TLSDESC_RELOC): Likewise. (elfNN_aarch64_howto_table): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. gas * config/tc-aarch64.c (reloc_table): Rename BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12. Rname BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC to BFD_RELOC_AARCH64_TLSDESC_ADD_LO12. (md_apply_fix): Likewise. (aarch64_force_relocation): Likewise. * testsuite/gas/aarch64/tls.d: Update regexp. ld * testsuite/ld-aarch64/ifunc-5r-local.d: Update regexp.
2017-03-13 10:58:04 +01:00
case BFD_RELOC_AARCH64_TLSDESC_ADD_LO12:
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
case BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21:
[AArch64] Add support for :tlsdesc: and TLSDESC_ADR_PREL21
2015-02-18 16:36:40 +01:00
case BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21:
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
case BFD_RELOC_AARCH64_TLSDESC_LDNN_LO12_NC:
[AArch64] Add support for :tlsdesc: and TLSDESC_LD_PREL19
2015-02-18 16:37:35 +01:00
case BFD_RELOC_AARCH64_TLSDESC_LD_PREL19:
[LD][AARCH64]Add TLSDESC support for large memory model. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_tls_transition_without_check): Add relax transitions for TLSDESC_ADD, TLSDESC_LDR, TLSDESC_OFF_G0_NC, TLSDESC_OFF_G1. (aarch64_tls_transition_without_check): Add relaxation support. (aarch64_reloc_got_type): Add support. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/aarch64-elf.exp: Run new test. * ld-aarch64/tls-large-desc.d: New. * ld-aarch64/tls-large-desc.s: New. * ld-aarch64/tls-relax-large-desc-ie.d: New. * ld-aarch64/tls-relax-large-desc-ie.s: New. * ld-aarch64/tls-relax-large-desc-le.d: New. * ld-aarch64/tls-relax-large-desc-le.s: New.
2015-10-02 18:43:08 +02:00
case BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC:
case BFD_RELOC_AARCH64_TLSDESC_OFF_G1:
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
if (! symbol_tlsdesc_got_offset_mark_p (input_bfd, h, r_symndx))
{
bfd_boolean need_relocs = FALSE;
int indx = h && h->dynindx != -1 ? h->dynindx : 0;
bfd_vma off = symbol_tlsdesc_got_offset (input_bfd, h, r_symndx);
need_relocs = (h == NULL
|| ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
|| h->root.type != bfd_link_hash_undefweak);
BFD_ASSERT (globals->root.srelgot != NULL);
BFD_ASSERT (globals->root.sgot != NULL);
if (need_relocs)
{
bfd_byte *loc;
Elf_Internal_Rela rela;
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
rela.r_info = ELFNN_R_INFO (indx, AARCH64_R (TLSDESC));
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
rela.r_addend = 0;
rela.r_offset = (globals->root.sgotplt->output_section->vma
+ globals->root.sgotplt->output_offset
+ off + globals->sgotplt_jump_table_size);
if (indx == 0)
rela.r_addend = relocation - dtpoff_base (info);
/* Allocate the next available slot in the PLT reloc
section to hold our R_AARCH64_TLSDESC, the next
available slot is determined from reloc_count,
which we step. But note, reloc_count was
artifically moved down while allocating slots for
real PLT relocs such that all of the PLT relocs
will fit above the initial reloc_count and the
extra stuff will fit below. */
loc = globals->root.srelplt->contents;
loc += globals->root.srelplt->reloc_count++
* RELOC_SIZE (globals);
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
bfd_elfNN_swap_reloca_out (output_bfd, &rela, loc);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
bfd_put_NN (output_bfd, (bfd_vma) 0,
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
globals->root.sgotplt->contents + off +
globals->sgotplt_jump_table_size);
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
bfd_put_NN (output_bfd, (bfd_vma) 0,
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
globals->root.sgotplt->contents + off +
globals->sgotplt_jump_table_size +
GOT_ENTRY_SIZE);
}
symbol_tlsdesc_got_offset_mark (input_bfd, h, r_symndx);
}
break;
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
default:
break;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
}
/* Dynamic relocs are not propagated for SEC_DEBUGGING sections
BFD whitespace fixes Binutils is supposed to use tabs. In my git config I have whitespace = indent-with-non-tab,space-before-tab,trailing-space and I got annoyed enough seeing red in "git diff" output to fix the problems. * doc/header.sed: Trim trailing space when splitting lines. * aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-cris.c, * aout-ns32k.c, * aout-target.h, * aout-tic30.c, * aoutf1.h, * aoutx.h, * arc-got.h, * arc-plt.def, * arc-plt.h, * archive.c, * archive64.c, * archures.c, * armnetbsd.c, * bfd-in.h, * bfd.c, * bfdio.c, * binary.c, * bout.c, * cache.c, * cisco-core.c, * coff-alpha.c, * coff-apollo.c, * coff-arm.c, * coff-h8300.c, * coff-i386.c, * coff-i860.c, * coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mcore.c, * coff-mips.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-stgo32.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * compress.c, * corefile.c, * cpu-alpha.c, * cpu-arm.c, * cpu-avr.c, * cpu-bfin.c, * cpu-cr16.c, * cpu-cr16c.c, * cpu-crx.c, * cpu-d10v.c, * cpu-frv.c, * cpu-ft32.c, * cpu-i370.c, * cpu-i960.c, * cpu-ia64-opc.c, * cpu-ip2k.c, * cpu-lm32.c, * cpu-m32r.c, * cpu-mcore.c, * cpu-microblaze.c, * cpu-mips.c, * cpu-moxie.c, * cpu-mt.c, * cpu-nios2.c, * cpu-ns32k.c, * cpu-or1k.c, * cpu-powerpc.c, * cpu-pru.c, * cpu-sh.c, * cpu-spu.c, * cpu-v850.c, * cpu-v850_rh850.c, * cpu-xgate.c, * cpu-z80.c, * dwarf1.c, * dwarf2.c, * ecoff.c, * ecofflink.c, * ecoffswap.h, * elf-bfd.h, * elf-eh-frame.c, * elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf-s390-common.c, * elf-strtab.c, * elf-vxworks.c, * elf.c, * elf32-am33lin.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-avr.h, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-i860.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68hc1x.c, * elf32-m68hc1x.h, * elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nds32.h, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score.h, * elf32-score7.c, * elf32-sh-symbian.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilegx.c, * elf32-tilegx.h, * elf32-tilepro.c, * elf32-tilepro.h, * elf32-v850.c, * elf32-vax.c, * elf32-wasm32.c, * elf32-xc16x.c, * elf32-xgate.c, * elf32-xgate.h, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-tilegx.c, * elf64-tilegx.h, * elf64-x86-64.c, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-aarch64.h, * elfxx-ia64.c, * elfxx-ia64.h, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * elfxx-x86.h, * freebsd.h, * hash.c, * host-aout.c, * hp300hpux.c, * hppabsd-core.c, * hpux-core.c, * i386aout.c, * i386linux.c, * i386lynx.c, * i386mach3.c, * i386msdos.c, * i386netbsd.c, * ieee.c, * ihex.c, * irix-core.c, * libaout.h, * libbfd-in.h, * libbfd.c, * libcoff-in.h, * libnlm.h, * libpei.h, * libxcoff.h, * linker.c, * lynx-core.c, * m68k4knetbsd.c, * m68klinux.c, * m68knetbsd.c, * m88kmach3.c, * mach-o-aarch64.c, * mach-o-arm.c, * mach-o-i386.c, * mach-o-target.c, * mach-o-x86-64.c, * mach-o.c, * mach-o.h, * merge.c, * mipsbsd.c, * mmo.c, * netbsd.h, * netbsd-core.c, * newsos3.c, * nlm-target.h, * nlm32-ppc.c, * nlm32-sparc.c, * nlmcode.h, * ns32k.h, * ns32knetbsd.c, * oasys.c, * opncls.c, * pc532-mach.c, * pdp11.c, * pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-mips.c, * pe-x86_64.c, * peXXigen.c, * pef.c, * pef.h, * pei-arm.c, * pei-i386.c, * pei-mcore.c, * pei-x86_64.c, * peicode.h, * plugin.c, * ppcboot.c, * ptrace-core.c, * reloc.c, * riscix.c, * rs6000-core.c, * section.c, * som.c, * som.h, * sparclinux.c, * sparcnetbsd.c, * srec.c, * stabs.c, * sunos.c, * syms.c, * targets.c, * tekhex.c, * trad-core.c, * vax1knetbsd.c, * vaxnetbsd.c, * verilog.c, * versados.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * wasm-module.c, * wasm-module.h, * xcofflink.c, * xsym.c, * xsym.h: Whitespace fixes. * bfd-in2.h, * libbfd.h, * libcoff.h: Regenerate.
2017-12-05 23:56:00 +01:00
because such sections are not SEC_ALLOC and thus ld.so will
not process them. */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
if (unresolved_reloc
&& !((input_section->flags & SEC_DEBUGGING) != 0
&& h->def_dynamic)
&& _bfd_elf_section_offset (output_bfd, info, input_section,
+rel->r_offset) != (bfd_vma) - 1)
{
Remove syntactic sugar Now that _bfd_error_handler is not a function pointer. * aout-adobe.c: Replace (*_bfd_error_handler) (...) with _bfd_error_handler (...) throughout. * aout-cris.c, * aoutx.h, * archive.c, * bfd.c, * binary.c, * cache.c, * coff-alpha.c, * coff-arm.c, * coff-h8300.c, * coff-i860.c, * coff-mcore.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * cpu-arm.c, * cpu-m68k.c, * cpu-sh.c, * dwarf2.c, * ecoff.c, * elf-eh-frame.c, * elf-m10300.c, * elf.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c, * elf32-cris.c, * elf32-crx.c, * elf32-dlx.c, * elf32-frv.c, * elf32-hppa.c, * elf32-i370.c, * elf32-i386.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc1x.c, * elf32-m68k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-nds32.c, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-rl78.c, * elf32-s390.c, * elf32-score.c, * elf32-score7.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilepro.c, * elf32-v850.c, * elf32-vax.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-x86-64.c, * elfcode.h, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfxx-mips.c, * elfxx-sparc.c, * elfxx-tilegx.c, * hpux-core.c, * i386linux.c, * ieee.c, * ihex.c, * libbfd.c, * linker.c, * m68klinux.c, * mach-o.c, * merge.c, * mmo.c, * oasys.c, * osf-core.c, * pdp11.c, * pe-mips.c, * peXXigen.c, * pef.c, * plugin.c, * reloc.c, * rs6000-core.c, * sco5-core.c, * som.c, * sparclinux.c, * srec.c, * stabs.c, * syms.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * xcofflink.c: Likewise.
2016-09-30 05:30:18 +02:00
_bfd_error_handler
Add c-format tags to translatable strings with more than one argument-using formatting token. * aout-adobe.c: Add missing c-format tags for translatable strings. * aout-cris.c: Likewise. * aoutx.h: Likewise. * bfd.c: Likewise. * binary.c: Likewise. * cache.c: Likewise. * coff-alpha.c: Likewise. * coff-arm.c: Likewise. * coff-i860.c: Likewise. * coff-mcore.c: Likewise. * coff-ppc.c: Likewise. * coff-rs6000.c: Likewise. * coff-sh.c: Likewise. * coff-tic4x.c: Likewise. * coff-tic54x.c: Likewise. * coff-tic80.c: Likewise. * coff64-rs6000.c: Likewise. * coffcode.h: Likewise. * coffgen.c: Likewise. * cofflink.c: Likewise. * coffswap.h: Likewise. * cpu-arm.c: Likewise. * dwarf2.c: Likewise. * ecoff.c: Likewise. * elf-attrs.c: Likewise. * elf-eh-frame.c: Likewise. * elf-ifunc.c: Likewise. * elf-m10300.c: Likewise. * elf-s390-common.c: Likewise. * elf.c: Likewise. * elf32-arc.c: Likewise. * elf32-arm.c: Likewise. * elf32-avr.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-d10v.c: Likewise. * elf32-d30v.c: Likewise. * elf32-epiphany.c: Likewise. * elf32-fr30.c: Likewise. * elf32-frv.c: Likewise. * elf32-gen.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i370.c: Likewise. * elf32-i386.c: Likewise. * elf32-i960.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-lm32.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m32r.c: Likewise. * elf32-m68hc11.c: Likewise. * elf32-m68hc12.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mcore.c: Likewise. * elf32-mep.c: Likewise. * elf32-metag.c: Likewise. * elf32-microblaze.c: Likewise. * elf32-moxie.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-nds32.c: Likewise. * elf32-nios2.c: Likewise. * elf32-or1k.c: Likewise. * elf32-pj.c: Likewise. * elf32-ppc.c: Likewise. * elf32-rl78.c: Likewise. * elf32-rx.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-sh-symbian.c: Likewise. * elf32-sh.c: Likewise. * elf32-sh64.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-tilepro.c: Likewise. * elf32-v850.c: Likewise. * elf32-vax.c: Likewise. * elf32-visium.c: Likewise. * elf32-xgate.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-gen.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-mmix.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-sh64.c: Likewise. * elf64-sparc.c: Likewise. * elf64-x86-64.c: Likewise. * elfcode.h: Likewise. * elfcore.h: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * ieee.c: Likewise. * ihex.c: Likewise. * libbfd.c: Likewise. * linker.c: Likewise. * m68klinux.c: Likewise. * mach-o.c: Likewise. * merge.c: Likewise. * mmo.c: Likewise. * oasys.c: Likewise. * pdp11.c: Likewise. * pe-mips.c: Likewise. * peXXigen.c: Likewise. * pei-x86_64.c: Likewise. * peicode.h: Likewise. * ppcboot.c: Likewise. * reloc.c: Likewise. * sparclinux.c: Likewise. * srec.c: Likewise. * stabs.c: Likewise. * vms-alpha.c: Likewise. * vms-lib.c: Likewise. * xcofflink.c: Likewise.
2016-10-19 15:04:34 +02:00
/* xgettext:c-format */
%L conversions * bfd-in.h: Include inttypes.h or if not available define PRId64, PRIu64 and PRIx64. * bfd.c (_bfd_doprnt, _bfd_doprnt_scan): Remove support for L modifier to print bfd_vma. * coff-arm.c, * coff-mcore.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-tic80.c, * coffcode.h, * coffgen.c, * cofflink.c, * compress.c, * dwarf2.c, * elf-m10300.c, * elf.c, * elf32-arc.c, * elf32-arm.c, * elf32-bfin.c, * elf32-cris.c, * elf32-hppa.c, * elf32-i386.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32r.c, * elf32-m68k.c, * elf32-metag.c, * elf32-nds32.c, * elf32-nios2.c, * elf32-ppc.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score7.c, * elf32-sh.c, * elf32-sh64.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilepro.c, * elf32-v850.c, * elf32-vax.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mmix.c, * elf64-s390.c, * elf64-sh64.c, * elf64-x86-64.c, * elfcode.h, * elfcore.h, * elflink.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-mips.c, * elfxx-sparc.c, * elfxx-tilegx.c, * ieee.c, * ihex.c, * mach-o.c, * merge.c, * mmo.c, * peXXigen.c, * xcofflink.c: Replace use of Lx modifier with PRIx64, and cast input to uint64_t, and similarly for Ld and Lu. * bfd-in2.h: Regenerate.
2018-02-19 09:04:15 +01:00
(_("%pB(%pA+%#" PRIx64 "): "
"unresolvable %s relocation against symbol `%s'"),
input_bfd, input_section, (uint64_t) rel->r_offset, howto->name,
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
h->root.root.string);
return FALSE;
}
if (r != bfd_reloc_ok && r != bfd_reloc_continue)
{
[AArch64] Improve BFD overflow warning message for -fpic 2015-08-11 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (elfNN_aarch64_relocate_section): Improve warning message for R_AARCH64_LD64_GOTPAGE_LO15/R_AARCH64_LD32_GOTPAGE_LO14.
2015-08-11 23:12:41 +02:00
bfd_reloc_code_real_type real_r_type
unrecognized/unsupported reloc message It must get boring translating all the variants we have of unrecognized/unsupported/invalid/unexpected reloc number. This patch cuts down on the number of variations. * aoutx.h, * coff-alpha.c, * coff-i860.c, * coff-m68k.c, * coff-mcore.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-w65.c, * elf-bfd.h, * elf-m10300.c, * elf.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-i370.c, * elf32-i386.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-iq2000.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-sh.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-v850.c, * elf32-vax.c, * elf32-visium.c, * elf32-wasm32.c, * elf32-xgate.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sparc.c, * elf64-x86-64.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-riscv.h, * elfxx-sparc.c, * elfxx-sparc.h, * reloc.c: Standardize unrecognized/unsupported reloc message.
2018-02-21 12:17:07 +01:00
= elfNN_aarch64_bfd_reloc_from_type (input_bfd, r_type);
[AArch64] Improve BFD overflow warning message for -fpic 2015-08-11 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (elfNN_aarch64_relocate_section): Improve warning message for R_AARCH64_LD64_GOTPAGE_LO15/R_AARCH64_LD32_GOTPAGE_LO14.
2015-08-11 23:12:41 +02:00
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
switch (r)
{
case bfd_reloc_overflow:
Return void from linker callbacks The ldmain.c implementation of these linker callback functions always return true, so any code handling a false return is dead. What's more, some of the bfd backends abort if ever a false return is seen, and there seems to be some confusion in gdb's compile-object-load.c. The return value was never meant to be "oh yes, a multiple_definition error occurred", but rather "out of memory or other catastrophic failure". This patch removes the status return on the callbacks that always return true. I kept the return status for "notice" because that one does happen to need to return "out of memory". include/ * bfdlink.h (struct bfd_link_callbacks): Update comments. Return void from multiple_definition, multiple_common, add_to_set, constructor, warning, undefined_symbol, reloc_overflow, reloc_dangerous and unattached_reloc. bfd/ * aoutx.h: Adjust linker callback calls throughout file, removing dead code. * bout.c: Likewise. * coff-alpha.c: Likewise. * coff-arm.c: Likewise. * coff-h8300.c: Likewise. * coff-h8500.c: Likewise. * coff-i960.c: Likewise. * coff-mcore.c: Likewise. * coff-mips.c: Likewise. * coff-ppc.c: Likewise. * coff-rs6000.c: Likewise. * coff-sh.c: Likewise. * coff-tic80.c: Likewise. * coff-w65.c: Likewise. * coff-z80.c: Likewise. * coff-z8k.c: Likewise. * coff64-rs6000.c: Likewise. * cofflink.c: Likewise. * ecoff.c: Likewise. * elf-bfd.h: Likewise. * elf-m10200.c: Likewise. * elf-m10300.c: Likewise. * elf32-arc.c: Likewise. * elf32-arm.c: Likewise. * elf32-avr.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-d10v.c: Likewise. * elf32-epiphany.c: Likewise. * elf32-fr30.c: Likewise. * elf32-frv.c: Likewise. * elf32-ft32.c: Likewise. * elf32-h8300.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i370.c: Likewise. * elf32-i386.c: Likewise. * elf32-i860.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-lm32.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m32r.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mep.c: Likewise. * elf32-metag.c: Likewise. * elf32-microblaze.c: Likewise. * elf32-moxie.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-nds32.c: Likewise. * elf32-nios2.c: Likewise. * elf32-or1k.c: Likewise. * elf32-ppc.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-sh.c: Likewise. * elf32-sh64.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-tilepro.c: Likewise. * elf32-v850.c: Likewise. * elf32-vax.c: Likewise. * elf32-visium.c: Likewise. * elf32-xstormy16.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-mmix.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-sh64.c: Likewise. * elf64-x86-64.c: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * linker.c: Likewise. * pdp11.c: Likewise. * pe-mips.c: Likewise. * reloc.c: Likewise. * reloc16.c: Likewise. * simple.c: Likewise. * vms-alpha.c: Likewise. * xcofflink.c: Likewise. * elf32-rl78.c (get_symbol_value, get_romstart, get_ramstart): Delete status param. Adjust calls to these and linker callbacks throughout. * elf32-rx.c: (get_symbol_value, get_gp, get_romstart, get_ramstart): Delete status param. Adjust calls to these and linker callbacks throughout. ld/ * ldmain.c (multiple_definition, multiple_common, add_to_set, constructor_callback, warning_callback, undefined_symbol, reloc_overflow, reloc_dangerous, unattached_reloc): Return void. * emultempl/elf32.em: Adjust callback calls. gdb/ * compile/compile-object-load.c (link_callbacks_multiple_definition, link_callbacks_warning, link_callbacks_undefined_symbol, link_callbacks_undefined_symbol, link_callbacks_reloc_overflow, link_callbacks_reloc_dangerous, link_callbacks_unattached_reloc): Return void.
2016-05-27 09:50:55 +02:00
(*info->callbacks->reloc_overflow)
(info, (h ? &h->root : NULL), name, howto->name, (bfd_vma) 0,
input_bfd, input_section, rel->r_offset);
[AArch64] Improve BFD overflow warning message for -fpic 2015-08-11 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (elfNN_aarch64_relocate_section): Improve warning message for R_AARCH64_LD64_GOTPAGE_LO15/R_AARCH64_LD32_GOTPAGE_LO14.
2015-08-11 23:12:41 +02:00
if (real_r_type == BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15
|| real_r_type == BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14)
{
(*info->callbacks->warning)
(info,
ARM and AArch64 messages More standarization of error/warning messages. The ARM backend has some multi-line error messages, which don't fit particularly well with the GNU coding standard insistence that error messages shouldn't be capitalized or have a full-stop. I've replaced the line breaks with semicolons. So for instance the following system/path/to/ld: myobject.o: invalid special symbol `foo'. system/path/to/ld: It must be a global or weak function symbol. becomes system/path/to/ld: myobject.o: invalid special symbol `foo'; it must be a global or weak function symbol bfd/ * elf32-arm.c, * elfnn-aarch64.c: Standardize error/warning messages. ld/ * testsuite/ld-aarch64/reloc-overflow-bad.d, * testsuite/ld-arm/attr-merge-9.out, * testsuite/ld-arm/attr-merge-arch-2.d, * testsuite/ld-arm/attr-merge-unknown-1.d, * testsuite/ld-arm/attr-merge-unknown-2.d, * testsuite/ld-arm/attr-merge-unknown-2r.d, * testsuite/ld-arm/attr-merge-unknown-3.d, * testsuite/ld-arm/cmse-implib-errors.out, * testsuite/ld-arm/cmse-new-earlier-later-implib.out, * testsuite/ld-arm/cmse-new-implib-no-output.out, * testsuite/ld-arm/cmse-new-implib-not-sg-in-implib.out, * testsuite/ld-arm/cmse-new-implib.out, * testsuite/ld-arm/cmse-new-wrong-implib.out, * testsuite/ld-arm/cmse-veneers-no-gnu_sgstubs.out, * testsuite/ld-arm/cmse-veneers-wrong-entryfct.out, * testsuite/ld-arm/group-relocs-alu-bad-2.d, * testsuite/ld-arm/group-relocs-alu-bad.d, * testsuite/ld-arm/group-relocs-ldc-bad-2.d, * testsuite/ld-arm/group-relocs-ldc-bad.d, * testsuite/ld-arm/group-relocs-ldr-bad-2.d, * testsuite/ld-arm/group-relocs-ldr-bad.d, * testsuite/ld-arm/group-relocs-ldrs-bad-2.d, * testsuite/ld-arm/group-relocs-ldrs-bad.d, * testsuite/ld-arm/stm32l4xx-cannot-fix-far-ldm.d: Update.
2018-02-21 03:34:48 +01:00
_("too many GOT entries for -fpic, "
[AArch64] Improve BFD overflow warning message for -fpic 2015-08-11 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (elfNN_aarch64_relocate_section): Improve warning message for R_AARCH64_LD64_GOTPAGE_LO15/R_AARCH64_LD32_GOTPAGE_LO14.
2015-08-11 23:12:41 +02:00
"please recompile with -fPIC"),
name, input_bfd, input_section, rel->r_offset);
return FALSE;
}
Add a more helpful warning message to explain why some AArch64 relocations can overflow. bfd * elfnn-aarch64.c (elfNN_aarch64_relocate_section): Add a more helpful warning message to explain why certain AArch64 relocs might overflow. ld * testsuite/ld-aarch64/reloc-overflow-bad.d: New test. * testsuite/ld-aarch64/reloc-overflow-1.s: New source file. * testsuite/ld-aarch64/reloc-overflow-2.s: New source file. * testsuite/ld-aarch64/aarch64-elf.exp: Run the new test.
2016-02-09 10:56:21 +01:00
/* Overflow can occur when a variable is referenced with a type
that has a larger alignment than the type with which it was
declared. eg:
file1.c: extern int foo; int a (void) { return foo; }
file2.c: char bar, foo, baz;
If the variable is placed into a data section at an offset
that is incompatible with the larger alignment requirement
overflow will occur. (Strictly speaking this is not overflow
but rather an alignment problem, but the bfd_reloc_ error
enum does not have a value to cover that situation).
Try to catch this situation here and provide a more helpful
error message to the user. */
if (addend & ((1 << howto->rightshift) - 1)
/* FIXME: Are we testing all of the appropriate reloc
types here ? */
&& (real_r_type == BFD_RELOC_AARCH64_LD_LO19_PCREL
|| real_r_type == BFD_RELOC_AARCH64_LDST16_LO12
|| real_r_type == BFD_RELOC_AARCH64_LDST32_LO12
|| real_r_type == BFD_RELOC_AARCH64_LDST64_LO12
|| real_r_type == BFD_RELOC_AARCH64_LDST128_LO12))
{
info->callbacks->warning
ARM and AArch64 messages More standarization of error/warning messages. The ARM backend has some multi-line error messages, which don't fit particularly well with the GNU coding standard insistence that error messages shouldn't be capitalized or have a full-stop. I've replaced the line breaks with semicolons. So for instance the following system/path/to/ld: myobject.o: invalid special symbol `foo'. system/path/to/ld: It must be a global or weak function symbol. becomes system/path/to/ld: myobject.o: invalid special symbol `foo'; it must be a global or weak function symbol bfd/ * elf32-arm.c, * elfnn-aarch64.c: Standardize error/warning messages. ld/ * testsuite/ld-aarch64/reloc-overflow-bad.d, * testsuite/ld-arm/attr-merge-9.out, * testsuite/ld-arm/attr-merge-arch-2.d, * testsuite/ld-arm/attr-merge-unknown-1.d, * testsuite/ld-arm/attr-merge-unknown-2.d, * testsuite/ld-arm/attr-merge-unknown-2r.d, * testsuite/ld-arm/attr-merge-unknown-3.d, * testsuite/ld-arm/cmse-implib-errors.out, * testsuite/ld-arm/cmse-new-earlier-later-implib.out, * testsuite/ld-arm/cmse-new-implib-no-output.out, * testsuite/ld-arm/cmse-new-implib-not-sg-in-implib.out, * testsuite/ld-arm/cmse-new-implib.out, * testsuite/ld-arm/cmse-new-wrong-implib.out, * testsuite/ld-arm/cmse-veneers-no-gnu_sgstubs.out, * testsuite/ld-arm/cmse-veneers-wrong-entryfct.out, * testsuite/ld-arm/group-relocs-alu-bad-2.d, * testsuite/ld-arm/group-relocs-alu-bad.d, * testsuite/ld-arm/group-relocs-ldc-bad-2.d, * testsuite/ld-arm/group-relocs-ldc-bad.d, * testsuite/ld-arm/group-relocs-ldr-bad-2.d, * testsuite/ld-arm/group-relocs-ldr-bad.d, * testsuite/ld-arm/group-relocs-ldrs-bad-2.d, * testsuite/ld-arm/group-relocs-ldrs-bad.d, * testsuite/ld-arm/stm32l4xx-cannot-fix-far-ldm.d: Update.
2018-02-21 03:34:48 +01:00
(info, _("one possible cause of this error is that the \
Add a more helpful warning message to explain why some AArch64 relocations can overflow. bfd * elfnn-aarch64.c (elfNN_aarch64_relocate_section): Add a more helpful warning message to explain why certain AArch64 relocs might overflow. ld * testsuite/ld-aarch64/reloc-overflow-bad.d: New test. * testsuite/ld-aarch64/reloc-overflow-1.s: New source file. * testsuite/ld-aarch64/reloc-overflow-2.s: New source file. * testsuite/ld-aarch64/aarch64-elf.exp: Run the new test.
2016-02-09 10:56:21 +01:00
symbol is being referenced in the indicated code as if it had a larger \
ARM and AArch64 messages More standarization of error/warning messages. The ARM backend has some multi-line error messages, which don't fit particularly well with the GNU coding standard insistence that error messages shouldn't be capitalized or have a full-stop. I've replaced the line breaks with semicolons. So for instance the following system/path/to/ld: myobject.o: invalid special symbol `foo'. system/path/to/ld: It must be a global or weak function symbol. becomes system/path/to/ld: myobject.o: invalid special symbol `foo'; it must be a global or weak function symbol bfd/ * elf32-arm.c, * elfnn-aarch64.c: Standardize error/warning messages. ld/ * testsuite/ld-aarch64/reloc-overflow-bad.d, * testsuite/ld-arm/attr-merge-9.out, * testsuite/ld-arm/attr-merge-arch-2.d, * testsuite/ld-arm/attr-merge-unknown-1.d, * testsuite/ld-arm/attr-merge-unknown-2.d, * testsuite/ld-arm/attr-merge-unknown-2r.d, * testsuite/ld-arm/attr-merge-unknown-3.d, * testsuite/ld-arm/cmse-implib-errors.out, * testsuite/ld-arm/cmse-new-earlier-later-implib.out, * testsuite/ld-arm/cmse-new-implib-no-output.out, * testsuite/ld-arm/cmse-new-implib-not-sg-in-implib.out, * testsuite/ld-arm/cmse-new-implib.out, * testsuite/ld-arm/cmse-new-wrong-implib.out, * testsuite/ld-arm/cmse-veneers-no-gnu_sgstubs.out, * testsuite/ld-arm/cmse-veneers-wrong-entryfct.out, * testsuite/ld-arm/group-relocs-alu-bad-2.d, * testsuite/ld-arm/group-relocs-alu-bad.d, * testsuite/ld-arm/group-relocs-ldc-bad-2.d, * testsuite/ld-arm/group-relocs-ldc-bad.d, * testsuite/ld-arm/group-relocs-ldr-bad-2.d, * testsuite/ld-arm/group-relocs-ldr-bad.d, * testsuite/ld-arm/group-relocs-ldrs-bad-2.d, * testsuite/ld-arm/group-relocs-ldrs-bad.d, * testsuite/ld-arm/stm32l4xx-cannot-fix-far-ldm.d: Update.
2018-02-21 03:34:48 +01:00
alignment than was declared where it was defined"),
Add a more helpful warning message to explain why some AArch64 relocations can overflow. bfd * elfnn-aarch64.c (elfNN_aarch64_relocate_section): Add a more helpful warning message to explain why certain AArch64 relocs might overflow. ld * testsuite/ld-aarch64/reloc-overflow-bad.d: New test. * testsuite/ld-aarch64/reloc-overflow-1.s: New source file. * testsuite/ld-aarch64/reloc-overflow-2.s: New source file. * testsuite/ld-aarch64/aarch64-elf.exp: Run the new test.
2016-02-09 10:56:21 +01:00
name, input_bfd, input_section, rel->r_offset);
}
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
break;
case bfd_reloc_undefined:
Return void from linker callbacks The ldmain.c implementation of these linker callback functions always return true, so any code handling a false return is dead. What's more, some of the bfd backends abort if ever a false return is seen, and there seems to be some confusion in gdb's compile-object-load.c. The return value was never meant to be "oh yes, a multiple_definition error occurred", but rather "out of memory or other catastrophic failure". This patch removes the status return on the callbacks that always return true. I kept the return status for "notice" because that one does happen to need to return "out of memory". include/ * bfdlink.h (struct bfd_link_callbacks): Update comments. Return void from multiple_definition, multiple_common, add_to_set, constructor, warning, undefined_symbol, reloc_overflow, reloc_dangerous and unattached_reloc. bfd/ * aoutx.h: Adjust linker callback calls throughout file, removing dead code. * bout.c: Likewise. * coff-alpha.c: Likewise. * coff-arm.c: Likewise. * coff-h8300.c: Likewise. * coff-h8500.c: Likewise. * coff-i960.c: Likewise. * coff-mcore.c: Likewise. * coff-mips.c: Likewise. * coff-ppc.c: Likewise. * coff-rs6000.c: Likewise. * coff-sh.c: Likewise. * coff-tic80.c: Likewise. * coff-w65.c: Likewise. * coff-z80.c: Likewise. * coff-z8k.c: Likewise. * coff64-rs6000.c: Likewise. * cofflink.c: Likewise. * ecoff.c: Likewise. * elf-bfd.h: Likewise. * elf-m10200.c: Likewise. * elf-m10300.c: Likewise. * elf32-arc.c: Likewise. * elf32-arm.c: Likewise. * elf32-avr.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-d10v.c: Likewise. * elf32-epiphany.c: Likewise. * elf32-fr30.c: Likewise. * elf32-frv.c: Likewise. * elf32-ft32.c: Likewise. * elf32-h8300.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i370.c: Likewise. * elf32-i386.c: Likewise. * elf32-i860.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-lm32.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m32r.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mep.c: Likewise. * elf32-metag.c: Likewise. * elf32-microblaze.c: Likewise. * elf32-moxie.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-nds32.c: Likewise. * elf32-nios2.c: Likewise. * elf32-or1k.c: Likewise. * elf32-ppc.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-sh.c: Likewise. * elf32-sh64.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-tilepro.c: Likewise. * elf32-v850.c: Likewise. * elf32-vax.c: Likewise. * elf32-visium.c: Likewise. * elf32-xstormy16.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-mmix.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-sh64.c: Likewise. * elf64-x86-64.c: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * linker.c: Likewise. * pdp11.c: Likewise. * pe-mips.c: Likewise. * reloc.c: Likewise. * reloc16.c: Likewise. * simple.c: Likewise. * vms-alpha.c: Likewise. * xcofflink.c: Likewise. * elf32-rl78.c (get_symbol_value, get_romstart, get_ramstart): Delete status param. Adjust calls to these and linker callbacks throughout. * elf32-rx.c: (get_symbol_value, get_gp, get_romstart, get_ramstart): Delete status param. Adjust calls to these and linker callbacks throughout. ld/ * ldmain.c (multiple_definition, multiple_common, add_to_set, constructor_callback, warning_callback, undefined_symbol, reloc_overflow, reloc_dangerous, unattached_reloc): Return void. * emultempl/elf32.em: Adjust callback calls. gdb/ * compile/compile-object-load.c (link_callbacks_multiple_definition, link_callbacks_warning, link_callbacks_undefined_symbol, link_callbacks_undefined_symbol, link_callbacks_reloc_overflow, link_callbacks_reloc_dangerous, link_callbacks_unattached_reloc): Return void.
2016-05-27 09:50:55 +02:00
(*info->callbacks->undefined_symbol)
(info, name, input_bfd, input_section, rel->r_offset, TRUE);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
break;
case bfd_reloc_outofrange:
error_message = _("out of range");
goto common_error;
case bfd_reloc_notsupported:
error_message = _("unsupported relocation");
goto common_error;
case bfd_reloc_dangerous:
/* error_message should already be set. */
goto common_error;
default:
error_message = _("unknown error");
/* Fall through. */
common_error:
BFD_ASSERT (error_message != NULL);
Return void from linker callbacks The ldmain.c implementation of these linker callback functions always return true, so any code handling a false return is dead. What's more, some of the bfd backends abort if ever a false return is seen, and there seems to be some confusion in gdb's compile-object-load.c. The return value was never meant to be "oh yes, a multiple_definition error occurred", but rather "out of memory or other catastrophic failure". This patch removes the status return on the callbacks that always return true. I kept the return status for "notice" because that one does happen to need to return "out of memory". include/ * bfdlink.h (struct bfd_link_callbacks): Update comments. Return void from multiple_definition, multiple_common, add_to_set, constructor, warning, undefined_symbol, reloc_overflow, reloc_dangerous and unattached_reloc. bfd/ * aoutx.h: Adjust linker callback calls throughout file, removing dead code. * bout.c: Likewise. * coff-alpha.c: Likewise. * coff-arm.c: Likewise. * coff-h8300.c: Likewise. * coff-h8500.c: Likewise. * coff-i960.c: Likewise. * coff-mcore.c: Likewise. * coff-mips.c: Likewise. * coff-ppc.c: Likewise. * coff-rs6000.c: Likewise. * coff-sh.c: Likewise. * coff-tic80.c: Likewise. * coff-w65.c: Likewise. * coff-z80.c: Likewise. * coff-z8k.c: Likewise. * coff64-rs6000.c: Likewise. * cofflink.c: Likewise. * ecoff.c: Likewise. * elf-bfd.h: Likewise. * elf-m10200.c: Likewise. * elf-m10300.c: Likewise. * elf32-arc.c: Likewise. * elf32-arm.c: Likewise. * elf32-avr.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-d10v.c: Likewise. * elf32-epiphany.c: Likewise. * elf32-fr30.c: Likewise. * elf32-frv.c: Likewise. * elf32-ft32.c: Likewise. * elf32-h8300.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i370.c: Likewise. * elf32-i386.c: Likewise. * elf32-i860.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-lm32.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m32r.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mep.c: Likewise. * elf32-metag.c: Likewise. * elf32-microblaze.c: Likewise. * elf32-moxie.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-nds32.c: Likewise. * elf32-nios2.c: Likewise. * elf32-or1k.c: Likewise. * elf32-ppc.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-sh.c: Likewise. * elf32-sh64.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-tilepro.c: Likewise. * elf32-v850.c: Likewise. * elf32-vax.c: Likewise. * elf32-visium.c: Likewise. * elf32-xstormy16.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-mmix.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-sh64.c: Likewise. * elf64-x86-64.c: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * linker.c: Likewise. * pdp11.c: Likewise. * pe-mips.c: Likewise. * reloc.c: Likewise. * reloc16.c: Likewise. * simple.c: Likewise. * vms-alpha.c: Likewise. * xcofflink.c: Likewise. * elf32-rl78.c (get_symbol_value, get_romstart, get_ramstart): Delete status param. Adjust calls to these and linker callbacks throughout. * elf32-rx.c: (get_symbol_value, get_gp, get_romstart, get_ramstart): Delete status param. Adjust calls to these and linker callbacks throughout. ld/ * ldmain.c (multiple_definition, multiple_common, add_to_set, constructor_callback, warning_callback, undefined_symbol, reloc_overflow, reloc_dangerous, unattached_reloc): Return void. * emultempl/elf32.em: Adjust callback calls. gdb/ * compile/compile-object-load.c (link_callbacks_multiple_definition, link_callbacks_warning, link_callbacks_undefined_symbol, link_callbacks_undefined_symbol, link_callbacks_reloc_overflow, link_callbacks_reloc_dangerous, link_callbacks_unattached_reloc): Return void.
2016-05-27 09:50:55 +02:00
(*info->callbacks->reloc_dangerous)
(info, error_message, input_bfd, input_section, rel->r_offset);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
break;
}
}
Add a more helpful warning message to explain why some AArch64 relocations can overflow. bfd * elfnn-aarch64.c (elfNN_aarch64_relocate_section): Add a more helpful warning message to explain why certain AArch64 relocs might overflow. ld * testsuite/ld-aarch64/reloc-overflow-bad.d: New test. * testsuite/ld-aarch64/reloc-overflow-1.s: New source file. * testsuite/ld-aarch64/reloc-overflow-2.s: New source file. * testsuite/ld-aarch64/aarch64-elf.exp: Run the new test.
2016-02-09 10:56:21 +01:00
if (!save_addend)
addend = 0;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
}
return TRUE;
}
/* Set the right machine number. */
static bfd_boolean
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_object_p (bfd *abfd)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
#if ARCH_SIZE == 32
bfd_default_set_arch_mach (abfd, bfd_arch_aarch64, bfd_mach_aarch64_ilp32);
#else
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
bfd_default_set_arch_mach (abfd, bfd_arch_aarch64, bfd_mach_aarch64);
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
#endif
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
return TRUE;
}
/* Function to keep AArch64 specific flags in the ELF header. */
static bfd_boolean
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_set_private_flags (bfd *abfd, flagword flags)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
if (elf_flags_init (abfd) && elf_elfheader (abfd)->e_flags != flags)
{
}
else
{
elf_elfheader (abfd)->e_flags = flags;
elf_flags_init (abfd) = TRUE;
}
return TRUE;
}
/* Merge backend specific data from an object file to the output
object file when linking. */
static bfd_boolean
Pass link_info to _bfd_merge_private_bfd_data Most BFD linker functions take a bfd_link_info param, which reinforces the fact that they are linker functions and allow access to linker callbacks, eg. einfo for printing errors. I was going to use einfo for --fatal-warnings support before I decided a better way was the patch commit 4519d071. bfd/ * targets.c (bfd_target <_bfd_merge_private_bfd_data>): Replace obfd param with struct bfd_link_info param. Update all callers. * linker.c (bfd_merge_private_bfd_data): Likewise. (_bfd_generic_verify_endian_match): Likewise. * aoutf1.h (sunos_merge_private_bfd_data): Likewise. * coff-arm.c (coff_arm_merge_private_bfd_data): Likewise. * elf-attrs.c (_bfd_elf_merge_object_attributes): Likewise. * elf-bfd.h (_bfd_elf_ppc_merge_fp_attributes): Likewise. (_bfd_elf_merge_object_attributes): Likewise. * elf-m10300.c (_bfd_mn10300_elf_merge_private_bfd_data): Likewise. * elf-s390-common.c (elf_s390_merge_obj_attributes): Likewise. * elf32-arc.c (arc_elf_merge_private_bfd_data): Likewise. * elf32-arm.c (elf32_arm_merge_eabi_attributes): Likewise. (elf32_arm_merge_private_bfd_data): Likewise. * elf32-bfin.c (elf32_bfin_merge_private_bfd_data): Likewise. * elf32-cr16.c (_bfd_cr16_elf_merge_private_bfd_data): Likewise. * elf32-cris.c (cris_elf_merge_private_bfd_data): Likewise. * elf32-frv.c (frv_elf_merge_private_bfd_data): Likewise. * elf32-h8300.c (elf32_h8_merge_private_bfd_data): Likewise. * elf32-i370.c (i370_elf_merge_private_bfd_data): Likewise. * elf32-iq2000.c (iq2000_elf_merge_private_bfd_data): Likewise. * elf32-m32c.c (m32c_elf_merge_private_bfd_data): Likewise. * elf32-m32r.c (m32r_elf_merge_private_bfd_data): Likewise. * elf32-m68hc1x.c (_bfd_m68hc11_elf_merge_private_bfd_data): Likewise. * elf32-m68hc1x.h (_bfd_m68hc11_elf_merge_private_bfd_data): Likewise. * elf32-m68k.c (elf32_m68k_merge_private_bfd_data): Likewise. * elf32-mcore.c (mcore_elf_merge_private_bfd_data): Likewise. * elf32-mep.c (mep_elf_merge_private_bfd_data): Likewise. * elf32-msp430.c (elf32_msp430_merge_mspabi_attributes): Likewise. (elf32_msp430_merge_private_bfd_data): Likewise. * elf32-mt.c (mt_elf_merge_private_bfd_data): Likewise. * elf32-nds32.c (nds32_elf_merge_private_bfd_data): Likewise. * elf32-nios2.c (nios2_elf32_merge_private_bfd_data): Likewise. * elf32-or1k.c (elf32_or1k_merge_private_bfd_data): Likewise. * elf32-ppc.c (_bfd_elf_ppc_merge_fp_attributes): Likewise. (ppc_elf_merge_obj_attributes): Likewise. (ppc_elf_merge_private_bfd_data): Likewise. * elf32-rl78.c (rl78_elf_merge_private_bfd_data): Likewise. * elf32-rx.c (rx_elf_merge_private_bfd_data): Likewise. * elf32-s390.c (elf32_s390_merge_private_bfd_data): Likewise. * elf32-score.c (s3_elf32_score_merge_private_bfd_data): Likewise. (elf32_score_merge_private_bfd_data): Likewise. * elf32-score.h (s7_elf32_score_merge_private_bfd_data): Likewise. * elf32-score7.c (s7_elf32_score_merge_private_bfd_data): Likewise. * elf32-sh.c (sh_merge_bfd_arch, sh_elf_merge_private_data): Likewise. * elf32-sh64.c (sh64_elf_merge_private_data): Likewise. * elf32-sparc.c (elf32_sparc_merge_private_bfd_data): Likewise. * elf32-tic6x.c (elf32_tic6x_merge_attributes): Likewise. (elf32_tic6x_merge_private_bfd_data): Likewise. * elf32-v850.c (v850_elf_merge_private_bfd_data): Likewise. * elf32-vax.c (elf32_vax_merge_private_bfd_data): Likewise. * elf32-visium.c (visium_elf_merge_private_bfd_data): Likewise. * elf32-xtensa.c (elf_xtensa_merge_private_bfd_data): Likewise. * elf64-ia64-vms.c (elf64_ia64_merge_private_bfd_data): Likewise. * elf64-ppc.c (ppc64_elf_merge_private_bfd_data): Likewise. * elf64-s390.c (elf64_s390_merge_private_bfd_data): Likewise. * elf64-sh64.c (sh_elf64_merge_private_data): Likewise. * elf64-sparc.c (elf64_sparc_merge_private_bfd_data): Likewise. * elfnn-aarch64.c (elfNN_aarch64_merge_private_bfd_data): Likewise. * elfnn-ia64.c (elfNN_ia64_merge_private_bfd_data): Likewise. * elfxx-mips.c (mips_elf_merge_obj_e_flags): Likewise. (mips_elf_merge_obj_attributes): Likewise. (_bfd_mips_elf_merge_private_bfd_data): Likewise. * elfxx-mips.h (_bfd_mips_elf_merge_private_bfd_data): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_merge_private_bfd_data): Likewise. * elfxx-sparc.h (_bfd_sparc_elf_merge_private_bfd_data): Likewise. * elfxx-target.h (bfd_elfNN_bfd_merge_private_bfd_data): Likewise. * elfxx-tilegx.c (_bfd_tilegx_elf_merge_private_bfd_data): Likewise. * elfxx-tilegx.h (_bfd_tilegx_elf_merge_private_bfd_data): Likewise. * libbfd-in.h (_bfd_generic_bfd_merge_private_bfd_data): Likewise. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. ld/ * ldlang.c (lang_check): Update bfd_merge_private_bfd_data call.
2016-09-30 01:14:50 +02:00
elfNN_aarch64_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
Pass link_info to _bfd_merge_private_bfd_data Most BFD linker functions take a bfd_link_info param, which reinforces the fact that they are linker functions and allow access to linker callbacks, eg. einfo for printing errors. I was going to use einfo for --fatal-warnings support before I decided a better way was the patch commit 4519d071. bfd/ * targets.c (bfd_target <_bfd_merge_private_bfd_data>): Replace obfd param with struct bfd_link_info param. Update all callers. * linker.c (bfd_merge_private_bfd_data): Likewise. (_bfd_generic_verify_endian_match): Likewise. * aoutf1.h (sunos_merge_private_bfd_data): Likewise. * coff-arm.c (coff_arm_merge_private_bfd_data): Likewise. * elf-attrs.c (_bfd_elf_merge_object_attributes): Likewise. * elf-bfd.h (_bfd_elf_ppc_merge_fp_attributes): Likewise. (_bfd_elf_merge_object_attributes): Likewise. * elf-m10300.c (_bfd_mn10300_elf_merge_private_bfd_data): Likewise. * elf-s390-common.c (elf_s390_merge_obj_attributes): Likewise. * elf32-arc.c (arc_elf_merge_private_bfd_data): Likewise. * elf32-arm.c (elf32_arm_merge_eabi_attributes): Likewise. (elf32_arm_merge_private_bfd_data): Likewise. * elf32-bfin.c (elf32_bfin_merge_private_bfd_data): Likewise. * elf32-cr16.c (_bfd_cr16_elf_merge_private_bfd_data): Likewise. * elf32-cris.c (cris_elf_merge_private_bfd_data): Likewise. * elf32-frv.c (frv_elf_merge_private_bfd_data): Likewise. * elf32-h8300.c (elf32_h8_merge_private_bfd_data): Likewise. * elf32-i370.c (i370_elf_merge_private_bfd_data): Likewise. * elf32-iq2000.c (iq2000_elf_merge_private_bfd_data): Likewise. * elf32-m32c.c (m32c_elf_merge_private_bfd_data): Likewise. * elf32-m32r.c (m32r_elf_merge_private_bfd_data): Likewise. * elf32-m68hc1x.c (_bfd_m68hc11_elf_merge_private_bfd_data): Likewise. * elf32-m68hc1x.h (_bfd_m68hc11_elf_merge_private_bfd_data): Likewise. * elf32-m68k.c (elf32_m68k_merge_private_bfd_data): Likewise. * elf32-mcore.c (mcore_elf_merge_private_bfd_data): Likewise. * elf32-mep.c (mep_elf_merge_private_bfd_data): Likewise. * elf32-msp430.c (elf32_msp430_merge_mspabi_attributes): Likewise. (elf32_msp430_merge_private_bfd_data): Likewise. * elf32-mt.c (mt_elf_merge_private_bfd_data): Likewise. * elf32-nds32.c (nds32_elf_merge_private_bfd_data): Likewise. * elf32-nios2.c (nios2_elf32_merge_private_bfd_data): Likewise. * elf32-or1k.c (elf32_or1k_merge_private_bfd_data): Likewise. * elf32-ppc.c (_bfd_elf_ppc_merge_fp_attributes): Likewise. (ppc_elf_merge_obj_attributes): Likewise. (ppc_elf_merge_private_bfd_data): Likewise. * elf32-rl78.c (rl78_elf_merge_private_bfd_data): Likewise. * elf32-rx.c (rx_elf_merge_private_bfd_data): Likewise. * elf32-s390.c (elf32_s390_merge_private_bfd_data): Likewise. * elf32-score.c (s3_elf32_score_merge_private_bfd_data): Likewise. (elf32_score_merge_private_bfd_data): Likewise. * elf32-score.h (s7_elf32_score_merge_private_bfd_data): Likewise. * elf32-score7.c (s7_elf32_score_merge_private_bfd_data): Likewise. * elf32-sh.c (sh_merge_bfd_arch, sh_elf_merge_private_data): Likewise. * elf32-sh64.c (sh64_elf_merge_private_data): Likewise. * elf32-sparc.c (elf32_sparc_merge_private_bfd_data): Likewise. * elf32-tic6x.c (elf32_tic6x_merge_attributes): Likewise. (elf32_tic6x_merge_private_bfd_data): Likewise. * elf32-v850.c (v850_elf_merge_private_bfd_data): Likewise. * elf32-vax.c (elf32_vax_merge_private_bfd_data): Likewise. * elf32-visium.c (visium_elf_merge_private_bfd_data): Likewise. * elf32-xtensa.c (elf_xtensa_merge_private_bfd_data): Likewise. * elf64-ia64-vms.c (elf64_ia64_merge_private_bfd_data): Likewise. * elf64-ppc.c (ppc64_elf_merge_private_bfd_data): Likewise. * elf64-s390.c (elf64_s390_merge_private_bfd_data): Likewise. * elf64-sh64.c (sh_elf64_merge_private_data): Likewise. * elf64-sparc.c (elf64_sparc_merge_private_bfd_data): Likewise. * elfnn-aarch64.c (elfNN_aarch64_merge_private_bfd_data): Likewise. * elfnn-ia64.c (elfNN_ia64_merge_private_bfd_data): Likewise. * elfxx-mips.c (mips_elf_merge_obj_e_flags): Likewise. (mips_elf_merge_obj_attributes): Likewise. (_bfd_mips_elf_merge_private_bfd_data): Likewise. * elfxx-mips.h (_bfd_mips_elf_merge_private_bfd_data): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_merge_private_bfd_data): Likewise. * elfxx-sparc.h (_bfd_sparc_elf_merge_private_bfd_data): Likewise. * elfxx-target.h (bfd_elfNN_bfd_merge_private_bfd_data): Likewise. * elfxx-tilegx.c (_bfd_tilegx_elf_merge_private_bfd_data): Likewise. * elfxx-tilegx.h (_bfd_tilegx_elf_merge_private_bfd_data): Likewise. * libbfd-in.h (_bfd_generic_bfd_merge_private_bfd_data): Likewise. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. ld/ * ldlang.c (lang_check): Update bfd_merge_private_bfd_data call.
2016-09-30 01:14:50 +02:00
bfd *obfd = info->output_bfd;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
flagword out_flags;
flagword in_flags;
bfd_boolean flags_compatible = TRUE;
asection *sec;
/* Check if we have the same endianess. */
Pass link_info to _bfd_merge_private_bfd_data Most BFD linker functions take a bfd_link_info param, which reinforces the fact that they are linker functions and allow access to linker callbacks, eg. einfo for printing errors. I was going to use einfo for --fatal-warnings support before I decided a better way was the patch commit 4519d071. bfd/ * targets.c (bfd_target <_bfd_merge_private_bfd_data>): Replace obfd param with struct bfd_link_info param. Update all callers. * linker.c (bfd_merge_private_bfd_data): Likewise. (_bfd_generic_verify_endian_match): Likewise. * aoutf1.h (sunos_merge_private_bfd_data): Likewise. * coff-arm.c (coff_arm_merge_private_bfd_data): Likewise. * elf-attrs.c (_bfd_elf_merge_object_attributes): Likewise. * elf-bfd.h (_bfd_elf_ppc_merge_fp_attributes): Likewise. (_bfd_elf_merge_object_attributes): Likewise. * elf-m10300.c (_bfd_mn10300_elf_merge_private_bfd_data): Likewise. * elf-s390-common.c (elf_s390_merge_obj_attributes): Likewise. * elf32-arc.c (arc_elf_merge_private_bfd_data): Likewise. * elf32-arm.c (elf32_arm_merge_eabi_attributes): Likewise. (elf32_arm_merge_private_bfd_data): Likewise. * elf32-bfin.c (elf32_bfin_merge_private_bfd_data): Likewise. * elf32-cr16.c (_bfd_cr16_elf_merge_private_bfd_data): Likewise. * elf32-cris.c (cris_elf_merge_private_bfd_data): Likewise. * elf32-frv.c (frv_elf_merge_private_bfd_data): Likewise. * elf32-h8300.c (elf32_h8_merge_private_bfd_data): Likewise. * elf32-i370.c (i370_elf_merge_private_bfd_data): Likewise. * elf32-iq2000.c (iq2000_elf_merge_private_bfd_data): Likewise. * elf32-m32c.c (m32c_elf_merge_private_bfd_data): Likewise. * elf32-m32r.c (m32r_elf_merge_private_bfd_data): Likewise. * elf32-m68hc1x.c (_bfd_m68hc11_elf_merge_private_bfd_data): Likewise. * elf32-m68hc1x.h (_bfd_m68hc11_elf_merge_private_bfd_data): Likewise. * elf32-m68k.c (elf32_m68k_merge_private_bfd_data): Likewise. * elf32-mcore.c (mcore_elf_merge_private_bfd_data): Likewise. * elf32-mep.c (mep_elf_merge_private_bfd_data): Likewise. * elf32-msp430.c (elf32_msp430_merge_mspabi_attributes): Likewise. (elf32_msp430_merge_private_bfd_data): Likewise. * elf32-mt.c (mt_elf_merge_private_bfd_data): Likewise. * elf32-nds32.c (nds32_elf_merge_private_bfd_data): Likewise. * elf32-nios2.c (nios2_elf32_merge_private_bfd_data): Likewise. * elf32-or1k.c (elf32_or1k_merge_private_bfd_data): Likewise. * elf32-ppc.c (_bfd_elf_ppc_merge_fp_attributes): Likewise. (ppc_elf_merge_obj_attributes): Likewise. (ppc_elf_merge_private_bfd_data): Likewise. * elf32-rl78.c (rl78_elf_merge_private_bfd_data): Likewise. * elf32-rx.c (rx_elf_merge_private_bfd_data): Likewise. * elf32-s390.c (elf32_s390_merge_private_bfd_data): Likewise. * elf32-score.c (s3_elf32_score_merge_private_bfd_data): Likewise. (elf32_score_merge_private_bfd_data): Likewise. * elf32-score.h (s7_elf32_score_merge_private_bfd_data): Likewise. * elf32-score7.c (s7_elf32_score_merge_private_bfd_data): Likewise. * elf32-sh.c (sh_merge_bfd_arch, sh_elf_merge_private_data): Likewise. * elf32-sh64.c (sh64_elf_merge_private_data): Likewise. * elf32-sparc.c (elf32_sparc_merge_private_bfd_data): Likewise. * elf32-tic6x.c (elf32_tic6x_merge_attributes): Likewise. (elf32_tic6x_merge_private_bfd_data): Likewise. * elf32-v850.c (v850_elf_merge_private_bfd_data): Likewise. * elf32-vax.c (elf32_vax_merge_private_bfd_data): Likewise. * elf32-visium.c (visium_elf_merge_private_bfd_data): Likewise. * elf32-xtensa.c (elf_xtensa_merge_private_bfd_data): Likewise. * elf64-ia64-vms.c (elf64_ia64_merge_private_bfd_data): Likewise. * elf64-ppc.c (ppc64_elf_merge_private_bfd_data): Likewise. * elf64-s390.c (elf64_s390_merge_private_bfd_data): Likewise. * elf64-sh64.c (sh_elf64_merge_private_data): Likewise. * elf64-sparc.c (elf64_sparc_merge_private_bfd_data): Likewise. * elfnn-aarch64.c (elfNN_aarch64_merge_private_bfd_data): Likewise. * elfnn-ia64.c (elfNN_ia64_merge_private_bfd_data): Likewise. * elfxx-mips.c (mips_elf_merge_obj_e_flags): Likewise. (mips_elf_merge_obj_attributes): Likewise. (_bfd_mips_elf_merge_private_bfd_data): Likewise. * elfxx-mips.h (_bfd_mips_elf_merge_private_bfd_data): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_merge_private_bfd_data): Likewise. * elfxx-sparc.h (_bfd_sparc_elf_merge_private_bfd_data): Likewise. * elfxx-target.h (bfd_elfNN_bfd_merge_private_bfd_data): Likewise. * elfxx-tilegx.c (_bfd_tilegx_elf_merge_private_bfd_data): Likewise. * elfxx-tilegx.h (_bfd_tilegx_elf_merge_private_bfd_data): Likewise. * libbfd-in.h (_bfd_generic_bfd_merge_private_bfd_data): Likewise. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. ld/ * ldlang.c (lang_check): Update bfd_merge_private_bfd_data call.
2016-09-30 01:14:50 +02:00
if (!_bfd_generic_verify_endian_match (ibfd, info))
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
return FALSE;
if (!is_aarch64_elf (ibfd) || !is_aarch64_elf (obfd))
return TRUE;
/* The input BFD must have had its flags initialised. */
/* The following seems bogus to me -- The flags are initialized in
the assembler but I don't think an elf_flags_init field is
written into the object. */
/* BFD_ASSERT (elf_flags_init (ibfd)); */
in_flags = elf_elfheader (ibfd)->e_flags;
out_flags = elf_elfheader (obfd)->e_flags;
if (!elf_flags_init (obfd))
{
/* If the input is the default architecture and had the default
BFD whitespace fixes Binutils is supposed to use tabs. In my git config I have whitespace = indent-with-non-tab,space-before-tab,trailing-space and I got annoyed enough seeing red in "git diff" output to fix the problems. * doc/header.sed: Trim trailing space when splitting lines. * aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-cris.c, * aout-ns32k.c, * aout-target.h, * aout-tic30.c, * aoutf1.h, * aoutx.h, * arc-got.h, * arc-plt.def, * arc-plt.h, * archive.c, * archive64.c, * archures.c, * armnetbsd.c, * bfd-in.h, * bfd.c, * bfdio.c, * binary.c, * bout.c, * cache.c, * cisco-core.c, * coff-alpha.c, * coff-apollo.c, * coff-arm.c, * coff-h8300.c, * coff-i386.c, * coff-i860.c, * coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mcore.c, * coff-mips.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-stgo32.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * compress.c, * corefile.c, * cpu-alpha.c, * cpu-arm.c, * cpu-avr.c, * cpu-bfin.c, * cpu-cr16.c, * cpu-cr16c.c, * cpu-crx.c, * cpu-d10v.c, * cpu-frv.c, * cpu-ft32.c, * cpu-i370.c, * cpu-i960.c, * cpu-ia64-opc.c, * cpu-ip2k.c, * cpu-lm32.c, * cpu-m32r.c, * cpu-mcore.c, * cpu-microblaze.c, * cpu-mips.c, * cpu-moxie.c, * cpu-mt.c, * cpu-nios2.c, * cpu-ns32k.c, * cpu-or1k.c, * cpu-powerpc.c, * cpu-pru.c, * cpu-sh.c, * cpu-spu.c, * cpu-v850.c, * cpu-v850_rh850.c, * cpu-xgate.c, * cpu-z80.c, * dwarf1.c, * dwarf2.c, * ecoff.c, * ecofflink.c, * ecoffswap.h, * elf-bfd.h, * elf-eh-frame.c, * elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf-s390-common.c, * elf-strtab.c, * elf-vxworks.c, * elf.c, * elf32-am33lin.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-avr.h, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-i860.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68hc1x.c, * elf32-m68hc1x.h, * elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nds32.h, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score.h, * elf32-score7.c, * elf32-sh-symbian.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilegx.c, * elf32-tilegx.h, * elf32-tilepro.c, * elf32-tilepro.h, * elf32-v850.c, * elf32-vax.c, * elf32-wasm32.c, * elf32-xc16x.c, * elf32-xgate.c, * elf32-xgate.h, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-tilegx.c, * elf64-tilegx.h, * elf64-x86-64.c, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-aarch64.h, * elfxx-ia64.c, * elfxx-ia64.h, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * elfxx-x86.h, * freebsd.h, * hash.c, * host-aout.c, * hp300hpux.c, * hppabsd-core.c, * hpux-core.c, * i386aout.c, * i386linux.c, * i386lynx.c, * i386mach3.c, * i386msdos.c, * i386netbsd.c, * ieee.c, * ihex.c, * irix-core.c, * libaout.h, * libbfd-in.h, * libbfd.c, * libcoff-in.h, * libnlm.h, * libpei.h, * libxcoff.h, * linker.c, * lynx-core.c, * m68k4knetbsd.c, * m68klinux.c, * m68knetbsd.c, * m88kmach3.c, * mach-o-aarch64.c, * mach-o-arm.c, * mach-o-i386.c, * mach-o-target.c, * mach-o-x86-64.c, * mach-o.c, * mach-o.h, * merge.c, * mipsbsd.c, * mmo.c, * netbsd.h, * netbsd-core.c, * newsos3.c, * nlm-target.h, * nlm32-ppc.c, * nlm32-sparc.c, * nlmcode.h, * ns32k.h, * ns32knetbsd.c, * oasys.c, * opncls.c, * pc532-mach.c, * pdp11.c, * pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-mips.c, * pe-x86_64.c, * peXXigen.c, * pef.c, * pef.h, * pei-arm.c, * pei-i386.c, * pei-mcore.c, * pei-x86_64.c, * peicode.h, * plugin.c, * ppcboot.c, * ptrace-core.c, * reloc.c, * riscix.c, * rs6000-core.c, * section.c, * som.c, * som.h, * sparclinux.c, * sparcnetbsd.c, * srec.c, * stabs.c, * sunos.c, * syms.c, * targets.c, * tekhex.c, * trad-core.c, * vax1knetbsd.c, * vaxnetbsd.c, * verilog.c, * versados.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * wasm-module.c, * wasm-module.h, * xcofflink.c, * xsym.c, * xsym.h: Whitespace fixes. * bfd-in2.h, * libbfd.h, * libcoff.h: Regenerate.
2017-12-05 23:56:00 +01:00
flags then do not bother setting the flags for the output
architecture, instead allow future merges to do this. If no
future merges ever set these flags then they will retain their
uninitialised values, which surprise surprise, correspond
to the default values. */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
if (bfd_get_arch_info (ibfd)->the_default
&& elf_elfheader (ibfd)->e_flags == 0)
return TRUE;
elf_flags_init (obfd) = TRUE;
elf_elfheader (obfd)->e_flags = in_flags;
if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
&& bfd_get_arch_info (obfd)->the_default)
return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd),
bfd_get_mach (ibfd));
return TRUE;
}
/* Identical flags must be compatible. */
if (in_flags == out_flags)
return TRUE;
/* Check to see if the input BFD actually contains any sections. If
not, its flags may not have been initialised either, but it
cannot actually cause any incompatiblity. Do not short-circuit
dynamic objects; their section list may be emptied by
elf_link_add_object_symbols.
Also check to see if there are no code sections in the input.
In this case there is no need to check for code specific flags.
XXX - do we need to worry about floating-point format compatability
in data sections ? */
if (!(ibfd->flags & DYNAMIC))
{
bfd_boolean null_input_bfd = TRUE;
bfd_boolean only_data_sections = TRUE;
for (sec = ibfd->sections; sec != NULL; sec = sec->next)
{
bfd_section_* macros This large patch removes the unnecessary bfd parameter from various bfd section macros and functions. The bfd is hardly ever used and if needed for the bfd_set_section_* or bfd_rename_section functions can be found via section->owner except for the com, und, abs, and ind std_section special sections. Those sections shouldn't be modified anyway. The patch also removes various bfd_get_section_<field> macros, replacing their use with bfd_section_<field>, and adds bfd_set_section_lma. I've also fixed a minor bug in gas where compressed section renaming was done directly rather than calling bfd_rename_section. This would have broken bfd_get_section_by_name and similar functions, but that hardly mattered at such a late stage in gas processing. bfd/ * bfd-in.h (bfd_get_section_name, bfd_get_section_vma), (bfd_get_section_lma, bfd_get_section_alignment), (bfd_get_section_size, bfd_get_section_flags), (bfd_get_section_userdata): Delete. (bfd_section_name, bfd_section_size, bfd_section_vma), (bfd_section_lma, bfd_section_alignment): Lose bfd parameter. (bfd_section_flags, bfd_section_userdata): New. (bfd_is_com_section): Rename parameter. * section.c (bfd_set_section_userdata, bfd_set_section_vma), (bfd_set_section_alignment, bfd_set_section_flags, bfd_rename_section), (bfd_set_section_size): Delete bfd parameter, rename section parameter. (bfd_set_section_lma): New. * bfd-in2.h: Regenerate. * mach-o.c (bfd_mach_o_init_section_from_mach_o): Delete bfd param, update callers. * aoutx.h, * bfd.c, * coff-alpha.c, * coff-arm.c, * coff-mips.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * compress.c, * ecoff.c, * elf-eh-frame.c, * elf-hppa.h, * elf-ifunc.c, * elf-m10200.c, * elf-m10300.c, * elf-properties.c, * elf-s390-common.c, * elf-vxworks.c, * elf.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-csky.c, * elf32-d10v.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-ip2k.c, * elf32-iq2000.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc1x.c, * elf32-m68k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nios2.c, * elf32-or1k.c, * elf32-ppc.c, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score7.c, * elf32-sh.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilepro.c, * elf32-v850.c, * elf32-vax.c, * elf32-visium.c, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-bpf.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sparc.c, * elf64-x86-64.c, * elflink.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-mips.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * i386msdos.c, * linker.c, * mach-o.c, * mmo.c, * opncls.c, * pdp11.c, * pei-x86_64.c, * peicode.h, * reloc.c, * section.c, * syms.c, * vms-alpha.c, * xcofflink.c: Update throughout for bfd section macro and function changes. binutils/ * addr2line.c, * bucomm.c, * coffgrok.c, * dlltool.c, * nm.c, * objcopy.c, * objdump.c, * od-elf32_avr.c, * od-macho.c, * od-xcoff.c, * prdbg.c, * rdcoff.c, * rddbg.c, * rescoff.c, * resres.c, * size.c, * srconv.c, * strings.c, * windmc.c: Update throughout for bfd section macro and function changes. gas/ * as.c, * as.h, * dw2gencfi.c, * dwarf2dbg.c, * ecoff.c, * read.c, * stabs.c, * subsegs.c, * subsegs.h, * write.c, * config/obj-coff-seh.c, * config/obj-coff.c, * config/obj-ecoff.c, * config/obj-elf.c, * config/obj-macho.c, * config/obj-som.c, * config/tc-aarch64.c, * config/tc-alpha.c, * config/tc-arc.c, * config/tc-arm.c, * config/tc-avr.c, * config/tc-bfin.c, * config/tc-bpf.c, * config/tc-d10v.c, * config/tc-d30v.c, * config/tc-epiphany.c, * config/tc-fr30.c, * config/tc-frv.c, * config/tc-h8300.c, * config/tc-hppa.c, * config/tc-i386.c, * config/tc-ia64.c, * config/tc-ip2k.c, * config/tc-iq2000.c, * config/tc-lm32.c, * config/tc-m32c.c, * config/tc-m32r.c, * config/tc-m68hc11.c, * config/tc-mep.c, * config/tc-microblaze.c, * config/tc-mips.c, * config/tc-mmix.c, * config/tc-mn10200.c, * config/tc-mn10300.c, * config/tc-msp430.c, * config/tc-mt.c, * config/tc-nds32.c, * config/tc-or1k.c, * config/tc-ppc.c, * config/tc-pru.c, * config/tc-rl78.c, * config/tc-rx.c, * config/tc-s12z.c, * config/tc-s390.c, * config/tc-score.c, * config/tc-score7.c, * config/tc-sh.c, * config/tc-sparc.c, * config/tc-spu.c, * config/tc-tic4x.c, * config/tc-tic54x.c, * config/tc-tic6x.c, * config/tc-tilegx.c, * config/tc-tilepro.c, * config/tc-v850.c, * config/tc-visium.c, * config/tc-wasm32.c, * config/tc-xc16x.c, * config/tc-xgate.c, * config/tc-xstormy16.c, * config/tc-xtensa.c, * config/tc-z8k.c: Update throughout for bfd section macro and function changes. * write.c (compress_debug): Use bfd_rename_section. gdb/ * aarch64-linux-tdep.c, * arm-tdep.c, * auto-load.c, * coff-pe-read.c, * coffread.c, * corelow.c, * dbxread.c, * dicos-tdep.c, * dwarf2-frame.c, * dwarf2read.c, * elfread.c, * exec.c, * fbsd-tdep.c, * gcore.c, * gdb_bfd.c, * gdb_bfd.h, * hppa-tdep.c, * i386-cygwin-tdep.c, * i386-fbsd-tdep.c, * i386-linux-tdep.c, * jit.c, * linux-tdep.c, * machoread.c, * maint.c, * mdebugread.c, * minidebug.c, * mips-linux-tdep.c, * mips-sde-tdep.c, * mips-tdep.c, * mipsread.c, * nto-tdep.c, * objfiles.c, * objfiles.h, * osabi.c, * ppc-linux-tdep.c, * ppc64-tdep.c, * record-btrace.c, * record-full.c, * remote.c, * rs6000-aix-tdep.c, * rs6000-tdep.c, * s390-linux-tdep.c, * s390-tdep.c, * solib-aix.c, * solib-dsbt.c, * solib-frv.c, * solib-spu.c, * solib-svr4.c, * solib-target.c, * spu-linux-nat.c, * spu-tdep.c, * symfile-mem.c, * symfile.c, * symmisc.c, * symtab.c, * target.c, * windows-nat.c, * xcoffread.c, * cli/cli-dump.c, * compile/compile-object-load.c, * mi/mi-interp.c: Update throughout for bfd section macro and function changes. * gcore (gcore_create_callback): Use bfd_set_section_lma. * spu-tdep.c (spu_overlay_new_objfile): Likewise. gprof/ * corefile.c, * symtab.c: Update throughout for bfd section macro and function changes. ld/ * ldcref.c, * ldctor.c, * ldelf.c, * ldlang.c, * pe-dll.c, * emultempl/aarch64elf.em, * emultempl/aix.em, * emultempl/armcoff.em, * emultempl/armelf.em, * emultempl/cr16elf.em, * emultempl/cskyelf.em, * emultempl/m68hc1xelf.em, * emultempl/m68kelf.em, * emultempl/mipself.em, * emultempl/mmix-elfnmmo.em, * emultempl/mmo.em, * emultempl/msp430.em, * emultempl/nios2elf.em, * emultempl/pe.em, * emultempl/pep.em, * emultempl/ppc64elf.em, * emultempl/xtensaelf.em: Update throughout for bfd section macro and function changes. libctf/ * ctf-open-bfd.c: Update throughout for bfd section macro changes. opcodes/ * arc-ext.c: Update throughout for bfd section macro changes. sim/ * common/sim-load.c, * common/sim-utils.c, * cris/sim-if.c, * erc32/func.c, * lm32/sim-if.c, * m32c/load.c, * m32c/trace.c, * m68hc11/interp.c, * ppc/hw_htab.c, * ppc/hw_init.c, * rl78/load.c, * rl78/trace.c, * rx/gdb-if.c, * rx/load.c, * rx/trace.c: Update throughout for bfd section macro changes.
2019-09-16 12:55:17 +02:00
if ((bfd_section_flags (sec)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
& (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
== (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
only_data_sections = FALSE;
null_input_bfd = FALSE;
break;
}
if (null_input_bfd || only_data_sections)
return TRUE;
}
return flags_compatible;
}
/* Display the flags field. */
static bfd_boolean
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_print_private_bfd_data (bfd *abfd, void *ptr)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
FILE *file = (FILE *) ptr;
unsigned long flags;
BFD_ASSERT (abfd != NULL && ptr != NULL);
/* Print normal ELF private data. */
_bfd_elf_print_private_bfd_data (abfd, ptr);
flags = elf_elfheader (abfd)->e_flags;
/* Ignore init flag - it may not be set, despite the flags field
containing valid data. */
/* xgettext:c-format */
fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
if (flags)
fprintf (file, _("<Unrecognised flag bits set>"));
fputc ('\n', file);
return TRUE;
}
[AArch64] Allow COPY relocation elimination As discussed at the PR, this patch tries to avoid COPY relocation generation and propagate the original relocation into runtime if it was relocating on writable section. The ELIMINATE_COPY_RELOCS has been set to true and it's underlying infrastructure has been improved so that the COPY reloc elimination at least working on absoluate relocations (ABS64) on AArch64. BFD linker copy relocation elimination framwork requires the backend to always allocate dynrelocs for all those relocation types that are possible to introduce copy relocations. This is for adjust_dynamic_symbol hook to be able to get all symbol reference information. Should one symbol is referenced by more than one relocations, if there is any of them needs copy relocation then linker should generate it. bfd/ PR ld/21532 * elfnn-aarch64.c (ELIMINATE_COPY_RELOCS): Set to 1. (elfNN_aarch64_final_link_relocate): Also propagate relocations to runtime for if there needs copy relocation elimination. (need_copy_relocation_p): New function. Return true for symbol with pc-relative references and if it's against read-only sections. (elfNN_aarch64_adjust_dynamic_symbol): Use need_copy_relocation_p. (elfNN_aarch64_check_relocs): Allocate dynrelocs for relocation types that are related with accessing external objects. (elfNN_aarch64_gc_sweep_hook): Sync the relocation types with the change in elfNN_aarch64_check_relocs. ld/ * testsuite/ld-aarch64/copy-reloc-exe-2.s: New test source file. * testsuite/ld-aarch64/copy-reloc-2.d: New test. * testsuite/ld-aarch64/copy-reloc-exe-eliminate.s: New test source file. * testsuite/ld-aarch64/copy-reloc-eliminate.d: New test. * testsuite/ld-aarch64/copy-reloc-so.s: Define new global objects. * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests.
2017-06-15 17:51:01 +02:00
/* Return true if we need copy relocation against EH. */
static bfd_boolean
need_copy_relocation_p (struct elf_aarch64_link_hash_entry *eh)
{
struct elf_dyn_relocs *p;
asection *s;
ELF: Move dyn_relocs to struct elf_link_hash_entry All ELF backends with shared library support have /* Track dynamic relocs copied for this symbol. */ struct elf_dyn_relocs *dyn_relocs; in symbol hash entry. Move dyn_relocs to struct elf_link_hash_entry to reduce code duplication. PR ld/26067 * elf-bfd.h (elf_link_hash_entry): Add dyn_relocs after size. * elf-s390-common.c (s390_elf_allocate_ifunc_dyn_relocs): Updated. * elf32-arc.c (elf_arc_link_hash_entry): Remove dyn_relocs. (elf_arc_link_hash_newfunc): Updated. * elf32-arm.c (elf32_arm_link_hash_entry): Remove dyn_relocs. (elf32_arm_link_hash_newfunc): Updated. (elf32_arm_copy_indirect_symbol): Likewise. (elf32_arm_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs_for_symbol): Likewise. * elf32-csky.c (csky_elf_link_hash_entry): Remove dyn_relocs. (csky_elf_link_hash_newfunc): Updated. (csky_allocate_dynrelocs): Likewise. (readonly_dynrelocs): Likewise. (csky_elf_copy_indirect_symbol): Likewise. * elf32-hppa.c (elf32_hppa_link_hash_entry): Remove dyn_relocs. (hppa_link_hash_newfunc): Updated. (elf32_hppa_copy_indirect_symbol): Likewise. (elf32_hppa_hide_symbol): Likewise. (elf32_hppa_adjust_dynamic_symbol): Likewise. (allocate_dynrelocs): Likewise. (elf32_hppa_relocate_section): Likewise. * elf32-i386.c (elf_i386_check_relocs): Likewise. * elf32-lm32.c (elf_lm32_link_hash_entry): Removed. (lm32_elf_link_hash_newfunc): Likewise. (lm32_elf_link_hash_table_create): Updated. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. (lm32_elf_copy_indirect_symbol): Likewise. * elf32-m32r.c (elf_m32r_link_hash_entry): Removed. (m32r_elf_link_hash_newfunc): Likewise. (m32r_elf_link_hash_table_create): Updated. (m32r_elf_copy_indirect_symbol): Likewise. (allocate_dynrelocs): Likewise. * elf32-metag.c (elf_metag_link_hash_entry): Remove dyn_relocs. (metag_link_hash_newfunc): Updated. (elf_metag_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elf32-microblaze.c (elf32_mb_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (microblaze_elf_check_relocs): Likewise. (microblaze_elf_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elf32-nds32.c (elf_nds32_link_hash_entry): Remove dyn_relocs. (nds32_elf_link_hash_newfunc): Updated. (nds32_elf_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. (nds32_elf_check_relocs): Likewise. * elf32-nios2.c (elf32_nios2_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (nios2_elf32_copy_indirect_symbol): Likewise. (nios2_elf32_check_relocs): Likewise. (allocate_dynrelocs): Likewise. * elf32-or1k.c (elf_or1k_link_hash_entry): Remove dyn_relocs. (or1k_elf_link_hash_newfunc): Updated. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. (or1k_elf_copy_indirect_symbol): Likewise. * elf32-ppc.c (ppc_elf_link_hash_entry): Remove dyn_relocs. (ppc_elf_link_hash_newfunc): Updated. (ppc_elf_copy_indirect_symbol): Likewise. (ppc_elf_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (ppc_elf_adjust_dynamic_symbol): Likewise. (allocate_dynrelocs): Likewise. (ppc_elf_relocate_section): Likewise. * elf32-s390.c (elf_s390_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (elf_s390_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (elf_s390_adjust_dynamic_symbol): Likewise. (allocate_dynrelocs): Likewise. * elf32-sh.c (elf_sh_link_hash_entry): Remove dyn_relocs. (sh_elf_link_hash_newfunc): Updated. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. (sh_elf_copy_indirect_symbol): Likewise. (sh_elf_check_relocs): Likewise. * elf32-tic6x.c (elf32_tic6x_link_hash_entry): Removed. (elf32_tic6x_link_hash_newfunc): Likewise. (elf32_tic6x_link_hash_table_create): Updated. (readonly_dynrelocs): Likewise. (elf32_tic6x_check_relocs): Likewise. (elf32_tic6x_allocate_dynrelocs): Likewise. * elf32-tilepro.c (tilepro_elf_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (tilepro_elf_copy_indirect_symbol): Likewise. (tilepro_elf_check_relocs): Likewise. (allocate_dynrelocs): Likewise. * elf64-ppc.c (ppc_link_hash_entry): Remove dyn_relocs. (ppc64_elf_copy_indirect_symbol): Updated. (ppc64_elf_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (ppc64_elf_adjust_dynamic_symbol): Likewise. (dec_dynrel_count): Likewise. (allocate_dynrelocs): Likewise. (ppc64_elf_relocate_section): Likewise. * elf64-s390.c (elf_s390_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (elf_s390_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elf64-x86-64.c (elf_x86_64_check_relocs): Likewise. * elfnn-aarch64.c (elf_aarch64_link_hash_entry): Remove dyn_relocs. (elfNN_aarch64_link_hash_newfunc): Updated. (elfNN_aarch64_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (need_copy_relocation_p): Likewise. (elfNN_aarch64_allocate_dynrelocs): Likewise. (elfNN_aarch64_allocate_ifunc_dynrelocs): Likewise. * elfnn-riscv.c (riscv_elf_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (riscv_elf_copy_indirect_symbol): Likewise. (riscv_elf_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (_bfd_sparc_elf_copy_indirect_symbol): Likewise. (_bfd_sparc_elf_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elfxx-tilegx.c (tilegx_elf_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (tilegx_elf_copy_indirect_symbol): Likewise. (tilegx_elf_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elfxx-x86.c (elf_x86_allocate_dynrelocs): Likewise. (readonly_dynrelocs): Likewise. (_bfd_x86_elf_copy_indirect_symbol): Likewise. * elfxx-x86.h (elf_x86_link_hash_entry): Remove dyn_relocs.
2020-06-02 03:18:43 +02:00
for (p = eh->root.dyn_relocs; p != NULL; p = p->next)
[AArch64] Allow COPY relocation elimination As discussed at the PR, this patch tries to avoid COPY relocation generation and propagate the original relocation into runtime if it was relocating on writable section. The ELIMINATE_COPY_RELOCS has been set to true and it's underlying infrastructure has been improved so that the COPY reloc elimination at least working on absoluate relocations (ABS64) on AArch64. BFD linker copy relocation elimination framwork requires the backend to always allocate dynrelocs for all those relocation types that are possible to introduce copy relocations. This is for adjust_dynamic_symbol hook to be able to get all symbol reference information. Should one symbol is referenced by more than one relocations, if there is any of them needs copy relocation then linker should generate it. bfd/ PR ld/21532 * elfnn-aarch64.c (ELIMINATE_COPY_RELOCS): Set to 1. (elfNN_aarch64_final_link_relocate): Also propagate relocations to runtime for if there needs copy relocation elimination. (need_copy_relocation_p): New function. Return true for symbol with pc-relative references and if it's against read-only sections. (elfNN_aarch64_adjust_dynamic_symbol): Use need_copy_relocation_p. (elfNN_aarch64_check_relocs): Allocate dynrelocs for relocation types that are related with accessing external objects. (elfNN_aarch64_gc_sweep_hook): Sync the relocation types with the change in elfNN_aarch64_check_relocs. ld/ * testsuite/ld-aarch64/copy-reloc-exe-2.s: New test source file. * testsuite/ld-aarch64/copy-reloc-2.d: New test. * testsuite/ld-aarch64/copy-reloc-exe-eliminate.s: New test source file. * testsuite/ld-aarch64/copy-reloc-eliminate.d: New test. * testsuite/ld-aarch64/copy-reloc-so.s: Define new global objects. * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests.
2017-06-15 17:51:01 +02:00
{
/* If there is any pc-relative reference, we need to keep copy relocation
to avoid propagating the relocation into runtime that current glibc
does not support. */
if (p->pc_count)
return TRUE;
s = p->sec->output_section;
/* Need copy relocation if it's against read-only section. */
if (s != NULL && (s->flags & SEC_READONLY) != 0)
return TRUE;
}
return FALSE;
}
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* Adjust a symbol defined by a dynamic object and referenced by a
regular object. The current definition is in some section of the
dynamic object, but we're not including those sections. We have to
change the definition to something the rest of the link can
understand. */
static bfd_boolean
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_adjust_dynamic_symbol (struct bfd_link_info *info,
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
struct elf_link_hash_entry *h)
{
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
struct elf_aarch64_link_hash_table *htab;
dynrelro section for read-only dynamic symbols copied into executable Variables defined in shared libraries are copied into an executable's .bss section when code in the executable is non-PIC and thus would require dynamic text relocations to access the variable directly in the shared library. Recent x86 toolchains also copy variables into the executable to gain a small speed improvement. The problem is that if the variable was originally read-only, the copy in .bss is writable, potentially opening a security hole. This patch cures that problem by putting the copy in a section that becomes read-only after ld.so relocation, provided -z relro is in force. The patch also fixes a microblaze linker segfault on attempting to use dynamic bss variables. bfd/ PR ld/20995 * elf-bfd.h (struct elf_link_hash_table): Add sdynrelro and sreldynrelro. (struct elf_backend_data): Add want_dynrelro. * elfxx-target.h (elf_backend_want_dynrelro): Define. (elfNN_bed): Update initializer. * elflink.c (_bfd_elf_create_dynamic_sections): Create sdynrelro and sreldynrelro sections. * elf32-arm.c (elf32_arm_adjust_dynamic_symbol): Place variables copied into the executable from read-only sections into sdynrelro. (elf32_arm_size_dynamic_sections): Handle sdynrelro. (elf32_arm_finish_dynamic_symbol): Select sreldynrelro for dynamic relocs in sdynrelro. (elf_backend_want_dynrelro): Define. * elf32-hppa.c (elf32_hppa_adjust_dynamic_symbol) (elf32_hppa_size_dynamic_sections, elf32_hppa_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf32-i386.c (elf_i386_adjust_dynamic_symbol) (elf_i386_size_dynamic_sections, elf_i386_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf32-metag.c (elf_metag_adjust_dynamic_symbol) (elf_metag_size_dynamic_sections, elf_metag_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf32-microblaze.c (microblaze_elf_adjust_dynamic_symbol) (microblaze_elf_size_dynamic_sections) (microblaze_elf_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf32-nios2.c (nios2_elf32_finish_dynamic_symbol) (nios2_elf32_adjust_dynamic_symbol) (nios2_elf32_size_dynamic_sections) (elf_backend_want_dynrelro): As above. * elf32-or1k.c (or1k_elf_finish_dynamic_symbol) (or1k_elf_adjust_dynamic_symbol, or1k_elf_size_dynamic_sections) (elf_backend_want_dynrelro): As above. * elf32-ppc.c (ppc_elf_adjust_dynamic_symbol) (ppc_elf_size_dynamic_sections, ppc_elf_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf32-s390.c (elf_s390_adjust_dynamic_symbol) (elf_s390_size_dynamic_sections, elf_s390_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf32-tic6x.c (elf32_tic6x_adjust_dynamic_symbol) (elf32_tic6x_size_dynamic_sections) (elf32_tic6x_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf32-tilepro.c (tilepro_elf_adjust_dynamic_symbol) (tilepro_elf_size_dynamic_sections) (tilepro_elf_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf64-ppc.c (ppc64_elf_adjust_dynamic_symbol) (ppc64_elf_size_dynamic_sections, ppc64_elf_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf64-s390.c (elf_s390_adjust_dynamic_symbol) (elf_s390_size_dynamic_sections, elf_s390_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf64-x86-64.c (elf_x86_64_adjust_dynamic_symbol) (elf_x86_64_size_dynamic_sections) (elf_x86_64_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elfnn-aarch64.c (elfNN_aarch64_adjust_dynamic_symbol) (elfNN_aarch64_size_dynamic_sections) (elfNN_aarch64_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elfnn-riscv.c (riscv_elf_adjust_dynamic_symbol) (riscv_elf_size_dynamic_sections, riscv_elf_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elfxx-mips.c (_bfd_mips_elf_adjust_dynamic_symbol) (_bfd_mips_elf_size_dynamic_sections) (_bfd_mips_vxworks_finish_dynamic_symbol): As above. * elfxx-sparc.c (_bfd_sparc_elf_adjust_dynamic_symbol) (_bfd_sparc_elf_size_dynamic_sections) (_bfd_sparc_elf_finish_dynamic_symbol): As above. * elfxx-tilegx.c (tilegx_elf_adjust_dynamic_symbol) (tilegx_elf_size_dynamic_sections) (tilegx_elf_finish_dynamic_symbol): As above. * elf32-mips.c (elf_backend_want_dynrelro): Define. * elf64-mips.c (elf_backend_want_dynrelro): Define. * elf32-sparc.c (elf_backend_want_dynrelro): Define. * elf64-sparc.c (elf_backend_want_dynrelro): Define. * elf32-tilegx.c (elf_backend_want_dynrelro): Define. * elf64-tilegx.c (elf_backend_want_dynrelro): Define. * elf32-microblaze.c (microblaze_elf_adjust_dynamic_symbol): Tidy. (microblaze_elf_size_dynamic_sections): Handle sdynbss. * elf32-nios2.c (nios2_elf32_size_dynamic_sections): Make use of linker shortcuts to dynamic sections rather than comparing names. Correctly set "got" flag. ld/ PR ld/20995 * testsuite/ld-arm/farcall-mixed-app-v5.d: Update to suit changed stub hash table traversal caused by section id increment. Accept the previous output too. * testsuite/ld-arm/farcall-mixed-app.d: Likewise. * testsuite/ld-arm/farcall-mixed-lib-v4t.d: Likewise. * testsuite/ld-arm/farcall-mixed-lib.d: Likewise. * testsuite/ld-elf/pr20995a.s, * testsuite/ld-elf/pr20995b.s, * testsuite/ld-elf/pr20995.r: New test. * testsuite/ld-elf/elf.exp: Run it.
2016-12-25 15:00:45 +01:00
asection *s, *srel;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* If this is a function, put it in the procedure linkage table. We
will fill in the contents of the procedure linkage table later,
when we know the address of the .got section. */
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
if (h->plt.refcount <= 0
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
|| (h->type != STT_GNU_IFUNC
&& (SYMBOL_CALLS_LOCAL (info, h)
|| (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
&& h->root.type == bfd_link_hash_undefweak))))
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
/* This case can occur if we saw a CALL26 reloc in
an input file, but the symbol wasn't referred to
by a dynamic object or all references were
garbage collected. In which case we can end up
resolving. */
h->plt.offset = (bfd_vma) - 1;
h->needs_plt = 0;
}
return TRUE;
}
else
[AArch64] Remove X86-64 comments bfd/ * elfnn-aarch64.c (elfNN_aarch64_adjust_dynamic_symbol): Rewrite comments.
2015-05-18 11:43:43 +02:00
/* Otherwise, reset to -1. */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
h->plt.offset = (bfd_vma) - 1;
/* If this is a weak symbol, and there is a real definition, the
processor independent code will have arranged for us to see the
real definition first, and we can just use the same value. */
Rename u.weakdef and make it a circular list This makes the elf_link_hash_entry weakdef field, currently used to point from a weak symbol to a strong alias, a circular list so that all aliases can be found from any of them. A new flag, is_weakalias, distinguishes the weak symbol from a strong alias, and is used in all places where we currently test u.weakdef != NULL. With the original u.weakdef handling it was possible to have two or more weak symbols pointing via u.weakdef to a strong definition. Obviously that situation can't map to a circular list; One or more of the weak symbols must point at another weak alias rather than the strong definition. To handle that, I've added an accessor function to return the strong definition. * elf-bfd.h (struct elf_link_hash_entry): Add is_weakalias. Rename u.weakdef to u.alias and update comment. (weakdef): New static inline function. * elflink.c (bfd_elf_record_link_assignment) Test is_weakalias rather than u.weakdef != NULL, and use weakdef function. (_bfd_elf_adjust_dynamic_symbol): Likewise. (_bfd_elf_fix_symbol_flags): Likewise. Clear is_weakalias on all aliases if def has been overridden in a regular object, not u.weakdef. (elf_link_add_object_symbols): Delete new_weakdef flag. Test is_weakalias and use weakdef. Set is_weakalias and circular u.alias. Update comments. (_bfd_elf_gc_mark_rsec): Test is_weakalias rather than u.weakdef != NULL and use weakdef function. * elf-m10300.c (_bfd_mn10300_elf_adjust_dynamic_symbol): Test is_weakalias rather than u.weakdef != NULL and use weakdef function. Assert that def is strong defined. * elf32-arc.c (elf_arc_adjust_dynamic_symbol): Likewise. * elf32-arm.c (elf32_arm_adjust_dynamic_symbol): Likewise. * elf32-bfin.c (elf32_bfinfdpic_adjust_dynamic_symbol): Likewise. (bfin_adjust_dynamic_symbol): Likewise. * elf32-cr16.c (_bfd_cr16_elf_adjust_dynamic_symbol): Likewise. * elf32-cris.c (elf_cris_adjust_dynamic_symbol): Likewise. * elf32-frv.c (elf32_frvfdpic_adjust_dynamic_symbol): Likewise. * elf32-hppa.c (elf32_hppa_adjust_dynamic_symbol): Likewise. * elf32-i370.c (i370_elf_adjust_dynamic_symbol): Likewise. * elf32-lm32.c (lm32_elf_adjust_dynamic_symbol): Likewise. * elf32-m32r.c (m32r_elf_adjust_dynamic_symbol): Likewise. * elf32-m68k.c (elf_m68k_adjust_dynamic_symbol): Likewise. * elf32-metag.c (elf_metag_adjust_dynamic_symbol): Likewise. * elf32-microblaze.c (microblaze_elf_adjust_dynamic_symbol): Likewise. * elf32-nds32.c (nds32_elf_adjust_dynamic_symbol): Likewise. * elf32-nios2.c (nios2_elf32_adjust_dynamic_symbol): Likewise. * elf32-or1k.c (or1k_elf_adjust_dynamic_symbol): Likewise. * elf32-ppc.c (ppc_elf_adjust_dynamic_symbol): Likewise. * elf32-s390.c (elf_s390_adjust_dynamic_symbol): Likewise. * elf32-score.c (s3_bfd_score_elf_adjust_dynamic_symbol): Likewise. * elf32-score7.c (s7_bfd_score_elf_adjust_dynamic_symbol): Likewise. * elf32-sh.c (sh_elf_adjust_dynamic_symbol): Likewise. * elf32-tic6x.c (elf32_tic6x_adjust_dynamic_symbol): Likewise. * elf32-tilepro.c (tilepro_elf_gc_mark_hook): Likewise. (tilepro_elf_adjust_dynamic_symbol): Likewise. * elf32-vax.c (elf_vax_adjust_dynamic_symbol): Likewise. * elf32-xtensa.c (elf_xtensa_adjust_dynamic_symbol): Likewise. * elf64-alpha.c (elf64_alpha_adjust_dynamic_symbol): Likewise. * elf64-hppa.c (elf64_hppa_adjust_dynamic_symbol): Likewise. * elf64-ia64-vms.c (elf64_ia64_adjust_dynamic_symbol): Likewise. * elf64-ppc.c (ppc64_elf_gc_mark_hook): Likewise. (ppc64_elf_adjust_dynamic_symbol): Likewise. * elf64-s390.c (elf_s390_adjust_dynamic_symbol): Likewise. * elf64-sh64.c (sh64_elf64_adjust_dynamic_symbol): Likewise. * elfnn-aarch64.c (elfNN_aarch64_adjust_dynamic_symbol): Likewise. * elfnn-ia64.c (elfNN_ia64_adjust_dynamic_symbol): Likewise. * elfnn-riscv.c (riscv_elf_adjust_dynamic_symbol): Likewise. * elfxx-mips.c (_bfd_mips_elf_adjust_dynamic_symbol): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_gc_mark_hook): Likewise. (_bfd_sparc_elf_adjust_dynamic_symbol): Likewise. * elfxx-tilegx.c (tilegx_elf_gc_mark_hook): Likewise. (tilegx_elf_adjust_dynamic_symbol): Likewise. * elfxx-x86.c (_bfd_x86_elf_adjust_dynamic_symbol): Likewise.
2017-11-22 08:00:55 +01:00
if (h->is_weakalias)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
Rename u.weakdef and make it a circular list This makes the elf_link_hash_entry weakdef field, currently used to point from a weak symbol to a strong alias, a circular list so that all aliases can be found from any of them. A new flag, is_weakalias, distinguishes the weak symbol from a strong alias, and is used in all places where we currently test u.weakdef != NULL. With the original u.weakdef handling it was possible to have two or more weak symbols pointing via u.weakdef to a strong definition. Obviously that situation can't map to a circular list; One or more of the weak symbols must point at another weak alias rather than the strong definition. To handle that, I've added an accessor function to return the strong definition. * elf-bfd.h (struct elf_link_hash_entry): Add is_weakalias. Rename u.weakdef to u.alias and update comment. (weakdef): New static inline function. * elflink.c (bfd_elf_record_link_assignment) Test is_weakalias rather than u.weakdef != NULL, and use weakdef function. (_bfd_elf_adjust_dynamic_symbol): Likewise. (_bfd_elf_fix_symbol_flags): Likewise. Clear is_weakalias on all aliases if def has been overridden in a regular object, not u.weakdef. (elf_link_add_object_symbols): Delete new_weakdef flag. Test is_weakalias and use weakdef. Set is_weakalias and circular u.alias. Update comments. (_bfd_elf_gc_mark_rsec): Test is_weakalias rather than u.weakdef != NULL and use weakdef function. * elf-m10300.c (_bfd_mn10300_elf_adjust_dynamic_symbol): Test is_weakalias rather than u.weakdef != NULL and use weakdef function. Assert that def is strong defined. * elf32-arc.c (elf_arc_adjust_dynamic_symbol): Likewise. * elf32-arm.c (elf32_arm_adjust_dynamic_symbol): Likewise. * elf32-bfin.c (elf32_bfinfdpic_adjust_dynamic_symbol): Likewise. (bfin_adjust_dynamic_symbol): Likewise. * elf32-cr16.c (_bfd_cr16_elf_adjust_dynamic_symbol): Likewise. * elf32-cris.c (elf_cris_adjust_dynamic_symbol): Likewise. * elf32-frv.c (elf32_frvfdpic_adjust_dynamic_symbol): Likewise. * elf32-hppa.c (elf32_hppa_adjust_dynamic_symbol): Likewise. * elf32-i370.c (i370_elf_adjust_dynamic_symbol): Likewise. * elf32-lm32.c (lm32_elf_adjust_dynamic_symbol): Likewise. * elf32-m32r.c (m32r_elf_adjust_dynamic_symbol): Likewise. * elf32-m68k.c (elf_m68k_adjust_dynamic_symbol): Likewise. * elf32-metag.c (elf_metag_adjust_dynamic_symbol): Likewise. * elf32-microblaze.c (microblaze_elf_adjust_dynamic_symbol): Likewise. * elf32-nds32.c (nds32_elf_adjust_dynamic_symbol): Likewise. * elf32-nios2.c (nios2_elf32_adjust_dynamic_symbol): Likewise. * elf32-or1k.c (or1k_elf_adjust_dynamic_symbol): Likewise. * elf32-ppc.c (ppc_elf_adjust_dynamic_symbol): Likewise. * elf32-s390.c (elf_s390_adjust_dynamic_symbol): Likewise. * elf32-score.c (s3_bfd_score_elf_adjust_dynamic_symbol): Likewise. * elf32-score7.c (s7_bfd_score_elf_adjust_dynamic_symbol): Likewise. * elf32-sh.c (sh_elf_adjust_dynamic_symbol): Likewise. * elf32-tic6x.c (elf32_tic6x_adjust_dynamic_symbol): Likewise. * elf32-tilepro.c (tilepro_elf_gc_mark_hook): Likewise. (tilepro_elf_adjust_dynamic_symbol): Likewise. * elf32-vax.c (elf_vax_adjust_dynamic_symbol): Likewise. * elf32-xtensa.c (elf_xtensa_adjust_dynamic_symbol): Likewise. * elf64-alpha.c (elf64_alpha_adjust_dynamic_symbol): Likewise. * elf64-hppa.c (elf64_hppa_adjust_dynamic_symbol): Likewise. * elf64-ia64-vms.c (elf64_ia64_adjust_dynamic_symbol): Likewise. * elf64-ppc.c (ppc64_elf_gc_mark_hook): Likewise. (ppc64_elf_adjust_dynamic_symbol): Likewise. * elf64-s390.c (elf_s390_adjust_dynamic_symbol): Likewise. * elf64-sh64.c (sh64_elf64_adjust_dynamic_symbol): Likewise. * elfnn-aarch64.c (elfNN_aarch64_adjust_dynamic_symbol): Likewise. * elfnn-ia64.c (elfNN_ia64_adjust_dynamic_symbol): Likewise. * elfnn-riscv.c (riscv_elf_adjust_dynamic_symbol): Likewise. * elfxx-mips.c (_bfd_mips_elf_adjust_dynamic_symbol): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_gc_mark_hook): Likewise. (_bfd_sparc_elf_adjust_dynamic_symbol): Likewise. * elfxx-tilegx.c (tilegx_elf_gc_mark_hook): Likewise. (tilegx_elf_adjust_dynamic_symbol): Likewise. * elfxx-x86.c (_bfd_x86_elf_adjust_dynamic_symbol): Likewise.
2017-11-22 08:00:55 +01:00
struct elf_link_hash_entry *def = weakdef (h);
BFD_ASSERT (def->root.type == bfd_link_hash_defined);
h->root.u.def.section = def->root.u.def.section;
h->root.u.def.value = def->root.u.def.value;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
if (ELIMINATE_COPY_RELOCS || info->nocopyreloc)
Rename u.weakdef and make it a circular list This makes the elf_link_hash_entry weakdef field, currently used to point from a weak symbol to a strong alias, a circular list so that all aliases can be found from any of them. A new flag, is_weakalias, distinguishes the weak symbol from a strong alias, and is used in all places where we currently test u.weakdef != NULL. With the original u.weakdef handling it was possible to have two or more weak symbols pointing via u.weakdef to a strong definition. Obviously that situation can't map to a circular list; One or more of the weak symbols must point at another weak alias rather than the strong definition. To handle that, I've added an accessor function to return the strong definition. * elf-bfd.h (struct elf_link_hash_entry): Add is_weakalias. Rename u.weakdef to u.alias and update comment. (weakdef): New static inline function. * elflink.c (bfd_elf_record_link_assignment) Test is_weakalias rather than u.weakdef != NULL, and use weakdef function. (_bfd_elf_adjust_dynamic_symbol): Likewise. (_bfd_elf_fix_symbol_flags): Likewise. Clear is_weakalias on all aliases if def has been overridden in a regular object, not u.weakdef. (elf_link_add_object_symbols): Delete new_weakdef flag. Test is_weakalias and use weakdef. Set is_weakalias and circular u.alias. Update comments. (_bfd_elf_gc_mark_rsec): Test is_weakalias rather than u.weakdef != NULL and use weakdef function. * elf-m10300.c (_bfd_mn10300_elf_adjust_dynamic_symbol): Test is_weakalias rather than u.weakdef != NULL and use weakdef function. Assert that def is strong defined. * elf32-arc.c (elf_arc_adjust_dynamic_symbol): Likewise. * elf32-arm.c (elf32_arm_adjust_dynamic_symbol): Likewise. * elf32-bfin.c (elf32_bfinfdpic_adjust_dynamic_symbol): Likewise. (bfin_adjust_dynamic_symbol): Likewise. * elf32-cr16.c (_bfd_cr16_elf_adjust_dynamic_symbol): Likewise. * elf32-cris.c (elf_cris_adjust_dynamic_symbol): Likewise. * elf32-frv.c (elf32_frvfdpic_adjust_dynamic_symbol): Likewise. * elf32-hppa.c (elf32_hppa_adjust_dynamic_symbol): Likewise. * elf32-i370.c (i370_elf_adjust_dynamic_symbol): Likewise. * elf32-lm32.c (lm32_elf_adjust_dynamic_symbol): Likewise. * elf32-m32r.c (m32r_elf_adjust_dynamic_symbol): Likewise. * elf32-m68k.c (elf_m68k_adjust_dynamic_symbol): Likewise. * elf32-metag.c (elf_metag_adjust_dynamic_symbol): Likewise. * elf32-microblaze.c (microblaze_elf_adjust_dynamic_symbol): Likewise. * elf32-nds32.c (nds32_elf_adjust_dynamic_symbol): Likewise. * elf32-nios2.c (nios2_elf32_adjust_dynamic_symbol): Likewise. * elf32-or1k.c (or1k_elf_adjust_dynamic_symbol): Likewise. * elf32-ppc.c (ppc_elf_adjust_dynamic_symbol): Likewise. * elf32-s390.c (elf_s390_adjust_dynamic_symbol): Likewise. * elf32-score.c (s3_bfd_score_elf_adjust_dynamic_symbol): Likewise. * elf32-score7.c (s7_bfd_score_elf_adjust_dynamic_symbol): Likewise. * elf32-sh.c (sh_elf_adjust_dynamic_symbol): Likewise. * elf32-tic6x.c (elf32_tic6x_adjust_dynamic_symbol): Likewise. * elf32-tilepro.c (tilepro_elf_gc_mark_hook): Likewise. (tilepro_elf_adjust_dynamic_symbol): Likewise. * elf32-vax.c (elf_vax_adjust_dynamic_symbol): Likewise. * elf32-xtensa.c (elf_xtensa_adjust_dynamic_symbol): Likewise. * elf64-alpha.c (elf64_alpha_adjust_dynamic_symbol): Likewise. * elf64-hppa.c (elf64_hppa_adjust_dynamic_symbol): Likewise. * elf64-ia64-vms.c (elf64_ia64_adjust_dynamic_symbol): Likewise. * elf64-ppc.c (ppc64_elf_gc_mark_hook): Likewise. (ppc64_elf_adjust_dynamic_symbol): Likewise. * elf64-s390.c (elf_s390_adjust_dynamic_symbol): Likewise. * elf64-sh64.c (sh64_elf64_adjust_dynamic_symbol): Likewise. * elfnn-aarch64.c (elfNN_aarch64_adjust_dynamic_symbol): Likewise. * elfnn-ia64.c (elfNN_ia64_adjust_dynamic_symbol): Likewise. * elfnn-riscv.c (riscv_elf_adjust_dynamic_symbol): Likewise. * elfxx-mips.c (_bfd_mips_elf_adjust_dynamic_symbol): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_gc_mark_hook): Likewise. (_bfd_sparc_elf_adjust_dynamic_symbol): Likewise. * elfxx-tilegx.c (tilegx_elf_gc_mark_hook): Likewise. (tilegx_elf_adjust_dynamic_symbol): Likewise. * elfxx-x86.c (_bfd_x86_elf_adjust_dynamic_symbol): Likewise.
2017-11-22 08:00:55 +01:00
h->non_got_ref = def->non_got_ref;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
return TRUE;
}
/* If we are creating a shared library, we must presume that the
only references to the symbol are via the global offset table.
For such cases we need not do anything here; the relocations will
be handled correctly by relocate_section. */
Add output_type to bfd_link_info The "shared" field in bfd_link_info is set for both DSO and and PIE. There are separate fields for executable and relocatable outputs. This patch adds an "output_type" field: enum output_type { type_unknown = 0, type_executable, type_dll, type_relocatable }; and a "pic" field to bfd_link_info to replace shared, executable and relocatable fields so that we can use the "output_type" field to check for output type and the "pic" field check if output is PIC. Macros, bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie, are provided to check for output features. bfd/ * bfd/aoutx.h: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * bfd/bout.c: Likewise. * bfd/coff-alpha.c: Likewise. * bfd/coff-arm.c: Likewise. * bfd/coff-i386.c: Likewise. * bfd/coff-i960.c: Likewise. * bfd/coff-m68k.c: Likewise. * bfd/coff-mcore.c: Likewise. * bfd/coff-mips.c: Likewise. * bfd/coff-ppc.c: Likewise. * bfd/coff-rs6000.c: Likewise. * bfd/coff-sh.c: Likewise. * bfd/coff-tic80.c: Likewise. * bfd/coff-x86_64.c: Likewise. * bfd/coff64-rs6000.c: Likewise. * bfd/coffgen.c: Likewise. * bfd/cofflink.c: Likewise. * bfd/ecoff.c: Likewise. * bfd/ecofflink.c: Likewise. * bfd/elf-bfd.h: Likewise. * bfd/elf-eh-frame.c: Likewise. * bfd/elf-ifunc.c: Likewise. * bfd/elf-m10200.c: Likewise. * bfd/elf-m10300.c: Likewise. * bfd/elf-s390-common.c: Likewise. * bfd/elf-vxworks.c: Likewise. * bfd/elf.c: Likewise. * bfd/elf32-arm.c: Likewise. * bfd/elf32-avr.c: Likewise. * bfd/elf32-bfin.c: Likewise. * bfd/elf32-cr16.c: Likewise. * bfd/elf32-cr16c.c: Likewise. * bfd/elf32-cris.c: Likewise. * bfd/elf32-crx.c: Likewise. * bfd/elf32-d10v.c: Likewise. * bfd/elf32-dlx.c: Likewise. * bfd/elf32-epiphany.c: Likewise. * bfd/elf32-fr30.c: Likewise. * bfd/elf32-frv.c: Likewise. * bfd/elf32-ft32.c: Likewise. * bfd/elf32-h8300.c: Likewise. * bfd/elf32-hppa.c: Likewise. * bfd/elf32-i370.c: Likewise. * bfd/elf32-i386.c: Likewise. * bfd/elf32-i860.c: Likewise. * bfd/elf32-ip2k.c: Likewise. * bfd/elf32-iq2000.c: Likewise. * bfd/elf32-lm32.c: Likewise. * bfd/elf32-m32c.c: Likewise. * bfd/elf32-m32r.c: Likewise. * bfd/elf32-m68hc11.c: Likewise. * bfd/elf32-m68hc1x.c: Likewise. * bfd/elf32-m68k.c: Likewise. * bfd/elf32-mcore.c: Likewise. * bfd/elf32-mep.c: Likewise. * bfd/elf32-metag.c: Likewise. * bfd/elf32-microblaze.c: Likewise. * bfd/elf32-moxie.c: Likewise. * bfd/elf32-msp430.c: Likewise. * bfd/elf32-mt.c: Likewise. * bfd/elf32-nds32.c: Likewise. * bfd/elf32-nios2.c: Likewise. * bfd/elf32-or1k.c: Likewise. * bfd/elf32-ppc.c: Likewise. * bfd/elf32-rl78.c: Likewise. * bfd/elf32-rx.c: Likewise. * bfd/elf32-s390.c: Likewise. * bfd/elf32-score.c: Likewise. * bfd/elf32-score7.c: Likewise. * bfd/elf32-sh-symbian.c: Likewise. * bfd/elf32-sh.c: Likewise. * bfd/elf32-sh64.c: Likewise. * bfd/elf32-spu.c: Likewise. * bfd/elf32-tic6x.c: Likewise. * bfd/elf32-tilepro.c: Likewise. * bfd/elf32-v850.c: Likewise. * bfd/elf32-vax.c: Likewise. * bfd/elf32-visium.c: Likewise. * bfd/elf32-xc16x.c: Likewise. * bfd/elf32-xstormy16.c: Likewise. * bfd/elf32-xtensa.c: Likewise. * bfd/elf64-alpha.c: Likewise. * bfd/elf64-hppa.c: Likewise. * bfd/elf64-ia64-vms.c: Likewise. * bfd/elf64-mmix.c: Likewise. * bfd/elf64-ppc.c: Likewise. * bfd/elf64-s390.c: Likewise. * bfd/elf64-sh64.c: Likewise. * bfd/elf64-x86-64.c: Likewise. * bfd/elflink.c: Likewise. * bfd/elfnn-aarch64.c: Likewise. * bfd/elfnn-ia64.c: Likewise. * bfd/elfxx-mips.c: Likewise. * bfd/elfxx-sparc.c: Likewise. * bfd/elfxx-tilegx.c: Likewise. * bfd/i386linux.c: Likewise. * bfd/linker.c: Likewise. * bfd/m68klinux.c: Likewise. * bfd/pdp11.c: Likewise. * bfd/pe-mips.c: Likewise. * bfd/peXXigen.c: Likewise. * bfd/reloc.c: Likewise. * bfd/reloc16.c: Likewise. * bfd/sparclinux.c: Likewise. * bfd/sunos.c: Likewise. * bfd/vms-alpha.c: Likewise. * bfd/xcofflink.c: Likewise. include/ * include/bfdlink.h (output_type): New enum. (bfd_link_executable): New macro. (bfd_link_dll): Likewise. (bfd_link_relocatable): Likewise. (bfd_link_pic): Likewise. (bfd_link_pie): Likewise. (bfd_link_info): Remove shared, executable, pie and relocatable. Add output_type and pic. ld/ * ld/ldctor.c: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * ld/ldemul.c: Likewise. * ld/ldfile.c: Likewise. * ld/ldlang.c: Likewise. * ld/ldmain.c: Likewise. * ld/ldwrite.c: Likewise. * ld/lexsup.c: Likewise. * ld/pe-dll.c: Likewise. * ld/plugin.c: Likewise. * ld/emultempl/aarch64elf.em: Likewise. * ld/emultempl/aix.em: Likewise. * ld/emultempl/alphaelf.em: Likewise. * ld/emultempl/armcoff.em: Likewise. * ld/emultempl/armelf.em: Likewise. * ld/emultempl/avrelf.em: Likewise. * ld/emultempl/beos.em: Likewise. * ld/emultempl/cr16elf.em: Likewise. * ld/emultempl/elf-generic.em: Likewise. * ld/emultempl/elf32.em: Likewise. * ld/emultempl/genelf.em: Likewise. * ld/emultempl/generic.em: Likewise. * ld/emultempl/gld960.em: Likewise. * ld/emultempl/gld960c.em: Likewise. * ld/emultempl/hppaelf.em: Likewise. * ld/emultempl/irix.em: Likewise. * ld/emultempl/linux.em: Likewise. * ld/emultempl/lnk960.em: Likewise. * ld/emultempl/m68hc1xelf.em: Likewise. * ld/emultempl/m68kcoff.em: Likewise. * ld/emultempl/m68kelf.em: Likewise. * ld/emultempl/metagelf.em: Likewise. * ld/emultempl/mipself.em: Likewise. * ld/emultempl/mmo.em: Likewise. * ld/emultempl/msp430.em: Likewise. * ld/emultempl/nds32elf.em: Likewise. * ld/emultempl/needrelax.em: Likewise. * ld/emultempl/nios2elf.em: Likewise. * ld/emultempl/pe.em: Likewise. * ld/emultempl/pep.em: Likewise. * ld/emultempl/ppc32elf.em: Likewise. * ld/emultempl/ppc64elf.em: Likewise. * ld/emultempl/sh64elf.em: Likewise. * ld/emultempl/solaris2.em: Likewise. * ld/emultempl/spuelf.em: Likewise. * ld/emultempl/sunos.em: Likewise. * ld/emultempl/tic6xdsbt.em: Likewise. * ld/emultempl/ticoff.em: Likewise. * ld/emultempl/v850elf.em: Likewise. * ld/emultempl/vms.em: Likewise. * ld/emultempl/vxworks.em: Likewise.
2015-08-18 14:51:03 +02:00
if (bfd_link_pic (info))
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
return TRUE;
/* If there are no references to this symbol that do not use the
GOT, we don't need to generate a copy reloc. */
if (!h->non_got_ref)
return TRUE;
/* If -z nocopyreloc was given, we won't generate them either. */
if (info->nocopyreloc)
{
h->non_got_ref = 0;
return TRUE;
}
[AArch64] Allow COPY relocation elimination As discussed at the PR, this patch tries to avoid COPY relocation generation and propagate the original relocation into runtime if it was relocating on writable section. The ELIMINATE_COPY_RELOCS has been set to true and it's underlying infrastructure has been improved so that the COPY reloc elimination at least working on absoluate relocations (ABS64) on AArch64. BFD linker copy relocation elimination framwork requires the backend to always allocate dynrelocs for all those relocation types that are possible to introduce copy relocations. This is for adjust_dynamic_symbol hook to be able to get all symbol reference information. Should one symbol is referenced by more than one relocations, if there is any of them needs copy relocation then linker should generate it. bfd/ PR ld/21532 * elfnn-aarch64.c (ELIMINATE_COPY_RELOCS): Set to 1. (elfNN_aarch64_final_link_relocate): Also propagate relocations to runtime for if there needs copy relocation elimination. (need_copy_relocation_p): New function. Return true for symbol with pc-relative references and if it's against read-only sections. (elfNN_aarch64_adjust_dynamic_symbol): Use need_copy_relocation_p. (elfNN_aarch64_check_relocs): Allocate dynrelocs for relocation types that are related with accessing external objects. (elfNN_aarch64_gc_sweep_hook): Sync the relocation types with the change in elfNN_aarch64_check_relocs. ld/ * testsuite/ld-aarch64/copy-reloc-exe-2.s: New test source file. * testsuite/ld-aarch64/copy-reloc-2.d: New test. * testsuite/ld-aarch64/copy-reloc-exe-eliminate.s: New test source file. * testsuite/ld-aarch64/copy-reloc-eliminate.d: New test. * testsuite/ld-aarch64/copy-reloc-so.s: Define new global objects. * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests.
2017-06-15 17:51:01 +02:00
if (ELIMINATE_COPY_RELOCS)
{
struct elf_aarch64_link_hash_entry *eh;
Comment tidy Past tense is wrong for a comment before some action. * elf32-ppc.c (ppc_elf_adjust_dynamic_symbol): Comment tidy. * elf64-ppc.c (ppc64_elf_adjust_dynamic_symbol): Likewise. * elfnn-aarch64.c (elfNN_aarch64_adjust_dynamic_symbol): Likewise.
2017-12-05 00:35:19 +01:00
/* If we don't find any dynamic relocs in read-only sections, then
[AArch64] Allow COPY relocation elimination As discussed at the PR, this patch tries to avoid COPY relocation generation and propagate the original relocation into runtime if it was relocating on writable section. The ELIMINATE_COPY_RELOCS has been set to true and it's underlying infrastructure has been improved so that the COPY reloc elimination at least working on absoluate relocations (ABS64) on AArch64. BFD linker copy relocation elimination framwork requires the backend to always allocate dynrelocs for all those relocation types that are possible to introduce copy relocations. This is for adjust_dynamic_symbol hook to be able to get all symbol reference information. Should one symbol is referenced by more than one relocations, if there is any of them needs copy relocation then linker should generate it. bfd/ PR ld/21532 * elfnn-aarch64.c (ELIMINATE_COPY_RELOCS): Set to 1. (elfNN_aarch64_final_link_relocate): Also propagate relocations to runtime for if there needs copy relocation elimination. (need_copy_relocation_p): New function. Return true for symbol with pc-relative references and if it's against read-only sections. (elfNN_aarch64_adjust_dynamic_symbol): Use need_copy_relocation_p. (elfNN_aarch64_check_relocs): Allocate dynrelocs for relocation types that are related with accessing external objects. (elfNN_aarch64_gc_sweep_hook): Sync the relocation types with the change in elfNN_aarch64_check_relocs. ld/ * testsuite/ld-aarch64/copy-reloc-exe-2.s: New test source file. * testsuite/ld-aarch64/copy-reloc-2.d: New test. * testsuite/ld-aarch64/copy-reloc-exe-eliminate.s: New test source file. * testsuite/ld-aarch64/copy-reloc-eliminate.d: New test. * testsuite/ld-aarch64/copy-reloc-so.s: Define new global objects. * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests.
2017-06-15 17:51:01 +02:00
we'll be keeping the dynamic relocs and avoiding the copy reloc. */
eh = (struct elf_aarch64_link_hash_entry *) h;
if (!need_copy_relocation_p (eh))
{
h->non_got_ref = 0;
return TRUE;
}
}
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* We must allocate the symbol in our .dynbss section, which will
become part of the .bss section of the executable. There will be
an entry for this symbol in the .dynsym section. The dynamic
object will contain position independent code, so all references
from the dynamic object to this symbol will go through the global
offset table. The dynamic linker will use the .dynsym entry to
determine the address it must put in the global offset table, so
both the dynamic object and the regular object will refer to the
same memory location for the variable. */
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
htab = elf_aarch64_hash_table (info);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* We must generate a R_AARCH64_COPY reloc to tell the dynamic linker
to copy the initial value out of the dynamic object and into the
runtime process image. */
dynrelro section for read-only dynamic symbols copied into executable Variables defined in shared libraries are copied into an executable's .bss section when code in the executable is non-PIC and thus would require dynamic text relocations to access the variable directly in the shared library. Recent x86 toolchains also copy variables into the executable to gain a small speed improvement. The problem is that if the variable was originally read-only, the copy in .bss is writable, potentially opening a security hole. This patch cures that problem by putting the copy in a section that becomes read-only after ld.so relocation, provided -z relro is in force. The patch also fixes a microblaze linker segfault on attempting to use dynamic bss variables. bfd/ PR ld/20995 * elf-bfd.h (struct elf_link_hash_table): Add sdynrelro and sreldynrelro. (struct elf_backend_data): Add want_dynrelro. * elfxx-target.h (elf_backend_want_dynrelro): Define. (elfNN_bed): Update initializer. * elflink.c (_bfd_elf_create_dynamic_sections): Create sdynrelro and sreldynrelro sections. * elf32-arm.c (elf32_arm_adjust_dynamic_symbol): Place variables copied into the executable from read-only sections into sdynrelro. (elf32_arm_size_dynamic_sections): Handle sdynrelro. (elf32_arm_finish_dynamic_symbol): Select sreldynrelro for dynamic relocs in sdynrelro. (elf_backend_want_dynrelro): Define. * elf32-hppa.c (elf32_hppa_adjust_dynamic_symbol) (elf32_hppa_size_dynamic_sections, elf32_hppa_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf32-i386.c (elf_i386_adjust_dynamic_symbol) (elf_i386_size_dynamic_sections, elf_i386_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf32-metag.c (elf_metag_adjust_dynamic_symbol) (elf_metag_size_dynamic_sections, elf_metag_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf32-microblaze.c (microblaze_elf_adjust_dynamic_symbol) (microblaze_elf_size_dynamic_sections) (microblaze_elf_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf32-nios2.c (nios2_elf32_finish_dynamic_symbol) (nios2_elf32_adjust_dynamic_symbol) (nios2_elf32_size_dynamic_sections) (elf_backend_want_dynrelro): As above. * elf32-or1k.c (or1k_elf_finish_dynamic_symbol) (or1k_elf_adjust_dynamic_symbol, or1k_elf_size_dynamic_sections) (elf_backend_want_dynrelro): As above. * elf32-ppc.c (ppc_elf_adjust_dynamic_symbol) (ppc_elf_size_dynamic_sections, ppc_elf_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf32-s390.c (elf_s390_adjust_dynamic_symbol) (elf_s390_size_dynamic_sections, elf_s390_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf32-tic6x.c (elf32_tic6x_adjust_dynamic_symbol) (elf32_tic6x_size_dynamic_sections) (elf32_tic6x_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf32-tilepro.c (tilepro_elf_adjust_dynamic_symbol) (tilepro_elf_size_dynamic_sections) (tilepro_elf_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf64-ppc.c (ppc64_elf_adjust_dynamic_symbol) (ppc64_elf_size_dynamic_sections, ppc64_elf_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf64-s390.c (elf_s390_adjust_dynamic_symbol) (elf_s390_size_dynamic_sections, elf_s390_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf64-x86-64.c (elf_x86_64_adjust_dynamic_symbol) (elf_x86_64_size_dynamic_sections) (elf_x86_64_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elfnn-aarch64.c (elfNN_aarch64_adjust_dynamic_symbol) (elfNN_aarch64_size_dynamic_sections) (elfNN_aarch64_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elfnn-riscv.c (riscv_elf_adjust_dynamic_symbol) (riscv_elf_size_dynamic_sections, riscv_elf_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elfxx-mips.c (_bfd_mips_elf_adjust_dynamic_symbol) (_bfd_mips_elf_size_dynamic_sections) (_bfd_mips_vxworks_finish_dynamic_symbol): As above. * elfxx-sparc.c (_bfd_sparc_elf_adjust_dynamic_symbol) (_bfd_sparc_elf_size_dynamic_sections) (_bfd_sparc_elf_finish_dynamic_symbol): As above. * elfxx-tilegx.c (tilegx_elf_adjust_dynamic_symbol) (tilegx_elf_size_dynamic_sections) (tilegx_elf_finish_dynamic_symbol): As above. * elf32-mips.c (elf_backend_want_dynrelro): Define. * elf64-mips.c (elf_backend_want_dynrelro): Define. * elf32-sparc.c (elf_backend_want_dynrelro): Define. * elf64-sparc.c (elf_backend_want_dynrelro): Define. * elf32-tilegx.c (elf_backend_want_dynrelro): Define. * elf64-tilegx.c (elf_backend_want_dynrelro): Define. * elf32-microblaze.c (microblaze_elf_adjust_dynamic_symbol): Tidy. (microblaze_elf_size_dynamic_sections): Handle sdynbss. * elf32-nios2.c (nios2_elf32_size_dynamic_sections): Make use of linker shortcuts to dynamic sections rather than comparing names. Correctly set "got" flag. ld/ PR ld/20995 * testsuite/ld-arm/farcall-mixed-app-v5.d: Update to suit changed stub hash table traversal caused by section id increment. Accept the previous output too. * testsuite/ld-arm/farcall-mixed-app.d: Likewise. * testsuite/ld-arm/farcall-mixed-lib-v4t.d: Likewise. * testsuite/ld-arm/farcall-mixed-lib.d: Likewise. * testsuite/ld-elf/pr20995a.s, * testsuite/ld-elf/pr20995b.s, * testsuite/ld-elf/pr20995.r: New test. * testsuite/ld-elf/elf.exp: Run it.
2016-12-25 15:00:45 +01:00
if ((h->root.u.def.section->flags & SEC_READONLY) != 0)
{
s = htab->root.sdynrelro;
srel = htab->root.sreldynrelro;
}
else
{
s = htab->root.sdynbss;
srel = htab->root.srelbss;
}
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
if ((h->root.u.def.section->flags & SEC_ALLOC) != 0 && h->size != 0)
{
dynrelro section for read-only dynamic symbols copied into executable Variables defined in shared libraries are copied into an executable's .bss section when code in the executable is non-PIC and thus would require dynamic text relocations to access the variable directly in the shared library. Recent x86 toolchains also copy variables into the executable to gain a small speed improvement. The problem is that if the variable was originally read-only, the copy in .bss is writable, potentially opening a security hole. This patch cures that problem by putting the copy in a section that becomes read-only after ld.so relocation, provided -z relro is in force. The patch also fixes a microblaze linker segfault on attempting to use dynamic bss variables. bfd/ PR ld/20995 * elf-bfd.h (struct elf_link_hash_table): Add sdynrelro and sreldynrelro. (struct elf_backend_data): Add want_dynrelro. * elfxx-target.h (elf_backend_want_dynrelro): Define. (elfNN_bed): Update initializer. * elflink.c (_bfd_elf_create_dynamic_sections): Create sdynrelro and sreldynrelro sections. * elf32-arm.c (elf32_arm_adjust_dynamic_symbol): Place variables copied into the executable from read-only sections into sdynrelro. (elf32_arm_size_dynamic_sections): Handle sdynrelro. (elf32_arm_finish_dynamic_symbol): Select sreldynrelro for dynamic relocs in sdynrelro. (elf_backend_want_dynrelro): Define. * elf32-hppa.c (elf32_hppa_adjust_dynamic_symbol) (elf32_hppa_size_dynamic_sections, elf32_hppa_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf32-i386.c (elf_i386_adjust_dynamic_symbol) (elf_i386_size_dynamic_sections, elf_i386_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf32-metag.c (elf_metag_adjust_dynamic_symbol) (elf_metag_size_dynamic_sections, elf_metag_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf32-microblaze.c (microblaze_elf_adjust_dynamic_symbol) (microblaze_elf_size_dynamic_sections) (microblaze_elf_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf32-nios2.c (nios2_elf32_finish_dynamic_symbol) (nios2_elf32_adjust_dynamic_symbol) (nios2_elf32_size_dynamic_sections) (elf_backend_want_dynrelro): As above. * elf32-or1k.c (or1k_elf_finish_dynamic_symbol) (or1k_elf_adjust_dynamic_symbol, or1k_elf_size_dynamic_sections) (elf_backend_want_dynrelro): As above. * elf32-ppc.c (ppc_elf_adjust_dynamic_symbol) (ppc_elf_size_dynamic_sections, ppc_elf_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf32-s390.c (elf_s390_adjust_dynamic_symbol) (elf_s390_size_dynamic_sections, elf_s390_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf32-tic6x.c (elf32_tic6x_adjust_dynamic_symbol) (elf32_tic6x_size_dynamic_sections) (elf32_tic6x_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf32-tilepro.c (tilepro_elf_adjust_dynamic_symbol) (tilepro_elf_size_dynamic_sections) (tilepro_elf_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf64-ppc.c (ppc64_elf_adjust_dynamic_symbol) (ppc64_elf_size_dynamic_sections, ppc64_elf_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf64-s390.c (elf_s390_adjust_dynamic_symbol) (elf_s390_size_dynamic_sections, elf_s390_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf64-x86-64.c (elf_x86_64_adjust_dynamic_symbol) (elf_x86_64_size_dynamic_sections) (elf_x86_64_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elfnn-aarch64.c (elfNN_aarch64_adjust_dynamic_symbol) (elfNN_aarch64_size_dynamic_sections) (elfNN_aarch64_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elfnn-riscv.c (riscv_elf_adjust_dynamic_symbol) (riscv_elf_size_dynamic_sections, riscv_elf_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elfxx-mips.c (_bfd_mips_elf_adjust_dynamic_symbol) (_bfd_mips_elf_size_dynamic_sections) (_bfd_mips_vxworks_finish_dynamic_symbol): As above. * elfxx-sparc.c (_bfd_sparc_elf_adjust_dynamic_symbol) (_bfd_sparc_elf_size_dynamic_sections) (_bfd_sparc_elf_finish_dynamic_symbol): As above. * elfxx-tilegx.c (tilegx_elf_adjust_dynamic_symbol) (tilegx_elf_size_dynamic_sections) (tilegx_elf_finish_dynamic_symbol): As above. * elf32-mips.c (elf_backend_want_dynrelro): Define. * elf64-mips.c (elf_backend_want_dynrelro): Define. * elf32-sparc.c (elf_backend_want_dynrelro): Define. * elf64-sparc.c (elf_backend_want_dynrelro): Define. * elf32-tilegx.c (elf_backend_want_dynrelro): Define. * elf64-tilegx.c (elf_backend_want_dynrelro): Define. * elf32-microblaze.c (microblaze_elf_adjust_dynamic_symbol): Tidy. (microblaze_elf_size_dynamic_sections): Handle sdynbss. * elf32-nios2.c (nios2_elf32_size_dynamic_sections): Make use of linker shortcuts to dynamic sections rather than comparing names. Correctly set "got" flag. ld/ PR ld/20995 * testsuite/ld-arm/farcall-mixed-app-v5.d: Update to suit changed stub hash table traversal caused by section id increment. Accept the previous output too. * testsuite/ld-arm/farcall-mixed-app.d: Likewise. * testsuite/ld-arm/farcall-mixed-lib-v4t.d: Likewise. * testsuite/ld-arm/farcall-mixed-lib.d: Likewise. * testsuite/ld-elf/pr20995a.s, * testsuite/ld-elf/pr20995b.s, * testsuite/ld-elf/pr20995.r: New test. * testsuite/ld-elf/elf.exp: Run it.
2016-12-25 15:00:45 +01:00
srel->size += RELOC_SIZE (htab);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
h->needs_copy = 1;
}
Copy relocations against protected symbols Copy relocs are used in a scheme to avoid dynamic text relocations in non-PIC executables that refer to variables defined in shared libraries. The idea is to have the linker define any such variable in the executable, with a copy reloc copying the initial value, then have both the executable and shared library refer to the executable copy. If the shared library defines the variable as protected then we have two copies of the variable being used. PR 15228 * elflink.c (_bfd_elf_adjust_dynamic_copy): Add "info" param. Error on copy relocs against protected symbols. (elf_merge_st_other): Set h->protected_def. * elf-bfd.h (struct elf_link_hash_entry): Add "protected_def". (_bfd_elf_adjust_dynamic_copy): Update prototype. * elf-m10300.c (_bfd_mn10300_elf_adjust_dynamic_symbol): Update _bfd_elf_adjust_dynamic_copy call. * elf32-arm.c (elf32_arm_adjust_dynamic_symbol): Likewise. * elf32-cr16.c (_bfd_cr16_elf_adjust_dynamic_symbol): Likewise. * elf32-cris.c (elf_cris_adjust_dynamic_symbol): Likewise. * elf32-hppa.c (elf32_hppa_adjust_dynamic_symbol): Likewise. * elf32-i370.c (i370_elf_adjust_dynamic_symbol): Likewise. * elf32-i386.c (elf_i386_adjust_dynamic_symbol): Likewise. * elf32-lm32.c (lm32_elf_adjust_dynamic_symbol): Likewise. * elf32-m32r.c (m32r_elf_adjust_dynamic_symbol): Likewise. * elf32-m68k.c (elf_m68k_adjust_dynamic_symbol): Likewise. * elf32-metag.c (elf_metag_adjust_dynamic_symbol): Likewise. * elf32-or1k.c (or1k_elf_adjust_dynamic_symbol): Likewise. * elf32-ppc.c (ppc_elf_adjust_dynamic_symbol): Likewise. * elf32-s390.c (elf_s390_adjust_dynamic_symbol): Likewise. * elf32-sh.c (sh_elf_adjust_dynamic_symbol): Likewise. * elf32-tic6x.c (elf32_tic6x_adjust_dynamic_symbol): Likewise. * elf32-tilepro.c (tilepro_elf_adjust_dynamic_symbol): Likewise. * elf32-vax.c (elf_vax_adjust_dynamic_symbol): Likewise. * elf64-ppc.c (ppc64_elf_adjust_dynamic_symbol): Likewise. * elf64-s390.c (elf_s390_adjust_dynamic_symbol): Likewise. * elf64-sh64.c (sh64_elf64_adjust_dynamic_symbol): Likewise. * elf64-x86-64.c (elf_x86_64_adjust_dynamic_symbol): Likewise. * elfnn-aarch64.c (elfNN_aarch64_adjust_dynamic_symbol): Likewise. * elfxx-mips.c (_bfd_mips_elf_adjust_dynamic_symbol): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_adjust_dynamic_symbol): Likewise. * elfxx-tilegx.c (tilegx_elf_adjust_dynamic_symbol): Likewise.
2014-12-12 13:23:46 +01:00
return _bfd_elf_adjust_dynamic_copy (info, h, s);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
}
static bfd_boolean
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_allocate_local_symbols (bfd *abfd, unsigned number)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
struct elf_aarch64_local_symbol *locals;
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
locals = elf_aarch64_locals (abfd);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
if (locals == NULL)
{
locals = (struct elf_aarch64_local_symbol *)
bfd_zalloc (abfd, number * sizeof (struct elf_aarch64_local_symbol));
if (locals == NULL)
return FALSE;
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elf_aarch64_locals (abfd) = locals;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
}
return TRUE;
}
[AArch64] Fix creation of .got and placement of _GLOBAL_OFFSET_TABLE_
2013-07-02 08:39:26 +02:00
/* Create the .got section to hold the global offset table. */
static bfd_boolean
aarch64_elf_create_got_section (bfd *abfd, struct bfd_link_info *info)
{
const struct elf_backend_data *bed = get_elf_backend_data (abfd);
flagword flags;
asection *s;
struct elf_link_hash_entry *h;
struct elf_link_hash_table *htab = elf_hash_table (info);
/* This function may be called more than once. */
Delete duplicate target short-cuts to dynamic sections We'd like to have the elf_link_hash_table srelplt field rather than some private target field used to save short-cuts to a PLT relocation section. This save a little space but mainly is so that the generic ELF code can access the field. Ditto for other dynamic sections. * elf-m10300.c (mn10300_elf_check_relocs): Use elf htab shortcuts to dynamic sections. (mn10300_elf_final_link_relocate): Likewise. (_bfd_mn10300_elf_adjust_dynamic_symbol): Likewise. (_bfd_mn10300_elf_size_dynamic_sections): Likewise. (_bfd_mn10300_elf_finish_dynamic_symbol): Likewise. (_bfd_mn10300_elf_finish_dynamic_sections): Likewise. * elf32-bfin.c (bfin_check_relocs): Likewise. (bfin_relocate_section): Likewise. (bfin_gc_sweep_hook): Likewise. (struct bfinfdpic_elf_link_hash_table): Delete sgot, sgotrel, splt and spltrel. (bfinfdpic_got_section, bfinfdpic_gotrel_section, bfinfdpic_plt_section, bfinfdpic_pltrel_section): Define using elf shortcut sections. (_bfin_create_got_section): Use elf htab shortcuts to dyn sections. Delete dead code. (bfin_finish_dynamic_symbol): Use elf htab shortcuts to dyn sections. (bfin_size_dynamic_sections): Likewise. * elf32-cr16.c (_bfd_cr16_elf_create_got_section): Likewise. (cr16_elf_check_relocs): Likewise. (cr16_elf_final_link_relocate): Likewise. (_bfd_cr16_elf_create_dynamic_sections): Likewise. (_bfd_cr16_elf_adjust_dynamic_symbol): Likewise. (_bfd_cr16_elf_size_dynamic_sections): Likewise. (_bfd_cr16_elf_finish_dynamic_symbol): Likewise. (_bfd_cr16_elf_finish_dynamic_sections): Likewise. * elf32-cris.c (cris_elf_relocate_section): Likewise. (elf_cris_finish_dynamic_symbol): Likewise. (elf_cris_finish_dynamic_sections): Likewise. (cris_elf_gc_sweep_hook): Likewise. (elf_cris_adjust_gotplt_to_got): Likewise. (elf_cris_adjust_dynamic_symbol): Likewise. (cris_elf_check_relocs): Likewise. Delete dead code. (elf_cris_size_dynamic_sections): Use elf htab shortcuts to dynamic sections. (elf_cris_discard_excess_program_dynamics): Likewise. * elf32-frv.c (struct frvfdpic_elf_link_hash_table): Delete sgot, sgotrel, splt and spltrel. (frvfdpic_got_section, frvfdpic_gotrel_section, frvfdpic_plt_section, frvfdpic_pltrel_section): Define using elf shortcut sections. (_frv_create_got_section): Likewise. * elf32-hppa.c (struct elf32_hppa_link_hash_table): Delete sgot, srelgot, splt and srelplt. (hppa_build_one_stub): Use elf htab shortcuts to dynamic sections. (elf32_hppa_create_dynamic_sections): Likewise. (elf32_hppa_check_relocs): Likewise. (allocate_plt_static): Likewise. (allocate_dynrelocs): Likewise. (elf32_hppa_size_dynamic_sections): Likewise. (elf32_hppa_relocate_section): Likewise. (elf32_hppa_finish_dynamic_symbol): Likewise. (elf32_hppa_finish_dynamic_sections): Likewise. * elf32-i370.c (i370_elf_finish_dynamic_sections): Likewise. * elf32-lm32.c (struct elf_lm32_link_hash_table): Delete sgot, sgotplt, srelgot, splt and srelplt. (lm32fdpic_got_section, lm32fdpic_gotrel_section): Define using elf shortcut sections. (create_got_section): Delete. Use _bfd_elf_create_got_section instead. (lm32_elf_relocate_section): Use elf htab shortcuts to dyn sections. (lm32_elf_check_relocs): Likewise. (lm32_elf_finish_dynamic_sections): Likewise. (lm32_elf_finish_dynamic_symbol): Likewise. (allocate_dynrelocs): Likewise. (lm32_elf_size_dynamic_sections): Likewise. (lm32_elf_create_dynamic_sections): Likewise. * elf32-m32c.c (m32c_elf_relocate_section): Likewise. (m32c_elf_check_relocs): Likewise. (m32c_elf_finish_dynamic_sections): Likewise. (m32c_elf_always_size_sections): Likewise. * elf32-m32r.c (struct elf_m32r_link_hash_table): Delete sgot, sgotplt, srelgot, splt and srelplt. (create_got_section): Delete. Use _bfd_elf_create_got_section instead. (m32r_elf_create_dynamic_sections): Use elf htab shortcuts to dynamic sections. (allocate_dynrelocs): Likewise. (m32r_elf_size_dynamic_sections): Likewise. (m32r_elf_relocate_section): Likewise. (m32r_elf_finish_dynamic_symbol): Likewise. (m32r_elf_finish_dynamic_sections): Likewise. (m32r_elf_check_relocs): Likewise. * elf32-m68k.c (elf_m68k_partition_multi_got): Likewise. (elf_m68k_check_relocs): Likewise. (elf_m68k_adjust_dynamic_symbol): Likewise. (elf_m68k_size_dynamic_sections): Likewise. (elf_m68k_relocate_section): Likewise. (elf_m68k_finish_dynamic_symbol): Likewise. (elf_m68k_finish_dynamic_sections): Likewise. * elf32-metag.c (struct elf_metag_link_hash_table): Delete sgot, sgotplt, srelgot, splt and srelplt. (elf_metag_relocate_section): Use elf htab shortcuts to dynamic sections. (elf_metag_create_dynamic_sections): Likewise. Allocate got header here in .got. (elf_metag_check_relocs): Use elf htab shortcuts to dynamic sections. (allocate_dynrelocs): Likewise. (elf_metag_size_dynamic_sections): Likewise. (elf_metag_finish_dynamic_symbol): Likewise. (elf_metag_finish_dynamic_sections): Likewise. (elf_metag_size_stubs): Likewise. (elf_backend_got_header_size): Don't define. (elf_backend_want_got_plt): Define. * elf32-microblaze.c (struct elf32_mb_link_hash_table): Delete sgot, sgotplt, srelgot, splt and srelpl. (microblaze_elf_relocate_section): Use elf htab shortcuts to dynamic sections. (create_got_section): Delete. Use _bfd_elf_create_got_section instead. (microblaze_elf_check_relocs): Use elf htab shortcuts to dyn sections. (microblaze_elf_create_dynamic_sections): Likewise. (allocate_dynrelocs): Likewise. (microblaze_elf_size_dynamic_sections): Likewise. (microblaze_elf_finish_dynamic_symbol): Likewise. (microblaze_elf_finish_dynamic_sections): Likewise. * elf32-nds32.c (nds32_elf_link_hash_table_create): Don't NULL already zero fields. (create_got_section): Delete. Use _bfd_elf_create_got_section instead. (nds32_elf_create_dynamic_sections): Use elf htab shortcuts to dynamic sections. (allocate_dynrelocs): Likewise. (nds32_elf_size_dynamic_sections): Likewise. (nds32_elf_relocate_section): Likewise. (nds32_elf_finish_dynamic_symbol): Likewise. (nds32_elf_finish_dynamic_sections): Likewise. (nds32_elf_check_relocs): Likewise. (calculate_plt_memory_address): Likewise. (calculate_got_memory_address): Likewise. * elf32-nds32.h (struct elf_nds32_link_hash_table): Delete sgot, sgotplt, srelgot, splt and srelplt. * elf32-or1k.c (struct elf_or1k_link_hash_table): Likewise. (or1k_elf_relocate_section): Use elf htab shortcuts to dyn sections. (create_got_section): Delete. Use _bfd_elf_create_got_section instead. (or1k_elf_check_relocs): Use elf htab shortcuts to dynamic sections. (or1k_elf_finish_dynamic_sections): Likewise. (or1k_elf_finish_dynamic_symbol): Likewise. (allocate_dynrelocs): Likewise. (or1k_elf_size_dynamic_sections): Likewise. (or1k_elf_create_dynamic_sections): Likewise. * elf32-ppc.c (struct ppc_elf_link_hash_table): Delete got, relgot, plt, relplt, iplt, reliplt and sgotplt. (ppc_elf_create_got): Use elf htab shortcuts to dynamic sections. (ppc_elf_create_glink): Likewise. (ppc_elf_create_dynamic_sections): Likewise. (ppc_elf_check_relocs): Likewise. (ppc_elf_select_plt_layout): Likewise. (ppc_elf_tls_setup): Likewise. (allocate_got): Likewise. (allocate_dynrelocs): Likewise. (ppc_elf_size_dynamic_sections): Likewise. (ppc_elf_relax_section): Likewise. (ppc_elf_relocate_section): Likewise. (ppc_elf_finish_dynamic_symbol): Likewise. (ppc_elf_reloc_type_class): Likewise. (ppc_elf_finish_dynamic_sections): Likewise. * elf32-rl78.c (rl78_elf_relocate_section): Likewise. (rl78_elf_check_relocs): Likewise. (rl78_elf_finish_dynamic_sections): Likewise. (rl78_elf_always_size_sections): Likewise. * elf32-s390.c (create_got_section): Delete. (elf_s390_create_dynamic_sections): Use _bfd_elf_create_got_section. (elf_s390_check_relocs): Likewise. * elf32-score.c (score_elf_create_got_section): Set elf shortcuts. (s3_bfd_score_elf_finish_dynamic_sections): Use elf shortcuts. * elf32-score7.c (score_elf_create_got_section): As above. (s7_bfd_score_elf_finish_dynamic_sections): As above. * elf32-sh.c (struct elf_sh_link_hash_table): Delete sgot, sgotplt, srelgot, splt and srelplt. (create_got_section): Don't set them. (sh_elf_create_dynamic_sections): Use elf htab shortcuts to dynamic sections. (allocate_dynrelocs): Likewise. (sh_elf_size_dynamic_sections): Likewise. (sh_elf_add_rofixup): Likewise. (sh_elf_relocate_section): Likewise. (sh_elf_check_relocs): Likewise. (sh_elf_finish_dynamic_symbol): Likewise. (sh_elf_finish_dynamic_sections): Likewise. * elf32-tic6x.c (elf32_tic6x_finish_dynamic_symbol): Likewise. * elf32-tilepro.c (tilepro_elf_create_got_section): Likewise. * elf32-vax.c (elf_vax_check_relocs): Likewise. (elf_vax_adjust_dynamic_symbol): Likewise. (elf_vax_always_size_sections): Likewise. (elf_vax_instantiate_got_entries): Likewise. (elf_vax_relocate_section): Likewise. (elf_vax_finish_dynamic_symbol): Likewise. (elf_vax_finish_dynamic_sections): Likewise. * elf32-xstormy16.c (xstormy16_elf_check_relocs): Likewise. (xstormy16_elf_always_size_sections): Likewise. (xstormy16_elf_relocate_section): Likewise. (xstormy16_elf_finish_dynamic_sections): Likewise. * elf32-xtensa.c (struct elf_xtensa_link_hash_table): Delete sgot, sgotplt, srelgot, splt and srelplt. (elf_xtensa_create_dynamic_sections): Use elf htab shortcuts to dynamic sections. (elf_xtensa_allocate_dynrelocs): Likewise. (elf_xtensa_allocate_local_got_size): Likewise. (elf_xtensa_size_dynamic_sections): Likewise. (elf_xtensa_relocate_section): Likewise. (elf_xtensa_finish_dynamic_sections): Likewise. (shrink_dynamic_reloc_sections): Likewise. (elf_xtensa_get_plt_section): Likewise. (elf_xtensa_get_gotplt_section): Likewise. (xtensa_callback_required_dependence): Likewise. * elf64-alpha.c (elf64_alpha_create_dynamic_sections): Set elf htab shortcuts to dynamic sections. (elf64_alpha_adjust_dynamic_symbol): Use elf htab shortcuts to dynamic sections. (elf64_alpha_size_plt_section): Likewise. (elf64_alpha_size_rela_got_1): Likewise. (elf64_alpha_size_rela_got_section): Likewise. (elf64_alpha_relocate_section): Likewise. (elf64_alpha_finish_dynamic_symbol): Likewise. (elf64_alpha_finish_dynamic_sections): Likewise. * elf64-hppa.c (elf64_hppa_size_dynamic_sections): Likewise. * elf64-s390.c (create_got_section): Delete. (elf_s390_create_dynamic_sections): Use _bfd_elf_create_got_section. (elf_s390_check_relocs): Likewise. * elf64-sh64.c (sh_elf64_relocate_section): Use elf htab shortcuts to dynamic sections. (sh_elf64_check_relocs): Likewise. (sh64_elf64_adjust_dynamic_symbol): Likewise. (sh64_elf64_size_dynamic_sections): Likewise. (sh64_elf64_finish_dynamic_symbol): Likewise. (sh64_elf64_finish_dynamic_sections): Likewise. * elflink.c (_bfd_elf_create_got_section): Likewise. * elfnn-aarch64.c (aarch64_elf_create_got_section): Likewise. * elfnn-ia64.c (elfNN_ia64_size_dynamic_sections): Likewise. (elfNN_ia64_finish_dynamic_sections): Likewise. * elfnn-riscv.c (riscv_elf_create_got_section): Likewise. * elfxx-mips.c (struct mips_elf_link_hash_table): Delete srellt, sgotplt, splt and sgot. (mips_elf_initialize_tls_slots): Use elf htab shortcuts to dynamic sections. (mips_elf_gotplt_index): Likewise. (mips_elf_primary_global_got_index): Likewise. (mips_elf_global_got_index): Likewise. (mips_elf_got_offset_from_index): Likewise. (mips_elf_create_local_got_entry): Likewise. (mips_elf_create_got_section): Likewise. (mips_elf_calculate_relocation): Likewise. (_bfd_mips_elf_create_dynamic_sections): Likewise. (_bfd_mips_elf_adjust_dynamic_symbol): Likewise. (mips_elf_lay_out_got): Likewise. (mips_elf_set_plt_sym_value): Likewise. (_bfd_mips_elf_size_dynamic_sections): Likewise. (_bfd_mips_elf_finish_dynamic_symbol): Likewise. (_bfd_mips_vxworks_finish_dynamic_symbol): Likewise. (mips_finish_exec_plt): Likewise. (mips_vxworks_finish_exec_plt): Likewise. (mips_vxworks_finish_shared_plt): Likewise. (_bfd_mips_elf_finish_dynamic_sections): Likewise. * elfxx-sparc.c (sparc_finish_dyn): Likewise. * elfxx-tilegx.c (tilegx_elf_create_got_section): Likewise.
2016-11-23 05:36:34 +01:00
if (htab->sgot != NULL)
[AArch64] Fix creation of .got and placement of _GLOBAL_OFFSET_TABLE_
2013-07-02 08:39:26 +02:00
return TRUE;
flags = bed->dynamic_sec_flags;
s = bfd_make_section_anyway_with_flags (abfd,
(bed->rela_plts_and_copies_p
? ".rela.got" : ".rel.got"),
(bed->dynamic_sec_flags
| SEC_READONLY));
if (s == NULL
bfd_section_* macros This large patch removes the unnecessary bfd parameter from various bfd section macros and functions. The bfd is hardly ever used and if needed for the bfd_set_section_* or bfd_rename_section functions can be found via section->owner except for the com, und, abs, and ind std_section special sections. Those sections shouldn't be modified anyway. The patch also removes various bfd_get_section_<field> macros, replacing their use with bfd_section_<field>, and adds bfd_set_section_lma. I've also fixed a minor bug in gas where compressed section renaming was done directly rather than calling bfd_rename_section. This would have broken bfd_get_section_by_name and similar functions, but that hardly mattered at such a late stage in gas processing. bfd/ * bfd-in.h (bfd_get_section_name, bfd_get_section_vma), (bfd_get_section_lma, bfd_get_section_alignment), (bfd_get_section_size, bfd_get_section_flags), (bfd_get_section_userdata): Delete. (bfd_section_name, bfd_section_size, bfd_section_vma), (bfd_section_lma, bfd_section_alignment): Lose bfd parameter. (bfd_section_flags, bfd_section_userdata): New. (bfd_is_com_section): Rename parameter. * section.c (bfd_set_section_userdata, bfd_set_section_vma), (bfd_set_section_alignment, bfd_set_section_flags, bfd_rename_section), (bfd_set_section_size): Delete bfd parameter, rename section parameter. (bfd_set_section_lma): New. * bfd-in2.h: Regenerate. * mach-o.c (bfd_mach_o_init_section_from_mach_o): Delete bfd param, update callers. * aoutx.h, * bfd.c, * coff-alpha.c, * coff-arm.c, * coff-mips.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * compress.c, * ecoff.c, * elf-eh-frame.c, * elf-hppa.h, * elf-ifunc.c, * elf-m10200.c, * elf-m10300.c, * elf-properties.c, * elf-s390-common.c, * elf-vxworks.c, * elf.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-csky.c, * elf32-d10v.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-ip2k.c, * elf32-iq2000.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc1x.c, * elf32-m68k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nios2.c, * elf32-or1k.c, * elf32-ppc.c, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score7.c, * elf32-sh.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilepro.c, * elf32-v850.c, * elf32-vax.c, * elf32-visium.c, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-bpf.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sparc.c, * elf64-x86-64.c, * elflink.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-mips.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * i386msdos.c, * linker.c, * mach-o.c, * mmo.c, * opncls.c, * pdp11.c, * pei-x86_64.c, * peicode.h, * reloc.c, * section.c, * syms.c, * vms-alpha.c, * xcofflink.c: Update throughout for bfd section macro and function changes. binutils/ * addr2line.c, * bucomm.c, * coffgrok.c, * dlltool.c, * nm.c, * objcopy.c, * objdump.c, * od-elf32_avr.c, * od-macho.c, * od-xcoff.c, * prdbg.c, * rdcoff.c, * rddbg.c, * rescoff.c, * resres.c, * size.c, * srconv.c, * strings.c, * windmc.c: Update throughout for bfd section macro and function changes. gas/ * as.c, * as.h, * dw2gencfi.c, * dwarf2dbg.c, * ecoff.c, * read.c, * stabs.c, * subsegs.c, * subsegs.h, * write.c, * config/obj-coff-seh.c, * config/obj-coff.c, * config/obj-ecoff.c, * config/obj-elf.c, * config/obj-macho.c, * config/obj-som.c, * config/tc-aarch64.c, * config/tc-alpha.c, * config/tc-arc.c, * config/tc-arm.c, * config/tc-avr.c, * config/tc-bfin.c, * config/tc-bpf.c, * config/tc-d10v.c, * config/tc-d30v.c, * config/tc-epiphany.c, * config/tc-fr30.c, * config/tc-frv.c, * config/tc-h8300.c, * config/tc-hppa.c, * config/tc-i386.c, * config/tc-ia64.c, * config/tc-ip2k.c, * config/tc-iq2000.c, * config/tc-lm32.c, * config/tc-m32c.c, * config/tc-m32r.c, * config/tc-m68hc11.c, * config/tc-mep.c, * config/tc-microblaze.c, * config/tc-mips.c, * config/tc-mmix.c, * config/tc-mn10200.c, * config/tc-mn10300.c, * config/tc-msp430.c, * config/tc-mt.c, * config/tc-nds32.c, * config/tc-or1k.c, * config/tc-ppc.c, * config/tc-pru.c, * config/tc-rl78.c, * config/tc-rx.c, * config/tc-s12z.c, * config/tc-s390.c, * config/tc-score.c, * config/tc-score7.c, * config/tc-sh.c, * config/tc-sparc.c, * config/tc-spu.c, * config/tc-tic4x.c, * config/tc-tic54x.c, * config/tc-tic6x.c, * config/tc-tilegx.c, * config/tc-tilepro.c, * config/tc-v850.c, * config/tc-visium.c, * config/tc-wasm32.c, * config/tc-xc16x.c, * config/tc-xgate.c, * config/tc-xstormy16.c, * config/tc-xtensa.c, * config/tc-z8k.c: Update throughout for bfd section macro and function changes. * write.c (compress_debug): Use bfd_rename_section. gdb/ * aarch64-linux-tdep.c, * arm-tdep.c, * auto-load.c, * coff-pe-read.c, * coffread.c, * corelow.c, * dbxread.c, * dicos-tdep.c, * dwarf2-frame.c, * dwarf2read.c, * elfread.c, * exec.c, * fbsd-tdep.c, * gcore.c, * gdb_bfd.c, * gdb_bfd.h, * hppa-tdep.c, * i386-cygwin-tdep.c, * i386-fbsd-tdep.c, * i386-linux-tdep.c, * jit.c, * linux-tdep.c, * machoread.c, * maint.c, * mdebugread.c, * minidebug.c, * mips-linux-tdep.c, * mips-sde-tdep.c, * mips-tdep.c, * mipsread.c, * nto-tdep.c, * objfiles.c, * objfiles.h, * osabi.c, * ppc-linux-tdep.c, * ppc64-tdep.c, * record-btrace.c, * record-full.c, * remote.c, * rs6000-aix-tdep.c, * rs6000-tdep.c, * s390-linux-tdep.c, * s390-tdep.c, * solib-aix.c, * solib-dsbt.c, * solib-frv.c, * solib-spu.c, * solib-svr4.c, * solib-target.c, * spu-linux-nat.c, * spu-tdep.c, * symfile-mem.c, * symfile.c, * symmisc.c, * symtab.c, * target.c, * windows-nat.c, * xcoffread.c, * cli/cli-dump.c, * compile/compile-object-load.c, * mi/mi-interp.c: Update throughout for bfd section macro and function changes. * gcore (gcore_create_callback): Use bfd_set_section_lma. * spu-tdep.c (spu_overlay_new_objfile): Likewise. gprof/ * corefile.c, * symtab.c: Update throughout for bfd section macro and function changes. ld/ * ldcref.c, * ldctor.c, * ldelf.c, * ldlang.c, * pe-dll.c, * emultempl/aarch64elf.em, * emultempl/aix.em, * emultempl/armcoff.em, * emultempl/armelf.em, * emultempl/cr16elf.em, * emultempl/cskyelf.em, * emultempl/m68hc1xelf.em, * emultempl/m68kelf.em, * emultempl/mipself.em, * emultempl/mmix-elfnmmo.em, * emultempl/mmo.em, * emultempl/msp430.em, * emultempl/nios2elf.em, * emultempl/pe.em, * emultempl/pep.em, * emultempl/ppc64elf.em, * emultempl/xtensaelf.em: Update throughout for bfd section macro and function changes. libctf/ * ctf-open-bfd.c: Update throughout for bfd section macro changes. opcodes/ * arc-ext.c: Update throughout for bfd section macro changes. sim/ * common/sim-load.c, * common/sim-utils.c, * cris/sim-if.c, * erc32/func.c, * lm32/sim-if.c, * m32c/load.c, * m32c/trace.c, * m68hc11/interp.c, * ppc/hw_htab.c, * ppc/hw_init.c, * rl78/load.c, * rl78/trace.c, * rx/gdb-if.c, * rx/load.c, * rx/trace.c: Update throughout for bfd section macro changes.
2019-09-16 12:55:17 +02:00
|| !bfd_set_section_alignment (s, bed->s->log_file_align))
[AArch64] Fix creation of .got and placement of _GLOBAL_OFFSET_TABLE_
2013-07-02 08:39:26 +02:00
return FALSE;
htab->srelgot = s;
s = bfd_make_section_anyway_with_flags (abfd, ".got", flags);
if (s == NULL
bfd_section_* macros This large patch removes the unnecessary bfd parameter from various bfd section macros and functions. The bfd is hardly ever used and if needed for the bfd_set_section_* or bfd_rename_section functions can be found via section->owner except for the com, und, abs, and ind std_section special sections. Those sections shouldn't be modified anyway. The patch also removes various bfd_get_section_<field> macros, replacing their use with bfd_section_<field>, and adds bfd_set_section_lma. I've also fixed a minor bug in gas where compressed section renaming was done directly rather than calling bfd_rename_section. This would have broken bfd_get_section_by_name and similar functions, but that hardly mattered at such a late stage in gas processing. bfd/ * bfd-in.h (bfd_get_section_name, bfd_get_section_vma), (bfd_get_section_lma, bfd_get_section_alignment), (bfd_get_section_size, bfd_get_section_flags), (bfd_get_section_userdata): Delete. (bfd_section_name, bfd_section_size, bfd_section_vma), (bfd_section_lma, bfd_section_alignment): Lose bfd parameter. (bfd_section_flags, bfd_section_userdata): New. (bfd_is_com_section): Rename parameter. * section.c (bfd_set_section_userdata, bfd_set_section_vma), (bfd_set_section_alignment, bfd_set_section_flags, bfd_rename_section), (bfd_set_section_size): Delete bfd parameter, rename section parameter. (bfd_set_section_lma): New. * bfd-in2.h: Regenerate. * mach-o.c (bfd_mach_o_init_section_from_mach_o): Delete bfd param, update callers. * aoutx.h, * bfd.c, * coff-alpha.c, * coff-arm.c, * coff-mips.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * compress.c, * ecoff.c, * elf-eh-frame.c, * elf-hppa.h, * elf-ifunc.c, * elf-m10200.c, * elf-m10300.c, * elf-properties.c, * elf-s390-common.c, * elf-vxworks.c, * elf.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-csky.c, * elf32-d10v.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-ip2k.c, * elf32-iq2000.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc1x.c, * elf32-m68k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nios2.c, * elf32-or1k.c, * elf32-ppc.c, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score7.c, * elf32-sh.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilepro.c, * elf32-v850.c, * elf32-vax.c, * elf32-visium.c, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-bpf.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sparc.c, * elf64-x86-64.c, * elflink.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-mips.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * i386msdos.c, * linker.c, * mach-o.c, * mmo.c, * opncls.c, * pdp11.c, * pei-x86_64.c, * peicode.h, * reloc.c, * section.c, * syms.c, * vms-alpha.c, * xcofflink.c: Update throughout for bfd section macro and function changes. binutils/ * addr2line.c, * bucomm.c, * coffgrok.c, * dlltool.c, * nm.c, * objcopy.c, * objdump.c, * od-elf32_avr.c, * od-macho.c, * od-xcoff.c, * prdbg.c, * rdcoff.c, * rddbg.c, * rescoff.c, * resres.c, * size.c, * srconv.c, * strings.c, * windmc.c: Update throughout for bfd section macro and function changes. gas/ * as.c, * as.h, * dw2gencfi.c, * dwarf2dbg.c, * ecoff.c, * read.c, * stabs.c, * subsegs.c, * subsegs.h, * write.c, * config/obj-coff-seh.c, * config/obj-coff.c, * config/obj-ecoff.c, * config/obj-elf.c, * config/obj-macho.c, * config/obj-som.c, * config/tc-aarch64.c, * config/tc-alpha.c, * config/tc-arc.c, * config/tc-arm.c, * config/tc-avr.c, * config/tc-bfin.c, * config/tc-bpf.c, * config/tc-d10v.c, * config/tc-d30v.c, * config/tc-epiphany.c, * config/tc-fr30.c, * config/tc-frv.c, * config/tc-h8300.c, * config/tc-hppa.c, * config/tc-i386.c, * config/tc-ia64.c, * config/tc-ip2k.c, * config/tc-iq2000.c, * config/tc-lm32.c, * config/tc-m32c.c, * config/tc-m32r.c, * config/tc-m68hc11.c, * config/tc-mep.c, * config/tc-microblaze.c, * config/tc-mips.c, * config/tc-mmix.c, * config/tc-mn10200.c, * config/tc-mn10300.c, * config/tc-msp430.c, * config/tc-mt.c, * config/tc-nds32.c, * config/tc-or1k.c, * config/tc-ppc.c, * config/tc-pru.c, * config/tc-rl78.c, * config/tc-rx.c, * config/tc-s12z.c, * config/tc-s390.c, * config/tc-score.c, * config/tc-score7.c, * config/tc-sh.c, * config/tc-sparc.c, * config/tc-spu.c, * config/tc-tic4x.c, * config/tc-tic54x.c, * config/tc-tic6x.c, * config/tc-tilegx.c, * config/tc-tilepro.c, * config/tc-v850.c, * config/tc-visium.c, * config/tc-wasm32.c, * config/tc-xc16x.c, * config/tc-xgate.c, * config/tc-xstormy16.c, * config/tc-xtensa.c, * config/tc-z8k.c: Update throughout for bfd section macro and function changes. * write.c (compress_debug): Use bfd_rename_section. gdb/ * aarch64-linux-tdep.c, * arm-tdep.c, * auto-load.c, * coff-pe-read.c, * coffread.c, * corelow.c, * dbxread.c, * dicos-tdep.c, * dwarf2-frame.c, * dwarf2read.c, * elfread.c, * exec.c, * fbsd-tdep.c, * gcore.c, * gdb_bfd.c, * gdb_bfd.h, * hppa-tdep.c, * i386-cygwin-tdep.c, * i386-fbsd-tdep.c, * i386-linux-tdep.c, * jit.c, * linux-tdep.c, * machoread.c, * maint.c, * mdebugread.c, * minidebug.c, * mips-linux-tdep.c, * mips-sde-tdep.c, * mips-tdep.c, * mipsread.c, * nto-tdep.c, * objfiles.c, * objfiles.h, * osabi.c, * ppc-linux-tdep.c, * ppc64-tdep.c, * record-btrace.c, * record-full.c, * remote.c, * rs6000-aix-tdep.c, * rs6000-tdep.c, * s390-linux-tdep.c, * s390-tdep.c, * solib-aix.c, * solib-dsbt.c, * solib-frv.c, * solib-spu.c, * solib-svr4.c, * solib-target.c, * spu-linux-nat.c, * spu-tdep.c, * symfile-mem.c, * symfile.c, * symmisc.c, * symtab.c, * target.c, * windows-nat.c, * xcoffread.c, * cli/cli-dump.c, * compile/compile-object-load.c, * mi/mi-interp.c: Update throughout for bfd section macro and function changes. * gcore (gcore_create_callback): Use bfd_set_section_lma. * spu-tdep.c (spu_overlay_new_objfile): Likewise. gprof/ * corefile.c, * symtab.c: Update throughout for bfd section macro and function changes. ld/ * ldcref.c, * ldctor.c, * ldelf.c, * ldlang.c, * pe-dll.c, * emultempl/aarch64elf.em, * emultempl/aix.em, * emultempl/armcoff.em, * emultempl/armelf.em, * emultempl/cr16elf.em, * emultempl/cskyelf.em, * emultempl/m68hc1xelf.em, * emultempl/m68kelf.em, * emultempl/mipself.em, * emultempl/mmix-elfnmmo.em, * emultempl/mmo.em, * emultempl/msp430.em, * emultempl/nios2elf.em, * emultempl/pe.em, * emultempl/pep.em, * emultempl/ppc64elf.em, * emultempl/xtensaelf.em: Update throughout for bfd section macro and function changes. libctf/ * ctf-open-bfd.c: Update throughout for bfd section macro changes. opcodes/ * arc-ext.c: Update throughout for bfd section macro changes. sim/ * common/sim-load.c, * common/sim-utils.c, * cris/sim-if.c, * erc32/func.c, * lm32/sim-if.c, * m32c/load.c, * m32c/trace.c, * m68hc11/interp.c, * ppc/hw_htab.c, * ppc/hw_init.c, * rl78/load.c, * rl78/trace.c, * rx/gdb-if.c, * rx/load.c, * rx/trace.c: Update throughout for bfd section macro changes.
2019-09-16 12:55:17 +02:00
|| !bfd_set_section_alignment (s, bed->s->log_file_align))
[AArch64] Fix creation of .got and placement of _GLOBAL_OFFSET_TABLE_
2013-07-02 08:39:26 +02:00
return FALSE;
htab->sgot = s;
htab->sgot->size += GOT_ENTRY_SIZE;
if (bed->want_got_sym)
{
/* Define the symbol _GLOBAL_OFFSET_TABLE_ at the start of the .got
(or .got.plt) section. We don't do this in the linker script
because we don't want to define the symbol if we are not creating
a global offset table. */
h = _bfd_elf_define_linkage_sym (abfd, info, s,
"_GLOBAL_OFFSET_TABLE_");
elf_hash_table (info)->hgot = h;
if (h == NULL)
return FALSE;
}
if (bed->want_got_plt)
{
s = bfd_make_section_anyway_with_flags (abfd, ".got.plt", flags);
if (s == NULL
bfd_section_* macros This large patch removes the unnecessary bfd parameter from various bfd section macros and functions. The bfd is hardly ever used and if needed for the bfd_set_section_* or bfd_rename_section functions can be found via section->owner except for the com, und, abs, and ind std_section special sections. Those sections shouldn't be modified anyway. The patch also removes various bfd_get_section_<field> macros, replacing their use with bfd_section_<field>, and adds bfd_set_section_lma. I've also fixed a minor bug in gas where compressed section renaming was done directly rather than calling bfd_rename_section. This would have broken bfd_get_section_by_name and similar functions, but that hardly mattered at such a late stage in gas processing. bfd/ * bfd-in.h (bfd_get_section_name, bfd_get_section_vma), (bfd_get_section_lma, bfd_get_section_alignment), (bfd_get_section_size, bfd_get_section_flags), (bfd_get_section_userdata): Delete. (bfd_section_name, bfd_section_size, bfd_section_vma), (bfd_section_lma, bfd_section_alignment): Lose bfd parameter. (bfd_section_flags, bfd_section_userdata): New. (bfd_is_com_section): Rename parameter. * section.c (bfd_set_section_userdata, bfd_set_section_vma), (bfd_set_section_alignment, bfd_set_section_flags, bfd_rename_section), (bfd_set_section_size): Delete bfd parameter, rename section parameter. (bfd_set_section_lma): New. * bfd-in2.h: Regenerate. * mach-o.c (bfd_mach_o_init_section_from_mach_o): Delete bfd param, update callers. * aoutx.h, * bfd.c, * coff-alpha.c, * coff-arm.c, * coff-mips.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * compress.c, * ecoff.c, * elf-eh-frame.c, * elf-hppa.h, * elf-ifunc.c, * elf-m10200.c, * elf-m10300.c, * elf-properties.c, * elf-s390-common.c, * elf-vxworks.c, * elf.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-csky.c, * elf32-d10v.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-ip2k.c, * elf32-iq2000.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc1x.c, * elf32-m68k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nios2.c, * elf32-or1k.c, * elf32-ppc.c, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score7.c, * elf32-sh.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilepro.c, * elf32-v850.c, * elf32-vax.c, * elf32-visium.c, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-bpf.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sparc.c, * elf64-x86-64.c, * elflink.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-mips.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * i386msdos.c, * linker.c, * mach-o.c, * mmo.c, * opncls.c, * pdp11.c, * pei-x86_64.c, * peicode.h, * reloc.c, * section.c, * syms.c, * vms-alpha.c, * xcofflink.c: Update throughout for bfd section macro and function changes. binutils/ * addr2line.c, * bucomm.c, * coffgrok.c, * dlltool.c, * nm.c, * objcopy.c, * objdump.c, * od-elf32_avr.c, * od-macho.c, * od-xcoff.c, * prdbg.c, * rdcoff.c, * rddbg.c, * rescoff.c, * resres.c, * size.c, * srconv.c, * strings.c, * windmc.c: Update throughout for bfd section macro and function changes. gas/ * as.c, * as.h, * dw2gencfi.c, * dwarf2dbg.c, * ecoff.c, * read.c, * stabs.c, * subsegs.c, * subsegs.h, * write.c, * config/obj-coff-seh.c, * config/obj-coff.c, * config/obj-ecoff.c, * config/obj-elf.c, * config/obj-macho.c, * config/obj-som.c, * config/tc-aarch64.c, * config/tc-alpha.c, * config/tc-arc.c, * config/tc-arm.c, * config/tc-avr.c, * config/tc-bfin.c, * config/tc-bpf.c, * config/tc-d10v.c, * config/tc-d30v.c, * config/tc-epiphany.c, * config/tc-fr30.c, * config/tc-frv.c, * config/tc-h8300.c, * config/tc-hppa.c, * config/tc-i386.c, * config/tc-ia64.c, * config/tc-ip2k.c, * config/tc-iq2000.c, * config/tc-lm32.c, * config/tc-m32c.c, * config/tc-m32r.c, * config/tc-m68hc11.c, * config/tc-mep.c, * config/tc-microblaze.c, * config/tc-mips.c, * config/tc-mmix.c, * config/tc-mn10200.c, * config/tc-mn10300.c, * config/tc-msp430.c, * config/tc-mt.c, * config/tc-nds32.c, * config/tc-or1k.c, * config/tc-ppc.c, * config/tc-pru.c, * config/tc-rl78.c, * config/tc-rx.c, * config/tc-s12z.c, * config/tc-s390.c, * config/tc-score.c, * config/tc-score7.c, * config/tc-sh.c, * config/tc-sparc.c, * config/tc-spu.c, * config/tc-tic4x.c, * config/tc-tic54x.c, * config/tc-tic6x.c, * config/tc-tilegx.c, * config/tc-tilepro.c, * config/tc-v850.c, * config/tc-visium.c, * config/tc-wasm32.c, * config/tc-xc16x.c, * config/tc-xgate.c, * config/tc-xstormy16.c, * config/tc-xtensa.c, * config/tc-z8k.c: Update throughout for bfd section macro and function changes. * write.c (compress_debug): Use bfd_rename_section. gdb/ * aarch64-linux-tdep.c, * arm-tdep.c, * auto-load.c, * coff-pe-read.c, * coffread.c, * corelow.c, * dbxread.c, * dicos-tdep.c, * dwarf2-frame.c, * dwarf2read.c, * elfread.c, * exec.c, * fbsd-tdep.c, * gcore.c, * gdb_bfd.c, * gdb_bfd.h, * hppa-tdep.c, * i386-cygwin-tdep.c, * i386-fbsd-tdep.c, * i386-linux-tdep.c, * jit.c, * linux-tdep.c, * machoread.c, * maint.c, * mdebugread.c, * minidebug.c, * mips-linux-tdep.c, * mips-sde-tdep.c, * mips-tdep.c, * mipsread.c, * nto-tdep.c, * objfiles.c, * objfiles.h, * osabi.c, * ppc-linux-tdep.c, * ppc64-tdep.c, * record-btrace.c, * record-full.c, * remote.c, * rs6000-aix-tdep.c, * rs6000-tdep.c, * s390-linux-tdep.c, * s390-tdep.c, * solib-aix.c, * solib-dsbt.c, * solib-frv.c, * solib-spu.c, * solib-svr4.c, * solib-target.c, * spu-linux-nat.c, * spu-tdep.c, * symfile-mem.c, * symfile.c, * symmisc.c, * symtab.c, * target.c, * windows-nat.c, * xcoffread.c, * cli/cli-dump.c, * compile/compile-object-load.c, * mi/mi-interp.c: Update throughout for bfd section macro and function changes. * gcore (gcore_create_callback): Use bfd_set_section_lma. * spu-tdep.c (spu_overlay_new_objfile): Likewise. gprof/ * corefile.c, * symtab.c: Update throughout for bfd section macro and function changes. ld/ * ldcref.c, * ldctor.c, * ldelf.c, * ldlang.c, * pe-dll.c, * emultempl/aarch64elf.em, * emultempl/aix.em, * emultempl/armcoff.em, * emultempl/armelf.em, * emultempl/cr16elf.em, * emultempl/cskyelf.em, * emultempl/m68hc1xelf.em, * emultempl/m68kelf.em, * emultempl/mipself.em, * emultempl/mmix-elfnmmo.em, * emultempl/mmo.em, * emultempl/msp430.em, * emultempl/nios2elf.em, * emultempl/pe.em, * emultempl/pep.em, * emultempl/ppc64elf.em, * emultempl/xtensaelf.em: Update throughout for bfd section macro and function changes. libctf/ * ctf-open-bfd.c: Update throughout for bfd section macro changes. opcodes/ * arc-ext.c: Update throughout for bfd section macro changes. sim/ * common/sim-load.c, * common/sim-utils.c, * cris/sim-if.c, * erc32/func.c, * lm32/sim-if.c, * m32c/load.c, * m32c/trace.c, * m68hc11/interp.c, * ppc/hw_htab.c, * ppc/hw_init.c, * rl78/load.c, * rl78/trace.c, * rx/gdb-if.c, * rx/load.c, * rx/trace.c: Update throughout for bfd section macro changes.
2019-09-16 12:55:17 +02:00
|| !bfd_set_section_alignment (s, bed->s->log_file_align))
[AArch64] Fix creation of .got and placement of _GLOBAL_OFFSET_TABLE_
2013-07-02 08:39:26 +02:00
return FALSE;
htab->sgotplt = s;
}
/* The first bit of the global offset table is the header. */
s->size += bed->got_header_size;
return TRUE;
}
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* Look through the relocs for a section during the first phase. */
static bfd_boolean
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_check_relocs (bfd *abfd, struct bfd_link_info *info,
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
asection *sec, const Elf_Internal_Rela *relocs)
{
Elf_Internal_Shdr *symtab_hdr;
struct elf_link_hash_entry **sym_hashes;
const Elf_Internal_Rela *rel;
const Elf_Internal_Rela *rel_end;
asection *sreloc;
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
struct elf_aarch64_link_hash_table *htab;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
Add output_type to bfd_link_info The "shared" field in bfd_link_info is set for both DSO and and PIE. There are separate fields for executable and relocatable outputs. This patch adds an "output_type" field: enum output_type { type_unknown = 0, type_executable, type_dll, type_relocatable }; and a "pic" field to bfd_link_info to replace shared, executable and relocatable fields so that we can use the "output_type" field to check for output type and the "pic" field check if output is PIC. Macros, bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie, are provided to check for output features. bfd/ * bfd/aoutx.h: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * bfd/bout.c: Likewise. * bfd/coff-alpha.c: Likewise. * bfd/coff-arm.c: Likewise. * bfd/coff-i386.c: Likewise. * bfd/coff-i960.c: Likewise. * bfd/coff-m68k.c: Likewise. * bfd/coff-mcore.c: Likewise. * bfd/coff-mips.c: Likewise. * bfd/coff-ppc.c: Likewise. * bfd/coff-rs6000.c: Likewise. * bfd/coff-sh.c: Likewise. * bfd/coff-tic80.c: Likewise. * bfd/coff-x86_64.c: Likewise. * bfd/coff64-rs6000.c: Likewise. * bfd/coffgen.c: Likewise. * bfd/cofflink.c: Likewise. * bfd/ecoff.c: Likewise. * bfd/ecofflink.c: Likewise. * bfd/elf-bfd.h: Likewise. * bfd/elf-eh-frame.c: Likewise. * bfd/elf-ifunc.c: Likewise. * bfd/elf-m10200.c: Likewise. * bfd/elf-m10300.c: Likewise. * bfd/elf-s390-common.c: Likewise. * bfd/elf-vxworks.c: Likewise. * bfd/elf.c: Likewise. * bfd/elf32-arm.c: Likewise. * bfd/elf32-avr.c: Likewise. * bfd/elf32-bfin.c: Likewise. * bfd/elf32-cr16.c: Likewise. * bfd/elf32-cr16c.c: Likewise. * bfd/elf32-cris.c: Likewise. * bfd/elf32-crx.c: Likewise. * bfd/elf32-d10v.c: Likewise. * bfd/elf32-dlx.c: Likewise. * bfd/elf32-epiphany.c: Likewise. * bfd/elf32-fr30.c: Likewise. * bfd/elf32-frv.c: Likewise. * bfd/elf32-ft32.c: Likewise. * bfd/elf32-h8300.c: Likewise. * bfd/elf32-hppa.c: Likewise. * bfd/elf32-i370.c: Likewise. * bfd/elf32-i386.c: Likewise. * bfd/elf32-i860.c: Likewise. * bfd/elf32-ip2k.c: Likewise. * bfd/elf32-iq2000.c: Likewise. * bfd/elf32-lm32.c: Likewise. * bfd/elf32-m32c.c: Likewise. * bfd/elf32-m32r.c: Likewise. * bfd/elf32-m68hc11.c: Likewise. * bfd/elf32-m68hc1x.c: Likewise. * bfd/elf32-m68k.c: Likewise. * bfd/elf32-mcore.c: Likewise. * bfd/elf32-mep.c: Likewise. * bfd/elf32-metag.c: Likewise. * bfd/elf32-microblaze.c: Likewise. * bfd/elf32-moxie.c: Likewise. * bfd/elf32-msp430.c: Likewise. * bfd/elf32-mt.c: Likewise. * bfd/elf32-nds32.c: Likewise. * bfd/elf32-nios2.c: Likewise. * bfd/elf32-or1k.c: Likewise. * bfd/elf32-ppc.c: Likewise. * bfd/elf32-rl78.c: Likewise. * bfd/elf32-rx.c: Likewise. * bfd/elf32-s390.c: Likewise. * bfd/elf32-score.c: Likewise. * bfd/elf32-score7.c: Likewise. * bfd/elf32-sh-symbian.c: Likewise. * bfd/elf32-sh.c: Likewise. * bfd/elf32-sh64.c: Likewise. * bfd/elf32-spu.c: Likewise. * bfd/elf32-tic6x.c: Likewise. * bfd/elf32-tilepro.c: Likewise. * bfd/elf32-v850.c: Likewise. * bfd/elf32-vax.c: Likewise. * bfd/elf32-visium.c: Likewise. * bfd/elf32-xc16x.c: Likewise. * bfd/elf32-xstormy16.c: Likewise. * bfd/elf32-xtensa.c: Likewise. * bfd/elf64-alpha.c: Likewise. * bfd/elf64-hppa.c: Likewise. * bfd/elf64-ia64-vms.c: Likewise. * bfd/elf64-mmix.c: Likewise. * bfd/elf64-ppc.c: Likewise. * bfd/elf64-s390.c: Likewise. * bfd/elf64-sh64.c: Likewise. * bfd/elf64-x86-64.c: Likewise. * bfd/elflink.c: Likewise. * bfd/elfnn-aarch64.c: Likewise. * bfd/elfnn-ia64.c: Likewise. * bfd/elfxx-mips.c: Likewise. * bfd/elfxx-sparc.c: Likewise. * bfd/elfxx-tilegx.c: Likewise. * bfd/i386linux.c: Likewise. * bfd/linker.c: Likewise. * bfd/m68klinux.c: Likewise. * bfd/pdp11.c: Likewise. * bfd/pe-mips.c: Likewise. * bfd/peXXigen.c: Likewise. * bfd/reloc.c: Likewise. * bfd/reloc16.c: Likewise. * bfd/sparclinux.c: Likewise. * bfd/sunos.c: Likewise. * bfd/vms-alpha.c: Likewise. * bfd/xcofflink.c: Likewise. include/ * include/bfdlink.h (output_type): New enum. (bfd_link_executable): New macro. (bfd_link_dll): Likewise. (bfd_link_relocatable): Likewise. (bfd_link_pic): Likewise. (bfd_link_pie): Likewise. (bfd_link_info): Remove shared, executable, pie and relocatable. Add output_type and pic. ld/ * ld/ldctor.c: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * ld/ldemul.c: Likewise. * ld/ldfile.c: Likewise. * ld/ldlang.c: Likewise. * ld/ldmain.c: Likewise. * ld/ldwrite.c: Likewise. * ld/lexsup.c: Likewise. * ld/pe-dll.c: Likewise. * ld/plugin.c: Likewise. * ld/emultempl/aarch64elf.em: Likewise. * ld/emultempl/aix.em: Likewise. * ld/emultempl/alphaelf.em: Likewise. * ld/emultempl/armcoff.em: Likewise. * ld/emultempl/armelf.em: Likewise. * ld/emultempl/avrelf.em: Likewise. * ld/emultempl/beos.em: Likewise. * ld/emultempl/cr16elf.em: Likewise. * ld/emultempl/elf-generic.em: Likewise. * ld/emultempl/elf32.em: Likewise. * ld/emultempl/genelf.em: Likewise. * ld/emultempl/generic.em: Likewise. * ld/emultempl/gld960.em: Likewise. * ld/emultempl/gld960c.em: Likewise. * ld/emultempl/hppaelf.em: Likewise. * ld/emultempl/irix.em: Likewise. * ld/emultempl/linux.em: Likewise. * ld/emultempl/lnk960.em: Likewise. * ld/emultempl/m68hc1xelf.em: Likewise. * ld/emultempl/m68kcoff.em: Likewise. * ld/emultempl/m68kelf.em: Likewise. * ld/emultempl/metagelf.em: Likewise. * ld/emultempl/mipself.em: Likewise. * ld/emultempl/mmo.em: Likewise. * ld/emultempl/msp430.em: Likewise. * ld/emultempl/nds32elf.em: Likewise. * ld/emultempl/needrelax.em: Likewise. * ld/emultempl/nios2elf.em: Likewise. * ld/emultempl/pe.em: Likewise. * ld/emultempl/pep.em: Likewise. * ld/emultempl/ppc32elf.em: Likewise. * ld/emultempl/ppc64elf.em: Likewise. * ld/emultempl/sh64elf.em: Likewise. * ld/emultempl/solaris2.em: Likewise. * ld/emultempl/spuelf.em: Likewise. * ld/emultempl/sunos.em: Likewise. * ld/emultempl/tic6xdsbt.em: Likewise. * ld/emultempl/ticoff.em: Likewise. * ld/emultempl/v850elf.em: Likewise. * ld/emultempl/vms.em: Likewise. * ld/emultempl/vxworks.em: Likewise.
2015-08-18 14:51:03 +02:00
if (bfd_link_relocatable (info))
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
return TRUE;
BFD_ASSERT (is_aarch64_elf (abfd));
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
htab = elf_aarch64_hash_table (info);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
sreloc = NULL;
symtab_hdr = &elf_symtab_hdr (abfd);
sym_hashes = elf_sym_hashes (abfd);
rel_end = relocs + sec->reloc_count;
for (rel = relocs; rel < rel_end; rel++)
{
struct elf_link_hash_entry *h;
bfd_error_handler bfd_vma and bfd_size_type args This patch uses the new %L _bfd_error_handler support for printing bfd_vma arguments, and fixes a many other format and/or argument errors in error messages. bfd/ * binary.c (binary_set_section_contents): Don't print filepos in error message. (coff_write_object_contents): Cast size_t for error message. (coff_slurp_line_table): Don't use bfd_vma symndx. (coff_slurp_reloc_table): Remove unneeded cast. * dwarf2.c (read_section): Cast bfd_int64_t to long long for error message. (find_abstract_instance_name): Likewise. * elf32-arm.c (arm_type_of_stub): Correct error arg order. (bfd_elf32_arm_stm32l4xx_erratum_scan): Don't cast error arg. (elf32_arm_check_relocs): Make r_symndx an int. * elf32-cris.c (cris_elf_check_relocs): Delete extraneous %s in format string. * elf32-metag.c (elf_metag_relocate_section): Delete extra error message arg. * elf32-nds32.c (nds32_elf_ex9_build_hash_table): Rewrite bogus error message. * elf32-i386.c (elf_i386_check_relocs): Make r_symndx an int. * elf32-s390.c (elf_s390_check_relocs): Likewise. * elf32-tic6x.c (elf32_tic6x_check_relocs): Likewise. * elf32-tilepro.c (tilepro_elf_check_relocs): Likewise. * elf32-xtensa.c (elf_xtensa_check_relocs): Likewise. * elf64-s390.c (elf_s390_check_relocs): Likewise. * elf64-x86-64.c (elf_x86_64_check_relocs): Likewise. * elfnn-aarch64.c (elfNN_aarch64_check_relocs): Likewise. * elfnn-riscv.c (riscv_elf_check_relocs): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_check_relocs): Likewise. * elfxx-tilegx.c (tilegx_elf_check_relocs): Likewise. * elf64-mmix.c (_bfd_mmix_after_linker_allocation): Cast size_t args and use %lu for error message. * elflink.c (elf_link_adjust_relocs): Delete extra error message arg. * mmo.c (mmo_scan): Make stab_loc a file_ptr. Cast expression for error message. * elf32-arm.c (elf32_arm_tls_relax): Correct format string and args in error message. (elf32_arm_final_link_relocate): Likewise. * coff-arm.c (bfd_arm_process_before_allocation): Likewise. * coffcode.h (styp_to_sec_flags): Likewise. * cofflink.c (_bfd_coff_write_global_sym): Likewise. * ecoff.c (_bfd_ecoff_slurp_symbol_table): Likewise. * elf32-arc.c (arc_elf_merge_private_bfd_data): Likewise. * elf32-bfin.c (bfinfdpic_check_relocs): Likewise. (elf32_bfin_merge_private_bfd_data): Likewise. * elf32-cris.c (cris_elf_relocate_section): Likewise. * elf32-frv.c (frv_elf_merge_private_bfd_data): Likewise. * elf32-i370.c (i370_elf_merge_private_bfd_data): Likewise. (i370_elf_relocate_section): Likewise. * elf32-iq2000.c (iq2000_elf_merge_private_bfd_data): Likewise. * elf32-m32c.c (m32c_elf_merge_private_bfd_data): Likewise. * elf32-m68hc1x.c (_bfd_m68hc11_elf_merge_private_bfd_data): Likewise. * elf32-mcore.c (mcore_elf_relocate_section): Likewise. * elf32-mep.c (mep_elf_merge_private_bfd_data): Likewise. * elf32-mt.c (mt_elf_merge_private_bfd_data): Likewise. * elf64-sparc.c (elf64_sparc_merge_private_bfd_data): Likewise. * elfxx-mips.c (mips_elf_merge_obj_e_flags): Likewise. (_bfd_mips_elf_merge_private_bfd_data): Likewise. * ieee.c (ieee_write_id, read_id): Likewise. * mach-o.c (bfd_mach_o_write_contents): Likewise. (bfd_mach_o_layout_commands, bfd_mach_o_read_section_32): Likewise. (bfd_mach_o_read_section_64, bfd_mach_o_read_symtab_symbol): Likewise. (bfd_mach_o_read_command, bfd_mach_o_header_p): Likewise. * peXXigen.c (_bfd_XXi_swap_aouthdr_in): Likewise. * stabs.c (_bfd_link_section_stabs): Likewise. * coff-arm.c (coff_arm_relocate_section): Use L modifier in error format. * coff-mcore.c (coff_mcore_relocate_section): Likewise. * coff-ppc.c (coff_ppc_relocate_section): Likewise. * coff-rs6000.c (xcoff_reloc_type_toc): Likewise. * coff-sh.c (sh_relax_section): Likewise. (sh_relax_delete_bytes, sh_swap_insns): Likewise. * coff-tic80.c (coff_tic80_relocate_section): Likewise. * coffcode.h (coff_slurp_reloc_table): Likewise. * coffgen.c (_bfd_coff_get_external_symbols): Likewise. (_bfd_coff_read_string_table): Likewise. * cofflink.c (_bfd_coff_generic_relocate_section): Likewise. * compress.c (bfd_get_full_section_contents): Likewise. * dwarf2.c (read_formatted_entries, decode_line_info): Likewise. * elf-m10300.c (mn10300_elf_relocate_section): Likewise. * elf.c (bfd_elf_string_from_elf_section): Likewise. * elf32-arc.c (arc_special_overflow_checks): Likewise. * elf32-arm.c (elf32_arm_tls_relax): Likewise. (elf32_arm_final_link_relocate, elf32_arm_relocate_section): Likewise. (elf32_arm_write_section): Likewise. * elf32-bfin.c (bfin_relocate_section): Likewise. (bfinfdpic_relocate_section): Likewise. * elf32-hppa.c (hppa_build_one_stub): Likewise. (final_link_relocate, elf32_hppa_relocate_section): Likewise. * elf32-i386.c (elf_i386_tls_transition): Likewise. (elf_i386_relocate_section): Likewise. * elf32-ip2k.c (ip2k_final_link_relocate): Likewise. * elf32-lm32.c (lm32_elf_finish_dynamic_sections): Likewise. * elf32-m32r.c (m32r_elf_relocate_section): Likewise. * elf32-m68k.c (elf_m68k_relocate_section): Likewise. * elf32-metag.c (elf_metag_relocate_section): Likewise. * elf32-nds32.c (unrecognized_reloc_msg): Likewise. (nds32_elf_relax_longcall1, nds32_elf_relax_longcall2): Likewise. (nds32_elf_relax_longcall3, nds32_elf_relax_longjump1): Likewise. (nds32_elf_relax_longjump2, nds32_elf_relax_longjump3): Likewise. (nds32_elf_relax_longcall4, nds32_elf_relax_longcall5): Likewise. (nds32_elf_relax_longcall6, nds32_elf_relax_longjump4): Likewise. (nds32_elf_relax_longjump5, nds32_elf_relax_longjump6): Likewise. (nds32_elf_relax_longjump7, nds32_elf_relax_loadstore): Likewise. (nds32_elf_relax_ptr, nds32_elf_ex9_build_hash_table): Likewise. * elf32-nios2.c (nios2_elf32_relocate_section): Likewise. * elf32-rx.c (UNSAFE_FOR_PID): Likewise. * elf32-s390.c (invalid_tls_insn, elf_s390_relocate_section): Likewise. * elf32-score.c (s3_bfd_score_elf_check_relocs): Likewise. * elf32-score7.c (s7_bfd_score_elf_check_relocs): Likewise. * elf32-sh.c (sh_elf_relax_section): Likewise. (sh_elf_relax_delete_bytes, sh_elf_swap_insns): Likewise. (sh_elf_relocate_section): Likewise. * elf32-sh64.c (shmedia_prepare_reloc): Likewise. * elf32-spu.c (spu_elf_relocate_section): Likewise. * elf32-tic6x.c (elf32_tic6x_relocate_section): Likewise. * elf32-tilepro.c (tilepro_elf_relocate_section): Likewise. * elf32-v850.c (v850_elf_relax_section): Likewise. * elf32-vax.c (elf_vax_check_relocs): Likewise. (elf_vax_relocate_section): Likewise. * elf32-xtensa.c (elf_xtensa_relocate_section): Likewise. (extend_ebb_bounds_forward, extend_ebb_bounds_backward): Likewise. (compute_text_actions, compute_ebb_proposed_actions): Likewise. (do_fix_for_relocatable_link): Likewise. * elf64-alpha.c (elf64_alpha_relax_got_load): Likewise. (elf64_alpha_relax_with_lituse): Likewise. * elf64-hppa.c (elf64_hppa_finish_dynamic_symbol): Likewise. (elf_hppa_final_link_relocate): Likewise. * elf64-ia64-vms.c (elf64_ia64_relax_section): Likewise. (elf64_ia64_choose_gp, elf64_ia64_relocate_section): Likewise. (elf64_vms_link_add_object_symbols): Likewise. * elf64-mmix.c (mmix_elf_perform_relocation): Likewise. (mmix_final_link_relocate): Likewise. * elf64-s390.c (invalid_tls_insn): Likewise. (elf_s390_relocate_section): Likewise. * elf64-sh64.c (sh_elf64_relocate_section): Likewise. * elf64-x86-64.c (elf_x86_64_tls_transition): Likewise. (elf_x86_64_relocate_section): Likewise. * elfcode.h (elf_slurp_symbol_table): Likewise. * elfcore.h (elf_core_file_p): Likewise. * elflink.c (elf_link_read_relocs_from_section): Likewise. * elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. * elfnn-ia64.c (elfNN_ia64_relax_section): Likewise. (elfNN_ia64_choose_gp, elfNN_ia64_relocate_section): Likewise. * elfnn-riscv.c (riscv_elf_relocate_section): Likewise. * elfxx-mips.c (_bfd_mips_elf_check_relocs): Likewise. (_bfd_mips_elf_relocate_section): Likewise. (_bfd_mips_elf_finish_dynamic_symbol, mips_finish_exec_plt): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_relocate_section): Likewise. * elfxx-tilegx.c (tilegx_elf_relocate_section): Likewise. * ieee.c (ieee_slurp_external_symbols): Likewise. * ihex.c (ihex_write_object_content): Likewise. * mach-o.c (bfd_mach_o_build_exec_seg_command): Likewise. * merge.c (_bfd_merged_section_offset): Likewise. * mmo.c (mmo_write_loc_chunk): Likewise. (mmo_write_object_contents): Likewise. * peXXigen.c (_bfd_XX_bfd_copy_private_bfd_data_common): Likewise. * stabs.c (_bfd_link_section_stabs): Likewise. * xcofflink.c (xcoff_link_add_symbols, xcoff_find_tc0): Likewise. ld/ * testsuite/ld-arc/nps-1b.err: Update. * testsuite/ld-x86-64/ilp32-11.d: Update.
2017-07-09 15:41:32 +02:00
unsigned int r_symndx;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
unsigned int r_type;
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
bfd_reloc_code_real_type bfd_r_type;
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
Elf_Internal_Sym *isym;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
r_symndx = ELFNN_R_SYM (rel->r_info);
r_type = ELFNN_R_TYPE (rel->r_info);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
if (r_symndx >= NUM_SHDR_ENTRIES (symtab_hdr))
{
Add c-format tags to translatable strings with more than one argument-using formatting token. * aout-adobe.c: Add missing c-format tags for translatable strings. * aout-cris.c: Likewise. * aoutx.h: Likewise. * bfd.c: Likewise. * binary.c: Likewise. * cache.c: Likewise. * coff-alpha.c: Likewise. * coff-arm.c: Likewise. * coff-i860.c: Likewise. * coff-mcore.c: Likewise. * coff-ppc.c: Likewise. * coff-rs6000.c: Likewise. * coff-sh.c: Likewise. * coff-tic4x.c: Likewise. * coff-tic54x.c: Likewise. * coff-tic80.c: Likewise. * coff64-rs6000.c: Likewise. * coffcode.h: Likewise. * coffgen.c: Likewise. * cofflink.c: Likewise. * coffswap.h: Likewise. * cpu-arm.c: Likewise. * dwarf2.c: Likewise. * ecoff.c: Likewise. * elf-attrs.c: Likewise. * elf-eh-frame.c: Likewise. * elf-ifunc.c: Likewise. * elf-m10300.c: Likewise. * elf-s390-common.c: Likewise. * elf.c: Likewise. * elf32-arc.c: Likewise. * elf32-arm.c: Likewise. * elf32-avr.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-d10v.c: Likewise. * elf32-d30v.c: Likewise. * elf32-epiphany.c: Likewise. * elf32-fr30.c: Likewise. * elf32-frv.c: Likewise. * elf32-gen.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i370.c: Likewise. * elf32-i386.c: Likewise. * elf32-i960.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-lm32.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m32r.c: Likewise. * elf32-m68hc11.c: Likewise. * elf32-m68hc12.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mcore.c: Likewise. * elf32-mep.c: Likewise. * elf32-metag.c: Likewise. * elf32-microblaze.c: Likewise. * elf32-moxie.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-nds32.c: Likewise. * elf32-nios2.c: Likewise. * elf32-or1k.c: Likewise. * elf32-pj.c: Likewise. * elf32-ppc.c: Likewise. * elf32-rl78.c: Likewise. * elf32-rx.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-sh-symbian.c: Likewise. * elf32-sh.c: Likewise. * elf32-sh64.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-tilepro.c: Likewise. * elf32-v850.c: Likewise. * elf32-vax.c: Likewise. * elf32-visium.c: Likewise. * elf32-xgate.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-gen.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-mmix.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-sh64.c: Likewise. * elf64-sparc.c: Likewise. * elf64-x86-64.c: Likewise. * elfcode.h: Likewise. * elfcore.h: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * ieee.c: Likewise. * ihex.c: Likewise. * libbfd.c: Likewise. * linker.c: Likewise. * m68klinux.c: Likewise. * mach-o.c: Likewise. * merge.c: Likewise. * mmo.c: Likewise. * oasys.c: Likewise. * pdp11.c: Likewise. * pe-mips.c: Likewise. * peXXigen.c: Likewise. * pei-x86_64.c: Likewise. * peicode.h: Likewise. * ppcboot.c: Likewise. * reloc.c: Likewise. * sparclinux.c: Likewise. * srec.c: Likewise. * stabs.c: Likewise. * vms-alpha.c: Likewise. * vms-lib.c: Likewise. * xcofflink.c: Likewise.
2016-10-19 15:04:34 +02:00
/* xgettext:c-format */
Use %pA and %pB in messages rather than %A and %B First step towards compiler verification of _bfd_error_handler arguments, and better verification of translated messages. bfd/ * bfd.c (_bfd_doprnt, _bfd_doprnt_scan): Handle %pA and %pB in place of %A and %B. * aout-adobe.c: Update all messages using %A and %B. * aout-cris.c: Likewise. * aoutx.h: Likewise. * archive.c: Likewise. * binary.c: Likewise. * cache.c: Likewise. * coff-alpha.c: Likewise. * coff-arm.c: Likewise. * coff-i860.c: Likewise. * coff-mcore.c: Likewise. * coff-ppc.c: Likewise. * coff-rs6000.c: Likewise. * coff-sh.c: Likewise. * coff-tic4x.c: Likewise. * coff-tic54x.c: Likewise. * coff-tic80.c: Likewise. * coff64-rs6000.c: Likewise. * coffcode.h: Likewise. * coffgen.c: Likewise. * cofflink.c: Likewise. * coffswap.h: Likewise. * compress.c: Likewise. * cpu-arm.c: Likewise. * ecoff.c: Likewise. * elf-attrs.c: Likewise. * elf-eh-frame.c: Likewise. * elf-ifunc.c: Likewise. * elf-m10300.c: Likewise. * elf-properties.c: Likewise. * elf-s390-common.c: Likewise. * elf.c: Likewise. * elf32-arc.c: Likewise. * elf32-arm.c: Likewise. * elf32-avr.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-d10v.c: Likewise. * elf32-d30v.c: Likewise. * elf32-epiphany.c: Likewise. * elf32-fr30.c: Likewise. * elf32-frv.c: Likewise. * elf32-gen.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i370.c: Likewise. * elf32-i386.c: Likewise. * elf32-i960.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-lm32.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m32r.c: Likewise. * elf32-m68hc11.c: Likewise. * elf32-m68hc12.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mcore.c: Likewise. * elf32-mep.c: Likewise. * elf32-metag.c: Likewise. * elf32-microblaze.c: Likewise. * elf32-moxie.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-nds32.c: Likewise. * elf32-nios2.c: Likewise. * elf32-or1k.c: Likewise. * elf32-pj.c: Likewise. * elf32-ppc.c: Likewise. * elf32-rl78.c: Likewise. * elf32-rx.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-sh-symbian.c: Likewise. * elf32-sh.c: Likewise. * elf32-sh64.c: Likewise. * elf32-sparc.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-tilepro.c: Likewise. * elf32-v850.c: Likewise. * elf32-vax.c: Likewise. * elf32-visium.c: Likewise. * elf32-wasm32.c: Likewise. * elf32-xgate.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-gen.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-mmix.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-sh64.c: Likewise. * elf64-sparc.c: Likewise. * elf64-x86-64.c: Likewise. * elfcode.h: Likewise. * elfcore.h: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * elfnn-riscv.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * elfxx-x86.c: Likewise. * hpux-core.c: Likewise. * ieee.c: Likewise. * ihex.c: Likewise. * libbfd.c: Likewise. * linker.c: Likewise. * mach-o.c: Likewise. * merge.c: Likewise. * mmo.c: Likewise. * oasys.c: Likewise. * pdp11.c: Likewise. * pe-mips.c: Likewise. * peXXigen.c: Likewise. * peicode.h: Likewise. * reloc.c: Likewise. * rs6000-core.c: Likewise. * srec.c: Likewise. * stabs.c: Likewise. * vms-alpha.c: Likewise. * xcofflink.c: Likewise. ld/ * ldmisc.c (vfinfo): Handle %pA and %pB in place of %A and %B. * ldcref.c: Update all messages using %A and %B. * ldexp.c: Likewise. * ldlang.c: Likewise. * ldmain.c: Likewise. * ldmisc.c: Likewise. * pe-dll.c: Likewise. * plugin.c: Likewise. * emultempl/beos.em: Likewise. * emultempl/cr16elf.em: Likewise. * emultempl/elf32.em: Likewise. * emultempl/m68kcoff.em: Likewise. * emultempl/m68kelf.em: Likewise. * emultempl/mmo.em: Likewise. * emultempl/nds32elf.em: Likewise. * emultempl/pe.em: Likewise. * emultempl/pep.em: Likewise. * emultempl/spuelf.em: Likewise. * emultempl/sunos.em: Likewise. * emultempl/xtensaelf.em: Likewise.
2018-02-19 05:51:40 +01:00
_bfd_error_handler (_("%pB: bad symbol index: %d"), abfd, r_symndx);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
return FALSE;
}
Remove some dead code from elf64_aarch64_check_relocs. bfd/ChangeLog: 2013-04-25 Will Newton <will.newton@linaro.org> * elf64-aarch64.c (elf64_aarch64_check_relocs): Remove dead code.
2013-04-26 11:18:43 +02:00
if (r_symndx < symtab_hdr->sh_info)
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
{
/* A local symbol. */
isym = bfd_sym_from_r_symndx (&htab->sym_cache,
abfd, r_symndx);
if (isym == NULL)
return FALSE;
/* Check relocation against local STT_GNU_IFUNC symbol. */
if (ELF_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
{
h = elfNN_aarch64_get_local_sym_hash (htab, abfd, rel,
TRUE);
if (h == NULL)
return FALSE;
/* Fake a STT_GNU_IFUNC symbol. */
h->type = STT_GNU_IFUNC;
h->def_regular = 1;
h->ref_regular = 1;
h->forced_local = 1;
h->root.type = bfd_link_hash_defined;
}
else
h = NULL;
}
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
else
{
h = sym_hashes[r_symndx - symtab_hdr->sh_info];
while (h->root.type == bfd_link_hash_indirect
|| h->root.type == bfd_link_hash_warning)
h = (struct elf_link_hash_entry *) h->root.u.i.link;
}
/* Could be done earlier, if h were already available. */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
bfd_r_type = aarch64_tls_transition (abfd, info, r_type, h, r_symndx);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
if (h != NULL)
{
[AArch64] Create .got section if _GLOBAL_OFFSET_TABLE_ referenced 2016-03-07 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (elfNN_aarch64_check_relocs): Always create .got section if the symbol "_GLOBAL_OFFSET_TABLE_" referenced. ld/ * testsuite/ld-aarch64/implicit_got_section_1.s: New test source file. * testsuite/ld-aarch64/implicit_got_section_1.d: New test expected result. * testsuite/ld-aarch64/aarch64-elf.exp: Run new test.
2016-03-07 16:40:50 +01:00
/* If a relocation refers to _GLOBAL_OFFSET_TABLE_, create the .got.
This shows up in particular in an R_AARCH64_PREL64 in large model
when calculating the pc-relative address to .got section which is
used to initialize the gp register. */
if (h->root.root.string
&& strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0)
{
if (htab->root.dynobj == NULL)
htab->root.dynobj = abfd;
if (! aarch64_elf_create_got_section (htab->root.dynobj, info))
return FALSE;
BFD_ASSERT (h == htab->root.hgot);
}
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
/* Create the ifunc sections for static executables. If we
never see an indirect function symbol nor we are building
a static executable, those sections will be empty and
won't appear in output. */
switch (bfd_r_type)
{
default:
break;
[AArch64/BFD] Sort relocation case labels alphabetically 2015-05-19 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_tls_transition_without_check): Sort relocation case labels alphabetically. (elfNN_aarch64_final_link_relocate): Ditto. (elfNN_aarch64_tls_relax): Ditto. (elfNN_aarch64_relocate_section): Ditto. (elfNN_aarch64_gc_sweep_hook): Ditto. (elfNN_aarch64_check_relocs): Ditto. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Ditto. (_bfd_aarch64_elf_resolve_relocation): Ditto.
2015-05-20 11:58:43 +02:00
case BFD_RELOC_AARCH64_ADD_LO12:
case BFD_RELOC_AARCH64_ADR_GOT_PAGE:
case BFD_RELOC_AARCH64_ADR_HI21_PCREL:
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
case BFD_RELOC_AARCH64_CALL26:
[AArch64/BFD] Sort relocation case labels alphabetically 2015-05-19 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_tls_transition_without_check): Sort relocation case labels alphabetically. (elfNN_aarch64_final_link_relocate): Ditto. (elfNN_aarch64_tls_relax): Ditto. (elfNN_aarch64_relocate_section): Ditto. (elfNN_aarch64_gc_sweep_hook): Ditto. (elfNN_aarch64_check_relocs): Ditto. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Ditto. (_bfd_aarch64_elf_resolve_relocation): Ditto.
2015-05-20 11:58:43 +02:00
case BFD_RELOC_AARCH64_GOT_LD_PREL19:
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
case BFD_RELOC_AARCH64_JUMP26:
[AArch64] BFD support BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14 This patch add BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14 relocation supoprt in bfd linker. 2015-06-01 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_reloc_got_type): Support BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14. (elfNN_aarch64_final_link_relocate): Ditto. (elfNN_aarch64_gc_swap_hook): Ditto. (elfNN_aarch64_check_relocs): Ditto. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Ditto. ld/testsuite/ * ld-aarch64/emit-relocs-28.s: New test file. * ld-aarch64/emit-relocs-28.d: Ditto. * ld-aarch64/aarch64-elf.exp: Run new test.
2015-06-01 16:45:25 +02:00
case BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14:
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
case BFD_RELOC_AARCH64_LD32_GOT_LO12_NC:
[LD][AARCH64]Add BFD_RELOC_AARCH64_LD64_GOTOFF_LO15 Support. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_reloc_got_type): Add BFD_RELOC_AARCH64_LD_64_GOTOFF_LO15 support. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise (elfNN_aarch64_final_link_relocate): Calculate offset within GOT. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/emit-relocs-310.d: New. * ld-aarch64/emit-relocs-310.s: New. * ld-aarch64/aarch64-elf.exp: Run the test.
2015-10-02 15:51:26 +02:00
case BFD_RELOC_AARCH64_LD64_GOTOFF_LO15:
[AArch64] BFD Support BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15 2015-06-01 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_reloc_got_type): Support BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15. (elfNN_aarch64_final_link_relocate): Ditto. (elfNN_aarch64_gc_swap_hook): Ditto. (elfNN_aarch64_check_relocs): Ditto. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Ditto. ld/testsuite/ * ld-aarch64/emit-relocs-313.s: New test file. * ld-aarch64/emit-relocs-313.d: Ditto. * ld-aarch64/aarch64-elf.exp: Run new test.
2015-06-01 11:26:00 +02:00
case BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15:
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
case BFD_RELOC_AARCH64_LD64_GOT_LO12_NC:
[LD][AARCH64]Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC Support. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_reloc_got_type): Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC support. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/aarch64-elf.exp: Run new test. * ld-aarch64/emit-relocs-301.d: New. * ld-aarch64/emit-relocs-301.s: New.
2015-10-02 16:54:40 +02:00
case BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC:
[LD][AARCH64]Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G1 Support. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_reloc_got_type): Add support for BFD_RELOC_AARCH64_MOVW_GOTOFF_G1. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise (elfNN_aarch64_final_link_relocate): Calculate offset within GOT. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/emit-relocs-302.d: New. * ld-aarch64/emit-relocs-302.s: New. * ld-aarch64/aarch64-elf.exp: Run the new test.
2015-10-02 16:29:41 +02:00
case BFD_RELOC_AARCH64_MOVW_GOTOFF_G1:
[AArch64/BFD] Sort relocation case labels alphabetically 2015-05-19 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_tls_transition_without_check): Sort relocation case labels alphabetically. (elfNN_aarch64_final_link_relocate): Ditto. (elfNN_aarch64_tls_relax): Ditto. (elfNN_aarch64_relocate_section): Ditto. (elfNN_aarch64_gc_sweep_hook): Ditto. (elfNN_aarch64_check_relocs): Ditto. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Ditto. (_bfd_aarch64_elf_resolve_relocation): Ditto.
2015-05-20 11:58:43 +02:00
case BFD_RELOC_AARCH64_NN:
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
if (htab->root.dynobj == NULL)
htab->root.dynobj = abfd;
if (!_bfd_elf_create_ifunc_sections (htab->root.dynobj, info))
return FALSE;
break;
}
Fix AArch64 relocation handling in ILP32 mode. bfd * elfnn-aarch64.c: Fix relaxations for ILP32 mode. ld * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests. * testsuite/ld-aarch64/tls-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-all-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gd-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-3-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-le-ilp32.d: New test.
2017-01-23 18:07:13 +01:00
/* It is referenced by a non-shared object. */
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
h->ref_regular = 1;
}
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
switch (bfd_r_type)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
[BFD][AARCH64]Disallow R_AARCH64_ABS32(LP64) & R_AARCH64_ABS16 in const section of shared object. R_AARCH64_ABS64, R_AARCH64_ABS32 and R_AARCH64_ABS16 are data relocations supported in AArch64 elf ABI. R_AARCH64_ABS64 under LP64 is allowed in shared object and a dynamic relocation entry will be generated. This allows the dynamic linker to do further symbol resolution. R_AARCH64_ABS32 likewise is allowed in shared object, however under ILP32 abi. The original behavior for R_AARCH64_ABS32 under LP64 is that, it's allowed in shared object and silently resolved at static linking time. No dynamic relocation entry is generate for it. R_AARCH64_ABS16 is allowed in shared object under both L64 and ILP32. It's resolved at static linking time as well. Under LP64, the address should be 64-bit. R_AARCH64_ABS32 relocation indicates an address that is only sized 32 bits which is meaningless in LP64 shared object. It's useful to error out. I have checked glibc dynamic linker code, R_AARCH64_ABS16 is not supported at all. So R_AARCH64_ABS16 should be reject in shared object completely. In this patch, R_AARCH64_ABS32 is rejected under LP64 in constant section of shared object. R_AARCH64_ABS16 is rejected in constant section of shared object in both ABI. This will sometimes provide useful information for buggy code.
2017-12-13 13:11:25 +01:00
case BFD_RELOC_AARCH64_16:
#if ARCH_SIZE == 64
case BFD_RELOC_AARCH64_32:
#endif
[PR22764][LD][AARCH64]Allow R_AARCH64_ABS16 and R_AARCH64_ABS32 against absolution symbol or undefine symbol in shared object. The assumption that R_AARCH64_ABS16 and R_AARCH64_ABS32 relocation in LP64 abi will be used to generate an address does not hold for absolute symbol. In this case, it is a value fixed at static linking time. The condition to check the relocations is relax to allow absolute symbol and undefined symbol case. bfd/ 2018-02-05 Renlin Li <renlin.li@arm.com> PR ld/22764 * elfnn-aarch64.c (elfNN_aarch64_check_relocs): Relax the R_AARCH64_ABS32 and R_AARCH64_ABS16 for absolute symbol. Apply the check for writeable section as well. ld/ 2018-02-05 Renlin Li <renlin.li@arm.com> PR ld/22764 * testsuite/ld-aarch64/emit-relocs-258.s: Define symbol as an address. * testsuite/ld-aarch64/emit-relocs-259.s: Likewise. * testsuite/ld-aarch64/aarch64-elf.exp: Run new test. * testsuite/ld-aarch64/pr22764.s: New. * testsuite/ld-aarch64/pr22764.d: New.
2018-02-03 14:18:17 +01:00
if (bfd_link_pic (info) && (sec->flags & SEC_ALLOC) != 0)
[BFD][AARCH64]Disallow R_AARCH64_ABS32(LP64) & R_AARCH64_ABS16 in const section of shared object. R_AARCH64_ABS64, R_AARCH64_ABS32 and R_AARCH64_ABS16 are data relocations supported in AArch64 elf ABI. R_AARCH64_ABS64 under LP64 is allowed in shared object and a dynamic relocation entry will be generated. This allows the dynamic linker to do further symbol resolution. R_AARCH64_ABS32 likewise is allowed in shared object, however under ILP32 abi. The original behavior for R_AARCH64_ABS32 under LP64 is that, it's allowed in shared object and silently resolved at static linking time. No dynamic relocation entry is generate for it. R_AARCH64_ABS16 is allowed in shared object under both L64 and ILP32. It's resolved at static linking time as well. Under LP64, the address should be 64-bit. R_AARCH64_ABS32 relocation indicates an address that is only sized 32 bits which is meaningless in LP64 shared object. It's useful to error out. I have checked glibc dynamic linker code, R_AARCH64_ABS16 is not supported at all. So R_AARCH64_ABS16 should be reject in shared object completely. In this patch, R_AARCH64_ABS32 is rejected under LP64 in constant section of shared object. R_AARCH64_ABS16 is rejected in constant section of shared object in both ABI. This will sometimes provide useful information for buggy code.
2017-12-13 13:11:25 +01:00
{
[PR22764][LD][AARCH64]Allow R_AARCH64_ABS16 and R_AARCH64_ABS32 against absolution symbol or undefine symbol in shared object. The assumption that R_AARCH64_ABS16 and R_AARCH64_ABS32 relocation in LP64 abi will be used to generate an address does not hold for absolute symbol. In this case, it is a value fixed at static linking time. The condition to check the relocations is relax to allow absolute symbol and undefined symbol case. bfd/ 2018-02-05 Renlin Li <renlin.li@arm.com> PR ld/22764 * elfnn-aarch64.c (elfNN_aarch64_check_relocs): Relax the R_AARCH64_ABS32 and R_AARCH64_ABS16 for absolute symbol. Apply the check for writeable section as well. ld/ 2018-02-05 Renlin Li <renlin.li@arm.com> PR ld/22764 * testsuite/ld-aarch64/emit-relocs-258.s: Define symbol as an address. * testsuite/ld-aarch64/emit-relocs-259.s: Likewise. * testsuite/ld-aarch64/aarch64-elf.exp: Run new test. * testsuite/ld-aarch64/pr22764.s: New. * testsuite/ld-aarch64/pr22764.d: New.
2018-02-03 14:18:17 +01:00
if (h != NULL
/* This is an absolute symbol. It represents a value instead
of an address. */
BFD: Use `bfd_is_abs_symbol' to determine whether a symbol is absolute Use `bfd_is_abs_symbol' to determine whether a symbol is absolute, avoiding a problem with ordinary symbols defined in a linker script outside an output section definition. Such symbols have its owning section set to the absolute section up to the final link phase. A flag has been added to the link hash to identify such symbols. Rather than checking the flag by hand, use the macro that does it uniformly for all users. bfd/ * elf32-nds32.c (nds32_elf_relax_loadstore): Use `bfd_is_abs_symbol' rather than `bfd_is_abs_section' in checking whether the symbol is absolute. (nds32_elf_relax_lo12): Likewise. * elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_check_relocs): Likewise. * xcofflink.c (xcoff_need_ldrel_p): Likewise. (bfd_xcoff_import_symbol): Likewise. (xcoff_write_global_symbol): Likewise.
2018-07-17 21:04:53 +02:00
&& (bfd_is_abs_symbol (&h->root)
[PR22764][LD][AARCH64]Allow R_AARCH64_ABS16 and R_AARCH64_ABS32 against absolution symbol or undefine symbol in shared object. The assumption that R_AARCH64_ABS16 and R_AARCH64_ABS32 relocation in LP64 abi will be used to generate an address does not hold for absolute symbol. In this case, it is a value fixed at static linking time. The condition to check the relocations is relax to allow absolute symbol and undefined symbol case. bfd/ 2018-02-05 Renlin Li <renlin.li@arm.com> PR ld/22764 * elfnn-aarch64.c (elfNN_aarch64_check_relocs): Relax the R_AARCH64_ABS32 and R_AARCH64_ABS16 for absolute symbol. Apply the check for writeable section as well. ld/ 2018-02-05 Renlin Li <renlin.li@arm.com> PR ld/22764 * testsuite/ld-aarch64/emit-relocs-258.s: Define symbol as an address. * testsuite/ld-aarch64/emit-relocs-259.s: Likewise. * testsuite/ld-aarch64/aarch64-elf.exp: Run new test. * testsuite/ld-aarch64/pr22764.s: New. * testsuite/ld-aarch64/pr22764.d: New.
2018-02-03 14:18:17 +01:00
/* This is an undefined symbol. */
|| h->root.type == bfd_link_hash_undefined))
break;
/* For local symbols, defined global symbols in a non-ABS section,
it is assumed that the value is an address. */
[BFD][AARCH64]Disallow R_AARCH64_ABS32(LP64) & R_AARCH64_ABS16 in const section of shared object. R_AARCH64_ABS64, R_AARCH64_ABS32 and R_AARCH64_ABS16 are data relocations supported in AArch64 elf ABI. R_AARCH64_ABS64 under LP64 is allowed in shared object and a dynamic relocation entry will be generated. This allows the dynamic linker to do further symbol resolution. R_AARCH64_ABS32 likewise is allowed in shared object, however under ILP32 abi. The original behavior for R_AARCH64_ABS32 under LP64 is that, it's allowed in shared object and silently resolved at static linking time. No dynamic relocation entry is generate for it. R_AARCH64_ABS16 is allowed in shared object under both L64 and ILP32. It's resolved at static linking time as well. Under LP64, the address should be 64-bit. R_AARCH64_ABS32 relocation indicates an address that is only sized 32 bits which is meaningless in LP64 shared object. It's useful to error out. I have checked glibc dynamic linker code, R_AARCH64_ABS16 is not supported at all. So R_AARCH64_ABS16 should be reject in shared object completely. In this patch, R_AARCH64_ABS32 is rejected under LP64 in constant section of shared object. R_AARCH64_ABS16 is rejected in constant section of shared object in both ABI. This will sometimes provide useful information for buggy code.
2017-12-13 13:11:25 +01:00
int howto_index = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
_bfd_error_handler
/* xgettext:c-format */
Use %pA and %pB in messages rather than %A and %B First step towards compiler verification of _bfd_error_handler arguments, and better verification of translated messages. bfd/ * bfd.c (_bfd_doprnt, _bfd_doprnt_scan): Handle %pA and %pB in place of %A and %B. * aout-adobe.c: Update all messages using %A and %B. * aout-cris.c: Likewise. * aoutx.h: Likewise. * archive.c: Likewise. * binary.c: Likewise. * cache.c: Likewise. * coff-alpha.c: Likewise. * coff-arm.c: Likewise. * coff-i860.c: Likewise. * coff-mcore.c: Likewise. * coff-ppc.c: Likewise. * coff-rs6000.c: Likewise. * coff-sh.c: Likewise. * coff-tic4x.c: Likewise. * coff-tic54x.c: Likewise. * coff-tic80.c: Likewise. * coff64-rs6000.c: Likewise. * coffcode.h: Likewise. * coffgen.c: Likewise. * cofflink.c: Likewise. * coffswap.h: Likewise. * compress.c: Likewise. * cpu-arm.c: Likewise. * ecoff.c: Likewise. * elf-attrs.c: Likewise. * elf-eh-frame.c: Likewise. * elf-ifunc.c: Likewise. * elf-m10300.c: Likewise. * elf-properties.c: Likewise. * elf-s390-common.c: Likewise. * elf.c: Likewise. * elf32-arc.c: Likewise. * elf32-arm.c: Likewise. * elf32-avr.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-d10v.c: Likewise. * elf32-d30v.c: Likewise. * elf32-epiphany.c: Likewise. * elf32-fr30.c: Likewise. * elf32-frv.c: Likewise. * elf32-gen.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i370.c: Likewise. * elf32-i386.c: Likewise. * elf32-i960.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-lm32.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m32r.c: Likewise. * elf32-m68hc11.c: Likewise. * elf32-m68hc12.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mcore.c: Likewise. * elf32-mep.c: Likewise. * elf32-metag.c: Likewise. * elf32-microblaze.c: Likewise. * elf32-moxie.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-nds32.c: Likewise. * elf32-nios2.c: Likewise. * elf32-or1k.c: Likewise. * elf32-pj.c: Likewise. * elf32-ppc.c: Likewise. * elf32-rl78.c: Likewise. * elf32-rx.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-sh-symbian.c: Likewise. * elf32-sh.c: Likewise. * elf32-sh64.c: Likewise. * elf32-sparc.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-tilepro.c: Likewise. * elf32-v850.c: Likewise. * elf32-vax.c: Likewise. * elf32-visium.c: Likewise. * elf32-wasm32.c: Likewise. * elf32-xgate.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-gen.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-mmix.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-sh64.c: Likewise. * elf64-sparc.c: Likewise. * elf64-x86-64.c: Likewise. * elfcode.h: Likewise. * elfcore.h: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * elfnn-riscv.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * elfxx-x86.c: Likewise. * hpux-core.c: Likewise. * ieee.c: Likewise. * ihex.c: Likewise. * libbfd.c: Likewise. * linker.c: Likewise. * mach-o.c: Likewise. * merge.c: Likewise. * mmo.c: Likewise. * oasys.c: Likewise. * pdp11.c: Likewise. * pe-mips.c: Likewise. * peXXigen.c: Likewise. * peicode.h: Likewise. * reloc.c: Likewise. * rs6000-core.c: Likewise. * srec.c: Likewise. * stabs.c: Likewise. * vms-alpha.c: Likewise. * xcofflink.c: Likewise. ld/ * ldmisc.c (vfinfo): Handle %pA and %pB in place of %A and %B. * ldcref.c: Update all messages using %A and %B. * ldexp.c: Likewise. * ldlang.c: Likewise. * ldmain.c: Likewise. * ldmisc.c: Likewise. * pe-dll.c: Likewise. * plugin.c: Likewise. * emultempl/beos.em: Likewise. * emultempl/cr16elf.em: Likewise. * emultempl/elf32.em: Likewise. * emultempl/m68kcoff.em: Likewise. * emultempl/m68kelf.em: Likewise. * emultempl/mmo.em: Likewise. * emultempl/nds32elf.em: Likewise. * emultempl/pe.em: Likewise. * emultempl/pep.em: Likewise. * emultempl/spuelf.em: Likewise. * emultempl/sunos.em: Likewise. * emultempl/xtensaelf.em: Likewise.
2018-02-19 05:51:40 +01:00
(_("%pB: relocation %s against `%s' can not be used when making "
[BFD][AARCH64]Disallow R_AARCH64_ABS32(LP64) & R_AARCH64_ABS16 in const section of shared object. R_AARCH64_ABS64, R_AARCH64_ABS32 and R_AARCH64_ABS16 are data relocations supported in AArch64 elf ABI. R_AARCH64_ABS64 under LP64 is allowed in shared object and a dynamic relocation entry will be generated. This allows the dynamic linker to do further symbol resolution. R_AARCH64_ABS32 likewise is allowed in shared object, however under ILP32 abi. The original behavior for R_AARCH64_ABS32 under LP64 is that, it's allowed in shared object and silently resolved at static linking time. No dynamic relocation entry is generate for it. R_AARCH64_ABS16 is allowed in shared object under both L64 and ILP32. It's resolved at static linking time as well. Under LP64, the address should be 64-bit. R_AARCH64_ABS32 relocation indicates an address that is only sized 32 bits which is meaningless in LP64 shared object. It's useful to error out. I have checked glibc dynamic linker code, R_AARCH64_ABS16 is not supported at all. So R_AARCH64_ABS16 should be reject in shared object completely. In this patch, R_AARCH64_ABS32 is rejected under LP64 in constant section of shared object. R_AARCH64_ABS16 is rejected in constant section of shared object in both ABI. This will sometimes provide useful information for buggy code.
2017-12-13 13:11:25 +01:00
"a shared object"),
abfd, elfNN_aarch64_howto_table[howto_index].name,
(h) ? h->root.root.string : "a local symbol");
bfd_set_error (bfd_error_bad_value);
return FALSE;
}
else
break;
[AArch64] Allow COPY relocation elimination As discussed at the PR, this patch tries to avoid COPY relocation generation and propagate the original relocation into runtime if it was relocating on writable section. The ELIMINATE_COPY_RELOCS has been set to true and it's underlying infrastructure has been improved so that the COPY reloc elimination at least working on absoluate relocations (ABS64) on AArch64. BFD linker copy relocation elimination framwork requires the backend to always allocate dynrelocs for all those relocation types that are possible to introduce copy relocations. This is for adjust_dynamic_symbol hook to be able to get all symbol reference information. Should one symbol is referenced by more than one relocations, if there is any of them needs copy relocation then linker should generate it. bfd/ PR ld/21532 * elfnn-aarch64.c (ELIMINATE_COPY_RELOCS): Set to 1. (elfNN_aarch64_final_link_relocate): Also propagate relocations to runtime for if there needs copy relocation elimination. (need_copy_relocation_p): New function. Return true for symbol with pc-relative references and if it's against read-only sections. (elfNN_aarch64_adjust_dynamic_symbol): Use need_copy_relocation_p. (elfNN_aarch64_check_relocs): Allocate dynrelocs for relocation types that are related with accessing external objects. (elfNN_aarch64_gc_sweep_hook): Sync the relocation types with the change in elfNN_aarch64_check_relocs. ld/ * testsuite/ld-aarch64/copy-reloc-exe-2.s: New test source file. * testsuite/ld-aarch64/copy-reloc-2.d: New test. * testsuite/ld-aarch64/copy-reloc-exe-eliminate.s: New test source file. * testsuite/ld-aarch64/copy-reloc-eliminate.d: New test. * testsuite/ld-aarch64/copy-reloc-so.s: Define new global objects. * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests.
2017-06-15 17:51:01 +02:00
case BFD_RELOC_AARCH64_MOVW_G0_NC:
case BFD_RELOC_AARCH64_MOVW_G1_NC:
case BFD_RELOC_AARCH64_MOVW_G2_NC:
case BFD_RELOC_AARCH64_MOVW_G3:
if (bfd_link_pic (info))
{
int howto_index = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
_bfd_error_handler
/* xgettext:c-format */
Use %pA and %pB in messages rather than %A and %B First step towards compiler verification of _bfd_error_handler arguments, and better verification of translated messages. bfd/ * bfd.c (_bfd_doprnt, _bfd_doprnt_scan): Handle %pA and %pB in place of %A and %B. * aout-adobe.c: Update all messages using %A and %B. * aout-cris.c: Likewise. * aoutx.h: Likewise. * archive.c: Likewise. * binary.c: Likewise. * cache.c: Likewise. * coff-alpha.c: Likewise. * coff-arm.c: Likewise. * coff-i860.c: Likewise. * coff-mcore.c: Likewise. * coff-ppc.c: Likewise. * coff-rs6000.c: Likewise. * coff-sh.c: Likewise. * coff-tic4x.c: Likewise. * coff-tic54x.c: Likewise. * coff-tic80.c: Likewise. * coff64-rs6000.c: Likewise. * coffcode.h: Likewise. * coffgen.c: Likewise. * cofflink.c: Likewise. * coffswap.h: Likewise. * compress.c: Likewise. * cpu-arm.c: Likewise. * ecoff.c: Likewise. * elf-attrs.c: Likewise. * elf-eh-frame.c: Likewise. * elf-ifunc.c: Likewise. * elf-m10300.c: Likewise. * elf-properties.c: Likewise. * elf-s390-common.c: Likewise. * elf.c: Likewise. * elf32-arc.c: Likewise. * elf32-arm.c: Likewise. * elf32-avr.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-d10v.c: Likewise. * elf32-d30v.c: Likewise. * elf32-epiphany.c: Likewise. * elf32-fr30.c: Likewise. * elf32-frv.c: Likewise. * elf32-gen.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i370.c: Likewise. * elf32-i386.c: Likewise. * elf32-i960.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-lm32.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m32r.c: Likewise. * elf32-m68hc11.c: Likewise. * elf32-m68hc12.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mcore.c: Likewise. * elf32-mep.c: Likewise. * elf32-metag.c: Likewise. * elf32-microblaze.c: Likewise. * elf32-moxie.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-nds32.c: Likewise. * elf32-nios2.c: Likewise. * elf32-or1k.c: Likewise. * elf32-pj.c: Likewise. * elf32-ppc.c: Likewise. * elf32-rl78.c: Likewise. * elf32-rx.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-sh-symbian.c: Likewise. * elf32-sh.c: Likewise. * elf32-sh64.c: Likewise. * elf32-sparc.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-tilepro.c: Likewise. * elf32-v850.c: Likewise. * elf32-vax.c: Likewise. * elf32-visium.c: Likewise. * elf32-wasm32.c: Likewise. * elf32-xgate.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-gen.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-mmix.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-sh64.c: Likewise. * elf64-sparc.c: Likewise. * elf64-x86-64.c: Likewise. * elfcode.h: Likewise. * elfcore.h: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * elfnn-riscv.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * elfxx-x86.c: Likewise. * hpux-core.c: Likewise. * ieee.c: Likewise. * ihex.c: Likewise. * libbfd.c: Likewise. * linker.c: Likewise. * mach-o.c: Likewise. * merge.c: Likewise. * mmo.c: Likewise. * oasys.c: Likewise. * pdp11.c: Likewise. * pe-mips.c: Likewise. * peXXigen.c: Likewise. * peicode.h: Likewise. * reloc.c: Likewise. * rs6000-core.c: Likewise. * srec.c: Likewise. * stabs.c: Likewise. * vms-alpha.c: Likewise. * xcofflink.c: Likewise. ld/ * ldmisc.c (vfinfo): Handle %pA and %pB in place of %A and %B. * ldcref.c: Update all messages using %A and %B. * ldexp.c: Likewise. * ldlang.c: Likewise. * ldmain.c: Likewise. * ldmisc.c: Likewise. * pe-dll.c: Likewise. * plugin.c: Likewise. * emultempl/beos.em: Likewise. * emultempl/cr16elf.em: Likewise. * emultempl/elf32.em: Likewise. * emultempl/m68kcoff.em: Likewise. * emultempl/m68kelf.em: Likewise. * emultempl/mmo.em: Likewise. * emultempl/nds32elf.em: Likewise. * emultempl/pe.em: Likewise. * emultempl/pep.em: Likewise. * emultempl/spuelf.em: Likewise. * emultempl/sunos.em: Likewise. * emultempl/xtensaelf.em: Likewise.
2018-02-19 05:51:40 +01:00
(_("%pB: relocation %s against `%s' can not be used when making "
[AArch64] Allow COPY relocation elimination As discussed at the PR, this patch tries to avoid COPY relocation generation and propagate the original relocation into runtime if it was relocating on writable section. The ELIMINATE_COPY_RELOCS has been set to true and it's underlying infrastructure has been improved so that the COPY reloc elimination at least working on absoluate relocations (ABS64) on AArch64. BFD linker copy relocation elimination framwork requires the backend to always allocate dynrelocs for all those relocation types that are possible to introduce copy relocations. This is for adjust_dynamic_symbol hook to be able to get all symbol reference information. Should one symbol is referenced by more than one relocations, if there is any of them needs copy relocation then linker should generate it. bfd/ PR ld/21532 * elfnn-aarch64.c (ELIMINATE_COPY_RELOCS): Set to 1. (elfNN_aarch64_final_link_relocate): Also propagate relocations to runtime for if there needs copy relocation elimination. (need_copy_relocation_p): New function. Return true for symbol with pc-relative references and if it's against read-only sections. (elfNN_aarch64_adjust_dynamic_symbol): Use need_copy_relocation_p. (elfNN_aarch64_check_relocs): Allocate dynrelocs for relocation types that are related with accessing external objects. (elfNN_aarch64_gc_sweep_hook): Sync the relocation types with the change in elfNN_aarch64_check_relocs. ld/ * testsuite/ld-aarch64/copy-reloc-exe-2.s: New test source file. * testsuite/ld-aarch64/copy-reloc-2.d: New test. * testsuite/ld-aarch64/copy-reloc-exe-eliminate.s: New test source file. * testsuite/ld-aarch64/copy-reloc-eliminate.d: New test. * testsuite/ld-aarch64/copy-reloc-so.s: Define new global objects. * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests.
2017-06-15 17:51:01 +02:00
"a shared object; recompile with -fPIC"),
abfd, elfNN_aarch64_howto_table[howto_index].name,
(h) ? h->root.root.string : "a local symbol");
bfd_set_error (bfd_error_bad_value);
return FALSE;
}
/* Fall through. */
case BFD_RELOC_AARCH64_16_PCREL:
case BFD_RELOC_AARCH64_32_PCREL:
case BFD_RELOC_AARCH64_64_PCREL:
case BFD_RELOC_AARCH64_ADD_LO12:
case BFD_RELOC_AARCH64_ADR_HI21_NC_PCREL:
case BFD_RELOC_AARCH64_ADR_HI21_PCREL:
case BFD_RELOC_AARCH64_ADR_LO21_PCREL:
case BFD_RELOC_AARCH64_LDST128_LO12:
case BFD_RELOC_AARCH64_LDST16_LO12:
case BFD_RELOC_AARCH64_LDST32_LO12:
case BFD_RELOC_AARCH64_LDST64_LO12:
case BFD_RELOC_AARCH64_LDST8_LO12:
case BFD_RELOC_AARCH64_LD_LO19_PCREL:
if (h == NULL || bfd_link_pic (info))
break;
/* Fall through. */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
case BFD_RELOC_AARCH64_NN:
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* We don't need to handle relocs into sections not going into
the "real" output. */
if ((sec->flags & SEC_ALLOC) == 0)
break;
if (h != NULL)
{
Add output_type to bfd_link_info The "shared" field in bfd_link_info is set for both DSO and and PIE. There are separate fields for executable and relocatable outputs. This patch adds an "output_type" field: enum output_type { type_unknown = 0, type_executable, type_dll, type_relocatable }; and a "pic" field to bfd_link_info to replace shared, executable and relocatable fields so that we can use the "output_type" field to check for output type and the "pic" field check if output is PIC. Macros, bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie, are provided to check for output features. bfd/ * bfd/aoutx.h: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * bfd/bout.c: Likewise. * bfd/coff-alpha.c: Likewise. * bfd/coff-arm.c: Likewise. * bfd/coff-i386.c: Likewise. * bfd/coff-i960.c: Likewise. * bfd/coff-m68k.c: Likewise. * bfd/coff-mcore.c: Likewise. * bfd/coff-mips.c: Likewise. * bfd/coff-ppc.c: Likewise. * bfd/coff-rs6000.c: Likewise. * bfd/coff-sh.c: Likewise. * bfd/coff-tic80.c: Likewise. * bfd/coff-x86_64.c: Likewise. * bfd/coff64-rs6000.c: Likewise. * bfd/coffgen.c: Likewise. * bfd/cofflink.c: Likewise. * bfd/ecoff.c: Likewise. * bfd/ecofflink.c: Likewise. * bfd/elf-bfd.h: Likewise. * bfd/elf-eh-frame.c: Likewise. * bfd/elf-ifunc.c: Likewise. * bfd/elf-m10200.c: Likewise. * bfd/elf-m10300.c: Likewise. * bfd/elf-s390-common.c: Likewise. * bfd/elf-vxworks.c: Likewise. * bfd/elf.c: Likewise. * bfd/elf32-arm.c: Likewise. * bfd/elf32-avr.c: Likewise. * bfd/elf32-bfin.c: Likewise. * bfd/elf32-cr16.c: Likewise. * bfd/elf32-cr16c.c: Likewise. * bfd/elf32-cris.c: Likewise. * bfd/elf32-crx.c: Likewise. * bfd/elf32-d10v.c: Likewise. * bfd/elf32-dlx.c: Likewise. * bfd/elf32-epiphany.c: Likewise. * bfd/elf32-fr30.c: Likewise. * bfd/elf32-frv.c: Likewise. * bfd/elf32-ft32.c: Likewise. * bfd/elf32-h8300.c: Likewise. * bfd/elf32-hppa.c: Likewise. * bfd/elf32-i370.c: Likewise. * bfd/elf32-i386.c: Likewise. * bfd/elf32-i860.c: Likewise. * bfd/elf32-ip2k.c: Likewise. * bfd/elf32-iq2000.c: Likewise. * bfd/elf32-lm32.c: Likewise. * bfd/elf32-m32c.c: Likewise. * bfd/elf32-m32r.c: Likewise. * bfd/elf32-m68hc11.c: Likewise. * bfd/elf32-m68hc1x.c: Likewise. * bfd/elf32-m68k.c: Likewise. * bfd/elf32-mcore.c: Likewise. * bfd/elf32-mep.c: Likewise. * bfd/elf32-metag.c: Likewise. * bfd/elf32-microblaze.c: Likewise. * bfd/elf32-moxie.c: Likewise. * bfd/elf32-msp430.c: Likewise. * bfd/elf32-mt.c: Likewise. * bfd/elf32-nds32.c: Likewise. * bfd/elf32-nios2.c: Likewise. * bfd/elf32-or1k.c: Likewise. * bfd/elf32-ppc.c: Likewise. * bfd/elf32-rl78.c: Likewise. * bfd/elf32-rx.c: Likewise. * bfd/elf32-s390.c: Likewise. * bfd/elf32-score.c: Likewise. * bfd/elf32-score7.c: Likewise. * bfd/elf32-sh-symbian.c: Likewise. * bfd/elf32-sh.c: Likewise. * bfd/elf32-sh64.c: Likewise. * bfd/elf32-spu.c: Likewise. * bfd/elf32-tic6x.c: Likewise. * bfd/elf32-tilepro.c: Likewise. * bfd/elf32-v850.c: Likewise. * bfd/elf32-vax.c: Likewise. * bfd/elf32-visium.c: Likewise. * bfd/elf32-xc16x.c: Likewise. * bfd/elf32-xstormy16.c: Likewise. * bfd/elf32-xtensa.c: Likewise. * bfd/elf64-alpha.c: Likewise. * bfd/elf64-hppa.c: Likewise. * bfd/elf64-ia64-vms.c: Likewise. * bfd/elf64-mmix.c: Likewise. * bfd/elf64-ppc.c: Likewise. * bfd/elf64-s390.c: Likewise. * bfd/elf64-sh64.c: Likewise. * bfd/elf64-x86-64.c: Likewise. * bfd/elflink.c: Likewise. * bfd/elfnn-aarch64.c: Likewise. * bfd/elfnn-ia64.c: Likewise. * bfd/elfxx-mips.c: Likewise. * bfd/elfxx-sparc.c: Likewise. * bfd/elfxx-tilegx.c: Likewise. * bfd/i386linux.c: Likewise. * bfd/linker.c: Likewise. * bfd/m68klinux.c: Likewise. * bfd/pdp11.c: Likewise. * bfd/pe-mips.c: Likewise. * bfd/peXXigen.c: Likewise. * bfd/reloc.c: Likewise. * bfd/reloc16.c: Likewise. * bfd/sparclinux.c: Likewise. * bfd/sunos.c: Likewise. * bfd/vms-alpha.c: Likewise. * bfd/xcofflink.c: Likewise. include/ * include/bfdlink.h (output_type): New enum. (bfd_link_executable): New macro. (bfd_link_dll): Likewise. (bfd_link_relocatable): Likewise. (bfd_link_pic): Likewise. (bfd_link_pie): Likewise. (bfd_link_info): Remove shared, executable, pie and relocatable. Add output_type and pic. ld/ * ld/ldctor.c: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * ld/ldemul.c: Likewise. * ld/ldfile.c: Likewise. * ld/ldlang.c: Likewise. * ld/ldmain.c: Likewise. * ld/ldwrite.c: Likewise. * ld/lexsup.c: Likewise. * ld/pe-dll.c: Likewise. * ld/plugin.c: Likewise. * ld/emultempl/aarch64elf.em: Likewise. * ld/emultempl/aix.em: Likewise. * ld/emultempl/alphaelf.em: Likewise. * ld/emultempl/armcoff.em: Likewise. * ld/emultempl/armelf.em: Likewise. * ld/emultempl/avrelf.em: Likewise. * ld/emultempl/beos.em: Likewise. * ld/emultempl/cr16elf.em: Likewise. * ld/emultempl/elf-generic.em: Likewise. * ld/emultempl/elf32.em: Likewise. * ld/emultempl/genelf.em: Likewise. * ld/emultempl/generic.em: Likewise. * ld/emultempl/gld960.em: Likewise. * ld/emultempl/gld960c.em: Likewise. * ld/emultempl/hppaelf.em: Likewise. * ld/emultempl/irix.em: Likewise. * ld/emultempl/linux.em: Likewise. * ld/emultempl/lnk960.em: Likewise. * ld/emultempl/m68hc1xelf.em: Likewise. * ld/emultempl/m68kcoff.em: Likewise. * ld/emultempl/m68kelf.em: Likewise. * ld/emultempl/metagelf.em: Likewise. * ld/emultempl/mipself.em: Likewise. * ld/emultempl/mmo.em: Likewise. * ld/emultempl/msp430.em: Likewise. * ld/emultempl/nds32elf.em: Likewise. * ld/emultempl/needrelax.em: Likewise. * ld/emultempl/nios2elf.em: Likewise. * ld/emultempl/pe.em: Likewise. * ld/emultempl/pep.em: Likewise. * ld/emultempl/ppc32elf.em: Likewise. * ld/emultempl/ppc64elf.em: Likewise. * ld/emultempl/sh64elf.em: Likewise. * ld/emultempl/solaris2.em: Likewise. * ld/emultempl/spuelf.em: Likewise. * ld/emultempl/sunos.em: Likewise. * ld/emultempl/tic6xdsbt.em: Likewise. * ld/emultempl/ticoff.em: Likewise. * ld/emultempl/v850elf.em: Likewise. * ld/emultempl/vms.em: Likewise. * ld/emultempl/vxworks.em: Likewise.
2015-08-18 14:51:03 +02:00
if (!bfd_link_pic (info))
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
h->non_got_ref = 1;
h->plt.refcount += 1;
h->pointer_equality_needed = 1;
}
/* No need to do anything if we're not creating a shared
object. */
[AArch64] Allow COPY relocation elimination As discussed at the PR, this patch tries to avoid COPY relocation generation and propagate the original relocation into runtime if it was relocating on writable section. The ELIMINATE_COPY_RELOCS has been set to true and it's underlying infrastructure has been improved so that the COPY reloc elimination at least working on absoluate relocations (ABS64) on AArch64. BFD linker copy relocation elimination framwork requires the backend to always allocate dynrelocs for all those relocation types that are possible to introduce copy relocations. This is for adjust_dynamic_symbol hook to be able to get all symbol reference information. Should one symbol is referenced by more than one relocations, if there is any of them needs copy relocation then linker should generate it. bfd/ PR ld/21532 * elfnn-aarch64.c (ELIMINATE_COPY_RELOCS): Set to 1. (elfNN_aarch64_final_link_relocate): Also propagate relocations to runtime for if there needs copy relocation elimination. (need_copy_relocation_p): New function. Return true for symbol with pc-relative references and if it's against read-only sections. (elfNN_aarch64_adjust_dynamic_symbol): Use need_copy_relocation_p. (elfNN_aarch64_check_relocs): Allocate dynrelocs for relocation types that are related with accessing external objects. (elfNN_aarch64_gc_sweep_hook): Sync the relocation types with the change in elfNN_aarch64_check_relocs. ld/ * testsuite/ld-aarch64/copy-reloc-exe-2.s: New test source file. * testsuite/ld-aarch64/copy-reloc-2.d: New test. * testsuite/ld-aarch64/copy-reloc-exe-eliminate.s: New test source file. * testsuite/ld-aarch64/copy-reloc-eliminate.d: New test. * testsuite/ld-aarch64/copy-reloc-so.s: Define new global objects. * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests.
2017-06-15 17:51:01 +02:00
if (!(bfd_link_pic (info)
/* If on the other hand, we are creating an executable, we
may need to keep relocations for symbols satisfied by a
dynamic library if we manage to avoid copy relocs for the
symbol.
NOTE: Currently, there is no support of copy relocs
elimination on pc-relative relocation types, because there is
no dynamic relocation support for them in glibc. We still
record the dynamic symbol reference for them. This is
because one symbol may be referenced by both absolute
relocation (for example, BFD_RELOC_AARCH64_NN) and
pc-relative relocation. We need full symbol reference
information to make correct decision later in
elfNN_aarch64_adjust_dynamic_symbol. */
|| (ELIMINATE_COPY_RELOCS
&& !bfd_link_pic (info)
&& h != NULL
&& (h->root.type == bfd_link_hash_defweak
|| !h->def_regular))))
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
break;
{
struct elf_dyn_relocs *p;
struct elf_dyn_relocs **head;
[AArch64] Allow COPY relocation elimination As discussed at the PR, this patch tries to avoid COPY relocation generation and propagate the original relocation into runtime if it was relocating on writable section. The ELIMINATE_COPY_RELOCS has been set to true and it's underlying infrastructure has been improved so that the COPY reloc elimination at least working on absoluate relocations (ABS64) on AArch64. BFD linker copy relocation elimination framwork requires the backend to always allocate dynrelocs for all those relocation types that are possible to introduce copy relocations. This is for adjust_dynamic_symbol hook to be able to get all symbol reference information. Should one symbol is referenced by more than one relocations, if there is any of them needs copy relocation then linker should generate it. bfd/ PR ld/21532 * elfnn-aarch64.c (ELIMINATE_COPY_RELOCS): Set to 1. (elfNN_aarch64_final_link_relocate): Also propagate relocations to runtime for if there needs copy relocation elimination. (need_copy_relocation_p): New function. Return true for symbol with pc-relative references and if it's against read-only sections. (elfNN_aarch64_adjust_dynamic_symbol): Use need_copy_relocation_p. (elfNN_aarch64_check_relocs): Allocate dynrelocs for relocation types that are related with accessing external objects. (elfNN_aarch64_gc_sweep_hook): Sync the relocation types with the change in elfNN_aarch64_check_relocs. ld/ * testsuite/ld-aarch64/copy-reloc-exe-2.s: New test source file. * testsuite/ld-aarch64/copy-reloc-2.d: New test. * testsuite/ld-aarch64/copy-reloc-exe-eliminate.s: New test source file. * testsuite/ld-aarch64/copy-reloc-eliminate.d: New test. * testsuite/ld-aarch64/copy-reloc-so.s: Define new global objects. * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests.
2017-06-15 17:51:01 +02:00
int howto_index = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* We must copy these reloc types into the output file.
Create a reloc section in dynobj and make room for
this reloc. */
if (sreloc == NULL)
{
if (htab->root.dynobj == NULL)
htab->root.dynobj = abfd;
sreloc = _bfd_elf_make_dynamic_reloc_section
2013-07-27 Andrew Pinski <apinski@cavium.com> * elfnn-aarch64.c (elfNN_aarch64_check_relocs): Use the correct alignment for _bfd_elf_make_dynamic_reloc_section for ILP32.
2013-07-28 05:29:41 +02:00
(sec, htab->root.dynobj, LOG_FILE_ALIGN, abfd, /*rela? */ TRUE);
Add support for 64-bit ARM architecture: AArch64
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if (sreloc == NULL)
return FALSE;
}
/* If this is a global symbol, we count the number of
relocations we need for this symbol. */
if (h != NULL)
{
ELF: Move dyn_relocs to struct elf_link_hash_entry All ELF backends with shared library support have /* Track dynamic relocs copied for this symbol. */ struct elf_dyn_relocs *dyn_relocs; in symbol hash entry. Move dyn_relocs to struct elf_link_hash_entry to reduce code duplication. PR ld/26067 * elf-bfd.h (elf_link_hash_entry): Add dyn_relocs after size. * elf-s390-common.c (s390_elf_allocate_ifunc_dyn_relocs): Updated. * elf32-arc.c (elf_arc_link_hash_entry): Remove dyn_relocs. (elf_arc_link_hash_newfunc): Updated. * elf32-arm.c (elf32_arm_link_hash_entry): Remove dyn_relocs. (elf32_arm_link_hash_newfunc): Updated. (elf32_arm_copy_indirect_symbol): Likewise. (elf32_arm_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs_for_symbol): Likewise. * elf32-csky.c (csky_elf_link_hash_entry): Remove dyn_relocs. (csky_elf_link_hash_newfunc): Updated. (csky_allocate_dynrelocs): Likewise. (readonly_dynrelocs): Likewise. (csky_elf_copy_indirect_symbol): Likewise. * elf32-hppa.c (elf32_hppa_link_hash_entry): Remove dyn_relocs. (hppa_link_hash_newfunc): Updated. (elf32_hppa_copy_indirect_symbol): Likewise. (elf32_hppa_hide_symbol): Likewise. (elf32_hppa_adjust_dynamic_symbol): Likewise. (allocate_dynrelocs): Likewise. (elf32_hppa_relocate_section): Likewise. * elf32-i386.c (elf_i386_check_relocs): Likewise. * elf32-lm32.c (elf_lm32_link_hash_entry): Removed. (lm32_elf_link_hash_newfunc): Likewise. (lm32_elf_link_hash_table_create): Updated. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. (lm32_elf_copy_indirect_symbol): Likewise. * elf32-m32r.c (elf_m32r_link_hash_entry): Removed. (m32r_elf_link_hash_newfunc): Likewise. (m32r_elf_link_hash_table_create): Updated. (m32r_elf_copy_indirect_symbol): Likewise. (allocate_dynrelocs): Likewise. * elf32-metag.c (elf_metag_link_hash_entry): Remove dyn_relocs. (metag_link_hash_newfunc): Updated. (elf_metag_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elf32-microblaze.c (elf32_mb_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (microblaze_elf_check_relocs): Likewise. (microblaze_elf_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elf32-nds32.c (elf_nds32_link_hash_entry): Remove dyn_relocs. (nds32_elf_link_hash_newfunc): Updated. (nds32_elf_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. (nds32_elf_check_relocs): Likewise. * elf32-nios2.c (elf32_nios2_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (nios2_elf32_copy_indirect_symbol): Likewise. (nios2_elf32_check_relocs): Likewise. (allocate_dynrelocs): Likewise. * elf32-or1k.c (elf_or1k_link_hash_entry): Remove dyn_relocs. (or1k_elf_link_hash_newfunc): Updated. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. (or1k_elf_copy_indirect_symbol): Likewise. * elf32-ppc.c (ppc_elf_link_hash_entry): Remove dyn_relocs. (ppc_elf_link_hash_newfunc): Updated. (ppc_elf_copy_indirect_symbol): Likewise. (ppc_elf_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (ppc_elf_adjust_dynamic_symbol): Likewise. (allocate_dynrelocs): Likewise. (ppc_elf_relocate_section): Likewise. * elf32-s390.c (elf_s390_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (elf_s390_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (elf_s390_adjust_dynamic_symbol): Likewise. (allocate_dynrelocs): Likewise. * elf32-sh.c (elf_sh_link_hash_entry): Remove dyn_relocs. (sh_elf_link_hash_newfunc): Updated. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. (sh_elf_copy_indirect_symbol): Likewise. (sh_elf_check_relocs): Likewise. * elf32-tic6x.c (elf32_tic6x_link_hash_entry): Removed. (elf32_tic6x_link_hash_newfunc): Likewise. (elf32_tic6x_link_hash_table_create): Updated. (readonly_dynrelocs): Likewise. (elf32_tic6x_check_relocs): Likewise. (elf32_tic6x_allocate_dynrelocs): Likewise. * elf32-tilepro.c (tilepro_elf_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (tilepro_elf_copy_indirect_symbol): Likewise. (tilepro_elf_check_relocs): Likewise. (allocate_dynrelocs): Likewise. * elf64-ppc.c (ppc_link_hash_entry): Remove dyn_relocs. (ppc64_elf_copy_indirect_symbol): Updated. (ppc64_elf_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (ppc64_elf_adjust_dynamic_symbol): Likewise. (dec_dynrel_count): Likewise. (allocate_dynrelocs): Likewise. (ppc64_elf_relocate_section): Likewise. * elf64-s390.c (elf_s390_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (elf_s390_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elf64-x86-64.c (elf_x86_64_check_relocs): Likewise. * elfnn-aarch64.c (elf_aarch64_link_hash_entry): Remove dyn_relocs. (elfNN_aarch64_link_hash_newfunc): Updated. (elfNN_aarch64_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (need_copy_relocation_p): Likewise. (elfNN_aarch64_allocate_dynrelocs): Likewise. (elfNN_aarch64_allocate_ifunc_dynrelocs): Likewise. * elfnn-riscv.c (riscv_elf_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (riscv_elf_copy_indirect_symbol): Likewise. (riscv_elf_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (_bfd_sparc_elf_copy_indirect_symbol): Likewise. (_bfd_sparc_elf_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elfxx-tilegx.c (tilegx_elf_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (tilegx_elf_copy_indirect_symbol): Likewise. (tilegx_elf_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elfxx-x86.c (elf_x86_allocate_dynrelocs): Likewise. (readonly_dynrelocs): Likewise. (_bfd_x86_elf_copy_indirect_symbol): Likewise. * elfxx-x86.h (elf_x86_link_hash_entry): Remove dyn_relocs.
2020-06-02 03:18:43 +02:00
head = &h->dyn_relocs;
Add support for 64-bit ARM architecture: AArch64
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}
else
{
/* Track dynamic relocs needed for local syms too.
We really need local syms available to do this
easily. Oh well. */
asection *s;
void **vpp;
isym = bfd_sym_from_r_symndx (&htab->sym_cache,
abfd, r_symndx);
if (isym == NULL)
return FALSE;
s = bfd_section_from_elf_index (abfd, isym->st_shndx);
if (s == NULL)
s = sec;
/* Beware of type punned pointers vs strict aliasing
rules. */
vpp = &(elf_section_data (s)->local_dynrel);
head = (struct elf_dyn_relocs **) vpp;
}
p = *head;
if (p == NULL || p->sec != sec)
{
bfd_size_type to size_t bfd_size_type was invented a long time ago in the K&R days. Many places in binutils ought to be using size_t instead (and there are lots of places that use long or unsigned long that really ought to use size_t too). Note that you can't change everything over to size_t: A 32-bit host needs a larger type than size_t to support reading and processing of 64-bit ELF object files. This patch just tidies some of the more obvious uses of bfd_size_type that could be size_t. There no doubt are more lurking in the source. Incidentally, practically all functions used for output of object files can use size_t and don't need to worry about overflow of size expressions. If you have something like symcount * sizeof (void *) when symcount is counting symbols already in memory then you know that this expression can't overflow since the size of a symbol in memory is larger by far than that of a pointer. * aix386-core.c (aix386_core_file_p): Use size_t for "amt". * aout-target.h (object_p): Likewise. * aout-tic30.c (tic30_aout_object_p): Likewise. * aoutx.h (some_aout_object_p, mkobject, make_empty_symbol), (emit_stringtab, write_syms, link_hash_table_create), (aout_link_write_other_symbol): Likewise. * archive.c (_bfd_generic_mkarchive, bfd_generic_archive_p), (bfd_ar_hdr_from_filesystem, _bfd_write_archive_contents), (_bfd_compute_and_write_armap): Likewise. * archures.c (bfd_arch_list): Likewise. * bfd.c (bfd_record_phdr): Likewise. * binary.c (binary_canonicalize_symtab): Likewise. * cisco-core.c (cisco_core_file_validate): Likewise. * coff-arm.c (coff_arm_link_hash_table_create, find_thumb_glue), (find_arm_glue, record_arm_to_thumb_glue), (record_thumb_to_arm_glue): Likewise. * coff-ppc.c (ppc_coff_link_hash_table_create, record_toc), (ppc_allocate_toc_section): Likewise. * coff-rs6000.c (_bfd_xcoff_mkobject, _bfd_xcoff_archive_p): Likewise. * coff-sh.c (sh_relax_section): Likewise. * coff64-rs6000.c (xcoff64_archive_p): Likewise. * coffcode.h (handle_COMDAT, coff_new_section_hook), (coff_set_alignment_hook, coff_mkobject), (coff_compute_section_file_positions): Likewise. * coffgen.c (coff_make_empty_symbol, coff_bfd_make_debug_symbol), (coff_find_nearest_line_with_names), ( bfd_coff_set_symbol_class): Likewise. * cofflink.c (_bfd_coff_link_hash_table_create), (_bfd_coff_link_input_bfd): Likewise. * dwarf1.c (alloc_dwarf1_unit, alloc_dwarf1_func): Likewise. * dwarf2.c (read_abbrevs, read_attribute_value, add_line_info), (build_line_info_table, sort_line_sequences), (line_info_add_include_dir, line_info_add_file_name), (decode_line_info, scan_unit_for_symbols, parse_comp_unit), (place_sections, _bfd_dwarf2_slurp_debug_info): Likewise. * ecoff.c (_bfd_ecoff_mkobject, _bfd_ecoff_make_empty_symbol), (_bfd_ecoff_find_nearest_line), (_bfd_ecoff_bfd_link_hash_table_create): Likewise. * ecofflink.c (bfd_ecoff_debug_init): Likewise. * elf-hppa.h (_bfd_elf_hppa_gen_reloc_type): Likewise. * elf-m10300.c (mn10300_elf_relax_section), (elf32_mn10300_link_hash_table_create): Likewise. * elf-strtab.c (_bfd_elf_strtab_init): Likewise. * elf.c (make_mapping, copy_elf_program_header): Likewise. * elf32-arm.c (elf32_arm_link_hash_table_create), (elf32_arm_setup_section_lists, elf32_arm_check_relocs), (elf32_arm_new_section_hook): Likewise. * elf32-avr.c (elf_avr_new_section_hook), (elf32_avr_link_hash_table_create, get_local_syms), (elf32_avr_setup_section_lists): Likewise. * elf32-bfin.c (bfinfdpic_elf_link_hash_table_create), (bfin_link_hash_table_create): Likewise. * elf32-cr16.c (elf32_cr16_link_hash_table_create): Likewise. * elf32-cris.c (elf_cris_link_hash_table_create): Likewise. * elf32-csky.c (csky_elf_link_hash_table_create), (csky_elf_check_relocs, elf32_csky_setup_section_lists): Likewise. * elf32-frv.c (frvfdpic_elf_link_hash_table_create): Likewise. * elf32-hppa.c (elf32_hppa_link_hash_table_create), (elf32_hppa_setup_section_lists, get_local_syms): Likewise. * elf32-i386.c (elf_i386_check_relocs): Likewise. * elf32-lm32.c (lm32_elf_link_hash_table_create): Likewise. * elf32-m32r.c (m32r_elf_link_hash_table_create), (m32r_elf_check_relocs): Likewise. * elf32-m68hc1x.c (m68hc11_elf_hash_table_create), (elf32_m68hc11_setup_section_lists), (elf32_m68hc11_size_stubs): Likewise. * elf32-m68k.c (elf_m68k_link_hash_table_create): Likewise. * elf32-metag.c (elf_metag_link_hash_table_create), (elf_metag_setup_section_lists): Likewise. * elf32-microblaze.c (microblaze_elf_link_hash_table_create), (microblaze_elf_check_relocs): Likewise. * elf32-nds32.c (nds32_elf_link_hash_table_create), (nds32_elf_check_relocs): Likewise. * elf32-nios2.c (nios2_elf32_setup_section_lists), (get_local_syms, nios2_elf32_check_relocs), (nios2_elf32_link_hash_table_create): Likewise. * elf32-or1k.c (or1k_elf_link_hash_table_create), (or1k_elf_check_relocs): Likewise. * elf32-ppc.c (ppc_elf_modify_segment_map, update_plt_info): Likewise. * elf32-pru.c (pru_elf32_link_hash_table_create): Likewise. * elf32-s390.c (elf_s390_link_hash_table_create), (elf_s390_check_relocs): Likewise. * elf32-score.c (score_elf_create_got_section), (s3_elf32_score_new_section_hook), (elf32_score_link_hash_table_create): Likewise. * elf32-score7.c (score_elf_create_got_section), (s7_elf32_score_new_section_hook): Likewise. * elf32-sh.c (sh_elf_link_hash_table_create), (sh_elf_check_relocs): Likewise. * elf32-tic6x.c (elf32_tic6x_link_hash_table_create), (elf32_tic6x_new_section_hook, elf32_tic6x_check_relocs): Likewise. * elf32-tilepro.c (tilepro_elf_link_hash_table_create), (tilepro_elf_check_relocs): Likewise. * elf32-v850.c (remember_hi16s_reloc): Likewise. * elf32-vax.c (elf_vax_link_hash_table_create): Likewise. * elf32-xtensa.c (elf_xtensa_link_hash_table_create), (elf_xtensa_new_section_hook): Likewise. * elf64-alpha.c (elf64_alpha_bfd_link_hash_table_create), (get_got_entry, elf64_alpha_check_relocs): Likewise. * elf64-hppa.c (elf64_hppa_hash_table_create): Likewise. * elf64-ia64-vms.c (elf64_ia64_object_p): Likewise. * elf64-mmix.c (mmix_elf_new_section_hook): Likewise. * elf64-ppc.c (ppc64_elf_new_section_hook), (ppc64_elf_link_hash_table_create, update_local_sym_info), (update_plt_info, ppc64_elf_check_relocs): Likewise. * elf64-s390.c (elf_s390_link_hash_table_create), (elf_s390_check_relocs): Likewise. * elf64-x86-64.c (elf_x86_64_check_relocs): Likewise. * elflink.c (bfd_elf_link_record_local_dynamic_symbol), (_bfd_elf_link_find_version_dependencies, elf_link_add_object_symbols), (elf_link_add_archive_symbols, compute_bucket_count), (bfd_elf_size_dynsym_hash_dynstr, _bfd_elf_link_hash_table_create), (bfd_elf_get_bfd_needed_list, elf_link_swap_symbols_out), (bfd_elf_final_link): Likewise. * elfnn-aarch64.c (elfNN_aarch64_link_hash_table_create), (elfNN_aarch64_setup_section_lists, elfNN_aarch64_check_relocs), (elfNN_aarch64_new_section_hook): Likewise. * elfnn-ia64.c (elfNN_ia64_object_p): Likewise. * elfnn-riscv.c (riscv_elf_link_hash_table_create), (riscv_elf_check_relocs): Likewise. * elfxx-mips.c (_bfd_mips_elf_new_section_hook), (_bfd_mips_elf_add_symbol_hook, _bfd_mips_elf_check_relocs), (_bfd_mips_elf_modify_segment_map, _bfd_mips_elf_set_section_contents), (_bfd_mips_elf_link_hash_table_create): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_link_hash_table_create), (_bfd_sparc_elf_check_relocs), (_bfd_sparc_elf_new_section_hook): Likewise. * elfxx-tilegx.c (tilegx_elf_link_hash_table_create), (tilegx_elf_check_relocs): Likewise. * elfxx-x86.c (_bfd_x86_elf_link_hash_table_create): Likewise. * format.c (bfd_check_format_matches): Likewise. * hash.c (_bfd_stringtab_init): Likewise. * ihex.c (ihex_scan): Likewise. * irix-core.c (irix_core_core_file_p): Likewise. * linker.c (bfd_wrapped_link_hash_lookup), (_bfd_generic_link_hash_table_create), (_bfd_generic_reloc_link_order): Likewise. * lynx-core.c (lynx_core_file_p): Likewise. * netbsd-core.c (netbsd_core_file_p): Likewise. * osf-core.c (osf_core_core_file_p): Likewise. * pdp11.c (some_aout_object_p, mkobject, make_empty_symbol), (link_hash_table_create, aout_link_write_other_symbol): Likewise. * peXXigen.c (_bfd_XX_bfd_copy_private_section_data): Likewise. * peicode.h (pe_mkobject): Likewise. * ppcboot.c (ppcboot_mkobject, ppcboot_canonicalize_symtab): Likewise. * ptrace-core.c (ptrace_unix_core_file_p): Likewise. * sco5-core.c (read_uarea): Likewise. * som.c (hppa_som_gen_reloc_type, som_object_p, som_prep_headers), (som_write_fixups, som_write_space_strings, som_write_symbol_strings), (som_finish_writing, som_canonicalize_symtab, som_new_section_hook), (som_bfd_copy_private_section_data, bfd_som_set_section_attributes), (bfd_som_attach_aux_hdr, som_write_armap): Likewise. * srec.c (srec_scan): Likewise. * syms.c (_bfd_generic_make_empty_symbol): Likewise. * targets.c (bfd_target_list): Likewise. * tekhex.c (first_phase, tekhex_sizeof_headers): Likewise. * trad-core.c (trad_unix_core_file_p): Likewise. * vms-alpha.c (vms_initialize, alpha_vms_bfd_link_hash_table_create), (vms_new_section_hook): Likewise. * wasm-module.c (wasm_make_empty_symbol): Likewise. * xcofflink.c (xcoff_get_section_contents), (_bfd_xcoff_bfd_link_hash_table_create, xcoff_set_import_path), (xcoff_find_function, bfd_xcoff_link_record_set, xcoff_build_ldsym), (bfd_xcoff_size_dynamic_sections, xcoff_link_input_bfd): Likewise.
2020-02-19 03:42:00 +01:00
size_t amt = sizeof *p;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
p = ((struct elf_dyn_relocs *)
bfd_zalloc (htab->root.dynobj, amt));
if (p == NULL)
return FALSE;
p->next = *head;
*head = p;
p->sec = sec;
}
p->count += 1;
[AArch64] Allow COPY relocation elimination As discussed at the PR, this patch tries to avoid COPY relocation generation and propagate the original relocation into runtime if it was relocating on writable section. The ELIMINATE_COPY_RELOCS has been set to true and it's underlying infrastructure has been improved so that the COPY reloc elimination at least working on absoluate relocations (ABS64) on AArch64. BFD linker copy relocation elimination framwork requires the backend to always allocate dynrelocs for all those relocation types that are possible to introduce copy relocations. This is for adjust_dynamic_symbol hook to be able to get all symbol reference information. Should one symbol is referenced by more than one relocations, if there is any of them needs copy relocation then linker should generate it. bfd/ PR ld/21532 * elfnn-aarch64.c (ELIMINATE_COPY_RELOCS): Set to 1. (elfNN_aarch64_final_link_relocate): Also propagate relocations to runtime for if there needs copy relocation elimination. (need_copy_relocation_p): New function. Return true for symbol with pc-relative references and if it's against read-only sections. (elfNN_aarch64_adjust_dynamic_symbol): Use need_copy_relocation_p. (elfNN_aarch64_check_relocs): Allocate dynrelocs for relocation types that are related with accessing external objects. (elfNN_aarch64_gc_sweep_hook): Sync the relocation types with the change in elfNN_aarch64_check_relocs. ld/ * testsuite/ld-aarch64/copy-reloc-exe-2.s: New test source file. * testsuite/ld-aarch64/copy-reloc-2.d: New test. * testsuite/ld-aarch64/copy-reloc-exe-eliminate.s: New test source file. * testsuite/ld-aarch64/copy-reloc-eliminate.d: New test. * testsuite/ld-aarch64/copy-reloc-so.s: Define new global objects. * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests.
2017-06-15 17:51:01 +02:00
if (elfNN_aarch64_howto_table[howto_index].pc_relative)
p->pc_count += 1;
Add support for 64-bit ARM architecture: AArch64
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}
break;
/* RR: We probably want to keep a consistency check that
there are no dangling GOT_PAGE relocs. */
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
case BFD_RELOC_AARCH64_ADR_GOT_PAGE:
[AArch64] Tidy up switch statements in elfnn-aarch64.c
2013-07-03 19:23:24 +02:00
case BFD_RELOC_AARCH64_GOT_LD_PREL19:
[AArch64] BFD support BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14 This patch add BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14 relocation supoprt in bfd linker. 2015-06-01 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_reloc_got_type): Support BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14. (elfNN_aarch64_final_link_relocate): Ditto. (elfNN_aarch64_gc_swap_hook): Ditto. (elfNN_aarch64_check_relocs): Ditto. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Ditto. ld/testsuite/ * ld-aarch64/emit-relocs-28.s: New test file. * ld-aarch64/emit-relocs-28.d: Ditto. * ld-aarch64/aarch64-elf.exp: Run new test.
2015-06-01 16:45:25 +02:00
case BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14:
[AArch64] Tidy up switch statements in elfnn-aarch64.c
2013-07-03 19:23:24 +02:00
case BFD_RELOC_AARCH64_LD32_GOT_LO12_NC:
[LD][AARCH64]Add BFD_RELOC_AARCH64_LD64_GOTOFF_LO15 Support. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_reloc_got_type): Add BFD_RELOC_AARCH64_LD_64_GOTOFF_LO15 support. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise (elfNN_aarch64_final_link_relocate): Calculate offset within GOT. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/emit-relocs-310.d: New. * ld-aarch64/emit-relocs-310.s: New. * ld-aarch64/aarch64-elf.exp: Run the test.
2015-10-02 15:51:26 +02:00
case BFD_RELOC_AARCH64_LD64_GOTOFF_LO15:
[AArch64] BFD Support BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15 2015-06-01 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_reloc_got_type): Support BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15. (elfNN_aarch64_final_link_relocate): Ditto. (elfNN_aarch64_gc_swap_hook): Ditto. (elfNN_aarch64_check_relocs): Ditto. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Ditto. ld/testsuite/ * ld-aarch64/emit-relocs-313.s: New test file. * ld-aarch64/emit-relocs-313.d: Ditto. * ld-aarch64/aarch64-elf.exp: Run new test.
2015-06-01 11:26:00 +02:00
case BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15:
[AArch64] Tidy up switch statements in elfnn-aarch64.c
2013-07-03 19:23:24 +02:00
case BFD_RELOC_AARCH64_LD64_GOT_LO12_NC:
[LD][AARCH64]Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC Support. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_reloc_got_type): Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC support. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/aarch64-elf.exp: Run new test. * ld-aarch64/emit-relocs-301.d: New. * ld-aarch64/emit-relocs-301.s: New.
2015-10-02 16:54:40 +02:00
case BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC:
[LD][AARCH64]Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G1 Support. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_reloc_got_type): Add support for BFD_RELOC_AARCH64_MOVW_GOTOFF_G1. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise (elfNN_aarch64_final_link_relocate): Calculate offset within GOT. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/emit-relocs-302.d: New. * ld-aarch64/emit-relocs-302.s: New. * ld-aarch64/aarch64-elf.exp: Run the new test.
2015-10-02 16:29:41 +02:00
case BFD_RELOC_AARCH64_MOVW_GOTOFF_G1:
Rename R_AARCH64_TLSDESC_LD64_LO12_NC to R_AARCH64_TLSDESC_LD64_LO12 and R_AARCH64_TLSDESC_ADD_LO12_NC to R_AARCH64_TLSDESC_ADD_LO12. PR binutils/21202 include * elf/aarch64.h (R_AARCH64_TLSDESC_LD64_LO12_NC): Rename to R_AARCH64_TLSDESC_LD64_LO12. (R_AARCH64_TLSDESC_ADD_LO12_NC): Rename to R_AARCH64_TLSDESC_ADD_LO12_NC. bfd * reloc.c (BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC): Rename to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12. (BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC): Rename to BFD_RELOC_AARCH64_TLSDESC_ADD_LO12. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elfnn-aarch64.c (IS_AARCH64_TLS_RELAX_RELOC): Update reloc names. (IS_AARCH64_TLSDESC_RELOC): Likewise. (elfNN_aarch64_howto_table): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. gas * config/tc-aarch64.c (reloc_table): Rename BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12. Rname BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC to BFD_RELOC_AARCH64_TLSDESC_ADD_LO12. (md_apply_fix): Likewise. (aarch64_force_relocation): Likewise. * testsuite/gas/aarch64/tls.d: Update regexp. ld * testsuite/ld-aarch64/ifunc-5r-local.d: Update regexp.
2017-03-13 10:58:04 +01:00
case BFD_RELOC_AARCH64_TLSDESC_ADD_LO12:
[AArch64] Tidy up switch statements in elfnn-aarch64.c
2013-07-03 19:23:24 +02:00
case BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21:
[AArch64] Add support for :tlsdesc: and TLSDESC_ADR_PREL21
2015-02-18 16:36:40 +01:00
case BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21:
[AArch64] Tidy up switch statements in elfnn-aarch64.c
2013-07-03 19:23:24 +02:00
case BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC:
Rename R_AARCH64_TLSDESC_LD64_LO12_NC to R_AARCH64_TLSDESC_LD64_LO12 and R_AARCH64_TLSDESC_ADD_LO12_NC to R_AARCH64_TLSDESC_ADD_LO12. PR binutils/21202 include * elf/aarch64.h (R_AARCH64_TLSDESC_LD64_LO12_NC): Rename to R_AARCH64_TLSDESC_LD64_LO12. (R_AARCH64_TLSDESC_ADD_LO12_NC): Rename to R_AARCH64_TLSDESC_ADD_LO12_NC. bfd * reloc.c (BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC): Rename to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12. (BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC): Rename to BFD_RELOC_AARCH64_TLSDESC_ADD_LO12. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elfnn-aarch64.c (IS_AARCH64_TLS_RELAX_RELOC): Update reloc names. (IS_AARCH64_TLSDESC_RELOC): Likewise. (elfNN_aarch64_howto_table): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. gas * config/tc-aarch64.c (reloc_table): Rename BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12. Rname BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC to BFD_RELOC_AARCH64_TLSDESC_ADD_LO12. (md_apply_fix): Likewise. (aarch64_force_relocation): Likewise. * testsuite/gas/aarch64/tls.d: Update regexp. ld * testsuite/ld-aarch64/ifunc-5r-local.d: Update regexp.
2017-03-13 10:58:04 +01:00
case BFD_RELOC_AARCH64_TLSDESC_LD64_LO12:
[AArch64] Add support for :tlsdesc: and TLSDESC_LD_PREL19
2015-02-18 16:37:35 +01:00
case BFD_RELOC_AARCH64_TLSDESC_LD_PREL19:
[LD][AARCH64]Add TLSDESC support for large memory model. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_tls_transition_without_check): Add relax transitions for TLSDESC_ADD, TLSDESC_LDR, TLSDESC_OFF_G0_NC, TLSDESC_OFF_G1. (aarch64_tls_transition_without_check): Add relaxation support. (aarch64_reloc_got_type): Add support. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/aarch64-elf.exp: Run new test. * ld-aarch64/tls-large-desc.d: New. * ld-aarch64/tls-large-desc.s: New. * ld-aarch64/tls-relax-large-desc-ie.d: New. * ld-aarch64/tls-relax-large-desc-ie.s: New. * ld-aarch64/tls-relax-large-desc-le.d: New. * ld-aarch64/tls-relax-large-desc-le.s: New.
2015-10-02 18:43:08 +02:00
case BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC:
case BFD_RELOC_AARCH64_TLSDESC_OFF_G1:
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
[AArch64] Tidy up switch statements in elfnn-aarch64.c
2013-07-03 19:23:24 +02:00
case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21:
Add ADR :tlsgd: directive and TLSGD_ADR_PREL21 support.
2015-02-13 08:13:57 +01:00
case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21:
[LD][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC support. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_reloc_got_type): Add BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC support. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/emit-relocs-516.d: New. * ld-aarch64/emit-relocs-516.s: New. * ld-aarch64/aarch64-elf.exp: Run new test.
2015-10-02 17:37:22 +02:00
case BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC:
[LD][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G1 support. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_reloc_got_type): Add BFD_RELOC_AARCH64_TLSGD_MOVW_G1 support. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/emit-relocs-515.d: New. * ld-aarch64/emit-relocs-515.s: New. * ld-aarch64/aarch64-elf.exp: Run new test.
2015-10-02 17:21:31 +02:00
case BFD_RELOC_AARCH64_TLSGD_MOVW_G1:
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC:
[AArch64] Tidy up switch statements in elfnn-aarch64.c
2013-07-03 19:23:24 +02:00
case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
Adding support for TLSIE_LD_GOTTREL_PREL19.
2015-02-13 10:57:11 +01:00
case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
[Binutils][AARCH64]Add TLS IE large memory support. bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * reloc.c: Make AARCH64_TLSIE_MOVW_GOTTPREL_G1 and AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC defined in alphabetical order. * libbfd.h: Regenerate. * bfd-in2.h: Likewise. * elfnn-aarch64.c (elfNN_aarch64_howto_table): Make TLSIE_MOVW_GOTTPREL_G1 check overflow. (aarch64_reloc_got_type): Add support for TLSIE_MOVW_GOTTPREL_G1 and TLSIE_MOVW_GOTTPREL_G0_NC. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. gas/ 2015-10-02 Renlin Li <renlin.li@arm.com> * config/tc-aarch64.c (reloc_table): Add two entries for gottprel_g0_nc and gottprel_g1. (process_movw_reloc_info): Add support. (md_apply_fix): Likewise. (aarch64_force_relocation): Likewise. gas/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * gas/aarch64/reloc-gottprel_g0_nc.d: New. * gas/aarch64/reloc-gottprel_g0_nc.s: New. * gas/aarch64/reloc-gottprel_g1.d: New. * gas/aarch64/reloc-gottprel_g1.s: New. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/tls-large-ie.d: New. * ld-aarch64/tls-large-ie.s: New. * ld-aarch64/aarch64-elf.exp: Run new test.
2015-10-02 17:59:46 +02:00
case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC:
case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1:
[AArch64][6/8] LD support BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC 2015-08-11 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC. (aarch64_reloc_got_type): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ * ld-aarch64/tls-small-ld.s: Update testcase.
2015-08-11 18:20:17 +02:00
case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
[AArch64][3/8] LD support BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21 2015-08-11 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21. (aarch64_reloc_got_type): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ * ld-aarch64/tls-small-ld.s: New file. * ld-aarch64/tls-small-ld.d: Likewise. * ld-aarch64/aarch64-elf.exp: Run new test.
2015-08-11 18:05:34 +02:00
case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
[AArch64][3/3] LD support BFD_RELOC_AARCH64_TLSLD_ADR_PREL21
2015-07-16 16:46:21 +02:00
case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
unsigned got_type;
unsigned old_got_type;
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
got_type = aarch64_reloc_got_type (bfd_r_type);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
if (h)
{
h->got.refcount += 1;
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
old_got_type = elf_aarch64_hash_entry (h)->got_type;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
}
else
{
struct elf_aarch64_local_symbol *locals;
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
if (!elfNN_aarch64_allocate_local_symbols
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
(abfd, symtab_hdr->sh_info))
return FALSE;
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
locals = elf_aarch64_locals (abfd);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
BFD_ASSERT (r_symndx < symtab_hdr->sh_info);
locals[r_symndx].got_refcount += 1;
old_got_type = locals[r_symndx].got_type;
}
/* If a variable is accessed with both general dynamic TLS
methods, two slots may be created. */
if (GOT_TLS_GD_ANY_P (old_got_type) && GOT_TLS_GD_ANY_P (got_type))
got_type |= old_got_type;
/* We will already have issued an error message if there
is a TLS/non-TLS mismatch, based on the symbol type.
So just combine any TLS types needed. */
if (old_got_type != GOT_UNKNOWN && old_got_type != GOT_NORMAL
&& got_type != GOT_NORMAL)
got_type |= old_got_type;
/* If the symbol is accessed by both IE and GD methods, we
are able to relax. Turn off the GD flag, without
messing up with any other kind of TLS types that may be
involved. */
if ((got_type & GOT_TLS_IE) && GOT_TLS_GD_ANY_P (got_type))
got_type &= ~ (GOT_TLSDESC_GD | GOT_TLS_GD);
if (old_got_type != got_type)
{
if (h != NULL)
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elf_aarch64_hash_entry (h)->got_type = got_type;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
else
{
struct elf_aarch64_local_symbol *locals;
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
locals = elf_aarch64_locals (abfd);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
BFD_ASSERT (r_symndx < symtab_hdr->sh_info);
locals[r_symndx].got_type = got_type;
}
}
[AArch64] Fix creation of .got and placement of _GLOBAL_OFFSET_TABLE_
2013-07-02 08:39:26 +02:00
if (htab->root.dynobj == NULL)
htab->root.dynobj = abfd;
if (! aarch64_elf_create_got_section (htab->root.dynobj, info))
return FALSE;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
break;
}
[PATCH v3] aarch64: Emit jump slot for conditional branch to undefined symbols The linker silently writes out a conditional branch to 0 if the target symbol in R_AARCH64_CONDBR19 or R_AARCH64_TSTBR14 relocations is undefined. Emit a PLT instead so that behaviour is the same for these relocations as the llvm linker. The special behaviour for undefined weak symbols, where conditional branches to such symbols result in a branch unto themselves, has been retained. This is because the weak-undefined.s test explicitly checks for that, leading me to conclude that it's expected behaviour. bfd * elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Club BFD_RELOC_AARCH64_BRANCH19 and BFD_RELOC_AARCH64_TSTBR14 cases with BFD_RELOC_AARCH64_JUMP26. (elfNN_aarch64_check_relocs): Likewise. ld * testsuite/ld-aarch64/aarch64-elf.exp: New test emit-relocs-560. * testsuite/ld-aarch64/emit-relocs-560.d: New file. * testsuite/ld-aarch64/emit-relocs-560.s: New file.
2020-05-19 12:07:52 +02:00
case BFD_RELOC_AARCH64_BRANCH19:
case BFD_RELOC_AARCH64_TSTBR14:
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
case BFD_RELOC_AARCH64_CALL26:
case BFD_RELOC_AARCH64_JUMP26:
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* If this is a local symbol then we resolve it
directly without creating a PLT entry. */
if (h == NULL)
continue;
h->needs_plt = 1;
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
if (h->plt.refcount <= 0)
h->plt.refcount = 1;
else
h->plt.refcount += 1;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
break;
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
default:
break;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
}
}
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
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return TRUE;
}
/* Treat mapping symbols as special target symbols. */
static bfd_boolean
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
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elfNN_aarch64_is_target_special_symbol (bfd *abfd ATTRIBUTE_UNUSED,
Add support for 64-bit ARM architecture: AArch64
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asymbol *sym)
{
return bfd_is_aarch64_special_symbol_name (sym->name,
BFD_AARCH64_SPECIAL_SYM_TYPE_ANY);
}
PR23652, Use symbols from debug bfd for _bfd_elf_find_function Sometimes DWARF info for a function is incomplete, and the function can be retrieved by examining symbols. However, when separate debug files are used it may be that the original file is completely stripped of symbols. This patch teaches BFD to look at symbols from the debug file in that case. The patch also removes arm_elf_find_function, instead implementing elf_backend_maybe_function_sym. arm_elf_find_function was written before the generic _bfd_elf_find_function called maybe_function_sym. aarch64 copied arm, so that file gets the same treatment. There is some chance this will speed up arm and aarch64 lookup of function/line. PR 23652 * dwarf2.c (_bfd_dwarf2_stash_syms): New function. (_bfd_dwarf2_find_nearest_line): Use it here, passing syms to _bfd_elf_find_function. Call _bfd_elf_find_function in cases where _bfd_elf_find_nearest_line would do so. * elf.c (_bfd_elf_find_nearest_line): Omit _bfd_elf_find_function for dwarf2. * elfxx-mips.c (_bfd_mips_elf_find_nearest_line): Similarly. Tidy. * elf32-arm.c (elf32_arm_maybe_function_sym): New function. (elf_backend_maybe_function_sym): Define. (arm_elf_find_function, elf32_arm_find_nearest_line): Delete. (bfd_elf32_find_nearest_line): Don't define. * elfnn-aarch64.c (elfNN_aarch64_maybe_function_sym): New function. (elf_backend_maybe_function_sym): Define. (aarch64_elf_find_function, elfNN_aarch64_find_nearest_line): Delete. (bfd_elfNN_find_nearest_line): Don't define.
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/* If the ELF symbol SYM might be a function in SEC, return the
function size and set *CODE_OFF to the function's entry point,
otherwise return zero. */
Add support for 64-bit ARM architecture: AArch64
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PR23652, Use symbols from debug bfd for _bfd_elf_find_function Sometimes DWARF info for a function is incomplete, and the function can be retrieved by examining symbols. However, when separate debug files are used it may be that the original file is completely stripped of symbols. This patch teaches BFD to look at symbols from the debug file in that case. The patch also removes arm_elf_find_function, instead implementing elf_backend_maybe_function_sym. arm_elf_find_function was written before the generic _bfd_elf_find_function called maybe_function_sym. aarch64 copied arm, so that file gets the same treatment. There is some chance this will speed up arm and aarch64 lookup of function/line. PR 23652 * dwarf2.c (_bfd_dwarf2_stash_syms): New function. (_bfd_dwarf2_find_nearest_line): Use it here, passing syms to _bfd_elf_find_function. Call _bfd_elf_find_function in cases where _bfd_elf_find_nearest_line would do so. * elf.c (_bfd_elf_find_nearest_line): Omit _bfd_elf_find_function for dwarf2. * elfxx-mips.c (_bfd_mips_elf_find_nearest_line): Similarly. Tidy. * elf32-arm.c (elf32_arm_maybe_function_sym): New function. (elf_backend_maybe_function_sym): Define. (arm_elf_find_function, elf32_arm_find_nearest_line): Delete. (bfd_elf32_find_nearest_line): Don't define. * elfnn-aarch64.c (elfNN_aarch64_maybe_function_sym): New function. (elf_backend_maybe_function_sym): Define. (aarch64_elf_find_function, elfNN_aarch64_find_nearest_line): Delete. (bfd_elfNN_find_nearest_line): Don't define.
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static bfd_size_type
elfNN_aarch64_maybe_function_sym (const asymbol *sym, asection *sec,
bfd_vma *code_off)
{
bfd_size_type size;
Add support for 64-bit ARM architecture: AArch64
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PR23652, Use symbols from debug bfd for _bfd_elf_find_function Sometimes DWARF info for a function is incomplete, and the function can be retrieved by examining symbols. However, when separate debug files are used it may be that the original file is completely stripped of symbols. This patch teaches BFD to look at symbols from the debug file in that case. The patch also removes arm_elf_find_function, instead implementing elf_backend_maybe_function_sym. arm_elf_find_function was written before the generic _bfd_elf_find_function called maybe_function_sym. aarch64 copied arm, so that file gets the same treatment. There is some chance this will speed up arm and aarch64 lookup of function/line. PR 23652 * dwarf2.c (_bfd_dwarf2_stash_syms): New function. (_bfd_dwarf2_find_nearest_line): Use it here, passing syms to _bfd_elf_find_function. Call _bfd_elf_find_function in cases where _bfd_elf_find_nearest_line would do so. * elf.c (_bfd_elf_find_nearest_line): Omit _bfd_elf_find_function for dwarf2. * elfxx-mips.c (_bfd_mips_elf_find_nearest_line): Similarly. Tidy. * elf32-arm.c (elf32_arm_maybe_function_sym): New function. (elf_backend_maybe_function_sym): Define. (arm_elf_find_function, elf32_arm_find_nearest_line): Delete. (bfd_elf32_find_nearest_line): Don't define. * elfnn-aarch64.c (elfNN_aarch64_maybe_function_sym): New function. (elf_backend_maybe_function_sym): Define. (aarch64_elf_find_function, elfNN_aarch64_find_nearest_line): Delete. (bfd_elfNN_find_nearest_line): Don't define.
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if ((sym->flags & (BSF_SECTION_SYM | BSF_FILE | BSF_OBJECT
| BSF_THREAD_LOCAL | BSF_RELC | BSF_SRELC)) != 0
|| sym->section != sec)
return 0;
Add support for 64-bit ARM architecture: AArch64
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PR23652, Use symbols from debug bfd for _bfd_elf_find_function Sometimes DWARF info for a function is incomplete, and the function can be retrieved by examining symbols. However, when separate debug files are used it may be that the original file is completely stripped of symbols. This patch teaches BFD to look at symbols from the debug file in that case. The patch also removes arm_elf_find_function, instead implementing elf_backend_maybe_function_sym. arm_elf_find_function was written before the generic _bfd_elf_find_function called maybe_function_sym. aarch64 copied arm, so that file gets the same treatment. There is some chance this will speed up arm and aarch64 lookup of function/line. PR 23652 * dwarf2.c (_bfd_dwarf2_stash_syms): New function. (_bfd_dwarf2_find_nearest_line): Use it here, passing syms to _bfd_elf_find_function. Call _bfd_elf_find_function in cases where _bfd_elf_find_nearest_line would do so. * elf.c (_bfd_elf_find_nearest_line): Omit _bfd_elf_find_function for dwarf2. * elfxx-mips.c (_bfd_mips_elf_find_nearest_line): Similarly. Tidy. * elf32-arm.c (elf32_arm_maybe_function_sym): New function. (elf_backend_maybe_function_sym): Define. (arm_elf_find_function, elf32_arm_find_nearest_line): Delete. (bfd_elf32_find_nearest_line): Don't define. * elfnn-aarch64.c (elfNN_aarch64_maybe_function_sym): New function. (elf_backend_maybe_function_sym): Define. (aarch64_elf_find_function, elfNN_aarch64_find_nearest_line): Delete. (bfd_elfNN_find_nearest_line): Don't define.
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if (!(sym->flags & BSF_SYNTHETIC))
switch (ELF_ST_TYPE (((elf_symbol_type *) sym)->internal_elf_sym.st_info))
{
Add support for 64-bit ARM architecture: AArch64
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case STT_FUNC:
case STT_NOTYPE:
break;
PR23652, Use symbols from debug bfd for _bfd_elf_find_function Sometimes DWARF info for a function is incomplete, and the function can be retrieved by examining symbols. However, when separate debug files are used it may be that the original file is completely stripped of symbols. This patch teaches BFD to look at symbols from the debug file in that case. The patch also removes arm_elf_find_function, instead implementing elf_backend_maybe_function_sym. arm_elf_find_function was written before the generic _bfd_elf_find_function called maybe_function_sym. aarch64 copied arm, so that file gets the same treatment. There is some chance this will speed up arm and aarch64 lookup of function/line. PR 23652 * dwarf2.c (_bfd_dwarf2_stash_syms): New function. (_bfd_dwarf2_find_nearest_line): Use it here, passing syms to _bfd_elf_find_function. Call _bfd_elf_find_function in cases where _bfd_elf_find_nearest_line would do so. * elf.c (_bfd_elf_find_nearest_line): Omit _bfd_elf_find_function for dwarf2. * elfxx-mips.c (_bfd_mips_elf_find_nearest_line): Similarly. Tidy. * elf32-arm.c (elf32_arm_maybe_function_sym): New function. (elf_backend_maybe_function_sym): Define. (arm_elf_find_function, elf32_arm_find_nearest_line): Delete. (bfd_elf32_find_nearest_line): Don't define. * elfnn-aarch64.c (elfNN_aarch64_maybe_function_sym): New function. (elf_backend_maybe_function_sym): Define. (aarch64_elf_find_function, elfNN_aarch64_find_nearest_line): Delete. (bfd_elfNN_find_nearest_line): Don't define.
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default:
return 0;
}
Add support for 64-bit ARM architecture: AArch64
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PR23652, Use symbols from debug bfd for _bfd_elf_find_function Sometimes DWARF info for a function is incomplete, and the function can be retrieved by examining symbols. However, when separate debug files are used it may be that the original file is completely stripped of symbols. This patch teaches BFD to look at symbols from the debug file in that case. The patch also removes arm_elf_find_function, instead implementing elf_backend_maybe_function_sym. arm_elf_find_function was written before the generic _bfd_elf_find_function called maybe_function_sym. aarch64 copied arm, so that file gets the same treatment. There is some chance this will speed up arm and aarch64 lookup of function/line. PR 23652 * dwarf2.c (_bfd_dwarf2_stash_syms): New function. (_bfd_dwarf2_find_nearest_line): Use it here, passing syms to _bfd_elf_find_function. Call _bfd_elf_find_function in cases where _bfd_elf_find_nearest_line would do so. * elf.c (_bfd_elf_find_nearest_line): Omit _bfd_elf_find_function for dwarf2. * elfxx-mips.c (_bfd_mips_elf_find_nearest_line): Similarly. Tidy. * elf32-arm.c (elf32_arm_maybe_function_sym): New function. (elf_backend_maybe_function_sym): Define. (arm_elf_find_function, elf32_arm_find_nearest_line): Delete. (bfd_elf32_find_nearest_line): Don't define. * elfnn-aarch64.c (elfNN_aarch64_maybe_function_sym): New function. (elf_backend_maybe_function_sym): Define. (aarch64_elf_find_function, elfNN_aarch64_find_nearest_line): Delete. (bfd_elfNN_find_nearest_line): Don't define.
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if ((sym->flags & BSF_LOCAL)
&& bfd_is_aarch64_special_symbol_name (sym->name,
BFD_AARCH64_SPECIAL_SYM_TYPE_ANY))
return 0;
Add support for 64-bit ARM architecture: AArch64
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PR23652, Use symbols from debug bfd for _bfd_elf_find_function Sometimes DWARF info for a function is incomplete, and the function can be retrieved by examining symbols. However, when separate debug files are used it may be that the original file is completely stripped of symbols. This patch teaches BFD to look at symbols from the debug file in that case. The patch also removes arm_elf_find_function, instead implementing elf_backend_maybe_function_sym. arm_elf_find_function was written before the generic _bfd_elf_find_function called maybe_function_sym. aarch64 copied arm, so that file gets the same treatment. There is some chance this will speed up arm and aarch64 lookup of function/line. PR 23652 * dwarf2.c (_bfd_dwarf2_stash_syms): New function. (_bfd_dwarf2_find_nearest_line): Use it here, passing syms to _bfd_elf_find_function. Call _bfd_elf_find_function in cases where _bfd_elf_find_nearest_line would do so. * elf.c (_bfd_elf_find_nearest_line): Omit _bfd_elf_find_function for dwarf2. * elfxx-mips.c (_bfd_mips_elf_find_nearest_line): Similarly. Tidy. * elf32-arm.c (elf32_arm_maybe_function_sym): New function. (elf_backend_maybe_function_sym): Define. (arm_elf_find_function, elf32_arm_find_nearest_line): Delete. (bfd_elf32_find_nearest_line): Don't define. * elfnn-aarch64.c (elfNN_aarch64_maybe_function_sym): New function. (elf_backend_maybe_function_sym): Define. (aarch64_elf_find_function, elfNN_aarch64_find_nearest_line): Delete. (bfd_elfNN_find_nearest_line): Don't define.
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*code_off = sym->value;
size = 0;
if (!(sym->flags & BSF_SYNTHETIC))
size = ((elf_symbol_type *) sym)->internal_elf_sym.st_size;
if (size == 0)
size = 1;
return size;
Add support for 64-bit ARM architecture: AArch64
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}
static bfd_boolean
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
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elfNN_aarch64_find_inliner_info (bfd *abfd,
Add support for 64-bit ARM architecture: AArch64
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const char **filename_ptr,
const char **functionname_ptr,
unsigned int *line_ptr)
{
bfd_boolean found;
found = _bfd_dwarf2_find_inliner_info
(abfd, filename_ptr,
functionname_ptr, line_ptr, &elf_tdata (abfd)->dwarf2_find_line_info);
return found;
}
elf_backend_init_file_header This patch renames elf_backend_post_process_headers and moves the prep_headers code into the new function. Naming the backend functions elf_backend_init_file_header and elf_backend_modify_headers makes it clear which function is called first. * elf-bfd.h (struct elf_backend_data <elf_backend_init_file_header>): Rename from elf_backend_post_process_headers. (_bfd_elf_post_process_headers): Delete. (_bfd_elf_init_file_header): Declare. * elf.c (_bfd_elf_compute_section_file_positions): Call new function in place of prep_headers and elf_backend_post_process_headers. (_bfd_elf_init_file_header): Renamed from prep_headers with updated args and made global. Delete dead code. (_bfd_elf_post_process_headers): Delete. * elf32-arm.c (elf32_arm_init_file_header): Rename from elf32_arm_post_process_headers and call _bfd_elf_init_file_header. Return status. (elf_backend_init_file_header): Define. (elf_backend_post_process_headers): Don't define. * elf32-i386.c (elf_i386_fbsd_init_file_header): Similarly. * elf32-m68hc1x.c (elf32_m68hc11_init_file_header): Similarly. * elf32-metag.c (elf_metag_init_file_header): Similarly. * elf32-spu.c (spu_elf_init_file_header * elf32-visium.c (visium_elf_init_file_header * elf64-alpha.c (elf64_alpha_fbsd_init_file_header * elf64-hppa.c (elf64_hppa_init_file_header * elf64-ia64-vms.c (elf64_vms_init_file_header * elfnn-aarch64.c (elfNN_aarch64_init_file_header * elfnn-ia64.c (elfNN_hpux_init_file_header * elfxx-mips.c (_bfd_mips_init_file_header * elfxx-mips.h (_bfd_mips_post_process_headers): Delete. (_bfd_mips_init_file_header): Declare. (elf_backend_post_process_headers): Delete. (elf_backend_init_file_header): Define. * elfxx-target.h (elf_backend_post_process_headers): Delete. (elf_backend_init_file_header): Define and use. * elf32-m68hc12.c (elf_backend_init_file_header): Define. (elf_backend_post_process_headers): Don't define. * elf32-m68hc1x.h (elf32_m68hc11_post_process_headers): Delete. (elf32_m68hc11_init_file_header): Declare. * elf32-ppc.c (elf_backend_post_process_headers): Remove unnecessary undef.
2019-11-18 07:39:40 +01:00
static bfd_boolean
elfNN_aarch64_init_file_header (bfd *abfd, struct bfd_link_info *link_info)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
Elf_Internal_Ehdr *i_ehdrp; /* ELF file header, internal form. */
elf_backend_init_file_header This patch renames elf_backend_post_process_headers and moves the prep_headers code into the new function. Naming the backend functions elf_backend_init_file_header and elf_backend_modify_headers makes it clear which function is called first. * elf-bfd.h (struct elf_backend_data <elf_backend_init_file_header>): Rename from elf_backend_post_process_headers. (_bfd_elf_post_process_headers): Delete. (_bfd_elf_init_file_header): Declare. * elf.c (_bfd_elf_compute_section_file_positions): Call new function in place of prep_headers and elf_backend_post_process_headers. (_bfd_elf_init_file_header): Renamed from prep_headers with updated args and made global. Delete dead code. (_bfd_elf_post_process_headers): Delete. * elf32-arm.c (elf32_arm_init_file_header): Rename from elf32_arm_post_process_headers and call _bfd_elf_init_file_header. Return status. (elf_backend_init_file_header): Define. (elf_backend_post_process_headers): Don't define. * elf32-i386.c (elf_i386_fbsd_init_file_header): Similarly. * elf32-m68hc1x.c (elf32_m68hc11_init_file_header): Similarly. * elf32-metag.c (elf_metag_init_file_header): Similarly. * elf32-spu.c (spu_elf_init_file_header * elf32-visium.c (visium_elf_init_file_header * elf64-alpha.c (elf64_alpha_fbsd_init_file_header * elf64-hppa.c (elf64_hppa_init_file_header * elf64-ia64-vms.c (elf64_vms_init_file_header * elfnn-aarch64.c (elfNN_aarch64_init_file_header * elfnn-ia64.c (elfNN_hpux_init_file_header * elfxx-mips.c (_bfd_mips_init_file_header * elfxx-mips.h (_bfd_mips_post_process_headers): Delete. (_bfd_mips_init_file_header): Declare. (elf_backend_post_process_headers): Delete. (elf_backend_init_file_header): Define. * elfxx-target.h (elf_backend_post_process_headers): Delete. (elf_backend_init_file_header): Define and use. * elf32-m68hc12.c (elf_backend_init_file_header): Define. (elf_backend_post_process_headers): Don't define. * elf32-m68hc1x.h (elf32_m68hc11_post_process_headers): Delete. (elf32_m68hc11_init_file_header): Declare. * elf32-ppc.c (elf_backend_post_process_headers): Remove unnecessary undef.
2019-11-18 07:39:40 +01:00
if (!_bfd_elf_init_file_header (abfd, link_info))
return FALSE;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
i_ehdrp = elf_elfheader (abfd);
i_ehdrp->e_ident[EI_ABIVERSION] = AARCH64_ELF_ABI_VERSION;
elf_backend_init_file_header This patch renames elf_backend_post_process_headers and moves the prep_headers code into the new function. Naming the backend functions elf_backend_init_file_header and elf_backend_modify_headers makes it clear which function is called first. * elf-bfd.h (struct elf_backend_data <elf_backend_init_file_header>): Rename from elf_backend_post_process_headers. (_bfd_elf_post_process_headers): Delete. (_bfd_elf_init_file_header): Declare. * elf.c (_bfd_elf_compute_section_file_positions): Call new function in place of prep_headers and elf_backend_post_process_headers. (_bfd_elf_init_file_header): Renamed from prep_headers with updated args and made global. Delete dead code. (_bfd_elf_post_process_headers): Delete. * elf32-arm.c (elf32_arm_init_file_header): Rename from elf32_arm_post_process_headers and call _bfd_elf_init_file_header. Return status. (elf_backend_init_file_header): Define. (elf_backend_post_process_headers): Don't define. * elf32-i386.c (elf_i386_fbsd_init_file_header): Similarly. * elf32-m68hc1x.c (elf32_m68hc11_init_file_header): Similarly. * elf32-metag.c (elf_metag_init_file_header): Similarly. * elf32-spu.c (spu_elf_init_file_header * elf32-visium.c (visium_elf_init_file_header * elf64-alpha.c (elf64_alpha_fbsd_init_file_header * elf64-hppa.c (elf64_hppa_init_file_header * elf64-ia64-vms.c (elf64_vms_init_file_header * elfnn-aarch64.c (elfNN_aarch64_init_file_header * elfnn-ia64.c (elfNN_hpux_init_file_header * elfxx-mips.c (_bfd_mips_init_file_header * elfxx-mips.h (_bfd_mips_post_process_headers): Delete. (_bfd_mips_init_file_header): Declare. (elf_backend_post_process_headers): Delete. (elf_backend_init_file_header): Define. * elfxx-target.h (elf_backend_post_process_headers): Delete. (elf_backend_init_file_header): Define and use. * elf32-m68hc12.c (elf_backend_init_file_header): Define. (elf_backend_post_process_headers): Don't define. * elf32-m68hc1x.h (elf32_m68hc11_post_process_headers): Delete. (elf32_m68hc11_init_file_header): Declare. * elf32-ppc.c (elf_backend_post_process_headers): Remove unnecessary undef.
2019-11-18 07:39:40 +01:00
return TRUE;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
}
static enum elf_reloc_type_class
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
* elf-bfd.h (enum elf_reloc_type_class): Add reloc_class_ifunc. (struct elf_backend_data <elf_backed_reloc_type_class>): Add bfd_link_info* and asection* params. (_bfd_elf_reloc_type_class): Likewise. * elf.c (_bfd_elf_reloc_type_class): Likewise. * elflink.c (elf_link_sort_cmp2): Sort first on reloc class. (elf_link_sort_relocs): Update elf_backed_reloc_type_class call. * elf32-ppc.c (ppc_elf_reloc_type_class): Return reloc_class_ifunc for any reliplt reloc. Don't return reloc_class_plt for R_PPC_REL24 and R_PPC_ADDR24. * elf64-ppc.c (allocate_got): Formatting. (ppc64_elf_reloc_type_class): Return reloc_class_ifunc for any reliplt reloc. * elf-m10300.c, * elf32-arm.c, * elf32-bfin.c, * elf32-cr16.c, * elf32-cris.c, * elf32-hppa.c, * elf32-i386.c, * elf32-lm32.c, * elf32-m32r.c, * elf32-m68k.c, * elf32-metag.c, * elf32-nios2.c, * elf32-s390.c, * elf32-sh.c, * elf32-sparc.c, * elf32-tilepro.c, * elf32-vax.c, * elf32-xtensa.c, * elf64-aarch64.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-s390.c, * elf64-sparc.c, * elf64-x86-64.c, * elfnn-ia64.c, * elfxx-tilegx.c, * elfxx-tilegx.h: Add extra params to the various reloc_type_class functions.
2013-03-27 14:37:51 +01:00
const asection *rel_sec ATTRIBUTE_UNUSED,
const Elf_Internal_Rela *rela)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
[AArch64] Fix PR18841 ifunc relocation ordering In order to get the ifunc relocs properly sorted the correct class needs to be returned. The code mimics what has been done for x86. Fixes FAIL: Run pr18841 with libpr18841c.so bfd/ PR ld/18841 * elfnn-aarch64.c (elfNN_aarch64_reloc_type_class): Return reloc_class_ifunc for ifunc symbols.
2017-07-04 16:43:59 +02:00
struct elf_aarch64_link_hash_table *htab = elf_aarch64_hash_table (info);
if (htab->root.dynsym != NULL
&& htab->root.dynsym->contents != NULL)
{
/* Check relocation against STT_GNU_IFUNC symbol if there are
dynamic symbols. */
bfd *abfd = info->output_bfd;
const struct elf_backend_data *bed = get_elf_backend_data (abfd);
unsigned long r_symndx = ELFNN_R_SYM (rela->r_info);
if (r_symndx != STN_UNDEF)
{
Elf_Internal_Sym sym;
if (!bed->s->swap_symbol_in (abfd,
(htab->root.dynsym->contents
+ r_symndx * bed->s->sizeof_sym),
0, &sym))
{
/* xgettext:c-format */
Use %pA and %pB in messages rather than %A and %B First step towards compiler verification of _bfd_error_handler arguments, and better verification of translated messages. bfd/ * bfd.c (_bfd_doprnt, _bfd_doprnt_scan): Handle %pA and %pB in place of %A and %B. * aout-adobe.c: Update all messages using %A and %B. * aout-cris.c: Likewise. * aoutx.h: Likewise. * archive.c: Likewise. * binary.c: Likewise. * cache.c: Likewise. * coff-alpha.c: Likewise. * coff-arm.c: Likewise. * coff-i860.c: Likewise. * coff-mcore.c: Likewise. * coff-ppc.c: Likewise. * coff-rs6000.c: Likewise. * coff-sh.c: Likewise. * coff-tic4x.c: Likewise. * coff-tic54x.c: Likewise. * coff-tic80.c: Likewise. * coff64-rs6000.c: Likewise. * coffcode.h: Likewise. * coffgen.c: Likewise. * cofflink.c: Likewise. * coffswap.h: Likewise. * compress.c: Likewise. * cpu-arm.c: Likewise. * ecoff.c: Likewise. * elf-attrs.c: Likewise. * elf-eh-frame.c: Likewise. * elf-ifunc.c: Likewise. * elf-m10300.c: Likewise. * elf-properties.c: Likewise. * elf-s390-common.c: Likewise. * elf.c: Likewise. * elf32-arc.c: Likewise. * elf32-arm.c: Likewise. * elf32-avr.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-d10v.c: Likewise. * elf32-d30v.c: Likewise. * elf32-epiphany.c: Likewise. * elf32-fr30.c: Likewise. * elf32-frv.c: Likewise. * elf32-gen.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i370.c: Likewise. * elf32-i386.c: Likewise. * elf32-i960.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-lm32.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m32r.c: Likewise. * elf32-m68hc11.c: Likewise. * elf32-m68hc12.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mcore.c: Likewise. * elf32-mep.c: Likewise. * elf32-metag.c: Likewise. * elf32-microblaze.c: Likewise. * elf32-moxie.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-nds32.c: Likewise. * elf32-nios2.c: Likewise. * elf32-or1k.c: Likewise. * elf32-pj.c: Likewise. * elf32-ppc.c: Likewise. * elf32-rl78.c: Likewise. * elf32-rx.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-sh-symbian.c: Likewise. * elf32-sh.c: Likewise. * elf32-sh64.c: Likewise. * elf32-sparc.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-tilepro.c: Likewise. * elf32-v850.c: Likewise. * elf32-vax.c: Likewise. * elf32-visium.c: Likewise. * elf32-wasm32.c: Likewise. * elf32-xgate.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-gen.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-mmix.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-sh64.c: Likewise. * elf64-sparc.c: Likewise. * elf64-x86-64.c: Likewise. * elfcode.h: Likewise. * elfcore.h: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * elfnn-riscv.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * elfxx-x86.c: Likewise. * hpux-core.c: Likewise. * ieee.c: Likewise. * ihex.c: Likewise. * libbfd.c: Likewise. * linker.c: Likewise. * mach-o.c: Likewise. * merge.c: Likewise. * mmo.c: Likewise. * oasys.c: Likewise. * pdp11.c: Likewise. * pe-mips.c: Likewise. * peXXigen.c: Likewise. * peicode.h: Likewise. * reloc.c: Likewise. * rs6000-core.c: Likewise. * srec.c: Likewise. * stabs.c: Likewise. * vms-alpha.c: Likewise. * xcofflink.c: Likewise. ld/ * ldmisc.c (vfinfo): Handle %pA and %pB in place of %A and %B. * ldcref.c: Update all messages using %A and %B. * ldexp.c: Likewise. * ldlang.c: Likewise. * ldmain.c: Likewise. * ldmisc.c: Likewise. * pe-dll.c: Likewise. * plugin.c: Likewise. * emultempl/beos.em: Likewise. * emultempl/cr16elf.em: Likewise. * emultempl/elf32.em: Likewise. * emultempl/m68kcoff.em: Likewise. * emultempl/m68kelf.em: Likewise. * emultempl/mmo.em: Likewise. * emultempl/nds32elf.em: Likewise. * emultempl/pe.em: Likewise. * emultempl/pep.em: Likewise. * emultempl/spuelf.em: Likewise. * emultempl/sunos.em: Likewise. * emultempl/xtensaelf.em: Likewise.
2018-02-19 05:51:40 +01:00
_bfd_error_handler (_("%pB symbol number %lu references"
[AArch64] Fix PR18841 ifunc relocation ordering In order to get the ifunc relocs properly sorted the correct class needs to be returned. The code mimics what has been done for x86. Fixes FAIL: Run pr18841 with libpr18841c.so bfd/ PR ld/18841 * elfnn-aarch64.c (elfNN_aarch64_reloc_type_class): Return reloc_class_ifunc for ifunc symbols.
2017-07-04 16:43:59 +02:00
" nonexistent SHT_SYMTAB_SHNDX section"),
abfd, r_symndx);
/* Ideally an error class should be returned here. */
}
else if (ELF_ST_TYPE (sym.st_info) == STT_GNU_IFUNC)
return reloc_class_ifunc;
}
}
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
switch ((int) ELFNN_R_TYPE (rela->r_info))
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
[AArch64] Fix PR18841 ifunc relocation ordering In order to get the ifunc relocs properly sorted the correct class needs to be returned. The code mimics what has been done for x86. Fixes FAIL: Run pr18841 with libpr18841c.so bfd/ PR ld/18841 * elfnn-aarch64.c (elfNN_aarch64_reloc_type_class): Return reloc_class_ifunc for ifunc symbols.
2017-07-04 16:43:59 +02:00
case AARCH64_R (IRELATIVE):
return reloc_class_ifunc;
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
case AARCH64_R (RELATIVE):
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
return reloc_class_relative;
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
case AARCH64_R (JUMP_SLOT):
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
return reloc_class_plt;
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
case AARCH64_R (COPY):
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
return reloc_class_copy;
default:
return reloc_class_normal;
}
}
/* Handle an AArch64 specific section when reading an object file. This is
called when bfd_section_from_shdr finds a section with an unknown
type. */
static bfd_boolean
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_section_from_shdr (bfd *abfd,
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
Elf_Internal_Shdr *hdr,
const char *name, int shindex)
{
/* There ought to be a place to keep ELF backend specific flags, but
at the moment there isn't one. We just keep track of the
sections by their name, instead. Fortunately, the ABI gives
names for all the AArch64 specific sections, so we will probably get
away with this. */
switch (hdr->sh_type)
{
case SHT_AARCH64_ATTRIBUTES:
break;
default:
return FALSE;
}
if (!_bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
return FALSE;
return TRUE;
}
/* A structure used to record a list of sections, independently
of the next and prev fields in the asection structure. */
typedef struct section_list
{
asection *sec;
struct section_list *next;
struct section_list *prev;
}
section_list;
/* Unfortunately we need to keep a list of sections for which
an _aarch64_elf_section_data structure has been allocated. This
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
is because it is possible for functions like elfNN_aarch64_write_section
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
to be called on a section which has had an elf_data_structure
allocated for it (and so the used_by_bfd field is valid) but
for which the AArch64 extended version of this structure - the
_aarch64_elf_section_data structure - has not been allocated. */
static section_list *sections_with_aarch64_elf_section_data = NULL;
static void
record_section_with_aarch64_elf_section_data (asection *sec)
{
struct section_list *entry;
entry = bfd_malloc (sizeof (*entry));
if (entry == NULL)
return;
entry->sec = sec;
entry->next = sections_with_aarch64_elf_section_data;
entry->prev = NULL;
if (entry->next != NULL)
entry->next->prev = entry;
sections_with_aarch64_elf_section_data = entry;
}
static struct section_list *
find_aarch64_elf_section_entry (asection *sec)
{
struct section_list *entry;
static struct section_list *last_entry = NULL;
/* This is a short cut for the typical case where the sections are added
to the sections_with_aarch64_elf_section_data list in forward order and
then looked up here in backwards order. This makes a real difference
to the ld-srec/sec64k.exp linker test. */
entry = sections_with_aarch64_elf_section_data;
if (last_entry != NULL)
{
if (last_entry->sec == sec)
entry = last_entry;
else if (last_entry->next != NULL && last_entry->next->sec == sec)
entry = last_entry->next;
}
for (; entry; entry = entry->next)
if (entry->sec == sec)
break;
if (entry)
/* Record the entry prior to this one - it is the entry we are
most likely to want to locate next time. Also this way if we
have been called from
unrecord_section_with_aarch64_elf_section_data () we will not
be caching a pointer that is about to be freed. */
last_entry = entry->prev;
return entry;
}
static void
unrecord_section_with_aarch64_elf_section_data (asection *sec)
{
struct section_list *entry;
entry = find_aarch64_elf_section_entry (sec);
if (entry)
{
if (entry->prev != NULL)
entry->prev->next = entry->next;
if (entry->next != NULL)
entry->next->prev = entry->prev;
if (entry == sections_with_aarch64_elf_section_data)
sections_with_aarch64_elf_section_data = entry->next;
free (entry);
}
}
typedef struct
{
void *finfo;
struct bfd_link_info *info;
asection *sec;
int sec_shndx;
int (*func) (void *, const char *, Elf_Internal_Sym *,
asection *, struct elf_link_hash_entry *);
} output_arch_syminfo;
enum map_symbol_type
{
AARCH64_MAP_INSN,
AARCH64_MAP_DATA
};
/* Output a single mapping symbol. */
static bfd_boolean
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_output_map_sym (output_arch_syminfo *osi,
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
enum map_symbol_type type, bfd_vma offset)
{
static const char *names[2] = { "$x", "$d" };
Elf_Internal_Sym sym;
sym.st_value = (osi->sec->output_section->vma
+ osi->sec->output_offset + offset);
sym.st_size = 0;
sym.st_other = 0;
sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
sym.st_shndx = osi->sec_shndx;
return osi->func (osi->finfo, names[type], &sym, osi->sec, NULL) == 1;
}
/* Output a single local symbol for a generated stub. */
static bfd_boolean
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_output_stub_sym (output_arch_syminfo *osi, const char *name,
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
bfd_vma offset, bfd_vma size)
{
Elf_Internal_Sym sym;
sym.st_value = (osi->sec->output_section->vma
+ osi->sec->output_offset + offset);
sym.st_size = size;
sym.st_other = 0;
sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
sym.st_shndx = osi->sec_shndx;
return osi->func (osi->finfo, name, &sym, osi->sec, NULL) == 1;
}
static bfd_boolean
aarch64_map_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
{
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
struct elf_aarch64_stub_hash_entry *stub_entry;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
asection *stub_sec;
bfd_vma addr;
char *stub_name;
output_arch_syminfo *osi;
/* Massage our args to the form they really have. */
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
stub_entry = (struct elf_aarch64_stub_hash_entry *) gen_entry;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
osi = (output_arch_syminfo *) in_arg;
stub_sec = stub_entry->stub_sec;
/* Ensure this stub is attached to the current section being
processed. */
if (stub_sec != osi->sec)
return TRUE;
addr = (bfd_vma) stub_entry->stub_offset;
stub_name = stub_entry->output_name;
switch (stub_entry->stub_type)
{
case aarch64_stub_adrp_branch:
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
if (!elfNN_aarch64_output_stub_sym (osi, stub_name, addr,
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
sizeof (aarch64_adrp_branch_stub)))
return FALSE;
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
if (!elfNN_aarch64_output_map_sym (osi, AARCH64_MAP_INSN, addr))
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
return FALSE;
break;
case aarch64_stub_long_branch:
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
if (!elfNN_aarch64_output_stub_sym
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
(osi, stub_name, addr, sizeof (aarch64_long_branch_stub)))
return FALSE;
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
if (!elfNN_aarch64_output_map_sym (osi, AARCH64_MAP_INSN, addr))
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
return FALSE;
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
if (!elfNN_aarch64_output_map_sym (osi, AARCH64_MAP_DATA, addr + 16))
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
return FALSE;
break;
[AArch64] Cortex-A53 erratum 835769 linker workaround 2014-10-22 Tejas Belagod <tejas.belagod@arm.com> bfd/ * bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter. * bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise. * elfnn-aarch64.c (aarch64_erratum_835769_stub): New. (elf_aarch64_stub_type): Add new type aarch64_stub_erratum_835769_veneer. (elf_aarch64_stub_hash_entry): New fields for erratum 835769. (aarch64_erratum_835769_fix): New data struct to record erratum 835769. (elf_aarch64_link_hash_table: Global flags for 835769. (aarch64_build_one_stub): Add case for 835769. (aarch64_size_one_stub): Likewise. (aarch64_mem_op_p, aarch64_mlxl_p, aarch64_erratum_sequence,erratum_835769_scan): New. Decode and scan functions for erratum 835769. (elf_aarch64_create_or_find_stub_sec): New. (elfNN_aarch64_size_stubs): Look for erratum 835769 and record them. (bfd_elfNN_aarch64_set_options: Set global flag for 835769. (erratum_835769_branch_to_stub_data, make_branch_to_erratum_835769_stub):New. Connect up all the erratum stubs to occurances by branches. (elfNN_aarch64_write_section): New hook. (aarch64_map_one_stub): Output erratum stub symbol. (elfNN_aarch64_size_dynamic_sections): Init mapping symbol information for erratum 835769. (elf_backend_write_section): Define. ld/ * emultempl/aarch64elf.em: Add command-line option for erratum 835769. ld/testsuite/ * ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum 835769 tests. * ld-aarch64/erratum835769.d: New. * ld-aarch64/erratum835769.s: New.
2014-10-24 12:39:35 +02:00
case aarch64_stub_erratum_835769_veneer:
if (!elfNN_aarch64_output_stub_sym (osi, stub_name, addr,
sizeof (aarch64_erratum_835769_stub)))
return FALSE;
if (!elfNN_aarch64_output_map_sym (osi, AARCH64_MAP_INSN, addr))
return FALSE;
break;
[AArch64] Workaround for Cortex A53 erratum 843419 Some early revisions of the Cortex-A53 have an erratum (843419). The details of the erratum are quite complex and involve dynamic conditions. For the purposes of the workaround we have simplified the static conditions to an ADRP in the last two instructions of a 4KByte page, followed within four instructions by a load/store dependent on the ADRP. This patch adds support to conservatively scan for and workaround Cortex A53 erratum 843419. There are two different workaround strategies used. The first is to rewrite ADRP instructions which form part of an erratum sequence with an ADR instruction. In situations where the ADR provides insufficient offset the dependent load or store instruction from the sequence is moved to a stub section and branches are inserted from the original sequence to the relocated instruction and back again. Stub section sizes are rounded up to a multiple of 4096 in order to ensure that the act of inserting work around stubs does not create more errata sequences. Workaround stubs are always inserted into the stub section associated with the input section containing the erratum sequence. This ensures that the fully relocated form of the veneered load store instruction is available at the point in time when the stub section is written.
2015-02-24 13:04:41 +01:00
case aarch64_stub_erratum_843419_veneer:
if (!elfNN_aarch64_output_stub_sym (osi, stub_name, addr,
sizeof (aarch64_erratum_843419_stub)))
return FALSE;
if (!elfNN_aarch64_output_map_sym (osi, AARCH64_MAP_INSN, addr))
return FALSE;
break;
AArch64: Fix regression in Cortex A53 erratum when PIE. (PR ld/23904) The fix for PR ld/22263 causes TLS relocations using ADRP to be relaxed into MOVZ, however this causes issues for the erratum code. The erratum code scans the input sections looking for ADRP instructions and notes their location in the stream. It then later tries to find them again in order to generate the linker stubs. Due to the relaxation it instead finds a MOVZ and hard aborts. Since this relaxation is a valid one, and in which case the erratum no longer applies, it shouldn't abort but instead just continue. This changes the TLS relaxation code such that when it finds an ADRP and it relaxes it, it removes the erratum entry from the work list by changing the stub type into none so the stub is ignored. The entry is not actually removed as removal is a more expensive operation and we have already allocated the memory anyway. The clearing is done for IE->LE and GD->LE relaxations, and a testcase is added for the IE case. The GD case I believe to be impossible to get together with the erratum sequence due to the required BL which would break the sequence. However to cover all basis I have added the guard there as well. build on native hardware and regtested on aarch64-none-elf, aarch64-none-elf (32 bit host), aarch64-none-linux-gnu, aarch64-none-linux-gnu (32 bit host) Cross-compiled and regtested on aarch64-none-linux-gnu, aarch64_be-none-linux-gnu Testcase in PR23940 tested and works as expected now and benchmarks ran on A53 showing no regressions and no issues. bfd/ChangeLog: PR ld/23904 * elfnn-aarch64.c (_bfd_aarch64_adrp_p): Use existing constants. (_bfd_aarch64_erratum_843419_branch_to_stub): Use _bfd_aarch64_adrp_p. (struct erratum_835769_branch_to_stub_clear_data): New. (_bfd_aarch64_erratum_843419_clear_stub): New. (clear_erratum_843419_entry): New. (elfNN_aarch64_tls_relax): Use it. (elfNN_aarch64_relocate_section): Pass input_section. (aarch64_map_one_stub): Handle branch type none as valid. ld/ChangeLog: PR ld/23904 * testsuite/ld-aarch64/aarch64-elf.exp: Add erratum843419_tls_ie. * testsuite/ld-aarch64/erratum843419_tls_ie.d: New test. * testsuite/ld-aarch64/erratum843419_tls_ie.s: New test.
2018-11-27 13:33:21 +01:00
case aarch64_stub_none:
break;
[AArch64] Workaround for Cortex A53 erratum 843419 Some early revisions of the Cortex-A53 have an erratum (843419). The details of the erratum are quite complex and involve dynamic conditions. For the purposes of the workaround we have simplified the static conditions to an ADRP in the last two instructions of a 4KByte page, followed within four instructions by a load/store dependent on the ADRP. This patch adds support to conservatively scan for and workaround Cortex A53 erratum 843419. There are two different workaround strategies used. The first is to rewrite ADRP instructions which form part of an erratum sequence with an ADR instruction. In situations where the ADR provides insufficient offset the dependent load or store instruction from the sequence is moved to a stub section and branches are inserted from the original sequence to the relocated instruction and back again. Stub section sizes are rounded up to a multiple of 4096 in order to ensure that the act of inserting work around stubs does not create more errata sequences. Workaround stubs are always inserted into the stub section associated with the input section containing the erratum sequence. This ensures that the fully relocated form of the veneered load store instruction is available at the point in time when the stub section is written.
2015-02-24 13:04:41 +01:00
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
default:
[AArch64] Call abort() consistently in unhandled stub switch statements. Ensure we hard stop via abort() for unhandled stub types rather than continuing either silently (or noisly with a BFD_FAIL()). Call abort() giving a hard stop rather than BFD_FAIL () for unhandled stub types.
2015-03-02 13:12:37 +01:00
abort ();
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
}
return TRUE;
}
/* Output mapping symbols for linker generated sections. */
static bfd_boolean
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_output_arch_local_syms (bfd *output_bfd,
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
struct bfd_link_info *info,
void *finfo,
int (*func) (void *, const char *,
Elf_Internal_Sym *,
asection *,
struct elf_link_hash_entry
*))
{
output_arch_syminfo osi;
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
struct elf_aarch64_link_hash_table *htab;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
htab = elf_aarch64_hash_table (info);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
osi.finfo = finfo;
osi.info = info;
osi.func = func;
/* Long calls stubs. */
if (htab->stub_bfd && htab->stub_bfd->sections)
{
asection *stub_sec;
for (stub_sec = htab->stub_bfd->sections;
stub_sec != NULL; stub_sec = stub_sec->next)
{
/* Ignore non-stub sections. */
if (!strstr (stub_sec->name, STUB_SUFFIX))
continue;
osi.sec = stub_sec;
osi.sec_shndx = _bfd_elf_section_from_bfd_section
(output_bfd, osi.sec->output_section);
[AArch64] Implement branch over stub section. Ensure that injection of a stub section does not break a link where there is an xpectation that flow of control can pass from one input section to another simply by linking the input sections in series. The solution here is to allow stub sections to be inserted after any input section (existing behaviour), but inject an additional branch at the start of each stub section such that control flow falling into the stub section will branch over the stub section.
2015-03-22 09:31:18 +01:00
/* The first instruction in a stub is always a branch. */
if (!elfNN_aarch64_output_map_sym (&osi, AARCH64_MAP_INSN, 0))
return FALSE;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
bfd_hash_traverse (&htab->stub_hash_table, aarch64_map_one_stub,
&osi);
}
}
/* Finally, output mapping symbols for the PLT. */
if (!htab->root.splt || htab->root.splt->size == 0)
return TRUE;
osi.sec_shndx = _bfd_elf_section_from_bfd_section
(output_bfd, htab->root.splt->output_section);
osi.sec = htab->root.splt;
[BFD][AARCH64]Emit single AARCH64_MAP_INSN symbol for the whole plt. bfd/ 2015-10-01 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (elfNN_aarch64_output_plt_map): Remove. (elfNN_aarch64_output_arch_local_syms): Emit AARCH64_MAP_INSN once. ld/testsuite/ 2015-10-01 Renlin Li <renlin.li@arm.com> * ld-aarch64/plt_mapping_symbol.d: New. * ld-aarch64/plt_mapping_symbol.s: New. * ld-aarch64/aarch64-elf.exp: Run the new test.
2015-10-01 15:12:37 +02:00
elfNN_aarch64_output_map_sym (&osi, AARCH64_MAP_INSN, 0);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
return TRUE;
}
/* Allocate target specific section data. */
static bfd_boolean
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_new_section_hook (bfd *abfd, asection *sec)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
if (!sec->used_by_bfd)
{
_aarch64_elf_section_data *sdata;
bfd_size_type to size_t bfd_size_type was invented a long time ago in the K&R days. Many places in binutils ought to be using size_t instead (and there are lots of places that use long or unsigned long that really ought to use size_t too). Note that you can't change everything over to size_t: A 32-bit host needs a larger type than size_t to support reading and processing of 64-bit ELF object files. This patch just tidies some of the more obvious uses of bfd_size_type that could be size_t. There no doubt are more lurking in the source. Incidentally, practically all functions used for output of object files can use size_t and don't need to worry about overflow of size expressions. If you have something like symcount * sizeof (void *) when symcount is counting symbols already in memory then you know that this expression can't overflow since the size of a symbol in memory is larger by far than that of a pointer. * aix386-core.c (aix386_core_file_p): Use size_t for "amt". * aout-target.h (object_p): Likewise. * aout-tic30.c (tic30_aout_object_p): Likewise. * aoutx.h (some_aout_object_p, mkobject, make_empty_symbol), (emit_stringtab, write_syms, link_hash_table_create), (aout_link_write_other_symbol): Likewise. * archive.c (_bfd_generic_mkarchive, bfd_generic_archive_p), (bfd_ar_hdr_from_filesystem, _bfd_write_archive_contents), (_bfd_compute_and_write_armap): Likewise. * archures.c (bfd_arch_list): Likewise. * bfd.c (bfd_record_phdr): Likewise. * binary.c (binary_canonicalize_symtab): Likewise. * cisco-core.c (cisco_core_file_validate): Likewise. * coff-arm.c (coff_arm_link_hash_table_create, find_thumb_glue), (find_arm_glue, record_arm_to_thumb_glue), (record_thumb_to_arm_glue): Likewise. * coff-ppc.c (ppc_coff_link_hash_table_create, record_toc), (ppc_allocate_toc_section): Likewise. * coff-rs6000.c (_bfd_xcoff_mkobject, _bfd_xcoff_archive_p): Likewise. * coff-sh.c (sh_relax_section): Likewise. * coff64-rs6000.c (xcoff64_archive_p): Likewise. * coffcode.h (handle_COMDAT, coff_new_section_hook), (coff_set_alignment_hook, coff_mkobject), (coff_compute_section_file_positions): Likewise. * coffgen.c (coff_make_empty_symbol, coff_bfd_make_debug_symbol), (coff_find_nearest_line_with_names), ( bfd_coff_set_symbol_class): Likewise. * cofflink.c (_bfd_coff_link_hash_table_create), (_bfd_coff_link_input_bfd): Likewise. * dwarf1.c (alloc_dwarf1_unit, alloc_dwarf1_func): Likewise. * dwarf2.c (read_abbrevs, read_attribute_value, add_line_info), (build_line_info_table, sort_line_sequences), (line_info_add_include_dir, line_info_add_file_name), (decode_line_info, scan_unit_for_symbols, parse_comp_unit), (place_sections, _bfd_dwarf2_slurp_debug_info): Likewise. * ecoff.c (_bfd_ecoff_mkobject, _bfd_ecoff_make_empty_symbol), (_bfd_ecoff_find_nearest_line), (_bfd_ecoff_bfd_link_hash_table_create): Likewise. * ecofflink.c (bfd_ecoff_debug_init): Likewise. * elf-hppa.h (_bfd_elf_hppa_gen_reloc_type): Likewise. * elf-m10300.c (mn10300_elf_relax_section), (elf32_mn10300_link_hash_table_create): Likewise. * elf-strtab.c (_bfd_elf_strtab_init): Likewise. * elf.c (make_mapping, copy_elf_program_header): Likewise. * elf32-arm.c (elf32_arm_link_hash_table_create), (elf32_arm_setup_section_lists, elf32_arm_check_relocs), (elf32_arm_new_section_hook): Likewise. * elf32-avr.c (elf_avr_new_section_hook), (elf32_avr_link_hash_table_create, get_local_syms), (elf32_avr_setup_section_lists): Likewise. * elf32-bfin.c (bfinfdpic_elf_link_hash_table_create), (bfin_link_hash_table_create): Likewise. * elf32-cr16.c (elf32_cr16_link_hash_table_create): Likewise. * elf32-cris.c (elf_cris_link_hash_table_create): Likewise. * elf32-csky.c (csky_elf_link_hash_table_create), (csky_elf_check_relocs, elf32_csky_setup_section_lists): Likewise. * elf32-frv.c (frvfdpic_elf_link_hash_table_create): Likewise. * elf32-hppa.c (elf32_hppa_link_hash_table_create), (elf32_hppa_setup_section_lists, get_local_syms): Likewise. * elf32-i386.c (elf_i386_check_relocs): Likewise. * elf32-lm32.c (lm32_elf_link_hash_table_create): Likewise. * elf32-m32r.c (m32r_elf_link_hash_table_create), (m32r_elf_check_relocs): Likewise. * elf32-m68hc1x.c (m68hc11_elf_hash_table_create), (elf32_m68hc11_setup_section_lists), (elf32_m68hc11_size_stubs): Likewise. * elf32-m68k.c (elf_m68k_link_hash_table_create): Likewise. * elf32-metag.c (elf_metag_link_hash_table_create), (elf_metag_setup_section_lists): Likewise. * elf32-microblaze.c (microblaze_elf_link_hash_table_create), (microblaze_elf_check_relocs): Likewise. * elf32-nds32.c (nds32_elf_link_hash_table_create), (nds32_elf_check_relocs): Likewise. * elf32-nios2.c (nios2_elf32_setup_section_lists), (get_local_syms, nios2_elf32_check_relocs), (nios2_elf32_link_hash_table_create): Likewise. * elf32-or1k.c (or1k_elf_link_hash_table_create), (or1k_elf_check_relocs): Likewise. * elf32-ppc.c (ppc_elf_modify_segment_map, update_plt_info): Likewise. * elf32-pru.c (pru_elf32_link_hash_table_create): Likewise. * elf32-s390.c (elf_s390_link_hash_table_create), (elf_s390_check_relocs): Likewise. * elf32-score.c (score_elf_create_got_section), (s3_elf32_score_new_section_hook), (elf32_score_link_hash_table_create): Likewise. * elf32-score7.c (score_elf_create_got_section), (s7_elf32_score_new_section_hook): Likewise. * elf32-sh.c (sh_elf_link_hash_table_create), (sh_elf_check_relocs): Likewise. * elf32-tic6x.c (elf32_tic6x_link_hash_table_create), (elf32_tic6x_new_section_hook, elf32_tic6x_check_relocs): Likewise. * elf32-tilepro.c (tilepro_elf_link_hash_table_create), (tilepro_elf_check_relocs): Likewise. * elf32-v850.c (remember_hi16s_reloc): Likewise. * elf32-vax.c (elf_vax_link_hash_table_create): Likewise. * elf32-xtensa.c (elf_xtensa_link_hash_table_create), (elf_xtensa_new_section_hook): Likewise. * elf64-alpha.c (elf64_alpha_bfd_link_hash_table_create), (get_got_entry, elf64_alpha_check_relocs): Likewise. * elf64-hppa.c (elf64_hppa_hash_table_create): Likewise. * elf64-ia64-vms.c (elf64_ia64_object_p): Likewise. * elf64-mmix.c (mmix_elf_new_section_hook): Likewise. * elf64-ppc.c (ppc64_elf_new_section_hook), (ppc64_elf_link_hash_table_create, update_local_sym_info), (update_plt_info, ppc64_elf_check_relocs): Likewise. * elf64-s390.c (elf_s390_link_hash_table_create), (elf_s390_check_relocs): Likewise. * elf64-x86-64.c (elf_x86_64_check_relocs): Likewise. * elflink.c (bfd_elf_link_record_local_dynamic_symbol), (_bfd_elf_link_find_version_dependencies, elf_link_add_object_symbols), (elf_link_add_archive_symbols, compute_bucket_count), (bfd_elf_size_dynsym_hash_dynstr, _bfd_elf_link_hash_table_create), (bfd_elf_get_bfd_needed_list, elf_link_swap_symbols_out), (bfd_elf_final_link): Likewise. * elfnn-aarch64.c (elfNN_aarch64_link_hash_table_create), (elfNN_aarch64_setup_section_lists, elfNN_aarch64_check_relocs), (elfNN_aarch64_new_section_hook): Likewise. * elfnn-ia64.c (elfNN_ia64_object_p): Likewise. * elfnn-riscv.c (riscv_elf_link_hash_table_create), (riscv_elf_check_relocs): Likewise. * elfxx-mips.c (_bfd_mips_elf_new_section_hook), (_bfd_mips_elf_add_symbol_hook, _bfd_mips_elf_check_relocs), (_bfd_mips_elf_modify_segment_map, _bfd_mips_elf_set_section_contents), (_bfd_mips_elf_link_hash_table_create): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_link_hash_table_create), (_bfd_sparc_elf_check_relocs), (_bfd_sparc_elf_new_section_hook): Likewise. * elfxx-tilegx.c (tilegx_elf_link_hash_table_create), (tilegx_elf_check_relocs): Likewise. * elfxx-x86.c (_bfd_x86_elf_link_hash_table_create): Likewise. * format.c (bfd_check_format_matches): Likewise. * hash.c (_bfd_stringtab_init): Likewise. * ihex.c (ihex_scan): Likewise. * irix-core.c (irix_core_core_file_p): Likewise. * linker.c (bfd_wrapped_link_hash_lookup), (_bfd_generic_link_hash_table_create), (_bfd_generic_reloc_link_order): Likewise. * lynx-core.c (lynx_core_file_p): Likewise. * netbsd-core.c (netbsd_core_file_p): Likewise. * osf-core.c (osf_core_core_file_p): Likewise. * pdp11.c (some_aout_object_p, mkobject, make_empty_symbol), (link_hash_table_create, aout_link_write_other_symbol): Likewise. * peXXigen.c (_bfd_XX_bfd_copy_private_section_data): Likewise. * peicode.h (pe_mkobject): Likewise. * ppcboot.c (ppcboot_mkobject, ppcboot_canonicalize_symtab): Likewise. * ptrace-core.c (ptrace_unix_core_file_p): Likewise. * sco5-core.c (read_uarea): Likewise. * som.c (hppa_som_gen_reloc_type, som_object_p, som_prep_headers), (som_write_fixups, som_write_space_strings, som_write_symbol_strings), (som_finish_writing, som_canonicalize_symtab, som_new_section_hook), (som_bfd_copy_private_section_data, bfd_som_set_section_attributes), (bfd_som_attach_aux_hdr, som_write_armap): Likewise. * srec.c (srec_scan): Likewise. * syms.c (_bfd_generic_make_empty_symbol): Likewise. * targets.c (bfd_target_list): Likewise. * tekhex.c (first_phase, tekhex_sizeof_headers): Likewise. * trad-core.c (trad_unix_core_file_p): Likewise. * vms-alpha.c (vms_initialize, alpha_vms_bfd_link_hash_table_create), (vms_new_section_hook): Likewise. * wasm-module.c (wasm_make_empty_symbol): Likewise. * xcofflink.c (xcoff_get_section_contents), (_bfd_xcoff_bfd_link_hash_table_create, xcoff_set_import_path), (xcoff_find_function, bfd_xcoff_link_record_set, xcoff_build_ldsym), (bfd_xcoff_size_dynamic_sections, xcoff_link_input_bfd): Likewise.
2020-02-19 03:42:00 +01:00
size_t amt = sizeof (*sdata);
Add support for 64-bit ARM architecture: AArch64
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sdata = bfd_zalloc (abfd, amt);
if (sdata == NULL)
return FALSE;
sec->used_by_bfd = sdata;
}
record_section_with_aarch64_elf_section_data (sec);
return _bfd_elf_new_section_hook (abfd, sec);
}
static void
unrecord_section_via_map_over_sections (bfd *abfd ATTRIBUTE_UNUSED,
asection *sec,
void *ignore ATTRIBUTE_UNUSED)
{
unrecord_section_with_aarch64_elf_section_data (sec);
}
static bfd_boolean
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_close_and_cleanup (bfd *abfd)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
if (abfd->sections)
bfd_map_over_sections (abfd,
unrecord_section_via_map_over_sections, NULL);
return _bfd_elf_close_and_cleanup (abfd);
}
static bfd_boolean
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_bfd_free_cached_info (bfd *abfd)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
if (abfd->sections)
bfd_map_over_sections (abfd,
unrecord_section_via_map_over_sections, NULL);
return _bfd_free_cached_info (abfd);
}
/* Create dynamic sections. This is different from the ARM backend in that
the got, plt, gotplt and their relocation sections are all created in the
standard part of the bfd elf backend. */
static bfd_boolean
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_create_dynamic_sections (bfd *dynobj,
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
struct bfd_link_info *info)
{
[AArch64] Fix creation of .got and placement of _GLOBAL_OFFSET_TABLE_
2013-07-02 08:39:26 +02:00
/* We need to create .got section. */
if (!aarch64_elf_create_got_section (dynobj, info))
return FALSE;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
Put .dynbss and .rel.bss shortcuts in main elf hash table Also, create .rel{,a}.bss for PIEs on all targets, not just x86. * elf-bfd.h (struct elf_link_hash_table): Add sdynbss and srelbss. * elflink.c (_bfd_elf_create_dynamic_sections): Set them. Create .rel.bss/.rela.bss for executables, both PIE and non-PIE. * elf32-arc.c (struct elf_arc_link_hash_table): Delete srelbss. Use ELF hash table var throughout. * elf32-arm.c (struct elf32_arm_link_hash_table): Delete sdynbss and srelbss. Use ELF hash table vars throughout. * elf32-hppa.c (struct elf32_hppa_link_hash_table): Likewise. * elf32-i386.c (struct elf_i386_link_hash_table): Likewise. * elf32-metag.c (struct elf_metag_link_hash_table): Likewise. * elf32-microblaze.c (struct elf32_mb_link_hash_table): Likewise. * elf32-nios2.c (struct elf32_nios2_link_hash_table): Likewise. * elf32-or1k.c (struct elf_or1k_link_hash_table): Likewise. * elf32-ppc.c (struct ppc_elf_link_hash_table): Likewise. * elf32-s390.c (struct elf_s390_link_hash_table): Likewise. * elf32-tic6x.c (struct elf32_tic6x_link_hash_table): Likewise. * elf32-tilepro.c (struct tilepro_elf_link_hash_table): Likewise. * elf64-ppc.c (struct ppc_link_hash_table): Likewise. * elf64-s390.c (struct elf_s390_link_hash_table): Likewise. * elf64-x86-64.c (struct elf_x86_64_link_hash_table): Likewise. * elfnn-aarch64.c (struct elf_aarch64_link_hash_table): Likewise. * elfnn-riscv.c (struct riscv_elf_link_hash_table): Likewise. * elfxx-mips.c (struct mips_elf_link_hash_table): Likewise. * elfxx-sparc.h (struct _bfd_sparc_elf_link_hash_table): Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c (struct tilegx_elf_link_hash_table): Likewise. * elf32-arc.c (arc_elf_create_dynamic_sections): Delete. (elf_backend_create_dynamic_sections): Use base ELF version. * elf32-microblaze.c (microblaze_elf_create_dynamic_sections): Delete. (elf_backend_create_dynamic_sections): Use base ELF version. * elf32-or1k.c (or1k_elf_create_dynamic_sections): Delete. (elf_backend_create_dynamic_sections): Use base ELF version. * elf32-s390.c (elf_s390_create_dynamic_sections): Delete. (elf_backend_create_dynamic_sections): Use base ELF version. * elf64-ppc.c (ppc64_elf_create_dynamic_sections): Delete. (elf_backend_create_dynamic_sections): Use base ELF version. * elf64-s390.c (elf_s390_create_dynamic_sections): Delete. (elf_backend_create_dynamic_sections): Use base ELF version. * elf32-tilepro.c (tilepro_elf_create_dynamic_sections): Remove extraneous tests. * elfnn-aarch64.c (elfNN_aarch64_create_dynamic_sections): Likewise. * elfxx-mips.c (_bfd_mips_elf_create_dynamic_sections): Likewise. * elfxx-tilegx.c (tilegx_elf_create_dynamic_sections): Likewise. * elf32-i386.c (elf_i386_create_dynamic_sections): Don't create ".rel.bss" for executables. * elf64-x86-64.c (elf_x86_64_create_dynamic_sections): Don't create ".rela.bss" for executables. * elf32-nios2.c (nios2_elf32_create_dynamic_sections): Don't ignore return status from _bfd_elf_create_dynamic_sections.
2016-12-25 14:51:06 +01:00
return _bfd_elf_create_dynamic_sections (dynobj, info);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
}
/* Allocate space in .plt, .got and associated reloc sections for
dynamic relocs. */
static bfd_boolean
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
struct bfd_link_info *info;
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
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struct elf_aarch64_link_hash_table *htab;
struct elf_aarch64_link_hash_entry *eh;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
struct elf_dyn_relocs *p;
/* An example of a bfd_link_hash_indirect symbol is versioned
symbol. For example: __gxx_personality_v0(bfd_link_hash_indirect)
-> __gxx_personality_v0(bfd_link_hash_defined)
There is no need to process bfd_link_hash_indirect symbols here
because we will also be presented with the concrete instance of
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
the symbol and elfNN_aarch64_copy_indirect_symbol () will have been
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
called to copy all relevant data from the generic to the concrete
Fix AArch64 relocation handling in ILP32 mode. bfd * elfnn-aarch64.c: Fix relaxations for ILP32 mode. ld * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests. * testsuite/ld-aarch64/tls-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-all-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gd-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-3-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-le-ilp32.d: New test.
2017-01-23 18:07:13 +01:00
symbol instance. */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
if (h->root.type == bfd_link_hash_indirect)
return TRUE;
if (h->root.type == bfd_link_hash_warning)
h = (struct elf_link_hash_entry *) h->root.u.i.link;
info = (struct bfd_link_info *) inf;
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
htab = elf_aarch64_hash_table (info);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
/* Since STT_GNU_IFUNC symbol must go through PLT, we handle it
here if it is defined and referenced in a non-shared object. */
if (h->type == STT_GNU_IFUNC
&& h->def_regular)
return TRUE;
else if (htab->root.dynamic_sections_created && h->plt.refcount > 0)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
/* Make sure this symbol is output as a dynamic symbol.
BFD whitespace fixes Binutils is supposed to use tabs. In my git config I have whitespace = indent-with-non-tab,space-before-tab,trailing-space and I got annoyed enough seeing red in "git diff" output to fix the problems. * doc/header.sed: Trim trailing space when splitting lines. * aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-cris.c, * aout-ns32k.c, * aout-target.h, * aout-tic30.c, * aoutf1.h, * aoutx.h, * arc-got.h, * arc-plt.def, * arc-plt.h, * archive.c, * archive64.c, * archures.c, * armnetbsd.c, * bfd-in.h, * bfd.c, * bfdio.c, * binary.c, * bout.c, * cache.c, * cisco-core.c, * coff-alpha.c, * coff-apollo.c, * coff-arm.c, * coff-h8300.c, * coff-i386.c, * coff-i860.c, * coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mcore.c, * coff-mips.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-stgo32.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * compress.c, * corefile.c, * cpu-alpha.c, * cpu-arm.c, * cpu-avr.c, * cpu-bfin.c, * cpu-cr16.c, * cpu-cr16c.c, * cpu-crx.c, * cpu-d10v.c, * cpu-frv.c, * cpu-ft32.c, * cpu-i370.c, * cpu-i960.c, * cpu-ia64-opc.c, * cpu-ip2k.c, * cpu-lm32.c, * cpu-m32r.c, * cpu-mcore.c, * cpu-microblaze.c, * cpu-mips.c, * cpu-moxie.c, * cpu-mt.c, * cpu-nios2.c, * cpu-ns32k.c, * cpu-or1k.c, * cpu-powerpc.c, * cpu-pru.c, * cpu-sh.c, * cpu-spu.c, * cpu-v850.c, * cpu-v850_rh850.c, * cpu-xgate.c, * cpu-z80.c, * dwarf1.c, * dwarf2.c, * ecoff.c, * ecofflink.c, * ecoffswap.h, * elf-bfd.h, * elf-eh-frame.c, * elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf-s390-common.c, * elf-strtab.c, * elf-vxworks.c, * elf.c, * elf32-am33lin.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-avr.h, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-i860.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68hc1x.c, * elf32-m68hc1x.h, * elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nds32.h, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score.h, * elf32-score7.c, * elf32-sh-symbian.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilegx.c, * elf32-tilegx.h, * elf32-tilepro.c, * elf32-tilepro.h, * elf32-v850.c, * elf32-vax.c, * elf32-wasm32.c, * elf32-xc16x.c, * elf32-xgate.c, * elf32-xgate.h, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-tilegx.c, * elf64-tilegx.h, * elf64-x86-64.c, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-aarch64.h, * elfxx-ia64.c, * elfxx-ia64.h, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * elfxx-x86.h, * freebsd.h, * hash.c, * host-aout.c, * hp300hpux.c, * hppabsd-core.c, * hpux-core.c, * i386aout.c, * i386linux.c, * i386lynx.c, * i386mach3.c, * i386msdos.c, * i386netbsd.c, * ieee.c, * ihex.c, * irix-core.c, * libaout.h, * libbfd-in.h, * libbfd.c, * libcoff-in.h, * libnlm.h, * libpei.h, * libxcoff.h, * linker.c, * lynx-core.c, * m68k4knetbsd.c, * m68klinux.c, * m68knetbsd.c, * m88kmach3.c, * mach-o-aarch64.c, * mach-o-arm.c, * mach-o-i386.c, * mach-o-target.c, * mach-o-x86-64.c, * mach-o.c, * mach-o.h, * merge.c, * mipsbsd.c, * mmo.c, * netbsd.h, * netbsd-core.c, * newsos3.c, * nlm-target.h, * nlm32-ppc.c, * nlm32-sparc.c, * nlmcode.h, * ns32k.h, * ns32knetbsd.c, * oasys.c, * opncls.c, * pc532-mach.c, * pdp11.c, * pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-mips.c, * pe-x86_64.c, * peXXigen.c, * pef.c, * pef.h, * pei-arm.c, * pei-i386.c, * pei-mcore.c, * pei-x86_64.c, * peicode.h, * plugin.c, * ppcboot.c, * ptrace-core.c, * reloc.c, * riscix.c, * rs6000-core.c, * section.c, * som.c, * som.h, * sparclinux.c, * sparcnetbsd.c, * srec.c, * stabs.c, * sunos.c, * syms.c, * targets.c, * tekhex.c, * trad-core.c, * vax1knetbsd.c, * vaxnetbsd.c, * verilog.c, * versados.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * wasm-module.c, * wasm-module.h, * xcofflink.c, * xsym.c, * xsym.h: Whitespace fixes. * bfd-in2.h, * libbfd.h, * libcoff.h: Regenerate.
2017-12-05 23:56:00 +01:00
Undefined weak syms won't yet be marked as dynamic. */
[AArch64] Only override the symbol dynamic decision on undefined weak symbol This fix is an adaption of the x86-64 PR ld/21402 fix to AArch64. After the generic code deciding one symbol is not dynamic, AArch64 backend only overrides the decision on undefined weak symbols. bfd/ PR ld/21402 * elfnn-aarch64.c (elfNN_aarch64_allocate_dynrelocs): Only make undefined weak symbols into dynamic. (elfNN_aarch64_final_link_relocate): Generate runtime RELATIVE relocation for non-dynamic symbols. (elfNN_aarch64_finish_dynamic_symbol): Add sanity check.
2017-06-29 12:47:43 +02:00
if (h->dynindx == -1 && !h->forced_local
&& h->root.type == bfd_link_hash_undefweak)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
if (!bfd_elf_link_record_dynamic_symbol (info, h))
return FALSE;
}
Add output_type to bfd_link_info The "shared" field in bfd_link_info is set for both DSO and and PIE. There are separate fields for executable and relocatable outputs. This patch adds an "output_type" field: enum output_type { type_unknown = 0, type_executable, type_dll, type_relocatable }; and a "pic" field to bfd_link_info to replace shared, executable and relocatable fields so that we can use the "output_type" field to check for output type and the "pic" field check if output is PIC. Macros, bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie, are provided to check for output features. bfd/ * bfd/aoutx.h: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * bfd/bout.c: Likewise. * bfd/coff-alpha.c: Likewise. * bfd/coff-arm.c: Likewise. * bfd/coff-i386.c: Likewise. * bfd/coff-i960.c: Likewise. * bfd/coff-m68k.c: Likewise. * bfd/coff-mcore.c: Likewise. * bfd/coff-mips.c: Likewise. * bfd/coff-ppc.c: Likewise. * bfd/coff-rs6000.c: Likewise. * bfd/coff-sh.c: Likewise. * bfd/coff-tic80.c: Likewise. * bfd/coff-x86_64.c: Likewise. * bfd/coff64-rs6000.c: Likewise. * bfd/coffgen.c: Likewise. * bfd/cofflink.c: Likewise. * bfd/ecoff.c: Likewise. * bfd/ecofflink.c: Likewise. * bfd/elf-bfd.h: Likewise. * bfd/elf-eh-frame.c: Likewise. * bfd/elf-ifunc.c: Likewise. * bfd/elf-m10200.c: Likewise. * bfd/elf-m10300.c: Likewise. * bfd/elf-s390-common.c: Likewise. * bfd/elf-vxworks.c: Likewise. * bfd/elf.c: Likewise. * bfd/elf32-arm.c: Likewise. * bfd/elf32-avr.c: Likewise. * bfd/elf32-bfin.c: Likewise. * bfd/elf32-cr16.c: Likewise. * bfd/elf32-cr16c.c: Likewise. * bfd/elf32-cris.c: Likewise. * bfd/elf32-crx.c: Likewise. * bfd/elf32-d10v.c: Likewise. * bfd/elf32-dlx.c: Likewise. * bfd/elf32-epiphany.c: Likewise. * bfd/elf32-fr30.c: Likewise. * bfd/elf32-frv.c: Likewise. * bfd/elf32-ft32.c: Likewise. * bfd/elf32-h8300.c: Likewise. * bfd/elf32-hppa.c: Likewise. * bfd/elf32-i370.c: Likewise. * bfd/elf32-i386.c: Likewise. * bfd/elf32-i860.c: Likewise. * bfd/elf32-ip2k.c: Likewise. * bfd/elf32-iq2000.c: Likewise. * bfd/elf32-lm32.c: Likewise. * bfd/elf32-m32c.c: Likewise. * bfd/elf32-m32r.c: Likewise. * bfd/elf32-m68hc11.c: Likewise. * bfd/elf32-m68hc1x.c: Likewise. * bfd/elf32-m68k.c: Likewise. * bfd/elf32-mcore.c: Likewise. * bfd/elf32-mep.c: Likewise. * bfd/elf32-metag.c: Likewise. * bfd/elf32-microblaze.c: Likewise. * bfd/elf32-moxie.c: Likewise. * bfd/elf32-msp430.c: Likewise. * bfd/elf32-mt.c: Likewise. * bfd/elf32-nds32.c: Likewise. * bfd/elf32-nios2.c: Likewise. * bfd/elf32-or1k.c: Likewise. * bfd/elf32-ppc.c: Likewise. * bfd/elf32-rl78.c: Likewise. * bfd/elf32-rx.c: Likewise. * bfd/elf32-s390.c: Likewise. * bfd/elf32-score.c: Likewise. * bfd/elf32-score7.c: Likewise. * bfd/elf32-sh-symbian.c: Likewise. * bfd/elf32-sh.c: Likewise. * bfd/elf32-sh64.c: Likewise. * bfd/elf32-spu.c: Likewise. * bfd/elf32-tic6x.c: Likewise. * bfd/elf32-tilepro.c: Likewise. * bfd/elf32-v850.c: Likewise. * bfd/elf32-vax.c: Likewise. * bfd/elf32-visium.c: Likewise. * bfd/elf32-xc16x.c: Likewise. * bfd/elf32-xstormy16.c: Likewise. * bfd/elf32-xtensa.c: Likewise. * bfd/elf64-alpha.c: Likewise. * bfd/elf64-hppa.c: Likewise. * bfd/elf64-ia64-vms.c: Likewise. * bfd/elf64-mmix.c: Likewise. * bfd/elf64-ppc.c: Likewise. * bfd/elf64-s390.c: Likewise. * bfd/elf64-sh64.c: Likewise. * bfd/elf64-x86-64.c: Likewise. * bfd/elflink.c: Likewise. * bfd/elfnn-aarch64.c: Likewise. * bfd/elfnn-ia64.c: Likewise. * bfd/elfxx-mips.c: Likewise. * bfd/elfxx-sparc.c: Likewise. * bfd/elfxx-tilegx.c: Likewise. * bfd/i386linux.c: Likewise. * bfd/linker.c: Likewise. * bfd/m68klinux.c: Likewise. * bfd/pdp11.c: Likewise. * bfd/pe-mips.c: Likewise. * bfd/peXXigen.c: Likewise. * bfd/reloc.c: Likewise. * bfd/reloc16.c: Likewise. * bfd/sparclinux.c: Likewise. * bfd/sunos.c: Likewise. * bfd/vms-alpha.c: Likewise. * bfd/xcofflink.c: Likewise. include/ * include/bfdlink.h (output_type): New enum. (bfd_link_executable): New macro. (bfd_link_dll): Likewise. (bfd_link_relocatable): Likewise. (bfd_link_pic): Likewise. (bfd_link_pie): Likewise. (bfd_link_info): Remove shared, executable, pie and relocatable. Add output_type and pic. ld/ * ld/ldctor.c: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * ld/ldemul.c: Likewise. * ld/ldfile.c: Likewise. * ld/ldlang.c: Likewise. * ld/ldmain.c: Likewise. * ld/ldwrite.c: Likewise. * ld/lexsup.c: Likewise. * ld/pe-dll.c: Likewise. * ld/plugin.c: Likewise. * ld/emultempl/aarch64elf.em: Likewise. * ld/emultempl/aix.em: Likewise. * ld/emultempl/alphaelf.em: Likewise. * ld/emultempl/armcoff.em: Likewise. * ld/emultempl/armelf.em: Likewise. * ld/emultempl/avrelf.em: Likewise. * ld/emultempl/beos.em: Likewise. * ld/emultempl/cr16elf.em: Likewise. * ld/emultempl/elf-generic.em: Likewise. * ld/emultempl/elf32.em: Likewise. * ld/emultempl/genelf.em: Likewise. * ld/emultempl/generic.em: Likewise. * ld/emultempl/gld960.em: Likewise. * ld/emultempl/gld960c.em: Likewise. * ld/emultempl/hppaelf.em: Likewise. * ld/emultempl/irix.em: Likewise. * ld/emultempl/linux.em: Likewise. * ld/emultempl/lnk960.em: Likewise. * ld/emultempl/m68hc1xelf.em: Likewise. * ld/emultempl/m68kcoff.em: Likewise. * ld/emultempl/m68kelf.em: Likewise. * ld/emultempl/metagelf.em: Likewise. * ld/emultempl/mipself.em: Likewise. * ld/emultempl/mmo.em: Likewise. * ld/emultempl/msp430.em: Likewise. * ld/emultempl/nds32elf.em: Likewise. * ld/emultempl/needrelax.em: Likewise. * ld/emultempl/nios2elf.em: Likewise. * ld/emultempl/pe.em: Likewise. * ld/emultempl/pep.em: Likewise. * ld/emultempl/ppc32elf.em: Likewise. * ld/emultempl/ppc64elf.em: Likewise. * ld/emultempl/sh64elf.em: Likewise. * ld/emultempl/solaris2.em: Likewise. * ld/emultempl/spuelf.em: Likewise. * ld/emultempl/sunos.em: Likewise. * ld/emultempl/tic6xdsbt.em: Likewise. * ld/emultempl/ticoff.em: Likewise. * ld/emultempl/v850elf.em: Likewise. * ld/emultempl/vms.em: Likewise. * ld/emultempl/vxworks.em: Likewise.
2015-08-18 14:51:03 +02:00
if (bfd_link_pic (info) || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
asection *s = htab->root.splt;
/* If this is the first .plt entry, make room for the special
first entry. */
if (s->size == 0)
s->size += htab->plt_header_size;
h->plt.offset = s->size;
/* If this symbol is not defined in a regular file, and we are
not generating a shared library, then set the symbol to this
location in the .plt. This is required to make function
pointers compare as equal between the normal executable and
the shared library. */
Add output_type to bfd_link_info The "shared" field in bfd_link_info is set for both DSO and and PIE. There are separate fields for executable and relocatable outputs. This patch adds an "output_type" field: enum output_type { type_unknown = 0, type_executable, type_dll, type_relocatable }; and a "pic" field to bfd_link_info to replace shared, executable and relocatable fields so that we can use the "output_type" field to check for output type and the "pic" field check if output is PIC. Macros, bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie, are provided to check for output features. bfd/ * bfd/aoutx.h: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * bfd/bout.c: Likewise. * bfd/coff-alpha.c: Likewise. * bfd/coff-arm.c: Likewise. * bfd/coff-i386.c: Likewise. * bfd/coff-i960.c: Likewise. * bfd/coff-m68k.c: Likewise. * bfd/coff-mcore.c: Likewise. * bfd/coff-mips.c: Likewise. * bfd/coff-ppc.c: Likewise. * bfd/coff-rs6000.c: Likewise. * bfd/coff-sh.c: Likewise. * bfd/coff-tic80.c: Likewise. * bfd/coff-x86_64.c: Likewise. * bfd/coff64-rs6000.c: Likewise. * bfd/coffgen.c: Likewise. * bfd/cofflink.c: Likewise. * bfd/ecoff.c: Likewise. * bfd/ecofflink.c: Likewise. * bfd/elf-bfd.h: Likewise. * bfd/elf-eh-frame.c: Likewise. * bfd/elf-ifunc.c: Likewise. * bfd/elf-m10200.c: Likewise. * bfd/elf-m10300.c: Likewise. * bfd/elf-s390-common.c: Likewise. * bfd/elf-vxworks.c: Likewise. * bfd/elf.c: Likewise. * bfd/elf32-arm.c: Likewise. * bfd/elf32-avr.c: Likewise. * bfd/elf32-bfin.c: Likewise. * bfd/elf32-cr16.c: Likewise. * bfd/elf32-cr16c.c: Likewise. * bfd/elf32-cris.c: Likewise. * bfd/elf32-crx.c: Likewise. * bfd/elf32-d10v.c: Likewise. * bfd/elf32-dlx.c: Likewise. * bfd/elf32-epiphany.c: Likewise. * bfd/elf32-fr30.c: Likewise. * bfd/elf32-frv.c: Likewise. * bfd/elf32-ft32.c: Likewise. * bfd/elf32-h8300.c: Likewise. * bfd/elf32-hppa.c: Likewise. * bfd/elf32-i370.c: Likewise. * bfd/elf32-i386.c: Likewise. * bfd/elf32-i860.c: Likewise. * bfd/elf32-ip2k.c: Likewise. * bfd/elf32-iq2000.c: Likewise. * bfd/elf32-lm32.c: Likewise. * bfd/elf32-m32c.c: Likewise. * bfd/elf32-m32r.c: Likewise. * bfd/elf32-m68hc11.c: Likewise. * bfd/elf32-m68hc1x.c: Likewise. * bfd/elf32-m68k.c: Likewise. * bfd/elf32-mcore.c: Likewise. * bfd/elf32-mep.c: Likewise. * bfd/elf32-metag.c: Likewise. * bfd/elf32-microblaze.c: Likewise. * bfd/elf32-moxie.c: Likewise. * bfd/elf32-msp430.c: Likewise. * bfd/elf32-mt.c: Likewise. * bfd/elf32-nds32.c: Likewise. * bfd/elf32-nios2.c: Likewise. * bfd/elf32-or1k.c: Likewise. * bfd/elf32-ppc.c: Likewise. * bfd/elf32-rl78.c: Likewise. * bfd/elf32-rx.c: Likewise. * bfd/elf32-s390.c: Likewise. * bfd/elf32-score.c: Likewise. * bfd/elf32-score7.c: Likewise. * bfd/elf32-sh-symbian.c: Likewise. * bfd/elf32-sh.c: Likewise. * bfd/elf32-sh64.c: Likewise. * bfd/elf32-spu.c: Likewise. * bfd/elf32-tic6x.c: Likewise. * bfd/elf32-tilepro.c: Likewise. * bfd/elf32-v850.c: Likewise. * bfd/elf32-vax.c: Likewise. * bfd/elf32-visium.c: Likewise. * bfd/elf32-xc16x.c: Likewise. * bfd/elf32-xstormy16.c: Likewise. * bfd/elf32-xtensa.c: Likewise. * bfd/elf64-alpha.c: Likewise. * bfd/elf64-hppa.c: Likewise. * bfd/elf64-ia64-vms.c: Likewise. * bfd/elf64-mmix.c: Likewise. * bfd/elf64-ppc.c: Likewise. * bfd/elf64-s390.c: Likewise. * bfd/elf64-sh64.c: Likewise. * bfd/elf64-x86-64.c: Likewise. * bfd/elflink.c: Likewise. * bfd/elfnn-aarch64.c: Likewise. * bfd/elfnn-ia64.c: Likewise. * bfd/elfxx-mips.c: Likewise. * bfd/elfxx-sparc.c: Likewise. * bfd/elfxx-tilegx.c: Likewise. * bfd/i386linux.c: Likewise. * bfd/linker.c: Likewise. * bfd/m68klinux.c: Likewise. * bfd/pdp11.c: Likewise. * bfd/pe-mips.c: Likewise. * bfd/peXXigen.c: Likewise. * bfd/reloc.c: Likewise. * bfd/reloc16.c: Likewise. * bfd/sparclinux.c: Likewise. * bfd/sunos.c: Likewise. * bfd/vms-alpha.c: Likewise. * bfd/xcofflink.c: Likewise. include/ * include/bfdlink.h (output_type): New enum. (bfd_link_executable): New macro. (bfd_link_dll): Likewise. (bfd_link_relocatable): Likewise. (bfd_link_pic): Likewise. (bfd_link_pie): Likewise. (bfd_link_info): Remove shared, executable, pie and relocatable. Add output_type and pic. ld/ * ld/ldctor.c: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * ld/ldemul.c: Likewise. * ld/ldfile.c: Likewise. * ld/ldlang.c: Likewise. * ld/ldmain.c: Likewise. * ld/ldwrite.c: Likewise. * ld/lexsup.c: Likewise. * ld/pe-dll.c: Likewise. * ld/plugin.c: Likewise. * ld/emultempl/aarch64elf.em: Likewise. * ld/emultempl/aix.em: Likewise. * ld/emultempl/alphaelf.em: Likewise. * ld/emultempl/armcoff.em: Likewise. * ld/emultempl/armelf.em: Likewise. * ld/emultempl/avrelf.em: Likewise. * ld/emultempl/beos.em: Likewise. * ld/emultempl/cr16elf.em: Likewise. * ld/emultempl/elf-generic.em: Likewise. * ld/emultempl/elf32.em: Likewise. * ld/emultempl/genelf.em: Likewise. * ld/emultempl/generic.em: Likewise. * ld/emultempl/gld960.em: Likewise. * ld/emultempl/gld960c.em: Likewise. * ld/emultempl/hppaelf.em: Likewise. * ld/emultempl/irix.em: Likewise. * ld/emultempl/linux.em: Likewise. * ld/emultempl/lnk960.em: Likewise. * ld/emultempl/m68hc1xelf.em: Likewise. * ld/emultempl/m68kcoff.em: Likewise. * ld/emultempl/m68kelf.em: Likewise. * ld/emultempl/metagelf.em: Likewise. * ld/emultempl/mipself.em: Likewise. * ld/emultempl/mmo.em: Likewise. * ld/emultempl/msp430.em: Likewise. * ld/emultempl/nds32elf.em: Likewise. * ld/emultempl/needrelax.em: Likewise. * ld/emultempl/nios2elf.em: Likewise. * ld/emultempl/pe.em: Likewise. * ld/emultempl/pep.em: Likewise. * ld/emultempl/ppc32elf.em: Likewise. * ld/emultempl/ppc64elf.em: Likewise. * ld/emultempl/sh64elf.em: Likewise. * ld/emultempl/solaris2.em: Likewise. * ld/emultempl/spuelf.em: Likewise. * ld/emultempl/sunos.em: Likewise. * ld/emultempl/tic6xdsbt.em: Likewise. * ld/emultempl/ticoff.em: Likewise. * ld/emultempl/v850elf.em: Likewise. * ld/emultempl/vms.em: Likewise. * ld/emultempl/vxworks.em: Likewise.
2015-08-18 14:51:03 +02:00
if (!bfd_link_pic (info) && !h->def_regular)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
h->root.u.def.section = s;
h->root.u.def.value = h->plt.offset;
}
/* Make room for this entry. For now we only create the
small model PLT entries. We later need to find a way
of relaxing into these from the large model PLT entries. */
[BFD, LD, AArch64, 2/3] Add --force-bti to enable BTI and to select BTI enabled PLTs This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds a new ld command line option: --force-bti. In the presence of this option, the linker enables BTI with the GNU_PROPERTY_AARCH64_FEATURE_1_BTI feature. This gives out warning in case of missing gnu notes for BTI in inputs. 2) It also defines a new set of BTI enabled PLTs. These are used either when all the inputs are marked with GNU_PROPERTY_AARCH64_FEATURE_1_BTI or when the new --force-bti option is used. This required adding new fields in elf_aarch64_link_hash_table so that we could make the PLT related information more generic. 3) It also defines a dynamic tag DT_AARCH64_BTI_PLT. The linker uses this whenever it picks BTI enabled PLTs. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * bfd-in.h (aarch64_plt_type, aarch64_enable_bti_type): New. (aarch64_bti_pac_info): New. (bfd_elf64_aarch64_set_options): Add aarch64_bti_pac_info argument. (bfd_elf32_aarch64_set_options): Likewise. * bfd-in2.h: Regenerate * elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): New. (PLT_BTI_SMALL_ENTRY_SIZE, PLT_BTI_TLSDESC_ENTRY_SIZE): New. (elfNN_aarch64_small_plt0_bti_entry): New. (elfNN_aarch64_small_plt_bti_entry): New. (elfNN_aarch64_tlsdesc_small_plt_bti_entry): New. (elf_aarch64_obj_tdata): Add no_bti_warn and plt_type fields. (elf_aarch64_link_hash_table): Add plt0_entry, plt_entry and tlsdesc_plt_entry_size fields. (elfNN_aarch64_link_hash_table_create): Initialise the new fields. (setup_plt_values): New helper function. (bfd_elfNN_aarch64_set_options): Use new bp_info to set plt sizes and bti enable type. (elfNN_aarch64_allocate_dynrelocs): Use new size members instead of fixed macros. (elfNN_aarch64_size_dynamic_sections): Likewise and add checks. (elfNN_aarch64_create_small_pltn_entry): Use new generic pointers to plt stubs instead of fixed ones and update filling them according to the need for bti. (elfNN_aarch64_init_small_plt0_entry): Likewise. (elfNN_aarch64_finish_dynamic_sections): Likewise. (get_plt_type, elfNN_aarch64_get_synthetic_symtab): New. (elfNN_aarch64_plt_sym_val): Update size accordingly. (elfNN_aarch64_link_setup_gnu_properties): Set up plts if BTI GNU NOTE is set. (bfd_elfNN_get_synthetic_symtab): Define. (elfNN_aarch64_merge_gnu_properties): Give out warning with --force-bti and mising BTI NOTE SECTION. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * readelf.c (get_aarch64_dynamic_type): New. (get_dynamic_type): Use above for EM_AARCH64. (dynamic_section_aarch64_val): New. (process_dynamic_section): Use above for EM_AARCH64. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * elf/aarch64.h (DT_AARCH64_BTI_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * NEWS: Document --force-bti. * emultempl/aarch64elf.em (plt_type, bti_type, OPTION_FORCE_BTI): New. (PARSE_AND_LIST_SHORTOPTS, PARSE_AND_LIST_OPTIONS): Add force-bti. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FORCE_BTI. * testsuite/ld-aarch64/aarch64-elf.exp: Add all the tests below. * testsuite/ld-aarch64/bti-plt-1.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: New test. * testsuite/ld-aarch64/bti-plt-2.s: New test. * testsuite/ld-aarch64/bti-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-3.d: New test. * testsuite/ld-aarch64/bti-plt-4.d: New test. * testsuite/ld-aarch64/bti-plt-5.d: New test. * testsuite/ld-aarch64/bti-plt-6.d: New test. * testsuite/ld-aarch64/bti-plt-7.d: New test. * testsuite/ld-aarch64/bti-plt-so.s: New test. * testsuite/ld-aarch64/bti-plt.ld: New test.
2019-03-13 11:54:30 +01:00
s->size += htab->plt_entry_size;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* We also need to make an entry in the .got.plt section, which
will be placed in the .got section by the linker script. */
htab->root.sgotplt->size += GOT_ENTRY_SIZE;
/* We also need to make an entry in the .rela.plt section. */
htab->root.srelplt->size += RELOC_SIZE (htab);
/* We need to ensure that all GOT entries that serve the PLT
are consecutive with the special GOT slots [0] [1] and
[2]. Any addtional relocations, such as
R_AARCH64_TLSDESC, must be placed after the PLT related
entries. We abuse the reloc_count such that during
sizing we adjust reloc_count to indicate the number of
PLT related reserved entries. In subsequent phases when
filling in the contents of the reloc entries, PLT related
entries are placed by computing their PLT index (0
.. reloc_count). While other none PLT relocs are placed
at the slot indicated by reloc_count and reloc_count is
updated. */
htab->root.srelplt->reloc_count++;
aarch64: handle STO_AARCH64_VARIANT_PCS in bfd Propagate STO_AARCH64_VARIANT_PCS st_other attribute to the output and add DT_AARCH64_VARIANT_PCS dynamic tag if necessary. Mismatching attributes are not diagnosed. bfd/ChangeLog: * elfnn-aarch64.c (elfNN_aarch64_merge_symbol_attribute): New function. (struct elf_aarch64_link_hash_table): Add variant_pcs member. (elfNN_aarch64_allocate_dynrelocs): Update variant_pcs. (elfNN_aarch64_size_dynamic_sections): Add DT_AARCH64_VARIANT_PCS. (elf_backend_merge_symbol_attribute): Define. ld/ChangeLog: * testsuite/ld-aarch64/aarch64-elf.exp: Add new tests. * testsuite/ld-aarch64/variant_pcs-1.s: New asm for tests. * testsuite/ld-aarch64/variant_pcs-2.s: New asm for tests. * testsuite/ld-aarch64/variant_pcs-now.d: New test. * testsuite/ld-aarch64/variant_pcs-r.d: New test. * testsuite/ld-aarch64/variant_pcs-shared.d: New test. * testsuite/ld-aarch64/variant_pcs.ld: New linker script for tests.
2019-04-25 16:07:14 +02:00
/* Mark the DSO in case R_<CLS>_JUMP_SLOT relocs against
variant PCS symbols are present. */
if (h->other & STO_AARCH64_VARIANT_PCS)
htab->variant_pcs = 1;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
}
else
{
h->plt.offset = (bfd_vma) - 1;
h->needs_plt = 0;
}
}
else
{
h->plt.offset = (bfd_vma) - 1;
h->needs_plt = 0;
}
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
eh = (struct elf_aarch64_link_hash_entry *) h;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
eh->tlsdesc_got_jump_table_offset = (bfd_vma) - 1;
if (h->got.refcount > 0)
{
bfd_boolean dyn;
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
unsigned got_type = elf_aarch64_hash_entry (h)->got_type;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
h->got.offset = (bfd_vma) - 1;
dyn = htab->root.dynamic_sections_created;
/* Make sure this symbol is output as a dynamic symbol.
BFD whitespace fixes Binutils is supposed to use tabs. In my git config I have whitespace = indent-with-non-tab,space-before-tab,trailing-space and I got annoyed enough seeing red in "git diff" output to fix the problems. * doc/header.sed: Trim trailing space when splitting lines. * aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-cris.c, * aout-ns32k.c, * aout-target.h, * aout-tic30.c, * aoutf1.h, * aoutx.h, * arc-got.h, * arc-plt.def, * arc-plt.h, * archive.c, * archive64.c, * archures.c, * armnetbsd.c, * bfd-in.h, * bfd.c, * bfdio.c, * binary.c, * bout.c, * cache.c, * cisco-core.c, * coff-alpha.c, * coff-apollo.c, * coff-arm.c, * coff-h8300.c, * coff-i386.c, * coff-i860.c, * coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mcore.c, * coff-mips.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-stgo32.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * compress.c, * corefile.c, * cpu-alpha.c, * cpu-arm.c, * cpu-avr.c, * cpu-bfin.c, * cpu-cr16.c, * cpu-cr16c.c, * cpu-crx.c, * cpu-d10v.c, * cpu-frv.c, * cpu-ft32.c, * cpu-i370.c, * cpu-i960.c, * cpu-ia64-opc.c, * cpu-ip2k.c, * cpu-lm32.c, * cpu-m32r.c, * cpu-mcore.c, * cpu-microblaze.c, * cpu-mips.c, * cpu-moxie.c, * cpu-mt.c, * cpu-nios2.c, * cpu-ns32k.c, * cpu-or1k.c, * cpu-powerpc.c, * cpu-pru.c, * cpu-sh.c, * cpu-spu.c, * cpu-v850.c, * cpu-v850_rh850.c, * cpu-xgate.c, * cpu-z80.c, * dwarf1.c, * dwarf2.c, * ecoff.c, * ecofflink.c, * ecoffswap.h, * elf-bfd.h, * elf-eh-frame.c, * elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf-s390-common.c, * elf-strtab.c, * elf-vxworks.c, * elf.c, * elf32-am33lin.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-avr.h, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-i860.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68hc1x.c, * elf32-m68hc1x.h, * elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nds32.h, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score.h, * elf32-score7.c, * elf32-sh-symbian.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilegx.c, * elf32-tilegx.h, * elf32-tilepro.c, * elf32-tilepro.h, * elf32-v850.c, * elf32-vax.c, * elf32-wasm32.c, * elf32-xc16x.c, * elf32-xgate.c, * elf32-xgate.h, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-tilegx.c, * elf64-tilegx.h, * elf64-x86-64.c, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-aarch64.h, * elfxx-ia64.c, * elfxx-ia64.h, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * elfxx-x86.h, * freebsd.h, * hash.c, * host-aout.c, * hp300hpux.c, * hppabsd-core.c, * hpux-core.c, * i386aout.c, * i386linux.c, * i386lynx.c, * i386mach3.c, * i386msdos.c, * i386netbsd.c, * ieee.c, * ihex.c, * irix-core.c, * libaout.h, * libbfd-in.h, * libbfd.c, * libcoff-in.h, * libnlm.h, * libpei.h, * libxcoff.h, * linker.c, * lynx-core.c, * m68k4knetbsd.c, * m68klinux.c, * m68knetbsd.c, * m88kmach3.c, * mach-o-aarch64.c, * mach-o-arm.c, * mach-o-i386.c, * mach-o-target.c, * mach-o-x86-64.c, * mach-o.c, * mach-o.h, * merge.c, * mipsbsd.c, * mmo.c, * netbsd.h, * netbsd-core.c, * newsos3.c, * nlm-target.h, * nlm32-ppc.c, * nlm32-sparc.c, * nlmcode.h, * ns32k.h, * ns32knetbsd.c, * oasys.c, * opncls.c, * pc532-mach.c, * pdp11.c, * pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-mips.c, * pe-x86_64.c, * peXXigen.c, * pef.c, * pef.h, * pei-arm.c, * pei-i386.c, * pei-mcore.c, * pei-x86_64.c, * peicode.h, * plugin.c, * ppcboot.c, * ptrace-core.c, * reloc.c, * riscix.c, * rs6000-core.c, * section.c, * som.c, * som.h, * sparclinux.c, * sparcnetbsd.c, * srec.c, * stabs.c, * sunos.c, * syms.c, * targets.c, * tekhex.c, * trad-core.c, * vax1knetbsd.c, * vaxnetbsd.c, * verilog.c, * versados.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * wasm-module.c, * wasm-module.h, * xcofflink.c, * xsym.c, * xsym.h: Whitespace fixes. * bfd-in2.h, * libbfd.h, * libcoff.h: Regenerate.
2017-12-05 23:56:00 +01:00
Undefined weak syms won't yet be marked as dynamic. */
[AArch64] Only override the symbol dynamic decision on undefined weak symbol This fix is an adaption of the x86-64 PR ld/21402 fix to AArch64. After the generic code deciding one symbol is not dynamic, AArch64 backend only overrides the decision on undefined weak symbols. bfd/ PR ld/21402 * elfnn-aarch64.c (elfNN_aarch64_allocate_dynrelocs): Only make undefined weak symbols into dynamic. (elfNN_aarch64_final_link_relocate): Generate runtime RELATIVE relocation for non-dynamic symbols. (elfNN_aarch64_finish_dynamic_symbol): Add sanity check.
2017-06-29 12:47:43 +02:00
if (dyn && h->dynindx == -1 && !h->forced_local
&& h->root.type == bfd_link_hash_undefweak)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
if (!bfd_elf_link_record_dynamic_symbol (info, h))
return FALSE;
}
if (got_type == GOT_UNKNOWN)
{
}
else if (got_type == GOT_NORMAL)
{
h->got.offset = htab->root.sgot->size;
htab->root.sgot->size += GOT_ENTRY_SIZE;
if ((ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
|| h->root.type != bfd_link_hash_undefweak)
Add output_type to bfd_link_info The "shared" field in bfd_link_info is set for both DSO and and PIE. There are separate fields for executable and relocatable outputs. This patch adds an "output_type" field: enum output_type { type_unknown = 0, type_executable, type_dll, type_relocatable }; and a "pic" field to bfd_link_info to replace shared, executable and relocatable fields so that we can use the "output_type" field to check for output type and the "pic" field check if output is PIC. Macros, bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie, are provided to check for output features. bfd/ * bfd/aoutx.h: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * bfd/bout.c: Likewise. * bfd/coff-alpha.c: Likewise. * bfd/coff-arm.c: Likewise. * bfd/coff-i386.c: Likewise. * bfd/coff-i960.c: Likewise. * bfd/coff-m68k.c: Likewise. * bfd/coff-mcore.c: Likewise. * bfd/coff-mips.c: Likewise. * bfd/coff-ppc.c: Likewise. * bfd/coff-rs6000.c: Likewise. * bfd/coff-sh.c: Likewise. * bfd/coff-tic80.c: Likewise. * bfd/coff-x86_64.c: Likewise. * bfd/coff64-rs6000.c: Likewise. * bfd/coffgen.c: Likewise. * bfd/cofflink.c: Likewise. * bfd/ecoff.c: Likewise. * bfd/ecofflink.c: Likewise. * bfd/elf-bfd.h: Likewise. * bfd/elf-eh-frame.c: Likewise. * bfd/elf-ifunc.c: Likewise. * bfd/elf-m10200.c: Likewise. * bfd/elf-m10300.c: Likewise. * bfd/elf-s390-common.c: Likewise. * bfd/elf-vxworks.c: Likewise. * bfd/elf.c: Likewise. * bfd/elf32-arm.c: Likewise. * bfd/elf32-avr.c: Likewise. * bfd/elf32-bfin.c: Likewise. * bfd/elf32-cr16.c: Likewise. * bfd/elf32-cr16c.c: Likewise. * bfd/elf32-cris.c: Likewise. * bfd/elf32-crx.c: Likewise. * bfd/elf32-d10v.c: Likewise. * bfd/elf32-dlx.c: Likewise. * bfd/elf32-epiphany.c: Likewise. * bfd/elf32-fr30.c: Likewise. * bfd/elf32-frv.c: Likewise. * bfd/elf32-ft32.c: Likewise. * bfd/elf32-h8300.c: Likewise. * bfd/elf32-hppa.c: Likewise. * bfd/elf32-i370.c: Likewise. * bfd/elf32-i386.c: Likewise. * bfd/elf32-i860.c: Likewise. * bfd/elf32-ip2k.c: Likewise. * bfd/elf32-iq2000.c: Likewise. * bfd/elf32-lm32.c: Likewise. * bfd/elf32-m32c.c: Likewise. * bfd/elf32-m32r.c: Likewise. * bfd/elf32-m68hc11.c: Likewise. * bfd/elf32-m68hc1x.c: Likewise. * bfd/elf32-m68k.c: Likewise. * bfd/elf32-mcore.c: Likewise. * bfd/elf32-mep.c: Likewise. * bfd/elf32-metag.c: Likewise. * bfd/elf32-microblaze.c: Likewise. * bfd/elf32-moxie.c: Likewise. * bfd/elf32-msp430.c: Likewise. * bfd/elf32-mt.c: Likewise. * bfd/elf32-nds32.c: Likewise. * bfd/elf32-nios2.c: Likewise. * bfd/elf32-or1k.c: Likewise. * bfd/elf32-ppc.c: Likewise. * bfd/elf32-rl78.c: Likewise. * bfd/elf32-rx.c: Likewise. * bfd/elf32-s390.c: Likewise. * bfd/elf32-score.c: Likewise. * bfd/elf32-score7.c: Likewise. * bfd/elf32-sh-symbian.c: Likewise. * bfd/elf32-sh.c: Likewise. * bfd/elf32-sh64.c: Likewise. * bfd/elf32-spu.c: Likewise. * bfd/elf32-tic6x.c: Likewise. * bfd/elf32-tilepro.c: Likewise. * bfd/elf32-v850.c: Likewise. * bfd/elf32-vax.c: Likewise. * bfd/elf32-visium.c: Likewise. * bfd/elf32-xc16x.c: Likewise. * bfd/elf32-xstormy16.c: Likewise. * bfd/elf32-xtensa.c: Likewise. * bfd/elf64-alpha.c: Likewise. * bfd/elf64-hppa.c: Likewise. * bfd/elf64-ia64-vms.c: Likewise. * bfd/elf64-mmix.c: Likewise. * bfd/elf64-ppc.c: Likewise. * bfd/elf64-s390.c: Likewise. * bfd/elf64-sh64.c: Likewise. * bfd/elf64-x86-64.c: Likewise. * bfd/elflink.c: Likewise. * bfd/elfnn-aarch64.c: Likewise. * bfd/elfnn-ia64.c: Likewise. * bfd/elfxx-mips.c: Likewise. * bfd/elfxx-sparc.c: Likewise. * bfd/elfxx-tilegx.c: Likewise. * bfd/i386linux.c: Likewise. * bfd/linker.c: Likewise. * bfd/m68klinux.c: Likewise. * bfd/pdp11.c: Likewise. * bfd/pe-mips.c: Likewise. * bfd/peXXigen.c: Likewise. * bfd/reloc.c: Likewise. * bfd/reloc16.c: Likewise. * bfd/sparclinux.c: Likewise. * bfd/sunos.c: Likewise. * bfd/vms-alpha.c: Likewise. * bfd/xcofflink.c: Likewise. include/ * include/bfdlink.h (output_type): New enum. (bfd_link_executable): New macro. (bfd_link_dll): Likewise. (bfd_link_relocatable): Likewise. (bfd_link_pic): Likewise. (bfd_link_pie): Likewise. (bfd_link_info): Remove shared, executable, pie and relocatable. Add output_type and pic. ld/ * ld/ldctor.c: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * ld/ldemul.c: Likewise. * ld/ldfile.c: Likewise. * ld/ldlang.c: Likewise. * ld/ldmain.c: Likewise. * ld/ldwrite.c: Likewise. * ld/lexsup.c: Likewise. * ld/pe-dll.c: Likewise. * ld/plugin.c: Likewise. * ld/emultempl/aarch64elf.em: Likewise. * ld/emultempl/aix.em: Likewise. * ld/emultempl/alphaelf.em: Likewise. * ld/emultempl/armcoff.em: Likewise. * ld/emultempl/armelf.em: Likewise. * ld/emultempl/avrelf.em: Likewise. * ld/emultempl/beos.em: Likewise. * ld/emultempl/cr16elf.em: Likewise. * ld/emultempl/elf-generic.em: Likewise. * ld/emultempl/elf32.em: Likewise. * ld/emultempl/genelf.em: Likewise. * ld/emultempl/generic.em: Likewise. * ld/emultempl/gld960.em: Likewise. * ld/emultempl/gld960c.em: Likewise. * ld/emultempl/hppaelf.em: Likewise. * ld/emultempl/irix.em: Likewise. * ld/emultempl/linux.em: Likewise. * ld/emultempl/lnk960.em: Likewise. * ld/emultempl/m68hc1xelf.em: Likewise. * ld/emultempl/m68kcoff.em: Likewise. * ld/emultempl/m68kelf.em: Likewise. * ld/emultempl/metagelf.em: Likewise. * ld/emultempl/mipself.em: Likewise. * ld/emultempl/mmo.em: Likewise. * ld/emultempl/msp430.em: Likewise. * ld/emultempl/nds32elf.em: Likewise. * ld/emultempl/needrelax.em: Likewise. * ld/emultempl/nios2elf.em: Likewise. * ld/emultempl/pe.em: Likewise. * ld/emultempl/pep.em: Likewise. * ld/emultempl/ppc32elf.em: Likewise. * ld/emultempl/ppc64elf.em: Likewise. * ld/emultempl/sh64elf.em: Likewise. * ld/emultempl/solaris2.em: Likewise. * ld/emultempl/spuelf.em: Likewise. * ld/emultempl/sunos.em: Likewise. * ld/emultempl/tic6xdsbt.em: Likewise. * ld/emultempl/ticoff.em: Likewise. * ld/emultempl/v850elf.em: Likewise. * ld/emultempl/vms.em: Likewise. * ld/emultempl/vxworks.em: Likewise.
2015-08-18 14:51:03 +02:00
&& (bfd_link_pic (info)
[PR ld/22269] aarch64: Handle local undefined weak symbols With static pie linking undefined weak symbols are forced to resolve locally to 0, so no GOT setup is needed in elfNN_aarch64_finish_dynamic_symbol, which previously failed for these symbols. The failure caused the unhelpful error message: "ld: final link failed: Nonrepresentable section on output" bfd/ PR ld/22269 * elfnn-aarch64.c (elfNN_aarch64_finish_dynamic_symbol): Use UNDEFWEAK_NO_DYNAMIC_RELOC to avoid dynamic GOT relocs. (elfNN_aarch64_allocate_dynrelocs): Likewise.
2017-11-15 16:56:30 +01:00
|| WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, 0, h))
/* Undefined weak symbol in static PIE resolves to 0 without
any dynamic relocations. */
&& !UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
htab->root.srelgot->size += RELOC_SIZE (htab);
}
}
else
{
int indx;
if (got_type & GOT_TLSDESC_GD)
{
eh->tlsdesc_got_jump_table_offset =
(htab->root.sgotplt->size
- aarch64_compute_jump_table_size (htab));
htab->root.sgotplt->size += GOT_ENTRY_SIZE * 2;
h->got.offset = (bfd_vma) - 2;
}
if (got_type & GOT_TLS_GD)
{
h->got.offset = htab->root.sgot->size;
htab->root.sgot->size += GOT_ENTRY_SIZE * 2;
}
if (got_type & GOT_TLS_IE)
{
h->got.offset = htab->root.sgot->size;
htab->root.sgot->size += GOT_ENTRY_SIZE;
}
indx = h && h->dynindx != -1 ? h->dynindx : 0;
if ((ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
|| h->root.type != bfd_link_hash_undefweak)
[PR ld/22263] aarch64: Avoid dynamic TLS relocs in PIE No dynamic relocs are needed for TLS defined in an executable, the TP relative offset is known at link time. Fixes FAIL: Build pr22263-1 bfd/ PR ld/22263 * elfnn-aarch64.c (elfNN_aarch64_relocate_section): Use bfd_link_executable instead of bfd_link_pic for TLS. (elfNN_aarch64_allocate_dynrelocs): Likewise. (aarch64_can_relax_tls): Likewise.
2017-11-15 18:40:04 +01:00
&& (!bfd_link_executable (info)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
|| indx != 0
|| WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, 0, h)))
{
if (got_type & GOT_TLSDESC_GD)
{
htab->root.srelplt->size += RELOC_SIZE (htab);
/* Note reloc_count not incremented here! We have
already adjusted reloc_count for this relocation
type. */
/* TLSDESC PLT is now needed, but not yet determined. */
ELF: Move tlsdesc_plt/tlsdesc_got to elf_link_hash_table All ELF backends with TLS descriptor support have /* The offset into splt of the PLT entry for the TLS descriptor resolver. Special values are 0, if not necessary (or not found to be necessary yet), and -1 if needed but not determined yet. */ bfd_vma tlsdesc_plt; /* The GOT offset for the lazy trampoline. Communicated to the loader via DT_TLSDESC_GOT. The magic value (bfd_vma) -1 indicates an offset is not allocated. */ bfd_vma tlsdesc_got; in symbol hash entry. Move tlsdesc_plt/tlsdesc_got to elf_link_hash_entry to reduce code duplication. * elf-bfd.h (elf_link_hash_entry): Add tlsdesc_plt and tlsdesc_got. * elf32-arm.c (elf32_arm_link_hash_table): Remove tlsdesc_plt and dt_tlsdesc_got. (elf32_arm_size_dynamic_sections): Updated. Clear root.tlsdesc_plt for DF_BIND_NOW. (elf32_arm_finish_dynamic_sections): Updated. (elf32_arm_output_arch_local_syms): Likewise. * elf32-nds32.c (nds32_elf_size_dynamic_sections): Updated. Clear root.tlsdesc_plt for DF_BIND_NOW. (nds32_elf_finish_dynamic_sections): Updated. * elf32-nds32.h (elf_nds32_link_hash_table): Remove dt_tlsdesc_plt and dt_tlsdesc_got. * elf64-x86-64.c (elf_x86_64_finish_dynamic_sections): Updated. * elfnn-aarch64.c (elf_aarch64_link_hash_table): Remove tlsdesc_plt and dt_tlsdesc_got. (elfNN_aarch64_allocate_dynrelocs): Updated. (elfNN_aarch64_finish_dynamic_sections): Likewise. (elfNN_aarch64_size_dynamic_sections): Updated. Clear root.tlsdesc_plt for DF_BIND_NOW. Don't check DF_BIND_NOW twice. * elfxx-x86.c (elf_x86_allocate_dynrelocs): Updated. (_bfd_x86_elf_size_dynamic_sections): Likewise. (_bfd_x86_elf_finish_dynamic_sections): Likewise. * elfxx-x86.h (elf_x86_link_hash_table): Remove tlsdesc_plt and tlsdesc_got.
2020-06-08 13:24:04 +02:00
htab->root.tlsdesc_plt = (bfd_vma) - 1;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
}
if (got_type & GOT_TLS_GD)
htab->root.srelgot->size += RELOC_SIZE (htab) * 2;
if (got_type & GOT_TLS_IE)
htab->root.srelgot->size += RELOC_SIZE (htab);
}
}
}
else
{
h->got.offset = (bfd_vma) - 1;
}
ELF: Move dyn_relocs to struct elf_link_hash_entry All ELF backends with shared library support have /* Track dynamic relocs copied for this symbol. */ struct elf_dyn_relocs *dyn_relocs; in symbol hash entry. Move dyn_relocs to struct elf_link_hash_entry to reduce code duplication. PR ld/26067 * elf-bfd.h (elf_link_hash_entry): Add dyn_relocs after size. * elf-s390-common.c (s390_elf_allocate_ifunc_dyn_relocs): Updated. * elf32-arc.c (elf_arc_link_hash_entry): Remove dyn_relocs. (elf_arc_link_hash_newfunc): Updated. * elf32-arm.c (elf32_arm_link_hash_entry): Remove dyn_relocs. (elf32_arm_link_hash_newfunc): Updated. (elf32_arm_copy_indirect_symbol): Likewise. (elf32_arm_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs_for_symbol): Likewise. * elf32-csky.c (csky_elf_link_hash_entry): Remove dyn_relocs. (csky_elf_link_hash_newfunc): Updated. (csky_allocate_dynrelocs): Likewise. (readonly_dynrelocs): Likewise. (csky_elf_copy_indirect_symbol): Likewise. * elf32-hppa.c (elf32_hppa_link_hash_entry): Remove dyn_relocs. (hppa_link_hash_newfunc): Updated. (elf32_hppa_copy_indirect_symbol): Likewise. (elf32_hppa_hide_symbol): Likewise. (elf32_hppa_adjust_dynamic_symbol): Likewise. (allocate_dynrelocs): Likewise. (elf32_hppa_relocate_section): Likewise. * elf32-i386.c (elf_i386_check_relocs): Likewise. * elf32-lm32.c (elf_lm32_link_hash_entry): Removed. (lm32_elf_link_hash_newfunc): Likewise. (lm32_elf_link_hash_table_create): Updated. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. (lm32_elf_copy_indirect_symbol): Likewise. * elf32-m32r.c (elf_m32r_link_hash_entry): Removed. (m32r_elf_link_hash_newfunc): Likewise. (m32r_elf_link_hash_table_create): Updated. (m32r_elf_copy_indirect_symbol): Likewise. (allocate_dynrelocs): Likewise. * elf32-metag.c (elf_metag_link_hash_entry): Remove dyn_relocs. (metag_link_hash_newfunc): Updated. (elf_metag_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elf32-microblaze.c (elf32_mb_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (microblaze_elf_check_relocs): Likewise. (microblaze_elf_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elf32-nds32.c (elf_nds32_link_hash_entry): Remove dyn_relocs. (nds32_elf_link_hash_newfunc): Updated. (nds32_elf_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. (nds32_elf_check_relocs): Likewise. * elf32-nios2.c (elf32_nios2_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (nios2_elf32_copy_indirect_symbol): Likewise. (nios2_elf32_check_relocs): Likewise. (allocate_dynrelocs): Likewise. * elf32-or1k.c (elf_or1k_link_hash_entry): Remove dyn_relocs. (or1k_elf_link_hash_newfunc): Updated. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. (or1k_elf_copy_indirect_symbol): Likewise. * elf32-ppc.c (ppc_elf_link_hash_entry): Remove dyn_relocs. (ppc_elf_link_hash_newfunc): Updated. (ppc_elf_copy_indirect_symbol): Likewise. (ppc_elf_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (ppc_elf_adjust_dynamic_symbol): Likewise. (allocate_dynrelocs): Likewise. (ppc_elf_relocate_section): Likewise. * elf32-s390.c (elf_s390_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (elf_s390_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (elf_s390_adjust_dynamic_symbol): Likewise. (allocate_dynrelocs): Likewise. * elf32-sh.c (elf_sh_link_hash_entry): Remove dyn_relocs. (sh_elf_link_hash_newfunc): Updated. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. (sh_elf_copy_indirect_symbol): Likewise. (sh_elf_check_relocs): Likewise. * elf32-tic6x.c (elf32_tic6x_link_hash_entry): Removed. (elf32_tic6x_link_hash_newfunc): Likewise. (elf32_tic6x_link_hash_table_create): Updated. (readonly_dynrelocs): Likewise. (elf32_tic6x_check_relocs): Likewise. (elf32_tic6x_allocate_dynrelocs): Likewise. * elf32-tilepro.c (tilepro_elf_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (tilepro_elf_copy_indirect_symbol): Likewise. (tilepro_elf_check_relocs): Likewise. (allocate_dynrelocs): Likewise. * elf64-ppc.c (ppc_link_hash_entry): Remove dyn_relocs. (ppc64_elf_copy_indirect_symbol): Updated. (ppc64_elf_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (ppc64_elf_adjust_dynamic_symbol): Likewise. (dec_dynrel_count): Likewise. (allocate_dynrelocs): Likewise. (ppc64_elf_relocate_section): Likewise. * elf64-s390.c (elf_s390_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (elf_s390_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elf64-x86-64.c (elf_x86_64_check_relocs): Likewise. * elfnn-aarch64.c (elf_aarch64_link_hash_entry): Remove dyn_relocs. (elfNN_aarch64_link_hash_newfunc): Updated. (elfNN_aarch64_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (need_copy_relocation_p): Likewise. (elfNN_aarch64_allocate_dynrelocs): Likewise. (elfNN_aarch64_allocate_ifunc_dynrelocs): Likewise. * elfnn-riscv.c (riscv_elf_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (riscv_elf_copy_indirect_symbol): Likewise. (riscv_elf_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (_bfd_sparc_elf_copy_indirect_symbol): Likewise. (_bfd_sparc_elf_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elfxx-tilegx.c (tilegx_elf_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (tilegx_elf_copy_indirect_symbol): Likewise. (tilegx_elf_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elfxx-x86.c (elf_x86_allocate_dynrelocs): Likewise. (readonly_dynrelocs): Likewise. (_bfd_x86_elf_copy_indirect_symbol): Likewise. * elfxx-x86.h (elf_x86_link_hash_entry): Remove dyn_relocs.
2020-06-02 03:18:43 +02:00
if (h->dyn_relocs == NULL)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
return TRUE;
/* In the shared -Bsymbolic case, discard space allocated for
dynamic pc-relative relocs against symbols which turn out to be
defined in regular objects. For the normal shared case, discard
space for pc-relative relocs that have become local due to symbol
visibility changes. */
Add output_type to bfd_link_info The "shared" field in bfd_link_info is set for both DSO and and PIE. There are separate fields for executable and relocatable outputs. This patch adds an "output_type" field: enum output_type { type_unknown = 0, type_executable, type_dll, type_relocatable }; and a "pic" field to bfd_link_info to replace shared, executable and relocatable fields so that we can use the "output_type" field to check for output type and the "pic" field check if output is PIC. Macros, bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie, are provided to check for output features. bfd/ * bfd/aoutx.h: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * bfd/bout.c: Likewise. * bfd/coff-alpha.c: Likewise. * bfd/coff-arm.c: Likewise. * bfd/coff-i386.c: Likewise. * bfd/coff-i960.c: Likewise. * bfd/coff-m68k.c: Likewise. * bfd/coff-mcore.c: Likewise. * bfd/coff-mips.c: Likewise. * bfd/coff-ppc.c: Likewise. * bfd/coff-rs6000.c: Likewise. * bfd/coff-sh.c: Likewise. * bfd/coff-tic80.c: Likewise. * bfd/coff-x86_64.c: Likewise. * bfd/coff64-rs6000.c: Likewise. * bfd/coffgen.c: Likewise. * bfd/cofflink.c: Likewise. * bfd/ecoff.c: Likewise. * bfd/ecofflink.c: Likewise. * bfd/elf-bfd.h: Likewise. * bfd/elf-eh-frame.c: Likewise. * bfd/elf-ifunc.c: Likewise. * bfd/elf-m10200.c: Likewise. * bfd/elf-m10300.c: Likewise. * bfd/elf-s390-common.c: Likewise. * bfd/elf-vxworks.c: Likewise. * bfd/elf.c: Likewise. * bfd/elf32-arm.c: Likewise. * bfd/elf32-avr.c: Likewise. * bfd/elf32-bfin.c: Likewise. * bfd/elf32-cr16.c: Likewise. * bfd/elf32-cr16c.c: Likewise. * bfd/elf32-cris.c: Likewise. * bfd/elf32-crx.c: Likewise. * bfd/elf32-d10v.c: Likewise. * bfd/elf32-dlx.c: Likewise. * bfd/elf32-epiphany.c: Likewise. * bfd/elf32-fr30.c: Likewise. * bfd/elf32-frv.c: Likewise. * bfd/elf32-ft32.c: Likewise. * bfd/elf32-h8300.c: Likewise. * bfd/elf32-hppa.c: Likewise. * bfd/elf32-i370.c: Likewise. * bfd/elf32-i386.c: Likewise. * bfd/elf32-i860.c: Likewise. * bfd/elf32-ip2k.c: Likewise. * bfd/elf32-iq2000.c: Likewise. * bfd/elf32-lm32.c: Likewise. * bfd/elf32-m32c.c: Likewise. * bfd/elf32-m32r.c: Likewise. * bfd/elf32-m68hc11.c: Likewise. * bfd/elf32-m68hc1x.c: Likewise. * bfd/elf32-m68k.c: Likewise. * bfd/elf32-mcore.c: Likewise. * bfd/elf32-mep.c: Likewise. * bfd/elf32-metag.c: Likewise. * bfd/elf32-microblaze.c: Likewise. * bfd/elf32-moxie.c: Likewise. * bfd/elf32-msp430.c: Likewise. * bfd/elf32-mt.c: Likewise. * bfd/elf32-nds32.c: Likewise. * bfd/elf32-nios2.c: Likewise. * bfd/elf32-or1k.c: Likewise. * bfd/elf32-ppc.c: Likewise. * bfd/elf32-rl78.c: Likewise. * bfd/elf32-rx.c: Likewise. * bfd/elf32-s390.c: Likewise. * bfd/elf32-score.c: Likewise. * bfd/elf32-score7.c: Likewise. * bfd/elf32-sh-symbian.c: Likewise. * bfd/elf32-sh.c: Likewise. * bfd/elf32-sh64.c: Likewise. * bfd/elf32-spu.c: Likewise. * bfd/elf32-tic6x.c: Likewise. * bfd/elf32-tilepro.c: Likewise. * bfd/elf32-v850.c: Likewise. * bfd/elf32-vax.c: Likewise. * bfd/elf32-visium.c: Likewise. * bfd/elf32-xc16x.c: Likewise. * bfd/elf32-xstormy16.c: Likewise. * bfd/elf32-xtensa.c: Likewise. * bfd/elf64-alpha.c: Likewise. * bfd/elf64-hppa.c: Likewise. * bfd/elf64-ia64-vms.c: Likewise. * bfd/elf64-mmix.c: Likewise. * bfd/elf64-ppc.c: Likewise. * bfd/elf64-s390.c: Likewise. * bfd/elf64-sh64.c: Likewise. * bfd/elf64-x86-64.c: Likewise. * bfd/elflink.c: Likewise. * bfd/elfnn-aarch64.c: Likewise. * bfd/elfnn-ia64.c: Likewise. * bfd/elfxx-mips.c: Likewise. * bfd/elfxx-sparc.c: Likewise. * bfd/elfxx-tilegx.c: Likewise. * bfd/i386linux.c: Likewise. * bfd/linker.c: Likewise. * bfd/m68klinux.c: Likewise. * bfd/pdp11.c: Likewise. * bfd/pe-mips.c: Likewise. * bfd/peXXigen.c: Likewise. * bfd/reloc.c: Likewise. * bfd/reloc16.c: Likewise. * bfd/sparclinux.c: Likewise. * bfd/sunos.c: Likewise. * bfd/vms-alpha.c: Likewise. * bfd/xcofflink.c: Likewise. include/ * include/bfdlink.h (output_type): New enum. (bfd_link_executable): New macro. (bfd_link_dll): Likewise. (bfd_link_relocatable): Likewise. (bfd_link_pic): Likewise. (bfd_link_pie): Likewise. (bfd_link_info): Remove shared, executable, pie and relocatable. Add output_type and pic. ld/ * ld/ldctor.c: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * ld/ldemul.c: Likewise. * ld/ldfile.c: Likewise. * ld/ldlang.c: Likewise. * ld/ldmain.c: Likewise. * ld/ldwrite.c: Likewise. * ld/lexsup.c: Likewise. * ld/pe-dll.c: Likewise. * ld/plugin.c: Likewise. * ld/emultempl/aarch64elf.em: Likewise. * ld/emultempl/aix.em: Likewise. * ld/emultempl/alphaelf.em: Likewise. * ld/emultempl/armcoff.em: Likewise. * ld/emultempl/armelf.em: Likewise. * ld/emultempl/avrelf.em: Likewise. * ld/emultempl/beos.em: Likewise. * ld/emultempl/cr16elf.em: Likewise. * ld/emultempl/elf-generic.em: Likewise. * ld/emultempl/elf32.em: Likewise. * ld/emultempl/genelf.em: Likewise. * ld/emultempl/generic.em: Likewise. * ld/emultempl/gld960.em: Likewise. * ld/emultempl/gld960c.em: Likewise. * ld/emultempl/hppaelf.em: Likewise. * ld/emultempl/irix.em: Likewise. * ld/emultempl/linux.em: Likewise. * ld/emultempl/lnk960.em: Likewise. * ld/emultempl/m68hc1xelf.em: Likewise. * ld/emultempl/m68kcoff.em: Likewise. * ld/emultempl/m68kelf.em: Likewise. * ld/emultempl/metagelf.em: Likewise. * ld/emultempl/mipself.em: Likewise. * ld/emultempl/mmo.em: Likewise. * ld/emultempl/msp430.em: Likewise. * ld/emultempl/nds32elf.em: Likewise. * ld/emultempl/needrelax.em: Likewise. * ld/emultempl/nios2elf.em: Likewise. * ld/emultempl/pe.em: Likewise. * ld/emultempl/pep.em: Likewise. * ld/emultempl/ppc32elf.em: Likewise. * ld/emultempl/ppc64elf.em: Likewise. * ld/emultempl/sh64elf.em: Likewise. * ld/emultempl/solaris2.em: Likewise. * ld/emultempl/spuelf.em: Likewise. * ld/emultempl/sunos.em: Likewise. * ld/emultempl/tic6xdsbt.em: Likewise. * ld/emultempl/ticoff.em: Likewise. * ld/emultempl/v850elf.em: Likewise. * ld/emultempl/vms.em: Likewise. * ld/emultempl/vxworks.em: Likewise.
2015-08-18 14:51:03 +02:00
if (bfd_link_pic (info))
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
/* Relocs that use pc_count are those that appear on a call
BFD whitespace fixes Binutils is supposed to use tabs. In my git config I have whitespace = indent-with-non-tab,space-before-tab,trailing-space and I got annoyed enough seeing red in "git diff" output to fix the problems. * doc/header.sed: Trim trailing space when splitting lines. * aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-cris.c, * aout-ns32k.c, * aout-target.h, * aout-tic30.c, * aoutf1.h, * aoutx.h, * arc-got.h, * arc-plt.def, * arc-plt.h, * archive.c, * archive64.c, * archures.c, * armnetbsd.c, * bfd-in.h, * bfd.c, * bfdio.c, * binary.c, * bout.c, * cache.c, * cisco-core.c, * coff-alpha.c, * coff-apollo.c, * coff-arm.c, * coff-h8300.c, * coff-i386.c, * coff-i860.c, * coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mcore.c, * coff-mips.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-stgo32.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * compress.c, * corefile.c, * cpu-alpha.c, * cpu-arm.c, * cpu-avr.c, * cpu-bfin.c, * cpu-cr16.c, * cpu-cr16c.c, * cpu-crx.c, * cpu-d10v.c, * cpu-frv.c, * cpu-ft32.c, * cpu-i370.c, * cpu-i960.c, * cpu-ia64-opc.c, * cpu-ip2k.c, * cpu-lm32.c, * cpu-m32r.c, * cpu-mcore.c, * cpu-microblaze.c, * cpu-mips.c, * cpu-moxie.c, * cpu-mt.c, * cpu-nios2.c, * cpu-ns32k.c, * cpu-or1k.c, * cpu-powerpc.c, * cpu-pru.c, * cpu-sh.c, * cpu-spu.c, * cpu-v850.c, * cpu-v850_rh850.c, * cpu-xgate.c, * cpu-z80.c, * dwarf1.c, * dwarf2.c, * ecoff.c, * ecofflink.c, * ecoffswap.h, * elf-bfd.h, * elf-eh-frame.c, * elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf-s390-common.c, * elf-strtab.c, * elf-vxworks.c, * elf.c, * elf32-am33lin.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-avr.h, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-i860.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68hc1x.c, * elf32-m68hc1x.h, * elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nds32.h, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score.h, * elf32-score7.c, * elf32-sh-symbian.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilegx.c, * elf32-tilegx.h, * elf32-tilepro.c, * elf32-tilepro.h, * elf32-v850.c, * elf32-vax.c, * elf32-wasm32.c, * elf32-xc16x.c, * elf32-xgate.c, * elf32-xgate.h, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-tilegx.c, * elf64-tilegx.h, * elf64-x86-64.c, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-aarch64.h, * elfxx-ia64.c, * elfxx-ia64.h, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * elfxx-x86.h, * freebsd.h, * hash.c, * host-aout.c, * hp300hpux.c, * hppabsd-core.c, * hpux-core.c, * i386aout.c, * i386linux.c, * i386lynx.c, * i386mach3.c, * i386msdos.c, * i386netbsd.c, * ieee.c, * ihex.c, * irix-core.c, * libaout.h, * libbfd-in.h, * libbfd.c, * libcoff-in.h, * libnlm.h, * libpei.h, * libxcoff.h, * linker.c, * lynx-core.c, * m68k4knetbsd.c, * m68klinux.c, * m68knetbsd.c, * m88kmach3.c, * mach-o-aarch64.c, * mach-o-arm.c, * mach-o-i386.c, * mach-o-target.c, * mach-o-x86-64.c, * mach-o.c, * mach-o.h, * merge.c, * mipsbsd.c, * mmo.c, * netbsd.h, * netbsd-core.c, * newsos3.c, * nlm-target.h, * nlm32-ppc.c, * nlm32-sparc.c, * nlmcode.h, * ns32k.h, * ns32knetbsd.c, * oasys.c, * opncls.c, * pc532-mach.c, * pdp11.c, * pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-mips.c, * pe-x86_64.c, * peXXigen.c, * pef.c, * pef.h, * pei-arm.c, * pei-i386.c, * pei-mcore.c, * pei-x86_64.c, * peicode.h, * plugin.c, * ppcboot.c, * ptrace-core.c, * reloc.c, * riscix.c, * rs6000-core.c, * section.c, * som.c, * som.h, * sparclinux.c, * sparcnetbsd.c, * srec.c, * stabs.c, * sunos.c, * syms.c, * targets.c, * tekhex.c, * trad-core.c, * vax1knetbsd.c, * vaxnetbsd.c, * verilog.c, * versados.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * wasm-module.c, * wasm-module.h, * xcofflink.c, * xsym.c, * xsym.h: Whitespace fixes. * bfd-in2.h, * libbfd.h, * libcoff.h: Regenerate.
2017-12-05 23:56:00 +01:00
insn, or certain REL relocs that can generated via assembly.
We want calls to protected symbols to resolve directly to the
function rather than going via the plt. If people want
function pointer comparisons to work as expected then they
should avoid writing weird assembly. */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
if (SYMBOL_CALLS_LOCAL (info, h))
{
struct elf_dyn_relocs **pp;
ELF: Move dyn_relocs to struct elf_link_hash_entry All ELF backends with shared library support have /* Track dynamic relocs copied for this symbol. */ struct elf_dyn_relocs *dyn_relocs; in symbol hash entry. Move dyn_relocs to struct elf_link_hash_entry to reduce code duplication. PR ld/26067 * elf-bfd.h (elf_link_hash_entry): Add dyn_relocs after size. * elf-s390-common.c (s390_elf_allocate_ifunc_dyn_relocs): Updated. * elf32-arc.c (elf_arc_link_hash_entry): Remove dyn_relocs. (elf_arc_link_hash_newfunc): Updated. * elf32-arm.c (elf32_arm_link_hash_entry): Remove dyn_relocs. (elf32_arm_link_hash_newfunc): Updated. (elf32_arm_copy_indirect_symbol): Likewise. (elf32_arm_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs_for_symbol): Likewise. * elf32-csky.c (csky_elf_link_hash_entry): Remove dyn_relocs. (csky_elf_link_hash_newfunc): Updated. (csky_allocate_dynrelocs): Likewise. (readonly_dynrelocs): Likewise. (csky_elf_copy_indirect_symbol): Likewise. * elf32-hppa.c (elf32_hppa_link_hash_entry): Remove dyn_relocs. (hppa_link_hash_newfunc): Updated. (elf32_hppa_copy_indirect_symbol): Likewise. (elf32_hppa_hide_symbol): Likewise. (elf32_hppa_adjust_dynamic_symbol): Likewise. (allocate_dynrelocs): Likewise. (elf32_hppa_relocate_section): Likewise. * elf32-i386.c (elf_i386_check_relocs): Likewise. * elf32-lm32.c (elf_lm32_link_hash_entry): Removed. (lm32_elf_link_hash_newfunc): Likewise. (lm32_elf_link_hash_table_create): Updated. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. (lm32_elf_copy_indirect_symbol): Likewise. * elf32-m32r.c (elf_m32r_link_hash_entry): Removed. (m32r_elf_link_hash_newfunc): Likewise. (m32r_elf_link_hash_table_create): Updated. (m32r_elf_copy_indirect_symbol): Likewise. (allocate_dynrelocs): Likewise. * elf32-metag.c (elf_metag_link_hash_entry): Remove dyn_relocs. (metag_link_hash_newfunc): Updated. (elf_metag_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elf32-microblaze.c (elf32_mb_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (microblaze_elf_check_relocs): Likewise. (microblaze_elf_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elf32-nds32.c (elf_nds32_link_hash_entry): Remove dyn_relocs. (nds32_elf_link_hash_newfunc): Updated. (nds32_elf_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. (nds32_elf_check_relocs): Likewise. * elf32-nios2.c (elf32_nios2_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (nios2_elf32_copy_indirect_symbol): Likewise. (nios2_elf32_check_relocs): Likewise. (allocate_dynrelocs): Likewise. * elf32-or1k.c (elf_or1k_link_hash_entry): Remove dyn_relocs. (or1k_elf_link_hash_newfunc): Updated. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. (or1k_elf_copy_indirect_symbol): Likewise. * elf32-ppc.c (ppc_elf_link_hash_entry): Remove dyn_relocs. (ppc_elf_link_hash_newfunc): Updated. (ppc_elf_copy_indirect_symbol): Likewise. (ppc_elf_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (ppc_elf_adjust_dynamic_symbol): Likewise. (allocate_dynrelocs): Likewise. (ppc_elf_relocate_section): Likewise. * elf32-s390.c (elf_s390_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (elf_s390_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (elf_s390_adjust_dynamic_symbol): Likewise. (allocate_dynrelocs): Likewise. * elf32-sh.c (elf_sh_link_hash_entry): Remove dyn_relocs. (sh_elf_link_hash_newfunc): Updated. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. (sh_elf_copy_indirect_symbol): Likewise. (sh_elf_check_relocs): Likewise. * elf32-tic6x.c (elf32_tic6x_link_hash_entry): Removed. (elf32_tic6x_link_hash_newfunc): Likewise. (elf32_tic6x_link_hash_table_create): Updated. (readonly_dynrelocs): Likewise. (elf32_tic6x_check_relocs): Likewise. (elf32_tic6x_allocate_dynrelocs): Likewise. * elf32-tilepro.c (tilepro_elf_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (tilepro_elf_copy_indirect_symbol): Likewise. (tilepro_elf_check_relocs): Likewise. (allocate_dynrelocs): Likewise. * elf64-ppc.c (ppc_link_hash_entry): Remove dyn_relocs. (ppc64_elf_copy_indirect_symbol): Updated. (ppc64_elf_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (ppc64_elf_adjust_dynamic_symbol): Likewise. (dec_dynrel_count): Likewise. (allocate_dynrelocs): Likewise. (ppc64_elf_relocate_section): Likewise. * elf64-s390.c (elf_s390_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (elf_s390_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elf64-x86-64.c (elf_x86_64_check_relocs): Likewise. * elfnn-aarch64.c (elf_aarch64_link_hash_entry): Remove dyn_relocs. (elfNN_aarch64_link_hash_newfunc): Updated. (elfNN_aarch64_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (need_copy_relocation_p): Likewise. (elfNN_aarch64_allocate_dynrelocs): Likewise. (elfNN_aarch64_allocate_ifunc_dynrelocs): Likewise. * elfnn-riscv.c (riscv_elf_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (riscv_elf_copy_indirect_symbol): Likewise. (riscv_elf_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (_bfd_sparc_elf_copy_indirect_symbol): Likewise. (_bfd_sparc_elf_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elfxx-tilegx.c (tilegx_elf_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (tilegx_elf_copy_indirect_symbol): Likewise. (tilegx_elf_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elfxx-x86.c (elf_x86_allocate_dynrelocs): Likewise. (readonly_dynrelocs): Likewise. (_bfd_x86_elf_copy_indirect_symbol): Likewise. * elfxx-x86.h (elf_x86_link_hash_entry): Remove dyn_relocs.
2020-06-02 03:18:43 +02:00
for (pp = &h->dyn_relocs; (p = *pp) != NULL;)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
p->count -= p->pc_count;
p->pc_count = 0;
if (p->count == 0)
*pp = p->next;
else
pp = &p->next;
}
}
/* Also discard relocs on undefined weak syms with non-default
BFD whitespace fixes Binutils is supposed to use tabs. In my git config I have whitespace = indent-with-non-tab,space-before-tab,trailing-space and I got annoyed enough seeing red in "git diff" output to fix the problems. * doc/header.sed: Trim trailing space when splitting lines. * aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-cris.c, * aout-ns32k.c, * aout-target.h, * aout-tic30.c, * aoutf1.h, * aoutx.h, * arc-got.h, * arc-plt.def, * arc-plt.h, * archive.c, * archive64.c, * archures.c, * armnetbsd.c, * bfd-in.h, * bfd.c, * bfdio.c, * binary.c, * bout.c, * cache.c, * cisco-core.c, * coff-alpha.c, * coff-apollo.c, * coff-arm.c, * coff-h8300.c, * coff-i386.c, * coff-i860.c, * coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mcore.c, * coff-mips.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-stgo32.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * compress.c, * corefile.c, * cpu-alpha.c, * cpu-arm.c, * cpu-avr.c, * cpu-bfin.c, * cpu-cr16.c, * cpu-cr16c.c, * cpu-crx.c, * cpu-d10v.c, * cpu-frv.c, * cpu-ft32.c, * cpu-i370.c, * cpu-i960.c, * cpu-ia64-opc.c, * cpu-ip2k.c, * cpu-lm32.c, * cpu-m32r.c, * cpu-mcore.c, * cpu-microblaze.c, * cpu-mips.c, * cpu-moxie.c, * cpu-mt.c, * cpu-nios2.c, * cpu-ns32k.c, * cpu-or1k.c, * cpu-powerpc.c, * cpu-pru.c, * cpu-sh.c, * cpu-spu.c, * cpu-v850.c, * cpu-v850_rh850.c, * cpu-xgate.c, * cpu-z80.c, * dwarf1.c, * dwarf2.c, * ecoff.c, * ecofflink.c, * ecoffswap.h, * elf-bfd.h, * elf-eh-frame.c, * elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf-s390-common.c, * elf-strtab.c, * elf-vxworks.c, * elf.c, * elf32-am33lin.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-avr.h, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-i860.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68hc1x.c, * elf32-m68hc1x.h, * elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nds32.h, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score.h, * elf32-score7.c, * elf32-sh-symbian.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilegx.c, * elf32-tilegx.h, * elf32-tilepro.c, * elf32-tilepro.h, * elf32-v850.c, * elf32-vax.c, * elf32-wasm32.c, * elf32-xc16x.c, * elf32-xgate.c, * elf32-xgate.h, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-tilegx.c, * elf64-tilegx.h, * elf64-x86-64.c, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-aarch64.h, * elfxx-ia64.c, * elfxx-ia64.h, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * elfxx-x86.h, * freebsd.h, * hash.c, * host-aout.c, * hp300hpux.c, * hppabsd-core.c, * hpux-core.c, * i386aout.c, * i386linux.c, * i386lynx.c, * i386mach3.c, * i386msdos.c, * i386netbsd.c, * ieee.c, * ihex.c, * irix-core.c, * libaout.h, * libbfd-in.h, * libbfd.c, * libcoff-in.h, * libnlm.h, * libpei.h, * libxcoff.h, * linker.c, * lynx-core.c, * m68k4knetbsd.c, * m68klinux.c, * m68knetbsd.c, * m88kmach3.c, * mach-o-aarch64.c, * mach-o-arm.c, * mach-o-i386.c, * mach-o-target.c, * mach-o-x86-64.c, * mach-o.c, * mach-o.h, * merge.c, * mipsbsd.c, * mmo.c, * netbsd.h, * netbsd-core.c, * newsos3.c, * nlm-target.h, * nlm32-ppc.c, * nlm32-sparc.c, * nlmcode.h, * ns32k.h, * ns32knetbsd.c, * oasys.c, * opncls.c, * pc532-mach.c, * pdp11.c, * pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-mips.c, * pe-x86_64.c, * peXXigen.c, * pef.c, * pef.h, * pei-arm.c, * pei-i386.c, * pei-mcore.c, * pei-x86_64.c, * peicode.h, * plugin.c, * ppcboot.c, * ptrace-core.c, * reloc.c, * riscix.c, * rs6000-core.c, * section.c, * som.c, * som.h, * sparclinux.c, * sparcnetbsd.c, * srec.c, * stabs.c, * sunos.c, * syms.c, * targets.c, * tekhex.c, * trad-core.c, * vax1knetbsd.c, * vaxnetbsd.c, * verilog.c, * versados.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * wasm-module.c, * wasm-module.h, * xcofflink.c, * xsym.c, * xsym.h: Whitespace fixes. * bfd-in2.h, * libbfd.h, * libcoff.h: Regenerate.
2017-12-05 23:56:00 +01:00
visibility. */
ELF: Move dyn_relocs to struct elf_link_hash_entry All ELF backends with shared library support have /* Track dynamic relocs copied for this symbol. */ struct elf_dyn_relocs *dyn_relocs; in symbol hash entry. Move dyn_relocs to struct elf_link_hash_entry to reduce code duplication. PR ld/26067 * elf-bfd.h (elf_link_hash_entry): Add dyn_relocs after size. * elf-s390-common.c (s390_elf_allocate_ifunc_dyn_relocs): Updated. * elf32-arc.c (elf_arc_link_hash_entry): Remove dyn_relocs. (elf_arc_link_hash_newfunc): Updated. * elf32-arm.c (elf32_arm_link_hash_entry): Remove dyn_relocs. (elf32_arm_link_hash_newfunc): Updated. (elf32_arm_copy_indirect_symbol): Likewise. (elf32_arm_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs_for_symbol): Likewise. * elf32-csky.c (csky_elf_link_hash_entry): Remove dyn_relocs. (csky_elf_link_hash_newfunc): Updated. (csky_allocate_dynrelocs): Likewise. (readonly_dynrelocs): Likewise. (csky_elf_copy_indirect_symbol): Likewise. * elf32-hppa.c (elf32_hppa_link_hash_entry): Remove dyn_relocs. (hppa_link_hash_newfunc): Updated. (elf32_hppa_copy_indirect_symbol): Likewise. (elf32_hppa_hide_symbol): Likewise. (elf32_hppa_adjust_dynamic_symbol): Likewise. (allocate_dynrelocs): Likewise. (elf32_hppa_relocate_section): Likewise. * elf32-i386.c (elf_i386_check_relocs): Likewise. * elf32-lm32.c (elf_lm32_link_hash_entry): Removed. (lm32_elf_link_hash_newfunc): Likewise. (lm32_elf_link_hash_table_create): Updated. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. (lm32_elf_copy_indirect_symbol): Likewise. * elf32-m32r.c (elf_m32r_link_hash_entry): Removed. (m32r_elf_link_hash_newfunc): Likewise. (m32r_elf_link_hash_table_create): Updated. (m32r_elf_copy_indirect_symbol): Likewise. (allocate_dynrelocs): Likewise. * elf32-metag.c (elf_metag_link_hash_entry): Remove dyn_relocs. (metag_link_hash_newfunc): Updated. (elf_metag_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elf32-microblaze.c (elf32_mb_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (microblaze_elf_check_relocs): Likewise. (microblaze_elf_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elf32-nds32.c (elf_nds32_link_hash_entry): Remove dyn_relocs. (nds32_elf_link_hash_newfunc): Updated. (nds32_elf_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. (nds32_elf_check_relocs): Likewise. * elf32-nios2.c (elf32_nios2_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (nios2_elf32_copy_indirect_symbol): Likewise. (nios2_elf32_check_relocs): Likewise. (allocate_dynrelocs): Likewise. * elf32-or1k.c (elf_or1k_link_hash_entry): Remove dyn_relocs. (or1k_elf_link_hash_newfunc): Updated. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. (or1k_elf_copy_indirect_symbol): Likewise. * elf32-ppc.c (ppc_elf_link_hash_entry): Remove dyn_relocs. (ppc_elf_link_hash_newfunc): Updated. (ppc_elf_copy_indirect_symbol): Likewise. (ppc_elf_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (ppc_elf_adjust_dynamic_symbol): Likewise. (allocate_dynrelocs): Likewise. (ppc_elf_relocate_section): Likewise. * elf32-s390.c (elf_s390_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (elf_s390_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (elf_s390_adjust_dynamic_symbol): Likewise. (allocate_dynrelocs): Likewise. * elf32-sh.c (elf_sh_link_hash_entry): Remove dyn_relocs. (sh_elf_link_hash_newfunc): Updated. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. (sh_elf_copy_indirect_symbol): Likewise. (sh_elf_check_relocs): Likewise. * elf32-tic6x.c (elf32_tic6x_link_hash_entry): Removed. (elf32_tic6x_link_hash_newfunc): Likewise. (elf32_tic6x_link_hash_table_create): Updated. (readonly_dynrelocs): Likewise. (elf32_tic6x_check_relocs): Likewise. (elf32_tic6x_allocate_dynrelocs): Likewise. * elf32-tilepro.c (tilepro_elf_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (tilepro_elf_copy_indirect_symbol): Likewise. (tilepro_elf_check_relocs): Likewise. (allocate_dynrelocs): Likewise. * elf64-ppc.c (ppc_link_hash_entry): Remove dyn_relocs. (ppc64_elf_copy_indirect_symbol): Updated. (ppc64_elf_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (ppc64_elf_adjust_dynamic_symbol): Likewise. (dec_dynrel_count): Likewise. (allocate_dynrelocs): Likewise. (ppc64_elf_relocate_section): Likewise. * elf64-s390.c (elf_s390_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (elf_s390_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elf64-x86-64.c (elf_x86_64_check_relocs): Likewise. * elfnn-aarch64.c (elf_aarch64_link_hash_entry): Remove dyn_relocs. (elfNN_aarch64_link_hash_newfunc): Updated. (elfNN_aarch64_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (need_copy_relocation_p): Likewise. (elfNN_aarch64_allocate_dynrelocs): Likewise. (elfNN_aarch64_allocate_ifunc_dynrelocs): Likewise. * elfnn-riscv.c (riscv_elf_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (riscv_elf_copy_indirect_symbol): Likewise. (riscv_elf_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (_bfd_sparc_elf_copy_indirect_symbol): Likewise. (_bfd_sparc_elf_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elfxx-tilegx.c (tilegx_elf_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (tilegx_elf_copy_indirect_symbol): Likewise. (tilegx_elf_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elfxx-x86.c (elf_x86_allocate_dynrelocs): Likewise. (readonly_dynrelocs): Likewise. (_bfd_x86_elf_copy_indirect_symbol): Likewise. * elfxx-x86.h (elf_x86_link_hash_entry): Remove dyn_relocs.
2020-06-02 03:18:43 +02:00
if (h->dyn_relocs != NULL && h->root.type == bfd_link_hash_undefweak)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
aarch64: Check UNDEFWEAK_NO_DYNAMIC_RELOC Don't generate dynamic relocation against weak undefined symbol if it is resolved to zero. FIXME: UNDEFWEAK_NO_DYNAMIC_RELOC may need to be checked in more places. PR ld/22269 * elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Don't generate dynamic relocation if UNDEFWEAK_NO_DYNAMIC_RELOC is true. (elfNN_aarch64_allocate_dynrelocs): Discard dynamic relocations if UNDEFWEAK_NO_DYNAMIC_RELOC is true.
2017-10-14 19:23:48 +02:00
if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
|| UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
ELF: Move dyn_relocs to struct elf_link_hash_entry All ELF backends with shared library support have /* Track dynamic relocs copied for this symbol. */ struct elf_dyn_relocs *dyn_relocs; in symbol hash entry. Move dyn_relocs to struct elf_link_hash_entry to reduce code duplication. PR ld/26067 * elf-bfd.h (elf_link_hash_entry): Add dyn_relocs after size. * elf-s390-common.c (s390_elf_allocate_ifunc_dyn_relocs): Updated. * elf32-arc.c (elf_arc_link_hash_entry): Remove dyn_relocs. (elf_arc_link_hash_newfunc): Updated. * elf32-arm.c (elf32_arm_link_hash_entry): Remove dyn_relocs. (elf32_arm_link_hash_newfunc): Updated. (elf32_arm_copy_indirect_symbol): Likewise. (elf32_arm_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs_for_symbol): Likewise. * elf32-csky.c (csky_elf_link_hash_entry): Remove dyn_relocs. (csky_elf_link_hash_newfunc): Updated. (csky_allocate_dynrelocs): Likewise. (readonly_dynrelocs): Likewise. (csky_elf_copy_indirect_symbol): Likewise. * elf32-hppa.c (elf32_hppa_link_hash_entry): Remove dyn_relocs. (hppa_link_hash_newfunc): Updated. (elf32_hppa_copy_indirect_symbol): Likewise. (elf32_hppa_hide_symbol): Likewise. (elf32_hppa_adjust_dynamic_symbol): Likewise. (allocate_dynrelocs): Likewise. (elf32_hppa_relocate_section): Likewise. * elf32-i386.c (elf_i386_check_relocs): Likewise. * elf32-lm32.c (elf_lm32_link_hash_entry): Removed. (lm32_elf_link_hash_newfunc): Likewise. (lm32_elf_link_hash_table_create): Updated. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. (lm32_elf_copy_indirect_symbol): Likewise. * elf32-m32r.c (elf_m32r_link_hash_entry): Removed. (m32r_elf_link_hash_newfunc): Likewise. (m32r_elf_link_hash_table_create): Updated. (m32r_elf_copy_indirect_symbol): Likewise. (allocate_dynrelocs): Likewise. * elf32-metag.c (elf_metag_link_hash_entry): Remove dyn_relocs. (metag_link_hash_newfunc): Updated. (elf_metag_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elf32-microblaze.c (elf32_mb_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (microblaze_elf_check_relocs): Likewise. (microblaze_elf_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elf32-nds32.c (elf_nds32_link_hash_entry): Remove dyn_relocs. (nds32_elf_link_hash_newfunc): Updated. (nds32_elf_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. (nds32_elf_check_relocs): Likewise. * elf32-nios2.c (elf32_nios2_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (nios2_elf32_copy_indirect_symbol): Likewise. (nios2_elf32_check_relocs): Likewise. (allocate_dynrelocs): Likewise. * elf32-or1k.c (elf_or1k_link_hash_entry): Remove dyn_relocs. (or1k_elf_link_hash_newfunc): Updated. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. (or1k_elf_copy_indirect_symbol): Likewise. * elf32-ppc.c (ppc_elf_link_hash_entry): Remove dyn_relocs. (ppc_elf_link_hash_newfunc): Updated. (ppc_elf_copy_indirect_symbol): Likewise. (ppc_elf_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (ppc_elf_adjust_dynamic_symbol): Likewise. (allocate_dynrelocs): Likewise. (ppc_elf_relocate_section): Likewise. * elf32-s390.c (elf_s390_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (elf_s390_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (elf_s390_adjust_dynamic_symbol): Likewise. (allocate_dynrelocs): Likewise. * elf32-sh.c (elf_sh_link_hash_entry): Remove dyn_relocs. (sh_elf_link_hash_newfunc): Updated. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. (sh_elf_copy_indirect_symbol): Likewise. (sh_elf_check_relocs): Likewise. * elf32-tic6x.c (elf32_tic6x_link_hash_entry): Removed. (elf32_tic6x_link_hash_newfunc): Likewise. (elf32_tic6x_link_hash_table_create): Updated. (readonly_dynrelocs): Likewise. (elf32_tic6x_check_relocs): Likewise. (elf32_tic6x_allocate_dynrelocs): Likewise. * elf32-tilepro.c (tilepro_elf_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (tilepro_elf_copy_indirect_symbol): Likewise. (tilepro_elf_check_relocs): Likewise. (allocate_dynrelocs): Likewise. * elf64-ppc.c (ppc_link_hash_entry): Remove dyn_relocs. (ppc64_elf_copy_indirect_symbol): Updated. (ppc64_elf_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (ppc64_elf_adjust_dynamic_symbol): Likewise. (dec_dynrel_count): Likewise. (allocate_dynrelocs): Likewise. (ppc64_elf_relocate_section): Likewise. * elf64-s390.c (elf_s390_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (elf_s390_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elf64-x86-64.c (elf_x86_64_check_relocs): Likewise. * elfnn-aarch64.c (elf_aarch64_link_hash_entry): Remove dyn_relocs. (elfNN_aarch64_link_hash_newfunc): Updated. (elfNN_aarch64_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (need_copy_relocation_p): Likewise. (elfNN_aarch64_allocate_dynrelocs): Likewise. (elfNN_aarch64_allocate_ifunc_dynrelocs): Likewise. * elfnn-riscv.c (riscv_elf_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (riscv_elf_copy_indirect_symbol): Likewise. (riscv_elf_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (_bfd_sparc_elf_copy_indirect_symbol): Likewise. (_bfd_sparc_elf_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elfxx-tilegx.c (tilegx_elf_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (tilegx_elf_copy_indirect_symbol): Likewise. (tilegx_elf_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elfxx-x86.c (elf_x86_allocate_dynrelocs): Likewise. (readonly_dynrelocs): Likewise. (_bfd_x86_elf_copy_indirect_symbol): Likewise. * elfxx-x86.h (elf_x86_link_hash_entry): Remove dyn_relocs.
2020-06-02 03:18:43 +02:00
h->dyn_relocs = NULL;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* Make sure undefined weak symbols are output as a dynamic
symbol in PIEs. */
else if (h->dynindx == -1
&& !h->forced_local
[AArch64] Only override the symbol dynamic decision on undefined weak symbol This fix is an adaption of the x86-64 PR ld/21402 fix to AArch64. After the generic code deciding one symbol is not dynamic, AArch64 backend only overrides the decision on undefined weak symbols. bfd/ PR ld/21402 * elfnn-aarch64.c (elfNN_aarch64_allocate_dynrelocs): Only make undefined weak symbols into dynamic. (elfNN_aarch64_final_link_relocate): Generate runtime RELATIVE relocation for non-dynamic symbols. (elfNN_aarch64_finish_dynamic_symbol): Add sanity check.
2017-06-29 12:47:43 +02:00
&& h->root.type == bfd_link_hash_undefweak
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
&& !bfd_elf_link_record_dynamic_symbol (info, h))
return FALSE;
}
}
else if (ELIMINATE_COPY_RELOCS)
{
/* For the non-shared case, discard space for relocs against
BFD whitespace fixes Binutils is supposed to use tabs. In my git config I have whitespace = indent-with-non-tab,space-before-tab,trailing-space and I got annoyed enough seeing red in "git diff" output to fix the problems. * doc/header.sed: Trim trailing space when splitting lines. * aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-cris.c, * aout-ns32k.c, * aout-target.h, * aout-tic30.c, * aoutf1.h, * aoutx.h, * arc-got.h, * arc-plt.def, * arc-plt.h, * archive.c, * archive64.c, * archures.c, * armnetbsd.c, * bfd-in.h, * bfd.c, * bfdio.c, * binary.c, * bout.c, * cache.c, * cisco-core.c, * coff-alpha.c, * coff-apollo.c, * coff-arm.c, * coff-h8300.c, * coff-i386.c, * coff-i860.c, * coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mcore.c, * coff-mips.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-stgo32.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * compress.c, * corefile.c, * cpu-alpha.c, * cpu-arm.c, * cpu-avr.c, * cpu-bfin.c, * cpu-cr16.c, * cpu-cr16c.c, * cpu-crx.c, * cpu-d10v.c, * cpu-frv.c, * cpu-ft32.c, * cpu-i370.c, * cpu-i960.c, * cpu-ia64-opc.c, * cpu-ip2k.c, * cpu-lm32.c, * cpu-m32r.c, * cpu-mcore.c, * cpu-microblaze.c, * cpu-mips.c, * cpu-moxie.c, * cpu-mt.c, * cpu-nios2.c, * cpu-ns32k.c, * cpu-or1k.c, * cpu-powerpc.c, * cpu-pru.c, * cpu-sh.c, * cpu-spu.c, * cpu-v850.c, * cpu-v850_rh850.c, * cpu-xgate.c, * cpu-z80.c, * dwarf1.c, * dwarf2.c, * ecoff.c, * ecofflink.c, * ecoffswap.h, * elf-bfd.h, * elf-eh-frame.c, * elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf-s390-common.c, * elf-strtab.c, * elf-vxworks.c, * elf.c, * elf32-am33lin.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-avr.h, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-i860.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68hc1x.c, * elf32-m68hc1x.h, * elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nds32.h, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score.h, * elf32-score7.c, * elf32-sh-symbian.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilegx.c, * elf32-tilegx.h, * elf32-tilepro.c, * elf32-tilepro.h, * elf32-v850.c, * elf32-vax.c, * elf32-wasm32.c, * elf32-xc16x.c, * elf32-xgate.c, * elf32-xgate.h, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-tilegx.c, * elf64-tilegx.h, * elf64-x86-64.c, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-aarch64.h, * elfxx-ia64.c, * elfxx-ia64.h, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * elfxx-x86.h, * freebsd.h, * hash.c, * host-aout.c, * hp300hpux.c, * hppabsd-core.c, * hpux-core.c, * i386aout.c, * i386linux.c, * i386lynx.c, * i386mach3.c, * i386msdos.c, * i386netbsd.c, * ieee.c, * ihex.c, * irix-core.c, * libaout.h, * libbfd-in.h, * libbfd.c, * libcoff-in.h, * libnlm.h, * libpei.h, * libxcoff.h, * linker.c, * lynx-core.c, * m68k4knetbsd.c, * m68klinux.c, * m68knetbsd.c, * m88kmach3.c, * mach-o-aarch64.c, * mach-o-arm.c, * mach-o-i386.c, * mach-o-target.c, * mach-o-x86-64.c, * mach-o.c, * mach-o.h, * merge.c, * mipsbsd.c, * mmo.c, * netbsd.h, * netbsd-core.c, * newsos3.c, * nlm-target.h, * nlm32-ppc.c, * nlm32-sparc.c, * nlmcode.h, * ns32k.h, * ns32knetbsd.c, * oasys.c, * opncls.c, * pc532-mach.c, * pdp11.c, * pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-mips.c, * pe-x86_64.c, * peXXigen.c, * pef.c, * pef.h, * pei-arm.c, * pei-i386.c, * pei-mcore.c, * pei-x86_64.c, * peicode.h, * plugin.c, * ppcboot.c, * ptrace-core.c, * reloc.c, * riscix.c, * rs6000-core.c, * section.c, * som.c, * som.h, * sparclinux.c, * sparcnetbsd.c, * srec.c, * stabs.c, * sunos.c, * syms.c, * targets.c, * tekhex.c, * trad-core.c, * vax1knetbsd.c, * vaxnetbsd.c, * verilog.c, * versados.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * wasm-module.c, * wasm-module.h, * xcofflink.c, * xsym.c, * xsym.h: Whitespace fixes. * bfd-in2.h, * libbfd.h, * libcoff.h: Regenerate.
2017-12-05 23:56:00 +01:00
symbols which turn out to need copy relocs or are not
dynamic. */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
if (!h->non_got_ref
&& ((h->def_dynamic
&& !h->def_regular)
|| (htab->root.dynamic_sections_created
&& (h->root.type == bfd_link_hash_undefweak
|| h->root.type == bfd_link_hash_undefined))))
{
/* Make sure this symbol is output as a dynamic symbol.
Undefined weak syms won't yet be marked as dynamic. */
if (h->dynindx == -1
&& !h->forced_local
[AArch64] Only override the symbol dynamic decision on undefined weak symbol This fix is an adaption of the x86-64 PR ld/21402 fix to AArch64. After the generic code deciding one symbol is not dynamic, AArch64 backend only overrides the decision on undefined weak symbols. bfd/ PR ld/21402 * elfnn-aarch64.c (elfNN_aarch64_allocate_dynrelocs): Only make undefined weak symbols into dynamic. (elfNN_aarch64_final_link_relocate): Generate runtime RELATIVE relocation for non-dynamic symbols. (elfNN_aarch64_finish_dynamic_symbol): Add sanity check.
2017-06-29 12:47:43 +02:00
&& h->root.type == bfd_link_hash_undefweak
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
&& !bfd_elf_link_record_dynamic_symbol (info, h))
return FALSE;
/* If that succeeded, we know we'll be keeping all the
relocs. */
if (h->dynindx != -1)
goto keep;
}
ELF: Move dyn_relocs to struct elf_link_hash_entry All ELF backends with shared library support have /* Track dynamic relocs copied for this symbol. */ struct elf_dyn_relocs *dyn_relocs; in symbol hash entry. Move dyn_relocs to struct elf_link_hash_entry to reduce code duplication. PR ld/26067 * elf-bfd.h (elf_link_hash_entry): Add dyn_relocs after size. * elf-s390-common.c (s390_elf_allocate_ifunc_dyn_relocs): Updated. * elf32-arc.c (elf_arc_link_hash_entry): Remove dyn_relocs. (elf_arc_link_hash_newfunc): Updated. * elf32-arm.c (elf32_arm_link_hash_entry): Remove dyn_relocs. (elf32_arm_link_hash_newfunc): Updated. (elf32_arm_copy_indirect_symbol): Likewise. (elf32_arm_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs_for_symbol): Likewise. * elf32-csky.c (csky_elf_link_hash_entry): Remove dyn_relocs. (csky_elf_link_hash_newfunc): Updated. (csky_allocate_dynrelocs): Likewise. (readonly_dynrelocs): Likewise. (csky_elf_copy_indirect_symbol): Likewise. * elf32-hppa.c (elf32_hppa_link_hash_entry): Remove dyn_relocs. (hppa_link_hash_newfunc): Updated. (elf32_hppa_copy_indirect_symbol): Likewise. (elf32_hppa_hide_symbol): Likewise. (elf32_hppa_adjust_dynamic_symbol): Likewise. (allocate_dynrelocs): Likewise. (elf32_hppa_relocate_section): Likewise. * elf32-i386.c (elf_i386_check_relocs): Likewise. * elf32-lm32.c (elf_lm32_link_hash_entry): Removed. (lm32_elf_link_hash_newfunc): Likewise. (lm32_elf_link_hash_table_create): Updated. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. (lm32_elf_copy_indirect_symbol): Likewise. * elf32-m32r.c (elf_m32r_link_hash_entry): Removed. (m32r_elf_link_hash_newfunc): Likewise. (m32r_elf_link_hash_table_create): Updated. (m32r_elf_copy_indirect_symbol): Likewise. (allocate_dynrelocs): Likewise. * elf32-metag.c (elf_metag_link_hash_entry): Remove dyn_relocs. (metag_link_hash_newfunc): Updated. (elf_metag_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elf32-microblaze.c (elf32_mb_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (microblaze_elf_check_relocs): Likewise. (microblaze_elf_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elf32-nds32.c (elf_nds32_link_hash_entry): Remove dyn_relocs. (nds32_elf_link_hash_newfunc): Updated. (nds32_elf_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. (nds32_elf_check_relocs): Likewise. * elf32-nios2.c (elf32_nios2_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (nios2_elf32_copy_indirect_symbol): Likewise. (nios2_elf32_check_relocs): Likewise. (allocate_dynrelocs): Likewise. * elf32-or1k.c (elf_or1k_link_hash_entry): Remove dyn_relocs. (or1k_elf_link_hash_newfunc): Updated. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. (or1k_elf_copy_indirect_symbol): Likewise. * elf32-ppc.c (ppc_elf_link_hash_entry): Remove dyn_relocs. (ppc_elf_link_hash_newfunc): Updated. (ppc_elf_copy_indirect_symbol): Likewise. (ppc_elf_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (ppc_elf_adjust_dynamic_symbol): Likewise. (allocate_dynrelocs): Likewise. (ppc_elf_relocate_section): Likewise. * elf32-s390.c (elf_s390_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (elf_s390_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (elf_s390_adjust_dynamic_symbol): Likewise. (allocate_dynrelocs): Likewise. * elf32-sh.c (elf_sh_link_hash_entry): Remove dyn_relocs. (sh_elf_link_hash_newfunc): Updated. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. (sh_elf_copy_indirect_symbol): Likewise. (sh_elf_check_relocs): Likewise. * elf32-tic6x.c (elf32_tic6x_link_hash_entry): Removed. (elf32_tic6x_link_hash_newfunc): Likewise. (elf32_tic6x_link_hash_table_create): Updated. (readonly_dynrelocs): Likewise. (elf32_tic6x_check_relocs): Likewise. (elf32_tic6x_allocate_dynrelocs): Likewise. * elf32-tilepro.c (tilepro_elf_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (tilepro_elf_copy_indirect_symbol): Likewise. (tilepro_elf_check_relocs): Likewise. (allocate_dynrelocs): Likewise. * elf64-ppc.c (ppc_link_hash_entry): Remove dyn_relocs. (ppc64_elf_copy_indirect_symbol): Updated. (ppc64_elf_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (ppc64_elf_adjust_dynamic_symbol): Likewise. (dec_dynrel_count): Likewise. (allocate_dynrelocs): Likewise. (ppc64_elf_relocate_section): Likewise. * elf64-s390.c (elf_s390_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (elf_s390_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elf64-x86-64.c (elf_x86_64_check_relocs): Likewise. * elfnn-aarch64.c (elf_aarch64_link_hash_entry): Remove dyn_relocs. (elfNN_aarch64_link_hash_newfunc): Updated. (elfNN_aarch64_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (need_copy_relocation_p): Likewise. (elfNN_aarch64_allocate_dynrelocs): Likewise. (elfNN_aarch64_allocate_ifunc_dynrelocs): Likewise. * elfnn-riscv.c (riscv_elf_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (riscv_elf_copy_indirect_symbol): Likewise. (riscv_elf_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (_bfd_sparc_elf_copy_indirect_symbol): Likewise. (_bfd_sparc_elf_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elfxx-tilegx.c (tilegx_elf_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (tilegx_elf_copy_indirect_symbol): Likewise. (tilegx_elf_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elfxx-x86.c (elf_x86_allocate_dynrelocs): Likewise. (readonly_dynrelocs): Likewise. (_bfd_x86_elf_copy_indirect_symbol): Likewise. * elfxx-x86.h (elf_x86_link_hash_entry): Remove dyn_relocs.
2020-06-02 03:18:43 +02:00
h->dyn_relocs = NULL;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
keep:;
}
/* Finally, allocate space. */
ELF: Move dyn_relocs to struct elf_link_hash_entry All ELF backends with shared library support have /* Track dynamic relocs copied for this symbol. */ struct elf_dyn_relocs *dyn_relocs; in symbol hash entry. Move dyn_relocs to struct elf_link_hash_entry to reduce code duplication. PR ld/26067 * elf-bfd.h (elf_link_hash_entry): Add dyn_relocs after size. * elf-s390-common.c (s390_elf_allocate_ifunc_dyn_relocs): Updated. * elf32-arc.c (elf_arc_link_hash_entry): Remove dyn_relocs. (elf_arc_link_hash_newfunc): Updated. * elf32-arm.c (elf32_arm_link_hash_entry): Remove dyn_relocs. (elf32_arm_link_hash_newfunc): Updated. (elf32_arm_copy_indirect_symbol): Likewise. (elf32_arm_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs_for_symbol): Likewise. * elf32-csky.c (csky_elf_link_hash_entry): Remove dyn_relocs. (csky_elf_link_hash_newfunc): Updated. (csky_allocate_dynrelocs): Likewise. (readonly_dynrelocs): Likewise. (csky_elf_copy_indirect_symbol): Likewise. * elf32-hppa.c (elf32_hppa_link_hash_entry): Remove dyn_relocs. (hppa_link_hash_newfunc): Updated. (elf32_hppa_copy_indirect_symbol): Likewise. (elf32_hppa_hide_symbol): Likewise. (elf32_hppa_adjust_dynamic_symbol): Likewise. (allocate_dynrelocs): Likewise. (elf32_hppa_relocate_section): Likewise. * elf32-i386.c (elf_i386_check_relocs): Likewise. * elf32-lm32.c (elf_lm32_link_hash_entry): Removed. (lm32_elf_link_hash_newfunc): Likewise. (lm32_elf_link_hash_table_create): Updated. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. (lm32_elf_copy_indirect_symbol): Likewise. * elf32-m32r.c (elf_m32r_link_hash_entry): Removed. (m32r_elf_link_hash_newfunc): Likewise. (m32r_elf_link_hash_table_create): Updated. (m32r_elf_copy_indirect_symbol): Likewise. (allocate_dynrelocs): Likewise. * elf32-metag.c (elf_metag_link_hash_entry): Remove dyn_relocs. (metag_link_hash_newfunc): Updated. (elf_metag_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elf32-microblaze.c (elf32_mb_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (microblaze_elf_check_relocs): Likewise. (microblaze_elf_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elf32-nds32.c (elf_nds32_link_hash_entry): Remove dyn_relocs. (nds32_elf_link_hash_newfunc): Updated. (nds32_elf_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. (nds32_elf_check_relocs): Likewise. * elf32-nios2.c (elf32_nios2_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (nios2_elf32_copy_indirect_symbol): Likewise. (nios2_elf32_check_relocs): Likewise. (allocate_dynrelocs): Likewise. * elf32-or1k.c (elf_or1k_link_hash_entry): Remove dyn_relocs. (or1k_elf_link_hash_newfunc): Updated. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. (or1k_elf_copy_indirect_symbol): Likewise. * elf32-ppc.c (ppc_elf_link_hash_entry): Remove dyn_relocs. (ppc_elf_link_hash_newfunc): Updated. (ppc_elf_copy_indirect_symbol): Likewise. (ppc_elf_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (ppc_elf_adjust_dynamic_symbol): Likewise. (allocate_dynrelocs): Likewise. (ppc_elf_relocate_section): Likewise. * elf32-s390.c (elf_s390_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (elf_s390_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (elf_s390_adjust_dynamic_symbol): Likewise. (allocate_dynrelocs): Likewise. * elf32-sh.c (elf_sh_link_hash_entry): Remove dyn_relocs. (sh_elf_link_hash_newfunc): Updated. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. (sh_elf_copy_indirect_symbol): Likewise. (sh_elf_check_relocs): Likewise. * elf32-tic6x.c (elf32_tic6x_link_hash_entry): Removed. (elf32_tic6x_link_hash_newfunc): Likewise. (elf32_tic6x_link_hash_table_create): Updated. (readonly_dynrelocs): Likewise. (elf32_tic6x_check_relocs): Likewise. (elf32_tic6x_allocate_dynrelocs): Likewise. * elf32-tilepro.c (tilepro_elf_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (tilepro_elf_copy_indirect_symbol): Likewise. (tilepro_elf_check_relocs): Likewise. (allocate_dynrelocs): Likewise. * elf64-ppc.c (ppc_link_hash_entry): Remove dyn_relocs. (ppc64_elf_copy_indirect_symbol): Updated. (ppc64_elf_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (ppc64_elf_adjust_dynamic_symbol): Likewise. (dec_dynrel_count): Likewise. (allocate_dynrelocs): Likewise. (ppc64_elf_relocate_section): Likewise. * elf64-s390.c (elf_s390_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (elf_s390_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elf64-x86-64.c (elf_x86_64_check_relocs): Likewise. * elfnn-aarch64.c (elf_aarch64_link_hash_entry): Remove dyn_relocs. (elfNN_aarch64_link_hash_newfunc): Updated. (elfNN_aarch64_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (need_copy_relocation_p): Likewise. (elfNN_aarch64_allocate_dynrelocs): Likewise. (elfNN_aarch64_allocate_ifunc_dynrelocs): Likewise. * elfnn-riscv.c (riscv_elf_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (riscv_elf_copy_indirect_symbol): Likewise. (riscv_elf_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (_bfd_sparc_elf_copy_indirect_symbol): Likewise. (_bfd_sparc_elf_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elfxx-tilegx.c (tilegx_elf_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (tilegx_elf_copy_indirect_symbol): Likewise. (tilegx_elf_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elfxx-x86.c (elf_x86_allocate_dynrelocs): Likewise. (readonly_dynrelocs): Likewise. (_bfd_x86_elf_copy_indirect_symbol): Likewise. * elfxx-x86.h (elf_x86_link_hash_entry): Remove dyn_relocs.
2020-06-02 03:18:43 +02:00
for (p = h->dyn_relocs; p != NULL; p = p->next)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
asection *sreloc;
sreloc = elf_section_data (p->sec)->sreloc;
BFD_ASSERT (sreloc != NULL);
sreloc->size += p->count * RELOC_SIZE (htab);
}
return TRUE;
}
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
/* Allocate space in .plt, .got and associated reloc sections for
ifunc dynamic relocs. */
static bfd_boolean
elfNN_aarch64_allocate_ifunc_dynrelocs (struct elf_link_hash_entry *h,
void *inf)
{
struct bfd_link_info *info;
struct elf_aarch64_link_hash_table *htab;
/* An example of a bfd_link_hash_indirect symbol is versioned
symbol. For example: __gxx_personality_v0(bfd_link_hash_indirect)
-> __gxx_personality_v0(bfd_link_hash_defined)
There is no need to process bfd_link_hash_indirect symbols here
because we will also be presented with the concrete instance of
the symbol and elfNN_aarch64_copy_indirect_symbol () will have been
called to copy all relevant data from the generic to the concrete
Fix AArch64 relocation handling in ILP32 mode. bfd * elfnn-aarch64.c: Fix relaxations for ILP32 mode. ld * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests. * testsuite/ld-aarch64/tls-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-all-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gd-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-3-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-le-ilp32.d: New test.
2017-01-23 18:07:13 +01:00
symbol instance. */
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
if (h->root.type == bfd_link_hash_indirect)
return TRUE;
if (h->root.type == bfd_link_hash_warning)
h = (struct elf_link_hash_entry *) h->root.u.i.link;
info = (struct bfd_link_info *) inf;
htab = elf_aarch64_hash_table (info);
/* Since STT_GNU_IFUNC symbol must go through PLT, we handle it
here if it is defined and referenced in a non-shared object. */
if (h->type == STT_GNU_IFUNC
&& h->def_regular)
return _bfd_elf_allocate_ifunc_dyn_relocs (info, h,
ELF: Move dyn_relocs to struct elf_link_hash_entry All ELF backends with shared library support have /* Track dynamic relocs copied for this symbol. */ struct elf_dyn_relocs *dyn_relocs; in symbol hash entry. Move dyn_relocs to struct elf_link_hash_entry to reduce code duplication. PR ld/26067 * elf-bfd.h (elf_link_hash_entry): Add dyn_relocs after size. * elf-s390-common.c (s390_elf_allocate_ifunc_dyn_relocs): Updated. * elf32-arc.c (elf_arc_link_hash_entry): Remove dyn_relocs. (elf_arc_link_hash_newfunc): Updated. * elf32-arm.c (elf32_arm_link_hash_entry): Remove dyn_relocs. (elf32_arm_link_hash_newfunc): Updated. (elf32_arm_copy_indirect_symbol): Likewise. (elf32_arm_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs_for_symbol): Likewise. * elf32-csky.c (csky_elf_link_hash_entry): Remove dyn_relocs. (csky_elf_link_hash_newfunc): Updated. (csky_allocate_dynrelocs): Likewise. (readonly_dynrelocs): Likewise. (csky_elf_copy_indirect_symbol): Likewise. * elf32-hppa.c (elf32_hppa_link_hash_entry): Remove dyn_relocs. (hppa_link_hash_newfunc): Updated. (elf32_hppa_copy_indirect_symbol): Likewise. (elf32_hppa_hide_symbol): Likewise. (elf32_hppa_adjust_dynamic_symbol): Likewise. (allocate_dynrelocs): Likewise. (elf32_hppa_relocate_section): Likewise. * elf32-i386.c (elf_i386_check_relocs): Likewise. * elf32-lm32.c (elf_lm32_link_hash_entry): Removed. (lm32_elf_link_hash_newfunc): Likewise. (lm32_elf_link_hash_table_create): Updated. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. (lm32_elf_copy_indirect_symbol): Likewise. * elf32-m32r.c (elf_m32r_link_hash_entry): Removed. (m32r_elf_link_hash_newfunc): Likewise. (m32r_elf_link_hash_table_create): Updated. (m32r_elf_copy_indirect_symbol): Likewise. (allocate_dynrelocs): Likewise. * elf32-metag.c (elf_metag_link_hash_entry): Remove dyn_relocs. (metag_link_hash_newfunc): Updated. (elf_metag_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elf32-microblaze.c (elf32_mb_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (microblaze_elf_check_relocs): Likewise. (microblaze_elf_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elf32-nds32.c (elf_nds32_link_hash_entry): Remove dyn_relocs. (nds32_elf_link_hash_newfunc): Updated. (nds32_elf_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. (nds32_elf_check_relocs): Likewise. * elf32-nios2.c (elf32_nios2_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (nios2_elf32_copy_indirect_symbol): Likewise. (nios2_elf32_check_relocs): Likewise. (allocate_dynrelocs): Likewise. * elf32-or1k.c (elf_or1k_link_hash_entry): Remove dyn_relocs. (or1k_elf_link_hash_newfunc): Updated. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. (or1k_elf_copy_indirect_symbol): Likewise. * elf32-ppc.c (ppc_elf_link_hash_entry): Remove dyn_relocs. (ppc_elf_link_hash_newfunc): Updated. (ppc_elf_copy_indirect_symbol): Likewise. (ppc_elf_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (ppc_elf_adjust_dynamic_symbol): Likewise. (allocate_dynrelocs): Likewise. (ppc_elf_relocate_section): Likewise. * elf32-s390.c (elf_s390_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (elf_s390_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (elf_s390_adjust_dynamic_symbol): Likewise. (allocate_dynrelocs): Likewise. * elf32-sh.c (elf_sh_link_hash_entry): Remove dyn_relocs. (sh_elf_link_hash_newfunc): Updated. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. (sh_elf_copy_indirect_symbol): Likewise. (sh_elf_check_relocs): Likewise. * elf32-tic6x.c (elf32_tic6x_link_hash_entry): Removed. (elf32_tic6x_link_hash_newfunc): Likewise. (elf32_tic6x_link_hash_table_create): Updated. (readonly_dynrelocs): Likewise. (elf32_tic6x_check_relocs): Likewise. (elf32_tic6x_allocate_dynrelocs): Likewise. * elf32-tilepro.c (tilepro_elf_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (tilepro_elf_copy_indirect_symbol): Likewise. (tilepro_elf_check_relocs): Likewise. (allocate_dynrelocs): Likewise. * elf64-ppc.c (ppc_link_hash_entry): Remove dyn_relocs. (ppc64_elf_copy_indirect_symbol): Updated. (ppc64_elf_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (ppc64_elf_adjust_dynamic_symbol): Likewise. (dec_dynrel_count): Likewise. (allocate_dynrelocs): Likewise. (ppc64_elf_relocate_section): Likewise. * elf64-s390.c (elf_s390_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (elf_s390_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elf64-x86-64.c (elf_x86_64_check_relocs): Likewise. * elfnn-aarch64.c (elf_aarch64_link_hash_entry): Remove dyn_relocs. (elfNN_aarch64_link_hash_newfunc): Updated. (elfNN_aarch64_copy_indirect_symbol): Likewise. (readonly_dynrelocs): Likewise. (need_copy_relocation_p): Likewise. (elfNN_aarch64_allocate_dynrelocs): Likewise. (elfNN_aarch64_allocate_ifunc_dynrelocs): Likewise. * elfnn-riscv.c (riscv_elf_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (riscv_elf_copy_indirect_symbol): Likewise. (riscv_elf_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (_bfd_sparc_elf_copy_indirect_symbol): Likewise. (_bfd_sparc_elf_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elfxx-tilegx.c (tilegx_elf_link_hash_entry): Remove dyn_relocs. (link_hash_newfunc): Updated. (tilegx_elf_copy_indirect_symbol): Likewise. (tilegx_elf_check_relocs): Likewise. (readonly_dynrelocs): Likewise. (allocate_dynrelocs): Likewise. * elfxx-x86.c (elf_x86_allocate_dynrelocs): Likewise. (readonly_dynrelocs): Likewise. (_bfd_x86_elf_copy_indirect_symbol): Likewise. * elfxx-x86.h (elf_x86_link_hash_entry): Remove dyn_relocs.
2020-06-02 03:18:43 +02:00
&h->dyn_relocs,
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
htab->plt_entry_size,
htab->plt_header_size,
Don't generate PLT for IFUNC GOT/pointer reference If a backend supports it, PLT entry isn't needed when all references to a STT_GNU_IFUNC symbols are done via GOT or static function pointers. For GOT entries, We generate dynamic R_*_GLOB_DAT relocations for preemptable symbols and R_*_IRELATIVE relocations for non-preemptable symbols to update them with real function address. For static pointer pointers, we generate dynamic pointer relocations and store them in: 1. .rel[a].ifunc section in PIC object. 2. .rel[a].got section in dynamic executable. 3. .rel[a].iplt section in static executable. We don't allocate GOT entry if it isn't used. bfd/ PR ld/20253 * elf-bfd.h (_bfd_elf_allocate_ifunc_dyn_relocs): Add an bfd_boolean argument. * elf-ifunc.c (_bfd_elf_create_ifunc_sections): Replace "shared object" with "PIC object" in comments. (_bfd_elf_allocate_ifunc_dyn_relocs): Updated. Replace "shared object" with "PIC object" in comments. Avoid PLT if requested. Generate dynamic relocations for non-GOT references. Make room for the special first entry in PLT and allocate PLT entry only for PLT and PC-relative references. Store dynamic GOT relocations in .rel[a].iplt section for static executables. If PLT isn't used, always use GOT for symbol value. Don't allocate GOT entry if it isn't used. * elf32-i386.c (elf_i386_check_relocs): Increment PLT reference count only in the code section. Allocate dynamic pointer relocation against STT_GNU_IFUNC symbol in the non-code section. (elf_i386_adjust_dynamic_symbol): Increment PLT reference count only for PC-relative references. (elf_i386_allocate_dynrelocs): Pass TRUE to _bfd_elf_allocate_ifunc_dyn_relocs. (elf_i386_relocate_section): Allow R_386_GOT32/R_386_GOT32X relocations against STT_GNU_IFUNC symbols without PLT. Generate dynamic pointer relocation against STT_GNU_IFUNC symbol in the non-code section and store it in the proper REL section. Don't allow non-pointer relocation against STT_GNU_IFUNC symbol without PLT. (elf_i386_finish_dynamic_symbol): Generate dynamic R_386_IRELATIVE and R_386_GLOB_DAT GOT relocations against STT_GNU_IFUNC symbols without PLT. (elf_i386_finish_dynamic_sections): Don't handle local STT_GNU_IFUNC symbols here. (elf_i386_output_arch_local_syms): Handle local STT_GNU_IFUNC symbols here. (elf_backend_output_arch_local_syms): New. * elf32-x86-64.c (elf_i386_check_relocs): Increment PLT reference count only in the code section. Allocate dynamic pointer relocation against STT_GNU_IFUNC symbol in the non-code section. (elf_x86_64_adjust_dynamic_symbol): Increment PLT reference count only for PC-relative references. (elf_x86_64_allocate_dynrelocs): Pass TRUE to _bfd_elf_allocate_ifunc_dyn_relocs. (elf_x86_64_relocate_section): Allow R_X86_64_GOTPCREL, R_X86_64_GOTPCRELX, R_X86_64_REX_GOTPCRELX and R_X86_64_GOTPCREL64 relocations against STT_GNU_IFUNC symbols without PLT. Generate dynamic pointer relocation against STT_GNU_IFUNC symbol in the non-code section and store it in the proper RELA section. Don't allow non-pointer relocation against STT_GNU_IFUNC symbol without PLT. (elf_x86_64_finish_dynamic_symbol): Generate dynamic R_X86_64_IRELATIVE and R_X86_64_GLOB_DAT GOT relocations against STT_GNU_IFUNC symbols without PLT. (elf_x86_64_finish_dynamic_sections): Don't handle local STT_GNU_IFUNC symbols here. (elf_x86_64_output_arch_local_syms): Handle local STT_GNU_IFUNC symbols here. (elf_backend_output_arch_local_syms): New. * elfnn-aarch64.c (elfNN_aarch64_allocate_ifunc_dynrelocs): Pass FALSE to _bfd_elf_allocate_ifunc_dyn_relocs. ld/ PR ld/20253 * testsuite/ld-i386/i386.exp: Run PR ld/20253 tests. * testsuite/ld-i386/no-plt.exp: Likewise. * testsuite/ld-x86-64/no-plt.exp: Likewise. * testsuite/ld-i386/pr13302.d: Remove .rel.plt section. * testsuite/ld-ifunc/ifunc-13-i386.d: Likewise. * testsuite/ld-ifunc/ifunc-13-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-15-i386.d: Likewise. * testsuite/ld-ifunc/ifunc-15-x86-64.d: Likewise. * testsuite/ld-x86-64/pr13082-5a.d: Likewise. * testsuite/ld-x86-64/pr13082-5b.d: Likewise. * testsuite/ld-x86-64/pr13082-6a.d: Likewise. * testsuite/ld-x86-64/pr13082-6b.d: Likewise. * testsuite/ld-i386/pr20244-2a.d: Remove .plt section. * testsuite/ld-ifunc/ifunc-21-i386.d: Likewise. * testsuite/ld-ifunc/ifunc-21-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-22-i386.d: Likewise. * testsuite/ld-ifunc/ifunc-22-x86-64.d: Likewise. * testsuite/ld-i386/pr20244-2b.d: Updated. * testsuite/ld-i386/pr20244-2c.d: Likewise. * testsuite/ld-ifunc/ifunc-18a-i386.d: Likewise. * testsuite/ld-ifunc/ifunc-18a-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-18b-i386.d: Likewise. * testsuite/ld-ifunc/ifunc-18b-x86-64.d: Likewise. * testsuite/ld-i386/pr20253-1a.c: New file. * testsuite/ld-i386/pr20253-1b.S: Likewise. * testsuite/ld-i386/pr20253-1c.S: Likewise. * testsuite/ld-i386/pr20253-1d.S: Likewise. * testsuite/ld-i386/pr20253-2a.c: Likewise. * testsuite/ld-i386/pr20253-2b.S: Likewise. * testsuite/ld-i386/pr20253-2c.S: Likewise. * testsuite/ld-i386/pr20253-2d.S: Likewise. * testsuite/ld-i386/pr20253-3.d: Likewise. * testsuite/ld-i386/pr20253-3.s: Likewise. * testsuite/ld-i386/pr20253-4.s: Likewise. * testsuite/ld-i386/pr20253-4a.d: Likewise. * testsuite/ld-i386/pr20253-4b.d: Likewise. * testsuite/ld-i386/pr20253-4c.d: Likewise. * testsuite/ld-i386/pr20253-5.d: Likewise. * testsuite/ld-i386/pr20253-5.s: Likewise. * testsuite/ld-ifunc/ifunc-23-x86.s: Likewise. * testsuite/ld-ifunc/ifunc-23a-x86.d: Likewise. * testsuite/ld-ifunc/ifunc-23b-x86.d: Likewise. * testsuite/ld-ifunc/ifunc-23c-x86.d: Likewise. * testsuite/ld-ifunc/ifunc-24-x86.s: Likewise. * testsuite/ld-ifunc/ifunc-24a-x86.d: Likewise. * testsuite/ld-ifunc/ifunc-24b-x86.d: Likewise. * testsuite/ld-ifunc/ifunc-24c-x86.d: Likewise. * testsuite/ld-ifunc/ifunc-25-x86.s: Likewise. * testsuite/ld-ifunc/ifunc-25a-x86.d: Likewise. * testsuite/ld-ifunc/ifunc-25b-x86.d: Likewise. * testsuite/ld-ifunc/ifunc-25c-x86.d: Likewise. * testsuite/ld-x86-64/pr20253-1.s: Likewise. * testsuite/ld-x86-64/pr20253-1a.d: Likewise. * testsuite/ld-x86-64/pr20253-1b.d: Likewise. * testsuite/ld-x86-64/pr20253-1c.d: Likewise. * testsuite/ld-x86-64/pr20253-1d.d: Likewise. * testsuite/ld-x86-64/pr20253-1e.d: Likewise. * testsuite/ld-x86-64/pr20253-1f.d: Likewise. * testsuite/ld-x86-64/pr20253-1g.d: Likewise. * testsuite/ld-x86-64/pr20253-1h.d: Likewise. * testsuite/ld-x86-64/pr20253-1i.d: Likewise. * testsuite/ld-x86-64/pr20253-1j.d: Likewise. * testsuite/ld-x86-64/pr20253-1k.d: Likewise. * testsuite/ld-x86-64/pr20253-1l.d: Likewise. * testsuite/ld-x86-64/pr20253-2a.c: Likewise. * testsuite/ld-x86-64/pr20253-2b.S: Likewise. * testsuite/ld-x86-64/pr20253-2c.S: Likewise. * testsuite/ld-x86-64/pr20253-2d.S: Likewise. * testsuite/ld-x86-64/pr20253-3.d: Likewise. * testsuite/ld-x86-64/pr20253-3.s: Likewise. * testsuite/ld-x86-64/pr20253-4.s: Likewise. * testsuite/ld-x86-64/pr20253-4a.d: Likewise. * testsuite/ld-x86-64/pr20253-4b.d: Likewise. * testsuite/ld-x86-64/pr20253-4c.d: Likewise. * testsuite/ld-x86-64/pr20253-4d.d: Likewise. * testsuite/ld-x86-64/pr20253-4e.d: Likewise. * testsuite/ld-x86-64/pr20253-4f.d: Likewise. * testsuite/ld-x86-64/pr20253-5.s: Likewise. * testsuite/ld-x86-64/pr20253-5a.d: Likewise. * testsuite/ld-x86-64/pr20253-5b.d: Likewise. * testsuite/ld-ifunc/ifunc-18a-i386.d: Remove extra IRELATIVE relocation. * testsuite/ld-ifunc/ifunc-18a-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-18b-i386.d: Likewise. * testsuite/ld-ifunc/ifunc-18b-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-18a.s: Fix a typo. * testsuite/ld-x86-64/x86-64.exp: Run pr20253-1 tests.
2016-06-18 18:16:52 +02:00
GOT_ENTRY_SIZE,
FALSE);
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
return TRUE;
}
/* Allocate space in .plt, .got and associated reloc sections for
local ifunc dynamic relocs. */
static bfd_boolean
elfNN_aarch64_allocate_local_ifunc_dynrelocs (void **slot, void *inf)
{
struct elf_link_hash_entry *h
= (struct elf_link_hash_entry *) *slot;
if (h->type != STT_GNU_IFUNC
|| !h->def_regular
|| !h->ref_regular
|| !h->forced_local
|| h->root.type != bfd_link_hash_defined)
abort ();
return elfNN_aarch64_allocate_ifunc_dynrelocs (h, inf);
}
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* This is the most important function of all . Innocuosly named
though ! */
Fix AArch64 relocation handling in ILP32 mode. bfd * elfnn-aarch64.c: Fix relaxations for ILP32 mode. ld * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests. * testsuite/ld-aarch64/tls-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-all-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gd-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-3-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-le-ilp32.d: New test.
2017-01-23 18:07:13 +01:00
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
static bfd_boolean
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED,
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
struct bfd_link_info *info)
{
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
struct elf_aarch64_link_hash_table *htab;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
bfd *dynobj;
asection *s;
bfd_boolean relocs;
bfd *ibfd;
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
htab = elf_aarch64_hash_table ((info));
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
dynobj = htab->root.dynobj;
BFD_ASSERT (dynobj != NULL);
if (htab->root.dynamic_sections_created)
{
Add --no-dynamic-linker option to ld, for static PIE use Inhibits output of .interp section in ELF executables. include/ * bfdlink.h (struct bfd_link_info): Add "nointerp" field. bfd/ * elflink.c (_bfd_elf_link_create_dynamic_sections): Don't create .interp when info->nointerp. (bfd_elf_size_dynamic_sections): Adjust assert. * elf32-arm.c (elf32_arm_size_dynamic_sections): Don't size .interp when info->nointerp. * elf32-bfin.c (elf32_bfinfdpic_size_dynamic_sections): Likewise. * elf32-cr16.c (_bfd_cr16_elf_size_dynamic_sections): Likewise. * elf32-cris.c (elf_cris_size_dynamic_sections): Likewise. * elf32-frv.c (elf32_frvfdpic_size_dynamic_sections): Likewise. * elf32-hppa.c (elf32_hppa_size_dynamic_sections): Likewise. * elf32-i370.c (i370_elf_size_dynamic_sections): Likewise. * elf32-i386.c (elf_i386_size_dynamic_sections): Likewise. * elf32-lm32.c (lm32_elf_size_dynamic_sections): Likewise. * elf32-m32r.c (m32r_elf_size_dynamic_sections): Likewise. * elf32-m68k.c (elf_m68k_size_dynamic_sections): Likewise. * elf32-metag.c (elf_metag_size_dynamic_sections): Likewise. * elf32-nds32.c (nds32_elf_size_dynamic_sections): Likewise. * elf32-nios2.c (nios2_elf32_size_dynamic_sections): Likewise. * elf32-or1k.c (or1k_elf_size_dynamic_sections): Likewise. * elf32-ppc.c (ppc_elf_size_dynamic_sections): Likewise. * elf32-s390.c (elf_s390_size_dynamic_sections): Likewise. * elf32-score.c (s3_bfd_score_elf_size_dynamic_sections): Likewise. * elf32-score7.c (s7_bfd_score_elf_size_dynamic_sections): Likewise. * elf32-sh.c (sh_elf_size_dynamic_sections): Likewise. * elf32-tic6x.c (elf32_tic6x_size_dynamic_sections): Likewise. * elf32-tilepro.c (tilepro_elf_size_dynamic_sections): Likewise. * elf32-vax.c (elf_vax_size_dynamic_sections): Likewise. * elf32-xtensa.c (elf_xtensa_size_dynamic_sections): Likewise. * elf64-alpha.c (elf64_alpha_size_dynamic_sections): Likewise. * elf64-hppa.c (elf64_hppa_size_dynamic_sections): Likewise. * elf64-ppc.c (ppc64_elf_size_dynamic_sections): Likewise. * elf64-s390.c (elf_s390_size_dynamic_sections): Likewise. * elf64-sh64.c (sh64_elf64_size_dynamic_sections): Likewise. * elf64-x86-64.c (elf_x86_64_size_dynamic_sections): Likewise. * elfnn-aarch64.c (elfNN_aarch64_size_dynamic_sections): Likewise. * elfnn-ia64.c (elfNN_ia64_size_dynamic_sections): Likewise. * elfxx-mips.c (_bfd_mips_elf_size_dynamic_sections): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_size_dynamic_sections): Likewise. * elfxx-tilegx.c (tilegx_elf_size_dynamic_sections): Likewise. ld/ * ld.texinfo (--no-dynamic-linker): Document. * ldlex.h (enum option_values): Add OPTION_NO_DYNAMIC_LINKER. * lexsup.c (ld_options, parse_args): Handle --no-dynamic-linker.
2015-09-20 04:50:19 +02:00
if (bfd_link_executable (info) && !info->nointerp)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
s = bfd_get_linker_section (dynobj, ".interp");
if (s == NULL)
abort ();
s->size = sizeof ELF_DYNAMIC_INTERPRETER;
s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
}
}
/* Set up .got offsets for local syms, and space for local dynamic
relocs. */
Make bfd.link_next field a union This field of struct bfd is currently only used to chain together linker input files. This patch prepares to use the field to stash the linker hash table, which is always created on the linker output file. bfd/ * bfd.c (struct bfd): Replace link_next with a union. * aoutx.h, * bfd.c, * coff-ppc.c, * coff-rs6000.c, * cofflink.c, * ecoff.c, * elf-m10300.c, * elf32-arm.c, * elf32-avr.c, * elf32-hppa.c, * elf32-i386.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc1x.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-nds32.c, * elf32-nios2.c, * elf32-or1k.c, * elf32-ppc.c, * elf32-rl78.c, * elf32-s390.c, * elf32-score.c, * elf32-score7.c, * elf32-sh.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilepro.c, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-x86-64.c, * elflink.c, * elfnn-aarch64.c, * elfxx-mips.c, * elfxx-sparc.c, * elfxx-tilegx.c, * linker.c, * pdp11.c, * peXXigen.c, * simple.c, * sunos.c, * vms-alpha.c, * xcofflink.c: Update for above. * bfd-in2.h: Regenerate. include/ * bfdlink.h: Update for bfd.link_next change. ld/ * emultempl/cr16elf.em, * emultempl/elf32.em, * emultempl/genelf.em, * emultempl/m68kcoff.em, * emultempl/m68kelf.em, * emultempl/nds32elf.em, * emultempl/pe.em, * emultempl/pep.em, * ldlang.c, * ldmain.c, * pe-dll.c: Update for bfd.link_next change.
2014-06-13 11:40:57 +02:00
for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
struct elf_aarch64_local_symbol *locals = NULL;
Elf_Internal_Shdr *symtab_hdr;
asection *srel;
unsigned int i;
if (!is_aarch64_elf (ibfd))
continue;
for (s = ibfd->sections; s != NULL; s = s->next)
{
struct elf_dyn_relocs *p;
for (p = (struct elf_dyn_relocs *)
(elf_section_data (s)->local_dynrel); p != NULL; p = p->next)
{
if (!bfd_is_abs_section (p->sec)
&& bfd_is_abs_section (p->sec->output_section))
{
/* Input section has been discarded, either because
it is a copy of a linkonce section or due to
linker script /DISCARD/, so we'll be discarding
the relocs too. */
}
else if (p->count != 0)
{
srel = elf_section_data (p->sec)->sreloc;
srel->size += p->count * RELOC_SIZE (htab);
if ((p->sec->output_section->flags & SEC_READONLY) != 0)
info->flags |= DF_TEXTREL;
}
}
}
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
locals = elf_aarch64_locals (ibfd);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
if (!locals)
continue;
symtab_hdr = &elf_symtab_hdr (ibfd);
srel = htab->root.srelgot;
for (i = 0; i < symtab_hdr->sh_info; i++)
{
locals[i].got_offset = (bfd_vma) - 1;
locals[i].tlsdesc_got_jump_table_offset = (bfd_vma) - 1;
if (locals[i].got_refcount > 0)
{
unsigned got_type = locals[i].got_type;
if (got_type & GOT_TLSDESC_GD)
{
locals[i].tlsdesc_got_jump_table_offset =
(htab->root.sgotplt->size
- aarch64_compute_jump_table_size (htab));
htab->root.sgotplt->size += GOT_ENTRY_SIZE * 2;
locals[i].got_offset = (bfd_vma) - 2;
}
if (got_type & GOT_TLS_GD)
{
locals[i].got_offset = htab->root.sgot->size;
htab->root.sgot->size += GOT_ENTRY_SIZE * 2;
}
[AArch64] PR18270, fix handling of GOT entry for local symbol 2015-04-24 Jiong. Wang <jiong.wang@arm.com> bfd/ PR ld/18270 * elfnn-aarch64.c (elfNN_aarch64_size_dynamic): Count local symbol for GOT_NORMAL for both sgot/srelgot section. (elfNN_aarch64_final_link_relocate): Relocate against GOT entry address and generate necessary runtime relocation for GOT entry.
2015-04-25 00:25:28 +02:00
if (got_type & GOT_TLS_IE
|| got_type & GOT_NORMAL)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
locals[i].got_offset = htab->root.sgot->size;
htab->root.sgot->size += GOT_ENTRY_SIZE;
}
if (got_type == GOT_UNKNOWN)
{
}
Add output_type to bfd_link_info The "shared" field in bfd_link_info is set for both DSO and and PIE. There are separate fields for executable and relocatable outputs. This patch adds an "output_type" field: enum output_type { type_unknown = 0, type_executable, type_dll, type_relocatable }; and a "pic" field to bfd_link_info to replace shared, executable and relocatable fields so that we can use the "output_type" field to check for output type and the "pic" field check if output is PIC. Macros, bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie, are provided to check for output features. bfd/ * bfd/aoutx.h: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * bfd/bout.c: Likewise. * bfd/coff-alpha.c: Likewise. * bfd/coff-arm.c: Likewise. * bfd/coff-i386.c: Likewise. * bfd/coff-i960.c: Likewise. * bfd/coff-m68k.c: Likewise. * bfd/coff-mcore.c: Likewise. * bfd/coff-mips.c: Likewise. * bfd/coff-ppc.c: Likewise. * bfd/coff-rs6000.c: Likewise. * bfd/coff-sh.c: Likewise. * bfd/coff-tic80.c: Likewise. * bfd/coff-x86_64.c: Likewise. * bfd/coff64-rs6000.c: Likewise. * bfd/coffgen.c: Likewise. * bfd/cofflink.c: Likewise. * bfd/ecoff.c: Likewise. * bfd/ecofflink.c: Likewise. * bfd/elf-bfd.h: Likewise. * bfd/elf-eh-frame.c: Likewise. * bfd/elf-ifunc.c: Likewise. * bfd/elf-m10200.c: Likewise. * bfd/elf-m10300.c: Likewise. * bfd/elf-s390-common.c: Likewise. * bfd/elf-vxworks.c: Likewise. * bfd/elf.c: Likewise. * bfd/elf32-arm.c: Likewise. * bfd/elf32-avr.c: Likewise. * bfd/elf32-bfin.c: Likewise. * bfd/elf32-cr16.c: Likewise. * bfd/elf32-cr16c.c: Likewise. * bfd/elf32-cris.c: Likewise. * bfd/elf32-crx.c: Likewise. * bfd/elf32-d10v.c: Likewise. * bfd/elf32-dlx.c: Likewise. * bfd/elf32-epiphany.c: Likewise. * bfd/elf32-fr30.c: Likewise. * bfd/elf32-frv.c: Likewise. * bfd/elf32-ft32.c: Likewise. * bfd/elf32-h8300.c: Likewise. * bfd/elf32-hppa.c: Likewise. * bfd/elf32-i370.c: Likewise. * bfd/elf32-i386.c: Likewise. * bfd/elf32-i860.c: Likewise. * bfd/elf32-ip2k.c: Likewise. * bfd/elf32-iq2000.c: Likewise. * bfd/elf32-lm32.c: Likewise. * bfd/elf32-m32c.c: Likewise. * bfd/elf32-m32r.c: Likewise. * bfd/elf32-m68hc11.c: Likewise. * bfd/elf32-m68hc1x.c: Likewise. * bfd/elf32-m68k.c: Likewise. * bfd/elf32-mcore.c: Likewise. * bfd/elf32-mep.c: Likewise. * bfd/elf32-metag.c: Likewise. * bfd/elf32-microblaze.c: Likewise. * bfd/elf32-moxie.c: Likewise. * bfd/elf32-msp430.c: Likewise. * bfd/elf32-mt.c: Likewise. * bfd/elf32-nds32.c: Likewise. * bfd/elf32-nios2.c: Likewise. * bfd/elf32-or1k.c: Likewise. * bfd/elf32-ppc.c: Likewise. * bfd/elf32-rl78.c: Likewise. * bfd/elf32-rx.c: Likewise. * bfd/elf32-s390.c: Likewise. * bfd/elf32-score.c: Likewise. * bfd/elf32-score7.c: Likewise. * bfd/elf32-sh-symbian.c: Likewise. * bfd/elf32-sh.c: Likewise. * bfd/elf32-sh64.c: Likewise. * bfd/elf32-spu.c: Likewise. * bfd/elf32-tic6x.c: Likewise. * bfd/elf32-tilepro.c: Likewise. * bfd/elf32-v850.c: Likewise. * bfd/elf32-vax.c: Likewise. * bfd/elf32-visium.c: Likewise. * bfd/elf32-xc16x.c: Likewise. * bfd/elf32-xstormy16.c: Likewise. * bfd/elf32-xtensa.c: Likewise. * bfd/elf64-alpha.c: Likewise. * bfd/elf64-hppa.c: Likewise. * bfd/elf64-ia64-vms.c: Likewise. * bfd/elf64-mmix.c: Likewise. * bfd/elf64-ppc.c: Likewise. * bfd/elf64-s390.c: Likewise. * bfd/elf64-sh64.c: Likewise. * bfd/elf64-x86-64.c: Likewise. * bfd/elflink.c: Likewise. * bfd/elfnn-aarch64.c: Likewise. * bfd/elfnn-ia64.c: Likewise. * bfd/elfxx-mips.c: Likewise. * bfd/elfxx-sparc.c: Likewise. * bfd/elfxx-tilegx.c: Likewise. * bfd/i386linux.c: Likewise. * bfd/linker.c: Likewise. * bfd/m68klinux.c: Likewise. * bfd/pdp11.c: Likewise. * bfd/pe-mips.c: Likewise. * bfd/peXXigen.c: Likewise. * bfd/reloc.c: Likewise. * bfd/reloc16.c: Likewise. * bfd/sparclinux.c: Likewise. * bfd/sunos.c: Likewise. * bfd/vms-alpha.c: Likewise. * bfd/xcofflink.c: Likewise. include/ * include/bfdlink.h (output_type): New enum. (bfd_link_executable): New macro. (bfd_link_dll): Likewise. (bfd_link_relocatable): Likewise. (bfd_link_pic): Likewise. (bfd_link_pie): Likewise. (bfd_link_info): Remove shared, executable, pie and relocatable. Add output_type and pic. ld/ * ld/ldctor.c: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * ld/ldemul.c: Likewise. * ld/ldfile.c: Likewise. * ld/ldlang.c: Likewise. * ld/ldmain.c: Likewise. * ld/ldwrite.c: Likewise. * ld/lexsup.c: Likewise. * ld/pe-dll.c: Likewise. * ld/plugin.c: Likewise. * ld/emultempl/aarch64elf.em: Likewise. * ld/emultempl/aix.em: Likewise. * ld/emultempl/alphaelf.em: Likewise. * ld/emultempl/armcoff.em: Likewise. * ld/emultempl/armelf.em: Likewise. * ld/emultempl/avrelf.em: Likewise. * ld/emultempl/beos.em: Likewise. * ld/emultempl/cr16elf.em: Likewise. * ld/emultempl/elf-generic.em: Likewise. * ld/emultempl/elf32.em: Likewise. * ld/emultempl/genelf.em: Likewise. * ld/emultempl/generic.em: Likewise. * ld/emultempl/gld960.em: Likewise. * ld/emultempl/gld960c.em: Likewise. * ld/emultempl/hppaelf.em: Likewise. * ld/emultempl/irix.em: Likewise. * ld/emultempl/linux.em: Likewise. * ld/emultempl/lnk960.em: Likewise. * ld/emultempl/m68hc1xelf.em: Likewise. * ld/emultempl/m68kcoff.em: Likewise. * ld/emultempl/m68kelf.em: Likewise. * ld/emultempl/metagelf.em: Likewise. * ld/emultempl/mipself.em: Likewise. * ld/emultempl/mmo.em: Likewise. * ld/emultempl/msp430.em: Likewise. * ld/emultempl/nds32elf.em: Likewise. * ld/emultempl/needrelax.em: Likewise. * ld/emultempl/nios2elf.em: Likewise. * ld/emultempl/pe.em: Likewise. * ld/emultempl/pep.em: Likewise. * ld/emultempl/ppc32elf.em: Likewise. * ld/emultempl/ppc64elf.em: Likewise. * ld/emultempl/sh64elf.em: Likewise. * ld/emultempl/solaris2.em: Likewise. * ld/emultempl/spuelf.em: Likewise. * ld/emultempl/sunos.em: Likewise. * ld/emultempl/tic6xdsbt.em: Likewise. * ld/emultempl/ticoff.em: Likewise. * ld/emultempl/v850elf.em: Likewise. * ld/emultempl/vms.em: Likewise. * ld/emultempl/vxworks.em: Likewise.
2015-08-18 14:51:03 +02:00
if (bfd_link_pic (info))
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
if (got_type & GOT_TLSDESC_GD)
{
htab->root.srelplt->size += RELOC_SIZE (htab);
/* Note RELOC_COUNT not incremented here! */
ELF: Move tlsdesc_plt/tlsdesc_got to elf_link_hash_table All ELF backends with TLS descriptor support have /* The offset into splt of the PLT entry for the TLS descriptor resolver. Special values are 0, if not necessary (or not found to be necessary yet), and -1 if needed but not determined yet. */ bfd_vma tlsdesc_plt; /* The GOT offset for the lazy trampoline. Communicated to the loader via DT_TLSDESC_GOT. The magic value (bfd_vma) -1 indicates an offset is not allocated. */ bfd_vma tlsdesc_got; in symbol hash entry. Move tlsdesc_plt/tlsdesc_got to elf_link_hash_entry to reduce code duplication. * elf-bfd.h (elf_link_hash_entry): Add tlsdesc_plt and tlsdesc_got. * elf32-arm.c (elf32_arm_link_hash_table): Remove tlsdesc_plt and dt_tlsdesc_got. (elf32_arm_size_dynamic_sections): Updated. Clear root.tlsdesc_plt for DF_BIND_NOW. (elf32_arm_finish_dynamic_sections): Updated. (elf32_arm_output_arch_local_syms): Likewise. * elf32-nds32.c (nds32_elf_size_dynamic_sections): Updated. Clear root.tlsdesc_plt for DF_BIND_NOW. (nds32_elf_finish_dynamic_sections): Updated. * elf32-nds32.h (elf_nds32_link_hash_table): Remove dt_tlsdesc_plt and dt_tlsdesc_got. * elf64-x86-64.c (elf_x86_64_finish_dynamic_sections): Updated. * elfnn-aarch64.c (elf_aarch64_link_hash_table): Remove tlsdesc_plt and dt_tlsdesc_got. (elfNN_aarch64_allocate_dynrelocs): Updated. (elfNN_aarch64_finish_dynamic_sections): Likewise. (elfNN_aarch64_size_dynamic_sections): Updated. Clear root.tlsdesc_plt for DF_BIND_NOW. Don't check DF_BIND_NOW twice. * elfxx-x86.c (elf_x86_allocate_dynrelocs): Updated. (_bfd_x86_elf_size_dynamic_sections): Likewise. (_bfd_x86_elf_finish_dynamic_sections): Likewise. * elfxx-x86.h (elf_x86_link_hash_table): Remove tlsdesc_plt and tlsdesc_got.
2020-06-08 13:24:04 +02:00
htab->root.tlsdesc_plt = (bfd_vma) - 1;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
}
if (got_type & GOT_TLS_GD)
htab->root.srelgot->size += RELOC_SIZE (htab) * 2;
[AArch64] PR18270, fix handling of GOT entry for local symbol 2015-04-24 Jiong. Wang <jiong.wang@arm.com> bfd/ PR ld/18270 * elfnn-aarch64.c (elfNN_aarch64_size_dynamic): Count local symbol for GOT_NORMAL for both sgot/srelgot section. (elfNN_aarch64_final_link_relocate): Relocate against GOT entry address and generate necessary runtime relocation for GOT entry.
2015-04-25 00:25:28 +02:00
if (got_type & GOT_TLS_IE
|| got_type & GOT_NORMAL)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
htab->root.srelgot->size += RELOC_SIZE (htab);
}
}
else
{
locals[i].got_refcount = (bfd_vma) - 1;
}
}
}
/* Allocate global sym .plt and .got entries, and space for global
sym dynamic relocs. */
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elf_link_hash_traverse (&htab->root, elfNN_aarch64_allocate_dynrelocs,
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
info);
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
/* Allocate global ifunc sym .plt and .got entries, and space for global
ifunc sym dynamic relocs. */
elf_link_hash_traverse (&htab->root, elfNN_aarch64_allocate_ifunc_dynrelocs,
info);
/* Allocate .plt and .got entries, and space for local ifunc symbols. */
htab_traverse (htab->loc_hash_table,
elfNN_aarch64_allocate_local_ifunc_dynrelocs,
info);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* For every jump slot reserved in the sgotplt, reloc_count is
incremented. However, when we reserve space for TLS descriptors,
it's not incremented, so in order to compute the space reserved
for them, it suffices to multiply the reloc count by the jump
slot size. */
if (htab->root.srelplt)
aarch64: Revert AArch64 ifunc changes. The AArch64 ifunc patch introduced a regression caused by incorrect PLT layout. Revert it until a fix is verified. bfd/ChangeLog: 2013-06-19 Will Newton <will.newton@linaro.org> * configure: Regenerated. * configure.in: Remove aarch64 dependency on elf-ifunc.c. * elf64-aarch64.c: Remove objalloc.h include. (elf64_aarch64_howto_dynrelocs): Remove R_AARCH64_IRELATIVE howto. (struct elf64_aarch64_link_hash_table): Remove ifunc related members. (elf_aarch64_local_htab_hash): Remove function. (elf_aarch64_local_htab_eq): Remove function. (elf_aarch64_get_local_sym_hash): Remove function. (elf64_aarch64_link_hash_table_create): Remove local hash table initialization. (elf64_aarch64_final_link_relocate): Remove sym argument and handling of ifunc symbols. (elf64_aarch64_relocate_section): Don't pass sym argument to elf64_aarch64_final_link_relocate. (elf64_aarch64_gc_sweep_hook): Remove handling of ifunc symbols. (elf64_aarch64_adjust_dynamic_symbol): Likewise. (elf64_aarch64_check_relocs): Likewise. (elf64_aarch64_post_process_headers): Remove call to _bfd_elf_set_osabi. (elf64_aarch64_is_function_type): New function. (elf64_aarch64_allocate_dynrelocs): Remove handling of ifunc symbols. (elf_aarch64_allocate_local_dynrelocs): Remove function. (elf64_aarch64_size_dynamic_sections): Remove call to elf_aarch64_allocate_local_dynrelocs. (elf64_aarch64_create_small_pltn_entry): Remove info argument. Remove creation of R_AARCH64_IRELATIVE dynamic relocs. (elf64_aarch64_finish_dynamic_symbol): Remove handling of ifunc symbols. (elf_aarch64_finish_local_dynamic_symbol): Remove function. (elf64_aarch64_finish_dynamic_sections): Remove call to elf_aarch64_finish_local_dynamic_symbol. (elf64_aarch64_add_symbol_hook): Remove function. include/elf/ChangeLog: 2013-06-19 Will Newton <will.newton@linaro.org> * aarch64.h: Remove R_AARCH64_IRELATIVE. ld/ChangeLog: 2013-06-19 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Remove IREL_IN_PLT. ld/testsuite/ChangeLog: 2013-06-19 Will Newton <will.newton@linaro.org> * ld-aarch64/aarch64-elf.exp: Remove ifunc tests. * ld-ifunc/ifunc.exp: Disable ifunc tests on AArch64. * ld-aarch64/ifunc-1-local.d: Remove. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-06-19 12:30:59 +02:00
htab->sgotplt_jump_table_size = aarch64_compute_jump_table_size (htab);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
ELF: Move tlsdesc_plt/tlsdesc_got to elf_link_hash_table All ELF backends with TLS descriptor support have /* The offset into splt of the PLT entry for the TLS descriptor resolver. Special values are 0, if not necessary (or not found to be necessary yet), and -1 if needed but not determined yet. */ bfd_vma tlsdesc_plt; /* The GOT offset for the lazy trampoline. Communicated to the loader via DT_TLSDESC_GOT. The magic value (bfd_vma) -1 indicates an offset is not allocated. */ bfd_vma tlsdesc_got; in symbol hash entry. Move tlsdesc_plt/tlsdesc_got to elf_link_hash_entry to reduce code duplication. * elf-bfd.h (elf_link_hash_entry): Add tlsdesc_plt and tlsdesc_got. * elf32-arm.c (elf32_arm_link_hash_table): Remove tlsdesc_plt and dt_tlsdesc_got. (elf32_arm_size_dynamic_sections): Updated. Clear root.tlsdesc_plt for DF_BIND_NOW. (elf32_arm_finish_dynamic_sections): Updated. (elf32_arm_output_arch_local_syms): Likewise. * elf32-nds32.c (nds32_elf_size_dynamic_sections): Updated. Clear root.tlsdesc_plt for DF_BIND_NOW. (nds32_elf_finish_dynamic_sections): Updated. * elf32-nds32.h (elf_nds32_link_hash_table): Remove dt_tlsdesc_plt and dt_tlsdesc_got. * elf64-x86-64.c (elf_x86_64_finish_dynamic_sections): Updated. * elfnn-aarch64.c (elf_aarch64_link_hash_table): Remove tlsdesc_plt and dt_tlsdesc_got. (elfNN_aarch64_allocate_dynrelocs): Updated. (elfNN_aarch64_finish_dynamic_sections): Likewise. (elfNN_aarch64_size_dynamic_sections): Updated. Clear root.tlsdesc_plt for DF_BIND_NOW. Don't check DF_BIND_NOW twice. * elfxx-x86.c (elf_x86_allocate_dynrelocs): Updated. (_bfd_x86_elf_size_dynamic_sections): Likewise. (_bfd_x86_elf_finish_dynamic_sections): Likewise. * elfxx-x86.h (elf_x86_link_hash_table): Remove tlsdesc_plt and tlsdesc_got.
2020-06-08 13:24:04 +02:00
if (htab->root.tlsdesc_plt)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
if (htab->root.splt->size == 0)
[BFD, LD, AArch64, 2/3] Add --force-bti to enable BTI and to select BTI enabled PLTs This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds a new ld command line option: --force-bti. In the presence of this option, the linker enables BTI with the GNU_PROPERTY_AARCH64_FEATURE_1_BTI feature. This gives out warning in case of missing gnu notes for BTI in inputs. 2) It also defines a new set of BTI enabled PLTs. These are used either when all the inputs are marked with GNU_PROPERTY_AARCH64_FEATURE_1_BTI or when the new --force-bti option is used. This required adding new fields in elf_aarch64_link_hash_table so that we could make the PLT related information more generic. 3) It also defines a dynamic tag DT_AARCH64_BTI_PLT. The linker uses this whenever it picks BTI enabled PLTs. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * bfd-in.h (aarch64_plt_type, aarch64_enable_bti_type): New. (aarch64_bti_pac_info): New. (bfd_elf64_aarch64_set_options): Add aarch64_bti_pac_info argument. (bfd_elf32_aarch64_set_options): Likewise. * bfd-in2.h: Regenerate * elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): New. (PLT_BTI_SMALL_ENTRY_SIZE, PLT_BTI_TLSDESC_ENTRY_SIZE): New. (elfNN_aarch64_small_plt0_bti_entry): New. (elfNN_aarch64_small_plt_bti_entry): New. (elfNN_aarch64_tlsdesc_small_plt_bti_entry): New. (elf_aarch64_obj_tdata): Add no_bti_warn and plt_type fields. (elf_aarch64_link_hash_table): Add plt0_entry, plt_entry and tlsdesc_plt_entry_size fields. (elfNN_aarch64_link_hash_table_create): Initialise the new fields. (setup_plt_values): New helper function. (bfd_elfNN_aarch64_set_options): Use new bp_info to set plt sizes and bti enable type. (elfNN_aarch64_allocate_dynrelocs): Use new size members instead of fixed macros. (elfNN_aarch64_size_dynamic_sections): Likewise and add checks. (elfNN_aarch64_create_small_pltn_entry): Use new generic pointers to plt stubs instead of fixed ones and update filling them according to the need for bti. (elfNN_aarch64_init_small_plt0_entry): Likewise. (elfNN_aarch64_finish_dynamic_sections): Likewise. (get_plt_type, elfNN_aarch64_get_synthetic_symtab): New. (elfNN_aarch64_plt_sym_val): Update size accordingly. (elfNN_aarch64_link_setup_gnu_properties): Set up plts if BTI GNU NOTE is set. (bfd_elfNN_get_synthetic_symtab): Define. (elfNN_aarch64_merge_gnu_properties): Give out warning with --force-bti and mising BTI NOTE SECTION. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * readelf.c (get_aarch64_dynamic_type): New. (get_dynamic_type): Use above for EM_AARCH64. (dynamic_section_aarch64_val): New. (process_dynamic_section): Use above for EM_AARCH64. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * elf/aarch64.h (DT_AARCH64_BTI_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * NEWS: Document --force-bti. * emultempl/aarch64elf.em (plt_type, bti_type, OPTION_FORCE_BTI): New. (PARSE_AND_LIST_SHORTOPTS, PARSE_AND_LIST_OPTIONS): Add force-bti. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FORCE_BTI. * testsuite/ld-aarch64/aarch64-elf.exp: Add all the tests below. * testsuite/ld-aarch64/bti-plt-1.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: New test. * testsuite/ld-aarch64/bti-plt-2.s: New test. * testsuite/ld-aarch64/bti-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-3.d: New test. * testsuite/ld-aarch64/bti-plt-4.d: New test. * testsuite/ld-aarch64/bti-plt-5.d: New test. * testsuite/ld-aarch64/bti-plt-6.d: New test. * testsuite/ld-aarch64/bti-plt-7.d: New test. * testsuite/ld-aarch64/bti-plt-so.s: New test. * testsuite/ld-aarch64/bti-plt.ld: New test.
2019-03-13 11:54:30 +01:00
htab->root.splt->size += htab->plt_header_size;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* If we're not using lazy TLS relocations, don't generate the
AArch64: When DF_BIND_NOW don't use TLSDESC GOT value. When using DF_BIND_NOW on AArch64 we don't reserve the GOT slot for a TLSDESC, but we still emitted DT_TLSDESC_GOT and DT_TLSDESC_PLT. This caused random memory corruption as the "special" value of (bfd_vma)-1 would be set for dt_tlsdesc_got. Since we don't have a value of dt_tlsdesc_got I also don't emit DT_TLSDESC_PLT now becuase it would point to an incomplete PLT. To be able to write the PLT entry DT_TLSDESC_GOT is needed and since we don't have one we can't write the PLT entry either. It is my understanding that GLIBC doesn't need these two entries when not lazy loading. Conversely AArch32 does not reserve neither the GOT not the PLT slot when doing DF_BIND_NOW. AArch32 does not need these checks because these values are initialized to 0 and so the if (...) checks don't pass, but on AArch64 these are initialized to (bfd_vma)-1 and thus we need some extra checks. bfd/ChangeLog: PR ld/24302 * elfnn-aarch64.c (elfNN_aarch64_size_dynamic_sections): Don't emit DT_TLSDESC_GOT and DT_TLSDESC_PLT when DF_BIND_NOW. (elfNN_aarch64_finish_dynamic_sections): Don't write PLT if DF_BIND_NOW. ld/ChangeLog: PR ld/24302 * testsuite/ld-aarch64/aarch64-elf.exp: Add new test. * testsuite/ld-aarch64/tls-relax-gdesc-le-now.d: New test.
2019-04-11 12:27:28 +02:00
GOT and PLT entry required. */
ELF: Move tlsdesc_plt/tlsdesc_got to elf_link_hash_table All ELF backends with TLS descriptor support have /* The offset into splt of the PLT entry for the TLS descriptor resolver. Special values are 0, if not necessary (or not found to be necessary yet), and -1 if needed but not determined yet. */ bfd_vma tlsdesc_plt; /* The GOT offset for the lazy trampoline. Communicated to the loader via DT_TLSDESC_GOT. The magic value (bfd_vma) -1 indicates an offset is not allocated. */ bfd_vma tlsdesc_got; in symbol hash entry. Move tlsdesc_plt/tlsdesc_got to elf_link_hash_entry to reduce code duplication. * elf-bfd.h (elf_link_hash_entry): Add tlsdesc_plt and tlsdesc_got. * elf32-arm.c (elf32_arm_link_hash_table): Remove tlsdesc_plt and dt_tlsdesc_got. (elf32_arm_size_dynamic_sections): Updated. Clear root.tlsdesc_plt for DF_BIND_NOW. (elf32_arm_finish_dynamic_sections): Updated. (elf32_arm_output_arch_local_syms): Likewise. * elf32-nds32.c (nds32_elf_size_dynamic_sections): Updated. Clear root.tlsdesc_plt for DF_BIND_NOW. (nds32_elf_finish_dynamic_sections): Updated. * elf32-nds32.h (elf_nds32_link_hash_table): Remove dt_tlsdesc_plt and dt_tlsdesc_got. * elf64-x86-64.c (elf_x86_64_finish_dynamic_sections): Updated. * elfnn-aarch64.c (elf_aarch64_link_hash_table): Remove tlsdesc_plt and dt_tlsdesc_got. (elfNN_aarch64_allocate_dynrelocs): Updated. (elfNN_aarch64_finish_dynamic_sections): Likewise. (elfNN_aarch64_size_dynamic_sections): Updated. Clear root.tlsdesc_plt for DF_BIND_NOW. Don't check DF_BIND_NOW twice. * elfxx-x86.c (elf_x86_allocate_dynrelocs): Updated. (_bfd_x86_elf_size_dynamic_sections): Likewise. (_bfd_x86_elf_finish_dynamic_sections): Likewise. * elfxx-x86.h (elf_x86_link_hash_table): Remove tlsdesc_plt and tlsdesc_got.
2020-06-08 13:24:04 +02:00
if ((info->flags & DF_BIND_NOW))
htab->root.tlsdesc_plt = 0;
else
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
ELF: Move tlsdesc_plt/tlsdesc_got to elf_link_hash_table All ELF backends with TLS descriptor support have /* The offset into splt of the PLT entry for the TLS descriptor resolver. Special values are 0, if not necessary (or not found to be necessary yet), and -1 if needed but not determined yet. */ bfd_vma tlsdesc_plt; /* The GOT offset for the lazy trampoline. Communicated to the loader via DT_TLSDESC_GOT. The magic value (bfd_vma) -1 indicates an offset is not allocated. */ bfd_vma tlsdesc_got; in symbol hash entry. Move tlsdesc_plt/tlsdesc_got to elf_link_hash_entry to reduce code duplication. * elf-bfd.h (elf_link_hash_entry): Add tlsdesc_plt and tlsdesc_got. * elf32-arm.c (elf32_arm_link_hash_table): Remove tlsdesc_plt and dt_tlsdesc_got. (elf32_arm_size_dynamic_sections): Updated. Clear root.tlsdesc_plt for DF_BIND_NOW. (elf32_arm_finish_dynamic_sections): Updated. (elf32_arm_output_arch_local_syms): Likewise. * elf32-nds32.c (nds32_elf_size_dynamic_sections): Updated. Clear root.tlsdesc_plt for DF_BIND_NOW. (nds32_elf_finish_dynamic_sections): Updated. * elf32-nds32.h (elf_nds32_link_hash_table): Remove dt_tlsdesc_plt and dt_tlsdesc_got. * elf64-x86-64.c (elf_x86_64_finish_dynamic_sections): Updated. * elfnn-aarch64.c (elf_aarch64_link_hash_table): Remove tlsdesc_plt and dt_tlsdesc_got. (elfNN_aarch64_allocate_dynrelocs): Updated. (elfNN_aarch64_finish_dynamic_sections): Likewise. (elfNN_aarch64_size_dynamic_sections): Updated. Clear root.tlsdesc_plt for DF_BIND_NOW. Don't check DF_BIND_NOW twice. * elfxx-x86.c (elf_x86_allocate_dynrelocs): Updated. (_bfd_x86_elf_size_dynamic_sections): Likewise. (_bfd_x86_elf_finish_dynamic_sections): Likewise. * elfxx-x86.h (elf_x86_link_hash_table): Remove tlsdesc_plt and tlsdesc_got.
2020-06-08 13:24:04 +02:00
htab->root.tlsdesc_plt = htab->root.splt->size;
AArch64: When DF_BIND_NOW don't use TLSDESC GOT value. When using DF_BIND_NOW on AArch64 we don't reserve the GOT slot for a TLSDESC, but we still emitted DT_TLSDESC_GOT and DT_TLSDESC_PLT. This caused random memory corruption as the "special" value of (bfd_vma)-1 would be set for dt_tlsdesc_got. Since we don't have a value of dt_tlsdesc_got I also don't emit DT_TLSDESC_PLT now becuase it would point to an incomplete PLT. To be able to write the PLT entry DT_TLSDESC_GOT is needed and since we don't have one we can't write the PLT entry either. It is my understanding that GLIBC doesn't need these two entries when not lazy loading. Conversely AArch32 does not reserve neither the GOT not the PLT slot when doing DF_BIND_NOW. AArch32 does not need these checks because these values are initialized to 0 and so the if (...) checks don't pass, but on AArch64 these are initialized to (bfd_vma)-1 and thus we need some extra checks. bfd/ChangeLog: PR ld/24302 * elfnn-aarch64.c (elfNN_aarch64_size_dynamic_sections): Don't emit DT_TLSDESC_GOT and DT_TLSDESC_PLT when DF_BIND_NOW. (elfNN_aarch64_finish_dynamic_sections): Don't write PLT if DF_BIND_NOW. ld/ChangeLog: PR ld/24302 * testsuite/ld-aarch64/aarch64-elf.exp: Add new test. * testsuite/ld-aarch64/tls-relax-gdesc-le-now.d: New test.
2019-04-11 12:27:28 +02:00
htab->root.splt->size += htab->tlsdesc_plt_entry_size;
ELF: Move tlsdesc_plt/tlsdesc_got to elf_link_hash_table All ELF backends with TLS descriptor support have /* The offset into splt of the PLT entry for the TLS descriptor resolver. Special values are 0, if not necessary (or not found to be necessary yet), and -1 if needed but not determined yet. */ bfd_vma tlsdesc_plt; /* The GOT offset for the lazy trampoline. Communicated to the loader via DT_TLSDESC_GOT. The magic value (bfd_vma) -1 indicates an offset is not allocated. */ bfd_vma tlsdesc_got; in symbol hash entry. Move tlsdesc_plt/tlsdesc_got to elf_link_hash_entry to reduce code duplication. * elf-bfd.h (elf_link_hash_entry): Add tlsdesc_plt and tlsdesc_got. * elf32-arm.c (elf32_arm_link_hash_table): Remove tlsdesc_plt and dt_tlsdesc_got. (elf32_arm_size_dynamic_sections): Updated. Clear root.tlsdesc_plt for DF_BIND_NOW. (elf32_arm_finish_dynamic_sections): Updated. (elf32_arm_output_arch_local_syms): Likewise. * elf32-nds32.c (nds32_elf_size_dynamic_sections): Updated. Clear root.tlsdesc_plt for DF_BIND_NOW. (nds32_elf_finish_dynamic_sections): Updated. * elf32-nds32.h (elf_nds32_link_hash_table): Remove dt_tlsdesc_plt and dt_tlsdesc_got. * elf64-x86-64.c (elf_x86_64_finish_dynamic_sections): Updated. * elfnn-aarch64.c (elf_aarch64_link_hash_table): Remove tlsdesc_plt and dt_tlsdesc_got. (elfNN_aarch64_allocate_dynrelocs): Updated. (elfNN_aarch64_finish_dynamic_sections): Likewise. (elfNN_aarch64_size_dynamic_sections): Updated. Clear root.tlsdesc_plt for DF_BIND_NOW. Don't check DF_BIND_NOW twice. * elfxx-x86.c (elf_x86_allocate_dynrelocs): Updated. (_bfd_x86_elf_size_dynamic_sections): Likewise. (_bfd_x86_elf_finish_dynamic_sections): Likewise. * elfxx-x86.h (elf_x86_link_hash_table): Remove tlsdesc_plt and tlsdesc_got.
2020-06-08 13:24:04 +02:00
htab->root.tlsdesc_got = htab->root.sgot->size;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
htab->root.sgot->size += GOT_ENTRY_SIZE;
}
}
[AArch64] Cortex-A53 erratum 835769 linker workaround 2014-10-22 Tejas Belagod <tejas.belagod@arm.com> bfd/ * bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter. * bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise. * elfnn-aarch64.c (aarch64_erratum_835769_stub): New. (elf_aarch64_stub_type): Add new type aarch64_stub_erratum_835769_veneer. (elf_aarch64_stub_hash_entry): New fields for erratum 835769. (aarch64_erratum_835769_fix): New data struct to record erratum 835769. (elf_aarch64_link_hash_table: Global flags for 835769. (aarch64_build_one_stub): Add case for 835769. (aarch64_size_one_stub): Likewise. (aarch64_mem_op_p, aarch64_mlxl_p, aarch64_erratum_sequence,erratum_835769_scan): New. Decode and scan functions for erratum 835769. (elf_aarch64_create_or_find_stub_sec): New. (elfNN_aarch64_size_stubs): Look for erratum 835769 and record them. (bfd_elfNN_aarch64_set_options: Set global flag for 835769. (erratum_835769_branch_to_stub_data, make_branch_to_erratum_835769_stub):New. Connect up all the erratum stubs to occurances by branches. (elfNN_aarch64_write_section): New hook. (aarch64_map_one_stub): Output erratum stub symbol. (elfNN_aarch64_size_dynamic_sections): Init mapping symbol information for erratum 835769. (elf_backend_write_section): Define. ld/ * emultempl/aarch64elf.em: Add command-line option for erratum 835769. ld/testsuite/ * ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum 835769 tests. * ld-aarch64/erratum835769.d: New. * ld-aarch64/erratum835769.s: New.
2014-10-24 12:39:35 +02:00
/* Init mapping symbols information to use later to distingush between
[AArch64] Workaround for Cortex A53 erratum 843419 Some early revisions of the Cortex-A53 have an erratum (843419). The details of the erratum are quite complex and involve dynamic conditions. For the purposes of the workaround we have simplified the static conditions to an ADRP in the last two instructions of a 4KByte page, followed within four instructions by a load/store dependent on the ADRP. This patch adds support to conservatively scan for and workaround Cortex A53 erratum 843419. There are two different workaround strategies used. The first is to rewrite ADRP instructions which form part of an erratum sequence with an ADR instruction. In situations where the ADR provides insufficient offset the dependent load or store instruction from the sequence is moved to a stub section and branches are inserted from the original sequence to the relocated instruction and back again. Stub section sizes are rounded up to a multiple of 4096 in order to ensure that the act of inserting work around stubs does not create more errata sequences. Workaround stubs are always inserted into the stub section associated with the input section containing the erratum sequence. This ensures that the fully relocated form of the veneered load store instruction is available at the point in time when the stub section is written.
2015-02-24 13:04:41 +01:00
code and data while scanning for errata. */
if (htab->fix_erratum_835769 || htab->fix_erratum_843419)
[AArch64] Cortex-A53 erratum 835769 linker workaround 2014-10-22 Tejas Belagod <tejas.belagod@arm.com> bfd/ * bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter. * bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise. * elfnn-aarch64.c (aarch64_erratum_835769_stub): New. (elf_aarch64_stub_type): Add new type aarch64_stub_erratum_835769_veneer. (elf_aarch64_stub_hash_entry): New fields for erratum 835769. (aarch64_erratum_835769_fix): New data struct to record erratum 835769. (elf_aarch64_link_hash_table: Global flags for 835769. (aarch64_build_one_stub): Add case for 835769. (aarch64_size_one_stub): Likewise. (aarch64_mem_op_p, aarch64_mlxl_p, aarch64_erratum_sequence,erratum_835769_scan): New. Decode and scan functions for erratum 835769. (elf_aarch64_create_or_find_stub_sec): New. (elfNN_aarch64_size_stubs): Look for erratum 835769 and record them. (bfd_elfNN_aarch64_set_options: Set global flag for 835769. (erratum_835769_branch_to_stub_data, make_branch_to_erratum_835769_stub):New. Connect up all the erratum stubs to occurances by branches. (elfNN_aarch64_write_section): New hook. (aarch64_map_one_stub): Output erratum stub symbol. (elfNN_aarch64_size_dynamic_sections): Init mapping symbol information for erratum 835769. (elf_backend_write_section): Define. ld/ * emultempl/aarch64elf.em: Add command-line option for erratum 835769. ld/testsuite/ * ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum 835769 tests. * ld-aarch64/erratum835769.d: New. * ld-aarch64/erratum835769.s: New.
2014-10-24 12:39:35 +02:00
for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
{
if (!is_aarch64_elf (ibfd))
continue;
bfd_elfNN_aarch64_init_maps (ibfd);
}
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* We now have determined the sizes of the various dynamic sections.
Allocate memory for them. */
relocs = FALSE;
for (s = dynobj->sections; s != NULL; s = s->next)
{
if ((s->flags & SEC_LINKER_CREATED) == 0)
continue;
if (s == htab->root.splt
|| s == htab->root.sgot
|| s == htab->root.sgotplt
|| s == htab->root.iplt
Put .dynbss and .rel.bss shortcuts in main elf hash table Also, create .rel{,a}.bss for PIEs on all targets, not just x86. * elf-bfd.h (struct elf_link_hash_table): Add sdynbss and srelbss. * elflink.c (_bfd_elf_create_dynamic_sections): Set them. Create .rel.bss/.rela.bss for executables, both PIE and non-PIE. * elf32-arc.c (struct elf_arc_link_hash_table): Delete srelbss. Use ELF hash table var throughout. * elf32-arm.c (struct elf32_arm_link_hash_table): Delete sdynbss and srelbss. Use ELF hash table vars throughout. * elf32-hppa.c (struct elf32_hppa_link_hash_table): Likewise. * elf32-i386.c (struct elf_i386_link_hash_table): Likewise. * elf32-metag.c (struct elf_metag_link_hash_table): Likewise. * elf32-microblaze.c (struct elf32_mb_link_hash_table): Likewise. * elf32-nios2.c (struct elf32_nios2_link_hash_table): Likewise. * elf32-or1k.c (struct elf_or1k_link_hash_table): Likewise. * elf32-ppc.c (struct ppc_elf_link_hash_table): Likewise. * elf32-s390.c (struct elf_s390_link_hash_table): Likewise. * elf32-tic6x.c (struct elf32_tic6x_link_hash_table): Likewise. * elf32-tilepro.c (struct tilepro_elf_link_hash_table): Likewise. * elf64-ppc.c (struct ppc_link_hash_table): Likewise. * elf64-s390.c (struct elf_s390_link_hash_table): Likewise. * elf64-x86-64.c (struct elf_x86_64_link_hash_table): Likewise. * elfnn-aarch64.c (struct elf_aarch64_link_hash_table): Likewise. * elfnn-riscv.c (struct riscv_elf_link_hash_table): Likewise. * elfxx-mips.c (struct mips_elf_link_hash_table): Likewise. * elfxx-sparc.h (struct _bfd_sparc_elf_link_hash_table): Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c (struct tilegx_elf_link_hash_table): Likewise. * elf32-arc.c (arc_elf_create_dynamic_sections): Delete. (elf_backend_create_dynamic_sections): Use base ELF version. * elf32-microblaze.c (microblaze_elf_create_dynamic_sections): Delete. (elf_backend_create_dynamic_sections): Use base ELF version. * elf32-or1k.c (or1k_elf_create_dynamic_sections): Delete. (elf_backend_create_dynamic_sections): Use base ELF version. * elf32-s390.c (elf_s390_create_dynamic_sections): Delete. (elf_backend_create_dynamic_sections): Use base ELF version. * elf64-ppc.c (ppc64_elf_create_dynamic_sections): Delete. (elf_backend_create_dynamic_sections): Use base ELF version. * elf64-s390.c (elf_s390_create_dynamic_sections): Delete. (elf_backend_create_dynamic_sections): Use base ELF version. * elf32-tilepro.c (tilepro_elf_create_dynamic_sections): Remove extraneous tests. * elfnn-aarch64.c (elfNN_aarch64_create_dynamic_sections): Likewise. * elfxx-mips.c (_bfd_mips_elf_create_dynamic_sections): Likewise. * elfxx-tilegx.c (tilegx_elf_create_dynamic_sections): Likewise. * elf32-i386.c (elf_i386_create_dynamic_sections): Don't create ".rel.bss" for executables. * elf64-x86-64.c (elf_x86_64_create_dynamic_sections): Don't create ".rela.bss" for executables. * elf32-nios2.c (nios2_elf32_create_dynamic_sections): Don't ignore return status from _bfd_elf_create_dynamic_sections.
2016-12-25 14:51:06 +01:00
|| s == htab->root.igotplt
dynrelro section for read-only dynamic symbols copied into executable Variables defined in shared libraries are copied into an executable's .bss section when code in the executable is non-PIC and thus would require dynamic text relocations to access the variable directly in the shared library. Recent x86 toolchains also copy variables into the executable to gain a small speed improvement. The problem is that if the variable was originally read-only, the copy in .bss is writable, potentially opening a security hole. This patch cures that problem by putting the copy in a section that becomes read-only after ld.so relocation, provided -z relro is in force. The patch also fixes a microblaze linker segfault on attempting to use dynamic bss variables. bfd/ PR ld/20995 * elf-bfd.h (struct elf_link_hash_table): Add sdynrelro and sreldynrelro. (struct elf_backend_data): Add want_dynrelro. * elfxx-target.h (elf_backend_want_dynrelro): Define. (elfNN_bed): Update initializer. * elflink.c (_bfd_elf_create_dynamic_sections): Create sdynrelro and sreldynrelro sections. * elf32-arm.c (elf32_arm_adjust_dynamic_symbol): Place variables copied into the executable from read-only sections into sdynrelro. (elf32_arm_size_dynamic_sections): Handle sdynrelro. (elf32_arm_finish_dynamic_symbol): Select sreldynrelro for dynamic relocs in sdynrelro. (elf_backend_want_dynrelro): Define. * elf32-hppa.c (elf32_hppa_adjust_dynamic_symbol) (elf32_hppa_size_dynamic_sections, elf32_hppa_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf32-i386.c (elf_i386_adjust_dynamic_symbol) (elf_i386_size_dynamic_sections, elf_i386_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf32-metag.c (elf_metag_adjust_dynamic_symbol) (elf_metag_size_dynamic_sections, elf_metag_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf32-microblaze.c (microblaze_elf_adjust_dynamic_symbol) (microblaze_elf_size_dynamic_sections) (microblaze_elf_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf32-nios2.c (nios2_elf32_finish_dynamic_symbol) (nios2_elf32_adjust_dynamic_symbol) (nios2_elf32_size_dynamic_sections) (elf_backend_want_dynrelro): As above. * elf32-or1k.c (or1k_elf_finish_dynamic_symbol) (or1k_elf_adjust_dynamic_symbol, or1k_elf_size_dynamic_sections) (elf_backend_want_dynrelro): As above. * elf32-ppc.c (ppc_elf_adjust_dynamic_symbol) (ppc_elf_size_dynamic_sections, ppc_elf_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf32-s390.c (elf_s390_adjust_dynamic_symbol) (elf_s390_size_dynamic_sections, elf_s390_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf32-tic6x.c (elf32_tic6x_adjust_dynamic_symbol) (elf32_tic6x_size_dynamic_sections) (elf32_tic6x_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf32-tilepro.c (tilepro_elf_adjust_dynamic_symbol) (tilepro_elf_size_dynamic_sections) (tilepro_elf_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf64-ppc.c (ppc64_elf_adjust_dynamic_symbol) (ppc64_elf_size_dynamic_sections, ppc64_elf_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf64-s390.c (elf_s390_adjust_dynamic_symbol) (elf_s390_size_dynamic_sections, elf_s390_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf64-x86-64.c (elf_x86_64_adjust_dynamic_symbol) (elf_x86_64_size_dynamic_sections) (elf_x86_64_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elfnn-aarch64.c (elfNN_aarch64_adjust_dynamic_symbol) (elfNN_aarch64_size_dynamic_sections) (elfNN_aarch64_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elfnn-riscv.c (riscv_elf_adjust_dynamic_symbol) (riscv_elf_size_dynamic_sections, riscv_elf_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elfxx-mips.c (_bfd_mips_elf_adjust_dynamic_symbol) (_bfd_mips_elf_size_dynamic_sections) (_bfd_mips_vxworks_finish_dynamic_symbol): As above. * elfxx-sparc.c (_bfd_sparc_elf_adjust_dynamic_symbol) (_bfd_sparc_elf_size_dynamic_sections) (_bfd_sparc_elf_finish_dynamic_symbol): As above. * elfxx-tilegx.c (tilegx_elf_adjust_dynamic_symbol) (tilegx_elf_size_dynamic_sections) (tilegx_elf_finish_dynamic_symbol): As above. * elf32-mips.c (elf_backend_want_dynrelro): Define. * elf64-mips.c (elf_backend_want_dynrelro): Define. * elf32-sparc.c (elf_backend_want_dynrelro): Define. * elf64-sparc.c (elf_backend_want_dynrelro): Define. * elf32-tilegx.c (elf_backend_want_dynrelro): Define. * elf64-tilegx.c (elf_backend_want_dynrelro): Define. * elf32-microblaze.c (microblaze_elf_adjust_dynamic_symbol): Tidy. (microblaze_elf_size_dynamic_sections): Handle sdynbss. * elf32-nios2.c (nios2_elf32_size_dynamic_sections): Make use of linker shortcuts to dynamic sections rather than comparing names. Correctly set "got" flag. ld/ PR ld/20995 * testsuite/ld-arm/farcall-mixed-app-v5.d: Update to suit changed stub hash table traversal caused by section id increment. Accept the previous output too. * testsuite/ld-arm/farcall-mixed-app.d: Likewise. * testsuite/ld-arm/farcall-mixed-lib-v4t.d: Likewise. * testsuite/ld-arm/farcall-mixed-lib.d: Likewise. * testsuite/ld-elf/pr20995a.s, * testsuite/ld-elf/pr20995b.s, * testsuite/ld-elf/pr20995.r: New test. * testsuite/ld-elf/elf.exp: Run it.
2016-12-25 15:00:45 +01:00
|| s == htab->root.sdynbss
|| s == htab->root.sdynrelro)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
/* Strip this section if we don't need it; see the
comment below. */
}
bfd_section_* macros This large patch removes the unnecessary bfd parameter from various bfd section macros and functions. The bfd is hardly ever used and if needed for the bfd_set_section_* or bfd_rename_section functions can be found via section->owner except for the com, und, abs, and ind std_section special sections. Those sections shouldn't be modified anyway. The patch also removes various bfd_get_section_<field> macros, replacing their use with bfd_section_<field>, and adds bfd_set_section_lma. I've also fixed a minor bug in gas where compressed section renaming was done directly rather than calling bfd_rename_section. This would have broken bfd_get_section_by_name and similar functions, but that hardly mattered at such a late stage in gas processing. bfd/ * bfd-in.h (bfd_get_section_name, bfd_get_section_vma), (bfd_get_section_lma, bfd_get_section_alignment), (bfd_get_section_size, bfd_get_section_flags), (bfd_get_section_userdata): Delete. (bfd_section_name, bfd_section_size, bfd_section_vma), (bfd_section_lma, bfd_section_alignment): Lose bfd parameter. (bfd_section_flags, bfd_section_userdata): New. (bfd_is_com_section): Rename parameter. * section.c (bfd_set_section_userdata, bfd_set_section_vma), (bfd_set_section_alignment, bfd_set_section_flags, bfd_rename_section), (bfd_set_section_size): Delete bfd parameter, rename section parameter. (bfd_set_section_lma): New. * bfd-in2.h: Regenerate. * mach-o.c (bfd_mach_o_init_section_from_mach_o): Delete bfd param, update callers. * aoutx.h, * bfd.c, * coff-alpha.c, * coff-arm.c, * coff-mips.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * compress.c, * ecoff.c, * elf-eh-frame.c, * elf-hppa.h, * elf-ifunc.c, * elf-m10200.c, * elf-m10300.c, * elf-properties.c, * elf-s390-common.c, * elf-vxworks.c, * elf.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-csky.c, * elf32-d10v.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-ip2k.c, * elf32-iq2000.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc1x.c, * elf32-m68k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nios2.c, * elf32-or1k.c, * elf32-ppc.c, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score7.c, * elf32-sh.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilepro.c, * elf32-v850.c, * elf32-vax.c, * elf32-visium.c, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-bpf.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sparc.c, * elf64-x86-64.c, * elflink.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-mips.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * i386msdos.c, * linker.c, * mach-o.c, * mmo.c, * opncls.c, * pdp11.c, * pei-x86_64.c, * peicode.h, * reloc.c, * section.c, * syms.c, * vms-alpha.c, * xcofflink.c: Update throughout for bfd section macro and function changes. binutils/ * addr2line.c, * bucomm.c, * coffgrok.c, * dlltool.c, * nm.c, * objcopy.c, * objdump.c, * od-elf32_avr.c, * od-macho.c, * od-xcoff.c, * prdbg.c, * rdcoff.c, * rddbg.c, * rescoff.c, * resres.c, * size.c, * srconv.c, * strings.c, * windmc.c: Update throughout for bfd section macro and function changes. gas/ * as.c, * as.h, * dw2gencfi.c, * dwarf2dbg.c, * ecoff.c, * read.c, * stabs.c, * subsegs.c, * subsegs.h, * write.c, * config/obj-coff-seh.c, * config/obj-coff.c, * config/obj-ecoff.c, * config/obj-elf.c, * config/obj-macho.c, * config/obj-som.c, * config/tc-aarch64.c, * config/tc-alpha.c, * config/tc-arc.c, * config/tc-arm.c, * config/tc-avr.c, * config/tc-bfin.c, * config/tc-bpf.c, * config/tc-d10v.c, * config/tc-d30v.c, * config/tc-epiphany.c, * config/tc-fr30.c, * config/tc-frv.c, * config/tc-h8300.c, * config/tc-hppa.c, * config/tc-i386.c, * config/tc-ia64.c, * config/tc-ip2k.c, * config/tc-iq2000.c, * config/tc-lm32.c, * config/tc-m32c.c, * config/tc-m32r.c, * config/tc-m68hc11.c, * config/tc-mep.c, * config/tc-microblaze.c, * config/tc-mips.c, * config/tc-mmix.c, * config/tc-mn10200.c, * config/tc-mn10300.c, * config/tc-msp430.c, * config/tc-mt.c, * config/tc-nds32.c, * config/tc-or1k.c, * config/tc-ppc.c, * config/tc-pru.c, * config/tc-rl78.c, * config/tc-rx.c, * config/tc-s12z.c, * config/tc-s390.c, * config/tc-score.c, * config/tc-score7.c, * config/tc-sh.c, * config/tc-sparc.c, * config/tc-spu.c, * config/tc-tic4x.c, * config/tc-tic54x.c, * config/tc-tic6x.c, * config/tc-tilegx.c, * config/tc-tilepro.c, * config/tc-v850.c, * config/tc-visium.c, * config/tc-wasm32.c, * config/tc-xc16x.c, * config/tc-xgate.c, * config/tc-xstormy16.c, * config/tc-xtensa.c, * config/tc-z8k.c: Update throughout for bfd section macro and function changes. * write.c (compress_debug): Use bfd_rename_section. gdb/ * aarch64-linux-tdep.c, * arm-tdep.c, * auto-load.c, * coff-pe-read.c, * coffread.c, * corelow.c, * dbxread.c, * dicos-tdep.c, * dwarf2-frame.c, * dwarf2read.c, * elfread.c, * exec.c, * fbsd-tdep.c, * gcore.c, * gdb_bfd.c, * gdb_bfd.h, * hppa-tdep.c, * i386-cygwin-tdep.c, * i386-fbsd-tdep.c, * i386-linux-tdep.c, * jit.c, * linux-tdep.c, * machoread.c, * maint.c, * mdebugread.c, * minidebug.c, * mips-linux-tdep.c, * mips-sde-tdep.c, * mips-tdep.c, * mipsread.c, * nto-tdep.c, * objfiles.c, * objfiles.h, * osabi.c, * ppc-linux-tdep.c, * ppc64-tdep.c, * record-btrace.c, * record-full.c, * remote.c, * rs6000-aix-tdep.c, * rs6000-tdep.c, * s390-linux-tdep.c, * s390-tdep.c, * solib-aix.c, * solib-dsbt.c, * solib-frv.c, * solib-spu.c, * solib-svr4.c, * solib-target.c, * spu-linux-nat.c, * spu-tdep.c, * symfile-mem.c, * symfile.c, * symmisc.c, * symtab.c, * target.c, * windows-nat.c, * xcoffread.c, * cli/cli-dump.c, * compile/compile-object-load.c, * mi/mi-interp.c: Update throughout for bfd section macro and function changes. * gcore (gcore_create_callback): Use bfd_set_section_lma. * spu-tdep.c (spu_overlay_new_objfile): Likewise. gprof/ * corefile.c, * symtab.c: Update throughout for bfd section macro and function changes. ld/ * ldcref.c, * ldctor.c, * ldelf.c, * ldlang.c, * pe-dll.c, * emultempl/aarch64elf.em, * emultempl/aix.em, * emultempl/armcoff.em, * emultempl/armelf.em, * emultempl/cr16elf.em, * emultempl/cskyelf.em, * emultempl/m68hc1xelf.em, * emultempl/m68kelf.em, * emultempl/mipself.em, * emultempl/mmix-elfnmmo.em, * emultempl/mmo.em, * emultempl/msp430.em, * emultempl/nios2elf.em, * emultempl/pe.em, * emultempl/pep.em, * emultempl/ppc64elf.em, * emultempl/xtensaelf.em: Update throughout for bfd section macro and function changes. libctf/ * ctf-open-bfd.c: Update throughout for bfd section macro changes. opcodes/ * arc-ext.c: Update throughout for bfd section macro changes. sim/ * common/sim-load.c, * common/sim-utils.c, * cris/sim-if.c, * erc32/func.c, * lm32/sim-if.c, * m32c/load.c, * m32c/trace.c, * m68hc11/interp.c, * ppc/hw_htab.c, * ppc/hw_init.c, * rl78/load.c, * rl78/trace.c, * rx/gdb-if.c, * rx/load.c, * rx/trace.c: Update throughout for bfd section macro changes.
2019-09-16 12:55:17 +02:00
else if (CONST_STRNEQ (bfd_section_name (s), ".rela"))
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
if (s->size != 0 && s != htab->root.srelplt)
relocs = TRUE;
/* We use the reloc_count field as a counter if we need
to copy relocs into the output file. */
if (s != htab->root.srelplt)
s->reloc_count = 0;
}
else
{
/* It's not one of our sections, so don't allocate space. */
continue;
}
if (s->size == 0)
{
/* If we don't need this section, strip it from the
output file. This is mostly to handle .rela.bss and
.rela.plt. We must create both sections in
create_dynamic_sections, because they must be created
before the linker maps input sections to output
sections. The linker does that before
adjust_dynamic_symbol is called, and it is that
function which decides whether anything needs to go
into these sections. */
s->flags |= SEC_EXCLUDE;
continue;
}
if ((s->flags & SEC_HAS_CONTENTS) == 0)
continue;
/* Allocate memory for the section contents. We use bfd_zalloc
BFD whitespace fixes Binutils is supposed to use tabs. In my git config I have whitespace = indent-with-non-tab,space-before-tab,trailing-space and I got annoyed enough seeing red in "git diff" output to fix the problems. * doc/header.sed: Trim trailing space when splitting lines. * aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-cris.c, * aout-ns32k.c, * aout-target.h, * aout-tic30.c, * aoutf1.h, * aoutx.h, * arc-got.h, * arc-plt.def, * arc-plt.h, * archive.c, * archive64.c, * archures.c, * armnetbsd.c, * bfd-in.h, * bfd.c, * bfdio.c, * binary.c, * bout.c, * cache.c, * cisco-core.c, * coff-alpha.c, * coff-apollo.c, * coff-arm.c, * coff-h8300.c, * coff-i386.c, * coff-i860.c, * coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mcore.c, * coff-mips.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-stgo32.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * compress.c, * corefile.c, * cpu-alpha.c, * cpu-arm.c, * cpu-avr.c, * cpu-bfin.c, * cpu-cr16.c, * cpu-cr16c.c, * cpu-crx.c, * cpu-d10v.c, * cpu-frv.c, * cpu-ft32.c, * cpu-i370.c, * cpu-i960.c, * cpu-ia64-opc.c, * cpu-ip2k.c, * cpu-lm32.c, * cpu-m32r.c, * cpu-mcore.c, * cpu-microblaze.c, * cpu-mips.c, * cpu-moxie.c, * cpu-mt.c, * cpu-nios2.c, * cpu-ns32k.c, * cpu-or1k.c, * cpu-powerpc.c, * cpu-pru.c, * cpu-sh.c, * cpu-spu.c, * cpu-v850.c, * cpu-v850_rh850.c, * cpu-xgate.c, * cpu-z80.c, * dwarf1.c, * dwarf2.c, * ecoff.c, * ecofflink.c, * ecoffswap.h, * elf-bfd.h, * elf-eh-frame.c, * elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf-s390-common.c, * elf-strtab.c, * elf-vxworks.c, * elf.c, * elf32-am33lin.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-avr.h, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-i860.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68hc1x.c, * elf32-m68hc1x.h, * elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nds32.h, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score.h, * elf32-score7.c, * elf32-sh-symbian.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilegx.c, * elf32-tilegx.h, * elf32-tilepro.c, * elf32-tilepro.h, * elf32-v850.c, * elf32-vax.c, * elf32-wasm32.c, * elf32-xc16x.c, * elf32-xgate.c, * elf32-xgate.h, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-tilegx.c, * elf64-tilegx.h, * elf64-x86-64.c, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-aarch64.h, * elfxx-ia64.c, * elfxx-ia64.h, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * elfxx-x86.h, * freebsd.h, * hash.c, * host-aout.c, * hp300hpux.c, * hppabsd-core.c, * hpux-core.c, * i386aout.c, * i386linux.c, * i386lynx.c, * i386mach3.c, * i386msdos.c, * i386netbsd.c, * ieee.c, * ihex.c, * irix-core.c, * libaout.h, * libbfd-in.h, * libbfd.c, * libcoff-in.h, * libnlm.h, * libpei.h, * libxcoff.h, * linker.c, * lynx-core.c, * m68k4knetbsd.c, * m68klinux.c, * m68knetbsd.c, * m88kmach3.c, * mach-o-aarch64.c, * mach-o-arm.c, * mach-o-i386.c, * mach-o-target.c, * mach-o-x86-64.c, * mach-o.c, * mach-o.h, * merge.c, * mipsbsd.c, * mmo.c, * netbsd.h, * netbsd-core.c, * newsos3.c, * nlm-target.h, * nlm32-ppc.c, * nlm32-sparc.c, * nlmcode.h, * ns32k.h, * ns32knetbsd.c, * oasys.c, * opncls.c, * pc532-mach.c, * pdp11.c, * pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-mips.c, * pe-x86_64.c, * peXXigen.c, * pef.c, * pef.h, * pei-arm.c, * pei-i386.c, * pei-mcore.c, * pei-x86_64.c, * peicode.h, * plugin.c, * ppcboot.c, * ptrace-core.c, * reloc.c, * riscix.c, * rs6000-core.c, * section.c, * som.c, * som.h, * sparclinux.c, * sparcnetbsd.c, * srec.c, * stabs.c, * sunos.c, * syms.c, * targets.c, * tekhex.c, * trad-core.c, * vax1knetbsd.c, * vaxnetbsd.c, * verilog.c, * versados.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * wasm-module.c, * wasm-module.h, * xcofflink.c, * xsym.c, * xsym.h: Whitespace fixes. * bfd-in2.h, * libbfd.h, * libcoff.h: Regenerate.
2017-12-05 23:56:00 +01:00
here in case unused entries are not reclaimed before the
section's contents are written out. This should not happen,
but this way if it does, we get a R_AARCH64_NONE reloc instead
of garbage. */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
s->contents = (bfd_byte *) bfd_zalloc (dynobj, s->size);
if (s->contents == NULL)
return FALSE;
}
if (htab->root.dynamic_sections_created)
{
/* Add some entries to the .dynamic section. We fill in the
BFD whitespace fixes Binutils is supposed to use tabs. In my git config I have whitespace = indent-with-non-tab,space-before-tab,trailing-space and I got annoyed enough seeing red in "git diff" output to fix the problems. * doc/header.sed: Trim trailing space when splitting lines. * aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-cris.c, * aout-ns32k.c, * aout-target.h, * aout-tic30.c, * aoutf1.h, * aoutx.h, * arc-got.h, * arc-plt.def, * arc-plt.h, * archive.c, * archive64.c, * archures.c, * armnetbsd.c, * bfd-in.h, * bfd.c, * bfdio.c, * binary.c, * bout.c, * cache.c, * cisco-core.c, * coff-alpha.c, * coff-apollo.c, * coff-arm.c, * coff-h8300.c, * coff-i386.c, * coff-i860.c, * coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mcore.c, * coff-mips.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-stgo32.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * compress.c, * corefile.c, * cpu-alpha.c, * cpu-arm.c, * cpu-avr.c, * cpu-bfin.c, * cpu-cr16.c, * cpu-cr16c.c, * cpu-crx.c, * cpu-d10v.c, * cpu-frv.c, * cpu-ft32.c, * cpu-i370.c, * cpu-i960.c, * cpu-ia64-opc.c, * cpu-ip2k.c, * cpu-lm32.c, * cpu-m32r.c, * cpu-mcore.c, * cpu-microblaze.c, * cpu-mips.c, * cpu-moxie.c, * cpu-mt.c, * cpu-nios2.c, * cpu-ns32k.c, * cpu-or1k.c, * cpu-powerpc.c, * cpu-pru.c, * cpu-sh.c, * cpu-spu.c, * cpu-v850.c, * cpu-v850_rh850.c, * cpu-xgate.c, * cpu-z80.c, * dwarf1.c, * dwarf2.c, * ecoff.c, * ecofflink.c, * ecoffswap.h, * elf-bfd.h, * elf-eh-frame.c, * elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf-s390-common.c, * elf-strtab.c, * elf-vxworks.c, * elf.c, * elf32-am33lin.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-avr.h, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-i860.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68hc1x.c, * elf32-m68hc1x.h, * elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nds32.h, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score.h, * elf32-score7.c, * elf32-sh-symbian.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilegx.c, * elf32-tilegx.h, * elf32-tilepro.c, * elf32-tilepro.h, * elf32-v850.c, * elf32-vax.c, * elf32-wasm32.c, * elf32-xc16x.c, * elf32-xgate.c, * elf32-xgate.h, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-tilegx.c, * elf64-tilegx.h, * elf64-x86-64.c, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-aarch64.h, * elfxx-ia64.c, * elfxx-ia64.h, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * elfxx-x86.h, * freebsd.h, * hash.c, * host-aout.c, * hp300hpux.c, * hppabsd-core.c, * hpux-core.c, * i386aout.c, * i386linux.c, * i386lynx.c, * i386mach3.c, * i386msdos.c, * i386netbsd.c, * ieee.c, * ihex.c, * irix-core.c, * libaout.h, * libbfd-in.h, * libbfd.c, * libcoff-in.h, * libnlm.h, * libpei.h, * libxcoff.h, * linker.c, * lynx-core.c, * m68k4knetbsd.c, * m68klinux.c, * m68knetbsd.c, * m88kmach3.c, * mach-o-aarch64.c, * mach-o-arm.c, * mach-o-i386.c, * mach-o-target.c, * mach-o-x86-64.c, * mach-o.c, * mach-o.h, * merge.c, * mipsbsd.c, * mmo.c, * netbsd.h, * netbsd-core.c, * newsos3.c, * nlm-target.h, * nlm32-ppc.c, * nlm32-sparc.c, * nlmcode.h, * ns32k.h, * ns32knetbsd.c, * oasys.c, * opncls.c, * pc532-mach.c, * pdp11.c, * pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-mips.c, * pe-x86_64.c, * peXXigen.c, * pef.c, * pef.h, * pei-arm.c, * pei-i386.c, * pei-mcore.c, * pei-x86_64.c, * peicode.h, * plugin.c, * ppcboot.c, * ptrace-core.c, * reloc.c, * riscix.c, * rs6000-core.c, * section.c, * som.c, * som.h, * sparclinux.c, * sparcnetbsd.c, * srec.c, * stabs.c, * sunos.c, * syms.c, * targets.c, * tekhex.c, * trad-core.c, * vax1knetbsd.c, * vaxnetbsd.c, * verilog.c, * versados.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * wasm-module.c, * wasm-module.h, * xcofflink.c, * xsym.c, * xsym.h: Whitespace fixes. * bfd-in2.h, * libbfd.h, * libcoff.h: Regenerate.
2017-12-05 23:56:00 +01:00
values later, in elfNN_aarch64_finish_dynamic_sections, but we
must add the entries now so that we get the correct size for
the .dynamic section. The DT_DEBUG entry is filled in by the
dynamic linker and used by the debugger. */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
#define add_dynamic_entry(TAG, VAL) \
_bfd_elf_add_dynamic_entry (info, TAG, VAL)
ELF: Add _bfd_elf_add_dynamic_tags All ELF backends with shared library support need to add dynamic tags. Add dt_pltgot_required and dt_jmprel_required to elf_link_hash_table to indicate that DT_PLTGOT and DT_JMPREL are required dynamic tags. 1. Add _bfd_elf_add_dynamic_tags to add common dynamic tags. 2. Add _bfd_elf_maybe_vxworks_add_dynamic_tags to add common VxWorks dynamic tags. * elf-bfd.h (elf_link_hash_table): Add dt_pltgot_required and dt_jmprel_required. (_bfd_elf_add_dynamic_tags): New. * elf-m10300.c (_bfd_mn10300_elf_size_dynamic_sections): Call _bfd_elf_add_dynamic_tags. * elf32-arc.c (elf_arc_size_dynamic_sections): Likewise. * elf32-bfin.c (elf32_bfinfdpic_size_dynamic_sections): Likewise. * elf32-cr16.c (_bfd_cr16_elf_size_dynamic_sections): Likewise. * elf32-frv.c (elf32_frvfdpic_size_dynamic_sections): Likewise. * elf32-lm32.c (lm32_elf_size_dynamic_sections): Likewise. * elf32-m32r.c (m32r_elf_size_dynamic_sections): Likewise. * elf32-m68k.c (elf_m68k_size_dynamic_sections): Likewise. * elf32-microblaze.c (microblaze_elf_size_dynamic_sections): Likewise. * elf32-nds32.c (nds32_elf_size_dynamic_sections): Likewise. * elf32-nios2.c (nios2_elf32_size_dynamic_sections): Likewise. * elf32-or1k.c (or1k_elf_size_dynamic_sections): Likewise. * elf32-s390.c (elf_s390_size_dynamic_sections): Likewise. * elf32-tilepro.c (tilepro_elf_size_dynamic_sections): Likewise. * elf32-vax.c (elf_vax_size_dynamic_sections): Likewise. * elf64-alpha.c (elf64_alpha_size_dynamic_sections): Likewise. * elf64-s390.c (elf_s390_size_dynamic_sections): Likewise. * elfnn-aarch64.c (elfNN_aarch64_size_dynamic_sections): Likewise. * elfnn-riscv.c (riscv_elf_size_dynamic_sections): Likewise. * elfxx-tilegx.c (tilegx_elf_size_dynamic_sections): Likewise. * elf32-arm.c (elf32_arm_size_dynamic_sections): Call _bfd_elf_maybe_vxworks_add_dynamic_tags. * elf32-ppc.c (ppc_elf_size_dynamic_sections): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_size_dynamic_sections): Likewise. * elfxx-x86.c (_bfd_x86_elf_link_hash_table_create): Likewise. (_bfd_x86_elf_size_dynamic_sections): Likewise. * elfxx-x86.h (elf_x86_link_hash_table): Remove dt_reloc, dt_reloc_sz and dt_reloc_ent. * elf-vxworks.c (_bfd_elf_maybe_vxworks_add_dynamic_tags): New. * elf-vxworks.h (_bfd_elf_maybe_vxworks_add_dynamic_tags): Likewise. * elf32-hppa.c (elf32_hppa_link_hash_table_create): Set etab.dt_pltgot_required. (elf32_hppa_size_dynamic_sections): Call _bfd_elf_add_dynamic_tags. * elf32-metag.c (elf_metag_link_hash_table_create): Set etab.dt_pltgot_required. (elf_metag_size_dynamic_sections): Call _bfd_elf_add_dynamic_tags. * elf32-sh.c (sh_elf_link_hash_table_create): Set root.dt_pltgot_required for FDPIC output. (sh_elf_size_dynamic_sections): Call _bfd_elf_maybe_vxworks_add_dynamic_tags. * elf32-xtensa.c (elf_xtensa_link_hash_table_create): Set elf.dt_pltgot_required. (elf_xtensa_size_dynamic_sections): Call _bfd_elf_add_dynamic_tags. * elf64-hppa.c (elf64_hppa_hash_table_create): Set root.dt_pltgot_required. (elf64_hppa_size_dynamic_sections): Call _bfd_elf_add_dynamic_tags. * elfnn-ia64.c (elfNN_ia64_hash_table_create): Set root.dt_pltgot_required. (elfNN_ia64_size_dynamic_sections): Set root.dt_jmprel_required for rel_pltoff_sec. Call _bfd_elf_add_dynamic_tags. * elflink.c (_bfd_elf_add_dynamic_tags): New.
2020-06-23 14:07:31 +02:00
if (!_bfd_elf_add_dynamic_tags (output_bfd, info, relocs))
return FALSE;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
if (htab->root.splt->size != 0)
{
aarch64: handle STO_AARCH64_VARIANT_PCS in bfd Propagate STO_AARCH64_VARIANT_PCS st_other attribute to the output and add DT_AARCH64_VARIANT_PCS dynamic tag if necessary. Mismatching attributes are not diagnosed. bfd/ChangeLog: * elfnn-aarch64.c (elfNN_aarch64_merge_symbol_attribute): New function. (struct elf_aarch64_link_hash_table): Add variant_pcs member. (elfNN_aarch64_allocate_dynrelocs): Update variant_pcs. (elfNN_aarch64_size_dynamic_sections): Add DT_AARCH64_VARIANT_PCS. (elf_backend_merge_symbol_attribute): Define. ld/ChangeLog: * testsuite/ld-aarch64/aarch64-elf.exp: Add new tests. * testsuite/ld-aarch64/variant_pcs-1.s: New asm for tests. * testsuite/ld-aarch64/variant_pcs-2.s: New asm for tests. * testsuite/ld-aarch64/variant_pcs-now.d: New test. * testsuite/ld-aarch64/variant_pcs-r.d: New test. * testsuite/ld-aarch64/variant_pcs-shared.d: New test. * testsuite/ld-aarch64/variant_pcs.ld: New linker script for tests.
2019-04-25 16:07:14 +02:00
if (htab->variant_pcs
&& !add_dynamic_entry (DT_AARCH64_VARIANT_PCS, 0))
return FALSE;
[BFD, LD, AArch64, 3/3] Add --pac-plt to enable PLTs protected with PAC. This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds new definitions of PAC enabled PLTs and both BTI and PAC enabled PLTs. 2) It also defines the new dynamic tag DT_AARCH64_PAC_PLT for the PAC enabled PLTs. 3) This patch adds a new ld command line option: --pac-plt. In the presence of this option, the linker uses the PAC enabled PLTs and marks with DT_AARCH64_PAC_PLT. 4) In case both BTI and PAC are enabled the linker should pick PLTs enabled with both and also use dynamic tags for both. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * elfnn-aarch64.c (PLT_PAC_ENTRY_SIZE, PLT_PAC_SMALL_ENTRY_SIZE): New. (PLT_BTI_PAC_ENTRY_SIZE, PLT_BTI_PAC_SMALL_ENTRY_SIZE): New. (setup_plt_values): Account for PAC or PAC and BTI enabled PLTs. (elfNN_aarch64_size_dynamic_sections): Add checks for PLT_BTI_PAC and PLT_PAC_PLT. (elfNN_aarch64_finish_dynamic_sections): Account for PLT_BTI_PAC. (get_plt_type): Add case for DT_AARCH64_PAC_PLT. (elfNN_aarch64_plt_sym_val): Add cases for PLT_BTI_PAC and PLT_PAC. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * readelf.c (get_aarch64_dynamic_type): Add case for DT_AARCH64_PAC_PLT. (dynamic_section_aarch64_val): Likewise. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * elf/aarch64.h (DT_AARCH64_PAC_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * NEWS: Document --pac-plt. * emultempl/aarch64elf.em (OPTION_PAC_PLT): New. (PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS): Add pac-plt. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_PAC_PLT. * testsuite/ld-aarch64/aarch64-elf.exp: Add the following tests. * testsuite/ld-aarch64/bti-pac-plt-1.d: New test. * testsuite/ld-aarch64/bti-pac-plt-2.d: New test. * testsuite/ld-aarch64/pac-plt-1.d: New test. * testsuite/ld-aarch64/pac-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: Add .ifndef directive.
2019-03-13 12:09:10 +01:00
if ((elf_aarch64_tdata (output_bfd)->plt_type == PLT_BTI_PAC)
&& (!add_dynamic_entry (DT_AARCH64_BTI_PLT, 0)
|| !add_dynamic_entry (DT_AARCH64_PAC_PLT, 0)))
return FALSE;
else if ((elf_aarch64_tdata (output_bfd)->plt_type == PLT_BTI)
&& !add_dynamic_entry (DT_AARCH64_BTI_PLT, 0))
return FALSE;
else if ((elf_aarch64_tdata (output_bfd)->plt_type == PLT_PAC)
&& !add_dynamic_entry (DT_AARCH64_PAC_PLT, 0))
[BFD, LD, AArch64, 2/3] Add --force-bti to enable BTI and to select BTI enabled PLTs This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds a new ld command line option: --force-bti. In the presence of this option, the linker enables BTI with the GNU_PROPERTY_AARCH64_FEATURE_1_BTI feature. This gives out warning in case of missing gnu notes for BTI in inputs. 2) It also defines a new set of BTI enabled PLTs. These are used either when all the inputs are marked with GNU_PROPERTY_AARCH64_FEATURE_1_BTI or when the new --force-bti option is used. This required adding new fields in elf_aarch64_link_hash_table so that we could make the PLT related information more generic. 3) It also defines a dynamic tag DT_AARCH64_BTI_PLT. The linker uses this whenever it picks BTI enabled PLTs. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * bfd-in.h (aarch64_plt_type, aarch64_enable_bti_type): New. (aarch64_bti_pac_info): New. (bfd_elf64_aarch64_set_options): Add aarch64_bti_pac_info argument. (bfd_elf32_aarch64_set_options): Likewise. * bfd-in2.h: Regenerate * elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): New. (PLT_BTI_SMALL_ENTRY_SIZE, PLT_BTI_TLSDESC_ENTRY_SIZE): New. (elfNN_aarch64_small_plt0_bti_entry): New. (elfNN_aarch64_small_plt_bti_entry): New. (elfNN_aarch64_tlsdesc_small_plt_bti_entry): New. (elf_aarch64_obj_tdata): Add no_bti_warn and plt_type fields. (elf_aarch64_link_hash_table): Add plt0_entry, plt_entry and tlsdesc_plt_entry_size fields. (elfNN_aarch64_link_hash_table_create): Initialise the new fields. (setup_plt_values): New helper function. (bfd_elfNN_aarch64_set_options): Use new bp_info to set plt sizes and bti enable type. (elfNN_aarch64_allocate_dynrelocs): Use new size members instead of fixed macros. (elfNN_aarch64_size_dynamic_sections): Likewise and add checks. (elfNN_aarch64_create_small_pltn_entry): Use new generic pointers to plt stubs instead of fixed ones and update filling them according to the need for bti. (elfNN_aarch64_init_small_plt0_entry): Likewise. (elfNN_aarch64_finish_dynamic_sections): Likewise. (get_plt_type, elfNN_aarch64_get_synthetic_symtab): New. (elfNN_aarch64_plt_sym_val): Update size accordingly. (elfNN_aarch64_link_setup_gnu_properties): Set up plts if BTI GNU NOTE is set. (bfd_elfNN_get_synthetic_symtab): Define. (elfNN_aarch64_merge_gnu_properties): Give out warning with --force-bti and mising BTI NOTE SECTION. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * readelf.c (get_aarch64_dynamic_type): New. (get_dynamic_type): Use above for EM_AARCH64. (dynamic_section_aarch64_val): New. (process_dynamic_section): Use above for EM_AARCH64. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * elf/aarch64.h (DT_AARCH64_BTI_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * NEWS: Document --force-bti. * emultempl/aarch64elf.em (plt_type, bti_type, OPTION_FORCE_BTI): New. (PARSE_AND_LIST_SHORTOPTS, PARSE_AND_LIST_OPTIONS): Add force-bti. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FORCE_BTI. * testsuite/ld-aarch64/aarch64-elf.exp: Add all the tests below. * testsuite/ld-aarch64/bti-plt-1.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: New test. * testsuite/ld-aarch64/bti-plt-2.s: New test. * testsuite/ld-aarch64/bti-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-3.d: New test. * testsuite/ld-aarch64/bti-plt-4.d: New test. * testsuite/ld-aarch64/bti-plt-5.d: New test. * testsuite/ld-aarch64/bti-plt-6.d: New test. * testsuite/ld-aarch64/bti-plt-7.d: New test. * testsuite/ld-aarch64/bti-plt-so.s: New test. * testsuite/ld-aarch64/bti-plt.ld: New test.
2019-03-13 11:54:30 +01:00
return FALSE;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
}
}
#undef add_dynamic_entry
return TRUE;
}
static inline void
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
elf_aarch64_update_plt_entry (bfd *output_bfd,
bfd_reloc_code_real_type r_type,
bfd_byte *plt_entry, bfd_vma value)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
reloc_howto_type *howto = elfNN_aarch64_howto_from_bfd_reloc (r_type);
Force the AArch64 linker backend to refuse to link when it encounters unresoleable relocations. * reloc.c (enum bfd_reloc_status): Start values at 2. * bfd-in2.h: Regenerate. * elfnn-aarch64.c (aarch64_relocate): Invert sense of function, so that a TRUE return indicates success. Compare the result of calling _bfd_aarch64_elf_put_addend against bfd_reloc_ok. (build_one_stub): Change sense of tests against aarch64_relocate return value. (elfNN_aarch64_tls_relax): Return bfd_reloc_notsupported, rather than FALSE, when an error is detected. (elfNN_aarch64_final_link_relocate): Likewise. * testsuite/ld-aarch64/pcrel_pic_defined.d: Expect errors not warnings. Expect errors about unsupported relocations. * testsuite/ld-aarch64/pcrel_pic_undefined.d: Likewise.
2017-10-12 14:38:20 +02:00
/* FIXME: We should check the return value from this function call. */
(void) _bfd_aarch64_elf_put_addend (output_bfd, plt_entry, r_type, howto, value);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
}
static void
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_create_small_pltn_entry (struct elf_link_hash_entry *h,
struct elf_aarch64_link_hash_table
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
*htab, bfd *output_bfd,
struct bfd_link_info *info)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
bfd_byte *plt_entry;
bfd_vma plt_index;
bfd_vma got_offset;
bfd_vma gotplt_entry_address;
bfd_vma plt_entry_address;
Elf_Internal_Rela rela;
bfd_byte *loc;
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
asection *plt, *gotplt, *relplt;
/* When building a static executable, use .iplt, .igot.plt and
.rela.iplt sections for STT_GNU_IFUNC symbols. */
if (htab->root.splt != NULL)
{
plt = htab->root.splt;
gotplt = htab->root.sgotplt;
relplt = htab->root.srelplt;
}
else
{
plt = htab->root.iplt;
gotplt = htab->root.igotplt;
relplt = htab->root.irelplt;
}
/* Get the index in the procedure linkage table which
corresponds to this symbol. This is the index of this symbol
in all the symbols for which we are making plt entries. The
first entry in the procedure linkage table is reserved.
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
Get the offset into the .got table of the entry that
corresponds to this function. Each .got entry is GOT_ENTRY_SIZE
bytes. The first three are reserved for the dynamic linker.
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-06-07 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elf64-aarch64.c: Include objalloc.h. (elf64_aarch64_howto_dynrelocs): Add R_AARCH64_IRELATIVE howto. (struct elf64_aarch64_link_hash_table): Add members for handling R_AARCH64_IRELATIVE relocations. (elf_aarch64_local_htab_hash): New function. (elf_aarch64_local_htab_eq): New function. (elf_aarch64_get_local_sym_hash): New function. (elf64_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elf64_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elf64_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elf64_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elf64_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elf64_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elf64_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elf64_aarch64_is_function_type): Remove function. (elf64_aarch64_allocate_dynrelocs): Call _bfd_elf_allocate_ifunc_dyn_relocs for STT_GNU_IFUNC symbols. (elf_aarch64_allocate_local_dynrelocs): New function. (elf64_aarch64_size_dynamic_sections): Call elf_aarch64_allocate_local_dynrelocs. Initialize next_irelative_index. (elf64_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elf64_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elf_aarch64_finish_local_dynamic_symbol): New function. (elf64_aarch64_finish_dynamic_sections): Call elf_aarch64_finish_local_dynamic_symbol. (elf64_aarch64_add_symbol_hook): New function. include/elf/ChangeLog: 2013-06-07 Will Newton <will.newton@linaro.org> * aarch64.h: Add R_AARCH64_IRELATIVE reloc. ld/ChangeLog: 2013-06-07 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. ld/testsuite/ChangeLog: 2013-06-07 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Add ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-06-07 20:57:03 +02:00
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
For static executables, we don't reserve anything. */
if (plt == htab->root.splt)
{
plt_index = (h->plt.offset - htab->plt_header_size) / htab->plt_entry_size;
got_offset = (plt_index + 3) * GOT_ENTRY_SIZE;
}
else
{
plt_index = h->plt.offset / htab->plt_entry_size;
got_offset = plt_index * GOT_ENTRY_SIZE;
}
plt_entry = plt->contents + h->plt.offset;
plt_entry_address = plt->output_section->vma
2014-01-14 Michael Hudson-Doyle <michael.hudson@linaro.org> Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org> bfd/ * elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Use correct offset while calculating relocation address. (elfNN_aarch64_create_small_pltn_entry): Likewise. (elfNN_aarch64_init_small_plt0_entry): Likewise.
2014-01-14 15:53:50 +01:00
+ plt->output_offset + h->plt.offset;
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
gotplt_entry_address = gotplt->output_section->vma +
gotplt->output_offset + got_offset;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* Copy in the boiler-plate for the PLTn entry. */
[BFD, LD, AArch64, 2/3] Add --force-bti to enable BTI and to select BTI enabled PLTs This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds a new ld command line option: --force-bti. In the presence of this option, the linker enables BTI with the GNU_PROPERTY_AARCH64_FEATURE_1_BTI feature. This gives out warning in case of missing gnu notes for BTI in inputs. 2) It also defines a new set of BTI enabled PLTs. These are used either when all the inputs are marked with GNU_PROPERTY_AARCH64_FEATURE_1_BTI or when the new --force-bti option is used. This required adding new fields in elf_aarch64_link_hash_table so that we could make the PLT related information more generic. 3) It also defines a dynamic tag DT_AARCH64_BTI_PLT. The linker uses this whenever it picks BTI enabled PLTs. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * bfd-in.h (aarch64_plt_type, aarch64_enable_bti_type): New. (aarch64_bti_pac_info): New. (bfd_elf64_aarch64_set_options): Add aarch64_bti_pac_info argument. (bfd_elf32_aarch64_set_options): Likewise. * bfd-in2.h: Regenerate * elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): New. (PLT_BTI_SMALL_ENTRY_SIZE, PLT_BTI_TLSDESC_ENTRY_SIZE): New. (elfNN_aarch64_small_plt0_bti_entry): New. (elfNN_aarch64_small_plt_bti_entry): New. (elfNN_aarch64_tlsdesc_small_plt_bti_entry): New. (elf_aarch64_obj_tdata): Add no_bti_warn and plt_type fields. (elf_aarch64_link_hash_table): Add plt0_entry, plt_entry and tlsdesc_plt_entry_size fields. (elfNN_aarch64_link_hash_table_create): Initialise the new fields. (setup_plt_values): New helper function. (bfd_elfNN_aarch64_set_options): Use new bp_info to set plt sizes and bti enable type. (elfNN_aarch64_allocate_dynrelocs): Use new size members instead of fixed macros. (elfNN_aarch64_size_dynamic_sections): Likewise and add checks. (elfNN_aarch64_create_small_pltn_entry): Use new generic pointers to plt stubs instead of fixed ones and update filling them according to the need for bti. (elfNN_aarch64_init_small_plt0_entry): Likewise. (elfNN_aarch64_finish_dynamic_sections): Likewise. (get_plt_type, elfNN_aarch64_get_synthetic_symtab): New. (elfNN_aarch64_plt_sym_val): Update size accordingly. (elfNN_aarch64_link_setup_gnu_properties): Set up plts if BTI GNU NOTE is set. (bfd_elfNN_get_synthetic_symtab): Define. (elfNN_aarch64_merge_gnu_properties): Give out warning with --force-bti and mising BTI NOTE SECTION. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * readelf.c (get_aarch64_dynamic_type): New. (get_dynamic_type): Use above for EM_AARCH64. (dynamic_section_aarch64_val): New. (process_dynamic_section): Use above for EM_AARCH64. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * elf/aarch64.h (DT_AARCH64_BTI_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * NEWS: Document --force-bti. * emultempl/aarch64elf.em (plt_type, bti_type, OPTION_FORCE_BTI): New. (PARSE_AND_LIST_SHORTOPTS, PARSE_AND_LIST_OPTIONS): Add force-bti. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FORCE_BTI. * testsuite/ld-aarch64/aarch64-elf.exp: Add all the tests below. * testsuite/ld-aarch64/bti-plt-1.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: New test. * testsuite/ld-aarch64/bti-plt-2.s: New test. * testsuite/ld-aarch64/bti-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-3.d: New test. * testsuite/ld-aarch64/bti-plt-4.d: New test. * testsuite/ld-aarch64/bti-plt-5.d: New test. * testsuite/ld-aarch64/bti-plt-6.d: New test. * testsuite/ld-aarch64/bti-plt-7.d: New test. * testsuite/ld-aarch64/bti-plt-so.s: New test. * testsuite/ld-aarch64/bti-plt.ld: New test.
2019-03-13 11:54:30 +01:00
memcpy (plt_entry, htab->plt_entry, htab->plt_entry_size);
/* First instruction in BTI enabled PLT stub is a BTI
instruction so skip it. */
if (elf_aarch64_tdata (output_bfd)->plt_type & PLT_BTI
&& elf_elfheader (output_bfd)->e_type == ET_EXEC)
plt_entry = plt_entry + 4;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* Fill in the top 21 bits for this: ADRP x16, PLT_GOT + n * 8.
ADRP: ((PG(S+A)-PG(P)) >> 12) & 0x1fffff */
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
elf_aarch64_update_plt_entry (output_bfd, BFD_RELOC_AARCH64_ADR_HI21_PCREL,
plt_entry,
PG (gotplt_entry_address) -
PG (plt_entry_address));
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* Fill in the lo12 bits for the load from the pltgot. */
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
elf_aarch64_update_plt_entry (output_bfd, BFD_RELOC_AARCH64_LDSTNN_LO12,
plt_entry + 4,
PG_OFFSET (gotplt_entry_address));
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
PR binutils/15834 Fix typos: --- bfd/bfdio.c | 2 +- bfd/elf32-spu.c | 2 +- bfd/elfnn-aarch64.c | 2 +- binutils/od-xcoff.c | 2 +- config/tcl.m4 | 2 +- gas/config/tc-ia64.c | 2 +- gas/config/tc-sparc.c | 2 +- gas/config/tc-z80.c | 12 ++++++------ gas/doc/c-i386.texi | 6 +++--- gas/doc/c-m32r.texi | 2 +- gas/testsuite/gas/d10v/instruction_packing.d | 2 +- gas/testsuite/gas/z80/atend.d | 2 +- gold/object.h | 2 +- include/gdb/remote-sim.h | 2 +- include/opcode/ChangeLog | 2 +- include/opcode/i960.h | 2 +- ld/testsuite/ld-mips-elf/mips16-pic-1.inc | 2 +- opcodes/aarch64-asm.c | 2 +- opcodes/aarch64-dis.c | 2 +- opcodes/msp430-dis.c | 2 +-
2013-08-23 09:54:19 +02:00
/* Fill in the lo12 bits for the add from the pltgot entry. */
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
elf_aarch64_update_plt_entry (output_bfd, BFD_RELOC_AARCH64_ADD_LO12,
plt_entry + 8,
PG_OFFSET (gotplt_entry_address));
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* All the GOTPLT Entries are essentially initialized to PLT0. */
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
bfd_put_NN (output_bfd,
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
plt->output_section->vma + plt->output_offset,
gotplt->contents + got_offset);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
rela.r_offset = gotplt_entry_address;
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
if (h->dynindx == -1
Add output_type to bfd_link_info The "shared" field in bfd_link_info is set for both DSO and and PIE. There are separate fields for executable and relocatable outputs. This patch adds an "output_type" field: enum output_type { type_unknown = 0, type_executable, type_dll, type_relocatable }; and a "pic" field to bfd_link_info to replace shared, executable and relocatable fields so that we can use the "output_type" field to check for output type and the "pic" field check if output is PIC. Macros, bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie, are provided to check for output features. bfd/ * bfd/aoutx.h: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * bfd/bout.c: Likewise. * bfd/coff-alpha.c: Likewise. * bfd/coff-arm.c: Likewise. * bfd/coff-i386.c: Likewise. * bfd/coff-i960.c: Likewise. * bfd/coff-m68k.c: Likewise. * bfd/coff-mcore.c: Likewise. * bfd/coff-mips.c: Likewise. * bfd/coff-ppc.c: Likewise. * bfd/coff-rs6000.c: Likewise. * bfd/coff-sh.c: Likewise. * bfd/coff-tic80.c: Likewise. * bfd/coff-x86_64.c: Likewise. * bfd/coff64-rs6000.c: Likewise. * bfd/coffgen.c: Likewise. * bfd/cofflink.c: Likewise. * bfd/ecoff.c: Likewise. * bfd/ecofflink.c: Likewise. * bfd/elf-bfd.h: Likewise. * bfd/elf-eh-frame.c: Likewise. * bfd/elf-ifunc.c: Likewise. * bfd/elf-m10200.c: Likewise. * bfd/elf-m10300.c: Likewise. * bfd/elf-s390-common.c: Likewise. * bfd/elf-vxworks.c: Likewise. * bfd/elf.c: Likewise. * bfd/elf32-arm.c: Likewise. * bfd/elf32-avr.c: Likewise. * bfd/elf32-bfin.c: Likewise. * bfd/elf32-cr16.c: Likewise. * bfd/elf32-cr16c.c: Likewise. * bfd/elf32-cris.c: Likewise. * bfd/elf32-crx.c: Likewise. * bfd/elf32-d10v.c: Likewise. * bfd/elf32-dlx.c: Likewise. * bfd/elf32-epiphany.c: Likewise. * bfd/elf32-fr30.c: Likewise. * bfd/elf32-frv.c: Likewise. * bfd/elf32-ft32.c: Likewise. * bfd/elf32-h8300.c: Likewise. * bfd/elf32-hppa.c: Likewise. * bfd/elf32-i370.c: Likewise. * bfd/elf32-i386.c: Likewise. * bfd/elf32-i860.c: Likewise. * bfd/elf32-ip2k.c: Likewise. * bfd/elf32-iq2000.c: Likewise. * bfd/elf32-lm32.c: Likewise. * bfd/elf32-m32c.c: Likewise. * bfd/elf32-m32r.c: Likewise. * bfd/elf32-m68hc11.c: Likewise. * bfd/elf32-m68hc1x.c: Likewise. * bfd/elf32-m68k.c: Likewise. * bfd/elf32-mcore.c: Likewise. * bfd/elf32-mep.c: Likewise. * bfd/elf32-metag.c: Likewise. * bfd/elf32-microblaze.c: Likewise. * bfd/elf32-moxie.c: Likewise. * bfd/elf32-msp430.c: Likewise. * bfd/elf32-mt.c: Likewise. * bfd/elf32-nds32.c: Likewise. * bfd/elf32-nios2.c: Likewise. * bfd/elf32-or1k.c: Likewise. * bfd/elf32-ppc.c: Likewise. * bfd/elf32-rl78.c: Likewise. * bfd/elf32-rx.c: Likewise. * bfd/elf32-s390.c: Likewise. * bfd/elf32-score.c: Likewise. * bfd/elf32-score7.c: Likewise. * bfd/elf32-sh-symbian.c: Likewise. * bfd/elf32-sh.c: Likewise. * bfd/elf32-sh64.c: Likewise. * bfd/elf32-spu.c: Likewise. * bfd/elf32-tic6x.c: Likewise. * bfd/elf32-tilepro.c: Likewise. * bfd/elf32-v850.c: Likewise. * bfd/elf32-vax.c: Likewise. * bfd/elf32-visium.c: Likewise. * bfd/elf32-xc16x.c: Likewise. * bfd/elf32-xstormy16.c: Likewise. * bfd/elf32-xtensa.c: Likewise. * bfd/elf64-alpha.c: Likewise. * bfd/elf64-hppa.c: Likewise. * bfd/elf64-ia64-vms.c: Likewise. * bfd/elf64-mmix.c: Likewise. * bfd/elf64-ppc.c: Likewise. * bfd/elf64-s390.c: Likewise. * bfd/elf64-sh64.c: Likewise. * bfd/elf64-x86-64.c: Likewise. * bfd/elflink.c: Likewise. * bfd/elfnn-aarch64.c: Likewise. * bfd/elfnn-ia64.c: Likewise. * bfd/elfxx-mips.c: Likewise. * bfd/elfxx-sparc.c: Likewise. * bfd/elfxx-tilegx.c: Likewise. * bfd/i386linux.c: Likewise. * bfd/linker.c: Likewise. * bfd/m68klinux.c: Likewise. * bfd/pdp11.c: Likewise. * bfd/pe-mips.c: Likewise. * bfd/peXXigen.c: Likewise. * bfd/reloc.c: Likewise. * bfd/reloc16.c: Likewise. * bfd/sparclinux.c: Likewise. * bfd/sunos.c: Likewise. * bfd/vms-alpha.c: Likewise. * bfd/xcofflink.c: Likewise. include/ * include/bfdlink.h (output_type): New enum. (bfd_link_executable): New macro. (bfd_link_dll): Likewise. (bfd_link_relocatable): Likewise. (bfd_link_pic): Likewise. (bfd_link_pie): Likewise. (bfd_link_info): Remove shared, executable, pie and relocatable. Add output_type and pic. ld/ * ld/ldctor.c: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * ld/ldemul.c: Likewise. * ld/ldfile.c: Likewise. * ld/ldlang.c: Likewise. * ld/ldmain.c: Likewise. * ld/ldwrite.c: Likewise. * ld/lexsup.c: Likewise. * ld/pe-dll.c: Likewise. * ld/plugin.c: Likewise. * ld/emultempl/aarch64elf.em: Likewise. * ld/emultempl/aix.em: Likewise. * ld/emultempl/alphaelf.em: Likewise. * ld/emultempl/armcoff.em: Likewise. * ld/emultempl/armelf.em: Likewise. * ld/emultempl/avrelf.em: Likewise. * ld/emultempl/beos.em: Likewise. * ld/emultempl/cr16elf.em: Likewise. * ld/emultempl/elf-generic.em: Likewise. * ld/emultempl/elf32.em: Likewise. * ld/emultempl/genelf.em: Likewise. * ld/emultempl/generic.em: Likewise. * ld/emultempl/gld960.em: Likewise. * ld/emultempl/gld960c.em: Likewise. * ld/emultempl/hppaelf.em: Likewise. * ld/emultempl/irix.em: Likewise. * ld/emultempl/linux.em: Likewise. * ld/emultempl/lnk960.em: Likewise. * ld/emultempl/m68hc1xelf.em: Likewise. * ld/emultempl/m68kcoff.em: Likewise. * ld/emultempl/m68kelf.em: Likewise. * ld/emultempl/metagelf.em: Likewise. * ld/emultempl/mipself.em: Likewise. * ld/emultempl/mmo.em: Likewise. * ld/emultempl/msp430.em: Likewise. * ld/emultempl/nds32elf.em: Likewise. * ld/emultempl/needrelax.em: Likewise. * ld/emultempl/nios2elf.em: Likewise. * ld/emultempl/pe.em: Likewise. * ld/emultempl/pep.em: Likewise. * ld/emultempl/ppc32elf.em: Likewise. * ld/emultempl/ppc64elf.em: Likewise. * ld/emultempl/sh64elf.em: Likewise. * ld/emultempl/solaris2.em: Likewise. * ld/emultempl/spuelf.em: Likewise. * ld/emultempl/sunos.em: Likewise. * ld/emultempl/tic6xdsbt.em: Likewise. * ld/emultempl/ticoff.em: Likewise. * ld/emultempl/v850elf.em: Likewise. * ld/emultempl/vms.em: Likewise. * ld/emultempl/vxworks.em: Likewise.
2015-08-18 14:51:03 +02:00
|| ((bfd_link_executable (info)
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
|| ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
&& h->def_regular
&& h->type == STT_GNU_IFUNC))
{
/* If an STT_GNU_IFUNC symbol is locally defined, generate
R_AARCH64_IRELATIVE instead of R_AARCH64_JUMP_SLOT. */
rela.r_info = ELFNN_R_INFO (0, AARCH64_R (IRELATIVE));
rela.r_addend = (h->root.u.def.value
+ h->root.u.def.section->output_section->vma
+ h->root.u.def.section->output_offset);
}
else
{
/* Fill in the entry in the .rela.plt section. */
rela.r_info = ELFNN_R_INFO (h->dynindx, AARCH64_R (JUMP_SLOT));
rela.r_addend = 0;
}
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* Compute the relocation entry to used based on PLT index and do
not adjust reloc_count. The reloc_count has already been adjusted
to account for this entry. */
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
loc = relplt->contents + plt_index * RELOC_SIZE (htab);
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
bfd_elfNN_swap_reloca_out (output_bfd, &rela, loc);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
}
/* Size sections even though they're not dynamic. We use it to setup
_TLS_MODULE_BASE_, if needed. */
static bfd_boolean
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_always_size_sections (bfd *output_bfd,
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
struct bfd_link_info *info)
{
asection *tls_sec;
Add output_type to bfd_link_info The "shared" field in bfd_link_info is set for both DSO and and PIE. There are separate fields for executable and relocatable outputs. This patch adds an "output_type" field: enum output_type { type_unknown = 0, type_executable, type_dll, type_relocatable }; and a "pic" field to bfd_link_info to replace shared, executable and relocatable fields so that we can use the "output_type" field to check for output type and the "pic" field check if output is PIC. Macros, bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie, are provided to check for output features. bfd/ * bfd/aoutx.h: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * bfd/bout.c: Likewise. * bfd/coff-alpha.c: Likewise. * bfd/coff-arm.c: Likewise. * bfd/coff-i386.c: Likewise. * bfd/coff-i960.c: Likewise. * bfd/coff-m68k.c: Likewise. * bfd/coff-mcore.c: Likewise. * bfd/coff-mips.c: Likewise. * bfd/coff-ppc.c: Likewise. * bfd/coff-rs6000.c: Likewise. * bfd/coff-sh.c: Likewise. * bfd/coff-tic80.c: Likewise. * bfd/coff-x86_64.c: Likewise. * bfd/coff64-rs6000.c: Likewise. * bfd/coffgen.c: Likewise. * bfd/cofflink.c: Likewise. * bfd/ecoff.c: Likewise. * bfd/ecofflink.c: Likewise. * bfd/elf-bfd.h: Likewise. * bfd/elf-eh-frame.c: Likewise. * bfd/elf-ifunc.c: Likewise. * bfd/elf-m10200.c: Likewise. * bfd/elf-m10300.c: Likewise. * bfd/elf-s390-common.c: Likewise. * bfd/elf-vxworks.c: Likewise. * bfd/elf.c: Likewise. * bfd/elf32-arm.c: Likewise. * bfd/elf32-avr.c: Likewise. * bfd/elf32-bfin.c: Likewise. * bfd/elf32-cr16.c: Likewise. * bfd/elf32-cr16c.c: Likewise. * bfd/elf32-cris.c: Likewise. * bfd/elf32-crx.c: Likewise. * bfd/elf32-d10v.c: Likewise. * bfd/elf32-dlx.c: Likewise. * bfd/elf32-epiphany.c: Likewise. * bfd/elf32-fr30.c: Likewise. * bfd/elf32-frv.c: Likewise. * bfd/elf32-ft32.c: Likewise. * bfd/elf32-h8300.c: Likewise. * bfd/elf32-hppa.c: Likewise. * bfd/elf32-i370.c: Likewise. * bfd/elf32-i386.c: Likewise. * bfd/elf32-i860.c: Likewise. * bfd/elf32-ip2k.c: Likewise. * bfd/elf32-iq2000.c: Likewise. * bfd/elf32-lm32.c: Likewise. * bfd/elf32-m32c.c: Likewise. * bfd/elf32-m32r.c: Likewise. * bfd/elf32-m68hc11.c: Likewise. * bfd/elf32-m68hc1x.c: Likewise. * bfd/elf32-m68k.c: Likewise. * bfd/elf32-mcore.c: Likewise. * bfd/elf32-mep.c: Likewise. * bfd/elf32-metag.c: Likewise. * bfd/elf32-microblaze.c: Likewise. * bfd/elf32-moxie.c: Likewise. * bfd/elf32-msp430.c: Likewise. * bfd/elf32-mt.c: Likewise. * bfd/elf32-nds32.c: Likewise. * bfd/elf32-nios2.c: Likewise. * bfd/elf32-or1k.c: Likewise. * bfd/elf32-ppc.c: Likewise. * bfd/elf32-rl78.c: Likewise. * bfd/elf32-rx.c: Likewise. * bfd/elf32-s390.c: Likewise. * bfd/elf32-score.c: Likewise. * bfd/elf32-score7.c: Likewise. * bfd/elf32-sh-symbian.c: Likewise. * bfd/elf32-sh.c: Likewise. * bfd/elf32-sh64.c: Likewise. * bfd/elf32-spu.c: Likewise. * bfd/elf32-tic6x.c: Likewise. * bfd/elf32-tilepro.c: Likewise. * bfd/elf32-v850.c: Likewise. * bfd/elf32-vax.c: Likewise. * bfd/elf32-visium.c: Likewise. * bfd/elf32-xc16x.c: Likewise. * bfd/elf32-xstormy16.c: Likewise. * bfd/elf32-xtensa.c: Likewise. * bfd/elf64-alpha.c: Likewise. * bfd/elf64-hppa.c: Likewise. * bfd/elf64-ia64-vms.c: Likewise. * bfd/elf64-mmix.c: Likewise. * bfd/elf64-ppc.c: Likewise. * bfd/elf64-s390.c: Likewise. * bfd/elf64-sh64.c: Likewise. * bfd/elf64-x86-64.c: Likewise. * bfd/elflink.c: Likewise. * bfd/elfnn-aarch64.c: Likewise. * bfd/elfnn-ia64.c: Likewise. * bfd/elfxx-mips.c: Likewise. * bfd/elfxx-sparc.c: Likewise. * bfd/elfxx-tilegx.c: Likewise. * bfd/i386linux.c: Likewise. * bfd/linker.c: Likewise. * bfd/m68klinux.c: Likewise. * bfd/pdp11.c: Likewise. * bfd/pe-mips.c: Likewise. * bfd/peXXigen.c: Likewise. * bfd/reloc.c: Likewise. * bfd/reloc16.c: Likewise. * bfd/sparclinux.c: Likewise. * bfd/sunos.c: Likewise. * bfd/vms-alpha.c: Likewise. * bfd/xcofflink.c: Likewise. include/ * include/bfdlink.h (output_type): New enum. (bfd_link_executable): New macro. (bfd_link_dll): Likewise. (bfd_link_relocatable): Likewise. (bfd_link_pic): Likewise. (bfd_link_pie): Likewise. (bfd_link_info): Remove shared, executable, pie and relocatable. Add output_type and pic. ld/ * ld/ldctor.c: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * ld/ldemul.c: Likewise. * ld/ldfile.c: Likewise. * ld/ldlang.c: Likewise. * ld/ldmain.c: Likewise. * ld/ldwrite.c: Likewise. * ld/lexsup.c: Likewise. * ld/pe-dll.c: Likewise. * ld/plugin.c: Likewise. * ld/emultempl/aarch64elf.em: Likewise. * ld/emultempl/aix.em: Likewise. * ld/emultempl/alphaelf.em: Likewise. * ld/emultempl/armcoff.em: Likewise. * ld/emultempl/armelf.em: Likewise. * ld/emultempl/avrelf.em: Likewise. * ld/emultempl/beos.em: Likewise. * ld/emultempl/cr16elf.em: Likewise. * ld/emultempl/elf-generic.em: Likewise. * ld/emultempl/elf32.em: Likewise. * ld/emultempl/genelf.em: Likewise. * ld/emultempl/generic.em: Likewise. * ld/emultempl/gld960.em: Likewise. * ld/emultempl/gld960c.em: Likewise. * ld/emultempl/hppaelf.em: Likewise. * ld/emultempl/irix.em: Likewise. * ld/emultempl/linux.em: Likewise. * ld/emultempl/lnk960.em: Likewise. * ld/emultempl/m68hc1xelf.em: Likewise. * ld/emultempl/m68kcoff.em: Likewise. * ld/emultempl/m68kelf.em: Likewise. * ld/emultempl/metagelf.em: Likewise. * ld/emultempl/mipself.em: Likewise. * ld/emultempl/mmo.em: Likewise. * ld/emultempl/msp430.em: Likewise. * ld/emultempl/nds32elf.em: Likewise. * ld/emultempl/needrelax.em: Likewise. * ld/emultempl/nios2elf.em: Likewise. * ld/emultempl/pe.em: Likewise. * ld/emultempl/pep.em: Likewise. * ld/emultempl/ppc32elf.em: Likewise. * ld/emultempl/ppc64elf.em: Likewise. * ld/emultempl/sh64elf.em: Likewise. * ld/emultempl/solaris2.em: Likewise. * ld/emultempl/spuelf.em: Likewise. * ld/emultempl/sunos.em: Likewise. * ld/emultempl/tic6xdsbt.em: Likewise. * ld/emultempl/ticoff.em: Likewise. * ld/emultempl/v850elf.em: Likewise. * ld/emultempl/vms.em: Likewise. * ld/emultempl/vxworks.em: Likewise.
2015-08-18 14:51:03 +02:00
if (bfd_link_relocatable (info))
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
return TRUE;
tls_sec = elf_hash_table (info)->tls_sec;
if (tls_sec)
{
struct elf_link_hash_entry *tlsbase;
tlsbase = elf_link_hash_lookup (elf_hash_table (info),
"_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
if (tlsbase)
{
struct bfd_link_hash_entry *h = NULL;
const struct elf_backend_data *bed =
get_elf_backend_data (output_bfd);
if (!(_bfd_generic_link_add_one_symbol
(info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
tls_sec, 0, NULL, FALSE, bed->collect, &h)))
return FALSE;
tlsbase->type = STT_TLS;
tlsbase = (struct elf_link_hash_entry *) h;
tlsbase->def_regular = 1;
tlsbase->other = STV_HIDDEN;
(*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
}
}
return TRUE;
}
/* Finish up dynamic symbol handling. We set the contents of various
dynamic sections here. */
Fix AArch64 relocation handling in ILP32 mode. bfd * elfnn-aarch64.c: Fix relaxations for ILP32 mode. ld * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests. * testsuite/ld-aarch64/tls-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-all-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gd-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-3-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-le-ilp32.d: New test.
2017-01-23 18:07:13 +01:00
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
static bfd_boolean
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_finish_dynamic_symbol (bfd *output_bfd,
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
struct bfd_link_info *info,
struct elf_link_hash_entry *h,
Elf_Internal_Sym *sym)
{
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
struct elf_aarch64_link_hash_table *htab;
htab = elf_aarch64_hash_table (info);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
if (h->plt.offset != (bfd_vma) - 1)
{
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
asection *plt, *gotplt, *relplt;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* This symbol has an entry in the procedure linkage table. Set
BFD whitespace fixes Binutils is supposed to use tabs. In my git config I have whitespace = indent-with-non-tab,space-before-tab,trailing-space and I got annoyed enough seeing red in "git diff" output to fix the problems. * doc/header.sed: Trim trailing space when splitting lines. * aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-cris.c, * aout-ns32k.c, * aout-target.h, * aout-tic30.c, * aoutf1.h, * aoutx.h, * arc-got.h, * arc-plt.def, * arc-plt.h, * archive.c, * archive64.c, * archures.c, * armnetbsd.c, * bfd-in.h, * bfd.c, * bfdio.c, * binary.c, * bout.c, * cache.c, * cisco-core.c, * coff-alpha.c, * coff-apollo.c, * coff-arm.c, * coff-h8300.c, * coff-i386.c, * coff-i860.c, * coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mcore.c, * coff-mips.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-stgo32.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * compress.c, * corefile.c, * cpu-alpha.c, * cpu-arm.c, * cpu-avr.c, * cpu-bfin.c, * cpu-cr16.c, * cpu-cr16c.c, * cpu-crx.c, * cpu-d10v.c, * cpu-frv.c, * cpu-ft32.c, * cpu-i370.c, * cpu-i960.c, * cpu-ia64-opc.c, * cpu-ip2k.c, * cpu-lm32.c, * cpu-m32r.c, * cpu-mcore.c, * cpu-microblaze.c, * cpu-mips.c, * cpu-moxie.c, * cpu-mt.c, * cpu-nios2.c, * cpu-ns32k.c, * cpu-or1k.c, * cpu-powerpc.c, * cpu-pru.c, * cpu-sh.c, * cpu-spu.c, * cpu-v850.c, * cpu-v850_rh850.c, * cpu-xgate.c, * cpu-z80.c, * dwarf1.c, * dwarf2.c, * ecoff.c, * ecofflink.c, * ecoffswap.h, * elf-bfd.h, * elf-eh-frame.c, * elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf-s390-common.c, * elf-strtab.c, * elf-vxworks.c, * elf.c, * elf32-am33lin.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-avr.h, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-i860.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68hc1x.c, * elf32-m68hc1x.h, * elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nds32.h, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score.h, * elf32-score7.c, * elf32-sh-symbian.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilegx.c, * elf32-tilegx.h, * elf32-tilepro.c, * elf32-tilepro.h, * elf32-v850.c, * elf32-vax.c, * elf32-wasm32.c, * elf32-xc16x.c, * elf32-xgate.c, * elf32-xgate.h, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-tilegx.c, * elf64-tilegx.h, * elf64-x86-64.c, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-aarch64.h, * elfxx-ia64.c, * elfxx-ia64.h, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * elfxx-x86.h, * freebsd.h, * hash.c, * host-aout.c, * hp300hpux.c, * hppabsd-core.c, * hpux-core.c, * i386aout.c, * i386linux.c, * i386lynx.c, * i386mach3.c, * i386msdos.c, * i386netbsd.c, * ieee.c, * ihex.c, * irix-core.c, * libaout.h, * libbfd-in.h, * libbfd.c, * libcoff-in.h, * libnlm.h, * libpei.h, * libxcoff.h, * linker.c, * lynx-core.c, * m68k4knetbsd.c, * m68klinux.c, * m68knetbsd.c, * m88kmach3.c, * mach-o-aarch64.c, * mach-o-arm.c, * mach-o-i386.c, * mach-o-target.c, * mach-o-x86-64.c, * mach-o.c, * mach-o.h, * merge.c, * mipsbsd.c, * mmo.c, * netbsd.h, * netbsd-core.c, * newsos3.c, * nlm-target.h, * nlm32-ppc.c, * nlm32-sparc.c, * nlmcode.h, * ns32k.h, * ns32knetbsd.c, * oasys.c, * opncls.c, * pc532-mach.c, * pdp11.c, * pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-mips.c, * pe-x86_64.c, * peXXigen.c, * pef.c, * pef.h, * pei-arm.c, * pei-i386.c, * pei-mcore.c, * pei-x86_64.c, * peicode.h, * plugin.c, * ppcboot.c, * ptrace-core.c, * reloc.c, * riscix.c, * rs6000-core.c, * section.c, * som.c, * som.h, * sparclinux.c, * sparcnetbsd.c, * srec.c, * stabs.c, * sunos.c, * syms.c, * targets.c, * tekhex.c, * trad-core.c, * vax1knetbsd.c, * vaxnetbsd.c, * verilog.c, * versados.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * wasm-module.c, * wasm-module.h, * xcofflink.c, * xsym.c, * xsym.h: Whitespace fixes. * bfd-in2.h, * libbfd.h, * libcoff.h: Regenerate.
2017-12-05 23:56:00 +01:00
it up. */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
/* When building a static executable, use .iplt, .igot.plt and
.rela.iplt sections for STT_GNU_IFUNC symbols. */
if (htab->root.splt != NULL)
{
plt = htab->root.splt;
gotplt = htab->root.sgotplt;
relplt = htab->root.srelplt;
}
else
{
plt = htab->root.iplt;
gotplt = htab->root.igotplt;
relplt = htab->root.irelplt;
}
/* This symbol has an entry in the procedure linkage table. Set
it up. */
if ((h->dynindx == -1
Add output_type to bfd_link_info The "shared" field in bfd_link_info is set for both DSO and and PIE. There are separate fields for executable and relocatable outputs. This patch adds an "output_type" field: enum output_type { type_unknown = 0, type_executable, type_dll, type_relocatable }; and a "pic" field to bfd_link_info to replace shared, executable and relocatable fields so that we can use the "output_type" field to check for output type and the "pic" field check if output is PIC. Macros, bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie, are provided to check for output features. bfd/ * bfd/aoutx.h: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * bfd/bout.c: Likewise. * bfd/coff-alpha.c: Likewise. * bfd/coff-arm.c: Likewise. * bfd/coff-i386.c: Likewise. * bfd/coff-i960.c: Likewise. * bfd/coff-m68k.c: Likewise. * bfd/coff-mcore.c: Likewise. * bfd/coff-mips.c: Likewise. * bfd/coff-ppc.c: Likewise. * bfd/coff-rs6000.c: Likewise. * bfd/coff-sh.c: Likewise. * bfd/coff-tic80.c: Likewise. * bfd/coff-x86_64.c: Likewise. * bfd/coff64-rs6000.c: Likewise. * bfd/coffgen.c: Likewise. * bfd/cofflink.c: Likewise. * bfd/ecoff.c: Likewise. * bfd/ecofflink.c: Likewise. * bfd/elf-bfd.h: Likewise. * bfd/elf-eh-frame.c: Likewise. * bfd/elf-ifunc.c: Likewise. * bfd/elf-m10200.c: Likewise. * bfd/elf-m10300.c: Likewise. * bfd/elf-s390-common.c: Likewise. * bfd/elf-vxworks.c: Likewise. * bfd/elf.c: Likewise. * bfd/elf32-arm.c: Likewise. * bfd/elf32-avr.c: Likewise. * bfd/elf32-bfin.c: Likewise. * bfd/elf32-cr16.c: Likewise. * bfd/elf32-cr16c.c: Likewise. * bfd/elf32-cris.c: Likewise. * bfd/elf32-crx.c: Likewise. * bfd/elf32-d10v.c: Likewise. * bfd/elf32-dlx.c: Likewise. * bfd/elf32-epiphany.c: Likewise. * bfd/elf32-fr30.c: Likewise. * bfd/elf32-frv.c: Likewise. * bfd/elf32-ft32.c: Likewise. * bfd/elf32-h8300.c: Likewise. * bfd/elf32-hppa.c: Likewise. * bfd/elf32-i370.c: Likewise. * bfd/elf32-i386.c: Likewise. * bfd/elf32-i860.c: Likewise. * bfd/elf32-ip2k.c: Likewise. * bfd/elf32-iq2000.c: Likewise. * bfd/elf32-lm32.c: Likewise. * bfd/elf32-m32c.c: Likewise. * bfd/elf32-m32r.c: Likewise. * bfd/elf32-m68hc11.c: Likewise. * bfd/elf32-m68hc1x.c: Likewise. * bfd/elf32-m68k.c: Likewise. * bfd/elf32-mcore.c: Likewise. * bfd/elf32-mep.c: Likewise. * bfd/elf32-metag.c: Likewise. * bfd/elf32-microblaze.c: Likewise. * bfd/elf32-moxie.c: Likewise. * bfd/elf32-msp430.c: Likewise. * bfd/elf32-mt.c: Likewise. * bfd/elf32-nds32.c: Likewise. * bfd/elf32-nios2.c: Likewise. * bfd/elf32-or1k.c: Likewise. * bfd/elf32-ppc.c: Likewise. * bfd/elf32-rl78.c: Likewise. * bfd/elf32-rx.c: Likewise. * bfd/elf32-s390.c: Likewise. * bfd/elf32-score.c: Likewise. * bfd/elf32-score7.c: Likewise. * bfd/elf32-sh-symbian.c: Likewise. * bfd/elf32-sh.c: Likewise. * bfd/elf32-sh64.c: Likewise. * bfd/elf32-spu.c: Likewise. * bfd/elf32-tic6x.c: Likewise. * bfd/elf32-tilepro.c: Likewise. * bfd/elf32-v850.c: Likewise. * bfd/elf32-vax.c: Likewise. * bfd/elf32-visium.c: Likewise. * bfd/elf32-xc16x.c: Likewise. * bfd/elf32-xstormy16.c: Likewise. * bfd/elf32-xtensa.c: Likewise. * bfd/elf64-alpha.c: Likewise. * bfd/elf64-hppa.c: Likewise. * bfd/elf64-ia64-vms.c: Likewise. * bfd/elf64-mmix.c: Likewise. * bfd/elf64-ppc.c: Likewise. * bfd/elf64-s390.c: Likewise. * bfd/elf64-sh64.c: Likewise. * bfd/elf64-x86-64.c: Likewise. * bfd/elflink.c: Likewise. * bfd/elfnn-aarch64.c: Likewise. * bfd/elfnn-ia64.c: Likewise. * bfd/elfxx-mips.c: Likewise. * bfd/elfxx-sparc.c: Likewise. * bfd/elfxx-tilegx.c: Likewise. * bfd/i386linux.c: Likewise. * bfd/linker.c: Likewise. * bfd/m68klinux.c: Likewise. * bfd/pdp11.c: Likewise. * bfd/pe-mips.c: Likewise. * bfd/peXXigen.c: Likewise. * bfd/reloc.c: Likewise. * bfd/reloc16.c: Likewise. * bfd/sparclinux.c: Likewise. * bfd/sunos.c: Likewise. * bfd/vms-alpha.c: Likewise. * bfd/xcofflink.c: Likewise. include/ * include/bfdlink.h (output_type): New enum. (bfd_link_executable): New macro. (bfd_link_dll): Likewise. (bfd_link_relocatable): Likewise. (bfd_link_pic): Likewise. (bfd_link_pie): Likewise. (bfd_link_info): Remove shared, executable, pie and relocatable. Add output_type and pic. ld/ * ld/ldctor.c: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * ld/ldemul.c: Likewise. * ld/ldfile.c: Likewise. * ld/ldlang.c: Likewise. * ld/ldmain.c: Likewise. * ld/ldwrite.c: Likewise. * ld/lexsup.c: Likewise. * ld/pe-dll.c: Likewise. * ld/plugin.c: Likewise. * ld/emultempl/aarch64elf.em: Likewise. * ld/emultempl/aix.em: Likewise. * ld/emultempl/alphaelf.em: Likewise. * ld/emultempl/armcoff.em: Likewise. * ld/emultempl/armelf.em: Likewise. * ld/emultempl/avrelf.em: Likewise. * ld/emultempl/beos.em: Likewise. * ld/emultempl/cr16elf.em: Likewise. * ld/emultempl/elf-generic.em: Likewise. * ld/emultempl/elf32.em: Likewise. * ld/emultempl/genelf.em: Likewise. * ld/emultempl/generic.em: Likewise. * ld/emultempl/gld960.em: Likewise. * ld/emultempl/gld960c.em: Likewise. * ld/emultempl/hppaelf.em: Likewise. * ld/emultempl/irix.em: Likewise. * ld/emultempl/linux.em: Likewise. * ld/emultempl/lnk960.em: Likewise. * ld/emultempl/m68hc1xelf.em: Likewise. * ld/emultempl/m68kcoff.em: Likewise. * ld/emultempl/m68kelf.em: Likewise. * ld/emultempl/metagelf.em: Likewise. * ld/emultempl/mipself.em: Likewise. * ld/emultempl/mmo.em: Likewise. * ld/emultempl/msp430.em: Likewise. * ld/emultempl/nds32elf.em: Likewise. * ld/emultempl/needrelax.em: Likewise. * ld/emultempl/nios2elf.em: Likewise. * ld/emultempl/pe.em: Likewise. * ld/emultempl/pep.em: Likewise. * ld/emultempl/ppc32elf.em: Likewise. * ld/emultempl/ppc64elf.em: Likewise. * ld/emultempl/sh64elf.em: Likewise. * ld/emultempl/solaris2.em: Likewise. * ld/emultempl/spuelf.em: Likewise. * ld/emultempl/sunos.em: Likewise. * ld/emultempl/tic6xdsbt.em: Likewise. * ld/emultempl/ticoff.em: Likewise. * ld/emultempl/v850elf.em: Likewise. * ld/emultempl/vms.em: Likewise. * ld/emultempl/vxworks.em: Likewise.
2015-08-18 14:51:03 +02:00
&& !((h->forced_local || bfd_link_executable (info))
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
&& h->def_regular
&& h->type == STT_GNU_IFUNC))
|| plt == NULL
|| gotplt == NULL
|| relplt == NULL)
Rename R_AARCH64_TLSDESC_LD64_LO12_NC to R_AARCH64_TLSDESC_LD64_LO12 and R_AARCH64_TLSDESC_ADD_LO12_NC to R_AARCH64_TLSDESC_ADD_LO12. PR binutils/21202 include * elf/aarch64.h (R_AARCH64_TLSDESC_LD64_LO12_NC): Rename to R_AARCH64_TLSDESC_LD64_LO12. (R_AARCH64_TLSDESC_ADD_LO12_NC): Rename to R_AARCH64_TLSDESC_ADD_LO12_NC. bfd * reloc.c (BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC): Rename to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12. (BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC): Rename to BFD_RELOC_AARCH64_TLSDESC_ADD_LO12. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elfnn-aarch64.c (IS_AARCH64_TLS_RELAX_RELOC): Update reloc names. (IS_AARCH64_TLSDESC_RELOC): Likewise. (elfNN_aarch64_howto_table): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. gas * config/tc-aarch64.c (reloc_table): Rename BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12. Rname BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC to BFD_RELOC_AARCH64_TLSDESC_ADD_LO12. (md_apply_fix): Likewise. (aarch64_force_relocation): Likewise. * testsuite/gas/aarch64/tls.d: Update regexp. ld * testsuite/ld-aarch64/ifunc-5r-local.d: Update regexp.
2017-03-13 10:58:04 +01:00
return FALSE;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
elfNN_aarch64_create_small_pltn_entry (h, htab, output_bfd, info);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
if (!h->def_regular)
{
/* Mark the symbol as undefined, rather than as defined in
bfd/elfnn-aarch64.c: Set st_value to zero for undefined symbols Unless pointer_equality_needed is set then set st_value to be zero for undefined symbols. bfd/ChangeLog: 2015-02-03 Will Newton <will.newton@linaro.org> * elfnn-aarch64.c (elfNN_aarch64_finish_dynamic_symbol): Set st_value to zero for undefined symbols if the reference is weak or pointer_equality_needed is FALSE.
2015-01-28 11:39:21 +01:00
the .plt section. */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
sym->st_shndx = SHN_UNDEF;
bfd/elfnn-aarch64.c: Set st_value to zero for undefined symbols Unless pointer_equality_needed is set then set st_value to be zero for undefined symbols. bfd/ChangeLog: 2015-02-03 Will Newton <will.newton@linaro.org> * elfnn-aarch64.c (elfNN_aarch64_finish_dynamic_symbol): Set st_value to zero for undefined symbols if the reference is weak or pointer_equality_needed is FALSE.
2015-01-28 11:39:21 +01:00
/* If the symbol is weak we need to clear the value.
Otherwise, the PLT entry would provide a definition for
the symbol even if the symbol wasn't defined anywhere,
and so the symbol would never be NULL. Leave the value if
there were any relocations where pointer equality matters
(this is a clue for the dynamic linker, to make function
pointer comparisons work between an application and shared
library). */
if (!h->ref_regular_nonweak || !h->pointer_equality_needed)
sym->st_value = 0;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
}
}
if (h->got.offset != (bfd_vma) - 1
[PR ld/22269] aarch64: Handle local undefined weak symbols With static pie linking undefined weak symbols are forced to resolve locally to 0, so no GOT setup is needed in elfNN_aarch64_finish_dynamic_symbol, which previously failed for these symbols. The failure caused the unhelpful error message: "ld: final link failed: Nonrepresentable section on output" bfd/ PR ld/22269 * elfnn-aarch64.c (elfNN_aarch64_finish_dynamic_symbol): Use UNDEFWEAK_NO_DYNAMIC_RELOC to avoid dynamic GOT relocs. (elfNN_aarch64_allocate_dynrelocs): Likewise.
2017-11-15 16:56:30 +01:00
&& elf_aarch64_hash_entry (h)->got_type == GOT_NORMAL
/* Undefined weak symbol in static PIE resolves to 0 without
any dynamic relocations. */
&& !UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
Elf_Internal_Rela rela;
bfd_byte *loc;
/* This symbol has an entry in the global offset table. Set it
BFD whitespace fixes Binutils is supposed to use tabs. In my git config I have whitespace = indent-with-non-tab,space-before-tab,trailing-space and I got annoyed enough seeing red in "git diff" output to fix the problems. * doc/header.sed: Trim trailing space when splitting lines. * aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-cris.c, * aout-ns32k.c, * aout-target.h, * aout-tic30.c, * aoutf1.h, * aoutx.h, * arc-got.h, * arc-plt.def, * arc-plt.h, * archive.c, * archive64.c, * archures.c, * armnetbsd.c, * bfd-in.h, * bfd.c, * bfdio.c, * binary.c, * bout.c, * cache.c, * cisco-core.c, * coff-alpha.c, * coff-apollo.c, * coff-arm.c, * coff-h8300.c, * coff-i386.c, * coff-i860.c, * coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mcore.c, * coff-mips.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-stgo32.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * compress.c, * corefile.c, * cpu-alpha.c, * cpu-arm.c, * cpu-avr.c, * cpu-bfin.c, * cpu-cr16.c, * cpu-cr16c.c, * cpu-crx.c, * cpu-d10v.c, * cpu-frv.c, * cpu-ft32.c, * cpu-i370.c, * cpu-i960.c, * cpu-ia64-opc.c, * cpu-ip2k.c, * cpu-lm32.c, * cpu-m32r.c, * cpu-mcore.c, * cpu-microblaze.c, * cpu-mips.c, * cpu-moxie.c, * cpu-mt.c, * cpu-nios2.c, * cpu-ns32k.c, * cpu-or1k.c, * cpu-powerpc.c, * cpu-pru.c, * cpu-sh.c, * cpu-spu.c, * cpu-v850.c, * cpu-v850_rh850.c, * cpu-xgate.c, * cpu-z80.c, * dwarf1.c, * dwarf2.c, * ecoff.c, * ecofflink.c, * ecoffswap.h, * elf-bfd.h, * elf-eh-frame.c, * elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf-s390-common.c, * elf-strtab.c, * elf-vxworks.c, * elf.c, * elf32-am33lin.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-avr.h, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-i860.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68hc1x.c, * elf32-m68hc1x.h, * elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nds32.h, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score.h, * elf32-score7.c, * elf32-sh-symbian.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilegx.c, * elf32-tilegx.h, * elf32-tilepro.c, * elf32-tilepro.h, * elf32-v850.c, * elf32-vax.c, * elf32-wasm32.c, * elf32-xc16x.c, * elf32-xgate.c, * elf32-xgate.h, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-tilegx.c, * elf64-tilegx.h, * elf64-x86-64.c, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-aarch64.h, * elfxx-ia64.c, * elfxx-ia64.h, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * elfxx-x86.h, * freebsd.h, * hash.c, * host-aout.c, * hp300hpux.c, * hppabsd-core.c, * hpux-core.c, * i386aout.c, * i386linux.c, * i386lynx.c, * i386mach3.c, * i386msdos.c, * i386netbsd.c, * ieee.c, * ihex.c, * irix-core.c, * libaout.h, * libbfd-in.h, * libbfd.c, * libcoff-in.h, * libnlm.h, * libpei.h, * libxcoff.h, * linker.c, * lynx-core.c, * m68k4knetbsd.c, * m68klinux.c, * m68knetbsd.c, * m88kmach3.c, * mach-o-aarch64.c, * mach-o-arm.c, * mach-o-i386.c, * mach-o-target.c, * mach-o-x86-64.c, * mach-o.c, * mach-o.h, * merge.c, * mipsbsd.c, * mmo.c, * netbsd.h, * netbsd-core.c, * newsos3.c, * nlm-target.h, * nlm32-ppc.c, * nlm32-sparc.c, * nlmcode.h, * ns32k.h, * ns32knetbsd.c, * oasys.c, * opncls.c, * pc532-mach.c, * pdp11.c, * pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-mips.c, * pe-x86_64.c, * peXXigen.c, * pef.c, * pef.h, * pei-arm.c, * pei-i386.c, * pei-mcore.c, * pei-x86_64.c, * peicode.h, * plugin.c, * ppcboot.c, * ptrace-core.c, * reloc.c, * riscix.c, * rs6000-core.c, * section.c, * som.c, * som.h, * sparclinux.c, * sparcnetbsd.c, * srec.c, * stabs.c, * sunos.c, * syms.c, * targets.c, * tekhex.c, * trad-core.c, * vax1knetbsd.c, * vaxnetbsd.c, * verilog.c, * versados.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * wasm-module.c, * wasm-module.h, * xcofflink.c, * xsym.c, * xsym.h: Whitespace fixes. * bfd-in2.h, * libbfd.h, * libcoff.h: Regenerate.
2017-12-05 23:56:00 +01:00
up. */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
if (htab->root.sgot == NULL || htab->root.srelgot == NULL)
abort ();
rela.r_offset = (htab->root.sgot->output_section->vma
+ htab->root.sgot->output_offset
+ (h->got.offset & ~(bfd_vma) 1));
bfd/elfnn-aarch64.c: Handle static links with ifunc correctly. The code for handling GOT references to ifunc symbols in static links was missing. bfd/ChangeLog: 2013-11-26 Will Newton <will.newton@linaro.org> * elfnn-aarch64.c (elfNN_aarch64_finish_dynamic_symbol): Handle STT_GNU_IFUNC symbols correctly in static links. ld/testsuite/ChangeLog: 2013-11-26 Will Newton <will.newton@linaro.org> * ld-aarch64/aarch64-elf.exp: Add ifunc-22. * ld-aarch64/ifunc-22.d: New file. * ld-aarch64/ifunc-22.s: Likewise.
2013-11-25 15:44:59 +01:00
if (h->def_regular
&& h->type == STT_GNU_IFUNC)
{
Add output_type to bfd_link_info The "shared" field in bfd_link_info is set for both DSO and and PIE. There are separate fields for executable and relocatable outputs. This patch adds an "output_type" field: enum output_type { type_unknown = 0, type_executable, type_dll, type_relocatable }; and a "pic" field to bfd_link_info to replace shared, executable and relocatable fields so that we can use the "output_type" field to check for output type and the "pic" field check if output is PIC. Macros, bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie, are provided to check for output features. bfd/ * bfd/aoutx.h: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * bfd/bout.c: Likewise. * bfd/coff-alpha.c: Likewise. * bfd/coff-arm.c: Likewise. * bfd/coff-i386.c: Likewise. * bfd/coff-i960.c: Likewise. * bfd/coff-m68k.c: Likewise. * bfd/coff-mcore.c: Likewise. * bfd/coff-mips.c: Likewise. * bfd/coff-ppc.c: Likewise. * bfd/coff-rs6000.c: Likewise. * bfd/coff-sh.c: Likewise. * bfd/coff-tic80.c: Likewise. * bfd/coff-x86_64.c: Likewise. * bfd/coff64-rs6000.c: Likewise. * bfd/coffgen.c: Likewise. * bfd/cofflink.c: Likewise. * bfd/ecoff.c: Likewise. * bfd/ecofflink.c: Likewise. * bfd/elf-bfd.h: Likewise. * bfd/elf-eh-frame.c: Likewise. * bfd/elf-ifunc.c: Likewise. * bfd/elf-m10200.c: Likewise. * bfd/elf-m10300.c: Likewise. * bfd/elf-s390-common.c: Likewise. * bfd/elf-vxworks.c: Likewise. * bfd/elf.c: Likewise. * bfd/elf32-arm.c: Likewise. * bfd/elf32-avr.c: Likewise. * bfd/elf32-bfin.c: Likewise. * bfd/elf32-cr16.c: Likewise. * bfd/elf32-cr16c.c: Likewise. * bfd/elf32-cris.c: Likewise. * bfd/elf32-crx.c: Likewise. * bfd/elf32-d10v.c: Likewise. * bfd/elf32-dlx.c: Likewise. * bfd/elf32-epiphany.c: Likewise. * bfd/elf32-fr30.c: Likewise. * bfd/elf32-frv.c: Likewise. * bfd/elf32-ft32.c: Likewise. * bfd/elf32-h8300.c: Likewise. * bfd/elf32-hppa.c: Likewise. * bfd/elf32-i370.c: Likewise. * bfd/elf32-i386.c: Likewise. * bfd/elf32-i860.c: Likewise. * bfd/elf32-ip2k.c: Likewise. * bfd/elf32-iq2000.c: Likewise. * bfd/elf32-lm32.c: Likewise. * bfd/elf32-m32c.c: Likewise. * bfd/elf32-m32r.c: Likewise. * bfd/elf32-m68hc11.c: Likewise. * bfd/elf32-m68hc1x.c: Likewise. * bfd/elf32-m68k.c: Likewise. * bfd/elf32-mcore.c: Likewise. * bfd/elf32-mep.c: Likewise. * bfd/elf32-metag.c: Likewise. * bfd/elf32-microblaze.c: Likewise. * bfd/elf32-moxie.c: Likewise. * bfd/elf32-msp430.c: Likewise. * bfd/elf32-mt.c: Likewise. * bfd/elf32-nds32.c: Likewise. * bfd/elf32-nios2.c: Likewise. * bfd/elf32-or1k.c: Likewise. * bfd/elf32-ppc.c: Likewise. * bfd/elf32-rl78.c: Likewise. * bfd/elf32-rx.c: Likewise. * bfd/elf32-s390.c: Likewise. * bfd/elf32-score.c: Likewise. * bfd/elf32-score7.c: Likewise. * bfd/elf32-sh-symbian.c: Likewise. * bfd/elf32-sh.c: Likewise. * bfd/elf32-sh64.c: Likewise. * bfd/elf32-spu.c: Likewise. * bfd/elf32-tic6x.c: Likewise. * bfd/elf32-tilepro.c: Likewise. * bfd/elf32-v850.c: Likewise. * bfd/elf32-vax.c: Likewise. * bfd/elf32-visium.c: Likewise. * bfd/elf32-xc16x.c: Likewise. * bfd/elf32-xstormy16.c: Likewise. * bfd/elf32-xtensa.c: Likewise. * bfd/elf64-alpha.c: Likewise. * bfd/elf64-hppa.c: Likewise. * bfd/elf64-ia64-vms.c: Likewise. * bfd/elf64-mmix.c: Likewise. * bfd/elf64-ppc.c: Likewise. * bfd/elf64-s390.c: Likewise. * bfd/elf64-sh64.c: Likewise. * bfd/elf64-x86-64.c: Likewise. * bfd/elflink.c: Likewise. * bfd/elfnn-aarch64.c: Likewise. * bfd/elfnn-ia64.c: Likewise. * bfd/elfxx-mips.c: Likewise. * bfd/elfxx-sparc.c: Likewise. * bfd/elfxx-tilegx.c: Likewise. * bfd/i386linux.c: Likewise. * bfd/linker.c: Likewise. * bfd/m68klinux.c: Likewise. * bfd/pdp11.c: Likewise. * bfd/pe-mips.c: Likewise. * bfd/peXXigen.c: Likewise. * bfd/reloc.c: Likewise. * bfd/reloc16.c: Likewise. * bfd/sparclinux.c: Likewise. * bfd/sunos.c: Likewise. * bfd/vms-alpha.c: Likewise. * bfd/xcofflink.c: Likewise. include/ * include/bfdlink.h (output_type): New enum. (bfd_link_executable): New macro. (bfd_link_dll): Likewise. (bfd_link_relocatable): Likewise. (bfd_link_pic): Likewise. (bfd_link_pie): Likewise. (bfd_link_info): Remove shared, executable, pie and relocatable. Add output_type and pic. ld/ * ld/ldctor.c: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * ld/ldemul.c: Likewise. * ld/ldfile.c: Likewise. * ld/ldlang.c: Likewise. * ld/ldmain.c: Likewise. * ld/ldwrite.c: Likewise. * ld/lexsup.c: Likewise. * ld/pe-dll.c: Likewise. * ld/plugin.c: Likewise. * ld/emultempl/aarch64elf.em: Likewise. * ld/emultempl/aix.em: Likewise. * ld/emultempl/alphaelf.em: Likewise. * ld/emultempl/armcoff.em: Likewise. * ld/emultempl/armelf.em: Likewise. * ld/emultempl/avrelf.em: Likewise. * ld/emultempl/beos.em: Likewise. * ld/emultempl/cr16elf.em: Likewise. * ld/emultempl/elf-generic.em: Likewise. * ld/emultempl/elf32.em: Likewise. * ld/emultempl/genelf.em: Likewise. * ld/emultempl/generic.em: Likewise. * ld/emultempl/gld960.em: Likewise. * ld/emultempl/gld960c.em: Likewise. * ld/emultempl/hppaelf.em: Likewise. * ld/emultempl/irix.em: Likewise. * ld/emultempl/linux.em: Likewise. * ld/emultempl/lnk960.em: Likewise. * ld/emultempl/m68hc1xelf.em: Likewise. * ld/emultempl/m68kcoff.em: Likewise. * ld/emultempl/m68kelf.em: Likewise. * ld/emultempl/metagelf.em: Likewise. * ld/emultempl/mipself.em: Likewise. * ld/emultempl/mmo.em: Likewise. * ld/emultempl/msp430.em: Likewise. * ld/emultempl/nds32elf.em: Likewise. * ld/emultempl/needrelax.em: Likewise. * ld/emultempl/nios2elf.em: Likewise. * ld/emultempl/pe.em: Likewise. * ld/emultempl/pep.em: Likewise. * ld/emultempl/ppc32elf.em: Likewise. * ld/emultempl/ppc64elf.em: Likewise. * ld/emultempl/sh64elf.em: Likewise. * ld/emultempl/solaris2.em: Likewise. * ld/emultempl/spuelf.em: Likewise. * ld/emultempl/sunos.em: Likewise. * ld/emultempl/tic6xdsbt.em: Likewise. * ld/emultempl/ticoff.em: Likewise. * ld/emultempl/v850elf.em: Likewise. * ld/emultempl/vms.em: Likewise. * ld/emultempl/vxworks.em: Likewise.
2015-08-18 14:51:03 +02:00
if (bfd_link_pic (info))
bfd/elfnn-aarch64.c: Handle static links with ifunc correctly. The code for handling GOT references to ifunc symbols in static links was missing. bfd/ChangeLog: 2013-11-26 Will Newton <will.newton@linaro.org> * elfnn-aarch64.c (elfNN_aarch64_finish_dynamic_symbol): Handle STT_GNU_IFUNC symbols correctly in static links. ld/testsuite/ChangeLog: 2013-11-26 Will Newton <will.newton@linaro.org> * ld-aarch64/aarch64-elf.exp: Add ifunc-22. * ld-aarch64/ifunc-22.d: New file. * ld-aarch64/ifunc-22.s: Likewise.
2013-11-25 15:44:59 +01:00
{
/* Generate R_AARCH64_GLOB_DAT. */
goto do_glob_dat;
}
else
{
asection *plt;
if (!h->pointer_equality_needed)
abort ();
/* For non-shared object, we can't use .got.plt, which
contains the real function address if we need pointer
equality. We load the GOT entry with the PLT entry. */
plt = htab->root.splt ? htab->root.splt : htab->root.iplt;
bfd_put_NN (output_bfd, (plt->output_section->vma
+ plt->output_offset
+ h->plt.offset),
htab->root.sgot->contents
+ (h->got.offset & ~(bfd_vma) 1));
return TRUE;
}
}
Add output_type to bfd_link_info The "shared" field in bfd_link_info is set for both DSO and and PIE. There are separate fields for executable and relocatable outputs. This patch adds an "output_type" field: enum output_type { type_unknown = 0, type_executable, type_dll, type_relocatable }; and a "pic" field to bfd_link_info to replace shared, executable and relocatable fields so that we can use the "output_type" field to check for output type and the "pic" field check if output is PIC. Macros, bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie, are provided to check for output features. bfd/ * bfd/aoutx.h: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * bfd/bout.c: Likewise. * bfd/coff-alpha.c: Likewise. * bfd/coff-arm.c: Likewise. * bfd/coff-i386.c: Likewise. * bfd/coff-i960.c: Likewise. * bfd/coff-m68k.c: Likewise. * bfd/coff-mcore.c: Likewise. * bfd/coff-mips.c: Likewise. * bfd/coff-ppc.c: Likewise. * bfd/coff-rs6000.c: Likewise. * bfd/coff-sh.c: Likewise. * bfd/coff-tic80.c: Likewise. * bfd/coff-x86_64.c: Likewise. * bfd/coff64-rs6000.c: Likewise. * bfd/coffgen.c: Likewise. * bfd/cofflink.c: Likewise. * bfd/ecoff.c: Likewise. * bfd/ecofflink.c: Likewise. * bfd/elf-bfd.h: Likewise. * bfd/elf-eh-frame.c: Likewise. * bfd/elf-ifunc.c: Likewise. * bfd/elf-m10200.c: Likewise. * bfd/elf-m10300.c: Likewise. * bfd/elf-s390-common.c: Likewise. * bfd/elf-vxworks.c: Likewise. * bfd/elf.c: Likewise. * bfd/elf32-arm.c: Likewise. * bfd/elf32-avr.c: Likewise. * bfd/elf32-bfin.c: Likewise. * bfd/elf32-cr16.c: Likewise. * bfd/elf32-cr16c.c: Likewise. * bfd/elf32-cris.c: Likewise. * bfd/elf32-crx.c: Likewise. * bfd/elf32-d10v.c: Likewise. * bfd/elf32-dlx.c: Likewise. * bfd/elf32-epiphany.c: Likewise. * bfd/elf32-fr30.c: Likewise. * bfd/elf32-frv.c: Likewise. * bfd/elf32-ft32.c: Likewise. * bfd/elf32-h8300.c: Likewise. * bfd/elf32-hppa.c: Likewise. * bfd/elf32-i370.c: Likewise. * bfd/elf32-i386.c: Likewise. * bfd/elf32-i860.c: Likewise. * bfd/elf32-ip2k.c: Likewise. * bfd/elf32-iq2000.c: Likewise. * bfd/elf32-lm32.c: Likewise. * bfd/elf32-m32c.c: Likewise. * bfd/elf32-m32r.c: Likewise. * bfd/elf32-m68hc11.c: Likewise. * bfd/elf32-m68hc1x.c: Likewise. * bfd/elf32-m68k.c: Likewise. * bfd/elf32-mcore.c: Likewise. * bfd/elf32-mep.c: Likewise. * bfd/elf32-metag.c: Likewise. * bfd/elf32-microblaze.c: Likewise. * bfd/elf32-moxie.c: Likewise. * bfd/elf32-msp430.c: Likewise. * bfd/elf32-mt.c: Likewise. * bfd/elf32-nds32.c: Likewise. * bfd/elf32-nios2.c: Likewise. * bfd/elf32-or1k.c: Likewise. * bfd/elf32-ppc.c: Likewise. * bfd/elf32-rl78.c: Likewise. * bfd/elf32-rx.c: Likewise. * bfd/elf32-s390.c: Likewise. * bfd/elf32-score.c: Likewise. * bfd/elf32-score7.c: Likewise. * bfd/elf32-sh-symbian.c: Likewise. * bfd/elf32-sh.c: Likewise. * bfd/elf32-sh64.c: Likewise. * bfd/elf32-spu.c: Likewise. * bfd/elf32-tic6x.c: Likewise. * bfd/elf32-tilepro.c: Likewise. * bfd/elf32-v850.c: Likewise. * bfd/elf32-vax.c: Likewise. * bfd/elf32-visium.c: Likewise. * bfd/elf32-xc16x.c: Likewise. * bfd/elf32-xstormy16.c: Likewise. * bfd/elf32-xtensa.c: Likewise. * bfd/elf64-alpha.c: Likewise. * bfd/elf64-hppa.c: Likewise. * bfd/elf64-ia64-vms.c: Likewise. * bfd/elf64-mmix.c: Likewise. * bfd/elf64-ppc.c: Likewise. * bfd/elf64-s390.c: Likewise. * bfd/elf64-sh64.c: Likewise. * bfd/elf64-x86-64.c: Likewise. * bfd/elflink.c: Likewise. * bfd/elfnn-aarch64.c: Likewise. * bfd/elfnn-ia64.c: Likewise. * bfd/elfxx-mips.c: Likewise. * bfd/elfxx-sparc.c: Likewise. * bfd/elfxx-tilegx.c: Likewise. * bfd/i386linux.c: Likewise. * bfd/linker.c: Likewise. * bfd/m68klinux.c: Likewise. * bfd/pdp11.c: Likewise. * bfd/pe-mips.c: Likewise. * bfd/peXXigen.c: Likewise. * bfd/reloc.c: Likewise. * bfd/reloc16.c: Likewise. * bfd/sparclinux.c: Likewise. * bfd/sunos.c: Likewise. * bfd/vms-alpha.c: Likewise. * bfd/xcofflink.c: Likewise. include/ * include/bfdlink.h (output_type): New enum. (bfd_link_executable): New macro. (bfd_link_dll): Likewise. (bfd_link_relocatable): Likewise. (bfd_link_pic): Likewise. (bfd_link_pie): Likewise. (bfd_link_info): Remove shared, executable, pie and relocatable. Add output_type and pic. ld/ * ld/ldctor.c: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * ld/ldemul.c: Likewise. * ld/ldfile.c: Likewise. * ld/ldlang.c: Likewise. * ld/ldmain.c: Likewise. * ld/ldwrite.c: Likewise. * ld/lexsup.c: Likewise. * ld/pe-dll.c: Likewise. * ld/plugin.c: Likewise. * ld/emultempl/aarch64elf.em: Likewise. * ld/emultempl/aix.em: Likewise. * ld/emultempl/alphaelf.em: Likewise. * ld/emultempl/armcoff.em: Likewise. * ld/emultempl/armelf.em: Likewise. * ld/emultempl/avrelf.em: Likewise. * ld/emultempl/beos.em: Likewise. * ld/emultempl/cr16elf.em: Likewise. * ld/emultempl/elf-generic.em: Likewise. * ld/emultempl/elf32.em: Likewise. * ld/emultempl/genelf.em: Likewise. * ld/emultempl/generic.em: Likewise. * ld/emultempl/gld960.em: Likewise. * ld/emultempl/gld960c.em: Likewise. * ld/emultempl/hppaelf.em: Likewise. * ld/emultempl/irix.em: Likewise. * ld/emultempl/linux.em: Likewise. * ld/emultempl/lnk960.em: Likewise. * ld/emultempl/m68hc1xelf.em: Likewise. * ld/emultempl/m68kcoff.em: Likewise. * ld/emultempl/m68kelf.em: Likewise. * ld/emultempl/metagelf.em: Likewise. * ld/emultempl/mipself.em: Likewise. * ld/emultempl/mmo.em: Likewise. * ld/emultempl/msp430.em: Likewise. * ld/emultempl/nds32elf.em: Likewise. * ld/emultempl/needrelax.em: Likewise. * ld/emultempl/nios2elf.em: Likewise. * ld/emultempl/pe.em: Likewise. * ld/emultempl/pep.em: Likewise. * ld/emultempl/ppc32elf.em: Likewise. * ld/emultempl/ppc64elf.em: Likewise. * ld/emultempl/sh64elf.em: Likewise. * ld/emultempl/solaris2.em: Likewise. * ld/emultempl/spuelf.em: Likewise. * ld/emultempl/sunos.em: Likewise. * ld/emultempl/tic6xdsbt.em: Likewise. * ld/emultempl/ticoff.em: Likewise. * ld/emultempl/v850elf.em: Likewise. * ld/emultempl/vms.em: Likewise. * ld/emultempl/vxworks.em: Likewise.
2015-08-18 14:51:03 +02:00
else if (bfd_link_pic (info) && SYMBOL_REFERENCES_LOCAL (info, h))
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
Fix AArch64 in the same way as other targets updated in 8170f7693bc0a9442c0aa280197925db92d48ca6. PR ld/19579 * elfnn-aarch64.c (elfNN_aarch64_finish_dynamic_symbol): Check ELF_COMMON_DEF_P for common symbols.
2017-06-06 15:30:47 +02:00
if (!(h->def_regular || ELF_COMMON_DEF_P (h)))
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
return FALSE;
BFD_ASSERT ((h->got.offset & 1) != 0);
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
rela.r_info = ELFNN_R_INFO (0, AARCH64_R (RELATIVE));
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
rela.r_addend = (h->root.u.def.value
+ h->root.u.def.section->output_section->vma
+ h->root.u.def.section->output_offset);
}
else
{
Indent labels Labels don't go in the first column according to standard emacs C indent rules, and I got annoyed enough at seeing diff -p show a label rather than the function name to fix this. bfd/ * aoutx.h: Indent labels correctly. Format error strings. * archive.c: Likewise. * archive64.c: Likewise. * coff-arm.c: Likewise. * coff-rs6000.c: Likewise. * coff-stgo32.c: Likewise. * cpu-arm.c: Likewise. * dwarf2.c: Likewise. * elf-ifunc.c: Likewise. * elf-properties.c: Likewise. * elf-s390-common.c: Likewise. * elf-strtab.c: Likewise. * elf.c: Likewise. * elf32-arm.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cr16.c: Likewise. * elf32-csky.c: Likewise. * elf32-i386.c: Likewise. * elf32-m68k.c: Likewise. * elf32-msp430.c: Likewise. * elf32-nds32.c: Likewise. * elf32-nios2.c: Likewise. * elf32-pru.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-x86-64.c: Likewise. * elfcode.h: Likewise. * elfcore.h: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * elfnn-riscv.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-x86.c: Likewise. * i386lynx.c: Likewise. * merge.c: Likewise. * pdp11.c: Likewise. * plugin.c: Likewise. * reloc.c: Likewise. binutils/ * elfedit.c: Indent labels correctly. * readelf.c: Likewise. * resres.c: Likewise. gas/ * config/obj-elf.c: Indent labels correctly. * config/obj-macho.c: Likewise. * config/tc-aarch64.c: Likewise. * config/tc-alpha.c: Likewise. * config/tc-arm.c: Likewise. * config/tc-cr16.c: Likewise. * config/tc-crx.c: Likewise. * config/tc-frv.c: Likewise. * config/tc-i386-intel.c: Likewise. * config/tc-i386.c: Likewise. * config/tc-ia64.c: Likewise. * config/tc-mn10200.c: Likewise. * config/tc-mn10300.c: Likewise. * config/tc-nds32.c: Likewise. * config/tc-riscv.c: Likewise. * config/tc-s12z.c: Likewise. * config/tc-xtensa.c: Likewise. * config/tc-z80.c: Likewise. * read.c: Likewise. * symbols.c: Likewise. * write.c: Likewise. ld/ * emultempl/cskyelf.em: Indent labels correctly. * ldfile.c: Likewise. * ldlang.c: Likewise. * plugin.c: Likewise. opcodes/ * aarch64-asm.c: Indent labels correctly. * aarch64-dis.c: Likewise. * aarch64-gen.c: Likewise. * aarch64-opc.c: Likewise. * alpha-dis.c: Likewise. * i386-dis.c: Likewise. * nds32-asm.c: Likewise. * nfp-dis.c: Likewise. * visium-dis.c: Likewise.
2020-02-25 06:04:46 +01:00
do_glob_dat:
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
BFD_ASSERT ((h->got.offset & 1) == 0);
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
bfd_put_NN (output_bfd, (bfd_vma) 0,
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
htab->root.sgot->contents + h->got.offset);
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
rela.r_info = ELFNN_R_INFO (h->dynindx, AARCH64_R (GLOB_DAT));
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
rela.r_addend = 0;
}
loc = htab->root.srelgot->contents;
loc += htab->root.srelgot->reloc_count++ * RELOC_SIZE (htab);
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
bfd_elfNN_swap_reloca_out (output_bfd, &rela, loc);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
}
if (h->needs_copy)
{
Elf_Internal_Rela rela;
dynrelro section for read-only dynamic symbols copied into executable Variables defined in shared libraries are copied into an executable's .bss section when code in the executable is non-PIC and thus would require dynamic text relocations to access the variable directly in the shared library. Recent x86 toolchains also copy variables into the executable to gain a small speed improvement. The problem is that if the variable was originally read-only, the copy in .bss is writable, potentially opening a security hole. This patch cures that problem by putting the copy in a section that becomes read-only after ld.so relocation, provided -z relro is in force. The patch also fixes a microblaze linker segfault on attempting to use dynamic bss variables. bfd/ PR ld/20995 * elf-bfd.h (struct elf_link_hash_table): Add sdynrelro and sreldynrelro. (struct elf_backend_data): Add want_dynrelro. * elfxx-target.h (elf_backend_want_dynrelro): Define. (elfNN_bed): Update initializer. * elflink.c (_bfd_elf_create_dynamic_sections): Create sdynrelro and sreldynrelro sections. * elf32-arm.c (elf32_arm_adjust_dynamic_symbol): Place variables copied into the executable from read-only sections into sdynrelro. (elf32_arm_size_dynamic_sections): Handle sdynrelro. (elf32_arm_finish_dynamic_symbol): Select sreldynrelro for dynamic relocs in sdynrelro. (elf_backend_want_dynrelro): Define. * elf32-hppa.c (elf32_hppa_adjust_dynamic_symbol) (elf32_hppa_size_dynamic_sections, elf32_hppa_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf32-i386.c (elf_i386_adjust_dynamic_symbol) (elf_i386_size_dynamic_sections, elf_i386_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf32-metag.c (elf_metag_adjust_dynamic_symbol) (elf_metag_size_dynamic_sections, elf_metag_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf32-microblaze.c (microblaze_elf_adjust_dynamic_symbol) (microblaze_elf_size_dynamic_sections) (microblaze_elf_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf32-nios2.c (nios2_elf32_finish_dynamic_symbol) (nios2_elf32_adjust_dynamic_symbol) (nios2_elf32_size_dynamic_sections) (elf_backend_want_dynrelro): As above. * elf32-or1k.c (or1k_elf_finish_dynamic_symbol) (or1k_elf_adjust_dynamic_symbol, or1k_elf_size_dynamic_sections) (elf_backend_want_dynrelro): As above. * elf32-ppc.c (ppc_elf_adjust_dynamic_symbol) (ppc_elf_size_dynamic_sections, ppc_elf_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf32-s390.c (elf_s390_adjust_dynamic_symbol) (elf_s390_size_dynamic_sections, elf_s390_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf32-tic6x.c (elf32_tic6x_adjust_dynamic_symbol) (elf32_tic6x_size_dynamic_sections) (elf32_tic6x_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf32-tilepro.c (tilepro_elf_adjust_dynamic_symbol) (tilepro_elf_size_dynamic_sections) (tilepro_elf_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf64-ppc.c (ppc64_elf_adjust_dynamic_symbol) (ppc64_elf_size_dynamic_sections, ppc64_elf_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf64-s390.c (elf_s390_adjust_dynamic_symbol) (elf_s390_size_dynamic_sections, elf_s390_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf64-x86-64.c (elf_x86_64_adjust_dynamic_symbol) (elf_x86_64_size_dynamic_sections) (elf_x86_64_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elfnn-aarch64.c (elfNN_aarch64_adjust_dynamic_symbol) (elfNN_aarch64_size_dynamic_sections) (elfNN_aarch64_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elfnn-riscv.c (riscv_elf_adjust_dynamic_symbol) (riscv_elf_size_dynamic_sections, riscv_elf_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elfxx-mips.c (_bfd_mips_elf_adjust_dynamic_symbol) (_bfd_mips_elf_size_dynamic_sections) (_bfd_mips_vxworks_finish_dynamic_symbol): As above. * elfxx-sparc.c (_bfd_sparc_elf_adjust_dynamic_symbol) (_bfd_sparc_elf_size_dynamic_sections) (_bfd_sparc_elf_finish_dynamic_symbol): As above. * elfxx-tilegx.c (tilegx_elf_adjust_dynamic_symbol) (tilegx_elf_size_dynamic_sections) (tilegx_elf_finish_dynamic_symbol): As above. * elf32-mips.c (elf_backend_want_dynrelro): Define. * elf64-mips.c (elf_backend_want_dynrelro): Define. * elf32-sparc.c (elf_backend_want_dynrelro): Define. * elf64-sparc.c (elf_backend_want_dynrelro): Define. * elf32-tilegx.c (elf_backend_want_dynrelro): Define. * elf64-tilegx.c (elf_backend_want_dynrelro): Define. * elf32-microblaze.c (microblaze_elf_adjust_dynamic_symbol): Tidy. (microblaze_elf_size_dynamic_sections): Handle sdynbss. * elf32-nios2.c (nios2_elf32_size_dynamic_sections): Make use of linker shortcuts to dynamic sections rather than comparing names. Correctly set "got" flag. ld/ PR ld/20995 * testsuite/ld-arm/farcall-mixed-app-v5.d: Update to suit changed stub hash table traversal caused by section id increment. Accept the previous output too. * testsuite/ld-arm/farcall-mixed-app.d: Likewise. * testsuite/ld-arm/farcall-mixed-lib-v4t.d: Likewise. * testsuite/ld-arm/farcall-mixed-lib.d: Likewise. * testsuite/ld-elf/pr20995a.s, * testsuite/ld-elf/pr20995b.s, * testsuite/ld-elf/pr20995.r: New test. * testsuite/ld-elf/elf.exp: Run it.
2016-12-25 15:00:45 +01:00
asection *s;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
bfd_byte *loc;
/* This symbol needs a copy reloc. Set it up. */
if (h->dynindx == -1
|| (h->root.type != bfd_link_hash_defined
&& h->root.type != bfd_link_hash_defweak)
Put .dynbss and .rel.bss shortcuts in main elf hash table Also, create .rel{,a}.bss for PIEs on all targets, not just x86. * elf-bfd.h (struct elf_link_hash_table): Add sdynbss and srelbss. * elflink.c (_bfd_elf_create_dynamic_sections): Set them. Create .rel.bss/.rela.bss for executables, both PIE and non-PIE. * elf32-arc.c (struct elf_arc_link_hash_table): Delete srelbss. Use ELF hash table var throughout. * elf32-arm.c (struct elf32_arm_link_hash_table): Delete sdynbss and srelbss. Use ELF hash table vars throughout. * elf32-hppa.c (struct elf32_hppa_link_hash_table): Likewise. * elf32-i386.c (struct elf_i386_link_hash_table): Likewise. * elf32-metag.c (struct elf_metag_link_hash_table): Likewise. * elf32-microblaze.c (struct elf32_mb_link_hash_table): Likewise. * elf32-nios2.c (struct elf32_nios2_link_hash_table): Likewise. * elf32-or1k.c (struct elf_or1k_link_hash_table): Likewise. * elf32-ppc.c (struct ppc_elf_link_hash_table): Likewise. * elf32-s390.c (struct elf_s390_link_hash_table): Likewise. * elf32-tic6x.c (struct elf32_tic6x_link_hash_table): Likewise. * elf32-tilepro.c (struct tilepro_elf_link_hash_table): Likewise. * elf64-ppc.c (struct ppc_link_hash_table): Likewise. * elf64-s390.c (struct elf_s390_link_hash_table): Likewise. * elf64-x86-64.c (struct elf_x86_64_link_hash_table): Likewise. * elfnn-aarch64.c (struct elf_aarch64_link_hash_table): Likewise. * elfnn-riscv.c (struct riscv_elf_link_hash_table): Likewise. * elfxx-mips.c (struct mips_elf_link_hash_table): Likewise. * elfxx-sparc.h (struct _bfd_sparc_elf_link_hash_table): Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c (struct tilegx_elf_link_hash_table): Likewise. * elf32-arc.c (arc_elf_create_dynamic_sections): Delete. (elf_backend_create_dynamic_sections): Use base ELF version. * elf32-microblaze.c (microblaze_elf_create_dynamic_sections): Delete. (elf_backend_create_dynamic_sections): Use base ELF version. * elf32-or1k.c (or1k_elf_create_dynamic_sections): Delete. (elf_backend_create_dynamic_sections): Use base ELF version. * elf32-s390.c (elf_s390_create_dynamic_sections): Delete. (elf_backend_create_dynamic_sections): Use base ELF version. * elf64-ppc.c (ppc64_elf_create_dynamic_sections): Delete. (elf_backend_create_dynamic_sections): Use base ELF version. * elf64-s390.c (elf_s390_create_dynamic_sections): Delete. (elf_backend_create_dynamic_sections): Use base ELF version. * elf32-tilepro.c (tilepro_elf_create_dynamic_sections): Remove extraneous tests. * elfnn-aarch64.c (elfNN_aarch64_create_dynamic_sections): Likewise. * elfxx-mips.c (_bfd_mips_elf_create_dynamic_sections): Likewise. * elfxx-tilegx.c (tilegx_elf_create_dynamic_sections): Likewise. * elf32-i386.c (elf_i386_create_dynamic_sections): Don't create ".rel.bss" for executables. * elf64-x86-64.c (elf_x86_64_create_dynamic_sections): Don't create ".rela.bss" for executables. * elf32-nios2.c (nios2_elf32_create_dynamic_sections): Don't ignore return status from _bfd_elf_create_dynamic_sections.
2016-12-25 14:51:06 +01:00
|| htab->root.srelbss == NULL)
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
abort ();
rela.r_offset = (h->root.u.def.value
+ h->root.u.def.section->output_section->vma
+ h->root.u.def.section->output_offset);
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling bfd/ * bfd-in2.h: Re-generated. * elfnn-aarch64.c (HOWTO64, HOWTO32): New define. (IS_AARCH64_TLS_RELOC): Change to be based on the bfd reloc enumerators. (IS_AARCH64_TLSDESC_RELOC): Likewise. (PG, PG_OFFSET): Cast literal to bfd_vma. (elf64_aarch64_howto_table): Removed. (elf64_aarch64_howto_dynrelocs): Removed. (elf64_aarch64_tls_howto_table): Removed. (elf64_aarch64_tlsdesc_howto_table): Removed. (elfNN_aarch64_howto_table): New table to host all howto entires.. (R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*). (elfNN_aarch64_bfd_reloc_from_howto): New function. (elfNN_aarch64_bfd_reloc_from_type): Ditto. (struct elf_aarch64_reloc_map): New. (elf_aarch64_reloc_map): New table. (elfNN_aarch64_howto_from_bfd_reloc): New function. (elfNN_aarch64_howto_from_type): Update to look up the new table elfNN_aarch64_howto_table. (struct elf64_aarch64_reloc_map): Remove. (elf64_aarch64_reloc_map): Remove. (elfNN_aarch64_reloc_type_lookup): Change to call elfNN_aarch64_howto_from_bfd_reloc. (elfNN_aarch64_reloc_name_lookup): Change to look up the new table elfNN_aarch64_howto_table. (aarch64_resolve_relocation): Refactor to switch on the bfd reloc enumerators. (bfd_elf_aarch64_put_addend): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (aarch64_tls_transition_without_check): Likewise. (aarch64_reloc_got_type): Likewise. (aarch64_can_relax_tls): Likewise. (aarch64_tls_transition): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. (aarch64_tls_transition): Change to return a bfd reloc enumerator. * libbfd.h: Re-generated. * reloc.c: Re-order the AArch64 bfd reloc enumerators. (BFD_RELOC_AARCH64_RELOC_START) (BFD_RELOC_AARCH64_RELOC_END) (BFD_RELOC_AARCH64_LD_GOT_LO12_NC) (BFD_RELOC_AARCH64_LD32_GOT_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC) (BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC) (BFD_RELOC_AARCH64_IRELATIVE): New relocs. gas/ * config/tc-aarch64.c (reloc_table): Replace BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d: New file. * gas/aarch64/ilp32-basic.s: New file. include/elf/ * aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones. (R_AARCH64_IRELATIVE): New reloc.
2013-06-26 12:47:06 +02:00
rela.r_info = ELFNN_R_INFO (h->dynindx, AARCH64_R (COPY));
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
rela.r_addend = 0;
Don't make dynamic .data.rel.ro SEC_READONLY I'd made this dynamic section read-only so a flag test distinguished it from .dynbss, but like any other .data.rel.ro section it really should be marked read-write. (It is read-only after relocation, not before.) When using the standard linker scripts this usually doesn't matter since the output section is among other read-write sections and not page aligned. However, it might matter in the extraordinary case of the dynamic section being the only .data.rel.ro section with the output section just happening to be page aligned and a multiple of a page in size. In that case the output section would be read-only, and live it its own read-only PT_LOAD segment, which is incorrect. * elflink.c (_bfd_elf_create_dynamic_sections): Don't make dynamic .data.rel.ro read-only. * elf32-arm.c (elf32_arm_finish_dynamic_symbol): Compare section rather than section flags when deciding where copy reloc goes. * elf32-cris.c (elf_cris_finish_dynamic_symbol): Likewise. * elf32-hppa.c (elf32_hppa_finish_dynamic_symbol): Likewise. * elf32-i386.c (elf_i386_finish_dynamic_symbol): Likewise. * elf32-metag.c (elf_metag_finish_dynamic_symbol): Likewise. * elf32-microblaze.c (microblaze_elf_finish_dynamic_symbol): Likewise. * elf32-nios2.c (nios2_elf32_finish_dynamic_symbol): Likewise. * elf32-or1k.c (or1k_elf_finish_dynamic_symbol): Likewise. * elf32-ppc.c (ppc_elf_finish_dynamic_symbol): Likewise. * elf32-s390.c (elf_s390_finish_dynamic_symbol): Likewise. * elf32-tic6x.c (elf32_tic6x_finish_dynamic_symbol): Likewise. * elf32-tilepro.c (tilepro_elf_finish_dynamic_symbol): Likewise. * elf64-ppc.c (ppc64_elf_finish_dynamic_symbol): Likewise. * elf64-s390.c (elf_s390_finish_dynamic_symbol): Likewise. * elf64-x86-64.c (elf_x86_64_finish_dynamic_symbol): Likewise. * elfnn-aarch64.c (elfNN_aarch64_finish_dynamic_symbol): Likewise. * elfnn-riscv.c (riscv_elf_finish_dynamic_symbol): Likewise. * elfxx-mips.c (_bfd_mips_vxworks_finish_dynamic_symbol): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_finish_dynamic_symbol): Likewise. * elfxx-tilegx.c (tilegx_elf_finish_dynamic_symbol): Likewise.
2017-02-27 22:36:02 +01:00
if (h->root.u.def.section == htab->root.sdynrelro)
dynrelro section for read-only dynamic symbols copied into executable Variables defined in shared libraries are copied into an executable's .bss section when code in the executable is non-PIC and thus would require dynamic text relocations to access the variable directly in the shared library. Recent x86 toolchains also copy variables into the executable to gain a small speed improvement. The problem is that if the variable was originally read-only, the copy in .bss is writable, potentially opening a security hole. This patch cures that problem by putting the copy in a section that becomes read-only after ld.so relocation, provided -z relro is in force. The patch also fixes a microblaze linker segfault on attempting to use dynamic bss variables. bfd/ PR ld/20995 * elf-bfd.h (struct elf_link_hash_table): Add sdynrelro and sreldynrelro. (struct elf_backend_data): Add want_dynrelro. * elfxx-target.h (elf_backend_want_dynrelro): Define. (elfNN_bed): Update initializer. * elflink.c (_bfd_elf_create_dynamic_sections): Create sdynrelro and sreldynrelro sections. * elf32-arm.c (elf32_arm_adjust_dynamic_symbol): Place variables copied into the executable from read-only sections into sdynrelro. (elf32_arm_size_dynamic_sections): Handle sdynrelro. (elf32_arm_finish_dynamic_symbol): Select sreldynrelro for dynamic relocs in sdynrelro. (elf_backend_want_dynrelro): Define. * elf32-hppa.c (elf32_hppa_adjust_dynamic_symbol) (elf32_hppa_size_dynamic_sections, elf32_hppa_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf32-i386.c (elf_i386_adjust_dynamic_symbol) (elf_i386_size_dynamic_sections, elf_i386_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf32-metag.c (elf_metag_adjust_dynamic_symbol) (elf_metag_size_dynamic_sections, elf_metag_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf32-microblaze.c (microblaze_elf_adjust_dynamic_symbol) (microblaze_elf_size_dynamic_sections) (microblaze_elf_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf32-nios2.c (nios2_elf32_finish_dynamic_symbol) (nios2_elf32_adjust_dynamic_symbol) (nios2_elf32_size_dynamic_sections) (elf_backend_want_dynrelro): As above. * elf32-or1k.c (or1k_elf_finish_dynamic_symbol) (or1k_elf_adjust_dynamic_symbol, or1k_elf_size_dynamic_sections) (elf_backend_want_dynrelro): As above. * elf32-ppc.c (ppc_elf_adjust_dynamic_symbol) (ppc_elf_size_dynamic_sections, ppc_elf_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf32-s390.c (elf_s390_adjust_dynamic_symbol) (elf_s390_size_dynamic_sections, elf_s390_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf32-tic6x.c (elf32_tic6x_adjust_dynamic_symbol) (elf32_tic6x_size_dynamic_sections) (elf32_tic6x_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf32-tilepro.c (tilepro_elf_adjust_dynamic_symbol) (tilepro_elf_size_dynamic_sections) (tilepro_elf_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf64-ppc.c (ppc64_elf_adjust_dynamic_symbol) (ppc64_elf_size_dynamic_sections, ppc64_elf_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf64-s390.c (elf_s390_adjust_dynamic_symbol) (elf_s390_size_dynamic_sections, elf_s390_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf64-x86-64.c (elf_x86_64_adjust_dynamic_symbol) (elf_x86_64_size_dynamic_sections) (elf_x86_64_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elfnn-aarch64.c (elfNN_aarch64_adjust_dynamic_symbol) (elfNN_aarch64_size_dynamic_sections) (elfNN_aarch64_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elfnn-riscv.c (riscv_elf_adjust_dynamic_symbol) (riscv_elf_size_dynamic_sections, riscv_elf_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elfxx-mips.c (_bfd_mips_elf_adjust_dynamic_symbol) (_bfd_mips_elf_size_dynamic_sections) (_bfd_mips_vxworks_finish_dynamic_symbol): As above. * elfxx-sparc.c (_bfd_sparc_elf_adjust_dynamic_symbol) (_bfd_sparc_elf_size_dynamic_sections) (_bfd_sparc_elf_finish_dynamic_symbol): As above. * elfxx-tilegx.c (tilegx_elf_adjust_dynamic_symbol) (tilegx_elf_size_dynamic_sections) (tilegx_elf_finish_dynamic_symbol): As above. * elf32-mips.c (elf_backend_want_dynrelro): Define. * elf64-mips.c (elf_backend_want_dynrelro): Define. * elf32-sparc.c (elf_backend_want_dynrelro): Define. * elf64-sparc.c (elf_backend_want_dynrelro): Define. * elf32-tilegx.c (elf_backend_want_dynrelro): Define. * elf64-tilegx.c (elf_backend_want_dynrelro): Define. * elf32-microblaze.c (microblaze_elf_adjust_dynamic_symbol): Tidy. (microblaze_elf_size_dynamic_sections): Handle sdynbss. * elf32-nios2.c (nios2_elf32_size_dynamic_sections): Make use of linker shortcuts to dynamic sections rather than comparing names. Correctly set "got" flag. ld/ PR ld/20995 * testsuite/ld-arm/farcall-mixed-app-v5.d: Update to suit changed stub hash table traversal caused by section id increment. Accept the previous output too. * testsuite/ld-arm/farcall-mixed-app.d: Likewise. * testsuite/ld-arm/farcall-mixed-lib-v4t.d: Likewise. * testsuite/ld-arm/farcall-mixed-lib.d: Likewise. * testsuite/ld-elf/pr20995a.s, * testsuite/ld-elf/pr20995b.s, * testsuite/ld-elf/pr20995.r: New test. * testsuite/ld-elf/elf.exp: Run it.
2016-12-25 15:00:45 +01:00
s = htab->root.sreldynrelro;
else
s = htab->root.srelbss;
loc = s->contents + s->reloc_count++ * RELOC_SIZE (htab);
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
bfd_elfNN_swap_reloca_out (output_bfd, &rela, loc);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
}
/* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. SYM may
be NULL for local symbols. */
if (sym != NULL
Add hdynamic to elf_link_hash_table for _DYNAMIC * elf-bfd.h (elf_link_hash_table): Add hdynamic for the _DYNAMIC symbol. * elflink.c (_bfd_elf_link_create_dynamic_sections): Set hdynamic. * elf-m10300.c (_bfd_mn10300_elf_finish_dynamic_symbol): Check hdynamic instead of "_DYNAMIC". * elf32-arm.c (elf32_arm_finish_dynamic_symbol): Likewise. * elf32-cr16.c (elf32_arm_finish_dynamic_symbol): Likewise. * elf32-cris.c (elf_cris_finish_dynamic_symbol): Likewise. * elf32-hppa.c (elf32_hppa_finish_dynamic_symbol): Likewise. * elf32-i386.c (elf_i386_convert_mov_to_lea): Likewise. * elf32-lm32.c (lm32_elf_finish_dynamic_symbol): Likewise. * elf32-m32r.c (m32r_elf_finish_dynamic_symbol): Likewise. * elf32-s390.c (elf_s390_finish_dynamic_symbol): Likewise. * elf32-sh.c (sh_elf_finish_dynamic_symbol): Likewise. * elf32-tic6x.c (elf32_tic6x_finish_dynamic_symbol): Likewise. * elf32-tilepro.c (tilepro_elf_finish_dynamic_symbol): Likewise. * elf32-vax.c (elf_vax_finish_dynamic_symbol): Likewise. * elf32-xtensa.c (elf_xtensa_finish_dynamic_symbol): Likewise. * elf64-aarch64.c elf64_aarch64_finish_dynamic_symbol(): Likewise. * elf64-alpha.c (elf64_alpha_finish_dynamic_symbol): Likewise. * elf64-ia64-vms.c (elf64_ia64_finish_dynamic_symbol): Likewise. * elf64-s390.c (elf_s390_finish_dynamic_symbol): Likewise. * elf64-sh64.c (sh64_elf64_finish_dynamic_symbol): Likewise. * elf64-x86-64.c (elf_x86_64_convert_mov_to_lea): Likewise. * elfnn-ia64.c (elfNN_ia64_finish_dynamic_symbol): Likewise. * elfxx-mips.c (_bfd_mips_elf_finish_dynamic_symbol): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_finish_dynamic_symbol): Likewise. * elfxx-tilegx.c (tilegx_elf_finish_dynamic_symbol): Likewise. * elf32-microblaze.c (microblaze_elf_finish_dynamic_symbol): Check hdynamic, hgot, hplt instead of _DYNAMIC, _GLOBAL_OFFSET_TABLE_, _PROCEDURE_LINKAGE_TABLE_. * elf32-score.c (s3_bfd_score_elf_finish_dynamic_symbol): Likewise. * elf32-score7.c (s7_bfd_score_elf_finish_dynamic_symbol): Likewise.
2012-09-02 14:17:27 +02:00
&& (h == elf_hash_table (info)->hdynamic
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
|| h == elf_hash_table (info)->hgot))
sym->st_shndx = SHN_ABS;
return TRUE;
}
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
/* Finish up local dynamic symbol handling. We set the contents of
various dynamic sections here. */
static bfd_boolean
elfNN_aarch64_finish_local_dynamic_symbol (void **slot, void *inf)
{
struct elf_link_hash_entry *h
= (struct elf_link_hash_entry *) *slot;
struct bfd_link_info *info
= (struct bfd_link_info *) inf;
return elfNN_aarch64_finish_dynamic_symbol (info->output_bfd,
info, h, NULL);
}
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
static void
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_init_small_plt0_entry (bfd *output_bfd ATTRIBUTE_UNUSED,
struct elf_aarch64_link_hash_table
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
*htab)
{
/* Fill in PLT0. Fixme:RR Note this doesn't distinguish between
small and large plts and at the minute just generates
the small PLT. */
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
/* PLT0 of the small PLT looks like this in ELF64 -
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
stp x16, x30, [sp, #-16]! // Save the reloc and lr on stack.
adrp x16, PLT_GOT + 16 // Get the page base of the GOTPLT
ldr x17, [x16, #:lo12:PLT_GOT+16] // Load the address of the
// symbol resolver
add x16, x16, #:lo12:PLT_GOT+16 // Load the lo12 bits of the
// GOTPLT entry for this.
br x17
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
PLT0 will be slightly different in ELF32 due to different got entry
Fix AArch64 relocation handling in ILP32 mode. bfd * elfnn-aarch64.c: Fix relaxations for ILP32 mode. ld * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests. * testsuite/ld-aarch64/tls-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-all-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gd-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-3-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-le-ilp32.d: New test.
2017-01-23 18:07:13 +01:00
size. */
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
bfd_vma plt_got_2nd_ent; /* Address of GOT[2]. */
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
bfd_vma plt_base;
[BFD, LD, AArch64, 2/3] Add --force-bti to enable BTI and to select BTI enabled PLTs This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds a new ld command line option: --force-bti. In the presence of this option, the linker enables BTI with the GNU_PROPERTY_AARCH64_FEATURE_1_BTI feature. This gives out warning in case of missing gnu notes for BTI in inputs. 2) It also defines a new set of BTI enabled PLTs. These are used either when all the inputs are marked with GNU_PROPERTY_AARCH64_FEATURE_1_BTI or when the new --force-bti option is used. This required adding new fields in elf_aarch64_link_hash_table so that we could make the PLT related information more generic. 3) It also defines a dynamic tag DT_AARCH64_BTI_PLT. The linker uses this whenever it picks BTI enabled PLTs. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * bfd-in.h (aarch64_plt_type, aarch64_enable_bti_type): New. (aarch64_bti_pac_info): New. (bfd_elf64_aarch64_set_options): Add aarch64_bti_pac_info argument. (bfd_elf32_aarch64_set_options): Likewise. * bfd-in2.h: Regenerate * elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): New. (PLT_BTI_SMALL_ENTRY_SIZE, PLT_BTI_TLSDESC_ENTRY_SIZE): New. (elfNN_aarch64_small_plt0_bti_entry): New. (elfNN_aarch64_small_plt_bti_entry): New. (elfNN_aarch64_tlsdesc_small_plt_bti_entry): New. (elf_aarch64_obj_tdata): Add no_bti_warn and plt_type fields. (elf_aarch64_link_hash_table): Add plt0_entry, plt_entry and tlsdesc_plt_entry_size fields. (elfNN_aarch64_link_hash_table_create): Initialise the new fields. (setup_plt_values): New helper function. (bfd_elfNN_aarch64_set_options): Use new bp_info to set plt sizes and bti enable type. (elfNN_aarch64_allocate_dynrelocs): Use new size members instead of fixed macros. (elfNN_aarch64_size_dynamic_sections): Likewise and add checks. (elfNN_aarch64_create_small_pltn_entry): Use new generic pointers to plt stubs instead of fixed ones and update filling them according to the need for bti. (elfNN_aarch64_init_small_plt0_entry): Likewise. (elfNN_aarch64_finish_dynamic_sections): Likewise. (get_plt_type, elfNN_aarch64_get_synthetic_symtab): New. (elfNN_aarch64_plt_sym_val): Update size accordingly. (elfNN_aarch64_link_setup_gnu_properties): Set up plts if BTI GNU NOTE is set. (bfd_elfNN_get_synthetic_symtab): Define. (elfNN_aarch64_merge_gnu_properties): Give out warning with --force-bti and mising BTI NOTE SECTION. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * readelf.c (get_aarch64_dynamic_type): New. (get_dynamic_type): Use above for EM_AARCH64. (dynamic_section_aarch64_val): New. (process_dynamic_section): Use above for EM_AARCH64. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * elf/aarch64.h (DT_AARCH64_BTI_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * NEWS: Document --force-bti. * emultempl/aarch64elf.em (plt_type, bti_type, OPTION_FORCE_BTI): New. (PARSE_AND_LIST_SHORTOPTS, PARSE_AND_LIST_OPTIONS): Add force-bti. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FORCE_BTI. * testsuite/ld-aarch64/aarch64-elf.exp: Add all the tests below. * testsuite/ld-aarch64/bti-plt-1.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: New test. * testsuite/ld-aarch64/bti-plt-2.s: New test. * testsuite/ld-aarch64/bti-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-3.d: New test. * testsuite/ld-aarch64/bti-plt-4.d: New test. * testsuite/ld-aarch64/bti-plt-5.d: New test. * testsuite/ld-aarch64/bti-plt-6.d: New test. * testsuite/ld-aarch64/bti-plt-7.d: New test. * testsuite/ld-aarch64/bti-plt-so.s: New test. * testsuite/ld-aarch64/bti-plt.ld: New test.
2019-03-13 11:54:30 +01:00
memcpy (htab->root.splt->contents, htab->plt0_entry,
htab->plt_header_size);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
elf_section_data (htab->root.splt->output_section)->this_hdr.sh_entsize =
[BFD, LD, AArch64, 2/3] Add --force-bti to enable BTI and to select BTI enabled PLTs This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds a new ld command line option: --force-bti. In the presence of this option, the linker enables BTI with the GNU_PROPERTY_AARCH64_FEATURE_1_BTI feature. This gives out warning in case of missing gnu notes for BTI in inputs. 2) It also defines a new set of BTI enabled PLTs. These are used either when all the inputs are marked with GNU_PROPERTY_AARCH64_FEATURE_1_BTI or when the new --force-bti option is used. This required adding new fields in elf_aarch64_link_hash_table so that we could make the PLT related information more generic. 3) It also defines a dynamic tag DT_AARCH64_BTI_PLT. The linker uses this whenever it picks BTI enabled PLTs. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * bfd-in.h (aarch64_plt_type, aarch64_enable_bti_type): New. (aarch64_bti_pac_info): New. (bfd_elf64_aarch64_set_options): Add aarch64_bti_pac_info argument. (bfd_elf32_aarch64_set_options): Likewise. * bfd-in2.h: Regenerate * elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): New. (PLT_BTI_SMALL_ENTRY_SIZE, PLT_BTI_TLSDESC_ENTRY_SIZE): New. (elfNN_aarch64_small_plt0_bti_entry): New. (elfNN_aarch64_small_plt_bti_entry): New. (elfNN_aarch64_tlsdesc_small_plt_bti_entry): New. (elf_aarch64_obj_tdata): Add no_bti_warn and plt_type fields. (elf_aarch64_link_hash_table): Add plt0_entry, plt_entry and tlsdesc_plt_entry_size fields. (elfNN_aarch64_link_hash_table_create): Initialise the new fields. (setup_plt_values): New helper function. (bfd_elfNN_aarch64_set_options): Use new bp_info to set plt sizes and bti enable type. (elfNN_aarch64_allocate_dynrelocs): Use new size members instead of fixed macros. (elfNN_aarch64_size_dynamic_sections): Likewise and add checks. (elfNN_aarch64_create_small_pltn_entry): Use new generic pointers to plt stubs instead of fixed ones and update filling them according to the need for bti. (elfNN_aarch64_init_small_plt0_entry): Likewise. (elfNN_aarch64_finish_dynamic_sections): Likewise. (get_plt_type, elfNN_aarch64_get_synthetic_symtab): New. (elfNN_aarch64_plt_sym_val): Update size accordingly. (elfNN_aarch64_link_setup_gnu_properties): Set up plts if BTI GNU NOTE is set. (bfd_elfNN_get_synthetic_symtab): Define. (elfNN_aarch64_merge_gnu_properties): Give out warning with --force-bti and mising BTI NOTE SECTION. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * readelf.c (get_aarch64_dynamic_type): New. (get_dynamic_type): Use above for EM_AARCH64. (dynamic_section_aarch64_val): New. (process_dynamic_section): Use above for EM_AARCH64. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * elf/aarch64.h (DT_AARCH64_BTI_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * NEWS: Document --force-bti. * emultempl/aarch64elf.em (plt_type, bti_type, OPTION_FORCE_BTI): New. (PARSE_AND_LIST_SHORTOPTS, PARSE_AND_LIST_OPTIONS): Add force-bti. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FORCE_BTI. * testsuite/ld-aarch64/aarch64-elf.exp: Add all the tests below. * testsuite/ld-aarch64/bti-plt-1.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: New test. * testsuite/ld-aarch64/bti-plt-2.s: New test. * testsuite/ld-aarch64/bti-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-3.d: New test. * testsuite/ld-aarch64/bti-plt-4.d: New test. * testsuite/ld-aarch64/bti-plt-5.d: New test. * testsuite/ld-aarch64/bti-plt-6.d: New test. * testsuite/ld-aarch64/bti-plt-7.d: New test. * testsuite/ld-aarch64/bti-plt-so.s: New test. * testsuite/ld-aarch64/bti-plt.ld: New test.
2019-03-13 11:54:30 +01:00
htab->plt_header_size;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
plt_got_2nd_ent = (htab->root.sgotplt->output_section->vma
+ htab->root.sgotplt->output_offset
+ GOT_ENTRY_SIZE * 2);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
plt_base = htab->root.splt->output_section->vma +
2014-01-14 Michael Hudson-Doyle <michael.hudson@linaro.org> Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org> bfd/ * elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Use correct offset while calculating relocation address. (elfNN_aarch64_create_small_pltn_entry): Likewise. (elfNN_aarch64_init_small_plt0_entry): Likewise.
2014-01-14 15:53:50 +01:00
htab->root.splt->output_offset;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
[BFD, LD, AArch64, 2/3] Add --force-bti to enable BTI and to select BTI enabled PLTs This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds a new ld command line option: --force-bti. In the presence of this option, the linker enables BTI with the GNU_PROPERTY_AARCH64_FEATURE_1_BTI feature. This gives out warning in case of missing gnu notes for BTI in inputs. 2) It also defines a new set of BTI enabled PLTs. These are used either when all the inputs are marked with GNU_PROPERTY_AARCH64_FEATURE_1_BTI or when the new --force-bti option is used. This required adding new fields in elf_aarch64_link_hash_table so that we could make the PLT related information more generic. 3) It also defines a dynamic tag DT_AARCH64_BTI_PLT. The linker uses this whenever it picks BTI enabled PLTs. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * bfd-in.h (aarch64_plt_type, aarch64_enable_bti_type): New. (aarch64_bti_pac_info): New. (bfd_elf64_aarch64_set_options): Add aarch64_bti_pac_info argument. (bfd_elf32_aarch64_set_options): Likewise. * bfd-in2.h: Regenerate * elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): New. (PLT_BTI_SMALL_ENTRY_SIZE, PLT_BTI_TLSDESC_ENTRY_SIZE): New. (elfNN_aarch64_small_plt0_bti_entry): New. (elfNN_aarch64_small_plt_bti_entry): New. (elfNN_aarch64_tlsdesc_small_plt_bti_entry): New. (elf_aarch64_obj_tdata): Add no_bti_warn and plt_type fields. (elf_aarch64_link_hash_table): Add plt0_entry, plt_entry and tlsdesc_plt_entry_size fields. (elfNN_aarch64_link_hash_table_create): Initialise the new fields. (setup_plt_values): New helper function. (bfd_elfNN_aarch64_set_options): Use new bp_info to set plt sizes and bti enable type. (elfNN_aarch64_allocate_dynrelocs): Use new size members instead of fixed macros. (elfNN_aarch64_size_dynamic_sections): Likewise and add checks. (elfNN_aarch64_create_small_pltn_entry): Use new generic pointers to plt stubs instead of fixed ones and update filling them according to the need for bti. (elfNN_aarch64_init_small_plt0_entry): Likewise. (elfNN_aarch64_finish_dynamic_sections): Likewise. (get_plt_type, elfNN_aarch64_get_synthetic_symtab): New. (elfNN_aarch64_plt_sym_val): Update size accordingly. (elfNN_aarch64_link_setup_gnu_properties): Set up plts if BTI GNU NOTE is set. (bfd_elfNN_get_synthetic_symtab): Define. (elfNN_aarch64_merge_gnu_properties): Give out warning with --force-bti and mising BTI NOTE SECTION. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * readelf.c (get_aarch64_dynamic_type): New. (get_dynamic_type): Use above for EM_AARCH64. (dynamic_section_aarch64_val): New. (process_dynamic_section): Use above for EM_AARCH64. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * elf/aarch64.h (DT_AARCH64_BTI_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * NEWS: Document --force-bti. * emultempl/aarch64elf.em (plt_type, bti_type, OPTION_FORCE_BTI): New. (PARSE_AND_LIST_SHORTOPTS, PARSE_AND_LIST_OPTIONS): Add force-bti. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FORCE_BTI. * testsuite/ld-aarch64/aarch64-elf.exp: Add all the tests below. * testsuite/ld-aarch64/bti-plt-1.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: New test. * testsuite/ld-aarch64/bti-plt-2.s: New test. * testsuite/ld-aarch64/bti-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-3.d: New test. * testsuite/ld-aarch64/bti-plt-4.d: New test. * testsuite/ld-aarch64/bti-plt-5.d: New test. * testsuite/ld-aarch64/bti-plt-6.d: New test. * testsuite/ld-aarch64/bti-plt-7.d: New test. * testsuite/ld-aarch64/bti-plt-so.s: New test. * testsuite/ld-aarch64/bti-plt.ld: New test.
2019-03-13 11:54:30 +01:00
/* First instruction in BTI enabled PLT stub is a BTI
instruction so skip it. */
bfd_byte *plt0_entry = htab->root.splt->contents;
if (elf_aarch64_tdata (output_bfd)->plt_type & PLT_BTI)
plt0_entry = plt0_entry + 4;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* Fill in the top 21 bits for this: ADRP x16, PLT_GOT + n * 8.
ADRP: ((PG(S+A)-PG(P)) >> 12) & 0x1fffff */
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
elf_aarch64_update_plt_entry (output_bfd, BFD_RELOC_AARCH64_ADR_HI21_PCREL,
[BFD, LD, AArch64, 2/3] Add --force-bti to enable BTI and to select BTI enabled PLTs This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds a new ld command line option: --force-bti. In the presence of this option, the linker enables BTI with the GNU_PROPERTY_AARCH64_FEATURE_1_BTI feature. This gives out warning in case of missing gnu notes for BTI in inputs. 2) It also defines a new set of BTI enabled PLTs. These are used either when all the inputs are marked with GNU_PROPERTY_AARCH64_FEATURE_1_BTI or when the new --force-bti option is used. This required adding new fields in elf_aarch64_link_hash_table so that we could make the PLT related information more generic. 3) It also defines a dynamic tag DT_AARCH64_BTI_PLT. The linker uses this whenever it picks BTI enabled PLTs. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * bfd-in.h (aarch64_plt_type, aarch64_enable_bti_type): New. (aarch64_bti_pac_info): New. (bfd_elf64_aarch64_set_options): Add aarch64_bti_pac_info argument. (bfd_elf32_aarch64_set_options): Likewise. * bfd-in2.h: Regenerate * elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): New. (PLT_BTI_SMALL_ENTRY_SIZE, PLT_BTI_TLSDESC_ENTRY_SIZE): New. (elfNN_aarch64_small_plt0_bti_entry): New. (elfNN_aarch64_small_plt_bti_entry): New. (elfNN_aarch64_tlsdesc_small_plt_bti_entry): New. (elf_aarch64_obj_tdata): Add no_bti_warn and plt_type fields. (elf_aarch64_link_hash_table): Add plt0_entry, plt_entry and tlsdesc_plt_entry_size fields. (elfNN_aarch64_link_hash_table_create): Initialise the new fields. (setup_plt_values): New helper function. (bfd_elfNN_aarch64_set_options): Use new bp_info to set plt sizes and bti enable type. (elfNN_aarch64_allocate_dynrelocs): Use new size members instead of fixed macros. (elfNN_aarch64_size_dynamic_sections): Likewise and add checks. (elfNN_aarch64_create_small_pltn_entry): Use new generic pointers to plt stubs instead of fixed ones and update filling them according to the need for bti. (elfNN_aarch64_init_small_plt0_entry): Likewise. (elfNN_aarch64_finish_dynamic_sections): Likewise. (get_plt_type, elfNN_aarch64_get_synthetic_symtab): New. (elfNN_aarch64_plt_sym_val): Update size accordingly. (elfNN_aarch64_link_setup_gnu_properties): Set up plts if BTI GNU NOTE is set. (bfd_elfNN_get_synthetic_symtab): Define. (elfNN_aarch64_merge_gnu_properties): Give out warning with --force-bti and mising BTI NOTE SECTION. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * readelf.c (get_aarch64_dynamic_type): New. (get_dynamic_type): Use above for EM_AARCH64. (dynamic_section_aarch64_val): New. (process_dynamic_section): Use above for EM_AARCH64. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * elf/aarch64.h (DT_AARCH64_BTI_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * NEWS: Document --force-bti. * emultempl/aarch64elf.em (plt_type, bti_type, OPTION_FORCE_BTI): New. (PARSE_AND_LIST_SHORTOPTS, PARSE_AND_LIST_OPTIONS): Add force-bti. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FORCE_BTI. * testsuite/ld-aarch64/aarch64-elf.exp: Add all the tests below. * testsuite/ld-aarch64/bti-plt-1.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: New test. * testsuite/ld-aarch64/bti-plt-2.s: New test. * testsuite/ld-aarch64/bti-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-3.d: New test. * testsuite/ld-aarch64/bti-plt-4.d: New test. * testsuite/ld-aarch64/bti-plt-5.d: New test. * testsuite/ld-aarch64/bti-plt-6.d: New test. * testsuite/ld-aarch64/bti-plt-7.d: New test. * testsuite/ld-aarch64/bti-plt-so.s: New test. * testsuite/ld-aarch64/bti-plt.ld: New test.
2019-03-13 11:54:30 +01:00
plt0_entry + 4,
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
PG (plt_got_2nd_ent) - PG (plt_base + 4));
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
elf_aarch64_update_plt_entry (output_bfd, BFD_RELOC_AARCH64_LDSTNN_LO12,
[BFD, LD, AArch64, 2/3] Add --force-bti to enable BTI and to select BTI enabled PLTs This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds a new ld command line option: --force-bti. In the presence of this option, the linker enables BTI with the GNU_PROPERTY_AARCH64_FEATURE_1_BTI feature. This gives out warning in case of missing gnu notes for BTI in inputs. 2) It also defines a new set of BTI enabled PLTs. These are used either when all the inputs are marked with GNU_PROPERTY_AARCH64_FEATURE_1_BTI or when the new --force-bti option is used. This required adding new fields in elf_aarch64_link_hash_table so that we could make the PLT related information more generic. 3) It also defines a dynamic tag DT_AARCH64_BTI_PLT. The linker uses this whenever it picks BTI enabled PLTs. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * bfd-in.h (aarch64_plt_type, aarch64_enable_bti_type): New. (aarch64_bti_pac_info): New. (bfd_elf64_aarch64_set_options): Add aarch64_bti_pac_info argument. (bfd_elf32_aarch64_set_options): Likewise. * bfd-in2.h: Regenerate * elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): New. (PLT_BTI_SMALL_ENTRY_SIZE, PLT_BTI_TLSDESC_ENTRY_SIZE): New. (elfNN_aarch64_small_plt0_bti_entry): New. (elfNN_aarch64_small_plt_bti_entry): New. (elfNN_aarch64_tlsdesc_small_plt_bti_entry): New. (elf_aarch64_obj_tdata): Add no_bti_warn and plt_type fields. (elf_aarch64_link_hash_table): Add plt0_entry, plt_entry and tlsdesc_plt_entry_size fields. (elfNN_aarch64_link_hash_table_create): Initialise the new fields. (setup_plt_values): New helper function. (bfd_elfNN_aarch64_set_options): Use new bp_info to set plt sizes and bti enable type. (elfNN_aarch64_allocate_dynrelocs): Use new size members instead of fixed macros. (elfNN_aarch64_size_dynamic_sections): Likewise and add checks. (elfNN_aarch64_create_small_pltn_entry): Use new generic pointers to plt stubs instead of fixed ones and update filling them according to the need for bti. (elfNN_aarch64_init_small_plt0_entry): Likewise. (elfNN_aarch64_finish_dynamic_sections): Likewise. (get_plt_type, elfNN_aarch64_get_synthetic_symtab): New. (elfNN_aarch64_plt_sym_val): Update size accordingly. (elfNN_aarch64_link_setup_gnu_properties): Set up plts if BTI GNU NOTE is set. (bfd_elfNN_get_synthetic_symtab): Define. (elfNN_aarch64_merge_gnu_properties): Give out warning with --force-bti and mising BTI NOTE SECTION. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * readelf.c (get_aarch64_dynamic_type): New. (get_dynamic_type): Use above for EM_AARCH64. (dynamic_section_aarch64_val): New. (process_dynamic_section): Use above for EM_AARCH64. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * elf/aarch64.h (DT_AARCH64_BTI_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * NEWS: Document --force-bti. * emultempl/aarch64elf.em (plt_type, bti_type, OPTION_FORCE_BTI): New. (PARSE_AND_LIST_SHORTOPTS, PARSE_AND_LIST_OPTIONS): Add force-bti. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FORCE_BTI. * testsuite/ld-aarch64/aarch64-elf.exp: Add all the tests below. * testsuite/ld-aarch64/bti-plt-1.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: New test. * testsuite/ld-aarch64/bti-plt-2.s: New test. * testsuite/ld-aarch64/bti-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-3.d: New test. * testsuite/ld-aarch64/bti-plt-4.d: New test. * testsuite/ld-aarch64/bti-plt-5.d: New test. * testsuite/ld-aarch64/bti-plt-6.d: New test. * testsuite/ld-aarch64/bti-plt-7.d: New test. * testsuite/ld-aarch64/bti-plt-so.s: New test. * testsuite/ld-aarch64/bti-plt.ld: New test.
2019-03-13 11:54:30 +01:00
plt0_entry + 8,
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
PG_OFFSET (plt_got_2nd_ent));
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
elf_aarch64_update_plt_entry (output_bfd, BFD_RELOC_AARCH64_ADD_LO12,
[BFD, LD, AArch64, 2/3] Add --force-bti to enable BTI and to select BTI enabled PLTs This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds a new ld command line option: --force-bti. In the presence of this option, the linker enables BTI with the GNU_PROPERTY_AARCH64_FEATURE_1_BTI feature. This gives out warning in case of missing gnu notes for BTI in inputs. 2) It also defines a new set of BTI enabled PLTs. These are used either when all the inputs are marked with GNU_PROPERTY_AARCH64_FEATURE_1_BTI or when the new --force-bti option is used. This required adding new fields in elf_aarch64_link_hash_table so that we could make the PLT related information more generic. 3) It also defines a dynamic tag DT_AARCH64_BTI_PLT. The linker uses this whenever it picks BTI enabled PLTs. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * bfd-in.h (aarch64_plt_type, aarch64_enable_bti_type): New. (aarch64_bti_pac_info): New. (bfd_elf64_aarch64_set_options): Add aarch64_bti_pac_info argument. (bfd_elf32_aarch64_set_options): Likewise. * bfd-in2.h: Regenerate * elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): New. (PLT_BTI_SMALL_ENTRY_SIZE, PLT_BTI_TLSDESC_ENTRY_SIZE): New. (elfNN_aarch64_small_plt0_bti_entry): New. (elfNN_aarch64_small_plt_bti_entry): New. (elfNN_aarch64_tlsdesc_small_plt_bti_entry): New. (elf_aarch64_obj_tdata): Add no_bti_warn and plt_type fields. (elf_aarch64_link_hash_table): Add plt0_entry, plt_entry and tlsdesc_plt_entry_size fields. (elfNN_aarch64_link_hash_table_create): Initialise the new fields. (setup_plt_values): New helper function. (bfd_elfNN_aarch64_set_options): Use new bp_info to set plt sizes and bti enable type. (elfNN_aarch64_allocate_dynrelocs): Use new size members instead of fixed macros. (elfNN_aarch64_size_dynamic_sections): Likewise and add checks. (elfNN_aarch64_create_small_pltn_entry): Use new generic pointers to plt stubs instead of fixed ones and update filling them according to the need for bti. (elfNN_aarch64_init_small_plt0_entry): Likewise. (elfNN_aarch64_finish_dynamic_sections): Likewise. (get_plt_type, elfNN_aarch64_get_synthetic_symtab): New. (elfNN_aarch64_plt_sym_val): Update size accordingly. (elfNN_aarch64_link_setup_gnu_properties): Set up plts if BTI GNU NOTE is set. (bfd_elfNN_get_synthetic_symtab): Define. (elfNN_aarch64_merge_gnu_properties): Give out warning with --force-bti and mising BTI NOTE SECTION. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * readelf.c (get_aarch64_dynamic_type): New. (get_dynamic_type): Use above for EM_AARCH64. (dynamic_section_aarch64_val): New. (process_dynamic_section): Use above for EM_AARCH64. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * elf/aarch64.h (DT_AARCH64_BTI_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * NEWS: Document --force-bti. * emultempl/aarch64elf.em (plt_type, bti_type, OPTION_FORCE_BTI): New. (PARSE_AND_LIST_SHORTOPTS, PARSE_AND_LIST_OPTIONS): Add force-bti. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FORCE_BTI. * testsuite/ld-aarch64/aarch64-elf.exp: Add all the tests below. * testsuite/ld-aarch64/bti-plt-1.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: New test. * testsuite/ld-aarch64/bti-plt-2.s: New test. * testsuite/ld-aarch64/bti-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-3.d: New test. * testsuite/ld-aarch64/bti-plt-4.d: New test. * testsuite/ld-aarch64/bti-plt-5.d: New test. * testsuite/ld-aarch64/bti-plt-6.d: New test. * testsuite/ld-aarch64/bti-plt-7.d: New test. * testsuite/ld-aarch64/bti-plt-so.s: New test. * testsuite/ld-aarch64/bti-plt.ld: New test.
2019-03-13 11:54:30 +01:00
plt0_entry + 12,
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
PG_OFFSET (plt_got_2nd_ent));
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
}
static bfd_boolean
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_finish_dynamic_sections (bfd *output_bfd,
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
struct bfd_link_info *info)
{
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
struct elf_aarch64_link_hash_table *htab;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
bfd *dynobj;
asection *sdyn;
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
htab = elf_aarch64_hash_table (info);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
dynobj = htab->root.dynobj;
sdyn = bfd_get_linker_section (dynobj, ".dynamic");
if (htab->root.dynamic_sections_created)
{
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
ElfNN_External_Dyn *dyncon, *dynconend;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
if (sdyn == NULL || htab->root.sgot == NULL)
abort ();
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
dyncon = (ElfNN_External_Dyn *) sdyn->contents;
dynconend = (ElfNN_External_Dyn *) (sdyn->contents + sdyn->size);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
for (; dyncon < dynconend; dyncon++)
{
Elf_Internal_Dyn dyn;
asection *s;
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
bfd_elfNN_swap_dyn_in (dynobj, dyncon, &dyn);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
switch (dyn.d_tag)
{
default:
continue;
case DT_PLTGOT:
s = htab->root.sgotplt;
dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
break;
case DT_JMPREL:
Set dynamic tag VMA and size from dynamic section when possible Rather than searching the output for a specific named section, it's better, where possible, to use a linker created dynamic section to set a dynamic tag's value. That way ld doesn't depend on the output section name, making it possibile to map dynamic sections differently. bfd/ * elf-m10300.c (_bfd_mn10300_elf_finish_dynamic_sections): Use linker dynamic sections in calculating size and address of * dynamic tags rather than using output sections. Remove asserts. * elf32-arm.c (elf32_arm_finish_dynamic_sections): Likewise. * elf32-cr16.c (_bfd_cr16_elf_finish_dynamic_sections): Likewise. * elf32-cris.c (elf_cris_finish_dynamic_sections): Likewise. * elf32-i370.c (i370_elf_finish_dynamic_sections): Likewise. * elf32-lm32.c (lm32_elf_finish_dynamic_sections): Likewise. * elf32-m32r.c (m32r_elf_finish_dynamic_sections): Likewise. * elf32-m68k.c (elf_m68k_finish_dynamic_sections): Likewise. * elf32-metag.c (elf_metag_finish_dynamic_sections): Likewise. * elf32-microblaze.c (microblaze_elf_finish_dynamic_sections): Likewise. * elf32-nds32.c (nds32_elf_finish_dynamic_sections): Likewise. * elf32-nios2.c (nios2_elf32_finish_dynamic_sections): Likewise. * elf32-or1k.c (or1k_elf_finish_dynamic_sections): Likewise. * elf32-s390.c (elf_s390_finish_dynamic_sections): Likewise. * elf32-score.c (s3_bfd_score_elf_finish_dynamic_sections): Likewise. * elf32-score7.c (s7_bfd_score_elf_finish_dynamic_sections): Likewise. * elf32-vax.c (elf_vax_finish_dynamic_sections): Likewise. * elf32-xtensa.c (elf_xtensa_finish_dynamic_sections): Likewise. * elf64-alpha.c (elf64_alpha_finish_dynamic_sections): Likewise. * elf64-s390.c (elf_s390_finish_dynamic_sections): Likewise. * elf64-sh64.c (sh64_elf64_finish_dynamic_sections): Likewise. * elflink.c (bfd_elf_final_link): Likewise. * elfxx-mips.c (_bfd_mips_elf_finish_dynamic_sections): Likewise. * elfxx-sparc.c (sparc_finish_dyn): Likewise. Adjust error message. * elf32-arc.c (GET_SYMBOL_OR_SECTION): Remove ASSERT arg and don't set doit. Look up dynobj section. (elf_arc_finish_dynamic_sections): Adjust GET_SYMBOL_OR_SECTION invocation and dynamic tag vma calculation. Don't test boolean var == TRUE. * elfnn-aarch64.c (elfNN_aarch64_finish_dynamic_sections): Fix DT_JMPREL calc. ld/ * testsuite/ld-arm/arm-elf.exp: Adjust for arm-no-rel-plt now passing. Use different output file name for static app without .rel.plt. * testsuite/ld-arm/arm-no-rel-plt.ld: Align .rel.dyn and .rela.dyn. * testsuite/ld-arm/arm-no-rel-plt.out: Delete. * testsuite/ld-arm/arm-no-rel-plt.r: New. * testsuite/ld-arm/arm-static-app.d: Don't check file name. * testsuite/ld-arm/arm-static-app.r: Likewise.
2016-05-13 04:18:56 +02:00
s = htab->root.srelplt;
dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
break;
case DT_PLTRELSZ:
bfd/elfnn-aarch64.c: Fix calculation of DT_RELASZ The current code subtracts the size of the output section containing relplt from RELASZ. In some cases this will be the same output section as the dynamic relocs causing a value of zero to be output. Calculating the size from input sections seems to make more sense. bfd/ChangeLog: 2014-03-25 Will Newton <will.newton@linaro.org> * elfnn-aarch64.c (elfNN_aarch64_finish_dynamic_sections): Set value of DT_PLTRELSZ and DT_RELASZ based on the size of input sections rather than output sections. ld/testsuite/ChangeLog: 2014-03-25 Will Newton <will.newton@linaro.org> * ld-aarch64/aarch64-elf.exp: Add relasz dump test. * ld-aarch64/relasz.d: New file. * ld-aarch64/relasz.s: Likewise.
2014-03-14 12:45:32 +01:00
s = htab->root.srelplt;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
dyn.d_un.d_val = s->size;
break;
case DT_TLSDESC_PLT:
s = htab->root.splt;
dyn.d_un.d_ptr = s->output_section->vma + s->output_offset
ELF: Move tlsdesc_plt/tlsdesc_got to elf_link_hash_table All ELF backends with TLS descriptor support have /* The offset into splt of the PLT entry for the TLS descriptor resolver. Special values are 0, if not necessary (or not found to be necessary yet), and -1 if needed but not determined yet. */ bfd_vma tlsdesc_plt; /* The GOT offset for the lazy trampoline. Communicated to the loader via DT_TLSDESC_GOT. The magic value (bfd_vma) -1 indicates an offset is not allocated. */ bfd_vma tlsdesc_got; in symbol hash entry. Move tlsdesc_plt/tlsdesc_got to elf_link_hash_entry to reduce code duplication. * elf-bfd.h (elf_link_hash_entry): Add tlsdesc_plt and tlsdesc_got. * elf32-arm.c (elf32_arm_link_hash_table): Remove tlsdesc_plt and dt_tlsdesc_got. (elf32_arm_size_dynamic_sections): Updated. Clear root.tlsdesc_plt for DF_BIND_NOW. (elf32_arm_finish_dynamic_sections): Updated. (elf32_arm_output_arch_local_syms): Likewise. * elf32-nds32.c (nds32_elf_size_dynamic_sections): Updated. Clear root.tlsdesc_plt for DF_BIND_NOW. (nds32_elf_finish_dynamic_sections): Updated. * elf32-nds32.h (elf_nds32_link_hash_table): Remove dt_tlsdesc_plt and dt_tlsdesc_got. * elf64-x86-64.c (elf_x86_64_finish_dynamic_sections): Updated. * elfnn-aarch64.c (elf_aarch64_link_hash_table): Remove tlsdesc_plt and dt_tlsdesc_got. (elfNN_aarch64_allocate_dynrelocs): Updated. (elfNN_aarch64_finish_dynamic_sections): Likewise. (elfNN_aarch64_size_dynamic_sections): Updated. Clear root.tlsdesc_plt for DF_BIND_NOW. Don't check DF_BIND_NOW twice. * elfxx-x86.c (elf_x86_allocate_dynrelocs): Updated. (_bfd_x86_elf_size_dynamic_sections): Likewise. (_bfd_x86_elf_finish_dynamic_sections): Likewise. * elfxx-x86.h (elf_x86_link_hash_table): Remove tlsdesc_plt and tlsdesc_got.
2020-06-08 13:24:04 +02:00
+ htab->root.tlsdesc_plt;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
break;
case DT_TLSDESC_GOT:
s = htab->root.sgot;
ELF: Move tlsdesc_plt/tlsdesc_got to elf_link_hash_table All ELF backends with TLS descriptor support have /* The offset into splt of the PLT entry for the TLS descriptor resolver. Special values are 0, if not necessary (or not found to be necessary yet), and -1 if needed but not determined yet. */ bfd_vma tlsdesc_plt; /* The GOT offset for the lazy trampoline. Communicated to the loader via DT_TLSDESC_GOT. The magic value (bfd_vma) -1 indicates an offset is not allocated. */ bfd_vma tlsdesc_got; in symbol hash entry. Move tlsdesc_plt/tlsdesc_got to elf_link_hash_entry to reduce code duplication. * elf-bfd.h (elf_link_hash_entry): Add tlsdesc_plt and tlsdesc_got. * elf32-arm.c (elf32_arm_link_hash_table): Remove tlsdesc_plt and dt_tlsdesc_got. (elf32_arm_size_dynamic_sections): Updated. Clear root.tlsdesc_plt for DF_BIND_NOW. (elf32_arm_finish_dynamic_sections): Updated. (elf32_arm_output_arch_local_syms): Likewise. * elf32-nds32.c (nds32_elf_size_dynamic_sections): Updated. Clear root.tlsdesc_plt for DF_BIND_NOW. (nds32_elf_finish_dynamic_sections): Updated. * elf32-nds32.h (elf_nds32_link_hash_table): Remove dt_tlsdesc_plt and dt_tlsdesc_got. * elf64-x86-64.c (elf_x86_64_finish_dynamic_sections): Updated. * elfnn-aarch64.c (elf_aarch64_link_hash_table): Remove tlsdesc_plt and dt_tlsdesc_got. (elfNN_aarch64_allocate_dynrelocs): Updated. (elfNN_aarch64_finish_dynamic_sections): Likewise. (elfNN_aarch64_size_dynamic_sections): Updated. Clear root.tlsdesc_plt for DF_BIND_NOW. Don't check DF_BIND_NOW twice. * elfxx-x86.c (elf_x86_allocate_dynrelocs): Updated. (_bfd_x86_elf_size_dynamic_sections): Likewise. (_bfd_x86_elf_finish_dynamic_sections): Likewise. * elfxx-x86.h (elf_x86_link_hash_table): Remove tlsdesc_plt and tlsdesc_got.
2020-06-08 13:24:04 +02:00
BFD_ASSERT (htab->root.tlsdesc_got != (bfd_vma)-1);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
dyn.d_un.d_ptr = s->output_section->vma + s->output_offset
ELF: Move tlsdesc_plt/tlsdesc_got to elf_link_hash_table All ELF backends with TLS descriptor support have /* The offset into splt of the PLT entry for the TLS descriptor resolver. Special values are 0, if not necessary (or not found to be necessary yet), and -1 if needed but not determined yet. */ bfd_vma tlsdesc_plt; /* The GOT offset for the lazy trampoline. Communicated to the loader via DT_TLSDESC_GOT. The magic value (bfd_vma) -1 indicates an offset is not allocated. */ bfd_vma tlsdesc_got; in symbol hash entry. Move tlsdesc_plt/tlsdesc_got to elf_link_hash_entry to reduce code duplication. * elf-bfd.h (elf_link_hash_entry): Add tlsdesc_plt and tlsdesc_got. * elf32-arm.c (elf32_arm_link_hash_table): Remove tlsdesc_plt and dt_tlsdesc_got. (elf32_arm_size_dynamic_sections): Updated. Clear root.tlsdesc_plt for DF_BIND_NOW. (elf32_arm_finish_dynamic_sections): Updated. (elf32_arm_output_arch_local_syms): Likewise. * elf32-nds32.c (nds32_elf_size_dynamic_sections): Updated. Clear root.tlsdesc_plt for DF_BIND_NOW. (nds32_elf_finish_dynamic_sections): Updated. * elf32-nds32.h (elf_nds32_link_hash_table): Remove dt_tlsdesc_plt and dt_tlsdesc_got. * elf64-x86-64.c (elf_x86_64_finish_dynamic_sections): Updated. * elfnn-aarch64.c (elf_aarch64_link_hash_table): Remove tlsdesc_plt and dt_tlsdesc_got. (elfNN_aarch64_allocate_dynrelocs): Updated. (elfNN_aarch64_finish_dynamic_sections): Likewise. (elfNN_aarch64_size_dynamic_sections): Updated. Clear root.tlsdesc_plt for DF_BIND_NOW. Don't check DF_BIND_NOW twice. * elfxx-x86.c (elf_x86_allocate_dynrelocs): Updated. (_bfd_x86_elf_size_dynamic_sections): Likewise. (_bfd_x86_elf_finish_dynamic_sections): Likewise. * elfxx-x86.h (elf_x86_link_hash_table): Remove tlsdesc_plt and tlsdesc_got.
2020-06-08 13:24:04 +02:00
+ htab->root.tlsdesc_got;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
break;
}
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
bfd_elfNN_swap_dyn_out (output_bfd, &dyn, dyncon);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
}
}
/* Fill in the special first entry in the procedure linkage table. */
if (htab->root.splt && htab->root.splt->size > 0)
{
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_init_small_plt0_entry (output_bfd, htab);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
elf_section_data (htab->root.splt->output_section)->
this_hdr.sh_entsize = htab->plt_entry_size;
ELF: Move tlsdesc_plt/tlsdesc_got to elf_link_hash_table All ELF backends with TLS descriptor support have /* The offset into splt of the PLT entry for the TLS descriptor resolver. Special values are 0, if not necessary (or not found to be necessary yet), and -1 if needed but not determined yet. */ bfd_vma tlsdesc_plt; /* The GOT offset for the lazy trampoline. Communicated to the loader via DT_TLSDESC_GOT. The magic value (bfd_vma) -1 indicates an offset is not allocated. */ bfd_vma tlsdesc_got; in symbol hash entry. Move tlsdesc_plt/tlsdesc_got to elf_link_hash_entry to reduce code duplication. * elf-bfd.h (elf_link_hash_entry): Add tlsdesc_plt and tlsdesc_got. * elf32-arm.c (elf32_arm_link_hash_table): Remove tlsdesc_plt and dt_tlsdesc_got. (elf32_arm_size_dynamic_sections): Updated. Clear root.tlsdesc_plt for DF_BIND_NOW. (elf32_arm_finish_dynamic_sections): Updated. (elf32_arm_output_arch_local_syms): Likewise. * elf32-nds32.c (nds32_elf_size_dynamic_sections): Updated. Clear root.tlsdesc_plt for DF_BIND_NOW. (nds32_elf_finish_dynamic_sections): Updated. * elf32-nds32.h (elf_nds32_link_hash_table): Remove dt_tlsdesc_plt and dt_tlsdesc_got. * elf64-x86-64.c (elf_x86_64_finish_dynamic_sections): Updated. * elfnn-aarch64.c (elf_aarch64_link_hash_table): Remove tlsdesc_plt and dt_tlsdesc_got. (elfNN_aarch64_allocate_dynrelocs): Updated. (elfNN_aarch64_finish_dynamic_sections): Likewise. (elfNN_aarch64_size_dynamic_sections): Updated. Clear root.tlsdesc_plt for DF_BIND_NOW. Don't check DF_BIND_NOW twice. * elfxx-x86.c (elf_x86_allocate_dynrelocs): Updated. (_bfd_x86_elf_size_dynamic_sections): Likewise. (_bfd_x86_elf_finish_dynamic_sections): Likewise. * elfxx-x86.h (elf_x86_link_hash_table): Remove tlsdesc_plt and tlsdesc_got.
2020-06-08 13:24:04 +02:00
if (htab->root.tlsdesc_plt && !(info->flags & DF_BIND_NOW))
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
ELF: Move tlsdesc_plt/tlsdesc_got to elf_link_hash_table All ELF backends with TLS descriptor support have /* The offset into splt of the PLT entry for the TLS descriptor resolver. Special values are 0, if not necessary (or not found to be necessary yet), and -1 if needed but not determined yet. */ bfd_vma tlsdesc_plt; /* The GOT offset for the lazy trampoline. Communicated to the loader via DT_TLSDESC_GOT. The magic value (bfd_vma) -1 indicates an offset is not allocated. */ bfd_vma tlsdesc_got; in symbol hash entry. Move tlsdesc_plt/tlsdesc_got to elf_link_hash_entry to reduce code duplication. * elf-bfd.h (elf_link_hash_entry): Add tlsdesc_plt and tlsdesc_got. * elf32-arm.c (elf32_arm_link_hash_table): Remove tlsdesc_plt and dt_tlsdesc_got. (elf32_arm_size_dynamic_sections): Updated. Clear root.tlsdesc_plt for DF_BIND_NOW. (elf32_arm_finish_dynamic_sections): Updated. (elf32_arm_output_arch_local_syms): Likewise. * elf32-nds32.c (nds32_elf_size_dynamic_sections): Updated. Clear root.tlsdesc_plt for DF_BIND_NOW. (nds32_elf_finish_dynamic_sections): Updated. * elf32-nds32.h (elf_nds32_link_hash_table): Remove dt_tlsdesc_plt and dt_tlsdesc_got. * elf64-x86-64.c (elf_x86_64_finish_dynamic_sections): Updated. * elfnn-aarch64.c (elf_aarch64_link_hash_table): Remove tlsdesc_plt and dt_tlsdesc_got. (elfNN_aarch64_allocate_dynrelocs): Updated. (elfNN_aarch64_finish_dynamic_sections): Likewise. (elfNN_aarch64_size_dynamic_sections): Updated. Clear root.tlsdesc_plt for DF_BIND_NOW. Don't check DF_BIND_NOW twice. * elfxx-x86.c (elf_x86_allocate_dynrelocs): Updated. (_bfd_x86_elf_size_dynamic_sections): Likewise. (_bfd_x86_elf_finish_dynamic_sections): Likewise. * elfxx-x86.h (elf_x86_link_hash_table): Remove tlsdesc_plt and tlsdesc_got.
2020-06-08 13:24:04 +02:00
BFD_ASSERT (htab->root.tlsdesc_got != (bfd_vma)-1);
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
bfd_put_NN (output_bfd, (bfd_vma) 0,
ELF: Move tlsdesc_plt/tlsdesc_got to elf_link_hash_table All ELF backends with TLS descriptor support have /* The offset into splt of the PLT entry for the TLS descriptor resolver. Special values are 0, if not necessary (or not found to be necessary yet), and -1 if needed but not determined yet. */ bfd_vma tlsdesc_plt; /* The GOT offset for the lazy trampoline. Communicated to the loader via DT_TLSDESC_GOT. The magic value (bfd_vma) -1 indicates an offset is not allocated. */ bfd_vma tlsdesc_got; in symbol hash entry. Move tlsdesc_plt/tlsdesc_got to elf_link_hash_entry to reduce code duplication. * elf-bfd.h (elf_link_hash_entry): Add tlsdesc_plt and tlsdesc_got. * elf32-arm.c (elf32_arm_link_hash_table): Remove tlsdesc_plt and dt_tlsdesc_got. (elf32_arm_size_dynamic_sections): Updated. Clear root.tlsdesc_plt for DF_BIND_NOW. (elf32_arm_finish_dynamic_sections): Updated. (elf32_arm_output_arch_local_syms): Likewise. * elf32-nds32.c (nds32_elf_size_dynamic_sections): Updated. Clear root.tlsdesc_plt for DF_BIND_NOW. (nds32_elf_finish_dynamic_sections): Updated. * elf32-nds32.h (elf_nds32_link_hash_table): Remove dt_tlsdesc_plt and dt_tlsdesc_got. * elf64-x86-64.c (elf_x86_64_finish_dynamic_sections): Updated. * elfnn-aarch64.c (elf_aarch64_link_hash_table): Remove tlsdesc_plt and dt_tlsdesc_got. (elfNN_aarch64_allocate_dynrelocs): Updated. (elfNN_aarch64_finish_dynamic_sections): Likewise. (elfNN_aarch64_size_dynamic_sections): Updated. Clear root.tlsdesc_plt for DF_BIND_NOW. Don't check DF_BIND_NOW twice. * elfxx-x86.c (elf_x86_allocate_dynrelocs): Updated. (_bfd_x86_elf_size_dynamic_sections): Likewise. (_bfd_x86_elf_finish_dynamic_sections): Likewise. * elfxx-x86.h (elf_x86_link_hash_table): Remove tlsdesc_plt and tlsdesc_got.
2020-06-08 13:24:04 +02:00
htab->root.sgot->contents + htab->root.tlsdesc_got);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
[BFD, LD, AArch64, 2/3] Add --force-bti to enable BTI and to select BTI enabled PLTs This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds a new ld command line option: --force-bti. In the presence of this option, the linker enables BTI with the GNU_PROPERTY_AARCH64_FEATURE_1_BTI feature. This gives out warning in case of missing gnu notes for BTI in inputs. 2) It also defines a new set of BTI enabled PLTs. These are used either when all the inputs are marked with GNU_PROPERTY_AARCH64_FEATURE_1_BTI or when the new --force-bti option is used. This required adding new fields in elf_aarch64_link_hash_table so that we could make the PLT related information more generic. 3) It also defines a dynamic tag DT_AARCH64_BTI_PLT. The linker uses this whenever it picks BTI enabled PLTs. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * bfd-in.h (aarch64_plt_type, aarch64_enable_bti_type): New. (aarch64_bti_pac_info): New. (bfd_elf64_aarch64_set_options): Add aarch64_bti_pac_info argument. (bfd_elf32_aarch64_set_options): Likewise. * bfd-in2.h: Regenerate * elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): New. (PLT_BTI_SMALL_ENTRY_SIZE, PLT_BTI_TLSDESC_ENTRY_SIZE): New. (elfNN_aarch64_small_plt0_bti_entry): New. (elfNN_aarch64_small_plt_bti_entry): New. (elfNN_aarch64_tlsdesc_small_plt_bti_entry): New. (elf_aarch64_obj_tdata): Add no_bti_warn and plt_type fields. (elf_aarch64_link_hash_table): Add plt0_entry, plt_entry and tlsdesc_plt_entry_size fields. (elfNN_aarch64_link_hash_table_create): Initialise the new fields. (setup_plt_values): New helper function. (bfd_elfNN_aarch64_set_options): Use new bp_info to set plt sizes and bti enable type. (elfNN_aarch64_allocate_dynrelocs): Use new size members instead of fixed macros. (elfNN_aarch64_size_dynamic_sections): Likewise and add checks. (elfNN_aarch64_create_small_pltn_entry): Use new generic pointers to plt stubs instead of fixed ones and update filling them according to the need for bti. (elfNN_aarch64_init_small_plt0_entry): Likewise. (elfNN_aarch64_finish_dynamic_sections): Likewise. (get_plt_type, elfNN_aarch64_get_synthetic_symtab): New. (elfNN_aarch64_plt_sym_val): Update size accordingly. (elfNN_aarch64_link_setup_gnu_properties): Set up plts if BTI GNU NOTE is set. (bfd_elfNN_get_synthetic_symtab): Define. (elfNN_aarch64_merge_gnu_properties): Give out warning with --force-bti and mising BTI NOTE SECTION. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * readelf.c (get_aarch64_dynamic_type): New. (get_dynamic_type): Use above for EM_AARCH64. (dynamic_section_aarch64_val): New. (process_dynamic_section): Use above for EM_AARCH64. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * elf/aarch64.h (DT_AARCH64_BTI_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * NEWS: Document --force-bti. * emultempl/aarch64elf.em (plt_type, bti_type, OPTION_FORCE_BTI): New. (PARSE_AND_LIST_SHORTOPTS, PARSE_AND_LIST_OPTIONS): Add force-bti. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FORCE_BTI. * testsuite/ld-aarch64/aarch64-elf.exp: Add all the tests below. * testsuite/ld-aarch64/bti-plt-1.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: New test. * testsuite/ld-aarch64/bti-plt-2.s: New test. * testsuite/ld-aarch64/bti-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-3.d: New test. * testsuite/ld-aarch64/bti-plt-4.d: New test. * testsuite/ld-aarch64/bti-plt-5.d: New test. * testsuite/ld-aarch64/bti-plt-6.d: New test. * testsuite/ld-aarch64/bti-plt-7.d: New test. * testsuite/ld-aarch64/bti-plt-so.s: New test. * testsuite/ld-aarch64/bti-plt.ld: New test.
2019-03-13 11:54:30 +01:00
const bfd_byte *entry = elfNN_aarch64_tlsdesc_small_plt_entry;
htab->tlsdesc_plt_entry_size = PLT_TLSDESC_ENTRY_SIZE;
aarch64_plt_type type = elf_aarch64_tdata (output_bfd)->plt_type;
[BFD, LD, AArch64, 3/3] Add --pac-plt to enable PLTs protected with PAC. This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds new definitions of PAC enabled PLTs and both BTI and PAC enabled PLTs. 2) It also defines the new dynamic tag DT_AARCH64_PAC_PLT for the PAC enabled PLTs. 3) This patch adds a new ld command line option: --pac-plt. In the presence of this option, the linker uses the PAC enabled PLTs and marks with DT_AARCH64_PAC_PLT. 4) In case both BTI and PAC are enabled the linker should pick PLTs enabled with both and also use dynamic tags for both. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * elfnn-aarch64.c (PLT_PAC_ENTRY_SIZE, PLT_PAC_SMALL_ENTRY_SIZE): New. (PLT_BTI_PAC_ENTRY_SIZE, PLT_BTI_PAC_SMALL_ENTRY_SIZE): New. (setup_plt_values): Account for PAC or PAC and BTI enabled PLTs. (elfNN_aarch64_size_dynamic_sections): Add checks for PLT_BTI_PAC and PLT_PAC_PLT. (elfNN_aarch64_finish_dynamic_sections): Account for PLT_BTI_PAC. (get_plt_type): Add case for DT_AARCH64_PAC_PLT. (elfNN_aarch64_plt_sym_val): Add cases for PLT_BTI_PAC and PLT_PAC. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * readelf.c (get_aarch64_dynamic_type): Add case for DT_AARCH64_PAC_PLT. (dynamic_section_aarch64_val): Likewise. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * elf/aarch64.h (DT_AARCH64_PAC_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * NEWS: Document --pac-plt. * emultempl/aarch64elf.em (OPTION_PAC_PLT): New. (PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS): Add pac-plt. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_PAC_PLT. * testsuite/ld-aarch64/aarch64-elf.exp: Add the following tests. * testsuite/ld-aarch64/bti-pac-plt-1.d: New test. * testsuite/ld-aarch64/bti-pac-plt-2.d: New test. * testsuite/ld-aarch64/pac-plt-1.d: New test. * testsuite/ld-aarch64/pac-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: Add .ifndef directive.
2019-03-13 12:09:10 +01:00
if (type == PLT_BTI || type == PLT_BTI_PAC)
[BFD, LD, AArch64, 2/3] Add --force-bti to enable BTI and to select BTI enabled PLTs This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds a new ld command line option: --force-bti. In the presence of this option, the linker enables BTI with the GNU_PROPERTY_AARCH64_FEATURE_1_BTI feature. This gives out warning in case of missing gnu notes for BTI in inputs. 2) It also defines a new set of BTI enabled PLTs. These are used either when all the inputs are marked with GNU_PROPERTY_AARCH64_FEATURE_1_BTI or when the new --force-bti option is used. This required adding new fields in elf_aarch64_link_hash_table so that we could make the PLT related information more generic. 3) It also defines a dynamic tag DT_AARCH64_BTI_PLT. The linker uses this whenever it picks BTI enabled PLTs. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * bfd-in.h (aarch64_plt_type, aarch64_enable_bti_type): New. (aarch64_bti_pac_info): New. (bfd_elf64_aarch64_set_options): Add aarch64_bti_pac_info argument. (bfd_elf32_aarch64_set_options): Likewise. * bfd-in2.h: Regenerate * elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): New. (PLT_BTI_SMALL_ENTRY_SIZE, PLT_BTI_TLSDESC_ENTRY_SIZE): New. (elfNN_aarch64_small_plt0_bti_entry): New. (elfNN_aarch64_small_plt_bti_entry): New. (elfNN_aarch64_tlsdesc_small_plt_bti_entry): New. (elf_aarch64_obj_tdata): Add no_bti_warn and plt_type fields. (elf_aarch64_link_hash_table): Add plt0_entry, plt_entry and tlsdesc_plt_entry_size fields. (elfNN_aarch64_link_hash_table_create): Initialise the new fields. (setup_plt_values): New helper function. (bfd_elfNN_aarch64_set_options): Use new bp_info to set plt sizes and bti enable type. (elfNN_aarch64_allocate_dynrelocs): Use new size members instead of fixed macros. (elfNN_aarch64_size_dynamic_sections): Likewise and add checks. (elfNN_aarch64_create_small_pltn_entry): Use new generic pointers to plt stubs instead of fixed ones and update filling them according to the need for bti. (elfNN_aarch64_init_small_plt0_entry): Likewise. (elfNN_aarch64_finish_dynamic_sections): Likewise. (get_plt_type, elfNN_aarch64_get_synthetic_symtab): New. (elfNN_aarch64_plt_sym_val): Update size accordingly. (elfNN_aarch64_link_setup_gnu_properties): Set up plts if BTI GNU NOTE is set. (bfd_elfNN_get_synthetic_symtab): Define. (elfNN_aarch64_merge_gnu_properties): Give out warning with --force-bti and mising BTI NOTE SECTION. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * readelf.c (get_aarch64_dynamic_type): New. (get_dynamic_type): Use above for EM_AARCH64. (dynamic_section_aarch64_val): New. (process_dynamic_section): Use above for EM_AARCH64. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * elf/aarch64.h (DT_AARCH64_BTI_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * NEWS: Document --force-bti. * emultempl/aarch64elf.em (plt_type, bti_type, OPTION_FORCE_BTI): New. (PARSE_AND_LIST_SHORTOPTS, PARSE_AND_LIST_OPTIONS): Add force-bti. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FORCE_BTI. * testsuite/ld-aarch64/aarch64-elf.exp: Add all the tests below. * testsuite/ld-aarch64/bti-plt-1.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: New test. * testsuite/ld-aarch64/bti-plt-2.s: New test. * testsuite/ld-aarch64/bti-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-3.d: New test. * testsuite/ld-aarch64/bti-plt-4.d: New test. * testsuite/ld-aarch64/bti-plt-5.d: New test. * testsuite/ld-aarch64/bti-plt-6.d: New test. * testsuite/ld-aarch64/bti-plt-7.d: New test. * testsuite/ld-aarch64/bti-plt-so.s: New test. * testsuite/ld-aarch64/bti-plt.ld: New test.
2019-03-13 11:54:30 +01:00
{
entry = elfNN_aarch64_tlsdesc_small_plt_bti_entry;
}
ELF: Move tlsdesc_plt/tlsdesc_got to elf_link_hash_table All ELF backends with TLS descriptor support have /* The offset into splt of the PLT entry for the TLS descriptor resolver. Special values are 0, if not necessary (or not found to be necessary yet), and -1 if needed but not determined yet. */ bfd_vma tlsdesc_plt; /* The GOT offset for the lazy trampoline. Communicated to the loader via DT_TLSDESC_GOT. The magic value (bfd_vma) -1 indicates an offset is not allocated. */ bfd_vma tlsdesc_got; in symbol hash entry. Move tlsdesc_plt/tlsdesc_got to elf_link_hash_entry to reduce code duplication. * elf-bfd.h (elf_link_hash_entry): Add tlsdesc_plt and tlsdesc_got. * elf32-arm.c (elf32_arm_link_hash_table): Remove tlsdesc_plt and dt_tlsdesc_got. (elf32_arm_size_dynamic_sections): Updated. Clear root.tlsdesc_plt for DF_BIND_NOW. (elf32_arm_finish_dynamic_sections): Updated. (elf32_arm_output_arch_local_syms): Likewise. * elf32-nds32.c (nds32_elf_size_dynamic_sections): Updated. Clear root.tlsdesc_plt for DF_BIND_NOW. (nds32_elf_finish_dynamic_sections): Updated. * elf32-nds32.h (elf_nds32_link_hash_table): Remove dt_tlsdesc_plt and dt_tlsdesc_got. * elf64-x86-64.c (elf_x86_64_finish_dynamic_sections): Updated. * elfnn-aarch64.c (elf_aarch64_link_hash_table): Remove tlsdesc_plt and dt_tlsdesc_got. (elfNN_aarch64_allocate_dynrelocs): Updated. (elfNN_aarch64_finish_dynamic_sections): Likewise. (elfNN_aarch64_size_dynamic_sections): Updated. Clear root.tlsdesc_plt for DF_BIND_NOW. Don't check DF_BIND_NOW twice. * elfxx-x86.c (elf_x86_allocate_dynrelocs): Updated. (_bfd_x86_elf_size_dynamic_sections): Likewise. (_bfd_x86_elf_finish_dynamic_sections): Likewise. * elfxx-x86.h (elf_x86_link_hash_table): Remove tlsdesc_plt and tlsdesc_got.
2020-06-08 13:24:04 +02:00
memcpy (htab->root.splt->contents + htab->root.tlsdesc_plt,
[BFD, LD, AArch64, 2/3] Add --force-bti to enable BTI and to select BTI enabled PLTs This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds a new ld command line option: --force-bti. In the presence of this option, the linker enables BTI with the GNU_PROPERTY_AARCH64_FEATURE_1_BTI feature. This gives out warning in case of missing gnu notes for BTI in inputs. 2) It also defines a new set of BTI enabled PLTs. These are used either when all the inputs are marked with GNU_PROPERTY_AARCH64_FEATURE_1_BTI or when the new --force-bti option is used. This required adding new fields in elf_aarch64_link_hash_table so that we could make the PLT related information more generic. 3) It also defines a dynamic tag DT_AARCH64_BTI_PLT. The linker uses this whenever it picks BTI enabled PLTs. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * bfd-in.h (aarch64_plt_type, aarch64_enable_bti_type): New. (aarch64_bti_pac_info): New. (bfd_elf64_aarch64_set_options): Add aarch64_bti_pac_info argument. (bfd_elf32_aarch64_set_options): Likewise. * bfd-in2.h: Regenerate * elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): New. (PLT_BTI_SMALL_ENTRY_SIZE, PLT_BTI_TLSDESC_ENTRY_SIZE): New. (elfNN_aarch64_small_plt0_bti_entry): New. (elfNN_aarch64_small_plt_bti_entry): New. (elfNN_aarch64_tlsdesc_small_plt_bti_entry): New. (elf_aarch64_obj_tdata): Add no_bti_warn and plt_type fields. (elf_aarch64_link_hash_table): Add plt0_entry, plt_entry and tlsdesc_plt_entry_size fields. (elfNN_aarch64_link_hash_table_create): Initialise the new fields. (setup_plt_values): New helper function. (bfd_elfNN_aarch64_set_options): Use new bp_info to set plt sizes and bti enable type. (elfNN_aarch64_allocate_dynrelocs): Use new size members instead of fixed macros. (elfNN_aarch64_size_dynamic_sections): Likewise and add checks. (elfNN_aarch64_create_small_pltn_entry): Use new generic pointers to plt stubs instead of fixed ones and update filling them according to the need for bti. (elfNN_aarch64_init_small_plt0_entry): Likewise. (elfNN_aarch64_finish_dynamic_sections): Likewise. (get_plt_type, elfNN_aarch64_get_synthetic_symtab): New. (elfNN_aarch64_plt_sym_val): Update size accordingly. (elfNN_aarch64_link_setup_gnu_properties): Set up plts if BTI GNU NOTE is set. (bfd_elfNN_get_synthetic_symtab): Define. (elfNN_aarch64_merge_gnu_properties): Give out warning with --force-bti and mising BTI NOTE SECTION. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * readelf.c (get_aarch64_dynamic_type): New. (get_dynamic_type): Use above for EM_AARCH64. (dynamic_section_aarch64_val): New. (process_dynamic_section): Use above for EM_AARCH64. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * elf/aarch64.h (DT_AARCH64_BTI_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * NEWS: Document --force-bti. * emultempl/aarch64elf.em (plt_type, bti_type, OPTION_FORCE_BTI): New. (PARSE_AND_LIST_SHORTOPTS, PARSE_AND_LIST_OPTIONS): Add force-bti. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FORCE_BTI. * testsuite/ld-aarch64/aarch64-elf.exp: Add all the tests below. * testsuite/ld-aarch64/bti-plt-1.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: New test. * testsuite/ld-aarch64/bti-plt-2.s: New test. * testsuite/ld-aarch64/bti-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-3.d: New test. * testsuite/ld-aarch64/bti-plt-4.d: New test. * testsuite/ld-aarch64/bti-plt-5.d: New test. * testsuite/ld-aarch64/bti-plt-6.d: New test. * testsuite/ld-aarch64/bti-plt-7.d: New test. * testsuite/ld-aarch64/bti-plt-so.s: New test. * testsuite/ld-aarch64/bti-plt.ld: New test.
2019-03-13 11:54:30 +01:00
entry, htab->tlsdesc_plt_entry_size);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
bfd_vma adrp1_addr =
htab->root.splt->output_section->vma
ELF: Move tlsdesc_plt/tlsdesc_got to elf_link_hash_table All ELF backends with TLS descriptor support have /* The offset into splt of the PLT entry for the TLS descriptor resolver. Special values are 0, if not necessary (or not found to be necessary yet), and -1 if needed but not determined yet. */ bfd_vma tlsdesc_plt; /* The GOT offset for the lazy trampoline. Communicated to the loader via DT_TLSDESC_GOT. The magic value (bfd_vma) -1 indicates an offset is not allocated. */ bfd_vma tlsdesc_got; in symbol hash entry. Move tlsdesc_plt/tlsdesc_got to elf_link_hash_entry to reduce code duplication. * elf-bfd.h (elf_link_hash_entry): Add tlsdesc_plt and tlsdesc_got. * elf32-arm.c (elf32_arm_link_hash_table): Remove tlsdesc_plt and dt_tlsdesc_got. (elf32_arm_size_dynamic_sections): Updated. Clear root.tlsdesc_plt for DF_BIND_NOW. (elf32_arm_finish_dynamic_sections): Updated. (elf32_arm_output_arch_local_syms): Likewise. * elf32-nds32.c (nds32_elf_size_dynamic_sections): Updated. Clear root.tlsdesc_plt for DF_BIND_NOW. (nds32_elf_finish_dynamic_sections): Updated. * elf32-nds32.h (elf_nds32_link_hash_table): Remove dt_tlsdesc_plt and dt_tlsdesc_got. * elf64-x86-64.c (elf_x86_64_finish_dynamic_sections): Updated. * elfnn-aarch64.c (elf_aarch64_link_hash_table): Remove tlsdesc_plt and dt_tlsdesc_got. (elfNN_aarch64_allocate_dynrelocs): Updated. (elfNN_aarch64_finish_dynamic_sections): Likewise. (elfNN_aarch64_size_dynamic_sections): Updated. Clear root.tlsdesc_plt for DF_BIND_NOW. Don't check DF_BIND_NOW twice. * elfxx-x86.c (elf_x86_allocate_dynrelocs): Updated. (_bfd_x86_elf_size_dynamic_sections): Likewise. (_bfd_x86_elf_finish_dynamic_sections): Likewise. * elfxx-x86.h (elf_x86_link_hash_table): Remove tlsdesc_plt and tlsdesc_got.
2020-06-08 13:24:04 +02:00
+ htab->root.splt->output_offset
+ htab->root.tlsdesc_plt + 4;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
bfd_vma adrp2_addr = adrp1_addr + 4;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
bfd_vma got_addr =
htab->root.sgot->output_section->vma
+ htab->root.sgot->output_offset;
bfd_vma pltgot_addr =
htab->root.sgotplt->output_section->vma
+ htab->root.sgotplt->output_offset;
ELF: Move tlsdesc_plt/tlsdesc_got to elf_link_hash_table All ELF backends with TLS descriptor support have /* The offset into splt of the PLT entry for the TLS descriptor resolver. Special values are 0, if not necessary (or not found to be necessary yet), and -1 if needed but not determined yet. */ bfd_vma tlsdesc_plt; /* The GOT offset for the lazy trampoline. Communicated to the loader via DT_TLSDESC_GOT. The magic value (bfd_vma) -1 indicates an offset is not allocated. */ bfd_vma tlsdesc_got; in symbol hash entry. Move tlsdesc_plt/tlsdesc_got to elf_link_hash_entry to reduce code duplication. * elf-bfd.h (elf_link_hash_entry): Add tlsdesc_plt and tlsdesc_got. * elf32-arm.c (elf32_arm_link_hash_table): Remove tlsdesc_plt and dt_tlsdesc_got. (elf32_arm_size_dynamic_sections): Updated. Clear root.tlsdesc_plt for DF_BIND_NOW. (elf32_arm_finish_dynamic_sections): Updated. (elf32_arm_output_arch_local_syms): Likewise. * elf32-nds32.c (nds32_elf_size_dynamic_sections): Updated. Clear root.tlsdesc_plt for DF_BIND_NOW. (nds32_elf_finish_dynamic_sections): Updated. * elf32-nds32.h (elf_nds32_link_hash_table): Remove dt_tlsdesc_plt and dt_tlsdesc_got. * elf64-x86-64.c (elf_x86_64_finish_dynamic_sections): Updated. * elfnn-aarch64.c (elf_aarch64_link_hash_table): Remove tlsdesc_plt and dt_tlsdesc_got. (elfNN_aarch64_allocate_dynrelocs): Updated. (elfNN_aarch64_finish_dynamic_sections): Likewise. (elfNN_aarch64_size_dynamic_sections): Updated. Clear root.tlsdesc_plt for DF_BIND_NOW. Don't check DF_BIND_NOW twice. * elfxx-x86.c (elf_x86_allocate_dynrelocs): Updated. (_bfd_x86_elf_size_dynamic_sections): Likewise. (_bfd_x86_elf_finish_dynamic_sections): Likewise. * elfxx-x86.h (elf_x86_link_hash_table): Remove tlsdesc_plt and tlsdesc_got.
2020-06-08 13:24:04 +02:00
bfd_vma dt_tlsdesc_got = got_addr + htab->root.tlsdesc_got;
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
bfd_byte *plt_entry =
ELF: Move tlsdesc_plt/tlsdesc_got to elf_link_hash_table All ELF backends with TLS descriptor support have /* The offset into splt of the PLT entry for the TLS descriptor resolver. Special values are 0, if not necessary (or not found to be necessary yet), and -1 if needed but not determined yet. */ bfd_vma tlsdesc_plt; /* The GOT offset for the lazy trampoline. Communicated to the loader via DT_TLSDESC_GOT. The magic value (bfd_vma) -1 indicates an offset is not allocated. */ bfd_vma tlsdesc_got; in symbol hash entry. Move tlsdesc_plt/tlsdesc_got to elf_link_hash_entry to reduce code duplication. * elf-bfd.h (elf_link_hash_entry): Add tlsdesc_plt and tlsdesc_got. * elf32-arm.c (elf32_arm_link_hash_table): Remove tlsdesc_plt and dt_tlsdesc_got. (elf32_arm_size_dynamic_sections): Updated. Clear root.tlsdesc_plt for DF_BIND_NOW. (elf32_arm_finish_dynamic_sections): Updated. (elf32_arm_output_arch_local_syms): Likewise. * elf32-nds32.c (nds32_elf_size_dynamic_sections): Updated. Clear root.tlsdesc_plt for DF_BIND_NOW. (nds32_elf_finish_dynamic_sections): Updated. * elf32-nds32.h (elf_nds32_link_hash_table): Remove dt_tlsdesc_plt and dt_tlsdesc_got. * elf64-x86-64.c (elf_x86_64_finish_dynamic_sections): Updated. * elfnn-aarch64.c (elf_aarch64_link_hash_table): Remove tlsdesc_plt and dt_tlsdesc_got. (elfNN_aarch64_allocate_dynrelocs): Updated. (elfNN_aarch64_finish_dynamic_sections): Likewise. (elfNN_aarch64_size_dynamic_sections): Updated. Clear root.tlsdesc_plt for DF_BIND_NOW. Don't check DF_BIND_NOW twice. * elfxx-x86.c (elf_x86_allocate_dynrelocs): Updated. (_bfd_x86_elf_size_dynamic_sections): Likewise. (_bfd_x86_elf_finish_dynamic_sections): Likewise. * elfxx-x86.h (elf_x86_link_hash_table): Remove tlsdesc_plt and tlsdesc_got.
2020-06-08 13:24:04 +02:00
htab->root.splt->contents + htab->root.tlsdesc_plt;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
[BFD, LD, AArch64, 2/3] Add --force-bti to enable BTI and to select BTI enabled PLTs This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds a new ld command line option: --force-bti. In the presence of this option, the linker enables BTI with the GNU_PROPERTY_AARCH64_FEATURE_1_BTI feature. This gives out warning in case of missing gnu notes for BTI in inputs. 2) It also defines a new set of BTI enabled PLTs. These are used either when all the inputs are marked with GNU_PROPERTY_AARCH64_FEATURE_1_BTI or when the new --force-bti option is used. This required adding new fields in elf_aarch64_link_hash_table so that we could make the PLT related information more generic. 3) It also defines a dynamic tag DT_AARCH64_BTI_PLT. The linker uses this whenever it picks BTI enabled PLTs. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * bfd-in.h (aarch64_plt_type, aarch64_enable_bti_type): New. (aarch64_bti_pac_info): New. (bfd_elf64_aarch64_set_options): Add aarch64_bti_pac_info argument. (bfd_elf32_aarch64_set_options): Likewise. * bfd-in2.h: Regenerate * elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): New. (PLT_BTI_SMALL_ENTRY_SIZE, PLT_BTI_TLSDESC_ENTRY_SIZE): New. (elfNN_aarch64_small_plt0_bti_entry): New. (elfNN_aarch64_small_plt_bti_entry): New. (elfNN_aarch64_tlsdesc_small_plt_bti_entry): New. (elf_aarch64_obj_tdata): Add no_bti_warn and plt_type fields. (elf_aarch64_link_hash_table): Add plt0_entry, plt_entry and tlsdesc_plt_entry_size fields. (elfNN_aarch64_link_hash_table_create): Initialise the new fields. (setup_plt_values): New helper function. (bfd_elfNN_aarch64_set_options): Use new bp_info to set plt sizes and bti enable type. (elfNN_aarch64_allocate_dynrelocs): Use new size members instead of fixed macros. (elfNN_aarch64_size_dynamic_sections): Likewise and add checks. (elfNN_aarch64_create_small_pltn_entry): Use new generic pointers to plt stubs instead of fixed ones and update filling them according to the need for bti. (elfNN_aarch64_init_small_plt0_entry): Likewise. (elfNN_aarch64_finish_dynamic_sections): Likewise. (get_plt_type, elfNN_aarch64_get_synthetic_symtab): New. (elfNN_aarch64_plt_sym_val): Update size accordingly. (elfNN_aarch64_link_setup_gnu_properties): Set up plts if BTI GNU NOTE is set. (bfd_elfNN_get_synthetic_symtab): Define. (elfNN_aarch64_merge_gnu_properties): Give out warning with --force-bti and mising BTI NOTE SECTION. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * readelf.c (get_aarch64_dynamic_type): New. (get_dynamic_type): Use above for EM_AARCH64. (dynamic_section_aarch64_val): New. (process_dynamic_section): Use above for EM_AARCH64. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * elf/aarch64.h (DT_AARCH64_BTI_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * NEWS: Document --force-bti. * emultempl/aarch64elf.em (plt_type, bti_type, OPTION_FORCE_BTI): New. (PARSE_AND_LIST_SHORTOPTS, PARSE_AND_LIST_OPTIONS): Add force-bti. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FORCE_BTI. * testsuite/ld-aarch64/aarch64-elf.exp: Add all the tests below. * testsuite/ld-aarch64/bti-plt-1.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: New test. * testsuite/ld-aarch64/bti-plt-2.s: New test. * testsuite/ld-aarch64/bti-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-3.d: New test. * testsuite/ld-aarch64/bti-plt-4.d: New test. * testsuite/ld-aarch64/bti-plt-5.d: New test. * testsuite/ld-aarch64/bti-plt-6.d: New test. * testsuite/ld-aarch64/bti-plt-7.d: New test. * testsuite/ld-aarch64/bti-plt-so.s: New test. * testsuite/ld-aarch64/bti-plt.ld: New test.
2019-03-13 11:54:30 +01:00
/* First instruction in BTI enabled PLT stub is a BTI
instruction so skip it. */
if (type & PLT_BTI)
{
plt_entry = plt_entry + 4;
adrp1_addr = adrp1_addr + 4;
adrp2_addr = adrp2_addr + 4;
}
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* adrp x2, DT_TLSDESC_GOT */
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
elf_aarch64_update_plt_entry (output_bfd,
BFD_RELOC_AARCH64_ADR_HI21_PCREL,
plt_entry + 4,
(PG (dt_tlsdesc_got)
- PG (adrp1_addr)));
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* adrp x3, 0 */
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
elf_aarch64_update_plt_entry (output_bfd,
BFD_RELOC_AARCH64_ADR_HI21_PCREL,
plt_entry + 8,
(PG (pltgot_addr)
- PG (adrp2_addr)));
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* ldr x2, [x2, #0] */
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
elf_aarch64_update_plt_entry (output_bfd,
BFD_RELOC_AARCH64_LDSTNN_LO12,
plt_entry + 12,
PG_OFFSET (dt_tlsdesc_got));
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* add x3, x3, 0 */
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
elf_aarch64_update_plt_entry (output_bfd,
BFD_RELOC_AARCH64_ADD_LO12,
plt_entry + 16,
PG_OFFSET (pltgot_addr));
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
}
}
}
if (htab->root.sgotplt)
{
if (bfd_is_abs_section (htab->root.sgotplt->output_section))
{
Remove syntactic sugar Now that _bfd_error_handler is not a function pointer. * aout-adobe.c: Replace (*_bfd_error_handler) (...) with _bfd_error_handler (...) throughout. * aout-cris.c, * aoutx.h, * archive.c, * bfd.c, * binary.c, * cache.c, * coff-alpha.c, * coff-arm.c, * coff-h8300.c, * coff-i860.c, * coff-mcore.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * cpu-arm.c, * cpu-m68k.c, * cpu-sh.c, * dwarf2.c, * ecoff.c, * elf-eh-frame.c, * elf-m10300.c, * elf.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c, * elf32-cris.c, * elf32-crx.c, * elf32-dlx.c, * elf32-frv.c, * elf32-hppa.c, * elf32-i370.c, * elf32-i386.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc1x.c, * elf32-m68k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-nds32.c, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-rl78.c, * elf32-s390.c, * elf32-score.c, * elf32-score7.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilepro.c, * elf32-v850.c, * elf32-vax.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-x86-64.c, * elfcode.h, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfxx-mips.c, * elfxx-sparc.c, * elfxx-tilegx.c, * hpux-core.c, * i386linux.c, * ieee.c, * ihex.c, * libbfd.c, * linker.c, * m68klinux.c, * mach-o.c, * merge.c, * mmo.c, * oasys.c, * osf-core.c, * pdp11.c, * pe-mips.c, * peXXigen.c, * pef.c, * plugin.c, * reloc.c, * rs6000-core.c, * sco5-core.c, * som.c, * sparclinux.c, * srec.c, * stabs.c, * syms.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * xcofflink.c: Likewise.
2016-09-30 05:30:18 +02:00
_bfd_error_handler
Use %pA and %pB in messages rather than %A and %B First step towards compiler verification of _bfd_error_handler arguments, and better verification of translated messages. bfd/ * bfd.c (_bfd_doprnt, _bfd_doprnt_scan): Handle %pA and %pB in place of %A and %B. * aout-adobe.c: Update all messages using %A and %B. * aout-cris.c: Likewise. * aoutx.h: Likewise. * archive.c: Likewise. * binary.c: Likewise. * cache.c: Likewise. * coff-alpha.c: Likewise. * coff-arm.c: Likewise. * coff-i860.c: Likewise. * coff-mcore.c: Likewise. * coff-ppc.c: Likewise. * coff-rs6000.c: Likewise. * coff-sh.c: Likewise. * coff-tic4x.c: Likewise. * coff-tic54x.c: Likewise. * coff-tic80.c: Likewise. * coff64-rs6000.c: Likewise. * coffcode.h: Likewise. * coffgen.c: Likewise. * cofflink.c: Likewise. * coffswap.h: Likewise. * compress.c: Likewise. * cpu-arm.c: Likewise. * ecoff.c: Likewise. * elf-attrs.c: Likewise. * elf-eh-frame.c: Likewise. * elf-ifunc.c: Likewise. * elf-m10300.c: Likewise. * elf-properties.c: Likewise. * elf-s390-common.c: Likewise. * elf.c: Likewise. * elf32-arc.c: Likewise. * elf32-arm.c: Likewise. * elf32-avr.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-d10v.c: Likewise. * elf32-d30v.c: Likewise. * elf32-epiphany.c: Likewise. * elf32-fr30.c: Likewise. * elf32-frv.c: Likewise. * elf32-gen.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i370.c: Likewise. * elf32-i386.c: Likewise. * elf32-i960.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-lm32.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m32r.c: Likewise. * elf32-m68hc11.c: Likewise. * elf32-m68hc12.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mcore.c: Likewise. * elf32-mep.c: Likewise. * elf32-metag.c: Likewise. * elf32-microblaze.c: Likewise. * elf32-moxie.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-nds32.c: Likewise. * elf32-nios2.c: Likewise. * elf32-or1k.c: Likewise. * elf32-pj.c: Likewise. * elf32-ppc.c: Likewise. * elf32-rl78.c: Likewise. * elf32-rx.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-sh-symbian.c: Likewise. * elf32-sh.c: Likewise. * elf32-sh64.c: Likewise. * elf32-sparc.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-tilepro.c: Likewise. * elf32-v850.c: Likewise. * elf32-vax.c: Likewise. * elf32-visium.c: Likewise. * elf32-wasm32.c: Likewise. * elf32-xgate.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-gen.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-mmix.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-sh64.c: Likewise. * elf64-sparc.c: Likewise. * elf64-x86-64.c: Likewise. * elfcode.h: Likewise. * elfcore.h: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * elfnn-riscv.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * elfxx-x86.c: Likewise. * hpux-core.c: Likewise. * ieee.c: Likewise. * ihex.c: Likewise. * libbfd.c: Likewise. * linker.c: Likewise. * mach-o.c: Likewise. * merge.c: Likewise. * mmo.c: Likewise. * oasys.c: Likewise. * pdp11.c: Likewise. * pe-mips.c: Likewise. * peXXigen.c: Likewise. * peicode.h: Likewise. * reloc.c: Likewise. * rs6000-core.c: Likewise. * srec.c: Likewise. * stabs.c: Likewise. * vms-alpha.c: Likewise. * xcofflink.c: Likewise. ld/ * ldmisc.c (vfinfo): Handle %pA and %pB in place of %A and %B. * ldcref.c: Update all messages using %A and %B. * ldexp.c: Likewise. * ldlang.c: Likewise. * ldmain.c: Likewise. * ldmisc.c: Likewise. * pe-dll.c: Likewise. * plugin.c: Likewise. * emultempl/beos.em: Likewise. * emultempl/cr16elf.em: Likewise. * emultempl/elf32.em: Likewise. * emultempl/m68kcoff.em: Likewise. * emultempl/m68kelf.em: Likewise. * emultempl/mmo.em: Likewise. * emultempl/nds32elf.em: Likewise. * emultempl/pe.em: Likewise. * emultempl/pep.em: Likewise. * emultempl/spuelf.em: Likewise. * emultempl/sunos.em: Likewise. * emultempl/xtensaelf.em: Likewise.
2018-02-19 05:51:40 +01:00
(_("discarded output section: `%pA'"), htab->root.sgotplt);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
return FALSE;
}
/* Fill in the first three entries in the global offset table. */
if (htab->root.sgotplt->size > 0)
{
[AArch64] Fix the placement of &_DYNAMIC in the GOT.
2013-06-27 17:47:55 +02:00
bfd_put_NN (output_bfd, (bfd_vma) 0, htab->root.sgotplt->contents);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* Write GOT[1] and GOT[2], needed for the dynamic linker. */
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
bfd_put_NN (output_bfd,
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
(bfd_vma) 0,
htab->root.sgotplt->contents + GOT_ENTRY_SIZE);
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
bfd_put_NN (output_bfd,
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
(bfd_vma) 0,
htab->root.sgotplt->contents + GOT_ENTRY_SIZE * 2);
}
[AArch64] Fix the placement of &_DYNAMIC in the GOT.
2013-06-27 17:47:55 +02:00
if (htab->root.sgot)
{
if (htab->root.sgot->size > 0)
{
bfd_vma addr =
sdyn ? sdyn->output_section->vma + sdyn->output_offset : 0;
bfd_put_NN (output_bfd, addr, htab->root.sgot->contents);
}
}
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
elf_section_data (htab->root.sgotplt->output_section)->
this_hdr.sh_entsize = GOT_ENTRY_SIZE;
}
if (htab->root.sgot && htab->root.sgot->size > 0)
elf_section_data (htab->root.sgot->output_section)->this_hdr.sh_entsize
= GOT_ENTRY_SIZE;
aarch64: Add support for GNU indirect functions. Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests are ported from the ld-ifunc tests but are enabled for cross builds so can be run easily without hardware or a simulator. bfd/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * configure: Regenerate. * configure.in: Build elf-ifunc.o for AArch64. * elfnn-aarch64.c: Include objalloc.h. (elfNN_aarch64_local_htab_hash): New function. (elfNN_aarch64_local_htab_eq): New function. (elfNN_aarch64_get_local_sym_hash): New function. (elfNN_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash. (elfNN_aarch64_final_link_relocate): Add sym argument. Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_gc_sweep_hook): Add support for garbage collecting references to STT_GNU_IFUNC symbols. (elfNN_aarch64_adjust_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols. (elfNN_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC symbols. Ensure we don't increase plt.refcount from -1 to 0. (elfNN_aarch64_post_process_headers): Call _bfd_elf_set_osabi. (elfNN_aarch64_is_function_type): Remove function. (elfNN_aarch64_allocate_dynrelocs): Handle STT_GNU_IFUNC symbols. (elfNN_aarch64_allocate_ifunc_dynrelocs): New function. (elfNN_aarch64_allocate_local_dynrelocs): New function. (elfNN_aarch64_allocate_local_ifunc_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Call elfNN_aarch64_allocate_local_dynrelocs. (elfNN_aarch64_create_small_pltn_entry): Add info argument. Add support for creating .iplt entries for STT_GNU_IFUNC symbols. (elfNN_aarch64_finish_dynamic_symbol): Add support for handling STT_GNU_IFUNC symbols and .iplt. (elfNN_aarch64_finish_local_dynamic_symbol): New function. (elfNN_aarch64_finish_dynamic_sections): Call elfNN_aarch64_finish_local_dynamic_symbol. ld/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Add IREL_IN_PLT. * emulparams/aarch64elf32.sh: Likewise. ld/testsuite/ChangeLog: 2013-10-03 Will Newton <will.newton@linaro.org> * ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64. * ld-aarch64/aarch64-elf.exp: Run ifunc tests. * ld-aarch64/ifunc-1-local.d: New file. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-10-03 16:46:09 +02:00
/* Fill PLT and GOT entries for local STT_GNU_IFUNC symbols. */
htab_traverse (htab->loc_hash_table,
elfNN_aarch64_finish_local_dynamic_symbol,
info);
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
return TRUE;
}
[BFD, LD, AArch64, 2/3] Add --force-bti to enable BTI and to select BTI enabled PLTs This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds a new ld command line option: --force-bti. In the presence of this option, the linker enables BTI with the GNU_PROPERTY_AARCH64_FEATURE_1_BTI feature. This gives out warning in case of missing gnu notes for BTI in inputs. 2) It also defines a new set of BTI enabled PLTs. These are used either when all the inputs are marked with GNU_PROPERTY_AARCH64_FEATURE_1_BTI or when the new --force-bti option is used. This required adding new fields in elf_aarch64_link_hash_table so that we could make the PLT related information more generic. 3) It also defines a dynamic tag DT_AARCH64_BTI_PLT. The linker uses this whenever it picks BTI enabled PLTs. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * bfd-in.h (aarch64_plt_type, aarch64_enable_bti_type): New. (aarch64_bti_pac_info): New. (bfd_elf64_aarch64_set_options): Add aarch64_bti_pac_info argument. (bfd_elf32_aarch64_set_options): Likewise. * bfd-in2.h: Regenerate * elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): New. (PLT_BTI_SMALL_ENTRY_SIZE, PLT_BTI_TLSDESC_ENTRY_SIZE): New. (elfNN_aarch64_small_plt0_bti_entry): New. (elfNN_aarch64_small_plt_bti_entry): New. (elfNN_aarch64_tlsdesc_small_plt_bti_entry): New. (elf_aarch64_obj_tdata): Add no_bti_warn and plt_type fields. (elf_aarch64_link_hash_table): Add plt0_entry, plt_entry and tlsdesc_plt_entry_size fields. (elfNN_aarch64_link_hash_table_create): Initialise the new fields. (setup_plt_values): New helper function. (bfd_elfNN_aarch64_set_options): Use new bp_info to set plt sizes and bti enable type. (elfNN_aarch64_allocate_dynrelocs): Use new size members instead of fixed macros. (elfNN_aarch64_size_dynamic_sections): Likewise and add checks. (elfNN_aarch64_create_small_pltn_entry): Use new generic pointers to plt stubs instead of fixed ones and update filling them according to the need for bti. (elfNN_aarch64_init_small_plt0_entry): Likewise. (elfNN_aarch64_finish_dynamic_sections): Likewise. (get_plt_type, elfNN_aarch64_get_synthetic_symtab): New. (elfNN_aarch64_plt_sym_val): Update size accordingly. (elfNN_aarch64_link_setup_gnu_properties): Set up plts if BTI GNU NOTE is set. (bfd_elfNN_get_synthetic_symtab): Define. (elfNN_aarch64_merge_gnu_properties): Give out warning with --force-bti and mising BTI NOTE SECTION. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * readelf.c (get_aarch64_dynamic_type): New. (get_dynamic_type): Use above for EM_AARCH64. (dynamic_section_aarch64_val): New. (process_dynamic_section): Use above for EM_AARCH64. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * elf/aarch64.h (DT_AARCH64_BTI_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * NEWS: Document --force-bti. * emultempl/aarch64elf.em (plt_type, bti_type, OPTION_FORCE_BTI): New. (PARSE_AND_LIST_SHORTOPTS, PARSE_AND_LIST_OPTIONS): Add force-bti. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FORCE_BTI. * testsuite/ld-aarch64/aarch64-elf.exp: Add all the tests below. * testsuite/ld-aarch64/bti-plt-1.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: New test. * testsuite/ld-aarch64/bti-plt-2.s: New test. * testsuite/ld-aarch64/bti-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-3.d: New test. * testsuite/ld-aarch64/bti-plt-4.d: New test. * testsuite/ld-aarch64/bti-plt-5.d: New test. * testsuite/ld-aarch64/bti-plt-6.d: New test. * testsuite/ld-aarch64/bti-plt-7.d: New test. * testsuite/ld-aarch64/bti-plt-so.s: New test. * testsuite/ld-aarch64/bti-plt.ld: New test.
2019-03-13 11:54:30 +01:00
/* Check if BTI enabled PLTs are needed. Returns the type needed. */
static aarch64_plt_type
get_plt_type (bfd *abfd)
{
aarch64_plt_type ret = PLT_NORMAL;
bfd_byte *contents, *extdyn, *extdynend;
asection *sec = bfd_get_section_by_name (abfd, ".dynamic");
if (!sec || !bfd_malloc_and_get_section (abfd, sec, &contents))
return ret;
extdyn = contents;
extdynend = contents + sec->size;
for (; extdyn < extdynend; extdyn += sizeof (ElfNN_External_Dyn))
{
Elf_Internal_Dyn dyn;
bfd_elfNN_swap_dyn_in (abfd, extdyn, &dyn);
/* Let's check the processor specific dynamic array tags. */
bfd_vma tag = dyn.d_tag;
if (tag < DT_LOPROC || tag > DT_HIPROC)
continue;
switch (tag)
{
case DT_AARCH64_BTI_PLT:
[BFD, LD, AArch64, 3/3] Add --pac-plt to enable PLTs protected with PAC. This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds new definitions of PAC enabled PLTs and both BTI and PAC enabled PLTs. 2) It also defines the new dynamic tag DT_AARCH64_PAC_PLT for the PAC enabled PLTs. 3) This patch adds a new ld command line option: --pac-plt. In the presence of this option, the linker uses the PAC enabled PLTs and marks with DT_AARCH64_PAC_PLT. 4) In case both BTI and PAC are enabled the linker should pick PLTs enabled with both and also use dynamic tags for both. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * elfnn-aarch64.c (PLT_PAC_ENTRY_SIZE, PLT_PAC_SMALL_ENTRY_SIZE): New. (PLT_BTI_PAC_ENTRY_SIZE, PLT_BTI_PAC_SMALL_ENTRY_SIZE): New. (setup_plt_values): Account for PAC or PAC and BTI enabled PLTs. (elfNN_aarch64_size_dynamic_sections): Add checks for PLT_BTI_PAC and PLT_PAC_PLT. (elfNN_aarch64_finish_dynamic_sections): Account for PLT_BTI_PAC. (get_plt_type): Add case for DT_AARCH64_PAC_PLT. (elfNN_aarch64_plt_sym_val): Add cases for PLT_BTI_PAC and PLT_PAC. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * readelf.c (get_aarch64_dynamic_type): Add case for DT_AARCH64_PAC_PLT. (dynamic_section_aarch64_val): Likewise. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * elf/aarch64.h (DT_AARCH64_PAC_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * NEWS: Document --pac-plt. * emultempl/aarch64elf.em (OPTION_PAC_PLT): New. (PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS): Add pac-plt. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_PAC_PLT. * testsuite/ld-aarch64/aarch64-elf.exp: Add the following tests. * testsuite/ld-aarch64/bti-pac-plt-1.d: New test. * testsuite/ld-aarch64/bti-pac-plt-2.d: New test. * testsuite/ld-aarch64/pac-plt-1.d: New test. * testsuite/ld-aarch64/pac-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: Add .ifndef directive.
2019-03-13 12:09:10 +01:00
ret |= PLT_BTI;
break;
case DT_AARCH64_PAC_PLT:
ret |= PLT_PAC;
[BFD, LD, AArch64, 2/3] Add --force-bti to enable BTI and to select BTI enabled PLTs This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds a new ld command line option: --force-bti. In the presence of this option, the linker enables BTI with the GNU_PROPERTY_AARCH64_FEATURE_1_BTI feature. This gives out warning in case of missing gnu notes for BTI in inputs. 2) It also defines a new set of BTI enabled PLTs. These are used either when all the inputs are marked with GNU_PROPERTY_AARCH64_FEATURE_1_BTI or when the new --force-bti option is used. This required adding new fields in elf_aarch64_link_hash_table so that we could make the PLT related information more generic. 3) It also defines a dynamic tag DT_AARCH64_BTI_PLT. The linker uses this whenever it picks BTI enabled PLTs. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * bfd-in.h (aarch64_plt_type, aarch64_enable_bti_type): New. (aarch64_bti_pac_info): New. (bfd_elf64_aarch64_set_options): Add aarch64_bti_pac_info argument. (bfd_elf32_aarch64_set_options): Likewise. * bfd-in2.h: Regenerate * elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): New. (PLT_BTI_SMALL_ENTRY_SIZE, PLT_BTI_TLSDESC_ENTRY_SIZE): New. (elfNN_aarch64_small_plt0_bti_entry): New. (elfNN_aarch64_small_plt_bti_entry): New. (elfNN_aarch64_tlsdesc_small_plt_bti_entry): New. (elf_aarch64_obj_tdata): Add no_bti_warn and plt_type fields. (elf_aarch64_link_hash_table): Add plt0_entry, plt_entry and tlsdesc_plt_entry_size fields. (elfNN_aarch64_link_hash_table_create): Initialise the new fields. (setup_plt_values): New helper function. (bfd_elfNN_aarch64_set_options): Use new bp_info to set plt sizes and bti enable type. (elfNN_aarch64_allocate_dynrelocs): Use new size members instead of fixed macros. (elfNN_aarch64_size_dynamic_sections): Likewise and add checks. (elfNN_aarch64_create_small_pltn_entry): Use new generic pointers to plt stubs instead of fixed ones and update filling them according to the need for bti. (elfNN_aarch64_init_small_plt0_entry): Likewise. (elfNN_aarch64_finish_dynamic_sections): Likewise. (get_plt_type, elfNN_aarch64_get_synthetic_symtab): New. (elfNN_aarch64_plt_sym_val): Update size accordingly. (elfNN_aarch64_link_setup_gnu_properties): Set up plts if BTI GNU NOTE is set. (bfd_elfNN_get_synthetic_symtab): Define. (elfNN_aarch64_merge_gnu_properties): Give out warning with --force-bti and mising BTI NOTE SECTION. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * readelf.c (get_aarch64_dynamic_type): New. (get_dynamic_type): Use above for EM_AARCH64. (dynamic_section_aarch64_val): New. (process_dynamic_section): Use above for EM_AARCH64. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * elf/aarch64.h (DT_AARCH64_BTI_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * NEWS: Document --force-bti. * emultempl/aarch64elf.em (plt_type, bti_type, OPTION_FORCE_BTI): New. (PARSE_AND_LIST_SHORTOPTS, PARSE_AND_LIST_OPTIONS): Add force-bti. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FORCE_BTI. * testsuite/ld-aarch64/aarch64-elf.exp: Add all the tests below. * testsuite/ld-aarch64/bti-plt-1.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: New test. * testsuite/ld-aarch64/bti-plt-2.s: New test. * testsuite/ld-aarch64/bti-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-3.d: New test. * testsuite/ld-aarch64/bti-plt-4.d: New test. * testsuite/ld-aarch64/bti-plt-5.d: New test. * testsuite/ld-aarch64/bti-plt-6.d: New test. * testsuite/ld-aarch64/bti-plt-7.d: New test. * testsuite/ld-aarch64/bti-plt-so.s: New test. * testsuite/ld-aarch64/bti-plt.ld: New test.
2019-03-13 11:54:30 +01:00
break;
default: break;
}
}
free (contents);
return ret;
}
static long
elfNN_aarch64_get_synthetic_symtab (bfd *abfd,
long symcount,
asymbol **syms,
long dynsymcount,
asymbol **dynsyms,
asymbol **ret)
{
elf_aarch64_tdata (abfd)->plt_type = get_plt_type (abfd);
return _bfd_elf_get_synthetic_symtab (abfd, symcount, syms,
dynsymcount, dynsyms, ret);
}
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* Return address for Ith PLT stub in section PLT, for relocation REL
or (bfd_vma) -1 if it should not be included. */
static bfd_vma
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_plt_sym_val (bfd_vma i, const asection *plt,
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
const arelent *rel ATTRIBUTE_UNUSED)
{
[BFD, LD, AArch64, 2/3] Add --force-bti to enable BTI and to select BTI enabled PLTs This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds a new ld command line option: --force-bti. In the presence of this option, the linker enables BTI with the GNU_PROPERTY_AARCH64_FEATURE_1_BTI feature. This gives out warning in case of missing gnu notes for BTI in inputs. 2) It also defines a new set of BTI enabled PLTs. These are used either when all the inputs are marked with GNU_PROPERTY_AARCH64_FEATURE_1_BTI or when the new --force-bti option is used. This required adding new fields in elf_aarch64_link_hash_table so that we could make the PLT related information more generic. 3) It also defines a dynamic tag DT_AARCH64_BTI_PLT. The linker uses this whenever it picks BTI enabled PLTs. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * bfd-in.h (aarch64_plt_type, aarch64_enable_bti_type): New. (aarch64_bti_pac_info): New. (bfd_elf64_aarch64_set_options): Add aarch64_bti_pac_info argument. (bfd_elf32_aarch64_set_options): Likewise. * bfd-in2.h: Regenerate * elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): New. (PLT_BTI_SMALL_ENTRY_SIZE, PLT_BTI_TLSDESC_ENTRY_SIZE): New. (elfNN_aarch64_small_plt0_bti_entry): New. (elfNN_aarch64_small_plt_bti_entry): New. (elfNN_aarch64_tlsdesc_small_plt_bti_entry): New. (elf_aarch64_obj_tdata): Add no_bti_warn and plt_type fields. (elf_aarch64_link_hash_table): Add plt0_entry, plt_entry and tlsdesc_plt_entry_size fields. (elfNN_aarch64_link_hash_table_create): Initialise the new fields. (setup_plt_values): New helper function. (bfd_elfNN_aarch64_set_options): Use new bp_info to set plt sizes and bti enable type. (elfNN_aarch64_allocate_dynrelocs): Use new size members instead of fixed macros. (elfNN_aarch64_size_dynamic_sections): Likewise and add checks. (elfNN_aarch64_create_small_pltn_entry): Use new generic pointers to plt stubs instead of fixed ones and update filling them according to the need for bti. (elfNN_aarch64_init_small_plt0_entry): Likewise. (elfNN_aarch64_finish_dynamic_sections): Likewise. (get_plt_type, elfNN_aarch64_get_synthetic_symtab): New. (elfNN_aarch64_plt_sym_val): Update size accordingly. (elfNN_aarch64_link_setup_gnu_properties): Set up plts if BTI GNU NOTE is set. (bfd_elfNN_get_synthetic_symtab): Define. (elfNN_aarch64_merge_gnu_properties): Give out warning with --force-bti and mising BTI NOTE SECTION. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * readelf.c (get_aarch64_dynamic_type): New. (get_dynamic_type): Use above for EM_AARCH64. (dynamic_section_aarch64_val): New. (process_dynamic_section): Use above for EM_AARCH64. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * elf/aarch64.h (DT_AARCH64_BTI_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * NEWS: Document --force-bti. * emultempl/aarch64elf.em (plt_type, bti_type, OPTION_FORCE_BTI): New. (PARSE_AND_LIST_SHORTOPTS, PARSE_AND_LIST_OPTIONS): Add force-bti. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FORCE_BTI. * testsuite/ld-aarch64/aarch64-elf.exp: Add all the tests below. * testsuite/ld-aarch64/bti-plt-1.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: New test. * testsuite/ld-aarch64/bti-plt-2.s: New test. * testsuite/ld-aarch64/bti-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-3.d: New test. * testsuite/ld-aarch64/bti-plt-4.d: New test. * testsuite/ld-aarch64/bti-plt-5.d: New test. * testsuite/ld-aarch64/bti-plt-6.d: New test. * testsuite/ld-aarch64/bti-plt-7.d: New test. * testsuite/ld-aarch64/bti-plt-so.s: New test. * testsuite/ld-aarch64/bti-plt.ld: New test.
2019-03-13 11:54:30 +01:00
size_t plt0_size = PLT_ENTRY_SIZE;
size_t pltn_size = PLT_SMALL_ENTRY_SIZE;
[BFD, LD, AArch64, 3/3] Add --pac-plt to enable PLTs protected with PAC. This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds new definitions of PAC enabled PLTs and both BTI and PAC enabled PLTs. 2) It also defines the new dynamic tag DT_AARCH64_PAC_PLT for the PAC enabled PLTs. 3) This patch adds a new ld command line option: --pac-plt. In the presence of this option, the linker uses the PAC enabled PLTs and marks with DT_AARCH64_PAC_PLT. 4) In case both BTI and PAC are enabled the linker should pick PLTs enabled with both and also use dynamic tags for both. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * elfnn-aarch64.c (PLT_PAC_ENTRY_SIZE, PLT_PAC_SMALL_ENTRY_SIZE): New. (PLT_BTI_PAC_ENTRY_SIZE, PLT_BTI_PAC_SMALL_ENTRY_SIZE): New. (setup_plt_values): Account for PAC or PAC and BTI enabled PLTs. (elfNN_aarch64_size_dynamic_sections): Add checks for PLT_BTI_PAC and PLT_PAC_PLT. (elfNN_aarch64_finish_dynamic_sections): Account for PLT_BTI_PAC. (get_plt_type): Add case for DT_AARCH64_PAC_PLT. (elfNN_aarch64_plt_sym_val): Add cases for PLT_BTI_PAC and PLT_PAC. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * readelf.c (get_aarch64_dynamic_type): Add case for DT_AARCH64_PAC_PLT. (dynamic_section_aarch64_val): Likewise. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * elf/aarch64.h (DT_AARCH64_PAC_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * NEWS: Document --pac-plt. * emultempl/aarch64elf.em (OPTION_PAC_PLT): New. (PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS): Add pac-plt. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_PAC_PLT. * testsuite/ld-aarch64/aarch64-elf.exp: Add the following tests. * testsuite/ld-aarch64/bti-pac-plt-1.d: New test. * testsuite/ld-aarch64/bti-pac-plt-2.d: New test. * testsuite/ld-aarch64/pac-plt-1.d: New test. * testsuite/ld-aarch64/pac-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: Add .ifndef directive.
2019-03-13 12:09:10 +01:00
if (elf_aarch64_tdata (plt->owner)->plt_type == PLT_BTI_PAC)
{
if (elf_elfheader (plt->owner)->e_type == ET_EXEC)
pltn_size = PLT_BTI_PAC_SMALL_ENTRY_SIZE;
else
pltn_size = PLT_PAC_SMALL_ENTRY_SIZE;
}
else if (elf_aarch64_tdata (plt->owner)->plt_type == PLT_BTI)
[BFD, LD, AArch64, 2/3] Add --force-bti to enable BTI and to select BTI enabled PLTs This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds a new ld command line option: --force-bti. In the presence of this option, the linker enables BTI with the GNU_PROPERTY_AARCH64_FEATURE_1_BTI feature. This gives out warning in case of missing gnu notes for BTI in inputs. 2) It also defines a new set of BTI enabled PLTs. These are used either when all the inputs are marked with GNU_PROPERTY_AARCH64_FEATURE_1_BTI or when the new --force-bti option is used. This required adding new fields in elf_aarch64_link_hash_table so that we could make the PLT related information more generic. 3) It also defines a dynamic tag DT_AARCH64_BTI_PLT. The linker uses this whenever it picks BTI enabled PLTs. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * bfd-in.h (aarch64_plt_type, aarch64_enable_bti_type): New. (aarch64_bti_pac_info): New. (bfd_elf64_aarch64_set_options): Add aarch64_bti_pac_info argument. (bfd_elf32_aarch64_set_options): Likewise. * bfd-in2.h: Regenerate * elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): New. (PLT_BTI_SMALL_ENTRY_SIZE, PLT_BTI_TLSDESC_ENTRY_SIZE): New. (elfNN_aarch64_small_plt0_bti_entry): New. (elfNN_aarch64_small_plt_bti_entry): New. (elfNN_aarch64_tlsdesc_small_plt_bti_entry): New. (elf_aarch64_obj_tdata): Add no_bti_warn and plt_type fields. (elf_aarch64_link_hash_table): Add plt0_entry, plt_entry and tlsdesc_plt_entry_size fields. (elfNN_aarch64_link_hash_table_create): Initialise the new fields. (setup_plt_values): New helper function. (bfd_elfNN_aarch64_set_options): Use new bp_info to set plt sizes and bti enable type. (elfNN_aarch64_allocate_dynrelocs): Use new size members instead of fixed macros. (elfNN_aarch64_size_dynamic_sections): Likewise and add checks. (elfNN_aarch64_create_small_pltn_entry): Use new generic pointers to plt stubs instead of fixed ones and update filling them according to the need for bti. (elfNN_aarch64_init_small_plt0_entry): Likewise. (elfNN_aarch64_finish_dynamic_sections): Likewise. (get_plt_type, elfNN_aarch64_get_synthetic_symtab): New. (elfNN_aarch64_plt_sym_val): Update size accordingly. (elfNN_aarch64_link_setup_gnu_properties): Set up plts if BTI GNU NOTE is set. (bfd_elfNN_get_synthetic_symtab): Define. (elfNN_aarch64_merge_gnu_properties): Give out warning with --force-bti and mising BTI NOTE SECTION. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * readelf.c (get_aarch64_dynamic_type): New. (get_dynamic_type): Use above for EM_AARCH64. (dynamic_section_aarch64_val): New. (process_dynamic_section): Use above for EM_AARCH64. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * elf/aarch64.h (DT_AARCH64_BTI_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * NEWS: Document --force-bti. * emultempl/aarch64elf.em (plt_type, bti_type, OPTION_FORCE_BTI): New. (PARSE_AND_LIST_SHORTOPTS, PARSE_AND_LIST_OPTIONS): Add force-bti. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FORCE_BTI. * testsuite/ld-aarch64/aarch64-elf.exp: Add all the tests below. * testsuite/ld-aarch64/bti-plt-1.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: New test. * testsuite/ld-aarch64/bti-plt-2.s: New test. * testsuite/ld-aarch64/bti-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-3.d: New test. * testsuite/ld-aarch64/bti-plt-4.d: New test. * testsuite/ld-aarch64/bti-plt-5.d: New test. * testsuite/ld-aarch64/bti-plt-6.d: New test. * testsuite/ld-aarch64/bti-plt-7.d: New test. * testsuite/ld-aarch64/bti-plt-so.s: New test. * testsuite/ld-aarch64/bti-plt.ld: New test.
2019-03-13 11:54:30 +01:00
{
if (elf_elfheader (plt->owner)->e_type == ET_EXEC)
pltn_size = PLT_BTI_SMALL_ENTRY_SIZE;
}
[BFD, LD, AArch64, 3/3] Add --pac-plt to enable PLTs protected with PAC. This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds new definitions of PAC enabled PLTs and both BTI and PAC enabled PLTs. 2) It also defines the new dynamic tag DT_AARCH64_PAC_PLT for the PAC enabled PLTs. 3) This patch adds a new ld command line option: --pac-plt. In the presence of this option, the linker uses the PAC enabled PLTs and marks with DT_AARCH64_PAC_PLT. 4) In case both BTI and PAC are enabled the linker should pick PLTs enabled with both and also use dynamic tags for both. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * elfnn-aarch64.c (PLT_PAC_ENTRY_SIZE, PLT_PAC_SMALL_ENTRY_SIZE): New. (PLT_BTI_PAC_ENTRY_SIZE, PLT_BTI_PAC_SMALL_ENTRY_SIZE): New. (setup_plt_values): Account for PAC or PAC and BTI enabled PLTs. (elfNN_aarch64_size_dynamic_sections): Add checks for PLT_BTI_PAC and PLT_PAC_PLT. (elfNN_aarch64_finish_dynamic_sections): Account for PLT_BTI_PAC. (get_plt_type): Add case for DT_AARCH64_PAC_PLT. (elfNN_aarch64_plt_sym_val): Add cases for PLT_BTI_PAC and PLT_PAC. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * readelf.c (get_aarch64_dynamic_type): Add case for DT_AARCH64_PAC_PLT. (dynamic_section_aarch64_val): Likewise. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * elf/aarch64.h (DT_AARCH64_PAC_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * NEWS: Document --pac-plt. * emultempl/aarch64elf.em (OPTION_PAC_PLT): New. (PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS): Add pac-plt. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_PAC_PLT. * testsuite/ld-aarch64/aarch64-elf.exp: Add the following tests. * testsuite/ld-aarch64/bti-pac-plt-1.d: New test. * testsuite/ld-aarch64/bti-pac-plt-2.d: New test. * testsuite/ld-aarch64/pac-plt-1.d: New test. * testsuite/ld-aarch64/pac-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: Add .ifndef directive.
2019-03-13 12:09:10 +01:00
else if (elf_aarch64_tdata (plt->owner)->plt_type == PLT_PAC)
{
pltn_size = PLT_PAC_SMALL_ENTRY_SIZE;
}
[BFD, LD, AArch64, 2/3] Add --force-bti to enable BTI and to select BTI enabled PLTs This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds a new ld command line option: --force-bti. In the presence of this option, the linker enables BTI with the GNU_PROPERTY_AARCH64_FEATURE_1_BTI feature. This gives out warning in case of missing gnu notes for BTI in inputs. 2) It also defines a new set of BTI enabled PLTs. These are used either when all the inputs are marked with GNU_PROPERTY_AARCH64_FEATURE_1_BTI or when the new --force-bti option is used. This required adding new fields in elf_aarch64_link_hash_table so that we could make the PLT related information more generic. 3) It also defines a dynamic tag DT_AARCH64_BTI_PLT. The linker uses this whenever it picks BTI enabled PLTs. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * bfd-in.h (aarch64_plt_type, aarch64_enable_bti_type): New. (aarch64_bti_pac_info): New. (bfd_elf64_aarch64_set_options): Add aarch64_bti_pac_info argument. (bfd_elf32_aarch64_set_options): Likewise. * bfd-in2.h: Regenerate * elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): New. (PLT_BTI_SMALL_ENTRY_SIZE, PLT_BTI_TLSDESC_ENTRY_SIZE): New. (elfNN_aarch64_small_plt0_bti_entry): New. (elfNN_aarch64_small_plt_bti_entry): New. (elfNN_aarch64_tlsdesc_small_plt_bti_entry): New. (elf_aarch64_obj_tdata): Add no_bti_warn and plt_type fields. (elf_aarch64_link_hash_table): Add plt0_entry, plt_entry and tlsdesc_plt_entry_size fields. (elfNN_aarch64_link_hash_table_create): Initialise the new fields. (setup_plt_values): New helper function. (bfd_elfNN_aarch64_set_options): Use new bp_info to set plt sizes and bti enable type. (elfNN_aarch64_allocate_dynrelocs): Use new size members instead of fixed macros. (elfNN_aarch64_size_dynamic_sections): Likewise and add checks. (elfNN_aarch64_create_small_pltn_entry): Use new generic pointers to plt stubs instead of fixed ones and update filling them according to the need for bti. (elfNN_aarch64_init_small_plt0_entry): Likewise. (elfNN_aarch64_finish_dynamic_sections): Likewise. (get_plt_type, elfNN_aarch64_get_synthetic_symtab): New. (elfNN_aarch64_plt_sym_val): Update size accordingly. (elfNN_aarch64_link_setup_gnu_properties): Set up plts if BTI GNU NOTE is set. (bfd_elfNN_get_synthetic_symtab): Define. (elfNN_aarch64_merge_gnu_properties): Give out warning with --force-bti and mising BTI NOTE SECTION. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * readelf.c (get_aarch64_dynamic_type): New. (get_dynamic_type): Use above for EM_AARCH64. (dynamic_section_aarch64_val): New. (process_dynamic_section): Use above for EM_AARCH64. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * elf/aarch64.h (DT_AARCH64_BTI_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * NEWS: Document --force-bti. * emultempl/aarch64elf.em (plt_type, bti_type, OPTION_FORCE_BTI): New. (PARSE_AND_LIST_SHORTOPTS, PARSE_AND_LIST_OPTIONS): Add force-bti. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FORCE_BTI. * testsuite/ld-aarch64/aarch64-elf.exp: Add all the tests below. * testsuite/ld-aarch64/bti-plt-1.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: New test. * testsuite/ld-aarch64/bti-plt-2.s: New test. * testsuite/ld-aarch64/bti-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-3.d: New test. * testsuite/ld-aarch64/bti-plt-4.d: New test. * testsuite/ld-aarch64/bti-plt-5.d: New test. * testsuite/ld-aarch64/bti-plt-6.d: New test. * testsuite/ld-aarch64/bti-plt-7.d: New test. * testsuite/ld-aarch64/bti-plt-so.s: New test. * testsuite/ld-aarch64/bti-plt.ld: New test.
2019-03-13 11:54:30 +01:00
return plt->vma + plt0_size + i * pltn_size;
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
}
Preserve all mapping symbols in ARM and AArch64 object files. bfd * elfnn-aarch64.c (is_aarch64_mapping_symbol): New function. Returns TRUE for AArch64 mapping symbols. (elfNN_aarch64_backend_symbol_processing): New function. Marks mapping symbols as precious in object files so that they will not be stripped. (elf_backend_symbol_processing): Define. * elf32-arm.c (is_arm_mapping_symbol): New function. Returns TRUE for ARM mapping symbols. (elf32_arm_backend_symbol_processing): Make use of the new function.
2016-06-29 12:17:40 +02:00
/* Returns TRUE if NAME is an AArch64 mapping symbol.
The ARM ELF standard defines $x (for A64 code) and $d (for data).
It also allows a period initiated suffix to be added to the symbol, ie:
"$[adtx]\.[:sym_char]+". */
static bfd_boolean
is_aarch64_mapping_symbol (const char * name)
{
return name != NULL /* Paranoia. */
&& name[0] == '$' /* Note: if objcopy --prefix-symbols has been used then
the mapping symbols could have acquired a prefix.
We do not support this here, since such symbols no
longer conform to the ARM ELF ABI. */
&& (name[1] == 'd' || name[1] == 'x')
&& (name[2] == 0 || name[2] == '.');
/* FIXME: Strictly speaking the symbol is only a valid mapping symbol if
any characters that follow the period are legal characters for the body
of a symbol's name. For now we just assume that this is the case. */
}
/* Make sure that mapping symbols in object files are not removed via the
"strip --strip-unneeded" tool. These symbols might needed in order to
correctly generate linked files. Once an object file has been linked,
it should be safe to remove them. */
static void
elfNN_aarch64_backend_symbol_processing (bfd *abfd, asymbol *sym)
{
if (((abfd->flags & (EXEC_P | DYNAMIC)) == 0)
&& sym->section != bfd_abs_section_ptr
&& is_aarch64_mapping_symbol (sym->name))
sym->flags |= BSF_KEEP;
}
[BFD, LD, AArch64, 1/3] Add support for GNU PROPERTIES in AArch64 for BTI and PAC This is part of the patch series to add support for BTI and PAC in AArch64 linker. This patch implements the following: 1) This extends in the gnu property support in the linker for AArch64 by defining backend hooks for elf_backend_setup_gnu_properties, elf_backend_merge_gnu_properties and elf_backend_parse_gnu_properties. 2) It defines AArch64 specific GNU property GNU_PROPERTY_AARCH64_FEATURE_1_AND and 2 bit for BTI and PAC in it. 3) It also adds support in readelf.c to read and print these new GNU properties in AArch64. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * elf-properties.c (_bfd_elf_link_setup_gnu_properties): Exclude linker created inputs from merge. * elfnn-aarch64.c (struct elf_aarch64_obj_tdata): Add field for GNU_PROPERTY_AARCH64_FEATURE_1_AND properties. (elfNN_aarch64_link_setup_gnu_properties): New. (elfNN_aarch64_merge_gnu_properties): New. (elf_backend_setup_gnu_properties): Define for AArch64. (elf_backend_merge_gnu_properties): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_link_setup_gnu_properties): Define. (_bfd_aarch64_elf_parse_gnu_properties): Define. (_bfd_aarch64_elf_merge_gnu_properties): Define. * elfxx-aarch64.h (_bfd_aarch64_elf_link_setup_gnu_properties): Declare. (_bfd_aarch64_elf_parse_gnu_properties): Declare. (_bfd_aarch64_elf_merge_gnu_properties): Declare. (elf_backend_parse_gnu_properties): Define for AArch64. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * readelf.c (decode_aarch64_feature_1_and): New. (print_gnu_property_note): Add case for AArch64 gnu notes. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * elf/common.h (GNU_PROPERTY_AARCH64_FEATURE_1_AND): New. (GNU_PROPERTY_AARCH64_FEATURE_1_BTI): New. (GNU_PROPERTY_AARCH64_FEATURE_1_PAC): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * NEWS: Document GNU_PROPERTY_AARCH64_FEATURE_1_BTI and GNU_PROPERTY_AARCH64_FEATURE_1_PAC. * testsuite/ld-aarch64/aarch64-elf.exp: Add run commands for new tests. * testsuite/ld-aarch64/property-bti-pac1.d: New test. * testsuite/ld-aarch64/property-bti-pac1.s: New test. * testsuite/ld-aarch64/property-bti-pac2.d: New test. * testsuite/ld-aarch64/property-bti-pac2.s: New test. * testsuite/ld-aarch64/property-bti-pac3.d: New test.
2019-03-13 11:42:27 +01:00
/* Implement elf_backend_setup_gnu_properties for AArch64. It serves as a
wrapper function for _bfd_aarch64_elf_link_setup_gnu_properties to account
for the effect of GNU properties of the output_bfd. */
static bfd *
elfNN_aarch64_link_setup_gnu_properties (struct bfd_link_info *info)
{
uint32_t prop = elf_aarch64_tdata (info->output_bfd)->gnu_and_prop;
bfd *pbfd = _bfd_aarch64_elf_link_setup_gnu_properties (info, &prop);
elf_aarch64_tdata (info->output_bfd)->gnu_and_prop = prop;
[BFD, LD, AArch64, 2/3] Add --force-bti to enable BTI and to select BTI enabled PLTs This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds a new ld command line option: --force-bti. In the presence of this option, the linker enables BTI with the GNU_PROPERTY_AARCH64_FEATURE_1_BTI feature. This gives out warning in case of missing gnu notes for BTI in inputs. 2) It also defines a new set of BTI enabled PLTs. These are used either when all the inputs are marked with GNU_PROPERTY_AARCH64_FEATURE_1_BTI or when the new --force-bti option is used. This required adding new fields in elf_aarch64_link_hash_table so that we could make the PLT related information more generic. 3) It also defines a dynamic tag DT_AARCH64_BTI_PLT. The linker uses this whenever it picks BTI enabled PLTs. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * bfd-in.h (aarch64_plt_type, aarch64_enable_bti_type): New. (aarch64_bti_pac_info): New. (bfd_elf64_aarch64_set_options): Add aarch64_bti_pac_info argument. (bfd_elf32_aarch64_set_options): Likewise. * bfd-in2.h: Regenerate * elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): New. (PLT_BTI_SMALL_ENTRY_SIZE, PLT_BTI_TLSDESC_ENTRY_SIZE): New. (elfNN_aarch64_small_plt0_bti_entry): New. (elfNN_aarch64_small_plt_bti_entry): New. (elfNN_aarch64_tlsdesc_small_plt_bti_entry): New. (elf_aarch64_obj_tdata): Add no_bti_warn and plt_type fields. (elf_aarch64_link_hash_table): Add plt0_entry, plt_entry and tlsdesc_plt_entry_size fields. (elfNN_aarch64_link_hash_table_create): Initialise the new fields. (setup_plt_values): New helper function. (bfd_elfNN_aarch64_set_options): Use new bp_info to set plt sizes and bti enable type. (elfNN_aarch64_allocate_dynrelocs): Use new size members instead of fixed macros. (elfNN_aarch64_size_dynamic_sections): Likewise and add checks. (elfNN_aarch64_create_small_pltn_entry): Use new generic pointers to plt stubs instead of fixed ones and update filling them according to the need for bti. (elfNN_aarch64_init_small_plt0_entry): Likewise. (elfNN_aarch64_finish_dynamic_sections): Likewise. (get_plt_type, elfNN_aarch64_get_synthetic_symtab): New. (elfNN_aarch64_plt_sym_val): Update size accordingly. (elfNN_aarch64_link_setup_gnu_properties): Set up plts if BTI GNU NOTE is set. (bfd_elfNN_get_synthetic_symtab): Define. (elfNN_aarch64_merge_gnu_properties): Give out warning with --force-bti and mising BTI NOTE SECTION. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * readelf.c (get_aarch64_dynamic_type): New. (get_dynamic_type): Use above for EM_AARCH64. (dynamic_section_aarch64_val): New. (process_dynamic_section): Use above for EM_AARCH64. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * elf/aarch64.h (DT_AARCH64_BTI_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * NEWS: Document --force-bti. * emultempl/aarch64elf.em (plt_type, bti_type, OPTION_FORCE_BTI): New. (PARSE_AND_LIST_SHORTOPTS, PARSE_AND_LIST_OPTIONS): Add force-bti. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FORCE_BTI. * testsuite/ld-aarch64/aarch64-elf.exp: Add all the tests below. * testsuite/ld-aarch64/bti-plt-1.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: New test. * testsuite/ld-aarch64/bti-plt-2.s: New test. * testsuite/ld-aarch64/bti-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-3.d: New test. * testsuite/ld-aarch64/bti-plt-4.d: New test. * testsuite/ld-aarch64/bti-plt-5.d: New test. * testsuite/ld-aarch64/bti-plt-6.d: New test. * testsuite/ld-aarch64/bti-plt-7.d: New test. * testsuite/ld-aarch64/bti-plt-so.s: New test. * testsuite/ld-aarch64/bti-plt.ld: New test.
2019-03-13 11:54:30 +01:00
elf_aarch64_tdata (info->output_bfd)->plt_type
|= (prop & GNU_PROPERTY_AARCH64_FEATURE_1_BTI) ? PLT_BTI : 0;
setup_plt_values (info, elf_aarch64_tdata (info->output_bfd)->plt_type);
[BFD, LD, AArch64, 1/3] Add support for GNU PROPERTIES in AArch64 for BTI and PAC This is part of the patch series to add support for BTI and PAC in AArch64 linker. This patch implements the following: 1) This extends in the gnu property support in the linker for AArch64 by defining backend hooks for elf_backend_setup_gnu_properties, elf_backend_merge_gnu_properties and elf_backend_parse_gnu_properties. 2) It defines AArch64 specific GNU property GNU_PROPERTY_AARCH64_FEATURE_1_AND and 2 bit for BTI and PAC in it. 3) It also adds support in readelf.c to read and print these new GNU properties in AArch64. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * elf-properties.c (_bfd_elf_link_setup_gnu_properties): Exclude linker created inputs from merge. * elfnn-aarch64.c (struct elf_aarch64_obj_tdata): Add field for GNU_PROPERTY_AARCH64_FEATURE_1_AND properties. (elfNN_aarch64_link_setup_gnu_properties): New. (elfNN_aarch64_merge_gnu_properties): New. (elf_backend_setup_gnu_properties): Define for AArch64. (elf_backend_merge_gnu_properties): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_link_setup_gnu_properties): Define. (_bfd_aarch64_elf_parse_gnu_properties): Define. (_bfd_aarch64_elf_merge_gnu_properties): Define. * elfxx-aarch64.h (_bfd_aarch64_elf_link_setup_gnu_properties): Declare. (_bfd_aarch64_elf_parse_gnu_properties): Declare. (_bfd_aarch64_elf_merge_gnu_properties): Declare. (elf_backend_parse_gnu_properties): Define for AArch64. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * readelf.c (decode_aarch64_feature_1_and): New. (print_gnu_property_note): Add case for AArch64 gnu notes. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * elf/common.h (GNU_PROPERTY_AARCH64_FEATURE_1_AND): New. (GNU_PROPERTY_AARCH64_FEATURE_1_BTI): New. (GNU_PROPERTY_AARCH64_FEATURE_1_PAC): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * NEWS: Document GNU_PROPERTY_AARCH64_FEATURE_1_BTI and GNU_PROPERTY_AARCH64_FEATURE_1_PAC. * testsuite/ld-aarch64/aarch64-elf.exp: Add run commands for new tests. * testsuite/ld-aarch64/property-bti-pac1.d: New test. * testsuite/ld-aarch64/property-bti-pac1.s: New test. * testsuite/ld-aarch64/property-bti-pac2.d: New test. * testsuite/ld-aarch64/property-bti-pac2.s: New test. * testsuite/ld-aarch64/property-bti-pac3.d: New test.
2019-03-13 11:42:27 +01:00
return pbfd;
}
/* Implement elf_backend_merge_gnu_properties for AArch64. It serves as a
wrapper function for _bfd_aarch64_elf_merge_gnu_properties to account
for the effect of GNU properties of the output_bfd. */
static bfd_boolean
elfNN_aarch64_merge_gnu_properties (struct bfd_link_info *info,
[BFD, AArch64, x86] Improve warning for --force-bti The AArch64 linker option to turn on BTI (--force-bti) warns in case there are input objects which have a missing GNU NOTE section for BTI. This patch is trying to improve the warnings that come out. In order to do so, I propose adding a new argument to elf_merge_gnu_properties and the backend function merge_gnu_properties. This new argument makes sure that we now pass both the objects along with the properties to which they belong to. The x86 backend function has also been updated to match this change. *** bfd/ChangeLog *** 2019-03-21 Sudakshina Das <sudi.das@arm.com> * elf-bfd.h (struct elf_backend_data): Add argument to merge_gnu_properties. * elf-properties.c (elf_merge_gnu_properties): Add argument to itself and while calling bed->merge_gnu_properties. (elf_merge_gnu_property_list): Update the calls for elf_merge_gnu_properties. * elfnn-aarch64.c (elfNN_aarch64_merge_gnu_properties): Update handling of --force-bti warning and add argument. * elfxx-aarch64.c (_bfd_aarch64_elf_link_setup_gnu_properties): Add warning. * elfxx-x86.c (_bfd_x86_elf_merge_gnu_properties): Add argument. * elfxx-x86.h (_bfd_x86_elf_merge_gnu_properties): Likewise in declaration. *** ld/ChangeLog *** 2019-03-21 Sudakshina Das <sudi.das@arm.com> * testsuite/ld-aarch64/aarch64-elf.exp: Add new test. * testsuite/ld-aarch64/bti-plt-1.s: Add .ifdef for PAC note section. * testsuite/ld-aarch64/bti-plt-6.d: Update warning. * testsuite/ld-aarch64/bti-plt-7.d: Likewise. * testsuite/ld-aarch64/bti-warn.d: New test.
2019-03-21 17:20:21 +01:00
bfd *abfd, bfd *bbfd,
[BFD, LD, AArch64, 1/3] Add support for GNU PROPERTIES in AArch64 for BTI and PAC This is part of the patch series to add support for BTI and PAC in AArch64 linker. This patch implements the following: 1) This extends in the gnu property support in the linker for AArch64 by defining backend hooks for elf_backend_setup_gnu_properties, elf_backend_merge_gnu_properties and elf_backend_parse_gnu_properties. 2) It defines AArch64 specific GNU property GNU_PROPERTY_AARCH64_FEATURE_1_AND and 2 bit for BTI and PAC in it. 3) It also adds support in readelf.c to read and print these new GNU properties in AArch64. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * elf-properties.c (_bfd_elf_link_setup_gnu_properties): Exclude linker created inputs from merge. * elfnn-aarch64.c (struct elf_aarch64_obj_tdata): Add field for GNU_PROPERTY_AARCH64_FEATURE_1_AND properties. (elfNN_aarch64_link_setup_gnu_properties): New. (elfNN_aarch64_merge_gnu_properties): New. (elf_backend_setup_gnu_properties): Define for AArch64. (elf_backend_merge_gnu_properties): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_link_setup_gnu_properties): Define. (_bfd_aarch64_elf_parse_gnu_properties): Define. (_bfd_aarch64_elf_merge_gnu_properties): Define. * elfxx-aarch64.h (_bfd_aarch64_elf_link_setup_gnu_properties): Declare. (_bfd_aarch64_elf_parse_gnu_properties): Declare. (_bfd_aarch64_elf_merge_gnu_properties): Declare. (elf_backend_parse_gnu_properties): Define for AArch64. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * readelf.c (decode_aarch64_feature_1_and): New. (print_gnu_property_note): Add case for AArch64 gnu notes. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * elf/common.h (GNU_PROPERTY_AARCH64_FEATURE_1_AND): New. (GNU_PROPERTY_AARCH64_FEATURE_1_BTI): New. (GNU_PROPERTY_AARCH64_FEATURE_1_PAC): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * NEWS: Document GNU_PROPERTY_AARCH64_FEATURE_1_BTI and GNU_PROPERTY_AARCH64_FEATURE_1_PAC. * testsuite/ld-aarch64/aarch64-elf.exp: Add run commands for new tests. * testsuite/ld-aarch64/property-bti-pac1.d: New test. * testsuite/ld-aarch64/property-bti-pac1.s: New test. * testsuite/ld-aarch64/property-bti-pac2.d: New test. * testsuite/ld-aarch64/property-bti-pac2.s: New test. * testsuite/ld-aarch64/property-bti-pac3.d: New test.
2019-03-13 11:42:27 +01:00
elf_property *aprop,
elf_property *bprop)
{
uint32_t prop
= elf_aarch64_tdata (info->output_bfd)->gnu_and_prop;
[BFD, LD, AArch64, 2/3] Add --force-bti to enable BTI and to select BTI enabled PLTs This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds a new ld command line option: --force-bti. In the presence of this option, the linker enables BTI with the GNU_PROPERTY_AARCH64_FEATURE_1_BTI feature. This gives out warning in case of missing gnu notes for BTI in inputs. 2) It also defines a new set of BTI enabled PLTs. These are used either when all the inputs are marked with GNU_PROPERTY_AARCH64_FEATURE_1_BTI or when the new --force-bti option is used. This required adding new fields in elf_aarch64_link_hash_table so that we could make the PLT related information more generic. 3) It also defines a dynamic tag DT_AARCH64_BTI_PLT. The linker uses this whenever it picks BTI enabled PLTs. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * bfd-in.h (aarch64_plt_type, aarch64_enable_bti_type): New. (aarch64_bti_pac_info): New. (bfd_elf64_aarch64_set_options): Add aarch64_bti_pac_info argument. (bfd_elf32_aarch64_set_options): Likewise. * bfd-in2.h: Regenerate * elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): New. (PLT_BTI_SMALL_ENTRY_SIZE, PLT_BTI_TLSDESC_ENTRY_SIZE): New. (elfNN_aarch64_small_plt0_bti_entry): New. (elfNN_aarch64_small_plt_bti_entry): New. (elfNN_aarch64_tlsdesc_small_plt_bti_entry): New. (elf_aarch64_obj_tdata): Add no_bti_warn and plt_type fields. (elf_aarch64_link_hash_table): Add plt0_entry, plt_entry and tlsdesc_plt_entry_size fields. (elfNN_aarch64_link_hash_table_create): Initialise the new fields. (setup_plt_values): New helper function. (bfd_elfNN_aarch64_set_options): Use new bp_info to set plt sizes and bti enable type. (elfNN_aarch64_allocate_dynrelocs): Use new size members instead of fixed macros. (elfNN_aarch64_size_dynamic_sections): Likewise and add checks. (elfNN_aarch64_create_small_pltn_entry): Use new generic pointers to plt stubs instead of fixed ones and update filling them according to the need for bti. (elfNN_aarch64_init_small_plt0_entry): Likewise. (elfNN_aarch64_finish_dynamic_sections): Likewise. (get_plt_type, elfNN_aarch64_get_synthetic_symtab): New. (elfNN_aarch64_plt_sym_val): Update size accordingly. (elfNN_aarch64_link_setup_gnu_properties): Set up plts if BTI GNU NOTE is set. (bfd_elfNN_get_synthetic_symtab): Define. (elfNN_aarch64_merge_gnu_properties): Give out warning with --force-bti and mising BTI NOTE SECTION. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * readelf.c (get_aarch64_dynamic_type): New. (get_dynamic_type): Use above for EM_AARCH64. (dynamic_section_aarch64_val): New. (process_dynamic_section): Use above for EM_AARCH64. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * elf/aarch64.h (DT_AARCH64_BTI_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * NEWS: Document --force-bti. * emultempl/aarch64elf.em (plt_type, bti_type, OPTION_FORCE_BTI): New. (PARSE_AND_LIST_SHORTOPTS, PARSE_AND_LIST_OPTIONS): Add force-bti. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FORCE_BTI. * testsuite/ld-aarch64/aarch64-elf.exp: Add all the tests below. * testsuite/ld-aarch64/bti-plt-1.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: New test. * testsuite/ld-aarch64/bti-plt-2.s: New test. * testsuite/ld-aarch64/bti-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-3.d: New test. * testsuite/ld-aarch64/bti-plt-4.d: New test. * testsuite/ld-aarch64/bti-plt-5.d: New test. * testsuite/ld-aarch64/bti-plt-6.d: New test. * testsuite/ld-aarch64/bti-plt-7.d: New test. * testsuite/ld-aarch64/bti-plt-so.s: New test. * testsuite/ld-aarch64/bti-plt.ld: New test.
2019-03-13 11:54:30 +01:00
/* If output has been marked with BTI using command line argument, give out
warning if necessary. */
[BFD, AArch64, x86] Improve warning for --force-bti The AArch64 linker option to turn on BTI (--force-bti) warns in case there are input objects which have a missing GNU NOTE section for BTI. This patch is trying to improve the warnings that come out. In order to do so, I propose adding a new argument to elf_merge_gnu_properties and the backend function merge_gnu_properties. This new argument makes sure that we now pass both the objects along with the properties to which they belong to. The x86 backend function has also been updated to match this change. *** bfd/ChangeLog *** 2019-03-21 Sudakshina Das <sudi.das@arm.com> * elf-bfd.h (struct elf_backend_data): Add argument to merge_gnu_properties. * elf-properties.c (elf_merge_gnu_properties): Add argument to itself and while calling bed->merge_gnu_properties. (elf_merge_gnu_property_list): Update the calls for elf_merge_gnu_properties. * elfnn-aarch64.c (elfNN_aarch64_merge_gnu_properties): Update handling of --force-bti warning and add argument. * elfxx-aarch64.c (_bfd_aarch64_elf_link_setup_gnu_properties): Add warning. * elfxx-x86.c (_bfd_x86_elf_merge_gnu_properties): Add argument. * elfxx-x86.h (_bfd_x86_elf_merge_gnu_properties): Likewise in declaration. *** ld/ChangeLog *** 2019-03-21 Sudakshina Das <sudi.das@arm.com> * testsuite/ld-aarch64/aarch64-elf.exp: Add new test. * testsuite/ld-aarch64/bti-plt-1.s: Add .ifdef for PAC note section. * testsuite/ld-aarch64/bti-plt-6.d: Update warning. * testsuite/ld-aarch64/bti-plt-7.d: Likewise. * testsuite/ld-aarch64/bti-warn.d: New test.
2019-03-21 17:20:21 +01:00
/* Properties are merged per type, hence only check for warnings when merging
GNU_PROPERTY_AARCH64_FEATURE_1_AND. */
if (((aprop && aprop->pr_type == GNU_PROPERTY_AARCH64_FEATURE_1_AND)
|| (bprop && bprop->pr_type == GNU_PROPERTY_AARCH64_FEATURE_1_AND))
&& (prop & GNU_PROPERTY_AARCH64_FEATURE_1_BTI)
[BFD, LD, AArch64, 2/3] Add --force-bti to enable BTI and to select BTI enabled PLTs This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds a new ld command line option: --force-bti. In the presence of this option, the linker enables BTI with the GNU_PROPERTY_AARCH64_FEATURE_1_BTI feature. This gives out warning in case of missing gnu notes for BTI in inputs. 2) It also defines a new set of BTI enabled PLTs. These are used either when all the inputs are marked with GNU_PROPERTY_AARCH64_FEATURE_1_BTI or when the new --force-bti option is used. This required adding new fields in elf_aarch64_link_hash_table so that we could make the PLT related information more generic. 3) It also defines a dynamic tag DT_AARCH64_BTI_PLT. The linker uses this whenever it picks BTI enabled PLTs. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * bfd-in.h (aarch64_plt_type, aarch64_enable_bti_type): New. (aarch64_bti_pac_info): New. (bfd_elf64_aarch64_set_options): Add aarch64_bti_pac_info argument. (bfd_elf32_aarch64_set_options): Likewise. * bfd-in2.h: Regenerate * elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): New. (PLT_BTI_SMALL_ENTRY_SIZE, PLT_BTI_TLSDESC_ENTRY_SIZE): New. (elfNN_aarch64_small_plt0_bti_entry): New. (elfNN_aarch64_small_plt_bti_entry): New. (elfNN_aarch64_tlsdesc_small_plt_bti_entry): New. (elf_aarch64_obj_tdata): Add no_bti_warn and plt_type fields. (elf_aarch64_link_hash_table): Add plt0_entry, plt_entry and tlsdesc_plt_entry_size fields. (elfNN_aarch64_link_hash_table_create): Initialise the new fields. (setup_plt_values): New helper function. (bfd_elfNN_aarch64_set_options): Use new bp_info to set plt sizes and bti enable type. (elfNN_aarch64_allocate_dynrelocs): Use new size members instead of fixed macros. (elfNN_aarch64_size_dynamic_sections): Likewise and add checks. (elfNN_aarch64_create_small_pltn_entry): Use new generic pointers to plt stubs instead of fixed ones and update filling them according to the need for bti. (elfNN_aarch64_init_small_plt0_entry): Likewise. (elfNN_aarch64_finish_dynamic_sections): Likewise. (get_plt_type, elfNN_aarch64_get_synthetic_symtab): New. (elfNN_aarch64_plt_sym_val): Update size accordingly. (elfNN_aarch64_link_setup_gnu_properties): Set up plts if BTI GNU NOTE is set. (bfd_elfNN_get_synthetic_symtab): Define. (elfNN_aarch64_merge_gnu_properties): Give out warning with --force-bti and mising BTI NOTE SECTION. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * readelf.c (get_aarch64_dynamic_type): New. (get_dynamic_type): Use above for EM_AARCH64. (dynamic_section_aarch64_val): New. (process_dynamic_section): Use above for EM_AARCH64. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * elf/aarch64.h (DT_AARCH64_BTI_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * NEWS: Document --force-bti. * emultempl/aarch64elf.em (plt_type, bti_type, OPTION_FORCE_BTI): New. (PARSE_AND_LIST_SHORTOPTS, PARSE_AND_LIST_OPTIONS): Add force-bti. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FORCE_BTI. * testsuite/ld-aarch64/aarch64-elf.exp: Add all the tests below. * testsuite/ld-aarch64/bti-plt-1.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: New test. * testsuite/ld-aarch64/bti-plt-2.s: New test. * testsuite/ld-aarch64/bti-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-3.d: New test. * testsuite/ld-aarch64/bti-plt-4.d: New test. * testsuite/ld-aarch64/bti-plt-5.d: New test. * testsuite/ld-aarch64/bti-plt-6.d: New test. * testsuite/ld-aarch64/bti-plt-7.d: New test. * testsuite/ld-aarch64/bti-plt-so.s: New test. * testsuite/ld-aarch64/bti-plt.ld: New test.
2019-03-13 11:54:30 +01:00
&& (!elf_aarch64_tdata (info->output_bfd)->no_bti_warn))
{
if ((aprop && !(aprop->u.number & GNU_PROPERTY_AARCH64_FEATURE_1_BTI))
[BFD, AArch64, x86] Improve warning for --force-bti The AArch64 linker option to turn on BTI (--force-bti) warns in case there are input objects which have a missing GNU NOTE section for BTI. This patch is trying to improve the warnings that come out. In order to do so, I propose adding a new argument to elf_merge_gnu_properties and the backend function merge_gnu_properties. This new argument makes sure that we now pass both the objects along with the properties to which they belong to. The x86 backend function has also been updated to match this change. *** bfd/ChangeLog *** 2019-03-21 Sudakshina Das <sudi.das@arm.com> * elf-bfd.h (struct elf_backend_data): Add argument to merge_gnu_properties. * elf-properties.c (elf_merge_gnu_properties): Add argument to itself and while calling bed->merge_gnu_properties. (elf_merge_gnu_property_list): Update the calls for elf_merge_gnu_properties. * elfnn-aarch64.c (elfNN_aarch64_merge_gnu_properties): Update handling of --force-bti warning and add argument. * elfxx-aarch64.c (_bfd_aarch64_elf_link_setup_gnu_properties): Add warning. * elfxx-x86.c (_bfd_x86_elf_merge_gnu_properties): Add argument. * elfxx-x86.h (_bfd_x86_elf_merge_gnu_properties): Likewise in declaration. *** ld/ChangeLog *** 2019-03-21 Sudakshina Das <sudi.das@arm.com> * testsuite/ld-aarch64/aarch64-elf.exp: Add new test. * testsuite/ld-aarch64/bti-plt-1.s: Add .ifdef for PAC note section. * testsuite/ld-aarch64/bti-plt-6.d: Update warning. * testsuite/ld-aarch64/bti-plt-7.d: Likewise. * testsuite/ld-aarch64/bti-warn.d: New test.
2019-03-21 17:20:21 +01:00
|| !aprop)
[BFD, LD, AArch64, 2/3] Add --force-bti to enable BTI and to select BTI enabled PLTs This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds a new ld command line option: --force-bti. In the presence of this option, the linker enables BTI with the GNU_PROPERTY_AARCH64_FEATURE_1_BTI feature. This gives out warning in case of missing gnu notes for BTI in inputs. 2) It also defines a new set of BTI enabled PLTs. These are used either when all the inputs are marked with GNU_PROPERTY_AARCH64_FEATURE_1_BTI or when the new --force-bti option is used. This required adding new fields in elf_aarch64_link_hash_table so that we could make the PLT related information more generic. 3) It also defines a dynamic tag DT_AARCH64_BTI_PLT. The linker uses this whenever it picks BTI enabled PLTs. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * bfd-in.h (aarch64_plt_type, aarch64_enable_bti_type): New. (aarch64_bti_pac_info): New. (bfd_elf64_aarch64_set_options): Add aarch64_bti_pac_info argument. (bfd_elf32_aarch64_set_options): Likewise. * bfd-in2.h: Regenerate * elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): New. (PLT_BTI_SMALL_ENTRY_SIZE, PLT_BTI_TLSDESC_ENTRY_SIZE): New. (elfNN_aarch64_small_plt0_bti_entry): New. (elfNN_aarch64_small_plt_bti_entry): New. (elfNN_aarch64_tlsdesc_small_plt_bti_entry): New. (elf_aarch64_obj_tdata): Add no_bti_warn and plt_type fields. (elf_aarch64_link_hash_table): Add plt0_entry, plt_entry and tlsdesc_plt_entry_size fields. (elfNN_aarch64_link_hash_table_create): Initialise the new fields. (setup_plt_values): New helper function. (bfd_elfNN_aarch64_set_options): Use new bp_info to set plt sizes and bti enable type. (elfNN_aarch64_allocate_dynrelocs): Use new size members instead of fixed macros. (elfNN_aarch64_size_dynamic_sections): Likewise and add checks. (elfNN_aarch64_create_small_pltn_entry): Use new generic pointers to plt stubs instead of fixed ones and update filling them according to the need for bti. (elfNN_aarch64_init_small_plt0_entry): Likewise. (elfNN_aarch64_finish_dynamic_sections): Likewise. (get_plt_type, elfNN_aarch64_get_synthetic_symtab): New. (elfNN_aarch64_plt_sym_val): Update size accordingly. (elfNN_aarch64_link_setup_gnu_properties): Set up plts if BTI GNU NOTE is set. (bfd_elfNN_get_synthetic_symtab): Define. (elfNN_aarch64_merge_gnu_properties): Give out warning with --force-bti and mising BTI NOTE SECTION. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * readelf.c (get_aarch64_dynamic_type): New. (get_dynamic_type): Use above for EM_AARCH64. (dynamic_section_aarch64_val): New. (process_dynamic_section): Use above for EM_AARCH64. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * elf/aarch64.h (DT_AARCH64_BTI_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * NEWS: Document --force-bti. * emultempl/aarch64elf.em (plt_type, bti_type, OPTION_FORCE_BTI): New. (PARSE_AND_LIST_SHORTOPTS, PARSE_AND_LIST_OPTIONS): Add force-bti. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FORCE_BTI. * testsuite/ld-aarch64/aarch64-elf.exp: Add all the tests below. * testsuite/ld-aarch64/bti-plt-1.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: New test. * testsuite/ld-aarch64/bti-plt-2.s: New test. * testsuite/ld-aarch64/bti-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-3.d: New test. * testsuite/ld-aarch64/bti-plt-4.d: New test. * testsuite/ld-aarch64/bti-plt-5.d: New test. * testsuite/ld-aarch64/bti-plt-6.d: New test. * testsuite/ld-aarch64/bti-plt-7.d: New test. * testsuite/ld-aarch64/bti-plt-so.s: New test. * testsuite/ld-aarch64/bti-plt.ld: New test.
2019-03-13 11:54:30 +01:00
{
[LD, AArch64] Move ELF options behind -z This patch moves the current AArch64 ld options of --force-bti and --pac-plt to -z force-bti and -z pac-plt since these are ELF specific options. *** bfd/ChangeLog *** 2019-06-06 Sudakshina Das <sudi.das@arm.com> * bfd-in.h: Change comment. * bfd-in2.h: Regenerate. * elfnn-aarch64.c (elfNN_aarch64_merge_gnu_properties): Update warning. * elfxx-aarch64.c (_bfd_aarch64_elf_link_setup_gnu_properties): Likwise. *** ld/ChangeLog *** 2019-06-06 Sudakshina Das <sudi.das@arm.com> * NEWS: Update options names. * emultempl/aarch64elf.em (OPTION_FORCE_BTI, OPTION_PAC_PLT): Remove. (PARSE_AND_LIST_LONGOPTS): Remove force-bti and pac-plt. (PARSE_AND_LIST_OPTIONS): Update to -z. (PARSE_AND_LIST_ARGS_CASE_Z_AARCH64): New. (PARSE_AND_LIST_ARGS_CASE_Z): Add PARSE_AND_LIST_ARGS_CASE_Z_AARCH64. (PARSE_AND_LIST_ARGS_CASES): Move cases for these options. * testsuite/ld-aarch64/bti-pac-plt-1.d: Update option. * testsuite/ld-aarch64/bti-pac-plt-2.d: Likewise. * testsuite/ld-aarch64/bti-plt-1.d: Likewise. * testsuite/ld-aarch64/bti-plt-2.d: Likewise. * testsuite/ld-aarch64/bti-plt-3.d: Likewise. * testsuite/ld-aarch64/bti-plt-4.d: Likewise. * testsuite/ld-aarch64/bti-plt-6.d: Likewise. * testsuite/ld-aarch64/bti-plt-7.d: Likewise. * testsuite/ld-aarch64/bti-warn.d: Likewise. * testsuite/ld-aarch64/pac-plt-1.d: Likewise. * testsuite/ld-aarch64/pac-plt-2.d: Likewise.
2019-06-06 13:21:14 +02:00
_bfd_error_handler (_("%pB: warning: BTI turned on by -z force-bti when "
[BFD, AArch64, x86] Improve warning for --force-bti The AArch64 linker option to turn on BTI (--force-bti) warns in case there are input objects which have a missing GNU NOTE section for BTI. This patch is trying to improve the warnings that come out. In order to do so, I propose adding a new argument to elf_merge_gnu_properties and the backend function merge_gnu_properties. This new argument makes sure that we now pass both the objects along with the properties to which they belong to. The x86 backend function has also been updated to match this change. *** bfd/ChangeLog *** 2019-03-21 Sudakshina Das <sudi.das@arm.com> * elf-bfd.h (struct elf_backend_data): Add argument to merge_gnu_properties. * elf-properties.c (elf_merge_gnu_properties): Add argument to itself and while calling bed->merge_gnu_properties. (elf_merge_gnu_property_list): Update the calls for elf_merge_gnu_properties. * elfnn-aarch64.c (elfNN_aarch64_merge_gnu_properties): Update handling of --force-bti warning and add argument. * elfxx-aarch64.c (_bfd_aarch64_elf_link_setup_gnu_properties): Add warning. * elfxx-x86.c (_bfd_x86_elf_merge_gnu_properties): Add argument. * elfxx-x86.h (_bfd_x86_elf_merge_gnu_properties): Likewise in declaration. *** ld/ChangeLog *** 2019-03-21 Sudakshina Das <sudi.das@arm.com> * testsuite/ld-aarch64/aarch64-elf.exp: Add new test. * testsuite/ld-aarch64/bti-plt-1.s: Add .ifdef for PAC note section. * testsuite/ld-aarch64/bti-plt-6.d: Update warning. * testsuite/ld-aarch64/bti-plt-7.d: Likewise. * testsuite/ld-aarch64/bti-warn.d: New test.
2019-03-21 17:20:21 +01:00
"all inputs do not have BTI in NOTE section."),
abfd);
}
if ((bprop && !(bprop->u.number & GNU_PROPERTY_AARCH64_FEATURE_1_BTI))
|| !bprop)
{
[LD, AArch64] Move ELF options behind -z This patch moves the current AArch64 ld options of --force-bti and --pac-plt to -z force-bti and -z pac-plt since these are ELF specific options. *** bfd/ChangeLog *** 2019-06-06 Sudakshina Das <sudi.das@arm.com> * bfd-in.h: Change comment. * bfd-in2.h: Regenerate. * elfnn-aarch64.c (elfNN_aarch64_merge_gnu_properties): Update warning. * elfxx-aarch64.c (_bfd_aarch64_elf_link_setup_gnu_properties): Likwise. *** ld/ChangeLog *** 2019-06-06 Sudakshina Das <sudi.das@arm.com> * NEWS: Update options names. * emultempl/aarch64elf.em (OPTION_FORCE_BTI, OPTION_PAC_PLT): Remove. (PARSE_AND_LIST_LONGOPTS): Remove force-bti and pac-plt. (PARSE_AND_LIST_OPTIONS): Update to -z. (PARSE_AND_LIST_ARGS_CASE_Z_AARCH64): New. (PARSE_AND_LIST_ARGS_CASE_Z): Add PARSE_AND_LIST_ARGS_CASE_Z_AARCH64. (PARSE_AND_LIST_ARGS_CASES): Move cases for these options. * testsuite/ld-aarch64/bti-pac-plt-1.d: Update option. * testsuite/ld-aarch64/bti-pac-plt-2.d: Likewise. * testsuite/ld-aarch64/bti-plt-1.d: Likewise. * testsuite/ld-aarch64/bti-plt-2.d: Likewise. * testsuite/ld-aarch64/bti-plt-3.d: Likewise. * testsuite/ld-aarch64/bti-plt-4.d: Likewise. * testsuite/ld-aarch64/bti-plt-6.d: Likewise. * testsuite/ld-aarch64/bti-plt-7.d: Likewise. * testsuite/ld-aarch64/bti-warn.d: Likewise. * testsuite/ld-aarch64/pac-plt-1.d: Likewise. * testsuite/ld-aarch64/pac-plt-2.d: Likewise.
2019-06-06 13:21:14 +02:00
_bfd_error_handler (_("%pB: warning: BTI turned on by -z force-bti when "
[BFD, AArch64, x86] Improve warning for --force-bti The AArch64 linker option to turn on BTI (--force-bti) warns in case there are input objects which have a missing GNU NOTE section for BTI. This patch is trying to improve the warnings that come out. In order to do so, I propose adding a new argument to elf_merge_gnu_properties and the backend function merge_gnu_properties. This new argument makes sure that we now pass both the objects along with the properties to which they belong to. The x86 backend function has also been updated to match this change. *** bfd/ChangeLog *** 2019-03-21 Sudakshina Das <sudi.das@arm.com> * elf-bfd.h (struct elf_backend_data): Add argument to merge_gnu_properties. * elf-properties.c (elf_merge_gnu_properties): Add argument to itself and while calling bed->merge_gnu_properties. (elf_merge_gnu_property_list): Update the calls for elf_merge_gnu_properties. * elfnn-aarch64.c (elfNN_aarch64_merge_gnu_properties): Update handling of --force-bti warning and add argument. * elfxx-aarch64.c (_bfd_aarch64_elf_link_setup_gnu_properties): Add warning. * elfxx-x86.c (_bfd_x86_elf_merge_gnu_properties): Add argument. * elfxx-x86.h (_bfd_x86_elf_merge_gnu_properties): Likewise in declaration. *** ld/ChangeLog *** 2019-03-21 Sudakshina Das <sudi.das@arm.com> * testsuite/ld-aarch64/aarch64-elf.exp: Add new test. * testsuite/ld-aarch64/bti-plt-1.s: Add .ifdef for PAC note section. * testsuite/ld-aarch64/bti-plt-6.d: Update warning. * testsuite/ld-aarch64/bti-plt-7.d: Likewise. * testsuite/ld-aarch64/bti-warn.d: New test.
2019-03-21 17:20:21 +01:00
"all inputs do not have BTI in NOTE section."),
bbfd);
[BFD, LD, AArch64, 2/3] Add --force-bti to enable BTI and to select BTI enabled PLTs This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds a new ld command line option: --force-bti. In the presence of this option, the linker enables BTI with the GNU_PROPERTY_AARCH64_FEATURE_1_BTI feature. This gives out warning in case of missing gnu notes for BTI in inputs. 2) It also defines a new set of BTI enabled PLTs. These are used either when all the inputs are marked with GNU_PROPERTY_AARCH64_FEATURE_1_BTI or when the new --force-bti option is used. This required adding new fields in elf_aarch64_link_hash_table so that we could make the PLT related information more generic. 3) It also defines a dynamic tag DT_AARCH64_BTI_PLT. The linker uses this whenever it picks BTI enabled PLTs. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * bfd-in.h (aarch64_plt_type, aarch64_enable_bti_type): New. (aarch64_bti_pac_info): New. (bfd_elf64_aarch64_set_options): Add aarch64_bti_pac_info argument. (bfd_elf32_aarch64_set_options): Likewise. * bfd-in2.h: Regenerate * elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): New. (PLT_BTI_SMALL_ENTRY_SIZE, PLT_BTI_TLSDESC_ENTRY_SIZE): New. (elfNN_aarch64_small_plt0_bti_entry): New. (elfNN_aarch64_small_plt_bti_entry): New. (elfNN_aarch64_tlsdesc_small_plt_bti_entry): New. (elf_aarch64_obj_tdata): Add no_bti_warn and plt_type fields. (elf_aarch64_link_hash_table): Add plt0_entry, plt_entry and tlsdesc_plt_entry_size fields. (elfNN_aarch64_link_hash_table_create): Initialise the new fields. (setup_plt_values): New helper function. (bfd_elfNN_aarch64_set_options): Use new bp_info to set plt sizes and bti enable type. (elfNN_aarch64_allocate_dynrelocs): Use new size members instead of fixed macros. (elfNN_aarch64_size_dynamic_sections): Likewise and add checks. (elfNN_aarch64_create_small_pltn_entry): Use new generic pointers to plt stubs instead of fixed ones and update filling them according to the need for bti. (elfNN_aarch64_init_small_plt0_entry): Likewise. (elfNN_aarch64_finish_dynamic_sections): Likewise. (get_plt_type, elfNN_aarch64_get_synthetic_symtab): New. (elfNN_aarch64_plt_sym_val): Update size accordingly. (elfNN_aarch64_link_setup_gnu_properties): Set up plts if BTI GNU NOTE is set. (bfd_elfNN_get_synthetic_symtab): Define. (elfNN_aarch64_merge_gnu_properties): Give out warning with --force-bti and mising BTI NOTE SECTION. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * readelf.c (get_aarch64_dynamic_type): New. (get_dynamic_type): Use above for EM_AARCH64. (dynamic_section_aarch64_val): New. (process_dynamic_section): Use above for EM_AARCH64. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * elf/aarch64.h (DT_AARCH64_BTI_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * NEWS: Document --force-bti. * emultempl/aarch64elf.em (plt_type, bti_type, OPTION_FORCE_BTI): New. (PARSE_AND_LIST_SHORTOPTS, PARSE_AND_LIST_OPTIONS): Add force-bti. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FORCE_BTI. * testsuite/ld-aarch64/aarch64-elf.exp: Add all the tests below. * testsuite/ld-aarch64/bti-plt-1.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: New test. * testsuite/ld-aarch64/bti-plt-2.s: New test. * testsuite/ld-aarch64/bti-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-3.d: New test. * testsuite/ld-aarch64/bti-plt-4.d: New test. * testsuite/ld-aarch64/bti-plt-5.d: New test. * testsuite/ld-aarch64/bti-plt-6.d: New test. * testsuite/ld-aarch64/bti-plt-7.d: New test. * testsuite/ld-aarch64/bti-plt-so.s: New test. * testsuite/ld-aarch64/bti-plt.ld: New test.
2019-03-13 11:54:30 +01:00
}
}
[BFD, LD, AArch64, 1/3] Add support for GNU PROPERTIES in AArch64 for BTI and PAC This is part of the patch series to add support for BTI and PAC in AArch64 linker. This patch implements the following: 1) This extends in the gnu property support in the linker for AArch64 by defining backend hooks for elf_backend_setup_gnu_properties, elf_backend_merge_gnu_properties and elf_backend_parse_gnu_properties. 2) It defines AArch64 specific GNU property GNU_PROPERTY_AARCH64_FEATURE_1_AND and 2 bit for BTI and PAC in it. 3) It also adds support in readelf.c to read and print these new GNU properties in AArch64. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * elf-properties.c (_bfd_elf_link_setup_gnu_properties): Exclude linker created inputs from merge. * elfnn-aarch64.c (struct elf_aarch64_obj_tdata): Add field for GNU_PROPERTY_AARCH64_FEATURE_1_AND properties. (elfNN_aarch64_link_setup_gnu_properties): New. (elfNN_aarch64_merge_gnu_properties): New. (elf_backend_setup_gnu_properties): Define for AArch64. (elf_backend_merge_gnu_properties): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_link_setup_gnu_properties): Define. (_bfd_aarch64_elf_parse_gnu_properties): Define. (_bfd_aarch64_elf_merge_gnu_properties): Define. * elfxx-aarch64.h (_bfd_aarch64_elf_link_setup_gnu_properties): Declare. (_bfd_aarch64_elf_parse_gnu_properties): Declare. (_bfd_aarch64_elf_merge_gnu_properties): Declare. (elf_backend_parse_gnu_properties): Define for AArch64. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * readelf.c (decode_aarch64_feature_1_and): New. (print_gnu_property_note): Add case for AArch64 gnu notes. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * elf/common.h (GNU_PROPERTY_AARCH64_FEATURE_1_AND): New. (GNU_PROPERTY_AARCH64_FEATURE_1_BTI): New. (GNU_PROPERTY_AARCH64_FEATURE_1_PAC): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * NEWS: Document GNU_PROPERTY_AARCH64_FEATURE_1_BTI and GNU_PROPERTY_AARCH64_FEATURE_1_PAC. * testsuite/ld-aarch64/aarch64-elf.exp: Add run commands for new tests. * testsuite/ld-aarch64/property-bti-pac1.d: New test. * testsuite/ld-aarch64/property-bti-pac1.s: New test. * testsuite/ld-aarch64/property-bti-pac2.d: New test. * testsuite/ld-aarch64/property-bti-pac2.s: New test. * testsuite/ld-aarch64/property-bti-pac3.d: New test.
2019-03-13 11:42:27 +01:00
return _bfd_aarch64_elf_merge_gnu_properties (info, abfd, aprop,
bprop, prop);
}
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* We use this so we can override certain functions
(though currently we don't). */
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
const struct elf_size_info elfNN_aarch64_size_info =
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
{
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
sizeof (ElfNN_External_Ehdr),
sizeof (ElfNN_External_Phdr),
sizeof (ElfNN_External_Shdr),
sizeof (ElfNN_External_Rel),
sizeof (ElfNN_External_Rela),
sizeof (ElfNN_External_Sym),
sizeof (ElfNN_External_Dyn),
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
sizeof (Elf_External_Note),
4, /* Hash table entry size. */
1, /* Internal relocs per external relocs. */
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
ARCH_SIZE, /* Arch size. */
LOG_FILE_ALIGN, /* Log_file_align. */
ELFCLASSNN, EV_CURRENT,
bfd_elfNN_write_out_phdrs,
bfd_elfNN_write_shdrs_and_ehdr,
bfd_elfNN_checksum_contents,
bfd_elfNN_write_relocs,
bfd_elfNN_swap_symbol_in,
bfd_elfNN_swap_symbol_out,
bfd_elfNN_slurp_reloc_table,
bfd_elfNN_slurp_symbol_table,
bfd_elfNN_swap_dyn_in,
bfd_elfNN_swap_dyn_out,
bfd_elfNN_swap_reloc_in,
bfd_elfNN_swap_reloc_out,
bfd_elfNN_swap_reloca_in,
bfd_elfNN_swap_reloca_out
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
};
#define ELF_ARCH bfd_arch_aarch64
#define ELF_MACHINE_CODE EM_AARCH64
#define ELF_MAXPAGESIZE 0x10000
#define ELF_MINPAGESIZE 0x1000
#define ELF_COMMONPAGESIZE 0x1000
BFD whitespace fixes Binutils is supposed to use tabs. In my git config I have whitespace = indent-with-non-tab,space-before-tab,trailing-space and I got annoyed enough seeing red in "git diff" output to fix the problems. * doc/header.sed: Trim trailing space when splitting lines. * aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-cris.c, * aout-ns32k.c, * aout-target.h, * aout-tic30.c, * aoutf1.h, * aoutx.h, * arc-got.h, * arc-plt.def, * arc-plt.h, * archive.c, * archive64.c, * archures.c, * armnetbsd.c, * bfd-in.h, * bfd.c, * bfdio.c, * binary.c, * bout.c, * cache.c, * cisco-core.c, * coff-alpha.c, * coff-apollo.c, * coff-arm.c, * coff-h8300.c, * coff-i386.c, * coff-i860.c, * coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mcore.c, * coff-mips.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-stgo32.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * compress.c, * corefile.c, * cpu-alpha.c, * cpu-arm.c, * cpu-avr.c, * cpu-bfin.c, * cpu-cr16.c, * cpu-cr16c.c, * cpu-crx.c, * cpu-d10v.c, * cpu-frv.c, * cpu-ft32.c, * cpu-i370.c, * cpu-i960.c, * cpu-ia64-opc.c, * cpu-ip2k.c, * cpu-lm32.c, * cpu-m32r.c, * cpu-mcore.c, * cpu-microblaze.c, * cpu-mips.c, * cpu-moxie.c, * cpu-mt.c, * cpu-nios2.c, * cpu-ns32k.c, * cpu-or1k.c, * cpu-powerpc.c, * cpu-pru.c, * cpu-sh.c, * cpu-spu.c, * cpu-v850.c, * cpu-v850_rh850.c, * cpu-xgate.c, * cpu-z80.c, * dwarf1.c, * dwarf2.c, * ecoff.c, * ecofflink.c, * ecoffswap.h, * elf-bfd.h, * elf-eh-frame.c, * elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf-s390-common.c, * elf-strtab.c, * elf-vxworks.c, * elf.c, * elf32-am33lin.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-avr.h, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-i860.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68hc1x.c, * elf32-m68hc1x.h, * elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nds32.h, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score.h, * elf32-score7.c, * elf32-sh-symbian.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilegx.c, * elf32-tilegx.h, * elf32-tilepro.c, * elf32-tilepro.h, * elf32-v850.c, * elf32-vax.c, * elf32-wasm32.c, * elf32-xc16x.c, * elf32-xgate.c, * elf32-xgate.h, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-tilegx.c, * elf64-tilegx.h, * elf64-x86-64.c, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-aarch64.h, * elfxx-ia64.c, * elfxx-ia64.h, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * elfxx-x86.h, * freebsd.h, * hash.c, * host-aout.c, * hp300hpux.c, * hppabsd-core.c, * hpux-core.c, * i386aout.c, * i386linux.c, * i386lynx.c, * i386mach3.c, * i386msdos.c, * i386netbsd.c, * ieee.c, * ihex.c, * irix-core.c, * libaout.h, * libbfd-in.h, * libbfd.c, * libcoff-in.h, * libnlm.h, * libpei.h, * libxcoff.h, * linker.c, * lynx-core.c, * m68k4knetbsd.c, * m68klinux.c, * m68knetbsd.c, * m88kmach3.c, * mach-o-aarch64.c, * mach-o-arm.c, * mach-o-i386.c, * mach-o-target.c, * mach-o-x86-64.c, * mach-o.c, * mach-o.h, * merge.c, * mipsbsd.c, * mmo.c, * netbsd.h, * netbsd-core.c, * newsos3.c, * nlm-target.h, * nlm32-ppc.c, * nlm32-sparc.c, * nlmcode.h, * ns32k.h, * ns32knetbsd.c, * oasys.c, * opncls.c, * pc532-mach.c, * pdp11.c, * pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-mips.c, * pe-x86_64.c, * peXXigen.c, * pef.c, * pef.h, * pei-arm.c, * pei-i386.c, * pei-mcore.c, * pei-x86_64.c, * peicode.h, * plugin.c, * ppcboot.c, * ptrace-core.c, * reloc.c, * riscix.c, * rs6000-core.c, * section.c, * som.c, * som.h, * sparclinux.c, * sparcnetbsd.c, * srec.c, * stabs.c, * sunos.c, * syms.c, * targets.c, * tekhex.c, * trad-core.c, * vax1knetbsd.c, * vaxnetbsd.c, * verilog.c, * versados.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * wasm-module.c, * wasm-module.h, * xcofflink.c, * xsym.c, * xsym.h: Whitespace fixes. * bfd-in2.h, * libbfd.h, * libcoff.h: Regenerate.
2017-12-05 23:56:00 +01:00
#define bfd_elfNN_close_and_cleanup \
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_close_and_cleanup
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
BFD whitespace fixes Binutils is supposed to use tabs. In my git config I have whitespace = indent-with-non-tab,space-before-tab,trailing-space and I got annoyed enough seeing red in "git diff" output to fix the problems. * doc/header.sed: Trim trailing space when splitting lines. * aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-cris.c, * aout-ns32k.c, * aout-target.h, * aout-tic30.c, * aoutf1.h, * aoutx.h, * arc-got.h, * arc-plt.def, * arc-plt.h, * archive.c, * archive64.c, * archures.c, * armnetbsd.c, * bfd-in.h, * bfd.c, * bfdio.c, * binary.c, * bout.c, * cache.c, * cisco-core.c, * coff-alpha.c, * coff-apollo.c, * coff-arm.c, * coff-h8300.c, * coff-i386.c, * coff-i860.c, * coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mcore.c, * coff-mips.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-stgo32.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * compress.c, * corefile.c, * cpu-alpha.c, * cpu-arm.c, * cpu-avr.c, * cpu-bfin.c, * cpu-cr16.c, * cpu-cr16c.c, * cpu-crx.c, * cpu-d10v.c, * cpu-frv.c, * cpu-ft32.c, * cpu-i370.c, * cpu-i960.c, * cpu-ia64-opc.c, * cpu-ip2k.c, * cpu-lm32.c, * cpu-m32r.c, * cpu-mcore.c, * cpu-microblaze.c, * cpu-mips.c, * cpu-moxie.c, * cpu-mt.c, * cpu-nios2.c, * cpu-ns32k.c, * cpu-or1k.c, * cpu-powerpc.c, * cpu-pru.c, * cpu-sh.c, * cpu-spu.c, * cpu-v850.c, * cpu-v850_rh850.c, * cpu-xgate.c, * cpu-z80.c, * dwarf1.c, * dwarf2.c, * ecoff.c, * ecofflink.c, * ecoffswap.h, * elf-bfd.h, * elf-eh-frame.c, * elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf-s390-common.c, * elf-strtab.c, * elf-vxworks.c, * elf.c, * elf32-am33lin.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-avr.h, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-i860.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68hc1x.c, * elf32-m68hc1x.h, * elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nds32.h, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score.h, * elf32-score7.c, * elf32-sh-symbian.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilegx.c, * elf32-tilegx.h, * elf32-tilepro.c, * elf32-tilepro.h, * elf32-v850.c, * elf32-vax.c, * elf32-wasm32.c, * elf32-xc16x.c, * elf32-xgate.c, * elf32-xgate.h, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-tilegx.c, * elf64-tilegx.h, * elf64-x86-64.c, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-aarch64.h, * elfxx-ia64.c, * elfxx-ia64.h, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * elfxx-x86.h, * freebsd.h, * hash.c, * host-aout.c, * hp300hpux.c, * hppabsd-core.c, * hpux-core.c, * i386aout.c, * i386linux.c, * i386lynx.c, * i386mach3.c, * i386msdos.c, * i386netbsd.c, * ieee.c, * ihex.c, * irix-core.c, * libaout.h, * libbfd-in.h, * libbfd.c, * libcoff-in.h, * libnlm.h, * libpei.h, * libxcoff.h, * linker.c, * lynx-core.c, * m68k4knetbsd.c, * m68klinux.c, * m68knetbsd.c, * m88kmach3.c, * mach-o-aarch64.c, * mach-o-arm.c, * mach-o-i386.c, * mach-o-target.c, * mach-o-x86-64.c, * mach-o.c, * mach-o.h, * merge.c, * mipsbsd.c, * mmo.c, * netbsd.h, * netbsd-core.c, * newsos3.c, * nlm-target.h, * nlm32-ppc.c, * nlm32-sparc.c, * nlmcode.h, * ns32k.h, * ns32knetbsd.c, * oasys.c, * opncls.c, * pc532-mach.c, * pdp11.c, * pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-mips.c, * pe-x86_64.c, * peXXigen.c, * pef.c, * pef.h, * pei-arm.c, * pei-i386.c, * pei-mcore.c, * pei-x86_64.c, * peicode.h, * plugin.c, * ppcboot.c, * ptrace-core.c, * reloc.c, * riscix.c, * rs6000-core.c, * section.c, * som.c, * som.h, * sparclinux.c, * sparcnetbsd.c, * srec.c, * stabs.c, * sunos.c, * syms.c, * targets.c, * tekhex.c, * trad-core.c, * vax1knetbsd.c, * vaxnetbsd.c, * verilog.c, * versados.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * wasm-module.c, * wasm-module.h, * xcofflink.c, * xsym.c, * xsym.h: Whitespace fixes. * bfd-in2.h, * libbfd.h, * libcoff.h: Regenerate.
2017-12-05 23:56:00 +01:00
#define bfd_elfNN_bfd_free_cached_info \
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_bfd_free_cached_info
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
#define bfd_elfNN_bfd_is_target_special_symbol \
elfNN_aarch64_is_target_special_symbol
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
BFD whitespace fixes Binutils is supposed to use tabs. In my git config I have whitespace = indent-with-non-tab,space-before-tab,trailing-space and I got annoyed enough seeing red in "git diff" output to fix the problems. * doc/header.sed: Trim trailing space when splitting lines. * aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-cris.c, * aout-ns32k.c, * aout-target.h, * aout-tic30.c, * aoutf1.h, * aoutx.h, * arc-got.h, * arc-plt.def, * arc-plt.h, * archive.c, * archive64.c, * archures.c, * armnetbsd.c, * bfd-in.h, * bfd.c, * bfdio.c, * binary.c, * bout.c, * cache.c, * cisco-core.c, * coff-alpha.c, * coff-apollo.c, * coff-arm.c, * coff-h8300.c, * coff-i386.c, * coff-i860.c, * coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mcore.c, * coff-mips.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-stgo32.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * compress.c, * corefile.c, * cpu-alpha.c, * cpu-arm.c, * cpu-avr.c, * cpu-bfin.c, * cpu-cr16.c, * cpu-cr16c.c, * cpu-crx.c, * cpu-d10v.c, * cpu-frv.c, * cpu-ft32.c, * cpu-i370.c, * cpu-i960.c, * cpu-ia64-opc.c, * cpu-ip2k.c, * cpu-lm32.c, * cpu-m32r.c, * cpu-mcore.c, * cpu-microblaze.c, * cpu-mips.c, * cpu-moxie.c, * cpu-mt.c, * cpu-nios2.c, * cpu-ns32k.c, * cpu-or1k.c, * cpu-powerpc.c, * cpu-pru.c, * cpu-sh.c, * cpu-spu.c, * cpu-v850.c, * cpu-v850_rh850.c, * cpu-xgate.c, * cpu-z80.c, * dwarf1.c, * dwarf2.c, * ecoff.c, * ecofflink.c, * ecoffswap.h, * elf-bfd.h, * elf-eh-frame.c, * elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf-s390-common.c, * elf-strtab.c, * elf-vxworks.c, * elf.c, * elf32-am33lin.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-avr.h, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-i860.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68hc1x.c, * elf32-m68hc1x.h, * elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nds32.h, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score.h, * elf32-score7.c, * elf32-sh-symbian.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilegx.c, * elf32-tilegx.h, * elf32-tilepro.c, * elf32-tilepro.h, * elf32-v850.c, * elf32-vax.c, * elf32-wasm32.c, * elf32-xc16x.c, * elf32-xgate.c, * elf32-xgate.h, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-tilegx.c, * elf64-tilegx.h, * elf64-x86-64.c, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-aarch64.h, * elfxx-ia64.c, * elfxx-ia64.h, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * elfxx-x86.h, * freebsd.h, * hash.c, * host-aout.c, * hp300hpux.c, * hppabsd-core.c, * hpux-core.c, * i386aout.c, * i386linux.c, * i386lynx.c, * i386mach3.c, * i386msdos.c, * i386netbsd.c, * ieee.c, * ihex.c, * irix-core.c, * libaout.h, * libbfd-in.h, * libbfd.c, * libcoff-in.h, * libnlm.h, * libpei.h, * libxcoff.h, * linker.c, * lynx-core.c, * m68k4knetbsd.c, * m68klinux.c, * m68knetbsd.c, * m88kmach3.c, * mach-o-aarch64.c, * mach-o-arm.c, * mach-o-i386.c, * mach-o-target.c, * mach-o-x86-64.c, * mach-o.c, * mach-o.h, * merge.c, * mipsbsd.c, * mmo.c, * netbsd.h, * netbsd-core.c, * newsos3.c, * nlm-target.h, * nlm32-ppc.c, * nlm32-sparc.c, * nlmcode.h, * ns32k.h, * ns32knetbsd.c, * oasys.c, * opncls.c, * pc532-mach.c, * pdp11.c, * pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-mips.c, * pe-x86_64.c, * peXXigen.c, * pef.c, * pef.h, * pei-arm.c, * pei-i386.c, * pei-mcore.c, * pei-x86_64.c, * peicode.h, * plugin.c, * ppcboot.c, * ptrace-core.c, * reloc.c, * riscix.c, * rs6000-core.c, * section.c, * som.c, * som.h, * sparclinux.c, * sparcnetbsd.c, * srec.c, * stabs.c, * sunos.c, * syms.c, * targets.c, * tekhex.c, * trad-core.c, * vax1knetbsd.c, * vaxnetbsd.c, * verilog.c, * versados.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * wasm-module.c, * wasm-module.h, * xcofflink.c, * xsym.c, * xsym.h: Whitespace fixes. * bfd-in2.h, * libbfd.h, * libcoff.h: Regenerate.
2017-12-05 23:56:00 +01:00
#define bfd_elfNN_bfd_link_hash_table_create \
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_link_hash_table_create
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
#define bfd_elfNN_bfd_merge_private_bfd_data \
elfNN_aarch64_merge_private_bfd_data
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
#define bfd_elfNN_bfd_print_private_bfd_data \
elfNN_aarch64_print_private_bfd_data
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
#define bfd_elfNN_bfd_reloc_type_lookup \
elfNN_aarch64_reloc_type_lookup
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
#define bfd_elfNN_bfd_reloc_name_lookup \
elfNN_aarch64_reloc_name_lookup
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
#define bfd_elfNN_bfd_set_private_flags \
elfNN_aarch64_set_private_flags
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
#define bfd_elfNN_find_inliner_info \
elfNN_aarch64_find_inliner_info
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
[BFD, LD, AArch64, 2/3] Add --force-bti to enable BTI and to select BTI enabled PLTs This is part of the patch series to add support for BTI and PAC in AArch64 linker. 1) This patch adds a new ld command line option: --force-bti. In the presence of this option, the linker enables BTI with the GNU_PROPERTY_AARCH64_FEATURE_1_BTI feature. This gives out warning in case of missing gnu notes for BTI in inputs. 2) It also defines a new set of BTI enabled PLTs. These are used either when all the inputs are marked with GNU_PROPERTY_AARCH64_FEATURE_1_BTI or when the new --force-bti option is used. This required adding new fields in elf_aarch64_link_hash_table so that we could make the PLT related information more generic. 3) It also defines a dynamic tag DT_AARCH64_BTI_PLT. The linker uses this whenever it picks BTI enabled PLTs. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * bfd-in.h (aarch64_plt_type, aarch64_enable_bti_type): New. (aarch64_bti_pac_info): New. (bfd_elf64_aarch64_set_options): Add aarch64_bti_pac_info argument. (bfd_elf32_aarch64_set_options): Likewise. * bfd-in2.h: Regenerate * elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): New. (PLT_BTI_SMALL_ENTRY_SIZE, PLT_BTI_TLSDESC_ENTRY_SIZE): New. (elfNN_aarch64_small_plt0_bti_entry): New. (elfNN_aarch64_small_plt_bti_entry): New. (elfNN_aarch64_tlsdesc_small_plt_bti_entry): New. (elf_aarch64_obj_tdata): Add no_bti_warn and plt_type fields. (elf_aarch64_link_hash_table): Add plt0_entry, plt_entry and tlsdesc_plt_entry_size fields. (elfNN_aarch64_link_hash_table_create): Initialise the new fields. (setup_plt_values): New helper function. (bfd_elfNN_aarch64_set_options): Use new bp_info to set plt sizes and bti enable type. (elfNN_aarch64_allocate_dynrelocs): Use new size members instead of fixed macros. (elfNN_aarch64_size_dynamic_sections): Likewise and add checks. (elfNN_aarch64_create_small_pltn_entry): Use new generic pointers to plt stubs instead of fixed ones and update filling them according to the need for bti. (elfNN_aarch64_init_small_plt0_entry): Likewise. (elfNN_aarch64_finish_dynamic_sections): Likewise. (get_plt_type, elfNN_aarch64_get_synthetic_symtab): New. (elfNN_aarch64_plt_sym_val): Update size accordingly. (elfNN_aarch64_link_setup_gnu_properties): Set up plts if BTI GNU NOTE is set. (bfd_elfNN_get_synthetic_symtab): Define. (elfNN_aarch64_merge_gnu_properties): Give out warning with --force-bti and mising BTI NOTE SECTION. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * readelf.c (get_aarch64_dynamic_type): New. (get_dynamic_type): Use above for EM_AARCH64. (dynamic_section_aarch64_val): New. (process_dynamic_section): Use above for EM_AARCH64. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * elf/aarch64.h (DT_AARCH64_BTI_PLT): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> Szabolcs Nagy <szabolcs.nagy@arm.com> * NEWS: Document --force-bti. * emultempl/aarch64elf.em (plt_type, bti_type, OPTION_FORCE_BTI): New. (PARSE_AND_LIST_SHORTOPTS, PARSE_AND_LIST_OPTIONS): Add force-bti. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FORCE_BTI. * testsuite/ld-aarch64/aarch64-elf.exp: Add all the tests below. * testsuite/ld-aarch64/bti-plt-1.d: New test. * testsuite/ld-aarch64/bti-plt-1.s: New test. * testsuite/ld-aarch64/bti-plt-2.s: New test. * testsuite/ld-aarch64/bti-plt-2.d: New test. * testsuite/ld-aarch64/bti-plt-3.d: New test. * testsuite/ld-aarch64/bti-plt-4.d: New test. * testsuite/ld-aarch64/bti-plt-5.d: New test. * testsuite/ld-aarch64/bti-plt-6.d: New test. * testsuite/ld-aarch64/bti-plt-7.d: New test. * testsuite/ld-aarch64/bti-plt-so.s: New test. * testsuite/ld-aarch64/bti-plt.ld: New test.
2019-03-13 11:54:30 +01:00
#define bfd_elfNN_get_synthetic_symtab \
elfNN_aarch64_get_synthetic_symtab
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
#define bfd_elfNN_mkobject \
elfNN_aarch64_mkobject
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
#define bfd_elfNN_new_section_hook \
elfNN_aarch64_new_section_hook
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
#define elf_backend_adjust_dynamic_symbol \
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_adjust_dynamic_symbol
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
#define elf_backend_always_size_sections \
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_always_size_sections
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
#define elf_backend_check_relocs \
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_check_relocs
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
#define elf_backend_copy_indirect_symbol \
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_copy_indirect_symbol
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
aarch64: handle STO_AARCH64_VARIANT_PCS in bfd Propagate STO_AARCH64_VARIANT_PCS st_other attribute to the output and add DT_AARCH64_VARIANT_PCS dynamic tag if necessary. Mismatching attributes are not diagnosed. bfd/ChangeLog: * elfnn-aarch64.c (elfNN_aarch64_merge_symbol_attribute): New function. (struct elf_aarch64_link_hash_table): Add variant_pcs member. (elfNN_aarch64_allocate_dynrelocs): Update variant_pcs. (elfNN_aarch64_size_dynamic_sections): Add DT_AARCH64_VARIANT_PCS. (elf_backend_merge_symbol_attribute): Define. ld/ChangeLog: * testsuite/ld-aarch64/aarch64-elf.exp: Add new tests. * testsuite/ld-aarch64/variant_pcs-1.s: New asm for tests. * testsuite/ld-aarch64/variant_pcs-2.s: New asm for tests. * testsuite/ld-aarch64/variant_pcs-now.d: New test. * testsuite/ld-aarch64/variant_pcs-r.d: New test. * testsuite/ld-aarch64/variant_pcs-shared.d: New test. * testsuite/ld-aarch64/variant_pcs.ld: New linker script for tests.
2019-04-25 16:07:14 +02:00
#define elf_backend_merge_symbol_attribute \
elfNN_aarch64_merge_symbol_attribute
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
/* Create .dynbss, and .rela.bss sections in DYNOBJ, and set up shortcuts
to them in our hash. */
#define elf_backend_create_dynamic_sections \
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_create_dynamic_sections
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
#define elf_backend_init_index_section \
_bfd_elf_init_2_index_sections
#define elf_backend_finish_dynamic_sections \
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_finish_dynamic_sections
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
#define elf_backend_finish_dynamic_symbol \
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_finish_dynamic_symbol
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
#define elf_backend_object_p \
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_object_p
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
BFD whitespace fixes Binutils is supposed to use tabs. In my git config I have whitespace = indent-with-non-tab,space-before-tab,trailing-space and I got annoyed enough seeing red in "git diff" output to fix the problems. * doc/header.sed: Trim trailing space when splitting lines. * aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-cris.c, * aout-ns32k.c, * aout-target.h, * aout-tic30.c, * aoutf1.h, * aoutx.h, * arc-got.h, * arc-plt.def, * arc-plt.h, * archive.c, * archive64.c, * archures.c, * armnetbsd.c, * bfd-in.h, * bfd.c, * bfdio.c, * binary.c, * bout.c, * cache.c, * cisco-core.c, * coff-alpha.c, * coff-apollo.c, * coff-arm.c, * coff-h8300.c, * coff-i386.c, * coff-i860.c, * coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mcore.c, * coff-mips.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-stgo32.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * compress.c, * corefile.c, * cpu-alpha.c, * cpu-arm.c, * cpu-avr.c, * cpu-bfin.c, * cpu-cr16.c, * cpu-cr16c.c, * cpu-crx.c, * cpu-d10v.c, * cpu-frv.c, * cpu-ft32.c, * cpu-i370.c, * cpu-i960.c, * cpu-ia64-opc.c, * cpu-ip2k.c, * cpu-lm32.c, * cpu-m32r.c, * cpu-mcore.c, * cpu-microblaze.c, * cpu-mips.c, * cpu-moxie.c, * cpu-mt.c, * cpu-nios2.c, * cpu-ns32k.c, * cpu-or1k.c, * cpu-powerpc.c, * cpu-pru.c, * cpu-sh.c, * cpu-spu.c, * cpu-v850.c, * cpu-v850_rh850.c, * cpu-xgate.c, * cpu-z80.c, * dwarf1.c, * dwarf2.c, * ecoff.c, * ecofflink.c, * ecoffswap.h, * elf-bfd.h, * elf-eh-frame.c, * elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf-s390-common.c, * elf-strtab.c, * elf-vxworks.c, * elf.c, * elf32-am33lin.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-avr.h, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-i860.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68hc1x.c, * elf32-m68hc1x.h, * elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nds32.h, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score.h, * elf32-score7.c, * elf32-sh-symbian.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilegx.c, * elf32-tilegx.h, * elf32-tilepro.c, * elf32-tilepro.h, * elf32-v850.c, * elf32-vax.c, * elf32-wasm32.c, * elf32-xc16x.c, * elf32-xgate.c, * elf32-xgate.h, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-tilegx.c, * elf64-tilegx.h, * elf64-x86-64.c, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-aarch64.h, * elfxx-ia64.c, * elfxx-ia64.h, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * elfxx-x86.h, * freebsd.h, * hash.c, * host-aout.c, * hp300hpux.c, * hppabsd-core.c, * hpux-core.c, * i386aout.c, * i386linux.c, * i386lynx.c, * i386mach3.c, * i386msdos.c, * i386netbsd.c, * ieee.c, * ihex.c, * irix-core.c, * libaout.h, * libbfd-in.h, * libbfd.c, * libcoff-in.h, * libnlm.h, * libpei.h, * libxcoff.h, * linker.c, * lynx-core.c, * m68k4knetbsd.c, * m68klinux.c, * m68knetbsd.c, * m88kmach3.c, * mach-o-aarch64.c, * mach-o-arm.c, * mach-o-i386.c, * mach-o-target.c, * mach-o-x86-64.c, * mach-o.c, * mach-o.h, * merge.c, * mipsbsd.c, * mmo.c, * netbsd.h, * netbsd-core.c, * newsos3.c, * nlm-target.h, * nlm32-ppc.c, * nlm32-sparc.c, * nlmcode.h, * ns32k.h, * ns32knetbsd.c, * oasys.c, * opncls.c, * pc532-mach.c, * pdp11.c, * pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-mips.c, * pe-x86_64.c, * peXXigen.c, * pef.c, * pef.h, * pei-arm.c, * pei-i386.c, * pei-mcore.c, * pei-x86_64.c, * peicode.h, * plugin.c, * ppcboot.c, * ptrace-core.c, * reloc.c, * riscix.c, * rs6000-core.c, * section.c, * som.c, * som.h, * sparclinux.c, * sparcnetbsd.c, * srec.c, * stabs.c, * sunos.c, * syms.c, * targets.c, * tekhex.c, * trad-core.c, * vax1knetbsd.c, * vaxnetbsd.c, * verilog.c, * versados.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * wasm-module.c, * wasm-module.h, * xcofflink.c, * xsym.c, * xsym.h: Whitespace fixes. * bfd-in2.h, * libbfd.h, * libcoff.h: Regenerate.
2017-12-05 23:56:00 +01:00
#define elf_backend_output_arch_local_syms \
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_output_arch_local_syms
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
PR23652, Use symbols from debug bfd for _bfd_elf_find_function Sometimes DWARF info for a function is incomplete, and the function can be retrieved by examining symbols. However, when separate debug files are used it may be that the original file is completely stripped of symbols. This patch teaches BFD to look at symbols from the debug file in that case. The patch also removes arm_elf_find_function, instead implementing elf_backend_maybe_function_sym. arm_elf_find_function was written before the generic _bfd_elf_find_function called maybe_function_sym. aarch64 copied arm, so that file gets the same treatment. There is some chance this will speed up arm and aarch64 lookup of function/line. PR 23652 * dwarf2.c (_bfd_dwarf2_stash_syms): New function. (_bfd_dwarf2_find_nearest_line): Use it here, passing syms to _bfd_elf_find_function. Call _bfd_elf_find_function in cases where _bfd_elf_find_nearest_line would do so. * elf.c (_bfd_elf_find_nearest_line): Omit _bfd_elf_find_function for dwarf2. * elfxx-mips.c (_bfd_mips_elf_find_nearest_line): Similarly. Tidy. * elf32-arm.c (elf32_arm_maybe_function_sym): New function. (elf_backend_maybe_function_sym): Define. (arm_elf_find_function, elf32_arm_find_nearest_line): Delete. (bfd_elf32_find_nearest_line): Don't define. * elfnn-aarch64.c (elfNN_aarch64_maybe_function_sym): New function. (elf_backend_maybe_function_sym): Define. (aarch64_elf_find_function, elfNN_aarch64_find_nearest_line): Delete. (bfd_elfNN_find_nearest_line): Don't define.
2019-11-26 13:02:51 +01:00
#define elf_backend_maybe_function_sym \
elfNN_aarch64_maybe_function_sym
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
#define elf_backend_plt_sym_val \
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_plt_sym_val
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
elf_backend_init_file_header This patch renames elf_backend_post_process_headers and moves the prep_headers code into the new function. Naming the backend functions elf_backend_init_file_header and elf_backend_modify_headers makes it clear which function is called first. * elf-bfd.h (struct elf_backend_data <elf_backend_init_file_header>): Rename from elf_backend_post_process_headers. (_bfd_elf_post_process_headers): Delete. (_bfd_elf_init_file_header): Declare. * elf.c (_bfd_elf_compute_section_file_positions): Call new function in place of prep_headers and elf_backend_post_process_headers. (_bfd_elf_init_file_header): Renamed from prep_headers with updated args and made global. Delete dead code. (_bfd_elf_post_process_headers): Delete. * elf32-arm.c (elf32_arm_init_file_header): Rename from elf32_arm_post_process_headers and call _bfd_elf_init_file_header. Return status. (elf_backend_init_file_header): Define. (elf_backend_post_process_headers): Don't define. * elf32-i386.c (elf_i386_fbsd_init_file_header): Similarly. * elf32-m68hc1x.c (elf32_m68hc11_init_file_header): Similarly. * elf32-metag.c (elf_metag_init_file_header): Similarly. * elf32-spu.c (spu_elf_init_file_header * elf32-visium.c (visium_elf_init_file_header * elf64-alpha.c (elf64_alpha_fbsd_init_file_header * elf64-hppa.c (elf64_hppa_init_file_header * elf64-ia64-vms.c (elf64_vms_init_file_header * elfnn-aarch64.c (elfNN_aarch64_init_file_header * elfnn-ia64.c (elfNN_hpux_init_file_header * elfxx-mips.c (_bfd_mips_init_file_header * elfxx-mips.h (_bfd_mips_post_process_headers): Delete. (_bfd_mips_init_file_header): Declare. (elf_backend_post_process_headers): Delete. (elf_backend_init_file_header): Define. * elfxx-target.h (elf_backend_post_process_headers): Delete. (elf_backend_init_file_header): Define and use. * elf32-m68hc12.c (elf_backend_init_file_header): Define. (elf_backend_post_process_headers): Don't define. * elf32-m68hc1x.h (elf32_m68hc11_post_process_headers): Delete. (elf32_m68hc11_init_file_header): Declare. * elf32-ppc.c (elf_backend_post_process_headers): Remove unnecessary undef.
2019-11-18 07:39:40 +01:00
#define elf_backend_init_file_header \
elfNN_aarch64_init_file_header
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
#define elf_backend_relocate_section \
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_relocate_section
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
#define elf_backend_reloc_type_class \
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_reloc_type_class
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
#define elf_backend_section_from_shdr \
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_section_from_shdr
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
#define elf_backend_size_dynamic_sections \
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_size_dynamic_sections
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
#define elf_backend_size_info \
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
elfNN_aarch64_size_info
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
[AArch64] Cortex-A53 erratum 835769 linker workaround 2014-10-22 Tejas Belagod <tejas.belagod@arm.com> bfd/ * bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter. * bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise. * elfnn-aarch64.c (aarch64_erratum_835769_stub): New. (elf_aarch64_stub_type): Add new type aarch64_stub_erratum_835769_veneer. (elf_aarch64_stub_hash_entry): New fields for erratum 835769. (aarch64_erratum_835769_fix): New data struct to record erratum 835769. (elf_aarch64_link_hash_table: Global flags for 835769. (aarch64_build_one_stub): Add case for 835769. (aarch64_size_one_stub): Likewise. (aarch64_mem_op_p, aarch64_mlxl_p, aarch64_erratum_sequence,erratum_835769_scan): New. Decode and scan functions for erratum 835769. (elf_aarch64_create_or_find_stub_sec): New. (elfNN_aarch64_size_stubs): Look for erratum 835769 and record them. (bfd_elfNN_aarch64_set_options: Set global flag for 835769. (erratum_835769_branch_to_stub_data, make_branch_to_erratum_835769_stub):New. Connect up all the erratum stubs to occurances by branches. (elfNN_aarch64_write_section): New hook. (aarch64_map_one_stub): Output erratum stub symbol. (elfNN_aarch64_size_dynamic_sections): Init mapping symbol information for erratum 835769. (elf_backend_write_section): Define. ld/ * emultempl/aarch64elf.em: Add command-line option for erratum 835769. ld/testsuite/ * ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum 835769 tests. * ld-aarch64/erratum835769.d: New. * ld-aarch64/erratum835769.s: New.
2014-10-24 12:39:35 +02:00
#define elf_backend_write_section \
elfNN_aarch64_write_section
Preserve all mapping symbols in ARM and AArch64 object files. bfd * elfnn-aarch64.c (is_aarch64_mapping_symbol): New function. Returns TRUE for AArch64 mapping symbols. (elfNN_aarch64_backend_symbol_processing): New function. Marks mapping symbols as precious in object files so that they will not be stripped. (elf_backend_symbol_processing): Define. * elf32-arm.c (is_arm_mapping_symbol): New function. Returns TRUE for ARM mapping symbols. (elf32_arm_backend_symbol_processing): Make use of the new function.
2016-06-29 12:17:40 +02:00
#define elf_backend_symbol_processing \
elfNN_aarch64_backend_symbol_processing
[BFD, LD, AArch64, 1/3] Add support for GNU PROPERTIES in AArch64 for BTI and PAC This is part of the patch series to add support for BTI and PAC in AArch64 linker. This patch implements the following: 1) This extends in the gnu property support in the linker for AArch64 by defining backend hooks for elf_backend_setup_gnu_properties, elf_backend_merge_gnu_properties and elf_backend_parse_gnu_properties. 2) It defines AArch64 specific GNU property GNU_PROPERTY_AARCH64_FEATURE_1_AND and 2 bit for BTI and PAC in it. 3) It also adds support in readelf.c to read and print these new GNU properties in AArch64. All these are made according to the new AArch64 ELF ABI https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4 *** bfd/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * elf-properties.c (_bfd_elf_link_setup_gnu_properties): Exclude linker created inputs from merge. * elfnn-aarch64.c (struct elf_aarch64_obj_tdata): Add field for GNU_PROPERTY_AARCH64_FEATURE_1_AND properties. (elfNN_aarch64_link_setup_gnu_properties): New. (elfNN_aarch64_merge_gnu_properties): New. (elf_backend_setup_gnu_properties): Define for AArch64. (elf_backend_merge_gnu_properties): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_link_setup_gnu_properties): Define. (_bfd_aarch64_elf_parse_gnu_properties): Define. (_bfd_aarch64_elf_merge_gnu_properties): Define. * elfxx-aarch64.h (_bfd_aarch64_elf_link_setup_gnu_properties): Declare. (_bfd_aarch64_elf_parse_gnu_properties): Declare. (_bfd_aarch64_elf_merge_gnu_properties): Declare. (elf_backend_parse_gnu_properties): Define for AArch64. *** binutils/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * readelf.c (decode_aarch64_feature_1_and): New. (print_gnu_property_note): Add case for AArch64 gnu notes. *** include/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * elf/common.h (GNU_PROPERTY_AARCH64_FEATURE_1_AND): New. (GNU_PROPERTY_AARCH64_FEATURE_1_BTI): New. (GNU_PROPERTY_AARCH64_FEATURE_1_PAC): New. *** ld/ChangeLog *** 2019-03-13 Sudakshina Das <sudi.das@arm.com> * NEWS: Document GNU_PROPERTY_AARCH64_FEATURE_1_BTI and GNU_PROPERTY_AARCH64_FEATURE_1_PAC. * testsuite/ld-aarch64/aarch64-elf.exp: Add run commands for new tests. * testsuite/ld-aarch64/property-bti-pac1.d: New test. * testsuite/ld-aarch64/property-bti-pac1.s: New test. * testsuite/ld-aarch64/property-bti-pac2.d: New test. * testsuite/ld-aarch64/property-bti-pac2.s: New test. * testsuite/ld-aarch64/property-bti-pac3.d: New test.
2019-03-13 11:42:27 +01:00
#define elf_backend_setup_gnu_properties \
elfNN_aarch64_link_setup_gnu_properties
#define elf_backend_merge_gnu_properties \
elfNN_aarch64_merge_gnu_properties
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
#define elf_backend_can_refcount 1
* elf64-aarch64.c (elf_backend_can_gc_sections): Enable gc-section support. (elf64_aarch64_gc_sweep_hook): Handle GOT, TLS and PLT related relocs. * lib/ld-lib.exp (check_gc_sections_available): Remove aarch64 from list of targets that don't support gc-section.
2013-03-08 18:37:30 +01:00
#define elf_backend_can_gc_sections 1
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
#define elf_backend_plt_readonly 1
#define elf_backend_want_got_plt 1
#define elf_backend_want_plt_sym 0
dynrelro section for read-only dynamic symbols copied into executable Variables defined in shared libraries are copied into an executable's .bss section when code in the executable is non-PIC and thus would require dynamic text relocations to access the variable directly in the shared library. Recent x86 toolchains also copy variables into the executable to gain a small speed improvement. The problem is that if the variable was originally read-only, the copy in .bss is writable, potentially opening a security hole. This patch cures that problem by putting the copy in a section that becomes read-only after ld.so relocation, provided -z relro is in force. The patch also fixes a microblaze linker segfault on attempting to use dynamic bss variables. bfd/ PR ld/20995 * elf-bfd.h (struct elf_link_hash_table): Add sdynrelro and sreldynrelro. (struct elf_backend_data): Add want_dynrelro. * elfxx-target.h (elf_backend_want_dynrelro): Define. (elfNN_bed): Update initializer. * elflink.c (_bfd_elf_create_dynamic_sections): Create sdynrelro and sreldynrelro sections. * elf32-arm.c (elf32_arm_adjust_dynamic_symbol): Place variables copied into the executable from read-only sections into sdynrelro. (elf32_arm_size_dynamic_sections): Handle sdynrelro. (elf32_arm_finish_dynamic_symbol): Select sreldynrelro for dynamic relocs in sdynrelro. (elf_backend_want_dynrelro): Define. * elf32-hppa.c (elf32_hppa_adjust_dynamic_symbol) (elf32_hppa_size_dynamic_sections, elf32_hppa_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf32-i386.c (elf_i386_adjust_dynamic_symbol) (elf_i386_size_dynamic_sections, elf_i386_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf32-metag.c (elf_metag_adjust_dynamic_symbol) (elf_metag_size_dynamic_sections, elf_metag_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf32-microblaze.c (microblaze_elf_adjust_dynamic_symbol) (microblaze_elf_size_dynamic_sections) (microblaze_elf_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf32-nios2.c (nios2_elf32_finish_dynamic_symbol) (nios2_elf32_adjust_dynamic_symbol) (nios2_elf32_size_dynamic_sections) (elf_backend_want_dynrelro): As above. * elf32-or1k.c (or1k_elf_finish_dynamic_symbol) (or1k_elf_adjust_dynamic_symbol, or1k_elf_size_dynamic_sections) (elf_backend_want_dynrelro): As above. * elf32-ppc.c (ppc_elf_adjust_dynamic_symbol) (ppc_elf_size_dynamic_sections, ppc_elf_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf32-s390.c (elf_s390_adjust_dynamic_symbol) (elf_s390_size_dynamic_sections, elf_s390_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf32-tic6x.c (elf32_tic6x_adjust_dynamic_symbol) (elf32_tic6x_size_dynamic_sections) (elf32_tic6x_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf32-tilepro.c (tilepro_elf_adjust_dynamic_symbol) (tilepro_elf_size_dynamic_sections) (tilepro_elf_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf64-ppc.c (ppc64_elf_adjust_dynamic_symbol) (ppc64_elf_size_dynamic_sections, ppc64_elf_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf64-s390.c (elf_s390_adjust_dynamic_symbol) (elf_s390_size_dynamic_sections, elf_s390_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elf64-x86-64.c (elf_x86_64_adjust_dynamic_symbol) (elf_x86_64_size_dynamic_sections) (elf_x86_64_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elfnn-aarch64.c (elfNN_aarch64_adjust_dynamic_symbol) (elfNN_aarch64_size_dynamic_sections) (elfNN_aarch64_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elfnn-riscv.c (riscv_elf_adjust_dynamic_symbol) (riscv_elf_size_dynamic_sections, riscv_elf_finish_dynamic_symbol) (elf_backend_want_dynrelro): As above. * elfxx-mips.c (_bfd_mips_elf_adjust_dynamic_symbol) (_bfd_mips_elf_size_dynamic_sections) (_bfd_mips_vxworks_finish_dynamic_symbol): As above. * elfxx-sparc.c (_bfd_sparc_elf_adjust_dynamic_symbol) (_bfd_sparc_elf_size_dynamic_sections) (_bfd_sparc_elf_finish_dynamic_symbol): As above. * elfxx-tilegx.c (tilegx_elf_adjust_dynamic_symbol) (tilegx_elf_size_dynamic_sections) (tilegx_elf_finish_dynamic_symbol): As above. * elf32-mips.c (elf_backend_want_dynrelro): Define. * elf64-mips.c (elf_backend_want_dynrelro): Define. * elf32-sparc.c (elf_backend_want_dynrelro): Define. * elf64-sparc.c (elf_backend_want_dynrelro): Define. * elf32-tilegx.c (elf_backend_want_dynrelro): Define. * elf64-tilegx.c (elf_backend_want_dynrelro): Define. * elf32-microblaze.c (microblaze_elf_adjust_dynamic_symbol): Tidy. (microblaze_elf_size_dynamic_sections): Handle sdynbss. * elf32-nios2.c (nios2_elf32_size_dynamic_sections): Make use of linker shortcuts to dynamic sections rather than comparing names. Correctly set "got" flag. ld/ PR ld/20995 * testsuite/ld-arm/farcall-mixed-app-v5.d: Update to suit changed stub hash table traversal caused by section id increment. Accept the previous output too. * testsuite/ld-arm/farcall-mixed-app.d: Likewise. * testsuite/ld-arm/farcall-mixed-lib-v4t.d: Likewise. * testsuite/ld-arm/farcall-mixed-lib.d: Likewise. * testsuite/ld-elf/pr20995a.s, * testsuite/ld-elf/pr20995b.s, * testsuite/ld-elf/pr20995.r: New test. * testsuite/ld-elf/elf.exp: Run it.
2016-12-25 15:00:45 +01:00
#define elf_backend_want_dynrelro 1
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
#define elf_backend_may_use_rel_p 0
#define elf_backend_may_use_rela_p 1
#define elf_backend_default_use_rela_p 1
BFD whitespace fixes Binutils is supposed to use tabs. In my git config I have whitespace = indent-with-non-tab,space-before-tab,trailing-space and I got annoyed enough seeing red in "git diff" output to fix the problems. * doc/header.sed: Trim trailing space when splitting lines. * aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-cris.c, * aout-ns32k.c, * aout-target.h, * aout-tic30.c, * aoutf1.h, * aoutx.h, * arc-got.h, * arc-plt.def, * arc-plt.h, * archive.c, * archive64.c, * archures.c, * armnetbsd.c, * bfd-in.h, * bfd.c, * bfdio.c, * binary.c, * bout.c, * cache.c, * cisco-core.c, * coff-alpha.c, * coff-apollo.c, * coff-arm.c, * coff-h8300.c, * coff-i386.c, * coff-i860.c, * coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mcore.c, * coff-mips.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-stgo32.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * compress.c, * corefile.c, * cpu-alpha.c, * cpu-arm.c, * cpu-avr.c, * cpu-bfin.c, * cpu-cr16.c, * cpu-cr16c.c, * cpu-crx.c, * cpu-d10v.c, * cpu-frv.c, * cpu-ft32.c, * cpu-i370.c, * cpu-i960.c, * cpu-ia64-opc.c, * cpu-ip2k.c, * cpu-lm32.c, * cpu-m32r.c, * cpu-mcore.c, * cpu-microblaze.c, * cpu-mips.c, * cpu-moxie.c, * cpu-mt.c, * cpu-nios2.c, * cpu-ns32k.c, * cpu-or1k.c, * cpu-powerpc.c, * cpu-pru.c, * cpu-sh.c, * cpu-spu.c, * cpu-v850.c, * cpu-v850_rh850.c, * cpu-xgate.c, * cpu-z80.c, * dwarf1.c, * dwarf2.c, * ecoff.c, * ecofflink.c, * ecoffswap.h, * elf-bfd.h, * elf-eh-frame.c, * elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf-s390-common.c, * elf-strtab.c, * elf-vxworks.c, * elf.c, * elf32-am33lin.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-avr.h, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-i860.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68hc1x.c, * elf32-m68hc1x.h, * elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nds32.h, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score.h, * elf32-score7.c, * elf32-sh-symbian.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilegx.c, * elf32-tilegx.h, * elf32-tilepro.c, * elf32-tilepro.h, * elf32-v850.c, * elf32-vax.c, * elf32-wasm32.c, * elf32-xc16x.c, * elf32-xgate.c, * elf32-xgate.h, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-tilegx.c, * elf64-tilegx.h, * elf64-x86-64.c, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-aarch64.h, * elfxx-ia64.c, * elfxx-ia64.h, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * elfxx-x86.h, * freebsd.h, * hash.c, * host-aout.c, * hp300hpux.c, * hppabsd-core.c, * hpux-core.c, * i386aout.c, * i386linux.c, * i386lynx.c, * i386mach3.c, * i386msdos.c, * i386netbsd.c, * ieee.c, * ihex.c, * irix-core.c, * libaout.h, * libbfd-in.h, * libbfd.c, * libcoff-in.h, * libnlm.h, * libpei.h, * libxcoff.h, * linker.c, * lynx-core.c, * m68k4knetbsd.c, * m68klinux.c, * m68knetbsd.c, * m88kmach3.c, * mach-o-aarch64.c, * mach-o-arm.c, * mach-o-i386.c, * mach-o-target.c, * mach-o-x86-64.c, * mach-o.c, * mach-o.h, * merge.c, * mipsbsd.c, * mmo.c, * netbsd.h, * netbsd-core.c, * newsos3.c, * nlm-target.h, * nlm32-ppc.c, * nlm32-sparc.c, * nlmcode.h, * ns32k.h, * ns32knetbsd.c, * oasys.c, * opncls.c, * pc532-mach.c, * pdp11.c, * pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-mips.c, * pe-x86_64.c, * peXXigen.c, * pef.c, * pef.h, * pei-arm.c, * pei-i386.c, * pei-mcore.c, * pei-x86_64.c, * peicode.h, * plugin.c, * ppcboot.c, * ptrace-core.c, * reloc.c, * riscix.c, * rs6000-core.c, * section.c, * som.c, * som.h, * sparclinux.c, * sparcnetbsd.c, * srec.c, * stabs.c, * sunos.c, * syms.c, * targets.c, * tekhex.c, * trad-core.c, * vax1knetbsd.c, * vaxnetbsd.c, * verilog.c, * versados.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * wasm-module.c, * wasm-module.h, * xcofflink.c, * xsym.c, * xsym.h: Whitespace fixes. * bfd-in2.h, * libbfd.h, * libcoff.h: Regenerate.
2017-12-05 23:56:00 +01:00
#define elf_backend_rela_normal 1
elf_backend_dtrel_excludes_plt Now that all targets creating .rel.plt/.rela.plt use the ELF hash table shortcut srelplt, the generic ELF code can set up DT_RELSZ/ DT_RELASZ and DT_REL/DT_RELA for targets that don't want PLT relocs included in those tags. * elf-bfd.h (struct elf_backend_data): Add dtrel_excludes_plt. * elfxx-target.h (elf_backend_dtrel_excludes_plt): Define. (elfNN_bed): Init new field. * elflink.c (bfd_elf_final_link): Add and use htab variable. Handle dtrel_excludes_plt. * elf-m10300.c (_bfd_mn10300_elf_finish_dynamic_sections): Delete DT_RELASZ code. (elf_backend_dtrel_excludes_plt): Define. * elf32-arc.c (elf_arc_finish_dynamic_sections): Delete DT_RELASZ code. (elf_backend_dtrel_excludes_plt): Define. * elf32-arm.c (elf32_arm_finish_dynamic_sections): Delete code subtracting off plt relocs from DT_RELSZ, DT_RELASZ. (elf_backend_dtrel_excludes_plt): Define. * elf32-cr16.c (_bfd_cr16_elf_finish_dynamic_sections): Delete DT_RELASZ code. (elf_backend_dtrel_excludes_plt): Define. * elf32-cris.c (elf_cris_finish_dynamic_sections): Delete DT_RELASZ code. (elf_backend_dtrel_excludes_plt): Define. * elf32-hppa.c (elf32_hppa_finish_dynamic_sections): Delete DT_RELASZ and DT_RELA code. (elf_backend_dtrel_excludes_plt): Define. * elf32-i386.c (elf_i386_finish_dynamic_sections): Delete DT_RELSZ and DT_REL code. (elf_backend_dtrel_excludes_plt): Define. * elf32-lm32.c (lm32_elf_finish_dynamic_sections): Delete DT_RELASZ code. (elf_backend_dtrel_excludes_plt): Define. * elf32-m32r.c (m32r_elf_finish_dynamic_sections): Delete DT_RELASZ code. (elf_backend_dtrel_excludes_plt): Define. * elf32-m68k.c (elf_m68k_finish_dynamic_sections): Delete DT_RELASZ code. (elf_backend_dtrel_excludes_plt): Define. * elf32-metag.c (elf_metag_finish_dynamic_sections): Delete DT_RELASZ and DT_RELA code. (elf_backend_dtrel_excludes_plt): Define. * elf32-microblaze.c (microblaze_elf_finish_dynamic_sections): Delete DT_RELASZ and DT_RELA code. Use ELF htab shortcuts for other dynamic sections. (elf_backend_dtrel_excludes_plt): Define. * elf32-mips.c (elf_backend_dtrel_excludes_plt): Define. * elf32-nds32.c (nds32_elf_finish_dynamic_sections): Delete DT_RELASZ code. (elf_backend_dtrel_excludes_plt): Define. * elf32-nios2.c (nios2_elf32_finish_dynamic_sections): Delete DT_RELASZ code. (elf_backend_dtrel_excludes_plt): Define. * elf32-or1k.c (or1k_elf_finish_dynamic_sections): Delete DT_RELASZ code. (elf_backend_dtrel_excludes_plt): Define. * elf32-ppc.c (ppc_elf_finish_dynamic_sections): Delete DT_RELASZ code. (elf_backend_dtrel_excludes_plt): Define. * elf32-sh.c (sh_elf_finish_dynamic_sections): Delete DT_RELASZ code. (elf_backend_dtrel_excludes_plt): Define. * elf32-sparc.c (elf_backend_dtrel_excludes_plt): Define. * elf32-vax.c (elf_vax_finish_dynamic_sections): Delete DT_RELASZ code. (elf_backend_dtrel_excludes_plt): Define. * elf32-xtensa.c (elf_xtensa_finish_dynamic_sections): Delete DT_RELASZ code. (elf_backend_dtrel_excludes_plt): Define. * elf64-alpha.c (elf64_alpha_finish_dynamic_sections): Delete DT_RELASZ code. (elf_backend_dtrel_excludes_plt): Define. * elf64-ppc.c (ppc64_elf_finish_dynamic_sections): Delete DT_RELASZ and DT_RELA code. (elf_backend_dtrel_excludes_plt): Define. * elf64-sh64.c (sh64_elf64_finish_dynamic_sections): Delete DT_RELASZ code. (elf_backend_dtrel_excludes_plt): Define. * elf64-x86-64.c (elf_x86_64_finish_dynamic_sections): Delete DT_RELASZ code. (elf_backend_dtrel_excludes_plt): Define. * elfnn-aarch64.c (elfNN_aarch64_finish_dynamic_sections): Delete DT_RELASZ code. (elf_backend_dtrel_excludes_plt): Define. * elfnn-ia64.c (elfNN_ia64_finish_dynamic_sections): Delete DT_RELASZ code. (elf_backend_dtrel_excludes_plt): Define. * elfxx-mips.c (_bfd_mips_elf_finish_dynamic_sections): Delete DT_RELASZ code. * elfxx-sparc.c (sparc_finish_dyn): Delete DT_RELASZ code.
2016-11-23 05:37:17 +01:00
#define elf_backend_dtrel_excludes_plt 1
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
#define elf_backend_got_header_size (GOT_ENTRY_SIZE * 3)
* elf64-aarch64.c (elf_backend_default_execstack): Define to 0.
2013-05-15 08:51:19 +02:00
#define elf_backend_default_execstack 0
[AArch64] Fix extern protected data handling Emit *GLOB_DAT instead of *RELATIVE relocs for protected data in shared objects. This is needed for the fix of glibc bug 17711: https://sourceware.org/bugzilla/show_bug.cgi?id=17711 bfd: PR ld/18705 * elfnn-aarch64.c (elf_backend_extern_protected_data): Define. ld/testsuite: PR ld/18705 * ld-aarch64/protected-data.d: New. * ld-aarch64/protected-data.s: New. * ld-aarch64/aarch64-elf.exp: Add new test.
2015-07-27 12:48:48 +02:00
#define elf_backend_extern_protected_data 1
[AArch64] Optimize .gnu.hash table size for executable bfd/ * elfnn-aarch64.c (elf_aarch64_hash_symbol): New function. (elf_backend_hash_symbol): Define. ld/ * testsuite/ld-aarch64/aarch64-elf.exp (aarch64elflinktests): New tests. * testsuite/ld-aarch64/func-in-so.s: New test source file. * testsuite/ld-aarch64/func-sym-hash-opt.s: Likewise. * testsuite/ld-aarch64/func-sym-hash-opt.d: New expected test result.
2017-01-20 14:30:32 +01:00
#define elf_backend_hash_symbol elf_aarch64_hash_symbol
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
BFD whitespace fixes Binutils is supposed to use tabs. In my git config I have whitespace = indent-with-non-tab,space-before-tab,trailing-space and I got annoyed enough seeing red in "git diff" output to fix the problems. * doc/header.sed: Trim trailing space when splitting lines. * aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-cris.c, * aout-ns32k.c, * aout-target.h, * aout-tic30.c, * aoutf1.h, * aoutx.h, * arc-got.h, * arc-plt.def, * arc-plt.h, * archive.c, * archive64.c, * archures.c, * armnetbsd.c, * bfd-in.h, * bfd.c, * bfdio.c, * binary.c, * bout.c, * cache.c, * cisco-core.c, * coff-alpha.c, * coff-apollo.c, * coff-arm.c, * coff-h8300.c, * coff-i386.c, * coff-i860.c, * coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mcore.c, * coff-mips.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-stgo32.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * compress.c, * corefile.c, * cpu-alpha.c, * cpu-arm.c, * cpu-avr.c, * cpu-bfin.c, * cpu-cr16.c, * cpu-cr16c.c, * cpu-crx.c, * cpu-d10v.c, * cpu-frv.c, * cpu-ft32.c, * cpu-i370.c, * cpu-i960.c, * cpu-ia64-opc.c, * cpu-ip2k.c, * cpu-lm32.c, * cpu-m32r.c, * cpu-mcore.c, * cpu-microblaze.c, * cpu-mips.c, * cpu-moxie.c, * cpu-mt.c, * cpu-nios2.c, * cpu-ns32k.c, * cpu-or1k.c, * cpu-powerpc.c, * cpu-pru.c, * cpu-sh.c, * cpu-spu.c, * cpu-v850.c, * cpu-v850_rh850.c, * cpu-xgate.c, * cpu-z80.c, * dwarf1.c, * dwarf2.c, * ecoff.c, * ecofflink.c, * ecoffswap.h, * elf-bfd.h, * elf-eh-frame.c, * elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf-s390-common.c, * elf-strtab.c, * elf-vxworks.c, * elf.c, * elf32-am33lin.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-avr.h, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-i860.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68hc1x.c, * elf32-m68hc1x.h, * elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nds32.h, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score.h, * elf32-score7.c, * elf32-sh-symbian.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilegx.c, * elf32-tilegx.h, * elf32-tilepro.c, * elf32-tilepro.h, * elf32-v850.c, * elf32-vax.c, * elf32-wasm32.c, * elf32-xc16x.c, * elf32-xgate.c, * elf32-xgate.h, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-tilegx.c, * elf64-tilegx.h, * elf64-x86-64.c, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-aarch64.h, * elfxx-ia64.c, * elfxx-ia64.h, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * elfxx-x86.h, * freebsd.h, * hash.c, * host-aout.c, * hp300hpux.c, * hppabsd-core.c, * hpux-core.c, * i386aout.c, * i386linux.c, * i386lynx.c, * i386mach3.c, * i386msdos.c, * i386netbsd.c, * ieee.c, * ihex.c, * irix-core.c, * libaout.h, * libbfd-in.h, * libbfd.c, * libcoff-in.h, * libnlm.h, * libpei.h, * libxcoff.h, * linker.c, * lynx-core.c, * m68k4knetbsd.c, * m68klinux.c, * m68knetbsd.c, * m88kmach3.c, * mach-o-aarch64.c, * mach-o-arm.c, * mach-o-i386.c, * mach-o-target.c, * mach-o-x86-64.c, * mach-o.c, * mach-o.h, * merge.c, * mipsbsd.c, * mmo.c, * netbsd.h, * netbsd-core.c, * newsos3.c, * nlm-target.h, * nlm32-ppc.c, * nlm32-sparc.c, * nlmcode.h, * ns32k.h, * ns32knetbsd.c, * oasys.c, * opncls.c, * pc532-mach.c, * pdp11.c, * pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-mips.c, * pe-x86_64.c, * peXXigen.c, * pef.c, * pef.h, * pei-arm.c, * pei-i386.c, * pei-mcore.c, * pei-x86_64.c, * peicode.h, * plugin.c, * ppcboot.c, * ptrace-core.c, * reloc.c, * riscix.c, * rs6000-core.c, * section.c, * som.c, * som.h, * sparclinux.c, * sparcnetbsd.c, * srec.c, * stabs.c, * sunos.c, * syms.c, * targets.c, * tekhex.c, * trad-core.c, * vax1knetbsd.c, * vaxnetbsd.c, * verilog.c, * versados.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * wasm-module.c, * wasm-module.h, * xcofflink.c, * xsym.c, * xsym.h: Whitespace fixes. * bfd-in2.h, * libbfd.h, * libcoff.h: Regenerate.
2017-12-05 23:56:00 +01:00
#undef elf_backend_obj_attrs_section
Add support for 64-bit ARM architecture: AArch64
2012-08-13 16:52:54 +02:00
#define elf_backend_obj_attrs_section ".ARM.attributes"
[AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld and gas. bfd/ * Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo. (BUILD_CFILES): Add elf32-aarch64.c. (elf32-aarch64.c): New rule for generating from elfnn-aarch64.c. * Makefile.in: Re-generated. * archures.c (bfd_mach_aarch64_ilp32): New define. * bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration. (bfd_elf32_aarch64_set_options): Ditto. (elf32_aarch64_setup_section_lists): Ditto. (elf32_aarch64_next_input_section): Ditto. (elf32_aarch64_size_stubs): Ditto. (elf32_aarch64_build_stubs): Ditto. * bfd-in2.h: Re-generated. * config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec and bfd_elf32_bigaarch64_vec. (aarch64-*-linux*): Likewise. (aarch64_be-*-elf): Likewise. (aarch64_be-*-linux*): Likewise. * configure.in (bfd_elf32_bigaarch64_vec) (bfd_elf32_littleaarch64_vec): New. * configure: Re-generated. * cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with lp64 ones. (bfd_aarch64_arch_ilp32): New. (bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32. * elfnn-aarch64.c (ARCH_SIZE): New define. (AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines. (GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8). (elf64_aarch64_*): Rename to elfNN_aarch64_*. (ELF64_R_*): Rename to ELFNN_R_*. Plus other paramaterization. * targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec): New declarations. (_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and bfd_elf32_littleaarch64_vec. gas/ * config/tc-aarch64.c (ilp32_p): New static variable. (elf64_aarch64_target_format): Return the target according to the value of 'ilp32_p'. (md_begin): Determine 'mach' according to the value of 'ilp32_p'. (aarch64_opts): Add support for options '-milp32' and '-mlp64'. (aarch64_dwarf2_addr_size): New function. * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. (DWARF2_ADDR_SIZE): New define. ld/ * Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c. (eaarch64elf32.c): New dependency and rule. * Makefile.in: Re-generated. * configure.tgt (aarch64-*-elf): Add aarch64elf32. (aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise. * emulparams/aarch64elf32.sh: New file.
2013-06-26 12:41:42 +02:00
#include "elfNN-target.h"
Add support for AArch64 CloudABI binaries. ld * Makefile.am (ALL_64_EMULATION_SOURCES): Add support for CloudABI on aarch64. For this target we have to make sure we use ELFOSABI_CLOUDABI instead of ELFOSABI_NONE. * configure.tgt (targ_emul): Likewise. * emulparams/aarch64cloudabi.sh: New file. * emulparams/aarch64cloudabib.sh: New file. * Makefile.in: Regenerate. bfd * config.bfd (targ_defvec): Add support for CloudABI on aarch64. For this target we have to make sure we use ELFOSABI_CLOUDABI instead of ELFOSABI_NONE. * configure.ac (tb): Likewise. * elfnn-aarch64.c: Likewise. * targets.c (_bfd_target_vector): Likewise. * configure: Regenerate. gas * config/tc-aarch64.c (elf64_aarch64_target_format): Select the cloudabi format if the TARGET_OS is cloudabi.
2015-10-29 14:49:03 +01:00
/* CloudABI support. */
#undef TARGET_LITTLE_SYM
#define TARGET_LITTLE_SYM aarch64_elfNN_le_cloudabi_vec
#undef TARGET_LITTLE_NAME
#define TARGET_LITTLE_NAME "elfNN-littleaarch64-cloudabi"
#undef TARGET_BIG_SYM
#define TARGET_BIG_SYM aarch64_elfNN_be_cloudabi_vec
#undef TARGET_BIG_NAME
#define TARGET_BIG_NAME "elfNN-bigaarch64-cloudabi"
#undef ELF_OSABI
#define ELF_OSABI ELFOSABI_CLOUDABI
#undef elfNN_bed
#define elfNN_bed elfNN_aarch64_cloudabi_bed
#include "elfNN-target.h"