1999-05-03 09:29:11 +02:00
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-*- text -*-
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2009-09-04 10:23:49 +02:00
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2013-05-02 23:06:15 +02:00
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* Add support for the Texas Instruments MSP430X processor.
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2013-04-29 15:38:59 +02:00
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* Add -gdwarf-sections command line option to enable per-code-section
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generation of DWARF .debug_line sections.
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2013-02-07 00:22:26 +01:00
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* Add support for Altera Nios II.
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2013-01-10 10:49:22 +01:00
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* Add support for the Imagination Technologies Meta processor.
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2012-12-17 17:56:12 +01:00
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* Add support for the v850e3v5.
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2012-07-27 10:13:03 +02:00
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Changes in 2.23:
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2012-08-22 09:35:36 +02:00
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* Add support for the 64-bit ARM architecture: AArch64.
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2012-05-15 14:55:51 +02:00
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* Add support for S12X processor.
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Add support for PowerPC VLE.
2012-05-14 Catherine Moore <clm@codesourcery.com>
* NEWS: Mention PowerPC VLE port.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
Catherine Moore <clm@codesourcery.com>
bfd/
* bfd.c (bfd_lookup_section_flags): Add section parm.
* ecoff.c (bfd_debug_section): Remove flag_info initializer.
* elf-bfd.h (bfd_elf_section_data): Move in section_flag_info.
(bfd_elf_lookup_section_flags): Add section parm.
* elf32-ppc.c (is_ppc_vle): New function.
(ppc_elf_modify_segment_map): New function.
(elf_backend_modify_segment_map): Define.
(has_vle_insns): New define.
* elf32-ppc.h (ppc_elf_modify_segment_map): Declare.
* elflink.c (bfd_elf_lookup_section_flags): Add return value & parm.
Move in logic to omit / include a section.
* libbfd-in.h (bfd_link_info): Add section parm.
(bfd_generic_lookup_section_flags): Likewise.
* reloc.c (bfd_generic_lookup_section_flags): Likewise.
* section.c (bfd_section): Move out section_flag_info.
(BFD_FAKE_SECTION): Remove flag_info initializer.
* targets.c (_bfd_lookup_section_flags): Add section parm.
2012-05-14 Catherine Moore <clm@codesourcery.com>
bfd/
* archures.c (bfd_mach_ppc_vle): New.
* bfd-in2.h: Regenerated.
* cpu-powerpc.c (bfd_powerpc_archs): New entry for vle.
* elf32-ppc.c (split16_format_type): New enumeration.
(ppc_elf_vle_split16): New function.
(HOWTO): Add entries for R_PPC_VLE relocations.
(ppc_elf_reloc_type_lookup): Handle PPC_VLE relocations.
(ppc_elf_section_flags): New function.
(ppc_elf_lookup_section_flags): New function.
(ppc_elf_section_processing): New function.
(ppc_elf_check_relocs): Handle PPC_VLE relocations.
(ppc_elf_relocation_section): Likewise.
(elf_backend_lookup_section_flags_hook): Define.
(elf_backend_section_flags): Define.
(elf_backend_section_processing): Define.
* elf32-ppc.h (ppc_elf_section_processing): Declare.
* libbfd.h: Regenerated.
* reloc.c (BFD_RELOC_PPC_VLE_REL8, BFD_RELOC_PPC_VLE_REL15,
BFD_RELOC_PPC_VLE_REL24, BFD_RELOC_PPC_VLE_LO16A,
BFD_RELOC_PPC_VLE_LO16D, BFD_RELOC_PPC_VLE_HI16A,
BFD_RELOC_PPC_VLE_HI16D, BFD_RELOC_PPC_VLE_HA16A,
BFD_RELOC_PPC_VLE_HA16D, BFD_RELOC_PPC_VLE_SDA21,
BFD_RELOC_PPC_VLE_SDA21_LO, BFD_RELOC_PPC_VLE_SDAREL_LO16A,
BFD_RELOC_PPC_VLE_SDAREL_LO16D, BFD_RELOC_PPC_VLE_SDAREL_HI16A,
BFD_RELOC_PPC_VLE_SDAREL_HI16D, BFD_RELOC_PPC_VLE_SDAREL_HA16A,
BFD_RELOC_PPC_VLE_SDAREL_HA16D): New bfd relocations.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
gas/
* config/tc-ppc.c (insn_validate): New func of existing code to call..
(ppc_setup_opcodes): ..from 2 places here.
Revise for second (VLE) opcode table.
Add #ifdef'd code to print opcode tables.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
gas/
* config/tc-ppc.c (ppc_setup_opcodes): Allow out-of-order
for the VLE conditional branches.
2012-05-14 Catherine Moore <clm@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
Rhonda Wittels <rhonda@codesourcery.com>
gas/
* config/tc-ppc.c (PPC_VLE_SPLIT16A): New macro.
(PPC_VLE_SPLIT16D): New macro.
(PPC_VLE_LO16A): New macro.
(PPC_VLE_LO16D): New macro.
(PPC_VLE_HI16A): New macro.
(PPC_VLE_HI16D): New macro.
(PPC_VLE_HA16A): New macro.
(PPC_VLE_HA16D): New macro.
(PPC_APUINFO_VLE): New definition.
(md_chars_to_number): New function.
(md_parse_option): Check for combinations of little
endian and -mvle.
(md_show_usage): Document -mvle.
(ppc_arch): Recognize VLE.
(ppc_mach): Recognize bfd_mach_ppc_vle.
(ppc_setup_opcodes): Print the opcode table if
* config/tc-ppc.h (ppc_frag_check): Declare.
* doc/c-ppc.texi: Document -mvle.
* NEWS: Mention PowerPC VLE port.
2012-05-14 Catherine Moore <clm@codesourcery.com>
gas/
* config/tc-ppc.h (ppc_dw2_line_min_insn_length): Declare.
(DWARF2_LINE_MIN_INSN_LENGTH): Redefine.
* config/tc-ppc.c (ppc_dw2_line_min_insn_length): New.
* dwarf2dbg.c (scale_addr_delta): Handle values of 1
for DWARF2_LINE_MIN_INSN_LENGTH.
2012-05-14 Catherine Moore <clm@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
Rhonda Wittels <rhonda@codesourcery.com>
gas/testsuite/
* gas/ppc/ppc.exp: Run new tests.
* gas/ppc/vle-reloc.d: New test.
* gas/ppc/vle-reloc.s: New test.
* gas/ppc/vle-simple-1.d: New test.
* gas/ppc/vle-simple-1.s: New test.
* gas/ppc/vle-simple-2.d: New test.
* gas/ppc/vle-simple-2.s: New test.
* gas/ppc/vle-simple-3.d: New test.
* gas/ppc/vle-simple-3.s: New test.
* gas/ppc/vle-simple-4.d: New test.
* gas/ppc/vle-simple-4.s: New test.
* gas/ppc/vle-simple-5.d: New test.
* gas/ppc/vle-simple-5.s: New test.
* gas/ppc/vle-simple-6.d: New test.
* gas/ppc/vle-simple-6.s: New test.
* gas/ppc/vle.d: New test.
* gas/ppc/vle.s: New test.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
include/elf/
* ppc.h (SEC_PPC_VLE): Remove.
2012-05-14 Catherine Moore <clm@codesourcery.com>
James Lemke <jwlemke@codesourcery.com>
include/elf/
* ppc.h (R_PPC_VLE_REL8): New reloction.
(R_PPC_VLE_REL15): Likewise.
(R_PPC_VLE_REL24): Likewise.
(R_PPC_VLE_LO16A): Likewise.
(R_PPC_VLE_LO16D): Likewise.
(R_PPC_VLE_HI16A): Likewise.
(R_PPC_VLE_HI16D): Likewise.
(R_PPC_VLE_HA16A): Likewise.
(R_PPC_VLE_HA16D): Likewise.
(R_PPC_VLE_SDA21): Likewise.
(R_PPC_VLE_SDA21_LO): Likewise.
(R_PPC_VLE_SDAREL_LO16A): Likewise.
(R_PPC_VLE_SDAREL_LO16D): Likewise.
(R_PPC_VLE_SDAREL_HI16A): Likewise.
(R_PPC_VLE_SDAREL_HI16D): Likewise.
(R_PPC_VLE_SDAREL_HA16A): Likewise.
(R_PPC_VLE_SDAREL_HA16D): Likewise.
(SEC_PPC_VLE): Remove.
(PF_PPC_VLE): New program header flag.
(SHF_PPC_VLE): New section header flag.
(vle_opcodes, vle_num_opcodes): New.
(VLE_OP): New macro.
(VLE_OP_TO_SEG): New macro.
2012-05-14 Catherine Moore <clm@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
Rhonda Wittels <rhonda@codesourcery.com>
include/opcode/
* ppc.h (PPC_OPCODE_VLE): New definition.
(PPC_OP_SA): New macro.
(PPC_OP_SE_VLE): New macro.
(PPC_OP): Use a variable shift amount.
(powerpc_operand): Update comments.
(PPC_OPSHIFT_INV): New macro.
(PPC_OPERAND_CR): Replace with...
(PPC_OPERAND_CR_BIT): ...this and
(PPC_OPERAND_CR_REG): ...this.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
ld/
* ldlang.c (walk_wild_consider_section): Don't copy section_flag_list.
Pass it to callback.
(walk_wild_section_general): Pass section_flag_list to callback.
(lang_add_section): Add sflag_list parm.
Move out logic to keep / omit a section & call bfd_lookup_section_flags.
(output_section_callback_fast): Add sflag_list parm.
Add new parm to lang_add_section calls.
(output_section_callback): Likewise.
(check_section_callback): Add sflag_list parm.
(lang_place_orphans): Add new parm to lang_add_section calls.
(gc_section_callback): Add sflag_list parm.
(find_relro_section_callback): Likewise.
* ldlang.h (callback_t): Add flag_info parm.
(lang_add_section): Add sflag_list parm.
* emultempl/armelf.em (elf32_arm_add_stub_section):
Add lang_add_section parm.
* emultempl/beos.em (gld*_place_orphan): Likewise.
* emultempl/elf32.em (gld*_place_orphan): Likewise.
* emultempl/hppaelf.em (hppaelf_add_stub_section): Likewise.
* emultempl/m68hc1xelf.em (m68hc11elf_add_stub_section): Likewise.
* emultempl/mipself.em (mips_add_stub_section): Likewise.
* emultempl/mmo.em (mmo_place_orphan): Likewise.
* emultempl/pe.em (gld_*_place_orphan): Likewise.
* emultempl/pep.em (gld_*_place_orphan): Likewise.
* emultempl/ppc64elf.em (ppc_add_stub_section): Likewise.
* emultempl/spuelf.em (spu_place_special_section): Likewise.
* emultempl/vms.em (vms_place_orphan): Likewise.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
ld/testsuite/
* ld-powerpc/powerpc.exp: Create ppceabitests.
* ld-powerpc/vle-multiseg.s: New.
* ld-powerpc/vle-multiseg-1.d: New.
* ld-powerpc/vle-multiseg-1.ld: New.
* ld-powerpc/vle-multiseg-2.d: New.
* ld-powerpc/vle-multiseg-2.ld: New.
* ld-powerpc/vle-multiseg-3.d: New.
* ld-powerpc/vle-multiseg-3.ld: New.
* ld-powerpc/vle-multiseg-4.d: New.
* ld-powerpc/vle-multiseg-4.ld: New.
* ld-powerpc/vle-multiseg-5.d: New.
* ld-powerpc/vle-multiseg-5.ld: New.
* ld-powerpc/vle-multiseg-6.d: New.
* ld-powerpc/vle-multiseg-6.ld: New.
* ld-powerpc/vle-multiseg-6a.s: New.
* ld-powerpc/vle-multiseg-6b.s: New.
* ld-powerpc/vle-multiseg-6c.s: New.
* ld-powerpc/vle-multiseg-6d.s: New.
* ld-powerpc/powerpc.exp: Run new tests.
2012-05-14 Catherine Moore <clm@codesourcery.com>
ld/
* NEWS: Mention PowerPC VLE port.
2012-05-14 Catherine Moore <clm@codesourcery.com>
ld/testsuite/
* ld-powerpc/apuinfo.rd: Update for VLE.
* ld-powerpc/vle-reloc-1.d: New.
* ld-powerpc/vle-reloc-1.s: New.
* ld-powerpc/vle-reloc-2.d: New.
* ld-powerpc/vle-reloc-2.s: New.
* ld-powerpc/vle-reloc-3.d: New.
* ld-powerpc/vle-reloc-3.s: New.
* ld-powerpc/vle-reloc-def-1.s: New.
* ld-powerpc/vle-reloc-def-2.s: New.
* ld-powerpc/vle-reloc-def-3.s: New.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
opcodes/
* ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
(PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
(vle_opcd_indices): New array.
(lookup_vle): New function.
(disassemble_init_powerpc): Revise for second (VLE) opcode table.
(print_insn_powerpc): Likewise.
* ppc-opc.c: Likewise.
2012-05-14 Catherine Moore <clm@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
Rhonda Wittels <rhonda@codesourcery.com>
Nathan Froyd <froydnj@codesourcery.com>
opcodes/
* ppc-opc.c (insert_arx, extract_arx): New functions.
(insert_ary, extract_ary): New functions.
(insert_li20, extract_li20): New functions.
(insert_rx, extract_rx): New functions.
(insert_ry, extract_ry): New functions.
(insert_sci8, extract_sci8): New functions.
(insert_sci8n, extract_sci8n): New functions.
(insert_sd4h, extract_sd4h): New functions.
(insert_sd4w, extract_sd4w): New functions.
(insert_vlesi, extract_vlesi): New functions.
(insert_vlensi, extract_vlensi): New functions.
(insert_vleui, extract_vleui): New functions.
(insert_vleil, extract_vleil): New functions.
(BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
(BI16, BI32, BO32, B8): New.
(B15, B24, CRD32, CRS): New.
(CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
(DB, IMM20, RD, Rx, ARX, RY, RZ): New.
(ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
(SH6_MASK): Use PPC_OPSHIFT_INV.
(SI8, UI5, OIMM5, UI7, BO16): New.
(VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
(XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
(ALLOW8_SPRG): New.
(insert_sprg, extract_sprg): Check ALLOW8_SPRG.
(OPVUP, OPVUP_MASK OPVUP): New
(BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
(EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
(BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
(BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
(IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
(IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
(SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
(SE_IM5, SE_IM5_MASK): New.
(SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
(EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
(BO32DNZ, BO32DZ): New.
(NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
(PPCVLE): New.
(powerpc_opcodes): Add new VLE instructions. Update existing
instruction to include PPCVLE if supported.
* ppc-dis.c (ppc_opts): Add vle entry.
(get_powerpc_dialect): New function.
(powerpc_init_dialect): VLE support.
(print_insn_big_powerpc): Call get_powerpc_dialect.
(print_insn_little_powerpc): Likewise.
(operand_value_powerpc): Handle negative shift counts.
(print_insn_powerpc): Handle 2-byte instruction lengths.
2012-05-14 21:45:30 +02:00
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* Add support for the VLE extension to the PowerPC architecture.
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2012-05-03 15:12:08 +02:00
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* Add support for the Freescale XGATE architecture.
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2012-03-13 17:59:57 +01:00
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* Add support for .bundle_align_mode, .bundle_lock, and .bundle_unlock
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directives. These are currently available only for x86 and ARM targets.
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2011-11-02 04:09:11 +01:00
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* Add support for the Renesas RL78 architecture.
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bfd:
* Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo .
(ALL_MACHINES_CFILES): Add cpu-epiphany.c .
(BFD32_BACKENDS): Add elf32-epiphany.lo .
(BFD32_BACKENDS_CFILES): Add elf32-epiphany.c .
* Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate.
* archures.c (bfd_arch_epiphany): Add.
(bfd_mach_epiphany16, bfd_mach_epiphany32): Define.
(bfd_epiphany_arch): Declare.
(bfd_archures_list): Add &bfd_epiphany_arch.
* config.bfd (epiphany-*-elf): New target case.
* configure.in (bfd_elf32_epiphany_vec): New target vector case.
* reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation.
(BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise.
(BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise.
(BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise.
* targets.c (bfd_elf32_epiphany_vec): Declare.
(_bfd_target_vector): Add bfd_elf32_epiphany_vec.
* po/SRC-POTFILES.in, po/bfd.pot: Regenerate.
* cpu-epiphany.c, elf32-epiphany.c: New files.
binutils:
* readelf.c (include "elf/epiphany.h")
(guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY.
(get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise.
(is_16bit_abs_reloc, is_none_reloc): Likewise.
* po/binutils.pot: Regenerate.
cpu:
* cpu/epiphany.cpu, cpu/epiphany.opc: New files.
gas:
* NEWS: Mention addition of Adapteva Epiphany support.
* config/tc-epiphany.c, config/tc-epiphany.h: New files.
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c .
(TARGET_CPU_HFILES): Add config/tc-epiphany.h .
* Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate.
* configure.in: Also set using_cgen for epiphany.
* configure.tgt: Handle epiphany.
* doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi .
* doc/all.texi: Set EPIPHANY.
* doc/as.texinfo: Add EPIPHANY-specific text.
* doc/c-epiphany.texi: New file.
* po/gas.pot: Regenerate.
gas/testsuite:
* gas/epiphany: New directory.
include:
* dis-asm.h (print_insn_epiphany): Declare.
* elf/epiphany.h: New file.
* elf/common.h (EM_ADAPTEVA_EPIPHANY): Define.
ld:
* NEWS: Mention addition of Adapteva Epiphany support.
* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c .
(eelf32epiphany.c): New rule.
* Makefile.in: Regenerate.
* configure.tgt: Handle epiphany-*-elf.
* po/ld.pot: Regenerate.
* testsuite/ld-srec/srec.exp: xfail epiphany.
* emulparams/elf32epiphany.sh: New file.
opcodes:
* Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h .
(TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c,
epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c .
(CLEANFILES): Add stamp-epiphany.
(EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it.
(stamp-epiphany): New rule.
* Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate.
* configure.in: Handle bfd_epiphany_arch.
* disassemble.c (ARCH_epiphany): Define.
(disassembler): Handle bfd_arch_epiphany.
* epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files.
* epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise.
* epiphany-opc.h: Likewise.
2011-10-25 13:18:16 +02:00
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* Add support for the Adapteva EPIPHANY architecture.
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2012-06-22 23:54:06 +02:00
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* For x86, allow 'rep bsf', 'rep bsr', and 'rep ret' syntax.
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2012-06-22 18:42:08 +02:00
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2011-09-22 10:11:16 +02:00
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Changes in 2.22:
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2011-10-28 16:37:30 +02:00
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* Add support for the Tilera TILEPro and TILE-Gx architectures.
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2010-11-05 09:33:51 +01:00
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2011-06-15 11:12:09 +02:00
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Changes in 2.21:
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2010-11-05 09:33:51 +01:00
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2010-08-25 18:03:58 +02:00
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* Gas no longer requires doubling of ampersands in macros.
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bfd:
* Makefile.am (ALL_MACHINES): Add cpu-tic6x.lo.
(ALL_MACHINES_CFILES): Add cpu-tic6x.c.
(BFD32_BACKENDS): Add elf32-tic6x.lo.
(BFD32_BACKENDS_CFILES): Add elf32-tic6x.c.
* Makefile.in: Regenerate.
* archures.c (bfd_arch_tic6x, bfd_tic6x_arch): New.
(bfd_archures_list): Update.
* config.bfd (tic6x-*-elf): New.
* configure.in (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec):
New.
* configure: Regenerate.
* cpu-tic6x.c, elf32-tic6x.c: New.
* reloc.c (BFD_RELOC_C6000_PCR_S21, BFD_RELOC_C6000_PCR_S12,
BFD_RELOC_C6000_PCR_S10, BFD_RELOC_C6000_PCR_S7,
BFD_RELOC_C6000_ABS_S16, BFD_RELOC_C6000_ABS_L16,
BFD_RELOC_C6000_ABS_H16, BFD_RELOC_C6000_SBR_U15_B,
BFD_RELOC_C6000_SBR_U15_H, BFD_RELOC_C6000_SBR_U15_W,
BFD_RELOC_C6000_SBR_S16, BFD_RELOC_C6000_SBR_L16_B,
BFD_RELOC_C6000_SBR_L16_H, BFD_RELOC_C6000_SBR_L16_W,
BFD_RELOC_C6000_SBR_H16_B, BFD_RELOC_C6000_SBR_H16_H,
BFD_RELOC_C6000_SBR_H16_W, BFD_RELOC_C6000_SBR_GOT_U15_W,
BFD_RELOC_C6000_SBR_GOT_L16_W, BFD_RELOC_C6000_SBR_GOT_H16_W,
BFD_RELOC_C6000_DSBT_INDEX, BFD_RELOC_C6000_PREL31,
BFD_RELOC_C6000_COPY, BFD_RELOC_C6000_ALIGN,
BFD_RELOC_C6000_FPHEAD, BFD_RELOC_C6000_NOCMP): New.
* targets.c (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec): New.
(_bfd_target_vector): Update.
* bfd-in2.h, libbfd.h: Regenerate.
binutils:
* MAINTAINERS: Add self as TI C6X maintainer.
* NEWS: Add news entry for TI C6X support.
* readelf.c: Include elf/tic6x.h.
(guess_is_rela): Handle EM_TI_C6000.
(dump_relocations): Likewise.
(get_tic6x_dynamic_type): New.
(get_dynamic_type): Call it.
(get_machine_flags): Handle EF_C6000_REL.
(get_osabi_name): Handle machine-specific values only for relevant
machines. Handle C6X values.
(get_tic6x_segment_type): New.
(get_segment_type): Call it.
(get_tic6x_section_type_name): New.
(get_section_type_name): Call it.
(is_32bit_abs_reloc, is_16bit_abs_reloc, is_none_reloc): Handle
EM_TI_C6000.
gas:
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-tic6x.c.
(TARGET_CPU_HFILES): Add config/tc-tic6x.h.
* Makefile.in: Regenerate.
* NEWS: Add news entry for TI C6X support.
* app.c (do_scrub_chars): Handle "||^" for TI C6X. Handle
TC_PREDICATE_START_CHAR and TC_PREDICATE_END_CHAR. Keep spaces in
operands if TC_KEEP_OPERAND_SPACES.
* configure.tgt (tic6x-*-*): New.
* config/tc-ia64.h (TC_PREDICATE_START_CHAR,
TC_PREDICATE_END_CHAR): Define.
* config/tc-tic6x.c, config/tc-tic6x.h: New.
* doc/Makefile.am (CPU_DOCS): Add c-tic6x.texi.
* doc/Makefile.in: Regenerate.
* doc/all.texi (TIC6X): Define.
* doc/as.texinfo: Add TI C6X documentation. Include c-tic6x.texi.
* doc/c-tic6x.texi: New.
gas/testsuite:
* gas/tic6x: New directory and testcases.
include:
* dis-asm.h (print_insn_tic6x): Declare.
include/elf:
* common.h (ELFOSABI_C6000_ELFABI, ELFOSABI_C6000_LINUX): Define.
* tic6x.h: New.
include/opcode:
* tic6x-control-registers.h, tic6x-insn-formats.h,
tic6x-opcode-table.h, tic6x.h: New.
ld:
* Makefile.am (ALL_EMULATIONS): Add eelf32_tic6x_be.o and
eelf32_tic6x_le.o.
(eelf32_tic6x_be.c, eelf32_tic6x_le.c): New.
* NEWS: Add news entry for TI C6X support.
* configure.tgt (tic6x-*-*): New.
* emulparams/elf32_tic6x_be.sh, emulparams/elf32_tic6x_le.sh: New.
ld/testsuite:
* ld-elf/flags1.d, ld-elf/merge.d: XFAIL for tic6x-*-*.
* ld-elf/sec-to-seg.exp: Set B_test_same_seg to 0 for tic6x-*-*.
* ld-tic6x: New directory and testcases.
opcodes:
* Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
* Makefile.in: Regenerate.
* configure.in (bfd_tic6x_arch): New.
* configure: Regenerate.
* disassemble.c (ARCH_tic6x): Define if ARCH_all.
(disassembler): Handle TI C6X.
* tic6x-dis.c: New.
2010-03-25 22:12:36 +01:00
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* Add support for the TMS320C6000 (TI C6X) processor family.
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2010-01-27 23:01:38 +01:00
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* GAS now understands an extended syntax in the .section directive flags
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for COFF targets that allows the section's alignment to be specified. This
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feature has also been backported to the 2.20 release series, starting with
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2.20.1.
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2009-09-29 16:17:19 +02:00
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* Add support for the Renesas RX processor.
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2010-07-15 19:45:17 +02:00
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* New command line option, --compress-debug-sections, which requests
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compression of DWARF debug information sections in the relocatable output
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file. Compressed debug sections are supported by readelf, objdump, and
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gold, but not currently by Gnu ld.
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2009-09-04 10:23:49 +02:00
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Changes in 2.20:
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2010-07-23 16:52:54 +02:00
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* Added support for v850e2 and v850e2v3.
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2009-07-23 15:00:30 +02:00
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* GNU/Linux targets now supports "gnu_unique_object" as a value in the .type
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pseudo op. It marks the symbol as being globally unique in the entire
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process.
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2009-07-09 09:52:37 +02:00
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* ARM assembler now supports .inst[.nw] pseudo-ops to insert opcodes specified
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in binary rather than text.
|
2008-09-08 10:56:57 +02:00
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2009-05-19 18:08:08 +02:00
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* Add support for common symbol alignment to PE formats.
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2009-04-24 20:31:29 +02:00
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* Add support for the new discriminator column in the DWARF line table,
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with a discriminator operand for the .loc directive.
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2009-03-02 11:33:08 +01:00
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* Add support for Sunplus score architecture.
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2009-04-30 17:47:13 +02:00
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* The .type pseudo-op now accepts a type of STT_GNU_IFUNC which can be used to
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indicate that if the symbol is the target of a relocation, its value should
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not be use. Instead the function should be invoked and its result used as
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the value.
|
2012-03-13 17:59:57 +01:00
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2008-12-23 20:10:25 +01:00
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* Add support for Lattice Mico32 (lm32) architecture.
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2012-03-13 17:59:57 +01:00
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* Add support for Xilinx MicroBlaze architecture.
|
2009-08-07 14:12:52 +02:00
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2008-09-08 10:56:57 +02:00
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Changes in 2.19:
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2008-09-28 17:15:32 +02:00
|
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* New pseudo op .cfi_val_encoded_addr, to record constant addresses in unwind
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tables without runtime relocation.
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2008-08-06 17:42:15 +02:00
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* New command line option, -h-tick-hex, for sh, m32c, and h8/300 targets, which
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adds compatibility with H'00 style hex constants.
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2008-04-10 19:53:40 +02:00
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* New command line option, -msse-check=[none|error|warning], for x86
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targets.
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2008-04-10 14:45:18 +02:00
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* New sub-option added to the assembler's -a command line switch to
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generate a listing output. The 'g' sub-option will insert into the listing
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various information about the assembly, such as assembler version, the
|
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command line options used, and a time stamp.
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binutils/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* dwarf.c (dwarf_regnames_i386): Add AVX registers.
(dwarf_regnames_x86_64): Likewise.
gas/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* NEWS: Mention AES, CLMUL, AVX/FMA and -msse2avx.
* doc/c-i386.texi: Add avx, aes, clmul and fma to -march=.
Document -msse2avx, .avx, .aes, .clmul and .fma.
* config/tc-i386.c (YMMWORD_MNEM_SUFFIX): New.
(vex_prefix): Likewise.
(sse2avx): Likewise.
(CPU_FLAGS_ARCH_MATCH): Likewise.
(CPU_FLAGS_64BIT_MATCH): Likewise.
(CPU_FLAGS_32BIT_MATCH): Likewise.
(CPU_FLAGS_PERFECT_MATCH): Likewise.
(regymm): Likewise.
(vex_imm4): Likewise.
(fits_in_imm4): Likewise.
(build_vex_prefix): Likewise.
(VEX_check_operands): Likewise.
(bad_implicit_operand): Likewise.
(OPTION_MSSE2AVX): Likewise.
(T_YMMWORD): Likewise.
(_i386_insn): Add vex.
(cpu_arch): Add .avx, .aes, .clmul and .fma.
(cpu_flags_match): Changed to take a pointer to const template.
Enable encoding SSE instructions with VEX prefix for -msse2avx.
(match_mem_size): Also check ymmword.
(operand_type_match): Clear ymmword.
(md_begin): Allow '_' in mnemonic.
(type_names): Add OPERAND_TYPE_VEX_IMM4.
(process_immext): Update assert.
(md_assemble): Don't call process_immext if sse2avx and immext
are true. Call build_vex_prefix if vex is true.
(parse_insn): Updated for cpu_flags_match.
(swap_operands): Handle 5 operands.
(match_template): Handle 5 operands. Updated for cpu_flags_match.
Check regymm. Call VEX_check_operands. Handle YMMWORD_MNEM_SUFFIX.
(process_suffix): Handle YMMWORD_MNEM_SUFFIX.
(check_byte_reg): Check regymm.
(process_operands): Duplicate the destination register for
-msse2avx if needed.
(build_modrm_byte): Updated for instructions with VEX encoding.
(output_insn): Output VEX prefix if needed.
(md_longopts): Add msse2avx.
(md_parse_option): Handle OPTION_MSSE2AVX.
(md_show_usage): Add avx, aes, clmul, fma and -msse2avx.
(intel_e09): Support YMMWORD.
(intel_e11): Likewise.
(intel_get_token): Likewise.
gas/testsuite/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run aes, aes-intel, x86-64-aes,
x86-64-aes-intel, avx, avx-intel, inval-avx, x86-64-avx,
x86-64-avx-intel and x86-64-inval-avx.
* gas/cfi/cfi-i386.s: Add tests for AVX register maps.
* gas/cfi/cfi-x86_64.s: Likewise.
* gas/i386/aes.d: New.
* gas/i386/aes.s: Likewise.
* gas/i386/aes-intel.d: Likewise.
* gas/i386/avx.d: Likewise.
* gas/i386/avx.s: Likewise.
* gas/i386/avx-intel.d: Likewise.
* gas/i386/clmul.d: Likewise.
* gas/i386/clmul-intel.d: Likewise.
* gas/i386/clmul.s: Likewise.
* gas/i386/i386.exp: Likewise.
* gas/i386/inval-avx.l: Likewise.
* gas/i386/inval-avx.s: Likewise.
* gas/i386/sse2avx.d: Likewise.
* gas/i386/sse2avx.s: Likewise.
* gas/i386/x86-64-aes.d: Likewise.
* gas/i386/x86-64-aes.s: Likewise.
* gas/i386/x86-64-aes-intel.d: Likewise.
* gas/i386/x86-64-avx.d: Likewise.
* gas/i386/x86-64-avx.s: Likewise.
* gas/i386/x86-64-avx-intel.d: Likewise.
* gas/i386/x86-64-clmul.d: Likewise.
* gas/i386/x86-64-clmul-intel.d: Likewise.
* gas/i386/x86-64-clmul.s: Likewise.
* gas/i386/x86-64-inval-avx.l: Likewise.
* gas/i386/x86-64-inval-avx.s: Likewise.
* gas/i386/x86-64-sse2avx.d: Likewise.
* gas/i386/x86-64-sse2avx.s: Likewise.
* gas/i386/arch-10.s: Add tests for AVX, AES, CLMUL and FMA.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/rexw.s: Add AVX tests.
* gas/i386/x86-64-opcode-inval.s: Remove lds/les test.
* gas/cfi/cfi-i386.d: Updated.
* gas/cfi/cfi-x86_64.d: Likewise.
* gas/i386/arch-10.d: Likewise.
* gas/i386/arch-10-1.l: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/rexw.d: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
* gas/i386/x86-64-opcode-inval.d: Likewise.
* gas/i386/x86-64-opcode-inval-intel.d: Likewise.
include/opcode/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (MAX_OPERANDS): Set to 5.
(MAX_MNEM_SIZE): Changed to 20.
opcodes/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (OP_E_register): New.
(OP_E_memory): Likewise.
(OP_VEX): Likewise.
(OP_EX_Vex): Likewise.
(OP_EX_VexW): Likewise.
(OP_XMM_Vex): Likewise.
(OP_XMM_VexW): Likewise.
(OP_REG_VexI4): Likewise.
(PCLMUL_Fixup): Likewise.
(VEXI4_Fixup): Likewise.
(VZERO_Fixup): Likewise.
(VCMP_Fixup): Likewise.
(VPERMIL2_Fixup): Likewise.
(rex_original): Likewise.
(rex_ignored): Likewise.
(Mxmm): Likewise.
(XMM): Likewise.
(EXxmm): Likewise.
(EXxmmq): Likewise.
(EXymmq): Likewise.
(Vex): Likewise.
(Vex128): Likewise.
(Vex256): Likewise.
(VexI4): Likewise.
(EXdVex): Likewise.
(EXqVex): Likewise.
(EXVexW): Likewise.
(EXdVexW): Likewise.
(EXqVexW): Likewise.
(XMVex): Likewise.
(XMVexW): Likewise.
(XMVexI4): Likewise.
(PCLMUL): Likewise.
(VZERO): Likewise.
(VCMP): Likewise.
(VPERMIL2): Likewise.
(xmm_mode): Likewise.
(xmmq_mode): Likewise.
(ymmq_mode): Likewise.
(vex_mode): Likewise.
(vex128_mode): Likewise.
(vex256_mode): Likewise.
(USE_VEX_C4_TABLE): Likewise.
(USE_VEX_C5_TABLE): Likewise.
(USE_VEX_LEN_TABLE): Likewise.
(VEX_C4_TABLE): Likewise.
(VEX_C5_TABLE): Likewise.
(VEX_LEN_TABLE): Likewise.
(REG_VEX_XX): Likewise.
(MOD_VEX_XXX): Likewise.
(PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
(PREFIX_0F3A44): Likewise.
(PREFIX_0F3ADF): Likewise.
(PREFIX_VEX_XXX): Likewise.
(VEX_OF): Likewise.
(VEX_OF38): Likewise.
(VEX_OF3A): Likewise.
(VEX_LEN_XXX): Likewise.
(vex): Likewise.
(need_vex): Likewise.
(need_vex_reg): Likewise.
(vex_i4_done): Likewise.
(vex_table): Likewise.
(vex_len_table): Likewise.
(OP_REG_VexI4): Likewise.
(vex_cmp_op): Likewise.
(pclmul_op): Likewise.
(vpermil2_op): Likewise.
(m_mode): Updated.
(es_reg): Likewise.
(PREFIX_0F38F0): Likewise.
(PREFIX_0F3A60): Likewise.
(reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
(prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
and PREFIX_VEX_XXX entries.
(x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
(three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
PREFIX_0F3ADF.
(mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
Add MOD_VEX_XXX entries.
(ckprefix): Initialize rex_original and rex_ignored. Store the
REX byte in rex_original.
(get_valid_dis386): Handle the implicit prefix in VEX prefix
bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
(print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
calling get_valid_dis386. Use rex_original and rex_ignored when
printing out REX.
(putop): Handle "XY".
(intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
ymmq_mode.
(OP_E_extended): Updated to use OP_E_register and
OP_E_memory.
(OP_XMM): Handle VEX.
(OP_EX): Likewise.
(XMM_Fixup): Likewise.
(CMP_Fixup): Use ARRAY_SIZE.
* i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
CPU_FMA_FLAGS and CPU_AVX_FLAGS.
(operand_type_init): Add OPERAND_TYPE_REGYMM and
OPERAND_TYPE_VEX_IMM4.
(cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
(opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
VexImmExt and SSE2AVX.
(operand_types): Add RegYMM, Ymmword and Vex_Imm4.
* i386-opc.h (CpuAVX): New.
(CpuAES): Likewise.
(CpuCLMUL): Likewise.
(CpuFMA): Likewise.
(Vex): Likewise.
(Vex256): Likewise.
(VexNDS): Likewise.
(VexNDD): Likewise.
(VexW0): Likewise.
(VexW1): Likewise.
(Vex0F): Likewise.
(Vex0F38): Likewise.
(Vex0F3A): Likewise.
(Vex3Sources): Likewise.
(VexImmExt): Likewise.
(SSE2AVX): Likewise.
(RegYMM): Likewise.
(Ymmword): Likewise.
(Vex_Imm4): Likewise.
(Implicit1stXmm0): Likewise.
(CpuXsave): Updated.
(CpuLM): Likewise.
(ByteOkIntel): Likewise.
(OldGcc): Likewise.
(Control): Likewise.
(Unspecified): Likewise.
(OTMax): Likewise.
(i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
(i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
vex3sources, veximmext and sse2avx.
(i386_operand_type): Add regymm, ymmword and vex_imm4.
* i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
* i386-reg.tbl: Add AVX registers, ymm0..ymm15.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-04-03 16:03:21 +02:00
|
|
|
|
* New command line option -msse2avx for x86 target to encode SSE
|
|
|
|
|
instructions with VEX prefix.
|
|
|
|
|
|
gas/
2008-05-02 H.J. Lu <hongjiu.lu@intel.com>
* NEWS: Mention XSAVE, EPT and MOVBE.
* config/tc-i386.c (cpu_arch): Add .movbe and .ept.
(md_show_usage): Add .movbe and .ept.
* doc/c-i386.texi: Add movbe and ept to -march=. Document
.movbe and .ept.
gas/testsuite/
2008-05-02 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run movbe, movbe-intel, inval-movbe, ept,
ept-intel, inval-ept, x86-64-movbe, x86-64-movbe-intel,
x86-64-inval-movbe. x86-64-ept, x86-64-ept-intel and
x86-64-inval-ept.
* gas/i386/arch-10.s: Add movbe and invept.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/ept.d: New file
* gas/i386/ept-intel.d: Likewise.
* gas/i386/ept.s: Likewise.
* gas/i386/inval-ept.l: Likewise.
* gas/i386/inval-ept.s: Likewise.
* gas/i386/inval-movbe.l: Likewise.
* gas/i386/inval-movbe.s: Likewise.
* gas/i386/movbe.d: Likewise.
* gas/i386/movbe-intel.d: Likewise.
* gas/i386/movbe.s: Likewise.
* gas/i386/x86-64-inval-ept.l: Likewise.
* gas/i386/x86-64-inval-ept.s: Likewise.
* gas/i386/x86-64-inval-movbe.l: Likewise.
* gas/i386/x86-64-inval-movbe.s: Likewise.
* gas/i386/x86-64-ept.d: Likewise.
* gas/i386/x86-64-ept-intel.d: Likewise.
* gas/i386/x86-64-ept.s: Likewise.
* gas/i386/x86-64-movbe.d: Likewise.
* gas/i386/x86-64-movbe-intel.d: Likewise.
* gas/i386/x86-64-movbe.s: Likewise.
* gas/i386/arch-10.d: Updated.
* gas/i386/arch-10-1.l: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
opcodes/
2008-05-02 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (MOVBE_Fixup): New.
(Mo): Likewise.
(PREFIX_0F3880): Likewise.
(PREFIX_0F3881): Likewise.
(PREFIX_0F38F0): Updated.
(prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881. Update
PREFIX_0F38F0 and PREFIX_0F38F1 for movbe.
(three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881.
* i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and
CPU_EPT_FLAGS.
(cpu_flags): Add CpuMovbe and CpuEPT.
* i386-opc.h (CpuMovbe): New.
(CpuEPT): Likewise.
(CpuLM): Updated.
(i386_cpu_flags): Add cpumovbe and cpuept.
* i386-opc.tbl: Add entries for movbe and EPT instructions.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-05-02 18:53:40 +02:00
|
|
|
|
* Add Intel XSAVE, EPT, MOVBE, AES, PCLMUL, AVX/FMA support for x86 target.
|
binutils/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* dwarf.c (dwarf_regnames_i386): Add AVX registers.
(dwarf_regnames_x86_64): Likewise.
gas/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* NEWS: Mention AES, CLMUL, AVX/FMA and -msse2avx.
* doc/c-i386.texi: Add avx, aes, clmul and fma to -march=.
Document -msse2avx, .avx, .aes, .clmul and .fma.
* config/tc-i386.c (YMMWORD_MNEM_SUFFIX): New.
(vex_prefix): Likewise.
(sse2avx): Likewise.
(CPU_FLAGS_ARCH_MATCH): Likewise.
(CPU_FLAGS_64BIT_MATCH): Likewise.
(CPU_FLAGS_32BIT_MATCH): Likewise.
(CPU_FLAGS_PERFECT_MATCH): Likewise.
(regymm): Likewise.
(vex_imm4): Likewise.
(fits_in_imm4): Likewise.
(build_vex_prefix): Likewise.
(VEX_check_operands): Likewise.
(bad_implicit_operand): Likewise.
(OPTION_MSSE2AVX): Likewise.
(T_YMMWORD): Likewise.
(_i386_insn): Add vex.
(cpu_arch): Add .avx, .aes, .clmul and .fma.
(cpu_flags_match): Changed to take a pointer to const template.
Enable encoding SSE instructions with VEX prefix for -msse2avx.
(match_mem_size): Also check ymmword.
(operand_type_match): Clear ymmword.
(md_begin): Allow '_' in mnemonic.
(type_names): Add OPERAND_TYPE_VEX_IMM4.
(process_immext): Update assert.
(md_assemble): Don't call process_immext if sse2avx and immext
are true. Call build_vex_prefix if vex is true.
(parse_insn): Updated for cpu_flags_match.
(swap_operands): Handle 5 operands.
(match_template): Handle 5 operands. Updated for cpu_flags_match.
Check regymm. Call VEX_check_operands. Handle YMMWORD_MNEM_SUFFIX.
(process_suffix): Handle YMMWORD_MNEM_SUFFIX.
(check_byte_reg): Check regymm.
(process_operands): Duplicate the destination register for
-msse2avx if needed.
(build_modrm_byte): Updated for instructions with VEX encoding.
(output_insn): Output VEX prefix if needed.
(md_longopts): Add msse2avx.
(md_parse_option): Handle OPTION_MSSE2AVX.
(md_show_usage): Add avx, aes, clmul, fma and -msse2avx.
(intel_e09): Support YMMWORD.
(intel_e11): Likewise.
(intel_get_token): Likewise.
gas/testsuite/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run aes, aes-intel, x86-64-aes,
x86-64-aes-intel, avx, avx-intel, inval-avx, x86-64-avx,
x86-64-avx-intel and x86-64-inval-avx.
* gas/cfi/cfi-i386.s: Add tests for AVX register maps.
* gas/cfi/cfi-x86_64.s: Likewise.
* gas/i386/aes.d: New.
* gas/i386/aes.s: Likewise.
* gas/i386/aes-intel.d: Likewise.
* gas/i386/avx.d: Likewise.
* gas/i386/avx.s: Likewise.
* gas/i386/avx-intel.d: Likewise.
* gas/i386/clmul.d: Likewise.
* gas/i386/clmul-intel.d: Likewise.
* gas/i386/clmul.s: Likewise.
* gas/i386/i386.exp: Likewise.
* gas/i386/inval-avx.l: Likewise.
* gas/i386/inval-avx.s: Likewise.
* gas/i386/sse2avx.d: Likewise.
* gas/i386/sse2avx.s: Likewise.
* gas/i386/x86-64-aes.d: Likewise.
* gas/i386/x86-64-aes.s: Likewise.
* gas/i386/x86-64-aes-intel.d: Likewise.
* gas/i386/x86-64-avx.d: Likewise.
* gas/i386/x86-64-avx.s: Likewise.
* gas/i386/x86-64-avx-intel.d: Likewise.
* gas/i386/x86-64-clmul.d: Likewise.
* gas/i386/x86-64-clmul-intel.d: Likewise.
* gas/i386/x86-64-clmul.s: Likewise.
* gas/i386/x86-64-inval-avx.l: Likewise.
* gas/i386/x86-64-inval-avx.s: Likewise.
* gas/i386/x86-64-sse2avx.d: Likewise.
* gas/i386/x86-64-sse2avx.s: Likewise.
* gas/i386/arch-10.s: Add tests for AVX, AES, CLMUL and FMA.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/rexw.s: Add AVX tests.
* gas/i386/x86-64-opcode-inval.s: Remove lds/les test.
* gas/cfi/cfi-i386.d: Updated.
* gas/cfi/cfi-x86_64.d: Likewise.
* gas/i386/arch-10.d: Likewise.
* gas/i386/arch-10-1.l: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/rexw.d: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
* gas/i386/x86-64-opcode-inval.d: Likewise.
* gas/i386/x86-64-opcode-inval-intel.d: Likewise.
include/opcode/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (MAX_OPERANDS): Set to 5.
(MAX_MNEM_SIZE): Changed to 20.
opcodes/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (OP_E_register): New.
(OP_E_memory): Likewise.
(OP_VEX): Likewise.
(OP_EX_Vex): Likewise.
(OP_EX_VexW): Likewise.
(OP_XMM_Vex): Likewise.
(OP_XMM_VexW): Likewise.
(OP_REG_VexI4): Likewise.
(PCLMUL_Fixup): Likewise.
(VEXI4_Fixup): Likewise.
(VZERO_Fixup): Likewise.
(VCMP_Fixup): Likewise.
(VPERMIL2_Fixup): Likewise.
(rex_original): Likewise.
(rex_ignored): Likewise.
(Mxmm): Likewise.
(XMM): Likewise.
(EXxmm): Likewise.
(EXxmmq): Likewise.
(EXymmq): Likewise.
(Vex): Likewise.
(Vex128): Likewise.
(Vex256): Likewise.
(VexI4): Likewise.
(EXdVex): Likewise.
(EXqVex): Likewise.
(EXVexW): Likewise.
(EXdVexW): Likewise.
(EXqVexW): Likewise.
(XMVex): Likewise.
(XMVexW): Likewise.
(XMVexI4): Likewise.
(PCLMUL): Likewise.
(VZERO): Likewise.
(VCMP): Likewise.
(VPERMIL2): Likewise.
(xmm_mode): Likewise.
(xmmq_mode): Likewise.
(ymmq_mode): Likewise.
(vex_mode): Likewise.
(vex128_mode): Likewise.
(vex256_mode): Likewise.
(USE_VEX_C4_TABLE): Likewise.
(USE_VEX_C5_TABLE): Likewise.
(USE_VEX_LEN_TABLE): Likewise.
(VEX_C4_TABLE): Likewise.
(VEX_C5_TABLE): Likewise.
(VEX_LEN_TABLE): Likewise.
(REG_VEX_XX): Likewise.
(MOD_VEX_XXX): Likewise.
(PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
(PREFIX_0F3A44): Likewise.
(PREFIX_0F3ADF): Likewise.
(PREFIX_VEX_XXX): Likewise.
(VEX_OF): Likewise.
(VEX_OF38): Likewise.
(VEX_OF3A): Likewise.
(VEX_LEN_XXX): Likewise.
(vex): Likewise.
(need_vex): Likewise.
(need_vex_reg): Likewise.
(vex_i4_done): Likewise.
(vex_table): Likewise.
(vex_len_table): Likewise.
(OP_REG_VexI4): Likewise.
(vex_cmp_op): Likewise.
(pclmul_op): Likewise.
(vpermil2_op): Likewise.
(m_mode): Updated.
(es_reg): Likewise.
(PREFIX_0F38F0): Likewise.
(PREFIX_0F3A60): Likewise.
(reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
(prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
and PREFIX_VEX_XXX entries.
(x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
(three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
PREFIX_0F3ADF.
(mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
Add MOD_VEX_XXX entries.
(ckprefix): Initialize rex_original and rex_ignored. Store the
REX byte in rex_original.
(get_valid_dis386): Handle the implicit prefix in VEX prefix
bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
(print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
calling get_valid_dis386. Use rex_original and rex_ignored when
printing out REX.
(putop): Handle "XY".
(intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
ymmq_mode.
(OP_E_extended): Updated to use OP_E_register and
OP_E_memory.
(OP_XMM): Handle VEX.
(OP_EX): Likewise.
(XMM_Fixup): Likewise.
(CMP_Fixup): Use ARRAY_SIZE.
* i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
CPU_FMA_FLAGS and CPU_AVX_FLAGS.
(operand_type_init): Add OPERAND_TYPE_REGYMM and
OPERAND_TYPE_VEX_IMM4.
(cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
(opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
VexImmExt and SSE2AVX.
(operand_types): Add RegYMM, Ymmword and Vex_Imm4.
* i386-opc.h (CpuAVX): New.
(CpuAES): Likewise.
(CpuCLMUL): Likewise.
(CpuFMA): Likewise.
(Vex): Likewise.
(Vex256): Likewise.
(VexNDS): Likewise.
(VexNDD): Likewise.
(VexW0): Likewise.
(VexW1): Likewise.
(Vex0F): Likewise.
(Vex0F38): Likewise.
(Vex0F3A): Likewise.
(Vex3Sources): Likewise.
(VexImmExt): Likewise.
(SSE2AVX): Likewise.
(RegYMM): Likewise.
(Ymmword): Likewise.
(Vex_Imm4): Likewise.
(Implicit1stXmm0): Likewise.
(CpuXsave): Updated.
(CpuLM): Likewise.
(ByteOkIntel): Likewise.
(OldGcc): Likewise.
(Control): Likewise.
(Unspecified): Likewise.
(OTMax): Likewise.
(i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
(i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
vex3sources, veximmext and sse2avx.
(i386_operand_type): Add regymm, ymmword and vex_imm4.
* i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
* i386-reg.tbl: Add AVX registers, ymm0..ymm15.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-04-03 16:03:21 +02:00
|
|
|
|
|
2008-01-24 23:44:37 +01:00
|
|
|
|
* New command line options, -march=CPU[,+EXTENSION...], -mtune=CPU,
|
|
|
|
|
-mmnemonic=[att|intel], -msyntax=[att|intel], -mindex-reg,
|
|
|
|
|
-mnaked-reg and -mold-gcc, for x86 targets.
|
|
|
|
|
|
2007-10-04 19:05:37 +02:00
|
|
|
|
* Support for generating wide character strings has been added via the new
|
|
|
|
|
pseudo ops: .string16, .string32 and .string64.
|
|
|
|
|
|
2007-09-14 20:21:09 +02:00
|
|
|
|
* Support for SSE5 has been added to the i386 port.
|
|
|
|
|
|
2007-08-10 15:21:40 +02:00
|
|
|
|
Changes in 2.18:
|
|
|
|
|
|
2007-07-03 13:01:12 +02:00
|
|
|
|
* The GAS sources are now released under the GPLv3.
|
|
|
|
|
|
2007-06-29 16:09:34 +02:00
|
|
|
|
* Support for the National Semiconductor CR16 target has been added.
|
|
|
|
|
|
2007-03-27 10:33:47 +02:00
|
|
|
|
* Added gas .reloc pseudo. This is a low-level interface for creating
|
|
|
|
|
relocations.
|
|
|
|
|
|
2006-09-20 13:35:11 +02:00
|
|
|
|
* Add support for x86_64 PE+ target.
|
|
|
|
|
|
2006-09-17 01:51:50 +02:00
|
|
|
|
* Add support for Score target.
|
2002-06-29 06:54:59 +02:00
|
|
|
|
|
2007-07-03 13:01:12 +02:00
|
|
|
|
Changes in 2.17:
|
|
|
|
|
|
2006-02-17 15:36:28 +01:00
|
|
|
|
* Support for the Infineon XC16X has been added by KPIT Cummins Infosystems.
|
|
|
|
|
|
2005-11-08 12:17:03 +01:00
|
|
|
|
* Support for ms2 architecture has been added.
|
|
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|
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|
2005-10-25 19:42:02 +02:00
|
|
|
|
* Support for the Z80 processor family has been added.
|
|
|
|
|
|
2005-10-13 02:57:43 +02:00
|
|
|
|
* Add support for the "@<file>" syntax to the command line, so that extra
|
|
|
|
|
switches can be read from <file>.
|
|
|
|
|
|
2005-10-06 13:44:07 +02:00
|
|
|
|
* The SH target supports a new command line switch --enable-reg-prefix which,
|
|
|
|
|
if enabled, will allow register names to be optionally prefixed with a $
|
|
|
|
|
character. This allows register names to be distinguished from label names.
|
2012-03-13 17:59:57 +01:00
|
|
|
|
|
2005-05-06 08:50:31 +02:00
|
|
|
|
* Macros with a variable number of arguments are now supported. See the
|
|
|
|
|
documentation for how this works.
|
|
|
|
|
|
2005-04-12 10:42:41 +02:00
|
|
|
|
* Added --reduce-memory-overheads switch to reduce the size of the hash
|
|
|
|
|
tables used, at the expense of longer assembly times, and
|
|
|
|
|
--hash-size=<NUMBER> to set the size of the hash tables used by gas.
|
|
|
|
|
|
2005-04-11 14:46:38 +02:00
|
|
|
|
* Macro names and macro parameter names can now be any identifier that would
|
|
|
|
|
also be legal as a symbol elsewhere. For macro parameter names, this is
|
|
|
|
|
known to cause problems in certain sources when the respective target uses
|
|
|
|
|
characters inconsistently, and thus macro parameter references may no longer
|
|
|
|
|
be recognized as such (see the documentation for details).
|
2012-03-13 17:59:57 +01:00
|
|
|
|
|
2005-04-01 16:17:17 +02:00
|
|
|
|
* Support the .f_floating, .d_floating, .g_floating and .h_floating directives
|
|
|
|
|
for the VAX target in order to be more compatible with the VAX MACRO
|
|
|
|
|
assembler.
|
|
|
|
|
|
2005-03-29 00:34:20 +02:00
|
|
|
|
* New command line option -mtune=[itanium1|itanium2] for IA64 targets.
|
|
|
|
|
|
2005-03-15 18:49:15 +01:00
|
|
|
|
Changes in 2.16:
|
|
|
|
|
|
2005-03-08 14:59:23 +01:00
|
|
|
|
* Redefinition of macros now results in an error.
|
|
|
|
|
|
2005-02-18 00:22:05 +01:00
|
|
|
|
* New command line option -mhint.b=[ok|warning|error] for IA64 targets.
|
|
|
|
|
|
2005-02-11 22:01:19 +01:00
|
|
|
|
* New command line option -munwind-check=[warning|error] for IA64
|
|
|
|
|
targets.
|
|
|
|
|
|
2005-02-14 09:02:51 +01:00
|
|
|
|
* The IA64 port now uses automatic dependency violation removal as its default
|
|
|
|
|
mode.
|
|
|
|
|
|
2004-11-08 14:17:43 +01:00
|
|
|
|
* Port to MAXQ processor contributed by HCL Tech.
|
|
|
|
|
|
2004-10-05 15:51:40 +02:00
|
|
|
|
* Added support for generating unwind tables for ARM ELF targets.
|
|
|
|
|
|
2004-08-17 14:19:58 +02:00
|
|
|
|
* Add a -g command line option to generate debug information in the target's
|
|
|
|
|
preferred debug format.
|
|
|
|
|
|
2004-07-07 19:28:53 +02:00
|
|
|
|
* Support for the crx-elf target added.
|
|
|
|
|
|
2004-07-09 14:32:35 +02:00
|
|
|
|
* Support for the sh-symbianelf target added.
|
2004-07-07 19:28:53 +02:00
|
|
|
|
|
2004-05-07 16:44:56 +02:00
|
|
|
|
* Added a pseudo-op (.secrel32) to generate 32 bit section relative relocations
|
|
|
|
|
on pe[i]-i386; required for this target's DWARF 2 support.
|
|
|
|
|
|
2004-05-05 16:33:14 +02:00
|
|
|
|
* Support for Motorola MCF521x/5249/547x/548x added.
|
|
|
|
|
|
2004-04-22 12:33:16 +02:00
|
|
|
|
* Support for ColdFire EMAC instructions added and Motorola syntax for MAC/EMAC
|
|
|
|
|
instrucitons.
|
|
|
|
|
|
2004-12-10 20:48:21 +01:00
|
|
|
|
* New command line option -mno-shared for MIPS ELF targets.
|
|
|
|
|
|
2004-08-13 21:53:52 +02:00
|
|
|
|
* New command line option --alternate and pseudo-ops .altmacro and .noaltmacro
|
|
|
|
|
added to enter (and leave) alternate macro syntax mode.
|
|
|
|
|
|
2004-07-13 19:31:15 +02:00
|
|
|
|
Changes in 2.15:
|
|
|
|
|
|
2004-04-21 02:44:36 +02:00
|
|
|
|
* The MIPS -membedded-pic option (Embedded-PIC code generation) is
|
|
|
|
|
deprecated and will be removed in a future release.
|
|
|
|
|
|
2003-12-19 12:44:01 +01:00
|
|
|
|
* Added PIC m32r Linux (ELF) and support to M32R assembler.
|
|
|
|
|
|
2003-12-06 02:25:29 +01:00
|
|
|
|
* Added support for ARM V6.
|
|
|
|
|
|
2003-12-03 Alexandre Oliva <aoliva@redhat.com>
* config/tc-sh.c: Add support for sh4a and no-fpu variants,
with appropriate additions to md_show_usage.
* testsuite/gas/sh/basic.exp: Call tests for sh4a.
* testsuite/gas/sh/{err-sh4a-fp.s, err-sh4a.s,
err-sh4al-dsp.s, sh4a-dsp.d, sh4a-dsp.s, sh4a-fp.d,
sh4a-fp.s, sh4a.d, sh4a.s, sh4al-dsp.d, sh4al-dsp.s:
New files, tests for sh4a and related variants.
* doc/c-sh.texi: Document new -isa options.
* doc/c-sh64.texi: Ditto.
* NEWS: Mention new support for sh4a.
2003-12-05 02:59:55 +01:00
|
|
|
|
* Added support for sh4a and variants.
|
|
|
|
|
|
2003-12-03 18:42:12 +01:00
|
|
|
|
* Support for Renesas M32R2 added.
|
|
|
|
|
|
2003-12-03 Alexandre Oliva <aoliva@redhat.com>
* config/tc-sh.c: Add support for sh4a and no-fpu variants,
with appropriate additions to md_show_usage.
* testsuite/gas/sh/basic.exp: Call tests for sh4a.
* testsuite/gas/sh/{err-sh4a-fp.s, err-sh4a.s,
err-sh4al-dsp.s, sh4a-dsp.d, sh4a-dsp.s, sh4a-fp.d,
sh4a-fp.s, sh4a.d, sh4a.s, sh4al-dsp.d, sh4al-dsp.s:
New files, tests for sh4a and related variants.
* doc/c-sh.texi: Document new -isa options.
* doc/c-sh64.texi: Ditto.
* NEWS: Mention new support for sh4a.
2003-12-05 02:59:55 +01:00
|
|
|
|
* Limited support for Mapping Symbols as specified in the ARM ELF
|
|
|
|
|
specification has been added to the arm assembler.
|
2003-11-14 09:21:02 +01:00
|
|
|
|
|
* config/tc-arm.texi (struct reg_entry): Add new field 'builtin'.
(rn_table, iwmmxt_table, cp_table, cn_table, fn_table, sn_table,
dn_table, mav_mvf_table, mac_mvd_table, mav_mvfx_table,
mav_mvax_table, mav_dspc_table): Initialise new field.
(insert_reg_alias): Initialise new field.
(md_pseudo_table): Add "unreq" entry.
(s_unreq): New function: Undo the effects of a previous .req.
* doc/c-arm.texi: Document new pseudo op.
* NEWS: Mention new feature.
* testsuite/gas/arm/req.s: New test file. Check .req and .unreq psuedo ops.
* testsuite/gas/arm/req.l: Expected error output from req.s test.
* testsuite/gas/arm/copro.d: Set target architecture for objdump so that the
test will work on architectures which cannot encode higher arm architecture
types in their file headers.
* testsuite/gas/arm/arm.exp: Run new req.s test.
Skip thumb instruction test for PE targets which do not support
thumb relocations.
* testsuite/gas/elf/elf.exp: Skip special handling of section2 test for XScale
targets - it is no longer needed.
2003-11-06 16:30:05 +01:00
|
|
|
|
* On ARM architectures, added a new gas directive ".unreq" that undoes
|
|
|
|
|
definitions created by ".req".
|
|
|
|
|
|
2003-10-21 15:28:59 +02:00
|
|
|
|
* Support for Motorola ColdFire MCF528x added.
|
|
|
|
|
|
2003-10-08 16:37:20 +02:00
|
|
|
|
* Added --gstabs+ switch to enable the generation of STABS debug format
|
|
|
|
|
information with GNU extensions.
|
2012-03-13 17:59:57 +01:00
|
|
|
|
|
2003-09-30 18:47:02 +02:00
|
|
|
|
* Added support for MIPS64 Release 2.
|
|
|
|
|
|
2003-09-04 13:04:38 +02:00
|
|
|
|
* Added support for v850e1.
|
|
|
|
|
|
2003-06-10 08:46:34 +02:00
|
|
|
|
* Added -n switch for x86 assembler. By default, x86 GAS replaces
|
|
|
|
|
multiple nop instructions used for alignment within code sections
|
|
|
|
|
with multi-byte nop instructions such as leal 0(%esi,1),%esi. This
|
|
|
|
|
switch disables the optimization.
|
|
|
|
|
|
2004-01-09 03:34:04 +01:00
|
|
|
|
* Removed -n option from MIPS assembler. It was not useful, and confused the
|
|
|
|
|
existing -non_shared option.
|
|
|
|
|
|
2003-09-30 18:44:04 +02:00
|
|
|
|
Changes in 2.14:
|
|
|
|
|
|
2003-04-26 03:35:58 +02:00
|
|
|
|
* Added support for MIPS32 Release 2.
|
|
|
|
|
|
2003-04-03 09:37:41 +02:00
|
|
|
|
* Added support for Xtensa architecture.
|
|
|
|
|
|
2003-03-25 21:56:01 +01:00
|
|
|
|
* Support for Intel's iWMMXt processor (an ARM variant) added.
|
|
|
|
|
|
2003-02-21 20:05:02 +01:00
|
|
|
|
* An assembler test generator has been contributed and an example file that
|
|
|
|
|
uses it (gas/testsuite/gas/all/test-gen.c and test-exmaple.c).
|
2012-03-13 17:59:57 +01:00
|
|
|
|
|
2003-01-23 19:50:57 +01:00
|
|
|
|
* Support for SH2E added.
|
|
|
|
|
|
2002-12-02 16:42:15 +01:00
|
|
|
|
* GASP has now been removed.
|
|
|
|
|
|
2002-09-11 16:42:45 +02:00
|
|
|
|
* Support for Texas Instruments TMS320C4x and TMS320C3x series of
|
|
|
|
|
DSP's contributed by Michael Hayes and Svein E. Seldal.
|
2012-03-13 17:59:57 +01:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Support for the Ubicom IP2xxx microcontroller added.
|
|
|
|
|
|
2002-07-16 09:58:34 +02:00
|
|
|
|
Changes in 2.13:
|
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Support for the Fujitsu FRV architecture added by Red Hat. Models for FR400
|
|
|
|
|
and FR500 included.
|
2002-06-18 23:15:21 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Support for DLX processor added.
|
2002-05-28 16:20:42 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* GASP has now been deprecated and will be removed in a future release. Use
|
|
|
|
|
the macro facilities in GAS instead.
|
2002-02-21 17:51:00 +01:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* GASP now correctly parses floating point numbers. Unless the base is
|
|
|
|
|
explicitly specified, they are interpreted as decimal numbers regardless of
|
|
|
|
|
the currently specified base.
|
2002-02-13 09:59:26 +01:00
|
|
|
|
|
2002-02-20 11:46:54 +01:00
|
|
|
|
Changes in 2.12:
|
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Support for Don Knuth's MMIX, by Hans-Peter Nilsson.
|
2002-02-15 05:04:03 +01:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Support for the OpenRISC 32-bit embedded processor by OpenCores.
|
2002-01-31 18:33:08 +01:00
|
|
|
|
|
2012-03-13 17:59:57 +01:00
|
|
|
|
* The ARM assembler now accepts -march=..., -mcpu=... and -mfpu=... for
|
|
|
|
|
specifying the target instruction set. The old method of specifying the
|
2002-07-19 09:52:40 +02:00
|
|
|
|
target processor has been deprecated, but is still accepted for
|
|
|
|
|
compatibility.
|
* NEWS: Mention new ARM command-line options and VFP support.
* config/tc-arm.c (ARM_CEXT_XSCALE): Replaces ARM_EXT_XSCALE. All
uses changed.
(ARM_CEXT_MAVERICK): Similarly.
(ARM_ANY): Now means any core instruction.
(CPU_DEFAULT): Default to ARM_ANY.
(uses_apcs_26, atcps, support_interwork, uses_apcs_float)
(pic_code): Declare for all object types. Make type int.
(legacy_cpu, legacy_fpu, mcpu_cpu_opt, mcpu_fpu_opt, march_cpu_opt)
(march_fpu_opt, mfpu_opt): Declare.
(md_longopts): Tidy up conditional definitions.
(arm_opts, arm_cpus, arm_archs, arm_fpus, arm_extensions)
(arm_long_opts): New tables.
(arm_parse_cpu, arm_parse_arch, arm_parse_fpu): New functions.
(arm_parse_extension): New function.
(md_parse_option): Rewrite using new table-driven system.
(md_show_usage): Use new table-driven system.
(md_begin): Calculate cpu_variant from command line option data.
* doc/as.texinfo (ARM ISA options): Docuement new ARM-specific
command-line options.
* doc/c-arm.texi: Likewise.
Testsuite:
* gas/arm/vfp1.d: Use new command-line options.
* gas/arm/vfp1xD.d: Likewise.
* gas/arm/arm.exp (vfp-bad): Likewise.
* gas/arm/maverick.d: Likewise.
2002-01-18 18:01:55 +01:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Support for the VFP floating-point instruction set has been added to
|
|
|
|
|
the ARM assembler.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* New psuedo op: .incbin to include a set of binary data at a given point
|
|
|
|
|
in the assembly. Contributed by Anders Norlander.
|
2001-07-09 10:19:18 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* The MIPS assembler now accepts -march/-mtune. -mcpu has been deprecated
|
|
|
|
|
but still works for compatability.
|
2001-06-29 23:27:43 +02:00
|
|
|
|
|
2012-03-13 17:59:57 +01:00
|
|
|
|
* The MIPS assembler no longer issues a warning by default when it
|
2002-07-19 09:52:40 +02:00
|
|
|
|
generates a nop instruction from a macro. The new command line option
|
|
|
|
|
-n will turn on the warning.
|
2001-06-11 22:40:36 +02:00
|
|
|
|
|
2000-04-25 22:54:41 +02:00
|
|
|
|
Changes in 2.11:
|
|
|
|
|
|
2002-07-31 11:59:03 +02:00
|
|
|
|
* Support for PDP-11 and 2.11BSD a.out format, by Lars Brinkhoff.
|
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* x86 gas now supports the full Pentium4 instruction set.
|
2001-01-04 22:27:56 +01:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Support for AMD x86-64 architecture, by Jan Hubicka, SuSE Labs.
|
2000-12-30 19:05:10 +01:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Support for Motorola 68HC11 and 68HC12.
|
2000-08-08 23:40:33 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Support for Texas Instruments TMS320C54x (tic54x).
|
2000-06-20 15:52:32 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Support for IA-64.
|
2000-04-25 22:54:41 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Support for i860, by Jason Eckhardt.
|
2000-08-14 20:50:13 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Support for CRIS (Axis Communications ETRAX series).
|
2000-08-24 19:42:52 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* x86 gas has a new .arch pseudo op to specify the target CPU architecture.
|
2000-05-13 14:49:55 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* x86 gas -q command line option quietens warnings about register size changes
|
|
|
|
|
due to suffix, indirect jmp/call without `*', stand-alone prefixes, and
|
|
|
|
|
translating various deprecated floating point instructions.
|
2000-05-13 14:49:55 +02:00
|
|
|
|
|
1999-05-03 09:29:11 +02:00
|
|
|
|
Changes in 2.10:
|
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Support for the ARM msr instruction was changed to only allow an immediate
|
|
|
|
|
operand when altering the flags field.
|
2000-09-08 23:05:06 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Support for ATMEL AVR.
|
2000-03-27 10:39:14 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Support for IBM 370 ELF. Somewhat experimental.
|
2000-02-24 02:40:42 +01:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Support for numbers with suffixes.
|
2000-02-08 15:13:57 +01:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Added support for breaking to the end of repeat loops.
|
2000-02-23 17:01:21 +01:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Added support for parallel instruction syntax (DOUBLEBAR_PARALLEL).
|
2000-02-23 17:01:21 +01:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* New .elseif pseudo-op added.
|
2000-02-08 15:13:57 +01:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* New --fatal-warnings option.
|
1999-10-11 06:10:04 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* picoJava architecture support added.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Motorola MCore 210 processor support added.
|
1999-09-04 19:29:22 +02:00
|
|
|
|
|
2012-03-13 17:59:57 +01:00
|
|
|
|
* A new pseudo-op .intel_syntax has been implemented to allow gas to parse i386
|
2002-07-19 09:52:40 +02:00
|
|
|
|
assembly programs with intel syntax.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* New pseudo-ops .func,.endfunc to aid in debugging user-written assembler code.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Added -gdwarf2 option to generate DWARF 2 debugging information.
|
1999-09-04 19:29:22 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Full 16-bit mode support for i386.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2012-03-13 17:59:57 +01:00
|
|
|
|
* Greatly improved instruction operand checking for i386. This change will
|
2002-07-19 09:52:40 +02:00
|
|
|
|
produce errors or warnings on incorrect assembly code that previous versions
|
|
|
|
|
of gas accepted. If you get unexpected messages from code that worked with
|
|
|
|
|
older versions of gas, please double check the code before reporting a bug.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Weak symbol support added for COFF targets.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Mitsubishi D30V support added.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Texas Instruments c80 (tms320c80) support added.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* i960 ELF support added.
|
1999-05-27 23:57:48 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* ARM ELF support added.
|
2000-05-29 20:18:42 +02:00
|
|
|
|
|
1999-05-03 09:29:11 +02:00
|
|
|
|
Changes in 2.9:
|
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Texas Instruments c30 (tms320c30) support added.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2012-03-13 17:59:57 +01:00
|
|
|
|
* The assembler now optimizes the exception frame information generated by egcs
|
2002-07-19 09:52:40 +02:00
|
|
|
|
and gcc 2.8. The new --traditional-format option disables this optimization.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Added --gstabs option to generate stabs debugging information.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2012-03-13 17:59:57 +01:00
|
|
|
|
* The -a option takes a new suboption, m (e.g., -alm) to expand macros in a
|
2002-07-19 09:52:40 +02:00
|
|
|
|
listing.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Added -MD option to print dependencies.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
|
|
|
|
Changes in 2.8:
|
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* BeOS support added.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* MIPS16 support added.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Motorola ColdFire 5200 support added (configure for m68k and use -m5200).
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Alpha/VMS support added.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* m68k options --base-size-default-16, --base-size-default-32,
|
|
|
|
|
--disp-size-default-16, and --disp-size-default-32 added.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* The alignment directives now take an optional third argument, which is the
|
|
|
|
|
maximum number of bytes to skip. If doing the alignment would require
|
|
|
|
|
skipping more than the given number of bytes, the alignment is not done at
|
|
|
|
|
all.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* The ELF assembler has a new pseudo-op, .symver, used for symbol versioning.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* The -a option takes a new suboption, c (e.g., -alc), to skip false
|
|
|
|
|
conditionals in listings.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Added new pseudo-op, .equiv; it's like .equ, except that it is an error if
|
|
|
|
|
the symbol is already defined.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
|
|
|
|
Changes in 2.7:
|
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* The PowerPC assembler now allows the use of symbolic register names (r0,
|
|
|
|
|
etc.) if -mregnames is used. Symbolic names preceded by a '%' (%r0, etc.)
|
|
|
|
|
can be used any time. PowerPC 860 move to/from SPR instructions have been
|
|
|
|
|
added.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Alpha Linux (ELF) support added.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* PowerPC ELF support added.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* m68k Linux (ELF) support added.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* i960 Hx/Jx support added.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* i386/PowerPC gnu-win32 support added.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* SCO ELF support added. For OpenServer 5 targets (i386-unknown-sco3.2v5) the
|
|
|
|
|
default is to build COFF-only support. To get a set of tools that generate
|
2012-03-13 17:59:57 +01:00
|
|
|
|
ELF (they'll understand both COFF and ELF), you must configure with
|
2002-07-19 09:52:40 +02:00
|
|
|
|
target=i386-unknown-sco3.2v5elf.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* m88k-motorola-sysv3* support added.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
|
|
|
|
Changes in 2.6:
|
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Gas now directly supports macros, without requiring GASP.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Gas now has an MRI assembler compatibility mode. Use -M or --mri to select
|
|
|
|
|
MRI mode. The pseudo-op ``.mri 1'' will switch into the MRI mode until the
|
|
|
|
|
``.mri 0'' is seen; this can be convenient for inline assembler code.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Added --defsym SYM=VALUE option.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Added -mips4 support to MIPS assembler.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Added PIC support to Solaris and SPARC SunOS 4 assembler.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
|
|
|
|
Changes in 2.4:
|
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Converted this directory to use an autoconf-generated configure script.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* ARM support, from Richard Earnshaw.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Updated VMS support, from Pat Rankin, including considerably improved
|
|
|
|
|
debugging support.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Support for the control registers in the 68060.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Handles (ignores) a new directive ".this_GCC_requires_the_GNU_assembler", to
|
2012-03-13 17:59:57 +01:00
|
|
|
|
provide for possible future gcc changes, for targets where gas provides some
|
|
|
|
|
features not available in the native assembler. If the native assembler is
|
2002-07-19 09:52:40 +02:00
|
|
|
|
used, it should become obvious pretty quickly what the problem is.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Usage message is available with "--help".
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2012-03-13 17:59:57 +01:00
|
|
|
|
* The GNU Assembler Preprocessor (gasp) is included. (Actually, it was in 2.3
|
2002-07-19 09:52:40 +02:00
|
|
|
|
also, but didn't get into the NEWS file.)
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Weak symbol support for a.out.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2012-03-13 17:59:57 +01:00
|
|
|
|
* A bug in the listing code which could cause an infinite loop has been fixed.
|
2002-07-19 09:52:40 +02:00
|
|
|
|
Bugs in listings when generating a COFF object file have also been fixed.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Initial i386-svr4 PIC implementation from Eric Youngdale, based on code by
|
|
|
|
|
Paul Kranenburg.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Improved Alpha support. Immediate constants can have a much larger range
|
|
|
|
|
now. Support for the 21164 has been contributed by Digital.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Updated ns32k (pc532-mach, netbsd532) support from Ian Dall.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
|
|
|
|
Changes in 2.3:
|
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Mach i386 support, by David Mackenzie and Ken Raeburn.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* RS/6000 and PowerPC support by Ian Taylor.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* VMS command scripts (make-gas.com, config-gas.com) have been worked on a bit,
|
|
|
|
|
based on mail received from various people. The `-h#' option should work
|
|
|
|
|
again too.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* HP-PA work, by Jeff Law. Note, for the PA, gas-2.3 has been designed to work
|
2012-03-13 17:59:57 +01:00
|
|
|
|
with gdb-4.12 and gcc-2.6. As gcc-2.6 has not been released yet, a special
|
2002-07-19 09:52:40 +02:00
|
|
|
|
version of gcc-2.5.8 has been patched to work with gas-2.3. You can retrieve
|
|
|
|
|
this special version of gcc-2.5.8 via anonymous ftp from jaguar.cs.utah.edu
|
|
|
|
|
in the "dist" directory.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Vax support in gas fixed for BSD, so it builds and seems to run a couple
|
|
|
|
|
simple tests okay. I haven't put it through extensive testing. (GNU make is
|
|
|
|
|
currently required for BSD 4.3 builds.)
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2012-03-13 17:59:57 +01:00
|
|
|
|
* Support for the DEC Alpha, running OSF/1 (ECOFF format). The gas support is
|
2002-07-19 09:52:40 +02:00
|
|
|
|
based on code donated by CMU, which used an a.out-based format. I'm afraid
|
|
|
|
|
the alpha-a.out support is pretty badly mangled, and much of it removed;
|
|
|
|
|
making it work will require rewriting it as BFD support for the format anyways.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Irix 5 support.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2012-03-13 17:59:57 +01:00
|
|
|
|
* The test suites have been fixed up a bit, so that they should work with a
|
2002-07-19 09:52:40 +02:00
|
|
|
|
couple different versions of expect and dejagnu.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2012-03-13 17:59:57 +01:00
|
|
|
|
* Symbols' values are now handled internally as expressions, permitting more
|
|
|
|
|
flexibility in evaluating them in some cases. Some details of relocation
|
2002-07-19 09:52:40 +02:00
|
|
|
|
handling have also changed, and simple constant pool management has been
|
|
|
|
|
added, to make the Alpha port easier.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* New option "--statistics" for printing out program run times. This is
|
|
|
|
|
intended to be used with the gcc "-Q" option, which prints out times spent in
|
|
|
|
|
various phases of compilation. (You should be able to get all of them
|
|
|
|
|
printed out with "gcc -Q -Wa,--statistics", I think.)
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
|
|
|
|
Changes in 2.2:
|
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* RS/6000 AIX and MIPS SGI Irix 5 support has been added.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2012-03-13 17:59:57 +01:00
|
|
|
|
* Configurations that are still in development (and therefore are convenient to
|
|
|
|
|
have listed in configure.in) still get rejected without a minor change to
|
2002-07-19 09:52:40 +02:00
|
|
|
|
gas/Makefile.in, so people not doing development work shouldn't get the
|
|
|
|
|
impression that support for such configurations is actually believed to be
|
|
|
|
|
reliable.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2012-03-13 17:59:57 +01:00
|
|
|
|
* The program name (usually "as") is printed when a fatal error message is
|
2002-07-19 09:52:40 +02:00
|
|
|
|
displayed. This should prevent some confusion about the source of occasional
|
|
|
|
|
messages about "internal errors".
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2012-03-13 17:59:57 +01:00
|
|
|
|
* ELF support is falling into place. Support for the 386 should be working.
|
2002-07-19 09:52:40 +02:00
|
|
|
|
Support for SPARC Solaris is in. HPPA support from Utah is being integrated.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Symbol values are maintained as expressions instead of being immediately
|
|
|
|
|
boiled down to add-symbol, sub-symbol, and constant. This permits slightly
|
|
|
|
|
more complex calculations involving symbols whose values are not alreadey
|
|
|
|
|
known.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* DBX-style debugging info ("stabs") is now supported for COFF formats.
|
2012-03-13 17:59:57 +01:00
|
|
|
|
If any stabs directives are seen in the source, GAS will create two new
|
|
|
|
|
sections: a ".stab" and a ".stabstr" section. The format of the .stab
|
2002-07-19 09:52:40 +02:00
|
|
|
|
section is nearly identical to the a.out symbol format, and .stabstr is
|
|
|
|
|
its string table. For this to be useful, you must have configured GCC
|
|
|
|
|
to generate stabs (by defining DBX_DEBUGGING_INFO), and must have a GDB
|
|
|
|
|
that can use the stab sections (4.11 or later).
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2012-03-13 17:59:57 +01:00
|
|
|
|
* LynxOS, on i386 and m68k platforms, is now supported. SPARC LynxOS
|
2002-07-19 09:52:40 +02:00
|
|
|
|
support is in progress.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
|
|
|
|
Changes in 2.1:
|
|
|
|
|
|
2012-03-13 17:59:57 +01:00
|
|
|
|
* Several small fixes for i386-aix (PS/2) support from Minh Tran-Le have been
|
2002-07-19 09:52:40 +02:00
|
|
|
|
incorporated, but not well tested yet.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2012-03-13 17:59:57 +01:00
|
|
|
|
* Altered the opcode table split for m68k; it should require less VM to compile
|
2002-07-19 09:52:40 +02:00
|
|
|
|
with gcc now.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Some minor adjustments to add (Convergent Technologies') Miniframe support,
|
|
|
|
|
suggested by Ronald Cole.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* HPPA support (running OSF only, not HPUX) has been contributed by Utah. This
|
|
|
|
|
includes improved ELF support, which I've started adapting for SPARC Solaris
|
|
|
|
|
2.x. Integration isn't completely, so it probably won't work.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* HP9000/300 support, donated by HP, has been merged in.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Ian Taylor has finished the MIPS ECOFF (Ultrix, Irix) support.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Better error messages for unsupported configurations (e.g., hppa-hpux).
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Test suite framework is starting to become reasonable.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
|
|
|
|
Changes in 2.0:
|
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Mostly bug fixes.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Some more merging of BFD and ELF code, but ELF still doesn't work.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
|
|
|
|
Changes in 1.94:
|
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* BFD merge is partly done. Adventurous souls may try giving configure the
|
|
|
|
|
"--with-bfd-assembler" option. Currently, ELF format requires it, a.out
|
|
|
|
|
format accepts it; SPARC CPU accepts it. It's the default only for OS "elf"
|
|
|
|
|
or "solaris". (ELF isn't really supported yet. It needs work. I've got
|
|
|
|
|
some code from Utah for HP-PA ELF, and from DG for m88k ELF, but they're not
|
|
|
|
|
fully merged yet.)
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* The 68K opcode table has been split in half. It should now compile under gcc
|
|
|
|
|
without consuming ridiculous amounts of memory.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* A couple data structures have been reduced in size. This should result in
|
|
|
|
|
saving a little bit of space at runtime.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Support for MIPS, from OSF and Ralph Campbell, has been merged in. The OSF
|
|
|
|
|
code provided ROSE format support, which I haven't merged in yet. (I can
|
|
|
|
|
make it available, if anyone wants to try it out.) Ralph's code, for BSD
|
|
|
|
|
4.4, supports a.out format. We don't have ECOFF support in just yet; it's
|
|
|
|
|
coming.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Support for the Hitachi H8/500 has been added.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* VMS host and target support should be working now, thanks chiefly to Eric
|
|
|
|
|
Youngdale.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
|
|
|
|
Changes in 1.93.01:
|
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* For m68k, support for more processors has been added: 68040, CPU32, 68851.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* For i386, .align is now power-of-two; was number-of-bytes.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* For m68k, "%" is now accepted before register names. For COFF format, which
|
|
|
|
|
doesn't use underscore prefixes for C labels, it is required, so variable "a0"
|
|
|
|
|
can be distinguished from the register.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
2002-07-19 09:52:40 +02:00
|
|
|
|
* Last public release was 1.38. Lots of configuration changes since then, lots
|
|
|
|
|
of new CPUs and formats, lots of bugs fixed.
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
|
|
|
|
|
2012-12-17 17:56:12 +01:00
|
|
|
|
Copyright (C) 2012 Free Software Foundation, Inc.
|
|
|
|
|
|
|
|
|
|
Copying and distribution of this file, with or without modification,
|
|
|
|
|
are permitted in any medium without royalty provided the copyright
|
|
|
|
|
notice and this notice are preserved.
|
|
|
|
|
|
1999-05-03 09:29:11 +02:00
|
|
|
|
Local variables:
|
|
|
|
|
fill-column: 79
|
|
|
|
|
End:
|