PC-relative relocs typically use the addend in adjusting what they are
relative to. For example:
bcl 20,31,1f
1: mflr 12
addi 12,12,xxx-1b
generates "R_PPC64_REL16 xxx+0x4" for the addi (when little-endian).
The addend reflects the fact that you want the offset relative to the
previous insn not the current one in this case.
So the question is, will we ever want to do something like that for an
instruction using R_PPC64_GOT_PCREL34? I thought so at the time I
first implemented support in ld but at the time I think the hardware
was possibly going to support pcrel+offset+reg addressing. In which
case you might want something like:
load_big_offset_into_r2
pld 3,sym-big_offset@got@pcrel(2)
which would be a way of supporting more than 8G offsets from code to
the GOT. We could do the same with
load_big_offset_into_r2
pla 9,sym-big_offset@got@pcrel
ldx 3,9,2
However, this is really a poor version of TOC-pointer relative code.
So let's go with an addend on R_PPC64_GOT_PCREL34 meaning that
sym+addend should be put in a GOT entry, and the relocation calculate
the pc-relative offset to that GOT entry.
Note that this is an extension to the ABI, which says (by the
expression given for GOT relocs) that non-zero addends on GOT and PLT
relocs are ignored. This is true for all GOT/PLT relocs, not just the
pcrel ones.
* elf64-ppc.c (ppc64_elf_check_relocs): Interpret an addend in
GOT_PCREL and PLT_PCREL relocs as affecting the value stored
in the GOT/PLT entry rather than affecting the offset to that
GOI/PLT entry.
(ppc64_elf_edit_toc, ppc64_elf_relocate_section): Likewise.
The loads and stores handled in the second instruction of a sequence
marked by R_PPC64_PCREL_OPT may be a prefix instruction. For example:
pld ra,symbol@got@pcrel
0:
pld rt,off(ra)
.reloc 0b-8,R_PPC64_PCREL_OPT,(.-8)-(0b-8)
can be optimised to
pld rt,symbol+off@pcrel
pnop
* elf64-ppc.c (xlate_pcrel_opt): Handle prefix loads and stores
in second instruction.
(ppc64_elf_relocate_section): Likewise.
This patch fixes the worst of the cases where libbfd might terminate
a program due to calling xstrdup or xmalloc. I've also fixed some
error paths that didn't clean up properly.
PR 24955
* libbfd-in.h (bfd_strdup): New inline function.
* archive.c (_bfd_get_elt_at_filepos): Use bfd_strdup. Close
bfd on error.
* elfcode.h (_bfd_elf_bfd_from_remote_memory): Use bfd_strdup.
* opncls.c (bfd_fopen): Use bfd_strdup. Close fd and stream
on error.
(bfd_openstreamr): Use bfd_strdup.
(bfd_openr_iovec, bfd_openw, bfd_create): Likewise.
* plugin.c (try_load_plugin): Use bfd_malloc.
* libbfd.h: Regenerate.
This fixes a small leak of debug_filename. bfd_openr copies the file
name since git commit 1be5090bca.
PR 11983
* dwarf2.c (_bfd_dwarf2_slurp_debug_info): Free debug_filename
on success. Tidy.
The linker doesn't allocate memory space for sections that are only SEC_ALLOC
and SEC_THREAD_LOCAL. See the IS_TBSS test in ld/ldlang.c. So we need to
pretend that .tdata.dyn sections have contents to get the right result. It
will be marked this way anyways if there is a .tdata section to merge with.
bfd/
PR 23825
* elfnn-riscv.c (riscv_elf_create_dynamic_sections): Add SEC_LOAD,
SEC_DATA, and SEC_HAS_CONTENTS to .tdata.dyn section.
This was noticed while trying to test the compiler -msave-restore support.
Putting non-pic code in a shared library gives a linker error, but doesn't
stop the build.
rohan:2030$ cat libtmp.c
extern int sub2 (int);
int sub (int i) { return sub2 (i + 10); }
rohan:2031$ cat libtmp2.c
extern int sub (int);
int sub2 (int i) { return sub (i + 10); }
rohan:2032$ riscv64-unknown-linux-gnu-gcc --shared -o libtmp.so libtmp.c
rohan:2033$ riscv64-unknown-linux-gnu-gcc --shared -o libtmp2.so libtmp2.c libtmp.so
/home/jimw/FOSS/install-riscv64/lib/gcc/riscv64-unknown-linux-gnu/8.3.0/../../../../riscv64-unknown-linux-gnu/bin/ld: /tmp/cctrsIBe.o(.text+0x18): unresolvable R_RISCV_CALL relocation against symbol `sub'
rohan:2034$ echo $?
0
rohan:2035$ ls -lt libtmp2.so
-rwxr-xr-x 1 jimw jimw 6912 Aug 30 14:32 libtmp2.so
rohan:2036$
The patch fixes this by forcing a linker error. I now get this.
ohan:2059$ sh tmp.script
/home/jimw/FOSS/BINUTILS/X-riscv64-linux/ld/ld-new: libtmp2.o(.text+0x18): unresolvable R_RISCV_CALL relocation against symbol `sub'
/home/jimw/FOSS/BINUTILS/X-riscv64-linux/ld/ld-new: final link failed: bad value
rohan:2060$ echo $?
1
rohan:2061$ ls -lt libtmp2.so
ls: cannot access 'libtmp2.so': No such file or directory
bfd/
* elfnn-riscv.c (riscv_elf_relocate_section): For unresolvable reloc
error, call bfd_set_error, set ret to FALSE, and goto out label.
We need to copy BFD_COMPRESS, BFD_DECOMPRESS and BFD_COMPRESS_GABI flags
for thin archive.
PR ld/24951
* archive.c (_bfd_get_elt_at_filepos): Copy BFD_COMPRESS,
BFD_DECOMPRESS and BFD_COMPRESS_GABI flags for thin archive.
This removes a restriction on various R_PPC_EMB relocations that has
been present for ppc32 since 1996-04-26 git commit e25a798839. As far
as I know, only those relocs that would require addressing via r2 for
.sdata2/.sbss2 access are disallowed in shared libraries.
PR 24697
* elf32-ppc.c (ppc_elf_check_relocs): Call bad_shared_reloc
when !bfd_link_executable for R_PPC_EMB_SDA2I16 and
R_PPC_EMB_SDA2REL. Don't call bad_shared_reloc for any other
reloc.
We can easily support an offset on the second instruction of a
sequence marked with R_PPC64_PCREL_OPT. For example,
pla ra,symbol@pcrel
ld rt,off(ra)
can be optimised to
pld rt,symbol+off@pcrel
nop
* elf64-ppc.c (xlate_pcrel_opt): Add poff parameter. Allow offset
on second insn, return it in poff.
(ppc64_elf_relocate_section): Add offset to paddi addend for
PCREL_OPT.
This was broken when I changed how we compute the value for the gp register.
It used to be computed inside the sdata section. Now it is computed at the
end which makes it an abs section symbol. There is code that tries to use
the alignment of the section that the gp value is in, but this does not work
if it is in the abs section, as the abs section has alignment of 1 byte.
There are people using alternative linker scripts that still define it in the
sdata section, so the code is still useful. Thus adding a check to disable
this when gp is in the abs section.
bfd/
* elfnn-riscv.c (_bfd_riscv_relax_lui): Add check to exclude abs
section when setting max_alignment. Update comment.
(_bfd_riscv_relax_pc): Likewise.
BFD was leaking memory in bfd_check_format_matches. As part of
deciding the proper format of an archive, BFD looks at the format of
the first file stored. That file's bfd was left open for reasons
given in a comment removed in git commit 0e71e4955c that said:
/* We ought to close `first' here, but we can't, because
we have no way to remove it from the archive cache.
It's close to impossible to figure out when we can
release bfd_ardata. FIXME. */
Well, things have changed since that comment was true and we now can
remove files from the archive cache. Closing the first file is good
and cures some of the leaks. Other leaks are caused by
bfd_check_format_matches throwing away bfd tdata before trying a new
match. That lost the element cache set up when format checking the
first element in the archive. The easiest and cleanest fix is to
simply disable the caching when checking the first element.
PR 24891
* bfd.c (struct bfd): Add no_element_cache.
* archive.c (_bfd_get_elt_at_filepos): Don't add element to
archive cache when no_element_cache.
(bfd_generic_archive_p): Set no_element_cache when opening first
element to check format. Close first element too.
(do_slurp_bsd_armap): Don't zero ardata->cache here.
* bfd-in2.h: Regenerate.
Found on a GOT reference to __ehdr_start, which is tweaked to be
undefined weak at some stages of linking. SYMBOL_REFERENCES_LOCAL
isn't a sufficient test.
* elf64-ppc.c (ppc64_elf_edit_toc): Exclude undefined weak
symbols from GOT optimisation.
The PLT GOT entry should point to the first PLT entry which contains the
runtime linker function. It was pointing back to the symbol PLT entry
causing an infinite loop.
I found this when testing the OpenRISC glibc port which uses the runtime
dynamic linker. It seems other libc's we use so far have not been
making use of the initial PLT GOT entries.
bfd/ChangeLog:
* elf32-or1k.c (or1k_elf_finish_dynamic_symbol): Use correct value for
PLT GOT entries.
PR 24456
* elf.c (bfd_section_from_shdr): Issue an informative warning
message and continue processing other sections after encountering
a reloc section for a section which already has other relocs
associated with it.
This patch adds support for following CPUs:
Cortex-M35P, Cortex-A77, Cortex-A76AE.
Related specifications can be found at https://developer.arm.com/ip-products/processors.
gas/ChangeLog:
* config/tc-arm.c: New entries for Cortex-M35P, Cortex-A77,
and Cortex-A76AE.
* doc/c-arm.texi: Document new processors.
* testsuite/gas/arm/cpu-cortex-a76ae.d: New test.
* testsuite/gas/arm/cpu-cortex-a77.d: New test.
* testsuite/gas/arm/cpu-cortex-m35p.d: New test.
bfd/ChangeLog:
* cpu-arm.c: New entries for Cortex-M35P, Cortex-A77, Cortex-A76AE.
This patch fixes a few linker crashes due to TLS code reaching an assert when it
shouldn't.
The first scenario is with weak TLS symbols that remain weak during linking. In
this case the mid-end would not have seen a TLS symbol and so wouldn't have
allocated the TLS section. We currently assert here and the linker crashes with
a not very useful message.
This patch changes this to return the value 0 for the TLS symbol in question
emulating what lld and gold and other BFD targets do. However because weak TLS
is implementation defined and we don't define any behavior for it I also emit a
warning to the user to inform them of such.
Secondly when a strong TLS reference is undefined. The linker crashes even after
it correctly reported that there is an undefined reference. This changes it so
that it gracefully exits and reports a useful error.
bfd/ChangeLog:
PR ld/24601
* elfnn-aarch64.c (aarch64_relocate): Handle weak TLS and undefined TLS.
Also Pass input_bfd to _bfd_aarch64_elf_resolve_relocation.
* elfxx-aarch64.c (_bfd_aarch64_elf_resolve_relocation): Use it.
* elfxx-aarch64.h (_bfd_aarch64_elf_resolve_relocation): Emit warning
for weak TLS.
ld/ChangeLog:
PR ld/24601
* testsuite/ld-aarch64/aarch64-elf.exp (undef-tls, weak-tls): New.
* testsuite/ld-aarch64/undef-tls.d: New test.
* testsuite/ld-aarch64/undef-tls.s: New test.
* testsuite/ld-aarch64/weak-tls.d: New test.
* testsuite/ld-aarch64/weak-tls.s: New test.
This patch removes use of st_target_internal to cache the result of
comparing symbol names against CMSE_PREFIX. The problem with setting
a bit in st_target_internal in swap_symbol_in is that calling
bfd_elf_sym_name from swap_symbol_in requires symtab_hdr, and you
don't know for sure whether swap_symbol_in is operating on dynsyms
(and thus elf_tdata (abfd)->dynsymtab_hdr should be used) or on the
normal symtab (thus elf_tdata (abfd)->symtab_hdr). You can make an
educated guess based on abfd->flags & DYNAMIC but that relies on
knowing a lot about calls to bfd_elf_get_elf_syms, and is fragile in
the face of possible future changes.
include/
* elf/arm.h (ARM_GET_SYM_CMSE_SPCL, ARM_SET_SYM_CMSE_SPCL): Delete.
bfd/
* elf32-arm.c (cmse_scan): Don't use ARM_GET_SYM_CMSE_SPCL,
instead recognize CMSE_PREFIX in symbol name.
(elf32_arm_gc_mark_extra_sections): Likewise.
(elf32_arm_filter_cmse_symbols): Don't test ARM_GET_SYM_CMSE_SPCL.
(elf32_arm_swap_symbol_in): Don't invoke ARM_SET_SYM_CMSE_SPCL.
Related specifications can be found at
https://developer.arm.com/ip-products/processors.
gas * NEWS: Mention the Arm and AArch64 new processors.
* config/tc-aarch64.c: New entries for Cortex-A34, Cortex-A65,
Cortex-A77, cortex-A65AE, and Cortex-A76AE.
* doc/c-aarch64.texi: Document new CPUs.
* testsuite/gas/aarch64/cpu-cortex-a34.d: New test.
* testsuite/gas/aarch64/cpu-cortex-a65.d: New test.
* testsuite/gas/aarch64/cpu-cortex-a65ae.d: New test.
* testsuite/gas/aarch64/cpu-cortex-a76ae.d: New test.
* testsuite/gas/aarch64/cpu-cortex-a77.d: New test.
* testsuite/gas/aarch64/nop-asm.s: New test.
bfd * cpu-aarch64.c: New entries for Cortex-A34, Cortex-A65,
Cortex-A77, cortex-A65AE, and Cortex-A76AE.
We currently use a padding NOP after a Thumb to Arm interworking veneer (BX pc).
The NOP is never executed but may result in a performance penalty on some cores.
For this reason this patch changes the NOPs after Thumb to Arm veneers into B .-2
and adds a note to this in the source code for future reference.
bfd/ChangeLog:
* elf32-arm.c (elf32_thumb2_plt_entry, elf32_arm_plt_thumb_stub,
elf32_arm_stub_long_branch_v4t_thumb_thumb,
elf32_arm_stub_long_branch_v4t_thumb_arm,
elf32_arm_stub_short_branch_v4t_thumb_arm,
elf32_arm_stub_long_branch_v4t_thumb_arm_pic,
elf32_arm_stub_long_branch_v4t_thumb_thumb_pic,
elf32_arm_stub_long_branch_v4t_thumb_tls_pic): Change nop to branch to
previous instruction.
ld/ChangeLog:
* testsuite/ld-arm/cortex-a8-fix-b-plt.d: Update Testcase.
* testsuite/ld-arm/cortex-a8-fix-b-rel-arm.d: Likewise.
* testsuite/ld-arm/cortex-a8-fix-bcc-plt.d: Likewise.
* testsuite/ld-arm/farcall-cond-thumb-arm.d: Likewise.
* testsuite/ld-arm/farcall-mixed-app.d: Likewise.
* testsuite/ld-arm/farcall-mixed-app2.d: Likewise.
* testsuite/ld-arm/farcall-mixed-lib-v4t.d: Likewise.
* testsuite/ld-arm/farcall-thumb-arm-pic-veneer.d: Likewise.
* testsuite/ld-arm/farcall-thumb-arm-short.d: Likewise.
* testsuite/ld-arm/farcall-thumb-arm.d: Likewise.
* testsuite/ld-arm/farcall-thumb-thumb-pic-veneer.d: Likewise.
* testsuite/ld-arm/farcall-thumb-thumb.d: Likewise.
* testsuite/ld-arm/fix-arm1176-on.d: Likewise.
* testsuite/ld-arm/ifunc-10.dd: Likewise.
* testsuite/ld-arm/ifunc-2.dd: Likewise.
* testsuite/ld-arm/ifunc-4.dd: Likewise.
* testsuite/ld-arm/ifunc-6.dd: Likewise.
* testsuite/ld-arm/ifunc-8.dd: Likewise.
* testsuite/ld-arm/jump-reloc-veneers-long.d: Likewise.
* testsuite/ld-arm/mixed-app.d: Likewise.
* testsuite/ld-arm/thumb2-b-interwork.d: Likewise.
* testsuite/ld-arm/tls-longplt.d: Likewise.
* testsuite/ld-arm/tls-thumb1.d: Likewise.
A customer reported a case where addr2line was very slow. We tracked
this down to some N^2 behavior in _bfd_dwarf2_find_symbol_bias in the
unusual case where no function can be found.
This patch fixes the bug, and reduces the runtime for a particular
request from 127 seconds to 1 second.
bfd/ChangeLog
2019-08-19 Tom Tromey <tromey@adacore.com>
* dwarf2.c (_bfd_dwarf2_find_symbol_bias): Create hash table
holding symbols.
These are done in ppc64_elf_edit_toc, which now also garbage collects
unused GOT entries. The checks for legitimate instructions weren't
being done for the GOT relocs, unless the file also happened to have a
toc section.
* elf64-ppc.c (struct ppc64_elf_obj_tdata): Rename has_gotrel
to has_optrel.
(struct _ppc64_elf_section_data): Likewise.
(ppc64_elf_check_relocs): Set has_optrel for more relocs.
(ppc64_elf_edit_toc): Do ha/lo insn checks in GOT loop rather
than TOC loop. Check PLT16 insns too.
commit 83924b3846
Author: H.J. Lu <hjl.tools@gmail.com>
Date: Tue Feb 5 18:45:23 2019 -0800
x86-64: Restore PIC check for PCREL reloc against protected symbol
moved PIC check for PC-relative relocations to elf_x86_64_check_relocs.
Since linker defined symbols may not be processed at the time, we need
to move the check back to elf_x86_64_relocate_section.
bfd/
PR ld/24905
* elf64-x86-64.c (elf_x86_64_check_relocs): Move PIC check for
PC-relative relocations back to ...
(elf_x86_64_relocate_section): Here.
ld/
PR ld/24905
* testsuite/ld-x86-64/pr24905-x32.d: New file.
* testsuite/ld-x86-64/pr24905.d: Likewise.
* testsuite/ld-x86-64/pr24905.s: Likewise.
* testsuite/ld-x86-64/pr24905.t: Likewise.
* testsuite/ld-x86-64/x86-64.exp: Run pr24905 and pr24905-x32.
2019-08-16 Martin Liska <mliska@suse.cz>
PR ld/24912
* elflink.c: Report error only for not relocatable.
* linker.c (_bfd_generic_link_add_one_symbol): Do not handle
here lto_slim_object as it's handled in caller.
2019-08-16 Martin Liska <mliska@suse.cz>
PR ld/24912
* object.cc (big_endian>::do_layout): Do not report error,
but only set a flag.
(big_endian>::do_add_symbols): Report error only for when
relocatable.
Given R_PPC_ADDR32 or R_PPC_UADDR32 relocs, this patch generates
R_PPC_ADDR32 or R_PPC_UADDR32 dynamic relocs from either type
depending on whether r_offset is 4-byte aligned, and similarly for
R_PPC_ADDR16/R_PPC_UADDR16.
* elf32-ppc.c (ppc_elf_relocate_section): Optimize unaligned relocs.
This fixes a problem originally reported at
https://github.com/riscv/riscv-binutils-gdb/issues/173
If you have code linked at address zero, you can have a lui instruction
loading a value 0x800 which gets relaxed to a c.lui which is valid (c.lui 0x1
followed by addi -0x800). Relaxation can reduce the value below 0x800 at which
point the c.lui 0x0 is no longer valid. We can fix this by converting the
c.lui to a c.li which can load 0.
bfd/
* elfnn-riscv.c (perform_relocation) <R_RISCV_RVC_LUI>: If
RISCV_CONST_HIGH_PART (value) is zero, then convert c.lui instruction
to c.li instruction, and use ENCODE_RVC_IMM to set value.
ld/
* testsuite/ld-riscv-elf/c-lui-2.d: New.
* testsuite/ld-riscv-elf/c-lui-2.ld: New.
* testsuite/ld-riscv-elf/c-lui-2.s: New.
* testsuite/ld-riscv-elf/ld-riscv-elf.exp: Run the c-lui-2 test.
A customer program had a DWARF CU that consisted of just a CU DIE,
without any children. In this situation, scan_unit_for_symbols will
try to read past the end of the current CU, and will take use the
first bytes of the next CU as an abbrev, printing an error message.
This patch fixes the bug by changing scan_unit_for_symbols to stop at
the end of the CU rather than the end of the .debug_info section.
bfd/ChangeLog
2019-08-15 Tom Tromey <tromey@adacore.com>
* dwarf2.c (scan_unit_for_symbols): Check for end of CU, not end
of section.
PR 24623
* dwarf2.c (stash_comp_unit): New function, extracted from..
(_bfd_dwarf2_find_nearest_line): ..here.
(find_abstract_instance): Parse comp units and decode line info
as needed.
This parameter might appear to be used to set up offset_size, but
since git commit 024b2372f5 offset_size is either set from the
debug_info data or is set to 4.
* dwarf2.c (_bfd_dwarf2_find_nearest_line): Remove addr_size parameter.
* libbfd-in.h (_bfd_dwarf2_find_nearest_line): Update prototype.
* coffgen.c (coff_find_nearest_line_with_names): Adjust
_bfd_dwarf2_find_nearest_line calls.
* elf.c (_bfd_elf_find_nearest_line, _bfd_elf_find_line): Likewise.
* elf32-arm.c (elf32_arm_find_nearest_line): Likewise.
* elf64-alpha.c (elf64_alpha_find_nearest_line): Likewise.
* elfnn-aarch64.c (elfNN_aarch64_find_nearest_line): Likewise.
* elfxx-mips.c (_bfd_mips_elf_find_nearest_line): Likewise.
* mach-o.c (bfd_mach_o_find_nearest_line): Likewise.
* libbfd.h: Regenerate.
This patch is a reimplementation of [1] which was submitted in 2015 by
Neil Schellenberger. Copyright issue was sorted out [2] last year.
It proposed a new section (.gnu.xhash) and related dynamic tag
(DT_GNU_XHASH). The new section would be virtually identical to the
existing .gnu.hash except for the translation table (xlat) which would
contain correct MIPS .dynsym indexes corresponding to the hashvals in
chains. This is because MIPS ABI imposes a different ordering on the
dynsyms than the one expected by the .gnu.hash section. Another addition
would be a leading word (ngnusyms) which would contain the number of
entries in the translation table.
In this patch, the new section name and dynamic tag are changed to
reflect the fact that the section should be treated as MIPS-specific
(.MIPS.xhash and DT_MIPS_XHASH).
This patch addresses the alignment issue as reported in [3], which is
caused by the leading word added to the .MIPS.xhash section. Leading word
is removed in this patch, and the number of entries in the translation
table is now calculated using DT_MIPS_SYMTABNO dynamic tag (this is
addressed by the corresponding glibc patch).
Suggestions on coding style in [4] were taken into account. Existing
GNU hash testcase was covered, and another one was added in the MIPS
part of the testsuite.
The other major change is reserving MIPS ABI version 5 for .MIPS.xhash,
marking the need of support for .MIPS.xhash in the dynamic linker (again,
addressed in the corresponding glibc patch). This is something which I
am not sure of, especially after reading [5]. I am confused on whether
this ABI version is reserved for IFUNC, or it can be used for this
purpose.
Already mentioned glibc patch is submitted at:
https://sourceware.org/ml/libc-alpha/2019-06/msg00456.html
[1] https://sourceware.org/ml/binutils/2015-10/msg00057.html
[2] https://sourceware.org/ml/binutils/2018-03/msg00025.html
[3] https://sourceware.org/ml/binutils/2016-01/msg00006.html
[4] https://sourceware.org/ml/binutils/2016-02/msg00097.html
[5] https://sourceware.org/ml/libc-alpha/2016-12/msg00853.html
ld * emulparams/elf32bmip.sh: Add .MIPS.xhash section.
* emulparams/elf32bmipn32-defs.sh: Add .MIPS.xhash section.
* emulparams/elf64bmip-defs.sh: Add .MIPS.xhash section.
* emultempl/mipself.em: Remove mips_after_parse function.
* testsuite/ld-elf/hash.d: Update comment.
* testsuite/ld-mips-elf/hash1.d: New test.
* testsuite/ld-mips-elf/hash1.s: Ditto.
* testsuite/ld-mips-elf/hash1a.d: Remove.
* testsuite/ld-mips-elf/hash1b.d: Ditto.
* testsuite/ld-mips-elf/hash1c.d: Ditto
* testsuite/ld-mips-elf/hash2.d: New test.
* testsuite/ld-mips-elf/mips-elf.exp: New tests.
* testsuite/ld-mips-elf/start.s: New test.
bfd * elf-bfd.h (struct elf_backend_data): New members.
* elflink.c (_bfd_elf_link_create_dynamic_sections): Create
.gnu.hash section if necessary.
(struct collect_gnu_hash_codes): New member.
(elf_gnu_hash_process_symidx): New function name.
(elf_renumber_gnu_hash_syms): Ignore local and undefined
symbols. Record xlat location for every symbol which should have
a .MIPS.xhash entry.
(bfd_elf_size_dynamic_sections): Add DT_GNU_HASH dynamic tag to
dynamic section if necessary.
(GNU_HASH_SECTION_NAME): New define.
(bfd_elf_size_dynsym_hash_dynstr): Get .MIPS.xhash section.
Update the section size info.
* elfxx-mips.c (struct mips_elf_hash_sort_data): New members.
(struct mips_elf_link_hash_entry): New member.
(mips_elf_link_hash_newfunc): Initialize .MIPS.xhash translation
table location.
(mips_elf_sort_hash_table): Initialize the pointer to the
.MIPS.xhash section.
(mips_elf_sort_hash_table_f): Populate the .MIPS.xhash
translation table entry with the symbol dynindx.
(_bfd_mips_elf_section_from_shdr): Add SHT_MIPS_XHASH.
(_bfd_mips_elf_fake_sections): Initialize .MIPS.xhash section
info.
(_bfd_mips_elf_create_dynamic_sections): Create .MIPS.xhash
section.
(_bfd_mips_elf_size_dynamic_sections): Add DT_MIPS_XHASH tag to
dynamic section.
(_bfd_mips_elf_finish_synamic_sections): Add DT_MIPS_XHASH.
(_bfd_mips_elf_final_write_processing): Set .MIPS.xhash section
sh_link info.
(_bfd_mips_elf_get_target_dtag): Get DT_MIPS_XHASH tag.
(MIPS_LIBC_ABI_XHASH): New ABI version enum value.
(_bfd_mips_post_process_headers): Mark the ABI version as
MIPS_LIBC_ABI_XHASH if there exists a .MIPS.xhash section,
but not a .hash section.
(_bfd_mips_elf_record_xhash_symbol): New function. Record a
position in the translation table, associated with the hash
entry.
* elfxx-mips.h (literal_reloc_p): Define
elf_backend_record_xhash_symbol backend hook.
* elfxx-target.h: Initialize elf_backend_record_xhash_symbol
backend hook.
include * elf/mips.h (SHT_GNU_XHASH): New define.
(DT_GNU_XHASH): New define.
binutils * readelf.c (get_mips_dynamic_type): Return MIPS_XHASH dynamic type.
(get_mips_section_type_name): Return MI{S_XHASH name string.
(dynamic_section_mips_val): Initialize the .MIPS.xhash dynamic
info.
(process_symbol_table): Initialize the .MIPS.xhash section
pointer. Adjust the readelf output to support the new section.
(process_object): Set the .MIPS.xhash dynamic info to zero.
This patch changes the eBPF linker to provide a relocate_section
function instead of relying on using special functions in relocation
howtos.
Tested in x86_64 host.
No regressions.
bfd/ChangeLog:
2019-08-07 Jose E. Marchesi <jose.marchesi@oracle.com>
* elf64-bpf.c (bpf_elf_relocate_section): New function.
(bpf_elf_insn_disp_reloc): Delete function.
(elf_backend_relocate_section): Define.
bfd/ChangeLog
Ilia Diachkov <ilia.diachkov@optimitech.com>
* elfnn-riscv.c (_bfd_riscv_relax_lui): Set lui relax safety area to
two pages in relro presence.
check_loop_aligned is used during link time relaxation to only allow
transformations that don't violate loop body alignment requirements.
Assembler can relax loops that have too long body by adding instructions
between the loop instruction and the loop body. check_loop_aligned must
check alignment of the first instruction of the actual loop body.
Detect loop / rsr.lend / wsr.lbeg sequence used in assembly time
relaxation and adjust alignment check when it's detected.
bfd/
2019-08-01 Max Filippov <jcmvbkbc@gmail.com>
* elf32-xtensa.c (insn_num_slots, get_rsr_lend_opcode)
(get_wsr_lbeg_opcode): New functions.
(check_loop_aligned): Detect relaxed loops and adjust loop_len
and insn_len for the first actual instruction of the loop.
This fixes two cases where elf_link_add_object_symbols returns an
error, setting the catch-all bfd_error_bad_value without explaining
the error. The second one is an internal error that can only be
caused by a target elf_add_symbol_hook, so make that one abort. The
first one is my PR24339 fix. PR24339 is another of those fuzzing bugs
and the fix I made catches the problem when loading symbols, rather
than when symbols are used in relocs. While ld is correct to reject
the object file as not complying with the ELF standard, let's be a
little more forgiving for dynamic objects.
PR 24857
PR 24339
* elflink.c (elf_link_add_object_symbols): Report an informative
error on finding local symbols with index equal or greater than
symbol table sh_info. Correct comment. Allow such symbols in
dynamic objects. Abort on NULL section for symbol.
This field effectively became usused a long time ago, perhaps as early
as 1994.
* elf-bfd.h (struct output_elf_obj_tdata): Delete "linker" field.
(elf_linker): Don't define.
* elflink.c (bfd_elf_final_link): Don't set elf_linker.
Add linker relaxation. The first relaxation added is converting
GOTPC32 to PCREL relocations. This relaxation doesn't change the size of
the binary.
bfd/
xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com>
* elf32-arc.c (bfd_get_32_me): New function.
(bfd_put_32_me): Likewise.
(arc_elf_relax_section): Likewise.
(bfd_elf32_bfd_relax_section): Define.
ld/testsuite/
xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com>
* ld-arc/relax-local-pic.d: New test.
* ld-arc/relax-local-pic.s: New file.
I missed some early exits from final_write_processing that mean
_bfd_elf_final_write_processing could be missed.
* elf-vxworks.c (elf_vxworks_final_write_processing): Don't return
early.
* elf32-arc.c (arc_elf_final_write_processing): Likewise.
* elf32-xtensa.c (elf_xtensa_final_write_processing): Likewise.
When SHF_GNU_MBIND was added in the SHF_LOOS to SHF_HIOS range, it
should have required ELFOSABI_GNU since these flags are already in use
by other OSes. HPUX SHF_HP_TLS in fact has the same value. That
means no place in binutils should test SHF_GNU_MBIND without first
checking OSABI, and SHF_GNU_MBIND should not be set without also
setting OSABI. At least, that's the ideal, but the patch accepts
SHF_GNU_MBIND on ELFOSABI_NONE object files since gas didn't always
set OSABI. However, to reinforce the fact that SHF_GNU_MBIND isn't
proper without a non-zero OSABI, readelf will display the flag as
LOOS+0 if OSABI isn't set.
The clash with SHF_HP_TLS means that hppa64-linux either has that flag
on .tbss sections or supports GNU_MBIND, not both. (hppa64-linux
users, if there are any, may have noticed that GNU ld since 2017
mysteriously aligned their .tbss sections to a 4k boundary. That was
one consequence of SHF_HP_TLS being blindly interpreted as
SHF_GNU_MBIND.) Since it seems that binutils, gdb, gcc, glibc, and
the linux kernel don't care about SHF_HP_TLS I took that flag out of
.tbss for hppa64-linux.
bfd/
* elf-bfd.h (enum elf_gnu_osabi): Add elf_gnu_osabi_mbind.
* elf.c (_bfd_elf_make_section_from_shdr): Set elf_gnu_osabi_mbind.
(get_program_header_size): Formatting. Only test SH_GNU_MBIND
when elf_gnu_osabi_mbind is set.
(_bfd_elf_map_sections_to_segments): Likewise.
(_bfd_elf_init_private_section_data): Likewise.
(_bfd_elf_final_write_processing): Update comment.
* elf64-hppa.c (elf64_hppa_special_sections): Move .tbss entry.
(elf_backend_special_sections): Define without .tbss for linux.
binutils/
* readelf.c (get_parisc_segment_type): Split off hpux entries..
(get_ia64_segment_type): ..and these..
(get_hpux_segment_type): ..to here.
(get_segment_type): Condition GNU_MBIND on osabi. Use
get_hpux_segment_type.
(get_symbol_binding): Do not print UNIQUE for ELFOSABI_NONE.
(get_symbol_type): Do not print IFUNC for ELFOSABI_NONE.
gas/
* config/obj-elf.c (obj_elf_change_section): Don't emit a fatal
error for non-SHF_ALLOC SHF_GNU_MBIND here.
(obj_elf_parse_section_letters): Return SHF_GNU_MBIND in new
gnu_attr param.
(obj_elf_section): Adjust obj_elf_parse_section_letters call.
Formatting. Set SHF_GNU_MBIND and elf_osabi from gnu_attr.
Emit normal error for non-SHF_ALLOC SHF_GNU_MBIND and wrong osabi.
(obj_elf_type): Set elf_osabi for ifunc.
* testsuite/gas/elf/section12a.d: xfail msp430 and hpux.
* testsuite/gas/elf/section12b.d: Likewise.
* testsuite/gas/elf/section13.d: Likewise.
* testsuite/gas/elf/section13.l: Adjust expected error.
ld/
* emultempl/elf32.em (gld${EMULATION_NAME}_place_orphan): Condition
SHF_GNU_MBIND on osabi. Set output elf_gnu_osabi_mbind.
This patch supports using pcrel instructions in TLS code sequences. A
number of new relocations are needed, gas operand modifiers to
generate those relocations, and new TLS optimisation. For
optimisation it turns out that the new pcrel GD and LD sequences can
be distinguished from the non-pcrel GD and LD sequences by there being
different relocations on the new sequence. The final "add ra,rb,13"
on IE sequences similarly needs a new relocation, or as I chose, a
modification of R_PPC64_TLS. On pcrel IE code, the R_PPC64_TLS points
one byte into the "add" instruction rather than being on the
instruction boundary.
GD:
pla 3,z@got@tlsgd@pcrel # R_PPC64_GOT_TLSGD34
bl __tls_get_addr@notoc(z@tlsgd) # R_PPC64_TLSGD and R_PPC64_REL24_NOTOC
edited to IE
pld 3,z@got@tprel@pcrel
add 3,3,13
edited to LE
paddi 3,13,z@tprel
nop
LD:
pla 3,z@got@tlsld@pcrel # R_PPC64_GOT_TLSLD34
bl __tls_get_addr@notoc(z@tlsld) # R_PPC64_TLSLD and R_PPC64_REL24_NOTOC
..
paddi 9,3,z2@dtprel
pld 10,z3@got@dtprel@pcrel
add 10,10,3
edited to LE
paddi 3,13,0x1000
nop
IE:
pld 9,z@got@tprel@pcrel # R_PPC64_GOT_TPREL34
add 3,9,z@tls@pcrel # R_PPC64_TLS at insn+1
ldx 4,9,z@tls@pcrel
lwax 5,9,z@tls@pcrel
stdx 5,9,z@tls@pcrel
edited to LE
paddi 9,13,z@tprel
nop
ld 4,0(9)
lwa 5,0(9)
std 5,0(9)
LE:
paddi 10,13,z@tprel
include/
* elf/ppc64.h (R_PPC64_TPREL34, R_PPC64_DTPREL34),
(R_PPC64_GOT_TLSGD34, R_PPC64_GOT_TLSLD34),
(R_PPC64_GOT_TPREL34, R_PPC64_GOT_DTPREL34): Define.
(IS_PPC64_TLS_RELOC): Include new tls relocs.
bfd/
* reloc.c (BFD_RELOC_PPC64_TPREL34, BFD_RELOC_PPC64_DTPREL34),
(BFD_RELOC_PPC64_GOT_TLSGD34, BFD_RELOC_PPC64_GOT_TLSLD34),
(BFD_RELOC_PPC64_GOT_TPREL34, BFD_RELOC_PPC64_GOT_DTPREL34),
(BFD_RELOC_PPC64_TLS_PCREL): New pcrel tls relocs.
* elf64-ppc.c (ppc64_elf_howto_raw): Add howtos for pcrel tls relocs.
(ppc64_elf_reloc_type_lookup): Translate pcrel tls relocs.
(must_be_dyn_reloc, dec_dynrel_count): Add R_PPC64_TPREL64.
(ppc64_elf_check_relocs): Support pcrel tls relocs.
(ppc64_elf_tls_optimize, ppc64_elf_relocate_section): Likewise.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
gas/
* config/tc-ppc.c (ppc_elf_suffix): Map "tls@pcrel", "got@tlsgd@pcrel",
"got@tlsld@pcrel", "got@tprel@pcrel", and "got@dtprel@pcrel".
(fixup_size, md_assemble): Handle pcrel tls relocs.
(ppc_force_relocation, ppc_fix_adjustable): Likewise.
(md_apply_fix, tc_gen_reloc): Likewise.
ld/
* testsuite/ld-powerpc/tlsgd.d,
* testsuite/ld-powerpc/tlsgd.s,
* testsuite/ld-powerpc/tlsie.d,
* testsuite/ld-powerpc/tlsie.s,
* testsuite/ld-powerpc/tlsld.d,
* testsuite/ld-powerpc/tlsld.s: New tests.
* testsuite/ld-powerpc/powerpc.exp: Run them.
It's not correct to use non-STT_TLS symbols with TLS relocation, not
that it matters much when editing relocs, but this edited reloc can be
output by --emit-relocs. So don't use a symbol on the reloc.
* elf64-ppc.c (ppc64_elf_relocate_section): Don't bother selecting
a TLS section symbol for edited relocs. Tighten TLS symbol/reloc
match test.
This saves a bit in tls_mask, and fixes a bug that could be triggered
in the unlikely case that both @got (usual ELF style) and @toc
(PowerOpen style) code was used to set up args for __tls_get_addr.
* elf64-ppc.c (TLS_EXPLICIT): Define as 256.
(ppc64_elf_check_relocs): Don't store TLS_EXPLICIT even if char
is more than 8 bits.
(ppc64_elf_tls_optimize): Likewise. Make tls_set, tls_clear, and
tls_type vars unsigned int.
(ppc64_elf_relocate_section): Use r_type rather than TLS_EXPLICIT
to select r_type edit.
Choose a better name, that reflects why the flag is set (GD to IE
optimisation) rather than what the flag produces (TPREL64 reloc on
a single GOT entry replacing a tls_index pair).
* elf32-ppc.c (TLS_GDIE): Rename from TLS_TPRELGD throughout file.
Correct comment.
* elf64-ppc.c (TLS_GDIE): Likewise.
I don't expect anyone will have hit this bug. You'd need a TLS
segment of 2G before you'd notice.
* elf64-ppc.c (ppc64_elf_tls_optimize): Correct test for allowed
range of tp-relative offsets.
> Building LLVM 6.0 on FreeBSD/powerpc (devel/llvm60 port) the assertion
> in the subject trips (displays twice) when linking libLTO.so.1. The
> issue has been filed in FreeBSD's bugzilla, at
> https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=237068 . It appears
> the 'llvm::hashing::detail::get_execution_seed()::seed@@JL_LLVM_6.0'
> symbol is being weakly aliased to an indirect symbol
> __bss_start@@JL_LLVM_6.0. Since __bss_start@@JL_LLVM_6.0 is an
> indirect symbol, it fails the assertion.
I haven't looked under a debugger at your testcase but I think I know
what is going on here. You have a shared library with a weakly
defined llvm::hashing::detail::get_execution_seed()::seed which
happens to be at the same location as __bss_start in that library. At
the time the linker loads symbols for that library, it sees they are
both versioned and thus introduces non-versioned indirect symbols for
them. The linker considers the symbols as possibly being aliases,
setting up h->u.alias and h->is_weakalias such that
__bss_start@@JL_LLVM_6.0 is the definition. No real problem so far,
the definition is bfd_link_hash_defined, except that the zero size, no
type __bss_start symbol possibly should not be considered an alias in
the first place.
Later, __bss_start as defined by the linker script is entered into the
linker symbol table. This is similar to __bss_start being defined by
a regular object file in that ELF symbol resolution rules say that the
value of __bss_start in the library is overridden by __bss_start in
the executable/library being produced. So to accomplish the override,
ld flips __bss_start from being an indirect symbol pointing at
__bss_start@@JL_LLVM_6.0 to __bss_start@@JL_LLVM_6.0 being an indirect
symbol pointing at __bss_start. That's how we get an unexpected
indirect symbol and hit the assert.
What should happen I think, is for the def->def_regular code above the
assert to run in this case. The symbols are no longer aliases.
* elflink.c (_bfd_elf_fix_symbol_flags): If the def for an
alias is no longer bfd_link_hash_defined, clear the alias.
It is possible to create shared libraries on PowerPC using
-ftls-model=inital-exec or -ftls-model=local-exec. The first is half
reasonable, getting you a shared library that can't be dlopen'd but
otherwise is reasonable. The second is quite bad. Not only do you
lose being able to dlopen, the library also has dynamic text
relocations. Worse, the TPREL16_LO, TPREL16_HA and other TPREL16
dynamic relocs emitted were wrong, resulting in wrong values being
applied by ld.so.
Using the first TLS section symbol in dynamic relocations for local
TLS symbols doesn't work. It's wrong because TLS symbols used by TLS
relocs have values relative to the TLS segment, whereas the TLS
section symbols are addresses. This patch instead uses a symbol index
of zero which is used elsewhere by PowerPC on dynamic TLS relocs.
It's not strictly ABI compliant to use a non-TLS symbol with TLS
relocs but symbol index zero can be interpreted as "no symbol". Not
using the first TLS section symbol means it doesn't need to be dynamic.
The patch also fixes a further problem with PowerPC32 dynamic TPREL16*
relocs, which shouldn't have the symbol value in the addend as we do
for non-TLS symbols.
bfd/
* elflink.c (_bfd_elf_omit_section_dynsym_default): Don't keep
tls_sec.
(_bfd_elf_init_1_index_section): Prefer not using TLS sections.
(_bfd_elf_init_2_index_sections): Likewise.
* elf64-ppc.c (ppc64_elf_relocate_section): When emitting dynamic
relocations for local TLS symbols, use STN_UNDEF as the relocation
symbol.
* elf32-ppc.c (ppc_elf_relocate_section): Likewise, and don't
leave TLS symbol value in the addend.
ld/
* testsuite/ld-powerpc/tlsso.r: Update.
* testsuite/ld-powerpc/tlsso32.g: Update.
* testsuite/ld-powerpc/tlsso32.r: Update.
* testsuite/ld-powerpc/tlstocso.r: Update.
* testsuite/ld-cris/tls-dso-dtpoffd2.d: Update.
* testsuite/ld-cris/tls-dso-dtpoffd4.d: Update.
* testsuite/ld-cris/tls-dso-tpoffgotcomm1.d: Update.
* testsuite/ld-cris/tls-gd-1.d: Update.
* testsuite/ld-cris/tls-gd-1h.d: Update.
* testsuite/ld-cris/tls-gd-2.d: Update.
* testsuite/ld-cris/tls-gd-2h.d: Update.
* testsuite/ld-cris/tls-ie-10.d: Update.
* testsuite/ld-cris/tls-ie-11.d: Update.
* testsuite/ld-cris/tls-ie-8.d: Update.
* testsuite/ld-cris/tls-ie-9.d: Update.
* testsuite/ld-cris/tls-js1.d: Update.
* testsuite/ld-cris/tls-ld-4.d: Update.
* testsuite/ld-cris/tls-ld-5.d: Update.
* testsuite/ld-cris/tls-ld-6.d: Update.
* testsuite/ld-cris/tls-ld-7.d: Update.
* testsuite/ld-cris/tls-ldgd-14.d: Update.
* testsuite/ld-cris/tls-ldgd-15.d: Update.
* testsuite/ld-cris/tls-ldgdx-14.d: Update.
* testsuite/ld-cris/tls-ldgdx-15.d: Update.
* testsuite/ld-cris/tls-local-54.d: Update.
* testsuite/ld-cris/tls-local-60.d: Update.
* testsuite/ld-cris/tls-local-61.d: Update.
* testsuite/ld-cris/tls-local-63.d: Update.
* testsuite/ld-cris/tls-local-64.d: Update.
* testsuite/ld-cris/tls-ok-30.d: Update.
* testsuite/ld-cris/tls-ok-32.d: Update.
* testsuite/ld-cris/tls-ok-34.d: Update.
* testsuite/ld-mips-elf/tls-multi-got-1.got: Update.
* testsuite/ld-mips-elf/tls-multi-got-1.r: Update.
* testsuite/ld-mips-elf/tlsdyn-pie-o32.d: Update.
* testsuite/ld-mips-elf/tlsdyn-pie-o32.got: Update.
* testsuite/ld-mips-elf/tlslib-o32-hidden.got: Update.
* testsuite/ld-mips-elf/tlslib-o32-ver.got: Update.
* testsuite/ld-mips-elf/tlslib-o32.got: Update.
* testsuite/ld-s390/tlspic.rd: Update.
* testsuite/ld-s390/tlspic_64.rd: Update.
* testsuite/ld-sparc/tlssunnopic32.rd: Update.
* testsuite/ld-sparc/tlssunnopic64.rd: Update.
* testsuite/ld-sparc/tlssunpic32.rd: Update.
* testsuite/ld-sparc/tlssunpic64.rd: Update.
PR 24717
* elf.c (is_debuginfo_file): New function.
(assign_file_positions_for_non_load_sections): Do not warn about
allocated sections outside of loadable segments if they are found
in a debuginfo file.
* elf-bfd.h (is_debuginfo_file): Prototype.
PR 24753
bfd * compress.c (bfd_get_full_section_contents): Do not complain
about linker created sections that are larger than the file size.
ld * emultempl/aarch64elf.em (_aarch64_add_stub_section): Include the
LINKER_CREATED section flag when creating the stub section.
As discussed in the PR, we do not support the case where CMSE stubs
are inserted too far from their destination. This would require an
intermediate long-branch stub, which is tricky in this context.
Instead of crashing, this patch emit an error message and exits.
2019-07-02 Christophe Lyon <christophe.lyon@linaro.org>
* bfd/elf32-arm.c (CMSE_STUB_NAME): New define.
(elf32_arm_get_stub_entry): Do not try to emit long-branch stubs
for CMSE stubs.
(arm_dedicated_stub_output_section_name): Use CMSE_STUB_NAME.
Change-Id: I6d4e1c0fdee6bb9f4b07e5e1b46700b5ba31c62e
Consider a file containing only Armv8-M secure entry functions.
This file is compiled and linked with "-march=armv8-m.main -mfloat-abi=hard
-mfpu=fpv5-sp-d16 -mcmse -static --specs=rdimon.specs
-Wl,--section-start,.gnu.sgstubs=0x190000 -ffunction-sections
-fdata-sections
-Wl,--gc-sections -g" options to generate an executable.
The executable generated does not contain any debug information of these
secure entry functions even though it contains secure entry functions in
the .text section. This patch fixes this problem.
PR 23839
bfd * elf32-arm.c (elf32_arm_update_relocs): Do not include the
section VMA in the offset used to update exidx relocs.
ld * testsuite/ld-arm/unwind-4.d: Adjust for corrected calculation of
exidx relocs.
PR 24708
* elf.c (_bfd_elf_slurp_version_tables): Check for an excessively
large version reference section.
* compress.c (bfd_get_full_section_contents): Check for an
uncompressed section whose size is larger than the file size.
This patch fixes failures with LTO on mingw32 targets. Since git
commit 7cf7fcc83c all possible targets (minus binary) are matched in
bfd_check_format_matches rather than lower priority targets being
excluded once a higher priority target matches. During linking that
results in the ld/plugin.c plugin_object_p function being called with
the input file xvec set to plugin_vec, which means
plugin_get_ir_dummy_bfd doesn't see the real format of the file
(pe-i386). It defaults to the output format instead, which happens to
be pei-i386, and this wrong choice persists for the dummy bfd.
pei-i386 isn't recognised as a valid linker input file.
So, omit recognizing a plugin object in bfd_check_format_matches when
some other object format matches, and make sure those other object
formats are checked first.
* format.c (bfd_check_format_matches): Don't match plugin target
if another target matches. Expand comment.
* targets.c (_bfd_target_vector): Move plugin_vec after all other
non-corefile targets, outside !SELECT_VECS.
* config.bfd: Don't handle targ=plugin here.
* configure.ac: Don't add plugin to enable_targets or handle in
target loop setting selvecs and other target vars.
* configure: Regenerate.
PR 24703
binutils* bucomm.c (bfd_nonfatal): If no bfd error code has been set then
indicate this in the output.
(bfd_nonfatal_message): Likewise.
bfd * mach-o-arm.c (bfd_mach_o_arm_canonicalize_one_reloc): Add error
messages for failures.
* mach-o.c (bfd_mach_o_canonicalize_relocs): Set an bfd error code
if returning an error value.
With my (oldish) gcc/glibc combination I'm seeing
.../bfd/elf-properties.c: In function elf_find_and_remove_property:
.../bfd/elf-properties.c:244: error: declaration of remove shadows a global declaration
/usr/include/stdio.h:157: error: shadowed declaration is here
2019-06-24 Ilia Diachkov <ilia.diachkov@optimitech.com>
bfd/
* elfnn-riscv.c (_bfd_riscv_relax_lui): Delete early exit when
SEC_MERGE or SEC_CODE flags are set.
(_bfd_riscv_relax_section): New local symtype. Set sym_sec and
symtype consistently. Don't include sec_addr (sym_sec) in symval.
Add check for SEC_INFO_TYPE_MERGE and call _bfd_merged_section_offset.
Add sec_addr (sym_sec) after handling merge sections.
commit d2ef37ebd9
Author: H.J. Lu <hjl.tools@gmail.com>
Date: Fri Dec 7 08:30:30 2018 -0800
elf: Report property change when merging properties
failed to remove the property after reporting it has been removed. This
patch corrects it.
bfd/
PR ld/24721
* elf-properties.c (elf_merge_gnu_property_list): Remove the
property after reporting property removal.
ld/
PR ld/24721
* testsuite/ld-x86-64/x86-64.exp: Run PR ld/24721 tests.
* testsuite/ld-x86-64/pr24721-x32.d: New file.
* testsuite/ld-x86-64/pr24721.d: Likewise.
* testsuite/ld-x86-64/pr24721.map: Likewise.
* testsuite/ld-x86-64/pr24721a.s: Likewise.
* testsuite/ld-x86-64/pr24721b.s: Likewise.
While the skiboot linker script bears some culpability in this PR,
it's also true that the GOT indirect to GOT relative optimisation for
16-bit offsets isn't safe. At least, it isn't safe to remove the GOT
entry based on distance between the GOT pointer and symbol calculated
from the preliminary layout. So this patch removes that optimisation,
and reduces the range allowed for 32-bit and 34-bit offsets.
PR 24704
bfd/
* elf64-ppc.c (R_PPC64_GOT16_DS): Don't set has_gotrel.
(ppc64_elf_edit_toc): Don't remove R_PPC64_GOT16_DS got entries.
Reduce range of offsets allowed for other GOT relocs.
ld/
* testsuite/ld-powerpc/elfv2exe.d: Update.
* testsuite/ld-powerpc/elfv2so.d: Update.
Depending on optimisation level and gcc version, git commit 890f750a3b
introduces a false positive warning that i_shdrp may be used
uninitialized.
PR 24689
* elfcode.h (elf_object_p): Warning fix.
The testcase in the PR had a e_shstrndx section of type SHT_GROUP.
hdr->contents were initialized by setup_group rather than being read
from the file, thus last byte was not zero and string dereference ran
off the end of the buffer.
PR 24689
* elfcode.h (elf_object_p): Check type of e_shstrndx section.
Calls from functions that don't have a valid toc pointer in r2 (these
calls are marked with _NOTOC relocs) to functions that require r2
valid must go via the callee global entry point. This patch corrects
the condition the linker was using to detect functions that require r2
to be valid. Values of both zero and one in st_other local entry bits
mean a function doesn't care about r2.
* elf64-ppc.c (ppc64_elf_inline_plt): Correct st_other test for
functions that require r2 valid to use local entry.
(ppc64_elf_size_stubs, ppc64_elf_relocate_section): Likewise.
The loc_hash_table should only contain local ifunc symbols. The current
code already aborts if there is anything else and for defined ifunc
symbols elfNN_aarch64_allocate_dynrelocs is a no-op.
bfd/ChangeLog:
* elfnn-aarch64.c (elfNN_aarch64_allocate_local_dynrelocs): Remove.
(elfNN_aarch64_size_dynamic_sections): Remove loc_hash_table traversal
with elfNN_aarch64_allocate_local_dynrelocs.
These ilp32 relocations were missing for some reason.
bfd/ChangeLog:
* elfnn-aarch64.c: Enable MOVW_PREL relocs for ELF32.
include/ChangeLog:
* elf/aarch64.h (R_AARCH64_P32_MOVW_PREL_G0): Define.
(R_AARCH64_P32_MOVW_PREL_G0_NC): Define.
(R_AARCH64_P32_MOVW_PREL_G1): Define.
ld/ChangeLog:
* testsuite/ld-aarch64/aarch64-elf.exp: Add emit-relocs-22 and -23.
* testsuite/ld-aarch64/emit-relocs-22.d: New test.
* testsuite/ld-aarch64/emit-relocs-22.s: New test.
* testsuite/ld-aarch64/emit-relocs-23.d: New test.
* testsuite/ld-aarch64/emit-relocs-23.s: New test.
"paddi rt,sym@pcrel" as an abbreviation for "paddi rt,0,sym@pcrel,1"
is invalid, so replace with "pla rt,sym@pcrel" which is a valid form
of "pla rt,sym@pcrel(0),1".
* elf64-ppc.c: Fix comments involving paddi.
PR 24643
* elf32-arm.c (arm_elf_find_function): Fail if the symol table is
absent, or the bfd is not in the ELF formart.
* elfnn-aarch64.c (aarch64_elf_find_function): Likewise.
PR 24650
* elf.c (elfcore_make_auxv_note_section): New function.
(elfcore_grok_note): Use it.
(elfcore_grok_freebsd_note): Likewise.
(elfcore_grok_openbsd_note): Likewise.
(elfcore_grok_netbsd_note): Likewise. Plus add support for
NT_NETBSDCORE_AUXV notes.
If the new GNU property section was being created by the linker
(this will happen only if none of the inputs have any GNU property
section but the command line to the linker forces a bti with
--force-bti), the alignment of the section and hence the program
header of PT_GNU_PROPERTY type was not being set correctly. This
patch fixes this issue.
bfd/ChangeLog:
2019-06-06 Sudakshina Das <sudi.das@arm.com>
* elfxx-aarch64.c (_bfd_aarch64_elf_link_setup_gnu_properties): Set
alignment of the new gnu property section.
ld/ChangeLog:
2019-06-06 Sudakshina Das <sudi.das@arm.com>
* testsuite/ld-aarch64/aarch64-elf.exp: Add new tests.
* testsuite/ld-aarch64/property-bti-pac4-a.d: New test.
* testsuite/ld-aarch64/property-bti-pac4-b.d: New test.
* testsuite/ld-aarch64/property-bti-pac4.s: New test.
Overflow checks were removed for all hi16 relocations except PC-relative
high relocations per PR ld/16720. Remove overflow checks from %pcrel_hi
relocations so that we can correctly handle negative offsets from PC.
bfd/
* elfxx-mips.c (mips_elf_calculate_relocation) <R_MIPS_PCHI16>:
Remove overflow check.
ld/
* testsuite/ld-mips-elf/undefweak-overflow.s: Remove test case
for pcrel_hi/pcrel_lo.
* testsuite/ld-mips-elf/undefweak-overflow.d: Update to match.
* testsuite/ld-mips-elf/reloc-pcrel-r6.s: New test source.
* testsuite/ld-mips-elf/reloc-pcrel-r6.d: New test linker script.
* testsuite/ld-mips-elf/reloc-pcrel-r6.ld: New test.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new test.
A plugin can change the element, so call the generic
bfd_link_add_symbols.
PR 24596
* cofflink.c (coff_link_check_archive_element): Don't assume
element is a coff object file after calling add_archive_element.
This patch cures a linker segfault, and "FAIL: Build pr22263-1".
PR 24596
* elf64-alpha.c (elf64_alpha_relocate_section): Don't attempt
to emit R_ALPHA_GOTTPREL in PIEs, for which no space is
allocated in alpha_dynamic_entries_for_reloc.
This doesn't fix the underlying bug, but an abort is better than a
segfault.
PR 24596
* elf32-m68k.c (elf_m68k_get_got_entry): Don't create a new
entry when MUST_FIND. Abort when MUST_FIND not found.
(elf_m68k_get_bfd2got_entry): Likewise.
(elf_m68k_relocate_section): Remove now useless assert.
One of the ld tests produces:
failed with: <Segmentation fault>, no expected output
FAIL: Discarded dynamic relocation section
This patch cures the segv. (The test still fails with ld producing
a really messed up output, DT_RELA at address 0!)
PR 24596
* elf64-hppa.c (elf64_hppa_finalize_dynreloc): Get the output bfd
from bfd_link_info, not an output section owner.
(elf64_hppa_finish_dynamic_symbol, elf64_hppa_finalize_opd): Likewise.
(elf_hppa_final_link_relocate): Likewise.
See also the FIXME. tic30-aout linker support is so bad (and has been
that way since the initial tic30-aout commit) that I'm obsoleting the
target. This patch fixes numerous linker testsuite segmentation faults.
PR 24596
* aout-tic30.c (MY_bfd_final_link): Don't segfault on missing
create_object_symbols_section, obj_textsec, obj_datasec or
obj_bsssec. Fix other errors in placement.
* config.bfd: Obsolete tic30-aout.
The XCOFF linker temporarily trims the output bfd section list,
without adjusting section_count to suit. This is a little rude, but
the dwarf line number code can easily cope with this situation. So
check for a NULL end of list as well as limiting the saved section
VMAs to the first section_count list entries.
Also fixes
-FAIL: Weak test 3 (main, static) (32-bit)
-FAIL: Weak test 3 (main, static) (64-bit)
PR 24596
* dwarf2.c (save_section_vma, section_vma_same): Check for NULL
end of section list as well as section_count.
* xcofflink.c (xcoff_link_add_symbols): Fix temporarily changed
section list before returning error.
After fixing the ld-elf/pr22836-1a segmentation fault we run into an
assertion failure due to the generic ELF target not removing empty
SHT_GROUP sections. Avoid that.
* elf.c (bfd_elf_set_group_contents): Exit on zero size section.
Even though the generic ELF target doesn't handle groups correctly,
this helps avoid a segfault in bfd_elf_set_group_contents seen on
d30v-elf, dlx-elf, pj-elf, and xgate-elf when linking the pr22836
testcase.
PR 24596
bfd/
* linker.c (_bfd_generic_link_output_symbols): Heed BSF_KEEP.
ld/
* emultempl/genelf.em (gld${EMULATION_NAME}_after_open): Set
BFS_KEEP on group signature symbol.
Propagate STO_AARCH64_VARIANT_PCS st_other attribute to the output and
add DT_AARCH64_VARIANT_PCS dynamic tag if necessary.
Mismatching attributes are not diagnosed.
bfd/ChangeLog:
* elfnn-aarch64.c (elfNN_aarch64_merge_symbol_attribute): New function.
(struct elf_aarch64_link_hash_table): Add variant_pcs member.
(elfNN_aarch64_allocate_dynrelocs): Update variant_pcs.
(elfNN_aarch64_size_dynamic_sections): Add DT_AARCH64_VARIANT_PCS.
(elf_backend_merge_symbol_attribute): Define.
ld/ChangeLog:
* testsuite/ld-aarch64/aarch64-elf.exp: Add new tests.
* testsuite/ld-aarch64/variant_pcs-1.s: New asm for tests.
* testsuite/ld-aarch64/variant_pcs-2.s: New asm for tests.
* testsuite/ld-aarch64/variant_pcs-now.d: New test.
* testsuite/ld-aarch64/variant_pcs-r.d: New test.
* testsuite/ld-aarch64/variant_pcs-shared.d: New test.
* testsuite/ld-aarch64/variant_pcs.ld: New linker script for tests.
bfd/
* elf64-ppc.c (ppc64_elf_check_relocs): Set has_gotrel for
R_PPC64_GOT_PCREL34.
(xlate_pcrel_opt): New function.
(ppc64_elf_edit_toc): Handle R_PPC64_GOT_PCREL34.
(ppc64_elf_relocate_section): Edit GOT indirect to GOT relative
for R_PPC64_GOT_PCREL34. Implement R_PPC64_PCREL_OPT optimisation.
ld/
* testsuite/ld-powerpc/pcrelopt.s,
* testsuite/ld-powerpc/pcrelopt.d,
* testsuite/ld-powerpc/pcrelopt.sec: New test.
* testsuite/ld-powerpc/powerpc.exp: Run it.
This patch avoids for bpf_elf64_le_vec to be referenced in targmatch.h
when building a BFD without BFD64, resulting in an undefined symbol.
This was a regression introduced along with the BPF target.
bfd/ChangeLog:
2019-05-23 Jose E. Marchesi <jose.marchesi@oracle.com>
* config.bfd (targ_cpu): Process bpf-*-none only if BFD64.
* configure.ac: Set target_size=64 for bpf_elf64_le_vec and
bpf_elf64_be_vec.
* configure: Regenerate.
The archive element cache needs tidying when closing an archive element.
This patch fixes these failures:
-FAIL: ar long file names (bfdtest1)
-FAIL: ar thin archive (bfdtest1)
-FAIL: ar thin archive with nested archive (bfdtest1)
* som.c (som_bfd_free_cached_info): Call
_bfd_generic_close_and_cleanup.
bfd/
* elfxx-mips.c (_bfd_mips_elf_check_relocs): Add NULL pointer
checks. Search the RELA table for n64 relocations.
ld/
* testsuite/ld-mips-elf/pic-reloc-5.d: New test.
* testsuite/ld-mips-elf/pic-reloc-6.d: New test.
* testsuite/ld-mips-elf/pic-reloc-7.d: New test.
* testsuite/ld-mips-elf/pic-reloc-5.s: New test source.
* testsuite/ld-mips-elf/pic-reloc-6.s: New test source.
* testsuite/ld-mips-elf/pic-reloc-7.s: New test source.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
Add a new option to get the linker to emit PLTs that use compact
branches instead of delay slot branches.
bfd/
* elfxx-mips.c (LA25_BC): New macro.
(mips_elf_link_hash_table)<compact_branches>: New field.
(STUB_JALRC): New macro.
(mipsr6_o32_exec_plt0_entry_compact): New array.
(mipsr6_n32_exec_plt0_entry_compact): Likewise.
(mipsr6_n64_exec_plt0_entry_compact): Likewise.
(mipsr6_exec_plt_entry_compact): Likewise.
(mips_elf_create_la25_stub): Use BC instead of J for stubs
when compact_branches is true.
(_bfd_mips_elf_finish_dynamic_symbol): Choose the compact
PLT for MIPSR6 with compact_branches. Do not reorder the
compact branches PLT. Switch the lazy stub for MIPSR6
with compact_branches to use JALRC.
(mips_finish_exec_plt): Choose the compact PLT0 for MIPSR6
when compact_branches is true.
(_bfd_mips_elf_compact_branches): New function.
* elfxx-mips.h (_bfd_mips_elf_compact_branches): New prototype.
ld/
* emultempl/mipself.em (compact_branches): New static variable.
(mips_create_output_section_statements): Call
_bfd_mips_elf_compact_branches.
(PARSE_AND_LIST_PROLOGUE): Add OPTION_COMPACT_BRANCHES and
OPTION_NO_COMPACT_BRANCHES.
(PARSE_AND_LIST_LONGOPTS): Add compact-branches,
no-compact-branches.
(PARSE_AND_LIST_OPTIONS): Add --compact-branches,
--no-compact-branches.
(PARSE_AND_LIST_ARGS_CASES): Handle the above.
* ld.texinfo: Document --compact-branches, --no-compact-branches.
* testsuite/ld-mips-elf/pic-and-nonpic-1-r6.dd: New test.
* testsuite/ld-mips-elf/pic-and-nonpic-1-r6.nd: New test.
* testsuite/ld-mips-elf/pic-and-nonpic-3a-r6.dd: New test.
* testsuite/ld-mips-elf/pic-and-nonpic-3a-r6.gd: New test.
* testsuite/ld-mips-elf/pic-and-nonpic-1a-r6.s: New test source.
* testsuite/ld-mips-elf/pic-and-nonpic-3a-r6.s: New test source.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
This patch fixes a hardcoded `l` specifier on a `bfd_signed_vma`.
Instead this now uses BFD_VMA_FMT which fixes the build on 32 bit
hosts.
Committed under the obvious rule.
bfd/ChangeLog:
PR ld/24373
* elfnn-aarch64.c (_bfd_aarch64_erratum_843419_branch_to_stub):
Fix print formatter.
The Cortex-A53 erratum currently has two ways it can resolve the erratum when
using the flag --fix-cortex-a53-843419:
1) If the address is within the range of an ADR instruction it rewrites the ADRP
into an ADR, and those doesn't need the use of a veneer.
2) If the address is not within range, it adds a branch to a veneer which will
execute the final bit of the erratum workaround and branch back to the call
site.
When we do this we always generate the veneers and we always align the size of
the text section to 4KB. This is because we only know which workaround we can
use after all linking has finished and all addresses are known. This means even
though the veneers are not used, we still generate the section and we still
change the size of the input section.
This is problematic for small memory devices as this would require the user to
take about a ~4KB hit in memory even though it's not even used.
Since there's no real way to restart the linking process from the final write
phase this patch solves the issue by allowing the user more control over which
erratum workaround gets used.
Concretely this changes the option --fix-cortex-a53-843419 to take optional
arguments --fix-cortex-a53-843419[=full|adr|adrp]
- full (default): Use both ADRP and ADR workaround. This is equivalent to not
specifying any options and is the default behavior before this
patch.
- adr: Only use the ADR workaround, this will not cause any increase in binary
size but linking will fail if the referenced address is out of range of
an ADR instruction.
- adrp: Use only the ADRP workaround, this will never rewrite your ADRP.
In the cases where the user knows how big their binaries are the `adr` option
would prevent the unneeded overhead.
bfd/ChangeLog:
PR ld/24373
* bfd-in.h (enum erratum_84319_opts): New
(bfd_elf64_aarch64_set_options, bfd_elf32_aarch64_set_options): Change
int to enum erratum_84319_opts.
* bfd-in2.h: Regenerate.
* elfnn-aarch64.c (struct elf_aarch64_link_hash_table): Change
fix_erratum_843419 to use new enum, remove fix_erratum_843419_adr.
(_bfd_aarch64_add_stub_entry_after): Conditionally create erratum stub.
(aarch64_size_one_stub): Conditionally size erratum 843419 stubs.
(_bfd_aarch64_resize_stubs): Amend comment.
(elfNN_aarch64_size_stubs): Don't generate stubs when no workaround
requested.
(bfd_elfNN_aarch64_set_options): Use new fix_erratum_843419 enum.
(_bfd_aarch64_erratum_843419_branch_to_stub): Implement selection of
erratum workaround.
(clear_erratum_843419_entry): Update erratum conditional.
ld/ChangeLog:
PR ld/24373
* emultempl/aarch64elf.em (PARSE_AND_LIST_LONGOPTS): Add optional args
to flags.
* NEWS: Add changes to flag.
(PARSE_AND_LIST_OPTIONS): Update help descriptions.
(PARSE_AND_LIST_ARGS_CASES): Add new options to parser.
* testsuite/ld-aarch64/aarch64-elf.exp: Add new run_dump_tests.
* testsuite/ld-aarch64/erratum843419-adr.d: New test.
* testsuite/ld-aarch64/erratum843419-adrp.d: New test.
* testsuite/ld-aarch64/erratum843419-far-adr.d: New test.
* testsuite/ld-aarch64/erratum843419-far-full.d: New test.
* testsuite/ld-aarch64/erratum843419-far.s: New test.
* testsuite/ld-aarch64/erratum843419-full.d: New test.
* testsuite/ld-aarch64/erratum843419-near.s: New test.
* testsuite/ld-aarch64/erratum843419-no-args.d: New test.
The range check done to transform an absolute call/jump to a pc-relative one is
off-by-one, and that causes this shortening optimization to be missed if the
branch target is right at the range boundary.
In the non-shrinkable case, the range is what is mentioned in the ISA - -4094
bytes in the backward direction, and 4096 bytes in the positive direction.
In the shrinkable case, the forward jump range increases by two bytes (deleted
because of the shortening from call/jmp to rcall/rjmp), and therefore, the
range is -4094 in the reverse, and 4098 in the positive direction.
Fix the ranges for !shrinkable and shrinkable cases, and add a test caes to
ensure jumps to max forward and backward ranges get relaxed to rjmp.
The current code to compute relative distance in the wrap around case does not
handle the edge case of the target (after adjusting for implicit PC increment)
being exactly half of the wrap around distance. This patch fixes that and adds a
testcase.
The range for a forward relative jump call is 4096 bytes ((2 * 2047) + (2 bytes
for the implicit PC increment)). If the target of the jump is at a distance of
4098 bytes, it is out of range for a forward jump - however, a backward jump can
still reach that address if pmem-wrap-around is 8192.
Assume address 0 has rjmp to address 4098. With a wrap around of 8192 and
*without* adjusting for the implicit PC increment of 2 bytes, rjmp .-4096 will
jump to address 4096 (wrap around at 8192 and decreasing addresses from then
on). Adjusting 2 bytes for the implicit PC increment, the actual target is 4098.
avr_relative_distance_considering_wrap_around though, does the wrap around only
if the passed in distance is less than half of the wrap around distance. In this
case, it is exactly equal to half (original distance 4098, adjusted distance of
4096 and wraparound of 8192), and the bypassed wrap around causes the reloc
overflow error.
Fix by wrapping around even if adjusted distance is equal to half of wrap around
distance.
bfd/ChangeLog:
2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
* elf32-arm.c (elf32_arm_merge_eabi_attributes): Add case for Tag_MVE_arch.
binutils/ChangeLog:
2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
* readelf.c (arm_attr_tag_MVE_arch): New array for Tag_MVE_arch values.
(arm_attr_public_tag arm_attr_public_tags): Add case for Tag_MVE_arch.
elfcpp/ChangeLog:
2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
* arm.h (Tag_MVE_arch): Define new enum value.
gas/ChangeLog:
2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
* config/tc-arm.c (mve_ext, mve_fp_ext): New features.
(armv8_1m_main_ext_table): Add new extensions.
(aeabi_set_public_attributes): Translate new features to new build attributes.
(arm_convert_symbolic_attribute): Add Tag_MVE_arch.
* doc/c-arm.texi: Document new extensions and new build attribute.
include/ChangeLog:
2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
* elf/arm.h (Tag_MVE_arch): Define new enum value.
* opcode/arm.h (FPU_MVE, FPU_MVE_FP): New MACROs for new features.
Fixes a failure seen with MALLOC_PERTURB_=1.
* elf32-arm.c (elf32_arm_write_section): Don't leave
error case of STM32L4XX_ERRATUM_BRANCH_TO_VENEER with
unitialised section contents.
PR 19921
binutils* objcopy.c: Add new option --verilog-data-width. Use it to set
the value of VerilogDataWidth.
* doc/binutils.texi: Document the new option.
* testsuite/binutils-all/objcopy.exp: Run tests of new option.
* testsuite/binutils-all/verilog-1.hex: New file.
* testsuite/binutils-all/verilog-2.hex: New file.
* testsuite/binutils-all/verilog-4.hex: New file.
* testsuite/binutils-all/verilog-8.hex: New file.
* NEWS: Mention the new feature.
bfd * verilog.c: (VerilogDataWidth): New variable.
(verilog_write_record): Emit bytes in VerilogDataWidth bundles.
This fixes the recently added ld-elf/pr24511 test failure on pj-elf.
Incidentally, pj-elf has failed its gas "pj" test since 2005-12-22
(git commit 54758c3e39). I think that makes the target ripe for
obsolescence.
bfd/
* elf32-pj.c (pj_elf_reloc): Don't report undefined weak as an error.
ld/
* testsuite/ld-undefined/weak-undef.exp: Don't xfail pj.
GOT and PLT relocs shouldn't have their symbols replaced with a
section symbol plus added. Nor should the HIGHA TLS relocations,
which failed to be caught by the range test in ppc_fix_adjustable.
bfd/
* reloc.c (BFD_RELOC_PPC64_TPREL16_HIGH, BFD_RELOC_PPC64_TPREL16_HIGHA),
(BFD_RELOC_PPC64_DTPREL16_HIGH, BFD_RELOC_PPC64_DTPREL16_HIGHA):
Sort before BFD_RELOC_PPC64_DTPREL16_HIGHESTA entry.
gas/
* config/tc-ppc.c (ppc_fix_adjustable): Exclude all GOT and PLT
relocs, and VLE sdarel relocs.
* testsuite/gas/ppc/power4.d: Adjust.
This patch restricts the section names matched in coff_section_type,
a function that translates section names to symbol type, and arranges
to translate section flags to symbol type before looking at names.
The latter change resulted in various test failures due to improper
section flags being used in tests, and by the plugin support, so fix
that too.
The new test fails on many ELF targets that lack .init/fini_array
in their scripts. I've just xfailed those. pru-elf oddly defines
__init_array_begin rather than __init_array_start. I've left that
target as a FAIL, and pj-elf too which reports an error for undefined
weak symbols.
bfd/
PR 24511
* syms.c (coff_section_type): Only allow '.', '$' and numeric
following the standard section names.
(bfd_decode_symclass): Prioritize section flag tests in
decode_section_type before name tests in coff_section_type.
* plugin.c (bfd_plugin_canonicalize_symtab): Init fake_section
and fake_common_section using BFD_FAKE_SECTION. Use "fake" as
their names and choose standard .text section flags for
fake_section.
ld/
PR 24511
* testsuite/ld-elf/pr14156a.d: Allow for .init/.fini being a
data section on hppa64.
* testsuite/ld-elf/pr14156b.d: Likewise.
* testsuite/ld-scripts/pr18963.t: Map standard sections to set
output section flags.
* testsuite/ld-scripts/sane1.t: Likewise.
* testsuite/ld-elf/init-fini-arrays.s: Reference __init_array_start
and __fini_array_start. Define __start et al.
* testsuite/ld-elf/pr24511.d: New test.
When undefined non-weak references in IR objects are optimized out
by LTO, we can have weak dynamic referencs to symbols marked with
bfd_link_hash_undefined. We shouldn't complain such undefined weak
dynamic references.
bfd/
PR ld/24486
* elflink.c (elf_link_output_extsym): Don't complain undefined
weak dynamic reference.
ld/
PR ld/24486
* testsuite/ld-plugin/lto.exp: Run PR ld/24486 tests.
* testsuite/ld-plugin/pr24486a.c: New file.
* testsuite/ld-plugin/pr24486b.c: Likewise.
* testsuite/ld-plugin/pr24486c.c: Likewise.
This patch aims to improve the definitions of BTI and PAC based PLTs.
The following changes are made:
* PLT0 does not need PAC instructions since the PLTGOT[2] (and PLTGOT[1])
are readonly so they cannot be corrupted at runtime. Thus both PAC plt0
and BTI+PAC plt0 are removed and we can use basic plt0 and BTI plt0
instead, respectively.
* We can remove the extra padding nops when we add the new bti instructions.
BTI plt0 and BTI TLSDESC plt are updated.
* For better performance PLTn could be padded to 24bytes. Both BTI pltn and
PAC pltn are updated.
*** bfd/ChangeLog ***
2019-04-25 Sudakshina Das <sudi.das@arm.com>
* elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): Remove.
(PLT_BTI_TLSDESC_ENTRY_SIZE): Remove.
(PLT_PAC_ENTRY_SIZE, PLT_BTI_PAC_ENTRY_SIZE): Remove.
(PLT_BTI_SMALL_ENTRY_SIZE, PLT_PAC_SMALL_ENTRY_SIZE): Update.
(elfNN_aarch64_small_plt0_pac_entry): Remove.
(elfNN_aarch64_small_plt0_bti_pac_entry): Remove.
(elfNN_aarch64_small_plt0_bti_entry): Update.
(elfNN_aarch64_small_plt_bti_entry): Update.
(elfNN_aarch64_small_plt_pac_entry): Update.
(elfNN_aarch64_tlsdesc_small_plt_bti_entry): Update.
(setup_plt_values): Setup new entries.
(elfNN_aarch64_finish_dynamic_sections): Remove size change.
(elfNN_aarch64_plt_sym_val): Likewise.
*** ld/ChangeLog ***
2019-04-25 Sudakshina Das <sudi.das@arm.com>
* testsuite/ld-aarch64/bti-pac-plt-1.d: Update.
* testsuite/ld-aarch64/bti-pac-plt-2.d: Update.
* testsuite/ld-aarch64/bti-plt-1.d: Update.
* testsuite/ld-aarch64/bti-plt-3.d: Update.
* testsuite/ld-aarch64/bti-plt-5.d: Update.
* testsuite/ld-aarch64/pac-plt-1.d: Update.
* testsuite/ld-aarch64/pac-plt-2.d: Update.
This tidies the remaining --no-print-map-discarded fails. h8300-elf
warns on a section without flags, and s12z doesn't support
--gc-sections.
bfd/
* elf32-s12z.c (elf_backend_can_gc_sections): Don't define
ld/
* testsuite/ld-gc/skip-map-discarded.s: Add section attributes.
* testsuite/lib/ld-lib.exp (check_gc_sections_available): Add
s12z to list of targets not supporting --gc-sections.
GNU as' Arm backend assumes each mnemonic has a single entry in the instruction table but VLDR (system register) and VSTR (system register) are different instructions than VLDR and VSTR. It is thus necessary to add some form of demultiplexing in the parser. It starts by creating a new operand type OP_VLDR which indicate that the operand is either the existing OP_RVSD operand or a system register. The function parse_operands () then tries these two cases in order, calling the new parse_sys_vldr_vstr for the second case.
Since the encoding function is specified in the instruction table entry, it also need to have some sort of demultiplexing. This is done in do_vldr_vstr which either calls the existing do_neon_ldr_str () or calls the new do_t_vldr_vstr_sysreg ().
A new internal relocation is needed as well since the offset has a shorter range than in other Thumb coprocessor instructions. Disassembly also requires special care since VSTR (system register) reuse the STC encoding with the coprocessor number 15. Armv8.1-M Mainline ARM manual states that coprocessor 8, 14 and 15 are reserved for floating-point and MVE instructions a feature bit check is added if the coprocessor number is one of this value and we are trying to match a coprocessor instruction (eg. STC) to forbid the match.
ChangeLog entries are as follows:
*** bfd/ChangeLog ***
2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
* reloc.c (BFD_RELOC_ARM_T32_VLDR_VSTR_OFF_IMM): New internal
relocation.
* bfd-in2.h: Regenerate.
* libbfd.h: Likewise.
*** gas/ChangeLog ***
2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/tc-arm.c (parse_sys_vldr_vstr): New function.
(OP_VLDR): New enum operand_parse_code enumerator.
(parse_operands): Add logic for OP_VLDR.
(do_t_vldr_vstr_sysreg): New function.
(do_vldr_vstr): Likewise.
(insns): Guard VLDR and VSTR by arm_ext_v4t for Thumb mode.
(md_apply_fix): Add bound check for VLDR and VSTR co-processor offset.
Add masking logic for BFD_RELOC_ARM_T32_VLDR_VSTR_OFF_IMM relocation.
* testsuite/gas/arm/archv8m_1m-cmse-main-bad.s: Add examples of bad
uses of VLDR and VSTR.
* testsuite/gas/arm/archv8m_1m-cmse-main-bad.l: Add error messages for
above bad uses.
* testsuite/gas/arm/archv8m_1m-cmse-main.s: Add examples of VLDR and
VSTR valid uses.
* testsuite/gas/arm/archv8m_1m-cmse-main.d: Add disassembly for the
above examples.
*** opcodes/ChangeLog ***
2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
* arm-dis.c (coprocessor_opcodes): Document new %J and %K format
specifier. Add entries for VLDR and VSTR of system registers.
(print_insn_coprocessor): Forbid coprocessor numbers 8, 14 and 15 in
coprocessor instructions on Armv8.1-M Mainline targets. Add handling
of %J and %K format specifier.
s patch is part of a series of patches to add support for Armv8.1-M Mainline instructions to binutils.
This patch adds support to the Scalar low overhead loop instructions:
LE
WLS
DLS
We also add a new assembler resolvable relocation bfd_reloc_code_real enum for the 12-bit branch offset used in these instructions.
ChangeLog entries are as follows:
*** bfd/ChnageLog ***
2019-04-12 Sudakshina Das <sudi.das@arm.com>
* reloc.c (BFD_RELOC_ARM_THUMB_LOOP12): New.
* bfd-in2.h: Regenerated.
* libbfd.h: Regenerated.
*** gas/ChangeLog ***
2019-04-12 Sudakshina Das <sudi.das@arm.com>
Andre Vieira <andre.simoesdiasvieira@arm.com>
* config/tc-arm.c (operand_parse_code): Add OP_LR and OP_oLR
for the LR operand and optional LR operand.
(parse_operands): Add switch cases for OP_LR and OP_oLR for
both type checking and value checking.
(encode_thumb32_addr_mode): New entries for DLS, WLS and LE.
(v8_1_loop_reloc): New helper function for handling labels
for the low overhead loop instructions.
(do_t_loloop): New function to encode DLS, WLS and LE.
(insns): New entries for WLS, DLS and LE.
(md_pcrel_from_section): New switch case
for BFD_RELOC_ARM_THUMB_LOOP12.
(md_appdy_fix): Likewise.
(tc_gen_reloc): Likewise.
* testsuite/gas/arm/armv8_1-m-tloop.s: New.
* testsuite/gas/arm/armv8_1-m-tloop.d: New.
* testsuite/gas/arm/armv8_1-m-tloop-bad.s: New.
* testsuite/gas/arm/armv8_1-m-tloop-bad.d: New.
* testsuite/gas/arm/armv8_1-m-tloop-bad.l: New.
*** opcodes/ChangeLog ***
2019-04-12 Sudakshina Das <sudi.das@arm.com>
* arm-dis.c (print_insn_thumb32): Updated to accept new %P
and %Q patterns.
s patch is part of a series of patches to add support for Armv8.1-M Mainline instructions to binutils.
This patch adds the BFCSEL instruction. It also adds a local relocation with a new bfd_reloc_code_real enum.
ChangeLog entries are as follows:
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* reloc.c (BFD_RELOC_THUMB_PCREL_BFCSEL): New relocation.
* bfd-in2.h: Regenerated.
* libbfd.h: Likewise.
*** gas/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
Andre Vieira <andre.simoesdiasvieira@arm.com>
* config/tc-arm.c (T16_32_TAB): New entriy for bfcsel.
(do_t_v8_1_branch): New switch case for bfcsel.
(toU): Define.
(insns): New instruction for bfcsel.
(md_pcrel_from_section): New switch case
for BFD_RELOC_THUMB_PCREL_BFCSEL.
(md_appdy_fix): Likewise
(tc_gen_reloc): Likewise.
* testsuite/gas/arm/armv8_1-m-bfcsel.d: New.
* testsuite/gas/arm/armv8_1-m-bfcsel.s: New.
*** ld/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* testsuite/ld-arm/bfcsel.s: New.
* testsuite/ld-arm/bfcsel.d: New.
* testsuite/ld-arm/arm-elf.exp: Add above test.
*** opcodes/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* arm-dis.c (thumb32_opcodes): New instruction bfcsel.
(print_insn_thumb32): Edit the switch case for %Z.
This patch is part of a series of patches to add support for Armv8.1-M Mainline
instructions to binutils.
This adds infrastructure for the BFCSEL instructions which is one of the first
instructions in Arm that have more than one relocations in them.
This adds a new relocation R_ARM_THM_BF12.
The inconsistency between external R_ARM_THM_BF12 and internal
BFD_RELOC_ARM_THUMB_BF13 is because internally we count the static bit-0 of the
immediate and we don't externally.
ChangeLog entries are as follows :
ChangeLog entries are as follows :
*** bfd/ChnageLog ***
2019-04-04 Sudakshina Das <sudi.das@arm.com>
* reloc.c (BFD_RELOC_ARM_THUMB_BF13): New.
* bfd-in2.h: Regenerated.
* libbfd.h: Regenerated.
* elf32-arm.c (elf32_arm_howto_table_1): New entry for R_ARM_THM_BF13.
(elf32_arm_reloc_map elf32_arm_reloc_map): Map BFD_RELOC_ARM_THUMB_BF13
and R_ARM_THM_BF12 together.
(elf32_arm_final_link_relocate): New switch case for R_ARM_THM_BF13.
*** elfcpp/ChangeLog ***
2019-04-04 Sudakshina Das <sudi.das@arm.com>
* arm.h (R_ARM_THM_BF12): New relocation code.
*** gas/ChangeLog ***
2019-04-04 Sudakshina Das <sudi.das@arm.com>
* config/tc-arm.c (md_pcrel_from_section): New switch case for
BFD_RELOC_ARM_THUMB_BF13.
(md_appdy_fix): Likewise.
(tc_gen_reloc): Likewise.
*** include/ChangeLog ***
2019-04-04 Sudakshina Das <sudi.das@arm.com>
* elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF12.
*** opcodes/ChangeLog ***
2019-04-04 Sudakshina Das <sudi.das@arm.com>
* arm-dis.c (print_insn_thumb32): Updated to accept new %Z pattern.
This patch is part of a series of patches to add support for Armv8.1-M Mainline instructions to binutils.
This adds infrastructure for the BFL instructions which is one of the first instructions in Arm that have more than one relocations in them.
This adds a new relocation R_ARM_THM_BF18.
The inconsistency between external R_ARM_THM_BF18 and internal
BFD_RELOC_ARM_THUMB_BF19 is because internally we count the static bit-0 of the immediate and we don't externally.
ChangeLog entries are as follows :
*** bfd/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* reloc.c (BFD_RELOC_ARM_THUMB_BF19): New
* libbfd.h: Regenerated.
* bfd-in2.h: Regenerated.
* bfd-elf32-arm.c (elf32_arm_howto_table_1): New entry for R_ARM_THM_BF18.
(elf32_arm_reloc_map elf32_arm_reloc_map): Map BFD_RELOC_ARM_THUMB_BF19
and R_ARM_THM_BF18 together.
(elf32_arm_final_link_relocate): New switch case for R_ARM_THM_BF19.
*** elfcpp/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* arm.h (R_ARM_THM_BF18): New relocation code.
*** gas/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* config/tc-arm.c (md_pcrel_from_section): New switch case for
BFD_RELOC_ARM_THUMB_BF19.
(md_appdy_fix): Likewise.
(tc_gen_reloc): Likewise.
*** include/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF18.
*** opcodes/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* arm-dis.c (print_insn_thumb32): Updated to accept new %Y pattern.
This patch is part of a series of patches to add support for Armv8.1-M Mainline instructions to binutils.
This adds infrastructure for the BF instructions which is one of the first instructions in Arm that have more than one relocations in them.
This is the third infrastructure patch that adds a new relocation R_ARM_THM_BF16.
The inconsistency between external R_ARM_THM_BF16 and internal
BFD_RELOC_ARM_THUMB_BF17 is because internally we count the static bit-0 of the immediate and we don't externally.
ChangeLog entries are as follows :
*** bfd/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* reloc.c (BFD_RELOC_ARM_THUMB_BF17): New enum.
* bfd-in2.h: Regenerated.
* libbfd.h: Regenerated.
* bfd-elf32-arm.c (elf32_arm_howto_table_1): New entry for R_ARM_THM_BF16.
(elf32_arm_reloc_map elf32_arm_reloc_map): Map BFD_RELOC_ARM_THUMB_BF17
and R_ARM_THM_BF16 together.
(get_value_helper): New reloc helper.
(elf32_arm_final_link_relocate): New switch case for R_ARM_THM_BF16.
*** elfcpp/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* arm.h (R_ARM_THM_BF16): New relocation code.
*** gas/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* config/tc-arm.c (md_pcrel_from_section): New switch case for
BFD_RELOC_ARM_THUMB_BF17.
(md_appdy_fix): Likewise.
(tc_gen_reloc): Likewise.
*** include/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF16.
*** opcodes/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* arm-dis.c (print_insn_thumb32): Updated to accept new %W pattern.
This patch is part of a series of patches to add support for Armv8.1-M Mainline
instructions to binutils.
This adds infrastructure for the Branch Future instructions (BF, BFX, BFL, BFLX,
BFCSEL). These are the first instructions in ARM that have more than one
relocations in them.
This is the first infrastructure patch that adds a new bfd_reloc_code_real enum
for the fallback branch offset.
This is common for all such instructions and needs to be resolvable by the
assembler.
ChangeLog entries are as follows :
*** bfd/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* reloc.c (BFD_RELOC_THUMB_PCREL_BRANCH5): New enum.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
*** gas/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* config/tc-arm.c (md_pcrel_from_section): New switch case
for BFD_RELOC_THUMB_PCREL_BRANCH5.
(v8_1_branch_value_check): New function to check branch
offsets.
(md_appdy_fix): New switch case for
BFD_RELOC_THUMB_PCREL_BRANCH5.
(tc_gen_reloc): Likewise.
*** opcodes/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* arm-dis.c (print_insn_thumb32): Updated to accept new %G pattern.
The patch is straightforward, it does the following:
- support the new Tag_CPU_arch build attribute value, ie.:
+ declare the new value
+ update all the asserts forcing logic to be reviewed for new
architectures
+ create a corresponding bfd_mach_arm_8_1M_MAIN enumerator in bfd and
add mapping from Tag_CPU_arch to it
+ teach readelf about new Tag_CPU_arch value
- declare armv8.1-m.main as a supported architecture value
- define Armv8.1-M Mainline in terms of feature bits available
- tell objdump mapping from bfd_mach_arm_8_1M_MAIN enumerator to feature
bits available
- update architecture-specific logic in gas and bfd guarded by the
asserts mentioned above.
- tests for all the above
ChangeLog entries are as follows:
*** bfd/ChangeLog ***
2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
* archures.c (bfd_mach_arm_8_1M_MAIN): Define.
* bfd-in2.h: Regenerate.
* cpu-arm.c (arch_info_struct): Add entry for Armv8.1-M Mainline.
* elf32-arm.c (using_thumb_only): Return true for Armv8.1-M Mainline
and update assert.
(using_thumb2): Likewise.
(using_thumb2_bl): Update assert.
(arch_has_arm_nop): Likewise.
(bfd_arm_get_mach_from_attributes): Add case for Armv8.1-M Mainline.
(tag_cpu_arch_combine): Add logic for Armv8.1-M Mainline merging.
*** binutils/ChangeLog ***
2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
* readelf.c (arm_attr_tag_CPU_arch): Add entry for Armv8.1-M Mainline.
*** gas/ChangeLog ***
2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/tc-arm.c (cpu_arch_ver): Add entry for Armv8.1-M Mainline
Tag_CPU_arch build attribute value. Reindent.
(get_aeabi_cpu_arch_from_fset): Update assert.
(aeabi_set_public_attributes): Update assert for Tag_DIV_use logic.
* testsuite/gas/arm/attr-march-armv8_1-m.main.d: New test.
*** include/ChangeLog ***
2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
* elf/arm.h (TAG_CPU_ARCH_V8_1M_MAIN): new macro.
(MAX_TAG_CPU_ARCH): Set value to above macro.
* opcode/arm.h (ARM_EXT2_V8_1M_MAIN): New macro.
(ARM_AEXT_V8_1M_MAIN): Likewise.
(ARM_AEXT2_V8_1M_MAIN): Likewise.
(ARM_ARCH_V8_1M_MAIN): Likewise.
*** ld/ChangeLog ***
2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
* testsuite/ld-arm/attr-merge-13.attr: New test.
* testsuite/ld-arm/attr-merge-13a.s: New test.
* testsuite/ld-arm/attr-merge-13b.s: New test.
*** opcodes/ChangeLog ***
2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
* arm-dis.c (select_arm_features): Add logic for Armv8.1-M Mainline.
When using DF_BIND_NOW on AArch64 we don't reserve the GOT slot for a TLSDESC,
but we still emitted DT_TLSDESC_GOT and DT_TLSDESC_PLT. This caused random
memory corruption as the "special" value of (bfd_vma)-1 would be set for
dt_tlsdesc_got.
Since we don't have a value of dt_tlsdesc_got I also don't emit DT_TLSDESC_PLT
now becuase it would point to an incomplete PLT. To be able to write the PLT
entry DT_TLSDESC_GOT is needed and since we don't have one we can't write the
PLT entry either.
It is my understanding that GLIBC doesn't need these two entries when not lazy
loading. Conversely AArch32 does not reserve neither the GOT not the PLT slot
when doing DF_BIND_NOW.
AArch32 does not need these checks because these values are initialized to 0
and so the if (...) checks don't pass, but on AArch64 these are initialized
to (bfd_vma)-1 and thus we need some extra checks.
bfd/ChangeLog:
PR ld/24302
* elfnn-aarch64.c (elfNN_aarch64_size_dynamic_sections): Don't emit
DT_TLSDESC_GOT and DT_TLSDESC_PLT when DF_BIND_NOW.
(elfNN_aarch64_finish_dynamic_sections): Don't write PLT if DF_BIND_NOW.
ld/ChangeLog:
PR ld/24302
* testsuite/ld-aarch64/aarch64-elf.exp: Add new test.
* testsuite/ld-aarch64/tls-relax-gdesc-le-now.d: New test.
x86_64-rdos is one of the few x86_64 targets that is 64-bit only and
the x86_64 configure entries don't depend on elf-vxworks.lo. This
results in undefined references from elfxx-x86.o.
* configure.ac (elfxx_x86): Define and use.
* configure: Regenerate.
This fixes a glib build failure reported in PR 24389. Using ld -b binary
creates an object file with no elf header flags set which has the wrong ABI
info for riscv64-linux. But the file also has no code sections, so I added
code borrowed from the arm port that only checks the ELF header ABI flags if
there is a code section.
bfd/
PR 24389
* elfnn-riscv.c (_bfd_riscv_elf_merge_private_bfd_data): Move read of
ELF header flags to after check for ELF object file. Loop through
sections looking for code sections, if none, then skip ABI checks.
shrink_dynamic_reloc_sections must remove PLT entry that was created for
an undefined weak symbol in the presence of --export-dynamic option when
relaxation coalesces literals pointing to that symbol. This fixes the
following assertion:
ld: BFD (GNU Binutils) 2.31.1 internal error, aborting at
elf32-xtensa.c:3292 in elf_xtensa_finish_dynamic_sections
2019-03-29 Max Filippov <jcmvbkbc@gmail.com>
bfd/
* elf32-xtensa.c (shrink_dynamic_reloc_sections): Add
info->export_dynamic to the conditional.
ld/
* testsuite/ld-xtensa/relax-undef-weak-pie-export-dynamic.d: New
test definition.
* testsuite/ld-xtensa/xtensa.exp
(relax-undef-weak-pie-export-dynamic): Add new test.
sym is only set for local symbols. h is only set for global symbols. Gas
won't let me create a global section symbol, but bfd appears to have some
support for that, and I can't rule out that other assemblers might do this.
So we need to support both, and verify sym and h are non-NULL before using.
bfd/
PR 24365
* elfnn-riscv.c (riscv_elf_relocate_section): For STT_SECTION check,
verify sym non-NULL before using. Add identical check using h.
The AArch64 linker option to turn on BTI (--force-bti) warns in case there are
input objects which have a missing GNU NOTE section for BTI. This patch is trying
to improve the warnings that come out.
In order to do so, I propose adding a new argument to elf_merge_gnu_properties
and the backend function merge_gnu_properties. This new argument makes sure
that we now pass both the objects along with the properties to which they
belong to. The x86 backend function has also been updated to match this
change.
*** bfd/ChangeLog ***
2019-03-21 Sudakshina Das <sudi.das@arm.com>
* elf-bfd.h (struct elf_backend_data): Add argument to
merge_gnu_properties.
* elf-properties.c (elf_merge_gnu_properties): Add argument to
itself and while calling bed->merge_gnu_properties.
(elf_merge_gnu_property_list): Update the calls for
elf_merge_gnu_properties.
* elfnn-aarch64.c (elfNN_aarch64_merge_gnu_properties): Update handling
of --force-bti warning and add argument.
* elfxx-aarch64.c (_bfd_aarch64_elf_link_setup_gnu_properties): Add
warning.
* elfxx-x86.c (_bfd_x86_elf_merge_gnu_properties): Add argument.
* elfxx-x86.h (_bfd_x86_elf_merge_gnu_properties): Likewise in
declaration.
*** ld/ChangeLog ***
2019-03-21 Sudakshina Das <sudi.das@arm.com>
* testsuite/ld-aarch64/aarch64-elf.exp: Add new test.
* testsuite/ld-aarch64/bti-plt-1.s: Add .ifdef for PAC note section.
* testsuite/ld-aarch64/bti-plt-6.d: Update warning.
* testsuite/ld-aarch64/bti-plt-7.d: Likewise.
* testsuite/ld-aarch64/bti-warn.d: New test.
This patch add support for elf_backend_fixup_gnu_properties for GNU
property support for AArch64. The new AArch64 specific definition
_bfd_aarch64_elf_link_fixup_gnu_properties goes through the property
list to find AArch64 type properties and removes the properties that
are marked as "property_remove".
*** bfd/ChangeLog ***
2019-03-20 Sudakshina Das <sudi.das@arm.com>
* elfxx-aarch64.c (_bfd_aarch64_elf_link_fixup_gnu_properties): Define.
* elfxx-aarch64.h (_bfd_aarch64_elf_link_fixup_gnu_properties): Declare.
(elf_backend_fixup_gnu_properties): Define for AArch64.
This one looks to be a bug going back to 2009, git commit e054468f6c
"STT_GNU_IFUNC support for PowerPC". That bug was carried over with
git commit 49c09209d0 "Rearrange PLT reloc output on powerpc".
If the refcount for an ifunc local sym plt entry was zero,
ppc_elf_size_dynamic_sections would correctly set plt.offset to -1 but
leave glink_offset uninitialized. That leads to occasional segfaults
(which can be made solid with MALLOC_PERTURB_=1 when using glibc).
So, guard the write_glink_stub call with plt.offset != -1. Also,
remove the totally ineffective attempt at writing multiple-use glink
stubs only once.
PR 24355
* elf32-ppc.c (ppc_finish_symbols): Don't call write_glink_stub
for local iplt syms with ent->plt.offset == -1. Remove ineffective
attempt at writing glink stubs only once.
Reverts commit 1ff31e135f, fixing the problem more generally. There
are likely other place that will segfault on a NULL section.
PR 24337
* elf.c (_bfd_elf_rela_local_sym): Revert last change.
(_bfd_elf_rel_local_sym): Likewise.
* elflink.c (elf_link_input_bfd): Use bfd_und_section for
section of symbols with unrecognized shndx.
For LTO, a symbol may defined in discarded section. We should mark it
as undefined so that LTO plugin will make IR definition available.
PR ld/24267
* coffgen.c (_bfd_coff_section_already_linked): Skip discarded
section.
* cofflink.c (coff_link_add_symbols): Check for symbols defined
in discarded section.
PR 24334
* dwarf2.c (struct dwarf2_debug): Add sec_vma_count field.
(save_section_vma): Initialise field to the number of entries in
the sec_vma table.
(section_vma_same): Check that the number of entries in the
sec_vma table matches the number of sections in the bfd.
PR 24332
* elflink.c (elf_link_add_object_symbols): Add new local variable
extversym_end. Initialise it to point to the end of the version
symbol table, if present. Check it when initialising and updating
the ever pointer.
This is part of the patch series to add support for BTI and
PAC in AArch64 linker.
1) This patch adds new definitions of PAC enabled PLTs
and both BTI and PAC enabled PLTs.
2) It also defines the new dynamic tag DT_AARCH64_PAC_PLT
for the PAC enabled PLTs.
3) This patch adds a new ld command line option: --pac-plt.
In the presence of this option, the linker uses the PAC
enabled PLTs and marks with DT_AARCH64_PAC_PLT.
4) In case both BTI and PAC are enabled the linker should
pick PLTs enabled with both and also use dynamic tags for both.
All these are made according to the new AArch64 ELF ABI
https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4
*** bfd/ChangeLog ***
2019-03-13 Sudakshina Das <sudi.das@arm.com>
* elfnn-aarch64.c (PLT_PAC_ENTRY_SIZE, PLT_PAC_SMALL_ENTRY_SIZE): New.
(PLT_BTI_PAC_ENTRY_SIZE, PLT_BTI_PAC_SMALL_ENTRY_SIZE): New.
(setup_plt_values): Account for PAC or PAC and BTI enabled PLTs.
(elfNN_aarch64_size_dynamic_sections): Add checks for PLT_BTI_PAC
and PLT_PAC_PLT.
(elfNN_aarch64_finish_dynamic_sections): Account for PLT_BTI_PAC.
(get_plt_type): Add case for DT_AARCH64_PAC_PLT.
(elfNN_aarch64_plt_sym_val): Add cases for PLT_BTI_PAC and PLT_PAC.
*** binutils/ChangeLog ***
2019-03-13 Sudakshina Das <sudi.das@arm.com>
* readelf.c (get_aarch64_dynamic_type): Add case for
DT_AARCH64_PAC_PLT.
(dynamic_section_aarch64_val): Likewise.
*** include/ChangeLog ***
2019-03-13 Sudakshina Das <sudi.das@arm.com>
* elf/aarch64.h (DT_AARCH64_PAC_PLT): New.
*** ld/ChangeLog ***
2019-03-13 Sudakshina Das <sudi.das@arm.com>
* NEWS: Document --pac-plt.
* emultempl/aarch64elf.em (OPTION_PAC_PLT): New.
(PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS): Add pac-plt.
(PARSE_AND_LIST_ARGS_CASES): Handle OPTION_PAC_PLT.
* testsuite/ld-aarch64/aarch64-elf.exp: Add the following tests.
* testsuite/ld-aarch64/bti-pac-plt-1.d: New test.
* testsuite/ld-aarch64/bti-pac-plt-2.d: New test.
* testsuite/ld-aarch64/pac-plt-1.d: New test.
* testsuite/ld-aarch64/pac-plt-2.d: New test.
* testsuite/ld-aarch64/bti-plt-1.s: Add .ifndef directive.
This is part of the patch series to add support for BTI and
PAC in AArch64 linker.
1) This patch adds a new ld command line option: --force-bti.
In the presence of this option, the linker enables BTI with the
GNU_PROPERTY_AARCH64_FEATURE_1_BTI feature. This gives out warning
in case of missing gnu notes for BTI in inputs.
2) It also defines a new set of BTI enabled PLTs. These are used either
when all the inputs are marked with GNU_PROPERTY_AARCH64_FEATURE_1_BTI
or when the new --force-bti option is used. This required adding new
fields in elf_aarch64_link_hash_table so that we could make the PLT
related information more generic.
3) It also defines a dynamic tag DT_AARCH64_BTI_PLT. The linker uses
this whenever it picks BTI enabled PLTs.
All these are made according to the new AArch64 ELF ABI
https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4
*** bfd/ChangeLog ***
2019-03-13 Sudakshina Das <sudi.das@arm.com>
Szabolcs Nagy <szabolcs.nagy@arm.com>
* bfd-in.h (aarch64_plt_type, aarch64_enable_bti_type): New.
(aarch64_bti_pac_info): New.
(bfd_elf64_aarch64_set_options): Add aarch64_bti_pac_info argument.
(bfd_elf32_aarch64_set_options): Likewise.
* bfd-in2.h: Regenerate
* elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): New.
(PLT_BTI_SMALL_ENTRY_SIZE, PLT_BTI_TLSDESC_ENTRY_SIZE): New.
(elfNN_aarch64_small_plt0_bti_entry): New.
(elfNN_aarch64_small_plt_bti_entry): New.
(elfNN_aarch64_tlsdesc_small_plt_bti_entry): New.
(elf_aarch64_obj_tdata): Add no_bti_warn and plt_type fields.
(elf_aarch64_link_hash_table): Add plt0_entry, plt_entry and
tlsdesc_plt_entry_size fields.
(elfNN_aarch64_link_hash_table_create): Initialise the new fields.
(setup_plt_values): New helper function.
(bfd_elfNN_aarch64_set_options): Use new bp_info to set plt sizes and
bti enable type.
(elfNN_aarch64_allocate_dynrelocs): Use new size members instead of
fixed macros.
(elfNN_aarch64_size_dynamic_sections): Likewise and add checks.
(elfNN_aarch64_create_small_pltn_entry): Use new generic pointers
to plt stubs instead of fixed ones and update filling them according
to the need for bti.
(elfNN_aarch64_init_small_plt0_entry): Likewise.
(elfNN_aarch64_finish_dynamic_sections): Likewise.
(get_plt_type, elfNN_aarch64_get_synthetic_symtab): New.
(elfNN_aarch64_plt_sym_val): Update size accordingly.
(elfNN_aarch64_link_setup_gnu_properties): Set up plts if BTI GNU NOTE
is set.
(bfd_elfNN_get_synthetic_symtab): Define.
(elfNN_aarch64_merge_gnu_properties): Give out warning with --force-bti
and mising BTI NOTE SECTION.
*** binutils/ChangeLog ***
2019-03-13 Sudakshina Das <sudi.das@arm.com>
Szabolcs Nagy <szabolcs.nagy@arm.com>
* readelf.c (get_aarch64_dynamic_type): New.
(get_dynamic_type): Use above for EM_AARCH64.
(dynamic_section_aarch64_val): New.
(process_dynamic_section): Use above for EM_AARCH64.
*** include/ChangeLog ***
2019-03-13 Sudakshina Das <sudi.das@arm.com>
Szabolcs Nagy <szabolcs.nagy@arm.com>
* elf/aarch64.h (DT_AARCH64_BTI_PLT): New.
*** ld/ChangeLog ***
2019-03-13 Sudakshina Das <sudi.das@arm.com>
Szabolcs Nagy <szabolcs.nagy@arm.com>
* NEWS: Document --force-bti.
* emultempl/aarch64elf.em (plt_type, bti_type, OPTION_FORCE_BTI): New.
(PARSE_AND_LIST_SHORTOPTS, PARSE_AND_LIST_OPTIONS): Add force-bti.
(PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FORCE_BTI.
* testsuite/ld-aarch64/aarch64-elf.exp: Add all the tests below.
* testsuite/ld-aarch64/bti-plt-1.d: New test.
* testsuite/ld-aarch64/bti-plt-1.s: New test.
* testsuite/ld-aarch64/bti-plt-2.s: New test.
* testsuite/ld-aarch64/bti-plt-2.d: New test.
* testsuite/ld-aarch64/bti-plt-3.d: New test.
* testsuite/ld-aarch64/bti-plt-4.d: New test.
* testsuite/ld-aarch64/bti-plt-5.d: New test.
* testsuite/ld-aarch64/bti-plt-6.d: New test.
* testsuite/ld-aarch64/bti-plt-7.d: New test.
* testsuite/ld-aarch64/bti-plt-so.s: New test.
* testsuite/ld-aarch64/bti-plt.ld: New test.
This is part of the patch series to add support for BTI and
PAC in AArch64 linker.
This patch implements the following:
1) This extends in the gnu property support in the linker for
AArch64 by defining backend hooks for elf_backend_setup_gnu_properties,
elf_backend_merge_gnu_properties and elf_backend_parse_gnu_properties.
2) It defines AArch64 specific GNU property
GNU_PROPERTY_AARCH64_FEATURE_1_AND and 2 bit for BTI and PAC in it.
3) It also adds support in readelf.c to read and print these new
GNU properties in AArch64.
All these are made according to the new AArch64 ELF ABI
https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4
*** bfd/ChangeLog ***
2019-03-13 Sudakshina Das <sudi.das@arm.com>
* elf-properties.c (_bfd_elf_link_setup_gnu_properties): Exclude
linker created inputs from merge.
* elfnn-aarch64.c (struct elf_aarch64_obj_tdata): Add field for
GNU_PROPERTY_AARCH64_FEATURE_1_AND properties.
(elfNN_aarch64_link_setup_gnu_properties): New.
(elfNN_aarch64_merge_gnu_properties): New.
(elf_backend_setup_gnu_properties): Define for AArch64.
(elf_backend_merge_gnu_properties): Likewise.
* elfxx-aarch64.c (_bfd_aarch64_elf_link_setup_gnu_properties): Define.
(_bfd_aarch64_elf_parse_gnu_properties): Define.
(_bfd_aarch64_elf_merge_gnu_properties): Define.
* elfxx-aarch64.h (_bfd_aarch64_elf_link_setup_gnu_properties): Declare.
(_bfd_aarch64_elf_parse_gnu_properties): Declare.
(_bfd_aarch64_elf_merge_gnu_properties): Declare.
(elf_backend_parse_gnu_properties): Define for AArch64.
*** binutils/ChangeLog ***
2019-03-13 Sudakshina Das <sudi.das@arm.com>
* readelf.c (decode_aarch64_feature_1_and): New.
(print_gnu_property_note): Add case for AArch64 gnu notes.
*** include/ChangeLog ***
2019-03-13 Sudakshina Das <sudi.das@arm.com>
* elf/common.h (GNU_PROPERTY_AARCH64_FEATURE_1_AND): New.
(GNU_PROPERTY_AARCH64_FEATURE_1_BTI): New.
(GNU_PROPERTY_AARCH64_FEATURE_1_PAC): New.
*** ld/ChangeLog ***
2019-03-13 Sudakshina Das <sudi.das@arm.com>
* NEWS: Document GNU_PROPERTY_AARCH64_FEATURE_1_BTI and
GNU_PROPERTY_AARCH64_FEATURE_1_PAC.
* testsuite/ld-aarch64/aarch64-elf.exp: Add run commands for new tests.
* testsuite/ld-aarch64/property-bti-pac1.d: New test.
* testsuite/ld-aarch64/property-bti-pac1.s: New test.
* testsuite/ld-aarch64/property-bti-pac2.d: New test.
* testsuite/ld-aarch64/property-bti-pac2.s: New test.
* testsuite/ld-aarch64/property-bti-pac3.d: New test.
There should be no AND properties if some input doesn't have them. We
should set IBT and SHSTK properties for -z ibt and -z shstk if needed.
bfd/
PR ld/24322
* elfxx-x86.c (_bfd_x86_elf_merge_gnu_properties): Properly
merge GNU_PROPERTY_X86_FEATURE_1_[IBT|SHSTK].
ld/
PR ld/24322
* testsuite/ld-i386/i386.exp: Run PR ld/24322 tests.
* testsuite/ld-x86-64/x86-64.exp: Likewise.
* testsuite/ld-i386/pr24322a.d: New file.
* testsuite/ld-i386/pr24322b.d: Likewise.
* testsuite/ld-x86-64/pr24322a-x32.d: Likewise.
* testsuite/ld-x86-64/pr24322a.d: Likewise.
* testsuite/ld-x86-64/pr24322b-x32.d: Likewise.
* testsuite/ld-x86-64/pr24322b.d: Likewise.
* testsuite/ld-x86-64/pr24322a.s: Likewise.
* testsuite/ld-x86-64/pr24322b.s: Likewise.
* testsuite/ld-x86-64/pr24322c.s: Likewise.
Compressed debug sections can have uncompressed sizes that exceed the
original file size, so we can't use bfd_get_file_size. objdump also
used bfd_get_file_size to limit reloc section size, but I believe the
underlying bug causing the PR22508 out of bounds buffer access was
that we had an integer overflow when calculating the reloc buffer
size. I've fixed that instead in most of the backends, som and
vms-alpha being the exceptions. SOM and vmd-alpha have rather more
serious bugs in their slurp_relocs routines that would need fixing
first if we want to fuss about making them safe against fuzzed object
files.
The patch also fixes a number of other potential overflows by using
the bfd_alloc2/malloc2/zalloc2 memory allocation functions.
bfd/
* coffcode.h (buy_and_read): Delete unnecessary forward decl. Add
nmemb parameter. Use bfd_alloc2.
(coff_slurp_line_table): Use bfd_alloc2. Update buy_and_read calls.
Delete assertion.
(coff_slurp_symbol_table): Use bfd_alloc2 and bfd_zalloc2.
(coff_slurp_reloc_table): Use bfd_alloc2. Update buy_and_read calls.
* coffgen.c (coff_get_reloc_upper_bound): Ensure size calculation
doesn't overflow.
* elf.c (bfd_section_from_shdr): Use bfd_zalloc2. Style fix.
(assign_section_numbers): Style fix.
(swap_out_syms): Use bfd_malloc2.
(_bfd_elf_get_reloc_upper_bound): Ensure size calculation doesn't
overflow.
(_bfd_elf_make_empty_symbol): Style fix.
(elfobj_grok_stapsdt_note_1): Formatting.
* elfcode.h (elf_object_p): Use bfd_alloc2.
(elf_write_relocs, elf_write_shdrs_and_ehdr): Likewise.
(elf_slurp_symbol_table): Use bfd_zalloc2.
(elf_slurp_reloc_table): Use bfd_alloc2.
(_bfd_elf_bfd_from_remote_memory): Use bfd_malloc2.
* elf64-sparc (elf64_sparc_get_reloc_upper_bound): Ensure
size calculation doesn't overflow.
(elf64_sparc_get_dynamic_reloc_upper_bound): Likewise.
* mach-o.c (bfd_mach_o_get_reloc_upper_bound): Likewise.
* pdp11.c (get_reloc_upper_bound): Copy aoutx.h version.
binutils/
* objdump.c (load_specific_debug_section): Don't compare section
size against file size.
(dump_relocs_in_section): Don't compare reloc size against file size.
Print "failed to read relocs" on bfd_get_reloc_upper_bound error.
Not padding string merge section output to its alignment can cause
failures of the S-record tests when input string merge sections are
padded, since the ELF linker output for the single string section
would shrink compared to the SREC linker output. That might result in
following sections having different addresses.
On the other hand, padding string merge section output when input
string merge sections are *not* padded can also cause failures, in
this case due to the ELF linker output for the string section being
larger (due to padding) than the SREC linker output.
It would be better to write a more robust test, but it is also nice
to leave input unchanged when no string merges occur.
PR 24311
* merge.c (merge_strings): Return secinfo. Don't pad section
to alignment here.
(_bfd_merge_sections): Pad section to alignment here, if input
sections contributing to merged output all pad to alignment.
Formatting.
* dwarf2.c (_bfd_dwarf2_find_symbol_bias): Check for a NULL symbol
table pointer.
* coffgen.c (coff_find_nearest_line_with_names): Do not call
_bfd_dwarf2_find_symbol_bias if there is no symbol table available.
https://bugzilla.redhat.com/show_bug.cgi?id=1685727
According to the specification for the CIE entries, when the CIE version is 1 then
the return address register field is always 1 byte. Readelf does this correctly in
read_cie in dwarf.c but ld does this incorrectly and always tries to read a
skip_leb128. If the value here has the top bit set then ld will incorrectly read
at least another byte, causing either an assert failure or an incorrect address to
be used in eh_frame.
I'm not sure how to generate a generic test for this as I'd need to write assembly,
and it's a bit hard to trigger. Essentially the relocated value needs to start with
something that & 0x70 != 0x10 while trying to write a personality.
bfd/ChangeLog:
* elf-eh-frame.c (_bfd_elf_write_section_eh_frame): Correct CIE parse.
Skip symbol defined by linker when checking copy reloc on protected
symbol.
bfd/
PR ld/24276
* elf64-x86-64.c (elf_x86_64_check_relocs): Skip symbol defined
by linker when checking copy reloc on protected symbol.
ld/
PR ld/24276
* testsuite/ld-i386/i386.exp: Run PR ld/24276 test.
* testsuite/ld-x86-64/x86-64.exp: Likewise.
* testsuite/ld-i386/pr24276.dso: New file.
* testsuite/ld-i386/pr24276.warn: Likewise.
* testsuite/ld-x86-64/pr24276.dso: Likewise.
* testsuite/ld-x86-64/pr24276.warn: Likewise.
Big section alignment requirements between source and destination of a
long call can result in making call range bigger than what's reachable
by the call opcode. Add biggest section alignment of sections between
the call site and call destination to the call distance when making
long call relaxation decision.
2019-02-20 Eric Tsai <erictsai@cadence.com>
bfd/
* elf32-xtensa.c (is_resolvable_asm_expansion): Scan output
sections between the call site and call destination and adjust
call distance by the largest alignment.
ld/
* testsuite/ld-xtensa/call_overflow.d: New test definition.
* testsuite/ld-xtensa/call_overflow1.s: New test source.
* testsuite/ld-xtensa/call_overflow2.s: New test source.
* testsuite/ld-xtensa/call_overflow3.s: New test source.
* testsuite/ld-xtensa/xtensa.exp: Add call_overflow test.
Used for the AArch64 pointer authentication code mask registers in Arm v8.3-a.
NT_ARM_PAC_MASK matches the value in Linux include/uapi/linux/elf.h
include/ChangeLog:
* elf/common.h (NT_ARM_PAC_MASK): Add define.
bfd/ChangeLog:
* elf-bfd.h (elfcore_write_aarch_pauth): Add declaration.
* elf.c (elfcore_grok_aarch_pauth): New function.
(elfcore_grok_note): Check for NT_ARM_PAC_MASK.
(elfcore_write_aarch_pauth): New function.
(elfcore_write_register_note): Check for AArch64 pauth section.
git a31b8bd9a0 introduced a warning (depending on your system
headers).
PR 24225
* elf32-nios2.c (nios2_elf32_relocate_section): Check asprintf
return value.
PR 24236
* archive64.c (_bfd_archive_64_bit_slurp_armap): Move code adding
sentinel NUL to string buffer nearer to loop where it is used.
Don't go past sentinel when scanning strings, and don't write
NUL again.
* archive.c (do_slurp_coff_armap): Simplify string handling to
archive64.c style.
Recent gcc commit b4371b277f1e ("[ARC] Enable init_array support")
inhibits DT_"INIT,FINI} in favor of DT_{INIT,FINI}ARRAY.
Even prior to that, it seems ARC port is the only one with this
special DT_INIT/FINI handling in linker emulation. Removing it
doesn't seem to change any uClibc/glibc testsuite results,
so this can RIP anyways.
bfd/
2019-02-01 Vineet Gupta <vgupta@synopsys.com>
* elf32-arc.c: Delete init_str, fini_str
ld/
2019-02-01 Vineet Gupta <vgupta@synopsys.com>
* emultempl/arclinux.em : Delete special INIT/FINI handling.
This was always supposed to be an error. Code emitted by gcc for
inline PLT calls assumes PLT is an array of addresses.
* elf32-ppc.c (ppc_elf_relocate_section): Add %X to "unsupported
for bss-plt" warning to make it an error.
This fixes the last ld failures on SPARC64/Linux:
FAIL: Run pr18841 with libpr18841b.so
FAIL: Run pr18841 with libpr18841c.so
FAIL: Run pr18841 with libpr18841bn.so (-z now)
FAIL: Run pr18841 with libpr18841cn.so (-z now)
by mimicing what has been done on x86-64 and Aarch64 to fix the PR.
bfd/
PR ld/18841
* elf32-sparc.c (elf32_sparc_reloc_type_class): Return
reloc_class_ifunc for ifunc symbols.
* elf64-sparc.c (elf64_sparc_reloc_type_class): Likewise.
bfd * config.bfd: Move the powerpc-lynxos and powerpc-windiss targets
into the definitely obsolete list.
binutils * README-how-to-make-a-release: Add a note about updating the
obsolete targets in the bfd/config.bfd file.
commit bd7ab16b45
Author: H.J. Lu <hjl.tools@gmail.com>
Date: Tue Feb 13 07:34:22 2018 -0800
x86-64: Generate branch with PLT32 relocation
removed check R_X86_64_PC32 relocation against protected symbols in
shared objects. Since elf_x86_64_check_relocs is called after we
have seen all input files, we can check for PC-relative relocations in
elf_x86_64_check_relocs. We should not allow PC-relative relocations
against protected symbols since address of protected function and
location of protected data may not be in the shared object.
bfd/
PR ld/24151
* elf64-x86-64.c (elf_x86_64_need_pic): Check
SYMBOL_DEFINED_NON_SHARED_P instead of def_regular.
(elf_x86_64_relocate_section): Move PIC check for PC-relative
relocations to ...
(elf_x86_64_check_relocs): Here.
(elf_x86_64_finish_dynamic_symbol): Use SYMBOL_DEFINED_NON_SHARED_P
to check if a symbol is defined in a non-shared object.
* elfxx-x86.h (SYMBOL_DEFINED_NON_SHARED_P): New.
ld/
PR ld/24151
* testsuite/ld-x86-64/pr24151a-x32.d: New file.
* testsuite/ld-x86-64/pr24151a.d: Likewise.
* testsuite/ld-x86-64/pr24151a.s: Likewise.
* testsuite/ld-x86-64/x86-64.exp: Run pr24151a and pr24151a-x32.
Fedora Rawhide has just switched to GCC9, and now GDB doesn't compile
because of a BFD warning:
BUILDSTDERR: ../../bfd/elf32-arm.c: In function 'elf32_arm_final_link_relocate':
BUILDSTDERR: ../../bfd/elf32-arm.c:10907:10: error: absolute value function 'labs' given an argument of type 'bfd_signed_vma' {aka 'long long int'} but has parameter of type 'long int' which may cause truncation of value [-Werror=absolute-value]
BUILDSTDERR: 10907 | value = labs (relocation);
BUILDSTDERR: | ^~~~
You can take a look at the full build log here:
https://kojipkgs.fedoraproject.org//work/tasks/4828/32174828/build.log
The fix is (apparently) simple: instead of using 'labs', we should use
'llabs', since we're passing a 'bfd_signed_vma' to it, which is at
least a 'long long int', as far as I have checked. This is what this
patch does.
bfd/ChangeLog:
2019-01-25 Sergio Durigan Junior <sergiodj@redhat.com>
* elf32-arm.c (elf32_arm_final_link_relocate): Use 'llabs' instead
of 'labs' (and fix GCC warning).
2019-01-16 Kito Cheng <kito@andestech.com>
bfd/
* elf-attrs.c (vendor_obj_attr_size): Return 0 if size is 0 even
for OBJ_ATTR_PROC.
gas/
* testsuite/gas/riscv/attribute-empty.d: New.
Mode field should be read in octal, all the rest in decimal. Do so.
PR 24061
PR 21786
* coff-rs6000.c (GET_VALUE_IN_FIELD): Add base parameter and
adjust all callers.
(EQ_VALUE_IN_FIELD): Likewise.
* coff64-rs6000.c (GET_VALUE_IN_FIELD): Likewise.
When optimising inline plt calls to __tls_get_addr without tls marker
relocs, ld should zap any toc restore insn after the bctrl, to stop a
load-hit-store stall.
* elf64-ppc.c (ppc64_elf_relocate_section <tls_ldgd_opt>): When
editing an old-style __tls_get_addr call, replace a toc restore
insn with a nop.
Commit 2bf2bf23da exposed a bug on targets that create common sections
other than the standard ELF SHN_COMMON. If these are output by ld -r,
then their type becomes SHT_PROGBITS unless the target handles them
specially (eg. by elf_backend_special_sections), and if they are
merged into .bss/.sbss by ld -r then that section becomes SHT_PROGBITS.
Worse, if they are output by ld -r, then their size is increased by
bfd_generic_define_common_symbol during final link, which leads to
bogus file contents being copied to output.
For mips, it seems to me that the .scommon section should not be
output for ld -r, but I haven't made that change in this patch.
PR 24015
* elf.c (bfd_elf_get_default_section_type): Make common sections
SHT_NOBITS.
* linker.c (bfd_generic_define_common_symbol): Clear
SEC_HAS_CONTENTS.
PR 23966
* libbfd.c (SSIZE_MAX): Define.
(bfd_malloc, bfd_realloc): Don't cast size to long to check for
"negative" values, compare against SSIZE_MAX instead.
* elf32-i386.c (elf_i386_relocate_section): Call
elf_i386_rtype_to_howto to get reloc_howto_type pointer.
* elf64-x86-64.c (elf_x86_64_relocate_section): Call
elf_x86_64_rtype_to_howto to get reloc_howto_type pointer.
All of the backend relocate_section functions that interpret reloc
numbers assuming the input file is of the expected type (ie. same as
output or very similar) really ought to be checking input file type.
Not many do, and those that do currently just assert. This patch
replaces the assertion with a more graceful exit.
PR 23980
* elf32-i386.c (elf_i386_relocate_section): Exit with wrong format
error rather than asserting input file is as expected.
* elf32-s390.c (elf_s390_relocate_section): Likewise.
* elf32-sh.c (sh_elf_relocate_section): Likewise.
* elf32-xtensa.c (elf_xtensa_relocate_section): Likewise.
* elf64-ppc.c (ppc64_elf_relocate_section): Likewise.
* elf64-s390.c (elf_s390_relocate_section): Likewise.
* elf64-x86-64.c (elf_x86_64_relocate_section): Likewise.
* elf32-ppc.c (ppc_elf_relocate_section): Exit with wrong format
error if input file is not ppc32 ELF.
PR 23994
* aoutx.h: Include limits.h.
(get_reloc_upper_bound): Detect long overflow and return a file
too big error if it occurs.
* elf.c: Include limits.h.
(_bfd_elf_get_symtab_upper_bound): Detect long overflow and return
a file too big error if it occurs.
(_bfd_elf_get_dynamic_symtab_upper_bound): Likewise.
(_bfd_elf_get_dynamic_reloc_upper_bound): Likewise.
Linkers group input note sections with the same name into one output
note section with the same name. One output note section is placed in
one PT_NOTE segment. New linkers merge all input .note.gnu.property
sections into one output .note.gnu.property section with a single
NT_GNU_PROPERTY_TYPE_0 note in a single PT_NOTE segment. Since older
linkers treat input .note.gnu.property section as a generic note section
and just concatenate all input .note.gnu.property sections into one
output .note.gnu.property section without merging them, we may
see one or more NT_GNU_PROPERTY_TYPE_0 notes in PT_NOTE segment, which
are invalid.
GNU_PROPERTY_X86_UINT32_VALID was defined to address this issue such
that linker sets the bit for non-relocatable outputs. But it isn't
sufficient:
1. It doesn't cover generic properties.
2. When -mx86-used-note=yes is passed to x86 assembler, the
GNU_PROPERTY_X86_UINT32_VALID bit is set in GNU_PROPERTY_X86_ISA_1_USED
property in object file and older linkers generate invalid
NT_GNU_PROPERTY_TYPE_0 notes with the GNU_PROPERTY_X86_UINT32_VALID bit
set.
I am proposing the following changes:
1. Add PT_GNU_PROPERTY segment type:
# define PT_GNU_PROPERTY (PT_LOOS + 0x474e553)
which covers .note.gnu.property section.
2. Remove GNU_PROPERTY_X86_UINT32_VALID.
bfd/
PR ld/23900
* elf.c (get_program_header_size): Add a PT_GNU_PROPERTY
segment for NOTE_GNU_PROPERTY_SECTION_NAME.
(_bfd_elf_map_sections_to_segments): Create a PT_GNU_PROPERTY
segment for NOTE_GNU_PROPERTY_SECTION_NAME.
* elfxx-x86.c (_bfd_elf_link_setup_gnu_properties): Don't set
GNU_PROPERTY_X86_UINT32_VALID.
binutils/
PR ld/23900
* readelf.c (get_segment_type): Support PT_GNU_PROPERTY.
(decode_x86_isa): Don't check GNU_PROPERTY_X86_UINT32_VALID.
(decode_x86_feature_1): Likewise.
(decode_x86_feature_2): Likewise.
(print_gnu_property_note): Remove GNU_PROPERTY_X86_UINT32_VALID
check.
* testsuite/binutils-all/i386/empty.d: Updated.
* testsuite/binutils-all/x86-64/empty-x32.d: Likewise.
* testsuite/binutils-all/x86-64/empty.d: Likewise.
* testsuite/binutils-all/i386/pr21231b.s: Change
GNU_PROPERTY_X86_ISA_1_USED bits to 0x7fffffff.
* testsuite/binutils-all/x86-64/pr21231b.s: Likewise.
gas/
PR ld/23900
* config/tc-i386.c (x86_cleanup): Don't set
GNU_PROPERTY_X86_UINT32_VALID.
* testsuite/gas/i386/property-1.s: Change
GNU_PROPERTY_X86_ISA_1_USED bits to 0.
include/
PR ld/23900
* elf/common.h (PT_GNU_PROPERTY): New.
(GNU_PROPERTY_X86_UINT32_VALID): Removed.
ld/
PR ld/23900
* testsuite/ld-elf/elf.exp: Run PR ld/23900 test.
* testsuite/ld-elf/pr23900-1-32.rd: New file.
* testsuite/ld-elf/pr23900-1-64.rd: Likewise.
* testsuite/ld-elf/pr23900-1.d: Likewise.
* testsuite/ld-elf/pr23900-1.s: Likewise.
* testsuite/ld-elf/pr23900-2.s: Likewise.
* testsuite/ld-elf/pr23900-2a.d: Likewise.
* testsuite/ld-elf/pr23900-2b.d: Likewise.
* testsuite/ld-i386/ibt-plt-1.d: Adjusted.
* testsuite/ld-i386/ibt-plt-2c.d: Likewise.
* testsuite/ld-i386/ibt-plt-2d.d: Likewise.
* testsuite/ld-i386/ibt-plt-3d.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-1-x32.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-1.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-2c-x32.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-2c.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-2d-x32.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-2c.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-3c-x32.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-3c.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-3d-x32.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-3d.d: Likewise.
* testsuite/ld-i386/pr23372c.d: Expect <None>
for GNU_PROPERTY_X86_ISA_1_USED.
* testsuite/ld-x86-64/pr23372c-x32.d: Likewise.
* testsuite/ld-x86-64/pr23372c.d: Likewise.
* testsuite/ld-x86-64/pr23372d-x32.d: Likewise.
* testsuite/ld-x86-64/pr23372d.d: Likewise.
* testsuite/ld-x86-64/property-x86-5a.s: Change
GNU_PROPERTY_X86_ISA_1_USED bits to 0.
* testsuite/ld-x86-64/property-x86-5b.s: Likewise.
32-bit constants loaded by two const16 opcodes that involve relocation
(e.g. calculated as a sum of a symbol and a constant) may overflow,
resulting in linking error with the following message:
dangerous relocation: const16: cannot encode: (_start+0x70000000)
They should wrap around instead. Limit const16 opcode immediate field to
16 least significant bits to implement this wrap around.
bfd/
2018-12-11 Max Filippov <jcmvbkbc@gmail.com>
* elf32-xtensa.c (elf_xtensa_do_reloc): Limit const16 opcode
immediate field to 16 least significant bits.
Add elf32_xc16x_rtype_to_howto to get reloc_howto_type pointer from
ELF32_R_TYPE.
* elf32-xc16x.c (elf32_xc16x_rtype_to_howto): New function.
(elf32_xc16x_relocate_section): Call elf32_xc16x_rtype_to_howto
instead of xc16x_reloc_type_lookup to get reloc_howto_type.
Mark the previous definition from IR object as undefined so that the
generic linker will override it.
bfd/
PR ld/23958
* elflink.c (_bfd_elf_add_default_symbol): Override the previous
definition from IR object.
ld/
PR ld/23958
* testsuite/ld-plugin/lto.exp: Run PR ld/23958 test.
* testsuite/ld-plugin/pr23958.c: New file.
* testsuite/ld-plugin/pr23958.t: Likewise.
Up until now OpenRISC GDB only has supported bare metal debugging. This
patch adds linux userspace debugging and core dump analysis support.
The changes are loosely based on nios2 and riscv implementations.
This was tested with linux 4.20 core dumps for executables linked
against musl libc.
bfd/ChangeLog:
* elf32-or1k.c (or1k_grok_prstatus): New function.
(or1k_grok_psinfo): Likewise.
gdb/ChangeLog:
* Makefile.in (ALL_TARGET_OBS): Add or1k-linux-tdep.o.
* configure.tgt: Add or1k*-*-linux*.
* or1k-linux-tdep.c: New file.
* or1k-tdep.c (or1k_gdbarch_init): Call gdbarch_init_osabi.
bfd/
PR 23952
* syms.c (_bfd_generic_read_minisymbols): Free syms before
returning with zero symcount.
binutils/
* nm.c (display_rel_file): Use xrealloc to increase minisyms
for synthetic symbols.
This patch started off just adding the warnings in tc-ppc.c about
incorrect usage of @l, @h and @ha in instructions that don't have
16-bit D-form fields. That unfortunately showed up three warnings in
ld/testsuite/ld-powerpc/vle-multiseg.s on instructions like
e_li r3, IV_table@l+0x00
which was being assembled to
8: 70 60 00 00 e_li r3,0
a: R_PPC_ADDR16_LO IV_table
The ADDR16_LO reloc is of course completely bogus on e_li, which has
a split 20-bit signed integer field in bits 0x1f7fff, the low 11 bit
in 0x7ff, the next 5 bits in 0x1f0000, and the high 4 bits in 0x7800.
Applying an ADDR16_LO reloc to the instruction potentially changes
the e_li instruction to e_add2i., e_add2is, e_cmp16i, e_mull2i,
e_cmpl16i, e_cmph16i, e_cmphl16i, e_or2i, e_and2i., e_or2is, e_lis,
e_and2is, or some invalid encodings.
Now there is a relocation that suits e_li, R_PPC_VLE_ADDR20, which was
added 2017-09-05 but I can't see code in gas to generate the
relocation. In any case, VLE_ADDR20 probably doesn't have the correct
semantics for @l since ideally you'd want an @l to pair with @h or @ha
to generate a 32-bit constant. Thus @l should only produce a 16-bit
value, I think. So we need some more relocations to handle e_li it
seems, or as I do in this patch, modify the behaviour of existing
relocations when applied to e_li instructions.
include/
* opcode/ppc.h (E_OPCODE_MASK, E_LI_MASK, E_LI_INSN): Define.
bfd/
* elf32-ppc.c (ppc_elf_howto_raw <R_PPC_VLE_ADDR20>): Correct
mask and shift value.
(ppc_elf_vle_split16): Use E_OPCODE_MASK. Handle e_li
specially.
gas/
* config/tc-ppc.c (md_assemble): Adjust relocs for VLE before
TLS tweaks. Handle e_li. Warn on unexpected operand field
for lo16/hi16/ha16 relocs.
Armv8.3-A has another key used in pointer authentication called the
B-key (other than the A-key that is already supported). In order for
stack unwinders to work it is necessary to be able to identify frames
that have been signed with the B-key rather than the A-key and it was
felt that keeping this as an augmentation character in the CIE was the
best bet. The DWARF extensions for ARM therefore propose to add a new
augmentation character 'B' to the CIE augmentation string and the
corresponding cfi directive ".cfi_b_key_frame". I've made the relevant
changes to GAS and LD to add support for B-key unwinding, which required
modifying LD to check for 'B' in the augmentation string, adding the
".cfi_b_key_frame" directive to GAS and adding a "pauth_key" field to
GAS's fde_entry and cie_entry structs.
The pointer authentication instructions will behave as NOPs on
architectures that don't support them, and so a check for the
architecture being assembled for is not necessary since there will be no
behavioural difference between augmentation strings with and without the
'B' character on such architectures.
2018-12-05 Sam Tebbs <sam.tebbs@arm.com>
bfd/
* elf-eh-frame.c (_bfd_elf_parse_eh_frame): Add check for 'B'.
gas/
* dw2gencfi.c (struct cie_entry): Add tc_cie_entry_extras invocation.
(alloc_fde_entry): Add tc_fde_entry_init_extra invocation.
(output_cie): Add tc_output_cie_extra invocation.
(select_cie_for_fde): Add tc_cie_fde_equivalent_extra and
tc_cie_entry_init_extra invocation.
(frch_cfi_data, cfa_save_data): Move to dwgencfi.h.
* config/tc-aarch64.c (s_aarch64_cfi_b_key_frame): Declare.
(md_pseudo_table): Add "cfi_b_key_frame".
* config/tc-aarch64.h (tc_fde_entry_extras, tc_cie_entry_extras,
tc_fde_entry_init_extra, tc_output_cie_extra,
tc_cie_fde_equivalent_extra, tc_cie_entry_init_extra): Define.
* dw2gencfi.h (struct fde_entry): Add tc_fde_entry_extras invocation.
(pointer_auth_key): Define.
(frch_cfi_data, cfa_save_data): Move from dwgencfi.c.
* doc/c-aarch64.texi (.cfi_b_key_frame): Add documentation.
* testsuite/gas/aarch64/(pac_ab_key.d, pac_ab_key.s): New file.
For GNU_PROPERTY_X86_COMPAT_ISA_1_USED and GNU_PROPERTY_X86_UINT32_OR_AND
properties, a bit in the output pr_data field is set if it is set in any
relocatable input pr_data fields and this property is present in all
relocatable input files. A missing property implies that its bits have
unknown values. When all bits in the the output pr_data field are zero,
this property should not be removed from output to indicate it has zero
in all bits.
bfd/
PR ld/23372
* elfxx-x86.c (_bfd_x86_elf_merge_gnu_properties): Don't remove
empty properties for GNU_PROPERTY_X86_COMPAT_ISA_1_USED and
GNU_PROPERTY_X86_UINT32_OR_AND.
(_bfd_x86_elf_link_fixup_gnu_properties): Likewise.
ld/
PR ld/23372
* testsuite/ld-i386/pr23372a.d: Updated.
* testsuite/ld-i386/pr23372c.d: Likewise.
* testsuite/ld-x86-64/pr23372a-x32.d: Likewise.
* testsuite/ld-x86-64/pr23372a.d: Likewise.
* testsuite/ld-x86-64/pr23372c-x32.d: Likewise.
* testsuite/ld-x86-64/pr23372c.d: Likewise.
Delay setting its alignment until we know it is non-empty. Otherwise an
empty iplt section may change vma and lma of the following sections, which
triggers moving dot of the following section backwards, resulting in a
warning and section lma not being set properly. It later leads to a
"File truncated" error.
bfd/
PR ld/23930
* elfxx-x86.c (_bfd_x86_elf_size_dynamic_sections): Update
the iplt section alignment if it is non-empty.
(_bfd_x86_elf_link_setup_gnu_properties): Set plt.iplt_alignment
and delay setting the iplt section alignment.
* elfxx-x86.h (elf_x86_plt_layout): Add iplt_alignment.
ld/
PR ld/23930
* testsuite/ld-i386/i386.exp: Run pr23930.
* testsuite/ld-i386/pr23930.d: New file.
* testsuite/ld-x86-64/pr23930-32.t: Likewise.
* testsuite/ld-x86-64/pr23930-x32.d: Likewise.
* testsuite/ld-x86-64/pr23930.d: Likewise.
* testsuite/ld-x86-64/pr23930.t: Likewise.
* testsuite/ld-x86-64/pr23930a.s: Likewise.
* testsuite/ld-x86-64/pr23930b.s: Likewise.
* testsuite/ld-x86-64/x86-64.exp: Run pr23930 and pr23930-x32.
PR 23932
* elf.c (IS_CONTAINED_BY_LMA): Add a check for a negative section
size.
(rewrite_elf_program_header): If no sections are mapped into a
segment return an error.
IFUNC resolvers must always be called via their global entry point.
They will be called from ld.so rather than from the local executable.
PR 23937
bfd/
* elf64-ppc.c (write_plt_relocs_for_local_syms): Don't add local
entry offset for ifuncs.
ld/
* testsuite/ld-powerpc/pr23937.d,
* testsuite/ld-powerpc/pr23937.s: New test.
* testsuite/ld-powerpc/powerpc.exp: Run it.
.note.gnu.property section in IR inputs should be ignored. Don't
merge them.
PR ld/23929
* elf-properties.c (_bfd_elf_link_setup_gnu_properties): Don't
merge .note.gnu.property section in IR inputs.
Accept R_MIPS_HI16, R_MIPS_HIGHER and R_MIPS_HIGHEST relocations and
their compressed counterparts in PIC code where the symbol referred is
absolute. Such an operation is meaningful, because an absolute symbol
effectively is a constant the calculation of the value of which has been
deferred to the static link time, and which is not going to change any
further at the dynamic load time. Therefore there is no need ever to
refuse the use of these relocations with such symbols, as the resulting
run-time value observed by the program will be correct even in PIC code.
This is not the case with R_MIPS_26 and its compressed counterparts,
because the run-time value calculated by the instructions these
relocations are used with depends on the address of the instruction
itself, and that can change according to the base address used by the
dynamic loader. Therefore these relocations have to continue being
rejected in PIC code even with absolute symbols.
This allows successful linking of code that relies on previous linker
behavior up to commit 861fb55ab5 ("Defer allocation of R_MIPS_REL32
GOT slots"), <https://sourceware.org/ml/binutils/2008-08/msg00096.html>,
which introduced the problematic check missing this special exception
for absolute symbols.
bfd/
* elfxx-mips.c (_bfd_mips_elf_check_relocs) <R_MIPS16_HI16>
<R_MIPS_HI16, R_MIPS_HIGHER, R_MIPS_HIGHEST, R_MICROMIPS_HI16>
<R_MICROMIPS_HIGHER, R_MICROMIPS_HIGHEST>: Also accept an
absolute symbol in PIC code.
ld/
* testsuite/ld-mips-elf/pic-reloc-0.d: New test.
* testsuite/ld-mips-elf/pic-reloc-1.d: New test.
* testsuite/ld-mips-elf/pic-reloc-2.d: New test.
* testsuite/ld-mips-elf/pic-reloc-3.d: New test.
* testsuite/ld-mips-elf/pic-reloc-4.d: New test.
* testsuite/ld-mips-elf/pic-reloc-absolute-hi.ld: New test
linker script.
* testsuite/ld-mips-elf/pic-reloc-absolute-lo.ld: New test
linker script.
* testsuite/ld-mips-elf/pic-reloc-ordinary.ld: New test linker
script.
* testsuite/ld-mips-elf/pic-reloc-j.s: New test source.
* testsuite/ld-mips-elf/pic-reloc-lui.s: New test source.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
Switch from `_bfd_error_handler' to `info->callbacks->einfo' with error
reporting concerning the use of position-dependent relocations such as
R_MIPS_HI16 or R_MIPS_26 in PIC code and continue processing so that any
subsequent link errors are also shown rather than the linker terminating
right away. This can reduce user frustration where correcting one error
only reveals another one; instead all are shown together making them all
possible to investigate at once. The use of the `%X' specifier causes
the linker to terminate unsuccessfully at the end of processing.
Also fix the message to say `cannot' rather than `can not'.
bfd/
* elfxx-mips.c (_bfd_mips_elf_check_relocs) <R_MIPS16_26>
<R_MIPS_26, R_MICROMIPS_26_S1>: Use `info->callbacks->einfo'
rather than `_bfd_error_handler' to report refused relocations
in PIC code and continue processing. Fix error message: `can
not' -> `cannot'.
Initialize *uncompressed_align_pow_p to 0 since *uncompressed_align_pow_p
is passed to bfd_is_section_compressed_with_header as uninitialized,
PR binutils/23919
* compress.c (bfd_is_section_compressed_with_header): Initialize
*uncompressed_align_pow_p to 0.
The fix for PR ld/22263 causes TLS relocations using ADRP to be relaxed
into MOVZ, however this causes issues for the erratum code.
The erratum code scans the input sections looking for ADRP instructions
and notes their location in the stream.
It then later tries to find them again in order to generate the linker
stubs. Due to the relaxation it instead finds a MOVZ and hard aborts.
Since this relaxation is a valid one, and in which case the erratum no
longer applies, it shouldn't abort but instead just continue.
This changes the TLS relaxation code such that when it finds an ADRP and
it relaxes it, it removes the erratum entry from the work list by changing
the stub type into none so the stub is ignored.
The entry is not actually removed as removal is a more expensive operation
and we have already allocated the memory anyway.
The clearing is done for IE->LE and GD->LE relaxations, and a testcase is
added for the IE case. The GD case I believe to be impossible to get together
with the erratum sequence due to the required BL which would break the sequence.
However to cover all basis I have added the guard there as well.
build on native hardware and regtested on
aarch64-none-elf, aarch64-none-elf (32 bit host),
aarch64-none-linux-gnu, aarch64-none-linux-gnu (32 bit host)
Cross-compiled and regtested on
aarch64-none-linux-gnu, aarch64_be-none-linux-gnu
Testcase in PR23940 tested and works as expected now and benchmarks ran on A53
showing no regressions and no issues.
bfd/ChangeLog:
PR ld/23904
* elfnn-aarch64.c (_bfd_aarch64_adrp_p): Use existing constants.
(_bfd_aarch64_erratum_843419_branch_to_stub): Use _bfd_aarch64_adrp_p.
(struct erratum_835769_branch_to_stub_clear_data): New.
(_bfd_aarch64_erratum_843419_clear_stub): New.
(clear_erratum_843419_entry): New.
(elfNN_aarch64_tls_relax): Use it.
(elfNN_aarch64_relocate_section): Pass input_section.
(aarch64_map_one_stub): Handle branch type none as valid.
ld/ChangeLog:
PR ld/23904
* testsuite/ld-aarch64/aarch64-elf.exp: Add erratum843419_tls_ie.
* testsuite/ld-aarch64/erratum843419_tls_ie.d: New test.
* testsuite/ld-aarch64/erratum843419_tls_ie.s: New test.
PR binutils/23919
binutils* readelf.c (dump_sections_as_strings): Remove bogus addralign check.
(dump_sections_as_bytes): Likewise.
(load_specific_debug_sections): Likewise.
* testsuite/binutils-all/dw2-3.rS: Adjust alignment.
* testsuite/binutils-all/dw2-3.rt: Likewise.
bfd * bfd.c (bfd_update_compression_header): Explicitly set alignment.
(bfd_check_compression_header): Add uncompressed_alignment_power
argument. Check ch_addralign is a power of 2.
* bfd-in2.h: Regenerated.
* compress.c (bfd_compress_section_contents): Get and set
orig_uncompressed_alignment_pow if section is decompressed.
(bfd_is_section_compressed_with_header): Add and get
uncompressed_align_pow_p argument.
(bfd_is_section_compressed): Add uncompressed_align_power argument
to bfd_is_section_compressed_with_header call.
(bfd_init_section_decompress_status): Get and set
uncompressed_alignment_power.
* elf.c (_bfd_elf_make_section_from_shdr): Add
uncompressed_align_power argument to
bfd_is_section_compressed_with_header call.
When invoking GCC with "-g -flto", the compiler will create LTO objects
with debug information. The objects created are "simple ELF" objects (see
libiberty/simple-object-elf.c) and do not have target-specific sections.
When the MSP430 linker sees one of these objects without a .MSP430.attributes
section it errors:
> error: /tmp/cc4LhbEI.ltrans0.ltrans.o uses MSP430X instructions but /tmp/ccynqIwudebugobj uses unknown
> error: /tmp/cc4LhbEI.ltrans0.ltrans.o uses the small code model whereas /tmp/ccynqIwudebugobj uses the unknown code model
> error: /tmp/cc4LhbEI.ltrans0.ltrans.o uses the small data model whereas /tmp/ccynqIwudebugobj uses the unknown data model
> error: /tmp/cc4LhbEI.ltrans0.ltrans.o uses the small code model but /tmp/ccynqIwudebugobj uses the unknown data model
> failed to merge target specific data of file /tmp/cc4LhbEI.ltrans0.ltrans.o
The following patch allows these debug LTO objects to be linked with other
MSP430 objects even if they do not have a .MSP430.attributes section.
bfd * elf32-msp430.c (elf32_msp430_merge_mspabi_attributes): Do not
error when .MSP430.attributes section is missing from objects
created by LTO.
Fix a memory leak appearing when the local got entry list was constructed.
bfd/
xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com>
* arc-got.h (arc_get_local_got_ents): Revamp it; use
elf_local_got_ents to store the local got list.
(get_got_entry_list_for_symbo): Restructure it.
* elf32-arc.c (elf_arc_relocate_section): Correct the call to
get_got_entry_list_for_symbol.
bfd * mach-o.h: Add new enums for BFD_MACH_O_PLATFORM_MACOS,
BFD_MACH_O_PLATFORM_IOS, BFD_MACH_O_PLATFORM_TVOS,
BFD_MACH_O_PLATFORM_WATCHOS, BFD_MACH_O_PLATFORM_BRIDGEOS,
BFD_MACH_O_TOOL_CLANG, BFD_MACH_O_TOOL_SWIFT, BFD_MACH_O_TOOL_LD.
(struct bfd_mach_o_note_command): New.
(struct bfd_mach_o_build_version_tool): New.
(struct bfd_mach_o_build_version_command): New.
(bfd_mach_o_read_version_min): Don't split version into
a few fields. Rename reserved to sdk.
* mach-o.c (bfd_mach_o_read_version_min): Don't split version into a
few fields. Rename reserved to sdk.
(bfd_mach_o_read_command): Handle LC_VERSION_MIN_TVOS, LC_NOTE,
LC_BUILD_VERSION.
(bfd_mach_o_read_note): New.
(bfd_mach_o_read_build_version): New.
PR 23728
binutils* od-macho.c (printf_version): New.
(dump_load_command): Use it to print version. Print sdk version. Print
version info for watchOS and tvOS. Print LC_NOTE, LC_BUILD_VERSION.
(dump_buld_version): New.
(bfd_mach_o_platform_name): New
(bfd_mach_o_tool_name): New
* mach-o/external.h (mach_o_nversion_min_command_external): Rename
reserved to sdk.
(mach_o_note_command_external): New.
(mach_o_build_version_command_external): New.
* mach-o/loader.h (BFD_MACH_O_LC_VERSION_MIN_TVOS): Define.
(BFD_MACH_O_LC_NOTE): Define.
strip/objcopy can't deal with alloc reloc sections, not .rela.dyn or
.rela.plt in a dynamic executable, or .rela.plt/.rela.iplt in a static
executable. So, don't have BFD treat them as side-channel data
associated with the section they are relocating.
PR 23850
* elf.c (bfd_section_from_shdr): Treat SHF_ALLOC SHT_REL* sections
in an executable or shared library as normal sections.
For Local Exec TLS model, the offset of the variable from the thread pointer
can be computed at static link time. This doesn't require GOT indirection.
The initial change is a bad fix for a problem during TLS GD -> LE relaxation.
The proper fix is to check whether _GLOBAL_OFFSET_TABLE_ is referenced,
create got section if yes. And the fix is already in the repository.
bfd/
2018-10-31 Renlin Li <renlin.li@arm.com>
* elfnn-aarch64.c (elfNN_aarch64_check_relocs): Don't create got
section for Local Exec TLS model.
When assigning symbol version, we should hide debug symbols defined in
discarded sections from IR objects so that they can be removed later.
bfd/
PR ld/23818
* elflink.c (_bfd_elf_link_assign_sym_version): Hide symbols
defined in discarded input sections.
ld/
PR ld/23818
* testsuite/ld-plugin/lto.exp: Run PR ld/23818 test.
* testsuite/ld-plugin/pr23818.d: New file.
* testsuite/ld-plugin/pr23818.t: Likewise.
* testsuite/ld-plugin/pr23818a.c: Likewise.
* testsuite/ld-plugin/pr23818b.c: Likewise.
elf_sym_hashes for as-needed libs will be zeroed if the library is
found to be not needed. More than that, the local symbols for such a
library should not be considered by cmse_scan.
* elf32-arm.c (elf32_arm_size_stubs): Ignore as-needed libs that
were not needed.
PR 23805
* elflink.c (elf_link_input_bfd): Don't segfault on finding
STT_TLS symbols without any TLS sections. Instead, change the
symbol type to STT_NOTYPE.
Symbol tables can change when a number of objcopy options are used.
I figure string tables are similarly changeable.
PR 23788
* elf.c (section_match): Don't require a size match for SHT_SYMTAB
or SHT_STRTAB.
This patch improves dynobj selection. This allows the testcase in the
PR to proceed further before segfaulting due to other bugs in the
sparc backend.
../ld/ld-new --eh-frame-hdr -m elf_x86_64 -shared -o bug.so.5 bug.o ./libc.so.6 ./crtendS.o
../ld/ld-new: sparc architecture of input file `bug.o' is incompatible with i386:x86-64 output
../ld/ld-new: bug.o: in function `a':
bug.c:(.text+0x4): undefined reference to `_GLOBAL_OFFSET_TABLE_'
../ld/ld-new: bug.c:(.text+0x8): undefined reference to `_GLOBAL_OFFSET_TABLE_'
Segmentation fault
PR 23653
* elflink.c (_bfd_elf_link_create_dynstrtab): Match elf_object_id
too when choosing dynobj.
The negative size check can be rolled into the "exceeds space left in
section" check if that is done using an unsigned comparison. We know
that "addr - section->vma" is never larger than section->size since
the section is found by find_section_by_vma.
* peXXigen.c (_bfd_XX_bfd_copy_private_bfd_data_common): Simplify
PE_DEBUG_DATA size checks.
This patch performs a run-time test that a shared libbfd.so has been
compiled with the same size bfd_vma as that of apps using the library.
On a 32-bit host it is easily possible to have one libbfd.so compiled
to support 64-bit targets (or configured with --enable-64-bit-bfd)
while another only supports 32-bit targets. The two libraries will
have differently sized bfd_vma types, and if the wrong one is loaded
all sorts of weird behaviour might be seen.
bfd/
PR 23534
* init.c (BFD_INIT_MAGIC): Define.
(bfd_init): Return BFD_INIT_MAGIC.
bfd-in2.h: Regenerate.
binutils/
PR 23534
* addr2line.c (main): Exit with fatal error if bfd_init
returns an unexpected value.
* ar.c (main): Likewise.
* dlltool.c (identify_dll_for_implib): Likewise.
* nm.c (main): Likewise.
* objcopy.c (main): Likewise.
* objdump.c (main): Likewise.
* size.c (main): Likewise.
* strings.c (main): Likewise.
* windmc.c (main): Likewise.
* windres.c (main): Likewise.
gas/
PR 23534
* as.c (main): Exit with fatal error if bfd_init returns an
unexpected value.
ld/
PR 23534
* ldmain.c (main): Exit with fatal error if bfd_init returns
an unexpected value.
This PR shows a fuzzed binary triggering a segfault via a bad
relocation in .debug_line. It turns out that unlike normal
relocations applied to a section, the linker applies those with
symbols from discarded sections via _bfd_clear_contents without
checking that the relocation is within the section bounds. The same
thing now happens when reading debug sections since commit
a4cd947aca, the PR23425 fix.
PR 23770
PR 23425
* reloc.c (_bfd_clear_contents): Replace "location" param with
"buf" and "off". Bounds check "off". Return status.
* cofflink.c (_bfd_coff_generic_relocate_section): Update
_bfd_clear_contents call.
* elf-bfd.h (RELOC_AGAINST_DISCARDED_SECTION): Likewise.
* elf32-arc.c (elf_arc_relocate_section): Likewise.
* elf32-i386.c (elf_i386_relocate_section): Likewise.
* elf32-metag.c (metag_final_link_relocate): Likewise.
* elf32-nds32.c (nds32_elf_get_relocated_section_contents): Likewise.
* elf32-ppc.c (ppc_elf_relocate_section): Likewise.
* elf32-visium.c (visium_elf_relocate_section): Likewise.
* elf64-ppc.c (ppc64_elf_relocate_section): Likewise.
* elf64-x86-64.c *(elf_x86_64_relocate_section): Likewise.
* libbfd-in.h (_bfd_clear_contents): Update prototype.
* libbfd.h: Regenerate.
Prevents getting an error about dynamic symbols in sections indexed
64K+ when .dynsym is discarded.
* elflink.c (elf_link_output_extsym): Do not place symbols into a
discarded .dynsym.
With
commit 64029e9368
Author: Alan Modra <amodra@gmail.com>
Date: Fri Oct 5 11:40:54 2018 +0930
Separate header PT_LOAD for -z separate-code
there is no need to add a GNU_PROPERTY_X86_ISA_1_USED note to force
program header in in non-code PT_LOAD segment when -z separate-code
is used.
bfd/
PR ld/23428
* elfxx-x86.c (_bfd_x86_elf_link_setup_gnu_properties): Don't
add GNU_PROPERTY_X86_FEATURE_2_NEEDED to force program header
in non-code PT_LOAD segment.
ld/
PR ld/23428
* testsuite/ld-i386/property-x86-4a.d: Updated.
* testsuite/ld-x86-64/property-x86-4a-x32.d: Likewise.
* testsuite/ld-x86-64/property-x86-4a.d: Likewise.
This patch, along with previous patches in the series, supports
putting the ELF file header and program headers in a PT_LOAD without
sections.
Logic governing whether headers a loaded has changed a little: The
primary reason to include headers is now the presence of
SIZEOF_HEADERS in a linker script. However, to support scripts that
may have reserved space for headers by hand, we continue to add
headers whenever the first section address is past the end of headers
modulo page size.
include/
* bfdlink.h (struct bfd_link_info): Add load_phdrs field.
bfd/
* elf-nacl.c (nacl_modify_segment_map): Cope with header PT_LOAD
lacking sections.
* elf.c (_bfd_elf_map_sections_to_segments): Assume file and
program headers are required when info->load_phdrs. Reorganize
code handling program headers. Generate a mapping without
sections just for file and program headers when -z separate-code
would indicate they should be on a different page to the first
section.
ld/
* ldexp.c (fold_name <SIZEOF_HEADERS>): Set link_info.load_phdrs.
* testsuite/ld-elf/loadaddr1.d: Pass -z noseparate-code.
* testsuite/ld-elf/loadaddr2.d: Likewise.
* testsuite/ld-i386/vxworks2.sd: Adjust expected output.
* testsuite/ld-powerpc/vxworks2.sd: Likewise.
* testsuite/ld-elf/overlay.d: Remove spu xfail.
* testsuite/ld-spu/ovl.lnk: Don't use SIZEOF_HEADERS.
* testsuite/ld-tic6x/dsbt-be.ld: Likewise.
* testsuite/ld-tic6x/dsbt-inrange.ld: Likewise.
* testsuite/ld-tic6x/dsbt-overflow.ld: Likewise.
* testsuite/ld-tic6x/dsbt.ld: Likewise.
p_vaddr is currently set from the first section vma if a segment has
sections, and to zero if a segment has no sections. This means we
lose p_vaddr when objcopy'ing executables if a segment without
sections has a non-zero p_vaddr.
This patch saves p_vaddr to p_vaddr_offset, and to make the use of
p_vaddr_offset consistent, inverts the sign. (It's now added to
section vma to get segment vaddr, and added to zero when there are no
sections.)
* elf.c (assign_file_positions_for_load_sections): Set p_vaddr
from m->p_vaddr_offset for segments without sections. Invert
sign of p_vaddr_offset.
(rewrite_elf_program_header, copy_elf_program_header): Save
old segment p_vaddr to p_vaddr_offset. Invert sign of
p_vaddr_offset.
Some targets don't set a default interpreter, resulting in an empty
.interp section unless --dynamic-linker is passed to ld. A PT_INTERP
without a path is rather useless.
The testsuite change fixes a failure on microblaze-linux.
bfd/
* elf.c (get_program_header_size): Don't count PT_INTERP if
.interp is empty.
(_bfd_elf_map_sections_to_segments): Don't create PT_INTERP if
.interp is empty.
ld/
* testsuite/ld-elf/pr22423.d: Pass --dynamic-linker to ld.
Overlay PT_LOAD headers are moved early for reasons explained by
comments in spu_elf_modify_segment_map. This patch fixes cases that
shouldn't occur in sane SPU executables.
* elf32-spu.c (spu_elf_modify_segment_map): Don't insert
overlays before segment containing headers.
This cleans up elf_segment_map allocation when the section array is
empty. "amt += (to - from - 1) * sizeof (asection *)", when "to" and
"from" are unsigned int results in an unsigned value inside the
parentheses. When "to" and "from" are equal on a 64-bit host,
0xffffffff * 8 is added to "amt", not -8 as desired.
The patch also renames a variable for consistency with other functions
using a similar index.
* elf.c (make_mapping): Cope with zero size array at end of
struct elf_segment_map.
(_bfd_elf_map_sections_to_segments): Likewise.
(rewrite_elf_program_header, copy_elf_program_header): Likewise.
(_bfd_elf_map_sections_to_segments): Rename phdr_index to hdr_index.
This patch adds the new instruction and relocation as per proposal:
https://openrisc.io/proposals/ladrp
This is to be added to the spec in an upcoming revision. The new instruction
l.adrp loads the page offset of the current instruction offset by
a 21-bit immediate shifted left 13-bits. This is meant to be used with
a 13-bit lower bit page offset. This allows us to free up the got
register r16.
l.adrp r3, foo
l.ori r4, r3, po(foo)
l.lbz r5, po(foo)(r3)
l.sb po(foo)(r3), r6
The relocations we add are:
- BFD_RELOC_OR1K_PLTA26 For PLT jump relocation with PLT entry
asm: plta() implemented using l.ardp, meaning
no need for r16 (the GOT reg)
- BFD_RELOC_OR1K_GOT_PG21 Upper 21-bit Page offset got address
asm: got()
- BFD_RELOC_OR1K_TLS_GD_PG21 Upper 21-bit Page offset with TLS General
asm: tlsgd() Dynamic calculation
- BFD_RELOC_OR1K_TLS_LDM_PG21 Upper 21-bit Page offset with TLS local
asm: tlsldm() dynamic calculation
- BFD_RELOC_OR1K_TLS_IE_PG21 Upper 21-bit Page offset with TLS Initial
asm: gottp() Executable calculation
- BFD_RELOC_OR1K_PCREL_PG21 Default relocation for disp21 (l.adrp
instructions)
- BFD_RELOC_OR1K_LO13 low 13-bit page offset relocation
asm: po() i.e. mem loads, addi etc
- BFD_RELOC_OR1K_SLO13 low 13-bit page offset relocation
asm: po() i.e. mem stores, with split immediate
- BFD_RELOC_OR1K_GOT_LO13, low 13-bit page offset with GOT calcs
asm: gotpo()
- BFD_RELOC_OR1K_TLS_GD_LO13 Lower 13-bit offset with TLS GD calcs
asm: tlsgdpo()
- BFD_RELOC_OR1K_TLS_LDM_LO13 Lower 13-bit offset with TLS LD calcs
asm: tlsldmpo()
- BFD_RELOC_OR1K_TLS_IE_LO13 Lower 13-bit offset with TLS IE calcs
asm: gottppo()
bfd/ChangeLog:
yyyy-mm-dd Richard Henderson <rth@twiddle.net>
* bfd-in2.h: Regenerated.
* elf32-or1k.c: (or1k_elf_howto_table): Fix formatting for
R_OR1K_PLT26, Add R_OR1K_PCREL_PG21, R_OR1K_GOT_PG21,
R_OR1K_TLS_GD_PG21, R_OR1K_TLS_LDM_PG21, R_OR1K_TLS_IE_PG21,
R_OR1K_LO13, R_OR1K_GOT_LO13, R_OR1K_TLS_GD_LO13, R_OR1K_TLS_LDM_LO13,
R_OR1K_TLS_IE_LO13, R_OR1K_SLO13, R_OR1K_PLTA26.
(or1k_reloc_map): Add BFD_RELOC_OR1K_PCREL_PG21,
BFD_RELOC_OR1K_GOT_PG21, BFD_RELOC_OR1K_TLS_GD_PG21,
BFD_RELOC_OR1K_TLS_LDM_PG21, BFD_RELOC_OR1K_TLS_IE_PG21,
BFD_RELOC_OR1K_LO13, BFD_RELOC_OR1K_GOT_LO13,
BFD_RELOC_OR1K_TLS_GD_LO13, BFD_RELOC_OR1K_TLS_GD_LO13,
BFD_RELOC_OR1K_TLS_LDM_LO13, BFD_RELOC_OR1K_TLS_IE_LO13,
BFD_RELOC_OR1K_SLO13, BFD_RELOC_OR1K_PLTA26.
(elf_or1k_link_hash_table): Add field saw_plta.
(or1k_final_link_relocate): Add value calculations for new relocations.
(or1k_elf_relocate_section): Add section relocations for new
relocations.
(or1k_write_plt_entry): New function.
(or1k_elf_finish_dynamic_sections): Add support for PLTA relocations
using new l.adrp instruction. Cleanup PLT relocation code generation.
* libbfd.h: Regenerated.
* reloc.c: Add BFD_RELOC_OR1K_PCREL_PG21, BFD_RELOC_OR1K_LO13,
BFD_RELOC_OR1K_SLO13, BFD_RELOC_OR1K_GOT_PG21, BFD_RELOC_OR1K_GOT_LO13,
BFD_RELOC_OR1K_PLTA26, BFD_RELOC_OR1K_TLS_GD_PG21,
BFD_RELOC_OR1K_TLS_GD_LO13, BFD_RELOC_OR1K_TLS_LDM_PG21,
BFD_RELOC_OR1K_TLS_LDM_LO13, BFD_RELOC_OR1K_TLS_IE_PG21,
BFD_RELOC_OR1K_TLS_IE_LO13.
cpu/ChangeLog:
yyyy-mm-dd Richard Henderson <rth@twiddle.net>
* or1k.opc (parse_disp26): Add support for plta() relocations.
(parse_disp21): New function.
(or1k_rclass): New enum.
(or1k_rtype): New enum.
(or1k_imm16_relocs): Define new PO and SPO relocation mappings.
(parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations.
(parse_imm16): Add support for the new 21bit and 13bit relocations.
* or1korbis.cpu (f-disp26): Don't assume SI.
(f-disp21): New pc-relative 21-bit 13 shifted to right.
(insn-opcode): Add ADRP.
(l-adrp): New instruction.
gas/ChangeLog:
yyyy-mm-dd Richard Henderson <rth@twiddle.net>
* config/tc-or1k.c (or1k_apply_fix): Add BFD_RELOC_OR1K_TLS_GD_PG21,
BFD_RELOC_OR1K_TLS_GD_LO13, BFD_RELOC_OR1K_TLS_LDM_PG21,
BFD_RELOC_OR1K_TLS_LDM_LO13, BFD_RELOC_OR1K_TLS_IE_PG21,
BFD_RELOC_OR1K_TLS_IE_LO13.
* testsuite/gas/or1k/allinsn.s: Add test for l.adrp.
* testsuite/gas/or1k/allinsn.d: Add test results for new
instructions.
* testsuite/gas/or1k/reloc-1.s: Add tests to generate
R_OR1K_PLTA26, R_OR1K_GOT_PG21, R_OR1K_TLS_GD_PG21, R_OR1K_TLS_LDM_PG21,
R_OR1K_TLS_IE_PG21, R_OR1K_LO13, R_OR1K_GOT_LO13, R_OR1K_TLS_GD_LO13,
R_OR1K_TLD_LDM_LO13, R_OR1K_TLS_IE_LO13, R_OR1K_LO13, R_OR1K_SLO13
relocations.
* testsuite/gas/or1k/reloc-1.d: Add relocation results for
tests.
* testsuite/gas/or1k/reloc-2.s: Add negative tests for store to
gotpo().
* testsuite/gas/or1k/reloc-2.l: Add expected error test results.
ld/ChangeLog:
yyyy-mm-dd Richard Henderson <rth@twiddle.net>
* testsuite/ld-or1k/or1k.exp: Add test cases for plt generation.
* testsuite/ld-or1k/plt1.dd: New file.
* testsuite/ld-or1k/plt1.s: New file.
* testsuite/ld-or1k/plt1.x.dd: New file.
* testsuite/ld-or1k/plta1.dd: New file.
* testsuite/ld-or1k/plta1.s: New file.
* testsuite/ld-or1k/pltlib.s: New file.
include/ChangeLog:
yyyy-mm-dd Richard Henderson <rth@twiddle.net>
* elf/or1k.h (elf_or1k_reloc_type): Add R_OR1K_PCREL_PG21,
R_OR1K_GOT_PG21, R_OR1K_TLS_GD_PG21, R_OR1K_TLS_LDM_PG21,
R_OR1K_TLS_IE_PG21, R_OR1K_LO13, R_OR1K_GOT_LO13,
R_OR1K_TLS_GD_LO13, R_OR1K_TLS_LDM_LO13, R_OR1K_TLS_IE_LO13,
R_OR1K_SLO13, R_OR1K_PLTA26.
opcodes/ChangeLog:
yyyy-mm-dd Richard Henderson <rth@twiddle.net>
* or1k-asm.c: Regenerated.
* or1k-desc.c: Regenerated.
* or1k-desc.h: Regenerated.
* or1k-dis.c: Regenerated.
* or1k-ibld.c: Regenerated.
* or1k-opc.c: Regenerated.
* or1k-opc.h: Regenerated.
* or1k-opinst.c: Regenerated.
Added checks include:
- Do not allow relocations to global symbols using relocations which are
meant for local symbol relocations.
- Require the use of -fpic when compiling shared libraries.
- Require zero addend for plt relocations.
bfd/ChangeLog:
yyyy-mm-dd Richard Henderson <rth@twiddle.net>
* elf32-or1k.c (or1k_elf_relocate_section): Add error for unknown
relocations. Add error for non zero addend with plt and got
relocations. Add error for got and plt references against dynamic, non
local, symbols. Add error when linking non shared liraries with
flag_pic.
This patch adds the following target relocations:
- BFD_RELOC_HI16_S High 16-bit relocation, for used with signed
asm: ha() lower.
- BFD_RELOC_HI16_S_GOTOFF High 16-bit GOT offset relocation for local
asm: gotoffha() symbols, for use with signed lower.
- BFD_RELOC_OR1K_TLS_IE_AHI16 High 16-bit TLS relocation with initial
asm: gottpoffha() executable calculation, for use with signed
lower.
- BFD_RELOC_OR1K_TLS_LE_AHI16 High 16-bit TLS relocation for local executable
asm: tpoffha() variables, for use with signed lower.
- BFD_RELOC_OR1K_SLO16 Split lower 16-bit relocation, used with
asm: lo() OpenRISC store instructions.
- BFD_RELOC_OR1K_GOTOFF_SLO16 Split lower 16-bit GOT offset relocation for
asm: gotofflo() local symbols, used with OpenRISC store
instructions.
- BFD_RELOC_OR1K_TLS_LE_SLO16 Split lower 16-bit relocation for TLS local
asm: tpofflo() executable variables, used with OpenRISC store
instructions.
bfd/ChangeLog:
yyyy-mm-dd Richard Henderson <rth@twiddle.net>
Stafford Horne <shorne@gmail.com>
* bfd-in2.h: Regenerated.
* elf32-or1k.c (N_ONES): New macro.
(or1k_elf_howto_table): Fix R_OR1K_PLT26 to complain on overflow.
Add definitions for R_OR1K_TLS_TPOFF, R_OR1K_TLS_DTPOFF,
R_OR1K_TLS_DTPMOD, R_OR1K_AHI16, R_OR1K_GOTOFF_AHI16,
R_OR1K_TLS_IE_AHI16, R_OR1K_TLS_LE_AHI16, R_OR1K_SLO16,
R_OR1K_GOTOFF_SLO16, R_OR1K_TLS_LE_SLO16.
(or1k_reloc_map): Add entries for BFD_RELOC_HI16_S,
BFD_RELOC_LO16_GOTOFF, BFD_RELOC_HI16_GOTOFF, BFD_RELOC_HI16_S_GOTOFF,
BFD_RELOC_OR1K_TLS_IE_AHI16, BFD_RELOC_OR1K_TLS_LE_AHI16,
BFD_RELOC_OR1K_SLO16, BFD_RELOC_OR1K_GOTOFF_SLO16,
BFD_RELOC_OR1K_TLS_LE_SLO16.
(or1k_reloc_type_lookup): Change search loop to start ad index 0 and
also check results before returning.
(or1k_reloc_name_lookup): Simplify loop to use R_OR1K_max as index
limit.
(or1k_final_link_relocate): New function.
(or1k_elf_relocate_section): Add support for new AHI and SLO
relocations. Use or1k_final_link_relocate instead of generic
_bfd_final_link_relocate.
(or1k_elf_check_relocs): Add support for new AHI and SLO relocations.
* reloc.c: Add new enums for BFD_RELOC_OR1K_SLO16,
BFD_RELOC_OR1K_GOTOFF_SLO16, BFD_RELOC_OR1K_TLS_IE_AHI16,
BFD_RELOC_OR1K_TLS_IE_AHI16, BFD_RELOC_OR1K_TLS_LE_AHI16,
BFD_RELOC_OR1K_TLS_LE_SLO16. Remove unused BFD_RELOC_OR1K_GOTOFF_HI16
and BFD_RELOC_OR1K_GOTOFF_LO16.
* libbfd.h: Regenerated.
cpu/ChangeLog:
yyyy-mm-dd Richard Henderson <rth@twiddle.net>
* or1k.opc: Add RTYPE_ enum.
(INVALID_STORE_RELOC): New string.
(or1k_imm16_relocs): New array array.
(parse_reloc): New static function that just does the parsing.
(parse_imm16): New static function for generic parsing.
(parse_simm16): Change to just call parse_imm16.
(parse_simm16_split): New function.
(parse_uimm16): Change to call parse_imm16.
(parse_uimm16_split): New function.
* or1korbis.cpu (simm16-split): Change to use new simm16_split.
(uimm16-split): Change to use new uimm16_split.
gas/ChangeLog:
yyyy-mm-dd Richard Henderson <rth@twiddle.net>
* testsuite/gas/or1k/allinsn.d (l_ha): Add result for ha() relocation.
* testsuite/gas/or1k/allinsn.s (l_ha): Add test for ha() relocations.
* testsuite/gas/or1k/allinsn.exp: Renamed to or1k.exp.
* testsuite/gas/or1k/or1k.exp: Add reloc-2 list test.
* testsuite/gas/or1k/reloc-1.d: New file.
* testsuite/gas/or1k/reloc-1.s: New file.
* testsuite/gas/or1k/reloc-2.l: New file.
* testsuite/gas/or1k/reloc-2.s: New file.
include/ChangeLog:
yyyy-mm-dd Richard Henderson <rth@twiddle.net>
* elf/or1k.h (elf_or1k_reloc_type): Add R_OR1K_AHI16,
R_OR1K_GOTOFF_AHI16, R_OR1K_TLS_IE_AHI16, R_OR1K_TLS_LE_AHI16,
R_OR1K_SLO16, R_OR1K_GOTOFF_SLO16, R_OR1K_TLS_LE_SLO16.
ld/ChangeLog:
yyyy-mm-dd Richard Henderson <rth@twiddle.net>
* testsuite/ld-or1k/offsets1.d: New file.
* testsuite/ld-or1k/offsets1.s: New file.
* testsuite/ld-or1k/or1k.exp: New file.
opcodes/ChangeLog:
yyyy-mm-dd Richard Henderson <rth@twiddle.net>
* or1k-asm.c: Regenerate.
The SPARC ELF BFD backend uses a hack in order to accomodate the
STT_REGISTER symbols mandated by the SPARC V9 ABI for 64-bit objects.
The hack works as follows:
- Early in `size_dynamic_symbols', it adds the dynamic STT_REGISTER
symbols and the corresponding DT_SPARC_REGISTER tags if needed,
i.e. if the input object has been annotated by the assembler to use
any of the global registers requiring annotations by the ABI.
The STT_REGISTER symbols are not local, but nevertheless they are
added to the end of the dynlocal linked list (eek, yes) to be fixed
"later". This is done so the symbols are emitted in the symtab.
- Consequently, when the `sh_info' field of the .dynsym section is
calculated in `bfd_elf_final_link' to be `local_dynsymcount + 1', it
may have the wrong value, since the real first global symbol is the
first STT_REGISTER symbol.
- However, this temporary inconsistency is fixed in the
`elf64_sparc_output_arch_syms' backend hook: the sh_index is
adjusted to its rightful value. So all is well and good.
However the 2015 changeset
commit 8539e4e89e
Author: Alan Modra <amodra@gmail.com>
Date: Thu Jan 15 19:42:59 2015 +1030
Fix ARM fail of gap test
ld-elf/gap test was failing due to the ARM backend attempting to output
arch symbols when ld -s (strip all symbols) is in force. This patch
stops that happening and tidies the code a little.
made the `elf_backend_output_arch_syms' backend hook to not be called
when all symbols are to be stripped. This resulted in an incorrect
sh_index for .dynsym when a link is performed with -s (strip_all), in
64-bit sparc ELF objects.
This patch moves the sh_index adjusting code from the target
`output_arch_syms' to `finish_dynamic_sections'. It also removes the
strip_all check from `elf64_sparc_output_arch_syms', as the function
is no longer called in that case.
Tested in sparc64-linux-gnu and sparc-linux-gnu.
No regressions observed.
bfd/ChangeLog:
2018-10-04 Jose E. Marchesi <jose.marchesi@oracle.com>
* elf64-sparc.c (elf64_sparc_output_arch_syms): Do not correct the
impact of STT_REGISTER symbols in the dynsym sh_index here...
* elfxx-sparc.c (_bfd_sparc_elf_finish_dynamic_sections): ... but
do it here.
Alignments of SHT_NOTE sections can be 8 bytes for 64-bit ELF files. We
should put all adjacent SHT_NOTE sections with the same section alignment
into a single PT_NOTE segment even when the section alignment != 4 bytes.
Also check SHT_NOTE section type instead of section name.
PR ld/23658
* elf.c (get_program_header_size): Put all adjacent SHT_NOTE
sections with the same section alignment into a single PT_NOTE
segment. Check SHT_NOTE section type instead of section name.
(_bfd_elf_map_sections_to_segments): Likewise.
bfd/
* elfnn-riscv.c (riscv_make_plt_header): New arg output_bfd. Change
return type to bfd_boolean. If EF_RISCV_RVE call _bfd_error_handler
and return FALSE. Return TRUE at end.
(riscv_make_plt_entry): Likewise.
(riscv_elf_finish_dynamic_symbol): Update call to riscv_make_plt_entry.
(riscv_elf_finish_dynamic_sections): Update call to
riscv_make_plt_header.
bfd/
* elfnn-riscv.c (_bfd_riscv_relax_pc) <R_RISCV_PCREL_LO12_I>: New local
hi_sec_off which is symbol address with addend subtracted. Use in
riscv_find_pcgp_hi_reloc and riscv_record_pcgp_lo_reloc calls.
bfd/
* elfnn-riscv.c (riscv_resolve_pcrel_lo_relocs): Add check for reloc
overflow with addend. Use reloc_dangerous instead of reloc_overflow.
Add strings for the two errors handled here.
(riscv_elf_relocate_section) In case R_RISCV_PCREL_LO12_I, rewrite
comment. Only give error with addend when used with section symbol.
In case bfd_reloc_dangerous, update error string.
ld/
* testsuite/ld-riscv-elf/ld-riscv-elf.exp: Run pcrel-lo-addend-2.
* testsuite/ld-riscv/elf/ld-riscv-elf/pcrel-lo-addend-2.d: New.
* testsuite/ld-riscv/elf/ld-riscv-elf/pcrel-lo-addend-2.s: New.
* testsuite/ld-riscv/elf/ld-riscv-elf/pcrel-lo-addend.d: Update name
and error string.
When opening a BFD for update, as gdb --write does, modifications to
anything but the contents of sections is restricted.
Do not try to write back any ELF headers in this case.
bfd/ChangeLog
2018-09-24 Jozef Lawrynowicz <jozef.l@mittosystems.com>
PR gdb/20948
* elf.c (_bfd_elf_write_object_contents): Return from function
early if abfd->direction == both_direction.
gdb/testsuite/ChangeLog
2018-09-24 Jozef Lawrynowicz <jozef.l@mittosystems.com>
PR gdb/20948
* gdb.base/write_mem.exp: New test.
* gdb.base/write_mem.c: Likewise.
The fls function already exists on macOS and FreeBSD (and probably others),
leading to this error:
/Users/simark/src/binutils-gdb/bfd/elf32-nds32.c:5074:1: error: static declaration of 'fls' follows non-static declaration
fls (register unsigned int x)
^
/usr/include/strings.h:87:6: note: previous declaration is here
int fls(int) __OSX_AVAILABLE_STARTING(__MAC_10_5, __IPHONE_2_0);
^
Add a configure-time check for it, and only define it if the system doesn't
provide it.
bfd/ChangeLog:
* configure.ac: Check for fls.
* elf32-nds32.c (fls): Only define if !HAVE_FLS.
* config.in: Re-generate.
* configure: Re-generate.
Remove duplicate `rs6000-*-aix5.[01]' and `rs6000-*-aix[5-9]*' target
configuration selectors meant to correspond to `powerpc64-*-aix5.[01]'
and `powerpc64-*-aix[5-9]*' respectively for the purpose of BFD target
vector selection in `config.bfd'.
These selectors were added with commit 9a9e2ca332 ("rs6000 xcoff bfd
config"), <https://sourceware.org/ml/binutils/2010-12/msg00372.html>,
and have been dead right from the beginning, because they appear twice
each in the case statement, which means the earlier instance of each
takes precedence and the other one is ignored. Here ones that alias to
`powerpc-*-aix5.[01]' and `powerpc-*-aix[5-9]*' respectively immediately
above are used instead.
bfd/
* config.bfd <rs6000-*-aix5.[01], rs6000-*-aix[5-9]*>: Remove
duplicate `case' selectors.
We have not only removed all unsupported and obsolete code, but also supported lost of new features,
including better link-time relaxations and TLS implementations. Besides, the files generated by the
newly assembler and linker usually get higher performance and more optimized code size.
ld * emultempl/nds32elf.em (hyper_relax): New variable.
(nds32_elf_create_output_section_statements):
the parameters of bfd_elf32_nds32_set_target_option
(PARSE_AND_LIST_PROLOGUE, PARSE_AND_LIST_OPTIONS,
PARSE_AND_LIST_ARGS_CASES): Add new option --mhyper-relax.
* emultempl/nds32elf.em (nds32_elf_after_open): Updated.
* emultempl/nds32elf.em (tls_desc_trampoline): New variable.
* (nds32_elf_create_output_section_statements): Updated.
* (nds32_elf_after_parse): Disable relaxations when PIC is enable.
* (PARSE_AND_LIST_PROLOGUE, PARSE_AND_LIST_OPTIONS,
PARSE_AND_LIST_ARGS_CASES): Add new option --m[no-]tlsdesc-trampoline.
include * elf/nds32.h: Remove the unused target features.
* dis-asm.h (disassemble_init_nds32): Declared.
* elf/nds32.h (E_NDS32_NULL): Removed.
(E_NDS32_HAS_DSP_INST, E_NDS32_HAS_ZOL): New.
* opcode/nds32.h: Ident.
(N32_SUB6, INSN_LW): New macros.
(enum n32_opcodes): Updated.
* elf/nds32.h: Doc fixes.
* elf/nds32.h: Add R_NDS32_LSI.
* elf/nds32.h: Add new relocations for TLS.
gas * config/tc-nds32.c: Remove the unused target features.
(nds32_relax_relocs, md_pseudo_table, nds32_elf_record_fixup_exp,
nds32_set_elf_flags_by_insn, nds32_insert_relax_entry,
nds32_apply_fix): Likewise.
(nds32_no_ex9_begin): Removed.
* config/tc-nds32.c (add_mapping_symbol_for_align,
make_mapping_symbol, add_mapping_symbol): New functions.
* config/tc-nds32.h (enum mstate): New.
(nds32_segment_info_type): Likewise.
* configure.ac (--enable-dsp-ext, --enable-zol-ext): New options.
* config.in: Regenerated.
* configure: Regenerated.
* config/tc-nds32.c (nds32_dx_regs):
Set the value according to the configuration.
(nds32_perf_ext, nds32_perf_ext2, nds32_string_ext, nds32_audio_ext):
Likewise.
(nds32_dsp_ext): New variable. Set the value according to the
configuration.
(nds32_zol_ext): Likewise.
(asm_desc, nds32_pseudo_opcode_table): Make them static.
(nds32_set_elf_flags_by_insn): Updated.
(nds32_check_insn_available): Updated.
(nds32_str_tolower): New function.
* config/tc-nds32.c (relax_table): Updated.
(md_begin): Updated.
(md_assemble): Use XNEW macro to allocate space for `insn.info',
and then remember to free it.
(md_section_align): Cast (-1) to ValueT.
(nds32_get_align): Cast (~0U) to addressT.
(nds32_relax_branch_instructions): Updated.
(md_convert_frag): Add new local variable `final_r_type'.
(invalid_prev_frag): Add new bfd_boolean parameter `relax'.
All callers changed.
* config/tc-nds32.c (struct nds32_relocs_pattern): Add `insn' field.
(struct nds32_hint_map): Add `option_list' field.
(struct suffix_name, suffix_table): Remove the unused `pic' field.
(do_pseudo_b, do_pseudo_bal): Remove the suffix checking.
(do_pseudo_la_internal, do_pseudo_pushpopm): Indent.
(relax_hint_bias, relax_hint_id_current): New static variables.
(reset_bias, relax_hint_begin): New variables.
(nds_itoa): New function.
(CLEAN_REG, GET_OPCODE): New macros.
(struct relax_hint_id): New.
(nds32_relax_hint): For .relax_hint directive, we can use `begin'
and `end' to mark the relax pattern without giving exactly id number.
(nds32_elf_append_relax_relocs): Handle the case that the .relax_hint
directives are attached to pseudo instruction.
(nds32_elf_save_pseudo_pattern): Change the second parameter from
instruction's opcode to byte code.
(nds32_elf_build_relax_relation): Add new bfd_boolean parameter
`pseudo_hint'.
(nds32_lookup_pseudo_opcode): Fix the overflow issue.
(enum nds32_insn_type): Add N32_RELAX_ALU1 and N32_RELAX_16BIT.
(nds32_elf_record_fixup_exp, relax_ls_table, hint_map,
nds32_find_reloc_table, nds32_match_hint_insn, nds32_parse_name):
Updated.
* config/tc-nds32.h (MAX_RELAX_NUM): Extend it to 6.
(enum nds32_relax_hint_type): Merge NDS32_RELAX_HINT_LA and
NDS32_RELAX_HINT_LS into NDS32_RELAX_HINT_LALS. Add
NDS32_RELAX_HINT_LA_PLT, NDS32_RELAX_HINT_LA_GOT and
NDS32_RELAX_HINT_LA_GOTOFF.
* config/tc-nds32.h (relax_ls_table): Add floating load/store
to gp relax pattern.
(hint_map, nds32_find_reloc_table): Likewise.
* configure.ac: Define NDS32_LINUX_TOOLCHAIN.
* configure: Regenerated.
* config.in: Regenerated.
* config/tc-nds32.h (enum nds32_ramp): Updated.
(enum nds32_relax_hint_type): Likewise.
* config/tc-nds32.c: Include "errno.h" and "limits.h".
(relax_ls_table): Add TLS relax patterns.
(nds32_elf_append_relax_relocs): Attach BFD_RELOC_NDS32_GROUP on
each instructions of TLS patterns.
(nds32_elf_record_fixup_exp): Updated.
(nds32_apply_fix): Likewise.
(suffix_table): Add TLSDESC suffix.
binutils* testsuite/binutils-all/objcopy.exp: Set the unsupported reloc number
from 215 to 255 for NDS32.
bfd * elf32-nds32.c (nds32_elf_relax_loadstore):
Remove the unused target features.
(bfd_elf32_nds32_set_target_option): Remove the unused parameters.
(nds32_elf_relax_piclo12, nds32_elf_relax_letlslo12,
nds32_elf_relax_letlsadd, nds32_elf_relax_letlsls,
nds32_elf_relax_pltgot_suff, nds32_elf_relax_got_suff
nds32_elf_relax_gotoff_suff, calculate_plt_memory_address,
calculate_plt_offset, calculate_got_memory_address,
nds32_elf_check_dup_relocs): Removed.
All callers changed.
* elf32-nds32.h: Remove the unused macros and defines.
(elf_nds32_link_hash_table): Remove the unused variable.
(bfd_elf32_nds32_set_target_option): Update prototype.
(nds32_elf_ex9_init): Removed.
* elf32-nds32.c (nds32_convert_32_to_16): Updated.
* elf32-nds32.c (HOWTO2, HOWTO3): Define new HOWTO macros
to initialize array nds32_elf_howto_table in any order
without lots of EMPTY_HOWTO.
(nds32_reloc_map): Updated.
* reloc.c: Add BFD_RELOC_NDS32_LSI.
* bfd-in2.h: Regenerated.
* bfd/libbfd.h: Regenerated.
* elf32-nds32.c (nds32_elf_relax_howto_table): Add R_NDS32_LSI.
(nds32_reloc_map): Likewise.
(nds32_elf_relax_flsi): New function.
(nds32_elf_relax_section): Support floating load/store relaxation.
* elf32-nds32.c (NDS32_GUARD_SEC_P, elf32_nds32_local_gp_offset):
New macro.
(struct elf_nds32_link_hash_entry): New `offset_to_gp' field.
(struct elf_nds32_obj_tdata): New `offset_to_gp' and `hdr_size' fields.
(elf32_nds32_allocate_local_sym_info, nds32_elf_relax_guard,
nds32_elf_is_target_special_symbol, nds32_elf_maybe_function_sym):
New functions.
(nds32_info_to_howto_rel): Add BFD_ASSERT.
(bfd_elf32_bfd_reloc_type_table_lookup, nds32_elf_link_hash_newfunc,
nds32_elf_link_hash_table_create, nds32_elf_relocate_section,
nds32_elf_relax_loadstore, nds32_elf_relax_lo12, nds32_relax_adjust_label,
bfd_elf32_nds32_set_target_option, nds32_fag_mark_relax): Updated.
(nds32_elf_final_sda_base): Improve it to find the better gp value.
(insert_nds32_elf_blank): Must consider `len' when inserting blanks.
* elf32-nds32.h (bfd_elf32_nds32_set_target_option): Update prototype.
(struct elf_nds32_link_hash_table): Add new variable `hyper_relax'.
* elf32-nds32.c (elf32_nds32_allocate_dynrelocs): New function.
(create_got_section): Likewise.
(allocate_dynrelocs, nds32_elf_size_dynamic_sections,
nds32_elf_relocate_section, nds32_elf_finish_dynamic_symbol): Updated.
(nds32_elf_check_relocs): Fix the issue that the shared library may
has TEXTREL entry in the dynamic section.
(nds32_elf_create_dynamic_sections): Enable to call readonly_dynrelocs
since the TEXTREL issue is fixed in the nds32_elf_check_relocs.
(nds32_elf_finish_dynamic_sections): Update and add DT_RELASZ
dynamic entry.
(calculate_offset): Remove the unused parameter `pic_ext_target' and
related codes.
All callers changed.
(elf_backend_dtrel_excludes_plt): Disable it temporarily since it
will cause some errors for our test cases.
* elf32-nds32.c (nds32_elf_merge_private_bfd_data): Allow to link the
generic object.
* reloc.c: Add TLS relocations.
* libbfd.h: Regenerated.
* bfd-in2.h: Regenerated.
* elf32-nds32.h (struct section_id_list_t): New.
(elf32_nds32_lookup_section_id, elf32_nds32_check_relax_group,
elf32_nds32_unify_relax_group, nds32_elf_unify_tls_model):
New prototypes.
(elf32_nds32_compute_jump_table_size, elf32_nds32_local_tlsdesc_gotent):
New macro.
(nds32_insertion_sort, bfd_elf32_nds32_set_target_option,
elf_nds32_link_hash_table): Updated.
* elf32-nds32.c (enum elf_nds32_tls_type): New.
(struct elf32_nds32_relax_group_t, struct relax_group_list_t): New.
(elf32_nds32_add_dynreloc, patch_tls_desc_to_ie, get_tls_type,
fls, ones32, list_insert, list_insert_sibling, dump_chain,
elf32_nds32_check_relax_group, elf32_nds32_lookup_section_id,
elf32_nds32_unify_relax_group, nds32_elf_unify_tls_model): New functions.
(elf_nds32_obj_tdata): Add new fields.
(elf32_nds32_relax_group_ptr, nds32_elf_local_tlsdesc_gotent): New macros.
(nds32_elf_howto_table): Add TLS relocations.
(nds32_reloc_map): Likewise.
(nds32_elf_copy_indirect_symbol, nds32_elf_size_dynamic_sections,
nds32_elf_finish_dynamic_symbol, elf32_nds32_allocate_local_sym_info,
nds32_elf_relocate_section, bfd_elf32_nds32_set_target_option,
nds32_elf_check_relocs, allocate_dynrelocs): Updated.
(nds32_elf_relax_section): Call nds32_elf_unify_tls_model.
(dtpoff_base): Rename it to `gottpof' and then update it.
opcodes * nds32-asm.c (operand_fields): Remove the unused fields.
(nds32_opcodes): Remove the unused instructions.
* nds32-dis.c (nds32_ex9_info): Removed.
(nds32_parse_opcode): Updated.
(print_insn_nds32): Likewise.
* nds32-asm.c (config.h, stdlib.h, string.h): New includes.
(LEX_SET_FIELD, LEX_GET_FIELD): Update defines.
(nds32_asm_init, build_operand_hash_table, build_keyword_hash_table,
build_opcode_hash_table): New functions.
(nds32_keyword_table, nds32_keyword_count_table, nds32_field_table,
nds32_opcode_table): New.
(hw_ktabs): Declare it to a pointer rather than an array.
(build_hash_table): Removed.
* nds32-asm.h (enum): Add SYN_INPUT, SYN_OUTPUT, SYN_LOPT,
SYN_ROPT and upadte HW_GPR and HW_INT.
* nds32-dis.c (keywords): Remove const.
(match_field): New function.
(nds32_parse_opcode): Updated.
* disassemble.c (disassemble_init_for_target):
Add disassemble_init_nds32.
* nds32-dis.c (eum map_type): New.
(nds32_private_data): Likewise.
(get_mapping_symbol_type, is_mapping_symbol, nds32_symbol_is_valid,
nds32_add_opcode_hash_table, disassemble_init_nds32): New functions.
(print_insn_nds32): Updated.
* nds32-asm.c (parse_aext_reg): Add new parameter.
(parse_re, parse_re2, parse_aext_reg): Only reduced registers
are allowed to use.
All callers changed.
* nds32-asm.c (keyword_usr, keyword_sr): Updated.
(operand_fields): Add new fields.
(nds32_opcodes): Add new instructions.
(keyword_aridxi_mx): New keyword.
* nds32-asm.h (enum): Add NASM_ATTR_DSP_ISAEXT, HW_AEXT_ARIDXI_MX
and NASM_ATTR_ZOL.
(ALU2_1, ALU2_2, ALU2_3): New macros.
* nds32-dis.c (nds32_filter_unknown_insn): Updated.
Fixes the bugs exposed by the testcases in the PR, plus two more bugs
I noticed when looking at _bfd_stab_section_find_nearest_line.
PR 23686
* dwarf2.c (read_section): Error when attempting to malloc
"(bfd_size_type) -1".
* syms.c (_bfd_stab_section_find_nearest_line): Bounds check
function_name. Bounds check reloc address. Formatting. Ensure
.stabstr zero terminated.
We have an issue in the MIPS backend, with the handling of undefined
hidden and internal weak symbols. References to such symbols are
supposed to resolve to 0 according to the ELF gABI[1]:
"Unresolved weak symbols have a zero value."
and the 64-bit MIPS psABI[2]:
"If a symbol with one of these [hidden or internal] attributes has no
definition within the executable/DSO being linked, then it must be
resolved to allocated space if common, resolved to zero if weak, or an
error reported otherwise."
however if a GOT relocation is used, then a local GOT entry is created
and used to satisfy the reference. Such an entry is then (in DSO and
PIE binaries) subject to the usual load-time relocation, which means a
non-zero value will be returned if the base address is non-zero. This
will defeat the usual run-time sequence like:
void a (void) __attribute__ ((visibility ("hidden"), weak));
void
x (void)
{
if (a)
a ();
}
This can be reproduced with this simple code:
$ cat libtest.c
extern int a __attribute__ ((visibility ("hidden"), weak));
int *
x (void)
{
return &a;
}
$ cat test.c
int *x (void);
int
main (void)
{
printf ("a: %p\n", x ());
return 0;
}
$ gcc -shared -fPIC -o libtest.so libtest.c
$ gcc -o test test.c -Wl,-rpath,$(pwd) libtest.so
$ ./test
a: 0x77184000
$
The usual approach targets take is making all the steps required to
assign a GOT entry for the symbol referred, and then leave its contents
at zero with no dynamic relocation attached, therefore ensuring that the
value does not change at load time. However this is not going to work
with the implicitly relocated GOT the MIPS psABI specifies[3]:
"The dynamic linker relocates the global offset table by first adding
the difference between the base where the shared object is loaded and
the value of the dynamic tag DT_MIPS_BASE_ADDRESS to all local global
offset table entries."
and we cannot therefore use the local GOT part.
And we cannot offhand use the global part either, as the symbol would
then have to be exported and possibly wrongly preempt symbols in other
modules involved in the dynamic load, because as per the ELF gABI[1] we
are not allowed to enter a hidden or internal symbol into the dynamic
symbol table (and then use its associated GOT entry):
"A hidden symbol contained in a relocatable object must be either
removed or converted to STB_LOCAL binding by the link-editor when the
relocatable object is included in an executable file or shared object."
and:
"An internal symbol contained in a relocatable object must be either
removed or converted to STB_LOCAL binding by the link-editor when the
relocatable object is included in an executable file or shared object."
So we have to choose something else.
Our choice is further limited by the need for the reference associated
with the GOT relocation to stay within the signed 16-bit limit from the
GOT pointer base register, while being compliant with the ELF gABI and
the MIPS psABI. However as Alan Modra has observed[4] one possibility
is to edit (relax) the code such that the GOT reference is removed
altogether.
Based on these observations then modify MIPS BFD linker backend code to:
1. Interpret code associated with GOT relocations and relax the usual LW
or LD instructions into a corresponding immediate load operation that
places the value of 0 in the intended register, while leaving the GOT
entry allocated and initialized as usually.
2. Leave any other instructions associated with GOT relocations in place
and instead redirect the reference to a global GOT entry associated
with a special `__gnu_absolute_zero' symbol created for this purpose,
whose value is 0, SHN_ABS section marks it absolute, binding is
global and export class protected, ensuring that the locally provided
value is always used at load time, and that the value is not
relocated by the dynamic loader.
3. Adjust any high-part GOT relocation used, typically associated with
a LUI instruction, accordingly, so that run-time consistency is
maintained, either by resolving to the original entry if the
instruction associated with the corresponding low-part GOT relocation
has been relaxed to an immediate load (in which case the value loaded
with LUI will be overwritten), or by also redirecting the reference
to `__gnu_absolute_zero' to complete the GOT access sequence if that
symbol has been used.
4. Add a target `elf_backend_hide_symbol' hook, for the three MIPS ABIs,
which prevents the `__gnu_absolute_zero' symbol from being forced
local, to ensure that the redirection works and the symbol remains
global/protected with existing linker scripts unchanged.
5. Observing the issue with handling SHN_ABS symbols in the GNU dynamic
loader, covered by glibc PR 19818, set the EI_ABIVERSION field in the
ELF file header produced to 4 (ABI_ABSOLUTE) if `__gnu_absolute_zero'
symbol has been produced and the target configured indicates the GNU
operating system, so that broken versions of the GNU dynamic loader
gracefully reject the file in loading rather than going astray. Keep
EI_ABIVERSION at the original value for other operating systems or if
no `__gnu_absolute_zero' symbol has been made.
The name of the special `__gnu_absolute_zero' has no meaning other than
how a human reader can interpret it, as it is ignored in dynamic loading
in the handling of the scenarios concerned. This is because the symbol
resolves locally, and it's only the symbol's attributes that matter so
that the associated GOT entry remains unchanged at load time.
Therefore the name is somewhat arbitrary, observing however the need to
use the name space reserved for the system so that it does not conflict
with a possible user symbol, and hence the leading underscore, and also
the `gnu' infix to denote a GNU feature. Other implementations wishing
to address the problem in a similar way may choose a different name and
have the solution still work, possibly with a mixture of modules used in
a dynamic having symbols of different names provided, which will however
not interact with each other due to the protected export class.
The symbol can be referred explicitly, however the name is an internal
implementation detail rather than a part of the ABI, and therefore no
specific semantics is guaranteed.
One limitation of this change is that if `__gnu_absolute_zero' has been
already defined, then we do not wipe the old definition and all kinds of
odd behavior can result. This is however like with other symbols we
internally define, such as `_GLOBAL_OFFSET_TABLE_' or `__rld_map', and
therefore left as a possible future enhancement.
As an optimization the relaxation of LW and LD instructions to a load of
immediate zero is always made, even SVR4 PIC code for code that will end
up in a regular (non-PIE) executable, because there is a cache advantage
with the avoidance of a load from the GOT, even if it is otherwise
guaranteed to remain zero. It does not reliably happen though, due to a
symbol exportation issue affecting executables, covered by PR ld/21805.
One existing test case needs to be updated, as it triggers relaxation
introduced with this change and consequently linker output does not
match expectations anymore. As we want to keep the original issue
covered with the test case modify it then to use the LWL instruction in
place of LW, and adjust the output expected accordingly.
References:
[1] "System V Application Binary Interface - DRAFT - 19 October 2010",
The SCO Group, Section "Symbol Table",
<http://www.sco.com/developers/gabi/2012-12-31/ch4.symtab.html>
[2] "64-bit ELF Object File Specification, Draft Version 2.5", MIPS
Technologies / Silicon Graphics Computer Systems, Order Number
007-4658-001, Section 2.5 "Symbol Table", p. 22,
<http://techpubs.sgi.com/library/manuals/4000/007-4658-001/pdf/007-4658-001.pdf>
[3] "SYSTEM V APPLICATION BINARY INTERFACE, MIPS RISC Processor
Supplement, 3rd Edition", Section "Global Offset Table", p. 5-10,
<http://www.linux-mips.org/pub/linux/mips/doc/ABI/mipsabi.pdf>
[4] "Undo dynamic symbol state after regular object sym type mismatch",
<https://sourceware.org/ml/binutils/2017-07/msg00265.html>
bfd/
PR ld/21375
* elfxx-mips.h (_bfd_mips_elf_hide_symbol): New prototype.
(_bfd_mips_elf_linker_flags): Update prototype.
* elf32-mips.c (elf_backend_hide_symbol): New macro.
* elf64-mips.c (elf_backend_hide_symbol): Likewise.
* elfn32-mips.c (elf_backend_hide_symbol): Likewise.
* elfxx-mips.c (mips_elf_link_hash_table): Add
`use_absolute_zero' and `gnu_target' members.
(mips_elf_record_global_got_symbol): Call
`_bfd_mips_elf_hide_symbol' rather than
`_bfd_elf_link_hash_hide_symbol'.
(mips_use_local_got_p): Return FALSE if the symbol is absolute.
(mips_elf_obtain_contents): Reorder function.
(mips_elf_nullify_got_load): New function.
(mips_elf_calculate_relocation): Add `contents' parameter.
Nullify GOT loads or if it is not possible, then redirect GOT
relocations to the `__gnu_absolute_zero' symbol, for references
that are supposed to resolve to zero.
(mips_elf_define_absolute_zero): New function.
(_bfd_mips_elf_check_relocs): Prepare for arrangements made in
`mips_elf_calculate_relocation' for references made via the GOT
that are supposed to resolve to zero.
(_bfd_mips_elf_hide_symbol): New function.
(_bfd_mips_elf_linker_flags): Add the `gnu_target' parameter,
set the `gnu_target' member of the MIPS hash table.
(MIPS_LIBC_ABI_ABSOLUTE): New enumeration constant.
(_bfd_mips_post_process_headers): Use it.
ld/
PR ld/21375
* emultempl/mipself.em: Set `gnu_target' according to ${target}.
(mips_create_output_section_statements): Update call to
`_bfd_mips_elf_linker_flags'.
* testsuite/ld-mips-elf/pr21334.s: Use LWL rather than LW.
* testsuite/ld-mips-elf/pr21334.dd: Update accordingly.
Move code used to store the contents of a relocated field in output into
a separate function, `mips_elf_store_contents', complementing existing
`mips_elf_obtain_contents'.
bfd/
* elfxx-mips.c (mips_elf_store_contents): New function...
(mips_elf_perform_relocation): ... factored out from here.
Define DIFF_EXPR_OK to Support PC relative diff relocation,
and add CKCORE_PCREL32 relocation process
bfd/
* elf32-csky.c (csky_elf_howto_table): Fill special_function of
R_CKCORE_PCREL32.
(csky_elf_relocate_section): Add R_CKCORE_PCREL32 process.
gas/
* config/tc-csky.c (md_apply_fix): Transmit
BFD_RELOC_32_PCREL to BFD_RELOC_CKCORE_PCREL32.
(tc_gen_reloc): Trasmit BFD_RELOC_CKCORE_ADDR32 to
BFD_RELOC_CKCORE_PCREL32 while pc-relative.
* config/tc-csky.h (DIFF_EXPR_OK): Define to enable PC relative
diff relocs.
dwarf2.c code reasonably assumes that debug info is local to a file,
an assumption now violated by gcc, resulting in "DWARF error: invalid
abstract instance DIE ref" or wrong details when attempting to print
linker error messages with file, function and line reported.
This is because find_abstract_instance is only prepared to handle
DW_FORM_ref_addr when the .debug_info section referenced is in the
current file. When that isn't the case, relocations to access another
file's .debug_info will typically be against a symbol defined at the
start of that .debug_info section, plus an addend. Since the dwarf2.c
code only considers the current file's debug info, that symbol will be
undefined, resolving to zero. In effect the ref_addr will wrongly
resolve to the current file's .debug_info.
This patch avoids the problem by treating relocations in debug
sections against undefined symbols in a similar manner to the way
relocations against symbols defined in discarded sections are
resolved. They result in a zero value (except in .debug_ranges)
regardless of the addend.
PR 23425
* reloc.c (bfd_generic_get_relocated_section_contents): Zero reloc
fields in debug sections when reloc is against an undefined symbol
and called from bfd_simple_get_relocated_section_contents or
similar.
* dwarf2.c (find_abstract_instance): Return true for zero offset
DW_FORM_ref_addr without returning values.
This patch avoids a duplicated error message when an invalid
relocation number is read from an object file in sparc-* ELF targets:
$ strip -g test.o
strip: test.o: unsupported relocation type 0xd7
strip: test.o: unsupported relocation type 0xd7
strip: test.o: bad value
Tested in x86_64-linux-gnu, sparc64-linux-gnu and sparc-linux-gnu
targets.
bfd/ChangeLog:
2018-09-04 Jose E. Marchesi <jose.marchesi@oracle.com>
* elfxx-sparc.c (_bfd_sparc_elf_info_to_howto): Do not issue an
error when an invalid relocation is passed; this is already done
by `_bfd_sparc_elf_info_to_howto_ptr'.
The function `elf64_sparc_slurp_one_reloc_table' in elf64-sparc.c
currently checks that the symbol indexes read in the r_sym fields of
relocations are in range. This is done for both dynamic and
non-dynamic symbols. This avoids subsequent invalid memory accesses.
However, no error is issued to the user.
This patch makes BFD to issue an error when the read symbol index is
out of range, following the same behavior implemented in both the
generic ELF routines and other ELF backends (such as mips64).
Tested in x86_64-linux-gnu, sparc64-linux-gnu, and
--enable-targets=all.
2018-09-04 Jose E. Marchesi <jose.marchesi@oracle.com>
* elf64-sparc.c (elf64_sparc_slurp_one_reloc_table): Issue an
error when an invalid symbol index is retrieved in ELF64_R_SYM of
a relocation seen in an input file.
VMA of the first section in the segment containing the ELF file header
(and possibly section headers too) can't be used to reliably find the
size of the headers plus padding. What's really needed is sh_offset
of the first section assuming it has contents (vma does have a
relationship to sh_offset, but is only guaranteed in demand paged
executables).
If the first section is SHT_NOBITS and it hasn't been converted to
have file contents by the existence of a following SHT_PROGBITS
section in the same segment, the sh_offset value also isn't reliable.
PR 23595
elf.c (copy_elf_program_header): When first segment contains
only the headers and SHT_NOBITS sections, use segment p_filesz
to calculate header and padding size. Use filepos of the first
section otherwise.
An IR object may have an unknown architecture. But it is compatible
with other architecture.
PR ld/23600
* archures.c (bfd_arch_get_compatible): Allow an IR object with
unknown architecture.
This patch uses the newly defined high-part REL16 relocs to emit
relocations on the notoc stubs as we already do for other stubs.
* elf64-ppc.c (num_relocs_for_offset): New function.
(emit_relocs_for_offset): New function.
(use_global_in_relocs): New function, split out from..
(ppc_build_one_stub): ..here. Output relocations for notoc stubs.
(ppc_size_one_stub): Calculate reloc count for notoc stubs.
(ppc64_elf_size_stubs): Don't count undefined syms in stub_globals.
This patch rearranges ppc_size_one_stub to make it a little easier to
compare against ppc_build_one_stub, and makes a few other random
changes that might help for future maintenance. There should be no
functional changes here.
The patch also fixes code examples in comments. A couple of "ori"
instructions lacked the source register operand, and "@high" is the
correct reloc modifier to use in a sequence building a 64-bit value.
(@hi reports overflow of a 32-bit signed value.)
* elf64-ppc.c: Correct _notoc stub comments.
(ppc_build_one_stub): Simplify output of branch for notoc
long branch stub. Don't include label offset of 8 bytes in
"off" calculation for notoc plt stub. Don't emit insns to get pc.
(build_offset): Emit insns to get pc here instead.
(size_offset): Add 4 extra insns.
(plt_stub_size): Adjust for "off" and size_offset changes.
(ppc_size_one_stub): Rearrange code into a switch, duplicating
some to better match ppc_build_one_stub.
Since only the GNU_PROPERTY_X86_UINT32_VALID bit may be set in data-only
relocatable objects which don't contain any instructions, linker
shouldn't mask out the GNU_PROPERTY_X86_UINT32_VALID bit when merging
GNU_PROPERTY_X86_XXX bits. Otherwise, linker output doesn't contain
GNU_PROPERTY_X86_XXX property with any data-only relocatable inputs.
This patch keeps the GNU_PROPERTY_X86_UINT32_VALID bit and updates
readelf to print "<None>" if GNU_PROPERTY_X86_XXX property only has
the GNU_PROPERTY_X86_UINT32_VALID bit.
bfd/
* elfxx-x86.c (_bfd_x86_elf_parse_gnu_properties): Don't mask
out the GNU_PROPERTY_X86_UINT32_VALID bit.
binutils/
* readelf.c (decode_x86_isa): Print <None> if bitmask only
contains the GNU_PROPERTY_X86_UINT32_VALID bit.
(decode_x86_feature_1): Likewise.
(decode_x86_feature_2): Likewise.
(print_gnu_property_note): Don't mask out the
GNU_PROPERTY_X86_UINT32_VALID bit.
* testsuite/binutils-all/i386/pr21231b.d: Updated.
* testsuite/binutils-all/x86-64/pr21231b.d: Likewise.
gas/
* testsuite/gas/i386/i386.exp: Run property-1 and
x86-64-property-1.
* testsuite/gas/i386/property-1.d: New file.
* testsuite/gas/i386/property-1.s: Likewise.
* testsuite/gas/i386/x86-64-property-1.d: Likewise.
ld/
* testsuite/ld-i386/i386.exp: Run property-x86-5.
* testsuite/ld-i386/property-x86-5.d: New file.
* testsuite/ld-x86-64/property-x86-5-x32.d: Likewise.
* testsuite/ld-x86-64/property-x86-5.d: Likewise.
* testsuite/ld-x86-64/property-x86-5a.s: Likewise.
* testsuite/ld-x86-64/property-x86-5b.s: Likewise.
* testsuite/ld-x86-64/x86-64.exp: Run property-x86-5 and
property-x86-5-x32.
The BFD linker with PR ld/23499 may generate shared libraries with
corrupt symbol version info which leads to linker error when the
corrupt shared library is used:
/usr/bin/ld: bin/libKF5Service.so.5.49.0: _edata: invalid version 21 (max 0)
/usr/bin/ld: bin/libKF5Service.so.5.49.0: error adding symbols: bad value
Add check for corrupt symbol version info to objdump:
00000000000af005 g D .data 0000000000000000 <corrupt> _edata
and readelf:
728: 00000000000af005 0 NOTYPE GLOBAL DEFAULT 25 _edata@<corrupt> (5)
bfd/
PR ld/23499
* elf.c (_bfd_elf_get_symbol_version_string): Return
_("<corrupt>") for corrupt symbol version info.
binutils/
PR ld/23499
* readelf.c (get_symbol_version_string): Return _("<corrupt>")
for corrupt symbol version info.
The older linker treats .note.gnu.property section as a generic note
and just concatenates all .note.gnu.property sections from the input
to the output. On CET-enabled OS, the output of the older linker is
marked as CET enabled, but in fact, it is not CET enabled and it crashes
on CET-enabled machines.
This patch defines GNU_PROPERTY_X86_UINT32_VALID. Linker is updated to
set the GNU_PROPERTY_X86_UINT32_VALID bit in GNU property note for
non-relocatable output to differentiate outputs from the older linker.
bfd/
* elfxx-x86.c (_bfd_x86_elf_parse_gnu_properties): Mask out the
GNU_PROPERTY_X86_UINT32_VALID bit.
(_bfd_x86_elf_link_fixup_gnu_properties): Set the
GNU_PROPERTY_X86_UINT32_VALID bit for non-relocatable output.
binutils/
* readelf.c (print_gnu_property_note): Check the
GNU_PROPERTY_X86_UINT32_VALID bit for invalid GNU property note.
include/
* elf/common.h (GNU_PROPERTY_X86_UINT32_VALID): New.
PR 23460
* plugin.c (struct plugin_list_entry): New structure.
(plugin_list): New variable.
(try_load_plugin): Place opened plugins on a list. Ensure that
the refcount in the dynamic loader is kept at 1.
The "-fPIC" and "-mcmodel=small" parts of these messages isn't always
true, so lets dispense with that and just report the type of stub
causing trouble.
* elf64-ppc.c (ppc64_elf_relocate_section): Revise "call lacks
nop" error message.
PR 23061
* coffgen.c (coff_pointerize_aux): Add table_end parameter. Use
it to prevent walking off the end of the table.
(coff_get_normalized_symtab): Pass internal_end pointer to
coff_pointerize_aux.
* elf-hppa.h (elf_hppa_fake_sections): Use SHT_PARISC_UNWIND as
the section type of the .PARISC.unwind section on 64-bit binaries
and SHT_PROGBITS for 32-bit binaries. Add a comment about it.
Add comment about the sh_entsize value.
* bfd/elf32-s12z.c: (opru18_reloc): New function.
* bfd/elf32-s12z.c: (elf_s12z_howto_table): Adjust Howto according to new knowledge.
* include/elf/s12z.h: Rename R_S12Z_UKNWN_3 to R_S12Z_EXT18.
These take up far too many lines in the files. This patch introduces
a replacement for the HOWTO macro that simplifies the relow howto
initialization. Apart from the two relocs mentioned in the ChangeLog,
no relocation howto is changed.
* elf64-ppc.c (HOW): Define.
(ONES): Delete.
(ppc64_elf_howto_raw): Use HOW to initialize entries.
* elf32-ppc.c (HOW): Define.
(ppc_elf_howto_raw): Use HOW to initialize entries, updating
R_PPC_VLE_REL15 and R_PPC_VLE_REL24 to use bitpos=0.
This patch uses bitfields in reloc_howto_struct, reducing its size
from 80 to 40 bytes on 64-bit hosts and from 52 to 32 bytes on 32-bit
hosts (with a 32-bit bfd_vma). I've also added a new "negate" field
rather than making the encoded "size" field do double duty as both
a size and a flag.
There was just one use of an encoded size of 8, which according to
bfd_get_reloc_size meant 16 bytes, in vms-alpha.c ALPHA_R_LINKAGE.
See git commit c3d8e071bf adding ALPHA_R_LINKAGE and git commit
8612a388f7 decoding size 8 in bfd_get_reloc_size. Since no other part
of BFD handles 16 byte relocs, I've removed that encoding and special
cased the ALPHA_R_LINKAGE size in vms-alpha.c.
* reloc.c (reloc_howto_type): Typedef.
(bfd_symbol): Delete forward declaration.
(struct reloc_howto_struct): Add "negate" field. Make "size",
"bitsize", "rightshift", "bitpos", "complain_on_overflow",
"pc_relative", "partial_inplace", and "pcrel_offset" bitfields.
Rearrange for better packing. Revise comments.
(HOWTO): Map to rearranged reloc_howto_struct.
(bfd_get_reloc_size): Delete now unused cases.
(read_reloc, write_reloc): Likewise.
(apply_reloc, _bfd_relocate_contents): Test howto->negate
rather than howto->size < 0 for negated relocation values.
* coff-rs6000.c (xcoff_complain_overflow_bitfield_func): Avoid
signed/unsigned warning.
(xcoff_ppc_relocate_section): Delete "condition is always false"
code.
* coff64-rs6000.c (xcoff64_ppc_relocate_section): Likewise.
* cpu-ns32k.c (do_ns32k_reloc): Adjust to suit reloc_howto_struct
changes.
* vms-alpha.c (_bfd_vms_write_etir, alpha_vms_slurp_relocs): Use
size 16 for ALPHA_R_LINKAGE.
(alpha_howto_table <ALPHA_R_LINKAGE>): Set encoded size and
bitsize to zero.
* bfd-in.h (reloc_howto_type): Delete.
* bfd-in2.h: Regenerate.
NEWHOWTO was promised way back in 1991 (git commit e568362218).
I doubt it's ever going to be implemented. This patch removes it,
and tidies some reloc howtos. I was going to make some changes to
reloc_howto_struct, so I think it's important that all relocs howtos
are initialized with HOWTO.
* reloc.c (HOWTO): Revise comment.
(NEWHOWTO, HOWTO_PREPARE): Delete.
* coff-arm.c (coff_arm_reloc_type_lookup): Replace const struc
reloc_howto_struct with reloc_howto_type.
* ns32knetbsd.c (MY_bfd_reloc_type_lookup): Likewise.
* vms-alpha.c (alpha_vms_bfd_reloc_type_lookup): Likewise.
* elf-hppa.h (HOW): Define.
(elf_hppa_howto_table): Use it to simplify this table, correcting
name of R_PARISC_LTOFF16WF, R_PARISC_LTOFF_FPTR64, and
R_PARISC_LTOFF_FPTR16DF.
* elf32-mep.c (MEPREL): Use HOWTO.
* bfd-in2.h: Regenerate.
When it can be done at compile time.
* mmo.c (valid_mmo_symbol_character_set): Initialize and make
array const.
(mmo_init): Don't init valid_mmo_symbol_character_set.
There is no need to generate .note.gnu.property section with empty
X86_FEATURE_1_AND property. This patch adds fixup_gnu_properties
to ELF linker backend so that x86 backend can remove it.
bfd/
PR ld/23515
* elf-bfd.h (elf_backend_data): Add fixup_gnu_properties.
* elf-properties.c (_bfd_elf_link_setup_gnu_properties): Call
backend fixup_gnu_properties if it isn't NULL. Discard
.note.gnu.property section if all properties have been removed.
* elfxx-target.h (elf_backend_fixup_gnu_properties): New.
(elfNN_bed): Initialize fixup_gnu_properties.
* elfxx-x86.c (_bfd_x86_elf_link_fixup_gnu_properties): New
function.
* elfxx-x86.h (_bfd_x86_elf_link_fixup_gnu_properties): New
prototype.
(elf_backend_fixup_gnu_properties): New.
ld/
PR ld/23515
* testsuite/ld-i386/ibt-plt-2a.d: Updated.
* testsuite/ld-i386/ibt-plt-2b.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-2a-x32.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-2a.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-2b-x32.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-2b.d: Likewise.
ppc_stub_long_branch_notoc will never need more than a 32-bit offset
for the r12 offset since the stub target must be in range of a
branch instruction.
* elf64-ppc.c: Correct ppc_stub_long_branch_notoc example.
Formatting.
commit 6404ab9937
Author: H.J. Lu <hjl.tools@gmail.com>
Date: Wed Aug 8 21:00:04 2018 -0700
Convert .note.gnu.property section between ELF32 and ELF64
updated bfd_convert_section_size and bfd_convert_section_contents
in bfd.c to call _bfd_elf_convert_gnu_property_size and
_bfd_elf_convert_gnu_properties, which are defined in elf-properties.c.
It led to
bfd.c:2484: undefined reference to `_bfd_elf_convert_gnu_property_size'
for non-ELF targets. Since elf-properties.c is a generic implementation
and doesn't reference any ELF specific functions directly, this patch
moves elf-properties.lo BFD32_LIBS.
Tested for many ELF and non-ELF targets.
PR binutils/23494
* Makefile.am (BFD32_LIBS): Add elf-properties.lo.
(BFD32_LIBS_CFILES): Add elf-properties.c.
(BFD32_BACKENDS): Remove elf-properties.lo.
(BFD32_BACKENDS_CFILES): Remove elf-properties.c.
* configure.ac (elf): Remove elf-properties.lo.
* Makefile.in: Regenerated.
* configure: Likewise.
Existing properties may be removed during property merging. We avoid
adding X86_ISA_1_NEEDED property only if existing properties won't be
removed.
bfd/
PR ld/23428
* elfxx-x86.c (_bfd_x86_elf_link_setup_gnu_properties): Don't
add X86_ISA_1_NEEDED property only if existing properties won't
be removed.
ld/
PR ld/23428
* testsuite/ld-elf/dummy.s: New file.
* testsuite/ld-elf/linux-x86.S: Add X86_FEATURE_1_AND property.
* testsuite/ld-elf/linux-x86.exp: Add dummy.s to pr23428.
This patch factors out some code common to both bfd_perform_relocation
and bfd_install_relocation, in the process fixing the omission of
"case -1" in bfd_install_relocation.
* reloc.c (bfd_get_reloc_size): Sort switch.
(read_reloc, write_reloc, apply_reloc): New functions.
(bfd_perform_relocation, bfd_install_relocation): Use apply_reloc.
(_bfd_relocate_contents): Use read_reloc and write_reloc.
(_bfd_clear_contents): Likewise.
When linker defines a symbol to override a dynamic definition, it should
always clear h->verinfo.verdef so that the symbol won't be associated
with the version information from the dynamic object. This happened to
the symbol "_edata" when creating an unversioned dynamic object linking
against:
1. libKF5ConfigCore.so.5.49.0
2. libKF5CoreAddons.so.5.49.0
3. libKF5I18n.so.5.49.0
4. libKF5DBusAddons.so.5.49.0
5. libQt5Xml.so.5.11.1
6. libQt5DBus.so.5.11.1
7. libQt5Core.so.5.11.1
Among them
libQt5Xml.so.5.11.1
299: 000000000003e000 0 NOTYPE GLOBAL DEFAULT 18 _edata@@Qt_5
libQt5DBus.so.5.11.1
597: 0000000000092018 0 NOTYPE GLOBAL DEFAULT 18 _edata@@Qt_5
libQt5Core.so.5.11.1
2292: 00000000004df640 0 NOTYPE GLOBAL DEFAULT 21 _edata@Qt_5
2293: 00000000004df640 0 NOTYPE GLOBAL DEFAULT 21 _edata@Qt_5
The problem is triggered by 2 duplicated entries of _edata@Qt_5 in
libQt5Core.so.5.11.1 which was created by gold. Before this commit,
ld created the dynamic object with "_edata" in its dynamic symbol table
which was linker defined and associated with the version information
from libQt5Core.so.5.11.1. The code in question was there when the
binutils source was imported to sourceware.org. When such a dynamic
object was used later, we got:
/usr/bin/ld: bin/libKF5Service.so.5.49.0: _edata: invalid version 21 (max 0)
/usr/bin/ld: bin/libKF5Service.so.5.49.0: error adding symbols: bad value
Tested with many ELF targets.
PR ld/23499
* elflink.c (bfd_elf_record_link_assignment): Always clear
h->verinfo.verdef when overriding a dynamic definition.
For GNU_PROPERTY_STACK_SIZE, pr_datasz is the same as align_size, which
is 8 bytes for 64-bit ELF binaries and 4 bytes for 32-bit ELF binaries,
Use align_size as pr_datasz for GNU_PROPERTY_STACK_SIZE to convert
.note.gnu.property section.
bfd/
PR binutils/23494
* elf-properties.c (elf_get_gnu_property_section_size): Always
use align_size as pr_datasz for GNU_PROPERTY_STACK_SIZE.
(elf_write_gnu_properties): Likewise.
binutils/
PR binutils/23494
* testsuite/binutils-all/x86-64/pr23494c.s: New file.
* testsuite/binutils-all/x86-64/pr23494e-x32.d: Likewise.
* testsuite/binutils-all/x86-64/pr23494e.d: Likewise.
Without the GNU_PROPERTY_X86_ISA_1_USED property, all ISAs may be used.
If a bit in the GNU_PROPERTY_X86_ISA_1_USED property is unset, the
corresponding x86 instruction set isn’t used. When merging properties
from 2 input files and one input file doesn't have the
GNU_PROPERTY_X86_ISA_1_USED property, the output file shouldn't have
it neither. This patch removes the GNU_PROPERTY_X86_ISA_1_USED
property if an input file doesn't have it.
This patch replaces the GNU_PROPERTY_X86_ISA_1_USED property with the
GNU_PROPERTY_X86_ISA_1_NEEDED property which is the minimum ISA
requirement.
bfd/
PR ld/23486
* elfxx-x86.c (_bfd_x86_elf_merge_gnu_properties): Remove
GNU_PROPERTY_X86_ISA_1_USED if an input file doesn't have it.
(_bfd_x86_elf_link_setup_gnu_properties): Adding the
GNU_PROPERTY_X86_ISA_1_NEEDED, instead of
GNU_PROPERTY_X86_ISA_1_USED, property.
ld/
PR ld/23486
* testsuite/ld-i386/i386.exp: Run PR ld/23486 tests.
* testsuite/ld-x86-64/x86-64.exp: Likewise.
* testsuite/ld-i386/pr23486a.d: New file.
* testsuite/ld-i386/pr23486b.d: Likewise.
* testsuite/ld-x86-64/pr23486a-x32.d: Likewise.
* testsuite/ld-x86-64/pr23486a.d: Likewise.
* testsuite/ld-x86-64/pr23486a.s: Likewise.
* testsuite/ld-x86-64/pr23486b-x32.d: Likewise.
* testsuite/ld-x86-64/pr23486b.d: Likewise.
* testsuite/ld-x86-64/pr23486b.s: Likewise.
* testsuite/ld-i386/property-3.r: Remove "x86 ISA used".
* testsuite/ld-i386/property-4.r: Likewise.
* testsuite/ld-i386/property-5.r: Likewise.
* testsuite/ld-i386/property-x86-ibt3a.d: Likewise.
* testsuite/ld-i386/property-x86-ibt3b.d: Likewise.
* testsuite/ld-i386/property-x86-shstk3a.d: Likewise.
* testsuite/ld-i386/property-x86-shstk3b.d: Likewise.
* testsuite/ld-x86-64/property-3.r: Likewise.
* testsuite/ld-x86-64/property-4.r: Likewise.
* testsuite/ld-x86-64/property-5.r: Likewise.
* testsuite/ld-x86-64/property-x86-ibt3a-x32.d: Likewise.
* testsuite/ld-x86-64/property-x86-ibt3a.d: Likewise.
* testsuite/ld-x86-64/property-x86-ibt3b-x32.d: Likewise.
* testsuite/ld-x86-64/property-x86-ibt3b.d: Likewise.
* testsuite/ld-x86-64/property-x86-shstk3a-x32.d: Likewise.
* testsuite/ld-x86-64/property-x86-shstk3a.d: Likewise.
* testsuite/ld-x86-64/property-x86-shstk3b-x32.d: Likewise.
* testsuite/ld-x86-64/property-x86-shstk3b.d: Likewise.
This patch generates EH info for the new _notoc linkage stubs, to
support unwinding from asynchronous signal handlers. Unwinding
through the __tls_get_addr_opt stub was already supported, but that
was just a single stub. With multiple stubs the EH opcodes need to be
emitted and sized when iterating over stubs, so this is done when
emitting and sizing the stub code. Emitting the CIEs and FDEs is done
when sizing the stubs, as we did before in order to have the linker
generated FDEs indexed in .eh_frame_hdr. I moved the final tweaks to
FDEs from ppc64_elf_finish_dynamic_sections to ppc64_elf_build_stubs
simply because it's tidier to be done with them at that point.
bfd/
* elf64-ppc.c (struct map_stub): Delete tls_get_addr_opt_bctrl.
Add lr_restore, eh_size and eh_base.
(eh_advance, eh_advance_size): New functions.
(build_tls_get_addr_stub): Emit EH info for stub.
(ppc_build_one_stub): Likewise for _notoc stubs.
(ppc_size_one_stub): Size EH info for stub.
(group_sections): Init new map_stub fields.
(stub_eh_frame_size): Delete.
(ppc64_elf_size_stubs): Size EH info for stubs. Set up dummy EH
program for stubs.
(ppc64_elf_build_stubs): Reinit new map_stub fields. Set FDE
offset to stub section here..
(ppc64_elf_finish_dynamic_sections): ..rather than here.
ld/
* testsuite/ld-powerpc/notoc.s: Generate some cfi.
* testsuite/ld-powerpc/notoc.d: Adjust.
* testsuite/ld-powerpc/notoc.wf: New file.
* testsuite/ld-powerpc/powerpc.exp: Run "ext" and "notoc" tests
as run_ld_link_tests rather than run_dump_test.
This patch fixes a bug in the handling of the __tls_get_addr_opt
stub. Calls via this stub don't have a toc restoring instruction
following the "bl", and the stub itself doesn't have an initial toc
save instruction. Thus it is incorrect to skip over the first
instruction when a __tls_get_addr call is marked with a tocsave
reloc.
* elf64-ppc.c (ppc64_elf_relocate_section): Don't skip first
instruction of __tls_get_addr_opt stub.
(plt_stub_size): Omit ALWAYS_EMIT_R2SAVE condition when
dealing with __tls_get_addr_opt stub.
(build_tls_get_addr_stub, ppc_size_one_stub): Likewise.
MWDT compiler doesn't use eflags and makes use of 0x0c section. For
those, silence the gnu warning system.
bfd/
Claudiu Zissulescu <claziss@synopsys.com>
* elf32-arc.c (arc_elf_merge_private_bfd_data): Complain about
efalgs only when in/out exists.
(elf32_arc_section_from_shdr): Don't complain about 0x0c section
type. It is mwdt compiler specific.
R_PPC64_REL24_NOTOC is used on calls like "bl foo@notoc" to tell the
linker that linkage stubs for PLT calls or long branches can't use r2
for pic addressing. Instead, new stubs that generate pc-relative
addresses are used. One complication is that pc-relative offsets to
the PLT may need to be 64-bit in large programs, in contrast to the
toc-relative addressing used by older PLT linkage stubs where a 32-bit
offset is sufficient until the PLT itself exceeds 2G in size.
.eh_frame info to cover the _notoc stubs is yet to be implemented.
bfd/
* elf64-ppc.c (ADDI_R12_R11, ADDI_R12_R12, LIS_R12),
(ADDIS_R12_R11, ORIS_R12_R12_0, ORI_R12_R12_0),
(SLDI_R12_R12_32, LDX_R12_R11_R12, ADD_R12_R11_R12): Define.
(ppc64_elf_howto_raw): Add R_PPC64_REL24_NOTOC entry.
(ppc64_elf_reloc_type_lookup): Support R_PPC64_REL24_NOTOC.
(ppc_stub_type): Add ppc_stub_long_branch_notoc,
ppc_stub_long_branch_both, ppc_stub_plt_branch_notoc,
ppc_stub_plt_branch_both, ppc_stub_plt_call_notoc, and
ppc_stub_plt_call_both.
(is_branch_reloc): Add R_PPC64_REL24_NOTOC.
(build_offset, size_offset): New functions.
(plt_stub_size): Support plt_call_notoc and plt_call_both.
(ppc_build_one_stub, ppc_size_one_stub): Support new stubs.
(toc_adjusting_stub_needed): Handle R_PPC64_REL24_NOTOC.
(ppc64_elf_size_stubs): Likewise, and new stubs.
(ppc64_elf_build_stubs, ppc64_elf_relocate_section): Likewise.
* reloc.c: Add BFD_RELOC_PPC64_REL24_NOTOC.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
gas/
* config/tc-ppc.c (ppc_elf_suffix): Support @notoc.
(ppc_force_relocation, ppc_fix_adjustable): Handle REL24_NOTOC.
ld/
* testsuite/ld-powerpc/ext.d,
* testsuite/ld-powerpc/ext.s,
* testsuite/ld-powerpc/ext.lnk,
* testsuite/ld-powerpc/notoc.d,
* testsuite/ld-powerpc/notoc.s: New tests.
* testsuite/ld-powerpc/powerpc.exp: Run them.
Not a lot is conveyed by putting _r2off in a stub symbol that can't be
seen by inspecting the stub code or the toc restoring instruction
immediately after a call via such a stub. Also, we don't distinguish
plt_call stub symbols from plt_call_r2save stub symbols, so this patch
makes long branch and plt branch stub symbols consistent with that
decision.
bfd/
* elf64-ppc.c (ppc_build_one_stub): Lose "_r2off" in stub symbols.
ld/
* testsuite/ld-powerpc/elfv2exe.d: Adjust for stub symbol change.
* testsuite/ld-powerpc/tocopt6.d: Likewise.
PR 23460
* plugin.c (bfd_plugin_open_input): Close file descriptor if the
call to fstat fails.
(try_claim): Always close the file descriptor at the end of the
function.
(try_load_plugin): If a plugin has already been registered, then
skip the dlopen and onload steps and go straight to claiming the
file. If these is an error, close the plugin.
This patch sets stub_offset in ppc_size_one_stub rather than in
ppc_build_one_stub. That allows the plt stub alignment to be done in
just ppc_size_one_stub rather than both functions. The patch also
corrects the place where the alignment was done, fixing a possible
error in .eh_frame data, and tidies some offset calculations.
bfd/
* elf64-ppc.c (plt_stub_pad): Delay plt_stub_size call until needed.
(ppc_build_one_stub): Don't set stub_offset, instead assert that
it is sane. Don't adjust stub_offset for alignment. Adjust size
calculation. Use "targ" temp when calculating offsets.
(ppc_size_one_stub): Set stub_offset here. Use "targ" temp when
calculating offsets. Adjust for alignment before setting
tls_get_addr_opt_bctrl.
ld/
* testsuite/ld-powerpc/powerpc.exp: Run tlsopt5 with plt alignment.
* testsuite/ld-powerpc/tlsopt5.s: Add extra call.
* testsuite/ld-powerpc/tlsopt5.wf: Adjust expected output.
* testsuite/ld-powerpc/tlsopt5.d: Likewise.
PR 22706
* elf32-sh.c (sh_elf_relocate_section): When processing
translation relocs, fail if the relocation offset is too small.
Replace BFD_ASSERTs with more helpful error messages.
This patch series is a new binutils port for C-SKY processors, including support for both the V1 and V2 processor variants. V1 is derived from the MCore architecture while V2 is substantially different, with mixed 16- and 32-bit instructions, a larger register set, a different (but overlapping) ABI, etc. There is support for bare-metal ELF targets and Linux with both glibc and uClibc.
This code is being contributed jointly by C-SKY Microsystems and Mentor Graphics. C-SKY is responsible for the technical content and has proposed Lifang Xia and Yunhai Shang as port maintainers. (Note that C-SKY does have a corporate copyright assignment on file with the FSF.) Mentor Graphics' role has been cleaning up the code, adding documentation and additional test cases, etc, to address issues we anticipated reviewers would complain about.
bfd * Makefile.am (ALL_MACHINES, ALL_MACHINES_CFILES): Add C-SKY.
(BFD32_BACKENDS, BFD_BACKENDS_CFILES): Likewise.
* Makefile.in: Regenerated.
* archures.c (enum bfd_architecture): Add bfd_arch_csky and
related bfd_mach defines.
(bfd_csky_arch): Declare.
(bfd_archures_list): Add C-SKY.
* bfd-in.h (elf32_csky_build_stubs): Declare.
(elf32_csky_size_stubs): Declare.
(elf32_csky_next_input_section: Declare.
(elf32_csky_setup_section_lists): Declare.
* bfd-in2.h: Regenerated.
* config.bfd: Add C-SKY.
* configure.ac: Likewise.
* configure: Regenerated.
* cpu-csky.c: New file.
* elf-bfd.h (enum elf_target_id): Add C-SKY.
* elf32-csky.c: New file.
* libbfd.h: Regenerated.
* reloc.c: Add C-SKY relocations.
* targets.c (csky_elf32_be_vec, csky_elf32_le_vec): Declare.
(_bfd_target_vector): Add C-SKY target vector entries.
binutils* readelf.c: Include elf/csky.h.
(guess_is_rela): Handle EM_CSKY.
(dump_relocations): Likewise.
(get_machine_name): Likewise.
(is_32bit_abs_reloc): Likewise.
include * dis-asm.h (csky_symbol_is_valid): Declare.
* opcode/csky.h: New file.
opcodes * Makefile.am (TARGET_LIBOPCODES_CFILES): Add csky-dis.c.
* Makefile.in: Regenerated.
* configure.ac: Add C-SKY.
* configure: Regenerated.
* csky-dis.c: New file.
* csky-opc.h: New file.
* disassemble.c (ARCH_csky): Define.
(disassembler, disassemble_init_for_target): Add case for ARCH_csky.
* disassemble.h (print_insn_csky, csky_get_disassembler): Declare.
gas * Makefile.am (TARGET_CPU_CFILES): Add entry for C-SKY.
(TARGET_CPU_HFILES, TARGET_ENV_HFILES): Likewise.
* Makefile.in: Regenerated.
* config/tc-csky.c: New file.
* config/tc-csky.h: New file.
* config/te-csky_abiv1.h: New file.
* config/te-csky_abiv1_linux.h: New file.
* config/te-csky_abiv2.h: New file.
* config/te-csky_abiv2_linux.h: New file.
* configure.tgt: Add C-SKY.
* doc/Makefile.am (CPU_DOCS): Add entry for C-SKY.
* doc/Makefile.in: Regenerated.
* doc/all.texi: Set CSKY feature.
* doc/as.texi (Overview): Add C-SKY options.
(Machine Dependencies): Likewise.
* doc/c-csky.texi: New file.
* testsuite/gas/csky/*: New test cases.
ld * Makefile.am (ALL_EMULATION_SOURCES): Add C-SKY emulations.
(ecskyelf.c, ecskyelf_linux.c): New rules.
* Makefile.in: Regenerated.
* configure.tgt: Add C-SKY.
* emulparams/cskyelf.sh: New file.
* emulparams/cskyelf_linux.sh: New file.
* emultempl/cskyelf.em: New file.
* gen-doc.texi: Add C-SKY.
* ld.texi: Likewise.
(Options specific to C-SKY targets): New section.
* testsuite/ld-csky/*: New tests.
This adds support for ".localentry 1", a new st_other
STO_PPC64_LOCAL_MASK encoding that signifies a function with a single
entry point like ".localentry 0", but unlike a ".localentry 0"
function does not preserve r2.
include/
* elf/ppc64.h: Specify byte offset to local entry for values
of two to six in STO_PPC64_LOCAL_MASK. Clarify r2 return
value for such functions when entering via global entry point.
Specify meaning of a value of one in STO_PPC64_LOCAL_MASK.
bfd/
* elf64-ppc.c (ppc64_elf_size_stubs): Use a ppc_stub_long_branch_r2off
for calls to symbols with STO_PPC64_LOCAL_MASK bits set to 1.
gas/
* config/tc-ppc.c (ppc_elf_localentry): Allow .localentry values
of 1 and 7 to directly set value into STO_PPC64_LOCAL_MASK bits.
ld/testsuite/
* ld-powerpc/elfv2.s: Add .localentry f5,1 testcase.
* ld-powerpc/elfv2exe.d: Update.
* ld-powerpc/elfv2so.d: Update.
One of the ill effects of ld -r is to mash together sections. That
can result in reduced icache performance at runtime due to unexpected
movement of code. Another problem is that sections can become too
large to link on targets that have limited relative addressing. ld -r
--relax attempts to overcome the large section problem for branches by
inserting trampolines, but the powerpc support added lots of
unnecessary trampolines. This patch trims them somewhat.
bfd/
* elf32-ppc.c (ppc_elf_relax_section): Ignore common or undef locals.
Avoid trashing toff with added when used as a symbol index.
Ignore R_PPC_PLTREL24 addends in unused example code. Avoid
creating unnecessary fixups when relocatable.
ld/
* testsuite/ld-powerpc/big.s: New file.
* testsuite/ld-powerpc/relaxrl.d: New test.
* testsuite/ld-powerpc/powerpc.exp: Run new test.
* testsuite/ld-powerpc/relaxr.d: Adjust.
The function elf_xtensa_finish_dynamic_sections checks that sizes of
sections .rela.dyn and .rela.plt match number of corresponding relocation
records, but the check is only done when .rela.plt is non-empty, so, e.g.
it is never run for the static PIE.
Rearrange the test so that .rela.dyn and .rela.plt are checked always.
bfd/
2018-07-23 Max Filippov <jcmvbkbc@gmail.com>
* elf32-xtensa.c (elf_xtensa_finish_dynamic_sections): Move
relocation sections consistency check to always check both
.rela.dyn and .rela.plt when they exist. Rearrange variable
definition and assignment places.
The change c451bb34ae ("xtensa: don't emit dynamic relocation for weak
undefined symbol") didn't properly handle shrinking of relocation
sections due to coalescing of references to a dynamic undefined weak
symbol in a shared object, which resulted in the following assertion
failure in ld when linking uClibc-ng libthread_db for xtensa:
BFD (GNU Binutils) 2.31 internal error, aborting at elf32-xtensa.c:3269
in elf_xtensa_finish_dynamic_sections
Shrink dynamic relocations section for dynamic undefined weak symbols
when linking a shared object.
bfd/
2018-07-23 Max Filippov <jcmvbkbc@gmail.com>
* elf32-xtensa.c (shrink_dynamic_reloc_sections): Shrink dynamic
relocations section for dynamic undefined weak symbols when
linking a shared object.
I built gdb with ubsan and ran the test suite.
One complaint was due to bfd_get_elf_phdrs passing NULL to memcpy.
This patch avoids the complaint.
bfd/ChangeLog
2018-07-23 Tom Tromey <tom@tromey.com>
* elf.c (bfd_get_elf_phdrs): Don't call memcpy with size 0.
On ARM/VxWorks 7, the R_ARM_TARGET2 relocation used for exception handling
is R_ARM_GOT_PREL; moreover in Ada you can define local exceptions. In this
case, you may end up with a GOT relocation against a local symbol in a
non-PIC link and the ARM linker leaves the GOT slot uninitialized, unlike
for example the i386 or the SPARC linkers in the same situation.
bfd/
* elf32-arm.c (elf32_arm_final_link_relocate) <R_ARM_GOT32>: Small
cleanup for the case of a global symbol that binds locally. Also
install a value in the GOT slot in the case of a local symbol in
a non-PIC link.
When -z separate-code, which is enabled by default for Linux/x86, is
used to create executable, ld won't place any data in the code-only
PT_LOAD segment. If there are no data sections placed before the
code-only PT_LOAD segment, the program headers won't be mapped into
any PT_LOAD segment. When the executable tries to access it (based
on the program header address passed in AT_PHDR), it will lead to
segfault. This patch inserts a GNU_PROPERTY_X86_ISA_1_USED note if
there may be no data sections before the text section so that the
first PT_LOAD segment won't be code-only and will contain the program
header.
Testcases are adjusted to either pass "-z noseparate-code" to ld or
discard the .note.gnu.property section. A Linux/x86 run-time test is
added.
bfd/
PR ld/23428
* elfxx-x86.c (_bfd_x86_elf_link_setup_gnu_properties): If the
separate code program header is needed, make sure that the first
read-only PT_LOAD segment has no code by adding a
GNU_PROPERTY_X86_ISA_1_USED note.
ld/
PR ld/23428
* testsuite/ld-elf/linux-x86.S: New file.
* testsuite/ld-elf/linux-x86.exp: Likewise.
* testsuite/ld-elf/pr23428.c: Likewise.
* testsuite/ld-elf/sec64k.exp: Pass "-z noseparate-code" to ld
for Linux/x86 targets.
* testsuite/ld-i386/abs-iamcu.d: Likewise.
* testsuite/ld-i386/abs.d: Likewise.
* testsuite/ld-i386/pr12718.d: Likewise.
* testsuite/ld-i386/pr12921.d: Likewise.
* testsuite/ld-x86-64/abs-k1om.d: Likewise.
* testsuite/ld-x86-64/abs-l1om.d: Likewise.
* testsuite/ld-x86-64/abs.d: Likewise.
* testsuite/ld-x86-64/pr12718.d: Likewise.
* testsuite/ld-x86-64/pr12921.d: Likewise.
* testsuite/ld-linkonce/zeroeh.ld: Discard .note.gnu.property
section.
* testsuite/ld-scripts/print-memory-usage.t: Likewise.
* testsuite/ld-scripts/size-2.t: Likewise.
* testsuite/lib/ld-lib.exp (run_ld_link_exec_tests): Use ld
to create executable if language is "asm".
The MMI instruction set has been implemented in many Loongson
processors. There is a lot of software optimized for MMI. This patch
splits MMI from loongson2f/3a, and adds GAS and disassembler options for
MMI instructions.
2018-07-20 Chenghua Xu <paul.hua.gm@gmail.com>
Maciej W. Rozycki <macro@mips.com>
bfd/
* elfxx-mips.c (print_mips_ases): Add MMI extension.
binutils/
* readelf.c (print_mips_ases): Add MMI extension.
gas/
* NEWS: Mention MultiMedia extensions Instructions (MMI)
support.
* config/tc-mips.c (options): Add OPTION_LOONGSON_MMI and
OPTION_NO_LOONGSON_MMI.
(md_longopts): Likewise.
(mips_ases): Define availability for MMI.
(mips_convert_ase_flags): Map ASE_LOONGSON_MMI to
AFL_ASE_LOONGSON_MMI.
(mips_cpu_info_table): Add ASE_LOONGSON_MMI for loongson2f/3a.
(md_show_usage): Add help for -mloongson-mmi and
-mno-loongson-mmi.
* doc/as.texi: Document -mloongson-mmi, -mno-loongson-mmi.
* doc/c-mips.texi: Document -mloongson-mmi, -mno-loongson-mmi,
.set loongson-mmi and .set noloongson-mmi.
* testsuite/gas/mips/loongson-2f.d: Move mmi test to ...
* testsuite/gas/mips/loongson-2f-mmi.d: Here. Add ISA/ASE
flag verification.
* testsuite/gas/mips/loongson-2f.s: Move mmi test to ...
* testsuite/gas/mips/loongson-2f-mmi.s: Here.
* testsuite/gas/mips/loongson-3a.d: Move mmi test to ...
* testsuite/gas/mips/loongson-3a-mmi.d: Here. Add ISA/ASE
flag verification.
* testsuite/gas/mips/loongson-3a.s: Move mmi test to ...
* testsuite/gas/mips/loongson-3a-mmi.s: Here.
* testsuite/gas/mips/mips.exp: Run loongson-2f-mmi and
loongson-3a-mmi tests.
include/
* elf/mips.h (AFL_ASE_MMI): New macro.
(AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_MMI.
* opcode/mips.h (ASE_LOONGSON_MMI): New macro.
opcodes/
* mips-dis.c (mips_arch_choices): Add MMI to loongson2f and
loongson3a descriptors.
(parse_mips_ase_option): Handle -M loongson-mmi option.
(print_mips_disassembler_options): Document -M loongson-mmi.
* mips-opc.c (LMMI): New macro.
(mips_opcodes): Replace IL2F|IL3A marking with LMMI for MMI
instructions.
Fix a crash that occurs in `_bfd_mips_elf_finish_dynamic_sections' if a
dynamic relocation section has been created, but marked to be discarded
by an assignment to the /DISCARD/ output section in a linker script.
In that case the output section is the absolute section, which has no
ELF section data attached, so trying to set its `sh_size' parameter
causes a null pointer dereference.
This is only done as the value for the DT_RELSZ dynamic entry is being
set, so fix the problem by not creating DT_REL, DT_RELSZ or DT_RELENT
dynamic entries in the first place if the dynamic relocation section
will not be output, as with no dynamic relocation data present these
would not serve their purpose anyway.
Add a generic ELF test case to verify that no dynamic relocation data is
reported in the dynamic segment.
bfd/
* elfxx-mips.c (_bfd_mips_elf_size_dynamic_sections): Do not
create DT_REL, DT_RELSZ or DT_RELENT dynamic entries if the
dynamic relocation section will be discarded from output.
(_bfd_mips_elf_finish_dynamic_sections) <DT_RELSZ>: Assert that
the dynamic relocation section will be retained in output.
ld/
* testsuite/ld-elf/reloc-discard.d: New test.
* testsuite/ld-elf/reloc-discard.ld: New test linker script.
* testsuite/ld-elf/reloc-discard.s: New test source.
Fix an issue with commit 8602d4fea6 ("Add AIX weak support"),
<https://sourceware.org/ml/binutils/2009-03/msg00189.html>, and use the
correct condition to set the storage class for weak defined symbols.
The context here is as follows:
else if ((h->root.type == bfd_link_hash_defined
|| h->root.type == bfd_link_hash_defweak)
&& h->smclas == XMC_XO)
{
BFD_ASSERT (bfd_is_abs_section (h->root.u.def.section));
isym.n_value = h->root.u.def.value;
isym.n_scnum = N_UNDEF;
if (h->root.type == bfd_link_hash_undefweak
&& C_WEAKEXT == C_AIX_WEAKEXT)
isym.n_sclass = C_WEAKEXT;
else
isym.n_sclass = C_EXT;
aux.x_csect.x_smtyp = XTY_ER;
}
so clearly the inner condition can never be true. Correct the condition
then to check for the `bfd_link_hash_defweak' symbol type instead here,
and in a similar place a little further down in the same function.
bfd/
* xcofflink.c (xcoff_write_global_symbol): Fix symbol type
checks for defined weak symbols.
Use `bfd_is_abs_symbol' to determine whether a symbol is absolute,
avoiding a problem with ordinary symbols defined in a linker script
outside an output section definition. Such symbols have its owning
section set to the absolute section up to the final link phase. A flag
has been added to the link hash to identify such symbols. Rather than
checking the flag by hand, use the macro that does it uniformly for all
users.
bfd/
* elf32-nds32.c (nds32_elf_relax_loadstore): Use
`bfd_is_abs_symbol' rather than `bfd_is_abs_section' in checking
whether the symbol is absolute.
(nds32_elf_relax_lo12): Likewise.
* elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Likewise.
(elfNN_aarch64_check_relocs): Likewise.
* xcofflink.c (xcoff_need_ldrel_p): Likewise.
(bfd_xcoff_import_symbol): Likewise.
(xcoff_write_global_symbol): Likewise.
It is usually possible to tell absolute and ordinary symbols apart in
BFD throughout the link, by checking whether the section that owns the
symbol is absolute or not.
That however does not work for ordinary symbols defined in a linker
script outside an output section statement. Initially such symbols are
entered into to the link hash as absolute symbols, owned by the absolute
section. A flag is set in the internal linker expression defining such
symbols to tell the linker to convert them to section-relative ones in
the final phase of the link. That flag is however not accessible to BFD
linker code, including BFD target code in particular.
Add a flag to the link hash then to copy the information held in the
linker expression. Define a macro, `bfd_is_abs_symbol', for BFD code to
use where determining whether a symbol is absolute or ordinary is
required before the final link phase.
This macro will correctly identify the special `__ehdr_start' symbol as
ordinary throughout link, for example, even though early on it will be
assigned to the absolute section. Of course this does not let BFD code
identify what the symbol's ultimate section will be before the final
link phase has converted this symbol (in `update_definedness').
include/
* bfdlink.h (bfd_link_hash_entry): Add `rel_from_abs' member.
bfd/
* linker.c (bfd_is_abs_symbol): New macro.
* bfd-in2.h: Regenerate.
ld/
* ldexp.c (exp_fold_tree_1) <etree_assign, etree_provide>
<etree_provided>: Copy expression's `rel_from_abs' flag to the
link hash.
Correct an issue with commit 0f20cc3522 ("TLS support for MIPS"),
<https://sourceware.org/ml/binutils/2005-02/msg00607.html>, where a
condition used to determine whether to use a dynamic symbol for GD, LD
and IE TLS dynamic relocations against a symbol that has been defined
locally has been incorrectly reversed.
It's executables rather than dynamic shared objects where no symbol is
required, because such symbols cannot be preempted and therefore their
values (thread pointer offsets) are fixed at the static link time as is
the associated module ID of the main executable, so the original
condition should have been `shared' instead of `!shared'. This wrong
condition was then later converted from `!shared' to `!bfd_link_pic',
with commit 0e1862bb40 ("Add output_type to bfd_link_info").
Use the correct `bfd_link_dll' condition then, and adjust code for the
dynamic symbol index possibly being -1 as with symbols that have been
forced local, removing unnecessary dynamic relocations from dynamic
regular executables. PIE executables are unaffected as the existing
condition excluded them by chance due to the conversion mentioned above.
Adjust test cases accordingly.
bfd/
* elfxx-mips.c (mips_tls_got_relocs): Use `bfd_link_dll' rather
than `!bfd_link_pic' in determining the dynamic symbol index.
Avoid the index of -1.
(mips_elf_initialize_tls_slots): Likewise. Flatten code by
moving `dyn' to the beginning of the function block.
ld/
* testsuite/ld-mips-elf/tlsdyn-o32.d: Update test for dynamic
relocation removal.
* testsuite/ld-mips-elf/tlsdyn-o32.got: Likewise.
* testsuite/ld-mips-elf/tlsdyn-o32-1.d: Likewise.
* testsuite/ld-mips-elf/tlsdyn-o32-1.got: Likewise.
* testsuite/ld-mips-elf/tlsdyn-o32-2.d: Likewise.
* testsuite/ld-mips-elf/tlsdyn-o32-2.got: Likewise.
* testsuite/ld-mips-elf/tlsdyn-o32-3.d: Likewise.
* testsuite/ld-mips-elf/tlsdyn-o32-3.got: Likewise.
Correct a commit 0e1862bb40 ("Add output_type to bfd_link_info") issue
and use `bfd_link_dll' rather than `bfd_link_pic' in determining whether
to fully resolve GD, LD and IE TLS relocations referring to symbols
locally defined rather than deferring them to the load time by means of
dynamic relocations.
Such symbols cannot be preempted in PIE executables, which are
necessarily PIC, and therefore their values (thread pointer offsets) are
fixed at the static link time as is the associated module ID of the main
executable.
Given the `tlsbin-o32.s' and `tlsdyn-o32.s' sources from our test suite
this removes the absolute TLS relocations from the static:
DYNAMIC RELOCATION RECORDS
OFFSET TYPE VALUE
00000000 R_MIPS_NONE *ABS*
1000002c R_MIPS_TLS_TPREL32 *ABS*
10000030 R_MIPS_TLS_DTPMOD32 *ABS*
10000038 R_MIPS_TLS_DTPMOD32 *ABS*
and the dynamic:
DYNAMIC RELOCATION RECORDS
OFFSET TYPE VALUE
00000000 R_MIPS_NONE *ABS*
1000002c R_MIPS_TLS_TPREL32 *ABS*
10000038 R_MIPS_TLS_DTPMOD32 *ABS*
10000044 R_MIPS_TLS_DTPMOD32 *ABS*
10000030 R_MIPS_TLS_DTPMOD32 tlsvar_gd
10000034 R_MIPS_TLS_DTPREL32 tlsvar_gd
10000040 R_MIPS_TLS_TPREL32 tlsvar_ie
PIE executable respectively, as reported by `objdump -R', and fills the
corresponding GOT slots with the values expected, as recorded with the
test cases added. The new output from `objdump -R' is:
DYNAMIC RELOCATION RECORDS (none)
and:
DYNAMIC RELOCATION RECORDS
OFFSET TYPE VALUE
00000000 R_MIPS_NONE *ABS*
10000030 R_MIPS_TLS_DTPMOD32 tlsvar_gd
10000034 R_MIPS_TLS_DTPREL32 tlsvar_gd
10000040 R_MIPS_TLS_TPREL32 tlsvar_ie
for the static and the dynamic executable respectively.
2018-07-11 Maciej W. Rozycki <macro@mips.com>
Rich Felker <bugdal@aerifal.cx>
bfd/
PR ld/22570
* elfxx-mips.c (mips_tls_got_relocs): Use `bfd_link_dll' rather
than `bfd_link_pic' to determine whether dynamic relocations are
to be produced.
(mips_elf_initialize_tls_slots): Likewise.
ld/
PR ld/22570
* testsuite/ld-mips-elf/tlsbin-pie-o32.d: New test.
* testsuite/ld-mips-elf/tlsbin-pie-o32.got: New test.
* testsuite/ld-mips-elf/tlsdyn-pie-o32.d: New test.
* testsuite/ld-mips-elf/tlsdyn-pie-o32.got: New test.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
Remove `-Wshadow' compilation errors:
cc1: warnings being treated as errors
.../bfd/elflink.c: In function 'bfd_elf_final_link':
.../bfd/elflink.c:11722: error: declaration of 'remove' shadows a global declaration
/usr/include/stdio.h:154: error: shadowed declaration is here
which for versions of GCC before 4.8 prevent support for ELF targets
from being built. See also GCC PR c/53066.
bfd/
* elflink.c (bfd_elf_final_link): Rename `remove' local variable
to `remove_section'.
elf32-xgate.c contains many functions that are only stubs and
elf32-xgate.h contains unused declarations. While this might be
reasonable for the initial commit of a port with subsequent work
fleshing out the stubs, xgate has only had two minor target specific
patches since the initial commit over six years ago. The rest of the
changes have been general maintenance work applied to all ELF targets,
and some of this work could have been avoided if the stubs hadn't been
there. So this patch removes all the stubs.
I've kept the functionality of the old elf32_xgate_add_symbol_hook,
implemented in elf32_xgate_backend_symbol_processing. Presumably,
that's to set the symbol st_target_internal flag for use in
elf32-m68hc1x.c:elf32_m68hc11_relocate_section.
The empty elf32_xgate_relocate_section meant that xgate had no linker.
Or at least, no linker relocation processing. Deleting the
elf_backend_relocate_section define means the target will now use the
generic linker reloc processing. How good that is will depend on the
accuracy of the reloc howtos..
I haven't updated the ld testsuite to xfail tests expected to fail
for generic elf targets.
bfd/
* elf32-xgate.h: Delete.
* elf32-xgate.c: Delete unnecessary forward declarations, add two
that are now needed.
(xgate_elf_bfd_link_hash_table_create)
(xgate_elf_bfd_link_hash_table_free)
(xgate_elf_set_mach_from_flags, struct xgate_scan_param)
(stub_hash_newfunc, elf32_xgate_add_symbol_hook)
(elf32_xgate_setup_section_lists, elf32_xgate_size_stubs)
(elf32_xgate_build_stubs, elf32_xgate_check_relocs)
(elf32_xgate_relocate_section, _bfd_xgate_elf_set_private_flags)
(elf32_xgate_post_process_headers): Delete.
(elf32_xgate_backend_symbol_processing): New function.
(xgate_elf_ignore_reloc, xgate_elf_special_reloc)
(_bfd_xgate_elf_print_private_bfd_data): Make static.
(ELF_TARGET_ID, elf_info_to_howto, elf_backend_check_relocs)
(elf_backend_relocate_section, elf_backend_object_p)
(elf_backend_final_write_processing, elf_backend_can_gc_sections)
(elf_backend_post_process_headers, elf_backend_add_symbol_hook)
(bfd_elf32_bfd_link_hash_table_create)
(bfd_elf32_bfd_set_private_flags)
(xgate_stub_hash_lookup): Don't define.
(elf_backend_symbol_processing): Define.
* elf-bfd.h (elf_target_id): Delete XGATE_ELF_DATA.
ld/
* emulparams/xgateelf.sh (TEMPLATE_NAME) Set to generic.
(EXTRA_EM_FILE): Set to genelf.
Correct a MIPS/BFD linker issue with dynamic symbol and corresponding
GOT entry values being redirected to lazy binding stubs where the stubs
section has been discarded by assigning to the `/DISCARD/' output
section in the linker script used. The issue manifests itself by the
values entered being relative to the absolute section, which is what any
discarded sections are internally assigned in the linker.
For the `stub-dynsym-2.s' piece of code included as a test case with
this change this issue results in the dynamic symbol table and the GOT
looking like:
Symbol table '.dynsym' contains 3 entries:
Num: Value Size Type Bind Vis Ndx Name
0: 00000000 0 NOTYPE LOCAL DEFAULT UND
1: 00000010 0 FUNC GLOBAL DEFAULT UND bar
2: 00000000 0 FUNC GLOBAL DEFAULT UND foo
Primary GOT:
Canonical gp value: 00097ff0
Reserved entries:
Address Access Initial Purpose
00090000 -32752(gp) 00000000 Lazy resolver
00090004 -32748(gp) 80000000 Module pointer (GNU extension)
Global entries:
Address Access Initial Sym.Val. Type Ndx Name
00090008 -32744(gp) 00000010 00000010 FUNC UND bar
0009000c -32740(gp) 00000000 00000000 FUNC UND foo
if assembled to regular MIPS code, or:
Symbol table '.dynsym' contains 3 entries:
Num: Value Size Type Bind Vis Ndx Name
0: 00000000 0 NOTYPE LOCAL DEFAULT UND
1: 0000000d 0 FUNC GLOBAL DEFAULT UND bar
2: 00000001 0 FUNC GLOBAL DEFAULT UND foo
Primary GOT:
Canonical gp value: 00097ff0
Reserved entries:
Address Access Initial Purpose
00090000 -32752(gp) 00000000 Lazy resolver
00090004 -32748(gp) 80000000 Module pointer (GNU extension)
Global entries:
Address Access Initial Sym.Val. Type Ndx Name
00090008 -32744(gp) 0000000d 0000000d FUNC UND bar
0009000c -32740(gp) 00000001 00000001 FUNC UND foo
if assembled to microMIPS code. Symbol values and GOT entries record
the offset into the inexistent stubs section and the ISA bit rather than
zero, which would be the case if a lazy binding stub was not used for
other reasons, such as the value of the symbol being taken for a purpose
other than making a function call (e.g. an R_MIPS_GOT16 relocation).
Correct the issue by refraining from redirecting symbols to lazy binding
stubs if the stubs section is going to be discarded.
bfd/
* elfxx-mips.c (_bfd_mips_elf_adjust_dynamic_symbol): Don't set
`->needs_lazy_stub' if the stubs output section is the absolute
section.
ld/
* testsuite/ld-mips-elf/stub-dynsym-2.dd: New test.
* testsuite/ld-mips-elf/stub-dynsym-2.gd: New test.
* testsuite/ld-mips-elf/stub-dynsym-2.sd: New test.
* testsuite/ld-mips-elf/stub-dynsym-discard-2.gd: New test.
* testsuite/ld-mips-elf/stub-dynsym-discard-2.sd: New test.
* testsuite/ld-mips-elf/stub-dynsym-micromips-2.dd: New test.
* testsuite/ld-mips-elf/stub-dynsym-micromips-2.gd: New test.
* testsuite/ld-mips-elf/stub-dynsym-micromips-2.sd: New test.
* testsuite/ld-mips-elf/stub-dynsym-micromips-insn32-2.dd: New
test.
* testsuite/ld-mips-elf/stub-dynsym-micromips-insn32-2.gd: New
test.
* testsuite/ld-mips-elf/stub-dynsym-micromips-insn32-2.sd: New
test.
* testsuite/ld-mips-elf/stub-dynsym-2.ld: New test linker
script.
* testsuite/ld-mips-elf/stub-dynsym-discard-2.ld: New test
linker script.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
Use changequote to match "i[3-7]86-*-linux-*", instead of
"i3-786-*-linux-*".
PR ld/23388
* configure.ac: Use changequote for "i[3-7]86-*-linux-*".
* configure: Regenerated.
With config.sub now properly returning m68hc12-unknown-elf rather than
m68hc12-unknown-none, more ELF tests run. This patch enables
STB_GNU_UNIQUE processing fixing some testsuite failures that probably
no m68hc12 user cares about, and removes some XPASSes.
bfd/
* elf32-m68hc1x.c (elf32_m68hc11_post_process_headers): Call
_bfd_elf_post_process_headers.
ld/
* testsuite/ld-discard/extern.d: Remove m68hc12 xfail.
* testsuite/ld-discard/start.d: Likewise.
* testsuite/ld-discard/static.d: Likewise.
Resolved reference to a weak undefined symbol in PIE must not have
a dynamic relative relocation against itself, otherwise the value of a
reference will be changed from 0 to the base of executable, breaking
code like the following:
void weak_function (void);
if (weak_function)
weak_function ();
This fixes tests for PR ld/22269 and a number of PIE tests in xtensa gcc
testsuite.
bfd/
2018-07-06 Max Filippov <jcmvbkbc@gmail.com>
* elf32-xtensa.c (elf_xtensa_allocate_dynrelocs): Don't allocate
space for dynamic relocation for undefined weak symbol.
(elf_xtensa_relocate_section): Don't emit R_XTENSA_RELATIVE
relocation for undefined weak symbols.
(shrink_dynamic_reloc_sections): Don't shrink dynamic relocation
section for relocations against undefined weak symbols.
The NT_ARM_SVE section is documented here:
https://github.com/torvalds/linux/blob/master/Documentation/arm64/sve.txt
* A NT_ARM_SVE note will be added to each coredump for each thread of the
dumped process. The contents will be equivalent to the data that would have
been read if a PTRACE_GETREGSET of NT_ARM_SVE were executed for each thread
when the coredump was generated.
* elf.c (elfcore_grok_aarch_sve): New function.
(elfcore_grok_note): Check for Aarch64 SVE.
(elfcore_write_aarch_sve): New function.
(elfcore_write_register_note): Check for Aarch64 SVE.
* elf-bfd.h(elfcore_grok_aarch_sve): New declaration.
Fixes a number of build errors like the following
.../elf32-arm.c: In function 'elf32_arm_nabi_write_core_note':
.../elf32-arm.c:2177: error: #pragma GCC diagnostic not allowed inside functions
.../elf32-arm.c:2186: error: #pragma GCC diagnostic not allowed inside functions
See the comment in diagnostics.h.
include/
* diagnostics.h: Comment on macro usage.
bfd/
* elf32-arm.c (elf32_arm_nabi_write_core_note): Don't use
DIAGNOTIC_PUSH and DIAGNOSTIC_POP unconditionally.
* elf32-ppc.c (ppc_elf_write_core_note): Likewise.
* elf32-s390.c (elf_s390_write_core_note): Likewise.
* elf64-ppc.c (ppc64_elf_write_core_note): Likewise.
* elf64-s390.c (elf_s390_write_core_note): Likewise.
* elfxx-aarch64.c (_bfd_aarch64_elf_write_core_note): Likewise.
bfd/
* config.bfd (riscv32*-*-*): Renamed from riscv32-*-*.
(riscv64*-*-*): Likewise.
(riscv-*-*): Add as an alias for riscv32*-*-*.
ld/
* configure.tgt (riscv-*-*): Add as an alias for riscv32*-*-*.
There is no need to generate x86 ISA properties with empty bits in
linker output.
bfd/
PR ld/23372
* elfxx-x86.c (_bfd_x86_elf_merge_gnu_properties): Remove x86
ISA properties with empty bits.
ld/
PR ld/23372
* testsuite/ld-i386/i386.exp: Run pr23372a and pr23372b.
* testsuite/ld-i386/pr23372a.d: New file.
* testsuite/ld-i386/pr23372a.s: Likewise.
* testsuite/ld-i386/pr23372b.d: Likewise.
* testsuite/ld-i386/pr23372b.s: Likewise.
* testsuite/ld-i386/pr23372c.s: Likewise.
* testsuite/ld-x86-64/pr23372a-x32.d: Likewise.
* testsuite/ld-x86-64/pr23372a.d: Likewise.
* testsuite/ld-x86-64/pr23372a.s: Likewise.
* testsuite/ld-x86-64/pr23372b-x32.d: Likewise.
* testsuite/ld-x86-64/pr23372b.d: Likewise.
* testsuite/ld-x86-64/pr23372b.s: Likewise.
* testsuite/ld-x86-64/pr23372c.s: Likewise.
* testsuite/ld-x86-64/x86-64.exp: Run pr23372a, pr23372a-x32,
pr23372b and pr23372b-x32.
And report the two input files that are incompatible rather than
reporting that an input file is incompatible with the output.
bfd/
* elf-bfd.h (_bfd_elf_ppc_merge_fp_attributes): Update prototype.
* elf32-ppc.c (_bfd_elf_ppc_merge_fp_attributes): Return error
on mismatch. Remove "warning: " from messages. Track last bfd
used to set tags.
(ppc_elf_merge_obj_attributes): Likewise. Handle status from
_bfd_elf_ppc_merge_fp_attributes.
* elf64-ppc.c (ppc64_elf_merge_private_bfd_data): Handle status
from _bfd_elf_ppc_merge_fp_attributes.
ld/
* testsuite/ld-powerpc/attr-gnu-4-12.d: Update expected output.
* testsuite/ld-powerpc/attr-gnu-4-13.d: Likewise.
* testsuite/ld-powerpc/attr-gnu-4-21.d: Likewise.
* testsuite/ld-powerpc/attr-gnu-4-23.d: Likewise.
* testsuite/ld-powerpc/attr-gnu-4-31.d: Likewise.
* testsuite/ld-powerpc/attr-gnu-4-32.d: Likewise.
* testsuite/ld-powerpc/attr-gnu-8-23.d: Likewise.
* testsuite/ld-powerpc/attr-gnu-12-21.d: Likewise.
Since bfd.h is an installed header, also install diagnostics.h.
* Makefile.am (bfdinclude_HEADERS): Add $(INCDIR)/diagnostics.h.
* Makefile.in: Regenerated.
Setting SEC_EXCLUDE for empty .gnu.attributes is too late in the link
process for the linker to remove the section. That must be done in
bfd_elf_final_link, as we do for removed group sections.
* elflink.c (bfd_elf_final_link): Remove zero size .gnu.attributes
sections.
.gnu.attributes entries from linker input files are merged to the
output file, the output having the union of compatible input
attributes. Incompatible attributes generally cause a linker error
and no output. However in some cases only a warning is emitted, and
one of the incompatible input attributes is passed on to the output.
PowerPC tends to emit warnings rather than errors, and the output
takes the first input attribute. For example, if we have two input
files with Tag_GNU_Power_ABI_FP, the first with a value signifying
"double-precision hard float, IBM long double", the second with a
value signifying "double-precision hard float, IEEE long double",
we'll get a warning about incompatible long double types and the
output will say "double-precision hard float, IBM long double".
The output attribute of course isn't correct. It would be correct to
specify "IBM and IEEE long double", but we don't have a way to
represent that currently. While it would be possible to extend the
encoding, there isn't much gain in doing so. A shared library
providing support for both long double types should link against
objects using either long double type without warning or error. That
is what you'd get if such a shared library had no Tag_GNU_Power_ABI_FP
attribute.
So this patch provides a way for the backend to omit .gnu.attributes
tags from the output.
* elf-bfd.h (ATTR_TYPE_FLAG_ERROR, ATTR_TYPE_HAS_ERROR): Define.
* elf-attrs.c (is_default_attr): Handle ATTR_TYPE_HAS_ERROR.
* elf32-ppc.c (_bfd_elf_ppc_merge_fp_attributes): Use
ATTR_TYPE_FLAG_INT_VAL. Set ATTR_TYPE_HAS_ERROR on finding
incompatible attribute.
(ppc_elf_merge_obj_attributes): Likewise. Return
_bfd_elf_merge_object_attributes result.
* elf64-ppc.c (ppc64_elf_merge_private_bfd_data): Return
_bfd_elf_merge_object_attributes result.
This is a followup to git commit 97196564c7 "Strip global symbol
defined in discarded section". If a symbol defined in a discarded
section was dynamic, that patch left .dynsym with holes (ie. all zero
entries). For example, the following from libstdc++.so:
Symbol table '.dynsym' contains 6090 entries:
Num: Value Size Type Bind Vis Ndx Name
0: 0000000000000000 0 NOTYPE LOCAL DEFAULT UND
1: 00000000000a74e0 0 SECTION LOCAL DEFAULT 10
2: 0000000000264180 0 SECTION LOCAL DEFAULT 17
3: 0000000000000000 0 NOTYPE WEAK DEFAULT UND _ITM_addUserCommitAction
4: 0000000000000000 0 NOTYPE WEAK DEFAULT UND _ITM_memcpyRtWn
5: 0000000000000000 0 NOTYPE LOCAL DEFAULT UND
readelf: Warning: local symbol 5 found at index >= .dynsym's sh_info value of 3
6: 0000000000000000 0 NOTYPE LOCAL DEFAULT UND
readelf: Warning: local symbol 6 found at index >= .dynsym's sh_info value of 3
[snip]
This patch removes the symbols from .dynsym too.
PR 17550
* elflink.c (_bfd_elf_fix_symbol_flags): Hide dynamic symbols
in discarded sections.
Prevent runtime procedure table symbols, produced with `ict_irix5' MIPS
targets, from being swept in section GC, fixing linker errors like:
./ld-new: tmpdir/dump: protected symbol `_procedure_table_size' isn't defined
./ld-new: final link failed: bad value
triggered whenever section GC is enabled with those targets and
consequently removing the following test suite failures:
FAIL: Build pr22649-2a.so
FAIL: Build pr22649-2c.so
FAIL: PR ld/20828 dynamic symbols with section GC (auxiliary shared library)
FAIL: PR ld/20828 dynamic symbols with section GC (plain)
FAIL: PR ld/20828 dynamic symbols with section GC (version script)
FAIL: PR ld/20828 dynamic symbols with section GC (versioned shared library)
FAIL: PR ld/20828 dynamic symbols with section GC (versioned)
FAIL: --gc-sections with .text._init
FAIL: pr20022
observed with `mips-elf', `tx39-elf', `mipsisa32-elf', `mipsisa64-elf',
`mipsel-elf', `mipsisa32el-elf', `mipsisa64el-elf', `mips64vr-elf',
`mips64vrel-elf', `mips64vr4300-elf', `mips64vr4300el-elf',
`mips-sgi-irix5' and `mips-rtems' targets, among others. This fix makes
section GC usable with the affected targets.
bfd/
* elfxx-mips.c (_bfd_mips_elf_create_dynamic_sections): Set
`mark' for symbols created from `mips_elf_dynsym_rtproc_names'
list.
Complement commit df58fc944d ("MIPS: microMIPS ASE support"),
<https://sourceware.org/ml/binutils/2011-07/msg00198.html>, and add TLS
and a few miscellaneous relocations to NewABI microMIPS support, fixing
GAS assertion failures:
.../gas/testsuite/gas/mips/elf-rel28.s: Assembler messages:
.../gas/testsuite/gas/mips/elf-rel28.s:19: Internal error in append_insn at .../gas/config/tc-mips.c:7660.
Please report this bug.
observed if an attempt is made to assemble the `elf-rel28.s' test case
to microMIPS code. The relocations are the same as with o32 support,
except for `partial_inplace' and `src_mask' updates for the respective
RELA variants.
bfd/
* elf64-mips.c (micromips_elf64_howto_table_rel): Add
R_MICROMIPS_HI0_LO16, R_MICROMIPS_TLS_GD, R_MICROMIPS_TLS_LDM,
R_MICROMIPS_TLS_DTPREL_HI16, R_MICROMIPS_TLS_DTPREL_LO16,
R_MICROMIPS_TLS_GOTTPREL, R_MICROMIPS_TLS_TPREL_HI16,
R_MICROMIPS_TLS_TPREL_LO16, R_MICROMIPS_GPREL7_S2 and
R_MICROMIPS_PC23_S2 relocation entries.
(micromips_elf64_howto_table_rela): Likewise.
(micromips_reloc_map): Likewise.
* elfn32-mips.c (elf_micromips_howto_table_rel): Likewise.
(elf_micromips_howto_table_rela): Likewise.
(micromips_reloc_map): Likewise.
gas/
* testsuite/gas/mips/elf-rel28-micromips-n32.d: New test.
* testsuite/gas/mips/elf-rel28-micromips-n64.d: New test.
* testsuite/gas/mips/mips.exp: Run the new tests.
We need to clear the R_X86_64_converted_reloc_bit bit after setting it
to avoid leaking it out by --emit-relocs.
bfd/
PR ld/23324
* elf64-x86-64.c (elf_x86_64_relocate_section): Clear the
R_X86_64_converted_reloc_bit bit.
ld/
PR ld/23324
* testsuite/ld-x86-64/pr23324.s: New file.
* testsuite/ld-x86-64/pr23324a.d: Likewise.
* testsuite/ld-x86-64/pr23324b.d: Likewise.
Bug #13157 is about a gdb regression, where previously it could handle
universal libraries, but now cannot.
gdb isn't working for me on macOS for other reasons, so I wrote this
small test program to show the problem:
#include <config.h>
#include <stdio.h>
#include <stdlib.h>
#include <bfd.h>
void
die (const char *what)
{
fprintf (stderr, "die: %s\n", what);
exit (1);
}
int
main (int argc, char **argv)
{
bfd *file = bfd_openr (argv[1], NULL);
if (file == NULL)
die ("couldn't open");
if (!bfd_check_format (file, bfd_archive))
die ("not an archive");
printf ("yay\n");
bfd_close (file);
return 0;
}
Then I built a simple universal binary. With git master BFD, I get:
$ ./doit ./universal-exe
die: not an archive
Jeff Muizelaar tracked this down to the BFD change for PR binutils/21787.
This patch changed bfd_generic_archive_p to sometimes reset the BFD's
"format" field.
However, simply changing bfd_generic_archive_p regressed the test case
in that bug.
Debugging PR binutils/21787 again, what I saw is that the mach-o
universal binary support acts like a bfd_archive but does not provide
a _close_and_cleanup function. However, if a BFD appears as an
archive member, it must always remove its own entry from its parent's
map. Otherwise, when the parent is destroyed, the already-destroyed
child BFD will be referenced. mach-o does not use the usual archive
member support, so simply using _bfd_archive_close_and_cleanup (as
other targets do) will not work.
This patch fixes the problem by introducing a new
_bfd_unlink_from_archive_parent function, then arranging for it to be
called in the mach-o case.
Ok?
bfd/ChangeLog
2018-07-02 Jeff Muizelaar <jrmuizel@gmail.com>
Tom Tromey <tom@tromey.com>
PR 13157
PR 21787
* mach-o.c (bfd_mach_o_fat_close_and_cleanup): New function.
(bfd_mach_o_close_and_cleanup): Redefine.
* archive.c (_bfd_unlink_from_archive_parent): New function,
extracted from..
(_bfd_archive_close_and_cleanup): ..here.
(bfd_generic_archive_p): Do not clear archive's format.
* libbfd-in.h (_bfd_unlink_from_archive_parent): Declare.
* libbfd.h: Regenerate.
Alan Modra
Jim Wilson
H.J. Lu
Stafford Horne
Nick Clifton
Dennis Zhang
Tamar Christina
Tom Tromey
Martin Liska
Mihailo Stojanovic
Jose E. Marchesi
Max Filippov
YunQiang Su
Claudiu Zissulescu
Omar Majid
Christophe Lyon
Srinath Parvathaneni
Jan Beulich
Szabolcs Nagy
Adam Lackorzymski
Christos Zoulas
Sudakshina Das
Faraz Shahbazker
Matthew Fortune
Andre Vieira
Senthil Kumar Selvaraj
Jamey Hicks
Michael Forney
Andreas Krebbel
Alan Hayward
Michael Roitzsch
Eric Botcazou
Sergio Durigan Junior
Yuri Chornoivan
John Darrington
Maamoun Tarsha
Andrew Paprocki
Yoshinori Sato
Lifang Xia
Sam Tebbs
Thomas Preud'homme
Maciej W. Rozycki
Mark Wielaard
Jozef Lawrynowicz
Bernhard M. Wiedemann
Cupertino Miranda
rhn
Roman Bolshakov
Renlin Li
Egeyar Bagcioglu
Richard Henderson
Millan Wolff
Simon Marchi
Maciej W. Rozycki
Chenghua Xu
Zenith423
Helge Deller
Rafeal Auler
mephi42
claziss
Andrew Jenner
Tom Tromey
Edjunior Barbosa Machado