(md_parse_option): Recognize -m68hcs12.
(m68hc11_elf_final_processing): Set EF_M68HCS12_MACH flag to identify
HCS12.
* doc/as.texinfo (Overview): Document new option -m68hcs12.
self_dtpmod_done and self_dtpmod_offset.
(allocate_global_data_got): Only use one got entry for all
dtpmod relocs against local symbols.
(allocate_dynrel_entries): Only need .rela.got entry for
dtpmod against global symbol.
(elfNN_ia64_size_dynamic_sections): Initialize self_dtpmod_offset.
Reserve space in .rela.got for the local dtpmod entry.
(set_got_entry): Initialize the common local dtpmod .got entry.
(elfNN_ia64_relocate_section): Handle R_IA_64_DTPREL64LSB
and R_IA_64_DTPREL64MSB.
* config/tc-ia64.c (ia64_cons_fix_new): Handle @dtprel() in data.
* ld-ia64/ia64.exp: New.
* ld-ia64/tlsbin.dd: New test.
* ld-ia64/tlsbinpic.s: New test.
* ld-ia64/tlsbin.rd: New test.
* ld-ia64/tlsbin.s: New test.
* ld-ia64/tlsbin.sd: New test.
* ld-ia64/tlsbin.td: New test.
* ld-ia64/tlsg.s: New test.
* ld-ia64/tlsg.sd: New test.
* ld-ia64/tlslib.s: New test.
* ld-ia64/tlspic1.s: New test.
* ld-ia64/tlspic2.s: New test.
* ld-ia64/tlspic.dd: New test.
* ld-ia64/tlspic.rd: New test.
* ld-ia64/tlspic.sd: New test.
* ld-ia64/tlspic.td: New test.
(get_absolute_expression): ..here.
* read.h (get_absolute_expr): Declare.
* config/obj-elf.c (elf_common): Use offsetT for "temp" and "size".
Trim size to arch bits_per_address, and test for negative input
via get_absolute_expr.
2003-01-02 Chris Demetriou <cgd@broadcom.com>
* config/tc-mips.c: Update copyright years to include 2003.
(mips_ip): Fix indentation of "+A", "+B", and "+C" handling.
Additionally, clean up their code slightly and clean up their
comments some more.
* doc/c-mips.texi: Add MIPS32r2 to ".set mipsN" documentation.
[ gas/testsuite/ChangeLog ]
2003-01-02 Chris Demetriou <cgd@broadcom.com>
* gas/mips/elf_arch_mips32r2.d: Fix file description comment.
[ include/opcode/ChangeLog ]
2003-01-02 Chris Demetriou <cgd@broadcom.com>
* mips.h: Update copyright years to include 2002 (which had
been missed previously) and 2003. Make comments about "+A",
"+B", and "+C" operand types more descriptive.
2002-12-31 Chris Demetriou <cgd@broadcom.com>
* config/tc-mips.c (validate_mips_insn, mips_ip): Recognize
the "+D" operand, which will be used only by the disassembler.
[ gas/testsuite/ChangeLog ]
2002-12-31 Chris Demetriou <cgd@broadcom.com>
* gas/mips/cp0sel-names-mips32.d: New test.
* gas/mips/cp0sel-names-mips32r2.d: New test.
* gas/mips/cp0sel-names-mips64.d: New test.
* gas/mips/cp0sel-names-numeric.d: New test.
* gas/mips/cp0sel-names-sb1.d: New test.
* gas/mips/cp0sel-names.s: New test source file.
* gas/mips/mips.exp: Run new tests.
[ include/opcode/ChangeLog ]
2002-12-31 Chris Demetriou <cgd@broadcom.com>
* mips.h: Note that the "+D" operand type name is now used.
[ opcodes/ChangeLog ]
2002-12-31 Chris Demetriou <cgd@broadcom.com>
* mips-dis.c (mips_cp0sel_name): New structure.
(mips_cp0sel_names_mips3264, mips_cp0sel_names_mips3264r2)
(mips_cp0sel_names_sb1): New arrays.
(mips_arch_choice): New structure members "cp0sel_names" and
"cp0sel_names_len".
(mips_arch_choices): Add references to new cp0sel_names arrays
as appropriate, and make all existing entries reference
appropriate mips_XXX_names_numeric arrays rather than simply
using NULL.
(mips_cp0sel_names, mips_cp0sel_names_len): New variables.
(lookup_mips_cp0sel_name): New function.
(set_default_mips_dis_options): Set mips_cp0sel_names and
mips_cp0sel_names_len as appropriate. Remove now-unnecessary
checks for NULL register name arrays.
(parse_mips_dis_option): Likewise.
(print_insn_arg): Handle "+D" operand type.
* mips-opc.c (mips_builtin_opcodes): Add new "+D" variants
of mfc0, mtc0, dmfc0, and dmtc0 to print CP0+sel register
names symbolically.
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* gas/mips/elf_arch_mips1.d: New test.
* gas/mips/elf_arch_mips2.d: New test.
* gas/mips/elf_arch_mips3.d: New test.
* gas/mips/elf_arch_mips4.d: New test.
* gas/mips/elf_arch_mips5.d: New test.
* gas/mips/elf_arch_mips32.d: New test.
* gas/mips/elf_arch_mips32r2.d: New test.
* gas/mips/elf_arch_mips64.d: New test.
* gas/mips/empty.s: New test source file.
* gas/mips/mips.exp: Run new tests.
* gas/mips/elf_ase_mips16.d: Change to use empty.s
* gas/mips/elf_ase_mips16.s: Remove.
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* aoutx.h (NAME(aout,machine_type)): Add bfd_mach_mipsisa32r2 case.
* archures.c (bfd_mach_mipsisa32r2): New define.
* bfd-in2.h: Regenerate.
* cpu-mips.c (I_mipsisa32r2): New enum value.
(arch_info_struct): Add entry for I_mipsisa32r2.
* elfxx-mips.c (elf_mips_isa, _bfd_elf_mips_mach)
(_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_32R2.
(_bfd_mips_elf_final_write_processing): Add
bfd_mach_mipsisa32r2 case.
(_bfd_mips_elf_merge_private_bfd_data): Handle merging of
binaries marked as using MIPS32 Release 2.
[ binutils/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* doc/binutils.texi (objdump): Note MIPS HWR (Hardware Register)
changes in MIPS -M options.
[ gas/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* configure.in: Recognize mipsisa32r2, mipsisa32r2el, and
CPU variants.
* configure: Regenerate.
* config/tc-mips.c (ISA_HAS_DROR, ISA_HAS_ROR): New defines.
(macro_build): Handle "K" operand.
(macro2): Use ISA_HAS_DROR and ISA_HAS_ROR in the places where
CPU_HAS_DROR and CPU_HAS_ROR are currently used.
(mips_ip): New variable "lastpos", and implement "+A", "+B",
and "+C" operands for MIPS32 Release 2 ins/ext instructions.
Implement "K" operand for MIPS32 Release 2 rdhwr instruction.
(validate_mips_insn): Implement "+" as a way to extend the
allowed operands, and implement "K", "+A", "+B", and "+C"
operands.
(OPTION_MIPS32R2): New define.
(md_longopts): Add entry for OPTION_MIPS32R2.
(OPTION_ELF_BASE): Adjust to accomodate OPTIONS_MIPS32R2.
(md_parse_option): Handle OPTION_MIPS32R2.
(s_mipsset): Reimplement handling of ".set mipsN" options
and add support for ".set mips32r2".
(mips_cpu_info_table): Add entry for "mips32r2" (MIPS32 Release 2).
(md_show_usage): Document "-mips32r2" option.
* doc/as.texinfo: Document "-mips32r2" option.
* doc/c-mips.texi: Likewise.
[ gas/testsuite/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* gas/mips/cp0-names-mips32r2.d: New test.
* gas/mips/hwr-names-mips32r2.d: New test.
* gas/mips/hwr-names-numeric.d: New test.
* gas/mips/hwr-names.s: New test source file.
* gas/mips/mips32r2.d: New test.
* gas/mips/mips32r2.s: New test source file.
* gas/mips/mips32r2-ill.l: New test.
* gas/mips/mips32r2-ill.s: New test source file.
* gas/mips/mips.exp: Add mips32r2 architecture data array
entry. Run new tests mentioned above.
[ include/elf/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* mips.h (E_MIPS_ARCH_32R2): New define.
[ include/opcode/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* mips.h: Document "+" as the start of two-character operand
type names, and add new "K", "+A", "+B", and "+C" operand types.
(OP_MASK_INSMSB, OP_SH_INSMSB, OP_MASK_EXTMSB)
(OP_SH_EXTMSB, INSN_ISA32R2, ISA_MIPS32R2, CPU_MIPS32R2): New
defines.
[ opcodes/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* mips-dis.c (mips_cp0_names_mips3264r2, mips_hwr_names_numeric)
(mips_hwr_names_mips3264r2): New arrays.
(mips_arch_choice): New "hwr_names" member.
(mips_arch_choices): Adjust for structure change, and add a new
entry for "mips32r2" ISA.
(mips_hwr_names): New variable.
(set_default_mips_dis_options): Set mips_hwr_names.
(parse_mips_dis_option): New "hwr-names" option which sets
mips_hwr_names, and adjust "reg-names=ARCH" to set mips_hwr_names.
(print_insn_arg): Change return type to "int"
and use that to indicate number of characters consumed.
Add support for "+" operand extension character, "+A", "+B",
"+C", and "K" operands.
(print_insn_mips): Adjust for changes to print_insn_arg.
(print_mips_disassembler_options): Adjust for "hwr-names"
addition and "reg-names" change.
* mips-opc (I33): New define (shorthand for INSN_ISA32R2).
(mips_builtin_opcodes): Note that "nop" and "ssnop" are special
forms of "sll". Add new MIPS32 Release 2 instructions: ehb,
di, ei, ext, ins, jr.hb, jalr.hb, mfhc1, mfhc2, mthc1, mthc2,
rdhwr, rdpgpr, seb, seh, synci, wrpgpr, wsbh.
Note that hardware rotate instructions (ror, rorv) can be
used on MIPS32 Release 2, and add the official mnemonics
for them (rotr, rotrv) and the similar "rotl" mnemonic for
left-rotate.
* gas/mips/mips.exp: Define the notion of an "architecture data
array," add comments indicating how to add a new architecture and
suggestions for adding new tests. Populate the architecture data
array with many known architectures and convert many tests to
be run for multiple architectures.
(mips_arches): New global array.
(mips_arch_create, mips_arch_list_all, mips_arch_data)
(mips_arch_displayname, mips_arch_properties)
(mips_arch_as_flags, mips_arch_objdump_flags, mips_arch_matches)
(mips_arch_list_matching): New functions to operate on mips_arches.
(run_dump_test_arch, run_dump_test_arches, run_list_test_arch)
(run_list_test_arches): New functions.
(run_list_test): Document and add an optional "test name" argument.
* gas/mips/abs.d: Remove CPU-specific assembler and objdump flags,
and CPU names from test names.
* gas/mips/add.d: Likewise.
* gas/mips/and.d: Likewise.
* gas/mips/dli.d: Likewise.
* gas/mips/jal-empic-elf-2.d: Likewise.
* gas/mips/jal-empic-elf-3.d: Likewise.
* gas/mips/jal-empic-elf.d: Likewise.
* gas/mips/lb-svr4pic.d: Likewise.
* gas/mips/lb.d: Likewise.
* gas/mips/mips32.d: Likewise.
* gas/mips/mips4.d: Likewise.
* gas/mips/mips64.d: Likewise.
* gas/mips/rol-hw.d: Likewise.
* gas/mips/rol.d: Likewise.
* gas/mips/rol64-hw.d: Likewise.
* gas/mips/rol64.d: Likewise.
* gas/mips/elf-jal.d: Likewise. Also, indicate ELF in test name.
* gas/mips/mips64-mdmx.d: Tweak printed name to indicate that this
test uses the -mdmx flag.
* gas/mips/mips64-mips3d.d: Tweak printed name to indicate that
this test uses the -mips3d flag.
* gas/mips/mips64-mips3d-incl.d: New file.
2002-12-18 Chris Demetriou <cgd@broadcom.com>
* mips-opc.c (mips_builtin_opcodes): Remove one "ror" and two
"dror" entries, and reorder the remaining "dror" and "ror" entries.
[ gas/ChangeLog ]
2002-12-18 Chris Demetriou <cgd@broadcom.com>
* config/tc-mips.c (macro): In M_DROL, M_DROR, M_ROL, and M_ROR,
use hardware rotate ops as appropriate. In M_DROL_I, M_DROR_I,
M_ROL_I, and M_ROR_I, simplify code, clean up warnings, and
arrange not to issue warnings about use of AT when AT is not
actually used.
[ gas/testsuite/ChangeLog ]
2002-12-18 Chris Demetriou <cgd@broadcom.com>
* gas/mips/rol.s: Add ".set noat" and some new instructions to test.
* gas/mips/rol64.s: Likewise.
* gas/mips/rol.l: New file.
* gas/mips/rol.d: Adjust to use rol.l and for rol.s changes.
* gas/mips/rol64.l: New file.
* gas/mips/rol64.d: Adjust to use rol64.l and for rol64.s changes.
* gas/mips/rol-hw.d: New file.
* gas/mips/rol-hw.l: New file.
* gas/mips/rol64-hw.d: New file.
* gas/mips/rol64-hw.l: New file.
* gas/mips/mips.exp: Run rol-hw and rol64-hw tests.
(Create_VMS_Object_File): Fix creat call for sane unix systems.
(Object_Record_Offset): Make it a size_t.
(Flush_VMS_Object_Record_Buffer): Fix signed/unsigned warning.
(VMS_TBT_Routine_End <Size>): Make var unsigned long.
(VMS_Fix_Indirect_Reference <Offset>): Make arg addressT.
(synthesize_data_segment <data_size>): Remove ATTRIBUTE_UNUSED.
(vms_fixup_data_section <data_size>): Add here instead.
* config/e-criself.c: Fix typo in last change.
Adjust callers.
(RELAX_BRANCH_RELOC_S2): Delete.
(append_insn): Use only BFD_RELOC_16_PCREL_S2 for branches.
Do not handle BFD_RELOC_16_PCREL.
(macro_build, mips_ip): Likewise.
(md_pcrel_from): Return 4 for undefined symbols regardless of
mips_pic.
(md_apply_fix3): Use only BFD_RELOC_16_PCREL_S2 for branches.
Don't dereference howto if no such relocation is available.
Do not apply hack for in-place zero addend in NEWABI.
(md_convert_frag): Use only BFD_RELOC_16_PCREL_S2 for branches.
(gas_m68hc11_warning): New function.
(gas_m68hc11_message): New function.
(top): New tests for assembler errors.
(gas_m68hc11_opcode_list): New function.
(top): New tests for opcode list.
(md_relax_table): Define specific relax for PC-rel offsets.
(build_indexed_byte): Use a STATE_INDEXED_PCREL relax code.
(m68hc11_relax_frag): Handle the new relax code.
(md_convert_frag): Likewise.
(md_estimate_size_before_relax): Likewise.
(ia64_gen_real_reloc_type): Handle it.
(pseudo_func): Add @ltoffx.
(md_begin): Build .<ltoffx>.
(ia64_force_relocation): True for LTOFF22X and LDXMOV.
* gas/ia64/ltoff22x-1.[ds]: New.
* gas/ia64/ia64.exp: Run it.
Move OBJ_COFF TC_FORCE_RELOCATION code here so that COFF handles
ARM_IMMEDIATE and ARM_ADRL_IMMEDIATE relocs as for ELF.
* config/tc-arm.h (TC_FORCE_RELOCATION): Define for both ELF and
COFF to call arm_force_relocation.
can find the real symbol and not a gas internal debug symbol.
* gas/m68hc11/insns.d: Update.
* gas/m68hc11/insns-dwarf2.d: Update.
* gas/m68hc11/insns12.d: Update.
* gas/m68hc11/opers12.s (min5b, min9b): Use 16 and -256 for the min.
* gas/m68hc11/opers12.d: Update after indexed offset operand fixes.
* gas/m68hc11/opers12-dwarf2.d: Likewise.
can find the real symbol and not a gas internal debug symbol.
* gas/m68hc11/insns.d: Update.
* gas/m68hc11/insns-dwarf2.d: Update.
* gas/m68hc11/insns12.d: Update.
* gas/m68hc11/opers12.s (min5b, min9b): Use 16 and -256 for the min.
* gas/m68hc11/opers12.d: Update after indexed offset operand fixes.
* gas/m68hc11/opers12-dwarf2.d: Likewise.
* config/tc-m68hc11.h (md_relax_frag): Define to support relaxations
that are not pc-relative.
(m68hc11_relax_frag): Declare.
* config/tc-m68hc11.c (build_indexed_byte): Use a frag_var to handle
the offsetable indexed addressing modes (n,r).
(build_insn): Cleanup some locals.
(m68hc11_relax_frag): New function imported from tc-cris.c to handle
relaxation of difference between two symbols of same section.
(md_convert_frag): For INDEXED_OFFSET relaxs, use the displacement
only when this is a PC-relative operand and the offset is not absolute.
(md_estimate_size_before_relax): Convert the INDEXED_OFFSET,UNDEF frag
to INDEXED_OFFSET,STATE_BITS5 when the symbol is absolute; this will
be handled by m68hc11_relax_frag.
(32-bit int, 64-bit double).
(md_longopts): New options -mshort, -mlong, -mshort-double and
-mlong-double to control the ABI.
(md_show_usage): Update.
(md_parse_option): Handle new options.
* doc/as.texinfo (Overview): Document new options for HC11/HC12.
* config/tc-mcore.c (md_begin): Use a const iterator. Don't
coalesce the name fields to use the same pointer.
* config/tc-sh.c (md_begin): Use a const iterator. Don't coalesce
the name fields to use the same pointer.
(get_specific): Check for opcodes with the same name using strcmp
as well as comparing the pointer.
* config/tc-h8300.c (struct h8_instruction): New type, used to
wrap h8_opcodes with length, noperands, idx, and size fields
(computed at run-time).
(h8_instructions): New variable.
(md_begin): Allocate the storage for h8_instructions. Fill
h8_instructions with pointers to the appropriate opcode and the
correct value for the additional fields.
(clever_message): Update to use h8_instructions instead of
h8_opcodes.
(build_bytes): Ditto.
(get_specific): Ditto.
(md_assemble): Ditto.
parameters. Added support for new opcode-list format. General
error message fixups.
(c4x_inst_add): Reject insn not for our CPU
(md_begin): Added matrix for setting the proper opcode-level &
device-flags according to cpu type and revision. Rewrite the
opcode hasher.
(c4x_operand_parse): Fix opcode bug
(c4x_operands_match): New function argument. Added dry-run
mechanism, that is optional error generation. Added constraint 'i'
and 'j'.
(c4x_insn_check): Added new function for post-verification of the
generated insn.
(md_assemble): Check all opcodes before croaking because of an
argument mismatch. Need this to be able to fully support
ortogonally arguments.
(md_parse_options): Revised commandprompt swicthes and added new
ones.
(md_show_usage): Complete rewrite of printout.
* gas/testsuite/gas/tic4x/addressing.s: Fix bug in one insn
* gas/testsuite/gas/tic4x/addressing_c3x.d: Update thereafter
* gas/testsuite/gas/tic4x/addressing_c4x.d: Update thereafter
* gas/testsuite/gas/tic4x/allopcodes.S: Add support for new
opclass.h changes
* gas/testsuite/gas/tic4x/opclasses.h: Added testsuites for
the new enhanced opcodes.
* gas/testsuite/gas/tic4x/opcodes.s: Regenerate
* gas/testsuite/gas/tic4x/opcodes_c3x.d: Update from above
* gas/testsuite/gas/tic4x/opcodes_c4x.d: Update from above
* gas/testsuite/gas/tic4x/opcodes_new.d: Added new testsuite for
the enhanced and special insns.
* gas/testsuite/gas/tic4x/tic4x.exp: Added the opcodes_new testsuite
* include/opcode/tic4x.h: File reordering. Added enhanced opcodes.
* opcodes/tic4x-dis.c: Added support for enhanced and special
insn.
(c4x_print_op): Added insn class 'i' and 'j'
(c4x_hash_opcode_special): Add to support special insn
(c4x_hash_opcode): Update to support the new opcode-list
format. Add support for the new special insns.
(c4x_disassemble): New opcode-list support.
(c4x_operands_match): Added check for 8-bits LDF insn. Give
warning when using constant direct bigger than 2^16. Add the new
arguments.
* include/opcode/tic4x.h: Major rewrite of entire file. Define
instruction classes, and put each instruction into a class.
* opcodes/tic4x-dis.c: (c4x_print_op): Add support for the new
argument format. Fix bug in 'N' register printer.
(cris_relax_frag): New function.
(md_estimate_size_before_relax) <case ENCODE_RELAX
(STATE_BASE_PLUS_DISP_PREFIX, STATE_UNDF)>: Pass on unresolved
expressions that will become absolute expressions to relaxation.
(md_convert_frag) <case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX,
STATE_WORD)>: Expect only absolute expressions. Use the symbol
value, not distance to symbol.
<case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_BYTE)>:
Ditto. Correct placement of fixup.
(md_assemble): Use SIMPLE_EXPR when dissecting expressions.
(gen_bdap): Ditto.
* config/tc-cris.h (cris_relax_frag): Declare.
(md_relax_frag): Define.
(mips_pseudo_table): Add .gpdword.
(mips_need_elf_addend_fixup): never for NEWABI.
(md_apply_fix3): Don't mark BFD_RELOC64 after GPREL16 or
GPREL32 as done.
(s_cpadd): Generate .cpadd on NEWABI.
(sh_force_relocation): Use sh_local_pcrel.
(md_pcrel_from_section): Check the relocation type whether it
should be resolved locally. Use S_FORCE_RELOC.
* testsuite/gas/sh/pcrel2.d: Check code also.
* doc/c-mips.texi: Add entries for -march=vr4120,vr4130,vr4181,
vr5400 and vr5500. Add entry for -mfix-vr4122-bugs.
* config/tc-mips.c (CPU_HAS_DROR, CPU_HAS_ROR): New macros.
(hilo_interlocks): True for CPU_VR5500.
(gpr_interlocks, cop_interlocks): True for CPU_VR5400 and CPU_VR5500.
(mips_fix_vr4122_bugs): New.
(append_insn): Work around 4122 errors if mips_fix_vr4122_bugs.
(mips_emit_delays): Likewise.
(macro2) [M_DROLI]: Use dror or dror32 if CPU_HAS_DROR.
[M_ROLI]: Likewise ror if CPU_HAS_ROR.
(validate_mips_insn, mips_ip): Handle '[', ']', 'e' and '%'.
(OPTION_FIX_VR4122, OPTION_NO_FIX_VR4122): New options.
(md_longopts): Add -mfix-vr4122-bugs and -no-mfix-vr4122-bugs.
(OPTION_ELF_BASE): Bump.
(md_parse_option): Handle the new options.
(mips_cpu_info_table): Add entries for vr4120, vr4130, vr4181,
vr5400 and vr5500.
[gas/testsuite/]
* gas/mips/mips4100.[sd]: Move dmadd16 and madd16 checks to...
* gas/mips/vr4111.[sd]: ...this new test.
* gas/mips/vr4120.[sd],
* gas/mips/vr4122.[sd],
* gas/mips/vr5400.[sd],
* gas/mips/vr5500.[sd]: New tests.
* mips.exp: Run them.
* config/tc-sh.c (sh_force_relocation): Return 0 for
some PC relative relocations when not relaxing.
* testsuite/gas/sh/pcrel2.s: New.
* testsuite/gas/sh/pcrel2.d: New.
* testsuite/gas/sh/basic.exp: Add pcrel2 test.
* reloc.c (BFD_RELOC_386_TLS_TPOFF, BFD_RELOC_386_TLS_IE,
BFD_RELOC_386_TLS_GOTIE): Add.
* bfd-in2.h, libbfd.h: Rebuilt.
* elf32-i386.c (elf_howto_table): Add R_386_TLS_TPOFF, R_386_TLS_IE
and R_386_TLS_GOTIE.
(elf_i386_reloc_type_lookup): Handle it.
(struct elf_i386_link_hash_entry): Change tls_type type to unsigned
char instead of enum, change GOT_* into defines.
(GOT_TLS_IE_POS, GOT_TLS_IE_NEG, GOT_TLS_IE_BOTH): Define.
(elf_i386_tls_transition): Handle R_386_TLS_IE and R_386_TLS_GOTIE.
(elf_i386_check_relocs): Likewise. Avoid crash if local symbol is
accessed both as normal and TLS symbol. Move R_386_TLS_LDM and
R_386_PLT32 cases so that R_386_TLS_IE can fall through.
Handle R_386_TLS_LE_32 and R_386_TLS_LE in shared libs.
(elf_i386_gc_sweep_hook): Handle R_386_TLS_IE and R_386_TLS_GOTIE.
Handle R_386_TLS_LE_32 and R_386_TLS_LE in shared libs.
(allocate_dynrelocs): Allocate 2 .got and 2 .rel.got entries if
tls_type is GOT_TLS_IE_BOTH.
(elf_i386_size_dynamic_sections): Likewise.
(elf_i386_relocate_section): Handle R_386_TLS_IE and R_386_TLS_GOTIE.
Handle R_386_TLS_LE_32 and R_386_TLS_LE in shared libs.
(elf_i386_finish_dynamic_symbol): Use tls_type & GOT_TLS_IE to catch
all 4 GOT_TLS_* TLS types.
gas/
* config/tc-i386.c (tc_i386_fix_adjustable): Handle
BFD_RELOC_386_TLS_IE and BFD_RELOC_386_TLS_GOTIE.
(BFD_RELOC_386_TLS_IE, BFD_RELOC_386_TLS_GOTIE): Define to 0
if not defined.
(lex_got): Handle @GOTNTPOFF and @INDNTPOFF.
(md_apply_fix3, tc_gen_reloc): Handle BFD_RELOC_386_TLS_IE and
BFD_RELOC_386_TLS_GOTIE.
gas/testsuite/
* gas/i386/tlspic.s: Add tests.
* gas/i386/tlspic.d: Regenerated.
* gas/i386/tlsnopic.s: Add tests.
* gas/i386/tlsnopic.d: Regenerated.
include/
* elf/i386.h (R_386_TLS_TPOFF, R_386_TLS_IE, R_386_TLS_GOTIE):
Define.
ld/testsuite/
* ld-i386/i386.exp: New.
* ld-i386/tlsbin.dd: New test.
* ld-i386/tlsbinpic.s: New test.
* ld-i386/tlsbin.rd: New test.
* ld-i386/tlsbin.s: New test.
* ld-i386/tlsbin.sd: New test.
* ld-i386/tlsbin.td: New test.
* ld-i386/tlslib.s: New test.
* ld-i386/tlsnopic1.s: New test.
* ld-i386/tlsnopic2.s: New test.
* ld-i386/tlsnopic.dd: New test.
* ld-i386/tlsnopic.rd: New test.
* ld-i386/tlsnopic.sd: New test.
* ld-i386/tlspic1.s: New test.
* ld-i386/tlspic2.s: New test.
* ld-i386/tlspic.dd: New test.
* ld-i386/tlspic.rd: New test.
* ld-i386/tlspic.sd: New test.
* ld-i386/tlspic.td: New test.
branch type relocs.
(alpha_force_relocation): Don't special-case branch type relocs.
* gas/alpha/elf-reloc-7.s: New.
* gas/alpha/elf-reloc-7.d: New.
* gas/alpha/alpha.exp: Run it.
2002-09-18 Chris Demetriou <cgd@broadcom.com>
* config/tc-mips.c (md_apply_fix3): Just return for BFD_RELOC_8.
[ gas/testsuite/ChangeLog ]
2002-09-18 Chris Demetriou <cgd@broadcom.com>
* gas/mips/baddata1.s: New file.
* gas/mips/baddata1.l: New file.
* gas/mips/mips.exp: Run new test.
2002-09-18 Chris Demetriou <cgd@broadcom.com>
* config/tc-mips.c (IS_SEXT_32BIT_NUM): Move closer to top of file.
(IS_SEXT_16BIT_NUM): New macro.
(macro_build_ldst_constoffset): New function, to build a set of
instructions to do a load or store from a constant offset relative
to a given register.
(macro, s_cprestore): Use macro_build_ldst_constoffset to implement
.cprestore pseudo-op.
[ gas/testsuite/ChangeLog ]
2002-09-18 Chris Demetriou <cgd@broadcom.com>
* gas/mips/mips-abi32-pic2.s: New file.
* gas/mips/mips-abi32-pic2.d: New file.
* gas/mips/mips.exp: Run new test.
[ plus, fixed date on prev. gas/testsuite/ChangeLog entry. ]
2002-09-18 Chris Demetriou <cgd@broadcom.com>
* config/tc-mips.c (md_apply_fix3): Just return for BFD_RELOC_8.
[ gas/testsuite/ChangeLog ]
2002-09-18 Chris Demetriou <cgd@broadcom.com>
* gas/mips/baddata1.s: New file.
* gas/mips/baddata1.l: New file.
* gas/mips/mips.exp: Run new test.
2002-09-18 Chris Demetriou <cgd@broadcom.com>
* gas/mips/branch-misc-1.d: New file.
* gas/mips/branch-misc-1.s: New file.
* gas/mips/branch-misc-2.s: New file.
* gas/mips/branch-misc-2.d: New file.
* gas/mips/mips.exp: Run new tests.
[ ld/testsuite/ChangeLog ]
2002-09-18 Chris Demetriou <cgd@broadcom.com>
* ld-mips-elf/branch-misc-1.d: New file.
* ld-mips-elf/branch-misc-2.d: New file.
* ld-mips-elf/mips-elf.exp: Run new tests.
(macro): Likewise for la. Likewise for ld.
(mips_after_parse_args): Make -xgot optional, not the default.
(md_apply_fix3): Allow composite relocation to set up gp.
(tc_gen_reloc): Allow relaxing for newabi.
Relax R_MIPS_CALL16 to R_MIPS_GOT_PAGE/R_MIPS_GOT_OFST if local.
Relax R_MIPS_GOT16/R_MIPS_LO16 to R_MIPS_GOT_DISP if local.
Do not issue reloc number of unimplemented BFD_RELOC_ARM_IMMEDIATE and
BFD_RELOC_ARM_OFFSET_IMM relocs - their name is already in the error message
- plus remove them from the default case.
Warn about unpredictable behavior of LDM and STM instructions.
* elf32-i386.c: Don't defined ELF_ARCH etc. if this file is included
by a target variant implementation.
* elf64-alpha.c: Likewise.
* elf32-i386-fbsd.c: New file.
* elf64-alpha-fbsd.c: New file.
* targets.c: Support bfd_elf32_i386_freebsd_vec and
bfd_elf64_alpha_freebsd_vec.
* configure.in: Accept the vectors bfd_elf32_i386_freebsd_vec,
bfd_elf64_alpha_freebsd_vec.
* Makefile.am (BFD32_BACKENDS): Add elf32-i386-fbsd.lo.
(BFD32_BACKENDS_CFILES): Add elf32-i386-fbsd.c.
(BFD64_BACKENDS): Add elf64-alpha-fbsd.lo.
(BFD64_BACKENDS_CFILES): Add elf64-alpha-fbsd.c.
(elf32-i386-fbsd.lo, elf64-alpha-fbsd.lo): Add dependencies.
* config.bfd: For FreeBSD targets, set targ_defvec to a FreeBSD
specific targets. Define OLD_FREEBSD_ABI_LABEL if appropriate.
* config/tc-i386.h (ELF_TARGET_FORMAT): New macro.
(TARGET_FORMAT): Use ELF_TARGET_FORMAT instead of "elf32-i386".
* config/tc-i386.c (i386_target_format): Likewise.
* config/tc-alpha.h (ELF_TARGET_FORMAT): New macro.
(TARGET_FORMAT): Use ELF_TARGET_FORMAT instead of "elf64-alpha".
* emulparams/elf_i386_fbsd.sh: Set OUTPUT_FORMAT to
elf32-i386-freebsd.
* emulparams/elf64alpha_fbsd.sh: Set OUTPUT_FORMAT to
elf64-alpha-freebsd.
Approved by: Alan Modra <amodra@bigpond.net.au>
Message-ID: <20020715021113.GJ30362@bubble.sa.bigpond.net.au>
(TC_ADJUST_RELOC_COUNT): Tweak param name.
(TC_FORCE_RELOCATION, TC_FORCE_RELOCATION_SECTION): Likewise.
(TC_FIX_ADJUSTABLE, MD_PCREL_FROM_SECTION): Likewise.
(RELOC_ENUM): Define.
(fix_new_internal): Use RELOC_ENUM.
(fix_new, fix_new_exp): Likewise.
(adjust_reloc_syms): Comment. Remove unnecessary tests on sym != NULL.
Replace gotos with continue.
(write_relocs): Formatting. Avoid symbol loops in
RELOC_EXPANSION_POSSIBLE case too. Report bfd_reloc_outofrange
errors, and error number in other cases.
(fixup_segment): Remove param names from prototype. Rename
"this_segment_type" to "this_segment". Update linkrelax comment.
Remove "size, "place" and "where" local vars. Formatting. Update
"no symbol" comment. Remove #if 0 and #if 1.
* config/tc-ppc.c (ppc_cleanup): Do something only if format
is ELF.
(ppc_apuinfo_section_add): Define only if format is ELF.
(md_assemble): Emit APUinfo section only if format is ELF.
Fix formatting.
* config/tc-mips.c (macro2): Implement rotates by zero using shifts
by zero.
[gas/testsuite]
* gas/mips/rol.s: Add rotate by zero tests.
* gas/mips/rol.d: Update accordingly.
* gas/mips/rol64.d: Expect rotates by zero to use dsrl.
From matthew green <mrg@redhat.com>
* config/tc-ppc.c (PPC_OPCODE_CLASSIC): Enable this everywhere
PPC_OPCODE_PPC is, except for BookE architectures.
(md_parse_option): Add support for -mspe.
(md_show_usage): Add -mspe.
(md_parse_option): Add support for -me500 and
-me500x2 to generate code for Motorola e500 core complex.
(md_show_usage): Add -me500 and -me500x2.
(PPC_APUINFO_ISEL, PPC_APUINFO_PMR, PPC_APUINFO_RFMCI,
PPC_APUINFO_CACHELCK, PPC_APUINFO_SPE, PPC_APUINFO_EFS,
PPC_APUINFO_BRLOCK): New macros.
(ppc_cleanup): New function.
(ppc_apuinfo_section_add): New function.
(APUID): New macro.
(md_assemble): Collect info and write the APUinfo section.
* config/tc-ppc.h (md_cleanup): Define.
(ppc_cleanup): Export.
(ELF_TC_SPECIAL_SECTIONS): Add .PPC.EMB.apuinfo section.
the fix-up against on the right frag.
(s_cpsetup): Likewise. Parse third argument as expression, to
handle global symbols and forward/backward labels correctly.
* gas/d30v/guard-debug.d: Use -gstabs rather than -g.
* gas/elf/ehopt0.s: Don't use "$" in labels.
* gas/ieee-fp/x930509a.exp: Don't test c30.
* gas/m68hc11/malis.d: Adjust -I so that test runs when not building
in source dir.
* gas/mri/mri.exp: Don't run on "m68hc*".
* gas/sh/basic.exp (do_fp): Match LE too.
(pcrel-coff): Run this version for "sh*-pe*" and rename "sh*-hms" to
"sh*-rtems".
* gas/sh/pcrel-coff.d: Add -EB to objdump flags.
* gas/vtable/vtable.exp: Don't run on linuxecoff. setup_xfail in
preference to not running on ELF targets that might one day pass.
Add more xfails. Add more targets to the REL list.
* gas/m68hc11/insns12.s: New file to test specific 68HC12 insns.
* gas/m68hc11/insns12.d: New file.
* gas/m68hc11/branchs12.s: New test.
* gas/m68hc11/branchs12.d: New test.
* gas/m68hc11/all_insns.d: Dump the relocs to verify that they
are against symbols and not sections (for linker relaxation).
* gas/m68hc11/insns-dwarf2.d: Likewise.
* gas/m68hc11/insns.d: Likewise.
* gas/m68hc11/lbranch.d: Likewise.
* gas/m68hc11/lbranch-dwarf2.d: Likewise.
* gas/m68hc11/opers12.d: Likewise.
* gas/m68hc11/opers12-dwarf2.d: Likewise.
(TC_HANDLES_FX_DONE): Define to let md_apply_fix3 set fx_done flag
according to the reloc.
(tc_fix_adjustable, tc_m68hc11_fix_adjustable): Define.
(TC_FORCE_RELOCATION): Define.
(tc_m68hc11_force_relocation): Declare.
* config/tc-m68hc11.c (md_pseudo_table): Add relax command.
(s_m68hc11_relax): New function for relax group.
(build_insn, build_jump_insn): Emit a M68HC11_RL_JUMP reloc at
beginning of jump instruction.
(md_pcrel_from): Rename from md_pcrel_from_section and fix
address computation.
(tc-gen_reloc): Update.
(md_estimate_size_before_relax): Create the BFD_RELOC_16_PCREL as
PC-relative fixup.
(tc_m68hc11_force_relocation): New function, handle new relocs.
(tc_m68hc11_fix_adjustable): New to make sure there are enough
reloc for the linker relax pass.
(md_apply_fix3): Handle M68HC11_RL_JUMP, M68HC11_RL_GROUP
and VTABLE relocs.
(md_pseudo_table): Add .mode, .far and .interrupt pseudo op.
(s_m68hc11_mode): New function for .mode pseudo op.
(s_m68hc11_mark_symbol): New function for .far and .interrupt
pseudo op.
* config/tc-m68hc11.h (elf_tc_final_processing): Define.
(m68hc11_elf_final_processing): Declare.
page operand for call instruction.
(print_opcode_format): Likewise.
(check_range): Likewise for page range checking.
(get_operand): Don't skip a possible comma in operands.
(fixup8): Generate BFD_RELOC_M68HC11_PAGE reloc.
(fixup16): Likwise with BFD_RELOC_M68HC11_LO16.
(fixup24): New to handle call reloc.
(build_insn): Handle missing page operand for call instruction.
(find): Likewise.
(md_apply_fix3): Take into account new relocs.
(get_operand): Fix the mode for indexed indirect addressing.
(build_indexed_byte): Fix post index byte for indexed indirect mode.
* config/tc-mips.c (mips_ip): Don't work out the value of
constant %hi()s here.
[gas/testsuite/]
* gas/mips/elf-consthilo.[sd]: New test.
* gas/mips/mips.exp: Run it.
for ELF, and don't bother checking ELF relocs when non-ELF.
(i386_immediate): Allow absolute_section expressions for aout.
(i386_displacement): Likewise. Also test bfd_is_com_section.
(md_estimate_size_before_relax): Test OUTPUT_FLAVOR for ELF.
(md_apply_fix3): Hack for bfd_install_relocation when fx_pcrel,
not when fx_addsy. Remove dead code.
immediate offset in "dla" and "la" expansions.
* gas/mips/empic.d: Treat "addiu" and "daddiu" as equivalent when
$0 is source.
* mips-opc.c (mips_builtin_opcodes): Remove "dla" and "la" as
aliases to "daddiu" and "addiu".
at start of insn, pass it to output_disp and output_imm.
(output_disp): Added arguments. If _GLOBAL_OFFSET_TABLE_ is seen
in displacement for R_386_32 reloc, use R_386_GOTPC and compute
properly addend.
(output_imm): Added arguments. Compute properly addend for
R_386_GOTPC.
(md_apply_fix3): Remove R_386_GOTPC handling.
* testsuite/gas/i386/gotpc.s: New.
* testsuite/gas/i386/gotpc.d: New.
* testsuite/gas/i386/i386.exp: Add gotpc test.
* config/tc-mips.c (tc_gen_reloc): Extend GP-relative addend
handling to BFD_RELOC_MIPS16_GPREL.
[gas/testsuite/]
* gas/mips/elf-rel6.[sd]: New test.
* gas/mips/mips.exp: Run it.
2002-07-26 Chris Demetriou <cgd@broadcom.com>
* gas/mips/elf_ase_mips16.d: New file to test ELF MIPS16 ASE marking.
* gas/mips/elf_ase_mips16.s: Likewise.
* gas/mips/mips.exp: Run the new test.
[ ld/testsuite/ChangeLog ]
2002-07-26 Chris Demetriou <cgd@broadcom.com>
* ld-mips-elf/mips16-1.d: Check that ASE flag is actually set.
* doc/c-mips.texi: Remove -mcpu. Document -mabi.
* configure.in (MIPS_CPU_STRING_DEFAULT): New configuration macro.
(USE_E_MIPS_ABI_O32, MIPS_DEFAULT_64BIT): New configuration macros.
* configure, config.in: Regenerate.
* config/tc-mips.c (file_mips_abi): Rename to mips_abi.
(mips_set_options): Remove "abi" field.
(mips_opts): Update accordingly. Replace all uses of mips_opts.abi
with mips_abi.
(mips_cpu): Remove.
(mips_arch_string, mips_arch_info): New vars.
(mips_tune_string, mips_tune_info): New vars.
(ABI_NEEDS_32BIT_REGS, ABI_NEEDS_64BIT_REGS): New macros.
(HAVE_32BIT_GPRS, HAVE_32BIT_FPRS): Don't check the ABI.
(mips_isa_to_str, mips_cpu_to_str): Remove.
(mips_ip): If the selected architecture is a generic ISA rather
than a processor, only mention the ISA level in error messages.
(OPTION_MCPU): Remove.
(OPTION_FP64): New.
(md_longopts): Add -mfp64, remove -mcpu.
(mips_set_option_string): New fn.
(md_parse_option): Make -mipsN update file_mips_isa rather than
mips_opts.isa. Use mips_set_option_string to set -march or -mtune.
Don't let -mgp32 and -mfp32 change the ABI.
(show): Move to end of file. Constify string argument.
(md_show_usage): Move to the end of the file. Read available
architectures from mips_cpu_info_table.
(mips_set_architecture): New fn.
(mips_after_parse_args): Rework. Remove -mcpu handling. -mipsN
is an alias for -march=mipsN. Don't change the ABI based on other
flags. Infer the register size from the ABI as well as the
architecture. Complain about more conflicting arguments.
Unify logic with GCC.
(s_mipsset): Don't change the ABI.
(mips_elf_final_processing): Check USE_E_MIPS_ABI_O32.
(mips_cpu_info_table): Remove Generic-MIPS* entries, keeping just
"mipsN"-type entries. Remove entries that vary only in the
manufacturer's prefix, or that have "000" replaced by "k".
Remove TARGET_CPU entries. Make r2000 entry use CPU_R3000.
(mips_strict_matching_cpu_name_p, mips_matching_cpu_name_p): New fns.
(mips_parse_cpu): New fn.
(mips_cpu_info_from_name, mips_cpu_info_from_cpu): Remove.
(mips_cpu_info_from_isa): Minor formatting tweak.
[gas/testsuite]
* gas/mips/mips-gp32-fp64.d,
* gas/mips/mips-gp32-fp64-pic.d: Add -mfp64.
(ppc_cpu): Make it unsigned long to agree with struct powerpc_opcode
flags.
(ppc_size): Delete.
(ppc_xcoff64): Rename to ppc_obj64.
(md_parse_option <m>): Encode old ppc_size value in ppc_cpu.
(ppc_set_cpu): Set PPC_OPCODE_32 too.
(ppc_arch): Use ppc_obj64 instead of ppc_size to select bfd_mach_ppc64
or bfd_mach_ppc.
(ppc_target_format): Use ppc_obj64 to select format.
(md_begin): Adjust for PPC_OPCODE_32/64 in ppc_cpu.
(ppc_insert_operand): Use ppc_obj64 instead of ppc_size.
(ppc_elf_suffix): Likewise. Don't depend on BFD_DEFAULT_TARGET_SIZE.
(tc_frob_symbol): Likewise.
(md_assemble): Use ppc_obj64 instead of ppc_size. Don't depend on
BFD_DEFAULT_TARGET_SIZE.
(ppc_tc): Likewise.
(ppc_is_toc_sym): Likewise.
(md_apply_fix3): Likewise.
* config/tc-ppc.h (TC_FORCE_RELOCATION): Don't depend on
BFD_DEFAULT_TARGET_SIZE.
(ELF_TC_SPECIAL_SECTIONS): Likewise.
(tc_frob_symbol): Likewise.
(mips_ip): Likewise.
* mips.h (INSN_MIPS16): New define.
* mips-dis.c (mips_isa_type): Add MIPS16 insn handling.
* mips-opc.c (I16): New define.
(mips_builtin_opcodes): Make jalx an I16 insn.
From Catherine Moore, Michael Meissner, Richard Sandiford, Dave Brolley:
* po/POTFILES.in: Add tc-frv.c, tc-frv.h.
* configure.in: Support frv-*-*.
* Makefile.am (CPU_TYPES): Add frv.
(TARGET_CPU_CFILES): Add tc-frv.c.
(TARGET_CPU_HFILES): Add tc-frv.h.
(DEPTC_frv_coff): New variable.
(DEPTC_frv_elf): New variable.
(DEPOBJ_frv_coff): New variable.
(DEPOBJ_frv_elf): New variable.
(DEP_frv_coff): New variable.
(DEP_frv_elf): New variable.
* tc-frv.c: New file.
* tc-frv.h: New file.
* configure.in (vax-*-netbsdelf*, vax-*-netbsdaout*)
(vax-*-netbsd*): New targets.
* configure: Regenerate.
* config/aout_gnu.h (enum machine_type): Add M_VAX4K_NETBSD.
* config/tc-vax.c: Add support for ELF and PIC.
(flag_want_pic): New flag.
(float_cons): Fix prototype.
(md_apply_fix3): Adjust for BFD_ASSEMBLER.
(md_assemble): Introduce a new is_absolute local, and use it
rather than repeating the test. Make fatal errors actually
fatal by using as_fatal as appropriate. Adjust for BFD_ASSEMBLER.
Add support for ELF. Add support for PIC.
(md_convert_frag): Adjust for BFD_ASSEMBLER.
(tc_aout_fix_to_chars): Only include if OBJ_AOUT and not
BFD_ASSEMBLER.
(vax_reg_parse): Make the % register prefix mandatory for ELF,
optional for a.out, and not allowed for VMS. Adjust all callers.
(md_create_short_jump): Add ATTRIBUTE_UNUSED to unused arguments.
(md_create_long_jump): Likewise.
(md_undefined_symbol): Likewise.
(md_section_align): Likewise.
(md_shortopts): Allow -k and -K for ELF.
(md_parse_option): Set flag_want_pic if -k or -K.
(tc_headers_hook): New function if OBJ_AOUT and not BFD_ASSEMBLER.
(tc_gen_reloc): New function if BFD_ASSEMBLER.
* config/tc-vax.h (tc_headers_hook): Remove.
(TARGET_FORMAT): Set according to object format and target
environment.
(BFD_ARCH, TARGET_ARCH): Define.
(NO_RELOC): Adjust for BFD_ASSEMBLER.
(TC_RELOC_RTSYM_LOC_FIXUP, TC_FIX_ADJUSTABLE)
(tc_fix_adjustable): Define if BFD_ASSEMBLER.
* config/vax-inst.h (VAX_JSB, VAX_CALLS, VAX_CALLG): Define.
Based on patch from Matt Green:
* config/obj-elf.h (ECOFF_DEBUGGING): Make configurable.
* config/tc-mips.c (s_mips_file): Renamed from s_file.
(s_mips_loc): New function.
(mips_nonecoff_pseudo_table): Call them.
(append_insn): Call dwarf2_emit_insn.
Based on patch from Matt Green:
* config/obj-elf.h (ECOFF_DEBUGGING): Make configurable.
* config/tc-mips.c (s_mips_file): Renamed from s_file.
(s_mips_loc): New function.
(mips_nonecoff_pseudo_table): Call them.
(append_insn): Call dwarf2_emit_insn.
to -1.
(file_ase_mips16): New veriable.
(mips_eabi64): Remove.
(CPU_HAS_MIPS16): New define.
(CPU_HAS_MDMX): Fix data type.
(md_begin): Code cleanup. Use file_ase_mips16.
(mips_elf_final_processing): Handle mips16 header flag.
Handle EABI flag without intermediate variable.
(md_begin): Add $zero as alias name for $0.
(insn_uses_reg): Use ZERO define.
(mips_ip): Add $zero as alias name for $0.
(mips16_ip): Likewise.
(s_cplocal): Demand empty rest of input line.
(tc_get_register): Likewise. Add support for $kt0, kt1 register
names. Use ZERO define. Fix input_line_pointer progress.
(symbol_find_exact): Split out from..
(symbol_find_base): ..here.
* symbols.h: Replace CONST by const throughout.
(symbol_find_exact): Declare.
* config/obj-elf.c: #include "struc-symbol.h".
(elf_frob_file): If group name matches an exported symbol, use that
symbol for the signature and ".group" as the section name.
linkonce flag. Print all warnings.
(obj_elf_section): Parse ",comdat" for groups.
(elf_frob_file): Set SEC_LINK_ONCE on COMDAT groups. Check
consistency of comdat flag.
2002-05-31 Chris G. Demetriou <cgd@broadcom.com>
Ed Satterthwaite <ehs@broadcom.com>
* mips-opc.c: Add support for SB-1 MDMX subset and extensions.
[ gas/testsuite/ChangeLog ]
2002-05-31 Chris G. Demetriou <cgd@broadcom.com>
* gas/mips/sb1-ext-mdmx.s: New file.
* gas/mips/sb1-ext-mdmx.d: Likewise.
* gas/mips/mips.exp: Run new "sb1-ext-mdmx" test.
2002-05-30 Chris G. Demetriou <cgd@broadcom.com>
Ed Satterthwaite <ehs@broadcom.com>
* config/tc-mips.c (mips_set_options): New "ase_mdmx" member.
(mips_opts): Initialize "ase_mdmx" member.
(file_ase_mdmx): New variable.
(CPU_HAS_MDMX): New macro.
(md_begin): Initialize mips_opts.ase_mdmx and file_ase_mdmx
based on command line options and configuration defaults.
(macro_build): Note in comment that use of MDMX in macros is
not currently allowed.
(validate_mips_insn): Add support for the "O", "Q", "X", "Y", and
"Z" MDMX operand types.
(mips_ip): Accept MDMX instructions if mips_opts.ase_mdmx is set,
and add support for the "O", "Q", "X", "Y", and "Z" MDMX operand
types.
(OPTION_MDMX, OPTION_NO_MDMX, md_longopts, md_parse_option):
Add support for "-mdmx" and "-no-mdmx" options.
(OPTION_ELF_BASE): Move to accomodate new options.
(s_mipsset): Support ".set mdmx" and ".set nomdmx".
(mips_elf_final_processing): Set MDMX ASE ELF header flag if
file_ase_mdmx was set.
* doc/as.texinfo: Document -mdmx and -no-mdmx options.
* doc/c-mips.texi: Likewise, and document ".set mdmx" and ".set
nomdmx" directives.
[ gas/testsuite/ChangeLog ]
2002-05-30 Chris G. Demetriou <cgd@broadcom.com>
* gas/mips/mips64-mdmx.s: New file.
* gas/mips/mips64-mdmx.d: Likewise.
* gas/mips/mips.exp: Run new "mips64-mdmx" test.
[ include/opcode/ChangeLog ]
2002-05-30 Chris G. Demetriou <cgd@broadcom.com>
* mips.h (OP_SH_ALN, OP_MASK_ALN, OP_SH_VSEL, OP_MASK_VSEL)
(MDMX_FMTSEL_IMM_QH, MDMX_FMTSEL_IMM_OB, MDMX_FMTSEL_VEC_QH)
(MDMX_FMTSEL_VEC_OB, INSN_READ_MDMX_ACC, INSN_WRITE_MDMX_ACC)
(INSN_MDMX): New constants, for MDMX support.
(opcode character list): Add "O", "Q", "X", "Y", and "Z" for MDMX.
[ opcodes/ChangeLog ]
2002-05-30 Chris G. Demetriou <cgd@broadcom.com>
Ed Satterthwaite <ehs@broadcom.com>
* mips-dis.c (print_insn_arg): Add support for 'O', 'Q', 'X', 'Y',
and 'Z' formats, for MDMX.
(mips_isa_type): Add MDMX instructions to the ISA
bit mask for bfd_mach_mipsisa64.
* mips-opc.c: Add support for MDMX instructions.
(MX): New definition.
* mips-dis.c: Update copyright years to include 2002.
(mips_big_got): Initialize.
(mips_trap): Initialize.
(load_address): Use mips_gp_register instead of hardcoded value.
Remove dbl parameter, use HAVE_32BIT_ADDRESSES instead.
(macro): Use mips_gp_register instead of hardcoded value.
(macro2): Change load_address calls.
(md_pcrel_from): Comment formatting.
(s_cpload): Use mips_gp_register instead of hardcoded value.
(s_cprestore): Likewise. Comment formatting.
(s_gpword): Fix data type.
(s_cpadd): Use mips_gp_register instead of hardcoded value.
(nopic_need_relax): Replace GP in comments by $gp.
(mips_elf_final_processing): Better comment.
* configure.in: Use ns32k-*-netbsd* instead of ns32k-pc532-netbsd*.
* configure: Regenerate.
ld:
* configure.tgt: Use ns32k-*-netbsd* instead of ns32k-pc532-netbsd*.
(SUB_SEGMENT_ALIGN): If HANDLE_ALIGN defined, pad out last frag to
section alignment.
* config/obj-coff.c (SUB_SEGMENT_ALIGN): Likewise.
* config/obj-ieee.c (SUB_SEGMENT_ALIGN): Likewise.
(write_object_file): Invoke md_do_align if available, and use
frag_align_code on text sections.
* config/obj-vms.h (SUB_SEGMENT_ALIGN): Now two args.
* config/tc-m88k.h (SUB_SEGMENT_ALIGN): Likewise.
* config/tc-ppc.h (SUB_SEGMENT_ALIGN): Likewise.
* config/tc-sh.h (SUB_SEGMENT_ALIGN): Likewise.
* config/tc-i386.h (SUB_SEGMENT_ALIGN): Likewise. Define for
BFD_ASSEMBLER too.
Stephane Carrez
Jakub Jelinek
Alan Modra
DJ Delorie
Stan Cox
Chris Demetriou
Daniel Jacobowitz
Dave Anglin
Nick Clifton
Alexandre Oliva
Kazu Hirata
Aldy Hernandez
H.J. Lu
Richard Henderson
Jim Wilson
Hans-Peter Nilsson
Kaz Kojima
Svein Seldal
Klee Dienes
Martin Schwidefsky
Kevin Buettner
Christopher Faylor
Richard Sandiford
Joern Rennecke
Stephen Clarke
Jason Thorpe
Thiemo Seufer
David O'Brien
Jeff Law
Ben Elliston
Elena Zannoni
Maciej W. Rozycki
Denis Chertykov
Jan Hubicka
Dave Brolley
Catherine Moore
Tom Rix
Marek Michalkiewicz