Commit Graph

533 Commits

Author SHA1 Message Date
Kazu Hirata ec22bddae2 * m68k-dis.c: Fix formatting.
* pj-dis.c: Likewise.
	* z8k-dis.c: Likewise.
2001-07-24 00:48:04 +00:00
Kazu Hirata 44f2a95d95 * s390-dis.c: Fix formatting. 2001-07-23 13:41:14 +00:00
Chris Demetriou 209fd66729 2001-07-21 Chris Demetriou <cgd@broadcom.com>
* mips-opc.c (mips_builtin_opcodes): Sort c.le.s and c.lt.s
      into the rest of the surrounding definitions.
2001-07-21 20:46:51 +00:00
Alan Modra bcb5558b05 * i386-dis.c (grps): Print l or w suffix, and require mem modrm
for lgdt, lidt, sgdt, sidt.
2001-07-18 13:33:12 +00:00
Phil Blundell 4053649742 2001-07-13 Philip Blundell <philb@gnu.org>
* arm-dis.c (print_insn_arm): Use decimal for offsets in LDR/STR.
2001-07-16 19:04:31 +00:00
Jeff Johnston 23969580f6 2001-07-12 Jeff Johnston <jjohnstn@redhat.com>
* cgen-asm.in: Include "xregex.h" always to enable the libiberty
        regex support.
        (@arch@_cgen_build_insn_regex): New routine from Graydon.
        (@arch@_cgen_assemble_insn): Add Graydon's code to use regex
        to verify if it is worth parsing the insn as insn "x".  Also update
        error message when insn is not a recognized format of the insn vs
        when the insn is completely unrecognized.
2001-07-12 21:26:42 +00:00
Frank Ch. Eigler 81f6038f98 * some support for funny-endian 16/32-bit insn sets
[cgen/ChangeLog]
2001-07-11  Frank Ch. Eigler  <fche@redhat.com>

        * desc-cpu.scm (-gen-mach-table-defns): Emit fourth field: the
        mach->cpu insn-chunk-bitsize.
        (-gen-cpu-open): In @arch@_cgen_rebuild_tables, process above new
        field toward CGEN_CPU_TABLE->insn_chunk_bitsize.
        * mach.scm (<cpu>): New field insn-chunk-bitsize.
        (-cpu-parse, -cpu-read): Parse/initialize it.
        * doc/rtl.texi (define-cpu): Document it.

[opcodes/ChangeLog]
2001-07-11  Frank Ch. Eigler  <fche@redhat.com>

        * cgen-dis.in (print_insn): Use cgen_get_insn_value instead of
        bfd_get_bits.
        * cgen-opc.c (cgen_get_insn_value, cgen_put_insn_value): Respect
        non-zero CGEN_CPU_DESC->insn_chunk_bitsize.

[include/opcode/ChangeLog]
2001-07-11  Frank Ch. Eigler  <fche@redhat.com>

        * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
        (cgen_cpu_desc): Ditto.
2001-07-12 02:32:25 +00:00
Andreas Jaeger 7081ff0445 2001-07-09 Andreas Jaeger <aj@suse.de>, Karsten Keil <kkeil@suse.de>
* i386-dis.c (set_op): Handle 64 bit and 32 bit mode.
	(OP_J): Use bfd_vma for mask to work properly with 64 bits.
	(op_address,op_riprel): Use bfd_vma to handle 64 bits.
2001-07-09 14:22:11 +00:00
Ben Elliston 4a3264e6a1 2001-07-05 Ben Elliston <bje@redhat.com>
* Makefile.am (CPUDIR): Define.
	(stamp-m32r): Update dependencies.
	(stamp-fr30): Ditto.
	(stamp-openrisc): Ditto.
	* Makefile.in: Regenerate.
2001-07-05 13:12:23 +00:00
Nick Clifton 2dd46b8b52 Fix encoding of clf instruction 2001-07-03 18:37:39 +00:00
Geoffrey Keating 17f0ac8499 * cgen-ibld.in (insert_normal): Support CGEN_IFLD_SIGN_OPT. 2001-07-01 02:48:46 +00:00
Geoffrey Keating 5e91c3b431 * cgen-asm.c (cgen_parse_keyword): Allow any first character.
* cgen-opc.c (cgen_keyword_add): Ignore special first
	character when building nonalpha_chars field.
2001-06-29 00:09:16 +00:00
Ben Elliston 62d964d839 2001-06-24 Ben Elliston <bje@redhat.com>
* m88k-dis.c: Format to conform to GNU coding standards.
2001-06-24 01:04:16 +00:00
Andreas Jaeger 7f32bebcaa * disassemble.c (disassembler_usage): Add unused attribute. 2001-06-23 16:07:06 +00:00
Eric Christopher 564e8ad940 2001-06-22 Eric Christopher <echristo@redhat.com>
* mips-opc.c: Move prefx to start of the table.
2001-06-22 21:10:01 +00:00
Nick Clifton fe1f01309f Fix over-optimisation of ST instruction. 2001-06-22 08:55:05 +00:00
Nick Clifton 80febfb656 Add wdebug instruction 2001-06-22 08:21:14 +00:00
Aldy Hernandez cb87eaaf22 2001-06-15 Aldy Hernandez <aldyh@redhat.com>
* m10300-opc.c (mn10300_opcodes): Change opcode for AM33 subc.
2001-06-16 16:00:46 +00:00
Geoffrey Keating 3e89004774 Index: opcodes/ChangeLog
2001-06-13  Geoffrey Keating  <geoffk@redhat.com>

	* cgen-asm.c (cgen_parse_keyword): When looking for the
	boundaries of a keyword, allow any special characters
	that are actually in one of the allowed keyword.
	* cgen-opc.c (cgen_keyword_add): Add any special characters
	to the nonalpha_chars field.

Index: cgen/ChangeLog
2001-06-13  Geoffrey Keating  <geoffk@redhat.com>

	* desc.scm (<keyword> 'gen-defn): Add extra zero into
	CGEN_KEYWORD_ENTRY initializers.

Index: include/opcode/ChangeLog
2001-06-13  Geoffrey Keating  <geoffk@redhat.com>

	* cgen.h (cgen_keyword): Add nonalpha_chars field.
2001-06-14 20:38:42 +00:00
Nick Clifton 6fc1282450 Add lgh instruction. 2001-06-12 11:50:53 +00:00
Alan Modra 6439fc285d Merge insn decode tables, and generally tidy. 2001-06-11 13:25:07 +00:00
Alan Modra 5dd0794dca Branch hints for Pentium4 as insn modifiers, and some minor tweaks
to formatting.
2001-06-10 14:07:12 +00:00
Alexandre Oliva bda22bbf15 * sh-opc.h (sh_table): Don't use empty initializers. 2001-06-09 22:42:30 +00:00
Nick Clifton 879db8be1a Remove warnings building z8k port.
Fix ld -r behaviour
2001-06-06 17:01:35 +00:00
Nick Clifton 98b3248268 correct some 68k/ColdFire problems 2001-06-06 14:28:00 +00:00
Alan Modra 3ffd33cf59 * i386-dis.c (cond_jump_flag, loop_jcxz_flag): Define.
(cond_jump_mode, loop_jcxz_mode): Define.
	(dis386_att): Add cond_jump_flag and loop_jcxz_flag as
	appropriate, and 'F' suffix to loop insns.
	(disx86_64_att): Likewise.
	(dis386_twobyte_att): Likewise.
	(print_insn_i386): Don't output addr prefix for loop, jcxz insns.
	Output data size prefix for long conditional jumps.  Output cs and
	ds branch hints.
	(putop): Handle 'F', and mark PREFIX_ADDR used for case 'E'.
	(OP_J): Don't make PREFIX_DATA used.
2001-06-06 10:24:18 +00:00
Alexandre Oliva 9ab433aae8 * sh-opc.h (sh_table): Complete last element entry to avoid
compiler warning.
2001-06-04 04:10:38 +00:00
Nick Clifton d1cf510e5e Add MIPS r12k support 2001-05-23 17:26:40 +00:00
Alan Modra 2c32d9a41f More whitespace fixes. 2001-05-23 03:25:03 +00:00
Alan Modra cba24d7dbd * arc-opc.c: Whitespace changes. 2001-05-23 03:12:14 +00:00
Alexandre Oliva 6be7c12c05 * ltconfig, ltmain.sh, libtool.m4, ltcf-c.sh, ltcf-cxx.sh,
ltcf-gcj.sh: Upgraded to libtool 1.4a 1.641.2.254.  Rebuilt a number
of subdir/configure scripts to use the new libtool.m4.
2001-05-20 19:02:56 +00:00
Hans-Peter Nilsson 22f3fc4323 * cris-opc.c (cris_spec_regs): Add missing initializer field for
last element.
2001-05-18 15:21:59 +00:00
Frank Ch. Eigler 84fd0d38ae * cgen disasm bug fix
2001-05-15  Frank Ch. Eigler  <fche@redhat.com>

	* cgen-dis.in (extract_normal): Complete support for min<base case.
2001-05-15 18:10:05 +00:00
Nick Clifton aa5f19f2b9 Fix MIPS disassembler so that it produces reassemblable code. 2001-05-15 12:11:13 +00:00
J.T. Conklin 24a7a601e2 * ppc-opc.c (powerpc_opcodes): Fixed extended opcode field of
simplified mnemonics used for setting PPC750-specific special
purpose registers.
2001-05-14 17:20:13 +00:00
H.J. Lu 8d5ec59972 2001-05-12 H.J. Lu <hjl@gnu.org>
* i386-dis.c (print_insn_i386): Always set `mod', `reg' and
	`rm'.
2001-05-12 15:19:22 +00:00
Alan Modra bcee8eb8ca Peter Targett's backwards compatibility and other arc fixes. 2001-05-12 15:14:53 +00:00
Alan Modra 4bba68155d * i386-dis.c (twobyte_has_modrm): Update table.
(need_modrm): Give it file scope.
	(MODRM_CHECK): Define.
	(dofloat): Use MODRM_CHECK.
	(OP_E): Likewise.
	(OP_EM): Likewise.
	(OP_EX): Likewise.
and fix testsuite yet again now that we are getting correct disassembly.
2001-05-12 12:07:10 +00:00
Alan Modra 67d6227df7 Correct cvtps2dq, movdq2q, movq2dq, and movq problems. 2001-05-12 09:52:40 +00:00
Frank Ch. Eigler a00ad97d61 * cgen asm/disasm
[opcodes/ChangeLog]
2001-05-07  Frank Ch. Eigler  <fche@redhat.com>

        * cgen-dis.in (default_print_insn): Tolerate min<base instructions
        even at end of a section.
        * cgen-ibld.in (extract_normal): Tolerate min!=base!=max instructions
        by ignoring precariously-unpacked insn_value in favor of raw buffer.

[cgen/ChangeLog]
2001-05-07  Frank Ch. Eigler  <fche@redhat.com>

        * iformat.scm (compute-insn-base-mask-length): Rewrite to tolerate
        various-base-length instruction sets.
2001-05-07 17:55:21 +00:00
Alan Modra a28d0f3d9b * disassemble.c (disassembler_usage): Remove unused attribute. 2001-05-07 09:21:56 +00:00
Frank Ch. Eigler 714b578b87 * typo fix 2001-05-04 17:46:00 +00:00
Frank Ch. Eigler 5264623336 * m32r disasm bug fix
2001-05-04  Frank Ch. Eigler  <fche@redhat.com>

	* m32r-dis.c, -asm.c, -ibld.c: Regenerated with disassembler fixes.

2001-05-04  Frank Ch. Eigler  <fche@redhat.com>

	* cgen-dis.in (print_insn): Remove call to read_insn.  Instead,
	assume incoming buffer already has the base insn loaded.  Handle
	case of smaller-than-base instructions for variable-length case.
2001-05-04 17:45:19 +00:00
Alan Modra 992aaec9a9 Assorted fixes to pinsrw, pextrw, pmovmskb, movmskp, maskmovq. 2001-05-04 11:10:55 +00:00
Nick Clifton 87e6d78217 Add openRISC support in opcodes 2001-04-27 13:34:20 +00:00
Nick Clifton 6840198f93 z8k fixes 2001-04-24 15:22:25 +00:00
Andreas Jaeger c241941156 * i386-dis.c: Add ffreep instruction. 2001-04-06 09:27:33 +00:00
Alexandre Oliva 3eb9799d10 * ppc-opc.c (insert_mbe): Shift mask initializer as long. 2001-03-30 07:36:27 +00:00
Ben Elliston 0e70c820dd * Comment tweak. 2001-03-27 21:37:47 +00:00
Alan Modra 0f17484fd3 Small tweaks to sse2 instructions. 2001-03-24 06:29:16 +00:00
Nick Clifton e93d71992f Remove extraneous whitespace 2001-03-24 00:40:22 +00:00
Ben Elliston fca2040b45 2001-03-22 Ben Elliston <bje@redhat.com>
* cgen-asm.in (@arch@_cgen_assemble_insn): Move tmp_errmsg
	declaration inside CGEN_VERBOSE_ASSEMBLER_ERRORS conditional.
	* cgen-ibld.in (put_insn_int_value): Mark cd parameter as unused
	to allay a compiler warning.
2001-03-22 04:05:03 +00:00
Alan Modra 87890af05c paddq and psubq support. 2001-03-22 02:27:54 +00:00
Patrick Macdonald 27fca2d871 Add support for cgen machine determination.
* cgen-dis.in (print_insn_@arch@): Add support for target machine
        determination via CGEN_COMPUTE_MACH.
        * fr30-desc.c: Regenerate.
        * fr30-dis.c: Regenerate.
        * fr30-opc.h: Regenerate.
        * m32r-desc.c: Regenerate.
        * m32r-dis.c: Regenerate.
        * m32r-opc.h: Regenerate.
        * m32r-opinst.c: Regenerate.
2001-03-20 20:56:34 +00:00
H.J. Lu f4fbb4a3d1 2001-03-20 H.J. Lu <hjl@gnu.org>
* configure.in: Remove the redundent AC_ARG_PROGRAM.
	* configure: Rebuild.
2001-03-20 18:24:30 +00:00
Jim Wilson f4bc6bb0c2 Fix 2 bugs with parsing the resource dependency tables.
* ia64-gen.c (fetch_insn_class): If xsect, then ignore comment and
	notestr if larger than xsect.
	(in_class): Handle format M5.
	* ia64-asmtab.c: Regnerate.
2001-03-20 02:32:27 +00:00
Alan Modra bbe6d95f46 Don't try to read past end of info buffer, and correct test results. 2001-03-19 12:20:10 +00:00
Nick Clifton 82b66b2339 Add new opcodes 2001-03-16 18:42:26 +00:00
Nick Clifton 060d22b0d0 Fix typos in ChangeLogs; fix dates in copyright notices 2001-03-13 22:58:38 +00:00
Nick Clifton 5794c9d6cd fix typos 2001-03-13 06:14:01 +00:00
Nick Clifton 4f3c3dbb37 Fix BLX(1) for Thumb 2001-03-06 22:33:47 +00:00
Nick Clifton 9d29e1b3e2 est of the changes for Coldfire V4 2001-03-06 20:13:31 +00:00
Dave Brolley 2edda1bf34 Correct filenames from last commit. 2001-03-05 16:01:29 +00:00
Dave Brolley b3466c39bc 2001-03-05 Dave Brolley <brolley@redhat.co
* opcodes/fr30-asm.c: Regenerate.
        * opcodes/fr30-desc.c: Regenerate.
        * opcodes/fr30-desc.h: Regenerate.
        * opcodes/fr30-dis.c: Regenerate.
        * opcodes/fr30-ibld.c: Regenerate.
        * opcodes/fr30-opc.c: Regenerate.
        * opcodes/fr30-opc.h: Regenerate.
        * opcodes/m32r-asm.c: Regenerate.
        * opcodes/m32r-desc.c: Regenerate.
        * opcodes/m32r-desc.h: Regenerate.
        * opcodes/m32r-dis.c: Regenerate.
        * opcodes/m32r-ibld.c: Regenerate.
        * opcodes/m32r-opc.c: Regenerate.
        * opcodes/m32r-opc.h: Regenerate.
        * opcodes/m32r-opinst.c: Regenerate.
2001-03-05 15:55:01 +00:00
Nick Clifton 80a523c2e1 new defines for Coldfire V4. 2001-02-28 23:47:10 +00:00
Alan Modra 27b7e12d2d Bump version to 2.11.90, fix missing dependencies in bfd/,
and run "make dep-am".
2001-02-27 06:43:56 +00:00
H.J. Lu b8e0eda247 2001-02-23 David Mosberger <davidm@hpl.hp.com>
* ia64-opc-a.c: Add missing pseudo-ops for "cmp" and "cmp4".
	* ia64-asmtab.c: Regenerate.
2001-02-23 21:57:48 +00:00
Jim Wilson 87f8eb977e Improve gas error messages for invalid instructions.
* cpu-ia64-opc.c (elf64_ia64_operands}: Fix typo: error string for
	C8 said "1" instead of "8".  Clarify error string for IMM22:
	"signed integer" instead of just "integer".
	* config/tc-ia64.c (enum operand_match_result): New type.
	(operand_match): Change return type to operand_match_result.
	Fix all returns appropriately, adding support for returning the
	out-of-range result.
	(parse_operands): New locals result, error_pos, out_of_range_pos,
	curr_out_of_range_pos.  Rewrite operand matching loop to give better
	error messages.
	* ia64-opc-d.c (ia64_opcodes_d): Break the "add" pattern into two
	separate variants: one for IMM22 and the other for IMM14.
	* ia64-asmtab.c: Regenerate.
2001-02-22 03:16:21 +00:00
Greg McGary dd425adaa8 * cgen-opc.c (cgen_get_insn_value): Add missing `return'. 2001-02-21 21:54:31 +00:00
H.J. Lu b34fb0b488 2001-02-20 H.J. Lu <hjl@gnu.org>
* Makefile.am (ia64-ic.tbl): Remove the target.
	(ia64-raw.tbl): Likewise.
	(ia64-waw.tbl): Likewise.
	(ia64-war.tbl): Likewise.
	(ia64-asmtab.c): Generate it in the source directory.
	* Makefile.in: Regenerated.
2001-02-21 00:07:39 +00:00
Nick Clifton e135f41bc2 Add PDP-11 support 2001-02-18 23:33:11 +00:00
Jim Wilson 42dc96cab8 Fix DV bug reported by Intel against the setf instruction.
* ia64-ic.tbl: Update from Intel.  Add setf to fr-writers.
	* ia64-asmtab.c: Regenerate.
2001-02-14 20:30:26 +00:00
Jan Hubicka 76f227a511 * i386.h (i386_optab): SSE integer converison instructions have
64bit versions on x86-64.
	* i386-dis.c (prefix_user_t): Add 'Y' to SSE ineger converison
	instructions.
	(putop): Handle 'Y'
2001-02-12 16:42:49 +00:00
Nick Clifton 9117d2197e Apply several patches from Maciej W. Rozycki 2001-02-11 23:11:41 +00:00
Michael Sokolov 847ee773ea * Makefile.am (stamp-lib): ranlib the libopcodes.a in the build
directory.
	* Makefile.in: Regenerate.
2001-02-11 22:56:42 +00:00
Nick Clifton a85d7ed0f0 Add s390 support 2001-02-10 00:58:38 +00:00
Jim Wilson e594303548 Revert accidental breakage from Nick's 2000-12-16 checkin.
* ia64-asmtab.c: Revert 2000-12-16 change.
2001-02-06 02:42:20 +00:00
Patrick Macdonald 0715dc88cf Binutils portion of fix for syntax array elements when max
operands is greater than 127.

	2001-02-02  Patrick Macdonald  <patrickm@redhat.com>

	* cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
	(CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
	(CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.

	* fr30-desc.h: Regenerate with CGEN_MAX_SYNTAX_ELEMENTS.
	* m32r-desc.h: Regenerate.
2001-02-02 23:04:40 +00:00
Jan Hubicka 905308801e * (dis386_att, grps): Use 'T' for push/pop
(putop): Handle 'T', alphabetize order, fix 'I' handling in Intel syntax
2001-02-01 15:30:55 +00:00
Alan Modra 1328dc9844 Adds assembly and dis-assembly support for the HPPA wide
mode, 16 bit forms of ldi, ldo, ldw and stw instructions.
2001-01-14 05:14:45 +00:00
Nick Clifton b7ed8fad53 formatting fix 2001-01-13 19:45:52 +00:00
Jan Hubicka e2914f484e * i386.c (md_assemble): Check cpu_flags even for nullary instructions.
* i386.h (i386_optab): Fix pusha and ret templates.

	* i386-dis.c (dis386_att, disx86_64_att): Fix ret, lret and iret
	templates.
2001-01-13 09:05:55 +00:00
Nick Clifton 0d2bcfafbf Updated ARC assembler from arccores.com 2001-01-11 21:20:20 +00:00
Nick Clifton 2f6d2f8520 Rotate ChangeLogs 2001-01-11 19:01:42 +00:00
Jan Hubicka 041bd2e00c * i386-dis.c (PREGRP15 - PREGRP24): New.
(dis386_twobyt): Add SSE2 instructions.
	(twobyte_uses_SSE_prefix: Rename from ... ; add new SSE instructions.
	(twobyte_uses_f3_prefix): ... this one.
	(grps): Add SSE instructions.
	(prefix_user_table): Add two new slots; add SSE2 instructions.
	(print_insn_i386): Rename uses_f3_prefix to uses_SSE_prefix;
	Handle the REPNZ and Data16 prefixes as well; do proper lookup
	to prefix_user_table.
	(OP_E): Accept mfence and lfence as well.
	(OP_MMX): Data16 prefix turns MMX to SSE; support REX extensions.
	(OP_XMM): Support REX extensions.
	(OP_EM): Likewise.
	(OP_EX): Likewise.
2001-01-10 14:14:25 +00:00
Nick Clifton 6a56ec7ea3 Fix disassembly of arm-elf instructions with relocs associated with them. 2001-01-09 20:29:48 +00:00
Jeff Johnston 4a9f416d92 2001-01-09 Jeff Johnston <jjohnstn@redhat.com>
* cgen-asm.in (parse_insn_normal): Changed syn to be
        CGEN_SYNTAX_CHAR_TYPE.  Changed all references to *syn
        as character to use CGEN_SYNTAX_CHAR macro and all comparisons
        to '\0' to use 0 instead.
        * cgen-dis.in (print_insn_normal): Ditto.
        * cgen-ibld.in (insert_insn_normal, extract_insn_normal): Ditto.
2001-01-09 17:00:21 +00:00
Jan Hubicka 52b15da39a * i386-dis.c: Add x86_64 support.
(rex): New static variable.
	(REX_MODE64, REX_EXTX, REX_EXTY, REX_EXTZ): New constants.
	(USED_REX): New macro.
	(Ev, Ed, Rm, Iq, Iv64, Cm, Dm, Rm*, Ob64, Ov64): New macros.
	(OP_I64, OP_OFF64, OP_IMREG): New functions.
	(OP_REG, OP_OFF): Declare.
	(get64, get32, get32s): New functions.
	(r??_reg): New constants.
	(dis386_att): Change templates of instruction implicitly promoted
	to 64bit; change e?? to RMe?? for unwind RM byte instructions.
	(grps): Likewise.
	(dis386_intel): Likewise.
	(dixx86_64_att): New table based on dis386_att.
	(dixx86_64_intel): New table based on dis386_intel.
	(names64, names8rex): New global variable.
	(names32, names16): Add extended registers.
	(prefix_user_t): Recognize rex prefixes.
	(prefix_name): Print REX prefixes nicely.
	(op_riprel): New global variable.
	(start_pc): Set type to bfd_vma.
	(print_insn_i386): Detect the 64bit mode and use proper table;
	move ckprefix after initializing the buffer; output unused rex prefixes;
	output information about target of RIP relative addresses.
	(putop): Support 'O' and 'I'. Update handling of "P', 'Q', 'R' and 'S';
	(print_operand_value): New function.
	(OP_E, OP_G, OP_REG, OP_I, OP_J, OP_DIR, OP_OFF, OP_D): Add support for
	REX prefix and new modes.
	(get64, get32s): New.
	(get32): Return bfd_signed_vma type.
	(set_op): Initialize the op_riprel.
	* disassemble.c (disassembler): Recognize the x86-64 disassembly.
2001-01-05 11:11:54 +00:00
Frank Ch. Eigler 7e30bc3635 * generalization
2001-01-03  Richard Sandiford  <r.sandiford@redhat.com>

	 cgen-dis.in (read_insn): Use bfd_get_bits()
2001-01-03 15:10:26 +00:00
Frank Ch. Eigler aed80daedf * generalization
2001-01-02  Richard Sandiford  <rsandifo@redhat.com>

	* cgen-dis.c (hash_insn_array): Use bfd_put_bits().
	(hash_insn_list): Likewise
	* cgen-ibld.in (insert_1): Use bfd_put_bits() and bfd_get_bits().
	(extract_1): Use bfd_get_bits().
	(extract_normal): Apply sign extension to both extraction
	methods.
	* cgen-opc.c (cgen_get_insn_value): Use bfd_get_bits()
	(cgen_put_insn_value): Use bfd_put_bits()
2001-01-02 16:34:07 +00:00
Frank Ch. Eigler 149fe25ee9 * error msg tweak
2000-12-28  Frank Ch. Eigler  <fche@redhat.com>

	* cgen-asm.in (parse_insn_normal): Print better error message for
	instructions with missing operands.
2000-12-28 19:53:54 +00:00
Nick Clifton a6cff3e317 Fix for compiling under Solaris 2.8 2000-12-21 18:43:33 +00:00
Nick Clifton 099194551f Regenerate files 2000-12-16 22:01:44 +00:00
Frank Ch. Eigler 606d55bcee * error message improvements for cgen assemblers
2000-12-12  Frank Ch. Eigler  <fche@redhat.com>

        * cgen-asm.in (@arch@_cgen_assemble_insn): Prefer printing insert-time
        error messages over later parse-time ones.
2000-12-13 18:55:02 +00:00
Jim Wilson 514829c3af Eliminate ia64 compiler warnings. Fix ia64 gas testsuite again.
*  elfxx-ia64.c (get_dyn_sym_info): Cast %p argument to void *.
	* config/tc-ia64.h (ia64_init): Add prototype.
	* gas/ia64/dv-imply.d, gas/ia64/dv-mutex.d, gas/ia64/dv-safe.d,
	gas/ia64/dv-srlz.d, gas/ia64/opc-m.d: Update.
	* ia64-dis.c (print_insn_ia64): Cast away const on ia64_free_opcode
	argument.
	* ia64_gen.c (insert_deplist): Cast sizeof result to int.
	(print_dependency_table): Print NULL if semantics field not set.
	(insert_opcode_dependencies): Mark cmp parameter as unused.
	(print_main_table): Use fprintf_vma to print long long fields.
	(main): Mark argv paramter as unused.  Convert to old style definition.
	* ia64-opc.c (ia64_find_dependency): Cast sizeof result to int.
	* ia64-asmtab.c: Regnerate.
2000-12-12 22:56:36 +00:00
Nick Clifton 239f0c5ce5 Update copyright dates 2000-12-12 19:19:57 +00:00
Nick Clifton 54faae252f Prevent re-read of instruction from wrong address. 2000-12-09 23:20:59 +00:00
Nick Clifton 708b8a713d Regenerate fr30-dis.c 2000-12-09 22:22:33 +00:00
Nick Clifton 0808b8a9ca Add MIPS64 instructions and tests 2000-12-03 22:10:02 +00:00
Nick Clifton 15305553c3 Remove all uses of M1. 2000-12-03 21:58:27 +00:00
Nick Clifton 08fe7a7e60 Use the WR_HILO, RD_HILO, MOD_HILO, and MOD_LO macros. 2000-12-03 21:49:06 +00:00
Nick Clifton e70f259005 Finish off adding MIPS32 instructions. 2000-12-03 21:34:08 +00:00
Nick Clifton c6c98b3833 Add MIPS SB1 machine 2000-12-02 01:10:33 +00:00
Nick Clifton 84ea6cf2c5 Add MIPS V and MIPS 64 machine numbers 2000-12-02 00:55:22 +00:00
Nick Clifton e7af610e14 Add MIPS32 as a seperate MIPS architecture 2000-12-01 21:35:38 +00:00
Nick Clifton b23da31b1c Add initialiser for membership field 2000-12-01 20:06:36 +00:00
Nick Clifton 4372b67322 Improve MIPS32 support 2000-12-01 20:05:32 +00:00
Hans-Peter Nilsson caaaf822e9 * sh-dis.c (print_insn_ddt): Make insn_x, insn_y unsigned.
(print_insn_ppi): Make nib1, nib2, nib3 unsigned.
	Initialize variable dc to NULL.
	(print_insn_shx): Remove unused label d_reg_n.
2000-11-28 23:42:53 +00:00
Nick Clifton 077b8428ab Add ARM v5t, v5te and XScale support 2000-11-25 00:21:40 +00:00
Chris Demetriou 657e7cec5a * mips-opc.c: Fix file header comment. 2000-11-22 18:01:56 +00:00
Hans-Peter Nilsson b6b0b32c89 * cris-dis.c (cris_get_disassembler): If abfd is NULL, return
print_insn_cris_with_register_prefix.
2000-11-14 20:08:55 +00:00
Alexandre Oliva 54a4ca2e1d * sh-opc.h: The operand of `mov.w r0, (<disp>,GBR)' is IMM1, not 0. 2000-11-11 05:42:01 +00:00
Dave Brolley 025d2eabfc Last change was actually made by Matthew Green. 2000-11-07 17:25:30 +00:00
Dave Brolley 1ffd7d025c 2000-11-07 Dave Brolley <brolley@redhat.com>
* cgen-dis.in (print_insn): All insns which can fit into insn_value
	must be loaded there in their entirety.
2000-11-07 17:20:25 +00:00
Jakub Jelinek 19f7b01094 gas/
* config/tc-sparc.c (sparc_ip): Fix a bug which caused v9_arg_p
	instructions to loose any special insn->architecture mask.

	* config/tc-sparc.c (v9a_asr_table): Add v9b ASRs.
	(sparc_md_end, sparc_arch_types, sparc_arch,
	sparc_elf_final_processing): Handle v8plusb and v9b architectures.
	(sparc_ip): Handle siam mode operands. Support v9b ASRs (and
	request v9b architecture if they are used).

bfd/
	* elf32-sparc.c (elf32_sparc_merge_private_bfd_data,
	elf32_sparc_object_p, elf32_sparc_final_write_processing):
	Support v8plusb.
	* elf64-sparc.c (sparc64_elf_merge_private_bfd_data,
	sparc64_elf_object_p): Support v9b.
	* archures.c: Declare v8plusb and v9b machines.
	* bfd-in2.h: Ditto.
	* cpu-sparc.c: Ditto.

include/opcode/
	* sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
	Note that '3' is used for siam operand.

opcodes/
	* sparc-dis.c (v9a_asr_reg_names): Add v9b ASRs.
	(compute_arch_mask): Add v8plusb and v9b machines.
	(print_insn_sparc): siam mode decoding, accept ASRs up to 25.
	* opcodes/sparc-opc.c: Support for Cheetah instruction set.
	(prefetch_table): Add #invalidate.
2000-10-20 10:38:47 +00:00
Nick Clifton 710c2d976f Change mask for OC to 0xFE00 2000-10-16 18:18:47 +00:00
Dave Brolley f40c3ea3c7 2000-10-06 Dave Brolley <brolley@redhat.com>
* fr30-desc.h: Regenerate.
	* m32r-desc.h: Regenerate.
	* m32r-ibld.c: Regenerate.
2000-10-06 16:57:26 +00:00
Jim Wilson afa680f89a Minor DV table update, minor DV checking bug fix.
* config/tc-ia64.c (resources_match): Handle IA64_RS_PRr.
	* ia64-ic.tbl: Update from Intel.
	* ia64-asmtab.c: Regenerate.
2000-10-05 21:55:25 +00:00
Kazu Hirata d1e28e240d 2000-10-04 Kazu Hirata <kazu@hxi.com>
* ia64-gen.c: Convert C++-style comments to C-style comments.
	* tic54x-dis.c: Likewise.
2000-10-04 06:38:01 +00:00
Alexandre Oliva d64552c589 * ltconfig, ltmain.sh, libtool.m4: Updated from libtool
multi-language branch, to work around Solaris' /bin/sh bug.  Rebuilt
all affected `configure' scripts.
2000-09-30 06:07:00 +00:00
Hans-Peter Nilsson b4db717d67 Correct date of checkin 2000-09-29 18:23:26 +00:00
Hans-Peter Nilsson 78966507d6 Changes to add dollar prefix to registers for files where user symbols
don't have a leading underscore.  Fix formatting.
	* cris-dis.c (REGISTER_PREFIX_CHAR): New.
	(format_reg): Add parameter with_reg_prefix.  All callers changed.
	(print_with_operands): Ditto.
	(print_insn_cris_generic): Renamed from print_insn_cris, add
	parameter with_reg_prefix.
	(print_insn_cris_with_register_prefix,
	print_insn_cris_without_register_prefix, cris_get_disassembler):
	New.
	* disassemble.c (disassembler) [ARCH_cris]: Call cris_get_disassembler.
2000-09-29 18:17:25 +00:00
Jim Wilson d48ad4f3b6 Add missing fpcmp instructions, and add missing fcmp/fpcmp tests.
* gas/ia64/opc-f.pl: Add missing fcmp and fpcmp tests.
	* gas/ia64/opc-f.s, gas/ia64/opc-f.d: Regenerate.
	* ia64-opc-f.c (ia64_opcodes_f): Add fpcmp pseudo-ops for
	gt, ge, ngt, and nge.
	* ia64-asmtab.c: Regenerate.
2000-09-22 22:34:41 +00:00
Jim Wilson 139368c9f3 Fix ia64 gas testsuite. Update ia64 DV tables. Fix ia64 gas testsuite again.
gas/ChangeLog
	* config/tc-ia64.c (dv_sem): Add "stop".
	(specify_resource, case IA64_RS_PR): Only handles regs 1 to 15 now.
	(specify_resource, case IA64_RS_PRr): New for regs 16 to 62.
	(specify_resource, case IA64_RS_PR63): Reorder (note == 7) test to
	match above.
	(mark_resources): Check IA64_RS_PRr.
gas/testsuite/ChangeLog
	* gas/ia64/dv-raw-err.s: Add new testcases for PR%, 16 - 62.
	* gas/ia64/dv-waw-err.s: Likewise.
	* gas/ia64/dv-imply.d: Regenerate.
	* gas/ia64/dv-mutex.d, gas/ia64/dv-raw-err.l, gas/ia64/dv-safe.d,
	gas/ia64/dv-srlz.d, gas/ia64/dv-war-err.l, gas/ia64/dv-waw-err.l,
	gas/ia64/opc-f.d, gas/ia64/opc-i.d, gas/ia64/opc-m.d: Likewise.
include/opcode/ChangeLog
	* ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
opcodes/ChangeLog
	* ia64-dis.c (print_insn_ia64): Revert Aug 7 byte skip count change.
	* ia64-gen.c (parse_semantics): Handle IA64_DVS_STOP.
	(lookup_specifier): Handle "PR%, 1 to 15" and "PR%, 16 to 62".
	* ia64-ic.tbl, ia64-raw.tbl, ia64-war.tbl, ia64-waw.tbl: Update.
	* ia64-asmtab.c: Regnerate.
2000-09-22 19:43:50 +00:00
Nick Clifton 156c2f8bf7 Add support for the MIPS32 2000-09-14 01:47:38 +00:00
Catherine Moore de827f513e 2000-09-11 Catherine Moore <clm@redhat.com>
* d30v-opc.c (d30v_operand_t): New operand type Rb2.
      (d30v_format_tab): Use Rb2 for modinc and moddec.
2000-09-11 17:54:33 +00:00
Catherine Moore ea2aae66fe * d30v-opc.c (d30v_format_tab): Use format Ra for
modinc and moddec.
2000-09-07 18:23:36 +00:00
Alexandre Oliva 90f2472aa1 * configure: Rebuilt with new libtool.m4. 2000-09-06 13:42:23 +00:00
Nick Clifton 5b343f5ae8 Regenerate files using fixed aclocal install. 2000-09-06 00:13:34 +00:00
Nick Clifton a47cf56716 Fix time ordering of entries 2000-09-03 23:36:46 +00:00
Nick Clifton f1c8d8433e Extend comment. 2000-09-03 17:57:50 +00:00
Nick Clifton 18e03609ef Increase minor version number (to 2.10.91) to help tools detect the new
ability to support removal of duplciate DWARF@ debug information.
2000-09-02 21:35:47 +00:00
Nick Clifton ed26538621 Regenerate 2000-09-02 20:46:19 +00:00
Alexandre Oliva ac48eca1ad * acinclude.m4: Include libtool and gettext macros from the
top level.
* aclocal.m4, configure: Rebuilt.
2000-08-31 09:46:11 +00:00
Geoffrey Keating e0c2164971 In src/gas/ChangeLog:
2000-08-30  Mark Hatle  <mhatle@mvista.com>

	* config/tc-ppc.c (md_parse_option): Recognize -m405.

In src/opcodes/ChangeLog:
2000-08-30  Mark Hatle  <mhatle@mvista.com>

	* ppc-opc.c Add XTLB macro for a few PPC 4xx extended mnemonics.
	(powerpc_opcodes): Add table entries for PPC 405 instructions.
	Changed rfci, icbt, mfdcr, dccci, mtdcr, iccci from PPC to PPC403
	instructions.
	Added extended mnemonic mftbl as defined in the 405GP manual
	for all PPCs.
2000-08-31 06:48:49 +00:00
Kazu Hirata c6d805e091 2000-08-30 Kazu Hirata <kazu@hxi.com>
* tic80-dis.c: Fix formatting.
2000-08-30 18:51:25 +00:00
Kazu Hirata 7d352fc8cb 2000-08-29 Kazu Hirata <kazu@hxi.com>
* w65-dis.c: Fix formatting.
2000-08-30 03:55:39 +00:00
Jim Wilson f9365b11b5 Fix segfault from last memory-leak fixing patch.
* ia64-dis.c (print_insn_ia64): Add failed label after ia64_free_opcode
	call.  Change last goto to use failed instead of done.
2000-08-28 22:08:36 +00:00
Dave Brolley 6bb95a0ff8 2000-08-28 Dave Brolley <brolley@redhat.com>
* cgen-ibld.in (cgen_put_insn_int_value): New function.
	(insert_normal): Allow for non-zero word_offset with CGEN_INT_INSN_P.
	(insert_insn_normal): Use cgen_put_insn_int_value with CGEN_INT_INSN_P.
	(extract_normal): Allow for non-zero word_offset with CGEN_INT_INSN_P.
	* cgen-dis.in (read_insn): New static function.
	(print_insn): Use read_insn to read the insn into the buffer and set
	up for disassembly.
	(print_insn): in CGEN_INT_INSN_P, make sure that the entire insn is
	in the buffer.
	* fr30-asm.c: Regenerated.
	* fr30-desc.c: Regenerated.
	* fr30-desc.h Regenerated.
	* fr30-dis.c: Regenerated.
	* fr30-ibld.c: Regenerated.
	* fr30-opc.c: Regenerated.
	* fr30-opc.h Regenerated.
	* m32r-asm.c: Regenerated.
	* m32r-desc.c: Regenerated.
	* m32r-desc.h Regenerated.
	* m32r-dis.c: Regenerated.
	* m32r-ibld.c: Regenerated.
	* m32r-opc.c: Regenerated.
2000-08-28 18:17:54 +00:00
Kazu Hirata bf830eae8f 2000-08-28 Kazu Hirata <kazu@hxi.com>
* tic30-dis.c: Fix formatting.
2000-08-28 16:37:55 +00:00
Kazu Hirata 69eb4bbf8e 2000-08-27 Kazu Hirata <kazu@hxi.com>
* sh-dis.c: Fix formatting.
2000-08-26 18:50:14 +00:00
Geoffrey Keating f509565ffa 2000-08-24 David Edelsohn <dje@watson.ibm.com>
* ppc-opc.c (powerpc_opcodes): Add rfid, mtsrd, mtsrdin, mtmsrd.
2000-08-24 21:42:36 +00:00
Kazu Hirata 5c90f90dfb 2000-08-24 Kazu Hirata <kazu@hxi.com>
* z8k-dis.c: Fix formatting.
2000-08-24 17:20:18 +00:00
Jim Wilson 50b81f1903 Fix 3 DV bugs, and a few minor cleanups.
gas/
	* config/tc-ia64.c (specify_resource, case IA64_RS_GR): Handle
	postincrement modified registers.  Handle IA64_OPND_R3_2 addl
	source registers.
	(note_register_values): Handle IA64_OPND_R3_2 operands.
gas/testsuite/
	* gas/ia64/dv-raw-err.s: Add new tests for addl and postinc.
	* gas/ia64/dv-raw-err.l: Likewise.
	* gas/ia64/dv-waw-err.l: Update sed pattern.
	* gas/ia64/opc-f.pl: Delete fpsub, and fpadd comment.
	* gas/ia64/opc-f.s, gas/ia64/opc-f.d: Regenerate.
include/opcode/
	* ia64.h (IA64_OPCODE_POSTINC): New.
opcodes/
	* ia64-ic.tbl (pr-readers-nobr-nomovpr): Add addl, adds.  Delete
	break, mov-immediate, nop.
	* ia64-opc-f.c: Delete fpsub instructions.
	* ia64-opc-m.c: Add POSTINC to all instructions with postincrement
	address operand.  Rewrite using macros to avoid long lines.
	* ia64-opc.h (POSTINC): Define.
	* ia64-asmtab.c: Regenerate.
2000-08-16 23:20:15 +00:00
Jim Wilson 19ba671774 Fix file corrupted before initial checkin.
* ia64-ic.tbl: Add missing entries.
2000-08-15 19:42:44 +00:00
Jason Eckhardt a5bc329991 2000-08-08 Jason Eckhardt <jle@cygnus.com>
* i860-dis.c (print_br_address): Change third argument from int
        to long.
2000-08-09 03:35:46 +00:00
Jason Eckhardt 305d537e30 gas:
2000-08-08  Jason Eckhardt  <jle@cygnus.com>

	* config/tc-i860.h: Rework completely for BFD_ASSEMBLER.
	(i860_fix_info): New enum.
	(MD_APPLY_FIX3): Define.
	(WORKING_DOT_WORD): Define.
	(TC_HANDLES_FX_DONE): Define.
	(DIFF_EXPR_OK): Define.
	(LISTING_HEADER): Define.
	(TARGET_FORMAT): Select target format based on endian flag.
	(TARGET_BYTES_BIG_ENDIAN): Default to little endian.
	(target_big_endian): Add external declaration.

	* config/tc-i860.c: All existing code reworked completely. Other
	new code shown below.
	(SYNTAX_SVR4): Define.
	(target_warn_expand): New variable.
	(md_shortopts): Declare and define (-Qy, -Qn, and -V options).
	(md_longopts): Declare and define with new options (-EL, -EB,
	and -mwarn-expand).
	(md_show_usage): New function.
	(md_operand): New function.
	(obtain_reloc_for_imm16): New function.
	(md_apply_fix3): New function.
	(tc_gen_reloc): New function.

include:
2000-08-08  Jason Eckhardt  <jle@cygnus.com>

	* opcode/i860.h: Small formatting adjustments.

opcode:
2000-08-08  Jason Eckhardt  <jle@cygnus.com>

	* i860-dis.c (print_br_address): Change third argument from int
	to long.

bfd:
2000-08-08  Jason Eckhardt  <jle@cygnus.com>
	* elf32-i860.c (elf32_i860_howto_table): Updated some fields.
2000-08-09 03:33:42 +00:00
Richard Henderson 0228082a3c * ia64-dis.c (print_insn_ia64): Get byte skip count correct
for MLI templates.  Handle IA64_OPND_TGT64.
2000-08-07 21:44:26 +00:00
Denis Chertykov 463f102c0a * avr-dis.c (avr_operand): Use PARAMS macro in declaration.
Change return type from void to int.  Check the combination
	of operands, return 1 if valid.  Fix to avoid BUF overflow.
	Report undefined combinations of operands in COMMENT.
	Report internal errors to stderr.  Output the adiw/sbiw
	constant operand in both decimal and hex.
	(print_insn_avr): Disassemble ldd/std with displacement of 0
	as ld/st.  Check avr_operand () return value, handle invalid
	combinations of operands like unknown opcodes.
2000-08-06 14:12:36 +00:00
Ben Elliston f6e6b40ff5 2000-08-04 Ben Elliston <bje@redhat.com>
* cgen-dis.in, cgen-asm.in, cgen-ibld.in: New files.
	* cgen.sh: Likewise.
2000-08-04 02:21:43 +00:00
Jim Wilson 3d56ab850c Fix memory leaks for IA-64 opcode idescs.
gas/
	* config/tc-ia64.c (emit_one_bundle): Call ia64_free_opcode
	before ia64_find_opcode.
	(md_assemble): Likewise.
opcodes/
	* ia64-dis.c (print_insn_ia64): Call ia64_free_opcode at end.
2000-08-02 21:24:54 +00:00
Nick Clifton dc62a253bc Minor formatting fixes 2000-07-31 18:50:56 +00:00
Ben Elliston 6e31aea3cd 2000-07-28 Ben Elliston <bje@redhat.com>
* Makefile.am (CGEN, CGENDEPS, CGENDIR, CGENFLAGS): New.
	(run-cgen, stamp-m32r, stamp-fr30): New targets.
	* Makefile.in: Regenerate.
	* configure.in: Add --enable-cgen-maint option.
	* configure: Regenerate.
2000-07-29 00:33:34 +00:00
Jason Eckhardt 915ef37f63 2000-07-22 Jason Eckhardt <jle@cygnus.com>
* Makefile.am (CFILES): Added i860-dis.c.
        (ALL_MACHINES): Added i860-dis.lo.
        (i860-dis.lo): New dependences.
2000-07-28 23:49:35 +00:00
Jason Eckhardt cdac37f615 2000-07-22 Jason Eckhardt <jle@cygnus.com>
* i860-dis.c: New file.
	(print_insn_i860): New function.
	(print_br_address): New function.
	(sign_extend): New function.
	(BITWISE_OP): New macro.
	(I860_REG_PREFIX): New macro.
	(grnames, frnames, crnames): New structures.

	* disassemble.c (ARCH_i860): Define.
	(disassembler): Add check for bfd_arch_i860 to set disassemble
	function to print_insn_i860.

	* Makefile.in (CFILES): Added i860-dis.c.
	(ALL_MACHINES): Added i860-dis.lo.
	(i860-dis.lo): New dependences.

	* configure.in: New bits for bfd_i860_arch.

	* configure: Regenerated.
2000-07-28 21:17:40 +00:00
Jason Eckhardt 9d75133528 2000-07-22 Jason Eckhardt <jle@cygnus.com>
* include/opcode/i860.h (btne, bte, bla): Changed these opcodes
	to use sbroff ('r') instead of split16 ('s').
	(J, K, L, M): New operand types for 16-bit aligned fields.
	(ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
	use I, J, K, L, M instead of just I.
	(T, U): New operand types for split 16-bit aligned fields.
	(st.x): Changed these opcodes to use S, T, U instead of just S.
	(andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
	exist on the i860.
	(pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
	(pfeq.ss, pfeq.dd): New opcodes.
	(st.s): Fixed incorrect mask bits.
	(fmlow): Fixed incorrect mask bits.
	(fzchkl, pfzchkl): Fixed incorrect mask bits.
	(faddz, pfaddz): Fixed incorrect mask bits.
	(form, pform): Fixed incorrect mask bits.
	(pfld.l): Fixed incorrect mask bits.
	(fst.q): Fixed incorrect mask bits.
	(all floating point opcodes): Fixed incorrect mask bits for
	handling of dual bit.

	* include/elf/i860.h: New file.
	(elf_i860_reloc_type): Defined ELF32 i860 relocations.

	* bfd/cpu-i860.c: Added comments.

	* bfd/elf32-i860.c (TARGET_LITTLE_SYM): Defined to
	bfd_elf32_i860_little_vec.
	(TARGET_LITTLE_NAME): Defined to "elf32-i860-little".
	(ELF_MAXPAGESIZE): Changed to 4096.

	* bfd/targets.c (bfd_elf32_i860_little_vec): Declaration of
	new target.
	(bfd_target_vector): Added bfd_elf32_i860_little_vec.

	* bfd/config.bfd (i860-stardent-sysv4*, i860-stardent-elf*): Added
	config for little endian elf32 i860.
	(targ_defvec): Define for the new config above
	as "bfd_elf32_i860_little_vec".
	(targ_selvecs): Define for the new config above
	as "bfd_elf32_i860_vec bfd_elf32_i860_little_vec"

	* bfd/configure.in (bfd_elf32_i860_little_vec): Added recognition
	of new target vec.

	* bfd/configure: Regenerated.

	* opcodes/i860-dis.c: New file.
	(print_insn_i860): New function.
	(print_br_address): New function.
	(sign_extend): New function.
	(BITWISE_OP): New macro.
	(I860_REG_PREFIX): New macro.
	(grnames, frnames, crnames): New structures.

	* opcodes/disassemble.c (ARCH_i860): Define.
	(disassembler): Add check for bfd_arch_i860 to set disassemble
	function to print_insn_i860.

	* include/dis-asm.h (print_insn_i860): Add prototype.

	* opcodes/Makefile.in (CFILES): Added i860-dis.c.
	(ALL_MACHINES): Added i860-dis.lo.
	(i860-dis.lo): New dependences.

	* opcodes/configure.in: New bits for bfd_i860_arch.

	* opcodes/configure: Regenerated.
2000-07-28 21:10:20 +00:00
Dave Brolley 510925d36e 2000-07-26 Dave Brolley <brolley@redhat.com>
* cgen-opc.c (cgen_hw_lookup_by_name): 'i' is now unsigned.
	(cgen_hw_lookup_by_num): Ditto.
	(cgen_operand_lookup_by_name): Ditto.
	(print_address): Ditto.
	(print_keyword): Ditto.
	* cgen-dis.c (hash_insn_array): Mark unused parameters with
	ATTRIBUTE_UNUSED.
	* cgen-asm.c (hash_insn_array): Mark unused parameters with
	ATTRIBUTE_UNUSED.
	(cgen_parse_keyword): Ditto.
2000-07-26 22:45:49 +00:00
Hans-Peter Nilsson 936897734c Revert spurious unrelated changes from last commit. Oops. 2000-07-20 16:56:18 +00:00
Hans-Peter Nilsson 6c95a37f64 * Makefile.am (CFILES): Add cris-dis.c and cris-opc.c.
(ALL_MACHINES): Add cris-dis.lo and cris-opc.lo.
	(cris-dis.lo, cris-opc.lo): New rules.
	* Makefile.in: Rebuild.
	* configure.in (bfd_cris_arch): New target.
	* configure: Rebuild.
	* disassemble.c (ARCH_cris): Define.
	(disassembler): Support ARCH_cris.
	* cris-dis.c, cris-opc.c: New files.
	* po/POTFILES.in, po/opcodes.pot: Regenerate.
2000-07-20 16:46:28 +00:00
Jakub Jelinek 09ab35c7f5 * sparc-opc.c (sparc_opcodes): popc has 0 in rs1, not rs2.
Reported by Bill Clarke <llib@computer.org>.
2000-07-11 18:44:12 +00:00
Alan Modra 9082179098 Fix a date. 2000-07-10 18:07:44 +00:00
Geoffrey Keating 1da5001cc9 * ppc-opc.c (powerpc_opcodes): Correct suffix for vslw.
Patch by Randall J Fisher <rfisher@ecn.purdue.edu>.
2000-07-09 20:28:51 +00:00
Alan Modra 6e09abd4bd Add some prototypes, and fix a few warnings. 2000-07-09 07:29:39 +00:00
DJ Delorie 302ab118e1 add MAINTAINERS files 2000-07-05 19:28:06 +00:00
Alexandre Oliva 6eeeb4b407 * arm-dis.c (print_insn_arm): Output combinations of PSR flags. 2000-07-04 05:47:22 +00:00
Nick Clifton 00d2865b83 Tidy up formatting.
Add  -mall-opcodes, -mno-skip-bug, -mno-wrap.
2000-07-03 22:25:33 +00:00
Nick Clifton c07ab2ec0c Fix formatting. 2000-07-03 21:52:37 +00:00
Alan Modra 0bdaf48bac Fix 2000-06-22. grep after running dep.sed 2000-07-01 01:41:09 +00:00
Nick Clifton 9b443040f8 Add entry omited when Stephane Carrez's h68hc11 code was chaecked in. 2000-06-30 22:15:12 +00:00
Scott Bambrough 7c03c75e90 2000-06-26 Scott Bambrough <scottb@netwinder.org>
* arm-dis.c (regnames): Add an additional register set to match
	the set used by GCC.  Make it the default.
2000-06-26 16:50:29 +00:00
Alan Modra 1581f8c9fe Ensure /usr/include and the like stay out of dependencies. 2000-06-22 13:01:43 +00:00
H.J. Lu bbeb2e037c 2000-06-20 H.J. Lu <hjl@gnu.org>
* Makefile.am: Rebuild dependency.
	* Makefile.in: Rebuild.
2000-06-20 20:41:02 +00:00
Nick Clifton 60bcf0fa8c Applied Stephane Carrez <Stephane.Carrez@worldnet.fr> patches to add support
for m68hc11 and m68hc12 processors.
2000-06-19 01:22:44 +00:00
Nicholas Duffek 39c20e8f1e * disassemble.c (disassembler): Refer to the PowerPC 620 using
bfd_mach_ppc_620 instead of 620.
2000-06-16 20:46:47 +00:00
Alan Modra 79540e2676 Fix typo. 2000-06-16 07:42:12 +00:00
Jeff Law 53d388d148 * h8300-dis.c: Fix formatting.
(bfd_h8_disassemble): Distinguish adds/subs, inc/dec.[wl]
        correctly.
2000-06-12 22:23:25 +00:00
Denis Chertykov 8776c5fece * avr-dis.c (avr_operand): Bugfix for jmp/call address. 2000-06-09 17:58:33 +00:00
Denis Chertykov bab84c47ec * avr-dis.c: completely rewritten. 2000-06-07 17:45:44 +00:00
Nick Clifton 5fec0fc5d1 Fix formatting 2000-06-02 18:09:28 +00:00
Nick Clifton 3903e627f3 Applied patch from Kazu Hirata <kazu@hxi.com> to fix disassembly of inc.l
and dec.l instructions
2000-06-01 18:19:59 +00:00
Nick Clifton c0ae4cccdd Add comment describoing why dgettext() is used in _() macro. 2000-05-31 18:32:07 +00:00
Nick Clifton bb08852125 Undo part of previous delta, so that _() calls dgettext() not gettext(). 2000-05-30 21:04:24 +00:00
Nick Clifton c1485d85e0 Replace defines with those from intl/libgettext.h to quieten gcc warnings. 2000-05-30 18:35:35 +00:00
Alan Modra 2114f57b93 Update dependencies. 2000-05-26 14:14:21 +00:00
Alexandre Oliva d60622826d * m10300-dis.c (disassemble): Don't assume 32-bit longs when
sign-extending operands.
2000-05-26 01:54:33 +00:00
Donald Lindsay 344fc69a7b Add ALONE flag to most of the short branch instructions. 2000-05-25 22:21:38 +00:00
Diego Novillo fb48caede3 * mips-dis.c (REGISTER_NAMES): Rename to STD_REGISTER_NAMES.
(STD_REGISTER_NAMES): New name for REGISTER_NAMES.
	(reg_names): Rename to std_reg_names. Change it to a char **
	static variable.
	(std_reg_names): New name for reg_names.
	(set_mips_isa_type): Set reg_names to point to std_reg_names by
	default.
2000-05-24 15:24:56 +00:00
Nick Clifton 0ab71ce35a Regerbated after change to Makefile.am 2000-05-22 18:04:17 +00:00
Nick Clifton 6c298591a3 Define LIBIBERTY 2000-05-21 17:01:02 +00:00
Frank Ch. Eigler f660ee8b2e * cgen/opcodes fix
* approved by nickc

[opcodes/ChangeLog]
2000-05-16  Frank Ch. Eigler  <fche@redhat.com>

	* fr30-desc.h: Partially regenerated to account for changed
	CGEN_MAX_* -> CGEN_ACTUAL_MAX_* macros.
	* m32r-desc.h: Ditto.

[include/opcode/ChangeLog]
2000-05-16  Frank Ch. Eigler  <fche@redhat.com>

	* cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32.  Check that
	it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
	(CGEN_MAX_IFMT_OPERANDS): Increase to 16.  Check that it exceeds
	CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
2000-05-16 19:28:07 +00:00
Nick Clifton 322f2c4579 Add support for _x and _s flags to MSR instruction 2000-05-15 19:25:22 +00:00
Nick Clifton 60fc8cba61 Fix disassembly of DLRS{H|B} instruction 2000-05-12 17:15:21 +00:00
Alan Modra 73da6b6b40 Don't mask top 32 bits of 64-bit address. 2000-05-11 07:10:19 +00:00
Geoffrey Keating d2f75a6f40 * ppc-opc.c (powerpc_opcodes): Make the predicted-branch opcodes
also available in common mode when powerpc syntax is being used.
2000-05-10 19:42:25 +00:00
Alan Modra 821011cc5b Kill compiler warnings with ATTRIBUTE_UNUSED. 2000-05-08 07:22:54 +00:00
Timothy Wall 5c84d377b6 Support for tic54x target. 2000-05-06 17:14:34 +00:00
J.T. Conklin 786e2c0f62 * ppc-opc.c (VA, VB, VC, VD, VS, SIMM, UIMM, SHB): New macros, for
vector unit operands.
(VX, VX_MASK, VXA, VXA_MASK, VXR, VXR_MASK): New macros, for vector
unit instruction formats.
(PPCVEC): New macro, mask for vector instructions.
(powerpc_operands): Add table entries for above operand types.
(powerpc_opcodes): Add table entries for vector instructions.

* ppc-dis.c (print_insn_big_powerpc): Add PPC_OPCODE_ALTIVEC to mask.
(print_insn_little_powerpc): Likewise.
(print_insn_powerpc): Prepend 'v' when printing vector registers.
2000-05-03 22:25:08 +00:00
Denis Chertykov 3c504221d4 * avr-dis.c (reg_fmul_d): New. Extract destination register from
FMUL instruction.
	(reg_fmul_r): New. Extract source register from FMUL instruction.
	(reg_muls_d): New. Extract destination register from MULS instruction.
	(reg_muls_r): New. Extract source register from MULS instruction.
	(reg_movw_d): New. Extract destination register from MOVW instruction.
	(reg_movw_r): New. Extract source register from MOVW instruction.
	(print_insn_avr): Handle MOVW, MULS, MULSU, FMUL, FMULS, FMULSU,
	EICALL, EIJMP, LPM r,Z, ELPM r,Z, SPM, ESPM instructions.
2000-05-01 08:45:11 +00:00
Clinton Popetz 7f6d05e83e Add XCOFF64 support.
bfd:
	* Makefile.am (coff64-rs6000.lo): New rule.
	* Makefile.in: Regenerate.
	* coff-rs6000.c (xcoff_mkobject, xcoff_copy_private_bfd_data,
	xcoff_is_local_label_name, xcoff_rtype2howto,
	xcoff_reloc_type_lookup, xcoff_slurp_armap, xcoff_archive_p,
	xcoff_read_ar_hdr, xcoff_openr_next_archived_file, xcoff_write_armap,
	xcoff_write_archive_contents): No longer static, and prefix with _bfd_.
	(NO_COFF_SYMBOLS): Define.
	(xcoff64_swap_sym_in, xcoff64_swap_sym_out, xcoff64_swap_aux_in,
	xcoff64_swap_aux_out): New functions; handle xcoff symbol tables
	internally.
	(MINUS_ONE): New macro.
	(xcoff_howto_tabl, xcoff_reloc_type_lookup): Add 64 bit POS
	relocation.
	(coff_SWAP_sym_in, coff_SWAP_sym_out, coff_SWAP_aux_in,
	coff_SWAP_aux_out): Map to the new functions.
	* coff64-rs6000.c: New file.
	* libcoff.h (bfd_coff_backend_data): Add new fields
	_bfd_coff_force_symnames_in_strings and
	_bfd_coff_debug_string_prefix_length.
	(bfd_coff_force_symnames_in_strings,
	bfd_coff_debug_string_prefix_length): New macros for above fields.
	* coffcode.h (coff_set_arch_mach_hook): Handle XCOFF64 magic.
	Set machine to 620 for XCOFF64.  Use bfd_coff_swap_sym_in instead
	of using coff_swap_sym_in directly.
	(FORCE_SYMNAMES_IN_STRINGS): New macro, defined for XCOFF64.
	(coff_set_flags) Set magic for XCOFF64.
	(coff_compute_section_file_positions): Add symbol name length to
	string section length if bfd_coff_debug_string_prefix_length is
	true.
	(coff_write_object_contents): Don't do reloc overflow for XCOFF64.
	(coff_slurp_line_table): Use bfd_coff_swap_lineno_in instead of
	using coff_swap_lineno_in directly.
	(bfd_coff_backend_data): Add _bfd_coff_force_symnames_in_strings
	and _bfd_coff_debug_string_prefix_length fields.
	* coffgen.c (coff_fix_symbol_name, coff_write_symbols): Force
	symbol names into strings table when
	bfd_coff_force_symnames_in_strings is true.
	* coffswap.h (MAX_SCNHDR_NRELOC, MAX_SCNHDR_NLNNO, GET_RELOC_VADDR,
	SET_RELOC_VADDR): New macros.
	(coff_swap_reloc_in, coff_swap_reloc_out): Use above macros.
	(coff_swap_aux_in, coff_swap_aux_out): Remove RS6000COFF_C
	code.
	(coff_swap_aouthdr_in, coff_swap_aouthdr_out): Handle XCOFF64
	changes within RS6000COFF_C specific code.
	(coff_swap_scnhdr_out): Use PUT_SCNHDR_NLNNO, PUT_SCNHDR_NRELOC,
	MAX_SCNHDR_NRELOC, and MAX_SCNHDR_NLNNO.
	* reloc.c (bfd_perform_relocation, bfd_install_relocation):
	Extend existing hack on target name.
	* xcofflink.c (XCOFF_XVECP): Extend existing hack on
	target name.
	* coff-tic54x.c (ticof): Keep up to date with new fields
	in bfd_coff_backend_data.
	* config.bfd: Add bfd_powerpc_64_arch to targ_arch and define
	targ_selvecs to include rs6000coff64_vec for rs6000.
	* configure.in: Add rs6000coff64_vec case.
 	* cpu-powerpc.c: New bfd_arch_info_type.

	gas:
	* as.c (parse_args): Allow md_parse_option to override -a listing
	option.
	* config/obj-coff.c (add_lineno): Change type of offset parameter
	from "int" to "bfd_vma."
	* config/tc-ppc.c (md_pseudo_table): Add "llong" and "machine."
	(ppc_mach, ppc_subseg_align, ppc_target_format): New.
	(ppc_change_csect): Align correctly for XCOFF64.
	(ppc_machine): New function, which discards "ppc_machine" line.
	(ppc_tc): Cons for 8 when code is 64 bit.
	(md_apply_fix3): Don't check operand->insert.  Handle 64 bit
	relocations.
	(md_parse_option): Handle -a64 and -a32.
	(ppc_xcoff64): New.
	* config/tc-ppc.h (TARGET_MACH): Define.
	(TARGET_FORMAT): Move to function.
	(SUB_SEGMENT_ALIGN): Use ppc_subseg_align.

	include:
	* include/coff/rs6k64.h: New file.

	opcodes:
	* configure.in: Add bfd_powerpc_64_arch.
	* disassemble.c (disassembler): Use print_insn_big_powerpc for
	64 bit code.
2000-04-26 15:09:44 +00:00
Nick Clifton 447b43fa50 Initialise signed_overflow field 2000-04-24 17:32:36 +00:00
Timothy Wall aa170a07eb Misc assembly/disassembly fixes. 2000-04-23 02:39:13 +00:00
Jeff Law 91b1cc5d0b * hppa-dis.c (extract_16): New function.
(print_insn_hppa): Fix incorrect handling of 'fe'. Added handling of
        new operand types l,y,&,fe,fE,fx.
2000-04-21 22:04:29 +00:00
Jim Wilson 800eeca487 IA-64 ELF support. 2000-04-21 20:22:24 +00:00
Alexandre Oliva 4d85706b80 * m10300-dis.c (HAVE_AM30, HAVE_AM33): Define.
(disassemble): Use them.
2000-04-20 22:15:32 +00:00
Alan Modra 0d8dfecfe9 More portability patches. Include sysdep.h everywhere. 2000-04-14 04:16:58 +00:00
Andrew Cagney a2d91340f3 Remove ``-W -Wall'' from top-level Makefile/configure.
Add ``-W -Wall'' to sub-directories bfd, binutils, gas gprof, ld and
opcodes by the addition of WARN_CFLAGS to Makefile.am and configury to
set it.  Add configure option --enable-build-warnings.
Re-generate all and sundry using auto*-000227.
2000-04-09 12:17:43 +00:00
Joern Rennecke 52ccafd035 opcodes:
* sh-opc.c (sh_table): Use A_DISP_PC / PCRELIMM_8BY2 for ldre & ldrs.
	stc GBR,@-<REG_N> is available for arch_sh1_up.
	Group parallel processing insn with identical mnemonics together.
	Make three-operand psha / pshl come first.
gas:
	* config/tc-sh.c (get_operands): There's no third operand if the
	first operand is an immediate.
2000-04-05 21:43:26 +00:00
Joern Rennecke 015551fcfb sh-dsp REPEAT support:
opcodes:

        * sh-opc.h (sh_nibble_type): Remove DISP_8 and DISP_4.
        Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}.  Add REPEAT.
        (sh_arg_type): Add A_PC.
        (sh_table): Update entries using immediates.  Add repeat.
        * sh-dis.c (print_insn_shx): Remove DISP_8 and DISP_4.
        Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}.  Add REPEAT.

gas:

        * config/tc-sh.c (immediate): Delete.
        (sh_operand_info): Add immediate member.
        (parse_reg): Use A_PC for pc.
        (parse_exp): Add second argument 'op'.  All callers changed.
        (parse_at): Expect pc to be coded as A_PC.
        Use immediate field in *op.
        (insert): Add fourth argument 'op'.  All callers changed.
        (build_relax): Add second argument 'op'.  All callers changed.
        (insert_loop_bounds): New function.
        (build_Mytes): Remove DISP_4.
        Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}.  Add REPEAT.
        (assemble_ppi): Use immediate field in *operand.
        (sh_force_relocation): Handle BFD_RELOC_SH_LOOP_{START,END}.
        (md_apply_fix): Likewise.
        (tc_gen_reloc): Likewise.  Check for a pcrel BFD_RELOC_SH_LABEL.

include/coff:

        * sh.h (R_SH_LOOP_START, R_SH_LOOP_END): Define.

include/elf:

        * sh.h (R_SH_LOOP_START, R_SH_LOOP_END): New RELOC_NUMBERs.

bfd:

        * reloc.c (_bfd_relocate_contents): Add BFD_RELOC_SH_LOOP_START and
        BFD_RELOC_SH_LOOP_END.
        * elf32-sh.c (sh_elf_howto_tab): Change special_func to
        sh_elf_ignore_reloc for all entries that sh_elf_reloc used to ignore.
        Add entries for R_SH_LOOP_START and R_SH_LOOP_END.
        (sh_elf_reloc_loop): New function.
        (sh_elf_reloc): No need to test for always-to-be-ignored relocs
        any more.
        (sh_rel): Add entries for BFD_RELOC_SH_LOOP_{START,END}.
        (sh_elf_relocate_section): Handle BFD_RELOC_SH_LOOP_{START,END}.
        * bfd-in2.h, libbfd.h: Regenerate.
2000-04-05 21:23:05 +00:00
Alan Modra 8ad3436c79 Move translated part of bug report string back into .c files so
xgettext can find it.  Regnerate .pot files.
2000-04-04 14:32:35 +00:00
Alan Modra 41b49281c1 Use "gcc -MM" for dependencies, and update them. 2000-04-04 10:53:56 +00:00
Alan Modra b77a133c96 Tidy some code. Print pc rel addresses as signed. 2000-04-03 14:17:43 +00:00
Ian Lance Taylor 9aaaa29133 * disassemble.c (disassembler_usage): Don't use a prototype. Mark
the parameter ATTRIBUTE_UNUSED.
	* ppc-opc.c: Add ATTRIBUTE_UNUSED as needed.
2000-04-02 06:26:09 +00:00
Alexandre Oliva 5728a7d74f * m10300-opc.c: SP-based offsets are always unsigned. 2000-04-01 22:03:31 +00:00
Alexandre Oliva 907f179095 Reverted the comment about inc/inc4, that was already implied by RN02. 2000-03-31 20:31:05 +00:00
Alexandre Oliva fa5e0d8d33 Fix typos. Add FIXME for 2-reg inc and inc4. 2000-03-31 19:28:52 +00:00
Nick Clifton 67b60d924f Disassemble 0xde.. to "bal" [branch always] instead of "undefined". 2000-03-29 18:23:57 +00:00
Nick Clifton ba23e138c9 Fix value of SHORT_A1.
Move SHORT_AR to end of list of short instructions.
2000-03-27 20:17:02 +00:00
Ian Lance Taylor 832ddf6235 * Makefile.am (CFILES): Add avr-dis.c.
(ALL_MACHINES): Add avr-dis.lo.
2000-03-27 16:34:34 +00:00
Alan Modra adde6300e0 ATMEL AVR microcontroller support. 2000-03-27 08:39:14 +00:00
Joern Rennecke 05102e700f * sh-opc.h (sh_table): ldre and ldrs have a *signed* displacement. 2000-03-06 21:13:15 +00:00
Nick Clifton 866afedcb4 Apply patch for 100679 2000-03-02 23:01:40 +00:00
Nick Clifton 77343c58f9 Replace 'flags' with 'signed_overflow_ok_p' 2000-02-28 17:57:40 +00:00
Ian Lance Taylor e56f75e906 2000-02-27 Eli Zaretskii <eliz@is.elta.co.il>
* Makefile.am (stamp-lib): Use $(LIBTOOL) --config to get the
	name of the libtool directory.
	* Makefile.in: Rebuild.
2000-02-27 17:08:06 +00:00
Ian Lance Taylor a74801baf8 rebuild with current tools 2000-02-27 16:55:52 +00:00
Nick Clifton fa7928cae2 Add functions to modify/examine the signed_overflow_ok_p field in cpu_desc. 2000-02-24 23:58:52 +00:00
Andrew Haley cfcdbe9790 2000-02-23 Andrew Haley <aph@cygnus.com>
* m32r-asm.c, m32r-desc.c, m32r-desc.h, m32r-dis.c,
        m32r-ibld.c,m32r-opc.h: Rebuild.
2000-02-24 16:19:36 +00:00
Alan Modra 5b93d8bb51 Add IBM 370 support. 2000-02-23 13:52:23 +00:00
Chandra Chavva b669ceb922 * d30v-opc.c (d30v_opcode_tab) : Added FLAG_NOT_WITH_ADDSUBppp to
ST2H, STB, STH, STHH, STW and ST2H opcodes to prohibit parallel
        procedure.
2000-02-22 20:44:14 +00:00
Andrew Haley 8027df8989 1999-12-30 Andrew Haley <aph@cygnus.com>
* mips-dis.c (_print_insn_mips): New arg for OPCODE_IS_MEMBER:
	force gp32 to zero.
	* mips-opc.c (G6): New define.
	(mips_builtin_op): Add "move" definition for -gp32.
2000-02-22 14:41:46 +00:00
Ian Lance Taylor 4db3857a87 From Grant Erickson <gerickso@Brocade.COM>:
* ppc-opc.c: Correct dcread--it takes 3 arguments, not 2.
2000-02-22 07:44:54 +00:00
Alan Modra f6af82bd44 This lot mainly cleans up `comparison between signed and unsigned' gcc
warnings.  One usused var, and a macro parenthesis fix too.  Also check
input sections are elf when doing gc in elflink.h.
2000-02-21 12:01:27 +00:00
Joern Rennecke d4845d5762 bfd:
Reinstate bits of sh4 support that got accidentally deleted.
Add sh-dsp support.

bfd:

	* archures.c (bfd_mach_sh2, bfd_mach_sh_dsp): New macros.
	(bfd_mach_sh3_dsp): Likewise.
	(bfd_mach_sh4): Reinstate.
	(bfd_default_scan): Recognize 7410, 7708, 7729 and 7750.
	* bfd-in2.h: Regenerate.
	* coff-sh.c (struct sh_opcode): flags is no longer short.
	(USESAS, USESAS_REG, USESR8, SETSAS, SETSAS_REG): New macros.
	(sh_opcode41, sh_opcode42): Integrate as sh_opcode41.
	(sh_opcode01, sh_opcode02, sh_opcode40): Add sh-dsp opcodes.
	(sh_opcode41, sh_opcode4, sh_opcode80): Likewise.
	(sh_opcodes): No longer const.
	(sh_dsp_opcodef0, sh_dsp_opcodef): New arrays.
	(sh_insn_uses_reg): Check for USESAS and USESR8.
	(sh_insn_sets_reg, sh_insns_conflict): Check for SETSAS.
	(_bfd_sh_align_load_span): Return early for SH4.
	Modify sh_opcodes lookup table for sh-dsp / sh3-dsp.
	Take into account that field b of a parallel processing insn
	could be mistaken for a separate insn.
	* cpu-sh.c (arch_info_struct): New array elements for
	sh2, sh-dsp and sh3-dsp.
	Reinstate element for sh4.
	(SH2_NEXT, SH_DSP_NEXT, SH3_DSP_NEXT): New macros.
	(SH4_NEXT): Reinstate.
	(SH3_NEXT, SH3E_NEXT): Adjust.
	* elf-bfd.h (_sh_elf_set_mach_from_flags): Declare.
	* elf32-sh.c (sh_elf_set_private_flags): New function.
	(sh_elf_copy_private_data, sh_elf_set_mach_from_flags): Likewise.
	(sh_elf_merge_private_data): New function.
	(elf_backend_object_p, bfd_elf32_bfd_set_private_bfd_flags): Define.
	(bfd_elf32_bfd_copy_private_bfd_data): Define.
	(bfd_elf32_bfd_merge_private_bfd_data): Change to
	sh_elf_merge_private_data.

gas:

	* config/tc-sh.c ("elf/sh.h"): Include.
	(sh_dsp, valid_arch, reg_x, reg_y, reg_efg): New static variables.
	(md.begin): Initialize target_arch.
	Only include opcodes in has table that match selected architecture.
	(parse_reg): Recognize register names for sh-dsp.
	(parse_at): Recognize post-modify addressing.
	(get_operands): The leading space is now optional.
	(get_specific): Remove FDREG_N support.  Add support for sh-dsp
	arguments.  Update valid_arch.
	(build_Mytes): Add support for SDT_REG_N.
	(find_cooked_opcode): New function, broken out of md_assemble.
	(assemble_ppi, sh_elf_final_processing): New functions.
	(md_assemble): Use find_cooked_opcode and assemble_ppi.
	(md_longopts, md_parse_option): New option: -dsp.
	* config/tc-sh.h (elf_tc_final_processing): Define.
	(sh_elf_final_processing): Declare.

include/elf:

	* sh.h: (EF_SH_MACH_MASK, EF_SH_UNKNOWN, EF_SH1, EF_SH2): New macros.
	(EF_SH3, EF_SH_HAS_DSP, EF_SH_DSP, EF_SH3_DSP): Likewise.
	(EF_SH_HAS_FP, EF_SH3E, EF_SH4, EF_SH_MERGE_MACH): Likewise.

opcodes:

	* sh-dis.c (print_movxy, print_insn_ddt, print_dsp_reg): New functions.
	(print_insn_ppi): Likewise.
	(print_insn_shx): Use info->mach to select appropriate insn set.
	Add support for sh-dsp.  Remove FD_REG_N support.
	* sh-opc.h (sh_nibble_type): Add new values for sh-dsp support.
	(sh_arg_type): Likewise.  Remove FD_REG_N.
	(sh_dsp_reg_nums): New enum.
	(arch_sh1, arch_sh2, arch_sh3, arch_sh3e, arch_sh4): New macros.
	(arch_sh_dsp, arch_sh3_dsp, arch_sh1_up, arch_sh2_up): Likewise.
	(arch_sh3_up, arch_sh3e_up, arch_sh4_up, arch_sh_dsp_up): Likewise.
	(arch_sh3_dsp_up): Likewise.
	(sh_opcode_info): New field: arch.
	(sh_table): Split up insn with FD_REG_N into ones with F_REG_N and
	D_REG_N.  Fill in arch field.  Add sh-dsp insns.
2000-02-17 00:33:36 +00:00
Fernando Nasser a7f8487eec 2000-02-14 Fernando Nasser <fnasser@totem.to.cygnus.com>
* arm-dis.c: Change flavor name from atpcs-special to
	special-atpcs to prevent name conflict in gdb.
	(get_arm_regname_num_options, set_arm_regname_option,
	get_arm_regnames): New functions.  API to access the several
	flavor of register names.  Note: Used by gdb.
	(print_insn_thumb): Use the register name entry from the currently
	selected flavor for LR and PC.
2000-02-14 19:02:47 +00:00
Nick Clifton 97ee9b94b2 Add support for M340 part. 2000-02-10 21:41:11 +00:00
Nick Clifton a3d9c82d14 Rename parse_disassembler_option (again) 2000-02-07 18:27:19 +00:00
Timothy Wall 940b2b788c octets vs bytes changes for binutils 2000-02-03 18:12:55 +00:00
Nick Clifton 6c082ed806 Rename parse_disassembler_option to parse_arm_disassembler_option and allow it
to be exported.
2000-01-28 01:55:09 +00:00
Nick Clifton 58efb6c0fd Add ATPCS support to ARM disassembler.
Document ARM disassembler options.
2000-01-27 22:17:12 +00:00
Nick Clifton 94470b237b Add support for documenting target specific disassembler options 2000-01-27 21:44:26 +00:00
Nick Clifton 2f0ca46a49 Apply Thoams de Lellis's patch to fic disassembly of Thumb instructions when
bounded by non-function labels.
2000-01-27 20:05:32 +00:00
Nick Clifton cb26882951 Prevent double dumping of raw thumb instructions. 2000-01-25 22:10:13 +00:00
Nick Clifton 06b53c1bff Add 'add" as an offial alias for "addu" 2000-01-21 00:27:29 +00:00
Nick Clifton 3442f30943 fix spelling of Motorola 2000-01-20 19:08:43 +00:00
Nick Clifton 01c7f6303d Add support for --disassembler-options=force-thumb 2000-01-03 20:50:57 +00:00
Alan Modra 3138f287b1 x86 indirect jump/call syntax fixes. Disassembly fix for lcall. 1999-12-27 16:10:31 +00:00
Jeff Law a9af5e0481 * m10300-opc.c, m10300-dis.c: Add am33 support. 1999-12-01 10:36:22 +00:00
Jeff Law 61e8273b2c * hppa-dis.c (unit_cond_names): Add PA2.0 unit condition names.
(print_insn_hppa): Handle 'B' operand.
1999-11-25 03:29:14 +00:00
Nick Clifton 96ac8957e8 Fix binary pattern for cpfg,f0,c instruction 1999-11-22 15:13:26 +00:00
Gavin Romig-Koch 5fce5ddfd3 For include/opcode:
* mips.h (INSN_ISA5): New.

For opcodes:

	* mips-opc.c (I5): New.
	(abs.ps,add.ps,alnv.ps,c.COND.ps,cvt.s.pl,cvt.s.pu,cvt.ps.s
	madd.ps,movf.ps,movt.ps,mul.ps,net.ps,nmadd.ps,nmsub.ps,
	pll.ps,plu.ps,pul.ps,puu.ps,sub.ps,suxc1,luxc1): New.
1999-11-18 19:53:48 +00:00
Donald Lindsay cfbd315cb2 Added 'X' format to ARM code. 1999-11-16 03:37:02 +00:00