Commit Graph

6932 Commits

Author SHA1 Message Date
mfortune
153ff4340d Remove newly introduced whitespace from warnings.
* messages.c (as_warn_internal): Remove extra whitespace from
	warning messages.
2014-05-20 23:40:49 +01:00
mfortune
82bda27b2f Mark MSA as requiring FP64
gas/
	* config/tc-mips.c (FP64_ASES): Add ASE_MSA.
	(mips_after_parse_args): Do not select ASE_MSA without -mfp64.

gas/testsuite/

	* gas/mips/micromips@msa-branch.d: Rework expected output for fp64.
	* gas/mips/msa-branch.d: Likewise.
2014-05-20 23:05:03 +01:00
Mike Stump
39128ec026 * messages.c (as_warn_internal): Ensure we don't interleave output
within a single line when make -j is used.
	(as_bad_internal): Likewise.
2014-05-20 12:45:30 -07:00
Richard Sandiford
9440a90459 gas/
* config/obj-elf.h (obj_elf_seen_attribute): Declare.
	* config/obj-elf.c (recorded_attribute_info): New structure.
	(recorded_attributes): New variable.
	(record_attribute, obj_elf_seen_attribute): New functions.
	(obj_elf_vendor_attribute): Record which attributes have been seen.
2014-05-20 19:02:41 +01:00
Nick Clifton
00b32ff21f Fix MSP430 assembler to support #hi(<symbol>).
* config/tc-msp430.c (CHECK_RELOC_MSP430): Add OP parameter.
	Generate BFD_RELOC_MSP430_ABS_HI16 if vshift is 1.
	(msp430_srcoperand): Store vshift value in operand.

	* msp430.h (struct msp430_operand_s): Add vshift field.

	* gas/elf/struct.d: Expect extra output from some toolchains.
	* gas/symver/symver0.d: Likewise.
	* gas/symver/symver1.d: Likewise.
2014-05-20 10:28:42 +01:00
Nick Clifton
296a868924 Extend the fix already created for PR 16858 so that it works with x86 PE targets as well.
PR gas/16858
	* config/tc-i386.c (md_apply_fix): Improve the detection of code
	symbols for 32-bit PE targets.
2014-05-19 14:29:31 +01:00
Richard Sandiford
fd5c94abf6 gas/
* config/tc-mips.c (md_obj_begin): Delete.
	(md_obj_end): Fold into...
	(md_mips_end): ...here.  Move to end of file.
2014-05-18 20:28:04 +01:00
Nick Clifton
77f730a2f5 Prevent the V850 assembler from generating an internal error if it is asked to
handle a ctoff() pseudo-op when running in RH850 ABI mode.

	PR gas/16946
	* config/tc-v850.c (handle_ctoff): Generate an error if called
	when using the RH850 ABI.
2014-05-17 17:48:44 +01:00
Kaushik Phata
856ea05ccf This adds support for marking RL78 binaries as either supporting 32-bit
or 64-bit doubles.  It also makes the linker complain if the user attempts
to link together binaries with different sized doubles.

	* elf32-rl78.c (rl78_elf_merge_private_bfd_data): Complain if
	64-bit doubles objects mix with 32-bit doubles objects.
	(rl78_elf_print_private_bfd_data): Describe 64-bit doubles flag.

	* readelf.c (get_machine_flags): Handle RL78 64-bit doubles flag.

	* config/tc-rl78.c (enum options): Add OPTION_32BIT_DOUBLES
	and OPTION_64BIT_DOUBLES.
	(md_longopts): Add -m32bit-doubles and -m64bit-doubles.
	(md_parse_option): Parse -m32bit-doubles and -m64bit-doubles.
	(md_show_usage): Show all of the RL78 options.
	(rl78_float_cons): New static functions.
	(md_pseudo_table): Update handler for "double".
2014-05-16 14:57:10 +01:00
mfortune
bad1aba328 Re-work register size macros for MIPS.
gas/
	* config/tc-mips.c (mips_set_options): Rename gp32 to gp throughout.
	(HAVE_32BIT_GPRS, HAVE_64BIT_GPRS): Remove. Re-implement via GPR_SIZE.
	(HAVE_32BIT_FPRS, HAVE_64BIT_FPRS): Remove. Re-implement via FPR_SIZE.
	(GPR_SIZE, FPR_SIZE): New macros. Use throughout.
2014-05-13 12:03:08 +01:00
H.J. Lu
df18fdba5d Properly display extra data/address size prefixes
X86 disassembler checks data and address size prefixes when displaying
instruction mnemonic and operands.  For the extra data and address size
prefixes, their names depend only on the address mode, not the data and
address size prefixes.  This patch changes x86 disassembler not to check
the data and address size prefix when printing extra data and address size
prefixes.

gas/testsuite/

	* gas/i386/nops-1-core2.d: Replace data32 with data16.
	* gas/i386/nops-4a-i686.d: Likewise.
	* gas/i386/nops-5-i686.d: Likewise.
	* gas/i386/nops-5.d: Likewise.
	* gas/i386/x86-64-cbw-intel.d: Likewise.
	* gas/i386/x86-64-cbw.d: Likewise.
	* gas/i386/x86-64-io-intel.d: Likewise.
	* gas/i386/x86-64-io-suffix.d: Likewise.
	* gas/i386/x86-64-io.d: Likewise.
	* gas/i386/x86-64-nops-1-core2.d: Likewise.
	* gas/i386/x86-64-nops-1-g64.d: Likewise.
	* gas/i386/x86-64-nops-1-nocona.d: Likewise.
	* gas/i386/x86-64-nops-1.d: Likewise.
	* gas/i386/x86-64-nops-2.d: Likewise.
	* gas/i386/x86-64-nops-3.d: Likewise.
	* gas/i386/x86-64-nops-4-core2.d: Likewise.
	* gas/i386/x86-64-nops-4.d: Likewise.
	* gas/i386/x86-64-nops-5-k8.d: Likewise.
	* gas/i386/x86-64-nops-5.d: Likewise.
	* gas/i386/x86-64-stack-intel.d: Likewise.
	* gas/i386/x86-64-stack-suffix.d: Likewise.
	* gas/i386/x86-64-stack.d: Likewise.
	* gas/i386/ilp32/x86-64-cbw-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-cbw.d: Likewise.
	* gas/i386/ilp32/x86-64-io-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-io-suffix.d: Likewise.
	* gas/i386/ilp32/x86-64-io.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-1-core2.d:
	* gas/i386/ilp32/x86-64-nops-1-nocona.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-1.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-2.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-3.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-4-core2.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-4.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-5-k8.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-5.: Likewise.
	* gas/i386/ilp32/x86-64-stack-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-stack-suffix.: Likewise.
	* gas/i386/ilp32/x86-64-stack.d: Likewise.

ld/testsuite/

	* ld-x86-64/tlsbin.dd: Replace data32 with data16.
	* ld-x86-64/tlsdesc-nacl.pd: Likewise.
	* ld-x86-64/tlsgdesc.dd: Likewise.
	* ld-x86-64/tlsld1.dd: Likewise.
	* ld-x86-64/tlsld3.dd: Likewise.
	* ld-x86-64/tlspic.dd: Likewise.

opcodes/

2014-05-09  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (ADDR16_PREFIX): Removed.
	(ADDR32_PREFIX): Likewise.
	(DATA16_PREFIX): Likewise.
	(DATA32_PREFIX): Likewise.
	(prefix_name): Updated.
	(print_insn): Simplify data and address size prefixes processing.
2014-05-09 10:58:00 -07:00
mfortune
0ae19f059a Fix references to file_mips_isa missed in previous patch.
gas/
	* config/tc-mips.c (md_parse_option): Update missed file_mips_isa
	references.
2014-05-08 22:07:49 +01:00
mfortune
0b35dfeec6 Consolidate file_mips_xxx variables.
gas/
	* config/tc-mips.c (mips_set_options): Rename fp32 field to fp.
	Update fp32 == 0 to fp == 64 and fp32 == 1 to fp != 64 throughout.
	(file_mips_gp32, file_mips_fp32, file_mips_soft_float,
	file_mips_single_float, file_mips_isa, file_mips_arch): Merge into
	one struct...
	(file_mips_opts): Here. New static global. Update throughout.
	(mips_opts): Update defaults for gp32 and fp.
2014-05-08 21:55:06 +01:00
mfortune
263b257428 Implement CONVERT_SYMBOLIC_ATTRIBUTE for MIPS.
gas/
	* config/tc-mips.c (streq): Define.
	(mips_convert_symbolic_attribute): New function.
	* config/tc-mips.h (CONVERT_SYMBOLIC_ATTRIBUTE): Define.
	(mips_convert_symbolic_attribute): New prototype

gas/testsuite/
	* gas/mips/attr-gnu-abi-fp-1.s: New.
	* gas/mips/attr-gnu-abi-fp-1.d: New.
	* gas/mips/attr-gnu-abi-msa-1.s: New.
	* gas/mips/attr-gnu-abi-msa-1.d: New.
	* gas/mips/mips.exp: Add new tests.
2014-05-08 15:09:35 +01:00
Volodymyr Arbatov
1058c7532d Use signed data type for R_XTENSA_DIFF* relocation offsets.
R_XTENSA_DIFF relocation offsets are in fact signed. Treat them as such.
Add testcase that examines ld behaviour on R_XTENSA_DIFF relocation
changing sign during relaxation.

2014-05-02  Volodymyr Arbatov  <arbatov@cadence.com>
	    David Weatherford  <weath@cadence.com>
	    Max Filippov  <jcmvbkbc@gmail.com>

bfd/
  * elf32-xtensa.c (relax_section): treat R_XTENSA_DIFF* relocations as
  signed.

gas/
  * config/tc-xtensa.c (md_apply_fix): mark BFD_RELOC_XTENSA_DIFF*
  fixups as signed.

ld/testsuite/
  * ld-xtensa/diff_overflow.exp, * ld-xtensa/diff_overflow1.s,
  * ld-xtensa/diff_overflow2.s: Add test for DIFF* relocation
  signedness and overflow checking.
2014-05-08 01:55:41 +04:00
Andrew Bennett
ae52f48306 Add MIPS r3 and r5 support.
This patch firstly adds support for mips32r3 mips32r5, mips64r3
and mips64r5.  Secondly it adds support for the eretnc instruction.

ChangeLog:

bfd/
	* aoutx.h (NAME (aout, machine_type)): Add mips32r3, mips64r3,
	mips32r5 and mips64r5.
	* archures.c (bfd_architecture): Likewise.
	* bfd-in2.h (bfd_architecture): Likewise.
	* cpu-mips.c (arch_info_struct): Likewise.
	* elfxx-mips.c (mips_set_isa_flags): Likewise.

gas/
	* tc-mips.c (ISA_SUPPORTS_MIPS16E): Add mips32r3, mips32r5, mips64r3
	and mips64r5.
	(ISA_HAS_64BIT_FPRS): Likewise.
	(ISA_HAS_ROR): Likewise.
	(ISA_HAS_ODD_SINGLE_FPR): Likewise.
	(ISA_HAS_MXHC1): Likewise.
	(hilo_interlocks): Likewise.
	(md_longopts): Likewise.
	(ISA_HAS_64BIT_REGS): Add mips64r3 and mips64r5.
	(ISA_HAS_DROR): Likewise.
	(options): Add OPTION_MIPS32R3, OPTION_MIPS32R5, OPTION_MIPS64R3, and
	OPTION_MIPS64R5.
	(mips_isa_rev): Add support for mips32r3, mips32r5, mips64r3 and
	mips64r5.
	(md_parse_option): Likewise.
	(s_mipsset): Likewise.
	(mips_cpu_info_table): Add entries for mips32r3, mips32r5, mips64r3
	and mips64r5.  Also change p5600 entry to be mips32r5.
	* configure.in: Add support for mips32r3, mips32r5, mips64r3 and
	mips64r5.
	* configure: Regenerate.
	* doc/c-mips.texi: Document the -mips32r3, -mips32r5, -mips64r3 and
	-mips64r5 command line options.
	* doc/as.texinfo: Likewise.

gas/testsuite/
	* gas/mips/mips.exp: Add MIPS32r5 tests.  Also add the mips32r3,
	mips32r5, mips64r3 and mips64r5 isas to the testsuite.
	* gas/mips/r5.s: New test.
	* gas/mips/r5.d: Likewise.

include/opcode/
	* mips.h (INSN_ISA_MASK): Updated.
	(INSN_ISA32R3): New define.
	(INSN_ISA32R5): New define.
	(INSN_ISA64R3): New define.
	(INSN_ISA64R5): New define.
	(INSN_ISA64, INSN_ISA64R2, INSN_ISA3_32, INSN_ISA3_32R2, INSN_ISA4_32
	INSN_ISA4_32R2, INSN_ISA5_32R2): Renumbered.
	(mips_isa_table): Add entries for mips32r3, mips32r5, mips64r3 and
	mips64r5.
	(INSN_UPTO32R3): New define.
	(INSN_UPTO32R5): New define.
	(INSN_UPTO64R3): New define.
	(INSN_UPTO64R5): New define.
	(ISA_MIPS32R3): New define.
	(ISA_MIPS32R5): New define.
	(ISA_MIPS64R3): New define.
	(ISA_MIPS64R5): New define.
	(CPU_MIPS32R3): New define.
	(CPU_MIPS32R5): New define.
	(CPU_MIPS64R3): New define.
	(CPU_MIPS64R5): New define.

opcodes/
	* mips-opc.c (mips_builtin_opcodes): Add MIPS32r5 eretnc instruction.
	(I34): New define.
	(I36): New define.
	(I66): New define.
	(I68): New define.
	* mips-dis.c (mips_arch_choices): Add mips32r3, mips32r5, mips64r3 and
	mips64r5.
	(parse_mips_dis_option): Update MSA and virtualization support to
	allow mips64r3 and mips64r5.
2014-05-07 11:47:29 +01:00
H.J. Lu
285ca99246 Properly handle multiple opcode prefixes
This patch updates multiple opcode prefix processing:

1. Always print prefix together with bad opcode.
2. Since the last seen segment register prefix is active, we only print
the active segment register in the memory operand.
3. The 0xf2 and 0xf3 prefixes take precedence over the 0x66 prefix as the
opcode prefix.  Also the last of the 0xf2 and 0xf3 prefixes wins.
4. Ignore invalid 0xf2/0xf3 prefixes if they aren't mandatory.

gas/testsuite/

	PR binutils/16893
	* gas/i386/katmai.d: Expect "gs" as prefix.

	* gas/i386/long-1.s: Replace movapd with movss.
	* gas/i386/x86-64-long-1.s: Likewise.
	* gas/i386/long-1-intel.d: Updated.
	* gas/i386/long-1.d: Likewise.
	* gas/i386/x86-64-long-1-intel.d: Likewise.
	* gas/i386/x86-64-long-1.d: Likewise.

	* gas/i386/prefix.s: Add tests for multiple 0x66, 0x67, 0xf0,
	0xf2 and 0xf3 prefixes.
	* gas/i386/prefix.d: Updated.

opcodes/

	PR binutils/16893
	* i386-dis.c (twobyte_has_mandatory_prefix): New variable.
	(end_codep): Likewise.
	(mandatory_prefix): Likewise.
	(active_seg_prefix): Likewise.
	(ckprefix): Set active_seg_prefix to the active segment register
	prefix.
	(seg_prefix): Removed.
	(get_valid_dis386): Use the last of PREFIX_REPNZ and PREFIX_REPZ
	for prefix index.  Ignore the index if it is invalid and the
	mandatory prefix isn't required.
	(print_insn): Set mandatory_prefix if the PREFIX_XXX prefix is
	mandatory.  Don't set PREFIX_REPZ/PREFIX_REPNZ/PREFIX_LOCK bits
	in used_prefixes here.  Don't print unused prefixes.  Check
	active_seg_prefix for the active segment register prefix.
	Restore the DFLAG bit in sizeflag if the data size prefix is
	unused.  Check the unused mandatory PREFIX_XXX prefixes
	(append_seg): Only print the segment register which gets used.
	(OP_E_memory): Check active_seg_prefix for the segment register
	prefix.
	(OP_OFF): Likewise.
	(OP_OFF64): Likewise.
	(OP_DSreg): Set active_seg_prefix to PREFIX_DS if it is unset.
2014-05-05 14:25:14 -07:00
H.J. Lu
54cb4522e7 Move fwait test with prefix to prefix.s
* gas/i386/opcode-intel.d: Undo the last change.
	* gas/i386/opcode-suffix.d: Likewise.
	* gas/i386/opcode.d: Likewise.
	* gas/i386/opcode.s: Likewise.

	* gas/i386/prefix.s: Add test for fwait with prefix.
	* gas/i386/prefix.d: Updated.
2014-05-02 08:39:09 -07:00
H.J. Lu
86a80a50f2 Handle prefixes before fwait
0x9b (fwait) is both an instruction and an opcode prefix.  When 0x9b is
treated as an instruction, we need to handle any prefixes before it.
This patch handles it properly.

gas/testsuite/

	PR binutils/16891
	* gas/i386/opcode.s: Add test for fwait with prefix.
	* gas/i386/opcode-intel.d: Updated.
	* gas/i386/opcode-suffix.d: Likewise.
	* gas/i386/opcode.d: Likewise.

opcodes/

	PR binutils/16891
	* i386-dis.c (print_insn): Handle prefixes before fwait.
2014-05-01 09:45:06 -07:00
Nick Clifton
f01c1a090e This fixes a bootstrapping problem with gcc 4.9 in an x86 PE environment.
The problem was that references to weak function symbols were being
incorrectly biased by definition's offset.

	PR gas/16858
	* config/tc-i386.c (md_apply_fix): Do not adjust value of
	pc-relative fixes against weak symbols.
2014-04-28 14:37:01 +01:00
Alan Modra
a9e18c6a3c Regenerate files for openrisk -> or1k change
bfd/
	* po/SRC-POTFILES.in: Regenerate.
	* configure: Regenerate.
gas/
	* po/POTFILES.in: Regenerate.
opcodes/
	* po/POTFILES.in: Regenerate.
2014-04-26 23:03:04 +09:30
Nick Clifton
aaca88efb4 Fix a problem building the ARM assembler for non-ELF based toolchains.
* config/tc-arm.c (s_ltorg): Only create a mapping symbol for ELF
	based targets.
2014-04-24 11:35:51 +01:00
Will Newton
4862acf1cf gas/arm: Fix gas tests to run on armeb-linux-eabi
Fix various places where endianness needed to be taken into account
in the gas testsuite for ARM.

gas/testsuite/ChangeLog:

2014-04-23  Will Newton  <will.newton@linaro.org>

	* gas/arm/backslash-at.d: Fix dump output regexps for
	armeb-linux-eabi configuration.
	* gas/arm/got_prel.d: Likewise.
	* gas/arm/inst-po.d: Likewise.
	* gas/arm/unwind.d: Likewise.
2014-04-23 13:55:20 +01:00
Will Newton
47fc6e36e3 gas/arm: Force output of a data mapping symbol for literal pools
If there is a a trailing align statement in a code section we may
output data padding with a data mapping followed by a code alignment
with a code mapping. The literal pool may then be output with a code
mapping symbol which will cause it to be endian swapped in a big-endian
configuration. When outputting a literal pool make sure that a data
mapping symbol is output in all cases.

gas/ChangeLog:

2014-04-23  Will Newton  <will.newton@linaro.org>

	* config/tc-arm.c (s_ltorg): Call make_mapping_symbol
	directly instead of mapping_state.

gas/testsuite/ChangeLog:

2014-04-23  Will Newton  <will.newton@linaro.org>

	* gas/arm/mapmisc.d: Check literal pool mapping with
	a trailing .align statement.
	* gas/arm/mapmisc.s: Likewise.
2014-04-23 13:54:59 +01:00
Andrew Bennett
7d64c587c1 Add support for the MIPS eXtended Physical Address (XPA) ASE.
ChangeLog:

binutils/
	* doc/binutils.texi: Document the disassemble MIPS XPA instructions
	command line option.

gas/
	* config/tc-mips.c (options): Add OPTION_XPA and OPTION_NO_XPA.
 	(md_longopts): Add xpa and no-xpa command line options.
 	(mips_ases): Add MIPS XPA ASE.
 	(mips_cpu_info_table): Update p5600 entry to allow the XPA ASE.
 	* doc/as.texinfo: Document the MIPS XPA command line options.
 	* doc/c-mips.texi: Document the MIPS XPA command line options,
 	and assembler directives.

gas/testsuite/
 	* gas/mips/mips.exp: Add xpa tests.
 	* gas/mips/xpa.s: New test.
 	* gas/mips/xpa.d: Likewise.

include/
 	* opcode/mips.h (ASE_XPA): New define.

opcodes/
 	* mips-dis.c (mips_arch_choices): Update mips32r2 and mips64r2
 	to allow the MIPS XPA ASE.
 	(parse_mips_dis_option): Process the -Mxpa option.
 	* mips-opc.c (XPA): New define.
 	(mips_builtin_opcodes): Add MIPS XPA instructions and move the
 	locations of the ctc0 and cfc0 instructions.
2014-04-23 13:01:18 +01:00
Sandra Loosemore
1547d98f5a Add missing ChangeLog entries for nios2 gas selftest patch. 2014-04-22 19:41:14 -07:00
Max Filippov
a35d5e823f Fix alignment for the first section frag on xtensa
Linking object files produced by partial linking with link-time
relaxation enabled sometimes fails with the following error message:

dangerous relocation: call8: misaligned call target: (.text.unlikely+0x63)

This happens because no basic block with an XTENSA_PROP_ALIGN flag in the
property table is generated for the first basic block, even if the
.align directive is present.
It was believed that the first frag alignment could be derived from the
section alignment, but this was not implemented for the partial linking
case: after partial linking first frag of a section may become not
first, but no additional alignment frag is inserted before it.
Basic block for such frag may be merged with previous basic block into
extended basic block during relaxation pass losing its alignment
restrictions.

Fix this by always recording alignment for the first section frag.

2014-04-22  Max Filippov  <jcmvbkbc@gmail.com>

gas/
    * config/tc-xtensa.c (xtensa_handle_align): record alignment for the
    first section frag.

gas/testsuite/
    * gas/xtensa/all.exp: Add test for the first section frag alignment.
    * gas/xtensa/first_frag_align.d: First section frag alignment expected
    dump.
    * gas/xtensa/first_frag_align.s: First section frag alignment test
    source.
2014-04-22 22:53:49 +04:00
Sandra Loosemore
fad16e308c Fix Nios II assembler self-test mode.
2014-04-22  Sandra Loosemore  <sandra@codesourcery.com>

	gas/
	* config/tc-nios2.c (nios2_consume_arg): Add case for 'E' to
	unbreak self-test mode.

	gas/testsuite/
	* gas/nios2/selftest.s: New.
	* gas/nios2/selftest.d: New.
2014-04-22 10:56:02 -07:00
Christian Svensson
73589c9dbd Remove support for the (deprecated) openrisc and or32 configurations and replace
with support for the new or1k configuration.
2014-04-22 15:57:47 +01:00
Alan Modra
8e63ef2f25 Fix more fallout from TC_CONS_FIX_NEW change
* config/tc-tilegx.h (TC_CONS_FIX_NEW): Add RELOC arg.
	* config/tc-tilepro.h (TC_CONS_FIX_NEW): Likewise.
2014-04-16 23:00:29 +09:30
Denis Chertykov
e4ef1b6c3f bfd/ChangeLog
* elf32-avr.c: Add DIFF relocations for AVR.
	(avr_final_link_relocate): Handle the DIFF relocs.
	(bfd_elf_avr_diff_reloc): New.
	(elf32_avr_is_diff_reloc): New.
	(elf32_avr_adjust_diff_reloc_value): Reduce difference value.
	(elf32_avr_relax_delete_bytes): Recompute difference after deleting
	bytes.

	* reloc.c: Add BFD_RELOC_AVR_DIFF8/16/32 relocations

gas/ChangeLog

	* config/tc-avr.c: Add new flag mlink-relax.
	(md_show_usage): Add flag and help text.
	(md_parse_option): Record whether link relax is turned on.
	(relaxable_section): New.
	(avr_validate_fix_sub): New.
	(avr_force_relocation): New.
	(md_apply_fix): Generate DIFF reloc.
	(avr_allow_local_subtract): New.

	* config/tc-avr.h (TC_LINKRELAX_FIXUP): Define to 0.
	(TC_FORCE_RELOCATION): Define.
	(TC_FORCE_RELOCATION_SUB_SAME): Define.
	(TC_VALIDATE_FIX_SUB): Define.
	(avr_force_relocation): Declare.
	(avr_validate_fix_sub): Declare.
	(md_allow_local_subtract): Define.
	(avr_allow_local_subtract): Declare.

gas/testsuite/ChangeLog

	* gas/avr/diffreloc_withrelax.d: New testcase.
	* gas/avr/noreloc_withoutrelax.d: Likewise.
	* gas/avr/relax.s: Likewise.

include/ChangeLog

	* elf/avr.h: Add new DIFF relocs.

ld/testsuite/ChangeLog

	* ld-avr/norelax_diff.d: New testcase.
	* ld-avr/relax_diff.d: Likewise.
	* ld-avr/relax.s: Likewise.
2014-04-10 19:50:33 +04:00
Andrew Bennett
bbaa46c0f3 Add support for the MIPS P5600 family of CPUs.
ChangeLog:

2014-04-10  Andrew Bennett  <andrew.bennett@imgtec.com>

	* config/tc-mips.c (mips_cpu_info_table): Add P5600
	configuation.
	* doc/c-mips.texi: Document p5600.
2014-04-10 10:20:50 +01:00
Nick Clifton
00c06fdc57 Fix a few more targets affected by the change to the TC_CONS_FIX_NEW macro.
* config/tc-rl78.h (TC_CONS_FIX_NEW): Add RELOC parameter.
	* config/tc-z80.h (TC_CONS_FIX_NEW): Discard RELOC parameter.
	* config/tc-aarch64.h (TC_CONS_FIX_NEW): Discard RELOC parameter.
	* read.c (emit_expr_fix): Mark the r parameter as potentially
	unused.
2014-04-09 14:05:58 +01:00
Alan Modra
bf7279d535 ppc476 gas warn on data in code sections
* config/tc-ppc.c (warn_476, last_insn, last_seg, last_subseg):
	New static vars.
	(md_longopts, md_parse_option, md_show_usage): Add --ppc476-workaround.
	(ppc_elf_cons_fix_check): New function.
	(md_assemble): Set last_insn, last_seg, last_subseg.
	(ppc_byte, md_apply_fix): Handle warn_476.
	* config/tc-ppc.h (TC_CONS_FIX_CHECK): Define.
	(ppc_elf_cons_fix_check): Declare.
	* read.c (cons_worker): Invoke TC_CONS_FIX_CHECK.
2014-04-09 14:30:38 +09:30
Alan Modra
62ebcb5cbe gas TC_PARSE_CONS_EXPRESSION communication with TC_CONS_FIX_NEW
A number of targets pass extra information from TC_PARSE_CONS_EXPRESSION
to TC_CONS_FIX_NEW via static variables.  That's OK, but not best
practice.  tc-ppc.c goes further in implementing its own replacement
for cons(), because the generic one doesn't allow relocation modifiers
on constants.  This patch fixes both of these warts.

	* gas/config/tc-alpha.h (TC_CONS_FIX_NEW): Add RELOC parameter.
	* gas/config/tc-arc.c (arc_cons_fix_new): Add reloc parameter.
	* gas/config/tc-arc.h (arc_cons_fix_new): Update prototype.
	(TC_CONS_FIX_NEW): Add RELOC parameter.
	* gas/config/tc-arm.c (cons_fix_new_arm): Similarly
	* gas/config/tc-arm.h (cons_fix_new_arm, TC_CONS_FIX_NEW): Similarly.
	* gas/config/tc-cr16.c (cr16_cons_fix_new): Similarly.
	* gas/config/tc-cr16.h (cr16_cons_fix_new, TC_CONS_FIX_NEW): Similarly.
	* gas/config/tc-crx.h (TC_CONS_FIX_NEW): Similarly.
	* gas/config/tc-m32c.c (m32c_cons_fix_new): Similarly.
	* gas/config/tc-m32c.h (m32c_cons_fix_new, TC_CONS_FIX_NEW): Similarly.
	* gas/config/tc-mn10300.c (mn10300_cons_fix_new): Similarly.
	* gas/config/tc-mn10300.h (mn10300_cons_fix_new, TC_CONS_FIX_NEW):
	Similarly.
	* gas/config/tc-ns32k.c (cons_fix_new_ns32k): Similarly.
	* gas/config/tc-ns32k.h (cons_fix_new_ns32k): Similarly.
	* gas/config/tc-pj.c (pj_cons_fix_new_pj): Similarly.
	* gas/config/tc-pj.h (pj_cons_fix_new_pj, TC_CONS_FIX_NEW): Similarly.
	* gas/config/tc-rx.c (rx_cons_fix_new): Similarly.
	* gas/config/tc-rx.h (rx_cons_fix_new, TC_CONS_FIX_NEW): Similarly.
	* gas/config/tc-sh.c (sh_cons_fix_new): Similarly.
	* gas/config/tc-sh.h (sh_cons_fix_new, TC_CONS_FIX_NEW): Similarly.
	* gas/config/tc-tic54x.c (tic54x_cons_fix_new): Similarly.
	* gas/config/tc-tic54x.h (tic54x_cons_fix_new, TC_CONS_FIX_NEW):
	Similarly.
	* gas/config/tc-tic6x.c (tic6x_cons_fix_new): Similarly.
	* gas/config/tc-tic6x.h (tic6x_cons_fix_new, TC_CONS_FIX_NEW):
	Similarly.
	* gas/config/tc-arc.c (arc_parse_cons_expression): Return reloc.
	* gas/config/tc-arc.h (arc_parse_cons_expression): Update proto.
	* gas/config/tc-avr.c (exp_mod_data): Make global.
	(pexp_mod_data): Delete.
	(avr_parse_cons_expression): Return exp_mod_data pointer.
	(avr_cons_fix_new): Add exp_mod_data_t pointer param.
	(exp_mod_data_t): Move typedef..
	* gas/config/tc-avr.h: ..to here.
	(exp_mod_data): Declare.
	(TC_PARSE_CONS_RETURN_TYPE, TC_PARSE_CONS_RETURN_NONE): Define.
	(avr_parse_cons_expression, avr_cons_fix_new): Update prototype.
	(TC_CONS_FIX_NEW): Update.
	* gas/config/tc-hppa.c (hppa_field_selector): Delete static var.
	(cons_fix_new_hppa): Add hppa_field_selector param.
	(fix_new_hppa): Adjust.
	(parse_cons_expression_hppa): Return field selector.
	* gas/config/tc-hppa.h (parse_cons_expression_hppa): Update proto.
	(cons_fix_new_hppa): Likewise.
	(TC_PARSE_CONS_RETURN_TYPE, TC_PARSE_CONS_RETURN_NONE): Define.
	* gas/config/tc-i386.c (got_reloc): Delete static var.
	(x86_cons_fix_new): Add reloc param.
	(x86_cons): Return got reloc.
	* gas/config/tc-i386.h (x86_cons, x86_cons_fix_new): Update proto.
	(TC_CONS_FIX_NEW): Add RELOC param.
	* gas/config/tc-ia64.c (ia64_cons_fix_new): Add reloc param.  Adjust
	calls.
	* gas/config/tc-ia64.h (ia64_cons_fix_new): Update prototype.
	(TC_CONS_FIX_NEW): Add reloc param.
	* gas/config/tc-microblaze.c (parse_cons_expression_microblaze):
	Return reloc.
	(cons_fix_new_microblaze): Add reloc param.
	* gas/config/tc-microblaze.h: Formatting.
	(parse_cons_expression_microblaze): Update proto.
	(cons_fix_new_microblaze): Likewise.
	* gas/config/tc-nios2.c (nios2_tls_ldo_reloc): Delete static var.
	(nios2_cons): Return ldo reloc.
	(nios2_cons_fix_new): Delete.
	* gas/config/tc-nios2.h (nios2_cons): Update prototype.
	(nios2_cons_fix_new, TC_CONS_FIX_NEW): Delete.
	* gas/config/tc-ppc.c (md_pseudo_table): Remove quad, long, word,
	short.  Make llong use cons.
	(ppc_elf_suffix): Return BFD_RELOC_NONE rather than BFD_RELOC_UNUSED.
	(ppc_elf_cons): Delete.
	(ppc_elf_parse_cons): New function.
	(ppc_elf_validate_fix): Don't check for BFD_RELOC_UNUSED.
	(md_assemble): Use BFD_RELOC_NONE rather than BFD_RELOC_UNUSED.
	* gas/config/tc-ppc.h (TC_PARSE_CONS_EXPRESSION): Define
	(ppc_elf_parse_cons): Declare.
	* gas/config/tc-sparc.c (sparc_cons_special_reloc): Delete static var.
	(sparc_cons): Return reloc specifier.
	(cons_fix_new_sparc): Add reloc specifier param.
	(sparc_cfi_emit_pcrel_expr): Use emit_expr_with_reloc.
	* gas/config/tc-sparc.h (TC_PARSE_CONS_RETURN_TYPE): Define.
	(TC_PARSE_CONS_RETURN_NONE): Define.
	(sparc_cons, cons_fix_new_sparc): Update prototype.
	* gas/config/tc-v850.c (hold_cons_reloc): Delete static var.
	(v850_reloc_prefix): Use BFD_RELOC_NONE rather than BFD_RELOC_UNUSED.
	(md_assemble): Likewise.
	(parse_cons_expression_v850): Return reloc.
	(cons_fix_new_v850): Add reloc parameter.
	* gas/config/tc-v850.h (parse_cons_expression_v850): Update proto.
	(cons_fix_new_v850): Likewise.
	* gas/config/tc-vax.c (vax_cons_special_reloc): Delete static var.
	(vax_cons): Return reloc.
	(vax_cons_fix_new): Add reloc parameter.
	* gas/config/tc-vax.h (vax_cons, vax_cons_fix_new): Update proto.
	* gas/config/tc-xstormy16.c (xstormy16_cons_fix_new): Add reloc param.
	* gas/config/tc-xstormy16.h (xstormy16_cons_fix_new): Update proto.
	* gas/dwarf2dbg.c (TC_PARSE_CONS_RETURN_NONE): Provide default.
	(emit_fixed_inc_line_addr): Adjust exmit_expr_fix calls.
	* gas/read.c (TC_PARSE_CONS_EXPRESSION): Return value.
	(do_parse_cons_expression): Adjust.
	(cons_worker): Pass return value from TC_PARSE_CONS_EXPRESSION
	to emit_expr_with_reloc.
	(emit_expr_with_reloc): New function handling reloc, mostly
	extracted from..
	(emit_expr): ..here.
	(emit_expr_fix): Add reloc param.  Adjust TC_CONS_FIX_NEW invocation.
	Handle reloc.
	(parse_mri_cons): Convert to ISO.
	* gas/read.h (TC_PARSE_CONS_RETURN_TYPE): Define.
	(TC_PARSE_CONS_RETURN_NONE): Define.
	(emit_expr_with_reloc): Declare.
	(emit_expr_fix): Update prototype.
	* gas/write.c (write_object_file): Update TC_CONS_FIX_NEW invocation.
2014-04-09 14:29:05 +09:30
Ilya Tocar
2cf200a4c8 Add support for Intel SGX instructions
Add Intel SGX instructions support to assembler and disassembler.

gas/

	* config/tc-i386.c (cpu_arch): Add .se1.
	* doc/c-i386.texi: Document .se1/se1.

gas/testsuite/

	* gas/i386/i386.exp: Run SE1 tests.
	* gas/i386/se1.d: New file.
	* gas/i386/se1.s: Ditto.
	* gas/i386/x86-64-se1.d: Ditto.
	* gas/i386/x86-64-se1.s: Ditto.

opcodes/

	* i386-dis.c (rm_table): Add encls, enclu.
	* i386-gen.c (cpu_flag_init): Add CPU_SE1_FLAGS,
	(cpu_flags): Add CpuSE1.
	* i386-opc.h (enum): Add CpuSE1.
	(i386_cpu_flags): Add cpuse1.
	* i386-opc.tbl: Add encls, enclu.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
2014-04-04 08:24:47 -07:00
DJ Delorie
0a899fd5ac Add checks for overfar branches
Check 8 and 16 bit PCREL fixes for overflow, since we bypass the
later overflow checks in write.c.  Direct relocs are left alone,
as gcc has been known to take advantage of the silent overflows
when comparing addresses to constant ranges.
2014-04-02 16:50:29 -04:00
Nick Clifton
cad0da33dc This fixes an internal error in GAS, triggered by the test case reported in PR 16765.
The problem was that gcc was generating assembler with missing unwind directives in it,
so that a gas_assert was being triggered.  The patch replaces the assert with an error
message.

	* config/tc-arm.c (create_unwind_entry): Report an error if an
	attempt to recreate an unwind directive is encountered.
2014-04-02 16:29:35 +01:00
Denis Chertykov
af910977fb * config/tc-avr.c: Add specified_mcu variable for selected mcu.
(enum options): add OPTION_RMW_ISA for -mrmw option.
	(struct option md_longopts): Add mrmw option.
	(md_show_usage): add -mrmw option description.
	(md_parse_option): Update isa details if -mrmw option specified.
	* doc/c-avr.texi: Add doc for new option -mrmw.
	* gas/avr/avr.exp: Run new tests.
	* gas/avr/rmw.d: Add test for additional ISA support.
	* gas/avr/rmw.s: Ditto.
2014-03-29 09:53:16 +04:00
Denis Chertykov
ed0251d24b * gas/ChangeLog: Revert
* gas/config/tc-avr.c: Revert
	* gas/doc/c-avr.texi: Revert
	* gas/testsuite/ChangeLog: Revert
	* gas/testsuite/gas/avr/avr.exp: Revert
	* gas/testsuite/gas/avr/rmw.d: Revert
	* gas/testsuite/gas/avr/rmw.s: Revert

	This reverts commit d24e46e3e2.
2014-03-29 09:46:33 +04:00
Denis Chertykov
d24e46e3e2 * config/tc-avr.c: Add specified_mcu variable for selected mcu.
(enum options): add OPTION_RMW_ISA for -mrmw option.
	(struct option md_longopts): Add mrmw option.
	(md_show_usage): add -mrmw option description.
	(md_parse_option): Update isa details if -mrmw option specified.
	* doc/c-avr.texi: Add doc for new option -mrmw.
	* gas/avr/avr.exp: Run new tests.
	* gas/avr/rmw.d: Add test for additional ISA support.
	* gas/avr/rmw.s: Ditto.
2014-03-29 09:41:32 +04:00
Nick Clifton
cb580a265c This fixes a compile time error triggered by -Werror=format-security because
a call to sprintf was being made with a non-constant formatting string.

	* config/tc-score.c (s3_parse_pce_inst): Add "%s" parameter to
	sprintf in order to avoid a compile time warning.
2014-03-27 09:41:06 +00:00
Nick Clifton
b3fe4307a6 Add support for %hi8, %hi16 and %lo16 being used when relocation are necessary.
* config/tc-rl78.c (rl78_op): Issue an error message if a 16-bit
	relocation is used on an 8-bit operand or vice versa.
	(tc_gen_reloc): Use the RL78_16U relocation for RL78_CODE.
	(md_apply_fix): Add support for RL78_HI8, RL78_HI16 and RL78_LO16.
2014-03-26 16:34:04 +00:00
Nick Clifton
3c6256d29e This patch adds a new pseudo-op - .seh_code - to structured exception handling
suite of ops.  It changes the current section back to the code section of the
current function.  This is helpful because the code section may not be .text.

	* config/obj-coff-seh.c (obj_coff_seh_code): New function -
	switches the current segment back to the code segment recorded
	when seh_proc was last invoked.
	* config/obj-coff-seh.h (SEH_CMDS): Add seh_code.
2014-03-25 16:50:10 +00:00
Alan Modra
3e60bf4df8 Revert "Remove magic treatment of toc symbols for powerpc ELF"
It turns out that glibc's sysdeps/powerpc/powerpc64/start.S uses this
feature.  :-(

	* config/tc-ppc.c (ppc_is_toc_sym): Revert 2014-03-05.
	(md_assemble): Likewise.  Warn.
2014-03-25 12:01:09 +10:30
David Weatherford
a82c7d9030 Add support to the Xtensa target for creating trampolines for out-of-range branches.
* tc-xtensa.c (xtensa_check_frag_count, xtensa_create_trampoline_frag)
    (xtensa_maybe_create_trampoline_frag, init_trampoline_frag)
    (find_trampoline_seg, search_trampolines, get_best_trampoline)
    (check_and_update_trampolines, add_jump_to_trampoline)
    (dump_trampolines): New function.
    (md_parse_option): Add cases for --[no-]trampolines options.
    (md_assemble, finish_vinsn, xtensa_end): Add call to
    xtensa_check_frag_count.
    (xg_assemble_vliw_tokens): Add call to
    xtensa_maybe_create_trampoline_frag.
    (xtensa_relax_frag): Relax fragments with RELAX_TRAMPOLINE state.
    (relax_frag_immed): Relax jump instructions that cannot reach its
    target.
    * tc-xtensa.h (xtensa_relax_statesE::RELAX_TRAMPOLINE): New relax
    state.

    * as.texinfo: Document --[no-]trampolines command-line options.
    * c-xtensa.texi: Document trampolines relaxation and command line
    options.

    * frags.c (get_frag_count, clear_frag_count): New function.
    (frag_alloc): Increment totalfrags counter.
    * frags.h (get_frag_count, clear_frag_count): New function.

    * all.exp: Add test for trampoline relaxation.
    * trampoline.d: Trampoline relaxation expected dump.
    * trampoline.s: Trampoline relaxation test source.
2014-03-21 11:53:42 +00:00
DJ Delorie
0c315784bf Add opcode relaxation for rl78-elf
This patch adds initial in-gas opcode relaxation for the rl78
backend.  Specifically, it checks for conditional branches that
are too far and replaces them with inverted branches around longer
fixed branches.
2014-03-20 17:56:01 -04:00
Richard Sandiford
d56a8dda6d gas/
* config/tc-mips.h (DIFF_EXPR_OK, CFI_DIFF_EXPR_OK): Define.
	* config/tc-mips.c (md_pcrel_from): Remove error message.
	(md_apply_fix): Convert PC-relative BFD_RELOC_32s to
	BFD_RELOC_32_PCREL.  Report a specific error message for unhandled
	PC-relative expressions.  Handle BFD_RELOC_8.

gas/testsuite/
	* gas/all/gas.exp: Remove XFAIL of forward.d for MIPS.
	* gas/mips/pcrel-1.s, gas/mips/pcrel-1.d, gas/mips/pcrel-2.s,
	gas/mips/pcrel-2.d, gas/mips/pcrel-3.s, gas/mips/pcrel-3.l,
	gas/mips/pcrel-4.s, gas/mips/pcrel-4-32.d, gas/mips/pcrel-4-n32.d,
	gas/mips/pcrel-4-64.d: New tests.
	* gas/mips/mips.exp: Run them.
	* gas/mips/lui-2.l: Tweak error message for line 7.

ld/testsuite/
	* ld-elf/merge.d: Remove MIPS XFAIL.
2014-03-20 21:18:43 +00:00
Ilya Tocar
5fc35d961b Fix memory size for gather/scatter instructions
For gathers with indices larger than elements (e. g.)

vpgatherqd      ymm6{k1}, ZMMWORD PTR [ebp+zmm7*8-123]

We currently treat memory size as a size of index register, while it is
actually should be size of destination register:

vpgatherqd      ymm6{k1}, YMMWORD PTR [ebp+zmm7*8-123]

This patch fixes it.

opcodes/

        * i386-opc.tbl: Change memory size for vgatherpf0qps, vgatherpf1qps,
        vscatterpf0qps, vscatterpf1qps, vgatherqps, vpgatherqd, vpscatterqd,
        vscatterqps.
        * i386-tbl.h: Regenerate.

gas/testsuite/

        * gas/i386/avx512pf-intel.d: Change memory size for vgatherpf0qps,
        vgatherpf1qps, vscatterpf0qps, vscatterpf1qps.
        * gas/i386/avx512pf.s: Ditto.
        * gas/i386/x86-64-avx512pf-intel.d: Ditto.
        * gas/i386/x86-64-avx512pf.s: Ditto.
        * gas/i386/avx512f-intel.d: Change memory size for vgatherqps,
        vpgatherqd, vpscatterqd, vscatterqps.
        * gas/i386/avx512f.s: Ditto.
        * gas/i386/x86-64-avx512f-intel.d: Ditto.
        * gas/i386/x86-64-avx512f.s: Ditto.
2014-03-20 08:13:30 -07:00
Jose E. Marchesi
ec92c392f7 This patch adds support for the hyperprivileged registers %hstick_offset
and %hstick_enable to the Sparc assembler.

	* config/tc-sparc.c (hpriv_reg_table): Added entries for
	%hstick_offset and %hstick_enable.
	* doc/c-sparc.texi (Sparc-Regs): Document the %hstick_offset and
	%hstick_enable hyperprivileged registers.

	* sparc-dis.c (v9_hpriv_reg_names): Names for %hstick_offset and
	%hstick_enable added.

	* gas/sparc/rdhpr.s: Test rd %hstick_offset and %hstick_enable.
	* gas/sparc/rdhpr.d: Likewise.

	* gas/sparc/wrhpr.s: Test wr %hstick_offset and %hstick_enable.
	* gas/sparc/wrhpr.d: Likewise.
2014-03-19 16:43:41 +00:00
Jose E. Marchesi
999bf65c4b Fix Sparc test which was failing in the presence of new v9 opcodes.
* gas/sparc/ldd_std.d: Fix objdump invocation in order to get
	the old opcodes for the ldtw, ldtwa, stw and stwa instructions.
2014-03-19 16:22:31 +00:00
Nick Clifton
288c6b306e Remove spurious character. 2014-03-19 14:43:00 +00:00
Daniel Gutson
2e6976a881 Add support for ARM assembler produced by CodeCompositor Studio.
* config/tc-arm.c (codecomposer_syntax): New flag that states whether the
	CCS syntax compatibility mode is on or off.
	(asmfunc_states): New enum to represent the asmfunc directive state.
	(asmfunc_state): New variable holding the asmfunc directive state.
	(comment_chars): Rename to arm_comment_chars.
	(line_separator_chars): Rename to arm_line_separator_chars.
	(s_ccs_ref): New function that handles the .ref directive.
	(asmfunc_debug): New function.
	(s_ccs_asmfunc): New function that handles the .asmfunc directive.
	(s_ccs_endasmfunc): New function that handles the .endasmfunc directive.
	(s_ccs_def): New function that handles the .def directive.
	(tc_start_label_without_colon): New function.
	(md_pseudo_table): Added new CCS directives.
	(arm_ccs_mode): New function that handles the -mccs command line option.
	(arm_long_opts): Added new -mccs command line option.
	* config/tc-arm.h (LABELS_WITHOUT_COLONS): New macro.
	(TC_START_LABEL_WITHOUT_COLON): New macro.
	(tc_start_label_without_colon): Added extern function declaration.
	(tc_comment_chars): Define.
	(tc_line_separator_chars): Define.
	* app.c (do_scrub_begin): Use tc_line_separator_chars, if defined.
	* read.c (read_begin): Likewise.
	* doc/as.texinfo: Add documentation for the -mccs command line
	option.
	* doc/c-arm.texi: Likewise.
	* doc/internals.texi: Document tc_line_separator_chars.
	* NEWS: Mention the new feature.

	* gas/arm/ccs.s: New test case.
	* gas/arm/ccs.d: New expected disassembly.
2014-03-19 14:31:25 +00:00
Nick Clifton
b8985e5c0e Fix RX gas testsuite failures by accounting for new variations in the disassembler's output.
* rx-decode.opc (bwl): Allow for bogus instructions with a size
	field of 3.
	(sbwl, ubwl, SCALE): Likewise.
	* rx-decode.c: Regenerate.

	* gas/rx/mov.d: Update expected disassembly.
2014-03-19 09:38:25 +00:00
Yufeng Zhang
a52e6fd34a Enable verbose error messages by default for AArch64 gas.
gas/

	* config/tc-aarch64.c (aarch64_opts): Add new option
	"mno-verbose-error".
	(verbose_error_p): Initialize to 1.
	* doc/c-aarch64.texi (AArch64 Options): Document -mverbose-error
	and -mno-verbose-error.

gas/testsuite/

	* gas/aarch64/illegal.d: Pass -mno-verbose-error.
	* gas/aarch64/verbose-error.s: Add more verbose message testcases.
	* gas/aarch64/verbose-error.l: Ditto.
2014-03-18 17:41:43 +00:00
Nick Clifton
1f5afe1cc0 Add support for parsing VFP register names in .cfi_offset directives.
PR gas/16694
	* config/tc-arm.c (tc_arm_regname_to_dw2regnum): Parse VFP
	registers as well.

	* gas/cfi/cfi-arm-1.s: Add checks of VFP registers.
	* gas/cfi/cfi-arm-1.d: Update expected output.
2014-03-17 16:30:30 +00:00
Richard Earnshaw
df359aa7ab AArch64: Clean up docs and document -mcpu and -march.
2014-03-13  Richard Earnshaw  <rearnsha@arm.com>
	    Jiong Wang  <Jiong.Wang@arm.com>

	* doc/c-aarch64.texi: Clean up some formatting issues.
	(AArch64 Options): Document -mcpu and -march.
	(AArch64 Extensions): New node.
2014-03-13 17:10:04 +00:00
Nick Clifton
c307e84195 Make the new aarch64 bignum test endian agnostic.
* gas/aarch64/litpool.s: Make the test endian agnostic.
	* gas/aarch64/litpool.d: Update expected disassembly.
2014-03-13 12:47:05 +00:00
Tristan Gingold
167ad85bf0 Add pe/x86_64 bigobj file format.
bfd/
	* peicode.h (pe_ILF_object_p): Adjust, as the version number
	has been read.
	(pe_bfd_object_p): Also read version number to detect ILF.
	* pe-x86_64.c (COFF_WITH_PE_BIGOBJ): Define.
	(x86_64pe_bigobj_vec): Define
	* coffcode.h (bfd_coff_backend_data): Add _bfd_coff_max_nscns field.
	(bfd_coff_max_nscns): New macro.
	(coff_compute_section_file_positions): Use unsigned int for
	target_index.  Compare with bfd_coff_max_nscns.
	(bfd_coff_std_swap_table, ticoff0_swap_table, ticoff1_swap_table):
	Set a value for _bfd_coff_max_nscns.
	(header_bigobj_classid): New constant.
	(coff_bigobj_swap_filehdr_in, coff_bigobj_swap_filehdr_out)
	(coff_bigobj_swap_sym_in, coff_bigobj_swap_sym_out)
	(coff_bigobj_swap_aux_in, coff_bigobj_swap_aux_out): New
	functions.
	(bigobj_swap_table): New table.
	* libcoff.h: Regenerate.
	* coff-sh.c (bfd_coff_small_swap_table): Likewise.
	* coff-alpha.c (alpha_ecoff_backend_data): Add value for
	_bfd_coff_max_nscns.
	* coff-mips.c (mips_ecoff_backend_data): Likewise.
	* coff-rs6000.c (bfd_xcoff_backend_data)
	(bfd_pmac_xcoff_backend_data): Likewise.
	* coff64-rs6000.c (bfd_xcoff_backend_data)
	(bfd_xcoff_aix5_backend_data): Likewise.
	* targets.c (x86_64pe_bigobj_vec): Declare.
	* configure.in (x86_64pe_bigobj_vec): New vector.
	* configure: Regenerate.
	* config.bfd: Add bigobj object format for Windows targets.

gas/
	* config/tc-i386.c (use_big_obj): Declare.
	(OPTION_MBIG_OBJ): Define.
	(md_longopts): Add -mbig-obj option.
	(md_parse_option): Handle it.
	(md_show_usage): Display help for this option.
	(i386_target_format): Use bigobj for x86-64 if -mbig-obj.
	* doc/c-i386.texi: Document the option.

gas/testsuite/
	* gas/pe/big-obj.d, gas/pe/big-obj.s: Add test.
	* gas/pe/pe.exp: Add test.

include/coff/
	* pe.h (struct external_ANON_OBJECT_HEADER_BIGOBJ): Declare.
	(FILHSZ_BIGOBJ): Define.
	(struct external_SYMBOL_EX): Declare.
	(SYMENT_BIGOBJ, SYMESZ_BIGOBJ): Define.
	(union external_AUX_SYMBOL_EX): Declare.
	(AUXENT_BIGOBJ, AUXESZ_BIGOBJ): Define.
	* internal.h (struct internal_filehdr): Change type
	of f_nscns.
2014-03-13 09:33:07 +01:00
Nick Clifton
55d9b4c146 The value of a bignum expression is held in a single global array. This means
that if multiple bignum values are encountered only the most recent is valid.
If such expressions are cached, eg to be emitted into a literal pool later on
in the assembly, then only one expression - the last - will be correct.  This
patch fixes the problem for the AArch64 target by caching each bignum value
locally.

	PR gas/16688
	* config/tc-aarch64.c (literal_expression): New structure.
	(literal_pool): Replace exp array with literal_expression array.
	(add_to_lit_pool): When adding a bignum cache the big value.
	(s_ltorg): When emitting a bignum initialise the global bignum
	array from the cached value.

	* gas/aarch64/litpool.s: New test case.
	* gas/aarch64/litpool.d: Expected disassembly.
2014-03-12 15:50:49 +00:00
Alan Modra
fa47fa9246 autoreconf
Regenerate Makefile.in in bfd, binutils, gas, gold, gprof, ld, opcodes.
Regenerate gas/config.in.
2014-03-12 15:02:00 +10:30
Denis Chertykov
255d9eec05 * gas/tc-avr.c: Add new devices
avr25: ata5272, attiny828
	avr35: ata5505, attiny1634
	avr4: atmega8a, ata6285, ata6286, atmega48pa
	avr5: at90pwm161, ata5790, ata5795, atmega164pa, atmega165pa,
	atmega168pa, atmega32a, atmega64rfr2, atmega644rfr2, atmega64a,
	atmega16hva2
	avr51: atmega128a, atmega1284
	avrxmega2: atxmega16a4u, atxmega16c4, atxmega32a4u, atxmega32c4,
	atxmega32e5, atxmega16e5, atxmega8e5
	avrxmega4: atxmega64a3u, atxmega64a4u, atxmega64b1, atxmega64b3,
	atxmega64c3, atxmega64d4
	avrxmega6: atxmega128a3u, atxmega128b3, atxmega128c3,
	atxmega128d4, atxmega192a3u, atxmega192c3, atxmega256a3u,
	atxmega256c3, atxmega384c3, atxmega384d3
	avrxmega7: atxmega128a4u
	* doc/c-avr.texi: Ditto.
2014-03-06 18:59:05 +04:00
Alan Modra
4b95cf5c0c Update copyright years 2014-03-05 22:16:15 +10:30
Alan Modra
45965137be Support R_PPC64_ADDR64_LOCAL
This adds support for "func@localentry", an expression that returns the
ELFv2 local entry point address of function "func".  I've excluded
dynamic relocation support because that obviously would require glibc
changes.

include/elf/
	* ppc64.h (R_PPC64_REL24_NOTOC, R_PPC64_ADDR64_LOCAL): Define.
bfd/
	* elf64-ppc.c (ppc64_elf_howto_raw): Add R_PPC64_ADDR64_LOCAL entry.
	(ppc64_elf_reloc_type_lookup): Support R_PPC64_ADDR64_LOCAL.
	(ppc64_elf_check_relocs): Likewise.
	(ppc64_elf_relocate_section): Likewise.
	* Add BFD_RELOC_PPC64_ADDR64_LOCAL.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
gas/
	* config/tc-ppc.c (ppc_elf_suffix): Support @localentry.
	(md_apply_fix): Support R_PPC64_ADDR64_LOCAL.
ld/testsuite/
	* ld-powerpc/elfv2-2a.s, ld-powerpc/elfv2-2b.s: New files.
	* ld-powerpc/elfv2-2exe.d, ld-powerpc/elfv2-2so.d: New files.
	* ld-powerpc/powerpc.exp: Run new test.
elfcpp/
	* powerpc.h (R_PPC64_REL24_NOTOC, R_PPC64_ADDR64_LOCAL): Define.
gold/
	* powerpc.cc (Target_powerpc::Scan::local, global): Support
	R_PPC64_ADDR64_LOCAL.
	(Target_powerpc::Relocate::relocate): Likewise.
2014-03-05 19:57:39 +10:30
Alan Modra
a0593ad956 Support more relocs on 16-bit insn fields
This patch allows gas to assemble a testcase like
	li 3,ext_sym
which oddly was not accepted while the following is OK:
	li 3,ext_sym@l

	* config/tc-ppc.c (md_assemble): Move code adjusting reloc types
	later.  Merge absolute and relative branch reloc selection.
	Generate 16-bit relocs for most 16-bit insn fields given a
	non-constant expression.
2014-03-05 19:31:45 +10:30
Alan Modra
f50c47f118 Remove magic treatment of toc symbols for powerpc ELF
The XCOFF assembler does some wierd things with instructions like
`lwz 9,sym(30'.  See the comment in md_apply_fix.  From an ELF
perspective, it's weird even to magically select a TOC16 reloc
when a symbol is in the TOC/GOT.  ELF assemblers generally use
modifiers like @toc to select relocs, so remove this "feature"
for ELF.  I believe this was to support gcc -m32 -mcall-aixdesc
but that combination of gcc options has been broken for a long
time.

	* config/tc-ppc.c (ppc_is_toc_sym): Remove OBJ_ELF support.
	(md_assemble): Don't call ppc_is_toc_sym for ELF.
2014-03-05 19:27:57 +10:30
Richard Sandiford
cd0c81e90f Fix changelog formatting in last commit -- sorry 2014-03-04 21:30:39 +00:00
Richard Sandiford
4ba154f579 bfd/
2014-02-04  Heiher <r@hev.cc>

	* elfxx-mips.c (mips_set_isa_flags): Use E_MIPS_ARCH_64R2 for
	Loongson-3A.
	(mips_mach_extensions): Make bfd_mach_mips_loongson_3a an
	extension of bfd_mach_mipsisa64r2.

opcodes/
2014-02-04  Heiher <r@hev.cc>

	* mips-dis.c (mips_arch_choices): Usee ISA_MIPS64R2 for Loongson-3A.

gas/
2014-02-04  Heiher <r@hev.cc>

	* config/tc-mips.c (mips_cpu_info_table): Use ISA_MIPS64R2 for
	Loongson-3A.
2014-03-04 21:18:02 +00:00
Nick Clifton
65d7bab591 This patch enhances the MSP430 port of GAS so that, if requested, it will
generate warning messages about an instruction that changes the interrupt
state not being followed by a NOP instruction.

	* config/msp430/msp430.c: Replace known mcu array with known
	msp430 ISA mcu name array.
	Accept any name for -mmcu option.
	Add -mz option to warn about missing NOP following an interrupt
	status change.
	(check_for_nop): New.
	(msp430_operands): Emit a warning, if requested, when an interrupt
	changing instruction is not followed by a NOP.
	* doc/c-msp430.c: Document -mz option.

	* gas/msp430/bad.d: Add -mz option.
	* gas/msp430/bad.s: Add more cases where warnings should be
	generated.
	* gas/msp430/bad.l: Add expected warning messages.
2014-03-03 17:27:55 +00:00
Alan Modra
c1a3e85c37 More copyright fixes
* config/obj-fdpicelf.c: Correct copyright date.
	* config/obj-fdpicelf.h: Likewise.
2014-03-03 14:06:56 +10:30
Alan Modra
2c80b75360 Fix various copyright issues
binutils/
	* README: Add "Copyright Notices" paragraph.
gas/
	* config/bfin-lex-wrapper.c: Correct copyright date.
	* config/tc-frv.c: Correct copyright punctuation.
	* config/tc-ip2k.c: Likewise.
	* config/tc-iq2000.c: Likewise.
	* config/tc-mep.c: Likewise.
	* config/tc-tic4x.c: Likewise.
	* config/tc-tic4x.h: Likewise.
ld/testsuite/
	* ld-scripts/phdrs2.exp: Correct copyright punctuation.
	* ld-v850/v850.exp: Correct copyright typo.
opcodes/
	* i386-gen.c (process_copyright): Emit copyright notice on one line.
gold/
	* dwp.cc (print_version): Update copyright year to current.
2014-03-03 11:03:08 +10:30
Denis Chertykov
83046454b5 * config/tc-avr.c: Remove atxmega16x1. 2014-03-01 13:12:49 +04:00
Alan Modra
02fe846e43 Incorrect .debug_line prologue header length for 64-bit DWARF
Don't be clever, calculate the length directly as the difference of
two symbols.

	* dwarf2dbg.c (out_debug_line): Correct .debug_line header_length
	field for 64-bit dwarf.
2014-02-28 15:09:32 +10:30
Yufeng Zhang
f17c8bfcc8 opcodes/
* aarch64-tbl.h (aarch64_opcode_table): Replace IMM0 with
	FPIMM0 for fcmeq, fcmgt, fcmge, fcmlt and fcmle.

gas/testsuite/

	* gas/aarch64/fp-const0-parsing.s: New test.
	* gas/aarch64/fp-const0-parsing.d: Likewise.
2014-02-27 15:06:56 +00:00
Yufeng Zhang
a58549dda5 opcodes/
* aarch64-opc.c (print_register_offset_address): Call
	get_int_reg_name to prepare the register name.

gas/testsuite/

	* gas/aarch64/ldst-reg-reg-offset.s: Add tests.
	* gas/aarch64/ldst-reg-reg-offset.d: Update.
2014-02-27 14:55:46 +00:00
Ilya Tocar
dcf893b581 Add support for CPUID PREFETCHWT1
Latest AVX512 spec
http://download-software.intel.com/sites/default/files/managed/50/1a/319433-018.pdf
Has CPUID PREFETCHWT1 for prefetchwt1 instruction, which we list as AVX512PF.
This patch introduces CPUID PREFETCHWT1.

gas/

        * config/tc-i386.c (cpu_arch): Add .prefetchwt1.
        * doc/c-i386.texi: Document .prefetchwt1/prefetchwt1.

opcodes/

        * i386-gen.c (cpu_flag_init): Add CPU_PREFETCHWT1_FLAGS/
        (cpu_flags): Add CpuPREFETCHWT1.
        * i386-init.h: Regenerate.
        * i386-opc.h (CpuPREFETCHWT1): New.
        (i386_cpu_flags): Add cpuprefetchwt1.
        * i386-opc.tbl: Cahnge CPU of prefetchwt1 from CpuAVX512PF to CpuPREFETCHWT1.
        * i386-tbl.h: Regenerate.

gas/testsuite

        * gas/i386/avx512pf-intel.d: Remove prefetchwt1.
        * gas/i386/avx512pf.s: Ditto.
        * gas/i386/avx512pf.d: Ditto.
        * gas/i386/x86-64-avx512pf-intel.d: Ditto.
        * gas/i386/x86-64-avx512pf.s: Ditto.
        * gas/i386/x86-64-avx512pf.d: Ditto.
        * gas/i386/prefetchwt1-intel.d: New file.
        * gas/i386/prefetchwt1.s: Ditto.
        * gas/i386/prefetchwt1.d: Ditto.
        * gas/i386/x86-64-prefetchwt1-intel.d: Ditto.
        * gas/i386/x86-64-prefetchwt1.s: Ditto.
        * gas/i386/x86-64-prefetchwt1.d: Ditto.
2014-02-21 08:04:00 -08:00
Ilya Tocar
957d095533 Change cpu for vptestnmd and vptestnmq instructions.
In latest release of AVX512 spec
http://download-software.intel.com/sites/default/files/managed/50/1a/319433-018.pdf
Vptestnmq and vptestnmq instructions have CPUID AVX512F, not AVX512CD.
This patch fixes it.

opcodes/

        * i386-opc.tbl: Change CPU of vptestnmq, vptestnmd from CpuAVX512CD,
        to CpuAVX512F.
        * i386-tbl.h: Regenerate.

gas/testsuite/

        * gas/i386/avx512cd-intel.d: Remove vptestnmq, vptestnmd.
        * gas/i386/avx512cd.s: Ditto.
        * gas/i386/avx512cd.d: Ditto.
        * gas/i386/x86-64-avx512cd-intel.d: Ditto.
        * gas/i386/x86-64-avx512cd.s: Ditto.
        * gas/i386/x86-64-avx512cd.d: Ditto.
        * gas/i386/avx512f-intel.d: Add vptestnmq, vptestnmd.
        * gas/i386/avx512f.s: Ditto.
        * gas/i386/avx512f.d: Ditto.
        * gas/i386/x86-64-avx512f-intel.d: Ditto.
        * gas/i386/x86-64-avx512f.s: Ditto.
        * gas/i386/x86-64-avx512f.d: Ditto.
2014-02-20 07:53:55 -08:00
Ilya Tocar
963f35869d Add clflushopt, xsaves, xsavec, xrstors
gas/

2014-02-12  Ilya Tocar  <ilya.tocar@intel.com>

	* config/tc-i386.c (cpu_arch): Add .clflushopt, .xsavec, .xsaves.
	* doc/c-i386.texi: Document .xsavec/xsavec/.xsaves/xsaves/
	clflushopt/.clfushopt.

gas/testsuite/

2014-02-12  Ilya Tocar  <ilya.tocar@intel.com>

	* gas/i386/clflushopt-intel.d: New.
	* gas/i386/clflushopt.d: Ditto.
	* gas/i386/clflushopt.s: Ditto.
	* gas/i386/i386.exp: Run new tests.
	* gas/i386/x86-64-clflushopt-intel.d: New.
	* gas/i386/x86-64-clflushopt.d: Ditto.
	* gas/i386/x86-64-clflushopt.s: Ditto.
	* gas/i386/x86-64-xsavec-intel.d: Ditto.
	* gas/i386/x86-64-xsavec.d: Ditto.
	* gas/i386/x86-64-xsavec.s: Ditto.
	* gas/i386/x86-64-xsaves-intel.d: Ditto.
	* gas/i386/x86-64-xsaves.d: Ditto.
	* gas/i386/x86-64-xsaves.s: Ditto.
	* gas/i386/xsavec-intel.d: Ditto.
	* gas/i386/xsavec.d: Ditto.
	* gas/i386/xsavec.s: Ditto.
	* gas/i386/xsaves-intel.d: Ditto.
	* gas/i386/xsaves.d: Ditto.
	* gas/i386/xsaves.s: Ditto.

opcodes/

2014-02-12  Ilya Tocar  <ilya.tocar@intel.com>

	* i386-dis.c (MOD enum): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4,
	MOD_0FC7_REG_5.
	(PREFIX enum): Add PREFIX_0FAE_REG_7.
	(reg_table): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4 MOD_0FC7_REG_5.
	(prefix_table): Add clflusopt.
	(mod_table): Add xrstors, xsavec, xsaves.
	* i386-gen.c (cpu_flag_init): Add CPU_CLFLUSHOPT_FLAGS,
	CPU_XSAVES_FLAGS, CPU_XSAVEC_FLAGS.
	(cpu_flags): Add CpuClflushOpt, CpuXSAVES, CpuXSAVEC.
	* i386-init.h: Regenerate.
	* i386-opc.tbl: Add clflushopt, xrstors, xrstors64, xsaves,
	xsaves64, xsavec, xsavec64.
	* i386-tbl.h: Regenerate.
2014-02-12 07:50:24 -08:00
Alan Modra
c1c69e839e binutils potfiles regen
Adds nds32 files to POTFILES.in
2014-02-10 09:59:35 +10:30
Sandra Loosemore
1c2de46353 Nios II large-GOT relocations
2014-02-03  Sandra Loosemore  <sandra@codesourcery.com>

	include/elf/
	* nios2.h (R_NIOS2_GOT_LO, R_NIOS2_GOT_HA): New.
	(R_NIOS2_CALL_LO, R_NIOS2_CALL_HA): New.
	(R_NIOS2_ILLEGAL): Adjust.

	gas/
	* config/tc-nios2.c (md_apply_fix): Test for new relocs.
	(nios2_special_reloc): Add %call_lo, %call_hiadj, %got_lo,
	%got_hiadj relocation operators.  Sort table and add comment
	to explain ordering.
	(nios2_fix_adjustable): Test for new relocs.
	* doc/c-nios2.texi (Nios II Relocations): Document new relocation
	operators.

	bfd/
	* reloc.c (BFD_RELOC_NIOS2_GOT_LO, BFD_RELOC_NIOS2_GOT_HA): New.
	(BFD_RELOC_NIOS2_CALL_LO, BFD_RELOC_NIOS2_CALL_HA): New.
	* libbfd.h: Regenerated.
	* bfd-in2.h: Regenerated.
	* elf32-nios2.c (elf_nios2_howto_table_rel): Add new relocations.
	(nios2_reloc_map): Likewise.
	(GOT_USED, CALL_USED): Renamed from GOT16_USED and CALL16_USED.
	Fixed all references.
	(nios2_elf32_relocate_section): Add new relocations.
	(nios2_elf32_check_relocs): Likewise.
	(nios2_elf32_gc_sweep_hook): Likewise.
2014-02-03 08:42:42 -08:00
Michael Zolotukhin
83861ea6d6 Add gather/scatter tests with incorrect memory operand
2014-01-31  Michael Zolotukhin  <michael.v.zolotukhin@gmail.com>

	PR gas/16488
	* gas/i386/inval-avx512f.s: Add test for incorrect memory operand
	for gather/scatter instructions.
	* gas/i386/x86-64-inval-avx512f.s: Likewise.
	* gas/i386/inval-avx512f.l: Adjust correspondingly.
	* gas/i386/x86-64-inval-avx512f.l: Likewise.
2014-01-31 08:13:06 -08:00
Sandra Loosemore
78058a5e4f Nios II CALL26 linker relaxation
2014-01-30  Sandra Loosemore  <sandra@codesourcery.com>

	bfd/
	* bfd-in2.h: Update from reloc.c.
	* elf32-nios2.c: Include elf32-nios2.h.
	(elf_nios2_howto_table_rel): Add entry for R_NIOS2_CALL26_NOAT.
	(nios2_reloc_map): Likewise.
	(enum elf32_nios2_stub_type): Declare.
	(struct elf32_nios2_stub_hash_entry): Declare.
	(nios2_stub_hash_entry, nios2_stub_hash_lookup): New macros.
	(struct elf32_nios2_link_hash_entry): Add hsh_cache field.
	(struct elf32_nios2_link_hash_table): Add new fields bstab,
	stub_bfd, add_stub_section, layout_sections_again, stub_group,
	bfd_count, top_index, input_list, all_local_syms.
	(nios2_call26_stub_entry): New.
	(nios2_elf32_install_imm16): Move up in file.
	(nios2_elf32_install_data): Move up in file.
	(hiadj): Move up in file.
	(stub_hash_newfunc): New.
	(link_hash_newfunc): Initialize hsh_cache field.
	(STUB_SUFFIX): New.
	(nios2_stub_name): New.
	(nios2_get_stub_entry): New.
	(nios2_add_stub): New.
	(nios2_elf32_setup_section_lists): New.
	(nios2_elf32_next_input_section): New.
	(CALL26_SEGMENT): New.
	(MAX_STUB_SECTION_SIZE): New.
	(group_sections): New.
	(nios2_type_of_stub): New.
	(nios2_build_one_stub): New.
	(nios2_size_one_stub): New.
	(get_local_syms): New.
	(nios2_elf32_size_stubs): New.
	(nios2_elf32_build_stubs): New.
	(nios2_elf32_do_call26_relocate): Correct CALL26 overflow test.
	(nios2_elf32_relocate_section): Handle R_NIOS2_CALL26_NOAT.  Add
	trampolines for R_NIOS2_CALL26 stubs.
	(nios2_elf32_check_relocs): Handle R_NIOS2_CALL26_NOAT.
	(nios2_elf32_gc_sweep_hook): Likewise.
	(nios2_elf32_link_hash_table_create): Initialize the stub hash table.
	(nios2_elf32_link_hash_table_free): New.
	(bfd_elf32_bfd_link_hash_table_free): Define.
	* elf32-nios2.h: New file.
	* libbfd.h: Update from reloc.c.
	* reloc.c (BFD_RELOC_NIOS2_CALL26_NOAT): New.

	gas/
	* config/tc-nios2.c (md_apply_fix): Handle BFD_RELOC_NIOS2_CALL26_NOAT.
	(nios2_assemble_args_m): Likewise.
	(md_assemble): Likewise.

	gas/testsuite/
	* gas/nios2/call26_noat.d: New.
	* gas/nios2/call26_noat.s: New.
	* gas/nios2/call_noat.d: New.
	* gas/nios2/call_noat.s: New.

	include/elf/
	* nios2.h (elf_nios2_reloc_type): Add R_NIOS2_CALL26_NOAT.

	ld/
	* Makefile.am (enios2elf.c, enios2linux.c): Update dependencies.
	* Makefile.in: Regenerated.
	* emulparams/nios2elf.sh (EXTRA_EM_FILE): Set.
	* emulparams/nios2linux.sh (EXTRA_EM_FILE): Set.
	* emultempl/nios2elf.em: New file.
	* gen-doc.texi (NIOSII): Set.
	* ld.texinfo (NIOSII): Set.

	ld/testsuite/
	* ld-nios2/relax_call26.s: New.
	* ld-nios2/relax_call26_boundary.ld: New.
	* ld-nios2/relax_call26_boundary.s: New.
	* ld-nios2/relax_call26_boundary_c8.d: New.
	* ld-nios2/relax_call26_boundary_cc.d: New.
	* ld-nios2/relax_call26_boundary_d0.d: New.
	* ld-nios2/relax_call26_boundary_d4.d: New.
	* ld-nios2/relax_call26_boundary_d8.d: New.
	* ld-nios2/relax_call26_boundary_dc.d: New.
	* ld-nios2/relax_call26_boundary_f0.d: New.
	* ld-nios2/relax_call26_boundary_f4.d: New.
	* ld-nios2/relax_call26_boundary_f8.d: New.
	* ld-nios2/relax_call26_boundary_fc.d: New.
	* ld-nios2/relax_call26_cache.d: New.
	* ld-nios2/relax_call26_cache.ld: New.
	* ld-nios2/relax_call26_cache.s: New.
	* ld-nios2/relax_call26_multi.d: New.
	* ld-nios2/relax_call26_multi.ld: New.
	* ld-nios2/relax_call26_norelax.d: New.
	* ld-nios2/relax_call26_shared.d: New.
	* ld-nios2/relax_call26_shared.ld: New.
2014-01-30 17:47:07 -08:00
Michael Zolotukhin
eaa9d1ad0e Fix shift for AVX512F gather/scatter instructions
opcodes/

2014-01-30  Michael Zolotukhin  <michael.v.zolotukhin@gmail.com>
	    Jan Beulich  <jbeulich@suse.com>

	PR binutils/16490
	* i386-dis.c (OP_E_memory): Fix shift computation for
	vex_vsib_q_w_dq_mode.

gas/testsuite/

2014-01-30  Michael Zolotukhin  <michael.v.zolotukhin@gmail.com>
	    Jan Beulich  <jbeulich@suse.com>

	PR binutils/16490
	* gas/i386/avx512f.d: Fix test output.
	* gas/i386/avx512f-intel.d: Likewise.
	* gas/i386/x86-64-avx512f.d: Likewise.
	* gas/i386/x86-64-avx512f-intel.d: Likewise.
2014-01-30 07:38:09 -08:00
Nick Clifton
d82ba9f90a A recent update to the binutils means that RELA sections now have the
SHF_INFO_LINK bit set, which shows up in readelf section dumps.  This
has broken a couple of IA64 testcases in the gas testsuite, which are
fixed by this patch.

	PR binutils/16317
	* gas/ia64/group-2.d: Expect I attribute with RELA sections.
	* gas/ia64/xdata.d: Likewise.
2014-01-28 12:18:01 +00:00
DJ Delorie
34b822e3bc Add .data and .bss refsym symbols
For each object, if it has a nonempty .data or .bss section,
emit a symbol that could cause the startup code to selectively
link in the code to initialize those sections.

* config/tc-msp430.c (msp430_section): Always flag data sections,
regardless of -md.
(msp430_frob_section): New.  Make sure all sections are noticed if
they have content.
(msp430_lcomm): New.  Flag bss if .lcomm is seen.
(msp430_comm): New.  Likewise.
(md_pseudo_table): Add them.
* config/tc-msp430.h (msp430_frob_section): Declare.
(tc_frob_section): Define.
2014-01-24 14:43:58 -05:00
Nick Clifton
8e75a78f36 Remove the display of known MCU names from the MSP430 port of GAS.
New MSP430 MCU parts are being created by TI all the time and the
list is basically always out of date.  Instead any name will be
accepted by the -mmcu= command line option.  ISA selection is now
based upon the -mcpu= command line option, just as is done for GCC.

gas/ChangeLog
	* config/tc-msp430.c (show_mcu_list): Delete.
	(md_parse_option): Accept any MCU name.  Accept several more
	variants for the -mcpu option.
	(md_show_usage): Do not call show_mcu_list.
2014-01-23 17:08:24 +00:00
DJ Delorie
96b961024c Add .refsym to msp430 backend
* config/tc-msp430.c (msp430_refsym): New: ".refsym <symbol>"
* doc/c-msp430.texi (MSP430 Directives): Document it.

The purpose of this patch is to provide a way for one object file
to require the inclusion of another object, without having to
allocate space for a .word address reference.
2014-01-22 16:41:13 -05:00
Michael Zolotukhin
7c84a0ca90 Remove regzmm from AVX2 gather assert
Since regzmm can't be used in AVX2 gather instructions, there is no need
to check regzmm in AVX2 gather assert.

2014-01-22  Michael Zolotukhin  <michael.v.zolotukhin@gmail.com>

	* config/tc-i386.c (check_VecOperands): Remove regzmm from AVX2
	gather assert.
2014-01-22 11:39:02 -08:00
Michael Zolotukhin
8444f82a1d Add check for invalid register in AVX512 gathers
AVX512 gather instructions shouldn't accept the same register for both
destination and index.

gas/

2014-01-22  Michael Zolotukhin  <michael.v.zolotukhin@gmail.com>

	PR gas/16489
	* config/tc-i386.c (check_VecOperands): Add check for invalid
	register set in AVX512 gathers.

gas/testsuite/

2014-01-22  Michael Zolotukhin  <michael.v.zolotukhin@gmail.com>

	PR gas/16489
	* gas/i386/vgather-check.s: Add tests for AVX512 gathers.
	* gas/i386/x86-64-vgather-check.s: Likewise.
	* gas/i386/vgather-check-error.l: Update correspondingly.
	* gas/i386/vgather-check-none.d: Likewise.
	* gas/i386/vgather-check-warn.d: Likewise.
	* gas/i386/vgather-check-warn.e: Likewise.
	* gas/i386/vgather-check.d: Likewise.
	* gas/i386/x86-64-vgather-check-error.l: Likewise.
	* gas/i386/x86-64-vgather-check-none.d: Likewise.
	* gas/i386/x86-64-vgather-check-warn.d: Likewise.
	* gas/i386/x86-64-vgather-check-warn.e: Likewise.
	* gas/i386/x86-64-vgather-check.d: Likewise.
2014-01-22 10:01:12 -08:00
Alan Modra
cda796e168 Fix gas build breakage
* config/tc-tic4x.c (md_shortopts): s/CONST/const/.
2014-01-22 16:21:34 +10:30
DJ Delorie
c9d665580e Ensure that %func() expressions are outermost terms
This is to avoid expressions like:  %hi(foo) + 1, which will
not do what you expect.  The complex relocations can handle it,
but the internal fixups can't.
2014-01-21 15:12:19 -05:00
Will Newton
827f64ffb5 gas: ARM: Fix encoding of VCVTr.s32.f64 instructions
The direct rounding floating-point VCVT instructions introduced in
ARMv8 encode the s32.f64 variant incorrectly. The op bit should be
set to 1 for all signed conversions.

gas/ChangeLog:

2014-01-17  Will Newton  <will.newton@linaro.org>

	* config/tc-arm.c (do_vfp_nsyn_cvt_fpv8): Set OP to 1
	for the s32.f64 flavours of VCVT.

gas/testsuite/ChangeLog:

2014-01-17  Will Newton  <will.newton@linaro.org>

	* gas/arm/armv8-a+fp.d: Correct encoding of vcvta.s32.f64.
2014-01-17 15:34:56 +00:00
Nick Clifton
73812f599c PR gas/16434
* config/tc-z80.c (wrong_match): Provide format string to
	as_warn.
	(parse_exp_not_indexed): Delete unused variable dummy.
	(emit_byte): Delete unused variable fixp.
2014-01-14 12:39:45 +00:00
H.J. Lu
143e9f4a65 Remove regbnd and vec_disp8
* config/tc-i386.c (regbnd): Removed.
	(vec_disp8): Likewise.
2014-01-08 08:22:35 -08:00
H.J. Lu
221fd5d598 Update copyright year to 2014
binutils/

	* version.c (print_version): Update copyright year to 2014.

gas/

	* as.c (parse_args): Update copyright year to 2014.

gold/

	* version.cc (print_version): Update copyright year to 2014.

ld/

	* ldver.c (ldversion): Update copyright year to 2014.

opcodes/

	* i386-gen.c (process_copyright): Update copyright year to 2014.
2014-01-08 05:48:12 -08:00
H.J. Lu
5fb776a637 New Year - binutils ChangeLog rotation 2014-01-08 05:32:12 -08:00
Tom Tromey
1651e569b4 remove VA_* from binutils
This removes the last uses of the obsolete VA_* macros from binutils.

All the binutils and bfd changes were tested by rebuilding.
I didn't rebuild the gas change but I think it is obviously correct.

2014-01-07  Tom Tromey  <tromey@redhat.com>

	* elf32-xtensa.c (vsprint_msg): Don't use old VA_* compatibility
	wrappers.

2014-01-07  Tom Tromey  <tromey@redhat.com>

	* bucomm.c (fatal, non_fatal): Replace obsolete VA_* macros with
	stdarg macros.
	* dlltool.c (inform): Replace obsolete VA_* macros with stdarg
	macros.
	* dllwrap.c (inform, warn): Replace obsolete VA_* macros with
	stdarg macros.

2014-01-07  Tom Tromey  <tromey@redhat.com>

	* config/tc-tic30.c (debug): Avoid old VA_* compatibility
	wrappers.
2014-01-07 09:17:05 -07:00
Tom Tromey
b51f1626f6 remove uses of PARAMS from binutils
This removes the last uses of PARAMS from binutils.

The two changes in binutils were tested by rebuilding.
I didn't rebuild the gas change but I think it is obviously correct.

2014-01-07  Tom Tromey  <tromey@redhat.com>

	* coffgrok.h (coff_ofile): Don't use PARAMS.
	* nlmheader.y (strerror): Don't use PARAMS.

2014-01-07  Tom Tromey  <tromey@redhat.com>

	* config/tc-microblaze.h (parse_cons_expression_microblaze): Don't
	use PARAMS.
2014-01-07 09:17:04 -07:00
Tom Tromey
3cea37c40c remove ANSI_PROTOTYPES
This removes the last use of ANSI_PROTOTYPES in the tree.
It appears in gas.

I didn't even rebuild this but I think it is obviously correct.

2014-01-07  Tom Tromey  <tromey@redhat.com>

	* config/tc-xc16x.h: Don't use ANSI_PROTOTYPES.
2014-01-07 09:17:04 -07:00
Philipp Tomsich
9877c63c84 [AArch64] Add GAS recognition for "xgene-1"
* config/tc-aarch64.c (aarch64_cpus): Add entry for "xgene-1"

This adds support for the AppliedMicro X-Gene 1 processor to the
assembler.
2014-01-07 12:27:24 +00:00
Hans-Peter Nilsson
52d2001f06 Adjust MMIX gas tests for recent bfd/elf.c change.
* gas/mmix/bspec-1.d: Adjust for SHF_INFO_LINK now set on RELA
	sections.
	* gas/mmix/bspec-2.d: Ditto.
2013-12-28 16:57:24 +01:00
Nick Clifton
2e9e81a8f5 PR binutils/16218
* dwarf.c (read_and_display_attr_value): Only print a tab
	character if it preceeds further text.

	* binutils-all/dw2-1.W:	Update expected objdump output.
	* binutils-all/i386/compressed-1a.d: Likewise.
	* binutils-all/objdump.W: Likewise.
	* binutils-all/x86-64/compressed-1a.d: Likewise.

	* gas/elf/dwarf2-1.d: Update expected objdump output.
	* gas/elf/dwarf2-2.d: Likewise.
	* gas/i386/dw2-compress-1.d: Likewise.
2013-12-20 13:52:23 +00:00
Tristan Gingold
ea4cff4f1f Remove duplicated entry for .pad in c-arm.texi
* doc/c-arm.texi (ARM Directives): Remove duplicate .pad entry.
2013-12-20 12:38:14 +01:00
H.J. Lu
fa8761a3e0 Don't run x86-64-disassem for mingw targets
mingw targets pad text sections which won't work with x86-64-disassem.

	* gas/i386/i386.exp: Don't run x86-64-disassem for mingw targets.
2013-12-19 11:25:46 -08:00
Yufeng Zhang
3f06bfce70 gas/
* config/tc-aarch64.c (md_assemble): Defer the feature checking until
	do_encode () succeeds.

gas/testsuite/

	* gas/aarch64/rm-simd-ext.d: New file.
	* gas/aarch64/rm-simd-ext.l: Likewise.
	* gas/aarch64/rm-simd-ext.s: Likewise.
2013-12-18 19:15:57 +00:00
Nick Clifton
720fbed62e * config/tc-rx.c (rx_include): Rename 'eof' to 'last_char' in
order to avoid conflict with same named variable in MinGW system
	header file.
2013-12-18 11:51:25 +00:00
Kuan-Lin Chen
6b9d3259c3 Add system register and embedded debug register support.
Add two more as test files for user special and system register.
Fix typo.

2013-12-17  Kuan-Lin Chen  <kuanlinchentw@gmail.com>

	* gas/nds32/nds32.exp: Add system and user special register tests.
	* gas/nds32/sys-reg.s: New test.
	* gas/nds32/sys-reg.d: Likewise.
	* gas/nds32/usr-spe-reg.s: Likewise.
	* gas/nds32/usr-spe-reg.d: Likewise.
	* gas/nds32/alu-2.d: Delete the new blank line at EOF.
	* gas/nds32/br-1.d: Likewise.
	* gas/nds32/br-2.d: Likewise.
	* gas/nds32/ji-jr.d: Likewise.
	* gas/nds32/lsi.d: Likewise.
	* nds32-dis.c (sr_map): Add system register table for disassembling.
	(usr_map): Fix typo.
	* nds32-asm.c (keyword_sr): Add embedded debug registers.
2013-12-18 11:02:12 +08:00
Michael Zolotukhin
4a357820ad Properly handle ljmp/lcall with invalid MODRM byte
gas/testsuite/

2013-12-17  Michael Zolotukhin  <michael.v.zolotukhin@gmail.com>

	* gas/i386/disassem.s: New.
	* gas/i386/disassem.d: Likewise.
	* gas/i386/x86-64-disassem.s: Likewise.
	* gas/i386/x86-64-disassem.d: Likewise.
	* gas/i386/i386.exp: Run disassem and x86-64-disassem.

opcodes/

2013-12-17  Michael Zolotukhin  <michael.v.zolotukhin@gmail.com>

	* i386-dis.c (MOD_FF_REG_3): New.
	(MOD_FF_REG_5): Likewise.
	(mod_table): Add MOD_FF_REG_3 and MOD_FF_REG_5.
	(reg_table): Use MOD_FF_REG_3 and MOD_FF_REG_5.
2013-12-17 09:06:57 -08:00
Andrew Bennett
dc76d75756 Add support to show the symbolic names of the MIPS CP1 registers.
2013-12-16  Andrew Bennett  <andrew.bennett@imgtec.com>

	gas/testsuite/gas/mips/
	* mips.exp: Add CP1 register name tests.
	* cp1-names-mips32.d: New test.
	* cp1-names-mips32r2.d: New test.
	* cp1-names-mips64.d: New test.
	* cp1-names-mips64r2.d: New test.
	* cp1-names-numeric.d: New test.
	* cp1-names-r3000.d: New test.
	* cp1-names-r4000.d: New test.
	* cp1-names-sb1.d: New test.
	* cp1-names.s: New test.
	* micromips-insn32.d: Add the correct symbolic names for the CP1
	registers.
	* micromips-noinsn32.d: Likewise.
	* micromips-trap.d: Likewise.
	* micromips.d: Likewise.

	opcodes/
	* mips-dis.c: Add mips_cp1_names pointer.
	(mips_cp1_names_numeric): New array.
	(mips_cp1_names_mips3264): New array.
	(mips_arch_choice): Add cp1_names.
	(mips_arch_choices): Add relevant cp1 register name array to each of
	the elements.
	(set_default_mips_dis_options): Add support for setting up the
	mips_cp1_names pointer.
	(parse_mips_dis_option): Add support for the cp1-names command line
	variable.  Also setup the mips_cp1_names pointer.
	(print_reg): Print out name of the cp1 register.
2013-12-16 17:09:58 +00:00
Andrew Bennett
e269fea784 Range of element index is too large on MIPS MSA element selection instructions.
The element index range for the following MIPS MSA instructions: sldi, splati,
copy_s, copy_u, insert and insve is 1 bit too large.  This patch fixes this issue.

ChangeLog:

	gas/testsuite/gas/mips/
	* msa.s: Reduced maximum element index range for sldi, splati,
	copy_s, copy_u, insert and insve instructions.
	* msa64.s: Likewise.
	* micromips@msa.d: Likewise.
	* micromips@msa64.d: Likewise.
	* msa.d: Likewise.
	* msa64.d: Likewise.

	include/opcode/
	* mips.h: Updated description of +o, +u, +v and +w for MIPS and
	microMIPS.

	opcodes/
	* micromips-opc.c (decode_micromips_operand): Reduced range of +o, +u,
	+v and +w.
	(micromips_opcodes): Reduced element index range for sldi, splati,
	copy_s, copy_u, insert and insve instructions.
	* opcodes/mips-opc.c (decode_mips_operand): Reduced range of +o, +u,
	+v and +w.
	(mips_builtin_opcodes): Reduced element index range for sldi, splati,
	copy_s, copy_u, insert and insve instructions.
2013-12-16 07:43:20 -08:00
Nick Clifton
a75555d13b * config/tc-msp430.c (mcu_types): Add some more 430X mcu names.
(OPTION_INTR_NOPS): Define.
	(gen_interrupt_nops): Default to FALSE.
	(md_parse_opton): Add support for OPTION_INTR_NOPS.
	(md_longopts): Add -mn.
	(md_show_usage): Add -mn.
	(msp430_operands): Generate NOPs for all MCUs not just 430Xv2.
	* doc/c-msp430.c: Document -mn.
2013-12-13 12:32:21 +00:00
Kuan-Lin Chen
35c081572f Add support for Andes NDS32:
BFD:
	* Makefile.am (BFD32_BACKENDS, BFD32_BACKENDS_CFILES): Add nds32
	files.
	* Makefile.in: Regenerate.
	* archures.c (bfd_nds32_arch): Add nds32 target.
	* bfd-in2.h: Regenerate.
	* config.bfd (nds32*le-*-linux): Add bfd_elf32_nds32lelin_vec
	and bfd_elf32_nds32belin_vec.
	(nds32*be-*-linux*): Likewise.
	(nds32*le-*-*): Add bfd_elf32_nds32le_vec and bfd_elf32_nds32be_vec.
	(nds32*be-*-*): Likewise.
	* configure.in (bfd_elf32_nds32be_vec): Add elf32-nds32.lo.
	(bfd_elf32_nds32le_vec): Likewise.
	(bfd_elf32_nds32belin_vec): Likewise.
	(bfd_elf32_nds32lelin_vec): Likewise.
	* configure: Regenerate.
	* cpu-nds32.c: New file for nds32.
	* elf-bfd.h: Add NDS32_ELF_DATA.
	* elf32-nds32.c: New file for nds32.
	* elf32-nds32.h: New file for nds32.
	* libbfd.h: Regenerate.
	* reloc.c: Add relocations for nds32.
	* targets.c (bfd_elf32_nds32be_vec): New declaration for nds32.
	(bfd_elf32_nds32le_vec): Likewise.
	(bfd_elf32_nds32belin_vec): Likewise.
	(bfd_elf32_nds32lelin_vec): Likewise.

BINUTILS:
	* readelf.c: Include elf/nds32.h
	(guess_is_rela): Add case for EM_NDS32.
	(dump_relocations): Add case for EM_NDS32.
	(decode_NDS32_machine_flags): New.
	(get_machine_flags): Add case for EM_NDS32.
	(is_32bit_abs_reloc): Likewise.
	(is_16bit_abs_reloc): Likewise.
	(process_nds32_specific): New.
	(process_arch_specific): Add case for EM_NDS32.
	* NEWS: Announce Andes nds32 support.
	* MAINTAINERS: Add nds32 maintainers.
  TESTSUITE:
	* binutils-all/objdump.exp: Add NDS32 cpu.
	* binutils-all/readelf.r: Skip extra reloc created by NDS32.

GAS:
	* Makefile.am (TARGET_CPU_CFILES): Add config/tc-nds32.c.
	(TARGET_CPU_HFILES): Add config/tc-nds32.h.
	* Makefile.in: Regenerate.
	* configure.in (nds32): Add nds32 target extension config support.
	* configure.tgt : Add case for nds32-*-elf* and nds32-*-linux*.
	* configure: Regenerate.
	* config/tc-nds32.c: New file for nds32.
	* config/tc-nds32.h: New file for nds32.
	* doc/Makefile.am (CPU_DOCS): Add c-nds32.texi.
	* doc/Makefile.in: Regenerate.
	* doc/as.texinfo: Add nds32 options.
	* doc/all.texi: Set NDS32.
	* doc/c-nds32.texi: New file dor nds32 document.
	* NEWS: Announce Andes nds32 support.
  TESTSUITE:
	* gas/all/gas.exp: Add expected failures for NDS32.
	* gas/elf/elf.exp: Likewise.
	* gas/lns/lns.exp: Use alternate test.
	* gas/macros/irp.d: Skip for NDS32.
	* gas/macros/macros.exp: Skip some tests for the NDS32.
	* gas/macros/rept.d: Skip for NDS32.
	* gas/macros/test3.d: Skip for NDS32.
	* gas/nds32: New directory.
	* gas/nds32/alu-1.s: New test.
	* gas/nds32/alu-1.d: Likewise.
	* gas/nds32/alu-2.s: Likewise.
	* gas/nds32/alu-2.d: Likewise.
	* gas/nds32/br-1.d: Likewise.
	* gas/nds32/br-1.s: Likewise.
	* gas/nds32/br-2.d: Likewise.
	* gas/nds32/br-2.s: Likewise.
	* gas/nds32/ji-jr.d: Likewise.
	* gas/nds32/ji-jr.s: Likewise.
	* gas/nds32/ls.d: Likewise.
	* gas/nds32/ls.s: Likewise.
	* gas/nds32/lsi.d: Likewise.
	* gas/nds32/lsi.s: Likewise.
	* gas/nds32/to-16bit-v1.d: Likewise.
	* gas/nds32/to-16bit-v1.s: Likewise.
	* gas/nds32/to-16bit-v2.d: Likewise.
	* gas/nds32/to-16bit-v2.s: Likewise.
	* gas/nds32/to-16bit-v3.d: Likewise.
	* gas/nds32/to-16bit-v3.s: Likewise.
	* gas/nds32/nds32.exp: New test driver.

LD:
	* Makefile.am (ALL_EMULATION_SOURCES): Add nds32 target.
	* Makefile.in: Regenerate.
	* configure.tgt: Add case for nds32*le-*-elf*, nds32*be-*-elf*,
	nds32*le-*-linux-gnu*, and nds32*be-*-linux-gnu*.
	* emulparams/nds32belf.sh: New file for nds32.
	* emulparams/nds32belf_linux.sh: Likewise.
	* emulparams/nds32belf16m.sh: Likewise.
	* emulparams/nds32elf.sh: Likewise.
	* emulparams/nds32elf_linux.sh: Likewise.
	* emulparams/nds32elf16m.sh: Likewise.
	* emultempl/nds32elf.em: Likewise.
	* scripttempl/nds32elf.sc}: Likewise.
	* gen-doc.texi: Set NDS32.
	* ld.texinfo: Set NDS32.
	* NEWS: Announce Andes nds32 support.
  TESTSUITE:
	* lib/ld-lib.exp: Add NDS32 to list of targets that do not support
	shared library generation.
	* ld-nds32: New directory.
	* ld-nds32/branch.d: New test.
	* ld-nds32/branch.ld: New test.
	* ld-nds32/branch.s: New test.
	* ld-nds32/diff.d: New test.
	* ld-nds32/diff.ld: New test.
	* ld-nds32/diff.s: New test.
	* ld-nds32/gp.d: New test.
	* ld-nds32/gp.ld: New test.
	* ld-nds32/gp.s: New test.
	* ld-nds32/imm.d: New test.
	* ld-nds32/imm.ld: New test.
	* ld-nds32/imm.s: New test.
	* ld-nds32/imm_symbol.s: New test.
	* ld-nds32/relax_jmp.d: New test.
	* ld-nds32/relax_jmp.ld: New test.
	* ld-nds32/relax_jmp.s: New test.
	* ld-nds32/relax_load_store.d: New test.
	* ld-nds32/relax_load_store.ld: New test.
	* ld-nds32/relax_load_store.s: New test.
	* ld-nds32/nds32.exp: New file.

OPCODES:
	* Makefile.am (TARGET_LIBOPCODES_CFILES): Add nds32-asm.c
	and nds32-dis.c.
	* Makefile.in: Regenerate.
	* configure.in: Add case for bfd_nds32_arch.
	* configure: Regenerate.
	* disassemble.c (ARCH_nds32): Define.
	* nds32-asm.c: New file for nds32.
	* nds32-asm.h: New file for nds32.
	* nds32-dis.c: New file for nds32.
	* nds32-opc.h: New file for nds32.

INCLUDE:
	* dis-asm.h (print_insn_nds32): Add nds32 target.
	* elf/nds32.h: New file for nds32.
	* opcode/nds32.h: New file for nds32.
2013-12-13 11:52:32 +00:00
Roland McGrath
f2c7d7ee5b Use $(INSTALL_PROGRAM_ENV) consistently.
binutils/
	* Makefile.am (install-exec-local): Prefix libtool invocation with
	$(INSTALL_PROGRAM_ENV).
	* Makefile.in: Regenerate.

gas/
	* Makefile.am (install-exec-bindir): Prefix libtool invocation
	with $(INSTALL_PROGRAM_ENV).
	(install-exec-tooldir): Likewise.
	* Makefile.in: Regenerate.

gold/
	* Makefile.am (install-exec-local): Prefix $(INSTALL_PROGRAM) uses
	with $(INSTALL_PROGRAM_ENV).
	* Makefile.in: Regenerate.

ld/
	* Makefile.am (install-exec-local): Prefix libtool invocation with
	$(INSTALL_PROGRAM_ENV).
	* Makefile.in: Regenerate.
2013-12-10 15:19:50 -08:00
Mike Frysinger
594d8fa8e9 strip off +x bits on non-executable/script files
These files are source files and have no business being +x.  We couldn't
easily fix it in CVS (you need login+write access to the raw rcs files),
but we can fix this w/git.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2013-12-07 02:03:03 -05:00
Tristan Gingold
c2a5914e1b Fix crash on intelbad.
gas/
2013-12-03  Tristan Gingold  <gingold@adacore.com>

	* config/tc-i386-intel.c (i386_intel_simplify): Avoid arithmetic
	overflow on pointers.
2013-12-03 17:31:46 +01:00
Richard Sandiford
d4a43794d2 binutils/testsuite/
2013-11-27  Matthew Fortune <matthew.fortune@imgtec.com>

	* binutils-all/objcopy.exp: Consider mips-mti-elf the same as
	mips-sde-elf
	* binutils-all/readelf.exp: Likewise

gas/testsuite/
2013-11-27  Matthew Fortune <matthew.fortune@imgtec.com>

	* gas/mips/mips.exp: Consider mips-mti-elf the same as mips-sde-elf

ld/testsuite/
2013-11-27  Matthew Fortune <matthew.fortune@imgtec.com>

	* ld-mips-elf/mips-elf.exp: Consider mips-mti-elf the same as
	mips-sde-elf
2013-11-27 09:11:06 +00:00
Yufeng Zhang
87b8eed7fb gas/testsuite/
* gas/aarch64/msr.s: Add tests.
	* gas/aarch64/msr.d: Update.

include/opcode

	* aarch64.h (aarch64_pstatefields): Change element type to
	aarch64_sys_reg.

opcodes/

	* aarch64-opc.c (aarch64_pstatefields): Update.
2013-11-20 11:22:53 +00:00
Yufeng Zhang
9a73e520da Revert "Do not issue error messages when parsing a PSTATE register".
This reverts commit 03e621be97.
2013-11-20 11:22:53 +00:00
Nick Clifton
03e621be97 * config/tc-aarch64.c (parse_sys_reg): Do not issue error messages
for deprecated system registers when parsing pstate fields.
2013-11-19 17:40:31 +00:00
Catherine Moore
a8d14a8892 2013-11-19 Catherine Moore <clm@codesourcery.com>
gas/
	* config/tc-mips.c (mips_fix_pmc_rm7000): Declare.
	(options): Add OPTION_FIX_PMC_RM7000 and OPTION_NO_FIX_PMC_RM7000.
	(md_longopts): Add mfix-pmc-rm7000 and mno-fix-pmc-rm7000.
	(INSN_DMULT): Define.
	(INSN_DMULTU): Define.
	(insns_between): Detect PMC RM7000 errata.
	(md_parse_option): Supprt OPTION_FIX_PMC_RM7000 and
	OPTION_NO_FIX_PMC_RM7000.
	* doc/as.texinfo: Document new options.
	* doc/c-mips.texi: Likewise.

	gas/testsuite/
	* gas/mips/fix-pmc-rm7000-1.d: New.
	* gas/mips/fix-pmc-rm7000-1.s: New.
	* gas/mips/fix-pmc-rm7000-2.d: New.
	* gas/mips/fix-pmc-rm7000-2.s: New.
	* gas/mips/micromips@fix-pmc-rm7000-1.d: New.
	* gas/mips/micromips@fix-pmc-rm7000-2.d: New.
	* gas/mips/mips.exp: Run new tests.
2013-11-19 05:07:54 -08:00
Alexey Makhalov
cf3f45fad7 PR gas/16109
* app.c (do_scrub_chars): Only insert a newline character if
	end-of-file has been reached.
2013-11-19 08:19:21 +00:00
H.J. Lu
15bb7f9aee Update x86 gas tests for mingw
* gas/i386/avx512f-nondef.d: Updated for mingw.
	* gas/i386/mpx-add-bnd-prefix.d: Likewise.
	* gas/i386/x86-64-avx512f-nondef.d: Likewise.
	* gas/i386/x86-64-mpx-add-bnd-prefix.d: Likewise.
	* gas/i386/x86-64-mpx-addr32.d: Likewise.
	* gas/i386/x86-64-opcode.d: Likewise.
	* gas/i386/x86-64-sha.d: Likewise.
2013-11-18 14:37:23 -08:00
H.J. Lu
c06ec7240f Add a dummy "int bnd_prefix" argument
* config/tc-i386.c (lex_got): Add a dummy "int bnd_prefix"
	argument.
2013-11-18 12:16:16 -08:00
Yufeng Zhang
c9fb6e5814 Add support for armv7ve to gas.
gas/

	* config/tc-arm.c (arm_archs): New armv7ve architecture option.
	(arm_cpus): Replace ARM_ARCH_V7A_IDIV_MP_SEC_VIRT with
	ARM_ARCH_V7VE for cortex-a7, cortex-a12 and cortex-a15.
	(cpu_arch_ver): Likewise.
	* doc/c-arm.texi: Document armv7ve.

gas/testsuite/

	* gas/arm/attr-march-armv7ve.d: New test case for armv7ve.

include/opcode/

	* arm.h (ARM_AEXT_V7VE): New define.
	(ARM_ARCH_V7VE): New define.
	(ARM_ARCH_V7A_IDIV_MP_SEC_VIRT): Removed.
2013-11-18 17:23:33 +00:00
Yufeng Zhang
18cf6de400 gas/
* config/tc-aarch64.c (parse_sys_reg): Support
	S2_<op1>_<Cn>_<Cm>_<op2>.

gas/testsuite/

	* gas/testsuite/sysreg.s: Add test.
	* gas/testsuite/sysreg.d: Update.
2013-11-18 11:42:42 +00:00
Yufeng Zhang
a203d9b72f Revert "Add support for AArch64 trace unit registers."
This reverts commit 75468c93c1.
2013-11-18 11:42:41 +00:00
H.J. Lu
c33205431a Add R_X86_64_PC32_BND and R_X86_64_PLT32_BND
bfd/

	* elf64-x86-64.c (x86_64_elf_howto_table): Add R_X86_64_PC32_BND
	and R_X86_64_PLT32_BND.
	(R_X86_64_standard): Replace R_X86_64_RELATIVE64 with
	R_X86_64_PLT32_BND.
	(IS_X86_64_PCREL_TYPE): Add R_X86_64_PLT32_BND.
	(x86_64_reloc_map): Add BFD_RELOC_X86_64_PC32_BND and
	BFD_RELOC_X86_64_PLT32_BND.
	(elf_x86_64_check_relocs): Handle R_X86_64_PC32_BND and
	R_X86_64_PLT32_BND.
	(elf_x86_64_gc_sweep_hook): Likewise.
	(elf_x86_64_relocate_section): Likewise.
	* reloc.c (bfd_reloc_code_real): Add BFD_RELOC_X86_64_PC32_BND
	and BFD_RELOC_X86_64_PLT32_BND.
	* bfd-in2.h: Regenerated.
	* libbfd.h: Likewise.

gas/

	* config/tc-i386.c (reloc): Add an argument, bnd_prefix, to
	indicate if instruction has the BND prefix.  Return
	BFD_RELOC_X86_64_PC32_BND instead of BFD_RELOC_32_PCREL if
	bnd_prefix isn't zero.
	(output_branch): Pass BFD_RELOC_X86_64_PC32_BND to frag_var
	if needed.
	(output_jump): Update reloc call.
	(output_interseg_jump): Likewise.
	(output_disp): Likewise.
	(output_imm): Likewise.
	(x86_cons_fix_new): Likewise.
	(lex_got): Add an argument, bnd_prefix, to indicate if
	instruction has the BND prefix.  Use BFD_RELOC_X86_64_PLT32_BND
	if needed.
	(x86_cons): Update lex_got call.
	(i386_immediate): Likewise.
	(i386_displacement): Likewise.
	(md_apply_fix): Handle BFD_RELOC_X86_64_PC32_BND and
	BFD_RELOC_X86_64_PLT32_BND.
	(tc_gen_reloc): Likewise.
	* config/tc-i386-intel.c (i386_operator): Update lex_got call.

gas/testsuite/

	* gas/i386/i386.exp: Run x86-64-mpx-branch-1 and
	x86-64-mpx-branch-2 on 64-bit ELF targets.
	* gas/i386/x86-64-mpx-branch-1.d: New file.
	* gas/i386/x86-64-mpx-branch-1.s: Likewise.
	* gas/i386/x86-64-mpx-branch-2.d: Likewise.
	* gas/i386/x86-64-mpx-branch-2.s: Likewise.

include/elf/

	* x86-64.h: Add R_X86_64_PC32_BND and R_X86_64_PLT32_BND.

ld/testsuite/

	* ld-x86-64/mpx.exp: New file.
	* ld-x86-64/mpx1.out: Likewise.
	* ld-x86-64/mpx1a.c: Likewise.
	* ld-x86-64/mpx1a.rd: Likewise.
	* ld-x86-64/mpx1b.c: Likewise.
	* ld-x86-64/mpx1c.c: Likewise.
	* ld-x86-64/mpx1c.rd: Likewise.
2013-11-17 08:57:56 -08:00
Yufeng Zhang
75468c93c1 gas/
* config/tc-aarch64.c (set_other_error): New function.
	(parse_sys_reg): Add new parameter 'sys_reg' and if non-NULL set
	the variable to which it points with 'o'.
	(parse_operands): Update; check for write to read-only system
	registers or read from write-only ones.

gas/testsuite/

	* gas/aarch64/diagnostic.s: Add tests.
	* gas/aarch64/diagnostic.l: Update.
	* gas/aarch64/tracereg-illegal.d: New file.
	* gas/aarch64/tracereg-illegal.l: Ditto.
	* gas/aarch64/tracereg-illegal.s: Ditto.
	* gas/aarch64/tracereg.d: Ditto.
	* gas/aarch64/tracereg.s: Ditto.

include/opcode

	* aarch64.h (aarch64_sys_reg_readonly_p): New declaration.
	(aarch64_sys_reg_writeonly_p): Ditto.

opcodes/

	* aarch64-opc.c (CPENT): New define.
	(F_READONLY, F_WRITEONLY): Likewise.
	(aarch64_sys_regs): Add trace unit registers.
	(aarch64_sys_reg_readonly_p): New function.
	(aarch64_sys_reg_writeonly_p): Ditto.
2013-11-15 23:40:34 +00:00
Michael Zolotukhin
ad8ecc8114 Reorder invalid default mask check
gas/

2013-11-15  Michael Zolotukhin  <michael.v.zolotukhin@gmail.com>

	* config/tc-i386.c (check_VecOperands): Reorder checks.

gas/testsuite/

2013-11-15  Michael Zolotukhin  <michael.v.zolotukhin@gmail.com>

	* gas/i386/inval-avx512f.s: Add invalid test for gather instruction
	with default mask.
	* gas/i386/inval-avx512f.l: Update correspondingly.
2013-11-15 05:22:32 -08:00
Catherine Moore
b83a9376e9 Fix ChangeLog entries from earlier commit. 2013-11-11 15:34:48 -08:00
Catherine Moore
67dc82bc51 2013-11-11 Catherine Moore <clm@codesourcery.com>
gas/
	* config/mips/tc-mips.c (convert_reg_type): Use
	INSN_LOAD_MEMORY instead of INSN_LOAD_MEMORY_DELAY.
	(reg_needs_delay): Likewise.
	(insns_between): Likewise.

	include/
	* opcode/mips.h (INSN_LOAD_MEMORY_DELAY): Rename to...
	(INSN_LOAD_MEMORY): ...this.

	opcodes/
	* mips-dis.c (print_insn_mips): Use
	INSN_LOAD_MEMORY instead of INSN_LOAD_MEMORY_DELAY.
	(print_insn_micromips): Likewise.
	* mips-opc.c (LDD): Remove.
	(CLD): Include INSN_LOAD_MEMORY.
	(LM): New.
	(mips_builtin_opcodes): Use LM instead of LDD.
        Add LM to load instructions.
2013-11-11 08:03:47 -08:00
Jan-Benedict Glaw
e2b5892e6e 2013-11-08 Jan-Benedict Glaw <jbglaw@lug-owl.de
* config/tc-ppc.c (ppc_elf_localentry): Add cast.

[BR]: https://sourceware.org/ml/binutils/2013-11/msg00064.html
2013-11-11 09:35:51 +01:00
Yufeng Zhang
49eec19300 gas/
* config/tc-aarch64.c (parse_sys_reg): Update to use aarch64_sys_reg;
	call aarch64_sys_reg_deprecated_p and warn about the deprecated
	system registers.

gas/testsuite/

	* gas/aarch64/deprecated.d: New file.
	* gas/aarch64/deprecated.l: New file.
	* gas/aarch64/deprecated.s: New file.
	* gas/aarch64/sysreg-1.s: Add tests.
	* gas/aarch64/sysreg-1.d: Add tests.

include/opcode/

	* aarch64.h (aarch64_sys_reg): New typedef.
	(aarch64_sys_regs): Change to define with the new type.
	(aarch64_sys_reg_deprecated_p): Declare.

opcodes/

	* aarch64-opc.c (F_DEPRECATED): New macro.
	(aarch64_sys_regs): Update; flag "spsr_svc" and "spsr_hyp" with
	F_DEPRECATED.
	(aarch64_print_operand): Call aarch64_sys_reg_deprecated_p on
	AARCH64_OPND_SYSREG.
2013-11-05 20:54:22 +00:00
Yufeng Zhang
68a6428382 gas/
* config/tc-aarch64.c (parse_operands): Handle AARCH64_OPND_COND1.

gas/testsuite/

	* gas/aarch64/alias.s: Add tests.
	* gas/aarch64/alias.d: Update.
	* gas/aarch64/no-aliases.d: Update.
	* gas/aarch64/diagnostic.s: Add tests.
	* gas/aarch64/diagnostic.l: Update.
	* gas/aarch64/illegal.s: Add tests.
	* gas/aarch64/illegal.l: Update.

include/opcode/

	* aarch64.h (enum aarch64_operand_class): Add AARCH64_OPND_CLASS_COND.
	(enum aarch64_opnd): Add AARCH64_OPND_COND1.

opcodes/

	* aarch64-dis.c (convert_ubfm_to_lsl): Check for cond != '111x'.
	(convert_from_csel): Likewise.
	* aarch64-opc.c (operand_general_constraint_met_p): Handle
	AARCH64_OPND_CLASS_COND and AARCH64_OPND_COND1.
	(aarch64_print_operand): Handle AARCH64_OPND_COND1.
	* aarch64-tbl.h (aarch64_opcode_table): Use COND1 instead of
	COND for cinc, cset, cinv, csetm and cneg.
	(AARCH64_OPERANDS): Add entry for AARCH64_OPND_COND1.
	* aarch64-asm-2.c: Re-generated.
	* aarch64-dis-2.c: Ditto.
	* aarch64-opc-2.c: Ditto.
2013-11-05 20:50:18 +00:00
Yufeng Zhang
4e50d5f863 opcodes/
* aarch64-opc.c (set_syntax_error): New function.
	(operand_general_constraint_met_p): Replace set_other_error
	with set_syntax_error.

gas/testsuite/

	* gas/aarch64/diagnostic.s: Add tests of ldp/stp.
	* gas/aarch64/diagnostic.l: Update.
2013-11-05 20:46:24 +00:00
Will Newton
8db49cc2de config/tc-aarch64.c: Avoid trying to parse a vector mov as immediate.
Parsing a vector mov instruction currently leads to a phantom undefined
symbol being added to the symbol table. e.g.:

       .text
       mov     x0, v0.D[0]

Produces an undefined symbol called "v0.D".

gas/ChangeLog:

2013-11-05  Will Newton  <will.newton@linaro.org>

	PR gas/16103
	* config/tc-aarch64.c (parse_operands): Avoid trying to
	parse a vector register as an immediate.

gas/testsuite/ChangeLog:

2013-11-05  Will Newton  <will.newton@linaro.org>

	* gas/aarch64/advsimd-mov-bad.d: New file.
	* gas/aarch64/advsimd-mov-bad.s: Likewise.
2013-11-05 14:28:30 +00:00
Jan Beulich
e4630f71b2 x86-64/gas: fix an asymmetry in suffix/register checking
Without this, constructs like "orw %rax, (%rax)" aren't being rejected
(other than any other wrong suffix/register combination).

gas/
2013-11-04  Jan Beulich <jbeulich@suse.com>

	* config/tc-i386.c (check_long_reg): Correct comment indentation.
	(check_qword_reg): Correct comment and its indentation.
	(check_word_reg): Extend comment and correct its indentation. Also
	check for 64-bit register.

gas/testsuite/
2013-11-04  Jan Beulich <jbeulich@suse.com>

	* gas/i386/x86-64-suffix-bad.[sl]: New.
	* gas/i386/i386.exp: Run new test.
2013-11-04 16:05:39 +01:00
Alan Modra
c7c3f80e9c Assorted x86 testsuite fixes.
I think HJ has already fixed the binutils and ld tests with his
2013-09-27 readelf change, but this allows them to pass with wider
address output as per Nick's 2013-09-12 readelf change.

binutils/testsuite/
	* binutils-all/x86-64/compressed-1a.d: Allow wide display of addresses.
gas/testsuite/
	* gas/cfi/cfi-x86_64.d: Match when lacking end of section padding.
ld/testsuite/
	* ld-pe/cfi.d: Allow wide display of addresses.
2013-11-02 15:31:16 +10:30
Alan Modra
6911b7dcb8 Add ELFv2 .localentry support.
This defines the ELF symbol st_other field used to encode the number
of instructions between a function "global entry" and its "local entry",
and adds support related to the local entry offset.

include/elf/
	* ppc64.h (STO_PPC64_LOCAL_BIT, STO_PPC64_LOCAL_MASK): Define.
	(ppc64_decode_local_entry, ppc64_encode_local_entry): New functions.
	(PPC64_LOCAL_ENTRY_OFFSET, PPC64_SET_LOCAL_ENTRY_OFFSET): Define.
bfd/
	* elf64-ppc.c (struct ppc_stub_hash_entry): Add "other".
	(stub_hash_newfunc): Init new ppc_stub_hash_entry field, and one
	we forgot, "plt_ent".
	(ppc64_elf_add_symbol_hook): Check ELFv1 objects don't have
	st_other bits only valid in ELFv2.
	(ppc64_elf_merge_symbol_attribute): New function.
	(ppc_type_of_stub): Add local_off param to test branch range.
	(ppc_build_one_stub): Adjust destinations for ELFv2 locals.
	(ppc_size_one_stub, toc_adjusting_stub_needed): Similarly.
	(ppc64_elf_size_stubs): Pass local_off to ppc_type_of_stub.
	Set "other" field.
	(ppc64_elf_relocate_section): Adjust destination for ELFv2 local
	calls.
gas/
	* config/tc-ppc.c (md_pseudo_table): Add .localentry.
	(ppc_elf_localentry): New function.
	(ppc_force_relocation): Force relocs on all branches to localenty
	symbols.
	(ppc_fix_adjustable): Don't reduce such symbols to section+offset.
binutils/
	* readelf.c (get_ppc64_symbol_other): New function.
	(get_symbol_other): Use it for EM_PPC64.
2013-10-30 13:40:21 +10:30
Alan Modra
ee67d69a3f Add .abiversion related support for ELFv2
Defines bits in ELF e_flags to differentiate ELFv2 objects from ELFv2,
adds .abiversion directive to explicitly choose the ABI, and code to
check and automatically select ABI.

include/elf/
	* ppc64.h (EF_PPC64_ABI): Define.
bfd/
	* elf64-ppc.c (abiversion, set_abiversion): New functions.
	(ppc64_elf_get_synthetic_symtab): Handle ELFv2 objects without .opd.
	(struct ppc_link_hash_table): Add opd_abi.
	(ppc64_elf_check_relocs): Check no .opd with ELFv2.
	(ppc64_elf_merge_private_bfd_data): New function.
	(ppc64_elf_print_private_bfd_data): New function.
	(ppc64_elf_tls_setup): Set htab->opd_abi.
	(ppc64_elf_size_dynamic_sections): Don't emit OPD related dynamic
	tags for ELFv2.
	(ppc_build_one_stub): Use R_PPC64_IRELATIVE for ELFv2 ifunc.
	(ppc64_elf_finish_dynamic_symbol): Likewise
binutils/
	* readelf.c (get_machine_flags): Display ABI version for EM_PPC64.
gas/
	* config/tc-ppc.c: Include elf/ppc64.h.
	(ppc_abiversion): New variable.
	(md_pseudo_table): Add .abiversion.
	(ppc_elf_abiversion, ppc_elf_end): New functions.
	* config/tc-ppc.h (md_end): Define.
2013-10-30 13:37:47 +10:30
Alan Modra
f9c6b9078c Report overflow on PowerPC64 @h and @ha relocations.
This changes the behaviour of @h and @ha on PowerPC64 to report errors
on 32-bit overflow.  The motivation for this change is that on
PowerPC64, most uses of @h and @ha modifiers and their corresponding
relocations are to build up 32-bit offsets.  We'd like to know when
such offsets overflow.  Only rarely do people use @h or @ha with the
high 32-bit modifiers to build a 64-bit constant.  Those uses will now
need to use two new modifiers, @high and @higha, if the constant isn't
known at assembly time.  For now, we won't report overflow at assembly
time..

This also fixes an error when applying some of the HIGHER and HIGHEST
relocations.

include/elf/
	* ppc64.h (R_PPC64_ADDR16_HIGH, R_PPC64_ADDR16_HIGHA,
	R_PPC64_TPREL16_HIGH, R_PPC64_TPREL16_HIGHA,
	R_PPC64_DTPREL16_HIGH, R_PPC64_DTPREL16_HIGHA): New.
	(IS_PPC64_TLS_RELOC): Match new tls relocs.
bfd/
	* reloc.c (BFD_RELOC_PPC64_ADDR16_HIGH, BFD_RELOC_PPC64_ADDR16_HIGHA,
	BFD_RELOC_PPC64_TPREL16_HIGH, BFD_RELOC_PPC64_TPREL16_HIGHA,
	BFD_RELOC_PPC64_DTPREL16_HIGH, BFD_RELOC_PPC64_DTPREL16_HIGHA): New.
	* elf64-ppc.c (ppc64_elf_howto_raw): Add entries for new relocs.
	Make all _HA and _HI relocs report signed overflow.
	(ppc64_elf_reloc_type_lookup): Handle new relocs.
	(must_be_dyn_reloc, ppc64_elf_check_relocs): Likewise.
	(dec_dynrel_count, ppc64_elf_relocate_section): Likewise.
	(ppc64_elf_relocate_section): Don't apply 0x8000 adjust to
	R_PPC64_TPREL16_HIGHER, R_PPC64_TPREL16_HIGHEST,
	R_PPC64_DTPREL16_HIGHER, and R_PPC64_DTPREL16_HIGHEST.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Regenerate.
gas/
	* config/tc-ppc.c (SEX16): Don't mask.
	(REPORT_OVERFLOW_HI): Define as zero.
	(ppc_elf_suffix): Support @high, @higha, @dtprel@high, @dtprel@higha,
	@tprel@high, and @tprel@higha modifiers.
	(md_assemble): Ignore X_unsigned when applying 16-bit insn fields.
	Add (disabled) code to check @h and @ha reloc overflow for powerpc64.
	Handle new relocs.
	(md_apply_fix): Similarly.
elfcpp/
	* powerpc.h (R_PPC64_ADDR16_HIGH, R_PPC64_ADDR16_HIGHA,
	R_PPC64_TPREL16_HIGH, R_PPC64_TPREL16_HIGHA,
	R_PPC64_DTPREL16_HIGH, R_PPC64_DTPREL16_HIGHA): Define.
gold/
	* powerpc.cc (Target_powerpc::Scan::check_non_pic): Handle new relocs.
	(Target_powerpc::Scan::global, local): Likewise.
	(Target_powerpc::Relocate::relocate): Likewise.  Check for overflow
	on all ppc64 @h and @ha relocs.
2013-10-30 13:33:15 +10:30
Jan Beulich
34a79995c4 ld/ELF: refine fake STT_FILE symbol emission
There's no real need to emit these always: They're needed only if we
indeed want to emit a localized symbol. Hence defer emission until we
at least did the basic early checks that would lead to no such symbol
getting emitted. This in particular avoids emitting such a symbol in
the majority of (if not all) "ld -r" cases.

I hope my set of cross build tests caught all the test cases needing
adjustment - please forgive if I missed a few.

bfd/
2013-10-29  Jan Beulich <jbeulich@suse.com>

	* elflink.c (struct elf_outext_info): Add field file_sym_done.
	(bfd_elf_final_link): Initialize new field. Move fake STT_FILE
	symbol emission from here ...
	(elf_link_output_extsym): ... to here.

gas/testsuite/
2013-10-29  Jan Beulich <jbeulich@suse.com>

	* gas/microblaze/relax_size.elf: Drop expectation of no longer
	present STT_FILE symbol.
	* gas/microblaze/relax_size2.elf: Likewise.

ld/testsuite/
2013-10-29  Jan Beulich <jbeulich@suse.com>

	* ld-cris/tls-e-tpoffcomm1.d: Drop expectation of no longer
	present STT_FILE symbol.
	* ld-mmix/bpo-18.d: Likewise.
	* ld-mmix/bpo-22.d: Likewise.
	* ld-mmix/greg-6.d: Likewise.
	* ld-mmix/greg-7.d: Likewise.
	* ld-mmix/loc4.d: Likewise.
	* ld-mmix/local1.d: Likewise.
	* ld-mmix/local3.d: Likewise.
	* ld-mmix/local5.d: Likewise.
	* ld-mmix/local7.d: Likewise.
	* ld-mmix/loct-1.d: Likewise.
	* ld-sh/sh64/abi32.xd: Likewise.
	* ld-sh/sh64/abi64.xd: Likewise.
	* ld-sh/sh64/cmpct1.xd: Likewise.
	* ld-sh/sh64/crange1.rd: Likewise.
	* ld-sh/sh64/crange2.rd: Likewise.
	* ld-sh/sh64/crange3-cmpct.rd: Likewise.
	* ld-sh/sh64/crange3-media.rd: Likewise.
	* ld-sh/sh64/crange3.rd: Likewise.
	* ld-sh/sh64/crangerel1.rd: Likewise.
	* ld-sh/sh64/crangerel2.rd: Likewise.
	* ld-sh/sh64/mix1.xd: Likewise.
	* ld-sh/sh64/mix2.xd: Likewise.
	* ld-sh/sh64/shdl32.xd: Likewise.
	* ld-sh/sh64/shdl64.xd: Likewise.
2013-10-29 17:52:24 +01:00
Yao Qi
09c1234798 Change mode of gas/configure back to 0755 2013-10-25 14:03:00 +00:00
Yao Qi
98322bfaf3 Fix changelog.
gdb/

	Add changelog entry for my previous commit.
2013-10-25 14:03:00 +00:00
Chao-ying Fu
cbfebe3c73 2013-10-18 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
* gas/mips/micromips@msa-branch.d, gas/mips/msa-branch.d,
	gas/mips/msa-branch.s: New.
	* gas/mips/mips.exp: Run new tests.
2013-10-18 21:16:57 +00:00
Chao-ying Fu
9d5de888d6 2013-10-18 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
* config/tc-mips.c (fpr_read_mask): Test MSA registers.
	(fpr_write_mask): Test MSA registers.
	(can_swap_branch_p): Check fpr write followed by fpr read.
2013-10-18 21:14:25 +00:00
Nick Clifton
3fc1d03899 * config/tc-tic6x.c (tic6x_parse_operand): Revert previous delta. 2013-10-18 14:08:00 +00:00
Ramana Radhakrishnan
8518117318 Fix neon vshll disassembly.
opcodes/
2013-10-15  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

	* arm-dis.c (neon_opcodes): Adjust print string for vshll.

gas/testsuite/
2013-10-15  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

	* gas/arm/neon-cov.d: Adjust output.
2013-10-15 13:30:40 +00:00
Nick Clifton
02fb297036 revert previous delta. 2013-10-15 08:32:36 +00:00
Chao-ying Fu
ec0c61e317 2013-10-14 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
* gas/mips/micromips@msa-relax.d, gas/mips/micromips@msa.d,
	gas/mips/micromips@msa64.d, gas/mips/msa-relax.d,
	gas/mips/msa-relax.l, gas/mips/msa-relax.s,
	gas/mips/msa.d, gas/mips/msa.s, gas/mips/msa64.d,
	gas/mips/msa64.s: New.
	* gas/mips/mips.exp: Run new tests.
2013-10-14 19:06:20 +00:00
Chao-ying Fu
56d438b172 2013-10-14 Richard Sandiford <rdsandiford@googlemail.com>
Chao-ying Fu  <Chao-ying.Fu@imgtec.com>

	* config/tc-mips.c (options): Add OPTION_MSA and OPTION_NO_MSA.
	(md_longopts): Add mmsa and mno-msa.
	(mips_ases): Add msa.
	(RTYPE_MASK): Update.
	(RTYPE_MSA): New define.
	(OT_REG_ELEMENT): Replace with...
	(OT_INTEGER_INDEX, OT_REG_INDEX): ...these new operand types.
	(mips_operand_token): Replace reg_element with index.
	(mips_parse_argument_token): Treat vector indices as separate tokens.
	Handle register indices.
	(md_begin): Add MSA register names.
	(operand_reg_mask): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
	(convert_reg_type): Handle cases for OP_REG_MSA and OP_REG_MSA_CTRL.
	(match_mdmx_imm_reg_operand): Update accordingly.
	(match_imm_index_operand): New function.
	(match_reg_index_operand): New function.
	(match_operand): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
	(md_convert_frag): Convert bz.b/h/w/d, bnz.b/h/w/d, bz.v bnz.v.
	(md_show_usage): Print -mmsa and -mno-msa.
	* doc/as.texinfo: Document -mmsa and -mno-msa.
	* doc/c-mips.texi: Document -mmsa and -mno-msa.
	Document .set msa and .set nomsa.
2013-10-14 18:50:54 +00:00
Nick Clifton
b2e951ec58 * gen-aout.c (main): Fix formatting. Close file.
* emultempl/aix.em (_read_file): Close file at end of function.

	* gas/all/itbl-test.c (main): Close fas.

	* read.c (add_include_dir): Use xrealloc.
	* config/tc-score.c (do_macro_bcmp): Initialise inst_main.
	* config/tc-tic6x.c (tic6x_parse_operand): Initialise second_reg.

	* readelf.c (decode_arm_unwind): Initialise addr structure.
	(process_symbol_table): Free lengths.
	* srcconv.c (wr_sc): Free info.

	* chew.c (perform): Free next.
2013-10-14 09:15:09 +00:00
Sandra Loosemore
ae335a4e26 2013-10-13 Sandra Loosemore <sandra@codesourcery.com>
opcodes/
	* nios2-opc.c (nios2_builtin_reg): Use "sstatus" rather than "ba"
	as the primary name of r30.

	gas/
	* config/tc-nios2.c (nios2_consume_arg): Make the "ba" warning
	also test/refer to "sstatus".  Reformat the warning message.

	gas/testsuite/
	* gas/nios2/warn_nobreak.l: Update text of warning messages.
	* gas/nios2/registers.s: Use "sstatus" rather than "ba"
	as the primary name of r30.
	* gas/nios2/registers.d: Likewise.
2013-10-14 00:42:28 +00:00
H.J. Lu
6c75cc62a3 Only allow 32-bit/64-bit registers for bndcl/bndcu/bndcn
gas/testsuite/

	* gas/i386/mpx.s: Remove bndcl/bndcu/bndcn tests with AX.
	* gas/i386/x86-64-mpx.s: Likwise.

	* gas/i386/mpx.d: Updated.
	* gas/i386/x86-64-mpx.d: Likewise.

opcodes/

	* i386-dis.c (intel_operand_size): Move v_bnd_mode alongside the
	default case.
	(OP_E_register): Move v_bnd_mode alongside m_mode.
	* i386-opc.tbl (bndcl, bndcu, bndcn): Split 32- and 64-bit variants.
	Drop Reg16 and Disp16. Add NoRex64.
	(bndmk, bndmov, bndldx, bndstx): Drop Disp16.
	* i386-tbl.h: Re-generate.
2013-10-12 15:57:07 +00:00
Sean Keys
0e1c243401 * Removed short_hand field from opcode table and
refactored assembler/disassember accordingly.
     Testsuite checkout OK.
2013-10-11 04:55:42 +00:00
Sean Keys
848e5d082d * gas/xgate/all_insns.d: Add com macro insn test.
* gas/xgate/all_insns.s: Add com macro insn test.
2013-10-11 01:41:49 +00:00
Jan Beulich
47cd3fa7ee gas/
2013-10-10  Jan Beulich <jbeulich@suse.com>

	* tc-i386-intel.c (i386_intel_simplify_register): Suppress base/index
	swapping for bndmk, bndldx, and bndstx.
2013-10-10 12:22:41 +00:00
Nick Clifton
b7b2bb1d1c PR gas/16025
* config/tc-epiphany.c (md_convert_frag): Add missing break
	statement.
2013-10-09 16:10:11 +00:00
Nick Clifton
6085f85378 PR gas/16026
* config/tc-mn10200.c (md_convert_frag): Add missing break
	statement.
2013-10-09 15:52:32 +00:00
Jan Beulich
cecf14249d gas/
2013-10-08  Jan Beulich <jbeulich@suse.com>

	* tc-i386.c (check_word_reg): Remove misplaced "else".
	(check_long_reg): Restore symmetry with check_word_reg.
2013-10-08 15:21:58 +00:00
Jan Beulich
d3bfe16eaf gas/
2013-10-08  Jan Beulich <jbeulich@suse.com>

	* gas/config/tc-arm.c (do_t_push_pop): Honor inst.size_req. Simplify
	LR/PC check.

gas/testsuite/
2013-10-08  Jan Beulich <jbeulich@suse.com>

	* gas/arm/thumb-w-good.s: Add PUSH.W and POP.W tests.
	* gas/arm/thumb-w-good.d: Update accordingly.
2013-10-08 08:55:41 +00:00
Nick Clifton
38d7754573 * config/tc-msp430.c (msp430_operands): Accept "<foo>.a" as an alias
for "<foo>a".  Issue error messages for unrecognised or corrrupt
	size extensions.

	* gas/msp430/bad.s: New test: Checks erroneous size extensions.
	* gas/msp430/bad.d: New test command file.
	* gas/msp430/bad.l: New file: Expected error messages.
	* gas/msp430/msp430.exp: Run the new test.
	* gas/msp430/msp430x.s: Add "<foo>.a" aliases of "<foo>a"
	instructions.
	* gas/msp430/msp430x.d: Update expected disassembly.
2013-10-08 08:06:35 +00:00
Chao-ying Fu
58b239d861 2013-10-07 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
* gas/mips/micromips@virt64.d: Fix dmfgc0 and dmtgc0.
2013-10-07 18:03:24 +00:00
Kyrylo Tkachov
fe8b4cc358 [gas/]
2013-10-04  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/tc-arm.c (do_t_mvn_tst): Use narrow form for tst when
	possible.


[gas/testsuite/]
2013-10-04  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* gas/arm/thumb2_it.s: Add test for narrow tst.
	* gas/arm/thumb2_it.d: Update expected output.
	* gas/arm/thumb2_it_auto.d: Likewise.
2013-10-04 15:26:18 +00:00
Saravanan Ekanathan
c7b0bd56ce Add AMD bdver4 support.
gas/
	* config/tc-i386.c (cpu_arch): Add CPU_BDVER4_FLAGS.
	* doc/c-i386.texi: Add -march=bdver4 option.

gas/testsuite/
	* gas/i386/i386.exp: Run bdver4 test cases.
	* gas/i386/nops-1-bdver4.d: New.
	* gas/i386/arch-10-bdver4.d: New.
	* gas/i386/x86-64-nops-1-bdver4.d: New.
	* gas/i386/x86-64-arch-2-bdver4.d: New.

opcodes/
	* i386-gen.c (cpu_flag_init): Add CPU_BDVER4_FLAGS.
	* i386-init.h: Regenerated.
2013-09-30 17:02:07 +00:00
Alan Modra
cc9afea3e4 * libtool.m4 (_LT_ENABLE_LOCK <ld -m flags>): Remove non-canonical
ppc host match.  Support little-endian powerpc linux hosts.
Regenerate binutils configure files.
2013-09-20 09:51:25 +00:00
Tristan Gingold
58ca03a25d binutils/
2013-09-18  Tristan Gingold  <gingold@adacore.com>

	* NEWS: Add marker for 2.24.

gas/
2013-09-18  Tristan Gingold  <gingold@adacore.com>

	* NEWS: Add marker for 2.24.

ld/
2013-09-18  Tristan Gingold  <gingold@adacore.com>

	* NEWS: Add marker for 2.24.
2013-09-18 10:39:38 +00:00
Nick Clifton
ab90591541 * config/tc-msp430.c (OPTION_MOVE_DATA): Define.
(move_data): New variable.
	(md_parse_option): Parse -md.
	(msp430_section): New function.  Catch references to the .bss or
	.data sections and generate a special symbol for use by the libcrt
	library.
	(md_pseudo_table): Intercept .section directives.
	(md_longopt): Add -md
	(md_show_usage): Likewise.
	(msp430_operands): Generate a warning message if a NOP is inserted
	into the instruction stream.
	* doc/c-msp430.texi (node MSP430 Options): Document -md option.
2013-09-18 07:50:34 +00:00
Steve Ellcey
f1c38003e7 2013-09-17 Doug Gilmore <Doug.Gilmore@imgtec.com>
* config/tc-mips.c (mips_elf_final_processing): Set
	EF_MIPS_FP64 for -mgp32 -mfp64, removing old FIXME.
2013-09-17 21:08:30 +00:00
Richard Sandiford
e3f9e85275 opcodes/
* s390-opc.txt (clih): Make the immediate unsigned.

gas/testsuite/
	* gas/s390/zarch-z196.s, gas/s390/zarch-z196.d: Test CLIH with
	4000000000.
2013-09-17 09:02:37 +00:00
Will Newton
1d50d57ca2 gas/config/tc-arm.c: Fix parsing of NEON load/store element sizes.
The existing code would accept VLD2.64 and similar undefined
instructions.

gas/ChangeLog:

2013-09-16  Will Newton  <will.newton@linaro.org>

	* config/tc-arm.c (do_neon_ld_st_interleave): Add constraint
	disallowing element size 64 with interleave other than 1.

gas/testsuite/ChangeLog:

2013-09-16  Will Newton  <will.newton@linaro.org>

	* gas/arm/neon-ldst-es.d: Add VLD1.64 instructions.
	* gas/arm/neon-ldst-es.s: Likewise.
	* testsuite/gas/arm/neon-ldst-es-bad.d: New file.
	* testsuite/gas/arm/neon-ldst-es-bad.l: Likewise.
	* testsuite/gas/arm/neon-ldst-es-bad.s: Likewise.
2013-09-16 09:34:30 +00:00
Chao-ying Fu
6f72df7710 2013-09-12 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
* gas/mips/bltzal.s: New file.
	* gas/mips/bltzal.l: New file.
	* gas/mips/mips.exp: Run the bltzal test.
2013-09-12 21:45:04 +00:00
Chao-ying Fu
173d34478a 2013-09-12 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
* config/tc-mips.c (match_insn): Set error when $31 is used for
	bltzal* and bgezal*.
2013-09-12 21:41:09 +00:00
Nick Clifton
bf5117e32d * dwarf.c (dwarf_vmatoa): Rename to dwarf_vmatoa_1 and add a
precision parameter.
	(dwarf_vmatoa): New wrapper for dwarf_vmatoa_1.
	(print_dwarf_vma): Use dwarf_vmatoa_1.
	(SAFE_BYTE_GET): Add check that VAL is big enough to contain
	AMOUNT bytes.
	(process_debug_info): Use an unsigned int for the offset size.
	(process_debug_pubnames): Likewise.
	(display_debug_aranges): Likewise.
	(struct Frame_Chunk): Use dwarf_vma type for pc_begin and pc_range
	fields.
	(frame_display_row): Use print_dwarf_vma to display dwarf_vma
	values.
	(display_debug_frames): Likewise.

	* binutils-all/x86-64/compressed-1a.d: Update expected output to
	allow for 64-bit addresses.

	* ld-elf/eh1.d: Update expected output to allow for
	64-bit addresses.
	* ld-elf/eh2.d: Likewise.
	* ld-elf/eh3.d: Likewise.
	* ld-elf/eh4.d: Likewise.
	* ld-elf/eh5.d: Likewise.
	* ld-elf/eh6.d: Likewise.
	* ld-mips-elf/eh-frame1-n64.d: Likewise.
	* ld-mips-elf/eh-frame2-n64.d: Likewise.
	* ld-mips-elf/eh-frame3.d: Likewise.

	* gas/cfi/cfi-alpha-1.d: Update expected output to allow for
	64-bit addresses.
	* gas/cfi/cfi-alpha-3.d: Likewise.
	* gas/cfi/cfi-arm-1.d: Likewise.
	* gas/cfi/cfi-common-1.d: Likewise.
	* gas/cfi/cfi-common-2.d: Likewise.
	* gas/cfi/cfi-common-3.d: Likewise.
	* gas/cfi/cfi-common-4.d: Likewise.
	* gas/cfi/cfi-common-5.d: Likewise.
	* gas/cfi/cfi-common-6.d: Likewise.
	* gas/cfi/cfi-common-7.d: Likewise.
	* gas/cfi/cfi-hppa-1.d: Likewise.
	* gas/cfi/cfi-i386-2.d: Likewise.
	* gas/cfi/cfi-i386.d: Likewise.
	* gas/cfi/cfi-m68k.d: Likewise.
	* gas/cfi/cfi-mips-1.d: Likewise.
	* gas/cfi/cfi-ppc-1.d: Likewise.
	* gas/cfi/cfi-s390-1.d: Likewise.
	* gas/cfi/cfi-s390x-1.d: Likewise.
	* gas/cfi/cfi-sh-1.d: Likewise.
	* gas/cfi/cfi-sparc-1.d: Likewise.
	* gas/cfi/cfi-sparc64-1.d: Likewise.
	* gas/cfi/cfi-x86_64.d: Likewise.
2013-09-12 09:14:47 +00:00
Tristan Gingold
ac21e7da5d gas/
* config/tc-ppc.c (md_apply_fix): Handle defined after use toc
	symbols.

gas/testsuite/
	* gas/ppc/aix.exp: Run xcoff-toc-1 test.
	* gas/ppc/xcoff-toc-1.s, gas/ppc/xcoff-toc-1.d: New test.
2013-09-04 12:28:11 +00:00
Nick Clifton
74db7efbe3 PR gas/15914
* config/tc-arm.c (T16_32_TAB): Add _udf.
	(do_t_udf): New function.
	(insns): Add "udf".

	* gas/arm/udf-bad.s: New file.
	* gas/arm/udf-bad.d: New file.
	* gas/arm/udf-bad.l: New file.
	* gas/arm/udf.s: New file.
	* gas/arm/udf.d: New file.
	* gas/arm/udf.l: New file.

	* arm-dis.c (arm_opcodes): Add udf.
	(thumb_opcodes): Use "udf" mnemonic rather than UNDEFINED_INSTRUCTION.
	(thumb32_opcodes): Add udf.w.
	(print_insn_thumb32): Handle %H as the thumb32_opcodes comment says.
2013-09-04 07:59:33 +00:00
Nick Clifton
7e10503172 * aarch64-opc.c (aarch64_logical_immediate_p): Return FALSE if the
immediate is not suitable for the 32-bit ABI.

	* gas/aarch64/illegal.s: Add illegal constant for logical
	operation.
	* gas/aarch64/illegal.l: Add expected error message.
2013-08-28 10:25:36 +00:00
DJ Delorie
664a88c6c2 * config/rx-parse.y: Rearrange the components of a bison grammar to issue
assembler errors at correct position.
2013-08-23 21:29:27 +00:00
Maciej W. Rozycki
fb6f389526 opcodes/
* micromips-opc.c (micromips_opcodes): Use RD_4 for "alnv.ps",
	replacing NODS.

	gas/testsuite/
	* gas/testsuite/gas/mips/micromips-insn32.d: Adjust for delay
	slot scheduling of ALNV.PS.
	* gas/testsuite/gas/mips/micromips-noinsn32.d: Likewise.
	* gas/testsuite/gas/mips/micromips-trap.d: Likewise.
	* gas/testsuite/gas/mips/micromips.d: Likewise.
	* gas/testsuite/gas/mips/micromips@alnv_ps-swap.d: Likewise.
2013-08-23 14:12:59 +00:00
Nick Clifton
9aff4b7ac1 PR binutils/15834
Fix typos:
---
 bfd/bfdio.c                                  |  2 +-
 bfd/elf32-spu.c                              |  2 +-
 bfd/elfnn-aarch64.c                          |  2 +-
 binutils/od-xcoff.c                          |  2 +-
 config/tcl.m4                                |  2 +-
 gas/config/tc-ia64.c                         |  2 +-
 gas/config/tc-sparc.c                        |  2 +-
 gas/config/tc-z80.c                          | 12 ++++++------
 gas/doc/c-i386.texi                          |  6 +++---
 gas/doc/c-m32r.texi                          |  2 +-
 gas/testsuite/gas/d10v/instruction_packing.d |  2 +-
 gas/testsuite/gas/z80/atend.d                |  2 +-
 gold/object.h                                |  2 +-
 include/gdb/remote-sim.h                     |  2 +-
 include/opcode/ChangeLog                     |  2 +-
 include/opcode/i960.h                        |  2 +-
 ld/testsuite/ld-mips-elf/mips16-pic-1.inc    |  2 +-
 opcodes/aarch64-asm.c                        |  2 +-
 opcodes/aarch64-dis.c                        |  2 +-
 opcodes/msp430-dis.c                         |  2 +-
2013-08-23 07:54:19 +00:00
Will Newton
4f2374c7fa gas/config/tc-arm.c: Improve validation of NEON addressing modes.
NEON vector load and store instructions do not accept immediates
or pre-indexed base plus offset addressing modes, so make sure that
the assembler enforces this.

gas/ChangeLog:

2013-08-23  Will Newton  <will.newton@linaro.org>

	* config/tc-arm.c (do_neon_ldx_stx): Add extra constraints
	for pre-indexed addressing modes.
	* testsuite/gas/arm/neon-addressing-bad.l: Add test for
	VLDn and VSTn instructions.
	* testsuite/gas/arm/neon-addressing-bad.s: Likewise.

gas/testsuite/ChangeLog:

2013-08-23  Will Newton  <will.newton@linaro.org>

	* testsuite/gas/arm/neon-addressing-bad.l: Add test for
	VLDn and VSTn instructions.
	* testsuite/gas/arm/neon-addressing-bad.s: Likewise.
2013-08-23 07:16:56 +00:00
Alan Modra
b4e6cb8052 * symbols.c (fb_label_instance_inc, fb_label_instance): Properly
range check label number for use with fb_low_counter array.
2013-08-21 05:55:13 +00:00
Richard Sandiford
1661c76c19 gas/
* config/tc-mips.c (mips_check_isa_supports_ase, reg_lookup)
	(mips_parse_argument_token, validate_micromips_insn, md_begin)
	(check_regno, match_float_constant, check_completed_insn, append_insn)
	(match_insn, match_mips16_insn, match_insns, macro_start)
	(macro_build_ldst_constoffset, load_register, macro, mips_ip)
	(mips16_ip, mips_set_option_string, md_parse_option)
	(mips_after_parse_args, mips_after_parse_args, md_pcrel_from)
	(md_apply_fix, s_align, s_option, s_mipsset, s_tls_rel_directive)
	(s_gpword, s_gpdword, s_ehword, s_nan, tc_gen_reloc, md_convert_frag)
	(s_mips_end, s_mips_ent, s_mips_frame, s_mips_mask, mips_parse_cpu):
	Start error messages with a lower-case letter.  Do not end error
	messages with a period.  Wrap long messages to 80 character-lines.
	Use "cannot" instead of "can't" and "can not".

gas/testsuite/
	* gas/mips/ase-errors-1.l, gas/mips/ase-errors-2.l,
	gas/mips/ase-errors-3.l, gas/mips/ase-errors-4.l, gas/mips/at-2.l,
	gas/mips/baddata1.l, gas/mips/elf-rel30.l, gas/mips/illegal.l,
	gas/mips/jalr.l, gas/mips/ldstla-32-1.l, gas/mips/ldstla-32-mips3-1.l,
	gas/mips/lui-1.l, gas/mips/macro-warn-1.l, gas/mips/macro-warn-1-n32.l,
	gas/mips/macro-warn-2.l, gas/mips/macro-warn-3.l,
	gas/mips/macro-warn-4.l, gas/mips/micromips-branch-delay.l,
	gas/mips/micromips-branch-relax.l,
	gas/mips/micromips-branch-relax-pic.l, gas/mips/micromips-ill.l,
	gas/mips/micromips.l, gas/mips/micromips-size-0.l,
	gas/mips/micromips-size-1.l, gas/mips/micromips-warn-branch-delay.l,
	gas/mips/micromips-warn.l, gas/mips/mips16e-64.l,
	gas/mips/mips16e-save-err.l, gas/mips/mips1-fp.l,
	gas/mips/mips32r2-fp32.l, gas/mips/mips32r2-ill.l,
	gas/mips/mips32-sf32.l, gas/mips/mips4-branch-likely.l,
	gas/mips/mips4-fp.l, gas/mips/mips5-fp.l, gas/mips/mips64-mips3d.l,
	gas/mips/mips-double-float-flag.l, gas/mips/mips-gp64-fp32.l,
	gas/mips/mips-gp64-fp64.l, gas/mips/mips-hard-float-flag.l,
	gas/mips/mips-macro-ill-nofp.l, gas/mips/mips-macro-ill-sfp.l,
	gas/mips/nan-error-1.l, gas/mips/nan-error-2.l, gas/mips/noat-2.l,
	gas/mips/noat-3.l, gas/mips/noat-4.l, gas/mips/noat-5.l,
	gas/mips/noat-6.l, gas/mips/noat-7.l, gas/mips/octeon-ill.l,
	gas/mips/r5900-error-vu0.l, gas/mips/r5900-nollsc.l,
	gas/mips/relax-bc1any.l, gas/mips/relax-bposge.l, gas/mips/relax.l,
	gas/mips/relax-swap1.l, gas/mips/relax-swap2.l, gas/mips/set-arch.l,
	gas/mips/tls-ill.l, gas/mips/vr5400-ill.l: Adjust expected output.
2013-08-19 20:07:10 +00:00
Richard Sandiford
b0e6f033d5 gas/
* config/tc-mips.c (imm_expr): Expand comment.
	(set_at, macro, mips16_macro): Expect imm_expr to be O_constant
	when populated.
2013-08-19 19:58:47 +00:00
Richard Sandiford
e423441da4 include/opcode/
* mips.h: Remove references to "+I" and imm2_expr.

gas/
	* config/tc-mips.c (imm2_expr): Delete.
	(md_assemble, match_insn, imm2_expr.X_op, mips_ip): Update accordingly.
2013-08-19 19:56:44 +00:00
Richard Sandiford
5e0dc5bae9 include/opcode/
* mips.h (M_DEXT, M_DINS): Delete.

opcodes/
	* micromips-opc.c (micromips_opcodes): Replace "dext" and "dins"
	macro entries with "dextm", "dextu", "dinsm" and "dinsu" aliases.
	Use +H rather than +C for the real "dext".
	* mips-opc.c (mips_builtin_opcodes): Likewise.

gas/
	* config/tc-mips.c (report_bad_range, report_bad_field): Delete.
	(macro): Remove M_DEXT and M_DINS handling.

gas/testsuite/
	* gas/mips/ext-ill.l, gas/mips/mips64r2-ill.l: Expect DEXT and DINS
	error messages to have the same form as the EXT and INS ones.
	* gas/mips/micromips-insn32.d, gas/mips/micromips-noinsn32.d,
	gas/mips/micromips-trap.d, gas/mips/micromips.d,
	gas/mips/micromips@mips64r2.d, gas/mips/mips64r2.d: Expect
	"dext" and "dins" instead of "dextm", "dextu", "dinsm" and "dinsu".
2013-08-19 19:54:41 +00:00
Richard Sandiford
60f20e8ba8 gas/
* config/tc-mips.c (mips_arg_info): Replace allow_nonconst and
	lax_max with lax_match.
	(match_int_operand): Update accordingly.  Don't report an error
	for !lax_match-only cases.
	(match_insn): Replace more_alts with lax_match and use it to
	initialize the mips_arg_info field.  Add a complete_p parameter.
	Handle implicit VU0 suffixes here.
	(match_invalid_for_isa, match_insns, match_mips16_insns): New
	functions.
	(mips_ip, mips16_ip): Use them.
2013-08-19 19:42:50 +00:00
Richard Sandiford
d436c1c2e8 gas/
* config/tc-mips.c (match_expression):  Report uses of registers here.
	Add a "must be an immediate expression" error.  Handle elided offsets
	here rather than...
	(match_int_operand): ...here.

gas/testsuite/
	* gas/mips/octeon-ill.l: Adjust expected output.
	* gas/mips/lui-1.l, gas/mips/lui-1.s: Add more cases.
2013-08-19 19:30:37 +00:00
Richard Sandiford
1a00e61226 gas/
* config/tc-mips.c (mips_arg_info): Remove soft_match.
	(match_out_of_range, match_not_constant): New functions.
	(match_const_int): Remove fallback parameter and check for soft_match.
	Use match_not_constant.
	(match_mapped_int_operand, match_addiusp_operand)
	(match_perf_reg_operand, match_save_restore_list_operand)
	(match_mdmx_imm_reg_operand): Update accordingly.  Use
	match_out_of_range and set_insn_error* instead of as_bad.
	(match_int_operand): Likewise.  Use match_not_constant in the
	!allows_nonconst case.
	(match_float_constant): Report invalid float constants.
	(match_insn, match_mips16_insn): Remove soft_match code.  Rely on
	match_float_constant to check for invalid constants.  Fail the
	match if match_const_int or match_float_constant return false.
	(mips_ip): Update accordingly.
	(mips16_ip): Likewise.  Undo null termination of instruction name
	once lookup is complete.

gas/testsuite/
	* gas/mips/ext-ill.l, gas/mips/lui-1.l, gas/mips/mips16e-64.l,
	gas/mips/mips32r2-ill-fp64.l, gas/mips/mips32r2-ill-nofp.l,
	gas/mips/mips32r2-ill.l, gas/mips/mips64r2-ill.l,
	gas/mips/octeon-ill.l, gas/mips/r5900-error-vu0.l,
	gas/mips/vr5400-ill.l: Adjust expected errors.
	* gas/mips/micromips-size-0.l,
	gas/mips/micromips-size-0.s: Likewise.  Add new tests.
	* gas/mips/mips16e-save-err.s, gas/mips/mips16e-save-err.l: New test.
	* gas/mips/mips.exp: Run it.
2013-08-19 19:26:11 +00:00
Richard Sandiford
e3de51ce11 gas/
* config/tc-mips.c (mips_insn_error_format): New enum.
	(mips_insn_error): New struct.
	(insn_error): Change to a mips_insn_error.
	(clear_insn_error, set_insn_error_format, set_insn_error)
	(set_insn_error_i, set_insn_error_ss, report_insn_error): New
	functions.
	(mips_parse_argument_token, md_assemble, match_insn)
	(match_mips16_insn): Use them instead of manipulating insn_error
	directly.
	(mips_ip, mips16_ip): Likewise.  Simplify control flow.

gas/testsuite/
	* gas/mips/micromips-ill.l: Expect "floating-point expression required"
2013-08-19 19:09:01 +00:00
Richard Sandiford
97d874919c gas/
* config/tc-mips.c (normalize_constant_expr): Move further up file.
	(normalize_address_expr): Likewise.
	(match_insn, match_mips16_insn): New functions, split out from...
	(mips_ip, mips16_ip): ...here.
2013-08-19 19:00:32 +00:00
Richard Sandiford
0f35dbc4d9 include/opcode/
* mips.h (OP_OPTIONAL_REG): New mips_operand_type.
	(mips_optional_operand_p): New function.

opcodes/
	* mips-formats.h (OPTIONAL_REG, OPTIONAL_MAPPED_REG): New macros.
	* micromips-opc.c (decode_micromips_operand): Use OPTIONAL_REG
	and OPTIONAL_MAPPED_REG.
	* mips-opc.c (decode_mips_operand): Likewise.
	* mips16-opc.c (decode_mips16_operand): Likewise.
	* mips-dis.c (print_insn_arg): Handle OP_OPTIONAL_REG.

gas/
	* config/tc-mips.c (operand_reg_mask, match_operand): Handle
	OP_OPTIONAL_REG.
	(mips_ip, mips16_ip): Use mips_optional_operand_p to check
	for optional operands.
2013-08-19 18:57:00 +00:00
Alan Modra
27285eedbd * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc
modifiers generally.
2013-08-16 12:59:32 +00:00
Alan Modra
cbe02d4f39 * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1. 2013-08-16 12:34:46 +00:00
David Edelsohn
3c02c47f97 * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
argument as alignment.
2013-08-14 20:52:55 +00:00
Nick Clifton
4046d87a36 * elf32-rl78.c (rl78_elf_merge_private_bfd_data): Complain if G10
flag bits do not match.
	(rl78_elf_print_private_bfd_data): Describe G10 flag.

	* readelf.c (get_machine_flags): Handle RL78 G10 flag.

	* config/tc-rl78.c (elf_flags): New variable.
	(enum options): Add OPTION_G10.
	(md_longopts): Add mg10.
	(md_parse_option): Parse -mg10.
	(rl78_elf_final_processing): New function.
	* config/tc-rl78.c (tc_final_processing): Define.
	* doc/c-rl78.texi: Document -mg10 option.

	* rl78.c (E_FLAG_RL78_G10): Define.

	* lib/ld-lib.exp (check_shared_lib_support): Note that the RL78
	does not support shared library generation.
2013-08-09 10:40:04 +00:00
Richard Sandiford
ee5734f078 opcodes/
2013-08-06  Jürgen Urban  <JuergenUrban@gmx.de>

	* mips-opc.c (mips_builtin_opcodes): Add a suffixless version of
	VCLIPW.

gas/
2013-08-06  Jürgen Urban  <JuergenUrban@gmx.de>

	* config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
	suffixes to be elided too.
	(mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
	(mips_ip): Assume .xyzw if no VU0 suffix is specified.  Allow +N
	to be omitted too.

gas/testsuite/
2013-08-06  Jürgen Urban  <JuergenUrban@gmx.de>

	* gas/mips/r5900-error-vu0.s, gas/mips/r5900-error-vu0.l,
	gas/mips/r5900-full-vu0.s, gas/mips/r5900-full-vu0.d: Allow
	single-channel suffixes to be elided.
2013-08-06 19:27:07 +00:00
Richard Sandiford
138964030f bfd/
2013-08-05  John Tytgat  <john@bass-software.com>

	* po/BLD-POTFILES.in: Regenerate.
	* po/SRC-POTFILES.in: Likewise.

gas/
2013-08-05  John Tytgat  <john@bass-software.com>

	* po/POTFILES.in: Regenerate.

gprof/
2013-08-05  John Tytgat  <john@bass-software.com>

	* po/POTFILES.in: Regenerate.
2013-08-05 21:58:23 +00:00
Eric Botcazou
d6787ef95c gas/
* config/tc-sparc.c (sparc_arch_types): Add leon.
	(sparc_arch): Move sparc4 around and add leon.
	(sparc_target_format): Document -Aleon.
	* doc/c-sparc.texi: Likewise.
include/
	* opcode/sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_LEON.
opcodes/
	* sparc-dis.c (compute_arch_mask): Set SPARC_OPCODE_ARCH_LEON bit for
	bfd_mach_sparc.
	* sparc-opc.c (MASK_LEON): Define.
	(v6, v6notlet, v7, v8, v6notv9): Add MASK_LEON.
	(letandleon): New macro.
	(v9andleon): Likewise.
	(sparc_opc): Add leon.
	(umac): Enable for letandleon.
	(smac): Likewise.
	(casa): Enable for v9andleon.
	(cas): Likewise.
	(casl): Likewise.
2013-08-05 16:11:07 +00:00
Richard Sandiford
da8bca9157 gas/
* config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
2013-08-05 08:31:48 +00:00