321fd21e2f
gas/
...
2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (md_assemble): Also zap movzx and movsx
suffix for AT&T syntax.
gas/testsuite/
2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.s: Add more tests for movsx and movzx.
* gas/i386/x86_64.s: Likewise.
* gas/i386/inval.s: Remove tests for movsxw and movzxw.
* gas/i386/x86-64-inval.s: Remove tests for movsxb, movsxw,
movsxl, movzxb and movzxw.
* gas/i386/i386.d: Updated.
* gas/i386/inval.l: Likewise.
* gas/i386/x86_64.d: Likewise.
* gas/i386/x86-64-inval.l: Likewise.
opcodes/
2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
* i386-tbl.h: Regenerated.
2008-01-15 18:50:44 +00:00
5c07affcae
gas/
...
2008-01-14 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (match_reg_size): New.
(match_mem_size): Likewise.
(operand_size_match): Likewise.
(operand_type_match): Also clear all size fields.
(match_template): Skip Intel syntax when in AT&T syntax.
Call operand_size_match to check operand size.
(i386_att_operand): Set the mem field to 1 for memory
operand.
(i386_intel_operand): Likewise.
gas/testsuite/
2008-01-14 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.s: Add tests for movsx, movzx and movnti.
* gas/i386/inval.s: Likewise.
* gas/i386/x86_64.s: Likewise.
* gas/i386/x86-64-inval.s: Likewise.
* gas/i386/i386.d: Updated.
* gas/i386/inval.l: Likewise.
* gas/i386/x86_64.d: Likewise.
* gas/i386/x86-64-inval.l: Likewise.
opcodes/
2008-01-14 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Add IntelSyntax.
(operand_types): Add Mem.
* i386-opc.h (IntelSyntax): New.
* i386-opc.h (Mem): New.
(Byte): Updated.
(Opcode_Modifier_Max): Updated.
(i386_opcode_modifier): Add intelsyntax.
(i386_operand_type): Add mem.
* i386-opc.tbl: Remove Reg16 from movnti. Add sizes to more
instructions.
* i386-reg.tbl: Add size for accumulator.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-01-15 01:37:56 +00:00
7d5e4556a3
gas/testsuite/
...
2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* gas/i386/i386.s: Add tests for fnstsw and fstsw.
* gas/i386/inval.s: Likewise.
* gas/i386/x86_64.s: Likewise.
* gas/i386/intel.s: Use word instead of dword on ss.
* gas/i386/x86-64-inval.s: Add tests for fnstsw, fstsw, in
and out.
* gas/i386/prefix.s: Remove invalid fstsw.
* gas/i386/inval.l: Updated.
* gas/i386/intelbad.l: Likewise.
* gas/i386/i386.d: Likewise.
* gas/i386/x86_64.d: Likewise.
* gas/i386/x86-64-inval.l: Likewise.
* gas/i386/prefix.d: Updated.
gas/
2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* config/tc-i386.c (_i386_insn): Update comment.
(operand_type_match): Also clear unspecified.
(operand_type_register_match): Likewise.
(parse_operands): Initialize unspecified.
(i386_intel_operand): Likewise.
(match_template): Check memory and accumulator operand size.
(i386_att_operand): Clear unspecified on register operand.
(intel_e11): Likewise.
(intel_e09): Set operand size and clean unspecified for
"XXX PTR".
opcodes/
2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* i386-gen.c (operand_type_init): Add Dword to
OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64.
(opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
Qword and Xmmword.
(operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
Xmmword, Unspecified and Anysize.
(set_bitfield): Make Mmword an alias of Qword. Make Oword
an alias of Xmmword.
* i386-opc.h (CheckSize): Removed.
(Byte): Updated.
(Word): Likewise.
(Dword): Likewise.
(Qword): Likewise.
(Xmmword): Likewise.
(FWait): Updated.
(OTMax): Likewise.
(i386_opcode_modifier): Remove checksize, byte, word, dword,
qword and xmmword.
(Fword): New.
(TBYTE): Likewise.
(Unspecified): Likewise.
(Anysize): Likewise.
(i386_operand_type): Add byte, word, dword, fword, qword,
tbyte xmmword, unspecified and anysize.
* i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
Tbyte, Xmmword, Unspecified and Anysize.
* i386-reg.tbl: Add size for accumulator.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-01-12 16:05:42 +00:00
50aecf8c5f
2008-01-10 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (match_template): Check processor support
first.
2008-01-10 21:59:46 +00:00
2dbab7d572
2008-01-10 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (match_template): Continue if processor
doesn't match.
2008-01-10 20:53:27 +00:00
417c21b7ba
* config/tc-ia64.c (ia64_convert_frag): Zero-initialize room for
...
unwind personality function address.
2008-01-09 22:36:06 +00:00
45664ddbb0
2008-01-09 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (match_template): Check register size
only when size of operands can be encoded the canonical way.
2008-01-09 16:55:14 +00:00
a761937534
2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (i386_operand): Renamed to ...
(i386_att_operand): This.
(parse_operands): Updated.
2008-01-08 19:51:24 +00:00
e1d4d8936f
gas/
...
2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
* doc/c-i386.texi: Update .att_mnemonic and .intel_mnemonic.
* config/tc-i386.c (set_intel_mnemonic): Set intel_mnemonic
only.
(md_assemble): Remove Intel mode workaround.
(match_template): Check support for old gcc, AT&T mnemonic
and Intel Syntax.
(md_parse_option): Don't set intel_mnemonic to 0 for
OPTION_MOLD_GCC.
gas/testsuite/
2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/intel.s: Add tests for fadd, faddp, fdiv, fdivp,
fdivr, fdivrp, fmul, fmulp, fsub, fsubp, fsubr and fsubrp.
* gas/i386/intel.d: Updated.
* gas/i386/intel.e: Likewise.
opcodes/
2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
ATTSyntax.
* i386-opc.h (IntelMnemonic): Renamed to ..
(ATTSyntax): This
(Opcode_Modifier_Max): Updated.
(i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
and intelsyntax.
* i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
* i386-tbl.h: Regenerated.
2008-01-05 17:07:25 +00:00
23117009d4
2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.h: Update copyright to 2008.
2008-01-04 18:19:12 +00:00
b0e34bfe93
* config/tc-ppc.c (parse_cpu): Preserve the settings of the
...
PPC_OPCODE_ALTIVEC and PPC_OPCODE_SPE flags.
* gas/ppc/altivec_and_spe.s: New test - checks that ISA extension
command line options (-maltivec, -mspe) can be specified before
CPU selection command line options.
* gas/ppc/altivec_and_spe.d: Expected disassembly.
* gas/ppc/ppc.exp: Run the new test
2008-01-04 14:53:50 +00:00
aacd03c3bb
2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (md_assemble): Use !intel_mnemonic instead
of SYSV386_COMPAT.
2008-01-04 01:27:01 +00:00
3629bb00a8
gas/
...
2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
* gas/config/tc-i386.c (cpu_arch_flags_not): Removed.
(cpu_flags_not): Likewise.
(cpu_flags_match): Updated to check 64bit and arch.
(set_code_flag): Remove cpu_arch_flags_not.
(set_16bit_gcc_code_flag): Likewise.
(set_cpu_arch): Likewise.
(md_begin): Likewise.
(parse_insn): Call cpu_flags_match to check 64bit and arch.
(match_template): Likewise.
gas/testsuite/
2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/arch-9.d: New file.
* gas/i386/arch-9.s: Likewise.
* gas/i386/i386.exp: Run arch-9.
opcodes/
2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
CpuSSE4_2_Or_ABM.
(cpu_flags): Likewise.
* i386-opc.h (CpuSSE4_1_Or_5): Removed.
(CpuSSE4_2_Or_ABM): Likewise.
(CpuLM): Updated.
(i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
* i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
and CpuPadLock, respectively.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-01-04 01:05:45 +00:00
5dd15031dd
* config/tc-i386.c (process_drex): Initialize modrm_reg and
...
modrm_regmem to 0 instead of None.
2008-01-03 20:19:29 +00:00
24995bd6e3
gas/
...
2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (match_template): Use the xmmword field
instead of no_xsuf.
opcodes/
2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Remove No_xSuf.
* i386-opc.h (No_xSuf): Removed.
(CheckSize): Updated.
* i386-tbl.h: Regenerated.
2008-01-03 20:09:38 +00:00
fc4adea1ba
2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (process_suffix): Fix a typo.
2008-01-02 23:55:45 +00:00
582d5eddfe
gas/
...
2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* config/tc-i386.c (match_template): Handle XMMWORD_MNEM_SUFFIX.
Check memory size in Intel mode.
(process_suffix): Handle XMMWORD_MNEM_SUFFIX.
(intel_e09): Likewise.
* config/tc-i386.h (XMMWORD_MNEM_SUFFIX): New.
gas/testsuite/
2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* gas/i386/intel.s: Use QWORD on movq instead of DWORD.
* gas/i386/inval.s: Add tests for movq.
* gas/i386/x86-64-inval.s: Likewise.
* gas/i386/inval.l: Updated.
* gas/i386/x86-64-inval.l: Likewise.
opcodes/
2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
Byte, Word, Dword, QWord and Xmmword.
* i386-opc.h (No_xSuf): New.
(CheckSize): Likewise.
(Byte): Likewise.
(Word): Likewise.
(Dword): Likewise.
(QWord): Likewise.
(Xmmword): Likewise.
(FWait): Updated.
(i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
Dword, QWord and Xmmword.
* i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
used.
* i386-tbl.h: Regenerated.
2008-01-02 21:43:34 +00:00
e7c604dd09
* gas/mips/jalr.s: New test.
...
* gas/mips/jalr.l: New test output.
* gas/mips/mips.exp: Run new test.
2008-01-02 20:59:47 +00:00
ba104c838a
2007-12-29 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (md_show_usage): Add -mmnemonic, -msyntax,
-mindex-reg, -mnaked-reg and -mold-gcc.
2007-12-29 14:15:20 +00:00
3a0d49fcec
* config/tc-hppa.h (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number
...
in parens.
2007-12-27 15:35:53 +00:00
5209009a1b
Fix a typo in comment.
2007-12-24 06:10:17 +00:00
1efbbeb461
gas/
...
2007-12-23 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (set_intel_mnemonic): New.
(intel_mnemonic): Likewise.
(old_gcc): Likewise.
(OPTION_MMNEMONIC): Likewise.
(OPTION_MSYNTAX): Likewise.
(OPTION_MINDEX_REG): Likewise.
(OPTION_MNAKED_REG): Likewise.
(OPTION_MOLD_GCC): Likewise.
(md_pseudo_table): Add .intel_mnemonic and .att_mnemonic.
(match_template): Don't allow AT&T/Intel mnemonic if Intel/AT&T
mnemonic is specified. Don't allow old gcc support if old_gcc
is 0.
(md_longopts): Add -mmnemonic, -msyntax, -mindex-reg,
-mmnaked-reg and -mold-gcc.
(md_parse_option): Handle OPTION_MMNEMONIC, OPTION_MSYNTAX,
OPTION_MINDEX_REG, OPTION_MNAKED_REG and OPTION_MOLD_GCC.
* doc/c-i386.texi: Docoument -mmnemonic, -msyntax, --mnaked-reg
and AT&T mnemonic vs. Intel mnemonic.
gas/testsuite/
2007-12-23 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/compat-intel.d: Pass -mmnemonic=att to assembler.
* gas/i386/compat.d: Likewise.
* gas/i386/i386.exp: Pass -mmnemonic=att to assembler for
"float". Pass -mold-gcc to assembler for "general".
opcodes/
2007-12-23 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Add OldGcc, ATTMnemonic and
IntelMnemonic.
* i386-opc.h (OldGcc): New.
(ATTMnemonic): Likewise.
(IntelMnemonic): Likewise.
(Opcode_Modifier_Max): Updated.
(i386_opcode_modifier): Add oldgcc, attmnemonic and
intelmnemonic.
* i386-opc.tbl: Update fadd, fdiv, fdivp, fdivr, fdivrp, fmul,
fsub, fsubp, fsubr and fsubrp with OldGcc, ATTMnemonic and
IntelMnemonic.
* i386-tbl.h: Regeneratd.
2007-12-24 05:27:39 +00:00
1f7efbae40
* config/tc-xtensa.c (xtensa_elf_cons): Set frag flags for
...
expressions without suffixes.
(get_frag_property_flags): Preserve is_no_transform flag for frags
not marked as either instructions or literals.
2007-12-20 17:21:07 +00:00
4746505869
2007-12-17 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (output_insn): Use ARRAY_SIZE.
(lex_got): Likewise.
2007-12-17 19:41:57 +00:00
4a3523fa63
2007-12-17 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (output_insn): Use FRAG_APPEND_1_CHAR
instead of frag_more/md_number_to_chars.
(md_short_jump_size): Removed.
(md_long_jump_size): Likewise.
(md_create_short_jump): Likewise.
(md_create_long_jump): Likewise.
2007-12-17 18:53:06 +00:00
38f9cb7fe1
gas/
...
* config/tc-xtensa.c (xg_symbolic_immeds_fit): Relax for weak
references but not weak definitions.
gas/testsuite/
* gas/xtensa/all.exp: Run new weak-call test.
* gas/xtensa/weak-call.d: New.
* gas/xtensa/weak-call.s: New.
2007-12-13 19:03:45 +00:00
8e6bc631a9
* config/tc-xtensa.c (xg_symbolic_immeds_fit): Do not relax calls to weak symbols if longcalls are disabled.
2007-12-12 21:16:47 +00:00
def13efb26
* config/tc-xtensa.c (frag_format_size): Handle frags that expand to
...
wide branches.
(get_aligned_diff): For RELAX_ALIGN_NEXT_OPCODE, skip to the next
non-empty frag to find the LOOP instruction. Change comma typo to
a semicolon.
(relax_frag_immed, convert_frag_immed): Rename wide_insn variable to
from_widen_insn.
2007-12-11 21:52:39 +00:00
71ac351cf2
* config/tc-m32r.c (md_begin): Mark .sbss as being bss style section.
2007-12-10 23:33:46 +00:00
742a56fee5
gas/
...
* config/tc-mips.h (mips_nop_opcode): Declare.
(NOP_OPCODE): Define.
(mips_segment_info): New structure.
(TC_SEGMENT_INFO_TYPE): Use it instead of insn_label_list.
* config/tc-mips.c (label_list): Adjust for new TC_SEGMENT_INFO_TYPE.
(mips_record_mips16_mode): New function.
(install_insn): Call it.
(mips_align): Likewise. Turn the fill argument into an "int *".
Use frag_align_code for code segments if no fill data is given.
(s_align): Adjust call accordingly.
(mips_nop_opcode): New function.
(mips_handle_align): Use the first variable byte to decide which
nop sequence is needed. Use md_number_to_chars and mips16_nop_insn.
gas/testsuite/
* gas/mips/align2.s, gas/mips/align2.d, gas/mips/align2-el.d: New
tests.
* gas/mips/mips.exp: Run them.
2007-12-10 10:36:00 +00:00
1bbb5f219c
2007-12-07 Bob Wilson <bob.wilson@acm.org>
...
include/elf/
* xtensa.h (R_XTENSA_32_PCREL): New.
bfd/
* elf32-xtensa.c (elf_howto_table): Add R_XTENSA_32_PCREL.
(elf_xtensa_reloc_type_lookup): Handle BFD_RELOC_32_PCREL.
(elf_xtensa_check_relocs): Use default case for all relocations that
need nothing done here.
(elf_xtensa_do_reloc): Compute self_address for all relocation types.
Handle R_XTENSA_32_PCREL.
(elf_xtensa_relocate_section): Check for R_XTENSA_32_PCREL for dynamic
symbols.
(check_section_ebb_pcrels_fit): Ignore R_XTENSA_32_PCREL relocations.
gas/
* config/tc-xtensa.c (O_pcrel): Define.
(suffix_relocs): Add pcrel suffix.
(md_pseudo_table): Add 4byte and 2byte directives.
(xtensa_elf_cons): Pass correct pcrel argument to fix_new_exp.
(xg_assemble_literal): Likewise. Check for O_pcrel.
(expression_maybe_register): Reorganize. Handle BFD_RELOC_32_PCREL.
(xg_valid_literal_expression): Allow O_pcrel.
(md_pcrel_from, md_apply_fix): Handle BFD_RELOC_32_PCREL.
(tc_gen_reloc): Fix punctuation in error message.
gas/testsuite/
* gas/xtensa/all.exp: Run new pcrel test.
* gas/xtensa/err-pcrel.s: New.
* gas/xtensa/pcrel.d: New.
* gas/xtensa/pcrel.s: New.
* gas/xtensa/xtensa-err.exp: New.
2007-12-07 22:52:10 +00:00
542f8b941d
* config/tc-xtensa.c (xg_force_frag_space): Delete.
...
(xg_finish_frag, xg_assemble_literal_space): Replace calls to it.
(xtensa_create_property_segments, xtensa_create_xproperty_segments):
Set output_section for new property sections. Use subseg_set and
seg_info instead of retrieve_segment_info. Adjust arguments to
add_xt_block_frags and add_xt_prop_frags. Use standard functions
to create frags and fix records.
(retrieve_segment_info): Delete.
(add_xt_block_frags, add_xt_prop_frags): Replace calls to
retrieve_segment_info. Remove unused xt_block_sec arguments.
2007-12-07 01:07:33 +00:00
d13d401589
* config/tc-ppc.c (ppc_tc): Allow a space between toc symbol
...
name and bracket.
2007-12-03 23:14:24 +00:00
ee6365aa9e
gas/
...
* config/tc-xtensa.h (md_allow_eh_opt): Define.
gas/testsuite/
* gas/elf/elf.exp: Disable ehopt test for Xtensa.
2007-11-30 23:47:55 +00:00
350cc38db2
bfd/
...
* archures.c (bfd_mach_mips_loongson_2e): New.
(bfd_mach_mips_loongson_2f): New.
* bfd-in2.h (bfd_mach_mips_loongson_2e): New.
(bfd_mach_mips_loongson_2f): New.
* cpu-mips.c: Add I_loongson_2e and I_loongson_2f to
anonymous enum.
(arch_info_struct): Add Loongson-2E and Loongson-2F entries.
* elfxx-mips.c (_bfd_elf_mips_mach): Handle Loongson-2E
and Loongson-2F flags.
(mips_set_isa_flags): Likewise.
(mips_mach_extensions): Add Loongson-2E and Loongson-2F
entries.
binutils/
* readelf.c (get_machine_flags): Handle Loongson-2E and -2F
flags.
gas/
* config/tc-mips.c (mips_cpu_info_table): Add loongson2e
and loongson2f entries.
* doc/c-mips.texi: Document -march=loongson{2e,2f} options.
gas/testsuite/
* gas/mips/mips.exp: Add loongson-2e and -2f tests.
* gas/mips/loongson-2e.d: New.
* gas/mips/loongson-2e.s: New.
* gas/mips/loongson-2f.d: New.
* gas/mips/loongson-2f.s: New.
include/elf/
* mips.h (E_MIPS_MACH_LS2E): New.
(E_MIPS_MACH_LS2F): New.
include/opcode/
* mips.h (INSN_LOONGSON_2E): New.
(INSN_LOONGSON_2F): New.
(CPU_LOONGSON_2E): New.
(CPU_LOONGSON_2F): New.
(OPCODE_IS_MEMBER): Update for Loongson-2E and -2F flags.
opcodes/
* mips-dis.c (mips_arch_choices): Add Loongson-2E and -2F
entries.
* mips-opc.c (IL2E): New.
(IL2F): New.
(mips_builtin_opcodes): Add Loongson-2E and -2F instructions.
Allow movz and movn for Loongson-2E and -2F. Add movnz entry.
Move coprocessor encodings to the end of the table. Allow
certain MIPS V .ps instructions on the Loongson-2E and -2F.
2007-11-29 12:23:44 +00:00
e6181b6abd
2007-11-29 Martin Schwidefsky <schwidefsky@de.ibm.com>
...
* config/tc-s390.c (md_begin): If the -mesa option is specified
add zarch opcodes to the hash table only if there is no variant
that is available for the esa mode as well.
2007-11-29 Martin Schwidefsky <schwidefsky@de.ibm.com>
* gas/s390/esa-z9-109.d: Add check for old version of sske.
* gas/s390/esa-z9-109.s: Likewise.
2007-11-29 09:34:14 +00:00
ee21dcabf8
* config/tc-alpha.c (assemble_insn): Don't segv on NULL reloc_operand.
2007-11-26 01:43:43 +00:00
b224e962a8
* config/xtensa-istack.h (tinsn_struct): Replace linenum field
...
with loc_directive_seen and debug_line.
* config/tc-xtensa.c: Include xtensa-istack.h after dwarf2dbg.h.
(xg_build_to_insn): Copy the new fields instead of linenum.
(xg_build_token_insn): Likewise. Abort on INSTR_LABEL_DEF and move
common code out of the switch.
(md_assemble): Set new tinsn fields from DWARF information. Call
dwarf2_consume_line_info.
(xg_assemble_vliw_tokens): Update the code to select the "best" line
number to use new information. Call dwarf2_gen_line_info instead
of dwarf2_emit_insn.
2007-11-19 19:40:55 +00:00
661ba50f53
* dwarf2dbg.c (dwarf2_consume_line_info): New.
...
(dwarf2_emit_insn): Use it here.
(dwarf2_directive_loc): Fix check for consecutive .loc directives
when debug_type is DEBUG_DWARF2.
* dwarf2dbg.h (dwarf2_consume_line_info): New prototype.
* config/tc-ia64.c (ia64_flush_insns): Call dwarf2_consume_line_info.
(md_assemble): Likewise.
testsuite/
* gas/lns/lns.exp: Run lns-common-1 with alternate source for ia64.
* gas/lns/lns-common-1-ia64.s: New file.
2007-11-19 18:15:53 +00:00
4ffff32f75
* config/tc-mips.c (md_parse_option): Match mips_optimize to the -O
...
option supplied, but still keep mips_optimize == 2 as default value.
2007-11-17 14:19:19 +00:00
ee50f563b9
2007-11-16 Eric B. Weddington <eric.weddington@atmel.com>
...
* config/tc-avr.c (mcu_types): Add ATmega32HVB device.
* doc/c-avr.texi: Likewise.
2007-11-16 17:39:22 +00:00
2221168ece
2007-11-16 Eric B. Weddington <eric.weddington@atmel.com>
...
* config/tc-avr.c (mcu_types): Add ATmega1284P device.
* doc/c-avr.texi: Likewise.
2007-11-16 17:25:28 +00:00
4f8631b1d4
gas/
...
2007-11-14 Tristan Gingold <gingold@adacore.com>
* config/tc-ia64.c (AR_RUC): Defined.
(ar): Add "ar.ruc".
(specify_resource): Handle AR_RUC like AR_ITC.
gas/testsuite/
2007-11-14 H.J. Lu <hongjiu.lu@intel.com>
* gas/ia64/dv-raw-err.s: Add tests for ar.ruc.
* gas/ia64/dv-waw-err.s: Likewise.
* gas/ia64/invalid-ar.s: Likewise.
* gas/ia64/regs.s: Add tests for ar.ruc and ar44.
* gas/ia64/dv-raw-err.l: Updated.
* gas/ia64/dv-waw-err.l: Likewise.
* gas/ia64/invalid-ar.l: Likewise.
* gas/ia64/regs.d: Likewise.
opcodes/
2007-11-14 H.J. Lu <hongjiu.lu@intel.com>
* ia64-ic.tbl: Updated for Itanium 9100 series.
* ia64-raw.tbl: Likewise.
* ia64-waw.tbl: Likewise.
* ia64-asmtab.c: Regenerated.
2007-11-14 Tristan Gingold <gingold@adacore.com>
* ia64-dis.c (print_insn_ia64): Handle ar.ruc.
* ia64-gen.c (lookup_regindex): Likewise.
2007-11-14 22:31:54 +00:00
b5f5fd962e
* config/tc-mn10300.c (mn10300_force_relocation): Force a reloc to be generated for alignment fixups.
...
* config/tc-mn10300.h (TC_FORCE_RELOCATION): Call mn10300_force_relocation.
* elf-m10300.c (mn10300_elf_final_link_relocate): Prevent the accidental termination of DWARF location list entries.
(mn10300_elf_relax_delete_bytes): Stop deletion if an align reloc is encountered that is larger than or not a mutliple of the number of bytes being deleted.
When adjusting symbols, any symbols inside the region being deleted must be moved to the end of the region.
Move align relocs forward if there is room for them after the deletion of the region.
2007-11-13 10:40:29 +00:00
4247714778
PR gas/5269
...
* config/tc-frv.c (md_show_usage): Rewrite usage description to make it easier to translate.
* gas/po/gas.pot: Regenerate.
2007-11-12 10:57:33 +00:00
2ad068bef2
* config/tc-ppc.c (md_assemble): If -mregnames, when parsing
...
PPC_OPERAND_CR always parse as expression to allow register name
followed by an expression.
2007-11-12 00:27:53 +00:00
567e4e96bc
2007-11-09 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (match_template): Re-order suffix check.
2007-11-09 13:53:13 +00:00
11ac267110
* config/tc-xtensa.c (relaxable_section): Check for .eh_frame.
2007-11-08 01:40:58 +00:00
71fe8fb398
2007-11-07 Eric B. Weddington <eweddington@cso.atmel.com>
...
* config/tc-avr.c (mcu_types): Add ATtiny88 device.
* doc/c-avr.texi: Likewise.
2007-11-07 17:59:05 +00:00
5cc9c0ab34
2007-11-07 Anatoly Sokolov <aesok@post.ru>
...
* config/tc-avr.c (mcu_types): Add new devices: ATmega48P, ATmega88P,
ATmega168P, Atmega328P
* doc/c-avr.texi: Document new devices.
2007-11-07 17:24:59 +00:00
8edcbfcd2e
* config/tc-ppc.c (md_apply_fix): For PPC_TOC16 on XCOFF, uses offset
...
within the TOC instead of the VMA.
* gas/ppc/test1xcoff32.d: Updated to match RTOC bug fix.
2007-11-07 14:10:49 +00:00
682b27ad2a
2007-11-06 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (do_mull): Allow overlapping Rm for armv6.
gas/testsuite/
* gas/arm/mul-overlap.s: Add umull and smlal.
* gas/arm/mul-overlap.l: Update expected results.
2007-11-06 22:17:00 +00:00
8c7504802a
* ehopt.c (check_eh_frame): If md_allow_eh_opt is defined, invoke it to see if the optimizations should be applied.
...
* config/tc-mn10300.h (md_allow_eh_opt): Define. Only allow call frame optimization if linker relaxation is not enabled.
* gas/elf/elf.exp: Disable ehopt test for mn10300.
2007-11-06 17:15:10 +00:00
6a7eedfedc
* config/tc-xtensa.c (xtensa_symbol_new_hook): New.
...
(xtensa_mark_difference_of_two_symbols): New.
(xtensa_post_relax_hook): Call xtensa_mark_difference_of_two_symbols.
* config/tc-xtensa.h (xtensa_symfield_type): Add next_expr_symbol.
(tc_symbol_new_hook): Define.
2007-11-02 00:45:34 +00:00
7ce189b305
gas/
...
2007-11-01 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (md_assemble): Replace no_xsuf with
no_ldsuf.
(match_template): Likewise.
opcodes/
2007-11-01 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Replace No_xSuf with
No_ldSuf.
* i386-opc.tbl: Likewise.
* i386-opc.h (No_xSuf): Renamed to ...
(No_ldSuf): This.
(FWait): Updated.
2007-11-01 19:06:54 +00:00
4a146fc23c
2007-11-01 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.h (LONG_DOUBLE_MNEM_SUFFIX): Use a non-ascii
letter.
2007-11-01 18:40:53 +00:00
ca61edf2ff
gas/
...
2007-11-01 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (process_suffix): Check addrprefixop0 to
see if the address size override prefix changes the size of the
first operand.
(check_byte_reg): Don't warn if byteokintel is set.
(check_long_reg): Set i.suffix to QWORD_MNEM_SUFFIX if toqword
is set.
(check_qword_reg): Set i.suffix to LONG_MNEM_SUFFIX if todword
is set.
gas/testsuite/
2007-11-01 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.d: New.
* gas/i386/i386.s: Likewise.
* gas/i386/i386.exp: Run i386.
* gas/i386/x86_64.s: Add tests for movsx, movsbl, movsbq,
movsbw, movswl, movswq, movzx, movzb, movzbl, movzbq,
movzbw, movzwl and movzwq.
* gas/i386/x86_64.d: Updated.
opcodes/
2007-11-01 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Add ByteOkIntel, ToDword,
ToQword and AddrPrefixOp0.
* i386-opc.h (ByteOkIntel): New.
(ToDword): Likewise.
(ToQword): Likewise.
(AddrPrefixOp0): Likewise.
(IsPrefix): Updated.
(i386_opcode_modifier): Add byteokintel, todword, toqword
and addrprefixop0.
* i386-opc.tbl (cvtss2si): Add ToQword.
(cvttss2si): Likewise.
(cvtsd2si): Add ToDword.
(cvttsd2si): Likewise.
(monitor): Add AddrPrefixOp0.
(invlpga): Likewise.
(vmload): Likewise.
(vmrun): Likewise.
(vmsave): Likewise.
(pextrb): Add ByteOkIntel.
(pinsrb): Likewise.
* i386-tbl.h: Regenerated.
2007-11-01 16:27:08 +00:00
7f5ba16ddb
2007-10-31 Eric B. Weddington <eweddington@cso.atmel.com>
...
* config/tc-avr.c (mcu_types): Remove devices that were never produced:
attiny10, atmega83, atmega85, atmega603.
* doc/c-avr.texi: Likewise.
2007-10-31 18:11:28 +00:00
569006e582
* mn10300.h (R_MN10300_ALIGN): Define.
...
* reloc.c (BFD_RELOC_MN10300_ALIGN): Add.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* elf-m10300.h: Handle R_MN10300_ALIGN relocs.
* mn10300_elf_relax_delete_bytes): Honour R_MN10300_ALIGN relocs.
Re-fix off by one error in comparisons.
* config/tc-mn10300.c (tc_gen_reloc): Fix test that decides when
sym_diff relocs should be generated.
(md_apply_fix): Skip R_MN10300_ALIGN relocs.
(mn10300_fix_adjustable): Do not adjust R_MN10300_ALIGN relocs.
(mn10300_handle_align): New function. Generate R_MN10300_ALIGN
relocs to record alignment requests.
* config/tc-mn10300.h (TC_FORCE_RELOCATION_SUB_SAME): Also force
R_MN10300_ALIGN relocs.
(HANDLE_ALIGN): Define. Call mn10300_handle_align.
* gas/all/gas.exp: Do not run diff1.s test for mn10300.
* ld-mn10300/mn10300.exp: Run new tests. Skip i126256 test if
a compiler is not available.
* ld-mn10300/i112045-3.s: New test.
* ld-mn10300/i112045-3.d: Expected disassembly.
* ld-mn10300/i135409.s: Rename to i135409-1.s.
* ld-mn10300/i135409.d: Rename to i135409-1.d
* ld-mn10300/i135409-2.s: New test.
* ld-mn10300/i135409-2.d: Expected symbol table.
* ld-mn10300/i36434.d: Adjust expected disassembly.
2007-10-30 15:18:29 +00:00
9cfc3331a8
gas/
...
2007-10-27 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5221
* config/obj-elf.c (obj_elf_section): Handle optional
parameters for .pushsection.
* doc/as.texinfo: Document optional parameters for
.pushsection.
gas/testsuite/
2007-10-27 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5221
* gas/elf/elf.exp: Run section7.
* gas/elf/section7.d: New.
* gas/elf/section7.s: Likewise.
2007-10-27 17:45:53 +00:00
bfff164249
Add MN10300 linker relaxation support for symbol differences
2007-10-19 17:31:31 +00:00
603b72571d
* elf-m10300.c: Convert to ISO C.
...
* tc-mn10300.c: Convert to ISO C.
2007-10-19 11:48:57 +00:00
13abbae325
* config/tc-ppc.c (ppc_parse_name): Skip leading '%'.
...
(md_assemble): When parsing PPC_OPERAND_CR, add '%' to set of
chars that can start a name.
2007-10-19 10:48:17 +00:00
717c53eab0
gas/
...
2007-10-18 Carlos O'Donell <carlos@systemhalted.org>
* config/tc-hppa.c (pa_ip): Fix comment typo.
(pa_comm): Likewise.
2007-10-18 13:33:57 +00:00
b2f58c0c09
PR gas/5172
...
* config/tc-arc.c (md_estimate_size_before_relax): Change error message.
(md_convert_frag): Just call abort.
* config/tc-i860.c (md_estimate_size_before_relax): Change error message.
* config/tc-i860.h (md_convert_frag): Just call abort.
* config/tc-ip2k.c (md_estimate_size_before_relax): Change error message.
(md_convert_frag): Just call abort.
* config/tc-m68k.c (m68k_ip): Do not attempt translation of architecture names.
2007-10-18 13:03:12 +00:00
5f4273c75a
PR gas/5174
...
* config/tc-arm.c: Fix formatting and spelling errors.
* gas.pot: Regenerate.
2007-10-18 11:49:34 +00:00
662a2e45c3
PR gas/5175
...
* config/tc-xc16x.c: Fix formatting and internationalization.
* gas.pot: Regenerate.
2007-10-18 11:01:24 +00:00
499ac35361
Remove duplicate definitions of the md_atof() function
2007-10-17 16:45:56 +00:00
504b7d2026
Support the use of the STT_COMMON type. (In source and object files only at the moment)
2007-10-16 14:42:15 +00:00
8dbcd839b1
gas/
...
* config/tc-ppc.c (ppc_setup_opcodes): Verify instructions are sorted
according to major opcode number.
opcodes/
* ppc-opc.c (TE): Correct signedness.
(powerpc_opcodes): Sort psq_st and psq_stu according to major
opcode number.
2007-10-16 02:26:30 +00:00
9fcfb3d73e
2007-10-12 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (process_operands): Simplify implicit xmm0
handling.
2007-10-12 22:26:55 +00:00
e2ec9d29b7
gas/
...
2007-10-12 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (process_operands): Check the firstxmm0
field in opcode_modifier for instruction with a implicit
xmm0 as the first operand.
opcodes/
2007-10-12 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Add FirstXmm0.
* i386-opc.h (FirstXmm0): New.
(IsPrefix): Updated.
(i386_opcode_modifier): Add firstxmm0.
* i386-opc.tbl (blendvpd): Replace RegKludge with FirstXmm0.
(blendvps): Likewise.
(pblendvb): Likewise.
* i386-tbl.h: Regenerated.
2007-10-12 21:40:38 +00:00
7337fc21f2
* config/tc-avr.c (mcu_types): Add new devices: AT90PWM2B, AT90PWM3B.
...
* doc/c-avr.texi: Document new devices.
2007-10-12 16:28:03 +00:00
e9deb29d4f
* elf32-cr16.c (elf32_cr16_relax_section): Fix condition check typo.
...
* config/tc-cr16.c: Update the md_relax_table for 1 word b<cc> instruction range information.
2007-10-12 16:11:02 +00:00
6f932bce80
* config/obj-elf.c (obj_elf_section): When pushing a section, if there is a
...
comma then the following argument must be a subsection number.
* testsuite/gas/elf/elf.exp (run_elf_list_test): Run section6 test.
* testsuite/gas/elf/section6.s: New file: Check behaviour of .pushsection with a subsection argument.
* testsuite/gas/elf/section6.d: New file: Expected disassembly.
2007-10-11 20:20:55 +00:00
ad4b42b49f
PR gas/5161
...
* config/tc-ia64.c: Allow for translations of error and warning messages.
* po/gas.pot: Regenerate.
2007-10-11 15:18:40 +00:00
c85dd50da2
PR gas/5158
...
* config/tc-h8300.c (tc_gen_reloc): Allow for translation of error message.
* po/gas.pot: Regenerate.
2007-10-11 14:17:44 +00:00
79cf59509d
PR gas/5155
...
* config/tc-msp430.c: Fix spelling typos.
2007-10-11 13:48:39 +00:00
741fe28756
gas/:
...
* config/tc-mips.c (AT): Rename to...
(ATREG): ... this.
(AT): New definition.
(mips_set_options): Rename "noat" to "at"; change the type.
(mips_opts): Update accordingly.
(append_insn): Likewise.
(macro_build_ldst_constoffset): Likewise.
(load_address): Likewise.
(macro, macro2): Likewise.
(s_mipsset): Handle ".set at=REG". Update handling of ".set at"
and ".set noat".
gas/testsuite/:
* gas/mips/at-1.d, gas/mips/at-2.l: New tests to check the ".set
at=REG" directive.
* gas/mips/at-1.s, gas/mips/at-2.s: Sources for the new tests.
* gas/mips/mips.exp: Run the new tests.
2007-10-08 16:09:35 +00:00
b1b17bc508
PR 5142: Allow for translation of error messages
2007-10-08 15:35:33 +00:00
bd3ba5d1b3
PR gas/5121 gas/5122 gas/5123 gas/5124 gas/5125 gas/5126 gas/5129 gas/5131 gas/5132 gas/5137 gas/5143
...
* Makefile.am (CFILES): Add cgen.c
(TARGET_CPU_CFILES): Add tc-iq2000.c, tc-maxq.c, tc-mt.c, tc-tic4x.c and xtensa-relax.c.
(TARGET_CPU_HFILES): Add tc-iq2000.h, tc-maxq.h, tc-mt.h, tc-tic4x.h and xtensa-relax.h.
(TARG_ENV_HFILES): Remove te-aux.h, te-delta.h, te-delt88.h, te-ic960.h, te-linux.h.
Add te-aix5.h, te-armeabi.h, te-freebsd.h, te-gnu.h, te-interix.h, te-vxworks.h.
(CONFIG_ATOF_CFILES): New variable.
(POTFILES): Add CONFIG_ATOF_CFILES to dependencies. Fix typo with dependency upon TARG_ENV_HFILES.
(DEPTC): Do not put "#include opcodes/<foo>-desc.h" into cgen-desc.h when foo-desc.h does not exit.
Run make dep-am.
* Makefile.in: Regenerate.
* doc/Makefile.in: Regenerate.
* po/POTFILES.in: Regenerate.
* po/es.po: Regenerate.
* po/fr.po: Regenerate.
* po/gas.pot: Regenerate.
* po/rw.po: Regenerate.
* po/tr.po: Regenerate.
* config/obj-elf.c (obj_elf_vtable_inherit): Allow for translation of error messages.
* config/obj-som.c: Likewise.
* config/tc-arc.c: Likewise.
* config/tc-arm.c: Likewise.
* config/tc-bfin.c: Likewise.
* config/tc-frv.c: Likewise.
2007-10-08 15:26:42 +00:00
485aa104ef
* config/tc-avr.c (mcu_types): Add new devices: AT90PWM216, AT90PWM316.
...
* doc/c-avr.texi: Document new devices.
2007-10-08 10:39:17 +00:00
922f0baccf
* config/tc-avr.c (mcu_types): Add new devices: ATtiny43U, ATtiny48.
...
* doc/c-avr.texi: Document new devices.
2007-10-08 10:33:27 +00:00
ff5075ca5c
PR gas/5134
...
* config/tc-arm.c (md_apply_fix): Likewise.
2007-10-08 10:19:30 +00:00
4e6e072b6c
PR gas/5133
...
* config/tc-arm.c (md_apply_fix): Correct error message
2007-10-08 10:14:31 +00:00
df3e80176e
PR gas/5135
...
(Expr_Node_Gen_Reloc_R): Fix spelling typos in error messages.
2007-10-08 10:09:58 +00:00
33ffbed979
PR gas/5136
...
* config/tc-bfin.c (md_apply_fix): Fix error message.
2007-10-08 10:05:28 +00:00
368d64cc37
2007-10-05 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (build_modrm_byte): Check the first 2 8bit
immediate operands directly for instructions with 4 operands.
2007-10-05 17:50:47 +00:00
955e1e6a77
gas/
...
2007-10-04 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5109
* config/tc-i386.c (process_suffix): Clear QWORD suffix if it
is ignored in Intel mode.
gas/testsuite/
2007-10-04 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5109
* gas/i386/simd-intel.d: Updated.
* gas/i386/simd.d: Likewise.
* gas/i386/x86-64-simd-intel.d: Likewise.
* gas/i386/x86-64-simd.d: Likewise.
* gas/i386/simd.s: Add more tests.
* gas/i386/x86-64-simd.s: Likewise.
2007-10-04 18:29:29 +00:00
38a57ae7a5
* read.c (potable): Add string8, string16, string32 and string64. Add bit size for stringer function.
...
(stringer_append_char): New.
(stringer): Use stringer_append_char().
* config/obj-coff.c (obj_coff_ident): Add bit size for stringer function.
* config/obj-elf.c (obj_elf_ident): Likewise.
* config/tc-alpha.c (s_alpha_stringer): Likewise.
* config/tc-dlx.c (dlx_pseudo_table): Likewise.
* config/tc-hppa.c (pa_stringer): Likewise.
* config/tc-ia64.c (md_pseudo_table, pseudo_opcode): Likewise.
* config/tc-m68hc11.c (md_pseudo_table): Likewise.
* config/tc-mcore.c (md_pseudo_table): Likewise.
* config/tc-mips.c (mips_pseudo_table): Likewise.
* config/tc-spu.c (md_pseudo_table): Likewise.
* config/tc-s390.c (md_pseudo_table): Likewise. Replace '2' by '1'.
* doc/as.texinfo (ABORT): Fix identing.
(String): Document new string8, string16, string32, string64 functions.
* NEWS: Mention the new feature.
* testsuite/gas/all/gas.exp: Include new test "strings".
* testsuite/gas/all/string.s: New
* testsuite/gas/all/string.d: New.
2007-10-04 17:05:37 +00:00
73f4d86e6b
PR gas/5078
...
* config/tc-avr.c (avr_get_constant): Extend error message to mention that the constant must be positive.
2007-10-03 14:35:06 +00:00
6decc66226
PR gas/5089 * config/tc-arm.c (s_arm_unwind_handlerdata): Fix spelling typo.
...
PR gas/5090 (md_assemble): Fix spelling typo.
2007-10-03 13:48:35 +00:00
7fac7ff4ae
Various CR16 fixes
2007-10-01 15:55:44 +00:00
07e8d93c1c
gas/
...
2007-09-30 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5080
* config/tc-i386.c (check_long_reg): Also handle cvttss2si.
(check_qword_reg): Also handle cvttsd2si.
gas/testsuite/
2007-09-30 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5080
* gas/i386/simd-intel.d: Updated.
* gas/i386/simd.d: Likewise.
* gas/i386/x86-64-simd-intel.d: Likewise.
* gas/i386/x86-64-simd.d: Likewise.
* gas/i386/simd.s: Add new tests for cvttsd2si and cvttss2si.
* gas/i386/x86-64-simd.s: Likewise.
2007-09-30 21:27:16 +00:00
d0fa13723f
gas/
...
* config/m68k-parse.h (m68k_register): Use MBO instead of MBB.
(last_movec_reg): Change to MBO.
* config/tc-m68k.c (fido_ctrl): Use MBO instead of MBB.
(m68k_ip): Use MBO instead of MBO.
(init_table): Use MBO instead of MBO. Add an entry for mbo.
gas/testsuite/
* gas/m68k/fido.s: Add tests for %mbo.
* gas/m68k/fido.d: Update accordingly.
opcodes/
* m68k-dis.c (print_insn_arg): Use %mbo instead of %mbb.
2007-09-27 11:14:10 +00:00
9a04903eea
gas/
...
2007-09-26 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (build_modrm_byte): Also check for RegEip
when considering IP-relative addressing.
gas/testsuite/
2007-09-26 Jan Beulich <jbeulich@novell.com>
* gas/i386/reloc64.s: Adjust for %eip-relative addressing no
longer generating errors.
* gas/i386/reloc64.d, gas/i386/reloc64.l: Update.
* gas/i386/x86-64-addr32.s: Remove explicit addr32 prefix
for %eip-realtive addressing case.
opcodes/
2007-09-26 Jan Beulich <jbeulich@novell.com>
* i386-opc.h (RegEip): Define.
(RegEiz): Adjust.
* i386-reg.tbl: Add eip. Mark rip and eip with RegRex64.
* i386-tbl.h: Re-generate.
2007-09-26 13:40:59 +00:00
5a918ce730
gas/
...
2007-09-26 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.h (md_register_arithmetic): Define.
* config/tc-ia64.h (md_register_arithmetic): Likewise.
* doc/internals.texi: Document md_register_arithmetic.
* expr.c (make_expr_symbol): Force O_register expressions into
reg_section.
(expr): Provide default for md_register_arithmetic. Don't resolve
adding/subtracting constants to/from registers if
md_register_arithmetic is zero.
2007-09-26 08:34:24 +00:00
cc941dee48
gas/
...
2007-09-26 Jan Beulich <jbeulich@novell.com>
* config/tc-ia64.c (dot_pred_rel): Replace specialized handling
with simple call to parse_operand.
2007-09-26 06:58:01 +00:00
c15900ec36
gas/
...
2007-09-26 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (NUM_FLAG_CODE): Remove.
2007-09-26 06:55:57 +00:00
4dffcebc10
gas/
...
2007-09-25 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (output_insn): Use i.tm.opcode_length to
check opcode length.
opcodes/
2007-09-25 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (process_i386_opcodes): Process opcode_length.
* i386-opc.h (template): Add opcode_length.
* 386-opc.tbl: Likewise.
* i386-tbl.h: Regenerated.
2007-09-26 04:42:47 +00:00
cac2720567
* config/tc-m68k.c (LONG_BRANCH_VIA_COND): New.
...
(BRANCHBWPL, FRAG_VAR_SIZE): New.
(md_relax_table): Add BRANCHBWPL entries.
(m68k_ip): Choose BRANCHBWPL relaxation if necessary.
(md_assemble): Use FRAG_VAR_SIZE.
(md_convert_frag_1): Add BRANCHBWPL cases.
(md_estimate_size_before_relaz): Likewise.
* gas/m68k/br-isaa.d: Dump relocs too.
* gas/m68k/br-isab.d: Likewise.
* gas/m68k/br-isac.d: Likewise. Adjust for long branch relaxation.
Index: gas/config/tc-m68k.c
2007-09-25 15:31:05 +00:00
49954fb49f
gas/
...
2007-09-24 Carlos O'Donell <carlos@codesourcery.com>
* config/tc-mips.c (s_align): Set max_alignment to 28.
gas/testsuite/
2007-09-24 Carlos O'Donell <carlos@codesourcery.com>
* gas/mips/align.s, gas/mips/align.d: New test.
* gas/mips/mips.exp: Run it.
2007-09-24 22:08:21 +00:00
db51cc60e2
gas/
...
2007-09-20 H.J. Lu <hongjiu.lu@intel.com>
PR 658
* config/tc-i386.c (SCALE1_WHEN_NO_INDEX): Removed.
(set_allow_index_reg): New.
(allow_index_reg): Likewise.
(md_pseudo_table): Add "allow_index_reg" and
"disallow_index_reg".
(build_modrm_byte): Set i.sib.index to NO_INDEX_REGISTER for
fake index registers.
(i386_scale): Updated.
(i386_index_check): Support fake index registers.
(parse_real_register): Return NULL on eiz/riz if fake index
registers aren't allowed.
gas/testsuite/
2007-09-20 H.J. Lu <hongjiu.lu@intel.com>
PR 658
* gas/i386/i386.exp: Run sib-intel, x86-64-sib and
x86-64-sib-intel.
* gas/i386/nops-1-i386-i686.d: Updated.
* gas/i386/nops-1-i386.d: Likewise.
* gas/i386/nops-1.d: Likewise.
* gas/i386/nops-2-i386.d: Likewise.
* gas/i386/nops-2-merom.d: Likewise.
* gas/i386/nops-2.d: Likewise.
* gas/i386/nops-3-i386.d: Likewise.
* gas/i386/nops-3.d : Likewise.
* gas/i386/sib.d: Likewise.
* gas/i386/sib.s: Use %eiz in testcases.
* gas/i386/sib-intel.d: New.
* gas/i386/x86-64-sib-intel.d: Likewise.
* gas/i386/x86-64-sib.d: Likewise.
* gas/i386/x86-64-sib.s: Likewise.
ld/testsuite/
2007-09-20 H.J. Lu <hongjiu.lu@intel.com>
PR 658
* ld-i386/tlsbin.dd: Updated.
* ld-i386/tlsld1.dd: Likewise.
opcodes/
2007-09-20 H.J. Lu <hongjiu.lu@intel.com>
PR 658
* 386-dis.c (index64): New.
(index32): Likewise.
(intel_index64): Likewise.
(intel_index32): Likewise.
(att_index64): Likewise.
(att_index32): Likewise.
(print_insn): Set index64 and index32.
(OP_E_extended): Use index64/index32 for index register for
SIB with INDEX == 4.
* i386-opc.h (RegEiz): New.
(RegRiz): Likewise.
* i386-reg.tbl: Add eiz and riz.
* i386-tbl.h: Regenerated.
2007-09-20 17:38:38 +00:00
550c188837
* config/tc-h8300.c (md_apply_fix): Do not abort or handle 8 byte fixups.
2007-09-19 15:25:13 +00:00
d908d8f43b
* config/bfin-parse.y (asm_1): Slightly improve error messages
...
for "reg += const;".
2007-09-18 11:59:00 +00:00
20e192ab8d
gas/
...
2007-09-17 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (baseindex): Removed.
(build_modrm_byte): Check reg_num for RIP register instead of
reg_type.
(i386_index_check): Likewise.
opcodes/
2007-09-17 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.h (RegRip): New.
* i386-reg.tbl (rip): Use RegRip for reg_num.
* i386-tbl.h: Regenerated.
2007-09-18 00:56:54 +00:00
1a36c6a702
2007-09-17 H.J. Lu <hongjiu.lu@intel.com>
...
PR gas/5035
* config/obj-coff.c (obj_coff_endef): Remove checking size of
def_symbol_in_progress.
2007-09-17 17:15:30 +00:00
916af0488c
gas/
...
2007-09-17 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (intel_e04): Revert the last change.
gas/testsuite/
2007-09-17 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/x86-64-rip.s: Revert the last change.
* gas/i386/x86-64-rip-intel.d: Likewise.
* gas/i386/x86-64-rip.d: Likewise.
2007-09-17 14:46:12 +00:00
27ac72083b
gas/
...
2007-09-15 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5034
* config/tc-i386.c (intel_e04): Return 1 if cur_token.code is
T_NIL.
gas/testsuite/
2007-09-15 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5034
* gas/i386/x86-64-rip.s: Add Intel mode testcases.
* gas/i386/x86-64-rip-intel.d: Updated.
* gas/i386/x86-64-rip.d: Likewise.
2007-09-15 22:06:42 +00:00
8ed77a05dc
2007-09-14 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (build_modrm_byte): Adjust comment line
wrap.
2007-09-15 01:57:57 +00:00
b5016f899b
2007-09-14 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (build_modrm_byte): Use (A || B) instead
of (A || B) != 0.
2007-09-14 20:05:28 +00:00
c0209578ea
2007-09-14 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (build_modrm_byte): Adjust indentation.
2007-09-14 19:57:47 +00:00
85f10a010c
Add AMD SSE5 support
2007-09-14 18:21:09 +00:00
ec56d5c0f6
gas/
...
2007-09-12 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (md_assemble): Move handling of extrq/insertq
after generic operand swapping, and swap only the immediate operands.
gas/testsuite/
2007-09-12 Jan Beulich <jbeulich@novell.com>
* gas/i386/amdfam10.s, gas/i386/x86-64-amdfam10.s: Add Intel syntax
code.
* gas/i386/amdfam10.d, gas/i386/x86-64-amdfam10.d: Adjust.
2007-09-12 07:31:47 +00:00
8d100c328c
bfd/
...
* archures.c: Add bfd_mach_mcf_isa_c_nodiv,
bfd_mach_mcf_isa_c_nodiv_mac & bfd_mach_mcf_isa_c_nodiv_emac.
* ieee.c (ieee_write_processor): Update coldfire architecture
list.
* bfd-in2.h: Rebuilt.
* cpu-m68k.c (arch_info_struct): Add isa_c nodiv architectures.
(m68k_arch_features): Likewise.
* elf32-m68k.c (elf32_m68k_object_p): Add EF_M68K_CF_ISA_C_NODIV.
(elf32_m68k_print_private_bfd_data): Likewise.
gas/
* config/tc-m68k.c (m68k_ip): Add mcfisa_c case.
(m68k_elf_final_processing): Add EF_M68K_CF_ISA_C_NODIV.
include/elf/
* m68k.h (EF_M68K_CF_ISA_C_NODIV): New.
2007-09-11 16:07:50 +00:00
cf557b5176
2007-09-09 H.J. Lu <hongjiu.lu@intel.com>
...
* tc-i386.c (output_insn): Only check SSE4.2 and ABM for 3
byte opcode.
2007-09-09 16:38:39 +00:00
c6fb90c8cd
2007-09-08 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (cpu_flags_check_x64): Renamed to ...
(cpu_flags_check_cpu64): This. Inline.
(uints_all_zero): New.
(uints_set): Likewise
(uints_equal): Likewise
(UINTS_ALL_ZERO): Likewise
(UINTS_SET): Likewise
(UINTS_CLEAR): Likewise
(UINTS_EQUAL): Likewise
(cpu_flags_and): Likewise.
(cpu_flags_or): Likewise.
(operand_type_and): Likewise.
(operand_type_or): Likewise.
(operand_type_xor): Likewise.
(cpu_flags_not): Inline and use switch instead of loop.
(cpu_flags_match): Updated.
(operand_type_match): Likewise.
(smallest_imm_type): Likewise.
(set_cpu_arch): Likewise.
(pt): Likewise.
(md_assemble): Likewise.
(parse_insn): Likewise.
(optimize_imm): Likewise.
(match_template): Likewise.
(process_suffix): Likewise.
(update_imm): Likewise.
(finalize_imm): Likewise.
(process_operands): Likewise.
(build_modrm_byte): Likewise.
(i386_immediate): Likewise.
(i386_displacement): Likewise.
(i386_index_check): Likewise.
(i386_operand): Likewise.
(i386_target_format): Likewise.
(intel_e11): Likewise.
(operand_type): Remove implicitregister.
(operand_type_check): Updated. Inline.
(cpu_flags_all_zero): Removed.
(operand_type_all_zero): Likewise.
(i386_array_biop): Likewise.
(cpu_flags_biop): Likewise.
(operand_type_biop): Likewise.
2007-09-09 02:49:25 +00:00
40fb982012
gas/
...
2007-09-08 H.J. Lu <hongjiu.lu@intel.com>
* configure.in (AC_CHECK_HEADERS): Add limits.h.
* configure: Regenerated.
* config.in: Likewise.
* config/tc-i386.c: Include "opcodes/i386-init.h".
(_i386_insn): Use i386_operand_type for types.
(cpu_arch_flags): Updated to new types with bitfield.
(cpu_arch_tune_flags): Likewise.
(cpu_arch_isa_flags): Likewise.
(cpu_arch): Likewise.
(i386_align_code): Likewise.
(set_code_flag): Likewise.
(set_16bit_gcc_code_flag): Likewise.
(set_cpu_arch): Likewise.
(md_assemble): Likewise.
(parse_insn): Likewise.
(process_operands): Likewise.
(output_branch): Likewise.
(output_jump): Likewise.
(parse_real_register): Likewise.
(mode_from_disp_size): Likewise.
(smallest_imm_type): Likewise.
(pi): Likewise.
(type_names): Likewise.
(pt): Likewise.
(pte): Likewise.
(swap_2_operands): Likewise.
(optimize_imm): Likewise.
(optimize_disp): Likewise.
(match_template): Likewise.
(check_string): Likewise.
(process_suffix): Likewise.
(check_byte_reg): Likewise.
(check_long_reg): Likewise.
(check_qword_reg): Likewise.
(check_word_reg): Likewise.
(finalize_imm): Likewise.
(build_modrm_byte): Likewise.
(output_insn): Likewise.
(disp_size): Likewise.
(imm_size): Likewise.
(output_disp): Likewise.
(output_imm): Likewise.
(gotrel): Likewise.
(i386_immediate): Likewise.
(i386_displacement): Likewise.
(i386_index_check): Likewise.
(i386_operand): Likewise.
(parse_real_register): Likewise.
(i386_intel_operand): Likewise.
(intel_e09): Likewise.
(intel_bracket_expr): Likewise.
(intel_e11): Likewise.
(cpu_arch_flags_not): New.
(cpu_flags_check_x64): Likewise.
(cpu_flags_all_zero): Likewise.
(cpu_flags_not): Likewise.
(i386_cpu_flags_biop): Likewise.
(cpu_flags_biop): Likewise.
(cpu_flags_match); Likewise.
(acc32): New.
(acc64): Likewise.
(control): Likewise.
(reg16_inoutportreg): Likewise.
(disp16): Likewise.
(disp32): Likewise.
(disp32s): Likewise.
(disp16_32): Likewise.
(anydisp): Likewise.
(baseindex): Likewise.
(regxmm): Likewise.
(imm8): Likewise.
(imm8s): Likewise.
(imm16): Likewise.
(imm32): Likewise.
(imm32s): Likewise.
(imm64): Likewise.
(imm16_32): Likewise.
(imm16_32s): Likewise.
(imm16_32_32s): Likewise.
(operand_type): Likewise.
(operand_type_check): Likewise.
(operand_type_match): Likewise.
(operand_type_register_match): Likewise.
(update_imm): Likewise.
(set_code_flag): Also update cpu_arch_flags_not.
(set_16bit_gcc_code_flag): Likewise.
(md_begin): Likewise.
(parse_insn): Use cpu_flags_check_x64 to check 64bit support.
Use cpu_flags_match to match instructions.
(i386_target_format): Update cpu_arch_isa_flags and
cpu_arch_tune_flags to i386_cpu_flags type with bitfield.
(smallest_imm_type): Check cpu_arch_tune to tune for i486.
(match_template): Don't initialize overlap0, overlap1,
overlap2, overlap3 and operand_types.
(process_suffix): Handle crc32 with 64bit register.
(MATCH): Removed.
(CONSISTENT_REGISTER_MATCH): Likewise.
* config/tc-i386.h (arch_entry): Updated to i386_cpu_flags
type.
opcodes/
2007-09-08 H.J. Lu <hongjiu.lu@intel.com>
* configure.in (AC_CHECK_HEADERS): Add limits.h.
* configure: Regenerated.
* config.in: Likewise.
* i386-gen.c: Include "sysdep.h" instead of <stdlib.h> and
<string.h>. Use xstrerror instead of strerror.
(initializer): New.
(cpu_flag_init): Likewise.
(bitfield): Likewise.
(BITFIELD): New.
(cpu_flags): Likewise.
(opcode_modifiers): Likewise.
(operand_types): Likewise.
(compare): Likewise.
(set_cpu_flags): Likewise.
(output_cpu_flags): Likewise.
(process_i386_cpu_flags): Likewise.
(output_opcode_modifier): Likewise.
(process_i386_opcode_modifier): Likewise.
(output_operand_type): Likewise.
(process_i386_operand_type): Likewise.
(set_bitfield): Likewise.
(operand_type_init): Likewise.
(process_i386_initializers): Likewise.
(process_i386_opcodes): Call process_i386_opcode_modifier to
process opcode_modifier. Call process_i386_operand_type to
process operand_types.
(process_i386_registers): Call process_i386_operand_type to
process reg_type.
(main): Check unused bits in i386_cpu_flags and i386_operand_type.
Sort cpu_flags, opcode_modifiers and operand_types. Call
process_i386_initializers.
* i386-init.h: New.
* i386-tbl.h: Regenerated.
* i386-opc.h: Include <limits.h>.
(CHAR_BIT): Define as 8 if not defined.
(Cpu186): Changed to position of bitfiled.
(Cpu286): Likewise.
(Cpu386): Likewise.
(Cpu486): Likewise.
(Cpu586): Likewise.
(Cpu686): Likewise.
(CpuP4): Likewise.
(CpuK6): Likewise.
(CpuK8): Likewise.
(CpuMMX): Likewise.
(CpuMMX2): Likewise.
(CpuSSE): Likewise.
(CpuSSE2): Likewise.
(Cpu3dnow): Likewise.
(Cpu3dnowA): Likewise.
(CpuSSE3): Likewise.
(CpuPadLock): Likewise.
(CpuSVME): Likewise.
(CpuVMX): Likewise.
(CpuSSSE3): Likewise.
(CpuSSE4a): Likewise.
(CpuABM): Likewise.
(CpuSSE4_1): Likewise.
(CpuSSE4_2): Likewise.
(Cpu64): Likewise.
(CpuNo64): Likewise.
(D): Likewise.
(W): Likewise.
(Modrm): Likewise.
(ShortForm): Likewise.
(Jump): Likewise.
(JumpDword): Likewise.
(JumpByte): Likewise.
(JumpInterSegment): Likewise.
(FloatMF): Likewise.
(FloatR): Likewise.
(FloatD): Likewise.
(Size16): Likewise.
(Size32): Likewise.
(Size64): Likewise.
(IgnoreSize): Likewise.
(DefaultSize): Likewise.
(No_bSuf): Likewise.
(No_wSuf): Likewise.
(No_lSuf): Likewise.
(No_sSuf): Likewise.
(No_qSuf): Likewise.
(No_xSuf): Likewise.
(FWait): Likewise.
(IsString): Likewise.
(RegKludge): Likewise.
(IsPrefix): Likewise.
(ImmExt): Likewise.
(NoRex64): Likewise.
(Rex64): Likewise.
(Ugh): Likewise.
(Reg8): Likewise.
(Reg16): Likewise.
(Reg32): Likewise.
(Reg64): Likewise.
(FloatReg): Likewise.
(RegMMX): Likewise.
(RegXMM): Likewise.
(Imm8): Likewise.
(Imm8S): Likewise.
(Imm16): Likewise.
(Imm32): Likewise.
(Imm32S): Likewise.
(Imm64): Likewise.
(Imm1): Likewise.
(BaseIndex): Likewise.
(Disp8): Likewise.
(Disp16): Likewise.
(Disp32): Likewise.
(Disp32S): Likewise.
(Disp64): Likewise.
(InOutPortReg): Likewise.
(ShiftCount): Likewise.
(Control): Likewise.
(Debug): Likewise.
(Test): Likewise.
(SReg2): Likewise.
(SReg3): Likewise.
(Acc): Likewise.
(FloatAcc): Likewise.
(JumpAbsolute): Likewise.
(EsSeg): Likewise.
(RegMem): Likewise.
(OTMax): Likewise.
(Reg): Commented out.
(WordReg): Likewise.
(ImplicitRegister): Likewise.
(Imm): Likewise.
(EncImm): Likewise.
(Disp): Likewise.
(AnyMem): Likewise.
(LLongMem): Likewise.
(LongMem): Likewise.
(ShortMem): Likewise.
(WordMem): Likewise.
(ByteMem): Likewise.
(CpuMax): New
(CpuLM): Likewise.
(CpuNumOfUints): Likewise.
(CpuNumOfBits): Likewise.
(CpuUnused): Likewise.
(OTNumOfUints): Likewise.
(OTNumOfBits): Likewise.
(OTUnused): Likewise.
(i386_cpu_flags): New type.
(i386_operand_type): Likewise.
(i386_opcode_modifier): Likewise.
(CpuSledgehammer): Removed.
(CpuSSE4): Likewise.
(CpuUnknownFlags): Likewise.
(Reg): Likewise.
(WordReg): Likewise.
(ImplicitRegister): Likewise.
(Imm): Likewise.
(EncImm): Likewise.
(Disp): Likewise.
(AnyMem): Likewise.
(LLongMem): Likewise.
(LongMem): Likewise.
(ShortMem): Likewise.
(WordMem): Likewise.
(ByteMem): Likewise.
(template): Use i386_cpu_flags for cpu_flags, use
i386_opcode_modifier for opcode_modifier, use
i386_operand_type for operand_types.
(reg_entry): Use i386_operand_type for reg_type.
* Makefile.am (HFILES): Add i386-init.h.
($(srcdir)/i386-init.h): New rule.
($(srcdir)/i386-tbl.h): Depend on $(srcdir)/i386-init.h
instead.
* Makefile.in: Regenerated.
2007-09-09 01:22:57 +00:00
26186d7440
gas/
...
2007-09-06 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (match_template): Handle invlpga, vmload,
vmrun and vmsave in SVME.
(process_suffix): Likewise.
gas/testsuite/
2007-09-06 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/svme.s: Updated to allow eax in 64bit.
* gas/i386/svme.d: Updated.
* gas/i386/svme64.d: Likewise.
opcodes/
2007-09-06 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.tbl: Correct SVME instructions to allow 32bit register
operand in 64bit mode.
* i386-tbl.h: Regenerated.
2007-09-06 12:28:12 +00:00
d946b91f67
2007-09-05 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (i386_index_check): Don't use RegRex
on the reg_type field.
(parse_real_register): Use `||' instead of `|'.
2007-09-05 13:36:14 +00:00
75178d9df6
2007-09-04 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (process_operands): Remove segment override
check on SVME instructions.
(i386_index_check): Remove memory operand check on SVME
instructions.
2007-09-04 14:44:35 +00:00
7bc3e93c1b
* config/tc-spu.c (struct spu_insn): Delete "flag". Add "reloc".
...
(md_assemble): Update init of insn. Use insn.reloc instead of
calculating from flag.
(get_imm): Set reloc rather than flag.
(calcop): Formatting.
2007-09-04 04:10:21 +00:00
d9a5e5e5c9
gas/
...
2007-08-28 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (process_suffix): Handle cmpxchg8b in
Intel mode.
gas/testsuite/
2007-08-28 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/mem.s: New. Add tests for instructions with one
memory operand.
* gas/i386/x86-64-mem.s: Likewise.
* gas/i386/mem-intel.d: Updated.
* gas/i386/mem.d: Likewise.
* gas/i386/x86-64-mem-intel.d: Likewise.
* gas/i386/x86-64-mem.d: Likewise.
opcodes/
2007-08-28 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (Md): New.
(grps): Use 0 on invlpg. Use M on fxsave and fxrstor. Use
Md on ldmxcsr and stmxcsr. Use b_mode on clflush.
(OP_0fae): Clear bytemode for sfence.
2007-08-28 17:36:34 +00:00
def8fc92cd
* config/tc-m68k.c (mcf52235_ctrl): Add cache registers.
...
(mcf5253_ctrl): Add RAMBAR, MBAR, MBAR2.
(mcf5407_ctrl): New.
(m68k_cpus): Adjust 5407 entry.
2007-08-28 13:43:06 +00:00
f75192f2d0
* config/tc-m68k.c (mcf51qe_ctrl): Define 51QE control registers.
...
(m68k_cpus): Define 51QE cpu.
2007-08-28 13:36:35 +00:00
495bde8ec4
2007-08-24 Aurelien Jarno <aurel32@debian.org>
...
* config/tc-arm.c (md_apply_fix): Cast bfd_vma values to long
before printing them.
2007-08-24 16:59:16 +00:00
67c11a9b99
* config/tc-i386.c (lex_got): Don't scan past a comma.
2007-08-24 04:18:37 +00:00
c3d65c1ced
binutils/
...
* doc/binutils.texi (objdump): Document -Mppcps.
gas/
* config/tc-ppc.c (parse_cpu): Handle "750cl".
(pre_defined_registers): Add "gqr0" to "gqr7", "gqr.0" to "gqr.7".
(md_show_usage): Document -m750cl.
(md_assemble): Handle two delimiters in succession (eg. `),').
* doc/c-ppc.texi (PowerPC-Opts): Document -m750cl.
* testsuite/gas/ppc/ppc.exp: Run ppc70ps dump tests.
* testsuite/gas/ppc/ppc750ps.s: New file.
* testsuite/gas/ppc/ppc750ps.d: Likewise.
include/opcode/
* ppc.h (PPC_OPCODE_PPCPS): New.
opcodes/
* ppc-opc.c (PSW, PSWM, PSQ, PSQM, PSD, MTMSRD_L): New.
(XOPS, XOPS_MASK, XW, XW_MASK): Likewise.
(PPCPS): Likewise.
(powerpc_opcodes): Add all pair singles instructions.
* ppc-dis.c (powerpc_dialect): Handle "ppcps".
(print_ppc_disassembler_options): Document -Mppcps.
2007-08-24 00:56:30 +00:00
3992d3b7e2
PR gas/4079
...
* config/tc-i386.c (x86_cons): Complain about invalid @got etc.
expressions.
(i386_immediate): Detect and complain about more cases of
invalid immediate expressions. Return failure rather than
converting them to zero.
(i386_displacement): Likewise.
2007-08-17 14:12:43 +00:00
cf73852866
* config/tc-ia64.c (tc_gen_reloc): Return NULL if relocation is
...
unrepresentable.
2007-08-14 10:44:12 +00:00
4396b6862a
2007-08-09 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (relaxed_symbol_addr): Compensate for alignment.
gas/testsuite/
* gas/arm/relax_load_align.d: new test.
* gas/arm/relax_load_align.s: new test.
2007-08-09 15:11:07 +00:00
c3ad16c0cd
gas/
...
2007-08-09 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (check_byte_reg): Support pextrb and pinsrb.
gas/testsuite/
2007-08-09 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run sse4_1-intel, sse4_2-intel,
x86-64-sse4_1-intel and x86-64-sse4_2-intel.
* gas/i386/sse4_1-intel.d: New file.
* gas/i386/sse4_2-intel.d: Likewise.
* gas/i386/x86-64-sse4_1-intel.d: Likewise.
* gas/i386/x86-64-sse4_2-intel.d: Likewise.
* gas/i386/sse4_1.s: Add tests for Intel syntax.
* gas/i386/sse4_2.s: Likewise.
* gas/i386/x86-64-sse4_1.s: Likewise.
* gas/i386/x86-64-sse4_2.s: Likewise.
* gas/i386/sse4_1.d: Updated.
* gas/i386/sse4_2.d: Likewise.
* gas/i386/x86-64-sse4_1.d: Likewise.
* gas/i386/x86-64-sse4_2.d: Likewise.
opcodes/
2007-08-09 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.tbl: Add NoRex64 to pmovsxbw, pmovsxwd, pmovsxdq,
pmovzxbw, pmovzxwd, pmovzxdq and roundsd.
* i386-tbl.h: Regenerated.
2007-08-09 13:50:51 +00:00
34828aad95
gas/
...
2007-07-29 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (check_long_reg): Allow cvtss2si to convert
DWORD memory to Reg64 in Intel synax.
(check_qword_reg): Allow cvtsd2si to convert QWORD memory to
Reg32 in Intel syntax.
gas/testsuite/
2007-07-29 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/simd.s: Add tests for cvtss2si/cvtsd2si in Intel
mode.
* gas/i386/x86-64-simd.s: Likewise.
* gas/i386/simd-intel.d: Updated.
* gas/i386/simd.d: Likewise.
* gas/i386/x86-64-simd-intel.d: Likewise.
* gas/i386/x86-64-simd.d: Likewise.
2007-07-29 18:27:59 +00:00
d12f9798ef
* config/tc-xtensa.c (xtensa_extui_opcode): New.
...
(xg_expand_assembly_insn): Check for invalid extui operands.
(md_begin): Initialize xtensa_extui_opcode.
2007-07-25 17:33:27 +00:00
9ce0cf5607
* config/tc-mep.h (skip_whitespace): Remove definition.
2007-07-24 12:38:35 +00:00
76bc74dc40
gas/
...
2007-07-23 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (cpu_arch): Change i386 to PROCESSOR_I386.
(f32_15): Removed.
(jump_31): New.
(f32_patt): Remove f32_15.
(f16_patt): Likewise.
(i386_align_code): Updated to alt_long_patt for 64bit by
default.
* config/tc-i386.h (processor_type): Add PROCESSOR_I386.
2007-07-23 Evandro Menezes <evandro.menezes@amd.com>
* config/tc-i386.c (i386_align_code): Enable alignment up to
MAX_MEM_FOR_RS_ALIGN_CODE bytes. Remove special treatment
for K8.
* config/tc-i386.h (MAX_MEM_FOR_RS_ALIGN_CODE): Changed to
31.
gas/testsuite/
2007-07-23 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run nops16-1, nops-1-i386-i686, nops-1-k8,
nops-3-i386, nops-4, nops-4-i386, x86-64-nops-2, x86-64-nops-3,
x86-64-nops-4, x86-64-nops-4-core2 and x86-64-nops-4-k8.
* gas/i386/nops-1-i386-i686.d: New.
* gas/i386/nops-1-k8.d: Likewise.
* gas/i386/nops-3-i386.d : Likewise.
* gas/i386/nops-3-i686.d: Likewise.
* gas/i386/nops-4-i386.d: Likewise.
* gas/i386/nops-4.d: Likewise.
* gas/i386/nops16-1.d: Likewise.
* gas/i386/nops16-1.s: Likewise.
* gas/i386/x86-64-nops-1-k8.d: Likewise.
* gas/i386/x86-64-nops-2.d: Likewise.
* gas/i386/x86-64-nops-3.d: Likewise.
* gas/i386/x86-64-nops-4-core2.d: Likewise.
* gas/i386/x86-64-nops-4-k8.d: Likewise.
* gas/i386/x86-64-nops-4.d: Likewise.
* gas/i386/nops-1-i386.d: Updated.
* gas/i386/nops-1-i686.d: Likewise.
* gas/i386/nops-1.d: Likewise.
* gas/i386/nops-2-i386.d: Likewise.
* gas/i386/nops-2-merom.d : Likewise.
* gas/i386/nops-2.d: Likewise.
* gas/i386/nops-3.d: Likewise.
* gas/i386/x86-64-nops-1-merom.d: Likewise.
* gas/i386/x86-64-nops-1-nocona.d: Likewise.
* gas/i386/x86-64-nops-1.d: Likewise.
* gas/i386/x86-64-nops-1.s: Removed.
2007-07-23 Evandro Menezes <evandro.menezes@amd.com>
H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Don't run x86-64-nops-1-k8. Run
nops-3-i686 and nops-4-i686.
* gas/i386/nops-3-i686.d: New.
* gas/i386/nops-4-i686.d: Likewise.
* gas/i386/nops-4.s: Likewise.
* gas/i386/x86-64-nops-1-k8.d: Removed.
2007-07-23 20:03:23 +00:00
d929913e77
* config/tc-arm.c (create_register_alias): Return a boolean rather than an integer.
...
Check the return value of insert_reg_alias and do not continue to create aliases once an insertion has failed.
(s_unreq): Delete the all-upper-case and all-lower-case alternatives as well.
* testsuite/gas/arm/arm.s: Add tests for re-aliasing a previously removed alias.
* testsuite/gas/arm/arm.l: Add new expected warning message.
2007-07-14 16:19:18 +00:00
369943fe52
* config/tc-mips.c (mips_dwarf2_format, mips_dwarf2_addr_size): Use
...
HAVE_64BIT_SYMBOLS.
2007-07-11 15:11:15 +00:00
0fdf195198
gas/
...
* config/tc-mips.c (mips_cpu_info_table): Add new entries for
{24k,24ke,34k,74k}f{2_1,1_1,x}. Also add an entry for 74kf3_2.
Deprecate *x and *fx.
* doc/c-mips.texi: Document the new CPU arguments. Deprecate
*x and *fx.
2007-07-04 19:55:18 +00:00
872ce6ff99
gas/
...
2007-07-04 H.J. Lu <hongjiu.lu@intel.com>
* config/obj-coff.h (x86_64_target_format): Renamed to ...
(i386_target_format): This
(TARGET_FORMAT): Use i386_target_format.
* config/tc-i386.c (x86_64_target_format): Removed.
(i386_target_format): Handle PE formats.
gas/testsuite/
2007-07-04 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run x86-64-nops-1 for x86_64-*-mingw*.
2007-07-04 15:32:46 +00:00
ec2655a6a7
Switch to GPLv3
2007-07-03 11:01:12 +00:00
afa2158f09
gas/testsuite/
...
* gas/m68k/mcf-coproc.d: New.
* gas/m68k/mcf-coproc.s: New.
* gas/m68k/all.exp: Add it.
gas/
* config/tc-m68k.c (m68k_ip): Add j & K operand types.
(install_operand): Add E encoding.
(md_begin): Check and skip initial '.' arg character.
(get_num): Add 0..511 case.
include/
* opcode/m68k.h: Document j K & E.
opcodes/
* m68k-dis.c (fetch_arg): Add E. Replace length switch with
direct masking.
(print_ins_arg): Add j & K operand types.
(match_insn_m68k): Check and skip initial '.' arg character.
(m68k_scan_mask): Likewise.
* m68k-opc.c (m68k_opcodes): Add coprocessor instructions.
2007-07-03 07:54:19 +00:00
ae4a729bff
PR 4713
...
* config/obj-elf.c (elf_ecoff_set_ext): Make static when OBJ_MAYBE_ELF.
* config/obj-elf.h (obj_ecoff_set_ext): Comment.
2007-07-03 03:29:40 +00:00
741d6ea85b
bfd:
...
* elfxx-mips.c (mips_elf_calculate_relocation): Handle
R_MIPS_TLS_DTPREL32 and R_MIPS_TLS_DTPREL64.
* elf64-mips.c (mips_elf64_howto_table_rela): Support
R_MIPS_TLS_DTPREL64.
gas:
* config/tc-mips.c (s_dtprelword, s_dtpreldword,
s_dtprel_internal): New.
(mips_pseudo_table): Add .dtprelword and .dtpreldword.
(md_apply_fix): Handle BFD_RELOC_MIPS_TLS_DTPREL32 and
BFD_RELOC_MIPS_TLS_DTPREL64.
2007-07-02 10:49:42 +00:00
8d452c7870
* config/tc-ppc.c (ppc_pe_section): Comment out code assigning
...
coff section flag values to bfd section flag.
2007-07-02 02:11:56 +00:00
104d59d19c
bfd:
...
* elf-attrs.c: New.
* Makefile.am (BFD32_BACKENDS): Add elf-attrs.lo.
(BFD32_BACKENDS_CFILES): Add elf-attrs.c.
(elf-attrs.lo): Generate dependencies.
* Makefile.in: Regenerate.
* configure.in (elf): Add elf-attrs.lo.
* configure: Regenerate.
* elf-bfd.h (struct elf_backend_data): Add entries for object
attributes.
(NUM_KNOWN_OBJ_ATTRIBUTES, obj_attribute, obj_attribute_list,
OBJ_ATTR_PROC, OBJ_ATTR_GNU, OBJ_ATTR_FIRST, OBJ_ATTR_LAST,
Tag_NULL, Tag_File, Tag_Section, Tag_Symbol, Tag_compatibility):
New.
(struct elf_obj_tdata): Add entries for object attributes.
(elf_known_obj_attributes, elf_other_obj_attributes,
elf_known_obj_attributes_proc, elf_other_obj_attributes_proc):
New.
(bfd_elf_obj_attr_size, bfd_elf_set_obj_attr_contents,
bfd_elf_get_obj_attr_int, bfd_elf_add_obj_attr_int,
bfd_elf_add_proc_attr_int, bfd_elf_add_obj_attr_string,
bfd_elf_add_proc_attr_string, bfd_elf_add_obj_attr_compat,
bfd_elf_add_proc_attr_compat, _bfd_elf_attr_strdup,
_bfd_elf_copy_obj_attributes, _bfd_elf_obj_attrs_arg_type,
_bfd_elf_parse_attributes, _bfd_elf_merge_object_attributes): New.
* elf.c (_bfd_elf_copy_private_bfd_data): Copy object attributes.
(bfd_section_from_shdr): Handle attributes sections.
* elflink.c (bfd_elf_final_link): Handle attributes sections.
* elfxx-target.h (elf_backend_obj_attrs_vendor,
elf_backend_obj_attrs_section, elf_backend_obj_attrs_arg_type,
elf_backend_obj_attrs_section_type): New.
(elfNN_bed): Update.
* elf32-arm.c (NUM_KNOWN_ATTRIBUTES, aeabi_attribute,
aeabi_attribute_list): Remove.
(struct elf32_arm_obj_tdata): Remove object attributes fields.
(check_use_blx, bfd_elf32_arm_set_vfp11_fix, using_thumb2,
elf32_arm_copy_private_bfd_data, elf32_arm_merge_eabi_attributes):
Update for new object attributes interfaces.
(uleb128_size, is_default_attr, eabi_attr_size,
elf32_arm_eabi_attr_size, write_uleb128, write_eabi_attribute,
elf32_arm_set_eabi_attr_contents, elf32_arm_bfd_final_link,
elf32_arm_new_eabi_attr, elf32_arm_get_eabi_attr_int,
elf32_arm_add_eabi_attr_int, attr_strdup,
elf32_arm_add_eabi_attr_string, elf32_arm_add_eabi_attr_compat,
copy_eabi_attributes, elf32_arm_parse_attributes): Remove. Moved
to generic code in elf-attrs.c.
(elf32_arm_obj_attrs_arg_type): New.
(elf32_arm_fake_sections): Do not handle .ARM.attributes.
(elf32_arm_section_from_shdr): Do not handle SHT_ARM_ATTRIBUTES.
(bfd_elf32_bfd_final_link): Remove.
(elf_backend_obj_attrs_vendor, elf_backend_obj_attrs_section,
elf_backend_obj_attrs_arg_type,
elf_backend_obj_attrs_section_type): New.
* elf32-bfin.c (bfin_elf_copy_private_bfd_data): Copy object
attributes.
* elf32-frv.c (frv_elf_copy_private_bfd_data): Likewise.
* elf32-iq2000.c (iq2000_elf_copy_private_bfd_data): Likewise.
* elf32-mep.c (mep_elf_copy_private_bfd_data): Likewise.
* elf32-mt.c (mt_elf_copy_private_bfd_data): Likewise.
* elf32-sh.c (sh_elf_copy_private_data): Likewise.
* elf64-sh64.c (sh_elf64_copy_private_data_internal): Likewise.
binutils:
* readelf.c (display_gnu_attribute): New.
(process_arm_specific): Rearrange as process_attributes.
(process_arm_specific): Replace by wrapper of process_attributes.
gas:
* as.c (create_obj_attrs_section): New.
(main): Call create_obj_attrs_section for ELF.
* read.c (s_gnu_attribute, skip_whitespace, skip_past_char,
skip_past_comma, s_vendor_attribute): New.
(potable): Add gnu_attribute for ELF.
* read.h (s_vendor_attribute): Declare.
* config/tc-arm.c (s_arm_eabi_attribute): Replace by wrapper
round s_vendor_attribute.
(aeabi_set_public_attributes): Update for new attributes
interfaces.
(arm_md_end): Remove attributes contents setting now done
generically.
include/elf:
* arm.h (elf32_arm_add_eabi_attr_int,
elf32_arm_add_eabi_attr_string, elf32_arm_add_eabi_attr_compat,
elf32_arm_get_eabi_attr_int, elf32_arm_set_eabi_attr_contents,
elf32_arm_eabi_attr_size, Tag_NULL, Tag_File, Tag_Section,
Tag_Symbol, Tag_compatibility): Remove.
* common.h (SHT_GNU_ATTRIBUTES): Define.
ld:
* emulparams/armelf.sh (OTHER_SECTIONS): Remove .ARM.attributes.
(ATTRS_SECTIONS): Define.
* scripttempl/elf.sc, scripttempl/elf32sh-symbian.sc,
scripttempl/elf_chaos.sc, scripttempl/elfi370.sc,
scripttempl/elfxtensa.sc: Handle ATTRS_SECTIONS.
2007-06-29 16:29:17 +00:00
3d3d428f04
New port: National Semiconductor's CR16
2007-06-29 14:09:34 +00:00
cd2cf30b7d
2007-06-26 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (parse_operands): Accept generic coprocessor regs
for OP_RVC.
(reg_names): Add fpinst, pfinst2, mvfr0 and mvfr1.
gas/testsuite/
* gas/arm/vfp1xD.d: Add new fmrx/fmxr tests.
* gas/arm/vfp1xD.s: Ditto.
* gas/arm/vfp1xD_t2.d: Ditto.
* gas/arm/vfp1xD_t2.s: Ditto.
opcodes/
* arm-dis.c (coprocessor_opcodes): Add fmxr/fmrx mvfr0/mvfr1.
2007-06-26 21:36:37 +00:00
5f15756d11
gas/
...
2007-06-25 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (process_operands): Replace regKludge
with RegKludge.
opcodes/
2007-06-25 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.h (regKludge): Renamed to ...
(RegKludge): This.
* i386-opc.c (i386_optab): Replace regKludge with RegKludge.
2007-06-25 21:20:20 +00:00
b314ec0eae
bfd/
...
* elfxx-mips.c (mips_elf_calculate_relocation): Allow local stubs
to be used for calls from MIPS16 code.
gas/
* config/tc-mips.h (TC_SYMFIELD_TYPE): New.
* config/tc-mips.c (append_insn): Record which symbols have
R_MIPS16_26 relocations against them.
(mips_fix_adjustable): Don't reduce relocations against such symbols.
ld/testsuite/
* ld-mips-elf/mips16-local-stubs-1.s,
* ld-mips-elf/mips16-local-stubs-1.d: New tests.
* ld-mips-elf/mips-elf.exp: Run them.
2007-06-25 10:13:57 +00:00
b81bf389ec
* config/tc-xtensa.c (xg_assembly_relax): Comment termination rules.
...
(frag_format_size): Handle RELAX_IMMED_STEP3.
(xtensa_relax_frag, md_convert_frag): Likewise.
* config/tc-xtensa.h (xtensa_relax_statesE): Add RELAX_IMMED_STEP3.
(RELAX_IMMED_MAXSTEPS): Adjust.
* config/xtensa-relax.c (widen_spec_list): Add transitions from
wide branches to branch-over-jumps.
(build_transition): Handle wide branches in transition patterns.
2007-06-22 18:44:50 +00:00
e205caa764
2007-06-22 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (disp_size): New.
(imm_size): Likewise.
(output_disp): Use disp_size and imm_size.
(output_imm): Use imm_size.
2007-06-22 14:15:51 +00:00
c48aaca0ba
* config/tc-xtensa.h (struct xtensa_frag_type): Update comment about
...
use of literal_frag field.
* config/tc-xtensa.c (xtensa_mark_literal_pool_location): Record frag
in the literal_frag field.
(xtensa_move_literals): Use it here instead of searching. Update
literal_frag field with new value.
2007-06-19 19:08:37 +00:00
728ca7c9fe
2007-06-14 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (do_t_mov_cmp): Handle shift by register and
narrow shift by immediate.
gas/testsuite/
* gas/arm/thumb32.s: Add tests for shift instructions.
* gas/arm/thumb32.d: Ditto.
2007-06-14 22:06:19 +00:00
99ded152a5
bfd/
...
* elf32-xtensa.c (extend_ebb_bounds_forward): Use renamed
XTENSA_PROP_NO_TRANSFORM flag instead of XTENSA_PROP_INSN_NO_TRANSFORM.
(extend_ebb_bounds_backward, compute_text_actions): Likewise.
(compute_ebb_proposed_actions, coalesce_shared_literal): Likewise.
(xtensa_get_property_predef_flags): Likewise.
(compute_removed_literals): Pass new arguments to is_removable_literal.
(is_removable_literal): Add sec, prop_table and ptblsize arguments.
Do not remove literal if the NO_TRANSFORM property flag is set.
gas/
* config/tc-xtensa.c (XTENSA_PROP_INSN_NO_TRANSFORM): Renamed to...
(XTENSA_PROP_NO_TRANSFORM): ...this.
(frag_flags_struct): Move is_no_transform out of the insn sub-struct.
(xtensa_mark_frags_for_org): New.
(xtensa_handle_align): Set RELAX_ORG frag subtype for rs_org.
(xtensa_post_relax_hook): Call xtensa_mark_frags_for_org.
(get_frag_property_flags): Adjust reference to is_no_transform flag.
(xtensa_frag_flags_combinable): Likewise.
(frag_flags_to_number): Likewise. Use XTENSA_PROP_NO_TRANSFORM.
* config/tc-xtensa.h (xtensa_relax_statesE): Add RELAX_ORG.
include/elf/
* xtensa.h (XTENSA_PROP_INSN_NO_TRANSFORM): Renamed to...
(XTENSA_PROP_NO_TRANSFORM): ...this.
ld/
* emultempl/xtensaelf.em (replace_insn_sec_with_prop_sec): Use renamed
XTENSA_PROP_NO_TRANSFORM flag instead of XTENSA_PROP_INSN_NO_TRANSFORM.
2007-06-11 16:53:08 +00:00
dce323d1dd
2007-06-06 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (s_align): Pad code sections appropriately.
gas/testsuite/
* gas/arm/thumb.d: Update expected output.
* gas/arm/thumb2_relax.d: Ditto.
2007-06-06 17:36:54 +00:00
79d4951621
2007-06-05 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (insns): Correct Thumb-2 ldrd/strd opcodes.
gas/testsuite/
* gas/arm/thumb32.d: Add writeback addressing mode tests.
* gas/arm/thumb32.s: Update expected output.
opcodes/
* arm-dis.c (thumb32_opcodes): Display writeback ldrd/strd addresses.
2007-06-05 22:02:47 +00:00
dfeb06664a
Patch for PR4587 + move proc run_list_test into gas-defs.exp
2007-06-05 17:00:33 +00:00
353ab8610a
* config/tc-spu.c (spu_cons): Use deferred_expression. Handle
...
number@ppu.
(tc_gen_reloc): Abort if neither addsy or subsy is set.
(md_apply_fix): Don't attempt to resolve SPU_PPU relocs.
* config/tc-spu.h (md_operand): Handle @ppu without sym.
2007-06-05 00:28:04 +00:00
91568d083a
2007-05-31 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (insns): Allow strex on M profile cores.
2007-05-31 14:50:16 +00:00
c699f08779
gas/
...
2007-05-29 David S. Miller <davem@davemloft.net>
Jakub Jelinek <jakub@redhat.com>
PR gas/4558
* config/tc-sparc.c (md_apply_fix): Fix relocation overflow checks
for BFD_RELOC_SPARC_WDISP16 and BFD_RELOC_SPARC_WDISP19.
gas/testsuite/
2007-05-29 Jakub Jelinek <jakub@redhat.com>
PR gas/4558
* gas/sparc/sparc.exp: Add v9branch{1,2,3,4,5} tests.
* gas/sparc/v9branch1.d: New test.
* gas/sparc/v9branch1.s: New.
* gas/sparc/v9branch2.d: New test.
* gas/sparc/v9branch2.s: New.
* gas/sparc/v9branch3.d: New test.
* gas/sparc/v9branch3.s: New.
* gas/sparc/v9branch4.d: New test.
* gas/sparc/v9branch4.s: New.
* gas/sparc/v9branch5.d: New test.
* gas/sparc/v9branch5.s: New.
2007-05-29 13:18:59 +00:00
945370aa44
* config/tc-spu.h: Wrap in #ifndef/#endif. Delete coff macros.
2007-05-29 02:10:09 +00:00
98027b1061
* config/tc-ppc.c: Convert to ISO C.
...
* config/tc-ppc.c: Likewise.
2007-05-29 01:57:08 +00:00
a1867a27d0
* config/tc-ppc.c (ppc_insert_operand): Truncate sign bits in
...
top 32 bits of 64 bit value if so doing results in passing
range check. Rewrite sign extension fudges similarly. Enable
fudges for powerpc64 too. Report user value if range check
fails rather than fudged value. Negate PPC_OPERAND_NEGATIVE
range rather than value, also to report user value on failure.
2007-05-26 14:49:39 +00:00
efd81785d9
2007-03-25 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (T2_SUBS_PC_LR): Define.
(do_t_add_sub): Correctly encode subs pc, lr, #const.
(do_t_mov_cmp): Correctly encode movs pc, lr.
gas/testsulte/
* gas/arm/thumb32.s: Add tests for subs pc, lr.
* gas/arm/thumb32.d: Change error-output: to stderr:.
Update expected output.
2007-05-25 23:13:24 +00:00
e6559e01f9
* config/tc-mips.c (s_mipsset): Use generic s_set for directives
...
containing a comma.
2007-05-18 19:03:53 +00:00
2b87874220
* config/tc-m68k.c (md_apply_fix): Show value of out of range
...
fixups in error message.
(md_conver_frag_1): Propagate the fix source location and use
as_bad_where rather than fatal, for better error messages.
2007-05-17 13:10:42 +00:00
2b744c99f2
2007-05-16 Paul Brook <paul@codesourcery.com>
...
* config/tc-arm.c (v7m_psrs): Add uppercase PSR names and xpsr.
2007-05-16 21:06:54 +00:00
1c3f20b4d1
PR gas/3041
...
* config/tc-m68k.c (relaxable_symbol): Make sure that the correct addend is stored for relocs against weak symbols.
(md_apply_fix): So not loose track of addend for relocs against weak symbols.
* testsuite/gas/m68k/p3041.s: New test case.
* testsuite/gas/m68k/p3041.d: New expected disassembly.
* testsuite/gas/m68k/all.exp: Run new test for m68k-*-netbsd toolchains.
Only run arch-cpu-1 test for ELF based toolchains.
Tidy ups for m68k-netbsd gas toolchain:
* testsuite/gas/m68k/cpu32.d: Allow for extra text after expected disassembly.
* testsuite/gas/m68k/mcf-trap.d: Allow for alternative trap mnemonics.
* testsuite/gas/m68k/br-isab.d: Fix name of test.
* testsuite/gas/m68k/br-isac.d: Fix name of test.
2007-05-15 09:21:24 +00:00
24471d4209
* config/tc-mips.c (md_parse_option): Fix parsing of -O option.
2007-05-14 12:28:46 +00:00
b0253a5390
2007-05-14 Mei Ligang <ligang@sunnorth.com.cn>
...
* config/tc-score.c (data_op2, validate_immediate): Fix bug for addri, addri.c, subi, and
subi.c when immediate number is hex.
(score_insns): Remove subis and subis.c.
(do_sub_rdi16): Delete.
2007-05-14 10:06:32 +00:00
ece5ef6079
include/elf/
...
* spu.h (R_SPU_PPU32, R_SPU_PPU64): Define.
bfd/
* reloc.c (BFD_RELOC_SPU_PPU32, BFD_RELOC_SPU_PPU64): Define.
* elf-bfd.h (struct elf_backend_data): Change return type of
elf_backend_relocate_section to int.
* elf32-spu.c (elf_howto_table): Add howtos for R_SPU_PPU32 and
R_SPU_PPU64.
(spu_elf_bfd_to_reloc_type): Convert new relocs.
(spu_elf_count_relocs): New function.
(elf_backend_count_relocs): Define.
(spu_elf_relocate_section): Arrange to emit R_SPU_PPU32 and
R_SPU_PPU64 relocs.
* elflink.c (elf_link_input_bfd): Emit relocs if relocate_section
returns 2.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
gas/
* config/tc-spu.c (md_pseudo_table): Add int, long, quad. Call
spu_cons for word.
(md_assemble): Tidy use of insn.flag.
(get_imm): Likewise. Handle uppercase input too.
(spu_cons): New function.
* config/tc-spu.h (tc_fix_adjustable): Don't adjust SPU_PPU relocs.
(TC_FORCE_RELOCATION): Don't resolve them either.
binutils/
* embedspu.sh (find_prog): Prefer prog in same dir as embedspu
over one found on the users path.
(main): Generate .reloc for each R_SPU_PPU* reloc.
2007-05-11 03:10:11 +00:00
f9d4405b8f
gas/
...
* config/tc-arm.c (md_apply_fix): Generate more accurate
diagnostic when 8-bit immediate range is exceeded for
BFD_RELOC_ARM_OFFSET_IMM8.
2007-05-05 16:23:57 +00:00
0787a12d29
PR gas/4460
...
* config/tc-i386.c (lex_got): Don't replace the reloc token with
a space if we already have a space.
2007-05-04 00:02:47 +00:00
20592a94ff
gas/
...
2007-05-03 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (match_template): Don't explicitly check
suffix for crc32 in Intel mode.
(process_suffix): Issue an error for crc32 if the operand size
is ambiguous.
gas/testsuite/
2007-05-03 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/crc32-intel.d: Updated.
* gas/i386/crc32.d: Likewise.
* gas/i386/sse4_2.d: Likewise.
* gas/i386/x86-64-crc32-intel.d: Likewise.
* gas/i386/x86-64-crc32.d: Likewise.
* gas/i386/x86-64-sse4_2.d: Likewise.
* gas/i386/crc32.s: Remove crc32 instructions with ambiguous
operand size and suffix in crc32 instructions in Intel mode.
* gas/i386/x86-64-crc32.s: Likewise.
* gas/i386/sse4_2.s: Remove crc32 instructions with ambiguous
operand size.
* gas/i386/x86-64-sse4_2.s: Likewise.
* gas/i386/i386.exp: Run inval-crc32 and x86-64-inval-crc32.
* gas/i386/inval-crc32.l: New.
* gas/i386/inval-crc32.s: Likewise.
* gas/i386/x86-64-inval-crc32.l: Likewise.
* gas/i386/x86-64-inval-crc32.s: Likewise.
opcodes/
2007-05-03 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (CRC32_Fixup): Don't print suffix in Intel mode.
* i386-opc.c (i386_optab): Remove IgnoreSize and correct operand
type for crc32.
2007-05-03 21:07:16 +00:00
22184a77be
PR gas/3041
...
* gas/config/tc-m68k.c (relaxable_symbol): Do not relax weak symbols.
(tc_gen_reloc): Adjust the addend of relocs against weak symbols.
(md_apply_fix): Put zero values into the frags referencing weak symbols.
* bfd/aoutx.h (swap_std_reloc_out): Treat relocs against weak symbols in the same way as relocs against external symbols.
2007-05-03 15:55:38 +00:00
3896c469d2
gas/
...
PR 4448
* config/tc-ppc.c (ppc_insert_operand): Don't increase min for
PPC_OPERAND_PLUS1.
include/opcode/
* ppc.h (PPC_OPERAND_PLUS1): Update comment.
2007-05-02 11:24:17 +00:00
9344ff2951
gas/config/
...
2007-05-01 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (match_template): Check suffix for crc32 in
Intel mdoe.
(process_suffix): Default the suffix of 8bit crc32 to
BYTE_MNEM_SUFFIX.
(check_byte_reg): Skip check for 8bit crc32.
gas/testsuite/
2007-05-01 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/crc32-intel.d: New file.
* gas/i386/crc32.d:Likewise.
* gas/i386/crc32.s:Likewise.
* gas/i386/x86-64-crc32-intel.d:Likewise.
* gas/i386/x86-64-crc32.d:Likewise.
* gas/i386/x86-64-crc32.s:Likewise.
* gas/i386/i386.exp: Run crc32, crc32-intel, x86-64-crc32
and x86-64-crc32-intel.
opcodes/
2007-05-01 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (CRC32_Fixup): Properly handle Intel mode and
check data size prefix in 16bit mode.
* i386-opc.c (i386_optab): Default crc32 to non-8bit and
support Intel mode.
2007-05-01 12:59:24 +00:00
a540244da6
2007-04-30 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (md_assemble): Use register_prefix in
error/warning message.
(check_byte_reg): Likewise.
(check_long_reg): Likewise.
(check_qword_reg): Likewise.
(check_word_reg): Likewise.
(process_operands): Likewise.
2007-04-30 13:42:40 +00:00
eb42fac1bb
opcodes/
...
PR 4436
* ppc-opc.c (powerpc_operands): Correct bitm for second entry of MBE.
gas/
PR 4436
* config/tc-ppc.c (ppc_insert_operand): Disable range check if
min > max.
2007-04-30 00:27:57 +00:00
02ffd3e486
* config/tc-mips.c: Fix comment.
2007-04-28 22:12:58 +00:00
8eb2af8ecd
* config/tc-avr.c (mcu_types): Add support for atmega8hva and
...
atmega16hva devices. Move at90usb82 device to 'avr5' architecture.
* doc/c-avr.texi: Document new devices.
2007-04-26 17:18:23 +00:00
9a2e615a9f
gas/testsuite/
...
* gas/m68k/br-isaa.s: New.
* gas/m68k/br-isaa.d: New.
* gas/m68k/br-isab.s: New.
* gas/m68k/br-isab.d: New.
* gas/m68k/br-isac.s: New.
* gas/m68k/br-isac.d: New.
* gas/m68k/all.exp: Adjust.
gas/
* config/tc-m68k.c (mcf54455_ctrl): New.
(HAVE_LONG_DISP, HAVE_LONG_CALL, HAVE_LONG_COND): New.
(m68k_archs): Add isac.
(m68k_cpus): Add 54455 family.
(m68k_ip): Split Bg into Bb, Bs, Bg.
(m68k_elf_final_processing): Add ISA_C.
* doc/c-m68k.texi (M680x0 Options): Add isac.
include/opcode/
* m68k.h (mcfisa_c): New.
(mcfusp, mcf_mask): Adjust.
bfd/
* archures.c (bfd_mach_mcf_isa_c, bfd_mach_mcf_isa_c_mac,
bfd_mach_mcf_isa_c_emac): New.
* elf32-m68k.c (ISAC_PLT_ENTRY_SIZE, elf_isac_plt0_entry,
elf_isac_plt_entry, elf_isac_plt_info): New.
(elf32_m68k_object_p): Add ISA_C.
(elf32_m68k_print_private_bfd_data): Print ISA_C.
(elf32_m68k_get_plt_info): Detect ISA_C.
* cpu-m68k.c (arch_info): Add ISAC.
(m68k_arch_features): Likewise,
(bfd_m68k_compatible): ISAs B & C are not compatible.
opcodes/
* m68k-opc.c: Mark mcfisa_c instructions.
2007-04-23 07:51:33 +00:00
541d2ffd36
* config/atof-vax.c (atof_vax_sizeof): Change return type to unsigned.
...
(md_atof): Make number_of_chars unsigned. Revert last change.
* config/tc-or32.c (md_apply_fix): Delete bogus assertions.
* config/tc-sh.c (sh_optimize_expr): Only define for OBJ_ELF.
* config/tc-sh.h (md_optimize_expr): Likewise.
* config/tc-sh64.c (shmedia_md_pcrel_from_section): Delete bogus
assertion.
* config/tc-xtensa.c (convert_frag_immed_finish_loop): Likewise.
2007-04-21 13:04:14 +00:00
2523cd0a81
* config/atof-vax.c (md_atof): Fix comparison inside know().
2007-04-21 12:50:49 +00:00
c13781b849
Fix typo.
2007-04-21 12:25:13 +00:00
db55703487
gas/
...
* expr.c (expr): Assert on rankarg, not rank which can be unsigned.
* read.c (read_a_source_file): Remove buffer_limit[-1] assertion.
Don't skip over NUL char.
(pseudo_set): Set X_op for registers to O_register.
* symbols.c (symbol_clone): Remove assertion that sym is defined.
(resolve_symbol_value): Resolve O_register symbols.
* config/tc-i386.c (parse_real_register): Don't use i386_float_regtab.
Instead find st(0) by hash lookup.
* config/tc-ppc.c (ppc_macro): Warning fix.
opcodes/
* i386-opc.c (i386_float_regtab, i386_float_regtab_size): Delete.
Move contents to..
(i386_regtab): ..here.
* i386-opc.h (i386_float_regtab, i386_float_regtab_size): Delete.
2007-04-21 06:54:57 +00:00
c43a438d5e
* as.h (ENABLE_CHECKING): Default define to 0.
...
(know): Assert if ENABLE_CHECKING.
(struct relax_type): Remove superfluous declaration.
* configure.in (--enable-checking): New.
* configure: Regenerate.
* config.in: Regenerate.
* config/tc-ppc.c (ppc_setup_opcodes): Do checks when ENABLE_CHECKING.
Check for duplicate powerpc_operands entries.
2007-04-21 05:15:41 +00:00
d5be95937e
* config/tc-m68k.c (mcf5253_ctrl): New.
...
(mcf52223_ctrl): New.
(m68k_cpus): Add 5253, 52221, 52223.
2007-04-20 14:41:38 +00:00
7833670643
gas/
...
* config/m68k-parse.h (RAMBAR_ALT): New.
* config/tc-m68k.c (mcf5206_ctrl, mcf5307_ctrl): New.
(mcf_ctrl, mcf5208_ctrl, mcf5210a_ctrl, mcf5213_ctrl, mcf52235_ctrl,
mcf5225_ctrl, mcf5235_ctrl, mcf5271_ctrl, mcf5275_ctrl,
mcf5282_ctrl, mcf5329_ctrl, mcf5373_ctrl, mcfv4e_ctrl,
mcf5475_ctrl, mcf5485_ctrl): Add RAMBAR synonym for
RAMBAR1.
(mcf5272_ctrl): Add RAMBAR0, replace add RAMBAR with RAMBAR_ALT.
(m68k_cpus): Adjust 5206, 5206e & 5307 entries.
(m68k_ip) <Case J>: Detect when RAMBAR_ALT should be used. Add it
to control register mapping.
gas/testsuite/
* gas/m68k/ctrl-1.d, gas/m68k/ctrl-1.s: New.
* gas/m68k/ctrl-2.d, gas/m68k/ctrl-2.s: New.
* gas/m68k/all.exp: Add them.
opcodes/
* m68k-dis.c (print_insn_arg): Show c04 as rambar0 and c05 as
rambar1.
2007-04-20 14:09:00 +00:00
931774a953
* messages.c (as_internal_value_out_of_range): Fix typo in
...
error message. Return after printing domain error.
* config/tc-ppc.c (ppc_insert_operand): Preserve low zero bits
in max when shifting right.
2007-04-20 13:42:03 +00:00
b84bf58af1
include/opcode/
...
* ppc.h (struct powerpc_operand): Replace "bits" with "bitm".
(num_powerpc_operands): Declare.
(PPC_OPERAND_SIGNED et al): Redefine as hex.
(PPC_OPERAND_PLUS1): Define.
opcodes/
* ppc-dis.c (print_insn_powerpc): Adjust for struct powerpc_operand
change.
* ppc-opc.c (powerpc_operands): Replace bit count with bit mask
in all entries. Add PPC_OPERAND_SIGNED to DE entry. Remove
references to following deleted functions.
(insert_bd, extract_bd, insert_dq, extract_dq): Delete.
(insert_ds, extract_ds, insert_de, extract_de): Delete.
(insert_des, extract_des, insert_li, extract_li): Delete.
(insert_nb, insert_rsq, insert_rtq, insert_ev2, extract_ev2): Delete.
(insert_ev4, extract_ev4, insert_ev8, extract_ev8): Delete.
(num_powerpc_operands): New constant.
(XSPRG_MASK): Remove entire SPRG field.
(powerpc_opcodes <bcctre, bcctrel>): Use XLBB_MASK not XLYBB_MASK.
gas/
* messages.c (as_internal_value_out_of_range): Extend to report
errors for values with invalid low bits set.
* config/tc-ppc.c (ppc_setup_opcodes): Check powerpc_operands bitm
fields. Check that operands and opcode fields are disjoint.
(ppc_insert_operand): Check operands using mask rather than bit
count. Check low bits too. Handle PPC_OPERAND_PLUS1. Adjust
insertion code.
(md_apply_fix): Adjust for struct powerpc_operand change.
2007-04-20 12:25:15 +00:00
076d447c31
2007-04-19 Paul Brook <paul@codesourcery.com>
...
gas/testsuite/
* gas/arm/thumb1_unified.d: New test.
* gas/arm/thumb1_unified.s: New test.
gas/
* config/tc-arm.c (md_assemble): Only allow 16-bit instructions on
Thumb-1. Add sanity check for bogus relaxations.
2007-04-19 17:08:21 +00:00
16a4cf1777
2007-04-19 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (insns): Allow rsb and rsbs on Thumb-1.
2007-04-19 17:05:12 +00:00
381d071fc5
gas/
...
2007-04-18 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (cpu_arch): Add .sse4.2 and .sse4.
(match_template): Handle operand size for crc32 in SSE4.2.
(process_suffix): Handle operand type for crc32 in SSE4.2.
(output_insn): Support SSE4.2.
gas/testsuite/
2007-04-18 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Add sse4.2 and x86-64-sse4.2.
* gas/i386/sse4_2.d: New file.
* gas/i386/sse4_2.s: Likewise.
* gas/i386/x86-64-sse4_2.d: Likewise.
* gas/i386/x86-64-sse4_2.s: Likewise.
opcodes/
2007-04-18 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (CRC32_Fixup): New.
(PREGRP85, PREGRP86, PREGRP87, PREGRP88, PREGRP89, PREGRP90,
PREGRP91): New.
(threebyte_0x38_uses_DATA_prefix): Updated for SSE4.2.
(threebyte_0x3a_uses_DATA_prefix): Likewise.
(prefix_user_table): Add PREGRP85, PREGRP86, PREGRP87,
PREGRP88, PREGRP89, PREGRP90 and PREGRP91.
(three_byte_table): Likewise.
* i386-opc.c (i386_optab): Add SSE4.2 opcodes.
* gas/config/tc-i386.h (CpuSSE4_2): New.
(CpuSSE4): Likewise.
(CpuUnknownFlags): Add CpuSSE4_2.
2007-04-18 16:15:55 +00:00
42903f7f59
gas/
...
2007-04-18 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (cpu_arch): Add .sse4.1.
(process_operands): Adjust implicit operand for blendvpd,
blendvps and pblendvb in SSE4.1.
(output_insn): Support SSE4.1.
gas/testsuite/
2007-04-18 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Add sse4.1 and x86-64-sse4.1.
* gas/i386/sse4_1.d: New file.
* gas/i386/sse4_1.s: Likewise.
* gas/i386/x86-64-sse4_1.d: Likewise.
* gas/i386/x86-64-sse4_1.s: Likewise.
opcodes/
2007-04-18 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (XMM_Fixup): New.
(Edqb): New.
(Edqd): New.
(XMM0): New.
(dqb_mode): New.
(dqd_mode): New.
(PREGRP39 ... PREGRP85): New.
(threebyte_0x38_uses_DATA_prefix): Updated for SSE4.
(threebyte_0x3a_uses_DATA_prefix): Likewise.
(prefix_user_table): Add PREGRP39 ... PREGRP85.
(three_byte_table): Likewise.
(putop): Handle 'K'.
(intel_operand_size): Handle dqb_mode, dqd_mode):
(OP_E): Likewise.
(OP_G): Likewise.
* i386-opc.c (i386_optab): Add SSE4.1 opcodes.
* i386-opc.h (CpuSSE4_1): New.
(CpuUnknownFlags): Add CpuSSE4_1.
(regKludge): Update comment.
2007-04-18 16:13:15 +00:00
026d3abbb2
2007-04-18 Paul Brook <paul@codesourcery.com>
...
gas/testsuite/
* gas/arm/thumb2_add.s: Add rsb #0 test.
* gas/arm/thumb2_add.d: Update expected output.
gas/
* config/tc-arm.c (do_t_rsb): Use 16-bit encoding when possible.
2007-04-18 13:49:34 +00:00
91382b56ee
* config/tc-sh.c (sh_handle_align): Call as_bad_where instead
...
of as_warn_where for misaligned data.
2007-04-16 13:05:30 +00:00
0838d2ac72
* config/tc-sh.c (align_test_frag_offset_fixed_p): Handle
...
rs_fill frags.
2007-04-15 22:02:25 +00:00
0cc3409506
* config/tc-sh.c (align_test_frag_offset_fixed_p): New.
...
(sh_optimize_expr): Likewise.
* config/tc-sh.h (md_optimize_expr): Define.
(sh_optimize_expr): Prototype.
2007-04-14 14:21:11 +00:00
6f7b6869f3
2007-04-06 Matt Thomas <matt@netbsd.org>
...
* config/tc-vax.c (vax_cons): Added to support %pcrel{8,16,32}(exp)
to emit pcrel relocations by DWARF2 in non-code sections. Borrowed
heavily from tc-sparc.c. (vax_cons_fix_new): Likewise.
2007-04-06 16:36:48 +00:00
d0e8669a8d
* config/tc-m68k.c (HAVE_LONG_BRANCH): Add fido_a.
2007-04-04 22:10:34 +00:00
3b8d421e14
2007-04-04 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (do_neon_ext): Enforce immediate range.
(insns): Use I15 for vext.
gas/testsute/
* gas/arm/neon-cov.s: Add new vext test.
* gas/arm/neon-cov.d: Ditto.
2007-04-04 19:21:24 +00:00
a3582eee7b
* config/tc-xtensa.c (xtensa_flush_pending_output): Check
...
outputting_stabs_line_debug.
2007-04-02 20:05:47 +00:00
7b60f4730c
* config/tc-avr.c (mcu_types): Add support for at90pwm1, at90usb82,
...
at90usb162, atmega325p, atmega329p, atmega3250p and atmega3290p
devices.
* doc/c-avr.texi: Document new devices.
2007-04-02 18:42:36 +00:00
0c00074519
gas/
...
* doc/as.texinfo: Add -mvxworks-pic to the list of MIPS options.
* doc/c-mips.texi (-KPIC, -mvxworks-pic): Document.
* config/tc-mips.c (md_show_usage): Mention -mvxworks-pic.
2007-04-02 14:25:27 +00:00
c3ea6048f0
* config/tc-xtensa.c (xtensa_move_labels): Remove loops_ok argument.
...
Do not check is_loop_target flag.
(xtensa_frob_label): Adjust calls to xtensa_move_labels.
(xg_assemble_vliw_tokens): Likewise. Also avoid calling
xtensa_move_labels for alignment of loop opcodes.
2007-03-31 00:09:34 +00:00
f6bee0627d
2007-03-30 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (process_suffix): Reindent a bit.
2007-03-30 16:28:33 +00:00
3c707909b2
2007-03-30 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (encode_thumb2_ldmstm): New function.
(do_t_ldmstm): Generate 16-bit push/pop. Use encode_thumb2_ldmstm.
(do_t_push_pop): Use encode_thumb2_ldmstm.
gas/testsuite/
* gas/arm/thumb2_ldmstm.d: New test.
* gas/arm/thumb2_ldmstm.s: New test.
2007-03-30 14:51:25 +00:00
144f4bc66d
* m32c.cpu (Imm-8-s4n): Fix print hook.
...
(Lab-24-8, Lab-32-8, Lab-40-8): Fix.
(arith-jnz-imm4-dst-defn): Make relaxable.
(arith-jnz16-imm4-dst-defn): Fix encodings.
* m32c-desc.c: Regenerate.
* m32c-dis.c: Regenerate.
* m32c-opc.c: Regenerate.
* config/tc-m32c.c (rl_for, relaxable): Protect argument.
(md_relax_table): Add entries for ADJNZ macros.
(M32C_Macros): Add ADJNZ macros.
(subtype_mappings): Add entries for ADJNZ macros.
(insn_to_subtype): Check for adjnz and sbjnz insns.
(md_estimate_size_before_relax): Pass insn to insn_to_subtype.
(md_convert_frag): Convert adjnz and sbjnz.
2007-03-29 23:56:39 +00:00
e72cf3ec8e
gas/
...
2007-03-28 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (build_modrm_byte): For instructions with 2
register operands, encode destination in i.rm.regmem if its
RegMem bit is set.
opcodes/
2007-03-28 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.c (i386_optab): Change InvMem to RegMem for mov and
movq. Remove InvMem from sldt, smsw and str.
* i386-opc.h (InvMem): Renamed to ...
(RegMem): Update comments.
(AnyMem): Remove InvMem.
2007-03-29 04:27:54 +00:00
eb6d9dce34
* config/tc-xtensa.c (xg_translate_idioms): Allow assembly idioms
...
in FLIX instructions.
2007-03-26 23:01:46 +00:00
c96612cc4c
* config/tc-arm.c (arm_it): Add immisfloat field.
...
(parse_qfloat_immediate): Disallow integer syntax for floating-point
immediates. Fix hex immediates, handle 0.0 and -0.0 specially.
(parse_neon_mov): Set immisfloat bit for operand if it parsed as a
float.
(neon_cmode_for_move_imm): Reject non-float immediates for float
operands.
(neon_move_immediate): Pass immisfloat bit to neon_cmode_for_move_imm.
2007-03-26 14:43:29 +00:00
1198ca51f0
2007-03-24 Paul Brook <paul@codesourcery.com>
...
* config/tc-arm.c (do_t_ldmstm): Error on Thumb-2 addressing modes.
2007-03-24 16:09:16 +00:00
b67020158a
2007-03-24 Paul Brook <paul@codesourcery.com>
...
Mark Shinwell <shinwell@codesourcery.com>
gas/
* config/tc-arm.c (operand_parse_code): Add OP_oRRw.
(parse_operands): Don't expect comma if first operand missing.
Handle OP_oRRw.
(do_srs): Encode register number, checking it is r13. Update comment.
(insns): Update SRS entries to take a register.
gas/testsuite/
* gas/arm/archv6.s: Add new SRS tests.
* gas/arm/archv6.d: Update expected output.
* gas/arm/thumb32.s: Add new SRS tests.
* gas/arm/thumb32.d: Update expected output.
* gas/arm/srs-t2.d: New.
* gas/arm/srs-t2.l: New.
* gas/arm/srs-t2.s: New.
* gas/arm/srs-arm.d: New.
* gas/arm/srs-arm.l: New.
* gas/arm/srs-arm.s: New.
opcodes/
* arm-dis.c (arm_opcodes): Print SRS base register.
2007-03-24 01:29:00 +00:00
0003779b5d
gas/
...
2003-03-23 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (md_begin): Allow '.' in mnemonic.
gas/testsuite/
2003-03-23 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/rex.s: Add tests for rex.WRXB.
* gas/i386/rex.d: Updated.
* gas/i386/rex.d: Replace rex64XYZ with rex.WRXB.
* gas/i386/x86-64-io-intel.d : Likewise.
* gas/i386/x86-64-io-suffix.d: Likewise.
* gas/i386/x86-64-io.d: Likewise.
* gas/i386/x86-64-opcode.d: Likewise.
opcodes/
2003-03-23 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (prefix_name): Replace rex64XYZ with rex.WRXB.
* i386-opc.c (i386_optab): Add rex.wrxb.
2007-03-23 16:17:21 +00:00
738755b09a
gas/
...
* config/tc-arm.c (md_apply_fix): Turn CZB instructions that
attempt to jump to the next instruction into NOPs.
2007-03-23 10:43:35 +00:00
840edabd6d
* config/tc-spu.c: Don't include opcode/spu.h.
...
(md_assemble): Set tc_fix_data.insn_tag and arg_format.
(md_apply_fix): Adjust.
* config/tc-spu.h: Include opcode/spu.h.
(struct tc_fix_info): New.
(TC_FIX_TYPE, TC_INIT_FIX_DATA): Adjust.
(TC_FORCE_RELOCATION): Define.
2007-03-23 00:42:26 +00:00
13a1e313c9
2003-03-21 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (process_suffix): Check 0x90 instead of
xchg for xchg %rax,%rax.
2007-03-22 00:27:14 +00:00
161a04f630
gas/
...
2003-03-21 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c: Replace REX_MODE64, REX_EXTX, REX_EXTY
and REX_EXTZ with REX_W, REX_R, REX_X and REX_B respectively.
include/opcode/
2003-03-21 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (REX_MODE64): Renamed to ...
(REX_W): This.
(REX_EXTX): Renamed to ...
(REX_R): This.
(REX_EXTY): Renamed to ...
(REX_X): This.
(REX_EXTZ): Renamed to ...
(REX_B): This.
opcodes/
2003-03-21 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (REX_MODE64): Remove definition.
(REX_EXTX): Likewise.
(REX_EXTY): Likewise.
(REX_EXTZ): Likewise.
(USED_REX): Use REX_OPCODE instead of 0x40.
Replace REX_MODE64, REX_EXTX, REX_EXTY and REX_EXTZ with REX_W,
REX_R, REX_X and REX_B respectively.
2007-03-21 21:23:44 +00:00
8b38ad713b
gas/
...
2003-03-21 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/4218
* config/tc-i386.c (match_template): Properly handle 64bit mode
"xchg %eax, %eax".
gas/testsuite/
2003-03-21 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/4218
* gas/i386/nops.s: Add testcases for nop r/m.
* gas/i386/x86-64-nops.s: Likewise.
* gas/i386/x86-64-opcode.s: Add testcases for xchg with %ax,
%eax and %rax.
* gas/i386/nops.d: Updated.
* gas/i386/x86-64-nops.d: Likewise.
* gas/i386/x86-64-opcode.d: Likewise.
opcodes/
2003-03-21 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/4218
* i386-dis.c (PREGRP38): New.
(dis386): Use PREGRP38 for 0x90.
(prefix_user_table): Add PREGRP38.
(print_insn): Set uses_REPZ_prefix to 1 for pause.
(NOP_Fixup1): Properly handle REX bits.
(NOP_Fixup2): Likewise.
* i386-opc.c (i386_optab): Allow %eax with xchg in 64bit.
Allow register with nop.
2007-03-21 20:45:14 +00:00
af1c101013
PR gas/4124
...
* config/tc-alpha.c (emit_ustX): Fix ustq code generation.
2007-03-21 16:08:14 +00:00
1d5f2fe90d
2007-03-21 H.J. Lu <hongjiu.lu@intel.com>
...
* Makefile.am: Run dep-am.
* Makefile.in: Regenerated.
* config/tc-i386.c: Don't include "opcodes/i386-opc.h".
* config/tc-i386.h: Include "opcodes/i386-opc.h".
(NOP_OPCODE): Removed.
(template): Likewise.
2007-03-21 15:37:21 +00:00
5ac8f2a23b
* config/tc-i386.h (NOP_OPCODE): Restore.
2007-03-21 10:26:15 +00:00
8fb9d7b9aa
gas/
...
* config/tc-arm.c (do_mul): Don't warn about overlapping
Rd and Rm operands when assembling for v6 or above.
Correctly capitalize register names in the messages.
(do_mlas): Likewise. Delete spurious blank line.
gas/testsuite/
* gas/arm/mul-overlap.s: New.
* gas/arm/mul-overlap.d: New.
* gas/arm/mul-overlap.l: New.
* gas/arm/mul-overlap-v6.s: New.
* gas/arm/mul-overlap-v6.d: New.
2007-03-18 16:21:27 +00:00
b37683797e
* config/tc-m68k.c (m68k_cpus): Add an entry for fidoa.
2007-03-16 18:08:58 +00:00
c3fe08facb
gas/
...
2007-03-15 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (md_begin): Use i386_regtab_size to scan
i386_regtab.
(parse_register): Use i386_regtab_size instead of ARRAY_SIZE
on i386_regtab.
opcodes/
2007-03-15 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.c: Include "libiberty.h".
(i386_regtab): Remove the last entry.
(i386_regtab_size): New.
(i386_float_regtab_size): Likewise.
* i386-opc.h (i386_regtab_size): New.
(i386_float_regtab_size): Likewise.
2007-03-15 17:30:31 +00:00
0b1cf022c8
gas/
...
2007-03-15 H.J. Lu <hongjiu.lu@intel.com>
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerated.
* config/tc-i386.c: Include "opcodes/i386-opc.h" instead of
"opcode/i386.h".
(md_begin): Check reg_name != NULL for the last entry in
i386_regtab.
* config/tc-i386.h: Move many entries to opcode/i386.h and
opcodes/i386-opc.h.
* configure.in (need_opcodes): Set true for i386.
* configure: Regenerated.
include/opcode/
2007-03-15 H.J. Lu <hongjiu.lu@intel.com>
* i386.h: Add entries from config/tc-i386.h and move tables
to opcodes/i386-opc.h.
opcodes/
2007-03-15 H.J. Lu <hongjiu.lu@intel.com>
* Makefile.am (CFILES): Add i386-opc.c.
(ALL_MACHINES): Add i386-opc.lo.
Run "make dep-am".
* Makefile.in: Regenerated.
* configure.in: Add i386-opc.lo for bfd_i386_arch.
* configure: Regenerated.
* i386-dis.c: Include "opcode/i386.h".
(MAXLEN): Renamed to MAX_MNEM_SIZE. Remove definition.
(FWAIT_OPCODE): Remove definition.
(UNIXWARE_COMPAT): Renamed to SYSV386_COMPAT. Remove definition.
(MAX_OPERANDS): Remove definition.
* i386-opc.c: New file.
* i386-opc.h: Likewise.
2007-03-15 14:31:24 +00:00
794ba86ab2
gas/
...
* config/tc-arm.c (arm_copy_symbol_attributes): New.
* config/tc-arm.h (arm_copy_symbol_attributes): Declare.
(TC_COPY_SYMBOL_ATTRIBUTES): Define.
* gas/symbols.c (copy_symbol_attributes): Use
TC_COPY_SYMBOL_ATTRIBUTES.
gas/testsuite/
* gas/arm/thumbver.d, gas/arm/thumbver.s: New test.
2007-03-15 12:11:50 +00:00
155257ea59
2007-03-14 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (T16_32_TAB): Fix dec_sp encoding.
gas/testsuite/
* gas/arm/thumb2_add.d: Add tests using sp.
* gas/arm/thumb2_add.s: Ditto.
2007-03-14 21:12:13 +00:00
8a2ed48987
2007-03-12 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (md_assemble): Use Opcode_XXX instead of XXX
on i.tm.base_opcode.
(match_template): Likewise.
(process_operands): Use ~0x3 mask to match MOV_AX_DISP32.
* config/tc-i386.h (Opcode_D): New.
(Opcode_FloatR): Likewise.
(Opcode_FloatD): Likewise.
(D): Redefined.
(W): Likewise.
(FloatMF): Likewise.
(FloatR): Likewise.
(FloatD): Likewise.
2007-03-12 21:36:23 +00:00
b1b7d09b07
* config/tc-i386.h (WORKING_DOT_WORD): Define.
2007-03-09 12:35:37 +00:00
b5639b37c5
2007-03-06 Andreas Krebbel <krebbel1@de.ibm.com>
...
* opcodes/s390-opc.c (INSTR_RRE_FR, INSTR_RRF_F0FF2, INSTR_RRF_F0FR,
INSTR_RRF_UUFF, INSTR_RRF_0UFF, INSTR_RRF_FFFU, INSTR_RRR_F0FF): New
instruction formats added.
(MASK_RRE_FR, MASK_RRF_F0FF2, MASK_RRF_F0FR, MASK_RRF_UUFF,
MASK_RRF_0UFF, MASK_RRF_FFFU, MASK_RRR_F0FF): New instruction format
masks added.
* opcodes/s390-opc.txt (lpdfr - tgxt): Decimal floating point
instructions added.
* opcodes/s390-mkopc.c (s390_opcode_cpu_val): S390_OPCODE_Z9_EC added.
(main): z9-ec cpu type option added.
* include/opcode/s390.h (s390_opcode_cpu_val): S390_OPCODE_Z9_EC added.
2007-03-06 Andreas Krebbel <krebbel1@de.ibm.com>
* config/tc-s390.c (md_parse_option): z9-ec option added.
2007-03-06 Andreas Krebbel <krebbel1@de.ibm.com>
* gas/s390/zarch-z9-ec.d: New file.
* gas/s390/zarch-z9-ec.s: New file.
* gas/s390/s390.exp: Run the z9-ec testcases.
2007-03-06 13:19:08 +00:00
5e77afaabd
2007-03-02 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (relax_immediate): Always return positive values.
(relaxed_symbol_addr): New function.
(relax_adr, relax_branch): Use it.
(arm_relax_frag): Pass stretch argument. Adjust infinite loop check.
gas/testsuite/
* gas/arm/relax_branch_align.d: New test.
* gas/arm/relax_branch_align.s: New test.
2007-03-02 18:22:34 +00:00
c5d07591f7
PR gas/3797
...
* config/tc-d10v.c (do_assemble): Do not generate error messages, just return -1 whenever a problem is encoun$
(md_assemble): If do_assemble returns -1 generate a non-fatal error message and return.
* gas/lns/lns.exp: Do not run the lns-common test for the d10v port.
* gas/d10v/address-002.l: Update expected assembler output.
* gas/d10v/address-003.l, gas/d10v/address-004.l,
gas/d10v/address-005.l, gas/d10v/address-006.l,
gas/d10v/address-007.l, gas/d10v/address-008.l,
gas/d10v/address-009.l, gas/d10v/address-010.l,
gas/d10v/address-011.l, gas/d10v/address-012.l,
gas/d10v/address-013.l, gas/d10v/address-014.l,
gas/d10v/address-015.l, gas/d10v/address-016.l,
gas/d10v/address-017.l, gas/d10v/address-018.l,
gas/d10v/address-019.l, gas/d10v/address-020.l,
gas/d10v/address-021.l, gas/d10v/address-022.l,
gas/d10v/address-023.l, gas/d10v/address-024.l,
gas/d10v/address-025.l, gas/d10v/address-026.l,
gas/d10v/address-027.l, gas/d10v/address-030.l,
gas/d10v/address-031.l, gas/d10v/address-032.l,
gas/d10v/address-033.l, gas/d10v/address-034.l,
gas/d10v/address-035.l, gas/d10v/address-036.l,
gas/d10v/address-037.l, gas/d10v/address-038.l,
gas/d10v/address-039.l, gas/d10v/address-040.l,
gas/d10v/address-041.l: Likewise.
2007-02-28 18:38:51 +00:00
870074ddae
PR gas/2623
...
* config/tc-msp430.c (line_separator_char): Change to '{'.
2007-02-28 10:02:37 +00:00
fd99afa763
* config/tc-m68hc11.c (fixup24): Correct fixup size.
...
(build_jump_insn): Likewise.
(build_insn): Likewise.
(s_m68hc11_relax): Likewise.
2007-02-27 08:15:17 +00:00
07cb2078a9
* config/obj-elf.c (elf_frob_file): frag_wane any new frags.
2007-02-27 07:16:31 +00:00
22b5b65113
* config/tc-arm.c (do_vfp_nsyn_pop): Use fldmias/fldmiad.
2007-02-25 19:29:25 +00:00
acb02403a2
* config/tc-mn10300.c (md_convert_frag): Correct fixup size.
...
(md_assemble): Likewise.
2007-02-22 22:34:16 +00:00
a1836728f6
PR 4082
...
* config/tc-avr.h (TC_FX_SIZE_SLACK): Define.
2007-02-20 23:02:58 +00:00
01fd108fa7
* config/tc-mips.c (mips_cpu_info_table): Add 74K configurations.
2007-02-20 14:48:28 +00:00
8b082fb134
[ gas/ChangeLog ]
...
* config/tc-mips.c (mips_set_options, mips_opts, file_ase_dspr2,
ISA_SUPPORTS_DSPR2_ASE, MIPS_CPU_ASE_DSPR2): Add DSP R2 ASE support.
(macro_build): Add case '2'.
(macro): Expand M_BALIGN to nop, packrl.ph or balign.
(validate_mips_insn): Add support for balign instruction.
(mips_ip): Handle DSP R2 instructions. Support balign instruction.
(OPTION_DSPR2, OPTION_NO_DSPR2, OPTION_COMPAT_ARCH_BASE,
md_parse_option, mips_after_parse_args): Add -mdspr2 and -mno-dspr2
command line options.
(s_mipsset): Add support for .set dspr2 and .set nodspr2 directives.
(md_show_usage): Add -mdspr2 and -mno-dspr2 help output.
* doc/c-mips.texi, doc/as.texinfo: Document -mdspr2, -mno-dspr2,
.set dspr2, .set nodspr2.
[ gas/testsuite/ChangeLog ]
* gas/mips/mips32-dspr2.s, gas/mips/mips32-dspr2.d: New test for
DSP R2.
* gas/mips/mips.exp: Run new test.
[ include/opcode/Changelog ]
* mips.h (OP_SH_BP, OP_MASK_BP): Add support for balign instruction.
(INSN_DSPR2): Add flag for DSP R2 instructions.
(M_BALIGN): New macro.
[ opcodes/ChangeLog ]
* mips-dis.c (mips_arch_choices): Add DSP R2 support.
(print_insn_args): Add support for balign instruction.
* mips-opc.c (D33): New shortcut for DSP R2 instructions.
(mips_builtin_opcodes): Add DSP R2 instructions.
[ sim/mips/ChangeLog ]
* Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
* configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
Add dsp2 to sim_igen_machine.
* configure: Regenerate.
* dsp.igen (do_ph_op): Add MUL support when op = 2.
(do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
(mulq_rs.ph): Use do_ph_mulq.
(MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
* mips.igen: Add dsp2 model and include dsp2.igen.
(MFHI, MFLO, MTHI, MTLO): Extend these instructions for
for *mips32r2, *mips64r2, *dsp.
(MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
for *mips32r2, *mips64r2, *dsp2.
* dsp2.igen: New file for MIPS DSP REV 2 ASE.
[ sim/testsuite/sim/mips/ChangeLog ]
* basic.exp: Run the dsp2 test.
* utils-dsp.inc (dspckacc_astio, dspck_tsimm): New macro.
* mips32-dsp2.s: New test.
2007-02-20 13:28:56 +00:00
96e0bbccb7
* config/tc-m68k.c (mcf5210a_ctrl, mcf52235_ctrl, mcf5225_ctrl): New.
...
(m68k_cpus): Add 5210a..5211a, 52230..52235 5224..5225.
2007-02-20 09:25:45 +00:00
d31f0f6d41
* write.c (TC_FX_SIZE_SLACK): Define.
...
(write_relocs): Reinstate check for fixup within frag.
* config/tc-bfin.h (TC_FX_SIZE_SLACK): Define.
* config/tc-h8300.h (TC_FX_SIZE_SLACK): Define.
* config/tc-mmix.h (TC_FX_SIZE_SLACK): Define.
* config/tc-sh.h (TC_FX_SIZE_SLACK): Define.
* config/tc-xstormy16.h (TC_FX_SIZE_SLACK): Define.
2007-02-17 23:13:49 +00:00
a8e24a5610
* config/m68k-parse.h (m68k_register): Add ROMBAR0, ASID.
...
* config/tc-m68k.c (mcfv4e_ctrl): Add ColdFire specific names.
(mcf5475_ctrl, mcf5485_ctrl): New.
(m68k_cpus): Use mcf5485_ctrl and mcf5485_ctrl for those families.
(m68k_ip): Add ASID, MMUBAR, ROMBAR0 handling.
(init_table): Add asid, mmubar, adjust rombar0.
2007-02-15 18:37:08 +00:00
4eed87de48
gas/
...
* config/tc-i386.h (Seg2ShortForm, Seg3ShortForm): Delete.
* config/tc-i386.c: Wrap overly long lines, whitespace fixes.
(process_operands): Move old Seg2ShortForm and Seg3ShortForm
code, and test for these insns using a combination of
opcode_modifier and operand_types.
include/opcode/
* i386.h (i386_optab): Replace all occurrences of Seg2ShortForm
and Seg3ShortFrom with Shortform.
2007-02-13 23:23:54 +00:00
280d71bf40
Support for Toshiba MeP and for complex relocations.
2007-02-05 20:10:25 +00:00
e110eeb74e
* config/tc-m32c.c (m32c_cons_fix_new): New. Added to support 3
...
byte relocs.
* config/tc-m32c.h (TC_CONS_FIX_NEW): Define.
(m32c_cons_fix_new): Prototype.
2007-02-04 04:45:36 +00:00
60242db2b7
* config/tc-xtensa.c (xg_build_to_insn): Use tinsn_init.
...
(xg_expand_assembly_insn, istack_push_space, istack_pop): Likewise.
2007-02-03 00:08:22 +00:00
bbdd25a805
* config/tc-xtensa.c (SUFFIX_MAP, suffix_relocs): New.
...
(xtensa_elf_suffix): Use suffix_relocs instead of local mapping table.
(map_suffix_reloc_to_operator): New.
(map_operator_to_reloc): New.
(expression_maybe_register): Fix incorrect test of return value from
xtensa_elf_suffix. Rearrange to use map_suffix_reloc_to_operator.
(xg_assemble_literal, convert_frag_immed): Use map_operator_to_reloc.
2007-02-02 23:59:29 +00:00
9c8747735c
* config/xtensa-istack.h (struct tinsn_struct): Delete fixup field.
...
(tinsn_get_tok): Delete prototype.
* config/tc-xtensa.c (tinsn_get_tok): Delete.
2007-02-02 23:26:53 +00:00
61376837da
* config/xtensa-relax.h (struct build_instr): Delete id field.
...
* config/xtensa-relax.c (widen_spec_list): Remove zeros from LITERAL
and LABEL tokens.
(append_literal_op, append_label_op): Remove litnum/labnum arguments;
set op_data fields to zero.
(parse_id_constant): Delete.
(build_transition): Remove code to handle numbered literals and labels.
2007-02-02 23:09:50 +00:00
bc447904f7
* config/xtensa-relax.c (build_transition): Remove code after as_fatal.
...
(build_transition_table): Likewise.
2007-02-02 22:08:36 +00:00
63a7429b8b
* config/tc-xtensa.c (xg_add_opcode_fix, md_apply_fix): Delete use of
...
fx_tcbit.
* config/tc-xtensa.h (TC_FORCE_RELOCATION_LOCAL): Remove.
2007-02-01 23:54:59 +00:00
20ee54e817
* write.h (struct fix <fx_pcrel_adjust, fx_size>): Move.
...
(struct fix <fx_plt>): Rename to tcbit2.
* write.c (fix_new_internal): Adjust.
(TC_FORCE_RELOCATION_LOCAL): Don't test fx_plt.
* config/tc-arm.h (TC_FORCE_RELOCATION_LOCAL): Likewise.
* config/tc-cris.h (TC_FORCE_RELOCATION_LOCAL): Likewise.
* config/tc-i386.h (TC_FORCE_RELOCATION_LOCAL): Likewise.
* config/tc-i960.h (TC_FORCE_RELOCATION_LOCAL): Likewise.
* config/tc-sh.h (TC_FORCE_RELOCATION_LOCAL): Likewise.
* config/tc-sh64.h (TC_FORCE_RELOCATION_LOCAL): Likewise.
* config/tc-sparc.h (TC_FORCE_RELOCATION_LOCAL): Likewise.
* config/tc-msp430.c (msp430_force_relocation_local): Likewise.
* config/tc-ia64.c (emit_one_bundle): Don't set fx_plt.
* config/tc-ia64.h (TC_FORCE_RELOCATION_LOCAL): Don't test fx_plt.
Instead, compare fx_r_type.
* config/tc-xtensa.c (xg_add_opcode_fix, md_apply_fix): Use
fx_tcbit in place of fx_plt.
* config/tc-xtensa.h (TC_FORCE_RELOCATION_LOCAL): Define.
* doc/internals.texi (TC_FORCE_RELOCATION_LOCAL): Remove reference
to fx_plt.
2007-02-01 14:12:20 +00:00
4d456e3dc5
2076-01-28 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (swap_imm_operands): Renamed to ...
(swap_2_operands): This. Take 2 ints.
(md_assemble): Updated.
(swap_operands): Call swap_2_operands to swap 2 operands.
2007-01-28 16:14:33 +00:00
7bc4c13c61
* config/tc-m32c.c (md_pseudo_table): Add .3byte.
2007-01-24 21:53:09 +00:00
489038311c
* tc-score.c: Remove unnecessary uses of _().
...
Make the err_msg[] a file level local array in order to save storage space.
Remove unnecessary sprintf()s.
2007-01-22 08:55:34 +00:00
141190726e
2007-01-18 Mei Ligang <ligang@sunnorth.com.cn>
...
* config/tc-score.c : Using _() for const string.
Do not assign inst.error with a local string pointer.
(md_section_align): Pad section.
2007-01-18 10:33:49 +00:00
99018f420a
2007-01-13 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (build_modrm_byte): Check number of operands
when procssing memory/register operand.
2007-01-13 16:48:00 +00:00
66a4ad4264
* config/tc-spu.h (TC_RELOC_RTSYM_LOC_FIXUP): Delete.
...
* config/tc-m32r.h (TC_RELOC_RTSYM_LOC_FIXUP): Delete.
* config/tc-mn10300.h (TC_RELOC_RTSYM_LOC_FIXUP): Delete.
(TC_FORCE_RELOCATION): Define.
(TC_FORCE_RELOCATION_LOCAL): Define.
* config/tc-mn10300.c (mn10300_fix_adjustable): Adjust.
2007-01-12 06:23:52 +00:00
dc4503c681
2007-01-11 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (do_t_add_sub): Use Rd and Rs.
gas/testsuite/
* gas/arm/thumb2_add.d: Add test for missing operand.
* gas/arm/thumb2_add.s: Ditto.
2007-01-11 15:39:08 +00:00
493cb6ef0a
PR gas/3707
...
* config/tc-arm.c (md_begin): Cope with an NULL mcpu_fpu_opt variable.
2007-01-11 15:22:10 +00:00
04f8d83b9a
* config/tc-mcore.c (md_number_to_chars): Use number_to_chars_{big|little}endian.
2007-01-11 08:58:56 +00:00
3bdcfdf41f
bfd/
...
* archures.c (bfd_mach_cpu32_fido): Rename to bfd_mach_fido.
* bfd-in2.h: Regenerate.
* cpu-m68k.c (arch_info_struct): Use bfd_mach_fido instead of
bfd_mach_cpu32_fido.
(m68k_arch_features): Use fido_a instead of cpu32.
(bfd_m68k_compatible): Reject the combination of Fido and
ColdFire. Accept the combination of CPU32 and Fido with a
warning.
* elf32-m68k.c (elf32_m68k_object_p,
elf32_m68k_merge_private_bfd_data,
elf32_m68k_print_private_bfd_data): Treat Fido as an
architecture by itself.
binutils/
* readelf.c (get_machine_flags): Treat Fido as an architecture
by itself.
gas/
* config/tc-m68k.c (m68k_archs, m68k_cpus): Treat Fido as an
architecture by itself.
(m68k_ip): Don't issue a warning for tbl instructions on fido.
(m68k_elf_final_processing): Treat Fido as an architecture by
itself.
include/elf/
* m68k.h (EF_M68K_FIDO): New.
(EF_M68K_ARCH_MASK): OR EF_M68K_FIDO.
(EF_M68K_CPU32_FIDO_A, EF_M68K_CPU32_MASK): Remove.
include/opcode/
* m68k.h (m68010up): OR fido_a.
opcodes/
* m68k-opc.c (m68k_opcodes): Replace cpu32 with
cpu32 | fido_a except on tbl instructions.
2007-01-08 18:42:37 +00:00
e4a3b5a47e
2007-01-05 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (set_intel_syntax): Update set_intel_syntax
depending on allow_naked_reg.
2007-01-05 14:55:44 +00:00
a028a6f534
2007-01-04 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (do_cpsi): Set mmod bit for 2 argument form.
gas/testsuite/
* gas/arm/archv6.s: Add more cpsie tests.
* gas/arm/archv6.d: Ditto.
opcodes/
* arm-dis.c (arm_opcodes): Fix cpsie and cpsid entries.
2007-01-04 20:08:36 +00:00
2ca3ace5aa
2007-01-04 H.J. Lu <hongjiu.lu@intel.com>
...
PR gas/3826
* config/tc-i386.c (register_prefix): New.
(set_intel_syntax): Set set_intel_syntax to "" if register
prefix is needed.
(check_byte_reg): Use register_prefix for error message.
(check_long_reg): Likewise.
(check_qword_reg): Likewise.
(check_word_reg): Likewise.
2007-01-04 18:03:31 +00:00
627907b7d8
* config/tc-arm.c (do_neon_shl_imm): Swap rN, rM.
...
(do_neon_qshl_imm): Likewise.
(do_neon_rshl): New function. Handle rounding variants of
v{q}shl-by-register.
(insns): Use do_neon_rshl for vrshl, vqrshl.
2007-01-04 15:32:50 +00:00
b7c61d9abb
2007-01-03 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (swap_operands): Remove branches.
2007-01-04 05:35:52 +00:00
92559b5be6
2007-01-04 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (NEON_ENC_TAB): Fix encoding of vclt, vcle, vaclt
and vacle.
gas/testsuite/
* gas/arm/neon-cov.d: Adjust expected output.
* gas/arm/neon-omit.s: Add tests for vcgt and vcle. Reorder vacle
and vacle.
* gas/arm/neon-omit.d: Adjust expected output.
2007-01-04 04:39:53 +00:00
4dc856073a
2007-01-03 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c: Update copyright year.
* config/tc-i386.h: Likewise.
2007-01-03 22:54:45 +00:00
1509aa9a58
2007-01-03 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (smallest_imm_type): Return unsigned int
instead of int.
2007-01-03 22:48:52 +00:00
e3bb37b525
2007-01-03 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c: Convert to ISO C90 formatting
* config/tc-i386.h: Likewise.
2007-01-03 22:36:19 +00:00
d821e36b0b
* config/tc-mips.c (md_show_usage): Clean up -mno-shared
...
documentation.
2007-01-03 18:12:52 +00:00
87a918e202
2006-12-30 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.h (ShiftCount): Fix a comment typo.
2006-12-30 19:32:49 +00:00
751d281c74
2006-12-30 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (md_show_usage): Mention --32/--64.
2006-12-30 18:37:29 +00:00
c81128dcdf
gas/
...
2006-12-29 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (build_modrm_byte): Handle shift count
register with 3 operands.
gas/testsuite/
2006-12-29 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/intel.s: Add tests for "shrd %cl,%edx,%eax" and
"shld %cl,%edx,%eax".
* gas/i386/opcode.s: Likewise.
* gas/i386/intel.d: Updated.
* gas/i386/opcode-intel.d: Likewise.
* gas/i386/opcode-suffix.d: Likewise.
* gas/i386/opcode.d: Likewise.
2006-12-29 21:48:48 +00:00
cab737b91f
2006-12-28 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (process_operands): Check i.reg_operands
and increment i.operands when adding a register operand.
(build_modrm_byte): Fix 4 operand instruction handling.
2006-12-29 06:02:04 +00:00
31b2323cf7
2006-12-27 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (disp_expressions): Use MAX_MEMORY_OPERANDS
for array size instead of 2.
(im_expressions): Use MAX_IMMEDIATE_OPERANDS for for array size
instead of 2.
(i386_immediate): Update immediate operand overflow error
message.
(i386_displacement): Check displacement operand overflow.
2006-12-28 07:09:16 +00:00
b534c6d307
2006-12-27 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c: Document tc-i386.c, not i386.c.
2006-12-27 18:34:08 +00:00
f7ec513bed
gas/
...
* config/m68k-parse.h (m68k_register): Add CAC and MBB.
* config/tc-m68k.c (fido_ctrl): New.
(m68k_archs): Use fido_ctrl for -mfidoa.
(m68k_cpus): Use fido_ctrl on fido-*-*.
(m68k_ip): Add support for CAC and MBB.
(init_table): Add CAC and MBB.
opcodes/
* m68k-dis.c (print_insn_arg): Add support for cac and mbb.
2006-12-27 07:15:02 +00:00
70e41adeb3
2006-12-26 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (i386_immediate): Remove prototype.
2006-12-26 23:42:11 +00:00
9840d27e81
bfd/
...
* archures.c (bfd_mach_cpu32_fido): New.
(bfd_mach_mcf_isa_a_nodiv, bfd_mach_mcf_isa_a,
bfd_mach_mcf_isa_a_mac, bfd_mach_mcf_isa_a_emac,
bfd_mach_mcf_isa_aplus, bfd_mach_mcf_isa_aplus_mac,
bfd_mach_mcf_isa_aplus_emac, bfd_mach_mcf_isa_b_nousp,
bfd_mach_mcf_isa_b_nousp_mac, bfd_mach_mcf_isa_b_nousp_emac,
bfd_mach_mcf_isa_b, bfd_mach_mcf_isa_b_mac,
bfd_mach_mcf_isa_b_emac, bfd_mach_mcf_isa_b_float,
bfd_mach_mcf_isa_b_float_mac, bfd_mach_mcf_isa_b_float_emac):
Increment the defined values.
* bfd-in2.h: Regenerate.
* cpu-m68k.c (arch_info_struct): Add en entry for
bfd_mach_cpu32_fido.
* elf32-m68k.c (elf32_m68k_object_p): Handle
EF_M68K_CPU32_FIDO_A.
(elf32_m68k_merge_private_bfd_data): Use EF_M68K_CPU32_MASK.
(elf32_m68k_print_private_bfd_data): Handle
EF_M68K_CPU32_FIDO_A.
binutils/
* readelf.c (get_machine_flags): Handle EF_M68K_CPU32_FIDO_A.
gas/
* config/tc-m68k.c (cpu_of_arch): Add fido.
(m68k_archs, m68k_cpu): Add entries for fido.
(m68k_elf_final_processing): Handle EF_M68K_CPU32_FIDO_A.
include/elf/
* m68k.h (EF_M68K_CPU32_FIDO_A, EF_M68K_CPU32_MASK): New.
include/opcode/
* m68k.h (fido_a): New.
2006-12-25 22:39:21 +00:00
8fce5f8c17
* config/tc-score.c (build_lw_pic): Rename as build_lwst_pic.
...
Delete the code handling large constant for PIC.
Modify some comments.
(score_relax_frag): Decrease insn_addr in certain situation.
(s_score_cprestore): Change .cprestore syntax from ".cprestore offset"
to ".cprestore reg, offset".
2006-12-25 09:26:22 +00:00
2a962e6dd3
2006-12-15 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c: Add a blank line bewteen function bodies.
2006-12-15 19:43:59 +00:00
fc225355e8
2006-12-15 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (build_modrm_byte): Reformat to 72 columns.
2006-12-15 14:09:22 +00:00
d1cbb4db76
2006-12-14 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (match_template): Simplify 3 and 4 operand
match.
2006-12-14 13:28:24 +00:00
71903a11b9
2006-12-13 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (build_modrm_byte): Set the Operand_PCrel
bit only.
2006-12-13 19:39:12 +00:00
a5c311ca76
2006-12-13 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (match_template): Use a for loop to set
operand_types array.
2006-12-13 18:26:30 +00:00
f48ff2ae3d
gas/
...
2006-12-13 H.J. Lu <hongjiu.lu@intel.com>
PR gas/3712
* config/tc-i386.c (match_template): Use MAX_OPERANDS for the
number of operands. Issue an error if MAX_OPERANDS != 4. Add
the 4th operand check.
gas/testsuite/
2006-12-13 H.J. Lu <hongjiu.lu@intel.com>
PR gas/3712
* gas/i386/inval.s: Add invalid insertq.
* gas/i386/x86-64-inval.s: Likewise.
* gas/i386/inval.l: Updated.
* gas/i386/x86-64-inval.l: Likewise.
2006-12-13 18:00:00 +00:00
c450d570b0
2006-12-13 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (arm_arch_option_table): Add v7-{a,r,m}.
* doc/c-arm.texi: Fix spelling of ARMv7 profile variants.
2006-12-13 16:06:39 +00:00
eca5433bc0
2006-12-12 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.h (WordMem): Document it for 64 bit memory
reference.
2006-12-12 20:28:17 +00:00
ffb08c8024
2006-12-09 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.h (template): Use MAX_OPERANDS instead of 4
operand_types array.
2006-12-09 16:43:41 +00:00
41d3b0565d
* config/tc-z8k.c (whatreg): Add comment describing function.
...
Return NULL if symbol name characters follow the register number.
(parse_reg): Use NULL instead of 0 for pointer values. Stop
processing if whatreg returned NULL.
2006-12-08 22:15:11 +00:00
c694fd509c
bfd/
...
* elf32-m68k.c: Update uses of EF_M68K_*.
binutils/
* readelf.c: Update uses of EF_M68K_*.
gas/
* config/tc-m68k.c: Update uses of EF_M68K_*.
include/elf
* m68k.h (EF_M68K_ISA_MASK, EF_M68K_ISA_A_NODIV,
EF_M68K_ISA_A, EF_M68K_ISA_A_PLUS, EF_M68K_ISA_B_NOUSP,
EF_M68K_ISA_B, EF_M68K_ISA_C, EF_M68K_MAC_MASK, EF_M68K_MAC,
EF_M68K_EMAC, EF_M68K_EMAC_B, EF_M68K_FLOAT): Rename to
EF_M68K_CF_ISA_MASK, EF_M68K_CF_ISA_A_NODIV, EF_M68K_CF_ISA_A,
EF_M68K_CF_ISA_A_PLUS, EF_M68K_CF_ISA_B_NOUSP,
EF_M68K_CF_ISA_B, EF_M68K_CF_ISA_C, EF_M68K_CF_MAC_MASK,
EF_M68K_CF_MAC, EF_M68K_CF_EMAC, EF_M68K_CF_EMAC_B,
EF_M68K_CF_FLOAT, respectively.
2006-12-07 15:39:02 +00:00
9021ec07d7
gas/
...
2006-12-06 H.J. Lu <hjl@gnu.org>
* config/tc-i386.h: Change the prefix order to SEG_PREFIX,
ADDR_PREFIX, DATA_PREFIX, LOCKREP_PREFIX.
gas/testsuite/
2006-12-06 H.J. Lu <hjl@gnu.org>
* gas/i386/amdfam10.d: Updated for operand/address-size override
prefix position change.
* gas/i386/naked.d: Likewise.
* gas/i386/rep-suffix.d: Likewise.
* gas/i386/rep.d: Likewise.
* gas/i386/white.l: Likewise.
* gas/i386/x86-64-amdfam10.d: Likewise.
* gas/i386/x86-64-rep-suffix.d: Likewise.
* gas/i386/x86-64-rep.d: Likewise.
* gas/i386/x86_64.d: Likewise.
2006-12-06 18:15:45 +00:00
f0291e4c15
2006-12-01 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (arm_force_relocation): Return 1 for relocs against
function symbols.
gas/testsuite/
* gas/arm/thumbrel.s: New test.
* gas/arm/thumbrel.d: New test.
2006-12-01 16:42:26 +00:00
e1da3f5b96
2006-11-29 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (arm_is_eabi): New function.
* config/tc-arm.h (arm_is_eabi): New prototype.
(THUMB_IS_FUNC): Use ELF function type for EABI objects.
* doc/c-arm.texi (.thumb_func): Update documentation.
2006-11-29 17:53:39 +00:00
00249aaae7
2006-11-29 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (do_vfp_sp_const, do_vfp_dp_const): Fix operans
encoding.
gas/testsuite/
* gas/arm/vfpv3-const-conv.s: Improve test coverage.
* gas/arm/vfpv3-const-conv.d: Adjust expected output.
* gas/arm/vfp-neon-syntax_t2.d: Ditto.
* gas/arm/vfp-neon-syntax.d: Ditto.
opcodes/
* arm-dis.c (coprocessor_opcodes): Fix bitfields for fconstd/fconstd.
2006-11-29 16:26:56 +00:00
a7284bf13b
* config/tc-xtensa.c (xtensa_sanity_check): Check for RELAX_IMMED
...
as the first slot_subtype, not the frag subtype.
2006-11-27 23:58:39 +00:00
2caa7ca0aa
bfd/
...
* elf32-xtensa.c (elf_xtensa_special_sections): Add .xtensa.info.
gas/
* config/tc-xtensa.c (XSHAL_ABI): Add default definition.
(directive_state): Disable scheduling by default.
(xtensa_add_config_info): New.
(xtensa_end): Call xtensa_add_config_info.
gas/testsuite/
* gas/elf/section2.e-xtensa: New file.
* gas/elf/elf.exp: Use it.
include/
* xtensa-config.h (XSHAL_ABI): New.
(XTHAL_ABI_WINDOWED, XTHAL_ABI_CALL0): New.
ld/
* emultempl/xtensaelf.em (XSHAL_ABI): Add default definition.
(replace_insn_sec_with_prop_sec): Use bfd_make_section_with_flags.
Delete redundant code to set sections flags and alignment.
(xt_config_info_unpack_and_check, check_xtensa_info): New.
(elf_xtensa_after_open): Iterate over input statements instead of
link_info.input_bfds.
(elf_xtensa_before_allocation): Likewise. Call check_xtensa_info for
each input, and write a new .xtensa.info section in the output.
2006-11-27 20:14:53 +00:00
062cf83700
* config/tc-sparc.c (tc_gen_reloc): Turn aligned relocs into
...
their unaligned counterparts in debugging sections.
2006-11-27 11:25:27 +00:00
cefdba3983
* config/tc-spu.c (md_pseudo_table): Add eqv and .eqv.
2006-11-24 04:32:41 +00:00
e821645dee
opcodes/
...
* arm-dis.c (last_is_thumb): Delete.
(enum map_type, last_type): New.
(print_insn_data): New.
(get_sym_code_type): Take MAP_TYPE argument. Check the type of
the right symbol. Handle $d.
(print_insn): Check for mapping symbols even without a normal
symbol. Adjust searching. If $d is found see how much data
to print. Handle data.
gas/
* config/tc-arm.h (md_cons_align): Define.
(mapping_state): New prototype.
* config/tc-arm.c (mapping_state): Make global.
gas/testsuite/
* gas/arm/arm7t.d, gas/arm/neon-ldst-rm.d, gas/arm/thumb2_pool.d,
gas/arm/tls.d: Update for $d support.
* gas/arm/mapshort.d, gas/arm/mapshort.s: New test.
* gas/elf/section2.e-armeabi: Update.
* gas/elf/section2.e-armelf: New file.
* gas/elf/elf.exp: Use it.
ld/testsuite/
* ld-arm/mixed-app.d, ld-arm/tls-app.d, ld-arm/tls-lib.d: Update
for $d support.
2006-11-22 17:45:57 +00:00
5ab504f906
* config/obj-elf.c (obj_elf_version): Use memcpy rather than strcpy.
2006-11-22 03:35:36 +00:00
869ddf2a18
gas/
...
* config/tc-m68k.c (m68k_ip): Correct output of cpu aliases.
gas/testsuite/
* gas/m68k/all.exp: Add mcf-trap.
* gas/m68k/mcf-trap.[sd]: New.
opcodes/
* m68k-opc.c (m68k_opcodes): Place trap instructions before set
conditionals. Add tpf coldfire instruction as alias for trapf.
2006-11-16 07:22:25 +00:00
41c55c875a
* config/tc-score.c (score_relax_frag): If next frag contains 32 bit branch
...
instruction, handle it specially.
(score_insns): Modify 32 bit branch instruction.
2006-11-16 04:36:25 +00:00
25fe350bd9
gas/
...
* config/tc-arm.c (do_t_czb): Rename to do_t_cbz.
(insns): Adjust accordingly.
(md_apply_fix): Alter comments to use CBZ instead of CZB.
2006-11-14 12:21:13 +00:00
0ffdc86ce9
* config/tc-arm.c (arm_fix_adjustable) [OBJ_COFF]: Delete.
...
(arm_fix_adjustable) [OBJ_ELF]: Use it on coff targets too.
* gas/arm/local_label_coff.s: New test.
* gas/arm/local_label_coff.d: New test.
* gas/arm/local_label_elf.s: New test.
* gas/arm/local_label_elf.d: New test.
* gas/arm/local_label_wince.s: New test.
* gas/arm/local_label_wince.d: New test.
2006-11-10 09:32:42 +00:00
6afdfa61bd
PR gas/3456:
...
* config/obj-elf.c (obj_elf_version): Do not include the name field's padding in the namesz value.
2006-11-10 07:47:14 +00:00
d84bcf09ed
* config/tc-mips.c: Fix outdated comment.
2006-11-09 13:04:39 +00:00
b7d9ef3748
gas/
...
2006-11-08 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.h (CpuPNI): Removed.
(CpuUnknownFlags): Replace CpuPNI with CpuSSE3.
* config/tc-i386.c (md_assemble): Likewise.
include/opcode/
2006-11-08 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (i386_optab): Replace CpuPNI with CpuSSE3.
2006-11-08 19:56:02 +00:00
df1f3cdab5
gas:
...
* config/tc-mips.c (pic_need_relax): Return true for section symbols.
gas/testsuite:
* gas/mips/elf-rel26.s: New test.
* gas/mips/elf-rel26.d: Ditto.
* gas/mips/mips.exp: Run it.
2006-11-07 23:55:36 +00:00
a360e743fb
* config/tc-mips.c (mips_cpu_info_table): Remove 24k/24ke aliases.
...
34k always has DSP ASE.
2006-11-06 14:28:21 +00:00
58ea3d6a2f
Fix typo in comment.
2006-11-03 16:32:04 +00:00
648178740a
* config/tc-mips.c (md_pcrel_from_section): Disallow PC relative
...
MIPS16 instructions referencing other sections, unless they are
external branches.
2006-11-03 16:27:41 +00:00
7764b3958e
* config/tc-mips.c (mips_cpu_info_table): The 25Kf is a MIPS64
...
release 1 CPU.
2006-11-03 12:36:40 +00:00
d1e50f8a7e
* config/tc-h8300.c (build_bytes): Fix const warning.
2006-11-02 21:39:56 +00:00
06d2da930d
* tc-score.c (do16_rdrs): Handle not! instruction especially.
...
* score-opc.h (score_opcodes): Delete modifier '0x'.
* gas/score/rD_rA.d: Correct not! and not.c instruction disassembly.
* gas/score/b.d: Correct b! and b instruction disassembly.
2006-11-01 10:29:49 +00:00
3ba674705b
2006-10-31 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (arm_adjust_symtab): Don't use STT_ARM_16BIT
for EABIv4.
2006-10-31 20:33:40 +00:00
7a1d4c3893
2006-10-31 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (object_arch): New variable.
(s_arm_object_arch): New function.
(md_pseudo_table): Add object_arch.
(aeabi_set_public_attributes): Obey object_arch.
* doc/c-arm.texi: Document .object_arch.
2006-10-31 20:16:33 +00:00
b138abaa40
* tc-score.c (data_op2): Check invalid operands.
...
(my_get_expression): Const operand of some instructions can not be symbol in assembly.
(get_insn_class_from_type): Handle instruction type Insn_internal.
(do_macro_ldst_label): Modify inst.type.
(Insn_PIC): Delete.
* score-inst.h (enum score_insn_type): Add Insn_internal.
* tc-score.c (data_op2): The immediate value in lw is 15 bit signed.
* score-dis.c (print_insn): Correct the error code to print correct PCE instruction disassembly.
2006-10-31 09:54:41 +00:00
c79b7c30b4
2006-10-29 Randolph Chung <tausq@debian.org>
...
* config/tc-hppa.c (hppa_cfi_frame_initial_instructions)
(hppa_regname_to_dw2regnum): New funcions.
* config/tc-hppa.h [OBJ_ELF] (TARGET_USE_CFIPOP): Define.
(tc_cfi_frame_initial_instructions)
(tc_regname_to_dw2regnum): Define.
(hppa_cfi_frame_initial_instructions)
(hppa_regname_to_dw2regnum): Declare.
(DWARF2_LINE_MIN_INSN_LENGTH, DWARF2_DEFAULT_RETURN_COLUMN)
(DWARF2_CIE_DATA_ALIGNMENT): Define.
2006-10-30 01:09:18 +00:00
e2785c4472
* config/tc-spu.c (md_assemble): Cast printf string size parameter
...
to int in order to avoid a compiler warning.
2006-10-29 18:18:34 +00:00
86157c2070
2006-10-27 Andrew Stubbs <andrew.stubbs@st.com>
...
* config/tc-sh.c (md_assemble): Define size of branches.
2006-10-27 09:34:45 +00:00
e9f5312993
New Cell SPU port.
2006-10-25 06:49:21 +00:00
ede602d7c8
Add powerpc cell support.
2006-10-24 01:27:29 +00:00
878bcc438a
* config/tc-m68hc11.c (md_assemble): Quiet warning.
2006-10-23 03:23:49 +00:00
8620418b9c
* config/tc-i386.c (md_parse_option): Use CONST_STRNEQ.
...
(x86_64_section_letter): Likewise.
2006-10-20 00:32:43 +00:00
b354976135
Fix score bugs
2006-10-19 15:47:34 +00:00
71a75f6f15
2006-10-18 Roy Marples <uberlord@gentoo.org>
...
* bfd/elf64-sparc.c: Add FreeBSD support.
(elf64_sparc_fbsd_post_process_headers): New function.
* bfd/targets.c (_bfd_target_vector): Add bfd_elf64_sparc_freebsd_vec.
* bfd/config.bfd (sparc64-*-freebsd*): Set targ_defvec to bfd_elf64_sparc_freebsd_vec.
* bfd/configure.in: Add entry for bfd_elf64_sparc_freebsd_vec.
* bfd/configure: Regenerate.
* gas/config/tc-sparc.c (md_parse_option): Treat any target starting with elf32-sparc
as a viable target for the -32 switch and any target starting with elf64-sparc as a
viable target for the -64 switch.
(sparc_target_format): For 64-bit ELF flavoured output use ELF_TARGET_FORMAT64
while for 32-bit ELF flavoured output use ELF_TARGET_FORMAT.
* gas/config/tc-sparc.h (ELF_TARGET_FORMAT, ELF_TARGET_FORMAT64): Define.
* ld/emulparams/elf64_sparc_fbsd.sh (OUTPUT_FORMAT): Define as elf64-sparc-freebsd.
2006-10-18 23:58:52 +00:00
ec6e49f44c
* config/tc-score.c (md_show_usage): Print -KPIC option usage.
2006-10-13 06:55:50 +00:00
036dc3f755
2006-10-08 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (parse_big_immediate): 64-bit host fix.
(parse_operands): Use parse_big_immediate for OP_NILO.
(neon_cmode_for_logic_imm): Try smaller element sizes.
(neon_cmode_for_move_imm): Ditto.
(do_neon_logic): Handle .i64 pseudo-op.
gas/testsuite/
* testsuite/gas/arm/neon-cov.s: Test pseudo-instruction forms of
vmov, vmvn and logic immediate instructions.
* testsuite/gas/arm/neon-cov.d: ditto.
2006-10-08 18:44:07 +00:00
ef05d49568
gas/
...
2006-09-28 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.h (CpuMNI): Renamed to ...
(CpuSSSE3): This.
(CpuUnknownFlags): Updated.
(processor_type): Replace PROCESSOR_YONAH with PROCESSOR_CORE
and PROCESSOR_MEROM with PROCESSOR_CORE2.
* config/tc-i386.c: Updated.
* doc/c-i386.texi: Likewise.
* config/tc-i386.c (cpu_arch): Add ".ssse3", "core" and "core2".
include/opcode/
2006-09-28 H.J. Lu <hongjiu.lu@intel.com>
* i386.h: Replace CpuMNI with CpuSSSE3.
2006-09-28 14:06:36 +00:00
d8ad03e99d
* config/tc-arm.c (md_apply_fix): do not clear write_back bit
...
* gas/arm/iwmmxt-wldstbh.s: New file.
* gas/arm/iwmmxt-wldstbh.d: New file.
2006-09-28 13:10:13 +00:00
2d447fcaa9
bfd/
...
2006-09-26 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Ian Lance Taylor <ian@wasabisystems.com>
Ben Elliston <bje@wasabisystems.com>
* archures.c: Add definition for bfd_mach_arm_iWMMXt2.
* cpu-arm.c (processors): Add bfd_mach_arm_iWMMXt2.
(arch_info_struct, bfd_arm_update_notes): Likewise.
(architectures): Likewise.
(bfd_arm_merge_machines): Check for iWMMXt2.
* bfd-in2.h: Rebuild.
gas/
2006-09-26 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Ian Lance Taylor <ian@wasabisystems.com>
Ben Elliston <bje@wasabisystems.com>
* config/tc-arm.c (arm_cext_iwmmxt2): New.
(enum operand_parse_code): New code OP_RIWR_I32z.
(parse_operands): Handle OP_RIWR_I32z.
(do_iwmmxt_wmerge): New function.
(do_iwmmxt_wldstd): Handle iwmmxt2 case where second operand is
a register.
(do_iwmmxt_wrwrwr_or_imm5): New function.
(insns): Mark instructions as RIWR_I32z as appropriate.
Also add torvsc<b,h,w>, wabs<b,h,w>, wabsdiff<b,h,w>,
waddbhus<l,m>, waddhc, waddwc, waddsubhx, wavg4{r}, wmaddu{x,n},
wmadds{x,n}, wmerge, wmiaxy{n}, wmiawxy{n}, wmul<sm,um>{r},
wmulw<um,sm,l>{r}, wqmiaxy{n}, wqmulm{r}, wqmulwm{r}, wsubaddhx.
(md_begin): Handle IWMMXT2.
(arm_cpus): Add iwmmxt2.
(arm_extensions): Likewise.
(arm_archs): Likewise.
gas/testsuite/
2006-09-26 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Ian Lance Taylor <ian@wasabisystems.com>
Ben Elliston <bje@wasabisystems.com>
* gas/arm/iwmmxt2.s: New file.
* gas/arm/iwmmxt2.d: New file.
include/opcode/
2006-09-26 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Ian Lance Taylor <ian@wasabisystems.com>
Ben Elliston <bje@wasabisystems.com>
* arm.h (ARM_CEXT_IWMMXT2, ARM_ARCH_IWMMXT2): Define.
opcodes/
2006-09-26 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Ian Lance Taylor <ian@wasabisystems.com>
Ben Elliston <bje@wasabisystems.com>
* arm-dis.c (coprocessor_opcodes): The X-qualifier to WMADD may
only be used with the default multiply-add operation, so if N is
set, don't bother printing X. Add new iwmmxt instructions.
(IWMMXT_INSN_COUNT): Update.
(iwmmxt_wwssnames): Qualify "wwss" names at index 2, 6, 10 and 14
with a 'c' suffix.
(print_insn_coprocessor): Check for iWMMXt2. Handle format
specifiers 'r', 'i'.
2006-09-26 12:04:45 +00:00
539e75adb5
gas/
...
2006-09-23 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/3235
* config/tc-i386.c (match_template): Check address size prefix
to turn Disp64/Disp32/Disp16 operand into Disp32/Disp16/Disp32
operand.
gas/testsuite/
2006-09-23 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/3235
* gas/i386/addr16.d: New file.
* gas/i386/addr16.s: Likewise.
* gas/i386/addr32.d: Likewise.
* gas/i386/addr32.s: Likewise.
* gas/i386/i386.exp: Add "addr16" and "addr32".
* gas/i386/x86-64-addr32.s: Add tests for "add32 mov".
* gas/i386/x86-64-addr32.d: Updated.
opcodes/
2006-09-23 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/3235
* i386-dis.c (OP_OFF64): Get 32bit offset if there is an
address size prefix.
2006-09-23 23:10:14 +00:00
5e02f92ecd
* config/tc-ppc.c (ppc_symbol_chars): Remove '+' and '-'.
2006-09-22 13:54:06 +00:00
885afe7b6f
* as.h (as_perror): Delete declaration.
...
* gdbinit.in (as_perror): Delete breakpoint.
* messages.c (as_perror): Delete function.
* doc/internals.texi: Remove as_perror description.
* listing.c (listing_print: Don't use as_perror.
* output-file.c (output_file_create, output_file_close): Likewise.
* symbols.c (symbol_create, symbol_clone): Likewise.
* write.c (write_contents): Likewise.
* config/obj-som.c (obj_som_version, obj_som_copyright): Likewise.
* config/tc-tic54x.c (tic54x_mlib): Likewise.
2006-09-22 11:35:14 +00:00
3aeeedbb71
* config/tc-ppc.c (md_section_align): Don't round up address for ELF.
...
(ppc_handle_align): New function.
* config/tc-ppc.h (HANDLE_ALIGN): Use ppc_handle_align.
(SUB_SEGMENT_ALIGN): Define as zero.
2006-09-22 11:05:27 +00:00
99ad839030
Add x86_64-mingw64 target
2006-09-20 11:35:11 +00:00
7333257119
* config/bfin-parse.y (binary): Change sub of const to add of negated
...
const.
2006-09-18 20:13:23 +00:00
1c0d3aa6ae
Add support for Score target.
2006-09-16 23:51:50 +00:00
4fa3602bd5
2006-09-16 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (s_arm_unwind_movsp): Add offset argument.
* doc/c-arm.texi (movsp): Document offset argument.
gas/testsuite/
* gas/arm/unwind.s: Test two argument form of .movsp.
* gas/arm/unwind.d: Update expected output.
* gas/arm/unwind_vxworks.d: Ditto.
2006-09-16 16:24:28 +00:00
16dd5e4216
2006-09-16 Paul Brook <paul@codesourcery.com>
...
* config/tc-arm.c (thumb32_negate_data_op): Consistently use
unsigned int to avoid 64-bit host problems.
2006-09-16 00:55:33 +00:00
c4ae04ceb1
* config/bfin-parse.y (binary): Do some more constant folding for
...
additions.
2006-09-15 17:02:35 +00:00
1a1219cba3
PR gas/3165
...
* config/tc-sh (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number
in parens.
2006-09-13 00:46:09 +00:00
f512f76fcd
PR gas/3172
...
* config/tc-arm.c (parse_typed_reg_or_scalar): Accept wCg class registers
as a sub-class of wC registers.
2006-09-11 14:27:32 +00:00
H.J. Lu