6fd4f6ccfe
* NEWS: Mention these changes.
...
* config/tc-h8300.h (H_TICK_HEX): Define.
* config/tc-h8300.c (OPTION_H_TICK_HEX): New.
(md_longopts): Add "-h-tick-hex".
(md_parse_option): Support it.
* doc/c-h8300.texi (H8/300 Options): Document it.
* doc/as.texinfo (Overview): Likewise.
* config/tc-sh.h (H_TICK_HEX): Define.
* config/tc-sh.c (OPTION_H_TICK_HEX): New.
(md_longopts): Add "-h-tick-hex".
(md_parse_option): Support it.
* doc/c-sh.texi (SH Options): Document it.
* doc/c-sh64.texi (SH64 Options): Document it.
* doc/as.texinfo (Overview): Likewise.
2008-08-06 15:42:15 +00:00
413a266c4f
* dwarf2dbg.c: Remove superfluous forward function declarations.
...
(DWARF2_FORMAT): Add section arg.
(out_header): New function, split out from..
(out_debug_line): ..here.
(out_debug_aranges): Use out_header.
(out_debug_abbrev): Add info_seg and line_seg args. Use
DW_FORM_data8 (for DW_AT_stmt_list) if line_seg is 64-bit.
(out_debug_info): Use out_header. Output 8 byte DW_AT_stmt_list
if line_seg is 64-bit.
(dwarf2_finish): Adjust out_debug_abbrev call.
* config/tc-mips.h (DWARF2_FORMAT, mips_dwarf2_format): Add sec arg.
* config/tc-mips.c (mips_dwarf2_format): Likewise.
2008-08-04 10:55:48 +00:00
9b4e57660d
gas/
...
* config/tc-ppc.c (parse_cpu): Rename altivec_or_spe to retain_flags.
Handle -mvsx and -mpower7.
(md_show_usage): Document -mpower7 and -mvsx.
* doc/as.texinfo (Target PowerPC): Document -mvsx.
* doc/c-ppc.texi (PowerPC-Opts): Document -mvsx and -mpower7.
gas/testsuite/
* gas/ppc/power7.d: New.
* gas/ppc/power7.s: Likewise.
* gas/ppc/ppc.exp: Run power7 test.
include/opcode/
* ppc.h (PPC_OPCODE_VSX, PPC_OPERAND_VSR): New.
opcodes/
* ppc-dis.c (powerpc_init_dialect): Handle power7 and vsx options.
(print_insn_powerpc): Prepend 'vs' when printing VSX registers.
(print_ppc_disassembler_options): Document -Mpower7 and -Mvsx.
* ppc-opc.c (insert_xt6): New static function.
(extract_xt6): Likewise.
(insert_xa6): Likewise.
(extract_xa6: Likewise.
(insert_xb6): Likewise.
(extract_xb6): Likewise.
(insert_xb6s): Likewise.
(extract_xb6s): Likewise.
(XS6, XT6, XA6, XB6, XB6S, DM, XX3, XX3DM, XX1_MASK, XX3_MASK,
XX3DM_MASK, PPCVSX): New.
(powerpc_opcodes): Add opcodes "lxvd2x", "lxvd2ux", "stxvd2x",
"stxvd2ux", "xxmrghd", "xxmrgld", "xxpermdi", "xvmovdp", "xvcpsgndp".
2008-08-02 04:38:51 +00:00
3823320924
gas/
...
* config/tc-ppc.c (parse_cpu) <power6>: Accept Altivec instructions.
<cell>: Likewise.
gas/testsuite/
* gas/ppc/cell.s: Add altivec instructions.
* gas/ppc/cell.d: Update expected output.
* gas/ppc/power6.d: New.
* gas/ppc/power6.s: Likewise.
* gas/ppc/ppc.exp (powerpc64*-*-*): Move cell from here to...
(powerpc*-*-*): Here. Run power6 test.
2008-08-01 02:44:12 +00:00
081ba1b3c0
include/opcode/
...
* ppc.h (PPC_OPCODE_405): Define.
(PPC_OPERAND_FSL, PPC_OPERAND_FCR, PPC_OPERAND_UDI): Define.
gas/
* config/tc-ppc.c (parse_cpu): Separate handling of -m403/405.
(md_show_usage): Likewise.
opcodes/
* ppc-dis.c (print_insn_powerpc): Disassemble FSL/FCR/UDI fields.
* ppc-opc.c (powerpc_operands): Add Xilinx APU related operands.
(insert_sprg, PPC405): Use PPC_OPCODE_405.
(powerpc_opcodes): Add Xilinx APU related opcodes.
2008-07-30 06:29:22 +00:00
2cfe26b654
warning fix
2008-07-28 06:48:00 +00:00
81fd73edd1
* config/bfin-parse.y (asm_1): Error if plain symbol is used
...
as load/store offset.
2008-07-24 07:25:13 +00:00
570de99165
* config/tc-mips.c (mips_ip): Reset s to argsStart.
...
* gas/mips/tls-ill.l: Update error message.
* gas/mips/octeon-ill.l: Likewise.
2008-07-22 10:44:51 +00:00
b4f42c969a
* config/tc-bfin.c (bfin_gen_loop): Remove loop symbol.
2008-07-22 08:34:16 +00:00
cc189afcf8
* config/tc-h8300.c (fix_operand_size): Use the default size
...
specified by the .lbranch/.sbranch pseudos.
2008-07-21 17:50:54 +00:00
c54b5932c5
* config/tc-m32c.h (H_TICK_HEX): Define.
...
* config/tc-m32c.c (OPTION_H_TICK_HEX): Define.
(md_longopts): Add support for it.
(md_parse_option): Likewise.
* doc/as.texinfo (Overview): Add new m32c options.
* doc/c-m32c.texi (M32C-Modifiers): Likewise
* as.h: (enable_h_tick_hex): New.
* app.c (enable_h_tick_hex): New.
(LEX_IS_H): New.
(do_scrub_begin): Mark 'H' and 'h' as special if enable_h_tick_hex.
(do_scrub_chars): If enable_h_tick_hex and 'h', check for H'00
style hex constants and convert the input stream to 0x00 style.
(do_scrub_chars): If a 'X style character constant is found after
a symbol character (like you're or X'00), warn the user.
2008-07-18 22:25:07 +00:00
30c0909079
include/elf/
...
* mips.h (ELF_ST_IS_MIPS16, ELF_ST_SET_MIPS16): New macros.
bfd/
* elfxx-mips.c (mips_elf_check_mips16_stubs): Use ELF_ST_IS_MIPS16.
(mips_elf_calculate_relocation): Likewise.
(_bfd_mips_elf_add_symbol_hook): Likewise.
(_bfd_mips_elf_finish_dynamic_symbol): Likewise.
(_bfd_mips_vxworks_finish_dynamic_symbol): Likewise.
opcodes/
* mips-dis.c (_print_insn_mips): Use ELF_ST_IS_MIPS16.
gas/
* config/tc-mips.c (mips16_mark_labels): Use ELF_ST_SET_MIPS16.
(mips_fix_adjustable): Likewise.
(mips_frob_file_after_relocs): Likewise.
gas/testsuite/
* gas/mips/mips16-vis-1.d, gas/mips/mips16-vis-1.s: New tests.
* gas/mips/mips.exp: Run them.
2008-07-10 19:05:29 +00:00
bfbba8e4ee
* config/tc-m68k.c (m68k_set_cpu, m68k_set_arch): Don't complain
...
about overriding an earlier setting.
2008-07-08 06:33:41 +00:00
b19e8a9bae
* config/tc-mips.c (NO_ISA_COP): New macro.
...
(COP_INSN): New macro.
(is_opcode_valid): Use them.
(macro) <ld_st>: Use them. Don't accept coprocessor load store
insns based on the ISA if CPU is NO_ISA_COP.
<copz>: Likewise for coprocessor operations.
2008-07-07 19:16:23 +00:00
79947c5421
gas/
...
2008-07-07 Paul Brook <paul@codesourcery.com>
* config/tc-arm.c (arm_fix_adjustable): Don't adjust MOVW/MOVT
relocations.
gas/testsuite/
2008-07-07 Paul Brook <paul@codesourcery.com>
* gas/arm/movw-local.d: New test.
* gas/arm/movw-local.s: New test.
2008-07-07 19:12:58 +00:00
d62f07d07d
* config/tc-spu.c (md_apply_fix): Handle fully resolved
...
BFD_RELOC_32_PCREL, BFD_RELOC_SPU_HI16 and BFD_RELOC_SPU_LO16.
2008-07-04 13:04:04 +00:00
c8187e1509
gas/
...
* config/tc-ppc.c (parse_cpu): Handle -m464.
(md_show_usage): Likewise.
opcodes/
* ppc-dis.c (powerpc_init_dialect): Handle -M464.
(print_ppc_disassembler_options): Likewise.
* ppc-opc.c (PPC464): Define.
(powerpc_opcodes): Add mfdcrux and mtdcrux.
2008-06-25 16:49:03 +00:00
3bb06f783c
/gas:
...
2008-06-24 Eric B. Weddington <eric.weddington@atmel.com>
Add support for ATtiny13A.
* config/tc-avr.c (mcu_types): Add attiny13a.
* doc/c-avr.texi: Likewise.
2008-06-25 16:19:11 +00:00
1afc8defa6
PR gas/6607
...
* config/tc-mmix.c (s_loc): Assume "negative" addresses belong to
text_section. Do the "stepping backwards" test for text_section
using unsigned operands.
2008-06-16 15:04:41 +00:00
fa452fa683
include/opcode/
...
* ppc.h (ppc_cpu_t): New typedef.
(struct powerpc_opcode <flags>): Use it.
(struct powerpc_operand <insert, extract>): Likewise.
(struct powerpc_macro <flags>): Likewise.
gas/
* config/tc-ppc.c (ppc_cpu): Use ppc_cpu_t typedef.
(ppc_insert_operand): Likewise.
(ppc_machine): Likewise.
* config/tc-ppc.h: #include "opcode/ppc.h"
(struct _ppc_fix_extra <ppc_cpu>): Use ppc_cpu_t typedef.
(ppc_cpu): Update extern decl.
opcodes/
* ppc-dis.c (print_insn_powerpc): Update prototye to use new
ppc_cpu_t typedef.
(struct dis_private): New.
(POWERPC_DIALECT): New define.
(powerpc_dialect): Renamed to...
(powerpc_init_dialect): This. Update to use ppc_cpu_t and
struct dis_private.
(print_insn_big_powerpc): Update for using structure in
info->private_data.
(print_insn_little_powerpc): Likewise.
(operand_value_powerpc): Change type of dialect param to ppc_cpu_t.
(skip_optional_operands): Likewise.
(print_insn_powerpc): Likewise. Remove initialization of dialect.
* ppc-opc.c (extract_bat, extract_bba, extract_bdm, extract_bdp,
extract_bo, extract_boe, extract_fxm, extract_mb6, extract_mbe,
extract_nb, extract_nsi, extract_rbs, extract_sh6, extract_spr,
extract_sprg, extract_tbr insert_bat, insert_bba, insert_bdm,
insert_bdp, insert_bo, insert_boe, insert_fxm, insert_mb6, insert_mbe,
insert_nsi, insert_ral, insert_ram, insert_raq, insert_ras, insert_rbs,
insert_sh6, insert_spr, insert_sprg, insert_tbr): Change the dialect
param to be of type ppc_cpu_t. Update prototype.
2008-06-13 20:16:00 +00:00
dd3cbb7ef7
* mips.h: Document new field descriptors +Q.
...
(OP_SH_SEQI, OP_MASK_SEQI): New bit mask and shift count for SEQI.
opcodes/
* mips-dis.c (print_insn_args): Handle field descriptor +Q.
* mips-opc.c (mips_builtin_opcodes): Add Octeon instructions seq,
seqi, sne and snei.
gas/
* config/tc-mips.c (validate_mips_insn): Handle field descriptor +Q.
(mips_ip): Likewise.
(macro_build): Likewise.
(CPU_HAS_SEQ): New macro.
(macro2) <M_SEQ_I, M_SNE_I>: Use it. Emit seq/sne and seqi/snei.
gas/testsuite/
* gas/mips/octeon.s, gas/mips/octeon.d: Add tests for seq* and sne*.
* gas/mips/octeon-ill.s, gas/mips/octeon-ill.s: Add tests for seqi
and snei.
2008-06-12 21:44:54 +00:00
bb35fb24c1
include/opcode/
...
* mips.h: Document new field descriptors +x, +X, +p, +P, +s, +S.
Update comment before MIPS16 field descriptors to mention MIPS16.
(OP_SH_BBITIND, OP_MASK_BBITIND): New bit mask and shift count for
BBIT.
(OP_SH_CINSPOS, OP_MASK_CINSPOS, OP_SH_CINSLM1, OP_MASK_CINSLM1):
New bit masks and shift counts for cins and exts.
gas/
* config/tc-mips.c (validate_mips_insn): Handle field descriptors
+x, +X, +p, +P, +s, +S.
(mips_ip): Likewise.
opcodes/
* mips-dis.c (print_insn_args): Handle field descriptors +x, +p,
+s, +S.
* mips-opc.c (mips_builtin_opcodes): Add Octeon instructions
baddu, bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs,
syncw, syncws, vm3mulu, vm0 and vmulu.
gas/testsuite/
* gas/mips/octeon.s, gas/mips/octeon.d: Add tests for baddu,
bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs, syncw,
syncws, vm3mulu, vm0 and vmulu.
* gas/mips/octeon-ill.s, gas/mips/octeon-ill.s: New test.
* gas/mips/mips.exp: Run it. Run octeon test with
run_dump_test_arches.
2008-06-12 16:14:52 +00:00
e8568f6c63
/gas:
...
2008-06-09 Eric B. Weddington <eric.weddington@atmel.com>
* config/tc-avr.c (mcu_types): Remove support for ATmega32HVB device.
* doc/c-avr.texi: Likewise.
2008-06-09 16:07:02 +00:00
cb19c0328d
gas/
...
2008-06-03 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (set_sse_check): New.
(md_pseudo_table): Add "sse_check".
gas/testsuite/
2008-06-03 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run sse-check-none and
x86-64-sse-check-none.
* gas/i386/sse-check-none.d: New.
* gas/i386/sse-check-none.s: Likewise.
* gas/i386/x86-64-sse-check-none.d: Likewise.
2008-06-03 17:31:52 +00:00
4ecab7d4c2
2008-06-03 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (do_t_rbit): Populate both rm fields.
gas/testsuite/
* gas/arm/thumb32.d: Update expected output.
2008-06-03 14:29:07 +00:00
0a903babef
PR 5523
...
* config/tc-avr.c (avr_ldi_expression): Do not warn about unknown
relocs here.
2008-05-30 14:20:27 +00:00
b15591bb36
* config/tc-mips.c (mips_cpu_info_table): Move records for
...
ST Loongson-2E/2F processors to a better place.
2008-05-29 16:03:41 +00:00
95f283e8f6
2008-05-23 H.J. Lu <hongjiu.lu@intel.com>
...
PR gas/6518
* config/tc-i386.c (match_template): Report ambiguous operand
size, not invalid suffix when there is no match in Intel
syntax.
2008-05-23 13:55:36 +00:00
c462b453bd
2008-05-22 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (parse_cond): Covert to lowercase before matching.
2008-05-22 17:03:55 +00:00
7fac05361c
* config/tc-arm.c (arm_cpus): Add Faraday ARMv4 and ARMv5TE
...
compatible cores: fa526, fa626, fa626te, fa726te.
* doc/c-arm.texi (ARM Opts): Add -mcpu={fa526, fa626, fa626te,
fa726te} options.
2008-05-21 08:20:17 +00:00
35903be00c
gas/
...
* config/tc-mips.c (mips_frob_file): Don't match MIPS16 relocs
with non-MIPS16 relocs.
gas/testsuite/
* gas/mips/mips16-hilo-match.s: New test.
* gas/mips/mip16-hilo-match.d: New test output.Index: config/tc-mips.c
2008-05-09 19:28:47 +00:00
c41e87e39e
* config/tc-mips.c (md_begin): Use strncmp to compare TARGET_OS, in
...
case that some characters append at the end of the name.
(mips_ip): Likewise.
(s_change_sec): Likewise.
(md_section_align): Likewise.
2008-05-09 18:18:22 +00:00
51c8ebc1d0
bfd/
...
* elf32-xtensa.c (xtensa_property_section_name): New.
(xtensa_make_property_section): New.
(xtensa_get_property_section): Make static. Do not create a new
section if it does not exist.
gas/
* config/tc-xtensa.c (xtensa_create_property_segments): Use
xtensa_make_property_section instead of xtensa_get_property_section.
(xtensa_create_xproperty_segments): Likewise.
2008-05-07 23:13:09 +00:00
f1f8f695c0
gas/
...
2008-05-02 H.J. Lu <hongjiu.lu@intel.com>
* NEWS: Mention XSAVE, EPT and MOVBE.
* config/tc-i386.c (cpu_arch): Add .movbe and .ept.
(md_show_usage): Add .movbe and .ept.
* doc/c-i386.texi: Add movbe and ept to -march=. Document
.movbe and .ept.
gas/testsuite/
2008-05-02 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run movbe, movbe-intel, inval-movbe, ept,
ept-intel, inval-ept, x86-64-movbe, x86-64-movbe-intel,
x86-64-inval-movbe. x86-64-ept, x86-64-ept-intel and
x86-64-inval-ept.
* gas/i386/arch-10.s: Add movbe and invept.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/ept.d: New file
* gas/i386/ept-intel.d: Likewise.
* gas/i386/ept.s: Likewise.
* gas/i386/inval-ept.l: Likewise.
* gas/i386/inval-ept.s: Likewise.
* gas/i386/inval-movbe.l: Likewise.
* gas/i386/inval-movbe.s: Likewise.
* gas/i386/movbe.d: Likewise.
* gas/i386/movbe-intel.d: Likewise.
* gas/i386/movbe.s: Likewise.
* gas/i386/x86-64-inval-ept.l: Likewise.
* gas/i386/x86-64-inval-ept.s: Likewise.
* gas/i386/x86-64-inval-movbe.l: Likewise.
* gas/i386/x86-64-inval-movbe.s: Likewise.
* gas/i386/x86-64-ept.d: Likewise.
* gas/i386/x86-64-ept-intel.d: Likewise.
* gas/i386/x86-64-ept.s: Likewise.
* gas/i386/x86-64-movbe.d: Likewise.
* gas/i386/x86-64-movbe-intel.d: Likewise.
* gas/i386/x86-64-movbe.s: Likewise.
* gas/i386/arch-10.d: Updated.
* gas/i386/arch-10-1.l: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
opcodes/
2008-05-02 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (MOVBE_Fixup): New.
(Mo): Likewise.
(PREFIX_0F3880): Likewise.
(PREFIX_0F3881): Likewise.
(PREFIX_0F38F0): Updated.
(prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881. Update
PREFIX_0F38F0 and PREFIX_0F38F1 for movbe.
(three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881.
* i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and
CPU_EPT_FLAGS.
(cpu_flags): Add CpuMovbe and CpuEPT.
* i386-opc.h (CpuMovbe): New.
(CpuEPT): Likewise.
(CpuLM): Updated.
(i386_cpu_flags): Add cpumovbe and cpuept.
* i386-opc.tbl: Add entries for movbe and EPT instructions.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-05-02 16:53:40 +00:00
2b661f3dc2
* config/tc-sparc.c (v9a_asr_table): Fix order of softint entries.
2008-04-30 03:50:39 +00:00
037b32b9ff
* config/tc-mips.c (file_mips_soft_float, file_mips_single_float):
...
New statics.
(OPTION_ELF_BASE): Make room for new option macros.
(OPTION_SOFT_FLOAT, OPTION_HARD_FLOAT, OPTION_SINGLE_FLOAT,
OPTION_DOUBLE_FLOAT): New option macros.
(md_longopts): Add msoft-float, mhard-float, msingle-float and
mdouble-float.
(md_parse_option): Handle OPTION_SINGLE_FLOAT,
OPTION_DOUBLE_FLOAT, OPTION_SOFT_FLOAT and OPTION_HARD_FLOAT.
(md_show_usage): Add -msoft-float, -mhard-float, -msingle-float
and -mdouble-float.
(struct mips_set_options): New fields soft_float and single_float.
(mips_opts): Initialized them. Add comment for each field
initializer.
(mips_after_parse_args): Set them based on file_mips_soft_float
and file_mips_single_float.
(s_mipsset): Add support for `.set softfloat', `.set hardfloat',
`.set singlefloat' and `.set doublefloat'.
(is_opcode_valid): New function to invoke OPCODE_IS_MEMBER.
Handle single-float and soft-float instructions here.
(macro_build, mips_ip): Use it instead of OPCODE_IS_MEMBER.
(is_opcode_valid_16): New function.
(mips16_ip): Use it instead of OPCODE_IS_MEMBER.
(macro) <M_LDC1_AB, M_SDC1_AB, M_L_DOB, M_L_DAB, M_S_DAB,
M_S_DOB>: Remove special-casing of r4650.
* doc/c-mips.texi (-march=): Add Octeon.
(MIPS Opts): Document -msoft-float and -mhard-float. Document
-msingle-float and -mdouble-float.
(MIPS floating-point): New section. Document `.set softfloat' and
`.set hardfloat'. Document `.set singlefloat' and `.set
doublefloat'.
2008-04-28 17:06:28 +00:00
f04d18b76a
gas/
...
* config/tc-sparc.c: Accept 'softint_clear' and 'softint_set'
%asr aliases.
* doc/c-sparc.texi: Consistently refer to architecture 'versions',
rather than occaisionally 'levels'. Consistently refer to Sun's
UNIX variant as SunOS, every version of Solaris is also SunOS.
Document new 'softint_clear' and 'softint_set' aliases. Clarify
which architecture versions support '%dcr', '%cq', and '%gl'. Add
section on 32-bit/64-bit opcode translations.
opcodes/
* sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr
instead of %sys_tick_cmpr, as suggested in architecture manuals.
2008-04-25 19:58:03 +00:00
fe4fa32c96
2008-04-23 Mike Frysinger <vapier@gentoo.org>
...
* Makefile.am (OBJ_FORMAT_CFILES): Add config/obj-fdpicelf.c.
(OBJ_FORMAT_HFILES): Add config/obj-fdpicelf.h.
(obj-fdpicelf.o): Define.
* Makefile.in: Regenerate.
* configure.tgt: Set bfd_gas to yes when fmt is fdpicelf.
(bfin-*-*): Delete.
(bfin-*-linux-uclibc): New; set fmt to fdpicelf and em to linux.
(bfin-*-uclinux*): New; set fmt to elf and em to linux.
* config/obj-fdpicelf.c: New.
* config/obj-fdpicelf.h: Likewise.
* config/tc-bfin.c (bfin_flags, bfin_pic_flag): Set default based on
the OBJ_FDPIC_ELF define.
(OPTION_NOPIC): Define.
(md_longopts): Add mnopic and mno-fdpic.
(md_parse_option): Handle OPTION_NOPIC.
2008-04-23 18:40:34 +00:00
44bf236263
* config/obj-elf.c (obj_elf_section_type): Add prototype
...
before obj_elf_section_word and add 'warn' arg.
(obj_elf_section_word): Add type pointer arg, and if no #SECTION
is matched, try checking for #SECTION_TYPE.
(obj_elf_section): Adjust for new args.
(obj_elf_type_name): New function.
(obj_elf_type): Call it, and accept STT_foo number strings
in .type statements as output by SunPRO compiler.
2008-04-23 13:54:56 +00:00
1a6b486f73
opcodes/
...
* sparc-opc.c (asi_table): Add UltraSPARC and Niagara
extended values.
(prefetch_table): Add missing values.
gas/
* config/tc-sparc.c (v9a_asr_table): Add missing
'stick' and 'stick_cmpr', and document ordering rules
of table.
(tc_gen_reloc): Accept BFD_RELOC_SPARC_PC22 and
BFD_RELOC_SPARC_PC10.
* doc/c-sparc.texi: New section on Sparc constants.
Add documentation for %stick and %stick_cmpr.
gas/testsuite/
* gas/sparc/pc2210.d: New file.
* gas/sparc/pc2210.d: Likewise.
* gas/sparc/sparc.exp: Run new %pc22/%pc10 relocation test.
2008-04-23 07:49:33 +00:00
81f8a9131a
gas/
...
2008-04-22 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (md_assemble): Don't check SSE instructions
if noavx is 0.
opcodes/
2008-04-22 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Add NoAVX.
* i386-opc.h (NoAVX): New.
(OldGcc): Updated.
(i386_opcode_modifier): Add noavx.
* i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3
instructions which don't have AVX equivalent.
* i386-tbl.h: Regenerated.
2008-04-22 22:27:13 +00:00
eff014d916
2008-04-18 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (build_modrm_byte): Don't check FMA to swap
REG and NDS for instructions with immediate operand.
2008-04-18 18:22:37 +00:00
dae39accc2
gas/
...
2008-04-18 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (build_modrm_byte): Swap REG and NDS for
FMA.
gas/testsuite/
2008-04-18 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/arch-10.d: Updated.
* gas/i386/avx.d: Likewise.
* gas/i386/avx-intel.d: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
* gas/i386/x86-64-avx.d: Likewise.
* gas/i386/x86-64-avx-intel.d: Likewise.
opcodes/
2008-04-18 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (OP_VEX_FMA): New.
(OP_EX_VexImmW): Likewise.
(VexFMA): Likewise.
(Vex128FMA): Likewise.
(EXVexImmW): Likewise.
(get_vex_imm8): Likewise.
(OP_EX_VexReg): Likewise.
(vex_i4_done): Renamed to ...
(vex_w_done): This.
(prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps
and vpermil2pd. Replace Vex/Vex128 with VexFMA/Vex128FMA on
FMA instructions.
(print_insn): Updated.
(OP_EX_VexW): Rewrite to swap register in VEX with EX.
(OP_REG_VexI4): Check invalid high registers.
2008-04-18 13:10:32 +00:00
14865d7608
* config/tc-sparc.c (sparc_ip): Recognize %pc22 and %pc10.
2008-04-18 08:47:35 +00:00
739f7f82be
bfd/
...
* reloc.c (BFD_RELOC_SPARC_GOTDATA_HIX22,
BFD_RELOC_SPARC_GOTDATA_LOX10, BFD_RELOC_SPARC_GOTDATA_OP_HIX22,
BFD_RELOC_SPARC_GOTDATA_OP_LOX10, BFD_RELOC_SPARC_GOTDATA_OP): New.
* libbfd.h: Regnerate.
* bfd-in2.h: Regenerate.
* elfxx-sparc.c (_bfd_sparc_elf_howto_table): Add entries for
GOTDATA relocations.
(sparc_reloc_map): Likewise.
(_bfd_sparc_elf_check_relocs): Handle R_SPARC_GOTDATA_* like
R_SPARC_GOT*.
(_bfd_sparc_elf_gc_sweep_hook): Likewise.
(_bfd_sparc_elf_relocate_section): Transform R_SPARC_GOTDATA_HIX22,
R_SPARC_GOTDATA_LOX10, R_SPARC_GOTDATA_OP_HIX22, and
R_SPARC_GOTDATA_OP_LOX10 into the equivalent R_SPARC_GOT* reloc.
Simply ignore R_SPARC_GOTDATA_OP relocations.
gas/
* config/tc-sparc.c (sparc_ip): Add support for gotdata mnemonics
and relocation generation.
(tc_gen_reloc): Likewise.
gas/testsuite/
* gas/sparc/gotops32.d: New.
* gas/sparc/gotops32.s: Likewise.
* gas/sparc/gotops64.d: Likewise.
* gas/sparc/gotops64.s: Likewise.
* gas/sparc/sparc.exp: Run new gotdata tests.
ld/testsuite/
* ld-sparc/gotop32.dd: New.
* ld-sparc/gotop32.rd: Likewise.
* ld-sparc/gotop32.s: Likewise.
* ld-sparc/gotop32.sd: Likewise.
* ld-sparc/gotop32.td: Likewise.
* ld-sparc/gotop64.dd: Likewise.
* ld-sparc/gotop64.rd: Likewise.
* ld-sparc/gotop64.s: Likewise.
* ld-sparc/gotop64.sd: Likewise.
* ld-sparc/gotop64.td: Likewise.
* ld-sparc/sparc.exp: Run new gotdata tests.
2008-04-16 08:51:18 +00:00
52b5ca5b35
2008-04-15 Andrew Stubbs <andrew.stubbs@st.com>
...
gas/
* config/tc-sh.c (md_apply_fix): Make sure BFD_RELOC_SH_PCRELIMM8BY4
relocations are properly aligned, and not negative.
gas/testsuite/
* gas/sh/arch/arch.exp: Align PC-relative instructions in the gererated
assembly files.
* gas/sh/arch/sh-dsp.s: Regenerate.
* gas/sh/arch/sh.s: Regenerate.
* gas/sh/arch/sh2.s: Regenerate.
* gas/sh/arch/sh2a-nofpu-or-sh3-nommu.s: Regenerate.
* gas/sh/arch/sh2a-nofpu-or-sh4-nommu-nofpu.s: Regenerate.
* gas/sh/arch/sh2a-nofpu.s: Regenerate.
* gas/sh/arch/sh2a-or-sh3e.s: Regenerate.: Regenerate.
* gas/sh/arch/sh2a-or-sh4.s: Regenerate.
* gas/sh/arch/sh2a.s: Regenerate.
* gas/sh/arch/sh2e.s: Regenerate.
* gas/sh/arch/sh3-dsp.s: Regenerate.
* gas/sh/arch/sh3-nommu.s: Regenerate.
* gas/sh/arch/sh3.s: Regenerate.
* gas/sh/arch/sh3e.s: Regenerate.
* gas/sh/arch/sh4-nofpu.s: Regenerate.
* gas/sh/arch/sh4-nommu-nofpu.s: Regenerate.
* gas/sh/arch/sh4.s: Regenerate.
* gas/sh/arch/sh4a-nofpu.s: Regenerate.
* gas/sh/arch/sh4a.s: Regenerate.
* gas/sh/arch/sh4al-dsp.s: Regenerate.
* gas/sh/err-mova.s: New test.
ld/testsuite/
* ld-sh/arch/sh-dsp.s: Regenerate.
* ld-sh/arch/sh.s: Regenerate.
* ld-sh/arch/sh2.s: Regenerate.
* ld-sh/arch/sh2a-nofpu-or-sh3-nommu.s: Regenerate.
* ld-sh/arch/sh2a-nofpu-or-sh4-nommu-nofpu.s: Regenerate.
* ld-sh/arch/sh2a-nofpu.s: Regenerate.
* ld-sh/arch/sh2a-or-sh3e.s: Regenerate.: Regenerate.
* ld-sh/arch/sh2a-or-sh4.s: Regenerate.
* ld-sh/arch/sh2a.s: Regenerate.
* ld-sh/arch/sh2e.s: Regenerate.
* ld-sh/arch/sh3-dsp.s: Regenerate.
* ld-sh/arch/sh3-nommu.s: Regenerate.
* ld-sh/arch/sh3.s: Regenerate.
* ld-sh/arch/sh3e.s: Regenerate.
* ld-sh/arch/sh4-nofpu.s: Regenerate.
* ld-sh/arch/sh4-nommu-nofpu.s: Regenerate.
* ld-sh/arch/sh4.s: Regenerate.
* ld-sh/arch/sh4a-nofpu.s: Regenerate.
* ld-sh/arch/sh4a.s: Regenerate.
* ld-sh/arch/sh4al-dsp.s: Regenerate.
2008-04-15 15:53:26 +00:00
19a6653ce8
ppc e500mc support
2008-04-14 11:01:38 +00:00
daf50ae75d
gas/
...
2008-04-10 H.J. Lu <hongjiu.lu@intel.com>
* NEWS: Mention -msse-check=[none|error|warning].
* config/tc-i386.c (sse_check): New.
(OPTION_MSSE_CHECK): Likewise.
(md_assemble): Check SSE instructions if needed.
(md_longopts): Add -msse-check.
(md_parse_option): Handle OPTION_MSSE_CHECK.
(md_show_usage): Show -msse-check=[none|error|warning].
* doc/c-i386.texi: Document -msse-check=[none|error|warning].
gas/testsuite/
2008-04-10 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run sse-check, sse-check-warn,
sse-check-error, x86-64-sse-check, x86-64-sse-check-warn and
x86-64-sse-check-error.
* gas/i386/sse-check.d: New.
* gas/i386/sse-check.s: Likewise.
* gas/i386/sse-check-error.l: Likewise.
* gas/i386/sse-check-error.s: Likewise.
* gas/i386/sse-check-warn.d: Likewise.
* gas/i386/sse-check-warn.e: Likewise.
* gas/i386/x86-64-sse-check.d: Likewise.
* gas/i386/x86-64-sse-check-error.l: Likewise.
* gas/i386/x86-64-sse-check-error.s: Likewise.
* gas/i386/x86-64-sse-check-warn.d: Likewise.
2008-04-10 17:53:40 +00:00
40f1253383
gas/
...
2008-04-07 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (parse_real_register): Return AVX register
only if AVX is enabled.
gas/testsuite/
2008-04-07 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/att-regs.s: Add AVX register test.
* gas/i386/intel-regs.s: Likewise.
* gas/i386/att-regs.d: Updated.
* gas/i386/intel-regs.d: Likewise.
2008-04-07 13:07:16 +00:00
783d3e7187
PR gas/6043
...
* config/tc-sh64.c (shmedia_md_pcrel_from_section): Use
md_pcrel_from_section for BFD_RELOC_64 and BFD_RELOC_64_PCREL.
* gas/sh/sh64/eh-1.d: New.
* gas/sh/sh64/eh-1.d: Likewise.
2008-04-07 02:55:08 +00:00
1b6e95c267
2008-04-04 Adrian Bunk <bunk@stusta.de>
...
Bob Wilson <bob.wilson@acm.org>
* config/tc-xtensa.c (xg_apply_fix_value): Check return code from
call to decode_reloc.
2008-04-04 23:25:49 +00:00
594ab6a333
gas/
...
2008-04-04 H.J. Lu <hongjiu.lu@intel.com>
* NEWS: Mention XSAVE. Change CLMUL to PCLMUL.
* config/tc-i386.c (cpu_arch): Add .pclmul.
(md_show_usage): Replace clmul with pclmul.
* doc/c-i386.texi: Likewise.
gas/testsuite/
2008-04-04 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/arch-10-1.l: Replace CLMUL with PCLMUL.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/arch-10.s: Likewise.
* gas/i386/clmul-intel.d: Likewise.
* gas/i386/clmul.d: Likewise.
* gas/i386/clmul.s: Likewise.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/x86-64-clmul-intel.d: Likewise.
* gas/i386/x86-64-clmul.d: Likewise.
* gas/i386/x86-64-clmul.s: Likewise.
* gas/i386/arch-10.d: Replace clmul with pclmul.
* gas/i386/x86-64-arch-2.d: Likewise.
opcodes/
2008-04-04 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
with CPU_PCLMUL_FLAGS/CpuPCLMUL.
(cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
* i386-opc.tbl: Likewise.
* i386-opc.h (CpuCLMUL): Renamed to ...
(CpuPCLMUL): This.
(CpuFMA): Updated.
(i386_cpu_flags): Replace cpuclmul with cpupclmul.
* i386-init.h: Regenerated.
2008-04-04 16:34:23 +00:00
c0f3af977b
binutils/
...
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* dwarf.c (dwarf_regnames_i386): Add AVX registers.
(dwarf_regnames_x86_64): Likewise.
gas/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* NEWS: Mention AES, CLMUL, AVX/FMA and -msse2avx.
* doc/c-i386.texi: Add avx, aes, clmul and fma to -march=.
Document -msse2avx, .avx, .aes, .clmul and .fma.
* config/tc-i386.c (YMMWORD_MNEM_SUFFIX): New.
(vex_prefix): Likewise.
(sse2avx): Likewise.
(CPU_FLAGS_ARCH_MATCH): Likewise.
(CPU_FLAGS_64BIT_MATCH): Likewise.
(CPU_FLAGS_32BIT_MATCH): Likewise.
(CPU_FLAGS_PERFECT_MATCH): Likewise.
(regymm): Likewise.
(vex_imm4): Likewise.
(fits_in_imm4): Likewise.
(build_vex_prefix): Likewise.
(VEX_check_operands): Likewise.
(bad_implicit_operand): Likewise.
(OPTION_MSSE2AVX): Likewise.
(T_YMMWORD): Likewise.
(_i386_insn): Add vex.
(cpu_arch): Add .avx, .aes, .clmul and .fma.
(cpu_flags_match): Changed to take a pointer to const template.
Enable encoding SSE instructions with VEX prefix for -msse2avx.
(match_mem_size): Also check ymmword.
(operand_type_match): Clear ymmword.
(md_begin): Allow '_' in mnemonic.
(type_names): Add OPERAND_TYPE_VEX_IMM4.
(process_immext): Update assert.
(md_assemble): Don't call process_immext if sse2avx and immext
are true. Call build_vex_prefix if vex is true.
(parse_insn): Updated for cpu_flags_match.
(swap_operands): Handle 5 operands.
(match_template): Handle 5 operands. Updated for cpu_flags_match.
Check regymm. Call VEX_check_operands. Handle YMMWORD_MNEM_SUFFIX.
(process_suffix): Handle YMMWORD_MNEM_SUFFIX.
(check_byte_reg): Check regymm.
(process_operands): Duplicate the destination register for
-msse2avx if needed.
(build_modrm_byte): Updated for instructions with VEX encoding.
(output_insn): Output VEX prefix if needed.
(md_longopts): Add msse2avx.
(md_parse_option): Handle OPTION_MSSE2AVX.
(md_show_usage): Add avx, aes, clmul, fma and -msse2avx.
(intel_e09): Support YMMWORD.
(intel_e11): Likewise.
(intel_get_token): Likewise.
gas/testsuite/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run aes, aes-intel, x86-64-aes,
x86-64-aes-intel, avx, avx-intel, inval-avx, x86-64-avx,
x86-64-avx-intel and x86-64-inval-avx.
* gas/cfi/cfi-i386.s: Add tests for AVX register maps.
* gas/cfi/cfi-x86_64.s: Likewise.
* gas/i386/aes.d: New.
* gas/i386/aes.s: Likewise.
* gas/i386/aes-intel.d: Likewise.
* gas/i386/avx.d: Likewise.
* gas/i386/avx.s: Likewise.
* gas/i386/avx-intel.d: Likewise.
* gas/i386/clmul.d: Likewise.
* gas/i386/clmul-intel.d: Likewise.
* gas/i386/clmul.s: Likewise.
* gas/i386/i386.exp: Likewise.
* gas/i386/inval-avx.l: Likewise.
* gas/i386/inval-avx.s: Likewise.
* gas/i386/sse2avx.d: Likewise.
* gas/i386/sse2avx.s: Likewise.
* gas/i386/x86-64-aes.d: Likewise.
* gas/i386/x86-64-aes.s: Likewise.
* gas/i386/x86-64-aes-intel.d: Likewise.
* gas/i386/x86-64-avx.d: Likewise.
* gas/i386/x86-64-avx.s: Likewise.
* gas/i386/x86-64-avx-intel.d: Likewise.
* gas/i386/x86-64-clmul.d: Likewise.
* gas/i386/x86-64-clmul-intel.d: Likewise.
* gas/i386/x86-64-clmul.s: Likewise.
* gas/i386/x86-64-inval-avx.l: Likewise.
* gas/i386/x86-64-inval-avx.s: Likewise.
* gas/i386/x86-64-sse2avx.d: Likewise.
* gas/i386/x86-64-sse2avx.s: Likewise.
* gas/i386/arch-10.s: Add tests for AVX, AES, CLMUL and FMA.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/rexw.s: Add AVX tests.
* gas/i386/x86-64-opcode-inval.s: Remove lds/les test.
* gas/cfi/cfi-i386.d: Updated.
* gas/cfi/cfi-x86_64.d: Likewise.
* gas/i386/arch-10.d: Likewise.
* gas/i386/arch-10-1.l: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/rexw.d: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
* gas/i386/x86-64-opcode-inval.d: Likewise.
* gas/i386/x86-64-opcode-inval-intel.d: Likewise.
include/opcode/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (MAX_OPERANDS): Set to 5.
(MAX_MNEM_SIZE): Changed to 20.
opcodes/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (OP_E_register): New.
(OP_E_memory): Likewise.
(OP_VEX): Likewise.
(OP_EX_Vex): Likewise.
(OP_EX_VexW): Likewise.
(OP_XMM_Vex): Likewise.
(OP_XMM_VexW): Likewise.
(OP_REG_VexI4): Likewise.
(PCLMUL_Fixup): Likewise.
(VEXI4_Fixup): Likewise.
(VZERO_Fixup): Likewise.
(VCMP_Fixup): Likewise.
(VPERMIL2_Fixup): Likewise.
(rex_original): Likewise.
(rex_ignored): Likewise.
(Mxmm): Likewise.
(XMM): Likewise.
(EXxmm): Likewise.
(EXxmmq): Likewise.
(EXymmq): Likewise.
(Vex): Likewise.
(Vex128): Likewise.
(Vex256): Likewise.
(VexI4): Likewise.
(EXdVex): Likewise.
(EXqVex): Likewise.
(EXVexW): Likewise.
(EXdVexW): Likewise.
(EXqVexW): Likewise.
(XMVex): Likewise.
(XMVexW): Likewise.
(XMVexI4): Likewise.
(PCLMUL): Likewise.
(VZERO): Likewise.
(VCMP): Likewise.
(VPERMIL2): Likewise.
(xmm_mode): Likewise.
(xmmq_mode): Likewise.
(ymmq_mode): Likewise.
(vex_mode): Likewise.
(vex128_mode): Likewise.
(vex256_mode): Likewise.
(USE_VEX_C4_TABLE): Likewise.
(USE_VEX_C5_TABLE): Likewise.
(USE_VEX_LEN_TABLE): Likewise.
(VEX_C4_TABLE): Likewise.
(VEX_C5_TABLE): Likewise.
(VEX_LEN_TABLE): Likewise.
(REG_VEX_XX): Likewise.
(MOD_VEX_XXX): Likewise.
(PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
(PREFIX_0F3A44): Likewise.
(PREFIX_0F3ADF): Likewise.
(PREFIX_VEX_XXX): Likewise.
(VEX_OF): Likewise.
(VEX_OF38): Likewise.
(VEX_OF3A): Likewise.
(VEX_LEN_XXX): Likewise.
(vex): Likewise.
(need_vex): Likewise.
(need_vex_reg): Likewise.
(vex_i4_done): Likewise.
(vex_table): Likewise.
(vex_len_table): Likewise.
(OP_REG_VexI4): Likewise.
(vex_cmp_op): Likewise.
(pclmul_op): Likewise.
(vpermil2_op): Likewise.
(m_mode): Updated.
(es_reg): Likewise.
(PREFIX_0F38F0): Likewise.
(PREFIX_0F3A60): Likewise.
(reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
(prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
and PREFIX_VEX_XXX entries.
(x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
(three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
PREFIX_0F3ADF.
(mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
Add MOD_VEX_XXX entries.
(ckprefix): Initialize rex_original and rex_ignored. Store the
REX byte in rex_original.
(get_valid_dis386): Handle the implicit prefix in VEX prefix
bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
(print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
calling get_valid_dis386. Use rex_original and rex_ignored when
printing out REX.
(putop): Handle "XY".
(intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
ymmq_mode.
(OP_E_extended): Updated to use OP_E_register and
OP_E_memory.
(OP_XMM): Handle VEX.
(OP_EX): Likewise.
(XMM_Fixup): Likewise.
(CMP_Fixup): Use ARRAY_SIZE.
* i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
CPU_FMA_FLAGS and CPU_AVX_FLAGS.
(operand_type_init): Add OPERAND_TYPE_REGYMM and
OPERAND_TYPE_VEX_IMM4.
(cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
(opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
VexImmExt and SSE2AVX.
(operand_types): Add RegYMM, Ymmword and Vex_Imm4.
* i386-opc.h (CpuAVX): New.
(CpuAES): Likewise.
(CpuCLMUL): Likewise.
(CpuFMA): Likewise.
(Vex): Likewise.
(Vex256): Likewise.
(VexNDS): Likewise.
(VexNDD): Likewise.
(VexW0): Likewise.
(VexW1): Likewise.
(Vex0F): Likewise.
(Vex0F38): Likewise.
(Vex0F3A): Likewise.
(Vex3Sources): Likewise.
(VexImmExt): Likewise.
(SSE2AVX): Likewise.
(RegYMM): Likewise.
(Ymmword): Likewise.
(Vex_Imm4): Likewise.
(Implicit1stXmm0): Likewise.
(CpuXsave): Updated.
(CpuLM): Likewise.
(ByteOkIntel): Likewise.
(OldGcc): Likewise.
(Control): Likewise.
(Unspecified): Likewise.
(OTMax): Likewise.
(i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
(i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
vex3sources, veximmext and sse2avx.
(i386_operand_type): Add regymm, ymmword and vex_imm4.
* i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
* i386-reg.tbl: Add AVX registers, ymm0..ymm15.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-04-03 14:03:21 +00:00
2460c166ae
/gas:
...
2008-03-28 Eric B. Weddington <eric.weddington@atmel.com>
* config/tc-avr.c (mcu_types): Add attiny167.
* doc/c-avr.texi: Likewise.
/include:
2008-03-28 Eric B. Weddington <eric.weddington@atmel.com>
* opcode/avr.h (AVR_ISA_TINY3): Define new opcode set for attiny167.
2008-03-28 21:51:38 +00:00
70881657a2
/gas:
...
2008-03-28 Eric B. Weddington <eric.weddington@atmel.com>
* config/tc-avr.c (mcu_types): Add atmega32u4.
* doc/c-avr.texi: Likewise.
2008-03-28 21:04:22 +00:00
25755480bf
/gas:
...
2008-03-28 Eric B. Weddington <eric.weddington@atmel.com>
* config/tc-avr.c (mcu_types): Add atmega32c1.
* doc/c-avr.texi: Likewise.
2008-03-28 19:24:52 +00:00
4641781c11
2008-03-28 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (parse_neon_mov): Parse register before immediate
to avoid spurious symbols.
2008-03-28 18:13:52 +00:00
025987eae0
* config/tc-m68k.c (md_convert_frag_1): Replace as_fatal with
...
as_bad_where.
2008-03-28 09:51:13 +00:00
38de72b9a0
* config/tc-avr.c (mcu_types): Add atmega32m1.
...
* doc/c-avr.texi: Likewise.
2008-03-27 14:52:35 +00:00
35997600fc
* config/tc-arm.c (do_neon_cvt): Move variable declarations to
...
start of block.
(do_neon_ext): Fix sign of comparison.
2008-03-27 14:12:15 +00:00
e2c038d34c
gas/:
...
* config/tc-bfin.c (bfin_start_line_hook): Localize the labels
generated for LOOP_BEGIN and LOOP_END instructions.
(bfin_gen_loop): Likewise.
gas/testsuite/:
* gas/bfin/flow.d: Adjust since the generated labels for LOOP_BEGIN
and LOOP_END instruction are local now.
* gas/bfin/flow2.d: Likewise.
2008-03-26 16:33:33 +00:00
ee171c8f94
gas/
...
* config/bfin-parse.y (check_macfunc_option): Allow (IU)
option for multiply and multiply-accumulate to data register
instruction.
(check_macfuncs): Don't check if accumulator matches the data register
here.
(assign_macfunc): Check if accumulator matches the
data register in each rule that moves to the data
register.
gas/testsuite/
* gas/bfin/arithmetic.s, gas/bfin/arithmetic.d: Add check
for IU option.
* gas/bfin/expected_errors.l, gas/bfin/expected_errors.s:
Add check for mismatch of accumulator and data register.
opcodes/
* bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
multiply and multiply-accumulate to data register instruction.
2008-03-26 16:21:10 +00:00
c1db045b89
gas/:
...
* config/bfin-parse.y (check_macfunc_option): New.
(check_macfuncs): Check option by calling check_macfunc_option.
Fix comparison always true warnings. Both scalar instructions
of vector instruction must share the same mode option. Only allow
option mode at the end of the second instruction of the vector.
(asm_1): Check option by calling check_macfunc_option.
gas/testsuite/:
* gas/bfin/expected_errors.l, gas/bfin/expected_errors.s: Add
tests for bad options of "multiply and multipy-accumulate to
accumulator" instructions. Add new vector instruction option
mode tests.
* gas/bfin/vector2.s: Add new vector instruction option mode test.
* gas/bfin/vector2.d: Adjust accordingly.
* gas/bfin/expected_errors.s, gas/bfin/expected_errors.l: Add test
for mismatched half registers in vector multipy-accumulate
instructions.
2008-03-26 15:58:27 +00:00
99bfa74a53
gas/
...
From Jie Zhang <jie.zhang@analog.com>
* config/bfin-parse.y (asm_1): Check AREGS in comparison
instructions. And call yyerror () when comparing PREG with
DREG.
gas/testsuite/:
* gas/bfin/expected_comparison_errors.l: New test.
* gas/bfin/expected_comparison_errors.s: New test.
* gas/bfin/bfin.exp: Add expected_comparison_errors.
2008-03-26 15:18:42 +00:00
5746fb46c8
2008-03-19 Andreas Krebbel <krebbel1@de.ibm.com>
...
* opcodes/s390-mkopc.c (s390_opcode_cpu_val): S390_OPCODE_Z10 added.
(s390_cond_extensions): Reduced extensions to the compare related.
(main): z10 cpu type option added.
(expandConditionalJump): Renamed to ...
(insertExpandedMnemonic): ... this.
* opcodes/s390-opc.c: Re-group the operand format makros.
(INSTR_RIE_RRPU, INSTR_RIE_RRP0, INSTR_RIE_RUPI,
INSTR_RIE_R0PI, INSTR_RIE_RUPU, INSTR_RIE_R0PU, INSTR_RIE_R0IU,
INSTR_RIE_R0I0, INSTR_RIE_R0UU, INSTR_RIE_R0U0,
INSTR_RIE_RRUUU, INSTR_RIS_RURDI, INSTR_RIS_R0RDI, INSTR_RIS_RURDU,
INSTR_RIS_R0RDU, INSTR_RRF_U0RR, INSTR_RRF_00RR, INSTR_RRS_RRRDU,
INSTR_RRS_RRRD0, INSTR_RXY_URRD, INSTR_SIY_IRD, INSTR_SIL_RDI,
INSTR_SIL_RDU): New instruction formats added.
(MASK_RIE_RRPU, MASK_RIE_RRP0, MASK_RIE_RUPI, MASK_RIE_R0PI,
MASK_RIE_RUPU, MASK_RIE_R0PU, MASK_RIE_R0IU, MASK_RIE_R0I0,
MASK_RIE_R0UU, MASK_RIE_R0U0, MASK_RIE_RRUUU, MASK_RIS_RURDI,
MASK_RIS_R0RDI, MASK_RIS_RURDU, MASK_RIS_R0RDU, MASK_RRF_U0RR,
MASK_RRF_00RR, MASK_RRS_RRRDU, MASK_RRS_RRRD0, MASK_RXY_URRD,
MASK_SIY_IRD, MASK_SIL_RDI, MASK_SIL_RDU): New instruction format
masks added.
(s390_opformats): New formats added "ris", "rrs", "sil".
* opcodes/s390-opc.txt: Add the conditional jumps with the
extensions removed from automatic expansion in s390-mkopc.c manually.
(asi - trtre): Add new System z10 EC instructions.
* include/opcode/s390.h (s390_opcode_cpu_val): S390_OPCODE_Z10 added.
2008-03-19 Andreas Krebbel <krebbel1@de.ibm.com>
* config/tc-s390.c (md_parse_option): z10 option added.
2008-03-19 Andreas Krebbel <krebbel1@de.ibm.com>
* gas/s390/zarch-z10.d: New file.
* gas/s390/zarch-z10.s: New file.
* gas/s390/s390.exp: Run the z10 testcases.
2008-03-19 10:29:18 +00:00
da6b876ee6
PR 5946
...
* config/tc-hppa.c (is_same_frag): Delete.
2008-03-16 23:16:03 +00:00
3b49282506
2008-03-14 Sterling Augustine <sterling@tensilica.com>
...
* config/tc-xtensa.h (xtensa_relax_statesE): Update comment for
RELAX_LOOP_END_ADD_NOP.
2008-03-14 20:17:39 +00:00
15290f0adc
2008-03-09 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (arm_cpu_option_table): Add cortex-a9.
* doc/c-arm.texi: Add cortex-a9.
2008-03-09 15:20:31 +00:00
b1cc4aeb65
2008-03-09 Paul Brook <paul@codesourcery.com>
...
bfd/
* elf32-arm.c (elf32_arm_merge_eabi_attributes): Handle new
Tag_VFP_arch values.
binutils/
* readelf.c (arm_attr_tag_VFP_arch): Add "VFPv3-D16".
gas/
* config/tc-arm.c (fpu_vfp_ext_d32): New vairable.
(parse_vfp_reg_list, encode_arm_vfp_reg): Use it.
(arm_option_cpu_value): Add vfpv3-d16, vfpv2 and vfpv3.
(aeabi_set_public_attributes): Handle Tag_VFP_arch=VFPV3-D16.
* doc/c-arm.texi: Document new ARM FPU variants.
gas/testsuite/
* gas/arm/vfpv3-d16-bad.d: New test.
* gas/arm/vfpv3-d16-bad.l: New test.
include/opcode/
* arm.h (FPU_VFP_EXT_D32, FPU_VFP_V3D16, FPU_ARCH_VFP_V3D16): Define.
2008-03-09 13:23:29 +00:00
39623e120c
2008-03-07 Paul Brook <paul@codesourcery.com>
...
bfd/
* elf32-arm.c (elf32_arm_howto_table_1): Fix bitmasks for MOVW and
MOVT relocations.
(elf32_arm_final_link_relocate): Fix off by one MOVW/MOVT sign
extension.
(elf32_arm_relocate_section): Handle MOVW and MOVT
relocations. Improve safety check for other weird relocations.
(elf32_arm_check_relocs): Only set h->needs_plt for branch/call
relocations.
gas/
* config/tc-arm.c (md_apply_fix): Use correct offset range.
ld/testsuite/
* ld-arm/arm-elf.exp (armelftests): Add movw-merge and arm-app-movw.
* ld-arm/arm-app-movw.s: New test.
* ld-arm/arm-app.r: Update expected output.
* ld-arm/movw-merge.d: New test.
* ld-arm/movw-merge.s: New test.
2008-03-08 01:20:39 +00:00
d815f1a994
* config/tc-ppc.c (ppc_setup_opcodes): Tidy. Add code to test
...
for strict ordering of powerpc_opcodes, but disable for now.
2008-03-06 23:01:00 +00:00
7e8064706d
2008-03-04 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (arm_ext_barrier, arm_ext_msr): New.
(arm_ext_v7m): Rename...
(arm_ext_m): ... to this. Include v6-M.
(do_t_add_sub): Allow narrow low-reg non flag setting adds.
(do_t_mrs, do_t_msr, aeabi_set_public_attributes): Use arm_ext_m.
(md_assemble): Allow wide msr instructions.
(insns): Add classifications for v6-m instructions.
(arm_cpu_option_table): Add cortex-m1.
(arm_arch_option_table): Add armv6-m.
(cpu_arch): Add ARM_ARCH_V6M. Fix numbering of other v6 variants.
gas/testsuite/
* gas/arm/archv6m.d: New test.
* gas/arm/archv6m.s: New test.
* gas/arm/t16-bad.s: Test low register non flag setting add.
* gas/arm/t16-bad.l: Update expected output.
include/opcode/
* arm.h (ARM_EXT_V6M, ARM_EXT_BARRIER, ARM_EXT_THUMB_MSR): Define.
(ARM_AEXT_V6T2, ARM_AEXT_V7_ARM, ARM_AEXT_V7M): Use new flags.
(ARM_AEXT_V6M, ARM_ARCH_V6M): Define.
2008-03-05 01:31:26 +00:00
77cba8a32b
bfd/
...
* xtensa-isa.c (xtensa_isa_num_pipe_stages): Make max_stage static and
only compute its value once.
gas/
* config/tc-xtensa.c (xtensa_num_pipe_stages): New.
(md_begin): Initialize it.
(resources_conflict): Use it.
2008-03-03 23:23:41 +00:00
58502fec59
2008-03-03 Sterling Augustine <sterling@tensilica.com>
...
* config/tc-xtensa.h (RELAX_XTENSA_NONE): New.
2008-03-03 22:14:45 +00:00
783de16343
* config/tc-ppc.h (struct _ppc_fix_extra): New.
...
(ppc_cpu): Declare.
(TC_FIX_TYPE, TC_INIT_FIX_DATA): Define.
* config/tc-ppc.c (ppu_cpu): Make global.
(ppc_insert_operand): Add ppu_cpu parameter.
(md_assemble): Adjust for above change.
(md_apply_fix): Pass tc_fix_data.ppc_cpu to ppc_insert_operand.
2008-03-01 07:24:47 +00:00
584206dbd5
* config/tc-arm.c (do_bx): Only test EF_ARM_EABI_VERSION on ELF
...
targeted ARM ports, otherwise just skip generating the reloc.
2008-02-22 16:47:01 +00:00
5ad3420347
* config/tc-arm.c (do_bx): Only test EF_ARM_EABI_VERSION on ELF
...
targeted ARM ports.
2008-02-22 15:14:44 +00:00
845b51d665
2008-02-20 Paul Brook <paul@codesourcery.com>
...
ld/
* emultempl/armelf.em (OPTION_FIX_V4BX_INTERWORKING): Define.
(PARSE_AND_LIST_LONGOPTS): Add fix-v4bx-interworking.
(PARSE_AND_LIST_OPTIONS): Ditto.
(PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FIX_V4BX_INTERWORKING.
* emulparams/armelf.sh (OTHER_TEXT_SECTIONS): Add .v4_bx.
* emulparams/armelf_linux.sh (OTHER_TEXT_SECTIONS): Ditto.
* emulparams/armnto.sh (OTHER_TEXT_SECTIONS): Ditto.
* ld.texinfo: Document --fix-v4bx-interworking.
ld/testsuite/
* ld-arm/armv4-bx.d: New test.
* ld-arm/armv4-bx.s: New test.
* ld-arm/arm.ld: Add .v4bx.
* ld-arm/arm-elf.exp: Add armv4-bx.
gas/testsuite/
* gas/arm/thumb.d: Exclude EABI targets.
* gas/arm/arch4t.d: Exclude EABI targts.
* gas/arm/v4bx.d: New test.
* gas/arm/v4bx.s: New test.
* gas/arm/thumb-eabi.d: New test.
* gas/arm/arch4t-eabi.d: New test.
gas/
* config/tc-arm.c (fix_v4bx): New variable.
(do_bx): Generate V4BX relocations.
(md_assemble): Allow bx on v4 codes when fix_v4bx.
(md_apply_fix): Handle BFD_RELOC_ARM_V4BX.
(tc_gen_reloc): Ditto.
(OPTION_FIX_V4BX): Define.
(md_longopts): Add fix-v4bx.
(md_parse_option): Handle OPTION_FIX_V4BX.
(md_show_usage): Document --fix-v4bx.
* doc/c-arm.texi: Document --fix-v4bx.
bfd/
* reloc.c: Add BFD_RELOC_ARM_V4BX.
* elf32-arm.c (elf32_arm_reloc_map): Add BFD_RELOC_ARM_V4BX.
(ARM_BX_GLUE_SECTION_NAME, ARM_BX_GLUE_SECTION_NAME): Define.
(elf32_arm_link_hash_table): Add bx_glue_size and bx_glue_offset.
Update comment for fix_v4bx.
(elf32_arm_link_hash_table_create): Zero bx_glue_size and
bx_glue_offset.
(ARM_BX_VENEER_SIZE, armbx1_tst_insn, armbx2_moveq_insn,
armbx3_bx_insn): New.
(bfd_elf32_arm_allocate_interworking_sections): Allocate BX veneer
section.
(bfd_elf32_arm_add_glue_sections_to_bfd): Ditto.
(bfd_elf32_arm_process_before_allocation): Record BX veneers.
(record_arm_bx_glue, elf32_arm_bx_glue): New functions.
(elf32_arm_final_link_relocate): Handle BX veneers.
(elf32_arm_output_arch_local_syms): Output mapping symbol for .v4_bx.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
2008-02-20 15:17:56 +00:00
ca75ed2d8f
* config/tc-mn10300.c (has_known_symbol_location): New function.
...
Do not regard weak symbols as having a known location.
(md_estimate_size_before_relax): Use new function.
(md_pcrel_from): Do not compute a pcrel against a weak symbol.
2008-02-18 10:03:06 +00:00
192dc9c6fd
gas/
...
2008-02-18 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (match_template): Disallow 'l' suffix when
currently selected CPU has no 32-bit support.
(parse_real_register): Do not return registers not available on
currently selected CPU.
gas/testsuite/
2008-02-18 Jan Beulich <jbeulich@novell.com>
* gas/i386/att-regs.s, gas/i386/att-regs.d,
gas/i386/intel-regs.s, gas/i386/intel-regs.d: New.
* gas/i386/i386.exp: Run new tests.
2008-02-18 08:44:38 +00:00
1fed0ba155
2008-02-16 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (process_immext): Fix format.
2008-02-17 00:26:19 +00:00
65da13b5e0
gas/
...
2008-02-16 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (inoutportreg): New.
(process_immext): New.
(md_assemble): Use it.
(update_imm): Use imm16 and imm32s.
(i386_att_operand): Use inoutportreg.
opcodes/
2008-02-16 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
* i386-init.h: Regenerated.
2008-02-16 16:16:48 +00:00
0dfbf9d7ce
2008-02-14 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (operand_type_all_zero): New.
(operand_type_set): Likewise.
(operand_type_equal): Likewise.
(cpu_flags_all_zero): Likewise.
(cpu_flags_set): Likewise.
(cpu_flags_equal): Likewise.
(UINTS_ALL_ZERO): Removed.
(UINTS_SET): Likewise.
(UINTS_CLEAR): Likewise.
(UINTS_EQUAL): Likewise.
(cpu_flags_match): Updated.
(smallest_imm_type): Likewise.
(set_cpu_arch): Likewise.
(md_assemble): Likewise.
(optimize_imm): Likewise.
(match_template): Likewise.
(process_suffix): Likewise.
(update_imm): Likewise.
(process_drex): Likewise.
(process_operands): Likewise.
(build_modrm_byte): Likewise.
(i386_immediate): Likewise.
(i386_displacement): Likewise.
(i386_att_operand): Likewise.
(parse_real_register): Likewise.
(md_parse_option): Likewise.
(i386_target_format): Likewise.
2008-02-14 22:54:02 +00:00
93ac268764
PR gas/5712
...
* config/tc-arm.c (s_arm_unwind_save): Advance the input line
pointer past the comma after parsing a floating point register
name.
* gas/arm/fp-save.s: New test.
* gas/arm/fp-save.d: Expected disassembly.
2008-02-14 16:35:51 +00:00
d669d37f8d
PR gas/2626
...
* avr.h (AVR_ISA_2xxe): Define.
* config/tc-avr.c (mcu_types): Change the ISA tyoe of the attiny26
to AVR_ISA_2xxe.
(avr_operand): Disallow post-increment addressing in the lpm
instruction for the attiny26.
2008-02-14 13:04:29 +00:00
b7240065b3
gas/
...
2008-02-13 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (parse_real_register): Don't return 'FLAT'
if not in Intel mode.
(i386_intel_operand): Ignore segment overrides in immediate and
offset operands.
(intel_e11): Range-check i.mem_operands before use as array
index. Filter out FLAT for uses other than as segment override.
(intel_get_token): Remove broken promotion of "FLAT:" to mean
"offset FLAT:".
gas/testsuite/
2008-02-13 Jan Beulich <jbeulich@novell.com>
* gas/i386/intelok.s: Replace invalid offset expression with
valid ones.
* gas/i386/x86_64.s: Likewise.
opcodes/
2008-02-13 Jan Beulich <jbeulich@novell.com>
* i386-opc.h (RegFlat): New.
* i386-reg.tbl (flat): Add.
* i386-tbl.h: Re-generate.
2008-02-13 13:41:26 +00:00
34b772a651
gas/
...
2008-02-13 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (intel_e09): Also special-case 'bound'.
gas/testsuite/
2008-02-13 Jan Beulich <jbeulich@novell.com>
* gas/i386/intelbad.s, gas/i386/intelok.s: Add 'bound' tests.
* gas/i386/intelbad.l, gas/i386/intelok.l, gas/i386/intelok.e,
gas/i386/opcode-intel.d: Adjust.
opcodes/
2008-02-13 Jan Beulich <jbeulich@novell.com>
* i386-dis.c (a_mode): New.
(cond_jump_mode): Adjust.
(Ma): Change to a_mode.
(intel_operand_size): Handle a_mode.
* i386-opc.tbl: Allow Dword and Qword for bound.
* i386-tbl.h: Re-generate.
2008-02-13 13:29:31 +00:00
a60de03c61
gas/
...
2008-02-13 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (allow_pseudo_reg): New.
(parse_real_register): Check for NULL just once. Allow all
register table entries when allow_pseudo_reg is non-zero.
Don't allow any registers without type when allow_pseudo_reg
is zero.
(tc_x86_regname_to_dw2regnum): Replace with ...
(tc_x86_parse_to_dw2regnum): ... this.
(tc_x86_frame_initial_instructions): Adjust for above change.
* config/tc-i386.h (tc_regname_to_dw2regnum): Remove.
(tc_parse_to_dw2regnum): New.
(tc_x86_regname_to_dw2regnum): Replace with ...
(tc_x86_parse_to_dw2regnum): ... this.
* dw2gencfi.c (tc_parse_to_dw2regnum): New, broken out of ...
(cfi_parse_reg): ... this. Use tc_parse_to_dw2regnum. Adjust
error handling.
gas/testsuite/
2008-02-13 Jan Beulich <jbeulich@novell.com>
* gas/cfi/cfi-i386.s: Add code testing use of all registers.
Fix a few comments.
* gas/cfi/cfi-x86_64.s: Likewise.
* gas/cfi/cfi-i386.d, gas/cfi/cfi-x86_64.d: Adjust.
opcodes/
2008-02-13 Jan Beulich <jbeulich@novell.com>
* i386-gen.c (process_i386_registers): Process new fields.
* i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
unsigned char. Add dw2_regnum and Dw2Inval.
* i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
register names.
* i386-tbl.h: Re-generate.
2008-02-13 10:14:40 +00:00
9c95b5212a
* config/tc-tic4x.c (tic4x_insn_insert): Add const qualifier to
...
argument.
(tic4x_insn_add): Likewise.
(md_begin): Drop cast that was discarding a const qualifier.
* config/tc-d30v.c (get_reloc): Add const qualifier to op
argument.
(build_insn): Drop cast that was discarding a const qualifier.
2008-02-12 08:37:08 +00:00
f03fe4c110
gas/
...
2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (cpu_arch): Add .xsave.
(md_show_usage): Add .xsave.
* doc/c-i386.texi: Add xsave to -march=.
gas/testsuite/
2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/arch-10.s: Add xgetbv.
* gas/i386/arch-10.d: Updated.
* gas/i386/arch-10-1.l: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/x86-64-arch-10.d: Likewise.
opcodes/
2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
* i386-init.h: Updated.
2008-02-12 05:35:36 +00:00
1bf57e9fa3
* read.c (s_weakref): Don't pass unadorned NULL to concat.
...
* config/tc-i386.c (set_cpu_arch, md_parse_option): Likewise.
2008-02-07 08:40:29 +00:00
2276bc2089
2008-02-05 Sterling Augustine <sterling@tensilica.com>
...
* config/tc-xtensa.c (relax_frag_immed): Change internal consistency
checks into assertions. When relaxation produces an operation that
does not fit in the current FLIX instruction, make sure that the
operation is relaxed as needed to account for being placed following
the current instruction.
2008-02-05 19:39:08 +00:00
967344c664
* config/tc-mips.c (mips_cpu_info_table): Add Octeon.
2008-02-04 19:20:16 +00:00
599121aa77
gas/
...
2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (md_show_usage): Replace tabs with spaces.
gas/testsuite/
2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp : Run x86-64-arch-1 and x86-64-arch-10.
* gas/i386/x86-64-arch-1.d: New.
* gas/i386/x86-64-arch-1.s: Likewise.
* gas/i386/x86-64-arch-10.d: Likewise.
opcodes/
2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
* i386-init.h: Regenerated.
2008-01-23 19:05:12 +00:00
2b1ed17bea
/gas:
...
2008-01-23 Eric B. Weddington <eric.weddington@atmel.com>
* config/tc-avr.c (mcu_types): Change opcode set for at86rf401.
/include:
2008-01-23 Eric B. Weddington <eric.weddington@atmel.com>
* opcode/avr.h (AVR_ISA_RF401): Add new opcode set for at86rf401.
2008-01-23 17:36:23 +00:00
2cb4f3d5a9
2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (md_show_usage): Show more processors for
-march=/-mtune=.
2008-01-23 14:13:08 +00:00
115c7c25fe
gas/
...
2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (i386_target_format): Remove cpummx2.
gas/testsuite/
2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/arch-10.d: New.
* gas/i386/arch-11.s: Likewise.
* gas/i386/arch-12.d: Likewise.
* gas/i386/arch-12.s: Likewise.
* gas/i386/i386.exp: Run arch-11 and arch-12.
opcodes/
2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (cpu_flag_init): Remove CpuMMX2.
(cpu_flags): Likewise.
* i386-opc.h (CpuMMX2): Removed.
(CpuSSE): Updated.
* i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-01-22 19:57:30 +00:00
6305a20382
gas/
...
2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (XXX_PREFIX): Moved from tc-i386.h.
(XXX_MNEM_SUFFIX): Likewise.
(END_OF_INSN): Likewise.
(templates): Likewise.
(modrm_byte): Likewise.
(rex_byte): Likewise.
(DREX_XXX): Likewise.
(drex_byte): Likewise.
(sib_byte): Likewise.
(processor_type): Likewise.
(arch_entry): Likewise.
(cpu_sub_arch_name): Remove const.
(cpu_arch): Add .vmx and .smx.
(set_cpu_arch): Append cpu_sub_arch_name.
(md_parse_option): Support -march=CPU[,+EXTENSION...].
(md_show_usage): Updated.
* config/tc-i386.h (XXX_PREFIX): Moved to tc-i386.c.
(XXX_MNEM_SUFFIX): Likewise.
(END_OF_INSN): Likewise.
(templates): Likewise.
(modrm_byte): Likewise.
(rex_byte): Likewise.
(DREX_XXX): Likewise.
(drex_byte): Likewise.
(sib_byte): Likewise.
(processor_type): Likewise.
(arch_entry): Likewise.
* doc/as.texinfo: Update i386 -march option.
* doc/c-i386.texi: Update -march= for ISA.
gas/testsuite/
2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/arch-10-1.l: New.
* gas/i386/arch-10-1.s: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-2.s: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-3.s: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/arch-10-4.s: Likewise.
* gas/i386/arch-10.d: Likewise.
* gas/i386/arch-10.s: Likewise.
* gas/i386/i386.exp: Run arch-10, arch-10-1, arch-10-2,
arch-10-3 and arch-10-4.
* gas/i386/nops-2.s: Use movsbl instead of cmove.
* gas/i386/nops-2-i386.d: Updated.
* gas/i386/nops-2-merom.d: Likewise.
* gas/i386/nops-2.d: Likewise.
* gas/i386/x86-64-nops-2.d: Likewise.
opcodes/
2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
CPU_SMX_FLAGS.
* i386-init.h: Regenerated.
2008-01-22 19:16:45 +00:00
fb227da0a1
* config/tc-xtensa.c (xtensa_leb128): New function.
...
(md_pseudo_table): Use it for sleb128 and uleb128.
(is_leb128_expr): New internal flag.
(xtensa_symbol_new_hook): Check new flag.
2008-01-18 19:13:48 +00:00
982b62a030
/gas:
...
2008-01-03 Eric B. Weddington <eric.weddington@atmel.com>
* config/tc-avr.c (mcu_types): Change opcode set for avr3,
at90usb82, at90usb162.
* doc/c-avr.texi: Change architecture grouping for at90usb82,
at90usb162.
These changes support the new avr35 architecture group in gcc.
/include:
2008-01-03 Eric B. Weddington <eric.weddington@atmel.com>
* opcode/avr.h (AVR_ISA_USB162): Add new opcode set.
(AVR_ISA_AVR3): Likewise.
2008-01-16 17:59:07 +00:00
321fd21e2f
gas/
...
2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (md_assemble): Also zap movzx and movsx
suffix for AT&T syntax.
gas/testsuite/
2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.s: Add more tests for movsx and movzx.
* gas/i386/x86_64.s: Likewise.
* gas/i386/inval.s: Remove tests for movsxw and movzxw.
* gas/i386/x86-64-inval.s: Remove tests for movsxb, movsxw,
movsxl, movzxb and movzxw.
* gas/i386/i386.d: Updated.
* gas/i386/inval.l: Likewise.
* gas/i386/x86_64.d: Likewise.
* gas/i386/x86-64-inval.l: Likewise.
opcodes/
2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
* i386-tbl.h: Regenerated.
2008-01-15 18:50:44 +00:00
5c07affcae
gas/
...
2008-01-14 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (match_reg_size): New.
(match_mem_size): Likewise.
(operand_size_match): Likewise.
(operand_type_match): Also clear all size fields.
(match_template): Skip Intel syntax when in AT&T syntax.
Call operand_size_match to check operand size.
(i386_att_operand): Set the mem field to 1 for memory
operand.
(i386_intel_operand): Likewise.
gas/testsuite/
2008-01-14 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.s: Add tests for movsx, movzx and movnti.
* gas/i386/inval.s: Likewise.
* gas/i386/x86_64.s: Likewise.
* gas/i386/x86-64-inval.s: Likewise.
* gas/i386/i386.d: Updated.
* gas/i386/inval.l: Likewise.
* gas/i386/x86_64.d: Likewise.
* gas/i386/x86-64-inval.l: Likewise.
opcodes/
2008-01-14 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Add IntelSyntax.
(operand_types): Add Mem.
* i386-opc.h (IntelSyntax): New.
* i386-opc.h (Mem): New.
(Byte): Updated.
(Opcode_Modifier_Max): Updated.
(i386_opcode_modifier): Add intelsyntax.
(i386_operand_type): Add mem.
* i386-opc.tbl: Remove Reg16 from movnti. Add sizes to more
instructions.
* i386-reg.tbl: Add size for accumulator.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-01-15 01:37:56 +00:00
7d5e4556a3
gas/testsuite/
...
2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* gas/i386/i386.s: Add tests for fnstsw and fstsw.
* gas/i386/inval.s: Likewise.
* gas/i386/x86_64.s: Likewise.
* gas/i386/intel.s: Use word instead of dword on ss.
* gas/i386/x86-64-inval.s: Add tests for fnstsw, fstsw, in
and out.
* gas/i386/prefix.s: Remove invalid fstsw.
* gas/i386/inval.l: Updated.
* gas/i386/intelbad.l: Likewise.
* gas/i386/i386.d: Likewise.
* gas/i386/x86_64.d: Likewise.
* gas/i386/x86-64-inval.l: Likewise.
* gas/i386/prefix.d: Updated.
gas/
2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* config/tc-i386.c (_i386_insn): Update comment.
(operand_type_match): Also clear unspecified.
(operand_type_register_match): Likewise.
(parse_operands): Initialize unspecified.
(i386_intel_operand): Likewise.
(match_template): Check memory and accumulator operand size.
(i386_att_operand): Clear unspecified on register operand.
(intel_e11): Likewise.
(intel_e09): Set operand size and clean unspecified for
"XXX PTR".
opcodes/
2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* i386-gen.c (operand_type_init): Add Dword to
OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64.
(opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
Qword and Xmmword.
(operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
Xmmword, Unspecified and Anysize.
(set_bitfield): Make Mmword an alias of Qword. Make Oword
an alias of Xmmword.
* i386-opc.h (CheckSize): Removed.
(Byte): Updated.
(Word): Likewise.
(Dword): Likewise.
(Qword): Likewise.
(Xmmword): Likewise.
(FWait): Updated.
(OTMax): Likewise.
(i386_opcode_modifier): Remove checksize, byte, word, dword,
qword and xmmword.
(Fword): New.
(TBYTE): Likewise.
(Unspecified): Likewise.
(Anysize): Likewise.
(i386_operand_type): Add byte, word, dword, fword, qword,
tbyte xmmword, unspecified and anysize.
* i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
Tbyte, Xmmword, Unspecified and Anysize.
* i386-reg.tbl: Add size for accumulator.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-01-12 16:05:42 +00:00
50aecf8c5f
2008-01-10 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (match_template): Check processor support
first.
2008-01-10 21:59:46 +00:00
2dbab7d572
2008-01-10 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (match_template): Continue if processor
doesn't match.
2008-01-10 20:53:27 +00:00
417c21b7ba
* config/tc-ia64.c (ia64_convert_frag): Zero-initialize room for
...
unwind personality function address.
2008-01-09 22:36:06 +00:00
45664ddbb0
2008-01-09 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (match_template): Check register size
only when size of operands can be encoded the canonical way.
2008-01-09 16:55:14 +00:00
a761937534
2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (i386_operand): Renamed to ...
(i386_att_operand): This.
(parse_operands): Updated.
2008-01-08 19:51:24 +00:00
e1d4d8936f
gas/
...
2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
* doc/c-i386.texi: Update .att_mnemonic and .intel_mnemonic.
* config/tc-i386.c (set_intel_mnemonic): Set intel_mnemonic
only.
(md_assemble): Remove Intel mode workaround.
(match_template): Check support for old gcc, AT&T mnemonic
and Intel Syntax.
(md_parse_option): Don't set intel_mnemonic to 0 for
OPTION_MOLD_GCC.
gas/testsuite/
2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/intel.s: Add tests for fadd, faddp, fdiv, fdivp,
fdivr, fdivrp, fmul, fmulp, fsub, fsubp, fsubr and fsubrp.
* gas/i386/intel.d: Updated.
* gas/i386/intel.e: Likewise.
opcodes/
2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
ATTSyntax.
* i386-opc.h (IntelMnemonic): Renamed to ..
(ATTSyntax): This
(Opcode_Modifier_Max): Updated.
(i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
and intelsyntax.
* i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
* i386-tbl.h: Regenerated.
2008-01-05 17:07:25 +00:00
23117009d4
2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.h: Update copyright to 2008.
2008-01-04 18:19:12 +00:00
b0e34bfe93
* config/tc-ppc.c (parse_cpu): Preserve the settings of the
...
PPC_OPCODE_ALTIVEC and PPC_OPCODE_SPE flags.
* gas/ppc/altivec_and_spe.s: New test - checks that ISA extension
command line options (-maltivec, -mspe) can be specified before
CPU selection command line options.
* gas/ppc/altivec_and_spe.d: Expected disassembly.
* gas/ppc/ppc.exp: Run the new test
2008-01-04 14:53:50 +00:00
aacd03c3bb
2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (md_assemble): Use !intel_mnemonic instead
of SYSV386_COMPAT.
2008-01-04 01:27:01 +00:00
3629bb00a8
gas/
...
2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
* gas/config/tc-i386.c (cpu_arch_flags_not): Removed.
(cpu_flags_not): Likewise.
(cpu_flags_match): Updated to check 64bit and arch.
(set_code_flag): Remove cpu_arch_flags_not.
(set_16bit_gcc_code_flag): Likewise.
(set_cpu_arch): Likewise.
(md_begin): Likewise.
(parse_insn): Call cpu_flags_match to check 64bit and arch.
(match_template): Likewise.
gas/testsuite/
2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/arch-9.d: New file.
* gas/i386/arch-9.s: Likewise.
* gas/i386/i386.exp: Run arch-9.
opcodes/
2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
CpuSSE4_2_Or_ABM.
(cpu_flags): Likewise.
* i386-opc.h (CpuSSE4_1_Or_5): Removed.
(CpuSSE4_2_Or_ABM): Likewise.
(CpuLM): Updated.
(i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
* i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
and CpuPadLock, respectively.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-01-04 01:05:45 +00:00
5dd15031dd
* config/tc-i386.c (process_drex): Initialize modrm_reg and
...
modrm_regmem to 0 instead of None.
2008-01-03 20:19:29 +00:00
24995bd6e3
gas/
...
2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (match_template): Use the xmmword field
instead of no_xsuf.
opcodes/
2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Remove No_xSuf.
* i386-opc.h (No_xSuf): Removed.
(CheckSize): Updated.
* i386-tbl.h: Regenerated.
2008-01-03 20:09:38 +00:00
fc4adea1ba
2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (process_suffix): Fix a typo.
2008-01-02 23:55:45 +00:00
582d5eddfe
gas/
...
2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* config/tc-i386.c (match_template): Handle XMMWORD_MNEM_SUFFIX.
Check memory size in Intel mode.
(process_suffix): Handle XMMWORD_MNEM_SUFFIX.
(intel_e09): Likewise.
* config/tc-i386.h (XMMWORD_MNEM_SUFFIX): New.
gas/testsuite/
2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* gas/i386/intel.s: Use QWORD on movq instead of DWORD.
* gas/i386/inval.s: Add tests for movq.
* gas/i386/x86-64-inval.s: Likewise.
* gas/i386/inval.l: Updated.
* gas/i386/x86-64-inval.l: Likewise.
opcodes/
2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
Byte, Word, Dword, QWord and Xmmword.
* i386-opc.h (No_xSuf): New.
(CheckSize): Likewise.
(Byte): Likewise.
(Word): Likewise.
(Dword): Likewise.
(QWord): Likewise.
(Xmmword): Likewise.
(FWait): Updated.
(i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
Dword, QWord and Xmmword.
* i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
used.
* i386-tbl.h: Regenerated.
2008-01-02 21:43:34 +00:00
e7c604dd09
* gas/mips/jalr.s: New test.
...
* gas/mips/jalr.l: New test output.
* gas/mips/mips.exp: Run new test.
2008-01-02 20:59:47 +00:00
ba104c838a
2007-12-29 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (md_show_usage): Add -mmnemonic, -msyntax,
-mindex-reg, -mnaked-reg and -mold-gcc.
2007-12-29 14:15:20 +00:00
3a0d49fcec
* config/tc-hppa.h (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number
...
in parens.
2007-12-27 15:35:53 +00:00
5209009a1b
Fix a typo in comment.
2007-12-24 06:10:17 +00:00
1efbbeb461
gas/
...
2007-12-23 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (set_intel_mnemonic): New.
(intel_mnemonic): Likewise.
(old_gcc): Likewise.
(OPTION_MMNEMONIC): Likewise.
(OPTION_MSYNTAX): Likewise.
(OPTION_MINDEX_REG): Likewise.
(OPTION_MNAKED_REG): Likewise.
(OPTION_MOLD_GCC): Likewise.
(md_pseudo_table): Add .intel_mnemonic and .att_mnemonic.
(match_template): Don't allow AT&T/Intel mnemonic if Intel/AT&T
mnemonic is specified. Don't allow old gcc support if old_gcc
is 0.
(md_longopts): Add -mmnemonic, -msyntax, -mindex-reg,
-mmnaked-reg and -mold-gcc.
(md_parse_option): Handle OPTION_MMNEMONIC, OPTION_MSYNTAX,
OPTION_MINDEX_REG, OPTION_MNAKED_REG and OPTION_MOLD_GCC.
* doc/c-i386.texi: Docoument -mmnemonic, -msyntax, --mnaked-reg
and AT&T mnemonic vs. Intel mnemonic.
gas/testsuite/
2007-12-23 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/compat-intel.d: Pass -mmnemonic=att to assembler.
* gas/i386/compat.d: Likewise.
* gas/i386/i386.exp: Pass -mmnemonic=att to assembler for
"float". Pass -mold-gcc to assembler for "general".
opcodes/
2007-12-23 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Add OldGcc, ATTMnemonic and
IntelMnemonic.
* i386-opc.h (OldGcc): New.
(ATTMnemonic): Likewise.
(IntelMnemonic): Likewise.
(Opcode_Modifier_Max): Updated.
(i386_opcode_modifier): Add oldgcc, attmnemonic and
intelmnemonic.
* i386-opc.tbl: Update fadd, fdiv, fdivp, fdivr, fdivrp, fmul,
fsub, fsubp, fsubr and fsubrp with OldGcc, ATTMnemonic and
IntelMnemonic.
* i386-tbl.h: Regeneratd.
2007-12-24 05:27:39 +00:00
1f7efbae40
* config/tc-xtensa.c (xtensa_elf_cons): Set frag flags for
...
expressions without suffixes.
(get_frag_property_flags): Preserve is_no_transform flag for frags
not marked as either instructions or literals.
2007-12-20 17:21:07 +00:00
4746505869
2007-12-17 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (output_insn): Use ARRAY_SIZE.
(lex_got): Likewise.
2007-12-17 19:41:57 +00:00
4a3523fa63
2007-12-17 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (output_insn): Use FRAG_APPEND_1_CHAR
instead of frag_more/md_number_to_chars.
(md_short_jump_size): Removed.
(md_long_jump_size): Likewise.
(md_create_short_jump): Likewise.
(md_create_long_jump): Likewise.
2007-12-17 18:53:06 +00:00
38f9cb7fe1
gas/
...
* config/tc-xtensa.c (xg_symbolic_immeds_fit): Relax for weak
references but not weak definitions.
gas/testsuite/
* gas/xtensa/all.exp: Run new weak-call test.
* gas/xtensa/weak-call.d: New.
* gas/xtensa/weak-call.s: New.
2007-12-13 19:03:45 +00:00
8e6bc631a9
* config/tc-xtensa.c (xg_symbolic_immeds_fit): Do not relax calls to weak symbols if longcalls are disabled.
2007-12-12 21:16:47 +00:00
def13efb26
* config/tc-xtensa.c (frag_format_size): Handle frags that expand to
...
wide branches.
(get_aligned_diff): For RELAX_ALIGN_NEXT_OPCODE, skip to the next
non-empty frag to find the LOOP instruction. Change comma typo to
a semicolon.
(relax_frag_immed, convert_frag_immed): Rename wide_insn variable to
from_widen_insn.
2007-12-11 21:52:39 +00:00
71ac351cf2
* config/tc-m32r.c (md_begin): Mark .sbss as being bss style section.
2007-12-10 23:33:46 +00:00
742a56fee5
gas/
...
* config/tc-mips.h (mips_nop_opcode): Declare.
(NOP_OPCODE): Define.
(mips_segment_info): New structure.
(TC_SEGMENT_INFO_TYPE): Use it instead of insn_label_list.
* config/tc-mips.c (label_list): Adjust for new TC_SEGMENT_INFO_TYPE.
(mips_record_mips16_mode): New function.
(install_insn): Call it.
(mips_align): Likewise. Turn the fill argument into an "int *".
Use frag_align_code for code segments if no fill data is given.
(s_align): Adjust call accordingly.
(mips_nop_opcode): New function.
(mips_handle_align): Use the first variable byte to decide which
nop sequence is needed. Use md_number_to_chars and mips16_nop_insn.
gas/testsuite/
* gas/mips/align2.s, gas/mips/align2.d, gas/mips/align2-el.d: New
tests.
* gas/mips/mips.exp: Run them.
2007-12-10 10:36:00 +00:00
1bbb5f219c
2007-12-07 Bob Wilson <bob.wilson@acm.org>
...
include/elf/
* xtensa.h (R_XTENSA_32_PCREL): New.
bfd/
* elf32-xtensa.c (elf_howto_table): Add R_XTENSA_32_PCREL.
(elf_xtensa_reloc_type_lookup): Handle BFD_RELOC_32_PCREL.
(elf_xtensa_check_relocs): Use default case for all relocations that
need nothing done here.
(elf_xtensa_do_reloc): Compute self_address for all relocation types.
Handle R_XTENSA_32_PCREL.
(elf_xtensa_relocate_section): Check for R_XTENSA_32_PCREL for dynamic
symbols.
(check_section_ebb_pcrels_fit): Ignore R_XTENSA_32_PCREL relocations.
gas/
* config/tc-xtensa.c (O_pcrel): Define.
(suffix_relocs): Add pcrel suffix.
(md_pseudo_table): Add 4byte and 2byte directives.
(xtensa_elf_cons): Pass correct pcrel argument to fix_new_exp.
(xg_assemble_literal): Likewise. Check for O_pcrel.
(expression_maybe_register): Reorganize. Handle BFD_RELOC_32_PCREL.
(xg_valid_literal_expression): Allow O_pcrel.
(md_pcrel_from, md_apply_fix): Handle BFD_RELOC_32_PCREL.
(tc_gen_reloc): Fix punctuation in error message.
gas/testsuite/
* gas/xtensa/all.exp: Run new pcrel test.
* gas/xtensa/err-pcrel.s: New.
* gas/xtensa/pcrel.d: New.
* gas/xtensa/pcrel.s: New.
* gas/xtensa/xtensa-err.exp: New.
2007-12-07 22:52:10 +00:00
542f8b941d
* config/tc-xtensa.c (xg_force_frag_space): Delete.
...
(xg_finish_frag, xg_assemble_literal_space): Replace calls to it.
(xtensa_create_property_segments, xtensa_create_xproperty_segments):
Set output_section for new property sections. Use subseg_set and
seg_info instead of retrieve_segment_info. Adjust arguments to
add_xt_block_frags and add_xt_prop_frags. Use standard functions
to create frags and fix records.
(retrieve_segment_info): Delete.
(add_xt_block_frags, add_xt_prop_frags): Replace calls to
retrieve_segment_info. Remove unused xt_block_sec arguments.
2007-12-07 01:07:33 +00:00
d13d401589
* config/tc-ppc.c (ppc_tc): Allow a space between toc symbol
...
name and bracket.
2007-12-03 23:14:24 +00:00
ee6365aa9e
gas/
...
* config/tc-xtensa.h (md_allow_eh_opt): Define.
gas/testsuite/
* gas/elf/elf.exp: Disable ehopt test for Xtensa.
2007-11-30 23:47:55 +00:00
350cc38db2
bfd/
...
* archures.c (bfd_mach_mips_loongson_2e): New.
(bfd_mach_mips_loongson_2f): New.
* bfd-in2.h (bfd_mach_mips_loongson_2e): New.
(bfd_mach_mips_loongson_2f): New.
* cpu-mips.c: Add I_loongson_2e and I_loongson_2f to
anonymous enum.
(arch_info_struct): Add Loongson-2E and Loongson-2F entries.
* elfxx-mips.c (_bfd_elf_mips_mach): Handle Loongson-2E
and Loongson-2F flags.
(mips_set_isa_flags): Likewise.
(mips_mach_extensions): Add Loongson-2E and Loongson-2F
entries.
binutils/
* readelf.c (get_machine_flags): Handle Loongson-2E and -2F
flags.
gas/
* config/tc-mips.c (mips_cpu_info_table): Add loongson2e
and loongson2f entries.
* doc/c-mips.texi: Document -march=loongson{2e,2f} options.
gas/testsuite/
* gas/mips/mips.exp: Add loongson-2e and -2f tests.
* gas/mips/loongson-2e.d: New.
* gas/mips/loongson-2e.s: New.
* gas/mips/loongson-2f.d: New.
* gas/mips/loongson-2f.s: New.
include/elf/
* mips.h (E_MIPS_MACH_LS2E): New.
(E_MIPS_MACH_LS2F): New.
include/opcode/
* mips.h (INSN_LOONGSON_2E): New.
(INSN_LOONGSON_2F): New.
(CPU_LOONGSON_2E): New.
(CPU_LOONGSON_2F): New.
(OPCODE_IS_MEMBER): Update for Loongson-2E and -2F flags.
opcodes/
* mips-dis.c (mips_arch_choices): Add Loongson-2E and -2F
entries.
* mips-opc.c (IL2E): New.
(IL2F): New.
(mips_builtin_opcodes): Add Loongson-2E and -2F instructions.
Allow movz and movn for Loongson-2E and -2F. Add movnz entry.
Move coprocessor encodings to the end of the table. Allow
certain MIPS V .ps instructions on the Loongson-2E and -2F.
2007-11-29 12:23:44 +00:00
e6181b6abd
2007-11-29 Martin Schwidefsky <schwidefsky@de.ibm.com>
...
* config/tc-s390.c (md_begin): If the -mesa option is specified
add zarch opcodes to the hash table only if there is no variant
that is available for the esa mode as well.
2007-11-29 Martin Schwidefsky <schwidefsky@de.ibm.com>
* gas/s390/esa-z9-109.d: Add check for old version of sske.
* gas/s390/esa-z9-109.s: Likewise.
2007-11-29 09:34:14 +00:00
ee21dcabf8
* config/tc-alpha.c (assemble_insn): Don't segv on NULL reloc_operand.
2007-11-26 01:43:43 +00:00
b224e962a8
* config/xtensa-istack.h (tinsn_struct): Replace linenum field
...
with loc_directive_seen and debug_line.
* config/tc-xtensa.c: Include xtensa-istack.h after dwarf2dbg.h.
(xg_build_to_insn): Copy the new fields instead of linenum.
(xg_build_token_insn): Likewise. Abort on INSTR_LABEL_DEF and move
common code out of the switch.
(md_assemble): Set new tinsn fields from DWARF information. Call
dwarf2_consume_line_info.
(xg_assemble_vliw_tokens): Update the code to select the "best" line
number to use new information. Call dwarf2_gen_line_info instead
of dwarf2_emit_insn.
2007-11-19 19:40:55 +00:00
661ba50f53
* dwarf2dbg.c (dwarf2_consume_line_info): New.
...
(dwarf2_emit_insn): Use it here.
(dwarf2_directive_loc): Fix check for consecutive .loc directives
when debug_type is DEBUG_DWARF2.
* dwarf2dbg.h (dwarf2_consume_line_info): New prototype.
* config/tc-ia64.c (ia64_flush_insns): Call dwarf2_consume_line_info.
(md_assemble): Likewise.
testsuite/
* gas/lns/lns.exp: Run lns-common-1 with alternate source for ia64.
* gas/lns/lns-common-1-ia64.s: New file.
2007-11-19 18:15:53 +00:00
4ffff32f75
* config/tc-mips.c (md_parse_option): Match mips_optimize to the -O
...
option supplied, but still keep mips_optimize == 2 as default value.
2007-11-17 14:19:19 +00:00
ee50f563b9
2007-11-16 Eric B. Weddington <eric.weddington@atmel.com>
...
* config/tc-avr.c (mcu_types): Add ATmega32HVB device.
* doc/c-avr.texi: Likewise.
2007-11-16 17:39:22 +00:00
2221168ece
2007-11-16 Eric B. Weddington <eric.weddington@atmel.com>
...
* config/tc-avr.c (mcu_types): Add ATmega1284P device.
* doc/c-avr.texi: Likewise.
2007-11-16 17:25:28 +00:00
4f8631b1d4
gas/
...
2007-11-14 Tristan Gingold <gingold@adacore.com>
* config/tc-ia64.c (AR_RUC): Defined.
(ar): Add "ar.ruc".
(specify_resource): Handle AR_RUC like AR_ITC.
gas/testsuite/
2007-11-14 H.J. Lu <hongjiu.lu@intel.com>
* gas/ia64/dv-raw-err.s: Add tests for ar.ruc.
* gas/ia64/dv-waw-err.s: Likewise.
* gas/ia64/invalid-ar.s: Likewise.
* gas/ia64/regs.s: Add tests for ar.ruc and ar44.
* gas/ia64/dv-raw-err.l: Updated.
* gas/ia64/dv-waw-err.l: Likewise.
* gas/ia64/invalid-ar.l: Likewise.
* gas/ia64/regs.d: Likewise.
opcodes/
2007-11-14 H.J. Lu <hongjiu.lu@intel.com>
* ia64-ic.tbl: Updated for Itanium 9100 series.
* ia64-raw.tbl: Likewise.
* ia64-waw.tbl: Likewise.
* ia64-asmtab.c: Regenerated.
2007-11-14 Tristan Gingold <gingold@adacore.com>
* ia64-dis.c (print_insn_ia64): Handle ar.ruc.
* ia64-gen.c (lookup_regindex): Likewise.
2007-11-14 22:31:54 +00:00
b5f5fd962e
* config/tc-mn10300.c (mn10300_force_relocation): Force a reloc to be generated for alignment fixups.
...
* config/tc-mn10300.h (TC_FORCE_RELOCATION): Call mn10300_force_relocation.
* elf-m10300.c (mn10300_elf_final_link_relocate): Prevent the accidental termination of DWARF location list entries.
(mn10300_elf_relax_delete_bytes): Stop deletion if an align reloc is encountered that is larger than or not a mutliple of the number of bytes being deleted.
When adjusting symbols, any symbols inside the region being deleted must be moved to the end of the region.
Move align relocs forward if there is room for them after the deletion of the region.
2007-11-13 10:40:29 +00:00
4247714778
PR gas/5269
...
* config/tc-frv.c (md_show_usage): Rewrite usage description to make it easier to translate.
* gas/po/gas.pot: Regenerate.
2007-11-12 10:57:33 +00:00
2ad068bef2
* config/tc-ppc.c (md_assemble): If -mregnames, when parsing
...
PPC_OPERAND_CR always parse as expression to allow register name
followed by an expression.
2007-11-12 00:27:53 +00:00
567e4e96bc
2007-11-09 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (match_template): Re-order suffix check.
2007-11-09 13:53:13 +00:00
11ac267110
* config/tc-xtensa.c (relaxable_section): Check for .eh_frame.
2007-11-08 01:40:58 +00:00
71fe8fb398
2007-11-07 Eric B. Weddington <eweddington@cso.atmel.com>
...
* config/tc-avr.c (mcu_types): Add ATtiny88 device.
* doc/c-avr.texi: Likewise.
2007-11-07 17:59:05 +00:00
5cc9c0ab34
2007-11-07 Anatoly Sokolov <aesok@post.ru>
...
* config/tc-avr.c (mcu_types): Add new devices: ATmega48P, ATmega88P,
ATmega168P, Atmega328P
* doc/c-avr.texi: Document new devices.
2007-11-07 17:24:59 +00:00
8edcbfcd2e
* config/tc-ppc.c (md_apply_fix): For PPC_TOC16 on XCOFF, uses offset
...
within the TOC instead of the VMA.
* gas/ppc/test1xcoff32.d: Updated to match RTOC bug fix.
2007-11-07 14:10:49 +00:00
682b27ad2a
2007-11-06 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (do_mull): Allow overlapping Rm for armv6.
gas/testsuite/
* gas/arm/mul-overlap.s: Add umull and smlal.
* gas/arm/mul-overlap.l: Update expected results.
2007-11-06 22:17:00 +00:00
8c7504802a
* ehopt.c (check_eh_frame): If md_allow_eh_opt is defined, invoke it to see if the optimizations should be applied.
...
* config/tc-mn10300.h (md_allow_eh_opt): Define. Only allow call frame optimization if linker relaxation is not enabled.
* gas/elf/elf.exp: Disable ehopt test for mn10300.
2007-11-06 17:15:10 +00:00
6a7eedfedc
* config/tc-xtensa.c (xtensa_symbol_new_hook): New.
...
(xtensa_mark_difference_of_two_symbols): New.
(xtensa_post_relax_hook): Call xtensa_mark_difference_of_two_symbols.
* config/tc-xtensa.h (xtensa_symfield_type): Add next_expr_symbol.
(tc_symbol_new_hook): Define.
2007-11-02 00:45:34 +00:00
7ce189b305
gas/
...
2007-11-01 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (md_assemble): Replace no_xsuf with
no_ldsuf.
(match_template): Likewise.
opcodes/
2007-11-01 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Replace No_xSuf with
No_ldSuf.
* i386-opc.tbl: Likewise.
* i386-opc.h (No_xSuf): Renamed to ...
(No_ldSuf): This.
(FWait): Updated.
2007-11-01 19:06:54 +00:00
4a146fc23c
2007-11-01 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.h (LONG_DOUBLE_MNEM_SUFFIX): Use a non-ascii
letter.
2007-11-01 18:40:53 +00:00
ca61edf2ff
gas/
...
2007-11-01 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (process_suffix): Check addrprefixop0 to
see if the address size override prefix changes the size of the
first operand.
(check_byte_reg): Don't warn if byteokintel is set.
(check_long_reg): Set i.suffix to QWORD_MNEM_SUFFIX if toqword
is set.
(check_qword_reg): Set i.suffix to LONG_MNEM_SUFFIX if todword
is set.
gas/testsuite/
2007-11-01 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.d: New.
* gas/i386/i386.s: Likewise.
* gas/i386/i386.exp: Run i386.
* gas/i386/x86_64.s: Add tests for movsx, movsbl, movsbq,
movsbw, movswl, movswq, movzx, movzb, movzbl, movzbq,
movzbw, movzwl and movzwq.
* gas/i386/x86_64.d: Updated.
opcodes/
2007-11-01 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Add ByteOkIntel, ToDword,
ToQword and AddrPrefixOp0.
* i386-opc.h (ByteOkIntel): New.
(ToDword): Likewise.
(ToQword): Likewise.
(AddrPrefixOp0): Likewise.
(IsPrefix): Updated.
(i386_opcode_modifier): Add byteokintel, todword, toqword
and addrprefixop0.
* i386-opc.tbl (cvtss2si): Add ToQword.
(cvttss2si): Likewise.
(cvtsd2si): Add ToDword.
(cvttsd2si): Likewise.
(monitor): Add AddrPrefixOp0.
(invlpga): Likewise.
(vmload): Likewise.
(vmrun): Likewise.
(vmsave): Likewise.
(pextrb): Add ByteOkIntel.
(pinsrb): Likewise.
* i386-tbl.h: Regenerated.
2007-11-01 16:27:08 +00:00
7f5ba16ddb
2007-10-31 Eric B. Weddington <eweddington@cso.atmel.com>
...
* config/tc-avr.c (mcu_types): Remove devices that were never produced:
attiny10, atmega83, atmega85, atmega603.
* doc/c-avr.texi: Likewise.
2007-10-31 18:11:28 +00:00
569006e582
* mn10300.h (R_MN10300_ALIGN): Define.
...
* reloc.c (BFD_RELOC_MN10300_ALIGN): Add.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* elf-m10300.h: Handle R_MN10300_ALIGN relocs.
* mn10300_elf_relax_delete_bytes): Honour R_MN10300_ALIGN relocs.
Re-fix off by one error in comparisons.
* config/tc-mn10300.c (tc_gen_reloc): Fix test that decides when
sym_diff relocs should be generated.
(md_apply_fix): Skip R_MN10300_ALIGN relocs.
(mn10300_fix_adjustable): Do not adjust R_MN10300_ALIGN relocs.
(mn10300_handle_align): New function. Generate R_MN10300_ALIGN
relocs to record alignment requests.
* config/tc-mn10300.h (TC_FORCE_RELOCATION_SUB_SAME): Also force
R_MN10300_ALIGN relocs.
(HANDLE_ALIGN): Define. Call mn10300_handle_align.
* gas/all/gas.exp: Do not run diff1.s test for mn10300.
* ld-mn10300/mn10300.exp: Run new tests. Skip i126256 test if
a compiler is not available.
* ld-mn10300/i112045-3.s: New test.
* ld-mn10300/i112045-3.d: Expected disassembly.
* ld-mn10300/i135409.s: Rename to i135409-1.s.
* ld-mn10300/i135409.d: Rename to i135409-1.d
* ld-mn10300/i135409-2.s: New test.
* ld-mn10300/i135409-2.d: Expected symbol table.
* ld-mn10300/i36434.d: Adjust expected disassembly.
2007-10-30 15:18:29 +00:00
9cfc3331a8
gas/
...
2007-10-27 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5221
* config/obj-elf.c (obj_elf_section): Handle optional
parameters for .pushsection.
* doc/as.texinfo: Document optional parameters for
.pushsection.
gas/testsuite/
2007-10-27 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5221
* gas/elf/elf.exp: Run section7.
* gas/elf/section7.d: New.
* gas/elf/section7.s: Likewise.
2007-10-27 17:45:53 +00:00
bfff164249
Add MN10300 linker relaxation support for symbol differences
2007-10-19 17:31:31 +00:00
603b72571d
* elf-m10300.c: Convert to ISO C.
...
* tc-mn10300.c: Convert to ISO C.
2007-10-19 11:48:57 +00:00
13abbae325
* config/tc-ppc.c (ppc_parse_name): Skip leading '%'.
...
(md_assemble): When parsing PPC_OPERAND_CR, add '%' to set of
chars that can start a name.
2007-10-19 10:48:17 +00:00
717c53eab0
gas/
...
2007-10-18 Carlos O'Donell <carlos@systemhalted.org>
* config/tc-hppa.c (pa_ip): Fix comment typo.
(pa_comm): Likewise.
2007-10-18 13:33:57 +00:00
b2f58c0c09
PR gas/5172
...
* config/tc-arc.c (md_estimate_size_before_relax): Change error message.
(md_convert_frag): Just call abort.
* config/tc-i860.c (md_estimate_size_before_relax): Change error message.
* config/tc-i860.h (md_convert_frag): Just call abort.
* config/tc-ip2k.c (md_estimate_size_before_relax): Change error message.
(md_convert_frag): Just call abort.
* config/tc-m68k.c (m68k_ip): Do not attempt translation of architecture names.
2007-10-18 13:03:12 +00:00
5f4273c75a
PR gas/5174
...
* config/tc-arm.c: Fix formatting and spelling errors.
* gas.pot: Regenerate.
2007-10-18 11:49:34 +00:00
662a2e45c3
PR gas/5175
...
* config/tc-xc16x.c: Fix formatting and internationalization.
* gas.pot: Regenerate.
2007-10-18 11:01:24 +00:00
499ac35361
Remove duplicate definitions of the md_atof() function
2007-10-17 16:45:56 +00:00
504b7d2026
Support the use of the STT_COMMON type. (In source and object files only at the moment)
2007-10-16 14:42:15 +00:00
8dbcd839b1
gas/
...
* config/tc-ppc.c (ppc_setup_opcodes): Verify instructions are sorted
according to major opcode number.
opcodes/
* ppc-opc.c (TE): Correct signedness.
(powerpc_opcodes): Sort psq_st and psq_stu according to major
opcode number.
2007-10-16 02:26:30 +00:00
9fcfb3d73e
2007-10-12 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (process_operands): Simplify implicit xmm0
handling.
2007-10-12 22:26:55 +00:00
e2ec9d29b7
gas/
...
2007-10-12 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (process_operands): Check the firstxmm0
field in opcode_modifier for instruction with a implicit
xmm0 as the first operand.
opcodes/
2007-10-12 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Add FirstXmm0.
* i386-opc.h (FirstXmm0): New.
(IsPrefix): Updated.
(i386_opcode_modifier): Add firstxmm0.
* i386-opc.tbl (blendvpd): Replace RegKludge with FirstXmm0.
(blendvps): Likewise.
(pblendvb): Likewise.
* i386-tbl.h: Regenerated.
2007-10-12 21:40:38 +00:00
7337fc21f2
* config/tc-avr.c (mcu_types): Add new devices: AT90PWM2B, AT90PWM3B.
...
* doc/c-avr.texi: Document new devices.
2007-10-12 16:28:03 +00:00
e9deb29d4f
* elf32-cr16.c (elf32_cr16_relax_section): Fix condition check typo.
...
* config/tc-cr16.c: Update the md_relax_table for 1 word b<cc> instruction range information.
2007-10-12 16:11:02 +00:00
6f932bce80
* config/obj-elf.c (obj_elf_section): When pushing a section, if there is a
...
comma then the following argument must be a subsection number.
* testsuite/gas/elf/elf.exp (run_elf_list_test): Run section6 test.
* testsuite/gas/elf/section6.s: New file: Check behaviour of .pushsection with a subsection argument.
* testsuite/gas/elf/section6.d: New file: Expected disassembly.
2007-10-11 20:20:55 +00:00
ad4b42b49f
PR gas/5161
...
* config/tc-ia64.c: Allow for translations of error and warning messages.
* po/gas.pot: Regenerate.
2007-10-11 15:18:40 +00:00
c85dd50da2
PR gas/5158
...
* config/tc-h8300.c (tc_gen_reloc): Allow for translation of error message.
* po/gas.pot: Regenerate.
2007-10-11 14:17:44 +00:00
79cf59509d
PR gas/5155
...
* config/tc-msp430.c: Fix spelling typos.
2007-10-11 13:48:39 +00:00
741fe28756
gas/:
...
* config/tc-mips.c (AT): Rename to...
(ATREG): ... this.
(AT): New definition.
(mips_set_options): Rename "noat" to "at"; change the type.
(mips_opts): Update accordingly.
(append_insn): Likewise.
(macro_build_ldst_constoffset): Likewise.
(load_address): Likewise.
(macro, macro2): Likewise.
(s_mipsset): Handle ".set at=REG". Update handling of ".set at"
and ".set noat".
gas/testsuite/:
* gas/mips/at-1.d, gas/mips/at-2.l: New tests to check the ".set
at=REG" directive.
* gas/mips/at-1.s, gas/mips/at-2.s: Sources for the new tests.
* gas/mips/mips.exp: Run the new tests.
2007-10-08 16:09:35 +00:00
b1b17bc508
PR 5142: Allow for translation of error messages
2007-10-08 15:35:33 +00:00
bd3ba5d1b3
PR gas/5121 gas/5122 gas/5123 gas/5124 gas/5125 gas/5126 gas/5129 gas/5131 gas/5132 gas/5137 gas/5143
...
* Makefile.am (CFILES): Add cgen.c
(TARGET_CPU_CFILES): Add tc-iq2000.c, tc-maxq.c, tc-mt.c, tc-tic4x.c and xtensa-relax.c.
(TARGET_CPU_HFILES): Add tc-iq2000.h, tc-maxq.h, tc-mt.h, tc-tic4x.h and xtensa-relax.h.
(TARG_ENV_HFILES): Remove te-aux.h, te-delta.h, te-delt88.h, te-ic960.h, te-linux.h.
Add te-aix5.h, te-armeabi.h, te-freebsd.h, te-gnu.h, te-interix.h, te-vxworks.h.
(CONFIG_ATOF_CFILES): New variable.
(POTFILES): Add CONFIG_ATOF_CFILES to dependencies. Fix typo with dependency upon TARG_ENV_HFILES.
(DEPTC): Do not put "#include opcodes/<foo>-desc.h" into cgen-desc.h when foo-desc.h does not exit.
Run make dep-am.
* Makefile.in: Regenerate.
* doc/Makefile.in: Regenerate.
* po/POTFILES.in: Regenerate.
* po/es.po: Regenerate.
* po/fr.po: Regenerate.
* po/gas.pot: Regenerate.
* po/rw.po: Regenerate.
* po/tr.po: Regenerate.
* config/obj-elf.c (obj_elf_vtable_inherit): Allow for translation of error messages.
* config/obj-som.c: Likewise.
* config/tc-arc.c: Likewise.
* config/tc-arm.c: Likewise.
* config/tc-bfin.c: Likewise.
* config/tc-frv.c: Likewise.
2007-10-08 15:26:42 +00:00
485aa104ef
* config/tc-avr.c (mcu_types): Add new devices: AT90PWM216, AT90PWM316.
...
* doc/c-avr.texi: Document new devices.
2007-10-08 10:39:17 +00:00
922f0baccf
* config/tc-avr.c (mcu_types): Add new devices: ATtiny43U, ATtiny48.
...
* doc/c-avr.texi: Document new devices.
2007-10-08 10:33:27 +00:00
ff5075ca5c
PR gas/5134
...
* config/tc-arm.c (md_apply_fix): Likewise.
2007-10-08 10:19:30 +00:00
4e6e072b6c
PR gas/5133
...
* config/tc-arm.c (md_apply_fix): Correct error message
2007-10-08 10:14:31 +00:00
df3e80176e
PR gas/5135
...
(Expr_Node_Gen_Reloc_R): Fix spelling typos in error messages.
2007-10-08 10:09:58 +00:00
33ffbed979
PR gas/5136
...
* config/tc-bfin.c (md_apply_fix): Fix error message.
2007-10-08 10:05:28 +00:00
368d64cc37
2007-10-05 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (build_modrm_byte): Check the first 2 8bit
immediate operands directly for instructions with 4 operands.
2007-10-05 17:50:47 +00:00
955e1e6a77
gas/
...
2007-10-04 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5109
* config/tc-i386.c (process_suffix): Clear QWORD suffix if it
is ignored in Intel mode.
gas/testsuite/
2007-10-04 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5109
* gas/i386/simd-intel.d: Updated.
* gas/i386/simd.d: Likewise.
* gas/i386/x86-64-simd-intel.d: Likewise.
* gas/i386/x86-64-simd.d: Likewise.
* gas/i386/simd.s: Add more tests.
* gas/i386/x86-64-simd.s: Likewise.
2007-10-04 18:29:29 +00:00
38a57ae7a5
* read.c (potable): Add string8, string16, string32 and string64. Add bit size for stringer function.
...
(stringer_append_char): New.
(stringer): Use stringer_append_char().
* config/obj-coff.c (obj_coff_ident): Add bit size for stringer function.
* config/obj-elf.c (obj_elf_ident): Likewise.
* config/tc-alpha.c (s_alpha_stringer): Likewise.
* config/tc-dlx.c (dlx_pseudo_table): Likewise.
* config/tc-hppa.c (pa_stringer): Likewise.
* config/tc-ia64.c (md_pseudo_table, pseudo_opcode): Likewise.
* config/tc-m68hc11.c (md_pseudo_table): Likewise.
* config/tc-mcore.c (md_pseudo_table): Likewise.
* config/tc-mips.c (mips_pseudo_table): Likewise.
* config/tc-spu.c (md_pseudo_table): Likewise.
* config/tc-s390.c (md_pseudo_table): Likewise. Replace '2' by '1'.
* doc/as.texinfo (ABORT): Fix identing.
(String): Document new string8, string16, string32, string64 functions.
* NEWS: Mention the new feature.
* testsuite/gas/all/gas.exp: Include new test "strings".
* testsuite/gas/all/string.s: New
* testsuite/gas/all/string.d: New.
2007-10-04 17:05:37 +00:00
73f4d86e6b
PR gas/5078
...
* config/tc-avr.c (avr_get_constant): Extend error message to mention that the constant must be positive.
2007-10-03 14:35:06 +00:00
6decc66226
PR gas/5089 * config/tc-arm.c (s_arm_unwind_handlerdata): Fix spelling typo.
...
PR gas/5090 (md_assemble): Fix spelling typo.
2007-10-03 13:48:35 +00:00
7fac7ff4ae
Various CR16 fixes
2007-10-01 15:55:44 +00:00
07e8d93c1c
gas/
...
2007-09-30 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5080
* config/tc-i386.c (check_long_reg): Also handle cvttss2si.
(check_qword_reg): Also handle cvttsd2si.
gas/testsuite/
2007-09-30 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5080
* gas/i386/simd-intel.d: Updated.
* gas/i386/simd.d: Likewise.
* gas/i386/x86-64-simd-intel.d: Likewise.
* gas/i386/x86-64-simd.d: Likewise.
* gas/i386/simd.s: Add new tests for cvttsd2si and cvttss2si.
* gas/i386/x86-64-simd.s: Likewise.
2007-09-30 21:27:16 +00:00
d0fa13723f
gas/
...
* config/m68k-parse.h (m68k_register): Use MBO instead of MBB.
(last_movec_reg): Change to MBO.
* config/tc-m68k.c (fido_ctrl): Use MBO instead of MBB.
(m68k_ip): Use MBO instead of MBO.
(init_table): Use MBO instead of MBO. Add an entry for mbo.
gas/testsuite/
* gas/m68k/fido.s: Add tests for %mbo.
* gas/m68k/fido.d: Update accordingly.
opcodes/
* m68k-dis.c (print_insn_arg): Use %mbo instead of %mbb.
2007-09-27 11:14:10 +00:00
9a04903eea
gas/
...
2007-09-26 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (build_modrm_byte): Also check for RegEip
when considering IP-relative addressing.
gas/testsuite/
2007-09-26 Jan Beulich <jbeulich@novell.com>
* gas/i386/reloc64.s: Adjust for %eip-relative addressing no
longer generating errors.
* gas/i386/reloc64.d, gas/i386/reloc64.l: Update.
* gas/i386/x86-64-addr32.s: Remove explicit addr32 prefix
for %eip-realtive addressing case.
opcodes/
2007-09-26 Jan Beulich <jbeulich@novell.com>
* i386-opc.h (RegEip): Define.
(RegEiz): Adjust.
* i386-reg.tbl: Add eip. Mark rip and eip with RegRex64.
* i386-tbl.h: Re-generate.
2007-09-26 13:40:59 +00:00
5a918ce730
gas/
...
2007-09-26 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.h (md_register_arithmetic): Define.
* config/tc-ia64.h (md_register_arithmetic): Likewise.
* doc/internals.texi: Document md_register_arithmetic.
* expr.c (make_expr_symbol): Force O_register expressions into
reg_section.
(expr): Provide default for md_register_arithmetic. Don't resolve
adding/subtracting constants to/from registers if
md_register_arithmetic is zero.
2007-09-26 08:34:24 +00:00
cc941dee48
gas/
...
2007-09-26 Jan Beulich <jbeulich@novell.com>
* config/tc-ia64.c (dot_pred_rel): Replace specialized handling
with simple call to parse_operand.
2007-09-26 06:58:01 +00:00
c15900ec36
gas/
...
2007-09-26 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (NUM_FLAG_CODE): Remove.
2007-09-26 06:55:57 +00:00
4dffcebc10
gas/
...
2007-09-25 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (output_insn): Use i.tm.opcode_length to
check opcode length.
opcodes/
2007-09-25 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (process_i386_opcodes): Process opcode_length.
* i386-opc.h (template): Add opcode_length.
* 386-opc.tbl: Likewise.
* i386-tbl.h: Regenerated.
2007-09-26 04:42:47 +00:00
cac2720567
* config/tc-m68k.c (LONG_BRANCH_VIA_COND): New.
...
(BRANCHBWPL, FRAG_VAR_SIZE): New.
(md_relax_table): Add BRANCHBWPL entries.
(m68k_ip): Choose BRANCHBWPL relaxation if necessary.
(md_assemble): Use FRAG_VAR_SIZE.
(md_convert_frag_1): Add BRANCHBWPL cases.
(md_estimate_size_before_relaz): Likewise.
* gas/m68k/br-isaa.d: Dump relocs too.
* gas/m68k/br-isab.d: Likewise.
* gas/m68k/br-isac.d: Likewise. Adjust for long branch relaxation.
Index: gas/config/tc-m68k.c
2007-09-25 15:31:05 +00:00
49954fb49f
gas/
...
2007-09-24 Carlos O'Donell <carlos@codesourcery.com>
* config/tc-mips.c (s_align): Set max_alignment to 28.
gas/testsuite/
2007-09-24 Carlos O'Donell <carlos@codesourcery.com>
* gas/mips/align.s, gas/mips/align.d: New test.
* gas/mips/mips.exp: Run it.
2007-09-24 22:08:21 +00:00
db51cc60e2
gas/
...
2007-09-20 H.J. Lu <hongjiu.lu@intel.com>
PR 658
* config/tc-i386.c (SCALE1_WHEN_NO_INDEX): Removed.
(set_allow_index_reg): New.
(allow_index_reg): Likewise.
(md_pseudo_table): Add "allow_index_reg" and
"disallow_index_reg".
(build_modrm_byte): Set i.sib.index to NO_INDEX_REGISTER for
fake index registers.
(i386_scale): Updated.
(i386_index_check): Support fake index registers.
(parse_real_register): Return NULL on eiz/riz if fake index
registers aren't allowed.
gas/testsuite/
2007-09-20 H.J. Lu <hongjiu.lu@intel.com>
PR 658
* gas/i386/i386.exp: Run sib-intel, x86-64-sib and
x86-64-sib-intel.
* gas/i386/nops-1-i386-i686.d: Updated.
* gas/i386/nops-1-i386.d: Likewise.
* gas/i386/nops-1.d: Likewise.
* gas/i386/nops-2-i386.d: Likewise.
* gas/i386/nops-2-merom.d: Likewise.
* gas/i386/nops-2.d: Likewise.
* gas/i386/nops-3-i386.d: Likewise.
* gas/i386/nops-3.d : Likewise.
* gas/i386/sib.d: Likewise.
* gas/i386/sib.s: Use %eiz in testcases.
* gas/i386/sib-intel.d: New.
* gas/i386/x86-64-sib-intel.d: Likewise.
* gas/i386/x86-64-sib.d: Likewise.
* gas/i386/x86-64-sib.s: Likewise.
ld/testsuite/
2007-09-20 H.J. Lu <hongjiu.lu@intel.com>
PR 658
* ld-i386/tlsbin.dd: Updated.
* ld-i386/tlsld1.dd: Likewise.
opcodes/
2007-09-20 H.J. Lu <hongjiu.lu@intel.com>
PR 658
* 386-dis.c (index64): New.
(index32): Likewise.
(intel_index64): Likewise.
(intel_index32): Likewise.
(att_index64): Likewise.
(att_index32): Likewise.
(print_insn): Set index64 and index32.
(OP_E_extended): Use index64/index32 for index register for
SIB with INDEX == 4.
* i386-opc.h (RegEiz): New.
(RegRiz): Likewise.
* i386-reg.tbl: Add eiz and riz.
* i386-tbl.h: Regenerated.
2007-09-20 17:38:38 +00:00
550c188837
* config/tc-h8300.c (md_apply_fix): Do not abort or handle 8 byte fixups.
2007-09-19 15:25:13 +00:00
d908d8f43b
* config/bfin-parse.y (asm_1): Slightly improve error messages
...
for "reg += const;".
2007-09-18 11:59:00 +00:00
20e192ab8d
gas/
...
2007-09-17 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (baseindex): Removed.
(build_modrm_byte): Check reg_num for RIP register instead of
reg_type.
(i386_index_check): Likewise.
opcodes/
2007-09-17 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.h (RegRip): New.
* i386-reg.tbl (rip): Use RegRip for reg_num.
* i386-tbl.h: Regenerated.
2007-09-18 00:56:54 +00:00
1a36c6a702
2007-09-17 H.J. Lu <hongjiu.lu@intel.com>
...
PR gas/5035
* config/obj-coff.c (obj_coff_endef): Remove checking size of
def_symbol_in_progress.
2007-09-17 17:15:30 +00:00
916af0488c
gas/
...
2007-09-17 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (intel_e04): Revert the last change.
gas/testsuite/
2007-09-17 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/x86-64-rip.s: Revert the last change.
* gas/i386/x86-64-rip-intel.d: Likewise.
* gas/i386/x86-64-rip.d: Likewise.
2007-09-17 14:46:12 +00:00
27ac72083b
gas/
...
2007-09-15 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5034
* config/tc-i386.c (intel_e04): Return 1 if cur_token.code is
T_NIL.
gas/testsuite/
2007-09-15 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5034
* gas/i386/x86-64-rip.s: Add Intel mode testcases.
* gas/i386/x86-64-rip-intel.d: Updated.
* gas/i386/x86-64-rip.d: Likewise.
2007-09-15 22:06:42 +00:00
8ed77a05dc
2007-09-14 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (build_modrm_byte): Adjust comment line
wrap.
2007-09-15 01:57:57 +00:00
b5016f899b
2007-09-14 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (build_modrm_byte): Use (A || B) instead
of (A || B) != 0.
2007-09-14 20:05:28 +00:00
c0209578ea
2007-09-14 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (build_modrm_byte): Adjust indentation.
2007-09-14 19:57:47 +00:00
85f10a010c
Add AMD SSE5 support
2007-09-14 18:21:09 +00:00
ec56d5c0f6
gas/
...
2007-09-12 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (md_assemble): Move handling of extrq/insertq
after generic operand swapping, and swap only the immediate operands.
gas/testsuite/
2007-09-12 Jan Beulich <jbeulich@novell.com>
* gas/i386/amdfam10.s, gas/i386/x86-64-amdfam10.s: Add Intel syntax
code.
* gas/i386/amdfam10.d, gas/i386/x86-64-amdfam10.d: Adjust.
2007-09-12 07:31:47 +00:00
8d100c328c
bfd/
...
* archures.c: Add bfd_mach_mcf_isa_c_nodiv,
bfd_mach_mcf_isa_c_nodiv_mac & bfd_mach_mcf_isa_c_nodiv_emac.
* ieee.c (ieee_write_processor): Update coldfire architecture
list.
* bfd-in2.h: Rebuilt.
* cpu-m68k.c (arch_info_struct): Add isa_c nodiv architectures.
(m68k_arch_features): Likewise.
* elf32-m68k.c (elf32_m68k_object_p): Add EF_M68K_CF_ISA_C_NODIV.
(elf32_m68k_print_private_bfd_data): Likewise.
gas/
* config/tc-m68k.c (m68k_ip): Add mcfisa_c case.
(m68k_elf_final_processing): Add EF_M68K_CF_ISA_C_NODIV.
include/elf/
* m68k.h (EF_M68K_CF_ISA_C_NODIV): New.
2007-09-11 16:07:50 +00:00
cf557b5176
2007-09-09 H.J. Lu <hongjiu.lu@intel.com>
...
* tc-i386.c (output_insn): Only check SSE4.2 and ABM for 3
byte opcode.
2007-09-09 16:38:39 +00:00
c6fb90c8cd
2007-09-08 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (cpu_flags_check_x64): Renamed to ...
(cpu_flags_check_cpu64): This. Inline.
(uints_all_zero): New.
(uints_set): Likewise
(uints_equal): Likewise
(UINTS_ALL_ZERO): Likewise
(UINTS_SET): Likewise
(UINTS_CLEAR): Likewise
(UINTS_EQUAL): Likewise
(cpu_flags_and): Likewise.
(cpu_flags_or): Likewise.
(operand_type_and): Likewise.
(operand_type_or): Likewise.
(operand_type_xor): Likewise.
(cpu_flags_not): Inline and use switch instead of loop.
(cpu_flags_match): Updated.
(operand_type_match): Likewise.
(smallest_imm_type): Likewise.
(set_cpu_arch): Likewise.
(pt): Likewise.
(md_assemble): Likewise.
(parse_insn): Likewise.
(optimize_imm): Likewise.
(match_template): Likewise.
(process_suffix): Likewise.
(update_imm): Likewise.
(finalize_imm): Likewise.
(process_operands): Likewise.
(build_modrm_byte): Likewise.
(i386_immediate): Likewise.
(i386_displacement): Likewise.
(i386_index_check): Likewise.
(i386_operand): Likewise.
(i386_target_format): Likewise.
(intel_e11): Likewise.
(operand_type): Remove implicitregister.
(operand_type_check): Updated. Inline.
(cpu_flags_all_zero): Removed.
(operand_type_all_zero): Likewise.
(i386_array_biop): Likewise.
(cpu_flags_biop): Likewise.
(operand_type_biop): Likewise.
2007-09-09 02:49:25 +00:00
40fb982012
gas/
...
2007-09-08 H.J. Lu <hongjiu.lu@intel.com>
* configure.in (AC_CHECK_HEADERS): Add limits.h.
* configure: Regenerated.
* config.in: Likewise.
* config/tc-i386.c: Include "opcodes/i386-init.h".
(_i386_insn): Use i386_operand_type for types.
(cpu_arch_flags): Updated to new types with bitfield.
(cpu_arch_tune_flags): Likewise.
(cpu_arch_isa_flags): Likewise.
(cpu_arch): Likewise.
(i386_align_code): Likewise.
(set_code_flag): Likewise.
(set_16bit_gcc_code_flag): Likewise.
(set_cpu_arch): Likewise.
(md_assemble): Likewise.
(parse_insn): Likewise.
(process_operands): Likewise.
(output_branch): Likewise.
(output_jump): Likewise.
(parse_real_register): Likewise.
(mode_from_disp_size): Likewise.
(smallest_imm_type): Likewise.
(pi): Likewise.
(type_names): Likewise.
(pt): Likewise.
(pte): Likewise.
(swap_2_operands): Likewise.
(optimize_imm): Likewise.
(optimize_disp): Likewise.
(match_template): Likewise.
(check_string): Likewise.
(process_suffix): Likewise.
(check_byte_reg): Likewise.
(check_long_reg): Likewise.
(check_qword_reg): Likewise.
(check_word_reg): Likewise.
(finalize_imm): Likewise.
(build_modrm_byte): Likewise.
(output_insn): Likewise.
(disp_size): Likewise.
(imm_size): Likewise.
(output_disp): Likewise.
(output_imm): Likewise.
(gotrel): Likewise.
(i386_immediate): Likewise.
(i386_displacement): Likewise.
(i386_index_check): Likewise.
(i386_operand): Likewise.
(parse_real_register): Likewise.
(i386_intel_operand): Likewise.
(intel_e09): Likewise.
(intel_bracket_expr): Likewise.
(intel_e11): Likewise.
(cpu_arch_flags_not): New.
(cpu_flags_check_x64): Likewise.
(cpu_flags_all_zero): Likewise.
(cpu_flags_not): Likewise.
(i386_cpu_flags_biop): Likewise.
(cpu_flags_biop): Likewise.
(cpu_flags_match); Likewise.
(acc32): New.
(acc64): Likewise.
(control): Likewise.
(reg16_inoutportreg): Likewise.
(disp16): Likewise.
(disp32): Likewise.
(disp32s): Likewise.
(disp16_32): Likewise.
(anydisp): Likewise.
(baseindex): Likewise.
(regxmm): Likewise.
(imm8): Likewise.
(imm8s): Likewise.
(imm16): Likewise.
(imm32): Likewise.
(imm32s): Likewise.
(imm64): Likewise.
(imm16_32): Likewise.
(imm16_32s): Likewise.
(imm16_32_32s): Likewise.
(operand_type): Likewise.
(operand_type_check): Likewise.
(operand_type_match): Likewise.
(operand_type_register_match): Likewise.
(update_imm): Likewise.
(set_code_flag): Also update cpu_arch_flags_not.
(set_16bit_gcc_code_flag): Likewise.
(md_begin): Likewise.
(parse_insn): Use cpu_flags_check_x64 to check 64bit support.
Use cpu_flags_match to match instructions.
(i386_target_format): Update cpu_arch_isa_flags and
cpu_arch_tune_flags to i386_cpu_flags type with bitfield.
(smallest_imm_type): Check cpu_arch_tune to tune for i486.
(match_template): Don't initialize overlap0, overlap1,
overlap2, overlap3 and operand_types.
(process_suffix): Handle crc32 with 64bit register.
(MATCH): Removed.
(CONSISTENT_REGISTER_MATCH): Likewise.
* config/tc-i386.h (arch_entry): Updated to i386_cpu_flags
type.
opcodes/
2007-09-08 H.J. Lu <hongjiu.lu@intel.com>
* configure.in (AC_CHECK_HEADERS): Add limits.h.
* configure: Regenerated.
* config.in: Likewise.
* i386-gen.c: Include "sysdep.h" instead of <stdlib.h> and
<string.h>. Use xstrerror instead of strerror.
(initializer): New.
(cpu_flag_init): Likewise.
(bitfield): Likewise.
(BITFIELD): New.
(cpu_flags): Likewise.
(opcode_modifiers): Likewise.
(operand_types): Likewise.
(compare): Likewise.
(set_cpu_flags): Likewise.
(output_cpu_flags): Likewise.
(process_i386_cpu_flags): Likewise.
(output_opcode_modifier): Likewise.
(process_i386_opcode_modifier): Likewise.
(output_operand_type): Likewise.
(process_i386_operand_type): Likewise.
(set_bitfield): Likewise.
(operand_type_init): Likewise.
(process_i386_initializers): Likewise.
(process_i386_opcodes): Call process_i386_opcode_modifier to
process opcode_modifier. Call process_i386_operand_type to
process operand_types.
(process_i386_registers): Call process_i386_operand_type to
process reg_type.
(main): Check unused bits in i386_cpu_flags and i386_operand_type.
Sort cpu_flags, opcode_modifiers and operand_types. Call
process_i386_initializers.
* i386-init.h: New.
* i386-tbl.h: Regenerated.
* i386-opc.h: Include <limits.h>.
(CHAR_BIT): Define as 8 if not defined.
(Cpu186): Changed to position of bitfiled.
(Cpu286): Likewise.
(Cpu386): Likewise.
(Cpu486): Likewise.
(Cpu586): Likewise.
(Cpu686): Likewise.
(CpuP4): Likewise.
(CpuK6): Likewise.
(CpuK8): Likewise.
(CpuMMX): Likewise.
(CpuMMX2): Likewise.
(CpuSSE): Likewise.
(CpuSSE2): Likewise.
(Cpu3dnow): Likewise.
(Cpu3dnowA): Likewise.
(CpuSSE3): Likewise.
(CpuPadLock): Likewise.
(CpuSVME): Likewise.
(CpuVMX): Likewise.
(CpuSSSE3): Likewise.
(CpuSSE4a): Likewise.
(CpuABM): Likewise.
(CpuSSE4_1): Likewise.
(CpuSSE4_2): Likewise.
(Cpu64): Likewise.
(CpuNo64): Likewise.
(D): Likewise.
(W): Likewise.
(Modrm): Likewise.
(ShortForm): Likewise.
(Jump): Likewise.
(JumpDword): Likewise.
(JumpByte): Likewise.
(JumpInterSegment): Likewise.
(FloatMF): Likewise.
(FloatR): Likewise.
(FloatD): Likewise.
(Size16): Likewise.
(Size32): Likewise.
(Size64): Likewise.
(IgnoreSize): Likewise.
(DefaultSize): Likewise.
(No_bSuf): Likewise.
(No_wSuf): Likewise.
(No_lSuf): Likewise.
(No_sSuf): Likewise.
(No_qSuf): Likewise.
(No_xSuf): Likewise.
(FWait): Likewise.
(IsString): Likewise.
(RegKludge): Likewise.
(IsPrefix): Likewise.
(ImmExt): Likewise.
(NoRex64): Likewise.
(Rex64): Likewise.
(Ugh): Likewise.
(Reg8): Likewise.
(Reg16): Likewise.
(Reg32): Likewise.
(Reg64): Likewise.
(FloatReg): Likewise.
(RegMMX): Likewise.
(RegXMM): Likewise.
(Imm8): Likewise.
(Imm8S): Likewise.
(Imm16): Likewise.
(Imm32): Likewise.
(Imm32S): Likewise.
(Imm64): Likewise.
(Imm1): Likewise.
(BaseIndex): Likewise.
(Disp8): Likewise.
(Disp16): Likewise.
(Disp32): Likewise.
(Disp32S): Likewise.
(Disp64): Likewise.
(InOutPortReg): Likewise.
(ShiftCount): Likewise.
(Control): Likewise.
(Debug): Likewise.
(Test): Likewise.
(SReg2): Likewise.
(SReg3): Likewise.
(Acc): Likewise.
(FloatAcc): Likewise.
(JumpAbsolute): Likewise.
(EsSeg): Likewise.
(RegMem): Likewise.
(OTMax): Likewise.
(Reg): Commented out.
(WordReg): Likewise.
(ImplicitRegister): Likewise.
(Imm): Likewise.
(EncImm): Likewise.
(Disp): Likewise.
(AnyMem): Likewise.
(LLongMem): Likewise.
(LongMem): Likewise.
(ShortMem): Likewise.
(WordMem): Likewise.
(ByteMem): Likewise.
(CpuMax): New
(CpuLM): Likewise.
(CpuNumOfUints): Likewise.
(CpuNumOfBits): Likewise.
(CpuUnused): Likewise.
(OTNumOfUints): Likewise.
(OTNumOfBits): Likewise.
(OTUnused): Likewise.
(i386_cpu_flags): New type.
(i386_operand_type): Likewise.
(i386_opcode_modifier): Likewise.
(CpuSledgehammer): Removed.
(CpuSSE4): Likewise.
(CpuUnknownFlags): Likewise.
(Reg): Likewise.
(WordReg): Likewise.
(ImplicitRegister): Likewise.
(Imm): Likewise.
(EncImm): Likewise.
(Disp): Likewise.
(AnyMem): Likewise.
(LLongMem): Likewise.
(LongMem): Likewise.
(ShortMem): Likewise.
(WordMem): Likewise.
(ByteMem): Likewise.
(template): Use i386_cpu_flags for cpu_flags, use
i386_opcode_modifier for opcode_modifier, use
i386_operand_type for operand_types.
(reg_entry): Use i386_operand_type for reg_type.
* Makefile.am (HFILES): Add i386-init.h.
($(srcdir)/i386-init.h): New rule.
($(srcdir)/i386-tbl.h): Depend on $(srcdir)/i386-init.h
instead.
* Makefile.in: Regenerated.
2007-09-09 01:22:57 +00:00
26186d7440
gas/
...
2007-09-06 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (match_template): Handle invlpga, vmload,
vmrun and vmsave in SVME.
(process_suffix): Likewise.
gas/testsuite/
2007-09-06 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/svme.s: Updated to allow eax in 64bit.
* gas/i386/svme.d: Updated.
* gas/i386/svme64.d: Likewise.
opcodes/
2007-09-06 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.tbl: Correct SVME instructions to allow 32bit register
operand in 64bit mode.
* i386-tbl.h: Regenerated.
2007-09-06 12:28:12 +00:00
d946b91f67
2007-09-05 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (i386_index_check): Don't use RegRex
on the reg_type field.
(parse_real_register): Use `||' instead of `|'.
2007-09-05 13:36:14 +00:00
75178d9df6
2007-09-04 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (process_operands): Remove segment override
check on SVME instructions.
(i386_index_check): Remove memory operand check on SVME
instructions.
2007-09-04 14:44:35 +00:00
7bc3e93c1b
* config/tc-spu.c (struct spu_insn): Delete "flag". Add "reloc".
...
(md_assemble): Update init of insn. Use insn.reloc instead of
calculating from flag.
(get_imm): Set reloc rather than flag.
(calcop): Formatting.
2007-09-04 04:10:21 +00:00
d9a5e5e5c9
gas/
...
2007-08-28 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (process_suffix): Handle cmpxchg8b in
Intel mode.
gas/testsuite/
2007-08-28 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/mem.s: New. Add tests for instructions with one
memory operand.
* gas/i386/x86-64-mem.s: Likewise.
* gas/i386/mem-intel.d: Updated.
* gas/i386/mem.d: Likewise.
* gas/i386/x86-64-mem-intel.d: Likewise.
* gas/i386/x86-64-mem.d: Likewise.
opcodes/
2007-08-28 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (Md): New.
(grps): Use 0 on invlpg. Use M on fxsave and fxrstor. Use
Md on ldmxcsr and stmxcsr. Use b_mode on clflush.
(OP_0fae): Clear bytemode for sfence.
2007-08-28 17:36:34 +00:00
def8fc92cd
* config/tc-m68k.c (mcf52235_ctrl): Add cache registers.
...
(mcf5253_ctrl): Add RAMBAR, MBAR, MBAR2.
(mcf5407_ctrl): New.
(m68k_cpus): Adjust 5407 entry.
2007-08-28 13:43:06 +00:00
f75192f2d0
* config/tc-m68k.c (mcf51qe_ctrl): Define 51QE control registers.
...
(m68k_cpus): Define 51QE cpu.
2007-08-28 13:36:35 +00:00
495bde8ec4
2007-08-24 Aurelien Jarno <aurel32@debian.org>
...
* config/tc-arm.c (md_apply_fix): Cast bfd_vma values to long
before printing them.
2007-08-24 16:59:16 +00:00
67c11a9b99
* config/tc-i386.c (lex_got): Don't scan past a comma.
2007-08-24 04:18:37 +00:00
c3d65c1ced
binutils/
...
* doc/binutils.texi (objdump): Document -Mppcps.
gas/
* config/tc-ppc.c (parse_cpu): Handle "750cl".
(pre_defined_registers): Add "gqr0" to "gqr7", "gqr.0" to "gqr.7".
(md_show_usage): Document -m750cl.
(md_assemble): Handle two delimiters in succession (eg. `),').
* doc/c-ppc.texi (PowerPC-Opts): Document -m750cl.
* testsuite/gas/ppc/ppc.exp: Run ppc70ps dump tests.
* testsuite/gas/ppc/ppc750ps.s: New file.
* testsuite/gas/ppc/ppc750ps.d: Likewise.
include/opcode/
* ppc.h (PPC_OPCODE_PPCPS): New.
opcodes/
* ppc-opc.c (PSW, PSWM, PSQ, PSQM, PSD, MTMSRD_L): New.
(XOPS, XOPS_MASK, XW, XW_MASK): Likewise.
(PPCPS): Likewise.
(powerpc_opcodes): Add all pair singles instructions.
* ppc-dis.c (powerpc_dialect): Handle "ppcps".
(print_ppc_disassembler_options): Document -Mppcps.
2007-08-24 00:56:30 +00:00
3992d3b7e2
PR gas/4079
...
* config/tc-i386.c (x86_cons): Complain about invalid @got etc.
expressions.
(i386_immediate): Detect and complain about more cases of
invalid immediate expressions. Return failure rather than
converting them to zero.
(i386_displacement): Likewise.
2007-08-17 14:12:43 +00:00
cf73852866
* config/tc-ia64.c (tc_gen_reloc): Return NULL if relocation is
...
unrepresentable.
2007-08-14 10:44:12 +00:00
4396b6862a
2007-08-09 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (relaxed_symbol_addr): Compensate for alignment.
gas/testsuite/
* gas/arm/relax_load_align.d: new test.
* gas/arm/relax_load_align.s: new test.
2007-08-09 15:11:07 +00:00
c3ad16c0cd
gas/
...
2007-08-09 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (check_byte_reg): Support pextrb and pinsrb.
gas/testsuite/
2007-08-09 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run sse4_1-intel, sse4_2-intel,
x86-64-sse4_1-intel and x86-64-sse4_2-intel.
* gas/i386/sse4_1-intel.d: New file.
* gas/i386/sse4_2-intel.d: Likewise.
* gas/i386/x86-64-sse4_1-intel.d: Likewise.
* gas/i386/x86-64-sse4_2-intel.d: Likewise.
* gas/i386/sse4_1.s: Add tests for Intel syntax.
* gas/i386/sse4_2.s: Likewise.
* gas/i386/x86-64-sse4_1.s: Likewise.
* gas/i386/x86-64-sse4_2.s: Likewise.
* gas/i386/sse4_1.d: Updated.
* gas/i386/sse4_2.d: Likewise.
* gas/i386/x86-64-sse4_1.d: Likewise.
* gas/i386/x86-64-sse4_2.d: Likewise.
opcodes/
2007-08-09 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.tbl: Add NoRex64 to pmovsxbw, pmovsxwd, pmovsxdq,
pmovzxbw, pmovzxwd, pmovzxdq and roundsd.
* i386-tbl.h: Regenerated.
2007-08-09 13:50:51 +00:00
34828aad95
gas/
...
2007-07-29 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (check_long_reg): Allow cvtss2si to convert
DWORD memory to Reg64 in Intel synax.
(check_qword_reg): Allow cvtsd2si to convert QWORD memory to
Reg32 in Intel syntax.
gas/testsuite/
2007-07-29 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/simd.s: Add tests for cvtss2si/cvtsd2si in Intel
mode.
* gas/i386/x86-64-simd.s: Likewise.
* gas/i386/simd-intel.d: Updated.
* gas/i386/simd.d: Likewise.
* gas/i386/x86-64-simd-intel.d: Likewise.
* gas/i386/x86-64-simd.d: Likewise.
2007-07-29 18:27:59 +00:00
d12f9798ef
* config/tc-xtensa.c (xtensa_extui_opcode): New.
...
(xg_expand_assembly_insn): Check for invalid extui operands.
(md_begin): Initialize xtensa_extui_opcode.
2007-07-25 17:33:27 +00:00
9ce0cf5607
* config/tc-mep.h (skip_whitespace): Remove definition.
2007-07-24 12:38:35 +00:00
76bc74dc40
gas/
...
2007-07-23 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (cpu_arch): Change i386 to PROCESSOR_I386.
(f32_15): Removed.
(jump_31): New.
(f32_patt): Remove f32_15.
(f16_patt): Likewise.
(i386_align_code): Updated to alt_long_patt for 64bit by
default.
* config/tc-i386.h (processor_type): Add PROCESSOR_I386.
2007-07-23 Evandro Menezes <evandro.menezes@amd.com>
* config/tc-i386.c (i386_align_code): Enable alignment up to
MAX_MEM_FOR_RS_ALIGN_CODE bytes. Remove special treatment
for K8.
* config/tc-i386.h (MAX_MEM_FOR_RS_ALIGN_CODE): Changed to
31.
gas/testsuite/
2007-07-23 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run nops16-1, nops-1-i386-i686, nops-1-k8,
nops-3-i386, nops-4, nops-4-i386, x86-64-nops-2, x86-64-nops-3,
x86-64-nops-4, x86-64-nops-4-core2 and x86-64-nops-4-k8.
* gas/i386/nops-1-i386-i686.d: New.
* gas/i386/nops-1-k8.d: Likewise.
* gas/i386/nops-3-i386.d : Likewise.
* gas/i386/nops-3-i686.d: Likewise.
* gas/i386/nops-4-i386.d: Likewise.
* gas/i386/nops-4.d: Likewise.
* gas/i386/nops16-1.d: Likewise.
* gas/i386/nops16-1.s: Likewise.
* gas/i386/x86-64-nops-1-k8.d: Likewise.
* gas/i386/x86-64-nops-2.d: Likewise.
* gas/i386/x86-64-nops-3.d: Likewise.
* gas/i386/x86-64-nops-4-core2.d: Likewise.
* gas/i386/x86-64-nops-4-k8.d: Likewise.
* gas/i386/x86-64-nops-4.d: Likewise.
* gas/i386/nops-1-i386.d: Updated.
* gas/i386/nops-1-i686.d: Likewise.
* gas/i386/nops-1.d: Likewise.
* gas/i386/nops-2-i386.d: Likewise.
* gas/i386/nops-2-merom.d : Likewise.
* gas/i386/nops-2.d: Likewise.
* gas/i386/nops-3.d: Likewise.
* gas/i386/x86-64-nops-1-merom.d: Likewise.
* gas/i386/x86-64-nops-1-nocona.d: Likewise.
* gas/i386/x86-64-nops-1.d: Likewise.
* gas/i386/x86-64-nops-1.s: Removed.
2007-07-23 Evandro Menezes <evandro.menezes@amd.com>
H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Don't run x86-64-nops-1-k8. Run
nops-3-i686 and nops-4-i686.
* gas/i386/nops-3-i686.d: New.
* gas/i386/nops-4-i686.d: Likewise.
* gas/i386/nops-4.s: Likewise.
* gas/i386/x86-64-nops-1-k8.d: Removed.
2007-07-23 20:03:23 +00:00
d929913e77
* config/tc-arm.c (create_register_alias): Return a boolean rather than an integer.
...
Check the return value of insert_reg_alias and do not continue to create aliases once an insertion has failed.
(s_unreq): Delete the all-upper-case and all-lower-case alternatives as well.
* testsuite/gas/arm/arm.s: Add tests for re-aliasing a previously removed alias.
* testsuite/gas/arm/arm.l: Add new expected warning message.
2007-07-14 16:19:18 +00:00
369943fe52
* config/tc-mips.c (mips_dwarf2_format, mips_dwarf2_addr_size): Use
...
HAVE_64BIT_SYMBOLS.
2007-07-11 15:11:15 +00:00
0fdf195198
gas/
...
* config/tc-mips.c (mips_cpu_info_table): Add new entries for
{24k,24ke,34k,74k}f{2_1,1_1,x}. Also add an entry for 74kf3_2.
Deprecate *x and *fx.
* doc/c-mips.texi: Document the new CPU arguments. Deprecate
*x and *fx.
2007-07-04 19:55:18 +00:00
872ce6ff99
gas/
...
2007-07-04 H.J. Lu <hongjiu.lu@intel.com>
* config/obj-coff.h (x86_64_target_format): Renamed to ...
(i386_target_format): This
(TARGET_FORMAT): Use i386_target_format.
* config/tc-i386.c (x86_64_target_format): Removed.
(i386_target_format): Handle PE formats.
gas/testsuite/
2007-07-04 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run x86-64-nops-1 for x86_64-*-mingw*.
2007-07-04 15:32:46 +00:00
ec2655a6a7
Switch to GPLv3
2007-07-03 11:01:12 +00:00
afa2158f09
gas/testsuite/
...
* gas/m68k/mcf-coproc.d: New.
* gas/m68k/mcf-coproc.s: New.
* gas/m68k/all.exp: Add it.
gas/
* config/tc-m68k.c (m68k_ip): Add j & K operand types.
(install_operand): Add E encoding.
(md_begin): Check and skip initial '.' arg character.
(get_num): Add 0..511 case.
include/
* opcode/m68k.h: Document j K & E.
opcodes/
* m68k-dis.c (fetch_arg): Add E. Replace length switch with
direct masking.
(print_ins_arg): Add j & K operand types.
(match_insn_m68k): Check and skip initial '.' arg character.
(m68k_scan_mask): Likewise.
* m68k-opc.c (m68k_opcodes): Add coprocessor instructions.
2007-07-03 07:54:19 +00:00
ae4a729bff
PR 4713
...
* config/obj-elf.c (elf_ecoff_set_ext): Make static when OBJ_MAYBE_ELF.
* config/obj-elf.h (obj_ecoff_set_ext): Comment.
2007-07-03 03:29:40 +00:00
741d6ea85b
bfd:
...
* elfxx-mips.c (mips_elf_calculate_relocation): Handle
R_MIPS_TLS_DTPREL32 and R_MIPS_TLS_DTPREL64.
* elf64-mips.c (mips_elf64_howto_table_rela): Support
R_MIPS_TLS_DTPREL64.
gas:
* config/tc-mips.c (s_dtprelword, s_dtpreldword,
s_dtprel_internal): New.
(mips_pseudo_table): Add .dtprelword and .dtpreldword.
(md_apply_fix): Handle BFD_RELOC_MIPS_TLS_DTPREL32 and
BFD_RELOC_MIPS_TLS_DTPREL64.
2007-07-02 10:49:42 +00:00
8d452c7870
* config/tc-ppc.c (ppc_pe_section): Comment out code assigning
...
coff section flag values to bfd section flag.
2007-07-02 02:11:56 +00:00
104d59d19c
bfd:
...
* elf-attrs.c: New.
* Makefile.am (BFD32_BACKENDS): Add elf-attrs.lo.
(BFD32_BACKENDS_CFILES): Add elf-attrs.c.
(elf-attrs.lo): Generate dependencies.
* Makefile.in: Regenerate.
* configure.in (elf): Add elf-attrs.lo.
* configure: Regenerate.
* elf-bfd.h (struct elf_backend_data): Add entries for object
attributes.
(NUM_KNOWN_OBJ_ATTRIBUTES, obj_attribute, obj_attribute_list,
OBJ_ATTR_PROC, OBJ_ATTR_GNU, OBJ_ATTR_FIRST, OBJ_ATTR_LAST,
Tag_NULL, Tag_File, Tag_Section, Tag_Symbol, Tag_compatibility):
New.
(struct elf_obj_tdata): Add entries for object attributes.
(elf_known_obj_attributes, elf_other_obj_attributes,
elf_known_obj_attributes_proc, elf_other_obj_attributes_proc):
New.
(bfd_elf_obj_attr_size, bfd_elf_set_obj_attr_contents,
bfd_elf_get_obj_attr_int, bfd_elf_add_obj_attr_int,
bfd_elf_add_proc_attr_int, bfd_elf_add_obj_attr_string,
bfd_elf_add_proc_attr_string, bfd_elf_add_obj_attr_compat,
bfd_elf_add_proc_attr_compat, _bfd_elf_attr_strdup,
_bfd_elf_copy_obj_attributes, _bfd_elf_obj_attrs_arg_type,
_bfd_elf_parse_attributes, _bfd_elf_merge_object_attributes): New.
* elf.c (_bfd_elf_copy_private_bfd_data): Copy object attributes.
(bfd_section_from_shdr): Handle attributes sections.
* elflink.c (bfd_elf_final_link): Handle attributes sections.
* elfxx-target.h (elf_backend_obj_attrs_vendor,
elf_backend_obj_attrs_section, elf_backend_obj_attrs_arg_type,
elf_backend_obj_attrs_section_type): New.
(elfNN_bed): Update.
* elf32-arm.c (NUM_KNOWN_ATTRIBUTES, aeabi_attribute,
aeabi_attribute_list): Remove.
(struct elf32_arm_obj_tdata): Remove object attributes fields.
(check_use_blx, bfd_elf32_arm_set_vfp11_fix, using_thumb2,
elf32_arm_copy_private_bfd_data, elf32_arm_merge_eabi_attributes):
Update for new object attributes interfaces.
(uleb128_size, is_default_attr, eabi_attr_size,
elf32_arm_eabi_attr_size, write_uleb128, write_eabi_attribute,
elf32_arm_set_eabi_attr_contents, elf32_arm_bfd_final_link,
elf32_arm_new_eabi_attr, elf32_arm_get_eabi_attr_int,
elf32_arm_add_eabi_attr_int, attr_strdup,
elf32_arm_add_eabi_attr_string, elf32_arm_add_eabi_attr_compat,
copy_eabi_attributes, elf32_arm_parse_attributes): Remove. Moved
to generic code in elf-attrs.c.
(elf32_arm_obj_attrs_arg_type): New.
(elf32_arm_fake_sections): Do not handle .ARM.attributes.
(elf32_arm_section_from_shdr): Do not handle SHT_ARM_ATTRIBUTES.
(bfd_elf32_bfd_final_link): Remove.
(elf_backend_obj_attrs_vendor, elf_backend_obj_attrs_section,
elf_backend_obj_attrs_arg_type,
elf_backend_obj_attrs_section_type): New.
* elf32-bfin.c (bfin_elf_copy_private_bfd_data): Copy object
attributes.
* elf32-frv.c (frv_elf_copy_private_bfd_data): Likewise.
* elf32-iq2000.c (iq2000_elf_copy_private_bfd_data): Likewise.
* elf32-mep.c (mep_elf_copy_private_bfd_data): Likewise.
* elf32-mt.c (mt_elf_copy_private_bfd_data): Likewise.
* elf32-sh.c (sh_elf_copy_private_data): Likewise.
* elf64-sh64.c (sh_elf64_copy_private_data_internal): Likewise.
binutils:
* readelf.c (display_gnu_attribute): New.
(process_arm_specific): Rearrange as process_attributes.
(process_arm_specific): Replace by wrapper of process_attributes.
gas:
* as.c (create_obj_attrs_section): New.
(main): Call create_obj_attrs_section for ELF.
* read.c (s_gnu_attribute, skip_whitespace, skip_past_char,
skip_past_comma, s_vendor_attribute): New.
(potable): Add gnu_attribute for ELF.
* read.h (s_vendor_attribute): Declare.
* config/tc-arm.c (s_arm_eabi_attribute): Replace by wrapper
round s_vendor_attribute.
(aeabi_set_public_attributes): Update for new attributes
interfaces.
(arm_md_end): Remove attributes contents setting now done
generically.
include/elf:
* arm.h (elf32_arm_add_eabi_attr_int,
elf32_arm_add_eabi_attr_string, elf32_arm_add_eabi_attr_compat,
elf32_arm_get_eabi_attr_int, elf32_arm_set_eabi_attr_contents,
elf32_arm_eabi_attr_size, Tag_NULL, Tag_File, Tag_Section,
Tag_Symbol, Tag_compatibility): Remove.
* common.h (SHT_GNU_ATTRIBUTES): Define.
ld:
* emulparams/armelf.sh (OTHER_SECTIONS): Remove .ARM.attributes.
(ATTRS_SECTIONS): Define.
* scripttempl/elf.sc, scripttempl/elf32sh-symbian.sc,
scripttempl/elf_chaos.sc, scripttempl/elfi370.sc,
scripttempl/elfxtensa.sc: Handle ATTRS_SECTIONS.
2007-06-29 16:29:17 +00:00
3d3d428f04
New port: National Semiconductor's CR16
2007-06-29 14:09:34 +00:00
cd2cf30b7d
2007-06-26 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (parse_operands): Accept generic coprocessor regs
for OP_RVC.
(reg_names): Add fpinst, pfinst2, mvfr0 and mvfr1.
gas/testsuite/
* gas/arm/vfp1xD.d: Add new fmrx/fmxr tests.
* gas/arm/vfp1xD.s: Ditto.
* gas/arm/vfp1xD_t2.d: Ditto.
* gas/arm/vfp1xD_t2.s: Ditto.
opcodes/
* arm-dis.c (coprocessor_opcodes): Add fmxr/fmrx mvfr0/mvfr1.
2007-06-26 21:36:37 +00:00
5f15756d11
gas/
...
2007-06-25 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (process_operands): Replace regKludge
with RegKludge.
opcodes/
2007-06-25 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.h (regKludge): Renamed to ...
(RegKludge): This.
* i386-opc.c (i386_optab): Replace regKludge with RegKludge.
2007-06-25 21:20:20 +00:00
b314ec0eae
bfd/
...
* elfxx-mips.c (mips_elf_calculate_relocation): Allow local stubs
to be used for calls from MIPS16 code.
gas/
* config/tc-mips.h (TC_SYMFIELD_TYPE): New.
* config/tc-mips.c (append_insn): Record which symbols have
R_MIPS16_26 relocations against them.
(mips_fix_adjustable): Don't reduce relocations against such symbols.
ld/testsuite/
* ld-mips-elf/mips16-local-stubs-1.s,
* ld-mips-elf/mips16-local-stubs-1.d: New tests.
* ld-mips-elf/mips-elf.exp: Run them.
2007-06-25 10:13:57 +00:00
DJ Delorie
Alan Modra
Peter Bergner
Jie Zhang
Nick Clifton
Richard Sandiford
Nathan Sidwell
Adam Nemet
Carlos O'Donell
Eric B. Weddington
Hans-Peter Nilsson
H.J. Lu
Paul Brook
Catherine Moore
Chao-ying Fu
Bob Wilson
David S. Miller
Mike Frysinger
Andrew Stubbs
Kaz Kojima
Bernd Schmidt
Andreas Krebbel
Jan Beulich
Alexandre Oliva
Jakub Jelinek
Dave Anglin
Mark Shinwell
Martin Schwidefsky
Thiemo Seufer
Tristan Gingold
Maciej W. Rozycki
Kazu Hirata
Michael Meissner
Daniel Jacobowitz
Ben Elliston
Andreas Schwab
Joseph Myers