f707726e8d
sparc64 really implement itlb/dtlb automatic replacement writes
...
- implement "used" bit in tlb translation entry
- mark tlb entry used if qemu code/data translation succeeds
- fold i/d mmu replacement writes code into replace_tlb_1bit_lru which
adds 1bit lru replacement algorithm; previously code tried to replace
first unlocked entry only
- extract more bitmasks to named macros
- add "immu" or "dmmu" type name to debugging output where appropriate
Signed-off-by: igor.v.kovalenko@gmail.com
--
Kind regards,
Igor V. Kovalenko
2009-07-27 05:43:27 +00:00
6e8e7d4c09
sparc64 name mmu registers and general cleanup
...
- add names to mmu registers, this helps understanding the code which
uses/modifies them.
- fold i/d mmu tlb entries tag and tte arrays into arrays of tlb entries
- extract demap_tlb routine (code duplication)
- extract replace_tlb routine (code duplication)
- flush qemu tlb translations when replacing sparc64 mmu tlb entries
I have no test case which demands flushing qemu translations,
and this patch should have no other visible changes to runtime.
Signed-off-by: igor.v.kovalenko@gmail.com
--
Kind regards,
Igor V. Kovalenko
2009-07-27 05:43:22 +00:00
0bf9e31af1
Fix most warnings (errors with -Werror) when debugging is enabled
...
I used the following command to enable debugging:
perl -p -i -e 's/^\/\/#define DEBUG/#define DEBUG/g' * */* */*/*
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-07-20 17:19:25 +00:00
8167ee8839
Update to a hopefully more future proof FSF address
...
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-07-16 20:47:01 +00:00
5210977a85
sparc64: trap handling corrections
...
On Sun, Jul 12, 2009 at 12:09 PM, Blue Swirl<blauwirbel@gmail.com> wrote:
> On 7/12/09, Igor Kovalenko <igor.v.kovalenko@gmail.com> wrote:
>> Good trap handling is required to process interrupts.
>> This patch fixes the following:
>>
>> - sparc64 has no wim register
>> - sparc64 has no psret register, use IE bit of pstate
>> extract IE checking code to cpu_interrupts_enabled
>> - alternate globals are not available if cpu has GL feature
>> in this case bit AG of pstate is constant zero
>> - write to pstate must actually write pstate
>> even if cpu has GL feature
>>
>> Also timer interrupt is handled using do_interrupt.
>
> A bit too much for one patch. Please also remove the code instead of
> commenting out.
I now excluded timer interrupt related part.
To my mind other changes are essentially tied together.
> PUT_PSR for Sparc64 needs CC_OP = CC_OP_FLAGS; like Sparc32.
Fixed, please find attached the updated version.
--
Kind regards,
Igor V. Kovalenko
2009-07-12 08:46:54 +00:00
5b0f0bec71
sparc64: fix helper_st_asi little endian case typo
...
On Sun, Jul 12, 2009 at 12:43 AM, Stuart Brady<sdbrady@ntlworld.com> wrote:
> On Sat, Jul 11, 2009 at 10:22:18PM +0400, Igor Kovalenko wrote:
>> It is clear that intention is to byte-swap value to be written, not
>> the target address.
>
> @@ -1949,13 +1949,13 @@ void helper_st_asi(target_ulong addr, ta
> case 0x89: // Secondary LE
> switch(size) {
> case 2:
> - addr = bswap16(addr);
> + addr = bswap16(val);
> ^^^^
> Shouldn't that be 'val = bswap16(val)' (and likewise for the 32-bit and
> 64-bit cases)? Also needs a 'signed-off-by:'...
>
> Cheers,
> --
> Stuart Brady
>
Thanks, that part I did not runtime-tested.
Not sure if those asi stores are of any use for user-mode emulator.
Please find attached the corrected version.
Signed-off-by: igor.v.kovalenko@gmail.com
--
Kind regards,
Igor V. Kovalenko
2009-07-12 07:44:11 +00:00
536ba01572
sparc64: unify mmu tag matching code
...
This patch extracts common part of sparc64 tag
matching code used by IMMU and DMMU lookups.
Signed-off-by: igor.v.kovalenko@gmail.com
--
Kind regards,
Igor V. Kovalenko
2009-07-12 07:41:42 +00:00
e8807b14cc
sparc64: mmu bypass mode correction
...
This Implement physical address truncation in mmu bypass mode.
IMMU bypass is also active when cpu enters RED_STATE
Signed-off-by: igor.v.kovalenko@gmail.com
--
Kind regards,
Igor V. Kovalenko
2009-07-12 07:41:42 +00:00
25517f999f
Use correct type for SPARC cpu_cc_op
...
Signed-off-by: Paul Brook <paul@codesourcery.com>
2009-06-06 02:54:03 +01:00
f80f9ec9a6
Convert machine registration to use module init functions
...
This cleans up quite a lot of #ifdefs, extern variables, and other ugliness.
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-05-21 08:47:55 -05:00
1ad2134f91
Hardware convenience library
...
The only target dependency for most hardware is sizeof(target_phys_addr_t).
Build these files into a convenience library, and use that instead of
building for every target.
Remove and poison various target specific macros to avoid bogus target
dependencies creeping back in.
Big/Little endian is not handled because devices should not know or care
about this to start with.
Signed-off-by: Paul Brook <paul@codesourcery.com>
2009-05-19 16:17:58 +01:00
5561650587
Include assert.h from qemu-common.h
...
Include assert.h from qemu-common.h and remove other direct uses.
cpu-all.h still need to include it because of the dyngen-exec.h hacks
Signed-off-by: Paul Brook <paul@codesourcery.com>
2009-05-13 20:54:26 +01:00
001faf3269
Replace gcc variadic macro extension with C99 version
...
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-13 17:53:17 +00:00
d084469ca0
Convert mulscc
...
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-10 07:43:21 +00:00
6c78ea32e1
Convert udiv/sdiv
...
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-10 07:42:54 +00:00
3b2d1e9286
Convert tagged ops
...
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-10 10:38:35 +03:00
2ca1d92b07
Convert subx
...
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-10 10:38:34 +03:00
d4b0d46898
Convert sub
...
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-10 10:38:34 +03:00
38482a77f0
Convert logical operations and umul/smul
...
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-10 10:38:34 +03:00
789c91ef39
Convert addx
...
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-10 07:19:22 +00:00
bdf9f35dad
Convert add
...
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-10 07:19:17 +00:00
8393617c1a
Use dynamical computation for condition codes
...
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-10 07:19:11 +00:00
719f66a770
Optimize cmp x, 0 case
...
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-03 18:51:27 +00:00
dc1a6971e3
Reindent
...
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-03 18:51:22 +00:00
b89e94af1d
Improve instruction name comments for easier searching
...
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-02 20:19:46 +00:00
7ab463cb52
Clarify: dmmuregs[1] is not a typo
...
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-02 22:52:32 +03:00
41d728522b
Optimize operations with immediate parameters
2009-05-02 19:14:05 +00:00
67526b2056
Fix Sparc64 sign extension problems
...
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-02 18:58:57 +00:00
417728d875
sparc64 fix context value for ITLB fault
...
Revert previous change to get_physical_address_code:
I/D MMU context register is shared, so using dmmuregs[1] is correct
Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com>
2009-04-28 15:59:51 +00:00
82f2cfc31b
sparc64 fix TLB match code
...
TLB match code must respect page size, otherwise 4M page mappings may
be not found.
Also correct a typo in get_physical_address_code which should use IMMU
registers.
Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com>
--
Kind regards,
Igor V. Kovalenko
2009-04-27 19:14:40 +00:00
9c22a62396
Fix a warning in sparc64-linux-user build
2009-04-25 16:28:27 +00:00
697a77e6e7
sparc64 support TSB related MMU registers
...
Posting updated patch to the list...
>>> On Fri, Apr 24, 2009 at 9:42 PM, Blue Swirl <blauwirbel@gmail.com> wrote:
>>> >
>>> > Nice, though I didn't notice any visible improvement in my tests.
>>>
>>> This early in boot process there is not much to output; and I test
>>> recent kernel which may use different startup sequence.
>>> I modified openbios cif handler to output arguments and I now can see
>>> visible difference.
>>>
>>>
>>> >
>>> > About the patch, there are a few problems:
>>> > - it breaks Sparc32
>>>
>>> You mean it stops working?
>>
>> Does not even build.
Fixed now.
>>> > - commented out code is ugly
>>> > - if and else should be on the same line as '{' or '}'
>>> > - long lines should be wrapped
>>> > - in the line:
>>> > + return (((tag_access_register & 0x1fff)<<48)|(tag_access_register >> 22));
>>> > there should be white space between ) and << and 48.
>>> >
>>>
>>
>> Also the ")|(" in between is crowded.
>>
>> Maybe the coding style does not describe this well enough.
BTW Supplying indent template would be great.
Please see the updated patch qemu-sparc64-tsb-asi-2.patch attached.
--
Kind regards,
Igor V. Kovalenko
2009-04-25 18:17:19 +03:00
0bf46a40a1
qemu: introduce qemu_init_vcpu (Marcelo Tosatti)
...
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7242 c046a42c-6fe2-441c-8c8c-71466251a162
2009-04-24 18:03:41 +00:00
6a4955a813
qemu: per-arch cpu_has_work (Marcelo Tosatti)
...
Blue Swirl: fix Sparc32 breakage
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7238 c046a42c-6fe2-441c-8c8c-71466251a162
2009-04-24 18:03:20 +00:00
1b530a6dfc
Add new command line option -singlestep for tcg single stepping.
...
This replaces a compile time option for some targets and adds
this feature to targets which did not have a compile time option.
Add monitor command to enable or disable single step mode.
Modify monitor command "info status" to display single step mode.
Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7004 c046a42c-6fe2-441c-8c8c-71466251a162
2009-04-05 20:08:59 +00:00
d78f399542
Delete some unused macros detected with -Wp,-Wunused-macros use
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6856 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-16 16:33:01 +00:00
c276471991
The _exit syscall is used for both thread termination in NPTL applications,
...
and process termination in legacy applications. Try to guess which we want
based on the presence of multiple threads.
Also implement locking when modifying the CPU list.
Signed-off-by: Paul Brook <paul@codesourcery.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6735 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-07 15:24:59 +00:00
415fc90618
Turn MMUs and caches off on reset
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6636 c046a42c-6fe2-441c-8c8c-71466251a162
2009-02-21 11:13:51 +00:00
0d0266a53b
targets: remove error handling from qemu_malloc() callers (Avi Kivity)
...
Signed-off-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6530 c046a42c-6fe2-441c-8c8c-71466251a162
2009-02-05 22:06:11 +00:00
eca1bdf415
Log reset events (Jan Kiszka)
...
Original idea&code by Kevin Wolf, split-up in two patches and added more
archs.
This patch introduces a flag to log CPU resets. Useful for tracing
unexpected resets (such as those triggered by x86 triple faults).
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6452 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-26 19:54:31 +00:00
8fec2b8c45
global s/loglevel & X/qemu_loglevel_mask(X)/ (Eduardo Habkost)
...
These are references to 'loglevel' that aren't on a simple 'if (loglevel &
X) qemu_log()' statement.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6340 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-15 22:36:53 +00:00
93fcfe39a0
Convert references to logfile/loglevel to use qemu_log*() macros
...
This is a large patch that changes all occurrences of logfile/loglevel
global variables to use the new qemu_log*() macros.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6338 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-15 22:34:14 +00:00
72d239ed26
Get rid of user_mode_only
...
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6305 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-14 19:40:27 +00:00
afdf8109e3
Fix TLB access (Jakub Jermar)
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6274 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-12 21:12:22 +00:00
fad6cb1a56
Update FSF address in GPL/LGPL boilerplate
...
The attached patch updates the FSF address in the GPL/LGPL boilerplate
in most GPL/LGPLed files, and also in COPYING.LIB.
Signed-off-by: Stuart Brady <stuart.brady@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6162 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-04 22:05:52 +00:00
4017190e2d
Add SuperSPARC MMU breakpoint registers (Robert Reif)
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6125 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-23 15:30:50 +00:00
963262debc
Better SuperSPARC emulation (Robert Reif)
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6123 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-23 15:06:35 +00:00
8fa211e881
Implement tick interrupt disable bits
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6122 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-23 08:47:26 +00:00
b1503cda1e
Use the ARRAY_SIZE() macro where appropriate.
...
Change from v1:
Avoid changing the existing coding style in certain files.
Signed-off-by: Stuart Brady <stuart.brady@gmail.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6120 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-22 20:33:55 +00:00
1d6198c3b0
Remove unnecessary trailing newlines
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6000 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-13 09:32:43 +00:00
f4a5a5ba92
Add missing "static"
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5977 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-11 17:29:00 +00:00
2cbd949d7a
Common cpu_loop_exit prototype
...
All archs use the same cpu_loop_exit, so move the prototype in a common
header. i386 was carrying a __hidden attribute, but that was empty for
this arch anyway.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5820 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-30 16:23:09 +00:00
c0ce998e94
Use sys-queue.h for break/watchpoint managment (Jan Kiszka)
...
This switches cpu_break/watchpoint_* to TAILQ wrappers, simplifying the
code and also fixing a use after release issue in
cpu_break/watchpoint_remove_all.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5799 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-25 22:13:57 +00:00
a1d1bb3101
Refactor and enhance break/watchpoint API (Jan Kiszka)
...
This patch prepares the QEMU cpu_watchpoint/breakpoint API to allow the
succeeding enhancements this series comes with.
First of all, it overcomes MAX_BREAKPOINTS/MAX_WATCHPOINTS by switching
to dynamically allocated data structures that are kept in linked lists.
This also allows to return a stable reference to the related objects,
required for later introduced x86 debug register support.
Breakpoints and watchpoints are stored with their full information set
and an additional flag field that makes them easily extensible for use
beyond pure guest debugging.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5738 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-18 20:07:32 +00:00
6b9175478e
Refactor translation block CPU state handling (Jan Kiszka)
...
This patch refactors the way the CPU state is handled that is associated
with a TB. The basic motivation is to move more arch specific code out
of generic files. Specifically the long #ifdef clutter in tb_find_fast()
has to be overcome in order to avoid duplicating it for the gdb
watchpoint fixes (patch "Restore pc on watchpoint hits").
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5736 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-18 19:46:41 +00:00
622ed3605b
Convert CPU_PC_FROM_TB to static inline (Jan Kiszka)
...
as macros should be avoided when possible.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5735 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-18 19:36:03 +00:00
a7812ae412
TCG variable type checking.
...
Signed-off-by: Paul Brook <paul@codesourcery.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5729 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-17 14:43:54 +00:00
2576d836af
Use TCG not op
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5663 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-09 19:52:36 +00:00
81b5b816e2
Use andc, orc, nor and nand
...
Also fix which argument gets negated in fandnot[12] and fornot[12]
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5662 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-09 19:50:37 +00:00
527067d892
Fix TCGv size mismatches
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5593 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-01 13:44:52 +00:00
797d5db002
Add static (spotted by sparse)
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5439 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-07 19:12:13 +00:00
c55bda30f6
Fix error in fexpand (spotted by sparse)
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5438 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-07 18:54:35 +00:00
e18231a3ff
Show size for unassigned accesses (Robert Reif)
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5436 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-06 18:46:28 +00:00
f4b1a842d7
Rearrange tick functions
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5408 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-03 19:04:42 +00:00
48585ec51d
Fix missing prototype warnings by moving declarations
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5407 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-03 19:02:42 +00:00
9827e450e4
Fix MXCC printf warning (based on patch by Robert Reif)
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5393 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-02 18:06:50 +00:00
cc6747f4c9
Add mmu tlb demap support (Igor Kovalenko)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5332 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-27 19:43:18 +00:00
e87231d426
Add a generic Niagara machine
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5329 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-26 19:48:58 +00:00
c99657d303
Implement some UA2007 block ASIs
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5328 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-26 18:07:24 +00:00
b158a785d2
Implement UA2005 hypervisor traps
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5327 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-26 18:05:23 +00:00
d81fd7220e
Move also DEBUG_PCALL (see r5085)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5326 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-26 18:02:48 +00:00
9d92659858
Add software and timer interrupt support
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5299 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-22 19:50:28 +00:00
1121f87961
Fix arguments used in cas/casx, thanks to Igor Kovalenko for spotting
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5296 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-22 16:52:28 +00:00
ab508019a1
Use the new concat_tl_i64 op for std and stda
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5283 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-21 18:43:17 +00:00
a7ec422912
Use the new concat_i32_i64 op for std and stda
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5281 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-21 14:49:09 +00:00
f0d5e47183
Move signal handler prototype back to cpu.h
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5276 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-20 09:05:49 +00:00
9f4576f08b
Fix array subscript above array bounds error
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5219 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-14 19:16:21 +00:00
72ccba795b
Fix mulscc with high bits set in either src1 or src2
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5201 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-13 17:20:52 +00:00
5068cbd9e9
Write zeros to high bits of y, based on patch by Vince Weaver
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5196 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-11 16:01:02 +00:00
d84763bc17
Convert rest of ops using float32 to TCG, remove FT0 and FT1
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5193 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-10 20:09:22 +00:00
c5d04e99f3
Partially convert float128 conversion ops to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5192 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-10 20:00:18 +00:00
e2ea21b396
Convert basic 64 bit VIS ops to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5191 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-10 19:57:35 +00:00
1d01299d29
Convert basic 32 bit VIS ops to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5190 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-10 19:57:13 +00:00
714547bbc7
Convert basic float32 ops to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5189 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-10 19:54:51 +00:00
3a3b925d47
Implement ldxfsr/stxfsr, fix ld(x)fsr masks, convert to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5185 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-09 19:02:49 +00:00
510aba20f0
Fix a typo in fpsub32
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5177 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-06 17:54:01 +00:00
255e1fcb5a
Convert most env fields to TCG registers
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5176 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-06 17:51:43 +00:00
47ad35f16a
Silence gcc warning about constant overflow
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5175 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-06 17:50:16 +00:00
e83ce55068
Implement no-fault loads
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5148 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-03 17:32:10 +00:00
b991c38519
Fix sign extension problems with smul and umul (Vince Weaver)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5138 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-02 16:33:23 +00:00
105a1f04b5
Fix y register loads and stores
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5123 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-01 19:35:29 +00:00
c8f9349ad9
Remove memcpy32() prototype leftover from r5109
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5114 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-30 09:22:10 +00:00
ba6a9d8cda
Fix FCC handling for Sparc64 target, initial patch by Vince Weaver
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5110 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-29 21:03:31 +00:00
91736d378b
Fix Sparc64 boot on i386 host:
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- move do_interrupt() back to op_helper.c
- move non-helper prototypes from helper.h to exec.h
- move some prototypes from cpu.h to exec.h
- do not export either set_cwp() or cpu_set_cwp() from op_helper.c,
but instead provide inline functions
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5109 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-29 20:50:21 +00:00
7621a90da8
Fix udiv and sdiv on Sparc64 (Vince Weaver)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5085 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-25 19:43:53 +00:00
c93e7817ee
Fix wrwim masking (Luis Pureza)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5043 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-21 17:34:42 +00:00
5578ceab94
Use initial CPU definition structure for some CPU fields instead of copying
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them around, based on patch by Luis Pureza.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5042 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-21 17:33:42 +00:00
2ae72bce02
Correct 32bit carry flag for add instruction (Igor Kovalenko)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5017 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-17 08:33:47 +00:00
06057e6f6c
Fix faligndata (Vince Weaver)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4992 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-06 19:50:16 +00:00
43e9e742b9
Fix I/D MMU tag reads
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4991 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-06 18:16:08 +00:00
01b1fa6d16
Fix Sparc64 shifts
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4990 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-06 18:13:54 +00:00
95f9397c75
Fix offset handling for ASI loads and stores (Vince Weaver)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4988 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-06 15:28:20 +00:00
a7a044f29e
Handle wrapped registers correctly when saving
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Fix typo
Save and load interrupt_index and pil_in
Original patch by Luis Pureza
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4980 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-01 15:13:58 +00:00
dd5e6304aa
Fix cmp/subcc/addcc op bugs reported by Vince Weaver
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4970 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-29 18:11:20 +00:00
c19148bd8f
Make MAXTL dynamic, bounds check tl when indexing
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4942 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-25 07:42:14 +00:00
0b8f1b102b
Sparc32: save/load all MMU registers, Sparc64: add CPU save/load
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4938 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-24 11:28:51 +00:00
c7ba218da1
Add T1 and T2 CPUs, add a Sun4v machine
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4923 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-22 07:07:34 +00:00
74b9decc47
Use MMU globals for some MMU traps
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4918 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-21 18:43:32 +00:00
8eba209e33
Fix reset vector
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4917 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-21 11:17:23 +00:00
f76981b113
Print default and available CPU features separately
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4912 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-20 18:23:50 +00:00
fb79ceb91a
Make UA200x features selectable, add MMU types
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4911 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-20 18:22:16 +00:00
7f626233a0
Remove unused variable
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4908 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-19 18:35:29 +00:00
db166940e2
Implement nucleus quad ldda
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4902 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-19 13:25:28 +00:00
f617a9a6bb
Update TLB miss addresses
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4897 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-19 10:04:48 +00:00
2cfc5f17d3
Small cleanup of gen_intermediate_code(_internal), by Laurent Desnogues.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4891 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-18 18:01:29 +00:00
8d7d8c4bb1
wrhpr hstick_cmpr is a store, not a load
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4887 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-18 10:26:07 +00:00
e6bf7d70b5
Fix saving and loading of trap state
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4883 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-17 19:17:19 +00:00
2cade6a3f6
Support for address masking
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4882 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-17 12:53:05 +00:00
a5a52cf246
Fix MMU registers, add more E-cache ASIs
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4881 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-16 16:58:49 +00:00
e19e4efeaa
Fix MMU miss traps
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4880 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-16 16:55:52 +00:00
c5f2f66835
Flushw can generate exceptions, so save PC & NPC
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4876 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-16 11:51:15 +00:00
71817e4898
Really fix cas
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4869 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-15 14:52:09 +00:00
f7350b47da
Implement some Ultrasparc cache ASIs used by SILO
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4858 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-08 15:51:32 +00:00
9656f324d2
Move interrupt_request and user_mode_only to common cpu state.
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Save and restore env->interrupt_request and env->halted.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4817 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-01 20:01:19 +00:00
b3c7724cbc
Move CPU save/load registration to common code.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4808 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-30 16:31:04 +00:00
2e70f6efa8
Add instruction counter.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4799 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-29 01:03:05 +00:00
a37ee56cb7
Fix bogus format, reading uninitialised memory (original patch by Julian Seward)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4793 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-26 18:43:24 +00:00
a764a566be
Fix Sparc mmu bug seen with NetBSD, based on patch by Cliff Wright
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4785 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-24 19:08:28 +00:00
0bbd4a0ddb
Fix compiler warning (Jan Kiszka)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4781 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-23 16:58:04 +00:00
d987963aa9
Eliminate cpu_T[0]
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4776 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-22 10:58:57 +00:00
3f0436fe85
Eliminate cpu_T[1]
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4775 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-22 08:52:58 +00:00
c0b5b109a8
Add missing keys, sendkey support for all keys
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4774 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-22 07:45:42 +00:00
ece43b8d06
Convert some cpu_dst uses (with loads/stores) to cpu_tmp0
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4772 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-21 19:50:10 +00:00
5c6a0628b7
Avoid brcond problems, use temps for cpu_src1 & cpu_src2
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4771 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-21 19:46:48 +00:00
fd07bef4b4
Update TODO
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4765 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-20 17:42:20 +00:00
9fac3a3a7e
Fix boot problem on i386 host introduced in r4690
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4758 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-20 15:06:42 +00:00
07bf2857b8
Avoid temporary variable use across basic blocks for udivx
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4744 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-15 18:06:39 +00:00
1a14026e11
Allow NWINDOWS selection (CPU feature with model specific defaults)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4690 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-07 08:07:37 +00:00
b5154bdedb
Add more SuperSparcs
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4633 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-31 11:33:20 +00:00
f8ed7070ea
Fix typo.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4624 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-30 17:54:15 +00:00
6e68e076e7
Move clone() register setup to target specific code. Handle fork-like clone.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4623 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-30 17:22:15 +00:00
e30b467893
MicroSparc I didn't have fsmuld op
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4618 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-29 18:20:36 +00:00
75d0187a52
Remove unused (for now) reg_REGWPTR (original patch by Glauber Costa)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4617 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-29 16:38:41 +00:00
9133e39b84
Push common interrupt variables to cpu-defs.h (Glauber Costa)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4612 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-29 10:08:06 +00:00
ce5232c5c2
moved halted field to CPU_COMMON
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4609 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-28 17:14:10 +00:00
2ea815cac7
Free temps
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4591 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-27 19:39:12 +00:00
f2bc7e7fa1
Move non-op functions from op_helper.c to helper.c and vice versa.
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Rearrange interrupt handling to match other targets.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4590 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-27 17:35:30 +00:00
8d96d20941
More TCG type fixes
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4589 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-26 19:42:42 +00:00
ef28fd8673
Fix cas on i386
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4587 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-26 17:53:41 +00:00
4f7de37327
remove absolete function
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4579 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-25 18:01:40 +00:00
a8c768c069
Nicer debug output
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4573 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-25 11:17:46 +00:00
9b7b85d260
Fix off-by-one unwinding error.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4570 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-25 00:36:06 +00:00
bcb0126ff4
More TCGv type fixes.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4553 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-24 02:24:25 +00:00
cb63669a54
Fix ARM conditional branch bug.
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Add tcg_gen_brcondi.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4552 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-24 02:22:00 +00:00
455f900486
Fix helper operand type mismatch.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4551 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-24 02:12:32 +00:00
c9e03d8f68
Register op helpers
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4534 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-22 18:16:25 +00:00
a4e7dd5267
Remove currently unnecessary alignment masking
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4505 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-20 19:36:22 +00:00
e35298cd1f
Generate better code for Sparc32 shifts
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4467 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-17 09:43:12 +00:00
79c638586e
Update TODO
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4464 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-17 06:08:15 +00:00
4da450e616
Move prototype back to avoid a compiler warning
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4443 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-12 17:59:14 +00:00
77f193daa8
Wrap long lines
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4440 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-12 16:13:33 +00:00
c2bc0e3880
Remove someexplicit alignment checks (initial patch by Fabrice Bellard)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4431 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-11 19:24:10 +00:00
c5adf6a88d
Remove duplicated field
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4411 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-10 12:25:46 +00:00
0dcda9be6b
Add a TODO file
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4410 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-10 12:09:24 +00:00
7c60cc4bca
suppressed fixed registers
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4408 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-10 10:58:20 +00:00
22548760ca
Fix compiler warnings
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4404 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-10 10:12:00 +00:00
64a88d5d3a
CPU feature selection support
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4399 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-09 20:13:43 +00:00
0828b4485a
Move #include to speed up compilation
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4398 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-09 20:12:09 +00:00
9c6c6662d1
Simplify some constant loads
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4383 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-07 18:04:29 +00:00
ba28189bac
Fix potential condition code problems
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4382 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-07 18:03:02 +00:00
8dd3dca351
remove target ifdefs from vl.c
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(Glauber Costa)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4327 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-04 13:11:44 +00:00
762abf6774
Complete the TCG conversion (and delete some files, too)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4324 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-04 12:00:16 +00:00
7fa76c0bf3
Complete the TCG conversion
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4323 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-04 11:58:45 +00:00
653ccb8099
Avoid some brconds
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4318 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-04 08:06:33 +00:00
6f551262b3
Use memory based registers in functions containing brconds
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4311 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-03 20:51:00 +00:00
d2856f1ad4
Factorize code in translate.c
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(Glauber Costa)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4274 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-28 00:32:32 +00:00
4b8b8b76d4
Document the shift values
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4243 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-23 17:12:35 +00:00
4e14008f3a
Revert the previous patch
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4236 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-22 19:05:18 +00:00
25bc827cf2
Move 128-bit float emulation under linux-user
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4234 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-22 16:42:40 +00:00
ca10f86763
Remove osdep.c/qemu-img code duplication
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(Kevin Wolf)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4191 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-11 21:35:42 +00:00
2a39bc41cb
Remove incorrect discards and old unused defines (blueswir1).
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4137 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-30 19:47:23 +00:00
a49d9390d4
Change handling of source 2
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4135 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-29 20:39:41 +00:00
9322a4bf0b
Change handling of source register 1
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4134 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-29 20:38:35 +00:00
c48fcb4751
Move CPU stuff unrelated to translation to helper.c
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4133 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-29 15:46:56 +00:00
6ae20372d4
Rename T[012] according to their roles
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4131 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-29 09:09:25 +00:00
32b6c8125c
Avoid writes to T1 except for loads/stores, convert some T0 uses to cpu_tmp0
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4130 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-29 09:03:48 +00:00
31741a27fa
Accidentally dropped one change from previous commit
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4129 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-29 08:59:48 +00:00
4af984a76a
Concentrate cpu_T[012] use to one function
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4110 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-26 20:47:52 +00:00
ce5b3c3d46
Split icc and xcc flag calculations
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4109 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-26 20:45:56 +00:00
2f5680ee33
Remove some legacy definitions
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4108 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-26 20:45:06 +00:00
bdf46ea256
Fix a sign extension problem
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4105 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-24 17:47:03 +00:00
7127fe84e7
Fix mulscc
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4103 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-23 11:50:28 +00:00
ce8536e23f
Convert ldf/ldfsr and stf/stfsr to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4101 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-22 08:47:14 +00:00
8911f5019c
Fix i32/i64/TL mismatches
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4100 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-22 08:40:28 +00:00
c6d5231deb
Remove leftover definitions
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4098 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-21 18:31:43 +00:00
2b29924f8c
Convert align checks to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4097 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-21 18:08:59 +00:00
06b3e1b3a9
Convert jumps to labels to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4094 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-21 17:59:39 +00:00
72a9747b79
Convert save, restore, saved, restored, and flushw to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4092 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-21 17:57:29 +00:00
44e7757c2a
Convert other float and VIS ops to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4091 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-21 17:56:02 +00:00
ff07ec8309
Convert float move ops to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4090 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-21 17:53:56 +00:00
3b89f26c11
Convert udiv and sdiv ops to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4088 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-18 18:10:42 +00:00
2483386a6e
Use ext_i32_i64 instead of ext32s_i64
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4087 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-18 18:09:27 +00:00
d35527d9f9
Convert CCR and CWP ops to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4086 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-18 18:08:25 +00:00
1f5063fb97
Convert array8/16/32 and alignaddr to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4085 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-18 18:06:54 +00:00
8879d139bb
Convert umul and smul to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4077 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-16 19:24:42 +00:00
48d5c82bcc
Use a TCG global for pc and npc
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4076 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-16 19:23:31 +00:00
d9bdab86e8
Convert mulscc to TCG, add cc_src2
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4075 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-16 19:22:18 +00:00
0425bee563
Discard unused data, use less temps
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4073 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-16 19:18:54 +00:00
87e92502c6
Use a TCG global for fsr
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4068 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-15 18:12:11 +00:00
bb5529bb62
Convert ldfsr and stfsr to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4067 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-15 18:11:06 +00:00
748b9d8ef0
Eliminate some uses of T2
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4065 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-14 21:09:15 +00:00
1a7b60e727
Convert udivx and sdivx to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4064 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-14 19:42:42 +00:00
f5069b26a4
Use memory globals for G registers
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4062 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-14 17:35:02 +00:00
1ec6d2ea99
Use tcg_const_tl for zero constant
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4054 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-13 20:47:53 +00:00
dc99a3f2e8
Convert condition code changing versions of add, sub, logic, and div to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4052 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-13 20:45:31 +00:00
db4a4ea4ee
Use a TCG global for regwptr
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4038 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-11 20:59:02 +00:00
56ec06bb8e
Convert andn, orn and xnor to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4030 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-09 20:46:51 +00:00
19f329ad7b
Convert branches and conditional moves to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4028 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-08 21:36:50 +00:00
134d77a14b
Convert exception ops to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4022 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-06 20:09:54 +00:00
a3ffaf3060
Fix microSPARC II SFSR mask (Robert Reif)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4021 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-06 16:13:51 +00:00
375ee38b4b
Convert Sparc64 trap state ops to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4018 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-05 17:59:48 +00:00
7e8c2b6ca8
Convert float helpers to TCG, fix fabsq in the process
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4014 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-04 20:00:18 +00:00
dcf2490568
Convert fmovr to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4013 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-04 19:56:06 +00:00
ccd4a21937
Convert tick operations to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4011 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-02 18:28:06 +00:00
00f219bf50
Convert movr and (partially) movcc to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4010 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-02 18:25:27 +00:00
38bc628b08
Convert addx, subx, next_insn and mov_pc_npc to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4009 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-02 18:22:19 +00:00
b25deda7ca
Temporary fix for i386 host
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3994 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-27 17:44:03 +00:00
1a2fb1c009
Modify Sparc32/64 to use TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3989 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-24 14:10:06 +00:00
9e31b9e28a
Fix remote debugger memory access problems reported by Matthias Stein
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3982 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-14 17:46:44 +00:00
3deaeab717
Sparc32 MMU register fixes (Robert Reif)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3979 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-11 18:27:33 +00:00
57fec1fee9
use the TCG code generator
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3944 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-01 10:50:11 +00:00
045380be94
More ASIs
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3882 c046a42c-6fe2-441c-8c8c-71466251a162
2008-01-01 17:07:39 +00:00
0b09be2b2f
Nicer debug output for exceptions
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3878 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-30 17:13:01 +00:00
7d85892b9b
Initial support for Sun4d machines (SS-1000, SS-2000)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3869 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-28 20:57:43 +00:00
8543e2cfce
Improved ASI debugging (Robert Reif)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3868 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-28 18:50:23 +00:00
3aa662faae
Enforce context table alignment
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3857 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-25 07:49:10 +00:00
66f1cdbde4
Partial fix to Sparc32 Linux host global register mangling problem
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3806 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-11 19:39:25 +00:00
666c87aa3b
Add ASIs (Robert Reif)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3801 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-10 19:58:20 +00:00
01ba98161f
Handle cpu_model in copy_cpu(), by Kirill A. Shutemov.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3778 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-09 02:22:57 +00:00
58a770f3a4
Increase prom size for boot mode
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3748 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-29 17:08:01 +00:00
3ebf5aafe5
Use slavio base as boot prom address, rearrange sun4m init code
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3747 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-28 20:54:33 +00:00
9c2b428ee1
Fix compilation and warnings on PPC host
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3746 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-28 18:08:28 +00:00
2382dc6b9b
Fix floating point register decoding
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3742 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-25 20:27:35 +00:00
1f58732916
128-bit float support for user mode
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3740 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-25 18:40:20 +00:00
3dd9a152e1
More MMU registers (Robert Reif)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3738 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-25 12:43:10 +00:00
d07b4d0ea7
Fix MXCC register 64 bit read word order (Robert Reif)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3709 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-19 19:14:10 +00:00
87ecb68bdf
Break up vl.h.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3674 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-17 17:14:51 +00:00
2761992d13
Remove unnecessary register masking (Robert Reif)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3663 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-17 08:21:43 +00:00
bbf7d96b45
Fix MXCC error register (Robert Reif)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3662 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-17 08:19:57 +00:00
295db11371
Add MXCC module reset register (Robert Reif)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3661 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-17 08:18:59 +00:00
bd37ec2141
removed warning
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3616 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-11 19:50:22 +00:00
aaed909a49
added cpu_model parameter to cpu_init()
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3562 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-10 15:15:54 +00:00
7d77bf2006
More Sparc64 CPU definitions
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3561 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-10 09:32:02 +00:00
406f82e833
More CPU definitions
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3559 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-09 19:08:43 +00:00
6d5f237a59
CPU specific boot mode (Robert Reif)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3542 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-07 17:03:37 +00:00
273af66025
Adjust s390 addresses (the MSB is defined as "to be ignored").
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3486 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-29 14:39:49 +00:00
eed152bba5
Use shared ctpop64 helper
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3468 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-28 14:35:04 +00:00
20b749f607
Avoid gcc warnings
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3412 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-20 07:09:08 +00:00
1e64e78d0c
Fix compiling Sparc64 on PPC host
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3411 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-20 07:07:47 +00:00
e909ec2f11
Use ldq and stq for 8 byte accesses (original patch by Robert Reif)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3405 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-17 17:37:13 +00:00
8f577d3d29
Enable all alignment checks
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3404 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-17 17:34:57 +00:00
94ced07534
Fix bug in Sparc32 sta op (Robert Reif)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3399 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-14 20:27:00 +00:00
6f27aba62e
Sparc64 hypervisor mode
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3398 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-14 17:07:21 +00:00
952a328ff5
SuperSparc MXCC support (Robert Reif)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3397 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-14 16:29:21 +00:00
992f48a036
Support for 32 bit ABI on 64 bit targets (only enabled Sparc64)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3396 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-14 16:27:31 +00:00
6ebbf39000
Replace is_user variable with mmu_idx in softmmu core,
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allowing support of more than 2 mmu access modes.
Add backward compatibility is_user variable in targets code when needed.
Implement per target cpu_mmu_index function, avoiding duplicated code
and #ifdef TARGET_xxx in softmmu core functions.
Implement per target mmu modes definitions. As an example, add PowerPC
hypervisor mode definition and Alpha executive and kernel modes definitions.
Optimize PowerPC case, precomputing mmu_idx when MSR register changes
and using the same definition in code translation code.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3384 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-14 07:07:08 +00:00
c732abe222
Unify '-cpu ?' option.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3380 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-12 06:47:46 +00:00
90251fb96e
Fix taddcctv and tsubcctv (David Matthews)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3379 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-10 19:11:54 +00:00
0387d92875
Fix Sparc64 ldfa/stfa and float ops with fpr >= 32
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3318 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-03 17:46:29 +00:00
51996525c7
Fix block load ASIs
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3310 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-01 17:07:58 +00:00
3391c81801
Fix Sparc64 ldfa, lddfa, stfa, and stdfa instructions
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3298 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-30 19:38:12 +00:00
ee0b03fd85
Fix Sparc64 wrasr instructions
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3297 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-30 16:37:00 +00:00
198a74de4c
Move get_sp_from_cpustate from cpu.h to target_signal.h.
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Enable sigaltstack processing for more architectures.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3253 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-27 16:44:32 +00:00
a04e134ad1
linux-user sigaltstack() syscall, by Thayne Harbaugh.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3252 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-27 13:57:58 +00:00
40ce0a9a8f
CPU boot mode
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3231 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-24 19:44:09 +00:00
e32664fbd2
Add missing break statements
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3208 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-23 11:40:57 +00:00
81ad8ba242
Rework ASI instructions (Aurelien Jarno)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3205 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-21 19:10:53 +00:00
d69d2ca9b4
Fix tadd op generation with GCC 4.x
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3196 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-20 15:21:32 +00:00
0f8a249a0b
Detabify
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3195 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-20 14:54:22 +00:00
3b46e62427
find -type f | xargs sed -i 's/[\t ]*$//g' # Yes, again. Note the star in the regex.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3177 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-17 08:09:54 +00:00
5fafdf24ef
find -type f | xargs sed -i 's/[\t ]$//g' # on most files
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-16 21:08:06 +00:00
ce62e5ba09
Fix tb->size mishandling, by Daniel Jacobowitz.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3160 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-11 10:04:58 +00:00
327ac2e797
Fix Sparc32 interrupt handling
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3110 c046a42c-6fe2-441c-8c8c-71466251a162
2007-08-04 10:50:30 +00:00
6ea4a6c875
More alignment checks
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3060 c046a42c-6fe2-441c-8c8c-71466251a162
2007-07-11 16:43:30 +00:00
8f1f22f6ab
Fix retry and done ops, trap handling
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3055 c046a42c-6fe2-441c-8c8c-71466251a162
2007-07-08 19:51:24 +00:00
1ad21e6969
Save state in Sparc64 return op
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3054 c046a42c-6fe2-441c-8c8c-71466251a162
2007-07-08 19:48:40 +00:00
17d996e1f1
Report normalised CWP values to userland and GDB, not internal representation
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3052 c046a42c-6fe2-441c-8c8c-71466251a162
2007-07-07 20:53:22 +00:00
dc011987f2
Use unsigned 32-bit load for ld/lduw
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3051 c046a42c-6fe2-441c-8c8c-71466251a162
2007-07-07 20:50:33 +00:00
6ef905f69c
Fix wrong number of clean/saveable windows, match Linux startup register values
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3050 c046a42c-6fe2-441c-8c8c-71466251a162
2007-07-07 20:48:42 +00:00
33b3780262
Fix Sparc64 page size
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3047 c046a42c-6fe2-441c-8c8c-71466251a162
2007-07-07 20:44:35 +00:00
46d38ba89d
Fix Sparc64 movr
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3045 c046a42c-6fe2-441c-8c8c-71466251a162
2007-07-04 20:22:35 +00:00
46525e1fbe
Drop unused parameters
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3022 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-25 19:52:58 +00:00
2f2ecb83d7
Fix Sparc64 prefetcha op
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2978 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-10 20:26:38 +00:00
9467d44c4d
Move target-specific defines to the target directories.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2940 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-03 21:02:38 +00:00
bfed01fc79
Clean up of some target specifics in exec.c/cpu-exec.c.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2936 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-03 17:44:37 +00:00
92b72cbcd5
Enable 36-bit physical address space also on 32-bit hosts
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2914 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-01 16:56:47 +00:00
d8bdf5fa13
Sparc64 linux-user build fix
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2913 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-01 16:45:59 +00:00
1b2e93c175
Separate fault for code access to unassigned memory
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2876 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-27 19:36:00 +00:00
20c9f095c4
Implement Sparc64 CPU timers using ptimers
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2860 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-25 18:50:28 +00:00
5dcb6b914e
Use full 36-bit physical address space on SS10
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2830 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-19 12:58:30 +00:00
6c36d3fa86
Enable faults for unassigned memory accesses and unimplemented ASIs
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2824 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-17 19:30:10 +00:00
9455455016
Enable unaligned access faults
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2782 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-07 18:05:05 +00:00
2371aaa295
Fix pc/npc for unaligned load/stores, maybe other exceptions
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2780 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-07 17:01:15 +00:00
b4f0a316b5
Report unassigned memory access to CPU (not enabled yet)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2776 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-06 17:59:24 +00:00
14a1120e5c
Handle division by zero case in Sparc64 udivx and sdivx ops
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2767 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-02 16:37:44 +00:00
5ef62c5c42
More Sparc32 CPUs
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2744 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-29 19:54:32 +00:00
32af58f95f
Fix CPU type zapped by system_reset
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2743 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-29 19:49:15 +00:00
e9ebed4d41
Sparc64 update: more VIS ops
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2714 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-22 19:14:52 +00:00
a68156d016
Constification
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2711 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-22 12:45:28 +00:00
3299908c83
Fix Sparc64 wrfprs, move VIS ops where they belong, more VIS ops
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2656 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-13 15:49:56 +00:00
d2889a3efc
Alignment check mechanism (not fully enabled yet) (Aurelien Jarno)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2655 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-13 15:46:16 +00:00
9b3c35e0e6
cpu_get_phys_page_debug should return target_phys_addr_t
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instead of target_ulong to be consistent.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2633 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-07 11:21:28 +00:00
417454b032
Full implementation of IEEE exceptions (Aurelien Jarno)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2625 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-06 20:03:29 +00:00
c185970a0e
Enforce even float register pair for double register ops (Aurelien Jarno)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2624 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-06 20:02:09 +00:00
9143e59842
Fix stdfq op (Aurelien Jarno)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2604 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-05 18:12:08 +00:00
a4d17f1992
Fix co-processor branch and store ops (Aurelien Jarno)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2603 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-05 18:09:15 +00:00
4f14e88c59
Fix off-by-one error
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2573 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-01 16:23:36 +00:00
e0353fe250
Add SparcStation-10 machine
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2571 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-01 15:55:28 +00:00
8a08f9a809
Fix Sparc shift ops (Aurelien Jarno)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2569 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-01 15:38:17 +00:00
d4218d996d
Fix Sparc lda/ldda/sta/stda asi handling, fault on misaligned register ldd/std and illegal cwp on wrpsr (Aurelien Jarno)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2568 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-01 15:15:36 +00:00
fcc72045e8
Fix Sparc co-processor ops (Aurelien Jarno)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2567 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-01 15:08:21 +00:00
65fe7b09a5
Fix Sparc ASR handling (Aurelien Jarno)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2566 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-01 15:05:09 +00:00
62724a3773
Sparc32/64 CPU selection
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2534 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-25 07:55:52 +00:00
3e736bf4b4
Upgrade Sparc FPU version (based on patch by Aurelien Jarno)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2532 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-24 13:24:09 +00:00
e32f879d1b
Sparc tagged operations (Aurelien Jarno)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2531 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-23 20:01:20 +00:00
9bad0425a0
Fix Sparc branches, original patch by Aurelien Jarno
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2523 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-21 19:45:50 +00:00
9bb234b3b1
Fix qemu crash due to sparc division-by-zero, by Aurelien Jarno.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2510 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-19 19:16:00 +00:00
8294eba187
SPARC host fixes, by Ben Taylor.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2503 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-19 14:47:40 +00:00
bd59780c46
Fix floating point to integer conversion, by Aurelien Jarno.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2413 c046a42c-6fe2-441c-8c8c-71466251a162
2007-02-10 22:58:02 +00:00
01d6a890b4
Sparc arm/mips/sparc register patch, by Martin Bochnig.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2377 c046a42c-6fe2-441c-8c8c-71466251a162
2007-02-02 01:03:34 +00:00
5a7b542bbd
siginfo fix for Darwin/Mac OS X, by Pierre d'Herbemont.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2369 c046a42c-6fe2-441c-8c8c-71466251a162
2007-01-31 12:16:51 +00:00
9042c0e20d
Check ELF binaries for machine type and endianness.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2274 c046a42c-6fe2-441c-8c8c-71466251a162
2006-12-23 14:18:40 +00:00
ec2309289d
sparc-softmmu build fix
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2219 c046a42c-6fe2-441c-8c8c-71466251a162
2006-12-06 15:51:39 +00:00
c688a6eb18
wrwim insn fix (Paul Robinson)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2200 c046a42c-6fe2-441c-8c8c-71466251a162
2006-10-23 21:37:34 +00:00
5ef54116ea
Sparc64 user emulator fixes (Blue Swirl)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2063 c046a42c-6fe2-441c-8c8c-71466251a162
2006-07-18 21:14:09 +00:00
725cb90bf7
sparc64 fixes (Blue Swirl)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2062 c046a42c-6fe2-441c-8c8c-71466251a162
2006-07-18 21:12:17 +00:00
a80dde0837
SPARC FPU optimization (Blue Swirl)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2023 c046a42c-6fe2-441c-8c8c-71466251a162
2006-06-26 19:53:29 +00:00
26a76461f2
C99 64 bit printf
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2018 c046a42c-6fe2-441c-8c8c-71466251a162
2006-06-25 18:15:32 +00:00
6b1575b746
cpu_get_phys_page_debug fix (Blue Swirl)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2010 c046a42c-6fe2-441c-8c8c-71466251a162
2006-06-25 15:33:53 +00:00
13846e700f
Sparc64 BPr branch target fix (Blue Swirl)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2003 c046a42c-6fe2-441c-8c8c-71466251a162
2006-06-23 21:01:56 +00:00
1bdb68ea13
fixed sparc64 cpu fp save/restore
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2001 c046a42c-6fe2-441c-8c8c-71466251a162
2006-06-21 18:48:01 +00:00
65ce8c2fb4
soft floats for SPARC (Blue Swirl)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2000 c046a42c-6fe2-441c-8c8c-71466251a162
2006-06-21 18:37:05 +00:00
ee6c0b51e9
sparc branch fix (Blue Swirl)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1999 c046a42c-6fe2-441c-8c8c-71466251a162
2006-06-21 18:26:15 +00:00
ded3ab80dd
Sparc64 insn fixes (Blue Swirl).
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1993 c046a42c-6fe2-441c-8c8c-71466251a162
2006-06-18 19:36:58 +00:00
55e4f6644e
FPU fix (Joerg Platte)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1962 c046a42c-6fe2-441c-8c8c-71466251a162
2006-06-14 12:37:58 +00:00
d8e3326c8e
MMU no fault fix
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1961 c046a42c-6fe2-441c-8c8c-71466251a162
2006-06-14 12:37:30 +00:00
b854608e0c
sparc condition code computation fix (Even Rouault)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1838 c046a42c-6fe2-441c-8c8c-71466251a162
2006-04-23 21:33:48 +00:00
ba3c64fb47
Initial SPARC SMP support (Blue Swirl)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1694 c046a42c-6fe2-441c-8c8c-71466251a162
2005-12-05 20:31:52 +00:00
227671c93b
PAGE_EXEC support (Blue Swirl)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1692 c046a42c-6fe2-441c-8c8c-71466251a162
2005-12-05 20:29:47 +00:00
c68ea7043f
cpu_single_env usage fix
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1644 c046a42c-6fe2-441c-8c8c-71466251a162
2005-11-21 23:33:12 +00:00
a316d3353c
added CPU_COMMON and CPUState.tb_jmp_cache[]
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1630 c046a42c-6fe2-441c-8c8c-71466251a162
2005-11-20 10:32:34 +00:00
6e256c935c
use direct jump only for jumps in the same page
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1629 c046a42c-6fe2-441c-8c8c-71466251a162
2005-11-20 10:32:05 +00:00
9e61bde56a
sparc merge (Blue Swirl)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1620 c046a42c-6fe2-441c-8c8c-71466251a162
2005-11-11 00:24:58 +00:00
24741ef3de
avoid using physical accesses in user emulation
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1592 c046a42c-6fe2-441c-8c8c-71466251a162
2005-10-30 21:23:39 +00:00
02aab46a36
endianness fix
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1588 c046a42c-6fe2-441c-8c8c-71466251a162
2005-10-30 20:49:44 +00:00
a9049a07bb
moved common softmmu code to common header (Paul Brook)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1580 c046a42c-6fe2-441c-8c8c-71466251a162
2005-10-30 18:16:26 +00:00
bb3911a609
Sparc64 add/sub flag bugs fixed (Blue Swirl)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1579 c046a42c-6fe2-441c-8c8c-71466251a162
2005-10-30 17:28:50 +00:00
aea3ce4c8d
restore regwptr (Blue Swirl)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1576 c046a42c-6fe2-441c-8c8c-71466251a162
2005-10-30 17:06:11 +00:00
8346901560
sparc64 fixes (Blue Swirl)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1514 c046a42c-6fe2-441c-8c8c-71466251a162
2005-07-23 14:27:54 +00:00
ee5bbe38b1
correct split between helper.c and op_helper.c
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1506 c046a42c-6fe2-441c-8c8c-71466251a162
2005-07-04 22:18:23 +00:00
3475187dd8
sparc64 marge (Blue Swirl)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1462 c046a42c-6fe2-441c-8c8c-71466251a162
2005-07-02 14:31:34 +00:00
b3180cdc01
MMU fix (Blue Swirl)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1390 c046a42c-6fe2-441c-8c8c-71466251a162
2005-04-24 10:08:19 +00:00
1fddef4b1b
gdb support for user mode (Paul Brook)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1367 c046a42c-6fe2-441c-8c8c-71466251a162
2005-04-17 19:16:13 +00:00
d39c0b990a
fixed MMU bug on code page boundary
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1362 c046a42c-6fe2-441c-8c8c-71466251a162
2005-04-10 14:40:58 +00:00
ed91024191
defaut case (Blue Swirl)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1348 c046a42c-6fe2-441c-8c8c-71466251a162
2005-04-06 20:44:48 +00:00
c3278b7bf0
sparc exception fix (we go up to the shell prompt)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1343 c046a42c-6fe2-441c-8c8c-71466251a162
2005-03-20 12:43:29 +00:00
7a0e1f41ce
soft float support
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1336 c046a42c-6fe2-441c-8c8c-71466251a162
2005-03-13 17:01:47 +00:00
6eea2b1b81
add missing FORCE_RET (Paul Brook)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1329 c046a42c-6fe2-441c-8c8c-71466251a162
2005-03-13 09:55:49 +00:00
6f7e9aec5e
sparc fixes (Blue Swirl)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1326 c046a42c-6fe2-441c-8c8c-71466251a162
2005-03-13 09:43:36 +00:00
d785e6be4d
x86_64 support
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1320 c046a42c-6fe2-441c-8c8c-71466251a162
2005-03-01 22:33:42 +00:00
55754d9ef2
MMU fixes
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1308 c046a42c-6fe2-441c-8c8c-71466251a162
2005-02-22 19:14:33 +00:00
afc7df1148
PSR.PS fix (Blue Swirl)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1307 c046a42c-6fe2-441c-8c8c-71466251a162
2005-02-22 19:08:57 +00:00
1d6e34fd37
sparc Linux works better with NWINDOWS = 8
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1301 c046a42c-6fe2-441c-8c8c-71466251a162
2005-02-19 17:26:37 +00:00
7483750d7d
sparc fix
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1294 c046a42c-6fe2-441c-8c8c-71466251a162
2005-02-15 22:55:43 +00:00
0bee699e1d
fixed jmpl, rett and call
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1292 c046a42c-6fe2-441c-8c8c-71466251a162
2005-02-13 20:11:30 +00:00
878d3096d2
sparc fixes
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1291 c046a42c-6fe2-441c-8c8c-71466251a162
2005-02-13 19:02:42 +00:00
9d89330183
clean up - comments
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1271 c046a42c-6fe2-441c-8c8c-71466251a162
2005-02-07 23:10:53 +00:00
af7bf89b1f
initial sparc64 support - sparc fixes (Blue Swirl)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1251 c046a42c-6fe2-441c-8c8c-71466251a162
2005-01-30 22:39:04 +00:00
49be803015
endianness fixes
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1250 c046a42c-6fe2-441c-8c8c-71466251a162
2005-01-28 22:40:22 +00:00
bb05683b12
flush TLBs at cpu reset
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1248 c046a42c-6fe2-441c-8c8c-71466251a162
2005-01-28 00:01:00 +00:00
0fa85d43d4
64 bit target support
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1195 c046a42c-6fe2-441c-8c8c-71466251a162
2005-01-03 23:43:32 +00:00
b4ff598727
removed warning
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1194 c046a42c-6fe2-441c-8c8c-71466251a162
2005-01-03 23:43:09 +00:00
e80cfcfc88
SPARC merge
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1179 c046a42c-6fe2-441c-8c8c-71466251a162
2004-12-19 23:18:01 +00:00
0d1a29f9fc
correct handling of saved host registers
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1122 c046a42c-6fe2-441c-8c8c-71466251a162
2004-10-12 22:01:28 +00:00
a0c4cb4a70
sparc fixes
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1117 c046a42c-6fe2-441c-8c8c-71466251a162
2004-10-10 17:46:24 +00:00
7fe48483cd
monitor fixes
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1110 c046a42c-6fe2-441c-8c8c-71466251a162
2004-10-09 18:08:01 +00:00
8d5f07fa3b
sparc merge (Blue Swirl)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1098 c046a42c-6fe2-441c-8c8c-71466251a162
2004-10-04 21:23:09 +00:00
b769d8fef6
removed access_type hack
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1095 c046a42c-6fe2-441c-8c8c-71466251a162
2004-10-03 15:07:13 +00:00
e8af50a30e
full system SPARC emulation (Blue Swirl)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1083 c046a42c-6fe2-441c-8c8c-71466251a162
2004-09-30 21:55:55 +00:00
4e8b5da233
MULSCC fix (Blue Swirl)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1051 c046a42c-6fe2-441c-8c8c-71466251a162
2004-08-24 22:06:03 +00:00
7496f5266c
cpu_single_env init
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@967 c046a42c-6fe2-441c-8c8c-71466251a162
2004-06-22 10:56:50 +00:00
d720b93d0b
precise self modifying code support
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@745 c046a42c-6fe2-441c-8c8c-71466251a162
2004-04-25 17:57:43 +00:00
658138bcbc
flush insn support
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@743 c046a42c-6fe2-441c-8c8c-71466251a162
2004-04-25 17:56:08 +00:00
e19e89a5d4
more log items
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@676 c046a42c-6fe2-441c-8c8c-71466251a162
2004-03-21 17:08:23 +00:00
72cbca10e1
direct chaining support for SPARC
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@607 c046a42c-6fe2-441c-8c8c-71466251a162
2004-02-16 20:30:05 +00:00
3cf1e035ba
added TARGET_LONG_BITS
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@580 c046a42c-6fe2-441c-8c8c-71466251a162
2004-01-24 15:19:09 +00:00
edfcbd9937
added cpu_get_phys_page_debug()
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@578 c046a42c-6fe2-441c-8c8c-71466251a162
2004-01-24 15:11:05 +00:00
612b477d48
removed warnings
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@577 c046a42c-6fe2-441c-8c8c-71466251a162
2004-01-24 15:10:18 +00:00
bd49793889
use generic GenOpFunc
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@543 c046a42c-6fe2-441c-8c8c-71466251a162
2004-01-05 00:06:41 +00:00
cf495bcf9f
SPARC fixes: corrected PC/NPC logic (now slower but can be optimized a lot) - fixed flags computations - added register window exceptions support - fixed mul and div - added mulscc - fixed immediate field decoding
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@484 c046a42c-6fe2-441c-8c8c-71466251a162
2004-01-04 15:01:44 +00:00
e58143b355
ppc fix
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@442 c046a42c-6fe2-441c-8c8c-71466251a162
2003-11-09 14:42:54 +00:00
7a3f194486
sparc emulation target (thanx to Thomas M. Ogrisegg)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@386 c046a42c-6fe2-441c-8c8c-71466251a162
2003-09-30 20:36:07 +00:00
Igor Kovalenko
Blue Swirl
Paul Brook
Anthony Liguori
aliguori
aurel32
blueswir1
pbrook
malc
ths
bellard
j_mayer