9e6f381133
* doc/c-arc.texi (ARC Directives): Revert last change and use
...
@itemize instead of @table.
* doc/c-arm.texi (ARM-Instruction-Set): Likewise.
2013-03-14 16:17:45 +00:00
ba724cfc0c
PR gas/15212
...
* doc/c-arc.texi (ARC Directives): Use @code instead of @bullte
for table format.
* doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
to the @item directives.
(ARM-Neon-Alignment): Move to correct place in the document.
* doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
formatting.
* doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
@smallexample.
2013-03-14 10:00:46 +00:00
70a8bc5bb9
2013-02-25 Terry Guo <terry.guo@arm.com>
...
* config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
* doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
list of accepted CPUs.
2013-02-25 02:53:41 +00:00
5c111e3769
Implement Intel SMAP instructions
...
gas/
PR gas/15159
* config/tc-i386.c (cpu_arch): Add ".smap".
* doc/c-i386.texi: Document smap.
gas/testsuite/
PR gas/15159
* gas/i386/i386.exp: Run smap and x86-64-smap.
* gas/i386/smap.d: New file.
* gas/i386/smap.s: likewise.
* gas/i386/x86-64-smap.d: likewise.
opcodes/
PR gas/15159
* i386-dis.c (rm_table): Add clac and stac to RM_0F01_REG_1.
* i386-gen.c (cpu_flag_init): Add CPU_SMAP_FLAGS.
(cpu_flags): Add CpuSMAP.
* i386-opc.h (CpuSMAP): New.
(i386_cpu_flags): Add cpusmap.
* i386-opc.tbl: Add clac and stac.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2013-02-19 19:10:31 +00:00
36591ba149
2013-02-06 Sandra Loosemore <sandra@codesourcery.com>
...
Andrew Jenner <andrew@codesourcery.com>
Based on patches from Altera Corporation.
bfd/
* Makefile.am (ALL_MACHINES): Add cpu-nios2.lo.
(ALL_MACHINES_CFILES): Add cpu-nios2.c.
(BFD_BACKENDS): Add elf32-nios2.lo.
(BFD32_BACKENDS_CFILES): Add elf32-nios2.c.
* Makefile.in: Regenerated.
* configure.in: Add entries for bfd_elf32_bignios2_vec and
bfd_elf32_littlenios2_vec.
* configure: Regenerated.
* config.bfd: Add cases for nios2.
* archures.c (enum bfd_architecture): Add bfd_arch_nios2.
(bfd_mach_nios2): Define.
(bfd_nios2_arch): Declare.
(bfd_archures_list): Add bfd_nios2_arch.
* targets.c (bfd_elf32_bignios2_vec): Declare.
(bfd_elf32_littlenios2_vec): Declare.
(_bfd_target_vector): Add entries for bfd_elf32_bignios2_vec and
bfd_elf32_littlenios2_vec.
* elf-bfd.h (enum elf_target_id): Add NIOS2_ELF_DATA.
* reloc.c (enum bfd_reloc_code_real): Add Nios II relocations.
* bfd-in2.h: Regenerated.
* libbfd.h: Regenerated.
* cpu-nios2.c: New file.
* elf32-nios2.c: New file.
opcodes/
* Makefile.am (TARGET_LIBOPCODES_CFILES): Add nios2-dis.c and
nios2-opc.c.
* Makefile.in: Regenerated.
* configure.in: Add case for bfd_nios2_arch.
* configure: Regenerated.
* disassemble.c (ARCH_nios2): Define.
(disassembler): Add case for bfd_arch_nios2.
* nios2-dis.c: New file.
* nios2-opc.c: New file.
include/
* dis-asm.h (print_insn_big_nios2): Declare.
(print_insn_little_nios2): Declare.
include/elf
* nios2.h: New file.
include/opcode/
* nios2.h: New file.
gas/
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
(TARGET_CPU_HFILES): Add config/tc-nios2.h.
* Makefile.in: Regenerated.
* configure.tgt: Add case for nios2*-linux*.
* config/obj-elf.c: Conditionally include elf/nios2.h.
* config/tc-nios2.c: New file.
* config/tc-nios2.h: New file.
* doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
* doc/Makefile.in: Regenerated.
* doc/all.texi: Set NIOSII.
* doc/as.texinfo (Overview): Add Nios II options.
(Machine Dependencies): Include c-nios2.texi.
* doc/c-nios2.texi: New file.
* NEWS: Note Altera Nios II support.
gas/testsuite/
* gas/nios2/add.d: New.
* gas/nios2/add.s: New.
* gas/nios2/align_fill.d: New.
* gas/nios2/align_fill.s: New.
* gas/nios2/align_text.d: New.
* gas/nios2/align_text.s: New.
* gas/nios2/and.d: New.
* gas/nios2/and.s: New.
* gas/nios2/branch.d: New.
* gas/nios2/branch.s: New.
* gas/nios2/break.d: New.
* gas/nios2/break.s: New.
* gas/nios2/bret.d: New.
* gas/nios2/bret.s: New.
* gas/nios2/cache.d: New.
* gas/nios2/cache.s: New.
* gas/nios2/call26.d: New.
* gas/nios2/call26.s: New.
* gas/nios2/call.d: New.
* gas/nios2/call.s: New.
* gas/nios2/cmp.d: New.
* gas/nios2/cmp.s: New.
* gas/nios2/comments.d: New.
* gas/nios2/comments.s: New.
* gas/nios2/complex.d: New.
* gas/nios2/complex.s: New.
* gas/nios2/ctl.d: New.
* gas/nios2/ctl.s: New.
* gas/nios2/custom.d: New.
* gas/nios2/custom.s: New.
* gas/nios2/etbt.d: New.
* gas/nios2/etbt.s: New.
* gas/nios2/flushda.d: New.
* gas/nios2/flushda.s: New.
* gas/nios2/illegal.l: New.
* gas/nios2/illegal.s: New.
* gas/nios2/jmp.d: New.
* gas/nios2/jmp.s: New.
* gas/nios2/ldb.d: New.
* gas/nios2/ldb.s: New.
* gas/nios2/ldh.d: New.
* gas/nios2/ldh.s: New.
* gas/nios2/ldw.d: New.
* gas/nios2/ldw.s: New.
* gas/nios2/lineseparator.d: New.
* gas/nios2/lineseparator.s: New.
* gas/nios2/mov.d: New.
* gas/nios2/movia.d: New.
* gas/nios2/movia.s: New.
* gas/nios2/movi.d: New.
* gas/nios2/movi.s: New.
* gas/nios2/mov.s: New.
* gas/nios2/mul.d: New.
* gas/nios2/mul.s: New.
* gas/nios2/nios2.exp: New.
* gas/nios2/nor.d: New.
* gas/nios2/nor.s: New.
* gas/nios2/or.d: New.
* gas/nios2/or.s: New.
* gas/nios2/ret.d: New.
* gas/nios2/ret.s: New.
* gas/nios2/rol.d: New.
* gas/nios2/rol.s: New.
* gas/nios2/rotate.d: New.
* gas/nios2/rotate.s: New.
* gas/nios2/stb.d: New.
* gas/nios2/stb.s: New.
* gas/nios2/sth.d: New.
* gas/nios2/sth.s: New.
* gas/nios2/stw.d: New.
* gas/nios2/stw.s: New.
* gas/nios2/sub.d: New.
* gas/nios2/sub.s: New.
* gas/nios2/sync.d: New.
* gas/nios2/sync.s: New.
* gas/nios2/trap.d: New.
* gas/nios2/trap.s: New.
* gas/nios2/tret.d: New.
* gas/nios2/tret.s: New.
* gas/nios2/warn_noat.l: New.
* gas/nios2/warn_noat.s: New.
* gas/nios2/warn_nobreak.l: New.
* gas/nios2/warn_nobreak.s: New.
* gas/nios2/xor.d: New.
* gas/nios2/xor.s: New.
ld/
* Makefile.am (enios2elf.c): New rule.
* Makefile.in: Regenerated.
* configure.tgt: Add case for nios2*-*-*.
* emulparams/nios2elf.sh: New file.
* NEWS: Note Altera Nios II support.
ld/testsuite/
* ld-nios2/emit-relocs-1a.s: New.
* ld-nios2/emit-relocs-1b.s: New.
* ld-nios2/emit-relocs-1.d: New.
* ld-nios2/emit-relocs-1.ld: New.
* ld-nios2/gprel.d: New.
* ld-nios2/gprel.s: New.
* ld-nios2/hilo16.d: New.
* ld-nios2/hilo16.s: New.
* ld-nios2/hilo16_symbol.s: New.
* ld-nios2/imm5.d: New.
* ld-nios2/imm5.s: New.
* ld-nios2/imm5_symbol.s: New.
* ld-nios2/nios2.exp: New.
* ld-nios2/pcrel16.d: New.
* ld-nios2/pcrel16_label.s: New.
* ld-nios2/pcrel16.s: New.
* ld-nios2/relax_callr.d: New.
* ld-nios2/relax_callr.ld: New.
* ld-nios2/relax_callr.s: New.
* ld-nios2/relax_cjmp.d: New.
* ld-nios2/relax_cjmp.s: New.
* ld-nios2/relax_jmp.ld: New.
* ld-nios2/relax_section.d: New.
* ld-nios2/relax_section.s: New.
* ld-nios2/relax_ujmp.d: New.
* ld-nios2/relax_ujmp.s: New.
* ld-nios2/reloc.d: New.
* ld-nios2/reloc.s: New.
* ld-nios2/reloc_symbol.s: New.
* ld-nios2/s16.d: New.
* ld-nios2/s16.s: New.
* ld-nios2/s16_symbol.s: New.
* ld-nios2/u16.d: New.
* ld-nios2/u16.s: New.
* ld-nios2/u16_symbol.s: New.
* ld-elf/indirect.exp: Skip on targets that don't support
-shared -fPIC.
* ld-elfcomm/elfcomm.exp: Build with -G0 for nios2.
* ld-plugin/lto.exp: Skip shared library tests on targets that
don't support them. Skip execution tests on non-native targets.
binutils/
* readelf.c: Include elf/nios2.h.
(dump_relocations): Add case for EM_ALTERA_NIOS2.
(get_nios2_dynamic_type): New.
(get_dynamic_type): Add case for EM_ALTERA_NIOS2.
(is_32bit_abs_reloc): Fix EM_ALTERA_NIOS2 case.
(is_16bit_abs_reloc): Likewise.
(is_none_reloc): Add EM_ALTERA_NIOS2 and EM_NIOS32 cases.
* NEWS: Note Altera Nios II support.
* MAINTAINERS: Add Nios II maintainers.
2013-02-06 23:22:26 +00:00
ace9af6f59
Add "@c man" markers to doc/c-metag.texi
...
* doc/c-metag.texi: Add "@c man" markers.
2013-02-04 20:29:21 +00:00
78c8d46ca4
Add support for V850E3V5 architecture
2013-01-24 11:14:05 +00:00
5817ffd1f8
include/opcode/
...
* ppc.h (PPC_OPCODE_POWER8): New define.
(PPC_OPCODE_HTM): Likewise.
opcodes/
* ppc-dis.c (ppc_opts): Add "power8", "pwr8" and "htm" entries.
* ppc-opc.c (HTM_R, HTM_SI, XRTRB_MASK, XRTRARB_MASK, XRTLRARB_MASK,
XRTARARB_MASK, XRTBFRARB_MASK, XRCL, POWER8, PPCHTM): New defines.
(SH6): Update.
<"tabort.", "tabortdc.", "tabortdci.", "tabortwc.",
"tabortwci.", "tbegin.", "tcheck", "tend.", "trechkpt.",
"treclaim.", "tsr.">: Add POWER8 HTM opcodes.
<"tendall.", "tresume.", "tsuspend.">: Add POWER8 HTM extended opcodes.
gas/
* doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
* doc/c-ppc.texi (PowerPC-Opts): Likewise.
* config/tc-ppc.c (md_show_usage): Likewise.
(ppc_handle_align): Handle power8's group ending nop.
gas/testsuite/
* gas/ppc/htm.d: New test.
* gas/ppc/htm.s: Likewise.
* gas/ppc/power8.d: Likewise.
* gas/ppc/power8.s: Likewise.
* gas/ppc/ppc.exp: Run them.
2013-01-11 02:25:36 +00:00
34bca50861
Remove trailing white spaces on gas
...
* app.c: Remove trailing white spaces.
* as.c: Likewise.
* as.h: Likewise.
* cond.c: Likewise.
* dw2gencfi.c: Likewise.
* dwarf2dbg.h: Likewise.
* ecoff.c: Likewise.
* input-file.c: Likewise.
* itbl-lex.h: Likewise.
* output-file.c: Likewise.
* read.c: Likewise.
* sb.c: Likewise.
* subsegs.c: Likewise.
* symbols.c: Likewise.
* write.c: Likewise.
* config/tc-i386.c: Likewise.
* doc/Makefile.am: Likewise.
* doc/Makefile.in: Likewise.
* doc/c-aarch64.texi: Likewise.
* doc/c-alpha.texi: Likewise.
* doc/c-arc.texi: Likewise.
* doc/c-arm.texi: Likewise.
* doc/c-avr.texi: Likewise.
* doc/c-bfin.texi: Likewise.
* doc/c-cr16.texi: Likewise.
* doc/c-d10v.texi: Likewise.
* doc/c-d30v.texi: Likewise.
* doc/c-h8300.texi: Likewise.
* doc/c-hppa.texi: Likewise.
* doc/c-i370.texi: Likewise.
* doc/c-i386.texi: Likewise.
* doc/c-i860.texi: Likewise.
* doc/c-m32c.texi: Likewise.
* doc/c-m32r.texi: Likewise.
* doc/c-m68hc11.texi: Likewise.
* doc/c-m68k.texi: Likewise.
* doc/c-microblaze.texi: Likewise.
* doc/c-mips.texi: Likewise.
* doc/c-msp430.texi: Likewise.
* doc/c-mt.texi: Likewise.
* doc/c-s390.texi: Likewise.
* doc/c-score.texi: Likewise.
* doc/c-sh.texi: Likewise.
* doc/c-sh64.texi: Likewise.
* doc/c-tic54x.texi: Likewise.
* doc/c-tic6x.texi: Likewise.
* doc/c-v850.texi: Likewise.
* doc/c-xc16x.texi: Likewise.
* doc/c-xgate.texi: Likewise.
* doc/c-xtensa.texi: Likewise.
* doc/c-z80.texi: Likewise.
* doc/internals.texi: Likewise.
2013-01-10 19:51:55 +00:00
a3c629886c
* common.h: Fix case of "Meta".
...
* metag.h: New file.
* dis-asm.h (print_insn_metag): New declaration.
* metag.h: New file.
* Makefile.am: Add Meta.
* Makefile.in: Regenerate.
* configure: Regenerate.
* configure.in: Add Meta.
* disassemble.c: Add Meta support.
* metag-dis.c: New file.
* Makefile.am: Add Meta.
* Makefile.in: Regenerate.
* archures.c (bfd_mach_metag): New.
* bfd-in2.h: Regenerate.
* config.bfd: Add Meta.
* configure: Regenerate.
* configure.in: Add Meta.
* cpu-metag.c: New file.
* elf-bfd.h: Add Meta.
* elf32-metag.c: New file.
* elf32-metag.h: New file.
* libbfd.h: Regenerate.
* reloc.c: Add Meta relocations.
* targets.c: Add Meta.
* Makefile.am: Add Meta.
* Makefile.in: Regenerate.
* config/tc-metag.c: New file.
* config/tc-metag.h: New file.
* configure.tgt: Add Meta.
* doc/Makefile.am: Add Meta.
* doc/Makefile.in: Regenerate.
* doc/all.texi: Add Meta.
* doc/as.texiinfo: Document Meta options.
* doc/c-metag.texi: New file.
* gas/metag/labelarithmetic.d: New file.
* gas/metag/labelarithmetic.s: New file.
* gas/metag/metacore12.d: New file.
* gas/metag/metacore12.s: New file.
* gas/metag/metacore21-invalid.l: New file.
* gas/metag/metacore21-invalid.s: New file.
* gas/metag/metacore21.d: New file.
* gas/metag/metacore21.s: New file.
* gas/metag/metacore21ext.d: New file.
* gas/metag/metacore21ext.s: New file.
* gas/metag/metadsp21-invalid.l: New file.
* gas/metag/metadsp21-invalid.s: New file.
* gas/metag/metadsp21.d: New file.
* gas/metag/metadsp21.s: New file.
* gas/metag/metadsp21ext.d: New file.
* gas/metag/metadsp21ext.s: New file.
* gas/metag/metafpu21.d: New file.
* gas/metag/metafpu21.s: New file.
* gas/metag/metafpu21ext.d: New file.
* gas/metag/metafpu21ext.s: New file.
* gas/metag/metag.exp: New file.
* gas/metag/tls.d: New file.
* gas/metag/tls.s: New file.
* Makefile.am: Add Meta.
* Makefile.in: Regenerate.
* configure.tgt: Add Meta.
* emulparams/elf32metag.sh: New file.
* emultempl/metagelf.em: New file.
* ld-elf/merge.d: Mark Meta as xfail.
* ld-gc/start.d: Skip this test on Meta.
* ld-gc/personality.d: Skip this test on Meta.
* ld-metag/external.s: New file.
* ld-metag/metag.exp: New file.
* ld-metag/pcrel.d: New file.
* ld-metag/pcrel.s: New file.
* ld-metag/shared.d: New file.
* ld-metag/shared.r: New file.
* ld-metag/shared.s: New file.
* ld-metag/stub.d: New file.
* ld-metag/stub.s: New file.
* ld-metag/stub_pic_app.d: New file.
* ld-metag/stub_pic_app.r: New file.
* ld-metag/stub_pic_app.s: New file.
* ld-metag/stub_pic_shared.d: New file.
* ld-metag/stub_pic_shared.s: New file.
* ld-metag/stub_shared.d: New file.
* ld-metag/stub_shared.r: New file.
* ld-metag/stub_shared.s: New file.
* binutils/readelf.c: (guess_is_rela): Add EM_METAG.
(dump_relocations): Add EM_METAG.
(get_machine_name): Correct case for Meta.
(is_32bit_abs_reloc): Add support for Meta ADDR32 reloc.
(is_none_reloc): Add support for Meta NONE reloc.
2013-01-10 09:49:22 +00:00
a4ac1c4251
* doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
...
* doc/c-score.texi (SCORE-Opts): Likewise.
* doc/c-tic54x.texi (TIC54X-Directives): Likewise.
2013-01-06 17:50:21 +00:00
5bf135a788
Add copyright notices
2012-12-17 16:56:12 +00:00
de863c7475
2012-11-09 Nick Clifton <nickc@redhat.com>
...
* Makefile.am (ALL_MACHINES): Add cpu-v850-rh850.lo.
(ALL_MACHINES_CFILES): Add cpu-v850-rh850.c.
* archures.c (bfd_arch_info): Add bfd_v850_rh850_arch.
* config.bfd: Likewise.
* configure.in: Add bfd_elf32_v850_rh850_vec.
* cpu-v850.c: Update printed description.
* cpu-v850_rh850.c: New file.
* elf32-v850.c (v850_elf_check_relocs): Add support for RH850 ABI
relocs.
(v850_elf_perform_relocation): Likewise.
(v850_elf_final_link_relocate): Likewise.
(v850_elf_relocate_section): Likewise.
(v850_elf_relax_section): Likewise.
(v800_elf_howto_table): New.
(v850_elf_object_p): Add support for RH850 ABI values.
(v850_elf_final_write_processing): Likewise.
(v850_elf_merge_private_bfd_data): Likewise.
(v850_elf_print_private_bfd_data): Likewise.
(v800_elf_reloc_map): New.
(v800_elf_reloc_type_lookup): New.
(v800_elf_reloc_name_lookup): New.
(v800_elf_info_to_howto): New.
(bfd_elf32_v850_rh850_vec): New.
(bfd_arch_v850_rh850): New.
* targets.c (_bfd_targets): Add bfd_elf32_v850_rh850_vec.
* Makefile.in: Regenerate.
* bfd-in2.h: Regenerate.
* configure: Regenerate.
* readelf.c (get_machine_flags): Add support for E_FLAG_RX_ABI.
(guess_is_rela): Add EM_V800.
(dump_relocations): Likewise.
(get_machine_name): Update EM_V800.
(get_machine_flags): Add support for RH850 ABI flags.
(is_32bit_abs_reloc): Add support for RH850 ABI reloc.
* config/tc-v850.c (v850_target_arch): New.
(v850_target_format): New.
(set_machine): Use v850_target_arch.
(md_begin): Likewise.
(md_show_usage): Document new switches.
(md_parse_option): Add -mgcc-abi, -mrh850-abi, -m8byte-align and
-m4byte-align.
* config/tc-v850.c (TARGET_ARCH) Use v850_target_arch.
(TARGET_FORMAT): Use v850_target_format.
* doc/c-v850.texi: Document new options.
* v850.h: Add RH850 ABI values.
* Makefile.am: (ALL_EMULATION_SOURCES): Add ev850_rh850.c.
* Makefile.in: Regenerate.
* configure.tgt (v850*-*-*): Make v850_rh850 the default
emulation. Add vanilla v850 as an extra emulation.
* emulparams/v850_rh850.sh: New file.
* scripttempl/v850_rh850.sc: New file.
* configure.in: Add bfd_v850_rh850_arch.
* configure: Regenerate.
* disassemble.c (disassembler): Likewise.
2012-11-09 17:36:19 +00:00
708e2187a3
2012-11-09 Nick Clifton <nickc@redhat.com>
...
* elf32-rx.c (describe_flags): New function. Returns a buffer
containing a description of the E_FLAG_RX_... values set.
(rx_elf_merge_private_bfd_data): Use it.
(rx_elf_print_private_bfd_data): Likewise.
(elf32_rx_machine): Skip EF_RX_CPU_RX check.
(elf32_rx_special_sections): Define.
(elf_backend_special_sections): Define.
2012-11-09 Nick Clifton <nickc@redhat.com>
* readelf.c (get_machine_flags): Add support for E_FLAG_RX_ABI.
2012-11-09 Nick Clifton <nickc@redhat.com>
* config/obj-elf.c (obj_elf_change_section): Allow init array
sections to have the SHF_EXECINSTR attribute for the RX target.
* config/tc-rx.c (elf_flags): Initialise with E_FLAG_RX_ABI.
(enum options): Add OPTION_USES_GCC_ABI and OPTION_USES_RX_ABI.
(md_longopts): Add -mgcc-abi and -mrx-abi.
(md_parse_option): Add support for OPTION_USES_GCC_ABI and
OPTION_USES_RX_ABI.
* doc/as.texinfo (RX Options): Add mention of remaining RX
options.
* doc/c-rx.texi: Document -mgcc-abi and -mrx-abi.
2012-11-09 Nick Clifton <nickc@redhat.com>
* rx.h (EF_RX_CPU_RX): Add comment.
(E_FLAG_RX_ABI): Define.
2012-11-09 Nick Clifton <nickc@redhat.com>
* emultempl/rxelf.em (no_flag_mismatch_warnings): Initialise to
true.
(PARSE_AND_LIST_LONGOPTS): Add flag-mismatch-warnings.
(PARSE_AND_LIST_ARG_CASES): Add support for
--flag-mismatch-warnings.
2012-11-09 17:00:44 +00:00
3bfcb6528e
bfd:
...
* elf32-arm.c (elf32_arm_print_private_bfd_data): Recognise and
display the new ARM hard-float/soft-float ABI flags for EABI_VER5
(elf32_arm_post_process_headers): Add the hard-float/soft-float
ABI flag as appropriate for ET_DYN/ET_EXEC in EABI_VER5.
binutils:
* readelf.c (decode_ARM_machine_flags): Recognise and display the
new ARM hard-float/soft-float ABI flags for EABI_VER5. Split out
the code for EABI_VER4 and EABI_VER5 to allow this.
elfcpp:
* arm.h: New enum for EABI soft- and hard-float flags.
gold:
* gold.cc (Target_arm::do_adjust_elf_header): Add the
hard-float/soft-float ABI flag as appropriate for ET_DYN/ET_EXEC
in EABI_VER5.
include:
* elf/arm.h (EF_ARM_ABI_FLOAT_SOFT): New define.
(EF_ARM_ABI_FLOAT_HARD): Likewise.
ld/testsuite:
* ld-arm/eabi-hard-float.s: New test source.
* ld-arm/eabi-soft-float.s: New test source.
* ld-arm/eabi-hard-float.d: New test.
* ld-arm/eabi-soft-float.d: New test.
* ld-arm/eabi-soft-float-ABI4.d: New test.
* ld-arm/eabi-soft-float-r.d: New test.
* ld-arm/arm-elf.xp: Use the new tests.
binutils:
PR binutils/14779
* configure.in: Add checks for wchar.h and mbstate_t.
* config.in: Regenerate.
* configure: Regenerate.
* readelf.c: Conditionally include wchar.h.
(print_symbol): Conditionally use mbstate_t.
2012-10-30 12:44:58 +00:00
70e0ee1a27
* doc/as.texinfo: Add missing documentation about section flag
...
exclude.
2012-10-18 06:46:51 +00:00
b36546d2d5
gas/
...
* doc/as.texinfo (-mpwr4, -mpwr7): Fix option name typos.
2012-10-12 18:03:09 +00:00
5e5c50d37b
Add AMD bdver3 support.
...
gas/
* config/tc-i386.c (cpu_arch): Add CPU_BDVER3_FLAGS.
* doc/c-i386.texi: Add -march=bdver3 option.
gas/testsuite/
* gas/i386/i386.exp: Run bdver3 test cases.
* gas/i386/nops-1-bdver3.d: New.
* gas/i386/arch-10-bdver3.d: New.
* gas/i386/x86-64-nops-1-bdver3.d: New.
* gas/i386/x86-64-arch-2-bdver3.d: New.
opcodes/
* i386-gen.c (cpu_flag_init): Add CPU_BDVER3_FLAGS.
* i386-init.h: Regenerated.
2012-10-09 08:43:06 +00:00
cfc7277920
2012-10-04 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
...
* config/tc-s390.c (s390_parse_cpu): Add new option zEC12.
* doc/as.texinfo: Document new option zEC12.
* doc/c-s390.texi: Likewise.
2012-10-04 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* gas/s390/s390.exp: Run zEC12 tests.
* gas/s390/zarch-zEC12.d: New file.
* gas/s390/zarch-zEC12.s: New file.
2012-10-04 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* s390-mkopc.c: Support new option zEC12.
* s390-opc.c: Add new instruction formats.
* s390-opc.txt: Add new instructions for zEC12.
2012-10-04 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* s390.h (s390_opcode_cpu_val): Add S390_OPCODE_ZEC12.
2012-10-04 08:47:36 +00:00
60aa667ec4
Replace CpuSSE3 with CpuCX16 for cmpxchg16b
...
gas/
* config/tc-i386.c (cpu_arch): Add .cx16.
* doc/c-i386.texi: Document .cx16.
gas/testsuite/
* gas/i386/x86-64-arch-2.s: Add test for cmpxchg16b.
* gas/i386/x86-64-arch-2.d: Update correspondingly.
* gas/i386/x86-64-arch-2-bdver2.d: Likewise.
* gas/i386/x86-64-arch-2-btver1.d: Likewise.
* gas/i386/x86-64-arch-2-btver2.d: Likewise.
* gas/i386/x86-64-arch-2-lzcnt.d: Likewise.
* gas/i386/x86-64-arch-2-prefetchw.d: Likewise.
* gas/i386/ilp32/x86-64-arch-2.d: Likewise.
opcodes/
* i386-gen.c (cpu_flag_init): Add CpuCX16 to CPU_NOCONA_FLAGS,
CPU_CORE_FLAGS, CPU_CORE2_FLAGS, CPU_COREI7_FLAGS,
CPU_BDVER1_FLAGS, CPU_BDVER2_FLAGS, CPU_BTVER1_FLAGS,
CPU_BTVER2_FLAGS. Add CPU_CX16_FLAGS.
(cpu_flags): Add CpuCX16.
* i386-opc.h (CpuCX16): New.
(i386_cpu_flags): Add cpucx16.
* i386-opc.tbl: Replace CpuSSE3 with CpuCX16 for cmpxchg16b.
* i386-tbl.h: Regenerate.
* i386-init.h: Likewise.
2012-09-20 11:53:33 +00:00
1dd5381629
2012-09-06 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
...
* config/tc-s390.c (set_highgprs_p): New variable.
(s390_machinemode): New function.
(md_pseudo_table): Add new pseudo command machinemode.
(md_parse_option): Set set_highgprs_p to TRUE if -mzarch was
specified on command line.
(s390_elf_final_processing): Set the highgprs flag in the ELF
header depending on set_highgprs_p.
* doc/c-s390.texi: Document new pseudo machinemode.
2012-09-06 08:23:25 +00:00
b4b783be19
* doc/as.texinfo: Document -mvle.
...
Missed with the original port commit.
Committed as obvious / trivial.
2012-09-05 18:19:55 +00:00
47527d7eb3
* gas/doc/c-ppc.texi: Document -mvle.
...
This was missing from the initial VLE port commit.
Committed as obvious / trivial.
2012-09-05 18:01:00 +00:00
b192990071
* doc/c-mips.texi (MIPS Opts): Correct a typo in the -mips5
...
option.
2012-08-31 19:15:59 +00:00
e5b95258d9
Add support for constructing pc-relative addresses to the plt, by
...
adding the necessary assembly operators and relocations.
bfd:
* reloc.c (Add BFD_RELOC_TILEGX_IMM16_X0_HW0_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X1_HW0_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X0_HW1_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X1_HW1_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X0_HW2_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X1_HW2_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X0_HW3_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X1_HW3_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_PLT_PCREL): new relocations.
* elfxx-tilegx.c (tilegx_elf_howto_table): Handle new relocations.
(tilegx_reloc_map): Ditto.
(reloc_to_create_func): Ditto.
(tilegx_elf_check_relocs): Ditto.
(tilegx_elf_gc_sweep_hook): Ditto.
(tilegx_elf_relocate_section): Ditto.
* libbfd.h: Regenerate.
* bfd-in2.h: Regenerate.
gas:
* tc-tilegx.c (O_hw0_plt): Define operator.
(O_hw1_plt): Ditto.
(O_hw1_last_plt): Ditto.
(O_hw2_last_plt): Ditto.
(md_begin): Handle new operators.
(emit_tilegx_instruction): Ditto.
(md_apply_fix): Ditto.
* doc/c-tilegx.texi: Document new operators.
include/elf:
* tilegx.h (R_TILEGX_IMM16_X0_HW0_PLT_PCREL): New relocation.
(R_TILEGX_IMM16_X1_HW0_PLT_PCREL): Ditto.
(R_TILEGX_IMM16_X0_HW1_PLT_PCREL): Ditto.
(R_TILEGX_IMM16_X1_HW1_PLT_PCREL): Ditto.
(R_TILEGX_IMM16_X0_HW2_PLT_PCREL): Ditto.
(R_TILEGX_IMM16_X1_HW2_PLT_PCREL): Ditto.
(R_TILEGX_IMM16_X0_HW3_PLT_PCREL): Ditto.
(R_TILEGX_IMM16_X1_HW3_PLT_PCREL): Ditto.
(R_TILEGX_IMM16_X0_HW0_LAST_PLT_PCREL): Ditto.
(R_TILEGX_IMM16_X1_HW0_LAST_PLT_PCREL): Ditto.
(R_TILEGX_IMM16_X0_HW1_LAST_PLT_PCREL): Ditto.
(R_TILEGX_IMM16_X1_HW1_LAST_PLT_PCREL): Ditto.
(R_TILEGX_IMM16_X0_HW2_LAST_PLT_PCREL ): Ditto.
(R_TILEGX_IMM16_X1_HW2_LAST_PLT_PCREL): Ditto.
2012-08-28 02:43:22 +00:00
bca3892142
* bfd/elf32-arm.c (v8): New array.
...
(tag_cpu_arch_combine): Add support for ARMv8 attributes.
(elf32_arm_merge_eabi_attributes): Likewise.
(VFP_VERSION_COUNT): New define.
* binutils/readelf.c (arm_attr_tag_CPU_arch): Update for ARMv8.
(arm_attr_tag_FP_arch): Likewise.
(arm_attr_tag_Advanced_SIMD_arch): Likewise.
* gas/config/tc-arm.h (arm_ext_v8): New variable.
(fpu_vfp_ext_armv8): Likewise.
(fpu_neon_ext_armv8): Likewise.
(fpu_crypto_ext_armv8): Likewise.
(arm_archs): Add armv8-a.
(arm_extensions): Add crypto, fp, and simd.
(arm_fpus): Add fp-armv8, neon-fp-armv8, crypto-neon-fp-armv8.
(cpu_arch_ver): Add support for ARMv8.
(aeabi_set_public_sttributes): Likewise.
* gas/doc/c-arm.texi (ARM Options): Document new architecture and
extension options for ARMv8.
* gas/testsuite/gas/arm/attr-march-all.d: Update for change in expected
output.
* gas/testsuite/gas/arm/attr-mfpu-vfpv4-d16.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfpv4.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv8-a+crypto.d: New testcase.
* gas/testsuite/gas/arm/attr-march-armv8-a+fp.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv8-a+simd.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv8-a.d: Likewise.
* include/elf/arm.h (TAG_CPU_ARCH_V8): New define.
(MAX_TAG_CPU_ARCH): Update.
* include/opcode/arm.h (ARM_EXT_V8): New define.
(FPU_VFP_EXT_ARMV8): Likewise.
(FPU_NEON_EXT_ARMV8): Likewise.
(FPU_CRYPTO_EXT_ARMV8): Likewise.
(ARM_AEXT_V8A): Likewise.
(FPU_VFP_ARMV8): Likwise.
(FPU_NEON_ARMV8): Likewise.
(FPU_CRYPTO_ARMV8): Likewise.
(FPU_ARCH_VFP_ARMV8): Likewise.
(FPU_ARCH_NEON_VFP_ARMV8): Likewise.
(FPU_ARCH_CRYPTO_NEON_VFP_ARMV8): Likewise.
(ARM_ARCH_V8A): Likwise.
(ARM_ARCH_V8A_FP): Likewise.
(ARM_ARCH_V8A_SIMD): Likewise.
(ARM_ARCH_V8A_CRYPTO): Likewise.
* ld/testsuite/ld-arm/arm-elf.exp: Add new testcases.
* ld/testsuite/ld-arm/attr-merge-vfp-3.d: Update for change in expected
output.
* ld/testsuite/ld-arm/attr-merge-vfp-3r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-4.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-4r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-5.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-5r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-7.d: New testcase.
* ld/testsuite/ld-arm/attr-merge-vfp-7r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-armv8-hard.s: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-armv8.s: Likewise.
2012-08-24 07:50:38 +00:00
542385d9f7
Replace --n32 with --x32
...
* doc/as.texinfo: Replace --n32 with --x32.
2012-08-20 13:57:05 +00:00
7b458c12dc
Add AMD btver1 and btver2 support
...
gas/
2012-08-17 Nagajyothi Eggone <nagajyothi.eggone@amd.com>
* config/tc-i386.c (cpu_arch): Add CPU_BTVER1_FLAGS and
CPU_BTVER2_FLAGS.
(i386_align_code): Add case for PROCESSOR_BT.
* config/tc-i386.h (enum processor_type): Add PROCESSOR_BT.
* doc/c-i386.texi: Add -march={btver1, btver2} options.
gas/testsuite/
2012-08-17 Nagajyothi Eggone <nagajyothi.eggone@amd.com>
* gas/i386/i386.exp: Run btver1 and btver2 test cases.
* gas/i386/nops-1-btver1.d: New.
* gas/i386/nops-1-btver2.d: New.
* gas/i386/arch-10-btver1.d: New.
* gas/i386/arch-10-btver2.d: New.
* gas/i386/x86-64-nops-1-btver1.d: New.
* gas/i386/x86-64-nops-1-btver2.d: New.
* gas/i386/x86-64-arch-2-btver1.d: New.
* gas/i386/x86-64-arch-2-btver2.d: New.
opcodes/
2012-08-17 Nagajyothi Eggone <nagajyothi.eggone@amd.com>
* i386-gen.c (cpu_flag_init): Add CPU_BTVER1_FLAGS and
CPU_BTVER2_FLAGS.
* i386-opc.h: Update CpuPRFCHW comment.
* i386-opc.tbl: Enable prefetch instruction for CpuPRFCHW.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2012-08-17 17:12:36 +00:00
a06ea96464
Add support for 64-bit ARM architecture: AArch64
2012-08-13 14:52:54 +00:00
711eefe492
2012-08-01 Catherine Moore <clm@codesourcery.com>
...
Sandra Loosemore <sandra@codesourcery.com>
gas/
* config/mips/tc-mips.c (mips_cpu_info): Add the 34kn.
* doc/c-mips.texi (MIPS Opts): Document it.
2012-08-01 19:59:43 +00:00
e2e1fcde62
Implement RDRSEED, ADX and PRFCHW instructions
...
gas/
* config/tc-i386.c: Add ADX, RDSEED and PRFCHW asm directives.
* doc/c-i386.texi: Document the new directives.
gas/testsuite/
* gas/i386/i386.exp: Run adx, rdseed and prefetchw tests.
* gas/i386/x86-64-arch-2.s: Use prefetchw as 3dnow and Prfchw tests.
* gas/i386/arch-10.s: Likewise.
* gas/i386/arch-10-1.l: Changed correspondingly.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/arch-10.d: Likewise.
* gas/i386/arch-10-lzcnt.d: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
* gas/i386/x86-64-arch-2-lzcnt.d: Likewise.
* gas/i386/ilp32/x86-64-arch-2.d: Likewise.
* gas/i386/arch-10-prefetchw.d: New file.
* gas/i386/x86-64-arch-2-prefetchw.d: Likewise.
* gas/i386/rdseed.s: Likewise.
* gas/i386/rdseed.d: Likewise.
* gas/i386/rdseed-intel.d: Likewise.
* gas/i386/adx.s: Likewise.
* gas/i386/adx.d: Likewise.
* gas/i386/adx-intel.d: Likewise.
* gas/i386/x86-64-rdseed.s: Likewise.
* gas/i386/x86-64-rdseed.d: Likewise.
* gas/i386/x86-64-rdseed-intel.d: Likewise.
* gas/i386/x86-64-adx.s: Likewise.
* gas/i386/x86-64-adx.d: Likewise.
* gas/i386/x86-64-adx-intel.d: Likewise.
opcodes/
* i386-dis.c (PREFIX_0F38F6): New.
(prefix_table): Add adcx, adox instructions.
(three_byte_table): Use PREFIX_0F38F6.
(mod_table): Add rdseed instruction.
* i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW.
(cpu_flags): Likewise.
* i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW.
(i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw.
* i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend
prefetchw.
* i386-tbl.h: Regenerate.
* i386-init.h: Likewise.
2012-07-16 12:58:29 +00:00
d416e51da0
gas/
...
* read.c [HANDLE_BUNDLE] (bundle_lock_depth): New variable.
(read_a_source_file) [HANDLE_BUNDLE]: Reset it.
[HANDLE_BUNDLE] (s_bundle_lock, s_bundle_unlock): Allow nested
pairs.
gas/testsuite/
* gas/i386/bundle-bad.s: Remove nested .bundle_lock case.
* gas/i386/bundle-bad.l: Remove expected error line.
* gas/i386/bundle-lock.s: Add nested .bundle_lock case.
* gas/i386/bundle-lock.d: Update expectations.
2012-05-29 16:32:11 +00:00
7bfd842d05
* read.c (read_symbol_name): New function. Reads a symbol names.
...
Allows escape codes in names.
(s_comm_internal): Use read_symbol_name.
(s_globl, s_lsym, s_set, s_weakref): Likewise.
* doc/as.texinfo: Document support for multibyte characters in
symbol names.
* gas/elf/syms.s: New test - checks the generation of multibyte
symbol names.
* gas/elf/syms.d: New file - expected readelf output.
* gas/elf/elf.exp: Add syms.
* readelf.c (print_symbol): Display multibyte characters in symbol
names.
(process_section_headers): Use print_symbol.
* ld-ifunc/ifunc-13a-i386.s: Fix use of .global directive.
* ld-ifunc/ifunc-15a-i385.s: Likewise.
2012-05-28 14:20:19 +00:00
df7b86aa4c
PR 14072
...
* configure.in: Add check that sysdep.h has been included before
any system header files.
* configure: Regenerate.
* config.in: Regenerate.
* sysdep.h: Generate an error if included before config.h.
* alpha-opc.c: Include sysdep.h before any other header file.
* alpha-dis.c: Likewise.
* avr-dis.c: Likewise.
* cgen-opc.c: Likewise.
* cr16-dis.c: Likewise.
* cris-dis.c: Likewise.
* crx-dis.c: Likewise.
* d10v-dis.c: Likewise.
* d10v-opc.c: Likewise.
* d30v-dis.c: Likewise.
* d30v-opc.c: Likewise.
* h8500-dis.c: Likewise.
* i370-dis.c: Likewise.
* i370-opc.c: Likewise.
* m10200-dis.c: Likewise.
* m10300-dis.c: Likewise.
* micromips-opc.c: Likewise.
* mips-opc.c: Likewise.
* mips61-opc.c: Likewise.
* moxie-dis.c: Likewise.
* or32-opc.c: Likewise.
* pj-dis.c: Likewise.
* ppc-dis.c: Likewise.
* ppc-opc.c: Likewise.
* s390-dis.c: Likewise.
* sh-dis.c: Likewise.
* sh64-dis.c: Likewise.
* sparc-dis.c: Likewise.
* sparc-opc.c: Likewise.
* spu-dis.c: Likewise.
* tic30-dis.c: Likewise.
* tic54x-dis.c: Likewise.
* tic80-dis.c: Likewise.
* tic80-opc.c: Likewise.
* tilegx-dis.c: Likewise.
* tilepro-dis.c: Likewise.
* v850-dis.c: Likewise.
* v850-opc.c: Likewise.
* vax-dis.c: Likewise.
* w65-dis.c: Likewise.
* xgate-dis.c: Likewise.
* xtensa-dis.c: Likewise.
* rl78-decode.opc: Likewise.
* rl78-decode.c: Regenerate.
* rx-decode.opc: Likewise.
* rx-decode.c: Regenerate.
* configure.in: Add check that sysdep.h has been included before
any system header files.
* configure: Regenerate.
* config.in: Regenerate.
* sysdep.h: Generate an error if included before config.h.
* configure.in: Add check that sysdep.h has been included before
any system header files.
* configure: Regenerate.
* config.in: Regenerate.
* aclocal.m4: Regenerate.
* bfd-in.h: Generate an error if included before config.h.
* sysdep.h: Likewise.
* bfd-in2.h: Regenerate.
* compress.c: Remove #include "config.h".
* plugin.c: Likewise.
* elf32-m68hc1x.c: Include sysdep.h before alloca-conf.h.
* elf64-hppa.c: Likewise.
* som.c: Likewise.
* xsymc.c: Likewise.
* configure.in: Add check that sysdep.h has been included before
any system header files.
* configure: Regenerate.
* config.in: Regenerate.
* configure.in: Add check that sysdep.h has been included before
any system header files.
* configure: Regenerate.
* config.in: Regenerate.
* aclocal.m4: Regenerate.
* Makefile.am: Use wrappers around C files generated by flex.
* Makefile.in: Regenerate.
* doc/Makefile.in: Regenerate.
* itbl-lex-wrapper.c: New file.
* config/bfin-lex-wrapper.c: New file.
* cgen.c: Include as.h before setjmp.h.
* config/tc-dlx.c: Include as.h before any other header.
* config/tc-h8300.c: Likewise.
* config/tc-lm32.c: Likewise.
* config/tc-mep.c: Likewise.
* config/tc-microblaze.c: Likewise.
* config/tc-mmix.c: Likewise.
* config/tc-msp430.c: Likewise.
* config/tc-or32.c: Likewise.
* config/tc-tic4x.c: Likewise.
* config/tc-tic54x.c: Likewise.
* config/tc-xtensa.c: Likewise.
* configure.in: Add check that sysdep.h has been included before
any system header files.
* configure: Regenerate.
* config.in: Regenerate.
* unwind-ia64.h: Include config.h.
2012-05-17 15:13:28 +00:00
6927f98292
* config/tc-m68hc11.c: Add S12X and XGATE co-processor support.
...
Add option to offset S12 addresses into XGATE memory space.
Tweak target flags to match other tools. (i.e. -m m68hc11).
* doc/as.texinfo: Mention new options.
* doc/c-m68hc11.texi: Document new options.
* NEWS: Mention new support.
* archures.c: Add bfd_arch_m9s12x and bfd_arch_m9s12xg.
* config.bfd: Likewise.
* cpu-m9s12x.c: New.
* cpu-m9s12xg.c: New.
* elf32-m68hc12.c: Add S12X and XGATE co-processor support.
Add option to offset S12 addresses into XGATE memory space.
Fix carry bug in IMM16 (IMM8 low/high) relocate.
* Makefile.am (ALL_MACHINES): Add cpu-m9s12x and cpu-m9s12xg.
(ALL_MACHINES_CFILES): Likewise.
* reloc.c: Add S12X relocs.
* Makefile.in: Regenerate.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* gas/m68hc11/insns9s12x.s: New
* gas/m68hc11/insns9s12x.d: New
* gas/m68hc11/hexprefix.s: New
* gas/m68hc11/hexprefix.d: New
* gas/m68hc11/9s12x-exg-sex-tfr.s: New
* gas/m68hc11/9s12x-exg-sex-tfr.d: New
* gas/m68hc11/insns9s12xg.s: New
* gas/m68hc11/insns9s12xg.d: New
* gas/m68hc11/9s12x-mov.s: New
* gas/m68hc11/9s12x-mov.d: New
* gas/m68hc11/m68hc11.exp: Updated
* gas/m68hc11/*.d: Brought in line with changed objdump output.
* gas/all/gas.exp: XFAIL all hc11/12 targets for redef2,3.
* gas/elf/elf.exp: XFAIL all hc11/12 targets for redef.
* gas/elf/dwarf2-1.d: Skip for hc11/12 targets.
* gas/elf/dwarf2-2.d: Likewise.
* ld-m68hc11/xgate-link.s: New.
* ld-m68hc11/xgate-link.d: New.
* ld-m68hc11/xgate-offset.s: New.
* ld-m68hc11/xgate-offset.d: New.
* ld-m68hc11/xgate1.s: New.
* ld-m68hc11/xgate1.d: New.
* ld-m68hc11/xgate2.s: New.
* ld-m68hc11/m68hc11.exp: Updated.
* ld-m68hc11/*.d: Brought in line with changed objdump output.
* ld-gc/gc.exp: Update CFLAGS for m68hc11.
* ld-plugin/plugin.exp: Likewise.
* ld-srec/srec.exp: XFAIL for m68hc11 and m68hc12.
* configure.in: Add S12X and XGATE co-processor support to m68hc11
target.
* disassemble.c: Likewise.
* configure: Regenerate.
* m68hc11-dis.c: Make objdump output more consistent, use hex
instead of decimal and use 0x prefix for hex.
* m68hc11-opc.c: Add S12X and XGATE opcodes.
* dis-asm.h (print_insn_m9s12x): Prototype.
(print_insn_m9s12xg): Prototype.
* m68hc11.h (R_M68HC12_16B, R_M68HC12_PCREL_9, R_M68HC12_PCREL_10)
R_M68HC12_HI8XG, R_M68HC12_LO8XG): New relocations.
(E_M68HC11_XGATE_RAMOFFSET): Define.
* m68hc11.h: Add XGate definitions.
(struct m68hc11_opcode): Add xg_mask field.
2012-05-15 12:55:51 +00:00
0e25bcb440
* config/tc-rx.c (rx_fetchalign): Declare.
...
(md_pseudo_table): Add .fetchalign.
(RX_NBASE_FETCHALIGN): New.
(fetchalign_bytes): New.
(rx_fetchalign): New.
(rx_frag_init): If a "magic" value is found, also init the
machine-specific data.
(md_assemble): Note following opcode size if called for.
(rx_next_opcode): New.
(rx_relax_frag): Support .fetchalign.
(md_convert_frag): Likewise.
* doc/c-rx.texi (RX-Directives): Add .fetchalign.
2012-05-15 03:04:47 +00:00
f6c1a2d592
Add support for Motorola XGATE embedded CPU
2012-05-03 13:12:08 +00:00
2755f698e1
Document sparc's %l34 and %h34
...
gas/
* doc/c-sparc.text: Document %l34 and %h34.
2012-04-27 20:45:23 +00:00
45e279f5d4
* doc/c-mips.texi (MIPS Opts): Correct -no-mfix-24k to
...
-mno-fix-24k.
2012-04-06 22:02:43 +00:00
ce32bd10df
2012-03-29 Terry Guo <terry.guo@arm.com>
...
* gas/config/tc-arm.c (arm_cpus): Add cortex-m0plus.
* gas/doc/c-arm.texi (ARM Options): Document -mcpu=cortex-m0plus.
2012-03-29 10:28:40 +00:00
55a36193d8
gas/
...
* config/tc-mips.c (mips_cpu_info_table): Add entry for Broadcom XLP.
* doc/c-mips.texi: Mention XLP.
opcodes/
* mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
2012-03-24 01:09:28 +00:00
32b9ff0d14
gas/
...
[SH] Support the .uaquad and .8byte directives also for non-sh64
configurations.
* config/tc-sh.c (sh_cons_fix_new, md_apply_fix) [!HAVE_SH64]: Handle
BFD_RELOC_64.
* doc/c-sh64.texi (SH64 Machine Directives): Move .uaquad
description...
* doc/c-sh.texi (SH Machine Directives): ... here.
2012-03-21 08:58:40 +00:00
27dcf5c00e
gas/
...
* doc/as.texinfo (Bundle directives): Fix typo.
2012-03-15 11:19:13 +00:00
ec82c18e8a
Replace @defn with @dfn
...
2012-03-14 Ryan Mansfield <rmansfield@qnx.com>
* doc/as.texinfo (Bundle directives): Replace @defn with @dfn.
2012-03-14 17:51:16 +00:00
fa94de6b5c
gas/
...
2012-03-12 Roland McGrath <mcgrathr@google.com>
* config/tc-arm.c (arm_frag_max_var): New function.
* config/tc-arm.h: Declare it.
(md_frag_max_var): New macro.
* config/tc-i386.c (i386_frag_max_var): New function.
* config/tc-i386.h: Declare it.
(md_frag_max_var): New macro.
* doc/as.texinfo (Bundle directives): New node.
(Pseudo Ops): Add it to the menu.
* NEWS: Mention new feature.
* read.c [md_frag_max_var] (HANDLE_BUNDLE): New macro.
[HANDLE_BUNDLE] (bundle_align_p2): New variable.
[HANDLE_BUNDLE] (bundle_lock_frchain, bundle_lock_frag): New variables.
[HANDLE_BUNDLE] (start_bundle, pending_bundle_size, finish_bundle):
New functions.
(assemble_one): New function if [HANDLE_BUNDLE], #define directly
to md_assembly if not.
(read_a_source_file): Call assemble_one in place of md_assemble.
(read_a_source_file) [HANDLE_BUNDLE]: Check for unterminated
.bundle_lock at end of processing.
[HANDLE_BUNDLE] (s_bundle_align_mode, s_bundle_lock, s_bundle_unlock):
New functions.
[HANDLE_BUNDLE] (potable): Add their entries.
* read.h: Declare new functions.
gas/testsuite/
2012-03-12 Roland McGrath <mcgrathr@google.com>
* gas/i386/bundle-bad.s: New file.
* gas/i386/bundle-bad.d: New file.
* gas/i386/bundle-bad.l: New file.
* gas/i386/i386.exp: Run it.
* gas/arm/bundle.s: New file.
* gas/arm/bundle.d: New file.
* gas/arm/bundle-lock.s: New file.
* gas/arm/bundle-lock.d: New file.
* gas/i386/bundle.s: New file.
* gas/i386/bundle.d: New file.
* gas/i386/x86-64-bundle.s: New file.
* gas/i386/x86-64-bundle.d: New file.
* gas/i386/bundle-lock.s: New file.
* gas/i386/bundle-lock.d: New file.
* gas/i386/i386.exp: Run them.
2012-03-13 16:59:57 +00:00
aea77599d0
include/opcode/
...
* ppc.h: Add PPC_OPCODE_ALTIVEC2, PPC_OPCODE_E6500, PPC_OPCODE_TMR.
opcodes/
* ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
* ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
(PPCVEC2, PPCTMR, E6500): New short names.
(powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
optional operands on sync instruction for E6500 target.
bfd/
* archures.c: Add bfd_mach_ppc_e5500 and bfd_mach_ppc_e6500.
* bfd-in2.h: Regenerate.
* cpu-powerpc.c (bfd_powerpc_archs): Add entryies for
bfd_mach_ppc_e5500 and bfd_mach_ppc_e6500.
gas/
* config/tc-ppc.c (md_show_usage): Document -me5500 and -me6500.
(ppc_handle_align): Add termination nop opcode for e500mc family.
* doc/as.texinfo: Document options -me5500 and -me6500.
* doc/c-ppc.texi: Likewise.
gas/testsuite/
* gas/ppc/e500mc64_nop.s: New test case for e500mc family
termination nops.
* gas/ppc/e500mc64_nop.d: Likewise.
* gas/ppc/e5500_nop.s: Likewise.
* gas/ppc/e5500_nop.d: Likewise.
* gas/ppc/e6500_nop.s: Likewise.
* gas/ppc/e6500_nop.d: Likewise.
* gas/ppc/e6500.s: New.
* gas/ppc/e6500.d: Likewise.
* gas/ppc/ppc.exp: Run e6500, e500mc64_nop, e5500_nop, and e6500_nop.
2012-03-09 23:39:06 +00:00
6f7be9592d
Improve TLS support on TILE-Gx/TILEPro:
...
- Add support for TLS LE references.
- Support linker optimization of TLS references.
- Delete relocations of GOT/tp relative offsets beyond 32-bits.
This brings binutils in line with the support expected in gcc 4.7, for
TILE-Gx/TILEPro.
bfd/
* reloc.c: Add BFD_RELOC_TILEPRO_TLS_GD_CALL,
BFD_RELOC_TILEPRO_IMM8_X0_TLS_GD_ADD,
BFD_RELOC_TILEPRO_IMM8_X1_TLS_GD_ADD,
BFD_RELOC_TILEPRO_IMM8_Y0_TLS_GD_ADD,
BFD_RELOC_TILEPRO_IMM8_Y1_TLS_GD_ADD,
BFD_RELOC_TILEPRO_TLS_IE_LOAD, BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE,
BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE,
BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_LO,
BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_LO,
BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_HI,
BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_HI,
BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_HA,
BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_HA,
BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_LE,
BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_LE,
BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_LE,
BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_LE,
BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_LE,
BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_LE,
BFD_RELOC_TILEGX_TLS_GD_CALL, BFD_RELOC_TILEGX_IMM8_X0_TLS_GD_ADD,
BFD_RELOC_TILEGX_IMM8_X1_TLS_GD_ADD,
BFD_RELOC_TILEGX_IMM8_Y0_TLS_GD_ADD,
BFD_RELOC_TILEGX_IMM8_Y1_TLS_GD_ADD, BFD_RELOC_TILEGX_TLS_IE_LOAD,
BFD_RELOC_TILEGX_IMM8_X0_TLS_ADD,
BFD_RELOC_TILEGX_IMM8_X1_TLS_ADD,
BFD_RELOC_TILEGX_IMM8_Y0_TLS_ADD, BFD_RELOC_TILEGX_IMM8_Y1_TLS_ADD.
Delete BFD_RELOC_TILEGX_IMM16_X0_HW1_GOT,
BFD_RELOC_TILEGX_IMM16_X1_HW1_GOT,
BFD_RELOC_TILEGX_IMM16_X0_HW2_GOT,
BFD_RELOC_TILEGX_IMM16_X1_HW2_GOT,
BFD_RELOC_TILEGX_IMM16_X0_HW3_GOT,
BFD_RELOC_TILEGX_IMM16_X1_HW3_GOT,
BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_GOT,
BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_GOT,
BFD_RELOC_TILEGX_IMM16_X0_HW1_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X1_HW1_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X0_HW2_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X1_HW2_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X0_HW3_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X1_HW3_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X0_HW1_TLS_IE,
BFD_RELOC_TILEGX_IMM16_X1_HW1_TLS_IE,
BFD_RELOC_TILEGX_IMM16_X0_HW2_TLS_IE,
BFD_RELOC_TILEGX_IMM16_X1_HW2_TLS_IE,
BFD_RELOC_TILEGX_IMM16_X0_HW3_TLS_IE,
BFD_RELOC_TILEGX_IMM16_X1_HW3_TLS_IE,
BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_TLS_IE,
BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_TLS_IE.
* elf32-tilepro.c (tilepro_elf_howto_table): Update tilepro
relocations.
(tilepro_reloc_map): Ditto.
(tilepro_info_to_howto_rela): Ditto.
(reloc_to_create_func): Ditto.
(tilepro_tls_translate_to_le): New.
(tilepro_tls_translate_to_ie): New.
(tilepro_elf_tls_transition): New.
(tilepro_elf_check_relocs): Handle new tls relocations.
(tilepro_elf_gc_sweep_hook): Ditto.
(allocate_dynrelocs): Ditto.
(tilepro_elf_relocate_section): Ditto.
(tilepro_replace_insn): New.
(insn_mask_X1): New.
(insn_mask_X0_no_dest_no_srca): New
(insn_mask_X1_no_dest_no_srca): New
(insn_mask_Y0_no_dest_no_srca): New
(insn_mask_Y1_no_dest_no_srca): New
(srca_mask_X0): New
(srca_mask_X1): New
(insn_tls_le_move_X1): New
(insn_tls_le_move_zero_X0X1): New
(insn_tls_ie_lw_X1): New
(insn_tls_ie_add_X0X1): New
(insn_tls_ie_add_Y0Y1): New
(insn_tls_gd_add_X0X1): New
(insn_tls_gd_add_Y0Y1): New
* elfxx-tilegx.c (tilegx_elf_howto_table): Update tilegx
relocations.
(tilegx_reloc_map): Ditto.
(tilegx_info_to_howto_rela): Ditto.
(reloc_to_create_func): Ditto.
(tilegx_elf_link_hash_table): New field disable_le_transition.
(tilegx_tls_translate_to_le): New.
(tilegx_tls_translate_to_ie): New.
(tilegx_elf_tls_transition): New.
(tilegx_elf_check_relocs): Handle new tls relocations.
(tilegx_elf_gc_sweep_hook): Ditto.
(allocate_dynrelocs): Ditto.
(tilegx_elf_relocate_section): Ditto.
(tilegx_copy_bits): New.
(tilegx_replace_insn): New.
(insn_mask_X1): New.
(insn_mask_X0_no_dest_no_srca): New.
(insn_mask_X1_no_dest_no_srca): New.
(insn_mask_Y0_no_dest_no_srca): New.
(insn_mask_Y1_no_dest_no_srca): New.
(insn_mask_X0_no_operand): New.
(insn_mask_X1_no_operand): New.
(insn_mask_Y0_no_operand): New.
(insn_mask_Y1_no_operand): New.
(insn_tls_ie_ld_X1): New.
(insn_tls_ie_ld4s_X1): New.
(insn_tls_ie_add_X0X1): New.
(insn_tls_ie_add_Y0Y1): New.
(insn_tls_ie_addx_X0X1): New.
(insn_tls_ie_addx_Y0Y1): New.
(insn_tls_gd_add_X0X1): New.
(insn_tls_gd_add_Y0Y1): New.
(insn_move_X0X1): New.
(insn_move_Y0Y1): New.
(insn_add_X0X1): New.
(insn_add_Y0Y1): New.
(insn_addx_X0X1): New.
(insn_addx_Y0Y1): New.
* libbfd.h: Regenerate.
* bfd-in2.h: Regenerate.
gas/
* tc-tilepro.c (O_tls_le): Define operator.
(O_tls_le_lo16): Ditto.
(O_tls_le_hi16): Ditto.
(O_tls_le_ha16): Ditto.
(O_tls_gd_call): Ditto.
(O_tls_gd_add): Ditto.
(O_tls_ie_load): Ditto.
(md_begin): Delete old operators; handle new operators.
(emit_tilepro_instruction): Ditto.
(md_apply_fix): Ditto.
* tc-tilegx.c (O_hw1_got): Delete operator.
(O_hw2_got): Ditto.
(O_hw3_got): Ditto.
(O_hw2_last_got): Ditto.
(O_hw1_tls_gd): Ditto.
(O_hw2_tls_gd): Ditto.
(O_hw3_tls_gd): Ditto.
(O_hw2_last_tls_gd): Ditto.
(O_hw1_tls_ie): Ditto.
(O_hw2_tls_ie): Ditto.
(O_hw3_tls_ie): Ditto.
(O_hw2_last_tls_ie): Ditto.
(O_hw0_tls_le): Define operator.
(O_hw0_last_tls_le): Ditto.
(O_hw1_last_tls_le): Ditto.
(O_tls_gd_call): Ditto.
(O_tls_gd_add): Ditto.
(O_tls_ie_load): Ditto.
(O_tls_add): Ditto.
(md_begin): Delete old operators; handle new operators.
(emit_tilegx_instruction): Ditto.
(md_apply_fix): Ditto.
* doc/c-tilegx.texi: Delete old operators; document new operators.
* doc/c-tilepro.texi: Ditto.
include/elf/
* tilegx.h (R_TILEGX_IMM16_X0_HW1_GOT): Delete.
(R_TILEGX_IMM16_X1_HW1_GOT): Ditto.
(R_TILEGX_IMM16_X0_HW2_GOT): Ditto.
(R_TILEGX_IMM16_X1_HW2_GOT): Ditto.
(R_TILEGX_IMM16_X0_HW3_GOT): Ditto.
(R_TILEGX_IMM16_X1_HW3_GOT): Ditto.
(R_TILEGX_IMM16_X0_HW2_LAST_GOT): Ditto.
(R_TILEGX_IMM16_X1_HW2_LAST_GOT): Ditto.
(R_TILEGX_IMM16_X0_HW1_TLS_GD): Ditto.
(R_TILEGX_IMM16_X1_HW1_TLS_GD): Ditto.
(R_TILEGX_IMM16_X0_HW2_TLS_GD): Ditto.
(R_TILEGX_IMM16_X1_HW2_TLS_GD): Ditto.
(R_TILEGX_IMM16_X0_HW3_TLS_GD): Ditto.
(R_TILEGX_IMM16_X1_HW3_TLS_GD): Ditto.
(R_TILEGX_IMM16_X0_HW2_LAST_TLS_GD): Ditto.
(R_TILEGX_IMM16_X1_HW2_LAST_TLS_GD): Ditto.
(R_TILEGX_IMM16_X0_HW1_TLS_IE): Ditto.
(R_TILEGX_IMM16_X1_HW1_TLS_IE): Ditto.
(R_TILEGX_IMM16_X0_HW2_TLS_IE): Ditto.
(R_TILEGX_IMM16_X1_HW2_TLS_IE): Ditto.
(R_TILEGX_IMM16_X0_HW3_TLS_IE): Ditto.
(R_TILEGX_IMM16_X1_HW3_TLS_IE): Ditto.
(R_TILEGX_IMM16_X0_HW2_LAST_TLS_IE): Ditto.
(R_TILEGX_IMM16_X1_HW2_LAST_TLS_IE): Ditto.
(R_TILEGX_IMM16_X0_HW0_TLS_LE): New relocation.
(R_TILEGX_IMM16_X1_HW0_TLS_LE): Ditto.
(R_TILEGX_IMM16_X0_HW0_LAST_TLS_LE): Ditto.
(R_TILEGX_IMM16_X1_HW0_LAST_TLS_LE): Ditto.
(R_TILEGX_IMM16_X0_HW1_LAST_TLS_LE): Ditto.
(R_TILEGX_IMM16_X1_HW1_LAST_TLS_LE): Ditto.
(R_TILEGX_TLS_GD_CALL): Ditto.
(R_TILEGX_IMM8_X0_TLS_GD_ADD): Ditto.
(R_TILEGX_IMM8_X1_TLS_GD_ADD): Ditto.
(R_TILEGX_IMM8_Y0_TLS_GD_ADD): Ditto.
(R_TILEGX_IMM8_Y1_TLS_GD_ADD): Ditto.
(R_TILEGX_TLS_IE_LOAD): Ditto.
(R_TILEGX_IMM8_X0_TLS_ADD): Ditto.
(R_TILEGX_IMM8_X1_TLS_ADD): Ditto.
(R_TILEGX_IMM8_Y0_TLS_ADD): Ditto.
(R_TILEGX_IMM8_Y1_TLS_ADD): Ditto.
* tilepro.h (R_TILEPRO_TLS_GD_CALL): New relocation.
(R_TILEPRO_IMM8_X0_TLS_GD_ADD): Ditto.
(R_TILEPRO_IMM8_X1_TLS_GD_ADD): Ditto.
(R_TILEPRO_IMM8_Y0_TLS_GD_ADD): Ditto.
(R_TILEPRO_IMM8_Y1_TLS_GD_ADD): Ditto.
(R_TILEPRO_TLS_IE_LOAD): Ditto.
(R_TILEPRO_IMM16_X0_TLS_LE): Ditto.
(R_TILEPRO_IMM16_X1_TLS_LE): Ditto.
(R_TILEPRO_IMM16_X0_TLS_LE_LO): Ditto.
(R_TILEPRO_IMM16_X1_TLS_LE_LO): Ditto.
(R_TILEPRO_IMM16_X0_TLS_LE_HI): Ditto.
(R_TILEPRO_IMM16_X1_TLS_LE_HI): Ditto.
(R_TILEPRO_IMM16_X0_TLS_LE_HA): Ditto.
(R_TILEPRO_IMM16_X1_TLS_LE_HA): Ditto.
include/opcode/
* tilegx.h (tilegx_mnemonic): Add TILEGX_OPC_LD4S_TLS,
TILEGX_OPC_LD_TLS.
* tilepro.h (tilepro_mnemonic): Add TILEPRO_OPC_LW_TLS,
TILEPRO_OPC_LW_TLS_SN.
opcodes/
* tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
* tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
TILEPRO_OPC_LW_TLS_SN.
2012-02-25 22:24:21 +00:00
fb6ceddedd
Add big-endian support for tilegx.
...
bfd/
* config.bfd (tilegx-*-*): rename little endian vector; add big
endian vector.
(tilegxbe-*-*): New case.
* configure.in (bfd_elf32_tilegx_vec): Rename...
(bfd_elf32_tilegx_le_vec): ... to this.
(bfd_elf32_tilegx_be_vec): New vector.
(bfd_elf64_tilegx_vec): Rename...
(bfd_elf64_tilegx_le_vec): ... to this.
(bfd_elf64_tilegx_be_vec): New vector.
* configure: Regenerate.
* elf32-tilegx.c (TARGET_LITTLE_SYM): Rename.
(TARGET_LITTLE_NAME): Ditto.
(TARGET_BIG_SYM): Define.
(TARGET_BIG_NAME): Define.
* elf64-tilegx.c (TARGET_LITTLE_SYM): Rename.
(TARGET_LITTLE_NAME): Ditto.
(TARGET_BIG_SYM): Define.
(TARGET_BIG_NAME): Define.
* targets.c (bfd_elf32_tilegx_vec): Rename...
(bfd_elf32_tilegx_le_vec): ... to this.
(bfd_elf32_tilegx_be_vec): Declare.
(bfd_elf64_tilegx_vec): Rename...
(bfd_elf64_tilegx_le_vec): ... to this.
(bfd_elf64_tilegx_be_vec): Declare.
(_bfd_target_vector): Add / rename above vectors.
binutils/testsuite/
* binutils-all/objdump.exp (cpus_expected): Add tilegx.
gas/
* tc-tilegx.c (tilegx_target_format): Handle big endian.
(OPTION_EB): Define.
(OPTION_EL): Define.
(md_longopts): Add entries for "EB" and "EL".
(md_parse_option): Handle OPTION_EB and OPTION_EL.
(md_show_usage): Add -EB and -EL.
(md_number_to_chars): New.
* tc-tilegx.h (TARGET_BYTES_BIG_ENDIAN): Guard definition with
ifndef.
(md_number_to_chars): Delete.
* configure.tgt (tilegx*be): Handle.
* doc/as.texinfo [TILE-Gx]: Document -EB and -EL.
* doc/c-tilegx.texi: Ditto.
ld/
* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32tilegx_be.c.
(ALL_64_EMULATION_SOURCES): Add eelf64tilegx_be.c.
(eelf32tilegx_be.c): Add rule to build this file.
(eelf64tilegx_be.c): Ditto.
* Makefile.in: Regenerate.
* configure.tgt (tilegx-*-*): Support big endian.
(tilegxbe-*-*): New.
* emulparams/elf32tilegx.sh (OUTPUT_FORMAT): Rename.
(BIG_OUTPUT_FORMAT): Define.
(LITTLE_OUTPUT_FORMAT): Define.
* emulparams/elf32tilegx_be.sh: New.
* emulparams/elf64tilegx.sh (OUTPUT_FORMAT): Rename.
(BIG_OUTPUT_FORMAT): Define.
(LITTLE_OUTPUT_FORMAT): Define.
* emulparams/elf64tilegx_be.sh: New.
ld/testsuite/
* ld-tilegx/reloc-be.d: New.
* ld-tilegx/reloc-le.d: New.
* ld-tilegx/reloc.d: Delete.
* ld-tilegx/tilegx.exp: Test big and little endian.
2012-02-25 19:51:34 +00:00
42164a7195
Implement Intel Transactional Synchronization Extensions
...
gas/
2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (HLE_PREFIX): New.
(check_hle): Likewise.
(_i386_insn): Add have_hle.
(cpu_arch): Add .hle and .rtm.
(md_assemble): Call check_hle if i.have_hle isn't zero.
(parse_insn): Set i.have_hle to 1 for HLE prefix.
(output_jump): Support up to 2 byte opcode.
* doc/c-i386.texi: Document hle/.hle and rtm/.rtm.
gas/testsuite/
2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/hle-intel.d: New.
* gas/i386/hle.d: Likewise.
* gas/i386/hle.s: Likewise.
* gas/i386/hlebad.l: Likewise.
* gas/i386/hlebad.s: Likewise.
* gas/i386/rtm-intel.d: Likewise.
* gas/i386/rtm.d: Likewise.
* gas/i386/rtm.s: Likewise.
* gas/i386/x86-64-hle-intel.d: Likewise.
* gas/i386/x86-64-hle.d: Likewise.
* gas/i386/x86-64-hle.s: Likewise.
* gas/i386/x86-64-hlebad.l: Likewise.
* gas/i386/x86-64-hlebad.s: Likewise.
* gas/i386/x86-64-rtm-intel.d: Likewise.
* gas/i386/x86-64-rtm.d: Likewise.
* gas/i386/x86-64-rtm.s: Likewise.
* gas/i386/i386.exp: Run hle, hle-intel, hlebad x86-64-hle, rtm,
rtm-intel, x86-64-hle-intel, x86-64-hlebad, x86-64-rtm and
x86-64-rtm-intel.
include/opcode/
2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (XACQUIRE_PREFIX_OPCODE): New.
(XRELEASE_PREFIX_OPCODE): Likewise.
opcodes/
2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (HLE_Fixup1): New.
(HLE_Fixup2): Likewise.
(HLE_Fixup3): Likewise.
(Ebh1): Likewise.
(Evh1): Likewise.
(Ebh2): Likewise.
(Evh2): Likewise.
(Ebh3): Likewise.
(Evh3): Likewise.
(MOD_C6_REG_7): Likewise.
(MOD_C7_REG_7): Likewise.
(RM_C6_REG_7): Likewise.
(RM_C7_REG_7): Likewise.
(XACQUIRE_PREFIX): Likewise.
(XRELEASE_PREFIX): Likewise.
(dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
Ebh2/Evh2 on xchg. Use Ebh3/Evh3 on mov.
(reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
not, or, sbb, sub and xor. Use Ebh3/Evh3 on mov. Use
MOD_C6_REG_7 and MOD_C7_REG_7.
(mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
(rm_table): Add RM_C6_REG_7 and RM_C7_REG_7. Add xend and
xtest.
(prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
(CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
* i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
CPU_RTM_FLAGS.
(cpu_flags): Add CpuHLE and CpuRTM.
(opcode_modifiers): Add HLEPrefixOk.
* i386-opc.h (CpuHLE): New.
(CpuRTM): Likewise.
(HLEPrefixOk): Likewise.
(i386_cpu_flags): Add cpuhle and cpurtm.
(i386_opcode_modifier): Add hleprefixok.
* i386-opc.tbl: Add HLEPrefixOk=3 to mov. Add HLEPrefixOk to
add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
sbb, sub, xor and xadd. Add HLEPrefixOk=2 to xchg with memory
operand. Add xacquire, xrelease, xabort, xbegin, xend and
xtest.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2012-02-08 18:20:41 +00:00
bac0326303
2012-01-31 Paul Brook <paul@codesourcery.com>
...
gas/
* doc/c-tic6x.c: Fix typo.
2012-01-31 15:01:56 +00:00
a501d77eeb
Add .d8 suffix support to x86 assembler
...
gas/
2012-01-20 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (_i386_insn): Replace disp32_encoding with
disp_encoding.
(md_assemble): Updated.
(output_branch): Likewise.
(parse_insn): Support .d8 suffix.
(build_modrm_byte): Fake zero displacement for .d8 and .d32
suffixes.
* doc/c-i386.texi: Document .d8 suffix.
gas/testsuite/
2012-01-20 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/disp32.s: Add tests for .d8 suffix.
* gas/i386/x86-64-disp32.s: Likewise.
* gas/i386/disp32.d: Updated.
* gas/i386/x86-64-disp32.d: Likewise.
2012-01-20 20:53:50 +00:00
8729a6f6a5
Add vmfunc
...
gas/
2012-01-13 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (cpu_arch): Add ".vmfunc".
* doc/c-i386.texi: Document vmfunc.
gas/testsuite/
2012-01-13 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run vmfunc and x86-64-vmfunc.
* gas/i386/vmfunc.d: New.
* gas/i386/vmfunc.s: Likewise.
* gas/i386/x86-64-vmfunc.d: Likewise.
opcodes/
2012-01-13 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (mod_table): Add vmfunc.
* i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
(cpu_flags): CpuVMFUNC.
* i386-opc.h (CpuVMFUNC): New.
(i386_cpu_flags): Add cpuvmfunc.
* i386-opc.tbl: Add vmfunc.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2012-01-13 22:19:32 +00:00
621e3db6a5
* doc/internals.texi (TC_FORCE_RELOCATION_SUB_SAME): Update
...
to match code.
2011-12-13 12:56:33 +00:00
432233b359
bfd:
...
2011-12-08 Andrew Pinski <apinski@cavium.com>
Adam Nemet <anemet@caviumnetworks.com>
* archures.c (bfd_mach_mips_octeon2): New macro
* bfd-in2.h: Regenerate.
* cpu-mips.c (I_mipsocteon2): New enum value.
(arch_info_struct): Add bfd_mach_mips_octeon2.
* elfxx-mips.c (_bfd_elf_mips_mach): Support E_MIPS_MACH_OCTEON2.
(mips_set_isa_flags): Add bfd_mach_mips_octeon2.
(mips_mach_extensions): Add bfd_mach_mips_octeon2.
gas:
2011-12-08 Andrew Pinski <apinski@cavium.com>
Adam Nemet <anemet@caviumnetworks.com>
* tc-mips.c (CPU_IS_OCTEON): Add Octeon2.
(mips_cpu_info_table): Add Octeon2.
* doc/c-mips.texi: Document octeon2 as an acceptable value for -march=.
gas/testsuite:
2011-12-08 Andrew Pinski <apinski@cavium.com>
Adam Nemet <anemet@caviumnetworks.com>
* gas/mips/mips.exp: Add Octeon2 for an architecture.
Run octeon2 test.
* gas/mips/octeon2.d: New file.
* gas/mips/octeon2.s: New file.
include/opcode:
2011-12-08 Andrew Pinski <apinski@cavium.com>
Adam Nemet <anemet@caviumnetworks.com>
* mips.h (INSN_CHIP_MASK): Update according to INSN_OCTEON2.
(INSN_OCTEON2): New macro.
(CPU_OCTEON2): New macro.
(OPCODE_IS_MEMBER): Add Octeon2.
opcodes:
2011-12-08 Andrew Pinski <apinski@cavium.com>
Adam Nemet <anemet@caviumnetworks.com>
* mips-dis.c (mips_arch_choices): Add Octeon2.
For "octeon+", just include OcteonP for the insn.
* mips-opc.c (IOCT): Include Octeon2.
(IOCTP): Include Octeon2.
(IOCT2): New macro.
(mips_builtin_opcodes): Add "laa", "laad", "lac", "lacd", "lad",
"ladd", "lai", "laid", "las", "lasd", "law", "lawd".
Move "lbux", "ldx", "lhx", "lwx", and "lwux" up to where the standard
loads are, and add IOCT2 to them.
Add "lbx" and "lhux".
Add "qmac.00", "qmac.01", "qmac.02", "qmac.03", "qmacs.00",
"qmacs.01", "qmacs.01", "qmacs.02" and "qmacs.03".
Add "zcb" and "zcbt".
2011-12-08 20:47:27 +00:00
dd6a37e700
opcode/
...
2011-11-29 Andrew Pinski <apinski@cavium.com>
* mips-dis.c (mips_arch_choices): Add Octeon+.
* mips-opc.c (IOCT): Include Octeon+.
(IOCTP): New macro.
(mips_builtin_opcodes): Add "saa" and "saad".
bfd/
2011-11-29 Andrew Pinski <apinski@cavium.com>
* archures.c (bfd_mach_mips_octeonp): New macro.
* bfd-in2.h: Regenerate.
* bfd/cpu-mips.c (I_mipsocteonp): New enum value.
(arch_info_struct): Add bfd_mach_mips_octeonp.
* elfxx-mips.c (mips_set_isa_flags): Add bfd_mach_mips_octeonp.
(mips_mach_extensions): Add bfd_mach_mips_octeonp.
include/opcodes/
2011-11-29 Andrew Pinski <apinski@cavium.com>
* mips.h (INSN_CHIP_MASK): Update according to INSN_OCTEONP.
(INSN_OCTEONP): New macro.
(CPU_OCTEONP): New macro.
(OPCODE_IS_MEMBER): Add Octeon+.
(M_SAA_AB, M_SAAD_AB, M_SAA_OB, M_SAAD_OB): New enum values.
gas/
2011-11-29 Andrew Pinski <apinski@cavium.com>
* config/tc-mips.c (CPU_IS_OCTEON): New macro function.
(CPU_HAS_SEQ): Change to use CPU_IS_OCTEON.
(NO_ISA_COP): Likewise.
(macro) <ld_st>: Add support when off0 is true.
Add support for M_SAA_AB, M_SAA_OB, M_SAAD_OB and M_SAAD_AB.
(mips_cpu_info_table): Add octeon+.
* doc/c-mips.texi: Document octeon+ as an acceptable value for -march=.
gas/testsuite/
2011-11-29 Andrew Pinski <apinski@cavium.com>
* gas/mips/mips.exp: Add octeon+ for an architecture.
Run octeon-saa-saad test.
(run_dump_test_arch): For Octeon architectures, also try octeon@.
* gas/mips/octeon-pref.d: Remove -march=octeon from command line.
* gas/mips/octeon.d: Likewise.
* gas/mips/octeon-saa-saad.d: New file.
* gas/mips/octeon-saa-saad.s: New file
2011-11-29 20:28:55 +00:00
7a795ef4a7
* config/tc-mips.c (mips_cpu_info_table): Add "m14ke" and
...
"m14kec".
* doc/c-mips.texi (MIPS architecture options): Add "m14ke" and
"m14kec" to the list of -march options.
2011-11-16 12:21:35 +00:00
c90460e450
* gas/config/tc-arm.c (arm_cpus): Add cortex-a7 entry.
...
* gas/doc/c-arm.texi (ARM Options): Add cortex-a7 to list of accepted
CPUs.
2011-11-07 16:20:48 +00:00
b14cf9dd6a
* doc/c-rl78.texi (RL78-Float): Remove unused menu entry.
2011-11-04 16:04:13 +00:00
3da1d841a1
* config/tc-arm.c (md_begin): Remove ARM_PLT32 reloc associated
...
with the (PLT) instruction suffix when operating in eabi mode.
* doc/c-arm.texi (ARM_Relocations): Extend description of (PLT)
suffix.
* gas/arm/pic.d: Update expected output.
2011-11-02 11:13:59 +00:00
99c513f6ac
[.]
...
* configure.ac (rl78-*-*) New case.
* configure: Regenerate.
[bfd]
* Makefile.am (ALL_MACHINES): Add cpu-rl78.lo.
(ALL_MACHINES_CFILES): Add cpu-rl78.c.
(BFD32_BACKENDS): Add elf32-rl78.lo.
(BFD32_BACKENDS_CFILES): Add elf32-rl78.c.
(Makefile.in): Regenerate.
* archures.c (bfd_architecture): Define bfd_arch_rl78.
(bfd_archures_list): Add bfd_rl78_arch.
* config.bfd: Add rl78-*-elf.
* configure.in: Add bfd_elf32_rl78_vec.
* reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations.
* targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec.
* Makefile.in: Regenerate.
* bfd-in2.h: Regenerate.
* configure: Regenerate.
* libbfd.h: Regenerate.
* cpu-rl78.c: New file.
* elf32-rl78.c: New file.
[binutils]
* readelf.c: Include elf/rl78.h
(guess_is_rela): Handle EM_RL78.
(dump_relocations): Likewise.
(get_machine_name): Likewise.
(is_32bit_abs_reloc): Likewise.
* NEWS: Mention addition of RL78 support.
* MAINTAINERS: Add myself as RL78 port maintainer.
[gas]
* Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c.
(TARGET_CPU_HFILES): Add rc-rl78.h.
(EXTRA_DIST): Add rl78-parse.c and rl78-parse.y.
(rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules.
* Makefile.in: Regenerate.
* configure.in: Add rl78 case.
* configure: Regenerate.
* configure.tgt: Add rl78 case.
* config/rl78-defs.h: New file.
* config/rl78-parse.y: New file.
* config/tc-rl78.c: New file.
* config/tc-rl78.h: New file.
* NEWS: Add Renesas RL78.
* doc/Makefile.am (c-rl78.texi): New.
* doc/Makefile.in: Likewise.
* doc/all.texi: Enable it.
* doc/as.texi: Add it.
[include]
* dis-asm.h (print_insn_rl78): Declare.
[include/elf]
* common.h (EM_RL78, EM_78K0R): New.
* rl78.h: New.
[include/opcode]
* rl78.h: New file.
[ld]
* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c.
(+eelf32rl78.c): New rule.
* Makefile.in: Regenerate.
* configure.tgt: Add rl78-*-* case.
* emulparams/elf32rl78.sh: New file.
* NEWS: Mention addition of Renesas RL78 support.
[opcodes]
* Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and
rl78-dis.c.
(MAINTAINERCLEANFILES): Add rl78-decode.c.
(rl78-decode.c): New rule, built from rl78-decode.opc and opc2c.
* Makefile.in: Regenerate.
* configure.in: Add bfd_rl78_arch case.
* configure: Regenerate.
* disassemble.c: Define ARCH_rl78.
(disassembler): Add ARCH_rl78 case.
* rl78-decode.c: New file.
* rl78-decode.opc: New file.
* rl78-dis.c: New file.
2011-11-02 03:09:11 +00:00
926e2094bb
bfd:
...
* cpu-epiphany.c: Reinstate full list of Copyright years.
* elf32-epiphany.c: Likewise.
cpu:
* epiphany.cpu, epiphany.opc: Likewise.
gas:
* config/tc-epiphany.c, config/tc-epiphany.h: Likewise.
* doc/c-epiphany.texi: Likewise.
include:
* elf/epiphany.h: Likewise.
2011-10-27 14:27:16 +00:00
56b1318518
gas:
...
* doc/as.texinfo [EPIPHANY]: Include c-epiphany.texi to avoid
duplication.
opcodes:
* disassemble.c (ARCH_epiphany): Move into alphasorted spot.
2011-10-26 12:14:17 +00:00
cfb8c0921c
bfd:
...
* Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo .
(ALL_MACHINES_CFILES): Add cpu-epiphany.c .
(BFD32_BACKENDS): Add elf32-epiphany.lo .
(BFD32_BACKENDS_CFILES): Add elf32-epiphany.c .
* Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate.
* archures.c (bfd_arch_epiphany): Add.
(bfd_mach_epiphany16, bfd_mach_epiphany32): Define.
(bfd_epiphany_arch): Declare.
(bfd_archures_list): Add &bfd_epiphany_arch.
* config.bfd (epiphany-*-elf): New target case.
* configure.in (bfd_elf32_epiphany_vec): New target vector case.
* reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation.
(BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise.
(BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise.
(BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise.
* targets.c (bfd_elf32_epiphany_vec): Declare.
(_bfd_target_vector): Add bfd_elf32_epiphany_vec.
* po/SRC-POTFILES.in, po/bfd.pot: Regenerate.
* cpu-epiphany.c, elf32-epiphany.c: New files.
binutils:
* readelf.c (include "elf/epiphany.h")
(guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY.
(get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise.
(is_16bit_abs_reloc, is_none_reloc): Likewise.
* po/binutils.pot: Regenerate.
cpu:
* cpu/epiphany.cpu, cpu/epiphany.opc: New files.
gas:
* NEWS: Mention addition of Adapteva Epiphany support.
* config/tc-epiphany.c, config/tc-epiphany.h: New files.
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c .
(TARGET_CPU_HFILES): Add config/tc-epiphany.h .
* Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate.
* configure.in: Also set using_cgen for epiphany.
* configure.tgt: Handle epiphany.
* doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi .
* doc/all.texi: Set EPIPHANY.
* doc/as.texinfo: Add EPIPHANY-specific text.
* doc/c-epiphany.texi: New file.
* po/gas.pot: Regenerate.
gas/testsuite:
* gas/epiphany: New directory.
include:
* dis-asm.h (print_insn_epiphany): Declare.
* elf/epiphany.h: New file.
* elf/common.h (EM_ADAPTEVA_EPIPHANY): Define.
ld:
* NEWS: Mention addition of Adapteva Epiphany support.
* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c .
(eelf32epiphany.c): New rule.
* Makefile.in: Regenerate.
* configure.tgt: Handle epiphany-*-elf.
* po/ld.pot: Regenerate.
* testsuite/ld-srec/srec.exp: xfail epiphany.
* emulparams/elf32epiphany.sh: New file.
opcodes:
* Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h .
(TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c,
epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c .
(CLEANFILES): Add stamp-epiphany.
(EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it.
(stamp-epiphany): New rule.
* Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate.
* configure.in: Handle bfd_epiphany_arch.
* disassemble.c (ARCH_epiphany): Define.
(disassembler): Handle bfd_arch_epiphany.
* epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files.
* epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise.
* epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
d4cb0ea0ca
* readelf.c (get_machine_dlags): Add support for RX's PID mode.
...
* ld-scripts/phdrs.exp: Expect to fail for the RX.
* elf32-rx.c: Add support for PID mode.
(rx_elf_relocate_section): Add checks for unsafe PID relocations.
Include addend in R_RX_SYM relocations.
* config/rx-defs.h (rx_pid_register): New.
(rx_gp_register): New.
* config/rx-parse.y (rx_lex): Add support for %gpreg and %pidreg.
(displacement): Add PID support.
* config/tc-rx.c (rx_pid_mode): New.
(rx_num_int_regs): New.
(rx_pid_register): New.
(rx_gp_register): New.
(options): Add -mpid and -mint-register= options.
(md_longopts): Likewise.
(md_parse_option): Likewise.
(md_show_usage): Likewise.
(rx_pid_symbol): New.
(rx_pidreg_symbol): New.
(rx_gpreg_symbol): New.
(md_begin): Support PID.
(rx_validate_fix_sub): Support PID.
(tc_gen_reloc): Support PID.
* doc/c-rx.texi: Document PID support.
* rx.h (E_FLAG_RX_PID): New.
2011-10-05 14:13:31 +00:00
4bafe00ecf
Add new sparc options to control instruction availability.
...
gas/
* config/tc-sparc.c (hwcap_allowed): New.
(struct sparc_arch): New field 'hwcap_allowed' containing a bitmask
of F_FOO flags which are enabled by the particular arch setting.
Add new options that provide explicit access to new instructions.
(md_parse_option): Only bump max_architecture if the requested one
is larger, or this is the first explicit request.
(get_hwcap_name): New function.
(sparc_ip): Validate that hwcaps used by an instruction have actually
been enabled.
* doc/c-sparc.texi: Document new sparc options.
2011-09-22 00:03:30 +00:00
6753e72f10
* doc/as.texinfo: Include c-xstormy16.texi.
2011-08-19 14:48:40 +00:00
b5503c7b66
* config/tc-mips.c (mips_cpu_info_table): Add "m14k" and
...
"m14kc".
* doc/c-mips.texi (MIPS architecture options): Add "m14k" and
"m14kc" to the list of -march options.
2011-08-09 15:25:32 +00:00
dec0624dcd
gas/
...
* config/tc-mips.c (mips_set_options): Add ase_mcu.
(mips_opts): Initialise ase_mcu to -1.
(ISA_SUPPORTS_MCU_ASE): New macro.
(MIPS_CPU_ASE_MCU): Likewise.
(is_opcode_valid): Handle MCU.
(macro_build, macro): Likewise.
(validate_mips_insn, validate_micromips_insn): Likewise.
(mips_ip): Likewise.
(options): Add OPTION_MCU and OPTION_NO_MCU.
(md_longopts): Add mmcu and mno-mcu.
(md_parse_option): Handle OPTION_MCU and OPTION_NO_MCU.
(mips_after_parse_args): Handle MCU.
(s_mipsset): Likewise.
(md_show_usage): Handle MCU options.
* doc/as.texinfo: Document -mmcu and -mno-mcu options.
* doc/c-mips.texi: Likewise, and document ".set mcu" and
".set nomcu" directives.
gas/testsuite/
* gas/mips/micromips@mcu.d: New test.
* gas/mips/mcu.d: Likewise.
* gas/mips/mcu.s: New test source.
* gas/mips/mips.exp: Run the new tests.
include/opcode/
* mips.h (OP_MASK_3BITPOS, OP_SH_3BITPOS): New macros.
(OP_MASK_OFFSET12, OP_SH_OFFSET12): Redefine.
(INSN_ASE_MASK): Add the MCU bit.
(INSN_MCU): New macro.
(M_ACLR_AB, M_ACLR_OB, M_ASET_AB, M_ASET_OB): New enum values.
(MICROMIPSOP_MASK_3BITPOS, MICROMIPSOP_SH_3BITPOS): New macros.
opcodes/
* mips-dis.c (mips_arch_choices): Enable MCU for "mips32r2"
and "mips64r2".
(print_insn_args, print_insn_micromips): Handle MCU.
* micromips-opc.c (MC): New macro.
(micromips_opcodes): Add "aclr", "aset" and "iret".
* mips-opc.c (MC): New macro.
(mips_builtin_opcodes): Add "aclr", "aset" and "iret".
2011-08-09 15:20:03 +00:00
9aec20268e
* dwarf2dbg.c (out_debug_line): Ignore non-normal segments, with a
...
warning.
* doc/as.texinfo (Offset): Document .offset directive.
testsuite/
* gas/elf/warn-2.s: New.
2011-07-28 16:35:48 +00:00
df58fc944d
bfd/
...
2011-02-25 Chao-ying Fu <fu@mips.com>
Ilie Garbacea <ilie@mips.com>
Maciej W. Rozycki <macro@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Catherine Moore <clm@codesourcery.com>
Richard Sandiford <rdsandiford@googlemail.com>
* archures.c (bfd_mach_mips_micromips): New macro.
* cpu-mips.c (I_micromips): New enum value.
(arch_info_struct): Add bfd_mach_mips_micromips.
* elfxx-mips.h (_bfd_mips_elf_is_target_special_symbol): New
prototype.
(_bfd_mips_elf_relax_section): Likewise.
(_bfd_mips16_elf_reloc_unshuffle): Rename to...
(_bfd_mips_elf_reloc_unshuffle): ... this. Handle microMIPS
ASE.
(_bfd_mips16_elf_reloc_shuffle): Rename to...
(_bfd_mips_elf_reloc_shuffle): ... this. Handle microMIPS ASE.
(gprel16_reloc_p): Handle microMIPS ASE.
(literal_reloc_p): New function.
* elf32-mips.c (elf_micromips_howto_table_rel): New variable.
(_bfd_mips_elf32_gprel16_reloc): Handle microMIPS ASE.
(mips16_gprel_reloc): Update for _bfd_mips_elf_reloc_unshuffle
and _bfd_mips_elf_reloc_shuffle changes.
(mips_elf_gprel32_reloc): Update comment.
(micromips_reloc_map): New variable.
(bfd_elf32_bfd_reloc_type_lookup): Handle microMIPS ASE.
(mips_elf32_rtype_to_howto): Likewise.
(mips_info_to_howto_rel): Likewise.
(bfd_elf32_bfd_is_target_special_symbol): Define.
(bfd_elf32_bfd_relax_section): Likewise.
* elf64-mips.c (micromips_elf64_howto_table_rel): New variable.
(micromips_elf64_howto_table_rela): Likewise.
(mips16_gprel_reloc): Update for _bfd_mips_elf_reloc_unshuffle
and _bfd_mips_elf_reloc_shuffle changes.
(micromips_reloc_map): Likewise.
(bfd_elf64_bfd_reloc_type_lookup): Handle microMIPS ASE.
(bfd_elf64_bfd_reloc_name_lookup): Likewise.
(mips_elf64_rtype_to_howto): Likewise.
(bfd_elf64_bfd_is_target_special_symbol): Define.
* elfn32-mips.c (elf_micromips_howto_table_rel): New variable.
(elf_micromips_howto_table_rela): Likewise.
(mips16_gprel_reloc): Update for _bfd_mips_elf_reloc_unshuffle
and _bfd_mips_elf_reloc_shuffle changes.
(micromips_reloc_map): Likewise.
(bfd_elf32_bfd_reloc_type_lookup): Handle microMIPS ASE.
(bfd_elf32_bfd_reloc_name_lookup): Likewise.
(mips_elf_n32_rtype_to_howto): Likewise.
(bfd_elf32_bfd_is_target_special_symbol): Define.
* elfxx-mips.c (LA25_LUI_MICROMIPS_1): New macro.
(LA25_LUI_MICROMIPS_2): Likewise.
(LA25_J_MICROMIPS_1, LA25_J_MICROMIPS_2): Likewise.
(LA25_ADDIU_MICROMIPS_1, LA25_ADDIU_MICROMIPS_2): Likewise.
(TLS_RELOC_P): Handle microMIPS ASE.
(mips_elf_create_stub_symbol): Adjust value of stub symbol if
target is a microMIPS function.
(micromips_reloc_p): New function.
(micromips_reloc_shuffle_p): Likewise.
(got16_reloc_p, call16_reloc_p): Handle microMIPS ASE.
(got_disp_reloc_p, got_page_reloc_p): New functions.
(got_ofst_reloc_p): Likewise.
(got_hi16_reloc_p, got_lo16_reloc_p): Likewise.
(call_hi16_reloc_p, call_lo16_reloc_p): Likewise.
(hi16_reloc_p, lo16_reloc_p, jal_reloc_p): Handle microMIPS ASE.
(micromips_branch_reloc_p): New function.
(tls_gd_reloc_p, tls_ldm_reloc_p): Likewise.
(tls_gottprel_reloc_p): Likewise.
(_bfd_mips16_elf_reloc_unshuffle): Rename to...
(_bfd_mips_elf_reloc_unshuffle): ... this. Handle microMIPS
ASE.
(_bfd_mips16_elf_reloc_shuffle): Rename to...
(_bfd_mips_elf_reloc_shuffle): ... this. Handle microMIPS ASE.
(_bfd_mips_elf_lo16_reloc): Handle microMIPS ASE.
(mips_tls_got_index, mips_elf_got_page): Likewise.
(mips_elf_create_local_got_entry): Likewise.
(mips_elf_relocation_needs_la25_stub): Likewise.
(mips_elf_calculate_relocation): Likewise.
(mips_elf_perform_relocation): Likewise.
(_bfd_mips_elf_symbol_processing): Likewise.
(_bfd_mips_elf_add_symbol_hook): Likewise.
(_bfd_mips_elf_link_output_symbol_hook): Likewise.
(mips_elf_add_lo16_rel_addend): Likewise.
(_bfd_mips_elf_check_relocs): Likewise.
(mips_elf_adjust_addend): Likewise.
(_bfd_mips_elf_relocate_section): Likewise.
(mips_elf_create_la25_stub): Likewise.
(_bfd_mips_vxworks_finish_dynamic_symbol): Likewise.
(_bfd_mips_elf_gc_sweep_hook): Likewise.
(_bfd_mips_elf_is_target_special_symbol): New function.
(mips_elf_relax_delete_bytes): Likewise.
(opcode_descriptor): New structure.
(RA): New macro.
(OP32_SREG, OP32_TREG, OP16_VALID_REG): Likewise.
(b_insns_32, bc_insn_32, bz_insn_32, bzal_insn_32): New variables.
(beq_insn_32): Likewise.
(b_insn_16, bz_insn_16): New variables.
(BZC32_REG_FIELD): New macro.
(bz_rs_insns_32, bz_rt_insns_32): New variables.
(bzc_insns_32, bz_insns_16):Likewise.
(BZ16_REG, BZ16_REG_FIELD): New macros.
(jal_insn_32_bd16, jal_insn_32_bd32): New variables.
(jal_x_insn_32_bd32): Likewise.
(j_insn_32, jalr_insn_32): Likewise.
(ds_insns_32_bd16, ds_insns_32_bd32): Likewise.
(jalr_insn_16_bd16, jalr_insn_16_bd32, jr_insn_16): Likewise.
(JR16_REG): New macro.
(ds_insns_16_bd16): New variable.
(lui_insn): Likewise.
(addiu_insn, addiupc_insn): Likewise.
(ADDIUPC_REG_FIELD): New macro.
(MOVE32_RD, MOVE32_RS): Likewise.
(MOVE16_RD_FIELD, MOVE16_RS_FIELD): Likewise.
(move_insns_32, move_insns_16): New variables.
(nop_insn_32, nop_insn_16): Likewise.
(MATCH): New macro.
(find_match): New function.
(check_br16_dslot, check_br32_dslot): Likewise.
(check_br16, check_br32): Likewise.
(IS_BITSIZE): New macro.
(check_4byte_branch): New function.
(_bfd_mips_elf_relax_section): Likewise.
(_bfd_mips_elf_merge_private_bfd_data): Disallow linking MIPS16
and microMIPS modules together.
(_bfd_mips_elf_print_private_bfd_data): Handle microMIPS ASE.
* reloc.c (BFD_RELOC_MICROMIPS_7_PCREL_S1): New relocation.
(BFD_RELOC_MICROMIPS_10_PCREL_S1): Likewise.
(BFD_RELOC_MICROMIPS_16_PCREL_S1): Likewise.
(BFD_RELOC_MICROMIPS_GPREL16): Likewise.
(BFD_RELOC_MICROMIPS_JMP, BFD_RELOC_MICROMIPS_HI16): Likewise.
(BFD_RELOC_MICROMIPS_HI16_S): Likewise.
(BFD_RELOC_MICROMIPS_LO16): Likewise.
(BFD_RELOC_MICROMIPS_LITERAL): Likewise.
(BFD_RELOC_MICROMIPS_GOT16): Likewise.
(BFD_RELOC_MICROMIPS_CALL16): Likewise.
(BFD_RELOC_MICROMIPS_GOT_HI16): Likewise.
(BFD_RELOC_MICROMIPS_GOT_LO16): Likewise.
(BFD_RELOC_MICROMIPS_CALL_HI16): Likewise.
(BFD_RELOC_MICROMIPS_CALL_LO16): Likewise.
(BFD_RELOC_MICROMIPS_SUB): Likewise.
(BFD_RELOC_MICROMIPS_GOT_PAGE): Likewise.
(BFD_RELOC_MICROMIPS_GOT_OFST): Likewise.
(BFD_RELOC_MICROMIPS_GOT_DISP): Likewise.
(BFD_RELOC_MICROMIPS_HIGHEST): Likewise.
(BFD_RELOC_MICROMIPS_HIGHER): Likewise.
(BFD_RELOC_MICROMIPS_SCN_DISP): Likewise.
(BFD_RELOC_MICROMIPS_JALR): Likewise.
(BFD_RELOC_MICROMIPS_TLS_GD): Likewise.
(BFD_RELOC_MICROMIPS_TLS_LDM): Likewise.
(BFD_RELOC_MICROMIPS_TLS_DTPREL_HI16): Likewise.
(BFD_RELOC_MICROMIPS_TLS_DTPREL_LO16): Likewise.
(BFD_RELOC_MICROMIPS_TLS_GOTTPREL): Likewise.
(BFD_RELOC_MICROMIPS_TLS_TPREL_HI16): Likewise.
(BFD_RELOC_MICROMIPS_TLS_TPREL_LO16): Likewise.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
binutils/
2011-02-25 Chao-ying Fu <fu@mips.com>
Maciej W. Rozycki <macro@codesourcery.com>
* readelf.c (get_machine_flags): Handle microMIPS ASE.
(get_mips_symbol_other): Likewise.
gas/
2011-02-25 Maciej W. Rozycki <macro@codesourcery.com>
Chao-ying Fu <fu@mips.com>
Richard Sandiford <rdsandiford@googlemail.com>
* config/tc-mips.h (mips_segment_info): Add one bit for
microMIPS.
(TC_LABEL_IS_LOCAL): New macro.
(mips_label_is_local): New prototype.
* config/tc-mips.c (S0, S7): New macros.
(emit_branch_likely_macro): New variable.
(mips_set_options): Add micromips.
(mips_opts): Initialise micromips to -1.
(file_ase_micromips): New variable.
(CPU_HAS_MICROMIPS): New macro.
(hilo_interlocks): Set for microMIPS too.
(gpr_interlocks): Likewise.
(cop_interlocks): Likewise.
(cop_mem_interlocks): Likewise.
(HAVE_CODE_COMPRESSION): New macro.
(micromips_op_hash): New variable.
(micromips_nop16_insn, micromips_nop32_insn): New variables.
(NOP_INSN): Handle microMIPS ASE.
(mips32_to_micromips_reg_b_map): New macro.
(mips32_to_micromips_reg_c_map): Likewise.
(mips32_to_micromips_reg_d_map): Likewise.
(mips32_to_micromips_reg_e_map): Likewise.
(mips32_to_micromips_reg_f_map): Likewise.
(mips32_to_micromips_reg_g_map): Likewise.
(mips32_to_micromips_reg_l_map): Likewise.
(mips32_to_micromips_reg_n_map): Likewise.
(mips32_to_micromips_reg_h_map): New variable.
(mips32_to_micromips_reg_m_map): Likewise.
(mips32_to_micromips_reg_q_map): Likewise.
(micromips_to_32_reg_h_map): New variable.
(micromips_to_32_reg_i_map): Likewise.
(micromips_to_32_reg_m_map): Likewise.
(micromips_to_32_reg_q_map): Likewise.
(micromips_to_32_reg_b_map): New macro.
(micromips_to_32_reg_c_map): Likewise.
(micromips_to_32_reg_d_map): Likewise.
(micromips_to_32_reg_e_map): Likewise.
(micromips_to_32_reg_f_map): Likewise.
(micromips_to_32_reg_g_map): Likewise.
(micromips_to_32_reg_l_map): Likewise.
(micromips_to_32_reg_n_map): Likewise.
(micromips_imm_b_map, micromips_imm_c_map): New macros.
(RELAX_DELAY_SLOT_16BIT): New macro.
(RELAX_DELAY_SLOT_SIZE_FIRST): Likewise.
(RELAX_DELAY_SLOT_SIZE_SECOND): Likewise.
(RELAX_MICROMIPS_ENCODE, RELAX_MICROMIPS_P): New macros.
(RELAX_MICROMIPS_TYPE, RELAX_MICROMIPS_AT): Likewise.
(RELAX_MICROMIPS_U16BIT, RELAX_MICROMIPS_UNCOND): Likewise.
(RELAX_MICROMIPS_COMPACT, RELAX_MICROMIPS_LINK): Likewise.
(RELAX_MICROMIPS_RELAX32, RELAX_MICROMIPS_TOOFAR16): Likewise.
(RELAX_MICROMIPS_MARK_TOOFAR16): Likewise.
(RELAX_MICROMIPS_CLEAR_TOOFAR16): Likewise.
(RELAX_MICROMIPS_TOOFAR32): Likewise.
(RELAX_MICROMIPS_MARK_TOOFAR32): Likewise.
(RELAX_MICROMIPS_CLEAR_TOOFAR32): Likewise.
(INSERT_OPERAND, EXTRACT_OPERAND): Handle microMIPS ASE.
(mips_macro_warning): Add delay_slot_16bit_p, delay_slot_32bit_p,
fsize and insns.
(mips_mark_labels): New function.
(mips16_small, mips16_ext): Remove variables, replacing with...
(forced_insn_size): ... this.
(append_insn, mips16_ip): Update accordingly.
(micromips_insn_length): New function.
(insn_length): Return the length of microMIPS instructions.
(mips_record_mips16_mode): Rename to...
(mips_record_compressed_mode): ... this. Handle microMIPS ASE.
(install_insn): Handle microMIPS ASE.
(reglist_lookup): New function.
(is_size_valid, is_delay_slot_valid): Likewise.
(md_begin): Handle microMIPS ASE.
(md_assemble): Likewise. Update for append_insn interface change.
(micromips_reloc_p): New function.
(got16_reloc_p): Handle microMIPS ASE.
(hi16_reloc_p): Likewise.
(lo16_reloc_p): Likewise.
(jmp_reloc_p): New function.
(jalr_reloc_p): Likewise.
(matching_lo_reloc): Handle microMIPS ASE.
(insn_uses_reg, reg_needs_delay): Likewise.
(mips_move_labels): Likewise.
(mips16_mark_labels): Rename to...
(mips_compressed_mark_labels): ... this. Handle microMIPS ASE.
(gpr_mod_mask): New function.
(gpr_read_mask, gpr_write_mask): Handle microMIPS ASE.
(fpr_read_mask, fpr_write_mask): Likewise.
(insns_between, nops_for_vr4130, nops_for_insn): Likewise.
(fix_loongson2f_nop, fix_loongson2f_jump): Likewise.
(MICROMIPS_LABEL_CHAR): New macro.
(micromips_target_label, micromips_target_name): New variables.
(micromips_label_name, micromips_label_expr): New functions.
(micromips_label_inc, micromips_add_label): Likewise.
(mips_label_is_local): Likewise.
(micromips_map_reloc): Likewise.
(can_swap_branch_p): Handle microMIPS ASE.
(append_insn): Add expansionp argument. Handle microMIPS ASE.
(start_noreorder, end_noreorder): Handle microMIPS ASE.
(macro_start, macro_warning, macro_end): Likewise.
(brk_fmt, cop12_fmt, jalr_fmt, lui_fmt): New variables.
(mem12_fmt, mfhl_fmt, shft_fmt, trap_fmt): Likewise.
(BRK_FMT, COP12_FMT, JALR_FMT, LUI_FMT): New macros.
(MEM12_FMT, MFHL_FMT, SHFT_FMT, TRAP_FMT): Likewise.
(macro_build): Handle microMIPS ASE. Update for append_insn
interface change.
(mips16_macro_build): Update for append_insn interface change.
(macro_build_jalr): Handle microMIPS ASE.
(macro_build_lui): Likewise. Simplify.
(load_register): Handle microMIPS ASE.
(load_address): Likewise.
(move_register): Likewise.
(macro_build_branch_likely): New function.
(macro_build_branch_ccl): Likewise.
(macro_build_branch_rs): Likewise.
(macro_build_branch_rsrt): Likewise.
(macro): Handle microMIPS ASE.
(validate_micromips_insn): New function.
(expr_const_in_range): Likewise.
(mips_ip): Handle microMIPS ASE.
(options): Add OPTION_MICROMIPS and OPTION_NO_MICROMIPS.
(md_longopts): Add mmicromips and mno-micromips.
(md_parse_option): Handle OPTION_MICROMIPS and
OPTION_NO_MICROMIPS.
(mips_after_parse_args): Handle microMIPS ASE.
(md_pcrel_from): Handle microMIPS relocations.
(mips_force_relocation): Likewise.
(md_apply_fix): Likewise.
(mips_align): Handle microMIPS ASE.
(s_mipsset): Likewise.
(s_cpload, s_cpsetup, s_cpreturn): Use relocation wrappers.
(s_dtprel_internal): Likewise.
(s_gpword, s_gpdword): Likewise.
(s_insn): Handle microMIPS ASE.
(s_mips_stab): Likewise.
(relaxed_micromips_32bit_branch_length): New function.
(relaxed_micromips_16bit_branch_length): New function.
(md_estimate_size_before_relax): Handle microMIPS ASE.
(mips_fix_adjustable): Likewise.
(tc_gen_reloc): Handle microMIPS relocations.
(mips_relax_frag): Handle microMIPS ASE.
(md_convert_frag): Likewise.
(mips_frob_file_after_relocs): Likewise.
(mips_elf_final_processing): Likewise.
(mips_nop_opcode): Likewise.
(mips_handle_align): Likewise.
(md_show_usage): Handle microMIPS options.
* symbols.c (TC_LABEL_IS_LOCAL): New macro.
(S_IS_LOCAL): Add a TC_LABEL_IS_LOCAL check.
* doc/as.texinfo (Target MIPS options): Add -mmicromips and
-mno-micromips.
(-mmicromips, -mno-micromips): New options.
* doc/c-mips.texi (-mmicromips, -mno-micromips): New options.
(MIPS ISA): Document .set micromips and .set nomicromips.
(MIPS insn): Update for microMIPS support.
gas/testsuite/
2011-02-25 Maciej W. Rozycki <macro@codesourcery.com>
Chao-ying Fu <fu@mips.com>
Richard Sandiford <rdsandiford@googlemail.com>
* gas/mips/micromips.d: New test.
* gas/mips/micromips-branch-delay.d: Likewise.
* gas/mips/micromips-branch-relax.d: Likewise.
* gas/mips/micromips-branch-relax-pic.d: Likewise.
* gas/mips/micromips-size-1.d: Likewise.
* gas/mips/micromips-trap.d: Likewise.
* gas/mips/micromips.l: New stderr output.
* gas/mips/micromips-branch-delay.l: Likewise.
* gas/mips/micromips-branch-relax.l: Likewise.
* gas/mips/micromips-branch-relax-pic.l: Likewise.
* gas/mips/micromips-size-0.l: New list test.
* gas/mips/micromips-size-1.l: New stderr output.
* gas/mips/micromips.s: New test source.
* gas/mips/micromips-branch-delay.s: Likewise.
* gas/mips/micromips-branch-relax.s: Likewise.
* gas/mips/micromips-size-0.s: Likewise.
* gas/mips/micromips-size-1.s: Likewise.
* gas/mips/mips.exp: Run the new tests.
* gas/mips/dli.s: Use .p2align.
* gas/mips/elf_ase_micromips.d: New test.
* gas/mips/elf_ase_micromips-2.d: Likewise.
* gas/mips/micromips@abs.d: Likewise.
* gas/mips/micromips@add.d: Likewise.
* gas/mips/micromips@alnv_ps-swap.d: Likewise.
* gas/mips/micromips@and.d: Likewise.
* gas/mips/micromips@beq.d: Likewise.
* gas/mips/micromips@bge.d: Likewise.
* gas/mips/micromips@bgeu.d: Likewise.
* gas/mips/micromips@blt.d: Likewise.
* gas/mips/micromips@bltu.d: Likewise.
* gas/mips/micromips@branch-likely.d: Likewise.
* gas/mips/micromips@branch-misc-1.d: Likewise.
* gas/mips/micromips@branch-misc-2-64.d: Likewise.
* gas/mips/micromips@branch-misc-2.d: Likewise.
* gas/mips/micromips@branch-misc-2pic-64.d: Likewise.
* gas/mips/micromips@branch-misc-2pic.d: Likewise.
* gas/mips/micromips@branch-misc-4-64.d: Likewise.
* gas/mips/micromips@branch-misc-4.d: Likewise.
* gas/mips/micromips@branch-self.d: Likewise.
* gas/mips/micromips@cache.d: Likewise.
* gas/mips/micromips@daddi.d: Likewise.
* gas/mips/micromips@dli.d: Likewise.
* gas/mips/micromips@elf-jal.d: Likewise.
* gas/mips/micromips@elf-rel2.d: Likewise.
* gas/mips/micromips@elfel-rel2.d: Likewise.
* gas/mips/micromips@elf-rel4.d: Likewise.
* gas/mips/micromips@jal-svr4pic.d: Likewise.
* gas/mips/micromips@jal-svr4pic-noreorder.d: Likewise.
* gas/mips/micromips@lb-svr4pic-ilocks.d: Likewise.
* gas/mips/micromips@li.d: Likewise.
* gas/mips/micromips@loc-swap-dis.d: Likewise.
* gas/mips/micromips@loc-swap.d: Likewise.
* gas/mips/micromips@mips1-fp.d: Likewise.
* gas/mips/micromips@mips32-cp2.d: Likewise.
* gas/mips/micromips@mips32-imm.d: Likewise.
* gas/mips/micromips@mips32-sf32.d: Likewise.
* gas/mips/micromips@mips32.d: Likewise.
* gas/mips/micromips@mips32r2-cp2.d: Likewise.
* gas/mips/micromips@mips32r2-fp32.d: Likewise.
* gas/mips/micromips@mips32r2-sync.d: Likewise.
* gas/mips/micromips@mips32r2.d: Likewise.
* gas/mips/micromips@mips4-branch-likely.d: Likewise.
* gas/mips/micromips@mips4-fp.d: Likewise.
* gas/mips/micromips@mips4.d: Likewise.
* gas/mips/micromips@mips5.d: Likewise.
* gas/mips/micromips@mips64-cp2.d: Likewise.
* gas/mips/micromips@mips64.d: Likewise.
* gas/mips/micromips@mips64r2.d: Likewise.
* gas/mips/micromips@pref.d: Likewise.
* gas/mips/micromips@relax-at.d: Likewise.
* gas/mips/micromips@relax.d: Likewise.
* gas/mips/micromips@rol-hw.d: Likewise.
* gas/mips/micromips@uld2-eb.d: Likewise.
* gas/mips/micromips@uld2-el.d: Likewise.
* gas/mips/micromips@ulh2-eb.d: Likewise.
* gas/mips/micromips@ulh2-el.d: Likewise.
* gas/mips/micromips@ulw2-eb-ilocks.d: Likewise.
* gas/mips/micromips@ulw2-el-ilocks.d: Likewise.
* gas/mips/cache.d: Likewise.
* gas/mips/daddi.d: Likewise.
* gas/mips/mips32-imm.d: Likewise.
* gas/mips/pref.d: Likewise.
* gas/mips/elf-rel27.d: Handle microMIPS ASE.
* gas/mips/l_d.d: Likewise.
* gas/mips/l_d-n32.d: Likewise.
* gas/mips/l_d-n64.d: Likewise.
* gas/mips/ld.d: Likewise.
* gas/mips/ld-n32.d: Likewise.
* gas/mips/ld-n64.d: Likewise.
* gas/mips/s_d.d: Likewise.
* gas/mips/s_d-n32.d: Likewise.
* gas/mips/s_d-n64.d: Likewise.
* gas/mips/sd.d: Likewise.
* gas/mips/sd-n32.d: Likewise.
* gas/mips/sd-n64.d: Likewise.
* gas/mips/mips32.d: Update immediates.
* gas/mips/micromips@mips32-cp2.s: New test source.
* gas/mips/micromips@mips32-imm.s: Likewise.
* gas/mips/micromips@mips32r2-cp2.s: Likewise.
* gas/mips/micromips@mips64-cp2.s: Likewise.
* gas/mips/cache.s: Likewise.
* gas/mips/daddi.s: Likewise.
* gas/mips/mips32-imm.s: Likewise.
* gas/mips/elf-rel4.s: Handle microMIPS ASE.
* gas/mips/lb-pic.s: Likewise.
* gas/mips/ld.s: Likewise.
* gas/mips/mips32.s: Likewise.
* gas/mips/mips.exp: Add the micromips arch. Exclude mips16e
from micromips. Run mips32-imm.
* gas/mips/jal-mask-11.d: New test.
* gas/mips/jal-mask-12.d: Likewise.
* gas/mips/micromips@jal-mask-11.d: Likewise.
* gas/mips/jal-mask-1.s: Source for the new tests.
* gas/mips/jal-mask-21.d: New test.
* gas/mips/jal-mask-22.d: Likewise.
* gas/mips/micromips@jal-mask-12.d: Likewise.
* gas/mips/jal-mask-2.s: Source for the new tests.
* gas/mips/mips.exp: Run the new tests.
* gas/mips/mips16-e.d: Add --special-syms to `objdump'.
* gas/mips/tmips16-e.d: Likewise.
* gas/mips/mipsel16-e.d: Likewise.
* gas/mips/tmipsel16-e.d: Likewise.
* gas/mips/and.s: Adjust padding.
* gas/mips/beq.s: Likewise.
* gas/mips/bge.s: Likewise.
* gas/mips/bgeu.s: Likewise.
* gas/mips/blt.s: Likewise.
* gas/mips/bltu.s: Likewise.
* gas/mips/branch-misc-2.s: Likewise.
* gas/mips/jal.s: Likewise.
* gas/mips/li.s: Likewise.
* gas/mips/mips4.s: Likewise.
* gas/mips/mips4-fp.s: Likewise.
* gas/mips/relax.s: Likewise.
* gas/mips/and.d: Update accordingly.
* gas/mips/elf-jal.d: Likewise.
* gas/mips/jal.d: Likewise.
* gas/mips/li.d: Likewise.
* gas/mips/relax-at.d: Likewise.
* gas/mips/relax.d: Likewise.
include/elf/
2011-02-25 Chao-ying Fu <fu@mips.com>
Maciej W. Rozycki <macro@codesourcery.com>
* mips.h (R_MICROMIPS_min): New relocations.
(R_MICROMIPS_26_S1): Likewise.
(R_MICROMIPS_HI16, R_MICROMIPS_LO16): Likewise.
(R_MICROMIPS_GPREL16, R_MICROMIPS_LITERAL): Likewise.
(R_MICROMIPS_GOT16, R_MICROMIPS_PC7_S1): Likewise.
(R_MICROMIPS_PC10_S1, R_MICROMIPS_PC16_S1): Likewise.
(R_MICROMIPS_CALL16, R_MICROMIPS_GOT_DISP): Likewise.
(R_MICROMIPS_GOT_PAGE, R_MICROMIPS_GOT_OFST): Likewise.
(R_MICROMIPS_GOT_HI16, R_MICROMIPS_GOT_LO16): Likewise.
(R_MICROMIPS_SUB, R_MICROMIPS_HIGHER): Likewise.
(R_MICROMIPS_HIGHEST, R_MICROMIPS_CALL_HI16): Likewise.
(R_MICROMIPS_CALL_LO16, R_MICROMIPS_SCN_DISP): Likewise.
(R_MICROMIPS_JALR, R_MICROMIPS_HI0_LO16): Likewise.
(R_MICROMIPS_TLS_GD, R_MICROMIPS_TLS_LDM): Likewise.
(R_MICROMIPS_TLS_DTPREL_HI, R_MICROMIPS_TLS_DTPREL_LO): Likewise.
(R_MICROMIPS_TLS_GOTTPREL): Likewise.
(R_MICROMIPS_TLS_TPREL_HI16): Likewise.
(R_MICROMIPS_TLS_TPREL_LO16): Likewise.
(R_MICROMIPS_GPREL7_S2, R_MICROMIPS_PC23_S2): Likewise.
(R_MICROMIPS_max): Likewise.
(EF_MIPS_ARCH_ASE_MICROMIPS): New macro.
(STO_MIPS_ISA, STO_MIPS_FLAGS): Likewise.
(ELF_ST_IS_MIPS_PLT, ELF_ST_SET_MIPS_PLT): Likewise.
(STO_MICROMIPS): Likewise.
(ELF_ST_IS_MICROMIPS, ELF_ST_SET_MICROMIPS): Likewise.
(ELF_ST_IS_COMPRESSED): Likewise.
(STO_MIPS_PLT, STO_MIPS_PIC): Rework.
(ELF_ST_IS_MIPS_PIC, ELF_ST_SET_MIPS_PIC): Likewise.
(STO_MIPS16, ELF_ST_IS_MIPS16, ELF_ST_SET_MIPS16): Likewise.
include/opcode/
2011-02-25 Chao-ying Fu <fu@mips.com>
Maciej W. Rozycki <macro@codesourcery.com>
* mips.h (OP_MASK_EXTLSB, OP_SH_EXTLSB): New macros.
(OP_MASK_STYPE, OP_SH_STYPE): Likewise.
(OP_MASK_CODE10, OP_SH_CODE10): Likewise.
(OP_MASK_TRAP, OP_SH_TRAP): Likewise.
(OP_MASK_OFFSET12, OP_SH_OFFSET12): Likewise.
(OP_MASK_OFFSET10, OP_SH_OFFSET10): Likewise.
(OP_MASK_RS3, OP_SH_RS3): Likewise.
(OP_MASK_MB, OP_SH_MB, OP_MASK_MC, OP_SH_MC): Likewise.
(OP_MASK_MD, OP_SH_MD, OP_MASK_ME, OP_SH_ME): Likewise.
(OP_MASK_MF, OP_SH_MF, OP_MASK_MG, OP_SH_MG): Likewise.
(OP_MASK_MJ, OP_SH_MJ, OP_MASK_ML, OP_SH_ML): Likewise.
(OP_MASK_MP, OP_SH_MP, OP_MASK_MQ, OP_SH_MQ): Likewise.
(OP_MASK_IMMA, OP_SH_IMMA, OP_MASK_IMMB, OP_SH_IMMB): Likewise.
(OP_MASK_IMMC, OP_SH_IMMC, OP_MASK_IMMF, OP_SH_IMMF): Likewise.
(OP_MASK_IMMG, OP_SH_IMMG, OP_MASK_IMMH, OP_SH_IMMH): Likewise.
(OP_MASK_IMMI, OP_SH_IMMI, OP_MASK_IMMJ, OP_SH_IMMJ): Likewise.
(OP_MASK_IMML, OP_SH_IMML, OP_MASK_IMMM, OP_SH_IMMM): Likewise.
(OP_MASK_IMMN, OP_SH_IMMN, OP_MASK_IMMO, OP_SH_IMMO): Likewise.
(OP_MASK_IMMP, OP_SH_IMMP, OP_MASK_IMMQ, OP_SH_IMMQ): Likewise.
(OP_MASK_IMMU, OP_SH_IMMU, OP_MASK_IMMW, OP_SH_IMMW): Likewise.
(OP_MASK_IMMX, OP_SH_IMMX, OP_MASK_IMMY, OP_SH_IMMY): Likewise.
(INSN_WRITE_GPR_S): New macro.
(INSN2_BRANCH_DELAY_16BIT, INSN2_BRANCH_DELAY_32BIT): Likewise.
(INSN2_READ_FPR_D): Likewise.
(INSN2_MOD_GPR_MB, INSN2_MOD_GPR_MC): Likewise.
(INSN2_MOD_GPR_MD, INSN2_MOD_GPR_ME): Likewise.
(INSN2_MOD_GPR_MF, INSN2_MOD_GPR_MG): Likewise.
(INSN2_MOD_GPR_MJ, INSN2_MOD_GPR_MP): Likewise.
(INSN2_MOD_GPR_MQ, INSN2_MOD_SP): Likewise.
(INSN2_READ_GPR_31, INSN2_READ_GP, INSN2_READ_PC): Likewise.
(INSN2_UNCOND_BRANCH, INSN2_COND_BRANCH): Likewise.
(INSN2_MOD_GPR_MHI, INSN2_MOD_GPR_MM, INSN2_MOD_GPR_MN): Likewise.
(CPU_MICROMIPS): New macro.
(M_BC1FL, M_BC1TL, M_BC2FL, M_BC2TL): New enum values.
(M_BEQL, M_BGEZ, M_BGEZL, M_BGEZALL, M_BGTZ, M_BGTZL): Likewise.
(M_BLEZ, M_BLEZL, M_BLTZ, M_BLTZL, M_BLTZALL, M_BNEL): Likewise.
(M_CACHE_OB, M_JALS_1, M_JALS_2, M_JALS_A): Likewise.
(M_LDC2_OB, M_LDL_OB, M_LDM_AB, M_LDM_OB): Likewise.
(M_LDP_AB, M_LDP_OB, M_LDR_OB, M_LL_OB, M_LLD_OB): Likewise.
(M_LWC2_OB, M_LWL_OB, M_LWM_AB, M_LWM_OB): Likewise.
(M_LWP_AB, M_LWP_OB, M_LWR_OB): Likewise.
(M_LWU_OB, M_PREF_OB, M_SC_OB, M_SCD_OB): Likewise.
(M_SDC2_OB, M_SDL_OB, M_SDM_AB, M_SDM_OB): Likewise.
(M_SDP_AB, M_SDP_OB, M_SDR_OB): Likewise.
(M_SWC2_OB, M_SWL_OB, M_SWM_AB, M_SWM_OB): Likewise.
(M_SWP_AB, M_SWP_OB, M_SWR_OB): Likewise.
(MICROMIPSOP_MASK_MAJOR, MICROMIPSOP_SH_MAJOR): New macros.
(MICROMIPSOP_MASK_IMMEDIATE, MICROMIPSOP_SH_IMMEDIATE): Likewise.
(MICROMIPSOP_MASK_DELTA, MICROMIPSOP_SH_DELTA): Likewise.
(MICROMIPSOP_MASK_CODE10, MICROMIPSOP_SH_CODE10): Likewise.
(MICROMIPSOP_MASK_TRAP, MICROMIPSOP_SH_TRAP): Likewise.
(MICROMIPSOP_MASK_SHAMT, MICROMIPSOP_SH_SHAMT): Likewise.
(MICROMIPSOP_MASK_TARGET, MICROMIPSOP_SH_TARGET): Likewise.
(MICROMIPSOP_MASK_EXTLSB, MICROMIPSOP_SH_EXTLSB): Likewise.
(MICROMIPSOP_MASK_EXTMSBD, MICROMIPSOP_SH_EXTMSBD): Likewise.
(MICROMIPSOP_MASK_INSMSB, MICROMIPSOP_SH_INSMSB): Likewise.
(MICROMIPSOP_MASK_CODE, MICROMIPSOP_SH_CODE): Likewise.
(MICROMIPSOP_MASK_CODE2, MICROMIPSOP_SH_CODE2): Likewise.
(MICROMIPSOP_MASK_CACHE, MICROMIPSOP_SH_CACHE): Likewise.
(MICROMIPSOP_MASK_SEL, MICROMIPSOP_SH_SEL): Likewise.
(MICROMIPSOP_MASK_OFFSET12, MICROMIPSOP_SH_OFFSET12): Likewise.
(MICROMIPSOP_MASK_3BITPOS, MICROMIPSOP_SH_3BITPOS): Likewise.
(MICROMIPSOP_MASK_STYPE, MICROMIPSOP_SH_STYPE): Likewise.
(MICROMIPSOP_MASK_OFFSET10, MICROMIPSOP_SH_OFFSET10): Likewise.
(MICROMIPSOP_MASK_RS, MICROMIPSOP_SH_RS): Likewise.
(MICROMIPSOP_MASK_RT, MICROMIPSOP_SH_RT): Likewise.
(MICROMIPSOP_MASK_RD, MICROMIPSOP_SH_RD): Likewise.
(MICROMIPSOP_MASK_FS, MICROMIPSOP_SH_FS): Likewise.
(MICROMIPSOP_MASK_FT, MICROMIPSOP_SH_FT): Likewise.
(MICROMIPSOP_MASK_FD, MICROMIPSOP_SH_FD): Likewise.
(MICROMIPSOP_MASK_FR, MICROMIPSOP_SH_FR): Likewise.
(MICROMIPSOP_MASK_RS3, MICROMIPSOP_SH_RS3): Likewise.
(MICROMIPSOP_MASK_PREFX, MICROMIPSOP_SH_PREFX): Likewise.
(MICROMIPSOP_MASK_BCC, MICROMIPSOP_SH_BCC): Likewise.
(MICROMIPSOP_MASK_CCC, MICROMIPSOP_SH_CCC): Likewise.
(MICROMIPSOP_MASK_COPZ, MICROMIPSOP_SH_COPZ): Likewise.
(MICROMIPSOP_MASK_MB, MICROMIPSOP_SH_MB): Likewise.
(MICROMIPSOP_MASK_MC, MICROMIPSOP_SH_MC): Likewise.
(MICROMIPSOP_MASK_MD, MICROMIPSOP_SH_MD): Likewise.
(MICROMIPSOP_MASK_ME, MICROMIPSOP_SH_ME): Likewise.
(MICROMIPSOP_MASK_MF, MICROMIPSOP_SH_MF): Likewise.
(MICROMIPSOP_MASK_MG, MICROMIPSOP_SH_MG): Likewise.
(MICROMIPSOP_MASK_MH, MICROMIPSOP_SH_MH): Likewise.
(MICROMIPSOP_MASK_MI, MICROMIPSOP_SH_MI): Likewise.
(MICROMIPSOP_MASK_MJ, MICROMIPSOP_SH_MJ): Likewise.
(MICROMIPSOP_MASK_ML, MICROMIPSOP_SH_ML): Likewise.
(MICROMIPSOP_MASK_MM, MICROMIPSOP_SH_MM): Likewise.
(MICROMIPSOP_MASK_MN, MICROMIPSOP_SH_MN): Likewise.
(MICROMIPSOP_MASK_MP, MICROMIPSOP_SH_MP): Likewise.
(MICROMIPSOP_MASK_MQ, MICROMIPSOP_SH_MQ): Likewise.
(MICROMIPSOP_MASK_IMMA, MICROMIPSOP_SH_IMMA): Likewise.
(MICROMIPSOP_MASK_IMMB, MICROMIPSOP_SH_IMMB): Likewise.
(MICROMIPSOP_MASK_IMMC, MICROMIPSOP_SH_IMMC): Likewise.
(MICROMIPSOP_MASK_IMMD, MICROMIPSOP_SH_IMMD): Likewise.
(MICROMIPSOP_MASK_IMME, MICROMIPSOP_SH_IMME): Likewise.
(MICROMIPSOP_MASK_IMMF, MICROMIPSOP_SH_IMMF): Likewise.
(MICROMIPSOP_MASK_IMMG, MICROMIPSOP_SH_IMMG): Likewise.
(MICROMIPSOP_MASK_IMMH, MICROMIPSOP_SH_IMMH): Likewise.
(MICROMIPSOP_MASK_IMMI, MICROMIPSOP_SH_IMMI): Likewise.
(MICROMIPSOP_MASK_IMMJ, MICROMIPSOP_SH_IMMJ): Likewise.
(MICROMIPSOP_MASK_IMML, MICROMIPSOP_SH_IMML): Likewise.
(MICROMIPSOP_MASK_IMMM, MICROMIPSOP_SH_IMMM): Likewise.
(MICROMIPSOP_MASK_IMMN, MICROMIPSOP_SH_IMMN): Likewise.
(MICROMIPSOP_MASK_IMMO, MICROMIPSOP_SH_IMMO): Likewise.
(MICROMIPSOP_MASK_IMMP, MICROMIPSOP_SH_IMMP): Likewise.
(MICROMIPSOP_MASK_IMMQ, MICROMIPSOP_SH_IMMQ): Likewise.
(MICROMIPSOP_MASK_IMMU, MICROMIPSOP_SH_IMMU): Likewise.
(MICROMIPSOP_MASK_IMMW, MICROMIPSOP_SH_IMMW): Likewise.
(MICROMIPSOP_MASK_IMMX, MICROMIPSOP_SH_IMMX): Likewise.
(MICROMIPSOP_MASK_IMMY, MICROMIPSOP_SH_IMMY): Likewise.
(MICROMIPSOP_MASK_CODE, MICROMIPSOP_SH_CODE): Likewise.
(MICROMIPSOP_MASK_CODE2, MICROMIPSOP_SH_CODE2): Likewise.
(MICROMIPSOP_MASK_CACHE, MICROMIPSOP_SH_CACHE): Likewise.
(MICROMIPSOP_MASK_CODE20, MICROMIPSOP_SH_CODE20): Likewise.
(MICROMIPSOP_MASK_PERFREG, MICROMIPSOP_SH_PERFREG): Likewise.
(MICROMIPSOP_MASK_CODE19, MICROMIPSOP_SH_CODE19): Likewise.
(MICROMIPSOP_MASK_ALN, MICROMIPSOP_SH_ALN): Likewise.
(MICROMIPSOP_MASK_VECBYTE, MICROMIPSOP_SH_VECBYTE): Likewise.
(MICROMIPSOP_MASK_VECALIGN, MICROMIPSOP_SH_VECALIGN): Likewise.
(MICROMIPSOP_MASK_DSPACC, MICROMIPSOP_SH_DSPACC): Likewise.
(MICROMIPSOP_MASK_DSPACC_S, MICROMIPSOP_SH_DSPACC_S): Likewise.
(MICROMIPSOP_MASK_DSPSFT, MICROMIPSOP_SH_DSPSFT): Likewise.
(MICROMIPSOP_MASK_DSPSFT_7, MICROMIPSOP_SH_DSPSFT_7): Likewise.
(MICROMIPSOP_MASK_SA3, MICROMIPSOP_SH_SA3): Likewise.
(MICROMIPSOP_MASK_SA4, MICROMIPSOP_SH_SA4): Likewise.
(MICROMIPSOP_MASK_IMM8, MICROMIPSOP_SH_IMM8): Likewise.
(MICROMIPSOP_MASK_IMM10, MICROMIPSOP_SH_IMM10): Likewise.
(MICROMIPSOP_MASK_WRDSP, MICROMIPSOP_SH_WRDSP): Likewise.
(MICROMIPSOP_MASK_RDDSP, MICROMIPSOP_SH_RDDSP): Likewise.
(MICROMIPSOP_MASK_BP, MICROMIPSOP_SH_BP): Likewise.
(MICROMIPSOP_MASK_MT_U, MICROMIPSOP_SH_MT_U): Likewise.
(MICROMIPSOP_MASK_MT_H, MICROMIPSOP_SH_MT_H): Likewise.
(MICROMIPSOP_MASK_MTACC_T, MICROMIPSOP_SH_MTACC_T): Likewise.
(MICROMIPSOP_MASK_MTACC_D, MICROMIPSOP_SH_MTACC_D): Likewise.
(MICROMIPSOP_MASK_BBITIND, MICROMIPSOP_SH_BBITIND): Likewise.
(MICROMIPSOP_MASK_CINSPOS, MICROMIPSOP_SH_CINSPOS): Likewise.
(MICROMIPSOP_MASK_CINSLM1, MICROMIPSOP_SH_CINSLM1): Likewise.
(MICROMIPSOP_MASK_SEQI, MICROMIPSOP_SH_SEQI): Likewise.
(micromips_opcodes): New declaration.
(bfd_micromips_num_opcodes): Likewise.
ld/testsuite/
2011-02-25 Catherine Moore <clm@codesourcery.com>
Chao-ying Fu <fu@mips.com>
Maciej W. Rozycki <macro@codesourcery.com>
* lib/ld-lib.exp (run_dump_test): Support distinct assembler
flags for the same source named multiple times.
* ld-mips-elf/jalx-1.s: New test source.
* ld-mips-elf/jalx-1.d: New test output.
* ld-mips-elf/jalx-1.ld: New test linker script.
* ld-mips-elf/jalx-2-main.s: New test source.
* ld-mips-elf/jalx-2-ex.s: Likewise.
* ld-mips-elf/jalx-2-printf.s: Likewise.
* ld-mips-elf/jalx-2.dd: New test output.
* ld-mips-elf/jalx-2.ld: New test linker script.
* ld-mips-elf/mips16-and-micromips.d: New test.
* ld-mips-elf/mips-elf.exp: Run the new tests
opcodes/
2011-02-25 Chao-ying Fu <fu@mips.com>
Maciej W. Rozycki <macro@codesourcery.com>
* micromips-opc.c: New file.
* mips-dis.c (micromips_to_32_reg_b_map): New array.
(micromips_to_32_reg_c_map, micromips_to_32_reg_d_map): Likewise.
(micromips_to_32_reg_e_map, micromips_to_32_reg_f_map): Likewise.
(micromips_to_32_reg_g_map, micromips_to_32_reg_l_map): Likewise.
(micromips_to_32_reg_q_map): Likewise.
(micromips_imm_b_map, micromips_imm_c_map): Likewise.
(micromips_ase): New variable.
(is_micromips): New function.
(set_default_mips_dis_options): Handle microMIPS ASE.
(print_insn_micromips): New function.
(is_compressed_mode_p): Likewise.
(_print_insn_mips): Handle microMIPS instructions.
* Makefile.am (CFILES): Add micromips-opc.c.
* configure.in (bfd_mips_arch): Add micromips-opc.lo.
* Makefile.in: Regenerate.
* configure: Regenerate.
* mips-dis.c (micromips_to_32_reg_h_map): New variable.
(micromips_to_32_reg_i_map): Likewise.
(micromips_to_32_reg_m_map): Likewise.
(micromips_to_32_reg_n_map): New macro.
2011-07-24 14:20:15 +00:00
7a9068fe16
Add initial Intel K1OM support.
...
bfd/
2011-07-22 H.J. Lu <hongjiu.lu@intel.com>
* Makefile.am (ALL_MACHINES): Add cpu-k1om.lo.
(ALL_MACHINES_CFILES): Add cpu-k1om.c.
* Makefile.in: Regenerated.
* archures.c (bfd_architecture): Add bfd_arch_k1om.
(bfd_k1om_arch): New.
(bfd_archures_list): Add &bfd_k1om_arch.
* bfd-in2.h: Regenerated.
* config.bfd (targ64_selvecs): Add bfd_elf64_k1om_vec if
bfd_elf64_x86_64_vec is supported. Add bfd_elf64_k1om_freebsd_vec
if bfd_elf64_x86_64_freebsd_vec is supported.
(targ_selvecs): Likewise.
* configure.in: Support bfd_elf64_k1om_vec and
bfd_elf64_k1om_freebsd_vec.
* configure: Regenerated.
* cpu-k1om.c: New.
* elf64-x86-64.c (elf64_k1om_elf_object_p): New.
(bfd_elf64_k1om_vec): Likewise.
(bfd_elf64_k1om_freebsd_vec): Likewise.
* targets.c (bfd_elf64_k1om_vec): New.
(bfd_elf64_k1om_freebsd_vec): Likewise.
(_bfd_target_vector): Add bfd_elf64_k1om_vec and
bfd_elf64_k1om_freebsd_vec.
binutils/
2011-07-22 H.J. Lu <hongjiu.lu@intel.com>
* dwarf.c (init_dwarf_regnames): Handle EM_K1OM.
* elfedit.c (elf_machine): Support EM_K1OM.
(elf_class): Likewise.
* readelf.c (guess_is_rela): Handle EM_K1OM.
(dump_relocations): Likewise.
(get_machine_name): Likewise.
(get_section_type_name): Likewise.
(get_elf_section_flags): Likewise.
(process_section_headers): Likewise.
(get_symbol_index_type): Likewise.
(is_32bit_abs_reloc): Likewise.
(is_32bit_pcrel_reloc): Likewise.
(is_64bit_abs_reloc): Likewise.
(is_64bit_pcrel_reloc): Likewise.
(is_none_reloc): Likewise.
* doc/binutils.texi: Mention K1OM for elfedit.
binutils/testsuite/
2011-07-22 H.J. Lu <hongjiu.lu@intel.com>
* binutils-all/elfedit.exp: Run elfedit-4.
* binutils-all/elfedit-4.d: New.
gas/
2011-07-22 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (cpu_arch): Add k1om.
(i386_align_code): Handle PROCESSOR_K1OM.
(check_cpu_arch_compatible): Check EM_K1OM.
(i386_arch): Handle Intel K1OM.
(i386_mach): Return bfd_mach_k1om for Intel K1OM.
(i386_target_format): Return ELF_TARGET_K1OM_FORMAT for Intel
K1OM.
* config/tc-i386.h (ELF_TARGET_K1OM_FORMAT): New.
(processor_type): Add PROCESSOR_K1OM.
* doc/c-i386.texi: Document k1om.
gas/testsuite/
2011-07-22 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/k1om.d: New.
* gas/i386/k1om-inval.l: Likewise.
* gas/i386/k1om-inval.s: Likewise.
* gas/i386/i386.exp: Run k1om-inval and k1om.
include/elf/
2011-07-22 H.J. Lu <hongjiu.lu@intel.com>
* common.h (EM_K1OM): New.
ld/
2011-07-22 H.J. Lu <hongjiu.lu@intel.com>
* Makefile.am (ALL_64_EMULATIONS): Add eelf_k1om.o and
eelf_k1om_fbsd.o
(eelf_k1om.c): New.
(eelf_k1om_fbsd.c): Likewise.
* Makefile.in: Regenerated.
* configure.tgt (targ64_extra_emuls): Add elf_k1om if elf_x86_64
is supported. Add elf_k1om_fbsd if elf_x86_64_fbsd is supported.
(targ_extra_emuls): Likewise.
* emulparams/elf_k1om.sh: New.
* emulparams/elf_k1om_fbsd.sh: Likewise.
ld/testsuite/
2011-07-22 H.J. Lu <hongjiu.lu@intel.com>
* ld-x86-64/abs-k1om.d: New.
* ld-x86-64/protected2-k1om.d: Likewise.
* ld-x86-64/protected3-k1om.d: Likewise.
* ld-x86-64/x86-64.exp: Run abs-k1om, protected2-k1om and
protected3-k1om.
opcodes/
2011-07-22 H.J. Lu <hongjiu.lu@intel.com>
* configure.in: Handle bfd_k1om_arch.
* configure: Regenerated.
* disassemble.c (disassembler): Handle bfd_k1om_arch.
* i386-dis.c (print_insn): Handle bfd_mach_k1om and
bfd_mach_k1om_intel_syntax.
* i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to
~(CpuL1OM|CpuK1OM). Add CPU_K1OM_FLAGS.
(cpu_flags): Add CpuK1OM.
* i386-opc.h (CpuK1OM): New.
(i386_cpu_flags): Add cpuk1om.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2011-07-22 20:22:38 +00:00
2aab8acd29
Fix a typo in doc/c-i386.texi.
...
2011-07-18 H.J. Lu <hongjiu.lu@intel.com>
* doc/c-i386.texi: Fix a typo.
2011-07-18 13:32:31 +00:00
9c55345c8c
ELFOSABI_GNU
...
bfd/
* elf.c (_bfd_elf_set_osabi): Use ELFOSABI_GNU name instead of
ELFOSABI_LINUX alias.
* elf32-hppa.c: Likewise.
* elf32-i370.c: Likewise.
* elf64-hppa.c: Likewise.
binutils/
* elfedit.c (osabis): Use ELFOSABI_GNU name instead of ELFOSABI_LINUX
alias and ELFOSABI_HURD. Add GNU alias.
* readelf.c (get_osabi_name, get_symbol_binding, get_symbol_type):
Likewise.
* doc/binutils.texi <elfedit>: Update accordingly.
elfcpp/
* elfcpp.h (ELFOSABI): Add ELFOSABI_GNU with value of ELFOSABI_LINUX,
keep ELFOSABI_LINUX as an alias. Remove ELFOSABI_HURD.
gas/
* config/obj-elf.c (obj_elf_type): Use ELFOSABI_GNU name instead of
ELFOSABI_LINUX alias.
* config/tc-ia64.c: Likewise.
include/elf/
* common.h (ELFOSABI_GNU): Define, replaces...
(ELFOSABI_LINUX): ... this, kept as an alias.
(ELFOSABI_HURD): Remove.
ld/testsuite/
* ld-ifunc/ifunc.exp: Update for changed output.
* ld-unique/unique.exp: Likewise.
2011-07-03 13:37:09 +00:00
b47d265edb
* doc/Makefile.am: (CPU_DOCS): Add c-xstormy16.texi.
...
* doc/Makefile.in: Regenerate.
* doc/all.texi: Set XSTORMY16.
* doc/c-xstormy16.texi: New file.
2011-06-20 10:27:56 +00:00
aa137e4d51
* Makefile.am (ALL_MACHINES): Add cpu-tilegx.lo and cpu-tilepro.lo.
...
(ALL_MACHINE_CFILES): Add cpu-tilegx.c and cpu-tilepro.c.
(BFD32_BACKENDS): Add elf32-tilegx.lo, elf32-tilepro.lo,
and elfxx-tilegx.lo.
(BFD32_BACKENDS_CFILES): Add elf32-tilegx.c elf32-tilepro.c, and
elfxx-tilegx.c.
(BFD64_BACKENDS): Add elf64-tilegx.lo.
(BFD64_BACKENDS_CFILES): Add elf64-tilegx.c.
* Makefile.in: Regenerate.
* arctures.c (bfd_architecture): Define bfd_arch_tilepro,
bfd_arch_tilegx, bfd_mach_tilepro, bfd_mach_tilegx.
(bfd_arch_info): Add bfd_tilegx_arch, bfd_tilepro_arch.
(bfd_archures_list): Add bfd_tilegx_arch, bfd_tilepro_arch.
bfd-in2.h: Regenerate.
* config.bfd: Handle tilegx-*-* and tilepro-*-*.
* configure.in: Handle bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec,
and bfd_elf64_tilegx_vec.
* configure: Regenerate.
* elf-bfd.h (enum elf_target_id): Define TILEGX_ELF_DATA and
TILEPRO_ELF_DATA.
* libbfd.h: Regenerate.
* reloc.c: Add BFD_RELOC_TILEPRO_{COPY, GLOB_DAT, JMP_SLOT,
RELATIVE, BROFF_X1, JOFFLONG_X1, JOFFLONG_X1_PLT, IMM8_X0,
IMM8_Y0, IMM8_X1, IMM8_Y1, DEST_IMM8_X1, MT_IMM15_X1, MF_IMM15_X1,
IMM16_X0, IMM16_X1, IMM16_X0_LO, IMM16_X1_LO, IMM16_X0_HI,
IMM16_X1_HI, IMM16_X0_HA, IMM16_X1_HA, IMM16_X0_PCREL,
IMM16_X1_PCREL, IMM16_X0_LO_PCREL, IMM16_X1_LO_PCREL,
IMM16_X0_HI_PCREL, IMM16_X1_HI_PCREL, IMM16_X0_HA_PCREL,
IMM16_X1_HA_PCREL, IMM16_X0_GOT, IMM16_X1_GOT, IMM16_X0_GOT_LO,
IMM16_X1_GOT_LO, IMM16_X0_GOT_HI, IMM16_X1_GOT_HI,
IMM16_X0_GOT_HA, IMM16_X1_GOT_HA, MMSTART_X0, MMEND_X0,
MMSTART_X1, MMEND_X1, SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1,
IMM16_X0_TLS_GD, IMM16_X1_TLS_GD, IMM16_X0_TLS_GD_LO,
IMM16_X1_TLS_GD_LO, IMM16_X0_TLS_GD_HI, IMM16_X1_TLS_GD_HI,
IMM16_X0_TLS_GD_HA, IMM16_X1_TLS_GD_HA, IMM16_X0_TLS_IE,
IMM16_X1_TLS_IE, IMM16_X0_TLS_IE_LO, IMM16_X1_TLS_IE_LO,
IMM16_X0_TLS_IE_HI, IMM16_X1_TLS_IE_HI, IMM16_X0_TLS_IE_HA,
IMM16_X1_TLS_IE_HA, TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32}
Add BFD_RELOC_TILEGX_{HW0, HW1, HW2, HW3, HW0_LAST, HW1_LAST,
HW2_LAST, COPY, GLOB_DAT, JMP_SLOT, RELATIVE, BROFF_X1,
JUMPOFF_X1, JUMPOFF_X1_PLT, IMM8_X0, IMM8_Y0, IMM8_X1, IMM8_Y1,
DEST_IMM8_X1, MT_IMM14_X1, MF_IMM14_X1, MMSTART_X0, MMEND_X0,
SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1, IMM16_X0_HW0,
IMM16_X1_HW0, IMM16_X0_HW1, IMM16_X1_HW1, IMM16_X0_HW2,
IMM16_X1_HW2, IMM16_X0_HW3, IMM16_X1_HW3, IMM16_X0_HW0_LAST,
IMM16_X1_HW0_LAST, IMM16_X0_HW1_LAST, IMM16_X1_HW1_LAST,
IMM16_X0_HW2_LAST, IMM16_X1_HW2_LAST, IMM16_X0_HW0_PCREL,
IMM16_X1_HW0_PCREL, IMM16_X0_HW1_PCREL, IMM16_X1_HW1_PCREL,
IMM16_X0_HW2_PCREL, IMM16_X1_HW2_PCREL, IMM16_X0_HW3_PCREL,
IMM16_X1_HW3_PCREL, IMM16_X0_HW0_LAST_PCREL,
IMM16_X1_HW0_LAST_PCREL, IMM16_X0_HW1_LAST_PCREL,
IMM16_X1_HW1_LAST_PCREL, IMM16_X0_HW2_LAST_PCREL,
IMM16_X1_HW2_LAST_PCREL, IMM16_X0_HW0_GOT, IMM16_X1_HW0_GOT,
IMM16_X0_HW1_GOT, IMM16_X1_HW1_GOT, IMM16_X0_HW2_GOT,
IMM16_X1_HW2_GOT, IMM16_X0_HW3_GOT, IMM16_X1_HW3_GOT,
IMM16_X0_HW0_LAST_GOT, IMM16_X1_HW0_LAST_GOT,
IMM16_X0_HW1_LAST_GOT, IMM16_X1_HW1_LAST_GOT,
IMM16_X0_HW2_LAST_GOT, IMM16_X1_HW2_LAST_GOT, IMM16_X0_HW0_TLS_GD,
IMM16_X1_HW0_TLS_GD, IMM16_X0_HW1_TLS_GD, IMM16_X1_HW1_TLS_GD,
IMM16_X0_HW2_TLS_GD, IMM16_X1_HW2_TLS_GD, IMM16_X0_HW3_TLS_GD,
IMM16_X1_HW3_TLS_GD, IMM16_X0_HW0_LAST_TLS_GD,
IMM16_X1_HW0_LAST_TLS_GD, IMM16_X0_HW1_LAST_TLS_GD,
IMM16_X1_HW1_LAST_TLS_GD, IMM16_X0_HW2_LAST_TLS_GD,
IMM16_X1_HW2_LAST_TLS_GD, IMM16_X0_HW0_TLS_IE,
IMM16_X1_HW0_TLS_IE, IMM16_X0_HW1_TLS_IE, IMM16_X1_HW1_TLS_IE,
IMM16_X0_HW2_TLS_IE, IMM16_X1_HW2_TLS_IE, IMM16_X0_HW3_TLS_IE,
IMM16_X1_HW3_TLS_IE, IMM16_X0_HW0_LAST_TLS_IE,
IMM16_X1_HW0_LAST_TLS_IE, IMM16_X0_HW1_LAST_TLS_IE,
IMM16_X1_HW1_LAST_TLS_IE, IMM16_X0_HW2_LAST_TLS_IE,
IMM16_X1_HW2_LAST_TLS_IE, TLS_DTPMOD64, TLS_DTPOFF64, TLS_TPOFF64,
TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32}
* targets.c (bfd_elf32_tilegx_vec): Declare.
(bfd_elf32_tilepro_vec): Declare.
(bfd_elf64_tilegx_vec): Declare.
(bfd_target_vector): Add bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec,
and bfd_elf64_tilegx_vec.
* cpu-tilegx.c: New file.
* cpu-tilepro.c: New file.
* elf32-tilepro.h: New file.
* elf32-tilepro.c: New file.
* elf32-tilegx.c: New file.
* elf32-tilegx.h: New file.
* elf64-tilegx.c: New file.
* elf64-tilegx.h: New file.
* elfxx-tilegx.c: New file.
* elfxx-tilegx.h: New file.
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-tilegx.c and
config/tc-tilepro.c.
(TARGET_CPU_HFILES): Add config/tc-tilegx.h and
config/tc-tilepro.h.
* Makefile.in: Regenerate.
* configure.tgt (tilepro-*-*): New.
(tilegx-*-*): Likewise.
* config/tc-tilegx.c: New file.
* config/tc-tilegx.h: Likewise.
* config/tc-tilepro.h: Likewise.
* config/tc-tilepro.c: Likewise.
* doc/Makefile.am (CPU_DOCS): Add c-tilegx.texi and
c-tilepro.texi.
* doc/Makefile.in: Regenerate.
* doc/all.texi (TILEGX): Define.
(TILEPRO): Define.
* doc/as.texinfo: Add Tile-Gx and TILEPro documentation. Include
c-tilegx.texi and c-tilepro.texi.
* doc/c-tilegx.texi: New.
* doc/c-tilepro.texi: New.
* gas/tilepro/t_constants.s: New file.
* gas/tilepro/t_constants.d: Likewise.
* gas/tilepro/t_insns.s: Likewise.
* gas/tilepro/tilepro.exp: Likewise.
* gas/tilepro/t_insns.d: Likewise.
* gas/tilegx/tilegx.exp: Likewise.
* gas/tilegx/t_insns.d: Likewise.
* gas/tilegx/t_insns.s: Likewise.
* dis-asm.h (print_insn_tilegx): Declare.
(print_insn_tilepro): Likewise.
* tilegx.h: New file.
* tilepro.h: New file.
* common.h: Add EM_TILEGX.
* tilegx.h: New file.
* tilepro.h: New file.
* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32tilegx.c and
eelf32tilepro.c.
(ALL_64_EMULATION_SOURCES): Add eelf64tilegx.c.
(eelf32tilegx.c): New target.
(eelf32tilepro.c): Likewise.
(eelf64tilegx.c): Likewise.
* Makefile.in: Regenerate.
* configure.tgt: Handle tilegx-*-* and tilepro-*-*.
* emulparams/elf32tilegx.sh: New file.
* emulparams/elf64tilegx.sh: New file.
* emulparams/elf32tilepro.sh: New file.
* ld-elf/eh5.d: Don't run on tile*.
* ld-srec/srec.exp: xfail on tile*.
* ld-tilegx/external.s: New file.
* ld-tilegx/reloc.d: New file.
* ld-tilegx/reloc.s: New file.
* ld-tilegx/tilegx.exp: New file.
* ld-tilepro/external.s: New file.
* ld-tilepro/reloc.d: New file.
* ld-tilepro/reloc.s: New file.
* ld-tilepro/tilepro.exp: New file.
* Makefile.am (TARGET_LIBOPCODES_CFILES): Add tilegx-dis.c,
tilegx-opc.c, tilepro-dis.c, and tilepro-opc.c.
* Makefile.in: Regenerate.
* configure.in: Handle bfd_tilegx_arch and bfd_tilepro_arch.
* configure: Regenerate.
* disassemble.c (disassembler): Add ARCH_tilegx and ARCH_tilepro.
* po/POTFILES.in: Regenerate.
* tilegx-dis.c: New file.
* tilegx-opc.c: New file.
* tilepro-dis.c: New file.
* tilepro-opc.c: New file.
2011-06-13 15:18:54 +00:00
6c30d220f1
Support AVX Programming Reference (June, 2011).
...
gas/
2011-06-10 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2011)
* config/tc-i386.c (i386_error): Add invalid_vsib_address and
unsupported_vector_index_register.
(cpu_arch): Add .avx2, .bmi2, .lzcnt and .invpcid.
(check_VecOperands): New.
(match_template): Call check_VecOperands. Handle
invalid_vsib_address and unsupported_vector_index_register.
(build_modrm_byte): Support VecSIB. Check register-only source
operand when two source operands are swapped.
(i386_index_check): Allow Xmm/Ymm index registers.
* doc/c-i386.texi: Document avx2/.avx2, bmi2/.bmi2, lzcnt/.lzcnt
and invpcid./invpcid.
gas/testsuite/
2011-06-10 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2011)
* gas/i386/arch-10-1.l: Updated.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/arch-10.s: Add LZCNT to comments.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/arch-10-lzcnt.d: New.
* gas/i386/avx-gather-intel.d: Likewise.
* gas/i386/avx-gather.d: Likewise.
* gas/i386/avx-gather.s: Likewise.
* gas/i386/avx2-intel.d: Likewise.
* gas/i386/avx2.d: Likewise.
* gas/i386/avx2.s: Likewise
* gas/i386/avx256int-intel.d: Likewise.
* gas/i386/avx256int.d: Likewise.
* gas/i386/avx256int.s: Likewise.
* gas/i386/bmi2-intel.d: Likewise.
* gas/i386/bmi2.d: Likewise.
* gas/i386/bmi2.s: Likewise.
* gas/i386/inval-invpcid.l:Likewise.
* gas/i386/inval-invpcid.s: Likewise.
* gas/i386/invpcid-intel.d: Likewise.
* gas/i386/invpcid.d: Likewise.
* gas/i386/invpcid.s: Likewise.
* gas/i386/x86-64-arch-2-lzcnt.d: Likewise.
* gas/i386/x86-64-avx-gather-intel.d: Likewise.
* gas/i386/x86-64-avx-gather.d: Likewise.
* gas/i386/x86-64-avx-gather.s: Likewise.
* gas/i386/x86-64-avx2-intel.d: Likewise.
* gas/i386/x86-64-avx2.d: Likewise.
* gas/i386/x86-64-avx2.s: Likewise.
* gas/i386/x86-64-avx256int-intel.d: Likewise.
* gas/i386/x86-64-avx256int.d: Likewise.
* gas/i386/x86-64-avx256int.s: Likewise.
* gas/i386/x86-64-bmi2-intel.d: Likewise.
* gas/i386/x86-64-bmi2.d: Likewise.
* gas/i386/x86-64-bmi2.s: Likewise.
* gas/i386/x86-64-inval-invpcid.l: Likewise.
* gas/i386/x86-64-inval-invpcid.s: Likewise.
* gas/i386/x86-64-invpcid-intel.d: Likewise.
* gas/i386/x86-64-invpcid.d: Likewise.
* gas/i386/x86-64-invpcid.s: Likewise.
opcodes/
2011-06-10 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2011)
* i386-dis.c (XMGatherQ): New.
* i386-dis.c (EXxmm_mb): New.
(EXxmm_mb): Likewise.
(EXxmm_mw): Likewise.
(EXxmm_md): Likewise.
(EXxmm_mq): Likewise.
(EXxmmdw): Likewise.
(EXxmmqd): Likewise.
(VexGatherQ): Likewise.
(MVexVSIBDWpX): Likewise.
(MVexVSIBQWpX): Likewise.
(xmm_mb_mode): Likewise.
(xmm_mw_mode): Likewise.
(xmm_md_mode): Likewise.
(xmm_mq_mode): Likewise.
(xmmdw_mode): Likewise.
(xmmqd_mode): Likewise.
(ymmxmm_mode): Likewise.
(vex_vsib_d_w_dq_mode): Likewise.
(vex_vsib_q_w_dq_mode): Likewise.
(MOD_VEX_0F385A_PREFIX_2): Likewise.
(MOD_VEX_0F388C_PREFIX_2): Likewise.
(MOD_VEX_0F388E_PREFIX_2): Likewise.
(PREFIX_0F3882): Likewise.
(PREFIX_VEX_0F3816): Likewise.
(PREFIX_VEX_0F3836): Likewise.
(PREFIX_VEX_0F3845): Likewise.
(PREFIX_VEX_0F3846): Likewise.
(PREFIX_VEX_0F3847): Likewise.
(PREFIX_VEX_0F3858): Likewise.
(PREFIX_VEX_0F3859): Likewise.
(PREFIX_VEX_0F385A): Likewise.
(PREFIX_VEX_0F3878): Likewise.
(PREFIX_VEX_0F3879): Likewise.
(PREFIX_VEX_0F388C): Likewise.
(PREFIX_VEX_0F388E): Likewise.
(PREFIX_VEX_0F3890..PREFIX_VEX_0F3893): Likewise.
(PREFIX_VEX_0F38F5): Likewise.
(PREFIX_VEX_0F38F6): Likewise.
(PREFIX_VEX_0F3A00): Likewise.
(PREFIX_VEX_0F3A01): Likewise.
(PREFIX_VEX_0F3A02): Likewise.
(PREFIX_VEX_0F3A38): Likewise.
(PREFIX_VEX_0F3A39): Likewise.
(PREFIX_VEX_0F3A46): Likewise.
(PREFIX_VEX_0F3AF0): Likewise.
(VEX_LEN_0F3816_P_2): Likewise.
(VEX_LEN_0F3819_P_2): Likewise.
(VEX_LEN_0F3836_P_2): Likewise.
(VEX_LEN_0F385A_P_2_M_0): Likewise.
(VEX_LEN_0F38F5_P_0): Likewise.
(VEX_LEN_0F38F5_P_1): Likewise.
(VEX_LEN_0F38F5_P_3): Likewise.
(VEX_LEN_0F38F6_P_3): Likewise.
(VEX_LEN_0F38F7_P_1): Likewise.
(VEX_LEN_0F38F7_P_2): Likewise.
(VEX_LEN_0F38F7_P_3): Likewise.
(VEX_LEN_0F3A00_P_2): Likewise.
(VEX_LEN_0F3A01_P_2): Likewise.
(VEX_LEN_0F3A38_P_2): Likewise.
(VEX_LEN_0F3A39_P_2): Likewise.
(VEX_LEN_0F3A46_P_2): Likewise.
(VEX_LEN_0F3AF0_P_3): Likewise.
(VEX_W_0F3816_P_2): Likewise.
(VEX_W_0F3818_P_2): Likewise.
(VEX_W_0F3819_P_2): Likewise.
(VEX_W_0F3836_P_2): Likewise.
(VEX_W_0F3846_P_2): Likewise.
(VEX_W_0F3858_P_2): Likewise.
(VEX_W_0F3859_P_2): Likewise.
(VEX_W_0F385A_P_2_M_0): Likewise.
(VEX_W_0F3878_P_2): Likewise.
(VEX_W_0F3879_P_2): Likewise.
(VEX_W_0F3A00_P_2): Likewise.
(VEX_W_0F3A01_P_2): Likewise.
(VEX_W_0F3A02_P_2): Likewise.
(VEX_W_0F3A38_P_2): Likewise.
(VEX_W_0F3A39_P_2): Likewise.
(VEX_W_0F3A46_P_2): Likewise.
(MOD_VEX_0F3818_PREFIX_2): Removed.
(MOD_VEX_0F3819_PREFIX_2): Likewise.
(VEX_LEN_0F60_P_2..VEX_LEN_0F6D_P_2): Likewise.
(VEX_LEN_0F70_P_1..VEX_LEN_0F76_P_2): Likewise.
(VEX_LEN_0FD1_P_2..VEX_LEN_0FD5_P_2): Likewise.
(VEX_LEN_0FD7_P_2_M_1..VEX_LEN_0F3819_P_2_M_0): Likewise.
(VEX_LEN_0F381C_P_2..VEX_LEN_0F3840_P_2): Likewise.
(VEX_LEN_0F3A0E_P_2): Likewise.
(VEX_LEN_0F3A0F_P_2): Likewise.
(VEX_LEN_0F3A42_P_2): Likewise.
(VEX_LEN_0F3A4C_P_2): Likewise.
(VEX_W_0F3818_P_2_M_0): Likewise.
(VEX_W_0F3819_P_2_M_0): Likewise.
(prefix_table): Updated.
(three_byte_table): Likewise.
(vex_table): Likewise.
(vex_len_table): Likewise.
(vex_w_table): Likewise.
(mod_table): Likewise.
(putop): Handle "LW".
(intel_operand_size): Handle xmm_mb_mode, xmm_mw_mode,
xmm_md_mode, xmm_mq_mode, xmmdw_mode, xmmqd_mode, ymmxmm_mode,
vex_vsib_d_w_dq_mode, vex_vsib_q_w_dq_mode.
(OP_EX): Likewise.
(OP_E_memory): Handle vex_vsib_d_w_dq_mode and
vex_vsib_q_w_dq_mode.
(OP_XMM): Handle vex_vsib_q_w_dq_mode.
(OP_VEX): Likewise.
* i386-gen.c (cpu_flag_init): Add CpuAVX2 to CPU_ANY_SSE_FLAGS
and CPU_ANY_AVX_FLAGS. Add CPU_BMI2_FLAGS, CPU_LZCNT_FLAGS,
CPU_INVPCID_FLAGS and CPU_AVX2_FLAGS.
(cpu_flags): Add CpuAVX2, CpuBMI2, CpuLZCNT and CpuINVPCID.
(opcode_modifiers): Add VecSIB.
* i386-opc.h (CpuAVX2): New.
(CpuBMI2): Likewise.
(CpuLZCNT): Likewise.
(CpuINVPCID): Likewise.
(VecSIB128): Likewise.
(VecSIB256): Likewise.
(VecSIB): Likewise.
(i386_cpu_flags): Add cpuavx2, cpubmi2, cpulzcnt and cpuinvpcid.
(i386_opcode_modifier): Add vecsib.
* i386-opc.tbl: Add invpcid, AVX2 and BMI2 instructions.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2011-06-10 21:27:40 +00:00
3b2f079304
2011-05-31 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (arm_cpus): Add Cortex-R5.
(arm_extensions): Allow idiv on ARMv7-R.
* doc/c-arm.text: Update idiv extension restrictions.
gas/testsuite/
* gas/arm/arm-idiv-bad.d: New test.
* gas/arm/arm-idiv-bad.s: New test.
* gas/arm/arm-idiv-bad.l: New test.
* gas/arm/arm-idiv.d: New test.
* gas/arm/arm-idiv.s: New test.
include/
* opcode/arm.h (ARM_ARCH_V7R_IDIV): Define.
2011-05-31 14:12:55 +00:00
0d7e0060b4
* config/tc-cris.c (md_parse_option) <OPTION_PIC>: Error if not
...
emitting ELF object.
(md_show_usage): Only mention --pic if the assembler can generate
ELF objects.
* doc/c-cris.texi (CRIS-Opt): Mention that generating ELF is a
prerequisite for --pic being a valid option.
2011-05-16 03:28:47 +00:00
af2f724ec4
2011-05-10 Quentin Neill <quentin.neill@amd.com>
...
gas/
* config/tc-i386.c (cpu_arch): Add bdver2 and rename
PROCESSOR_BDVER1 to PROCESSOR_BDVER.
(i386_align_code): Rename PROCESSOR_BDVER1.
(processor_type): Ditto.
* doc/c-i386.texi: Add bdver2.
opcodes/
* i386-gen.c (cpu_flag_init): Add new CPU_BDVER2_FLAGS.
* i386-init.h: Regenerated.
gas/testsuite/
* gas/i386/i386.exp: Add new bdver2 test cases.
* gas/i386/nops-1-bdver2.d: New.
* gas/i386/x86-64-nops-1-bdver2.d: New.
2011-05-10 22:02:27 +00:00
1bce6bd86f
2011-05-09 Paul Brook <paul@codesourcery.com>
...
bfd/
* elf32-tic6x.c (is_tic6x_elf_unwind_section_name,
elf32_tic6x_fake_sections): New functions.
(elf_backend_fake_sections): Define.
gas/
* config/tc-tic6x.c (streq): Define.
(tic6x_get_unwind): New.
(s_tic6x_cantunwind, s_tic6x_handlerdata, s_tic6x_endp,
s_tic6x_personalityindex, s_tic6x_personality): New functions.
(md_pseudo_table): Add "endp", "handlerdata", "personalityindex",
"personality" and "cantunwind".
(tic6x_regname_to_dw2regnum, tic6x_frame_initial_instructions,
tic6x_start_unwind_section, tic6x_unwind_frame_regs,
tic6x_pop_rts_offset_little, tic6x_pop_rts_offset_big,
tic6x_unwind_reg_from_dwarf, tic6x_flush_unwind_word,
tic6x_unwind_byte, tic6x_unwind_2byte, tic6x_unwind_uleb,
tic6x_cfi_startproc, output_exidx_entry, tic6x_output_unwinding,
tic6x_cfi_endproc): New.
* config/tc-tic6x.h (TIC6X_NUM_UNWIND_REGS): Define.
(tic6x_unwind_info): New.
(tic6x_segment_info_type): Add marked_pr_dependency, unwind and
text_unwind.
(TARGET_USE_CFIPOP, tc_regname_to_dw2regnum,
tc_cfi_frame_initial_instructions, DWARF2_DEFAULT_RETURN_COLUMN,
DWARF2_CIE_DATA_ALIGNMENT, tc_cfi_startproc, tc_cfi_endproc,
tc_cfi_section_name): Define.
* doc/c-tic6x.texi: Document new unwinding directives.
* dw2gencfi.c (tc_cfi_startproc, tc_cfi_endproc): Add default
definitions.
(cfi_insn_data, fde_entry, CFI_adjust_cfa_offset, CFI_return_column,
CFI_rel_offset, CFI_escape, CFI_signal_frame, CFI_val_encoded_addr):
Move to dw2gencfi.h.
(CFI_EMIT_target): Define.
(dot_cfi_sections): Check tc_cfi_section_name.
(dot_cfi_startproc): Use tc_cfi_startproc.
(dot_cfi_endproc): Use tc_cfi_endproc.
* dw2gencfi.h (cfi_insn_data, fde_entry, CFI_adjust_cfa_offset,
CFI_return_column, CFI_rel_offset, CFI_escape, CFI_signal_frame,
CFI_val_encoded_addr): Move to here from dw2gencfi.c.
gas/testsuite:
* gas/tic6x/unwind-1.d: New test.
* gas/tic6x/unwind-1.s: New test.
* gas/tic6x/unwind-2.d: New test.
* gas/tic6x/unwind-2.s: New test.
* gas/tic6x/unwind-3.d: New test.
* gas/tic6x/unwind-3.s: New test.
* gas/tic6x/unwind-bad-1.d: New test.
* gas/tic6x/unwind-bad-1.s: New test.
* gas/tic6x/unwind-bad-1.l: New test.
* gas/tic6x/unwind-bad-2.d: New test.
* gas/tic6x/unwind-bad-2.s: New test.
* gas/tic6x/unwind-bad-2.l: New test.
include/
* elf/tic6x.h (ELF_STRING_C6000_unwind,
ELF_STRING_C6000_unwind_info, ELF_STRING_C6000_unwind_once,
ELF_STRING_C6000_unwind_info_once): Define.
2011-05-09 13:17:58 +00:00
2fbb87f627
2011-05-03 Paul Brook <paul@codesourcery.com>
...
bfd/
* elf32-tic6x.c (elf32_tic6x_howto_table,
elf32_tic6x_howto_table_rel, (elf32_tic6x_gc_sweep_hook,
elf32_tic6x_relocate_section, elf32_tic6x_check_relocs):
Add R_C6000_EHTYPE.
gas/
* config/tc-tic6x.c (s_ehtype): New function.
(md_pseudo_table): Add "ehtype".
(tic6x_fix_adjustable, md_apply_fix): BFD_RELOC_C6000_EHTYPE.
* doc/c-tic6x.texi: Document .ehtype directive.
ld/testsuite/
* ld-tic6x/ehtype-reloc-1-rel.d: New test.
* ld-tic6x/ehtype-reloc-1.d: New test.
* ld-tic6x/ehtype-reloc-1.s: New test.
2011-05-03 11:17:22 +00:00
902cc293a0
2011-04-14 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
...
* config/tc-s390.c (s390_machine): New prototype.
(md_pseudo_table): New pseudo-op .machine.
(s390_opcode_hash): Initialize to NULL.
(s390_parse_cpu): New function.
(md_parse_option): Use s390_parse_cpu.
(s390_setup_opcodes): New function.
(md_begin): Use s390_setup_opcodes.
(s390_machine): New hook handling the new .machine pseudo.
* doc/c-s390.texi: Document the new pseudo op .machine.
2011-04-14 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* gas/s390/zarch-machine.s: New testcase.
* gas/s390/zarch-machine.d: New testcase output.
* gas/s390/s390.exp: Execute the new testcase.
2011-04-14 11:11:33 +00:00
ac14530735
include/elf/
...
* tic6x.h (R_C6000_JUMP_SPLOT, R_C6000_EHTYPE,
R_C6000_PCR_H16, R_C6000_PCR_L16): New relocs.
(SHN_TIC6X_SCOMMON): Define.
bfd/
* elf32-tic6x.h (struct elf32_tic6x_params): New.
(elf32_tic6x_setup): Declare.
* elf32-tic6x.c: Include <limits.h>.
(ELF_DYNAMIC_LINKER, DEFAULT_STACK_SIZE, PLT_ENTRY_SIZE): Define.
(struct elf32_tic6x_link_hash_table, struct elf32_link_hash_entry):
New structures.
(elf32_tic6x_link_hash_table, is_tic6x_elf): New macros.
(tic6x_elf_scom_section, tic6x_elf_scom_symbol,
tic6x_elf_scom_symbol_ptr): New static variables.
(elf32_tic6x_howto_table, elf32_tic6x_howto_table_rel,
elf32_tic6x_reloc_map): Add R_C6000_JUMP_SLOT, R_C6000_EHTYPE,
R_C6000_PCR_H16 and R_C6000_PCR_L16.
(elf32_tic6x_link_hash_newfunc, elf32_tic6x_link_hash_table_create,
elf32_tic6x_link_hash_table_free, elf32_tic6x_setup,
elf32_tic6x_using_dsbt, elf32_tic6x_install_rela,
elf32_tic6x_create_dynamic_sections, elf32_tic6x_make_got_dynreloc,
elf32_tic6x_finish_dynamic_symbol, elf32_tic6x_gc_sweep_hook,
elf32_tic6x_adjust_dynamic_symbol): New static functions.
(elf32_tic6x_relocate_section): For R_C6000_PCR_S21, convert branches
to weak symbols as required by the ABI.
Handle GOT and DSBT_INDEX relocs, and copy relocs to the output file
as needed when generating DSBT output.
(elf32_tic6x_check_relocs, elf32_tic6x_add_symbol_hook,
elf32_tic6x_symbol_processing, elf32_tic6x_section_from_bfd_section,
elf32_tic6x_allocate_dynrelocs, elf32_tic6x_size_dynamic_sections,
elf32_tic6x_always_size_sections, elf32_tic6x_modify_program_headers,
elf32_tic6x_finish_dynamic_sections, elf32_tic6x_plt_sym_val,
elf32_tic6x_copy_private_data, elf32_tic6x_link_omit_section_dynsym):
New static functions.
(ELF_MAXPAGESIZE): Define to 0x1000.
(bfd_elf32_bfd_copy_private_bfd_data,
bfd_elf32_bfd_link_hash_table_create,
bfd_elf32_bfd_link_hash_table_free, elf_backend_can_refcount,
elf_backend_want_got_plt, elf_backend_want_dynbss,
elf_backend_plt_readonly, elf_backend_got_header_size,
elf_backend_gc_sweep_hook, elf_backend_modify_program_headers,
elf_backend_create_dynamic_sections, elf_backend_adjust_dynamic_symbol,
elf_backend_check_relocs, elf_backend_add_symbol_hook,
elf_backend_symbol_processing, elf_backend_link_output_symbol_hook,
elf_backend_section_from_bfd_section,
elf_backend_finish_dynamic_symbol, elf_backend_always_size_sections,
elf32_tic6x_size_dynamic_sections, elf_backend_finish_dynamic_sections,
elf_backend_omit_section_dynsym, elf_backend_plt_sym_val): Define.
* bfd/reloc.c (BFD_RELOC_C6000_JUMP_SLOT, BFD_RELOC_C6000_EHTYPE,
BFD_RELOC_C6000_PCR_H16, BFD_RELOC_C6000_PCR_S16): Add.
* bfd/bfd-in2.h: Regenerate.
* bfd/libbfd.h: Regenerate.
* config.bfd: Accept tic6x-*-* instead of tic6x-*-elf.
gas/
* config/tc-tic6x.c (sbss_section, scom_section, scom_symbol): New
static variables.
(md_begin): Initialize them.
(s_tic6x_scomm): New static function.
(md_pseudo_table): Add "scomm".
(tc_gen_reloc): Really undo all adjustments made by
bfd_install_relocation.
* doc/c-tic6x.texi: Document the .scomm directive.
gas/testsuite/
* gas/tic6x/scomm-directive-1.s: New test.
* gas/tic6x/scomm-directive-1.d: New test.
* gas/tic6x/scomm-directive-2.s: New test.
* gas/tic6x/scomm-directive-2.d: New test.
* gas/tic6x/scomm-directive-3.s: New test.
* gas/tic6x/scomm-directive-3.d: New test.
* gas/tic6x/scomm-directive-4.s: New test.
* gas/tic6x/scomm-directive-4.d: New test.
* gas/tic6x/scomm-directive-5.s: New test.
* gas/tic6x/scomm-directive-5.d: New test.
* gas/tic6x/scomm-directive-6.s: New test.
* gas/tic6x/scomm-directive-6.d: New test.
* gas/tic6x/scomm-directive-7.s: New test.
* gas/tic6x/scomm-directive-7.d: New test.
* gas/tic6x/scomm-directive-8.s: New test.
* gas/tic6x/scomm-directive-8.d: New test.
ld/
* emulparams/elf32_tic6x_le.sh (BIG_OUTPUT_FORMAT, EXTRA_EM_FILE,
GENERATE_SHLIB_SCRIPT): New defines.
(TEXT_START_ADDR): Define differently depending on target.
(.got): Redefine to include "*(.dsbt)".
(SDATA_START_SYMBOLS): Remove, replace with
(OTHER_GOT_SYMBOLS): New.
(OTHER_BSS_SECTIONS): Define only for ELF targets.
* emultempl/tic6xdsbt.em: New file.
* gen-doc.texi: Set C6X.
* ld.texinfo: Likewise.
(Options specific to C6X uClinux targets): New section.
binutils/
* readelf.c (get_symbol_index_type): Handle SCOM for TIC6X.
(dump_relocations): Likewise.
binutils/testsuite/
* lib/binutils-common.exp (is_elf_format): Accept tic6x*-*-uclinux*.
ld/testsuite/
* ld-scripts/crossref.exp: Add CFLAGS for tic6x*-*-*.
* ld-elf/sec-to-seg.exp: Remove tic6x from list of targets defining
pagesize to 1.
* ld-tic6x/tic6x.exp: Add support for DSBT shared library/executable
linking tests.
* ld-tic6x/dsbt.ld: New linker script.
* ld-tic6x/dsbt-be.ld: New linker script.
* ld-tic6x/dsbt-overflow.ld: New linker script.
* ld-tic6x/dsbt-inrange.ld: New linker script.
* ld-tic6x/shlib-1.s: New test.
* ld-tic6x/shlib-2.s: New test.
* ld-tic6x/shlib-app-1r.s: New test.
* ld-tic6x/shlib-app-1.s: New test.
* ld-tic6x/shlib-1.sd: New test.
* ld-tic6x/shlib-1.dd: New test.
* ld-tic6x/shlib-app-1.rd: New test.
* ld-tic6x/shlib-app-1rb.rd: New test.
* ld-tic6x/shlib-app-1.sd: New test.
* ld-tic6x/static-app-1rb.od: New test.
* ld-tic6x/shlib-app-1.dd: New test.
* ld-tic6x/shlib-app-1rb.sd: New test.
* ld-tic6x/static-app-1b.od: New test.
* ld-tic6x/static-app-1r.od: New test.
* ld-tic6x/shlib-1rb.rd: New test.
* ld-tic6x/shlib-app-1rb.dd: New test.
* ld-tic6x/shlib-1rb.sd: New test.
* ld-tic6x/shlib-1rb.dd: New test.
* ld-tic6x/shlib-app-1b.od: New test.
* ld-tic6x/tic6x.exp: New test.
* ld-tic6x/static-app-1rb.rd: New test.
* ld-tic6x/shlib-app-1r.od: New test.
* ld-tic6x/static-app-1.od: New test.
* ld-tic6x/static-app-1b.rd: New test.
* ld-tic6x/static-app-1r.rd: New test.
* ld-tic6x/static-app-1rb.sd: New test.
* ld-tic6x/static-app-1b.sd: New test.
* ld-tic6x/static-app-1rb.dd: New test.
* ld-tic6x/static-app-1r.sd: New test.
* ld-tic6x/static-app-1b.dd: New test.
* ld-tic6x/shlib-1b.rd: New test.
* ld-tic6x/static-app-1r.dd: New test.
* ld-tic6x/shlib-app-1b.rd: New test.
* ld-tic6x/shlib-1r.rd: New test.
* ld-tic6x/shlib-app-1r.rd: New test.
* ld-tic6x/shlib-1b.sd: New test.
* ld-tic6x/static-app-1.rd: New test.
* ld-tic6x/shlib-app-1b.sd: New test.
* ld-tic6x/shlib-1r.sd: New test.
* ld-tic6x/shlib-1b.dd: New test.
* ld-tic6x/shlib-app-1r.sd: New test.
* ld-tic6x/shlib-app-1b.dd: New test.
* ld-tic6x/shlib-1r.dd: New test.
* ld-tic6x/static-app-1.sd: New test.
* ld-tic6x/shlib-app-1r.dd: New test.
* ld-tic6x/static-app-1.dd: New test.
* ld-tic6x/shlib-noindex.rd: New test.
* ld-tic6x/shlib-noindex.dd: New test.
* ld-tic6x/shlib-noindex.sd: New test.
* ld-tic6x/got-reloc-local-1.s: New test.
* ld-tic6x/got-reloc-local-2.s: New test.
* ld-tic6x/got-reloc-local-r.d: New test.
* ld-tic6x/got-reloc-global.s: New test.
* ld-tic6x/got-reloc-global-addend-1.d: New test.
* ld-tic6x/got-reloc-global-addend-1.s: New test.
* ld-tic6x/got-reloc-global-addend-2.d: New test.
* ld-tic6x/got-reloc-inrange.d: New test.
* ld-tic6x/got-reloc-overflow.d: New test.
* ld-tic6x/got-reloc-global-addend-2.s: New test.
* ld-tic6x/dsbt-index-error.d: New test.
* ld-tic6x/dsbt-index.d: New test.
* ld-tic6x/dsbt-index.s: New test.
* ld-tic6x/shlib-app-1.od: New test.
* ld-tic6x/shlib-app-1rb.od: New test.
* ld-tic6x/shlib-1.rd: New test.
* ld-tic6x/weak.d: New test.
* ld-tic6x/weak-be.d: New test.
* ld-tic6x/weak.s: New test.
* ld-tic6x/weak-data.d: New test.
* ld-tic6x/common.d: New test.
* ld-tic6x/common.ld: New test.
* ld-tic6x/common.s: New test.
2011-03-31 08:58:28 +00:00
b8c610a72f
2011-03-24 Eric B. Weddington <eric.weddington@atmel.com>
...
* config/tc-avr.c (mcu_types): Add new devices: atmega325pa,
atmega3250pa, atmega3290pa, atmega16hvbrevb, atmega32hvbrevb,
at90pwm161.
* doc/c-avr.texi: Document new device names.
2011-03-24 17:03:03 +00:00
6f8a4444ff
2011-03-23 Eric B. Weddington <eric.weddington@atmel.com>
...
* config/tc-avr.c (mcu_types): Add new xmega devices: atxmega64a1u,
atxmega128a1u, atxmega16x1, atxmega32x1, atxmega128b1, atxmega256a3bu.
* doc/c-avr.texi: Document new device names.
2011-03-23 15:02:06 +00:00
8cc66334fa
/bfd:
...
2011-03-22 Eric B. Weddington <eric.weddington@atmel.com>
* archures.c: Add AVR XMEGA architecture information.
* cpu-avr.c (arch_info_struct): Likewise.
* elf32-avr.c (bfd_elf_avr_final_write_processing): Likewise.
(elf32_avr_object_p): Likewise.
/gas:
2011-03-22 Eric B. Weddington <eric.weddington@atmel.com>
* config/tc-avr.c (struct avr_opcodes_s): Add opcode field.
(AVR_INSN): Change definition to match.
(avr_opcodes): Likewise, change to match.
(mcu_types): Add XMEGA architecture names and new XMEGA device names.
(md_show_usage): Add XMEGA architecture names.
(avr_operand): Add 'E' constraint for DES instruction of XMEGA devices.
Add support for SPM Z+ instruction.
* doc/c-avr.texi: Add documentation for XMEGA architectures and
devices.
/include/opcode:
2011-03-22 Eric B. Weddington <eric.weddington@atmel.com>
* avr.h (AVR_ISA_SPMX,AVR_ISA_DES,AVR_ISA_M256,AVR_ISA_XMEGA):
New instruction set flags.
(AVR_INSN): Add new instructions for SPM Z+, DES for XMEGA.
/ld:
2011-03-22 Eric B. Weddington <eric.weddington@atmel.com>
* Makefile.am (ALL_EMULATION_SOURCES): Add AVR XMEGA architectures.
(eavrxmega?.c): Likewise.
* configure.tgt (targ_extra_emuls): Likewise.
* emulparams/avrxmega1.sh: New file.
* emulparams/avrxmega2.sh: Likewise.
* emulparams/avrxmega3.sh: Likewise.
* emulparams/avrxmega4.sh: Likewise.
* emulparams/avrxmega5.sh: Likewise.
* emulparams/avrxmega6.sh: Likewise.
* emulparams/avrxmega7.sh: Likewise.
* emultempl/avrelf.em (avr_elf_${EMULATION_NAME}_before_allocation):
Add avrxmega6, avrxmega7 to list of architectures for no stubs.
/opcodes:
2011-03-22 Eric B. Weddington <eric.weddington@atmel.com>
* avr-dis.c (avr_operand): Add opcode_str parameter. Check for
post-increment to support LPM Z+ instruction. Add support for 'E'
constraint for DES instruction.
(print_insn_avr): Adjust calls to avr_operand. Rename variable.
2011-03-22 18:10:48 +00:00
21be61f588
Add --size-check=[error|warning].
...
gas/
2011-03-16 H.J. Lu <hongjiu.lu@intel.com>
* as.c (show_usage): Add --size-check=.
(parse_args): Add and handle OPTION_SIZE_CHECK.
* as.h (flag_size_check): New.
* config/obj-elf.c (elf_frob_symbol): Use as_bad to report
bad .size directive only for --size-check=error.
* doc/as.texinfo: Document --size-check=.
gas/testsuite/
2011-03-16 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/bad-size.d: New.
* gas/i386/bad-size.s: Likewise.
* gas/i386/bad-size.warn: Likewise.
* gas/i386/i386.exp: Run bad-size for ELF targets.
2011-03-16 12:58:26 +00:00
347d120a63
gas: blackfin: docs: typo fixes and fill out directive info
...
A bunch of Blackfin-specific directives were lacking info on what they
actually do, so fill in the blanks. Further, the byte2/byte4 descriptions
were swapped.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-02-11 19:05:30 +00:00
c0e524fe0f
* doc/c-ppc.texi (PowerPC-Opts <-nops>): Clarify.
2011-02-10 22:50:09 +00:00
635fb38d39
* doc/as.texinfo (Overview): Add missing markup around Blackfin
...
and PowerPC options.
2011-02-10 12:29:23 +00:00
b8b738ac92
* config/tc-ppc.c (md_show_usage): Remove -l and -b. Add -K PIC.
...
* doc/as.texinfo: Refer to and include c-ppc.texi for PowerPC options.
(Overview <Target PowerPC options>): Add a number of missing options.
* doc/c-ppc.texi: Likewise. Add markup for use in manpage generation.
2011-02-10 11:59:12 +00:00
98d23befa7
gas/
...
* doc/as.texinfo (Target TIC6X options): Don't mention "-matomic".
* doc/c-tic6x.texi (TIC6X Directives): Don't mention ".atomic".
(TIC6X Options): Don't mention "-matomic".
* config/tc-tic6x.c (OPTION_MATOMIC, OPTION_MNO_ATOMIC): Delete.
(md_longopts): Remove corresponding entries.
(md_parse_option): Don't handle them.
(md_show_usage): Don't document them.
(tic6x_atomic): Delete variable.
(tic6x_update_features): Always copy tic6x_arch_enable to
tic6x_features.
(tic6x_arch_enable): Remove references to TIC6X_INSN_ATOMIC.
(s_tic6x_atomic, s_tic6x_noatomic): Remove functions.
(md_pseudo_table): Remove ".atomic" and ".noatomic".
gas/testsuite/
* gas/tic6x/dir-junk.l: Remove tests for .atomic and .noatomic.
* gas/tic6x/dir-junk.s: Likewise.
* gas/tic6x/insns-c674x-bad.d: Remove test.
* gas/tic6x/insns-c674x-bad.l: Likewise.
* gas/tic6x/insns-atomic.d: Remove "-matomic" switch.
include/opcode/
* tic6x-opcode-table.h (cmtl, ll, sl): Available on C64XP.
* tic6x.h (TIC6X_INSN_ATOMIC): Remove.
2011-02-03 23:20:26 +00:00
4a58c4bdc9
* config/tc-arm.c (arm_cpus): Add Faraday ARMv5TE compatible
...
cores: fa606te, fa616te, fmp626. Modify the VFP of fa626te.
* doc/c-arm.texi (ARM Options): Add -mcpu={fa606te, fa616te,
fmp626} options.
2011-01-18 14:10:44 +00:00
7c31ae1375
PR gas/12390
...
* doc/all.texi: Add NS32K
* doc/as.texinfo: Remove target specific details of which
characters act as comment initiators and statement separators into
individual target specific files.
* doc/c-alpha.texi (Alpha-Chars): Document special behaviour of
the hash character at the start of a line.
* doc/c-arm.texi (ARM-Chars): Likewise.
* doc/c-avr.texi (AVR-Chars): Likewise.
* doc/c-d10v.texi (D10V-Chars): Likewise.
* doc/c-d30v.texi (D30V-Chars): Likewise.
* doc/c-mmix.texi (MMIX-Chars): Likewise.
* doc/c-s390.texi (s390 characters): Likewise.
* doc/c-sh.texi (SH-Chars): Likewise.
* doc/c-sh64.texi (SH64-Chars): Likewise.
* doc/c-sparc.texi (SPARC-Chars): Likewise.
* doc/c-tic6x.texi (TIC6X Syntax): Likewise.
* doc/c-xtensa.texi (Xtensa Syntax): Likewise.
* doc/c-z80.texi (Z80-Chars): Likewise.
* doc/c-z8k.texi (Z8000-Chars): Likewise.
* doc/c-pdp11.texi (PDP11-Syntax): Document line separator character.
* doc/c-arc.texi (ARC-Chars): Fill in this subsection.
* doc/c-bfin.texi (Blackfin Syntax): Document line comment and
line separator characters.
* doc/c-cr16.texi (CR16 Syntax): Likewise.
* doc/c-i386.texi (i386-Chars): Likewise.
* doc/c-i860.texi (i860-Chars): Likewise.
* doc/c-i960.texi (i960-Chars): Likewise.
* doc/c-ip2k.texi (IP2K-Chars): Likewise.
* doc/c-lm32.texi (LM32-Chars): likewise.
* doc/c-m32c.texi (M32C-Chars): Likewise.
* doc/c-m68hc11.texi (M68HC11-syntax): Likewise.
* doc/c-m68k.texi (M68K-Chars): Likewise.
* doc/c-microblaze.texi (MicroBlaze-Chars): Likewise.
* doc/c-msp430.texi (MSP430-Chars): Likewise.
* doc/c-mt.texi (MT-Chars): Likewise.
* doc/c-ns32k.texi (NS32K-Chars): Likewise.
* doc/c-pj.texi (PJ-Chars): Likewise.
* doc/c-ppc.texi (PowerPC-Chars): Likewise.
* doc/c-rx.texi (RX-Chars): Likewise.
* doc/c-score.texi (SCORE-Chars): Likewise.
* doc/c-tic54x.texi (TIC54X-Chars): Likewise.
* doc/c-v850.texi (V850-Chars): Likewise.
* doc/c-vax.texi (VAX-Chars): Likewise.
* doc/c-xc16x.texi (xc16x-Chars): Likewise.
2011-01-18 13:37:39 +00:00
2a2a0f38e7
Add support for TBM instructions.
...
gas/
2011-01-17 Quentin Neill <quentin.neill@amd.com>
* config/tc-i386.c (cpu_arch): Add CPU_TBM_FLAGS.
* doc/c-i386.texi (i386-TBM): New section.
opcodes/
2011-01-17 Quentin Neill <quentin.neill@amd.com>
* i386-dis.c (REG_XOP_TBM_01): New.
(REG_XOP_TBM_02): New.
(reg_table): Add REG_XOP_TBM_01 and REG_XOP_TBM_02 tables.
(xop_table): Redirect to REG_XOP_TBM_01 and REG_XOP_TBM_02
entries, and add bextr instruction.
* i386-gen.c (cpu_flag_init): Add CPU_TBM_FLAGS, CpuTBM.
(cpu_flags): Add CpuTBM.
* i386-opc.h (CpuTBM) New.
(i386_cpu_flags): Add bit cputbm.
* i386-opc.tbl: Add bextr, blcfill, blci, blcic, blcmsk,
blcs, blsfill, blsic, t1mskc, and tzmsk.
* i386-init.h: Regenerated.
* i386-tbl.h: Regenerated
gas/testsuite
2011-01-17 Quentin Neill <quentin.neill@amd.com>
* gas/i386/tbm.s: New.
* gas/i386/tbm.d: New.
* gas/i386/tbm-intel.d: New.
* gas/i386/x86-64-tbm.s: New.
* gas/i386/x86-64-tbm.d: New.
* gas/i386/x86-64-tbm-intel.d: New.
* gas/i386/arch-10.d: Add tbm flag and TBM instruction pattern.
* gas/i386/arch-10.s: Add a TBM instruction.
* gas/i386/arch-10-1.l: Add TBM instruction pattern.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
2011-01-17 18:40:36 +00:00
570561f71a
Rename --n32 to --x32.
...
gas/
2011-01-14 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (OPTION_N32): Renamed to ...
(OPTION_X32): This.
(md_longopts): Replace n32 with x32.
(md_parse_option): Updated.
(md_show_usage): Likewise.
* doc/c-i386.texi: Replace n32 with x32.
gas/testsuite/
2011-01-14 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/ilp32/cfi/ilp32.exp: Replace --n32 with --x32.
* gas/i386/ilp32/elf/ilp32.exp: Likewise.
* gas/i386/ilp32/ilp32.exp: Likewise.
* gas/i386/ilp32/lns/ilp32.exp: Likewise.
ld/testsuite/
2011-01-14 H.J. Lu <hongjiu.lu@intel.com>
* ld-x86-64/ilp32-1.d: Replace --n32 with --x32.
* ld-x86-64/ilp32-2.d: Likewise.
* ld-x86-64/ilp32-3.d: Likewise.
* ld-x86-64/ilp32-4.d: Likewise.
* ld-x86-64/ilp32-5.d: Likewise.
* ld-x86-64/x86-64.exp: Likewise.
2011-01-14 23:07:11 +00:00
0855e32bf5
bfd/
...
* reloc.c (BFD_RELOC_ARM_TLS_GOTDESC, BFD_RELOC_ARM_TLS_CALL,
BFD_RELOC_ARM_THM_TLS_CALL, BFD_RELOC_ARM_TLS_DESCSEQ,
BFD_RELOC_ARM_THM_TLS_DESCSEQ, BFD_RELOC_ARM_TLS_DESC): New
relocations.
* libbfd.h: Rebuilt.
* bfd-in2.h: Rebuilt.
* elf32-arm.c (elf32_arm_howto_table_1): Add new relocations.
(elf32_arm_reloc_map): Likewise.
(tls_trampoline, dl_tlsdesc_lazy_trampoline): New PLT templates.
(elf32_arm_stub_long_branch_any_tls_pic,
elf32_arm_stub_long_branch_v4t_thumb_tls_pic): New stub templates.
(DEF_STUBS): Add new stubs.
(struct_elf_arm_obj_data): Add local_tlsdesc_gotent field.
(elf32_arm_local_tlsdesc_gotent): New.
(GOT_TLS_GDESC): New mask.
(GOT_TLS_GD_ANY): Define.
(struct elf32_arm_link_hash_entry): Add tlsdesc_got field.
(elf32_arm_compute_jump_table_size): New.
(struct elf32_arm_link_hash_table): Add next_tls_desc_index,
num_tls_desc, dt_tlsdesc_plt, dt_tlsdesc_got, tls_trampoline,
sgotplt_jump_table_size fields.
(elf32_arm_link_hash_newfunc): Initialize tlsdesc_got field.
(elf32_arm_link_hash_table_create): Initialize new fields.
(arm_type_of_stub): Check TLS desc relocs too.
(elf32_arm_stub_name): TLS desc relocs can be shared.
(elf32_arm_tls_transition): Determine relaxation.
(arm_stub_required_alignment): Add tls stubs.
(elf32_arm_size_stubs): Likewise.
(elf32_arm_tls_relax): Perform TLS relaxing.
(elf32_arm_final_link_relocate): Process TLS DESC relocations.
(IS_ARM_TLS_GNU_RELOC): New.
(IS_ARM_TLS_RELOC): Use it.
(elf32_arm_relocate_section): Perform TLS relaxing.
(elf32_arm_check_relocs): Anticipate TLS relaxing, process tls
desc relocations.
(allocate_dynrelocs): Allocate tls desc relcoations.
(elf32_arm_output_arch_local_syms): Emit tls trampoline mapping
symbols.
(elf32_arm_size_dynamic_sections): Allocate tls trampolines and
got slots.
(elf32_arm_always_size_sections): New. Create _TLS_MODULE_BASE
symbol.
(elf32_arm_finish_dynamic_symbol): Adjust.
(arm_put_trampoline): New.
(elf32_arm_finish_dynamic_sections): Emit new dynamic tags and tls
trampolines.
(elf_backend_always_size_sections): Define.
include/elf/
* arm.h (R_ARM_TLS_DESC, R_ARM_TLS_GOTDESC, R_ARM_TLS_CALL,
R_ARM_TLS_DESCSEQ, T_ARM_THM_TLS_CALL, R_ARM_THM_TLS_DESCSEQ): New
relocations.
gas/
* doc/c-arm.texi: Document TLSDESC and TLSCALL relocations, and
.tlsdescseq directive.
* config/tc-arm.c (arm_typed_reg_parse): Check for potential reloc
following a symbol.
(s_arm_tls_descseq): New directive.
(md_pseudo_table): Add it.
(encode_branch): Allow TLS_CALL relocs too.
(do_t_blx, do_t_branch23): Use encode_branch.
(reloc_names): Add tlsdesc and tlscall.
(md_apply_fix): Process tls desc relocations.
(tc_gen_reloc): Likewise.
(arm_fix_adjustable): Likewise.
gas/testsuite/
* gas/arm/tls.s: Add tlsdesc tests.
* gas/arm/tls.d: Adjust.
ld/testsuite/
* ld-arm/arm-elf.exp: Added tests for new TLS handling
relocations.
* ld-arm/tls-descrelax-be32.d: New.
* ld-arm/tls-descrelax-be32.s: New.
* ld-arm/tls-descrelax-be8.d: New.
* ld-arm/tls-descrelax-be8.s: New.
* ld-arm/tls-descrelax-v7.d: New.
* ld-arm/tls-descrelax-v7.s: New.
* ld-arm/tls-descrelax.d: New.
* ld-arm/tls-descrelax.s: New.
* ld-arm/tls-descseq.d: New.
* ld-arm/tls-descseq.r: New.
* ld-arm/tls-descseq.s: New.
* ld-arm/tls-gdesc-got.d: New.
* ld-arm/tls-gdesc-got.s: New.
* ld-arm/tls-gdesc-nlazy.g: New.
* ld-arm/tls-gdesc-nlazy.s: New.
* ld-arm/tls-gdesc.d: New.
* ld-arm/tls-gdesc.r: New.
* ld-arm/tls-gdesc.s: New.
* ld-arm/tls-gdierelax.d: New.
* ld-arm/tls-gdierelax.s: New.
* ld-arm/tls-gdierelax2.d: New.
* ld-arm/tls-gdierelax2.s: New.
* ld-arm/tls-gdlerelax.d: New.
* ld-arm/tls-gdlerelax.s: New.
* ld-arm/tls-lib-loc.d: New.
* ld-arm/tls-lib-loc.r: New.
* ld-arm/tls-lib-loc.s: New.
* ld-arm/tls-longplt-lib.d: New.
* ld-arm/tls-longplt-lib.s: New.
* ld-arm/tls-longplt.d: New.
* ld-arm/tls-longplt.s: New.
* ld-arm/tls-mixed.r: New.
* ld-arm/tls-mixed.s: New.
* ld-arm/tls-thumb1.d: New.
* ld-arm/tls-thumb1.s: New.
* ld-arm/arm-elf.exp: New.
2011-01-10 08:40:19 +00:00
87973e9f82
Add docs and arch tests to BMI.
...
gas/
2011-01-07 Quentin Neill <quentin.neill@amd.com>
* config/tc-i386.c (cpu_arch): Add CPU_BMI_FLAGS.
* doc/c-i386.texi (i386-BMI): New section.
gas/testsuite/
2011-01-07 Quentin Neill <quentin.neill@amd.com>
* gas/i386/arch-10.s: Add a BMI instruction.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/arch-10.d: Add bmi flag and BMI instruction pattern.
* gas/i386/x86-64-arch-2.d: Likewise.
* gas/i386/arch-10-1.l: Add BMI instruction pattern.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
2011-01-07 17:44:30 +00:00
35cc6a0b56
Clarify --n32.
...
2011-01-05 Jonathan Wakely <jwakely.gcc@gmail.com>
* doc/c-i386.texi: Clarify --n32.
2011-01-05 21:35:08 +00:00
351f65ca26
Add x86-64 ILP32 support.
...
bfd/
2010-12-30 H.J. Lu <hongjiu.lu@intel.com>
* archures.c (bfd_mach_x64_32): New.
(bfd_mach_x64_32_intel_syntax): Likewise.
* bfd-in2.h: Regenerated.
* config.bfd (targ64_selvecs): Add bfd_elf32_x86_64_vec for
i[3-7]86-*-linux-*.
(targ_selvecs): Add bfd_elf32_x86_64_vec for x86_64-*-linux-*.
* configure.in: Support bfd_elf32_x86_64_vec.
* configure: Regenerated.
* cpu-i386.c (bfd_x64_32_arch_intel_syntax): New.
(bfd_x64_32_arch): Likewise.
* elf-bfd.h (elf_append_rela): New prototype.
(elf_append_rel): Likewise.
(elf64_r_info): Likewise.
(elf32_r_info): Likewise.
(elf64_r_sym): Likewise.
(elf32_r_sym): Likewise.
* elf64-x86-64.c (ABI_64_P): New.
(elf_x86_64_info_to_howto): Replace ELF64_R_TYPE with
ELF32_R_TYPE. Replace ELF64_ST_TYPE with ELF_ST_TYPE.
(elf_x86_64_check_tls_transition):Likewise.
(elf_x86_64_check_relocs): Likewise.
(elf_x86_64_gc_mark_hook):Likewise.
(elf_x86_64_gc_sweep_hook): Likewise.
(elf_x86_64_relocate_section): Likewise.
(elf_x86_64_reloc_type_class): Likewise.
(ELF_DYNAMIC_INTERPRETER): Renamed to ...
(ELF64_DYNAMIC_INTERPRETER): This.
(ELF32_DYNAMIC_INTERPRETER): New.
(elf_x86_64_link_hash_table): Add r_info, r_sym, swap_reloca_out,
dynamic_interpreter and dynamic_interpreter_size.
(elf_x86_64_get_local_sym_hash): Replace ELF64_R_SYM with
htab->r_sym. Replace ELF64_R_INFO with htab->r_info.
(elf_x86_64_get_local_sym_hash): Likewise.
(elf_x86_64_check_tls_transition):Likewise.
(elf_x86_64_check_relocs): Likewise.
(elf_x86_64_gc_mark_hook):Likewise.
(elf_x86_64_gc_sweep_hook): Likewise.
(elf_x86_64_relocate_section): Likewise.
(elf_x86_64_finish_dynamic_symbol): Likewise.
(elf_x86_64_finish_local_dynamic_symbol): Likewise.
(elf_x86_64_link_hash_table_create): Initialize r_info, r_sym,
swap_reloca_out, dynamic_interpreter and dynamic_interpreter_size.
(elf_x86_64_check_relocs): Check ABI_64_P when requesting for
PIC.
(elf_x86_64_relocate_section): Likewise.
(elf64_x86_64_adjust_dynamic_symbol): Replace sizeof
(Elf64_External_Rela) with bed->s->sizeof_rela.
(elf64_x86_64_allocate_dynrelocs): Likewise.
(elf64_x86_64_size_dynamic_sections): Likewise.
(elf64_x86_64_finish_dynamic_symbol): Likewise.
(elf64_x86_64_append_rela): Removed.
(elf32_x86_64_elf_object_p): New.
Add bfd_elf32_x86_64_vec.
* elf64-x86-64.c (elf64_x86_64_xxx): Renamed to ...
(elf_x86_64_xxx): This.
* elflink.c (bfd_elf_final_link): Check ELF file class on error.
(elf_append_rela): New.
(elf_append_rel): Likewise.
(elf64_r_info): Likewise.
(elf32_r_info): Likewise.
(elf64_r_sym): Likewise.
(elf32_r_sym): Likewise.
* targets.c (bfd_elf32_x86_64_vec): New.
(_bfd_target_vector): Add bfd_elf32_x86_64_vec.
gas/
2010-12-30 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (x86_elf_abi): New.
(i386_mach): Return bfd_mach_x64_32 for ILP32.
(OPTION_N32): Likewise.
(md_longopts): Add "n32" for ELF.
(md_parse_option): Handle OPTION_N32.
(md_show_usage): Add --n32.
(i386_target_format): Update and check x86_elf_abi.
* config/tc-i386.h (ELF_TARGET_FORMAT32): New.
* doc/as.texinfo: Document --n32.
* doc/c-i386.texi: Likewise.
gas/testsuite/
2010-12-30 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/ilp32/lns/ilp32.exp: New.
* gas/i386/ilp32/lns/lns-common-1.d: Likewise.
* gas/i386/ilp32/lns/lns-duplicate.d: Likewise.
* gas/i386/ilp32/cfi/cfi-common-1.d: New.
* gas/i386/ilp32/cfi/cfi-common-2.d: Likewise.
* gas/i386/ilp32/cfi/cfi-common-3.d: Likewise.
* gas/i386/ilp32/cfi/cfi-common-4.d: Likewise.
* gas/i386/ilp32/cfi/cfi-common-5.d: Likewise.
* gas/i386/ilp32/cfi/cfi-common-6.d: Likewise.
* gas/i386/ilp32/cfi/cfi-common-7.d: Likewise.
* gas/i386/ilp32/cfi/cfi-x86_64.d: Likewise.
* gas/i386/ilp32/cfi/ilp32.exp: Likewise.
* gas/i386/ilp32/elf/ehopt0.d: Likewise.
* gas/i386/ilp32/elf/equ-reloc.d: Likewise.
* gas/i386/ilp32/elf/file.d: Likewise.
* gas/i386/ilp32/elf/group0a.d: Likewise.
* gas/i386/ilp32/elf/group0b.d: Likewise.
* gas/i386/ilp32/elf/group1a.d: Likewise.
* gas/i386/ilp32/elf/group1b.d: Likewise.
* gas/i386/ilp32/elf/ifunc-1.d: Likewise.
* gas/i386/ilp32/elf/ilp32.exp: Likewise.
* gas/i386/ilp32/elf/redef.d: Likewise.
* gas/i386/ilp32/elf/section0.d: Likewise.
* gas/i386/ilp32/elf/section1.d: Likewise.
* gas/i386/ilp32/elf/section3.d: Likewise.
* gas/i386/ilp32/elf/section4.d: Likewise.
* gas/i386/ilp32/elf/section6.d: Likewise.
* gas/i386/ilp32/elf/section7.d: Likewise.
* gas/i386/ilp32/elf/struct.d: Likewise.
* gas/i386/ilp32/elf/symtab.d: Likewise.
* gas/i386/ilp32/elf/symver.d: Likewise.
* gas/i386/ilp32/ilp32.exp: New.
* gas/i386/ilp32/immed64.d: Likewise.
* gas/i386/ilp32/mixed-mode-reloc64.d: Likewise.
* gas/i386/ilp32/reloc64.d: Likewise.
* gas/i386/ilp32/rex.d: Likewise.
* gas/i386/ilp32/rexw.d: Likewise.
* gas/i386/ilp32/svme64.d: Likewise.
* gas/i386/ilp32/x86-64-addr32.d: Likewise.
* gas/i386/ilp32/x86-64-addr32-intel.d: Likewise.
* gas/i386/ilp32/x86-64-aes.d: Likewise.
* gas/i386/ilp32/x86-64-aes-intel.d: Likewise.
* gas/i386/ilp32/x86-64-amdfam10.d: Likewise.
* gas/i386/ilp32/x86-64-arch-1.d: Likewise.
* gas/i386/ilp32/x86-64-arch-2.d: Likewise.
* gas/i386/ilp32/x86-64-avx.d: Likewise.
* gas/i386/ilp32/x86-64-avx-intel.d: Likewise.
* gas/i386/ilp32/x86-64-avx-swap.d: Likewise.
* gas/i386/ilp32/x86-64-avx-swap-intel.d: Likewise.
* gas/i386/ilp32/x86-64-branch.d: Likewise.
* gas/i386/ilp32/x86-64-cbw.d: Likewise.
* gas/i386/ilp32/x86-64-cbw-intel.d: Likewise.
* gas/i386/ilp32/x86-64-clmul.d: Likewise.
* gas/i386/ilp32/x86-64-clmul-intel.d: Likewise.
* gas/i386/ilp32/x86-64-crc32.d: Likewise.
* gas/i386/ilp32/x86-64-crc32-intel.d: Likewise.
* gas/i386/ilp32/x86-64-crx.d: Likewise.
* gas/i386/ilp32/x86-64-crx-suffix.d: Likewise.
* gas/i386/ilp32/x86-64.d: Likewise.
* gas/i386/ilp32/x86-64-disp.d: Likewise.
* gas/i386/ilp32/x86-64-disp-intel.d: Likewise.
* gas/i386/ilp32/x86-64-drx.d: Likewise.
* gas/i386/ilp32/x86-64-drx-suffix.d: Likewise.
* gas/i386/ilp32/x86-64-ept.d: Likewise.
* gas/i386/ilp32/x86-64-ept-intel.d: Likewise.
* gas/i386/ilp32/x86-64-fma4.d: Likewise.
* gas/i386/ilp32/x86-64-fma.d: Likewise.
* gas/i386/ilp32/x86-64-fma-intel.d: Likewise.
* gas/i386/ilp32/x86-64-gidt.d: Likewise.
* gas/i386/ilp32/x86-64-ifunc.d: Likewise.
* gas/i386/ilp32/x86-64-intel64.d: Likewise.
* gas/i386/ilp32/x86-64-io.d: Likewise.
* gas/i386/ilp32/x86-64-io-intel.d: Likewise.
* gas/i386/ilp32/x86-64-io-suffix.d: Likewise.
* gas/i386/ilp32/x86-64-localpic.d: Likewise.
* gas/i386/ilp32/x86-64-mem.d: Likewise.
* gas/i386/ilp32/x86-64-mem-intel.d: Likewise.
* gas/i386/ilp32/x86-64-movbe.d: Likewise.
* gas/i386/ilp32/x86-64-movbe-intel.d: Likewise.
* gas/i386/ilp32/x86-64-nops-1-core2.d: Likewise.
* gas/i386/ilp32/x86-64-nops-1.d: Likewise.
* gas/i386/ilp32/x86-64-nops-1-k8.d: Likewise.
* gas/i386/ilp32/x86-64-nops-1-nocona.d: Likewise.
* gas/i386/ilp32/x86-64-nops-1-pentium.d: Likewise.
* gas/i386/ilp32/x86-64-nops-2.d: Likewise.
* gas/i386/ilp32/x86-64-nops-3.d: Likewise.
* gas/i386/ilp32/x86-64-nops-4-core2.d: Likewise.
* gas/i386/ilp32/x86-64-nops-4.d: Likewise.
* gas/i386/ilp32/x86-64-nops-4-k8.d: Likewise.
* gas/i386/ilp32/x86-64-nops-5.d: Likewise.
* gas/i386/ilp32/x86-64-nops-5-k8.d: Likewise.
* gas/i386/ilp32/x86-64-nops.d: Likewise.
* gas/i386/ilp32/x86-64-opcode.d: Likewise.
* gas/i386/ilp32/x86-64-opcode-inval.d: Likewise.
* gas/i386/ilp32/x86-64-opcode-inval-intel.d: Likewise.
* gas/i386/ilp32/x86-64-opts.d: Likewise.
* gas/i386/ilp32/x86-64-opts-intel.d: Likewise.
* gas/i386/ilp32/x86-64-pcrel.d: Likewise.
* gas/i386/ilp32/x86-64-reg.d: Likewise.
* gas/i386/ilp32/x86-64-reg-intel.d: Likewise.
* gas/i386/ilp32/x86-64-rep.d: Likewise.
* gas/i386/ilp32/x86-64-rep-suffix.d: Likewise.
* gas/i386/ilp32/x86-64-rip.d: Likewise.
* gas/i386/ilp32/x86-64-rip-intel.d: Likewise.
* gas/i386/ilp32/x86-64-sib.d: Likewise.
* gas/i386/ilp32/x86-64-sib-intel.d: Likewise.
* gas/i386/ilp32/x86-64-simd.d: Likewise.
* gas/i386/ilp32/x86-64-simd-intel.d: Likewise.
* gas/i386/ilp32/x86-64-simd-suffix.d: Likewise.
* gas/i386/ilp32/x86-64-sse2avx.d: Likewise.
* gas/i386/ilp32/x86-64-sse2avx-opts.d: Likewise.
* gas/i386/ilp32/x86-64-sse2avx-opts-intel.d: Likewise.
* gas/i386/ilp32/x86-64-sse3.d: Likewise.
* gas/i386/ilp32/x86-64-sse4_1.d: Likewise.
* gas/i386/ilp32/x86-64-sse4_1-intel.d: Likewise.
* gas/i386/ilp32/x86-64-sse4_2.d: Likewise.
* gas/i386/ilp32/x86-64-sse4_2-intel.d: Likewise.
* gas/i386/ilp32/x86-64-sse-check.d: Likewise.
* gas/i386/ilp32/x86-64-sse-check-none.d: Likewise.
* gas/i386/ilp32/x86-64-sse-check-warn.d: Likewise.
* gas/i386/ilp32/x86-64-sse-noavx.d: Likewise.
* gas/i386/ilp32/x86-64-ssse3.d: Likewise.
* gas/i386/ilp32/x86-64-stack.d: Likewise.
* gas/i386/ilp32/x86-64-stack-intel.d: Likewise.
* gas/i386/ilp32/x86-64-stack-suffix.d: Likewise.
* gas/i386/ilp32/x86-64-unwind.d: Likewise.
* gas/i386/ilp32/x86-64-vmx.d: Likewise.
* gas/i386/ilp32/x86-64-xsave.d: Likewise.
* gas/i386/ilp32/x86-64-xsave-intel.d: Likewise.
ld/
2010-12-30 H.J. Lu <hongjiu.lu@intel.com>
* emulparams/elf32_x86_64.sh: New.
* configure.tgt (targ64_extra_emuls): Add elf32_x86_64 for
i[3-7]86-*-linux-*.
(targ_extra_libpath): Likewise.
(targ_extra_emuls): Add elf32_x86_64 for x86_64-*-linux-*.
(targ_extra_libpath): Likewise.
* Makefile.am (ALL_64_EMULATION_SOURCES): Add eelf32_x86_64.c.
(eelf32_x86_64.c): New.
* Makefile.in: Regenerated.
opcodes/
2010-12-30 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (print_insn): Support bfd_mach_x64_32 and
bfd_mach_x64_32_intel_syntax.
2010-12-31 00:33:36 +00:00
a1facbec7a
* symbols.c (symbol_clone_if_forward_ref): Call tc_new_dot_label
...
for new fake labels created off the dot special symbol.
* config/tc-mips.h (tc_new_dot_label): New macro.
(mips_record_label): New prototype.
* config/tc-mips.c (my_getExpression): Remove MIPS16 fake label
annotation.
(s_cons, s_float_cons, s_gpword, s_gpdword): Only clear labels
recorded once data expressions have been evaluated.
(mips_define_label): Move code to record labels over to...
(mips_record_label): ... this new function.
* doc/internals.texi: Document tc_new_dot_label.
2010-12-16 18:48:28 +00:00
8611b8fdbe
gas: bfin: convert to new doc style
...
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-11-24 22:20:02 +00:00
2d8b84aee3
2010-11-23 Sterling Augustine <sterling@tensilica.com>
...
* doc/as.texinfo: Refer to and include c-xtensa.texi for Xtensa
options. Move Xtensa options to proper alphabetical location.
* doc/c-xtensa.texi: Add markup for use in manpage generation.
2010-11-23 19:19:38 +00:00
731caf7610
Refer to and include c-i386.texi for i386 options.
...
2010-11-23 H.J. Lu <hongjiu.lu@intel.com>
* doc/as.texinfo: Refer to and include c-i386.texi for i386
options.
* doc/c-i386.texi: Add markup for use in manpage generation.
2010-11-23 15:27:36 +00:00
2a63393986
* doc/as.texinfo: Refer to or include c-alpha.texi for Alpha
...
options. Refer to or include c-tic6x.texi for C6X options instead
of duplicating documentation here.
* doc/c-alpha.texi, doc/c-tic6x.texi: Add markup for use in
manpage generation.
2010-11-22 22:11:52 +00:00
fd50354116
bfd/
...
* archures.c (bfd_mach_mips_loongson_3a): Defined.
* bfd-in2.h (bfd_mach_mips_loongson_3a): Defined.
* cpu-mips.c (I_loongson_3a): New add.
(arch_info_struct): Add loongson_3a.
* elfxx-mips.c (_bfd_elf_mips_mach): Add loongson_3a.
(mips_set_isa_flags): Add loongson_3a.
(mips_mach_extensions): Add loongson_3a in MIPS64 extensions.
binutils/
* readelf.c (get_machine_flags): Add loongson-3a.
gas/
* config/tc-mips.c (mips_cpu_info_table): Add loongson3a in MIPS 64.
* doc/c-mips.texi (MIPS cpu): Add loongson3a.
include/
* elf/mips.h (E_MIPS_MACH_LS3A): Defined.
* opcode/mips.h (INSN_LOONGSON_3A): Defined.
(CPU_LOONGSON_3A): Defined.
(OPCODE_IS_MEMBER): Add LOONGSON_3A.
opcodes/
* mips-dis.c (mips_arch_choices): Add loongson3a.
* mips-opc.c (IL3A): Defined as INSN_LOONGSON_3A.
(mips_builtin_opcodes): Modify some instructions' membership from
IL2F to IL2F|IL3A, since these instructions are supported by Loongson_3A.
2010-11-11 10:23:39 +00:00
877791769e
bfd:
...
* elf32-tic6x.c (elf32_tic6x_obj_attrs_arg_type): Except for
Tag_ABI_compatibility, treat odd tags as strings and even ones as
integers.
(elf32_tic6x_obj_attrs_order, elf32_tic6x_tag_to_array_alignment,
elf32_tic6x_array_alignment_to_tag): New.
(elf32_tic6x_merge_attributes): Handle more attributes. Set type
for merged attributes.
(elf_backend_obj_attrs_order): Define.
binutils:
* readelf.c (display_tic6x_attribute): Handle more attributes.
gas:
* config/tc-tic6x.c (OPTION_MPID, OPTION_MPIC, OPTION_MNO_PIC):
New enum values.
(md_longopts): Add options mpid, mpic and mno-pic.
(tic6x_pid_type, tic6x_pid, tic6x_pic, tic6x_pid_type_table,
tic6x_pid_types, tic6x_use_pid): New.
(md_parse_option): Handle new options.
(md_show_usage): Output help text for new options.
(tic6x_set_attributes): Set PID and PIC attributes.
* doc/as.texinfo: Document -mpid=, -mpic and -mno-pic.
* doc/c-tic6x.texi (TIC6X Options): Likewise.
gas/testsuite:
* gas/tic6x/attr-array-directive-1.d,
gas/tic6x/attr-array-directive-1.s,
gas/tic6x/attr-array-directive-2.d,
gas/tic6x/attr-array-directive-2.s,
gas/tic6x/attr-array-directive-3.d,
gas/tic6x/attr-array-directive-3.s,
gas/tic6x/attr-array-directive-4.d,
gas/tic6x/attr-array-directive-4.s,
gas/tic6x/attr-conformance-directive-1.d,
gas/tic6x/attr-conformance-directive-1.s,
gas/tic6x/attr-conformance-directive-2.d,
gas/tic6x/attr-conformance-directive-2.s,
gas/tic6x/attr-pic-directive-1.d,
gas/tic6x/attr-pic-directive-1.s,
gas/tic6x/attr-pic-directive-2.d,
gas/tic6x/attr-pic-directive-2.s,
gas/tic6x/attr-pic-opts-mno-pic.d, gas/tic6x/attr-pic-opts-mpic.d,
gas/tic6x/attr-pid-directive-1.d,
gas/tic6x/attr-pid-directive-1.s,
gas/tic6x/attr-pid-directive-2.d,
gas/tic6x/attr-pid-directive-2.s,
gas/tic6x/attr-pid-opts-mpid-far.d,
gas/tic6x/attr-pid-opts-mpid-near.d,
gas/tic6x/attr-pid-opts-mpid-no.d,
gas/tic6x/attr-stack-directive-1.d,
gas/tic6x/attr-stack-directive-1.s,
gas/tic6x/attr-stack-directive-2.d,
gas/tic6x/attr-stack-directive-2.s,
gas/tic6x/attr-wchar-directive-1.d,
gas/tic6x/attr-wchar-directive-1.s,
gas/tic6x/attr-wchar-directive-2.d,
gas/tic6x/attr-wchar-directive-2.s: New tests.
include/elf:
* tic6x-attrs.h (Tag_ABI_wchar_t, Tag_ABI_stack_align_needed,
Tag_ABI_stack_align_preserved, Tag_ABI_PID, Tag_ABI_PIC,
Tag_ABI_array_object_alignment,
Tag_ABI_array_object_align_expected, Tag_ABI_conformance): Define.
ld/testsuite:
* ld-tic6x/attr-array-16-16.d, ld-tic6x/attr-array-16-4.d,
ld-tic6x/attr-array-16-416.d, ld-tic6x/attr-array-16-48.d,
ld-tic6x/attr-array-16-8.d, ld-tic6x/attr-array-16-816.d,
ld-tic6x/attr-array-16.s, ld-tic6x/attr-array-4-16.d,
ld-tic6x/attr-array-4-4.d, ld-tic6x/attr-array-4-416.d,
ld-tic6x/attr-array-4-48.d, ld-tic6x/attr-array-4-8.d,
ld-tic6x/attr-array-4-816.d, ld-tic6x/attr-array-4.s,
ld-tic6x/attr-array-416-16.d, ld-tic6x/attr-array-416-4.d,
ld-tic6x/attr-array-416-416.d, ld-tic6x/attr-array-416-48.d,
ld-tic6x/attr-array-416-8.d, ld-tic6x/attr-array-416-816.d,
ld-tic6x/attr-array-416.s, ld-tic6x/attr-array-48-16.d,
ld-tic6x/attr-array-48-4.d, ld-tic6x/attr-array-48-416.d,
ld-tic6x/attr-array-48-48.d, ld-tic6x/attr-array-48-8.d,
ld-tic6x/attr-array-48-816.d, ld-tic6x/attr-array-48.s,
ld-tic6x/attr-array-8-16.d, ld-tic6x/attr-array-8-4.d,
ld-tic6x/attr-array-8-416.d, ld-tic6x/attr-array-8-48.d,
ld-tic6x/attr-array-8-8.d, ld-tic6x/attr-array-8-816.d,
ld-tic6x/attr-array-8.s, ld-tic6x/attr-array-816-16.d,
ld-tic6x/attr-array-816-4.d, ld-tic6x/attr-array-816-416.d,
ld-tic6x/attr-array-816-48.d, ld-tic6x/attr-array-816-8.d,
ld-tic6x/attr-array-816-816.d, ld-tic6x/attr-array-816.s,
ld-tic6x/attr-conformance-10-10.d,
ld-tic6x/attr-conformance-10-11.d,
ld-tic6x/attr-conformance-10-none.d,
ld-tic6x/attr-conformance-10.s, ld-tic6x/attr-conformance-11-10.d,
ld-tic6x/attr-conformance-11-11.d,
ld-tic6x/attr-conformance-11-none.d,
ld-tic6x/attr-conformance-11.s,
ld-tic6x/attr-conformance-none-10.d,
ld-tic6x/attr-conformance-none-11.d,
ld-tic6x/attr-conformance-none-none.d,
ld-tic6x/attr-conformance-none.s, ld-tic6x/attr-pic-0.s,
ld-tic6x/attr-pic-00.d, ld-tic6x/attr-pic-01.d,
ld-tic6x/attr-pic-1.s, ld-tic6x/attr-pic-10.d,
ld-tic6x/attr-pic-11.d, ld-tic6x/attr-pid-0.s,
ld-tic6x/attr-pid-00.d, ld-tic6x/attr-pid-01.d,
ld-tic6x/attr-pid-02.d, ld-tic6x/attr-pid-1.s,
ld-tic6x/attr-pid-10.d, ld-tic6x/attr-pid-11.d,
ld-tic6x/attr-pid-12.d, ld-tic6x/attr-pid-2.s,
ld-tic6x/attr-pid-20.d, ld-tic6x/attr-pid-21.d,
ld-tic6x/attr-pid-22.d, ld-tic6x/attr-stack-16-16.d,
ld-tic6x/attr-stack-16-8.d, ld-tic6x/attr-stack-16-816.d,
ld-tic6x/attr-stack-16.s, ld-tic6x/attr-stack-8-16.d,
ld-tic6x/attr-stack-8-8.d, ld-tic6x/attr-stack-8-816.d,
ld-tic6x/attr-stack-8.s, ld-tic6x/attr-stack-816-16.d,
ld-tic6x/attr-stack-816-8.d, ld-tic6x/attr-stack-816-816.d,
ld-tic6x/attr-stack-816.s, ld-tic6x/attr-wchar-0.s,
ld-tic6x/attr-wchar-00.d, ld-tic6x/attr-wchar-01.d,
ld-tic6x/attr-wchar-02.d, ld-tic6x/attr-wchar-1.s,
ld-tic6x/attr-wchar-10.d, ld-tic6x/attr-wchar-11.d,
ld-tic6x/attr-wchar-12.d, ld-tic6x/attr-wchar-2.s,
ld-tic6x/attr-wchar-20.d, ld-tic6x/attr-wchar-21.d,
ld-tic6x/attr-wchar-22.d: New tests.
2010-11-02 14:36:39 +00:00
3cbd1c0665
bfd:
...
* elf32-tic6x.c (elf32_tic6x_obj_attrs_arg_type): Check
Tag_ABI_compatibility not Tag_compatibility.
(elf32_tic6x_merge_attributes): Update compatibility attribute
name in comment. Return FALSE if merging common attributes fails.
binutils:
* readelf.c (display_tic6x_attribute): Use Tag_ABI_compatibility
not hardcoded 32. Display name of this attribute.
gas:
* doc/c-tic6x.texi (TIC6X Directives): Mention
Tag_ABI_compatibility.
gas/testsuite:
* gas/tic6x/attr-compatibility-directive-1.d,
gas/tic6x/attr-compatibility-directive-1.s,
gas/tic6x/attr-compatibility-directive-2.d,
gas/tic6x/attr-compatibility-directive-2.s: New tests.
include/elf:
* tic6x-attrs.h (Tag_ABI_compatibility): Define.
ld/testsuite:
* ld-tic6x/attr-compatibility-gnu-gnu.d,
ld-tic6x/attr-compatibility-gnu-other.d,
ld-tic6x/attr-compatibility-gnu.s,
ld-tic6x/attr-compatibility-other-gnu.d,
ld-tic6x/attr-compatibility-other-other.d,
ld-tic6x/attr-compatibility-other.s: New tests.
2010-10-29 16:47:55 +00:00
b559362370
bfd:
...
2010-10-29 Bernd Schmidt <bernds@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* elf32-tic6x.c (elf32_tic6x_merge_attributes): Check for mismatch
of DSBT attributes.
binutils:
2010-10-29 Bernd Schmidt <bernds@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* readelf.c (display_tic6x_attribute): Handle Tag_ABI_DSBT.
gas:
2010-10-29 Bernd Schmidt <bernds@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* config/tc-tic6x.c (OPTION_MDSBT, OPTION_MNO_DSBT): New enum
values.
(md_longopts): Add mdsbt and mno-dsbt.
(tic6x_dsbt): New static variable.
(md_parse_option): Handle OPTION_MDSBT and OPTION_MNO_DSBT.
(md_show_usage): Output help text for -mdsbt and -mno-dsbt.
(TAG): Add comma at the end.
(tic6x_set_attributes): Set Tag_ABI_DSBT.
* doc/as.texinfo: Document -mdsbt and -mno-dsbt.
* doc/c-tic6x.texi (TIC6X Options): Likewise.
(TIC6X Directives): Mention Tag_ABI_DSBT.
gas/testsuite:
2010-10-29 Bernd Schmidt <bernds@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* gas/tic6x/attr-dsbt-directive-1.d,
gas/tic6x/attr-dsbt-directive-1.s,
gas/tic6x/attr-dsbt-directive-2.d,
gas/tic6x/attr-dsbt-directive-2.s,
gas/tic6x/attr-dsbt-opts-mdsbt.d,
gas/tic6x/attr-dsbt-opts-mno-dsbt.d: New tests.
include/elf:
2010-10-29 Bernd Schmidt <bernds@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* tic6x-attrs.h (Tag_ABI_DSBT): New.
ld/testsuite:
2010-10-29 Bernd Schmidt <bernds@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* ld-tic6x/attr-dsbt-0.s, ld-tic6x/attr-dsbt-00.d,
ld-tic6x/attr-dsbt-01.d, ld-tic6x/attr-dsbt-1.s,
ld-tic6x/attr-dsbt-10.d, ld-tic6x/attr-dsbt-11.d: New tests.
2010-10-29 00:15:59 +00:00
9160ea826a
Add directory section for info document.
2010-10-28 11:40:26 +00:00
75fa6dc1e8
bfd:
...
* elf32-tic6x.c (elf32_tic6x_merge_arch_attributes): Update for
attribute renaming.
(elf_backend_obj_attrs_section): Change to ".c6xabi.attributes".
binutils:
* readelf.c (display_tic6x_attribute): Update for attribute
renaming.
gas:
* config/tc-tic6x.c (tic6x_arch_attribute, tic6x_arches,
md_assemble, tic6x_set_attributes): Update for attribute renaming.
* doc/c-tic6x.texi: Update for attribute renaming.
gas/testsuite:
* gas/tic6x/attr-arch-directive-1.d,
gas/tic6x/attr-arch-directive-2.d,
gas/tic6x/attr-arch-directive-3.d,
gas/tic6x/attr-arch-directive-4.d,
gas/tic6x/attr-arch-directive-4.s,
gas/tic6x/attr-arch-directive-5.d,
gas/tic6x/attr-arch-directive-5.s,
gas/tic6x/attr-arch-opts-c62x.d, gas/tic6x/attr-arch-opts-c64x+.d,
gas/tic6x/attr-arch-opts-c64x.d, gas/tic6x/attr-arch-opts-c674x.d,
gas/tic6x/attr-arch-opts-c67x+.d, gas/tic6x/attr-arch-opts-c67x.d,
gas/tic6x/attr-arch-opts-none-1.d,
gas/tic6x/attr-arch-opts-none-2.d,
gas/tic6x/attr-arch-opts-override-1.d,
gas/tic6x/attr-arch-opts-override-2.d: Update for attribute
renaming and renumbering.
include/elf:
* tic6x-attrs.h (Tag_C6XABI_Tag_CPU_arch): Change to Tag_ISA,
value 4.
* tic6x.h (Values for Tag_C6XABI_Tag_CPU_arch): Rename for
attribute renaming.
ld:
* emulparams/elf32_tic6x_le.sh (ATTRS_SECTIONS): Use
.c6xabi.attributes, not __TI_build_attributes.
ld/testsuite:
* ld-tic6x/attr-arch-c62x-c62x.d, ld-tic6x/attr-arch-c62x-c64x+.d,
ld-tic6x/attr-arch-c62x-c64x.d, ld-tic6x/attr-arch-c62x-c674x.d,
ld-tic6x/attr-arch-c62x-c67x+.d, ld-tic6x/attr-arch-c62x-c67x.d,
ld-tic6x/attr-arch-c64x+-c62x.d, ld-tic6x/attr-arch-c64x+-c64x+.d,
ld-tic6x/attr-arch-c64x+-c64x.d, ld-tic6x/attr-arch-c64x+-c674x.d,
ld-tic6x/attr-arch-c64x+-c67x+.d, ld-tic6x/attr-arch-c64x+-c67x.d,
ld-tic6x/attr-arch-c64x-c62x.d, ld-tic6x/attr-arch-c64x-c64x+.d,
ld-tic6x/attr-arch-c64x-c64x.d, ld-tic6x/attr-arch-c64x-c674x.d,
ld-tic6x/attr-arch-c64x-c67x+.d, ld-tic6x/attr-arch-c64x-c67x.d,
ld-tic6x/attr-arch-c674x-c62x.d, ld-tic6x/attr-arch-c674x-c64x+.d,
ld-tic6x/attr-arch-c674x-c64x.d, ld-tic6x/attr-arch-c674x-c674x.d,
ld-tic6x/attr-arch-c674x-c67x+.d, ld-tic6x/attr-arch-c674x-c67x.d,
ld-tic6x/attr-arch-c67x+-c62x.d, ld-tic6x/attr-arch-c67x+-c64x+.d,
ld-tic6x/attr-arch-c67x+-c64x.d, ld-tic6x/attr-arch-c67x+-c674x.d,
ld-tic6x/attr-arch-c67x+-c67x+.d, ld-tic6x/attr-arch-c67x+-c67x.d,
ld-tic6x/attr-arch-c67x-c62x.d, ld-tic6x/attr-arch-c67x-c64x+.d,
ld-tic6x/attr-arch-c67x-c64x.d, ld-tic6x/attr-arch-c67x-c674x.d,
ld-tic6x/attr-arch-c67x-c67x+.d, ld-tic6x/attr-arch-c67x-c67x.d:
Update for attribute renaming.
2010-10-21 21:16:54 +00:00
f8a5c26697
Add .d32 encoding suffix.
...
gas/
2010-10-14 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (_i386_insn): Add disp32_encoding.
(md_assemble): Don't call optimize_disp if disp32_encoding is
set.
(parse_insn): Support .d32 to force 32bit displacement.
(output_branch): Use BIG if disp32_encoding is set.
* doc/c-i386.texi: Document .d32 encoding suffix.
gas/testsuite/
2010-10-14 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/disp32.d: New.
* gas/i386/disp32.s: Likewise.
* gas/i386/x86-64-disp32.d: Likewise.
* gas/i386/x86-64-disp32.s: Likewise.
* gas/i386/i386.exp: Run disp32 and x86-64-disp32.
2010-10-14 13:31:13 +00:00
d954098fc1
2010-10-04 David Daney <ddaney@caviumnetworks.com>
...
* config/tc-mips.c (mips_fix_cn63xxp1): New variable.
(mips_ip): Add errata work around when mips_fix_cn63xxp1 set.
(OPTION_FIX_CN63XXP1, OPTION_NO_FIX_CN63XXP1): New enum options
enumerations.
(md_longopts): Add options for -mfix-cn63xxp1 and -mno-fix-cn63xxp1.
(md_parse_option): Handle OPTION_FIX_CN63XXP1 and
OPTION_NO_FIX_CN63XXP1.
(md_show_usage): Add documentation for -mfix-cn63xxp1.
* doc/c-mips.texi (-mfix-cn63xxp1, -mno-fix-cn63xxp1): Document
the new options.
2010-10-04 David Daney <ddaney@caviumnetworks.com>
* gas/mips/mips.exp (octeon-pref): Run the new test.
* gas/mips/octeon-pref.s: New test.
* gas/mips/octeon-pref.d: New expected results for the new test.
2010-10-04 15:24:49 +00:00
d9aee5d7f7
2010-09-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
...
* s390-mkopc.c (enum s390_opcde_cpu_val): Add S390_OPCODE_Z196.
(main): Recognize the new CPU string.
* s390-opc.c: Add new instruction formats and masks.
* s390-opc.txt: Add new z196 instructions.
2010-09-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* opcode/s390.h: Add S390_OPCODE_Z196 to enum s390_opcode_cpu_val.
2010-09-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* config/tc-s390.c: (md_parse_option): New option -march=z196.
* doc/c-s390.texi: Document new option.
2010-09-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* gas/s390/s390.exp: Run the zarch-z196 test.
* gas/s390/zarch-z196.d: Add new instructions.
* gas/s390/zarch-z196.s: Likewise.
* gas/s390/zarch-z9-109.d: Likewise.
* gas/s390/zarch-z9-109.s: Likewise.
2010-09-27 13:36:48 +00:00
90ec0d684e
* bfd/bfd-in2.h (BFD_RELOC_ARM_HVC): New enum value.
...
* gas/config/tc-arm.c (arm_ext_virt): New variable.
(arm_reg_type): Add REG_TYPE_RNB for banked registers.
(reg_entry): Allow registers to be larger than a byte.
(reg_alias): Fix type warning.
(parse_operands): Parse banked registers when appropriate.
(do_mrs): Add support for Virtualization Extensions.
(do_hvc): New function.
(do_t_mrs): Add support for Virtualization Extensions.
(do_t_msr): Likewise.
(do_t_hvc): New function.
(SPLRBANK): New define.
(reg_names): Add banked registers.
(insns): Add support for Virtualization Extensions.
(md_apply_fixup): Likewise.
(arm_cpus): -mcpu=cortex-a15 implies the Virtualization Extensions.
(arm_extensions): Add 'virt' extension.
(aeabi_set_public_attributes): Add support for Virtualization
Extensions.
* gas/doc/c-arm.texi: Document 'virt' extension.
* gas/testsuite/gas/arm/armv7-a+virt.d: New test.
* gas/testsuite/gas/arm/armv7-a+virt.s: Likewise.
* gas/testsuite/gas/arm/attr-march-all.d: Update for Virtualization Extensions.
* gas/testsuite/gas/arm/attr-march-armv7-a+sec+virt.d: New test.
* gas/testsuite/gas/arm/attr-march-armv7-a+virt.d: Likewise.
* include/opcode/arm.h (ARM_EXT_VIRT): New define.
(ARM_ARCH_V7A_IDIV_MP_SEC): Rename...
(ARM_ARCH_V7A_IDIV_MP_SEC_VIRT): ...to this and include Virtualization
Extensions.
* opcodes/arm-dis.c (arm_opcodes): Add Virtualiztion Extensions support.
(thumb32_opcodes): Likewise.
(banked_regname): New function.
(print_insn_arm): Add Virtualization Extensions support.
(print_insn_thumb32): Likewise.
2010-09-23 15:52:19 +00:00
eea54501f7
* gas/config/tc-arm.c (arm_ext_adiv): New variable.
...
(do_div): New function.
(insns): Accept UDIV and SDIV in ARM state.
(arm_cpus): The cortex-a15 option has all current v7-A extensions.
(arm_extensions): Add 'idiv' extension.
(aeabi_set_public_attributes): Update Tag_DIV_use values for the
Integer Divide extension.
* gas/doc/c-arm.texi: Document the idiv extension.
* gas/testsuite/gas/arm/armv7-a+idiv.d: New test.
* gas/testsuite/gas/arm/armv7-a+idiv.s: Likewise.
* gas/testsuite/gas/arm/attr-march-all.d: Update for Integer divide extension.
* gas/testsuite/gas/arm/attr-march-armv7-a+idiv.d: New test.
* include/opcode/arm.h (ARM_AEXT_ADIV): New define.
(ARM_ARCH_V7A_IDIV_MP_SEC): Likewise.
* opcodes/arm-dis.c (arm_opcodes): Support disassembly of UDIV and SDIV in
ARM state.
2010-09-23 15:37:45 +00:00
b2a5fbdc94
* config/tc-arm.c (arm_ext_v6m): New variable.
...
(arm_ext_m): Add support for OS extension.
(arm_ext_os): New variable.
(do_t_swi): In v6-M ensure we have the OS extension.
(arm_cpus): The cortex-m1 and cortex-m0 options have the OS
extension by default.
(arm_archs): Add armv6s-m.
(arm_extensions): Add 'os' extension.
(cpu_arch_ver): Add support for v6S-M.
* gas/doc/c-arm.texi: Document the OS Extension, and v6-m and v6s-m
architecture options.
* gas/testsuite/gas/arm/archv6s-m-bad.d: New test.
* gas/testsuite/gas/arm/archv6s-m-bad.l: Likewise.
* gas/testsuite/gas/arm/archv6s-m.d: Likewise.
* gas/testsuite/gas/arm/archv6s-m.s: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6-m+os.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6s-m.d: Likewise.
* include/opcode/arm.h (ARM_EXT_OS): New define.
(ARM_AEXT_V6SM): Likewise.
(ARM_ARCH_V6SM): Likewise.
2010-09-23 15:31:34 +00:00
f4c65163c7
* gas/config/tc-arm.c (arm_ext_v6z): Remove.
...
(arm_ext_sec): New variable.
(do_t_smc): In Thumb state SMC requires v7-A.
(insns): Make SMC depend on Security Extensions.
(arm_cpus): All -mcpu=cortex-a* options have the Security Extensions.
(arm_extensions): Add 'sec' extension.
(cpu_arch_ver): Reorder.
(aeabi_set_public_attributes): Emit Tag_Virtualization_use as
appropriate.
* gas/doc/c-arm.texi: Document Security Extensions.
* gas/testsuite/gas/arm/attr-march-all.d: Update for Security Extensions..
* gas/testsuite/gas/arm/attr-march-armv6k+sec.d: New test.
* gas/testsuite/gas/arm/attr-march-armv6z.d: Update for Security Extensions.
* gas/testsuite/gas/arm/attr-march-armv6zk.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6zkt2.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6zt2.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv7-a+sec.d: New test.
* gas/testsuite/gas/arm/attr-mcpu.d: Update for Security Extensions.
* gas/testsuite/gas/arm/thumb32.d: Likewise.
* gas/testsuite/gas/arm/thumb32.s: Likewise.
* include/opcode/arm.h (ARM_EXT_V6Z): Remove.
(ARM_EXT_SEC): New define.
(ARM_AEXT_V6Z): Use Security Extensions.
(ARM_AEXT_V6ZK): Likeiwse.
(ARM_AEXT_V6ZT2): Likewise.
(ARM_AEXT_V6ZKT2): Likewise.
(ARM_AEXT_V7_ARM): Base v7 does not have Security Extensions.
(ARM_ARCH_V7A_SEC): New define.
(ARM_ARCH_V7A_MP): Rename...
(ARM_ARCH_V7A_MP_SEC): ...to this and add Security Extensions.
* ld/testsuite/ld-arm/attr-merge-6.attr: Update for Security Extensions.
* ld/testsuite/ld-arm/attr-merge-7.attr: Likewise.
* opcodes/arm-dis.c (arm_opcodes): SMC implies Security Extensions.
(thumb32_opcodes): Likewise.
2010-09-23 15:26:24 +00:00
60e5ef9f19
* gas/config/tc-arm.c (arm_ext_mp): Add.
...
(do_pld): Update comment.
(insns): Add support for pldw.
(arm_cpus): Update cortex-a5, cortex-a9, and cortex-a15 to support
MP extension.
(arm_extensions): Add 'mp' extension.
(aeabi_set_public_attributes): Emit correct build attribute when
MP extension is enabled.
* gas/doc/c-arm.texi: Update for MP extensions.
* gas/testsuite/gas/arm/arch7a-mp.d: Add.
* gas/testsuite/gas/arm/arch7ar-mp.s: Likewise.
* gas/testsuite/gas/arm/arch7r-mp.d: Likewise.
* gas/testsuite/gas/arm/armv2-mp-bad.d: Likewise.
* gas/testsuite/gas/arm/armv2-mp-bad.l: Likewise.
* gas/testsuite/gas/arm/attr-march-all.d: Update for MP extension.
* gas/testsuite/gas/arm/attr-march-armv7-a+mp.d: Add.
* gas/testsuite/gas/arm/attr-march-armv7-r+mp.d: Likewise.
* include/opcode/arm.h (ARM_EXT_MP): Add.
(ARM_ARCH_V7A_MP): Likewise.
* opcodes/arm-dis.c (arm_opcodes): Add support for pldw.
(thumb32_opcodes): Likewise.
2010-09-23 15:18:19 +00:00
6913386316
* gas/config/tc-arm.c (md_pseduo_table): Add .arch_extension directive.
...
(arm_option_extension_value_table): Add.
(arm_extensions): Change type.
(arm_option_cpu_table): Rename...
(arm_option_fpu_table): ...to this.
(arm_fpus): Change type.
(arm_parse_extension): Enforce alphabetical order. Allow
extensions to be removed.
(arm_parse_arch): Allow extensions to be specified with -march.
(s_arm_arch_extension): Add.
(s_arm_fpu): Update for type changes.
* gas/doc/c-arm.texi: Document changes to infrastructure.
2010-09-23 15:11:56 +00:00
6e38d38491
gas: blackfin: add support for BF592 processors
...
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-09-22 20:17:51 +00:00
7ef07ba077
* doc/c-arm.texi: Document -mcpu=cortex-m4.
2010-09-14 09:16:21 +00:00
8a0344f66a
* doc/c-tic6x.texi (.c6xabi_attribute): Document directive.
2010-09-09 20:56:15 +00:00
dbb1f80440
* gas/config/tc-arm.c (arm_cpus): Add cortex-a15 entry.
...
* gas/doc/c-arm.texi: Document -mcpu=cortex-a15.
2010-09-09 12:08:13 +00:00
f0cd06677b
* doc/c-arm.texi (ARM Options): Document -mfpu=fp4-sp-d16.
2010-08-20 20:53:28 +00:00
01642c122a
Add "?" pseudo-flag to ELF .section/.pushsection directives.
2010-08-17 20:03:41 +00:00
955974c6c5
* as.c (show_usage): Don't list --compress-debug-sections if zlib not
...
installed.
(main): Warn if --compress-debug-sections requested and zlib not
installed.
* doc/as.texinfo: Add --compress-debug-sections,
--nocompress-debug-sections.
2010-08-09 18:08:18 +00:00
1cd986c585
Add support for v850E2 and v850E2V3
2010-07-23 14:52:54 +00:00
c7b8aa3a72
Support AVX Programming Reference (June, 2010)
...
gas/
2010-07-01 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2010)
* config/tc-i386.c (cpu_arch): Add .xsaveopt, .fsgsbase, .rdrnd
and .f16c.
* doc/c-i386.texi: Document xsaveopt, fsgsbase, rdrnd and f16c.
gas/testsuite/
2010-07-01 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2010)
* gas/i386/arch-10.s: Add xsaveopt.
* gas/i386/x86-64-arch-2.s: Likwise.
* gas/i386/arch-10.d: Updated.
* gas/i386/arch-10-1.l: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
* gas/i386/f16c-intel.d: New.
* gas/i386/f16c.d: Likewise.
* gas/i386/f16c.s: Likewise.
* gas/i386/fsgs-intel.d: Likewise.
* gas/i386/fsgs.d: Likewise.
* gas/i386/fsgs.s: Likewise.
* gas/i386/rdrnd-intel.d: Likewise.
* gas/i386/rdrnd.d: Likewise.
* gas/i386/rdrnd.s: Likewise.
* gas/i386/x86-64-f16c-intel.d: Likewise.
* gas/i386/x86-64-f16c.d: Likewise.
* gas/i386/x86-64-f16c.s: Likewise.
* gas/i386/x86-64-fsgs-intel.d: Likewise.
* gas/i386/x86-64-fsgs.d: Likewise.
* gas/i386/x86-64-fsgs.s: Likewise.
* gas/i386/x86-64-rdrnd-intel.d: Likewise.
* gas/i386/x86-64-rdrnd.d: Likewise.
* gas/i386/x86-64-rdrnd.s: Likewise.
* gas/i386/i386.exp: Run f16c, f16c-intel, fsgs, fsgs-intel,
rdrnd, rdrnd-intel, x86-64-f16c, x86-64-f16c-intel, x86-64-fsgs,
x86-64-fsgs-intel, x86-64-rdrnd, x86-64-rdrnd-intel.
* gas/i386/x86-64-xsave.s: Add tests for xsaveopt64.
* gas/i386/x86-64-xsave-intel.d: Updated.
* gas/i386/x86-64-xsave.d: Likewise.
opcodes/
2010-07-01 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2010)
* i386-dis.c (PREFIX_0FAE_REG_0): New.
(PREFIX_0FAE_REG_1): Likewise.
(PREFIX_0FAE_REG_2): Likewise.
(PREFIX_0FAE_REG_3): Likewise.
(PREFIX_VEX_3813): Likewise.
(PREFIX_VEX_3A1D): Likewise.
(prefix_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3, PREFIX_VEX_3813 and
PREFIX_VEX_3A1D.
(vex_table): Add PREFIX_VEX_3813 and PREFIX_VEX_3A1D.
(mod_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3 xsaveopt and rdrnd.
* i386-gen.c (cpu_flag_init): Add CPU_XSAVEOPT_FLAGS,
CPU_FSGSBASE_FLAGS, CPU_RDRND_FLAGS and CPU_F16C_FLAGS.
(cpu_flags): Add CpuXsaveopt, CpuFSGSBase, CpuRdRnd and CpuF16C.
* i386-opc.h (CpuXsaveopt): New.
(CpuFSGSBase):Likewise.
(CpuRdRnd): Likewise.
(CpuF16C): Likewise.
(i386_cpu_flags): Add cpuxsaveopt, cpufsgsbase, cpurdrnd and
cpuf16c.
* i386-opc.tbl: Add xsaveopt, rdfsbase, rdgsbase, rdrnd,
wrfsbase, wrgsbase, vcvtph2ps and vcvtps2ph.
2010-07-01 21:55:02 +00:00
1f9bb1caf2
* doc/as.texinfo (Overview): Use @itemx for grouped @table
...
items.
* doc/c-alpha.texi (Alpha Options): Likewise.
* doc/c-arm.texi (ARM Directives): Likewise.
* doc/c-bfin.texi (Blackfin Options): Likewise.
* doc/c-d10v.texi (D10V-Opts): Likewise.
* doc/c-i386.texi (i386-Options): Likewise.
* doc/c-ia64.texi (IA-64 Options): Likewise.
* doc/c-m68k.texi (M68K-Opts): Likewise.
* doc/c-tic54x.texi (TIC54X-Directives): Likewise.
* doc/internals.texi (Symbols): Likewise.
2010-06-21 10:49:41 +00:00
9fbcbd8145
etc/ChangeLog
...
* standards.texi: Relicense under GFDL v1.3.
* fdl.texi: Replace with v1.3 text.
gas/ChangeLog
* doc/as.texinfo: Replace abbreviated 20th century year numbers
with full versions.
gprof/ChangeLog
* gprof.texi: Replace abbreviated 20th century year numbers with
full versions.
ld/ChangeLog
* fdl.texi: Replace with v1.3 text.
* ld.texinfo: Replace abbreviated 20th century year numbers with
full versions.
* ldint.texinfo: Likewise.
Relicense under GFDL v1.3. Replace text of v1.1 FDL with an
include of the fdl.texi file.
2010-06-08 10:30:56 +00:00
8e45593ff3
2010-05-21 Daniel Jacobowitz <dan@codesourcery.com>
...
Joseph Myers <joseph@codesourcery.com>
Andrew Stubbs <ams@codesourcery.com>
bfd/
* config.bfd (sh-*-uclinux* | sh[12]-*-uclinux*): Add
bfd_elf32_shl_vec, and FDPIC vectors to targ_selvecs.
* configure.in: Handle FDPIC vectors.
* elf32-sh-relocs.h: Add FDPIC and movi20 relocations.
* elf32-sh.c (DEFAULT_STACK_SIZE): Define.
(SYMBOL_FUNCDESC_LOCAL): Define. Use it instead of
SYMBOL_REFERENCES_LOCAL for function descriptors.
(fdpic_object_p): New.
(sh_reloc_map): Add FDPIC and movi20 relocations.
(sh_elf_info_to_howto, sh_elf_relocate_section): Handle new invalid
range.
(struct elf_sh_plt_info): Add got20 and short_plt. Update all
definitions.
(FDPIC_PLT_ENTRY_SIZE, FDPIC_PLT_LAZY_OFFSET): Define.
(fdpic_sh_plt_entry_be, fdpic_sh_plt_entry_le, fdpic_sh_plts): New.
(FDPIC_SH2A_PLT_ENTRY_SIZE, FDPIC_SH2A_PLT_LAZY_OFFSET): Define.
(fdpic_sh2a_plt_entry_be, fdpic_sh2a_plt_entry_le)
(fdpic_sh2a_short_plt_be, fdpic_sh2a_short_plt_le, fdpic_sh2a_plts):
New.
(get_plt_info): Handle FDPIC.
(MAX_SHORT_PLT): Define.
(get_plt_index, get_plt_offset): Handle short_plt.
(union gotref): New.
(struct elf_sh_link_hash_entry): Add funcdesc, rename tls_type to
got_type and adjust all uses. Add GOT_FUNCDESC.
(struct sh_elf_obj_tdata): Add local_funcdesc. Rename
local_got_tls_type to local_got_type.
(sh_elf_local_got_type): Renamed from sh_elf_local_got_tls_type. All
users changed.
(sh_elf_local_funcdesc): Define.
(struct elf_sh_link_hash_table): Add sfuncdesc, srelfuncdesc, fdpic_p,
and srofixup.
(sh_elf_link_hash_newfunc): Initialize new fields.
(sh_elf_link_hash_table_create): Set fdpic_p.
(sh_elf_omit_section_dynsym): New.
(create_got_section): Create .got.funcdesc, .rela.got.funcdesc
and .rofixup.
(allocate_dynrelocs): Allocate local function descriptors and space
for R_SH_FUNCDESC-related relocations, and for rofixups.
Handle GOT_FUNCDESC. Create fixups. Handle GOT entries which
require function descriptors.
(sh_elf_always_size_sections): Handle PT_GNU_STACK and __stacksize.
(sh_elf_modify_program_headers): New.
(sh_elf_size_dynamic_sections): Allocate function descriptors for
local symbols. Allocate .got.funcdesc contents. Allocate rofixups.
Handle local GOT entries of type GOT_FUNCDESC. Create fixups for
local GOT entries. Ensure that FDPIC libraries always have a PLTGOT
entry in the .dynamic section.
(sh_elf_add_dyn_reloc, sh_elf_got_offset, sh_elf_initialize_funcdesc)
(sh_elf_add_rofixup, sh_elf_osec_to_segment)
(sh_elf_osec_readonly_p, install_movi20_field): New functions.
(sh_elf_relocate_section): Handle new relocations, R_SH_FUNCDESC,
R_SH_GOTFUNCDESC and R_SH_GOTOFFFUNCDESC. Use sh_elf_got_offset
and .got.plt throughout to find _GLOBAL_OFFSET_TABLE_. Add rofixup
read-only section warnings. Handle undefined weak symbols. Generate
fixups for R_SH_DIR32 and GOT entries. Check for cross-segment
relocations and clear EF_SH_PIC. Handle 20-bit relocations.
Always generate R_SH_DIR32 for FDPIC instead of R_SH_RELATIVE.
(sh_elf_gc_sweep_hook): Handle R_SH_FUNCDESC, R_SH_GOTOFF20,
R_SH_GOTFUNCDESC, R_SH_GOTFUNCDESC20, and R_SH_GOTOFFFUNCDESC.
Handle 20-bit relocations.
(sh_elf_copy_indirect_symbol): Copy function descriptor reference
counts.
(sh_elf_check_relocs): Handle new relocations. Make symbols
dynamic for FDPIC relocs. Account for rofixups. Error for FDPIC
symbol mismatches. Allocate a GOT for R_SH_DIR32. Allocate fixups
for R_SH_DIR32.
(sh_elf_copy_private_data): Copy PT_GNU_STACK size.
(sh_elf_merge_private_data): Copy initial flags. Do not clobber
non-mach flags. Set EF_SH_PIC for FDPIC. Reject FDPIC mismatches.
(sh_elf_finish_dynamic_symbol): Do not handle got_funcdesc entries
here. Rename sgot to sgotplt and srel to srelplt. Handle short_plt,
FDPIC descriptors, and got20. Create R_SH_FUNCDESC_VALUE for FDPIC.
Use install_movi20_field. Rename srel to srelgot. Always generate
R_SH_DIR32 for FDPIC instead of R_SH_RELATIVE.
(sh_elf_finish_dynamic_sections): Fill in the GOT pointer in rofixup.
Do not fill in reserved GOT entries for FDPIC. Correct DT_PLTGOT.
Rename sgot to sgotplt. Assert that the right number of rofixups
and dynamic relocations were allocated.
(sh_elf_use_relative_eh_frame, sh_elf_encode_eh_address): New.
(elf_backend_omit_section_dynsym): Use sh_elf_omit_section_dynsym.
(elf_backend_can_make_relative_eh_frame)
(elf_backend_can_make_lsda_relative_eh_frame)
(elf_backend_encode_eh_address): Define.
(TARGET_BIG_SYM, TARGET_BIG_NAME, TARGET_LITTLE_SYM)
(TARGET_LITTLE_NAME, elf_backend_modify_program_headers, elf32_bed):
Redefine for FDPIC vector.
* reloc.c: Add SH FDPIC and movi20 relocations.
* targets.c (_bfd_target_vector): Add FDPIC vectors.
* configure, bfd-in2.h, libbfd.h: Regenerated.
binutils/
* readelf.c (get_machine_flags): Handle EF_SH_PIC and EF_SH_FDPIC.
gas/
* config/tc-sh.c (sh_fdpic): New.
(sh_check_fixup): Handle relocations on movi20.
(parse_exp): Do not reject PIC operators here.
(build_Mytes): Check for unhandled PIC operators here. Use
sh_check_fixup for movi20.
(enum options): Add OPTION_FDPIC.
(md_longopts, md_parse_option, md_show_usage): Add --fdpic.
(sh_fix_adjustable, md_apply_fix): Handle FDPIC and movi20 relocations.
(sh_elf_final_processing): Handle --fdpic.
(sh_uclinux_target_format): New.
(sh_parse_name): Handle FDPIC relocation operators.
* config/tc-sh.h (TARGET_FORMAT): Define specially for TE_UCLINUX.
(sh_uclinux_target_format): Declare for TE_UCLINUX.
* configure.tgt (sh-*-uclinux* | sh[12]-*-uclinux*): Set
em=uclinux.
* doc/c-sh.texi (SH Options): Document --fdpic.
gas/testsuite/
* gas/sh/basic.exp: Run new tests. Handle uClinux like Linux.
* gas/sh/fdpic.d: New file.
* gas/sh/fdpic.s: New file.
* gas/sh/reg-prefix.d: Force big-endian.
* gas/sh/sh2a-pic.d: New file.
* gas/sh/sh2a-pic.s: New file.
* lib/gas-defs.exp (is_elf_format): Include sh*-*-uclinux*.
include/elf/
* sh.h (EF_SH_PIC, EF_SH_FDPIC): Define.
(R_SH_FIRST_INVALID_RELOC_6, R_SH_LAST_INVALID_RELOC_6): New. Adjust
other invalid ranges.
(R_SH_GOT20, R_SH_GOTOFF20, R_SH_GOTFUNCDESC, R_SH_GOTFUNCDESC20)
(R_SH_GOTOFFFUNCDESC, R_SH_GOTOFFFUNCDESC20, R_SH_FUNCDESC)
(R_SH_FUNCDESC_VALUE): New.
ld/
* Makefile.am (ALL_EMULATIONS): Add eshelf_fd.o and eshlelf_fd.o.
(eshelf_fd.c, eshlelf_fd.c): New rules.
* Makefile.in: Regenerate.
* configure.tgt (sh-*-uclinux*): Add shelf_fd and shlelf_fd
emulations.
* emulparams/shelf_fd.sh: New file.
* emulparams/shlelf_fd.sh: New file.
* emulparams/shlelf_linux.sh: Update comment.
ld/testsuite/
* ld-sh/sh.exp: Handle uClinux like Linux.
* lib/ld-lib.exp (is_elf_format): Include sh*-*-uclinux*.
* ld-sh/fdpic-funcdesc-shared.d: New file.
* ld-sh/fdpic-funcdesc-shared.s: New file.
* ld-sh/fdpic-funcdesc-static.d: New file.
* ld-sh/fdpic-funcdesc-static.s: New file.
* ld-sh/fdpic-gotfuncdesc-shared.d: New file.
* ld-sh/fdpic-gotfuncdesc-shared.s: New file.
* ld-sh/fdpic-gotfuncdesc-static.d: New file.
* ld-sh/fdpic-gotfuncdesc-static.s: New file.
* ld-sh/fdpic-gotfuncdesci20-shared.d: New file.
* ld-sh/fdpic-gotfuncdesci20-shared.s: New file.
* ld-sh/fdpic-gotfuncdesci20-static.d: New file.
* ld-sh/fdpic-gotfuncdesci20-static.s: New file.
* ld-sh/fdpic-goti20-shared.d: New file.
* ld-sh/fdpic-goti20-shared.s: New file.
* ld-sh/fdpic-goti20-static.d: New file.
* ld-sh/fdpic-goti20-static.s: New file.
* ld-sh/fdpic-gotofffuncdesc-shared.d: New file.
* ld-sh/fdpic-gotofffuncdesc-shared.s: New file.
* ld-sh/fdpic-gotofffuncdesc-static.d: New file.
* ld-sh/fdpic-gotofffuncdesc-static.s: New file.
* ld-sh/fdpic-gotofffuncdesci20-shared.d: New file.
* ld-sh/fdpic-gotofffuncdesci20-shared.s: New file.
* ld-sh/fdpic-gotofffuncdesci20-static.d: New file.
* ld-sh/fdpic-gotofffuncdesci20-static.s: New file.
* ld-sh/fdpic-gotoffi20-shared.d: New file.
* ld-sh/fdpic-gotoffi20-shared.s: New file.
* ld-sh/fdpic-gotoffi20-static.d: New file.
* ld-sh/fdpic-gotoffi20-static.s: New file.
* ld-sh/fdpic-plt-be.d: New file.
* ld-sh/fdpic-plt-le.d: New file.
* ld-sh/fdpic-plt.s: New file.
* ld-sh/fdpic-plti20-be.d: New file.
* ld-sh/fdpic-plti20-le.d: New file.
* ld-sh/fdpic-stack-default.d: New file.
* ld-sh/fdpic-stack-size.d: New file.
* ld-sh/fdpic-stack.s: New file.
2010-05-25 14:12:43 +00:00
18ae9cc1db
Implement generic SHF_EXCLUDE.
...
bfd/
2010-05-18 H.J. Lu <hongjiu.lu@intel.com>
PR gas/11600
* elf.c (_bfd_elf_make_section_from_shdr): Handle SHF_EXCLUDE
(elf_fake_sections): Likewise.
* elf32-i370.c (i370_elf_section_from_shdr): Don't handle
SHF_EXCLUDE here.
* elf32-ppc.c (ppc_elf_fake_sections): Likewise.
binutils/
2010-05-18 H.J. Lu <hongjiu.lu@intel.com>
PR gas/11600
* readelf.c (get_elf_section_flags): Treat SHF_EXCLUDE as a
generic flag.
binutils/testsuite/
2010-05-18 H.J. Lu <hongjiu.lu@intel.com>
PR gas/11600
* binutils-all/objcopy.exp: Run exclude-1a and exclude-1b for
ELF targets.
* binutils-all/exclude-1.s: New.
* binutils-all/exclude-1a.d: Likewise.
* binutils-all/exclude-1b.d: Likewise.
gas/
2010-05-18 H.J. Lu <hongjiu.lu@intel.com>
PR gas/11600
* obj-elf.c (obj_elf_change_section): Handle SHF_EXCLUDE.
(obj_elf_parse_section_letters): Likewise.
(obj_elf_section_word): Likewise.
* config/tc-ppc.c (ppc_section_letter): Removed.
(ppc_section_word): Likewise.
* config/tc-ppc.h (ppc_section_letter): Likewise.
(ppc_section_word): Likewise.
(md_elf_section_letter): Likewise.
(md_elf_section_word): Likewise.
* doc/as.texinfo: Document `e' and `#exclude'.
gas/testsuite/
2010-05-18 H.J. Lu <hongjiu.lu@intel.com>
PR gas/11600
* gas/elf/elf.exp: Run section8.
* gas/elf/section8.d: New.
* gas/elf/section8.s: Likewise.
include/elf/
2010-05-18 H.J. Lu <hongjiu.lu@intel.com>
PR gas/11600
* common.h (SHF_EXCLUDE): New.
* i370.h (SHF_EXCLUDE): Removed.
* or32.h (SHF_EXCLUDE): Likewise.
* ppc.h (SHF_EXCLUDE): Likewise.
* sparc.h (SHF_EXCLUDE): Likewise.
ld/testsuite/
2010-05-18 H.J. Lu <hongjiu.lu@intel.com>
PR gas/11600
* ld-elf/exclude3.s: New.
* ld-elf/exclude3a.d: Likewise.
* ld-elf/exclude3b.d: Likewise.
* ld-elf/exclude3c.d: Likewise.
2010-05-18 03:31:07 +00:00
6540b386f0
bfd/
...
2010-05-07 Tristan Gingold <gingold@adacore.com>
* Makefile.in: Regenerate with automake 1.11.1.
* aclocal.m4: Ditto.
bfd/doc/
2010-05-07 Tristan Gingold <gingold@adacore.com>
* Makefile.in: Regenerate with automake 1.11.1.
binutils/
2010-05-07 Tristan Gingold <gingold@adacore.com>
* Makefile.in: Regenerate with automake 1.11.1.
* aclocal.m4: Ditto.
* doc/Makefile.in: Ditto.
gas/
2010-05-07 Tristan Gingold <gingold@adacore.com>
* Makefile.in: Regenerate with automake 1.11.1.
* aclocal.m4: Ditto.
* doc/Makefile.in: Ditto.
gprof/
2010-05-07 Tristan Gingold <gingold@adacore.com>
* Makefile.in: Regenerate with automake 1.11.1.
* aclocal.m4: Ditto.
ld/
2010-05-07 Tristan Gingold <gingold@adacore.com>
* Makefile.in: Regenerate with automake 1.11.1.
* aclocal.m4: Ditto.
opcodes/
2010-05-07 Tristan Gingold <gingold@adacore.com>
* Makefile.in: Regenerate with automake 1.11.1.
* aclocal.m4: Ditto.
2010-05-07 12:28:50 +00:00
75375b3e00
* ld/testsuite/ld-arm/attr-merge-2.attr: Update for changes in attribute output.
...
* ld/testsuite/ld-arm/attr-merge-3.attr: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-1.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-1r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-2.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-2r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-3.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-3r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-4.d: Likeiwse.
* ld/testsuite/ld-arm/attr-merge-vfp-4r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-5.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-5r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-00-nowarn.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-00.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-02-nowarn.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-02.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-04-nowarn.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-04.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-20-nowarn.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-20.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-22-nowarn.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-22.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-24-nowarn.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-40-nowarn.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-40.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-42-nowarn.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-44-nowarn.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-44.d: Likewise.
* ld/testsuite/ld-arm/attr-merge.attr: Likewise.
* binutils/readelf.c (arm_attr_tag_FP_arch): Rename from arm_attr_tag_VFP_arch.
(arm_attr_tag_ABI_align8_needed): Remove.
(arm_attr_tag_ABI_align8_preserved): Remove.
(arm_attr_tag_ABI_HardFP_use): Update text strings.
(arm_attr_public_tags): Add strings for ABI v2.08 attribute tags.
(display_arm_attribute): Add decoding of ABI v2.08 attributes.
* include/elf/arm.h (Tag_FP_arch, Tag_ABI_align_needed, Tag_ABI_align_preserved,
Tag_FP_HP_extension): Add new ABI attribute tags.
* gas/config/tc-arm.c (arm_convert_symbolic_attribute): Add support for
new tag names in v2.08 of ARM ABI.
* gas/doc/c-arm.texi: Document new tag names in ABI.
* gas/testsuite/gas/arm/attr-mcpu.d: Update for new attribute tag names.
* gas/testsuite/gas/arm/attr-mfpu-arm1020e.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-arm1020t.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-arm1136jf-s.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-arm1136jfs.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-neon-fp16.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-neon.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-softvfp+vfp.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfp.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfp10-r0.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfp10.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfp3.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfp9.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfpv2.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfpv3-d16.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfpv3.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfpv4-d16.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfpv4.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfpxd.d: Likewise.
* gas/testsuite/gas/arm/attr-names.d: Add test to make sure all attribute names
are recognised.
* gas/testsuite/gas/arm/attr-names.s: Likewise.
2010-04-15 10:56:39 +00:00
e760a81b79
2010-04-07 Eric B. Weddington <eric.weddington@atmel.com>
...
* config/tc-avr.c (mcu_types): Add support for atmega16a, atmega168a,
atmega164a, atmega165a, atmega169a, atmega169pa, atmega16hva2,
atmega324a, atmega324pa, atmega325a, atmega3250a, atmega328,
atmega329a, atmega329pa, atmega3290a, atmega48a, atmega644a,
atmega645a, atmega645p, atmega6450a, atmega6450p, atmega649a,
atmega649p, atmega6490a, atmega6490p, atmega64hve, atmega88a,
atmega88pa, attiny461a, attiny84a, m3000.
Remove support for atmega8m1, atmega8c1, atmega16c1, atmega4hvd,
atmega8hvd, attiny327, m3000f, m3000s, m3001b.
* doc/c-avr.texi: Same.
2010-04-09 03:48:54 +00:00
40b365969f
bfd:
...
* Makefile.am (ALL_MACHINES): Add cpu-tic6x.lo.
(ALL_MACHINES_CFILES): Add cpu-tic6x.c.
(BFD32_BACKENDS): Add elf32-tic6x.lo.
(BFD32_BACKENDS_CFILES): Add elf32-tic6x.c.
* Makefile.in: Regenerate.
* archures.c (bfd_arch_tic6x, bfd_tic6x_arch): New.
(bfd_archures_list): Update.
* config.bfd (tic6x-*-elf): New.
* configure.in (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec):
New.
* configure: Regenerate.
* cpu-tic6x.c, elf32-tic6x.c: New.
* reloc.c (BFD_RELOC_C6000_PCR_S21, BFD_RELOC_C6000_PCR_S12,
BFD_RELOC_C6000_PCR_S10, BFD_RELOC_C6000_PCR_S7,
BFD_RELOC_C6000_ABS_S16, BFD_RELOC_C6000_ABS_L16,
BFD_RELOC_C6000_ABS_H16, BFD_RELOC_C6000_SBR_U15_B,
BFD_RELOC_C6000_SBR_U15_H, BFD_RELOC_C6000_SBR_U15_W,
BFD_RELOC_C6000_SBR_S16, BFD_RELOC_C6000_SBR_L16_B,
BFD_RELOC_C6000_SBR_L16_H, BFD_RELOC_C6000_SBR_L16_W,
BFD_RELOC_C6000_SBR_H16_B, BFD_RELOC_C6000_SBR_H16_H,
BFD_RELOC_C6000_SBR_H16_W, BFD_RELOC_C6000_SBR_GOT_U15_W,
BFD_RELOC_C6000_SBR_GOT_L16_W, BFD_RELOC_C6000_SBR_GOT_H16_W,
BFD_RELOC_C6000_DSBT_INDEX, BFD_RELOC_C6000_PREL31,
BFD_RELOC_C6000_COPY, BFD_RELOC_C6000_ALIGN,
BFD_RELOC_C6000_FPHEAD, BFD_RELOC_C6000_NOCMP): New.
* targets.c (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec): New.
(_bfd_target_vector): Update.
* bfd-in2.h, libbfd.h: Regenerate.
binutils:
* MAINTAINERS: Add self as TI C6X maintainer.
* NEWS: Add news entry for TI C6X support.
* readelf.c: Include elf/tic6x.h.
(guess_is_rela): Handle EM_TI_C6000.
(dump_relocations): Likewise.
(get_tic6x_dynamic_type): New.
(get_dynamic_type): Call it.
(get_machine_flags): Handle EF_C6000_REL.
(get_osabi_name): Handle machine-specific values only for relevant
machines. Handle C6X values.
(get_tic6x_segment_type): New.
(get_segment_type): Call it.
(get_tic6x_section_type_name): New.
(get_section_type_name): Call it.
(is_32bit_abs_reloc, is_16bit_abs_reloc, is_none_reloc): Handle
EM_TI_C6000.
gas:
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-tic6x.c.
(TARGET_CPU_HFILES): Add config/tc-tic6x.h.
* Makefile.in: Regenerate.
* NEWS: Add news entry for TI C6X support.
* app.c (do_scrub_chars): Handle "||^" for TI C6X. Handle
TC_PREDICATE_START_CHAR and TC_PREDICATE_END_CHAR. Keep spaces in
operands if TC_KEEP_OPERAND_SPACES.
* configure.tgt (tic6x-*-*): New.
* config/tc-ia64.h (TC_PREDICATE_START_CHAR,
TC_PREDICATE_END_CHAR): Define.
* config/tc-tic6x.c, config/tc-tic6x.h: New.
* doc/Makefile.am (CPU_DOCS): Add c-tic6x.texi.
* doc/Makefile.in: Regenerate.
* doc/all.texi (TIC6X): Define.
* doc/as.texinfo: Add TI C6X documentation. Include c-tic6x.texi.
* doc/c-tic6x.texi: New.
gas/testsuite:
* gas/tic6x: New directory and testcases.
include:
* dis-asm.h (print_insn_tic6x): Declare.
include/elf:
* common.h (ELFOSABI_C6000_ELFABI, ELFOSABI_C6000_LINUX): Define.
* tic6x.h: New.
include/opcode:
* tic6x-control-registers.h, tic6x-insn-formats.h,
tic6x-opcode-table.h, tic6x.h: New.
ld:
* Makefile.am (ALL_EMULATIONS): Add eelf32_tic6x_be.o and
eelf32_tic6x_le.o.
(eelf32_tic6x_be.c, eelf32_tic6x_le.c): New.
* NEWS: Add news entry for TI C6X support.
* configure.tgt (tic6x-*-*): New.
* emulparams/elf32_tic6x_be.sh, emulparams/elf32_tic6x_le.sh: New.
ld/testsuite:
* ld-elf/flags1.d, ld-elf/merge.d: XFAIL for tic6x-*-*.
* ld-elf/sec-to-seg.exp: Set B_test_same_seg to 0 for tic6x-*-*.
* ld-tic6x: New directory and testcases.
opcodes:
* Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
* Makefile.in: Regenerate.
* configure.in (bfd_tic6x_arch): New.
* configure: Regenerate.
* disassemble.c (ARCH_tic6x): Define if ARCH_all.
(disassembler): Handle TI C6X.
* tic6x-dis.c: New.
2010-03-25 21:12:36 +00:00
a5b82cbeaf
* doc/c-arm.texi (.setfp): Correct example.
2010-03-18 15:34:47 +00:00
b43420e6cd
bfd/
...
2010-03-15 Wei Guozhi <carrot@google.com>
PR gas/11323
* bfd-in2.h (enum bfd_reloc_code_real): New BFD_RELOC_GOT_PREL type.
* elf32-arm.c (elf32_arm_reloc_map): BFD_RELOC_GOT_PREL to
R_ARM_GOT_PREL map.
* libbfd.h (bfd_reloc_code_real_names): BFD_RELOC_GOT_PREL name.
* reloc.c (comments): Document the new relocation.
gas/
2010-03-15 Wei Guozhi <carrot@google.com>
PR gas/11323
* config/tc-arm.c (reloc_names): New relocation names.
(md_apply_fix): New case for BFD_RELOC_ARM_GOT_PREL.
(tc_gen_reloc): New case for BFD_RELOC_ARM_GOT_PREL.
* doc/c-arm.texi (ARM-Relocations): Document the new relocation.
gas/testsuite
2010-03-15 Wei Guozhi <carrot@google.com>
PR gas/11323
* gas/arm/got_prel.s: New test case.
* gas/arm/got_prel.d: Likewise.
2010-03-18 11:22:46 +00:00
a23c851aa4
add support for Blackfin bf504/bf506
2010-03-10 13:03:29 +00:00
9982501a0d
* doc/as.texinfo: Add Blackfin options.
...
* doc/c-bfin.texi: Document -mfdpic, -mno-fdpic and -mnopic.
* config/tc-bfin.c (md_show_usage): Show usage for all
Blackfin specific options.
2010-03-10 03:57:00 +00:00
c67a084a24
* config/tc-mips.c (mips_fix_loongson2f, mips_fix_loongson2f_nop,
...
mips_fix_loongson2f_jump): New variables.
(md_longopts): Add New options -mfix-loongson2f-nop/jump,
-mno-fix-loongson2f-nop/jump.
(md_parse_option): Initialize variables via above options.
(options): New enums for the above options.
(md_begin): Initialize nop_insn from LOONGSON2F_NOP_INSN.
(fix_loongson2f, fix_loongson2f_nop, fix_loongson2f_jump):
New functions.
(append_insn): call fix_loongson2f().
(mips_handle_align): Replace the implicit nops.
* config/tc-mips.h (MAX_MEM_FOR_RS_ALIGN_CODE): Modified
for the new mips_handle_align().
* doc/c-mips.texi: Document the new options.
* gas/mips/loongson-2f-2.s: New test of -mfix-loongson2f-nop.
* gas/mips/loongson-2f-2.d: Likewise.
* gas/mips/loongson-2f-3.s: New test of -mfix-loongson2f-jump.
* gas/mips/loongson-2f-3.d: Likewise.
* gas/mips/mips.exp: Run the new tests.
* opcode/mips.h (LOONGSON2F_NOP_INSN): New macro.
2010-02-25 11:15:48 +00:00
cd21e5460f
* bfd/elf32-arm.c (elf32_arm_merge_eabi_attributes): Add support for
...
merging Tag_DIV_use, Tag_MPextension_use, and
Tag_MPextension_use_legacy tags.
* binutils/readelf.c (arm_attr_tag_Advanced_SIMD_arch): Add
description of newly permitted attribute values.
(arm_attr_tag_Virtualization_use): Likewise.
(arm_attr_tag_DIV_use): Add description of new attribute.
(arm_attr_tag_MPextension_use_legacy): Likewise.
* gas/config/tc-arm.c (arm_convert_symbolic_attribute):
Add Tag_DIV_use.
* gas/doc/c-arm.texi: Likewise.
* gas/testsuite/gas/arm/attr-order.d: Fix test for new names for
attribute values.
* include/elf/arm.h (Tag_MPextension_use): Renumber.
(Tag_DIV_use): Add.
(Tag_MPextension_use_legacy): Likewise.
* ld/testsuite/ld-arm/attr-merge-3.attr: Fix test for new attribute
values.
* ld/testsuite/ld-arm/attr-merge-3b.s: Likewise.
* ld/testsuite/ld-arm/attr-merge-unknown-1.d: Fix test now that 42
is a recognised attribute ID.
* ld/testsuite/ld-arm/attr-merge-unknown-1.s: Likewise.
* ld/testsuite/ld-arm/attr-merge-6.attr: New test.
* ld/testsuite/ld-arm/attr-merge-6a.s: Likewise.
* ld/testsuite/ld-arm/attr-merge-6b.s: Likewise.
* ld/testsuite/ld-arm/attr-merge-7.attr: Likewise.
* ld/testsuite/ld-arm/attr-merge-7a.s: Likewise.
* ld/testsuite/ld-arm/attr-merge-7b.s: Likewise.
* ld/testsuite/ld-arm/arm-elf.exp: Run the new tests.
2010-02-18 10:56:28 +00:00
9d0e849713
gas/
...
2010-02-12 Tristan Gingold <gingold@adacore.com>
Douglas B Rupp <rupp@gnat.com>
* config/tc-ia64.c (enum reloc_func): Add FUNC_SLOTCOUNT_RELOC.
(DUMMY_RELOC_IA64_SLOTCOUNT): Added.
(pseudo_func): Add an entry for slotcount.
(md_begin): Initialize slotcount pseudo symbol.
(ia64_parse_name): Handle @slotcount parameter.
(ia64_gen_real_reloc_type): Handle slotcount.
(md_apply_fix): Ditto.
* doc/c-ia64.texi (IA-64-Relocs): Document @slotcount.
gas/testsuite/
2010-02-12 Tristan Gingold <gingold@adacore.com>
* gas/ia64/slotcount.s, gas/ia64/slotcount.s: New test.
* gas/ia64/ia64.exp: Add slotcount test (vms only).
2010-02-12 14:34:45 +00:00
ce3d2015b2
include/
...
* opcode/ppc.h (PPC_OPCODE_TITAN): Define.
bfd/
* archures.c (bfd_mach_ppc_titan): Define.
* bfd-in2.h: Regenerate.
* cpu-powerpc.c (bfd_powerpc_archs): Add titan entry.
opcodes/
* ppc-dis.c (ppc_opts): Add titan entry.
* ppc-opc.c (TITAN, MULHW): Define.
(powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
gas/
* config/tc-ppc.c (md_show_usage): Mention -mtitan. Don't use tabs.
(ppc_mach): Handle titan.
* doc/c-ppc.texi: Mention -mtitan.
gas/testsuite/
* gas/ppc/titan.d, * gas/ppc/titan.s: New test.
* gas/ppc/ppc.exp: Run it.
2010-02-08 01:59:38 +00:00
68339fdf88
2010-02-03 Quentin Neill <quentin.neill@amd.com>
...
gas/
* config/tc-i386.c (cpu_arch): Change amdfam15 to bdver1.
(i386_align_code): Rename PROCESSOR_AMDFAM15 to PROCESSOR_BDVER1.
* config/tc-i386.h (processor_type): Same.
* doc/c-i386.texi: Change amdfam15 to bdver1.
opcodes/
* i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
to CPU_BDVER1_FLAGS
* i386-init.h: Regenerated.
testsuite/
* gas/i386/i386.exp: Rename amdfam15 test cases to bdver1.
* gas/i386/x86-64-nops-1-amdfam15.d: Renamed test case to
gas/i386/x86-64-nops-1-bdver1.d.
* gas/i386/nops-1-amdfam15.d: Renamed test case to
gas/i386/nops-1-bdver1.d.
2010-02-03 20:36:14 +00:00
31907d5e90
gas/ChangeLog:
...
* NEWS: Mention new feature.
* config/obj-coff.c (obj_coff_section): Accept digits and use
to override default section alignment power if specified.
* doc/as.texinfo (.section directive): Update documentation.
gas/testsuite/ChangeLog:
* gas/pe/section-align-1.s: New test source file.
* gas/pe/section-align-1.d: Likewise control script.
* gas/pe/section-align-2.s: Likewise ...
* gas/pe/section-align-2.d: ... and likewise.
* gas/pe/pe.exp: Invoke new testcases.
2010-01-27 22:01:38 +00:00
539f890d01
Allow VL=1 on AVX scalar instructions.
...
gas/
2010-01-27 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (avxscalar): New.
(OPTION_MAVXSCALAR): Likewise.
(build_vex_prefix): Select vector_length for scalar instructions
based on avxscalar.
(md_longopts): Add OPTION_MAVXSCALAR.
(md_parse_option): Handle OPTION_MAVXSCALAR.
(md_show_usage): Add -mavxscalar=.
* doc/c-i386.texi: Document -mavxscalar=.
gas/testsuite/
2010-01-27 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/avx-scalar-intel.d: New.
* gas/i386/avx-scalar.d: Likewise.
* gas/i386/avx-scalar.s: Likewise.
* gas/i386/x86-64-avx-scalar-intel.d: Likewise.
* gas/i386/x86-64-avx-scalar.d: Likewise.
* gas/i386/x86-64-avx-scalar.s: Likewise.
* gas/i386/i386.exp: Run avx-scalar, avx-scalar-intel,
x86-64-avx-scalar and x86-64-avx-scalar-intel.
opcodes/
2010-01-27 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (XMScalar): New.
(EXdScalar): Likewise.
(EXqScalar): Likewise.
(EXqScalarS): Likewise.
(VexScalar): Likewise.
(EXdVexScalarS): Likewise.
(EXqVexScalarS): Likewise.
(XMVexScalar): Likewise.
(scalar_mode): Likewise.
(d_scalar_mode): Likewise.
(d_scalar_swap_mode): Likewise.
(q_scalar_mode): Likewise.
(q_scalar_swap_mode): Likewise.
(vex_scalar_mode): Likewise.
(vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
(vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
VEX_W_7E_P_1, VEX_W_D6_P_2 VEX_W_C2_P_1, VEX_W_C2_P_3,
VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
(intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
q_scalar_mode, q_scalar_swap_mode.
(OP_XMM): Handle scalar_mode.
(OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
and q_scalar_swap_mode.
(OP_VEX): Handle vex_scalar_mode.
2010-01-27 14:34:40 +00:00
3725885a65
Sync Libtool from GCC.
...
/:
* libtool.m4: Sync from git Libtool.
* ltmain.sh: Likewise.
* ltoptions.m4: Likewise.
* ltversion.m4: Likewise.
* lt~obsolete.m4: Likewise.
sim/iq2000/:
* configure: Regenerate.
sim/d10v/:
* configure: Regenerate.
sim/m32r/:
* configure: Regenerate.
sim/frv/:
* configure: Regenerate.
sim/:
* avr/configure: Regenerate.
* cris/configure: Regenerate.
* microblaze/configure: Regenerate.
sim/h8300/:
* configure: Regenerate.
sim/mn10300/:
* configure: Regenerate.
sim/erc32/:
* configure: Regenerate.
sim/arm/:
* configure: Regenerate.
sim/m68hc11/:
* configure: Regenerate.
sim/lm32/:
* configure: Regenerate.
sim/sh64/:
* configure: Regenerate.
sim/v850/:
* configure: Regenerate.
sim/cr16/:
* configure: Regenerate.
sim/moxie/:
* configure: Regenerate.
sim/m32c/:
* configure: Regenerate.
sim/mips/:
* configure: Regenerate.
sim/mcore/:
* configure: Regenerate.
sim/sh/:
* configure: Regenerate.
gprof/:
* Makefile.in: Regenerate.
* configure: Regenerate.
opcodes/:
* Makefile.in: Regenerate.
* configure: Regenerate.
gas/:
* Makefile.in: Regenerate.
* configure: Regenerate.
* doc/Makefile.in: Regenerate.
ld/:
* configure: Regenerate.
gdb/testsuite/:
* gdb.cell/configure: Regenerate.
binutils/:
* Makefile.in: Regenerate.
* configure: Regenerate.
* doc/Makefile.in: Regenerate.
bfd/:
* Makefile.in: Regenerate.
* configure: Regenerate.
bfd/doc/:
* Makefile.in: Regenerate.
2010-01-09 21:11:44 +00:00
69dd98654a
2010-01-06 Quentin Neill <quentin.neill@amd.com>
...
gas/
* config/tc-i386.c (cpu_arch): Add amdfam15.
(i386_align_code): Add PROCESSOR_AMDFAM15 cases.
* config/tc-i386.h (processor_type): Add PROCESSOR_AMDFAM15.
* doc/c-i386.texi: Add amdfam15.
opcodes/
* i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
* i386-init.h: Regenerated.
testsuite/
* gas/i386/i386.exp: Add new amdfam15 test cases.
* gas/i386/nops-1-amdfam15.d: New.
2010-01-06 22:52:47 +00:00
99f1a7a78a
2009-12-28 Daniel Gutson <dgutson@codesourcery.com>
...
* doc/c-arm.texi: Document NEON alignment specifiers.
2009-12-28 18:27:42 +00:00
91d6fa6a03
Add -Wshadow to the gcc command line options used when compiling the binutils.
...
Fix up all warnings generated by the addition of this switch.
2009-12-11 13:42:17 +00:00
f0ae4a24b0
2009-11-18 Sebastian Pop <sebastian.pop@amd.com>
...
gas/
* config/tc-i386.c (cpu_arch): Remove cvt16.
(md_show_usage): Same.
* doc/c-i386.texi: Same.
gas/testsuite/
* gas/i386/cvt16.d: Removed.
* gas/i386/cvt16.s: Removed.
* gas/i386/x86-64-cvt16.d: Removed.
* gas/i386/x86-64-cvt16.s: Removed.
* gas/i386/i386.exp: Remove cvt16 and x86-64-cvt16 tests.
opcodes/
* i386-dis.c (VEX_LEN_XOP_08_A0): Removed.
(VEX_LEN_XOP_08_A1): Removed.
(xop_table): Remove entries for VEX_LEN_XOP_08_A0 and
VEX_LEN_XOP_08_A1.
(vex_len_table): Same.
* i386-gen.c (CPU_CVT16_FLAGS): Removed.
(cpu_flags): Remove field for CpuCVT16.
* i386-opc.h (CpuCVT16): Removed.
(i386_cpu_flags): Remove bitfield cpucvt16.
(i386-opc.tbl): Remove CVT16 instructions.
* i386-init.h: Regenerated.
* i386-tbl.h: Regenerated.
2009-11-18 20:28:59 +00:00
5dd85c9970
2009-11-17 Sebastian Pop <sebastian.pop@amd.com>
...
Quentin Neill <quentin.neill@amd.com>
gas/
* config/tc-i386.c (cpu_arch): Added .xop and .cvt16.
(build_vex_prefix): Handle xop08.
(md_assemble): Don't special case the constant 3 for insns using MODRM.
(build_modrm_byte): Handle vex2sources.
(md_show_usage): Add xop and cvt16.
* doc/c-i386.texi: Document fma4, xop, and cvt16.
gas/testsuite/
* gas/i386/i386.exp: Run xop and cvt16 in 32-bit mode.
Run x86-64-xop and x86-64-cvt16 in 64-bit mode.
* gas/i386/lwp.d: Update name of the testcase.
* gas/i386/x86-64-xop.d: New.
* gas/i386/x86-64-xop.s: New.
* gas/i386/xop.d: New.
* gas/i386/xop.s: New.
* gas/i386/cvt16.d: New.
* gas/i386/cvt16.s: New.
opcodes/
* i386-dis.c (OP_Vex_2src_1): New.
(OP_Vex_2src_2): New.
(Vex_2src_1): New.
(Vex_2src_2): New.
(XOP_08): Added.
(VEX_LEN_XOP_08_A0): Added.
(VEX_LEN_XOP_08_A1): Added.
(VEX_LEN_XOP_09_80): Added.
(VEX_LEN_XOP_09_81): Added.
(xop_table): Added an entry for XOP_08. Handle xop instructions.
(vex_len_table): Added entries for VEX_LEN_XOP_08_A0,
VEX_LEN_XOP_08_A1, VEX_LEN_XOP_09_80, VEX_LEN_XOP_09_81.
(get_valid_dis386): Handle XOP_08.
(OP_Vex_2src): New.
* i386-gen.c (cpu_flag_init): Add CPU_XOP_FLAGS and CPU_CVT16_FLAGS.
(cpu_flags): Add CpuXOP and CpuCVT16.
(opcode_modifiers): Add XOP08, Vex2Sources.
* i386-opc.h (CpuXOP): Added.
(CpuCVT16): Added.
(i386_cpu_flags): Add cpuxop and cpucvt16.
(XOP08): Added.
(Vex2Sources): Added.
(i386_opcode_modifier): Add xop08, vex2sources.
* i386-opc.tbl: Add entries for XOP and CVT16 instructions.
* i386-init.h: Regenerated.
* i386-tbl.h: Regenerated.
2009-11-18 04:04:17 +00:00
9e3c6df664
2009-11-17 Paul Brook <paul@codesourcery.com>
...
Daniel Jacobowitz <dan@codesourcery.com>
gas/
* doc/c-arm.texi: Document .arch armv7e-m.
* config/tc-arm.c (arm_ext_v6_dsp, arm_ext_v7m): New.
(insns): Put Thumb versions of v5TExP instructions into
arm_ext_v5exp also. Move some Thumb variants from
arm_ext_v6_notm to arm_ext_v6_dsp.
(arm_archs): Add armv7e-m architecture.
(aeabi_set_public_attributes): Handle -march=armv7e-m.
gas/testsuite/
* gas/arm/attr-march-armv7em.d: New test.
* gas/arm/arch7em-bad.d: New test.
* gas/arm/arch7em-bad.l: New test.
* gas/arm/arch7em.d: New test.
* gas/arm/arch7em.s: New test.
include/elf/
* arm.h (TAG_CPU_ARCH_V7E_M): Define.
include/opcode/
* arm.h (ARM_EXT_V6_DSP): Define.
(ARM_AEXT_V6T2, ARM_AEXT_NOTM): Include ARM_EXT_V6_DSP.
(ARM_AEXT_V7EM, ARM_ARCH_V7EM): Define.
binutils/
* readelf.c (arm_attr_tag_CPU_arch): Add v7E-M.
bfd/
* elf32-arm.c (using_thumb_only, arch_has_arm_nop,
arch_has_thumb2_nop): Handle TAG_CPU_ARCH_V7E_M.
(tag_cpu_arch_combine): Ditto. Correct MAX_TAG_CPU_ARCH test.
2009-11-17 16:31:56 +00:00
df6d8da17b
2009-11-06 H.J. Lu <hongjiu.lu@intel.com>
...
* doc/c-i386.texi: Move .lwp.
2009-11-06 22:59:44 +00:00
f88c9eb030
2009-11-05 Sebastian Pop <sebastian.pop@amd.com>
...
Quentin Neill <quentin.neill@amd.com>
* gas/config/tc-i386.c (cpu_arch): Add CPU_LWP_FLAGS.
(build_vex_prefix): Handle xop09 and xop0a.
(build_modrm_byte): Handle vexlwp.
(md_show_usage): Add lwp.
* gas/doc/c-i386.texi (i386-LWP): New section.
* gas/testsuite/gas/i386/i386.exp: Run x86-64-lwp in 64-bit mode,
run lwp in 32-bit mode.
* gas/testsuite/gas/i386/x86-64-lwp.d: New.
* gas/testsuite/gas/i386/x86-64-lwp.s: New.
* gas/testsuite/gas/i386/lwp.d: New.
* gas/testsuite/gas/i386/lwp.s: New.
* opcodes/i386-dis.c (OP_LWPCB_E): New.
(OP_LWP_E): New.
(OP_LWP_I): New.
(USE_XOP_8F_TABLE): New.
(XOP_8F_TABLE): New.
(REG_XOP_LWPCB): New.
(REG_XOP_LWP): New.
(XOP_09): New.
(XOP_0A): New.
(reg_table): Redirect REG_8F to XOP_8F_TABLE.
Add entries for REG_XOP_LWPCB and REG_XOP_LWP.
(xop_table): New.
(get_valid_dis386): Handle USE_XOP_8F_TABLE.
Use the offsets VEX_0F, VEX_0F38, and VEX_0F3A instead of their values
to access to the vex_table.
(OP_LWPCB_E): New.
(OP_LWP_E): New.
(OP_LWP_I): New.
* opcodes/i386-gen.c (cpu_flag_init): Add CPU_LWP_FLAGS, CpuLWP.
(cpu_flags): Add CpuLWP.
(opcode_modifiers): Add VexLWP, XOP09, and XOP0A.
* opcodes/i386-opc.h (CpuLWP): New.
(i386_cpu_flags): Add bit cpulwp.
(VexLWP): New.
(XOP09): New.
(XOP0A): New.
(i386_opcode_modifier): Add vexlwp, xop09, and xop0a.
* opcodes/i386-opc.tbl (llwpcb): Added.
(lwpval): Added.
(lwpins): Added.
2009-11-05 23:40:05 +00:00
62f3b8c867
2009-11-02 Paul Brook <paul@codesourcery.com>
...
ld/testsuite/
* ld-arm/arm-elf.exp: Add new attr-merge-vfp tests.
* ld-arm/attr-merge-vfp-1.d: New test.
* ld-arm/attr-merge-vfp-1r.d: New test.
* ld-arm/attr-merge-vfp-2.d: New test.
* ld-arm/attr-merge-vfp-2r.d: New test.
* ld-arm/attr-merge-vfp-3.d: New test.
* ld-arm/attr-merge-vfp-3r.d: New test.
* ld-arm/attr-merge-vfp-4.d: New test.
* ld-arm/attr-merge-vfp-4r.d: New test.
* ld-arm/attr-merge-vfp-5.d: New test.
* ld-arm/attr-merge-vfp-5r.d: New test.
* ld-arm/attr-merge-vfp-2.s: New test.
* ld-arm/attr-merge-vfp-3.s: New test.
* ld-arm/attr-merge-vfp-3-d16.s: New test.
* ld-arm/attr-merge-vfp-4.s: New test.
* ld-arm/attr-merge-vfp-4-d16.s: New test.
gas/
* doc/c-arm.texi: Document new -mfpu options.
* config/tc-arm.c (fpu_vfp_ext_v3xd, fpu_vfp_fp16, fpu_neon_ext_fma,
fpu_vfp_ext_fma): New.
(NEON_ENC_TAB): Add vfma, vfms, vfnma and vfnms.
(do_vfp_nsyn_fma_fms, do_neon_fmac): New functions.
(insns): Move double precision load/store. Split out double
precision VFPv3 instrucitons. Add VFPv4 instructions.
(arm_fpus): Add VFPv3-FP16, VFPv3xD and VFPv4 variants.
(aeabi_set_public_attributes): Set VFPv4 variants
gas/testsuite/
* gas/arm/attr-mfpu-vfpv4.d: New test.
* gas/arm/attr-mfpu-vfpv4-d16.d: New test.
* gas/arm/neon-fma-cov.d: New test.
* gas/arm/neon-fma-cov.s: New test.
* gas/arm/vfp-fma-inc.s: New test.
* gas/arm/vfp-fma-arm.d: New test.
* gas/arm/vfp-fma-arm.s: New test.
* gas/arm/vfp-fma-thumb.d: New test.
* gas/arm/vfp-fma-thumb.s: New test.
* gas/arm/vfma1.d: New test.
* gas/arm/vfma1.s: New test.
* gas/arm/vfpv3xd.d: New test.
* gas/arm/vfpv3xd.s: New test.
include/opcode/
* arm.h (FPU_VFP_EXT_V3xD, FPU_VFP_EXT_FP16, FPU_NEON_EXT_FMA,
FPU_VFP_EXT_FMA, FPU_VFP_V3xD, FPU_VFP_V4D16, FPU_VFP_V4): Define.
(FPU_ARCH_VFP_V3D16_FP16, FPU_ARCH_VFP_V3_FP16, FPU_ARCH_VFP_V3xD,
FPU_ARCH_VFP_V3xD_FP16, FPU_ARCH_VFP_V4, FPU_ARCH_VFP_V4D16,
FPU_ARCH_NEON_VFP_V4): Define.
binutils/
* readelf.c (arm_attr_tag_VFP_arch): Add VFPv4 and VFPv4-D16.
bfd/
* elf32-arm.c (elf32_arm_merge_eabi_attributes): Handle VFPv4
attributes.
opcodes/
* arm-dis.c (coprocessor_opcodes): Update to use new feature flags.
Add VFPv4 instructions.
2009-11-02 13:44:05 +00:00
b38f9f31ea
2009-10-29 Paul Brook <paul@codesourcery.com>
...
gas/
* doc/c-arm.texi: Document ARM -mcpu=cortex-a5.
* config/arm/tc-arm.c (arm_cpu_option_table): Add cortex-a5.
2009-10-29 15:37:53 +00:00
72737fba23
* doc/as.texinfo (Set): Delete incorrect HPPA para.
2009-10-29 00:19:19 +00:00
046d31c2be
* doc/as.texinfo: Add mention of RX port and inclusion of RX
...
documentation.
2009-10-26 10:10:37 +00:00
2babba4317
* doc/as.texinfo (Overview): Move -mfix7000/-mno-fix7000 to
...
match the order elsewhere. Add -mfix-vr4120/-mno-fix-vr4120 and
-mfix-vr4130/-mno-fix-vr4130.
* doc/c-mips.texi (MIPS Opts): Correct -no-mfix-vr4120 to
-mno-fix-vr4120 and -no-mfix-vr4130 to -mno-fix-vr4130.
2009-10-25 02:11:13 +00:00
4b06377fcc
gas/
...
2009-10-20 H.J. Lu <hongjiu.lu@intel.com>
PR gas/10775
* doc/c-i386.texi: Mention movabs.
gas/testsuite/
2009-10-20 H.J. Lu <hongjiu.lu@intel.com>
PR gas/10775
* gas/i386/immed64.d: Updated.
* gas/i386/l1om.d: Likewise.
* gas/i386/x86-64-disp-intel.d: Likewise.
* gas/i386/x86-64-disp.d: Likewise.
* gas/i386/x86_64.d: Likewise.
opcodes/
2009-10-20 H.J. Lu <hongjiu.lu@intel.com>
PR gas/10775
* i386-dis.c: Document LB, LS and LV macros.
(dis386): Use mov%LB, mov%LS and mov%LV on mov instruction
with the 64-bit displacement or immediate operand.
(putop): Handle LB, LS and LV macros.
2009-10-20 22:18:19 +00:00
adc427c786
2009-10-19 H.J. Lu <hongjiu.lu@intel.com>
...
* doc/c-i386.texi: Don't mention the 8 extra control registers
for x86-64.
2009-10-19 17:24:27 +00:00
995cef8c87
2009-10-16 H.J. Lu <hongjiu.lu@intel.com>
...
PR gas/10775
* doc/c-i386.texi: Mention the 8 extra control registers for
x86-64.
Mention .code64 directive.
2009-10-16 16:33:17 +00:00
5a5829dd43
* doc/c-arm.texi (ARM Options): Correctly name the two mapcs options.
2009-10-07 13:46:55 +00:00
9fe54b1ca1
gas/
...
* config/tc-ppc.c (md_show_usage): Document -m476.
* doc/c-ppc.texi (PowerPC-Opts): Document -m476.
gas/testsuite/
* gas/ppc/476.s: New test.
* gas/ppc/476.d: Likewise.
* gas/ppc/ppc.exp: Run the 476 test.
include/opcode/
* ppc.h (PPC_OPCODE_476): Define.
opcodes/
* ppc-dis.c (ppc_opts): Add "476" entry.
* ppc-opc.c (PPC476): Define.
(powerpc_opcodes): Update mnemonics where required for 476.
2009-10-02 14:42:42 +00:00
38462edfa2
* dw2gencfi.c: Include dwarf2dbg.h.
...
(DWARF2_FORMAT): Define if not defined.
(dot_cfi_sections): New function.
(cfi_pseudo_table): Handle .cfi_sections.
(CFI_EMIT_eh_frame, CFI_EMIT_debug_frame): Define.
(cfi_sections): New variable.
(output_cie, output_fde, select_cie_for_fde): Add eh_frame
argument, add supporting for outputting .debug_frame
section.
(cfi_change_reg_numbers): New function or macro.
(cfi_finish): Only emit .eh_frame if
cfi_sections & CFI_EMIT_eh_frame. Emit .debug_frame if
cfi_sections & CFI_EMIT_debug_frame.
* config/tc-ppc.h (md_reg_eh_frame_to_debug_frame): Define.
* doc/as.texinfo (CFI directives): Document .cfi_sections.
2009-10-02 11:33:50 +00:00
634b50f2a6
gas/
...
* config/tc-ppc.c (md_show_usage): Rename "ppca2" to "a2".
* doc/c-ppc.texi (PowerPC-Opts): Likewise.
gas/testsuite/
* gas/ppc/a2.d: Rename "ppca2" to "a2".
include/opcode/
* ppc.h (PPC_OPCODE_A2): Rename from PPC_OPCODE_PPCA2.
opcodes/
* ppc-opc.c (PPCA2): Use renamed mask PPC_OPCODE_A2.
* ppc-dis.c (ppc_opts): Likewise.
Rename "ppca2" to "a2".
2009-10-01 19:24:48 +00:00
c7927a3c0e
bfd
...
* Makefile.am (ALL_MACHINES): Add cpu-rx.lo.
(ALL_MACHINES_CFILES): Add cpu-rx.c.
(BFD32_BACKENDS): Add elf32-rx.lo.
(BFD32_BACKENDS_CFILES): Add elf32-rx.c.
* archures.c (bfd_architecture): Add bfd_arch_rx and bfd_mach_rx.
Export bfd_rx_arch.
(bfd_archures_list): Add bfd_rx_arch.
* config.bfd: Add entry for rx-*-elf.
* configure.in: Add entries for bfd_elf32_rx_le_vec and
bfd_elf32_rx_be_vec.
* reloc.c: Add RX relocations.
* targets.c: Add RX target vectors.
* Makefile.in: Regenerate.
* bfd-in2.h: Regenerate.
* configure: Regenerate.
* libbfd.h: Regenerate.
* cpu-rx.c: New file.
* elf32-rx.c: New file.
binutils
* readelf.c: Add support for RX target.
* MAINTAINERS: Add DJ and NickC as maintainers for RX.
gas
* Makefile.am: Add RX target.
* configure.in: Likewise.
* configure.tgt: Likewise.
* read.c (do_repeat_with_expander): New function.
* read.h: Provide a prototype for do_repeat_with_expander.
* doc/Makefile.am: Add RX target documentation.
* doc/all.texi: Likewise.
* doc/as.texinfo: Likewise.
* Makefile.in: Regenerate.
* NEWS: Mention support for RX architecture.
* configure: Regenerate.
* doc/Makefile.in: Regenerate.
* config/rx-defs.h: New file.
* config/rx-parse.y: New file.
* config/tc-rx.h: New file.
* config/tc-rx.c: New file.
* doc/c-rx.texi: New file.
gas/testsuite
* gas/rx: New directory.
* gas/rx/*: New set of test cases.
* gas/elf/section2.e-rx: New expected output file.
* gas/all/gas.exp: Add support for RX target.
* gas/elf/elf.exp: Likewise.
* gas/lns/lns.exp: Likewise.
* gas/macros/macros.exp: Likewise.
include
* dis-asm.h: Add prototype for print_insn_rx.
include/elf
* rx.h: New file.
include/opcode
* rx.h: New file.
ld
* Makefile.am: Add rules to build RX emulation.
* configure.tgt: Likewise.
* NEWS: Mention support for RX architecture.
* Makefile.in: Regenerate.
* emulparams/elf32rx.sh: New file.
* emultempl/rxelf.em: New file.
opcodes
* Makefile.am: Add RX files.
* configure.in: Add support for RX target.
* disassemble.c: Likewise.
* Makefile.in: Regenerate.
* configure: Regenerate.
* opc2c.c: New file.
* rx-decode.c: New file.
* rx-decode.opc: New file.
* rx-dis.c: New file.
2009-09-29 14:17:19 +00:00
605b1dd4b7
2009-09-25 Nick Hudson <nick.hudson@gmx.co.uk>
...
* doc/c-mips.texi: Fix the singlefloat and doublefloat kindex
entries.
2009-09-25 18:58:58 +00:00
e0d602ecff
gas/
...
* config/tc-ppc.c (md_show_usage): Document -mpcca2.
* doc/c-ppc.texi (PowerPC-Opts): Document -mppca2.
gas/testsuite/
* gas/ppc/a2.s: New.
* gas/ppc/a2.d: Likewise.
* gas/ppc/ppc.exp: Run the a2 dump test.
include/opcode/
* ppc.h (PPC_OPCODE_PPCA2): New.
opcodes/
* ppc-dis.c (ppc_opts): Add "ppca2" entry.
* ppc-opc.c (powerpc_opcodes): Add eratilx, eratsx, eratsx.,
eratre, wchkall, eratwe, ldawx., mdfcrx., mfdcr. mtdcrx., icswx,
icswx., mtdcr., dci, wclrone, wclrall, wclr, erativax, tlbsrx.,
ici mnemonics.
(ERAT_T): New operand.
(XWC_MASK): New mask.
(XOPL2): New macro.
(PPCA2): Define.
2009-09-21 10:29:07 +00:00
307c948d20
9-09-07 Daniel Gutson <dgutson@codesourcery.com>
...
* config/tc-arm.c (arm_cpus): cortex-r4f CPU added.
* doc/c-arm.texi: cortex-r4f CPU added.
2009-09-07 16:34:39 +00:00
f8739b83b9
gas/
...
* doc/as.texinfo: Document that Blackfin GAS does not
accept SYMBOL = VALUE.
ld/testsuite/
* ld-elf/sec64k.exp: Use ".set" instead of "=" for bfin-*-*.
2009-09-05 15:00:09 +00:00
3b4e18858e
* doc/all.texi: Replace BFIN with Blackfin.
...
* doc/as.texinfo: Likewise.
* doc/c-bfin.texi: Likewise.
* doc/asconfig.texi: Likewise.
* doc/c-bfin.texi: Update -mcpu= option with bf512, bf514,
bf516 and bf518.
2009-09-04 02:31:44 +00:00
aa820537ea
update copyright dates
2009-09-02 07:25:43 +00:00
af542c2e31
Cleanups after the update to Autoconf 2.64, Automake 1.11.
...
/:
* README-maintainer-mode: Point directly to upstream locations
for autoconf, automake, libtool, gettext, instead of copies on
sources.redhat.com. Document required versions.
* configure.ac: Do not substitute datarootdir, htmldir,
pdfdir, docdir. Do not process --with-datarootdir,
--with-htmldir, --with-pdfdir, --with-docdir.
* configure: Regenerate.
gdb/:
* CONTRIBUTE: Bump documented Autoconf version.
* configure.ac: Do not substitute datarootdir, htmldir,
pdfdir, docdir. Do not process --with-datarootdir,
--with-htmldir, --with-pdfdir, --with-docdir.
* configure: Regenerate.
gdb/doc/:
* gdbint.texinfo (Releasing GDB): Point to
README-maintainer-mode file for required autoconf version.
* configure.ac: Do not substitute datarootdir, htmldir,
pdfdir, docdir. Do not process --with-datarootdir,
--with-htmldir, --with-pdfdir, --with-docdir.
* configure: Regenerate.
gprof/:
* Makefile.am (pdf__strip_dir, install-pdf, install-pdf-am)
(install-pdf-recursive, html__strip_dir, install-html)
(install-html-am, install-html-recursive): Remove.
* Makefile.in: Regenerate.
opcodes/:
* Makefile.am (install-pdf, install-html): Remove.
* Makefile.in: Regenerate.
gas/:
* Makefile.am (install-pdf, install-pdf-recursive, install-html)
(install-html-recursive): Remove.
* Makefile.in: Regenerate.
* doc/Makefile.am (pdf__strip_dir, install-pdf, install-pdf-am)
(html__strip_dir, install-html, install-html-am): Remove.
* doc/Makefile.in: Regenerate.
ld/:
* Makefile.am (pdf__strip_dir, install-pdf, install-pdf-am)
(install-pdf-recursive, html__strip_dir, install-html)
(install-html-am, install-html-recursive): Remove.
* Makefile.in: Regenerate.
binutils/:
* Makefile.am (install-pdf, install-pdf-recursive, install-html)
(install-html-recursive): Remove.
* Makefile.in: Regenerate.
* doc/Makefile.am (pdf__strip_dir, install-pdf, install-pdf-am)
(html__strip_dir, install-html, install-html-am): Remove.
* doc/Makefile.in: Regenerate.
bfd/:
* Makefile.am (datarootdir, docdir, htmldor, pdfdir)
(install-pdf, install-pdf-recursive, install-html)
(install-html-recursive): Remove.
* Makefile.in: Regenerate.
bfd/doc/:
* Makefile.am (pdf__strip_dir, install-pdf, install-pdf-am)
(html__strip_dir, install-html, install-html-am): Remove.
* Makefile.in: Regenerate.
2009-08-22 17:08:11 +00:00
81ecdfbb4d
Regenerate tree using Autoconf 2.64 and Automake 1.11.
...
config/:
* override.m4 (_GCC_AUTOCONF_VERSION): Bump to 2.64.
/:
* configure: Regenerate.
etc/:
* configure: Regenerate.
sim/common/:
* config.in: Regenerate.
* configure: Likewise.
sim/iq2000/:
* config.in: Regenerate.
* configure: Likewise.
sim/d10v/:
* config.in: Regenerate.
* configure: Likewise.
sim/igen/:
* config.in: Regenerate.
* configure: Likewise.
sim/m32r/:
* config.in: Regenerate.
* configure: Likewise.
sim/frv/:
* config.in: Regenerate.
* configure: Likewise.
sim/:
* avr/config.in: Regenerate.
* avr/configure: Likewise.
* configure: Likewise.
* cris/config.in: Likewise.
* cris/configure: Likewise.
sim/h8300/:
* config.in: Regenerate.
* configure: Likewise.
sim/mn10300/:
* config.in: Regenerate.
* configure: Likewise.
sim/ppc/:
* config.in: Regenerate.
* configure: Likewise.
sim/erc32/:
* config.in: Regenerate.
* configure: Likewise.
sim/arm/:
* config.in: Regenerate.
* configure: Likewise.
sim/m68hc11/:
* config.in: Regenerate.
* configure: Likewise.
sim/lm32/:
* config.in: Regenerate.
* configure: Likewise.
sim/sh64/:
* config.in: Regenerate.
* configure: Likewise.
sim/v850/:
* config.in: Regenerate.
* configure: Likewise.
sim/cr16/:
* config.in: Regenerate.
* configure: Likewise.
sim/moxie/:
* config.in: Regenerate.
* configure: Likewise.
sim/m32c/:
* config.in: Regenerate.
* configure: Likewise.
sim/mips/:
* config.in: Regenerate.
* configure: Likewise.
sim/mcore/:
* config.in: Regenerate.
* configure: Likewise.
sim/testsuite/d10v-elf/:
* configure: Regenerate.
sim/testsuite/:
* configure: Regenerate.
sim/testsuite/frv-elf/:
* configure: Regenerate.
sim/testsuite/m32r-elf/:
* configure: Regenerate.
sim/testsuite/mips64el-elf/:
* configure: Regenerate.
sim/sh/:
* config.in: Regenerate.
* configure: Likewise.
gold/:
* Makefile.in: Regenerate.
* aclocal.m4: Likewise.
* config.in: Likewise.
* configure: Likewise.
* testsuite/Makefile.in: Likewise.
gprof/:
* Makefile.in: Regenerate.
* aclocal.m4: Likewise.
* configure: Likewise.
* gconfig.in: Likewise.
opcodes/:
* Makefile.in: Regenerate.
* aclocal.m4: Likewise.
* config.in: Likewise.
* configure: Likewise.
gas/:
* Makefile.in: Regenerate.
* aclocal.m4: Likewise.
* config.in: Likewise.
* configure: Likewise.
* doc/Makefile.in: Likewise.
ld/:
* Makefile.in: Regenerate.
* aclocal.m4: Likewise.
* config.in: Likewise.
* configure: Likewise.
gdb/:
* aclocal.m4: Regenerate.
* config.in: Likewise.
* configure: Likewise.
* gnulib/Makefile.in: Likewise.
gdb/doc/:
* configure: Regenerate.
gdb/gdbserver/:
* aclocal.m4: Regenerate.
* config.in: Likewise.
* configure: Likewise.
gdb/testsuite/:
* configure: Regenerate.
* gdb.hp/configure: Likewise.
* gdb.hp/gdb.aCC/configure: Likewise.
* gdb.hp/gdb.base-hp/configure: Likewise.
* gdb.hp/gdb.compat/configure: Likewise.
* gdb.hp/gdb.defects/configure: Likewise.
* gdb.hp/gdb.objdbg/configure: Likewise.
* gdb.stabs/configure: Likewise.
binutils/:
* Makefile.in: Regenerate.
* aclocal.m4: Likewise.
* config.in: Likewise.
* configure: Likewise.
* doc/Makefile.in: Likewise.
bfd/:
* Makefile.in: Regenerate.
* aclocal.m4: Likewise.
* config.in: Likewise.
* configure: Likewise.
bfd/doc/:
* Makefile.in: Regenerate.
readline/:
* configure: Regenerate.
readline/examples/rlfe/:
* configure: Regenerate.
2009-08-22 16:56:56 +00:00
f3d2b04b5f
2009-08-17 Kai Tietz <kai.tietz@onevision.com>
...
* config/obj-coff-seh.c: New file.
* config/obj-coff-seh.h: Likewise.
* config/obj-coff.c (obj-coff-seh.c): Add include.
(coff_pseudo_table): Add new .seh... commands.
* config/obj-coff.h (obj_coff_seh_do_final): Add new
function prototype.
(obj_coff_generate_pdata): New obj-coff hook.
* gas/write.c (size_seg): Avoid sizing of already sized
sections.
(write_object_file): Call conditional hook
objc_coff_generate_pdata.
* Makefile.am: Add dependencies for new files.
* Makefile.in: Regenerated.
2009-08-17 11:45:23 +00:00
6306cd859b
From Jie Zhang <jie.zhang@analog.com>
...
* config/tc-bfin.h (bfin_anomaly_checks): Declare.
(AC_05000074): Define.
(ENABLE_AC_05000074): Define.
* config/tc-bfin.c (enum bfin_cpu_type): New.
(bfin_cpu_t): Typedef.
(bfin_cpu_type): Define.
(bfin_si_revision): Define.
(bfin_anomaly_checks): Define.
(struct bfin_cpu): New.
(bfin_cpus[]): New. (struct bfin_cpu_isa): Define.
(bfin_isa): New global variable.
(OPTION_MCPU): Define.
(md_longopts[]): Add -mcpu option.
(md_parse_option): Deal with -mcpu option and initialize
bfin_anomaly_checks.
* doc/c-bfin.texi: Rename BFIN to Blackfin throughout. Document
-mcpu option.
* config/bfin-parse.y (gen_multi_instr_1): Check anomaly
05000074.
2009-08-11 18:44:12 +00:00
d31eb57c18
missed from last commit
2009-08-07 06:26:33 +00:00
7ba29e2a41
Add support for Xilinx MicroBlaze processor.
...
* bfd/Makefile.am: Add cpu-microblaze.{lo,c}, elf32-microblaze.{lo,c}.
* bfd/Makefile.in: Same.
* bfd/archures.c: Add bfd_arch_microblaze.
* bfd/bfd-in2.h: Regenerate.
* bfd/config.bfd: Add microblaze target.
* bfd/configure: Add bfd_elf32_microblaze_vec target.
* bfd/configure.in: Same.
* bfd/cpu-microblaze.c: New.
* bfd/elf32-microblaze.c: New.
* bfd/libbfd-in.h: Add prototype _bfd_dwarf2_fixup_section_debug_loc().
* bfd/libbfd.h: Regenerate.
* bfd/reloc.c: Add MICROBLAZE relocations.
* bfd/section.c: Add struct relax_table and relax_count to section.
* bfd/targets.c: Add bfd_elf32_microblaze_vec.
* binutils/MAINTAINERS: Add self as maintainer.
* binutils/readelf.c: Include elf/microblaze.h, add EM_MICROBLAZE &
EM_MICROBLAZE_OLD to guess_is_rela(), dump_relocations(),
get_machine_name().
* config.sub: Add microblaze target.
* configure: Same.
* configure.ac: Same.
* gas/Makefile.am: add microblaze to CPU_TYPES, config/tc-microblaze.c to
TARGET_CPU_CFILES, config/tc-microblaze.h to TARGET_CPU_HFILES, add
DEP_microblaze_elf target.
* gas/Makefile.in: Same.
* gas/config/tc-microblaze.c: Add MicroBlaze assembler.
* gas/config/tc-microblaze.h: Add header for tc-microblaze.c.
* gas/configure: Add microblaze target.
* gas/configure.in: Same.
* gas/configure.tgt: Same.
* gas/doc/Makefile.am: Add c-microblaze.texi to CPU_DOCS.
* gas/doc/Makefile.in: Same.
* gas/doc/all.texi: Set MICROBLAZE.
* gas/doc/as.texinfo: Add MicroBlaze doc links.
* gas/doc/c-microblaze.texi: New MicroBlaze docs.
* include/dis-asm.h: Decl print_insn_microblaze().
* include/elf/common.h: Define EM_MICROBLAZE & EM_MICROBLAZE_OLD.
* include/elf/microblaze.h: New reloc definitions.
* ld/Makefile.am: Add eelf32mb_linux.o, eelf32microblaze.o to
ALL_EMULATIONS, targets.
* ld/Makefile.in: Same.
* ld/configure.tgt: Add microblaze*-linux*, microblaze* targets.
* ld/emulparams/elf32mb_linux.sh: New.
* ld/emulparams/elf32microblaze.sh. New.
* ld/scripttempl/elfmicroblaze.sc: New.
* opcodes/Makefile.am: Add microblaze-opc.h to HFILES, microblaze-dis.c to
CFILES, microblaze-dis.lo to ALL_MACHINES, targets.
* opcodes/Makefile.in: Same.
* opcodes/configure: Add bfd_microblaze_arch target.
* opcodes/configure.in: Same.
* opcodes/disassemble.c: Define ARCH_microblaze, return
print_insn_microblaze().
* opcodes/microblaze-dis.c: New MicroBlaze disassembler.
* opcodes/microblaze-opc.h: New MicroBlaze opcode definitions.
* opcodes/microblaze-opcm.h: New MicroBlaze opcode types.
2009-08-06 17:38:04 +00:00
8453da2e57
/gas:
...
2009-08-05 Eric B. Weddington <eric.weddington@atmel.com>
* config/tc-avr.c (mcu_types): Add attiny2313a, attiny4313, attiny261a,
attiny861a, atmega644pa, attiny24a, attiny44a.
* doc/c-avr.texi: Likewise.
2009-08-05 12:47:33 +00:00
30f8113aa7
2009-08-04 Sandra Loosemore <sandra@codesourcery.com>
...
gas/
* doc/c-mips.texi (MIPS Opts): List 1004K options for -march.
* config/tc-mips.c (mips_cpu_info_table): Add 1004K cores.
2009-08-05 00:44:01 +00:00
249da68570
/gas:
...
2009-08-02 Eric B. Weddington <eric.weddington@atmel.com>
* config/tc-avr.c (mcu_types): Add atmega8m1, atmega8c1, atmega16c1.
* doc/c-avr.texi: Likewise.
2009-08-02 14:34:55 +00:00
11908008aa
/gas:
...
2009-08-01 Eric B. Weddington <eric.weddington@atmel.com>
* config/tc-avr.c (mcu_types): Add atmega8u2, atmega16u2, atmega32u2.
* doc/c-avr.texi: Likewise.
2009-08-01 16:17:23 +00:00
cab7e4d9d5
* doc/c-arm.texi (ARM-Instruction-Set): New node. Documents the
...
different syntaxes support by the ARM port.
(ARM Directives): Add entry for .syntax.
2009-07-30 08:54:49 +00:00
f746e6b904
* doc/c-mips.texi (MIPS insn): Fix typo.
2009-07-30 08:45:41 +00:00
8a9036a406
bfd/
...
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* archures.c (bfd_architecture): Add bfd_arch_l1om.
(bfd_l1om_arch): New.
(bfd_archures_list): Add &bfd_l1om_arch.
* bfd-in2.h: Regenerated.
* config.bfd (targ64_selvecs): Add bfd_elf64_l1om_vec if
bfd_elf64_x86_64_vec is supported. Add bfd_elf64_l1om_freebsd_vec
if bfd_elf64_x86_64_freebsd_vec is supported.
(targ_selvecs): Likewise.
* configure.in: Support bfd_elf64_l1om_vec and
bfd_elf64_l1om_freebsd_vec.
* configure: Regenerated.
* cpu-l1om.c: New.
* elf64-x86-64.c (elf64_l1om_elf_object_p): New.
(bfd_elf64_l1om_vec): Likewise.
(bfd_elf64_l1om_freebsd_vec): Likewise.
* Makefile.am (ALL_MACHINES): Add cpu-l1om.lo.
(ALL_MACHINES_CFILES): Add cpu-l1om.c.
* Makefile.in: Regenerated.
* targets.c (bfd_elf64_l1om_vec): New.
(bfd_elf64_l1om_freebsd_vec): Likewise.
(_bfd_target_vector): Add bfd_elf64_l1om_vec and
bfd_elf64_l1om_freebsd_vec.
binutils/
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* readelf.c (guess_is_rela): Handle EM_L1OM.
(dump_relocations): Likewise.
(get_machine_name): Likewise.
(get_section_type_name): Likewise.
(get_elf_section_flags): Likewise.
(get_symbol_index_type): Likewise.
(is_32bit_abs_reloc): Likewise.
(is_32bit_pcrel_reloc): Likewise.
(is_64bit_abs_reloc): Likewise.
(is_64bit_pcrel_reloc): Likewise.
(is_none_reloc): Likewise.
gas/
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (cpu_arch): Add l1om.
(check_cpu_arch_compatible): New.
(set_cpu_arch): Use it.
(i386_arch): New.
(i386_mach): Return bfd_mach_l1om for Intel L1OM.
(md_show_usage): Display l1om.
(i386_target_format): Return ELF_TARGET_L1OM_FORMAT if
cpu_arch_isa_flags.bitfield.cpul1om is set.
* config/tc-i386.h (TARGET_ARCH): Use (i386_arch ()).
(i386_arch): New.
(ELF_TARGET_L1OM_FORMAT): Likewise.
* doc/c-i386.texi: Document l1om.
gas/testsuite/
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/l1om.d: New.
* gas/i386/l1om-inval.l: Likewise.
* gas/i386/l1om-inval.s: Likewise.
* gas/i386/i386.exp: Run l1om-inval and l1om.
include/elf/
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* common.h (EM_L1OM): New.
ld/
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* configure.tgt (targ64_extra_emuls): Add elf_l1om if elf_x86_64
is supported. Add elf_l1om_fbsd if elf_x86_64_fbsd is supported.
(targ_extra_emuls): Likewise.
* Makefile.am (ALL_64_EMULATIONS): Add eelf_l1om.o and
eelf_l1om_fbsd.o
(eelf_l1om.c): New.
(eelf_l1om_fbsd.c): Likewise.
* Makefile.in: Regenerated.
* emulparams/elf_l1om.sh: New.
* emulparams/elf_l1om_fbsd.sh: Likewise.
ld/testsuite/
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* ld-x86-64/abs-l1om.d: New.
* ld-x86-64/protected2-l1om.d: Likewise.
* ld-x86-64/protected3-l1om.d: Likewise.
* ld-x86-64/x86-64.exp: Run abs-l1om, protected2-l1om and
protected3-l1om.
opcodes/
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* configure.in: Handle bfd_l1om_arch.
* disassemble.c (disassembler): Likewise.
* configure: Regenerated.
* i386-dis.c (print_insn): Handle bfd_mach_l1om and
bfd_mach_l1om_intel_syntax. Use 8 bytes per line for Intel L1OM.
* i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~CpuL1OM.
Add CPU_L1OM_FLAGS.
(cpu_flags): Add CpuL1OM.
(set_bitfield): Take an argument to set the value field.
(process_i386_cpu_flag): Support ~CpuXXX and ~(CpuXXX|CpuYYY).
(process_i386_opcode_modifier): Updated.
(process_i386_operand_type): Likewise.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
* i386-opc.h (CpuL1OM): New.
(CpuXsave): Updated.
(i386_cpu_flags): Add cpul1om.
2009-07-25 14:58:58 +00:00
309d33736f
gas/
...
2009-07-24 Jan Beulich <jbeulich@novell.com>
* tc-i386.c (cpu_arch): Add .8087, .287, .387, .no87, .nommx,
.nosse, and .noavx.
(cpu_flags_and_not): New.
(set_cpu_arch): Check whether sub-architecture specified is a
feature disable.
(md_parse_option): Likewise.
(parse_real_register): Don't return floating point register
when x87 functionality is disabled.
(md_show_usage): Add new sub-options.
* doc/c-i386.texi: Update with new command line sub-options.
gas/testsuite/
2009-07-24 Jan Beulich <jbeulich@novell.com>
* gas/i386/8087.[ds]: New.
* gas/i386/287.[ds]: New.
* gas/i386/387.[ds]: New.
* gas/i386/no87.[ls]: New.
* gas/i386/no87-2.[ls]: New.
* gas/i386/i386.exp: Run new tests.
* gas/i386/att-regs.s: Also check FPU register access.
* gas/i386/intel-regs.s: Likewise.
* gas/i386/att-regs.d: Adjust expectations.
* gas/i386/intel-regs.d: Likewise.
opcodes/
2009-07-24 Jan Beulich <jbeulich@novell.com>
* i386-dis.c (fgrps): Correct annotation for feni/fdisi. Add
frstpm.
* i386-gen.c (cpu_flag_init): Add FP enabling flags where needed.
(cpu_flags): Add Cpu8087, Cpu287, Cpu387, Cpu687, and CpuFISTTP.
(set_bitfield): Expand CpuFP to Cpu8087|Cpu287|Cpu387.
* i386-opc.h (Cpu8087, Cpu287, Cpu387, Cpu687, CpuFISTTP):
Define.
(union i386_cpu_flags): Add cpu8087, cpu287, cpu387, cpu687,
and cpufisttp.
* i386-opc.tbl: Qualify floating point instructions by their
respective CpuXXX flag. Fix fucom{,p,pp}, fprem1, fsin, fcos,
and fsincos to be avilable only on 387. Fix fstsw ax to be
available only on 287+. Add f{,n}eni, f{,n}disi, f{,n}setpm,
and frstpm.
* i386-init.h, i386-tbl.h: Regenerate.
2009-07-24 15:41:20 +00:00
3e7a7d11f1
* config/obj-elf.c (obj_elf_type): Add code to support a type of
...
gnu_unique_object.
* doc/as.texinfo: Document new feature of .type directive.
* NEWS: Mention support for gnu_unique_object symbol type.
* common.h (STB_GNU_UNIQUE): Define.
* NEWS: Mention the linker's support for symbols with a binding of
STB_GNU_UNIQUE.
* gas/elf/type.s: Add unique global symbol definition.
* gas/elf/type.e: Add expected readelf output for global unique
symbol.
* elfcpp.h (enum STB): Add STB_GNU_UNIQUE.
* readelf.c (get_symbol_binding): For Linux targeted files return
UNIQUE for symbols with the STB_GNU_UNIQUE binding.
* doc/binutils.texi: Document the meaning of the 'u' symbol
binding in the output of nm and objdump --syms.
* elf-bfd.h (struct elf_link_hash_entry): Add unique_global field.
* elf.c (swap_out_syms): Set binding to STB_GNU_UNIQUE for symbols
with the BSF_GNU_UNIQUE flag bit set.
* elfcode.h (elf_slurp_symbol_table): Set the BSF_GNU_UNIQUE flag
for symbols with STB_GNU_UNIQUE binding.
* elflink.c (_bfd_elf_merge_symbol): Set unique_global for symbols
with the STB_GNU_UNIQUE binding.
(elf_link_add_object_symbols): Set the BSF_GNU_UNIQUE flag for
symbols with STB_GNU_UNIQUE binding. Set STB_GNU_UNIQUE for
symbols with the unique_global field set.
(elf_link_output_extsym): Set unique_global field for symbols with
the STB_GNU_UNIQUE binding.
* syms.c (struct bfd_symbol): Define BSF_GNU_UNIQUE flag bit.
(bfd_print_symbol_vandf): Print a 'u' character for BSF_GNU_UNIQUE
symbols.
(bfd_decode_symclass): Return a 'u' character for BSF_GNU_UNIQUE
symbols.
* bfd-in2.h: Regenerate.
2009-07-23 13:00:30 +00:00
a946d7e38e
PR binutils/10379
...
* doc/c-mips.texi (MIPS insn): Document the special behaviour of
the .global directive for MIPS ports.
2009-07-23 10:19:20 +00:00
5297075306
* doc/c-arm.texi (mauto-it): Removed old option.
...
(mimplicit-it): Added right option.
2009-07-15 15:08:55 +00:00
c921be7d91
* config/tc-arm.c (it_fsm_post_encode): New forward declaration.
...
(set_it_insn_type_nonvoid): New macro.
(emit_thumb32_expr): New function.
(thumb_insn_size): New function.
(emit_insn): New function.
(s_arm_elf_inst): New function.
(md_pseudo_table): New pseudo-opcode entries added.
* doc/c-arm.texi: New directive added.
* gas/arm/inst-po.d: New testcase.
* gas/arm/inst-po.s: New file.
* gas/arm/inst-po-2.d: New testcase.
* gas/arm/inst-po-2.s: New file.
* gas/arm/inst-po-2.l: New file.
* gas/arm/inst-po-3.d: New testcase.
* gas/arm/inst-po-3.s: New file.
* gas/arm/inst-po-be.d: New testcase.
2009-07-09 07:52:37 +00:00
1ef52f49b5
PR 10168
...
* config/tc-arm.c (do_t_pkhtb): Swap Rm and Rn when encoding as
PKHBT.
* gas/arm/thumb32.d: Fix expected disassembly of PKHTB insn.
2009-07-01 16:36:28 +00:00
e07e6e58be
* config/tc-arm.c (implicit_it_mode): New enum.
...
(implicit_it_mode): New global.
(it_instruction_type): New enum.
(arm_parse_it_mode): New function.
(arm_long_opts): New option added.
(arm_it): New field.
(it_state): New enum.
(now_it): New macro.
(check_it_blocks_finished): New function.
(insns[]): Use the IT Thumb opcodes for ARM too.
(arm_cleanup): Call check_it_blocks_finished.
(now_it_compatible): New function.
(conditional_insn): New function.
(set_it_insn_type): New macro.
(set_it_insn_type_last): New macro.
(do_it): Call automatic IT machinery functions.
(do_t_add_sub): Likewise
(do_t_arit3): Likewise.
(do_t_arit3c): Likewise.
(do_t_blx): Likewise.
(do_t_branch): Likewise.
(do_t_bkpt): Likewise.
(do_t_branch23): Likewise.
(do_t_bx): Likewise.
(do_t_bxj): Likewise.
(do_t_cps): Likewise.
(do_t_cpsi): Likewise.
(do_t_cbz): Likewise.
(do_t_it): Likewise.
(encode_thumb2_ldmstm): Likewise.
(do_t_ldst): Likewise.
(do_t_mov_cmp): Likewise.
(do_t_mvn_tst): Likewise.
(do_t_mul): Likewise.
(do_t_neg): Likewise.
(do_t_setend): Likewise.
(do_t_shift): Likewise.
(do_t_tb): Likewise.
(output_it_inst): New function.
(new_automatic_it_block): New function.
(close_automatic_it_block): New function.
(now_it_add_mask): New function.
(it_fsm_pre_encode): New function.
(handle_it_state): New function.
(it_fsm_post_encode): New function.
(force_automatic_it_block_close): New function.
(in_it_block): New function.
(md_assemble): Call automatic IT block machinery functions.
(arm_frob_label): Likewise.
(arm_opts): New element.
* config/tc-arm.h (it_state): New enum.
(current_it): New struct.
(arm_segment_info_type): New member added.
* doc/c-arm.texi: New option -mimplicit-it documented.
* gas/arm/arm-it-auto.d: New test.
* gas/arm/arm-it-auto.s: New file.
* gas/arm/arm-it-auto-2.d: New test case.
* gas/arm/arm-it-auto-2.s: New file.
* gas/arm/arm-it-auto-3.d: New test case.
* gas/arm/arm-it-auto-3.s: New file.
* gas/arm/arm-it-bad.d: New test case.
* gas/arm/arm-it-bad.l: New file.
* gas/arm/arm-it-bad.s: New file.
* gas/arm/arm-it-bad-2.d: New test case.
* gas/arm/arm-it-bad-2.l: New file.
* gas/arm/arm-it-bad-2.s: New file.
* gas/arm/arm-it-bad-3.d: New test case.
* gas/arm/arm-it-bad-3.l: New file.
* gas/arm/arm-it-bad-3.s: New file.
* gas/arm/thumb2_it_auto.d: New test.
* gas/arm/thumb2_it_bad.l: Error message updated.
* gas/arm/thumb2_it_bad_auto.d: New test.
* gas/arm/thumb2_it.d: Comment added.
* gas/arm/thumb2_it_bad.d: Comment added.
2009-06-22 14:40:28 +00:00
90dce00a2a
PR 10302
...
* doc/as.texinfo (Section <ELF "M,S" flag>): Clarify tail merge.
2009-06-20 02:52:08 +00:00
c1711530e6
==> bfd/ChangeLog <==
...
2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com>
* cofflink.c (process_embedded_commands): Ignore "-aligncomm".
==> gas/ChangeLog <==
2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com>
* NEWS: Mention new feature.
* config/obj-coff.c (obj_coff_common_parse): New function.
(obj_coff_comm): Likewise.
(coff_pseudo_table): Override default ".comm" definition on PE.
* doc/as.texinfo: Document new feature.
==> gas/testsuite/ChangeLog <==
2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com>
* gas/pe/: New directory for PE format-specific tests.
* gas/pe/aligncomm-a.d: New test pattern file.
* gas/pe/aligncomm-a.s: New test source file.
* gas/pe/aligncomm-b.d: New test pattern file.
* gas/pe/aligncomm-b.s: New test source file.
* gas/pe/aligncomm-c.d: New test pattern file.
* gas/pe/aligncomm-c.s: New test source file.
* gas/pe/aligncomm-d.d: New test pattern file.
* gas/pe/aligncomm-d.s: New test source file.
* gas/pe/pe.exp: New test control script.
* lib/gas-defs.exp (is_pecoff_format): New function.
==> ld/ChangeLog <==
2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com>
* NEWS: Mention new feature.
* deffile.h (def_file_aligncomm): Add new struct definition.
(def_file): Add new def_file_aligncomm member.
* deffilep.y (%token): Add new ALIGNCOMM token.
(command): Add production rule for ALIGNCOMM.
(def_file_free): Free any chained def_file_aligncomm structs.
(diropts[]): Add entry for '-aligncomm' .drectve command.
(def_aligncomm): New grammar function.
* ld.texinfo: Document new feature.
* pe-dll.c (process_def_file): Rename from this ...
(process_def_file_and_drectve): ... to this, updating all callers,
and process any aligncomms chained to the def file after scanning
all .drectve sections.
(generate_edata): Updated to match.
(pe_dll_build_sections): Likewise.
==> ld/testsuite/ChangeLog <==
2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com>
* ld-pe/aligncomm-1.c: New test source file.
* ld-pe/aligncomm-2.c: Likewise.
* ld-pe/aligncomm-3.c: Likewise.
* ld-pe/aligncomm-4.c: Likewise.
* ld-pe/aligncomm.d: New test pattern file.
* ld-pe/direct.exp: Deleted, and content moved into ...
* ld-pe/pe-run.exp: ... New common file for all PE run tests.
* ld-pe/vers-script.exp: Deleted, and content merged into ...
* ld-pe/pe-compile.exp: ... New common file for PE tests needing
a compiler, adding aligned common tests.
* ld-pe/pe.exp: Update header comment.
2009-05-19 16:08:08 +00:00
63ad59ae8b
2009-05-17 Kai Tietz <kai.tietz@onevision.com>
...
* config/obj-coff.c (obj_coff_section): Add 'y' as
specifier for SEC_COFF_NOREAD section flag.
* doc/as.texinfo: Add documentation about .section flag 'y'.
2009-05-17 20:09:02 +00:00
d8045f234d
include/elf
...
2009-04-30 Nick Clifton <nickc@redhat.com>
* common.h (STT_GNU_IFUNC): Define.
elfcpp
2009-04-30 Nick Clifton <nickc@redhat.com>
* (enum STT): Add STT_GNU_IFUNC.
gas
2009-04-30 Nick Clifton <nickc@redhat.com>
* config/obj-elf.c (obj_elf_type): Add support for a
gnu_indirect_function type.
* config/tc-i386.c (tc_i386_fix_adjustable): Do not adjust fixups
against indirect function symbols.
* doc/as.texinfo (.type): Document the support for the
gnu_indirect_function symbol type.
* NEWS: Mention the new feature.
gas/testsuite
2009-04-30 Nick Clifton <nickc@redhat.com>
* gas/elf/elf.exp: Extend type test to include an ifunc symbol.
Provide an alternative test for targets which do not support ifunc
symbols.
(type.s): Add entry for an ifunc symbol.
(type.e): Add ifunc entry to expected symbol dump.
(section2.e-armelf): Add entry for ifunc symbol.
(type-noifunc.s): New file.
(type-noifunc.e): New file.
bfd/
2009-04-30 Nick Clifton <nickc@redhat.com>
* elf-bfd.h (struct bfd_elf_section_data): Add indirect_relocs
section pointer.
(struct elf_obj_data): Add has_ifunc_symbols boolean.
* elf.c (swap_out_syms): Convert BSF_GNU_INDIRECT_FUNCTION flags
into a STT_GNU_IFUNC symbol type.
(_bfd_elf_is_function_type): Accept STT_GNU_IFUNC as a function
type.
(_bfd_elf_set_osabi): Set the osasbi field to ELFOSABI_LINUX if
the binary contains ifunc symbols.
* elfcode.h (elf_slurp_symbol_table): Translate the STT_GNU_IFUNC
symbol type into a BSF_GNU_INDIRECT_FUNCTION flag.
* elf32-i386.c (is_indirect_function): New function.
(elf_i386_check_relocs): Create an ifunc output section.
(allocate_dynrelocs): Create dynamic relocs in the ifunc output
section if necessary.
(elf_i386_relocate_section): Emit a reloc against an ifunc symbol
if necessary.
(elf_i386_add_symbol_hook): New function. Set the
has_ifunc_symbols field of the elf_obj_data structure if an ifunc
symbol is encountered.
(elf_backend_post_process_headers): Define.
(elf_backend_add_symbol_hook): Define.
(elf_i386_post_process_headers): Rename to
elf_i388_fbsd_post_process_headers.
* elf64-x86_64.c (IS_X86_64_PCREL_TYPE): New macro.
(is_indirect_function): New function.
(elf64_x86_64_check_relocs): Create an ifunc output section.
(allocate_dynrelocs): Create dynamic relocs in the ifunc output
section if necessary.
(elf64_x86_64_relocate_section): Emit a reloc against an ifunc
symbol if necessary.
(elf_i386_add_symbol_hook): Set the has_ifunc_symbols field of the
elf_obj_data structure if an ifunc symbol is encountered.
(elf_backend_post_process_headers): Define.
* elflink.c (_bfd_elf_adjust_dynamic_symbol): Always create a PLT
if we have ifunc symbols to handle.
(get_ifunc_reloc_section_name): New function. Computes the name
for an ifunc section.
(_bfd_elf_make_ifunc_reloc_section): New function. Creates a
section to hold ifunc relocs.
* syms.c (BSF_GNU_INDIRECT_FUNCTION): Define.
(bfd_print_symbol_vandf): Handle ifunc symbols.
(bfd_decode_symclass): Likewise.
* bfd-in2.h: Regenerate.
binutils
2009-04-30 Nick Clifton <nickc@redhat.com>
* readelf.c (dump_relocations): Display a relocation against an
ifunc symbol as if it were a function invocation.
(get_symbol_type): Handle STT_GNU_IFUNC.
ld
2009-04-30 Nick Clifton <nickc@redhat.com>
* NEWS: Mention support for IFUNC symbols.
ld/testsuite
2009-04-30 Nick Clifton <nickc@redhat.com>
* ld-ifunc: New directory.
* ld-ifunc/ifunc.exp: New file: Run the IFUNC tests.
* ld-ifunc/prog.c: New file.
* ld-ifunc/lib.c: New file.
2009-04-30 15:47:13 +00:00
92846e72ad
* NEWS: Add item about discriminator support.
...
* dwarf2dbg.h (struct dwarf2_line_info): Add discriminator field.
* dwarf2dbg.c (current): Add discriminator field.
(dwarf2_where): Copy discriminator value.
(dwarf2_consume_line_info): Set discriminator to 0.
(dwarf2_directive_loc): Process discriminator sub-op.
(out_leb128): New function.
(process_entries): Output DW_LNE_set_discriminator.
* doc/as.texinfo: Add discriminator operand to .loc directive.
* testsuite/gas/lns/lns-common-1.d: Add test for discriminator.
* testsuite/gas/lns/lns-common-1.s: Likewise.
2009-04-24 18:31:29 +00:00
6a32d87432
2009-04-09 Catherine Moore <clm@codesourcery.com>
...
* config/tc-mips.c (mips_fix_24k): Declare.
(check_for_24k_errata): New.
(mips_cleanup): Call check_for_24k_errata.
(start_noreorder): Likewise.
(md_mips_end): Likewise.
(s_change_sec): Likewise.
(s_change_section): Likewise.
(append_insn): Call check_for_24k_errata. Prevent
ERET/DERET instructions from being moved into delay
slots.
(OPTION_FIX_24K): New.
(OPTION_NO_FIX_24k) New.
(md_longopts): Add "mfix-24k" and "mno-fix-24k".
(md_parse_option): Handle fix-24k options.
(md_show_usage): Display fix-24k options.
* doc/c-mips.texi: Document.
* testsuite/gas/mips/mips.exp: Run new tests.
* testsuite/gas/mips/eret.s: New test.
* testsuite/gas/mips/eret.d: New test output.
* testsuite/gas/mips/eret.l: New test output.
2009-04-09 15:55:59 +00:00
5b19eaba0d
* config/tc-arm.c (arm_cpus): Add entry for ARM Cortex-M0.
...
* doc/c-arm.texi: Added codes for processors ARM Cortex-M0 and
Cortex-M1.
2009-04-02 09:43:56 +00:00
adfd732835
* doc/internals.texi: Fix trivial syntax errors.
2009-03-31 04:57:48 +00:00
c0157db47e
Remove merge markers
2009-03-27 08:26:18 +00:00
198f125145
2009-03-03 Tristan Gingold <gingold@adacore.com>
...
Eric Botcazou <ebotcazou@adacore.com>
Douglas B Rupp <rupp@gnat.com>
* doc/as.texinfo (Overview): Mention -replace/-noreplace options
for Alpha.
* doc/c-alpha.texi (Alpha Options): Document -replace/-noreplace.
* config/tc-alpha.h (TC_VALIDATE_FIX_SUB): Define to 1 (evax).
(OBJ_SYMFIELD_TYPE): Remove.
(tc_canonicalize_symbol_name): Define to evax_shorten_name.
(TC_IMPLICIT_LCOMM_ALIGNMENT): For alignment to 3 on evax.
(tc_frob_file_before_fix): Do not defined on evax.
* config/tc-alpha.c: Always includes dwarf2dbg.h.
Include vms.h if OBJ_EVAX.
(struct alpha_fixup): Add xtrasym and procsym (evax only).
(enum alpha_macro_arg): Remove trailing comma.
(md_longopts): Add replace and noreplace arguments (evax only).
(alpha_evax_proc_hash): New variable.
(alpha_link_section): Make it global.
(alpha_ctors_section, alpha_dtors_section): Removed.
(alpha_ctors_symbol, alpha_dtors_symbol): Ditto.
(alpha_lit8_section): Ifndef'ed on evax.
(alpha_lit8_symbol): Ditto.
(alpha_prologue_label): New variable.
(alpha_linkage_symbol): New variable (evax only).
(alpha_flag_replace): Ditto.
(struct alpha_evax_procs): Add handler and handler_data field.
(alpha_evax_proc): Now of type pointer.
(alpha_linkage_fixup_root, alpha_linkage_fixup_tail): New variables.
(struct alpha_reloc_tag): Add sym and psym fields (evax only).
(get_alpha_reloc_tag): Initialize sym and psym fields (evax only).
(alpha_adjust_relocs): Ifndef'ed on evax.
(load_expression): Add opname argument.
Implement LDA/BSR optimization for evax.
(emit_lda): Adjust for new prototype of load_expression.
(emit_ir_load): Ditto. Do not nothing for GP if ..lk symbols.
(emit_loadstore): Likewise.
(emit_ldXu): Likewise.
(emit_stX): Likewise.
(emit_jsrjmp): Likewise. Implement LDA/BSR optimization for evax.
(emit_ldgp): Avoid warning in evax case.
(add_to_link_pool): Make it static. Return symbolic expression rather
than number expression for the offset.
(s_alpha_text): Create .text symbol for evax if not already created.
(s_alpha_comm): Do not create specific section for common symbol.
Fill common area with zeros for evax.
(s_alpha_prologue): Create alpha_prologue_label.
(s_alpha_section_name): New function (evax).
(s_alpha_section_word): Likewise.
(section_name): New static variabke moved out from ...
(s_alpha_section): ... here. Create new sections on demand.
(s_alpha_literals): New function (evax).
(s_alpha_ent): Create alpha_evax_proc instance and insert it in the
alpha_evax_proc_hash table.
(s_alpha_handler): New function (evax).
(s_alpha_frame): Adjust for new type of alpha_evax_proc.
(s_alpha_prologue): New function (evax).
(s_alpha_pdesc): Adjust for new type of alpha_evax_proc and new
handling of procedures with hash table.
Add support for condition handlers.
(s_alpha_linkage): Create linkage_fixup instance and chain it.
(s_alpha_fp_save): Adjust for new type of alpha_evax_proc.
(s_alpha_mask): Likewise.
(s_alpha_fmask): Likewise.
(s_alpha_end): Clear alpha_evax_proc.
(s_alpha_align): Increase max_alignment to 16.
(alpha_print_token): Call print_expr_1 instead of print_expr.
(md_pseudo_table): Add "section", "literals", "handler" and
"handler_data" (evax). Do not ignore "prologue" on evax.
Fix indentation.
(md_begin): Create hash table for alpha_evax_proc_hash.
(md_parse_option): Handle OPTION_REPLACE and OPTION_NOREPLACE.
(md_show_usage): Mention -replace/-noreplace for evax.
(md_apply_fix): Handle evax relocs (_NOP, _LDA, _BSR and _BOH).
(alpha_force_relocation): Likewise.
(alpha_fix_adjustable): Likewise. Add BFD_RELOC_16 case.
(tc_gen_reloc): Likewise. Add BFD_RELOC_ALPHA_LINKAGE for evax.
(emit_insn): New cases for evax specific relocs.
(assemble_insn): Fix indentation.
Take care of -MDISP in operand table.
* config/obj-evax.h (struct alpha_linkage_fixups): New struct.
(OBJ_SYMFIELD_TYPE): New macro.
(obj_symbol_new_hook): Define.
(obj_frob_symbol, obj_frob_file_before_adjust): Ditto.
(obj_frob_file_before_fix): Ditto.
(PDSC_S_M_HANDLER_VALID): New macro.
(PDSC_S_M_HANDLER_DATA_VALID): Ditto.
(TC_IMPLICIT_LCOMM_ALIGNMENT): Remove.
Add prototypes for functions declared in obj-evax.c
* config/obj-evax.c: Include subsegs.h, struc-symbol.h, safe-ctype.h.
(s_evax_weak): Convert to ansi-C.
(evax_symbol_new_hook): New function.
(evax_frob_symbol): Ditto.
(evax_frob_file_before_adjust): Ditto.
(evax_frob_file_before_fix): Ditto.
(evax_shorten_name): Ditto.
(crc32): Ditto.
(encode_32): Ditto.
(encode_16): Ditto.
(decode_16): Ditto.
(shorten_identifier): Ditto.
(is_truncated_identifier): Ditto.
* dwarf2dbg.c (out_debug_info): Do not append trailing slash on VMS.
* as.c (close_output_file): Remove #ifndef OBJ_VMS.
(main): Ditto.
2009-03-03 10:04:58 +00:00
c3b7224ae4
Add support for Score7 architecture.
2009-03-02 10:33:08 +00:00
11c19e16a2
* doc/all.texi: Set S390.
...
* doc/as.texinfo: Add S390 support and pull in c-s390.texi.
* doc/Makefile.am (CPU_DOCS): Add c-s390.texi.
* doc/Makefile.in: Likewise.
* doc/c-s390.texi: New.
2009-02-23 10:10:25 +00:00
52b6b6b972
bfd:
...
2009-02-03 Sandip Matte <sandip@rmicorp.com>
* aoutx.h (NAME (aout, machine_type)): Handle bfd_mach_mips_xlr.
* archures.c (bfd_mach_mips_xlr): Define.
* bfd-in2.h: Regenerate.
* cpu-mips.c (I_xlr): Define.
(arch_info_struct): Add XLR entry.
* elfxx-mips.c (_bfd_elf_mips_mach): Handle E_MIPS_MACH_XLR.
(mips_set_isa_flags): Handle bfd_mach_mips_xlr
(mips_mach_extensions): Add XLR entry.
binutils:
2009-02-03 Sandip Matte <sandip@rmicorp.com>
* readelf.c (get_machine_flags): Handle E_MIPS_MACH_XLR.
gas:
2009-02-03 Sandip Matte <sandip@rmicorp.com>
* config/tc-mips.c (macro): Handle M_MSGSND, M_MSGLD, M_MSGLD_T,
M_MSGWAIT and M_MSGWAIT_T.
(mips_cpu_info_table): Add XLR entry.
* doc/c-mips.texi (-march): Document xlr.
gas/testsuite:
2009-02-03 Sandip Matte <sandip@rmicorp.com>
* gas/mips/mips.exp (xlr): New architecture.
(xlr-ext): Run test.
* gas/mips/xlr-ext.d, gas/mips/xlr-ext.s: New.
include/elf:
2009-02-03 Sandip Matte <sandip@rmicorp.com>
* mips.h (E_MIPS_MACH_XLR): Define.
include/opcode:
2009-02-03 Sandip Matte <sandip@rmicorp.com>
* mips.h (INSN_XLR): Define.
(INSN_CHIP_MASK): Update.
(CPU_XLR): Define.
(OPCODE_IS_MEMBER): Update.
(M_MSGSND, M_MSGLD, M_MSGLD_T, M_MSGWAIT, M_MSGWAIT_T): Define.
opcodes:
2009-02-03 Sandip Matte <sandip@rmicorp.com>
* mips-dis.c (mips_cp0_names_xlr, mips_cp0sel_names_xlr): Define.
(mips_arch_choices): Add XLR entry.
* mips-opc.c (XLR): Define.
(mips_builtin_opcodes): Add XLR instructions.
2009-02-03 18:16:04 +00:00
a53fddce83
/gas:
...
2009-01-29 Eric B. Weddington <eric.weddington@atmel.com>
* config/tc-avr.c (mcu_types): Add ata6289.
* doc/c-avr.texi: Likewise.
2009-02-03 17:24:36 +00:00
31dd3154f4
bfd:
...
2009-02-03 Carlos O'Donell <carlos@codesourcery.com>
* configure.in: AC_SUBST pdfdir.
* Makefile.am: Add install-pdf, install-pdf-am
and install-pdf-recursive targets. Define pdfdir.
* doc/Makefile.am: Define pdf__strip_dir. Add
install-pdf and install-pdf-am targets.
* po/Make-in: Add install-pdf target.
* configure: Regenerate.
* Makefile.in: Regenerate
* doc/Makefile.in: Regenerate.
binutils:
2009-02-03 Carlos O'Donell <carlos@codesourcery.com>
* configure.in: AC_SUBST pdfdir.
* Makefile.am: Add install-pdf, install-pdf-am,
and install-pdf-recursive targets.
* doc/Makefile.am: Define pdf__strip_dir. Add
install-pdf and install-pdf-am targets.
* po/Make-in: Add install-pdf target.
* configure: Regenerate.
* Makefile.in: Regenerate.
* doc/Makefile.in: Regenerate.
etc:
2009-02-03 Carlos O'Donell <carlos@codesourcery.com>
* configure.in: AC_SUBST pdfdir.
* configure: Regenerate.
gas:
2009-02-03 Carlos O'Donell <carlos@codesourcery.com>
* configure.in: AC_SUBST pdfdir.
* Makefile.am: Add install-pdf, install-pdf-am,
and install-pdf-recursive targets.
* doc/Makefile.am: Define pdf__strip_dir. Add
install-pdf and install-pdf-am targets.
* po/Make-in: Add install-pdf target.
* configure: Regenerate.
* Makefile.in: Regenerate.
* doc/Makefile.in: Regenerate.
gprof:
2009-02-03 Carlos O'Donell <carlos@codesourcery.com>
* configure.in: AC_SUBST pdfdir.
* Makefile.am: Add install-pdf, install-pdf-am,
and install-pdf-recursive targets. Define pdf__strip_dir.
* po/Make-in: Add install-pdf target.
* configure: Regenerate.
* Makefile.in: Regenerate.
ld:
2009-02-03 Carlos O'Donell <carlos@codesourcery.com>
* configure.in: AC_SUBST pdfdir.
* Makefile.am: Add install-pdf, install-pdf-am,
and install-pdf-recursive targets. Define pdf__strip_dir.
* po/Make-in: Add install-pdf target.
* configure: Regenerate.
* Makefile.in: Regenerate.
opcodes:
2009-02-03 Carlos O'Donell <carlos@codesourcery.com>
* Makefile.am: Add install-pdf target.
* po/Make-in: Add install-pdf target.
* Makefile.in: Regenerate.
2009-02-03 15:54:05 +00:00
4a6bc624b3
* doc/c-arm.texi (ARM Directives): Alphabetize. Document .2byte,
...
.4byte, .8byte, .bss, .even, .extend, .ldouble, .packed, .secrel32
directives.
2009-01-29 07:08:12 +00:00
17f4880d2f
/gas:
...
2009-01-26 Eric B. Weddington <eric.weddington@atmel.com>
PR 9789
* config/tc-avr.c (mcu_types): Fix typo in atmega128rfa1 name.
* doc/c-avr.texi: Likewise.
2009-01-26 13:38:52 +00:00
278df34e12
* doc/c-arm.texi (): Document -mwarn-deprecated.
...
* config/tc-arm.c (WARN_DEPRECATED): Remove. Replace with ...
(warn_on_deprecated): ... this.
(opcode_lookup, md_assemble): Check it before warning.
(arm_opts): Add m[no-]warn-deprecated.
(md_parse_option): Replace WARN_DEPRECATED with
warn_on_deprecated.
2009-01-23 17:46:21 +00:00
e04befd0f5
2009-01-16 Andrew Stubbs <ams@codesourcery.com>
...
Daniel Jacobowitz <dan@codesourcery.com>
gas/
* config/tc-arm.c (arm_copy_symbol_attributes): New function.
* config/tc-arm.h (arm_copy_symbol_attributes): New prototype.
(CONVERT_SYMBOLIC_ATTRIBUTE): New define.
* read.c (s_vendor_attribute): Add support for symbolic tag names.
Improve string parser.
* doc/c-arm.texi (ARM Machine Directives): Document
.eabi_attribute symbolic tag names.
gas/testsuite/
* gas/arm/attr-syntax.d: New file.
* gas/arm/attr-syntax.s: New file.
2009-01-16 10:26:49 +00:00
f72d7f2934
Reformat.
2009-01-10 18:38:12 +00:00
1543849b32
2009-01-10 H.J. Lu <hongjiu.lu@intel.com>
...
* doc/c-i386.texi: Reformat.
2009-01-10 18:33:35 +00:00
bd5295b282
gas/
...
2009-01-10 H.J. Lu <hongjiu.lu@intel.com>
* gas/config/tc-i386.c (cpu_arch): Add corei7, .clflush and
.syscall.
(i386_align_code): Handle PROCESSOR_COREI7.
(md_show_usage): Add corei7, clflush and syscall.
(i386_target_format): Replace cpup4 with cpuclflush.
* gas/config/tc-i386.h (processor_type): Add PROCESSOR_COREI7.
* doc/c-i386.texi: Document corei7, clflush and syscall.
gas/testsuite/
2009-01-10 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/arch-10.s: Add clflush and syscall.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/arch-10.d: Updated.
* gas/i386/arch-10-1.l: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
opcodes/
2009-01-10 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (cpu_flag_init): Replace CpuP4 and CpuK6 with
CpuClflush and CpuSYSCALL, respectively. Remove CpuK8. Add
CPU_COREI7_FLAGS, CPU_CLFLUSH_FLAGS and CPU_SYSCALL_FLAGS.
(cpu_flags): Remove CpuP4, CpuK6 and CpuK8. Add CpuClflush
and CpuSYSCALL.
(lineno): Removed.
(set_bitfield): Take an argument, lineno. Don't report lineno
on error if it is -1.
(process_i386_cpu_flag): Take an argument, lineno.
(process_i386_opcode_modifier): Likewise.
(process_i386_operand_type): Likewise.
(output_i386_opcode): Likewise.
(opcode_hash_entry): Add lineno.
(process_i386_opcodes): Updated.
(process_i386_registers): Likewise.
(process_i386_initializers): Likewise.
* i386-opc.h (CpuP4): Removed.
(CpuK6): Likewise.
(CpuK8): Likewise.
(CpuClflush): New.
(CpuSYSCALL): Likewise.
(CpuMMX): Updated.
(i386_cpu_flags): Remove cpup4, cpuk6 and cpuk8. Add
cpuclflush and cpusyscall.
* i386-opc.tbl: Update movnti, clflush, lfence, mfence, pause,
syscall and sysret.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2009-01-10 17:25:52 +00:00
1b7f3fb0dd
gas/
...
2009-01-09 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (cpu_arch): Add .rdtscp.
(md_show_usage): Display rdtscp.
* doc/c-i386.texi: Document rdtscp.
gas/testsuite/
2009-01-09 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/arch-10.s: Add rdtscp.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/arch-10.d: Updated.
* gas/i386/arch-10-1.l: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
opcodes/
2009-01-09 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (cpu_flag_init): Add CpuRdtscp to CPU_K8_FLAGS
and CPU_AMDFAM10_FLAGS. Add CPU_RDTSCP_FLAGS.
(cpu_flags): Add CpuRdtscp.
(set_bitfield): Remove CpuSledgehammer check.
* i386-opc.h (CpuRdtscp): New.
(CpuLM): Updated.
(i386_cpu_flags): Add cpurdtscp.
* i386-opc.tbl: Replace CpuSledgehammer with CpuRdtscp.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2009-01-09 20:32:32 +00:00
84e94c9023
Add LM32 port.
2008-12-23 19:10:25 +00:00
2b02f87c4f
* config/tc-avr.c (mcu_types): Add attiny87, attiny327, atmega4hvd,
...
atmega8hvd, atmega16hvb, atmega32hvb, atmega64c1, atmega16m1,
atmega64m1, atmega32u6, atmega128rfa1, at90pwm81, at90scr100,
m3000f, m3000s and m3001b devices.
* doc/c-avr.texi: Likewise.
2008-12-23 09:51:38 +00:00
0f88be7a13
Remove STT_IFUNC support.
2008-12-23 09:01:51 +00:00
b6169b206a
gas/
...
2008-12-20 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (_i386_insn): Add swap_operand.
(parse_insn): Handle ".s".
(match_template): Handle swap_operand.
* doc/c-i386.texi: Document .s suffix.
gas/testsuite/
2008-12-20 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run opts, opts-intel, sse2avx-opts,
sse2avx-opts-intel, x86-64-opts, x86-64-opts-intel,
x86-64-sse2avx-opts and x86-64-sse2avx-opts-intel.
* gas/i386/opts.d: New.
* gas/i386/opts-intel.d: Likewise.
* gas/i386/opts.s: Likewise.
* gas/i386/sse2avx-opts.d: Likewise.
* gas/i386/sse2avx-opts-intel.d: Likewise.
* gas/i386/x86-64-opts.d: Likewise.
* gas/i386/x86-64-opts-intel.d: Likewise.
* gas/i386/x86-64-opts.s: Likewise.
* gas/i386/x86-64-sse2avx-opts.d: Likewise.
* gas/i386/x86-64-sse2avx-opts-intel.d: Likewise.
opcodes/
2008-12-20 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (EbS): New.
(EvS): Likewise.
(EMS): Likewise.
(EXqS): Likewise.
(EXxS): Likewise.
(b_swap_mode): Likewise.
(v_swap_mode): Likewise.
(q_swap_mode): Likewise.
(x_swap_mode): Likewise.
(v_mode): Updated.
(w_mode): Likewise.
(t_mode): Likewise.
(xmm_mode): Likewise.
(swap_operand): Likewise.
(dis386): Use EbS on movB. Use EvS on moveS.
(dis386_twobyte): Use EXxS on movapX.
(prefix_table): Use EXxS on movups, movupd, movdqu, movdqa,
vmovups, vmovdqu, vmovdqa. Use EMS and EXqS on movq.
(vex_table): Use EXxS on vmovapX.
(vex_len_table): Use EXqS on vmovq.
(intel_operand_size): Handle b_swap_mode, v_swap_mode,
q_swap_mode and x_swap_mode.
(OP_E_register): Handle b_swap_mode and v_swap_mode.
(OP_EM): Handle v_swap_mode.
(OP_EX): x_swap_mode and q_swap_mode.
* i386-gen.c (opcode_modifiers): Add S.
* i386-opc.h (S): New.
(Modrm): Updated.
(i386_opcode_modifier): Add s.
* i386-opc.tbl: Add S to movapd, movaps, movdqa, movdqu, movq,
movupd, movups, vmovapd, vmovaps, vmovdqa, vmovdqu and vmovq.
* i386-tbl.h: Regenerated.
2008-12-20 17:40:51 +00:00
2f3bb96af7
opcodes/
...
* ppc-dis.c (powerpc_init_dialect): Do not set PPC_OPCODE_BOOKE
for -Mbooke.
(print_ppc_disassembler_options): Update usage.
* ppc-opc.c (DE, DES, DEO, DE_MASK): Remove.
(BOOKE64): Remove.
(PPCCHLK64): Likewise.
(powerpc_opcodes): Remove all BOOKE64 instructions.
gas/
* config/tc-ppc.c (parse_cpu): Remove booke64 support. Update
usage strings.
(ppc_setup_opcodes): Likewise, remove booke64 support.
* doc/c-ppc.texi (PowerPC-Opts): Remove -mbooke32 and -mbooke64.
* doc/as.texinfo (Overview): Likewise.
binutils/
* doc/binutils.texi (objdump): Update booke documentation.
* NEWS: Document user-visible changes to command line options.
2008-12-04 10:29:16 +00:00
4357ad342f
* doc/as.texinfo (Type): Reword description of STT_IFUNC type.
2008-12-04 08:53:39 +00:00
e7c3341679
include/elf/
...
* common.h (STT_IFUNC): Define.
elfcpp/
* elfcpp.h (enum STT): Add STT_IFUNC.
bfd/
* syms.c (struct bfd_symbol): Add new flag BSF_INDIRECT_FUNCTION.
Remove redundant flag BFD_FORT_COMM_DEFAULT_VALUE. Renumber flags
to remove gaps.
(bfd_print_symbol_vandf): Return 'i' for BSF_INDIRECT_FUNCTION.
(bfd_decode_symclass): Likewise.
* elf.c (swap_out_syms): Translate BSF_INDIRECT_FUNCTION into
STT_IFUNC.
(elf_find_function): Treat STT_IFUNC in the same way as STT_FUNC.
(_bfd_elf_is_function_type): Likewise.
* elf32-arm.c (arm_elf_find_function): Likewise.
(elf32_arm_adjust_dynamic_symbol): Likewise.
(elf32_arm_swap_symbol_in): Likewise.
(elf32_arm_additional_program_headers): Likewise.
* elf32-i386.c (is_indirect_symbol): New function.
(elf_i386_check_relocs): Also generate dynamic relocs for
relocations against STT_IFUNC symbols.
(allocate_dynrelocs): Likewise.
(elf_i386_relocate_section): Likewise.
* elf64-x86-64.c (is_indirect_symbol): New function.
(elf64_x86_64_check_relocs): Also generate dynamic relocs for
relocations against STT_IFUNC symbols.
(allocate_dynrelocs): Likewise.
(elf64_x86_64_relocate_section): Likewise.
* elfcode.h (elf_slurp_symbol_table): Translate STT_IFUNC into
BSF_INDIRECT_FUNCTION.
* elflink.c (_bfd_elf_adjust_dynamic_reloc_section): Add support
for STT_IFUNC symbols.
(get_ifunc_reloc_section_name): New function.
(_bfd_elf_make_ifunc_reloc_section): New function.
* elf-bfd.h (struct bfd_elf_section_data): Add indirect_relocs field.
* bfd-in2.h: Regenerate.
gas/
* config/obj-elf.c (obj_elf_type): Add support for STT_IFUNC type.
* doc/as.texinfo: Document new feature.
* NEWS: Mention new feature.
gas/testsuite/
* gas/elf/type.s: Add test of STT_IFUNC symbol type.
* gas/elf/type.e: Update expected disassembly.
* gas/elf/elf.exp: Update grep of symbol types.
ld/
* NEWS: Mention new feature.
* pe-dll.c (process_def_file): Replace use of redundant
BFD_FORT_COMM_DEFAULT_VALUE with 0.
* scripttempl/elf.sc: Add .rel.ifunc.dyn and .rela.ifunc.dyn
sections.
ld/testsuite/
* ld-mips-elf/reloc-1-n32.d: Updated expected output for reloc
descriptions.
* ld-mips-elf/reloc-1-n64.d: Likewise.
* ld-i386/ifunc.d: New test.
* ld-i386/ifunc.s: Source file for the new test.
* ld-i386/i386.exp: Run the new test.
2008-12-03 14:51:00 +00:00
3aa3176b2d
* aoutx.h (NAME): Add case statements for bfd_mach_mips14000,
...
bfd_mach_mips16000.
* archures.c (bfd_architecture): Add .#defines for bfd_mach_mips14000,
bfd_mach_mips16000.
* bfd-in2.h: Regenerate.
* cpu-mips.c: Add enums I_mips14000, I_mips16000.
(arch_info_struct): Add refs to R14000, R16000.
* elfxx-mips.c (mips_set_isa_flags): Handle bfd_mach_mips14000,
bfd_mach_mips16000.
(mips_mach_extensions): Map R14000, R16000 to R10000.
* config/tc-mips.c (hilo_interlocks): Handle CPU_R14000, CPU_R16000.
(mips_cpu_info_table): Add r14000, r16000.
* doc/c-mips.texi: Add entries for 14000, 16000.
* mips-dis.c (mips_arch_choices): Add r14000, r16000.
* mips.h: Define CPU_R14000, CPU_R16000.
(OPCODE_IS_MEMBER): Include R14000, R16000 in test.
2008-11-28 18:02:17 +00:00
95beeee886
*c-cr16.texi (cr16-operand specifiers): Add got/GOT and cgot/cGOT.
2008-11-27 12:01:26 +00:00
793c580792
Change documentation license to FDL v1.3
2008-11-19 16:22:48 +00:00
ccf8a69b9c
* doc/as.texinfo (Pseudo Ops): Swap order of Comm and CFI menu entries.
...
(Altmacro, Comm, Loc, Loc_mark_labels, List, MRI, PopSection, Sleb128):
Moved into alphabetical order.
2008-10-09 18:12:29 +00:00
884f0d36b4
* doc/as.texinfo (Dot): Expand no-space-dir conditional to include
...
a complete sentence.
(Pseudo Ops): Put conditionals around Skip and Space menu entries.
(Line): Remove conditional declaration of Ln node and section here.
Put aout-bout description inside the no-line-dir conditional.
(Skip, Space): Use a separate conditional for each node.
2008-10-09 18:10:44 +00:00
14082c7624
* doc/as.texinfo (Pseudo Ops): Remove no-file-dir conditional around
...
menu entry for File; remove version-specific .file operands from menu
description. Replace "LNS directives" menu entry with new entries
for "Loc" and "Loc_mark_labels".
(LNS directives): Split into separate nodes for each directive.
(Loc): New node for .loc directive. Mention that this directive
is for DWARF2 and add a missing article.
(Loc_mark_labels): Likewise for .loc_mark_labels.
(File): Change this node to describe both the default version and
the DWARF2 version of .file. Move the no-file-dir conditional to
include only the default version.
2008-10-09 18:08:10 +00:00
77cca80fe3
PR 6944
...
* doc/as.texinfo (Dollar Local Labels): Correct description of
dollar local labels to show that the colon suffix is still
needed.
2008-10-09 15:12:56 +00:00
97c4f2d9c9
2008-10-07 H.J. Lu <hongjiu.lu@intel.com>
...
* read.c (pseudo_set): Don't allow global register symbol only
if TC_GLOBAL_REGISTER_SYMBOL_OK is undefined.
* symbols.c (S_SET_EXTERNAL): Likewise.
* config/tc-mmix.h (TC_GLOBAL_REGISTER_SYMBOL_OK): Defined.
* doc/internals.texi: Document TC_GLOBAL_REGISTER_SYMBOL_OK.
2008-10-07 14:21:59 +00:00
4d4175aff7
* doc/as.texinfo (Local): New description of ELF .local directive.
2008-10-06 17:31:39 +00:00
718a6fd816
* configure: Regenerate for new libtool.
...
* aclocal.m4: Ditto.
* Makefile.in: Ditto.
* doc/Makefile.in: Ditto.
2008-09-29 15:34:33 +00:00
f1c4cc7516
include/
...
* elf/dwarf2.h (DW_OP_GNU_encoded_addr): New.
binutils/
* dwarf.c (size_of_encoded_value, get_encoded_value): Move up.
(decode_location_expression): Add section parameter. Handle
DW_OP_GNU_encoded_addr.
(read_and_display_attr_value): Update decode_location_expression call.
(display_debug_loc, display_debug_frames): Likewise.
gas/
* dw2gencfi.c (DWARF2_ADDR_SIZE): Provide default.
(struct cfi_insn_data): Add ea member.
(CFI_val_encoded_addr, dot_cfi_val_encoded_addr): New.
(output_cfi_insn): Handle CFI_val_encoded_addr.
(select_cie_for_fde): Don't match CFI_val_encoded_addr.
* doc/as.texinfo (.cfi_val_encoded_addr): Document.
2008-09-24 23:21:04 +00:00
5db484ff3d
* write.c (TC_FORCE_RELOCATION_SUB_LOCAL): Heed md_register_arithmetic.
...
(TC_VALIDATE_FIX_SUB): Likewise.
* config/tc-frv.h (TC_FORCE_RELOCATION_SUB_LOCAL): Likewise.
* config/tc-hppa.h (TC_FORCE_RELOCATION_SUB_LOCAL): Likewise.
* config/tc-mn10300.h (TC_VALIDATE_FIX_SUB): Likewise.
* config/tc-sh.h (TC_VALIDATE_FIX_SUB): Likewise.
(TC_FORCE_RELOCATION_SUB_LOCAL): Likewise.
* config/tc-sh64.h (TC_VALIDATE_FIX_SUB): Likewise.
* config/tc-xtensa.h (TC_VALIDATE_FIX_SUB): Likewise.
* doc/internals.texi (TC_FORCE_RELOCATION_SUB_ABS,
TC_FORCE_RELOCATION_SUB_LOCAL, TC_VALIDATE_FIX_SUB): Show new param.
2008-09-19 10:00:40 +00:00
704209c00f
Make new functions static.
...
Rearrange wording of documentation.
2008-09-03 15:44:33 +00:00
a6c24e68b9
* config/tc-i386.c (pe_lcomm_internal): New function. Allows the
...
alignment field of the .lcomm directive to be optional.
(pe_lcomm): New function. Pass pe_lcomm_internal to
s_comm_internal.
(md_pseudo_table): Implement .lcomm directive for COFF based
targets.
* doc/c-i386.texi (i386-Directives): New node. Used to document
the .lcomm directive.
2008-09-03 14:02:30 +00:00
c879dfc576
* config/tc-avr.c (mcu_types): Add atmega16u4.
...
* doc/c-avr.texi: Likewise.
2008-08-29 16:58:02 +00:00
7da4f750f8
* c-arm.texi: Add tutorial on ARM unwinding pseudo ops.
2008-08-26 16:02:59 +00:00
7357c5b6a6
PR 6526
...
* configure.in: Invoke AC_USE_SYSTEM_EXTENSIONS.
2008-08-15 08:31:52 +00:00
9e9a97982d
* doc/as.texinfo (Align): Document the PowerPC behaviour.
2008-08-13 02:50:41 +00:00
5a49b8acf4
Banish PARAMS and PTR. Convert to ISO C.
...
Delete unnecessary forward declarations.
2008-08-12 23:39:31 +00:00
818236e51d
PR 6575
...
* hash.c: Expand PTR to void *.
(hash_delete): Add "freeme" parameter. Call obstack_free.
* hash.h: Expand PTR to void *.
(hash_delete): Update prototype.
* macro.c (macro_expand_body): hash_delete LOCALs from formal_hash.
* config/tc-tic54x.c (tic54x_remove_local_label): Update hash_delete
call.
(subsym_substitute): Likewise.
* doc/internals.texi (hash_delete): Update.
2008-08-11 07:40:22 +00:00
7b21ac3f45
Add AVR architectures avr25, avr31, avr35, and avr51 to match GCC.
...
bfd/
* archures.c (bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35,
bfd_mach_avr51): New.
* bfd-in2.h: Regenerate.
* cpu-avr.c (arch_info_struct): Add avr25, avr31, avr35, and avr51
architectures. Change comments to match architecture comments in GCC.
(compatible): Add test for new AVR architectures.
* elf32-avr.c (bfd_elf_avr_final_write_processing): Recognize
bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35 and bfd_mach_avr51.
(elf32_avr_object_p): Recognize E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
E_AVR_MACH_AVR35 and E_AVR_MACH_AVR51.
gas/
* config/tc-avr.c (mcu_types): Add avr25, avr31, avr35, and avr51
architectures. Reorganize list to put mcu types in correct architectures
and to order list same as in GCC. Use new ISA definitions in
include/opcode/avr.h.
* doc/c-avr.texi: Add avr25, avr31, avr35, and avr51 architecture
descriptions. Reorganize descriptions to put mcu types in correct
architectures and to order lists same as in GCC.
include/
* elf/avr.h (E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
E_AVR_MACH_AVR35, E_AVR_MACH_AVR51): Define.
(EF_AVR_MACH): Redefine to 0x7F.
* opcode/avr.h (AVR_ISA_TINY3, AVR_ISA_ALL, AVR_ISA_USB162): Remove.
(AVR_ISA_AVR3): Redefine.
(AVR_ISA_AVR1, AVR_ISA_AVR2, AVR_ISA_AVR31, AVR_ISA_AVR35,
AVR_ISA_AVR3_ALL, AVR_ISA_AVR4, AVR_ISA_AVR5, AVR_ISA_AVR51,
AVR_ISA_AVR6): Define.
ld/
* Makefile.am (ALL_EMULATIONS): Add eavr25.o, eavr31.o, eavr35.o,
and eavr51.o.
Add rules for eavr25.c, eavr31.c, eavr35.c, eavr51.c.
* Makefile.in: Regenerate.
* configure.tgt (avr-*-*, targ_extra_emuls): Add avr25, avr31, avr35
and avr51.
* emulparams/avr25.sh: New file.
* emulparams/avr31.sh: New file.
* emulparams/avr35.sh: New file.
* emulparams/avr51.sh: New file.
2008-08-09 05:35:13 +00:00
c3c3645668
* doc/internals.texi (DWARF2_FORMAT): Update for 2008-08-04 change.
2008-08-08 07:38:49 +00:00
6fd4f6ccfe
* NEWS: Mention these changes.
...
* config/tc-h8300.h (H_TICK_HEX): Define.
* config/tc-h8300.c (OPTION_H_TICK_HEX): New.
(md_longopts): Add "-h-tick-hex".
(md_parse_option): Support it.
* doc/c-h8300.texi (H8/300 Options): Document it.
* doc/as.texinfo (Overview): Likewise.
* config/tc-sh.h (H_TICK_HEX): Define.
* config/tc-sh.c (OPTION_H_TICK_HEX): New.
(md_longopts): Add "-h-tick-hex".
(md_parse_option): Support it.
* doc/c-sh.texi (SH Options): Document it.
* doc/c-sh64.texi (SH64 Options): Document it.
* doc/as.texinfo (Overview): Likewise.
2008-08-06 15:42:15 +00:00
9b4e57660d
gas/
...
* config/tc-ppc.c (parse_cpu): Rename altivec_or_spe to retain_flags.
Handle -mvsx and -mpower7.
(md_show_usage): Document -mpower7 and -mvsx.
* doc/as.texinfo (Target PowerPC): Document -mvsx.
* doc/c-ppc.texi (PowerPC-Opts): Document -mvsx and -mpower7.
gas/testsuite/
* gas/ppc/power7.d: New.
* gas/ppc/power7.s: Likewise.
* gas/ppc/ppc.exp: Run power7 test.
include/opcode/
* ppc.h (PPC_OPCODE_VSX, PPC_OPERAND_VSR): New.
opcodes/
* ppc-dis.c (powerpc_init_dialect): Handle power7 and vsx options.
(print_insn_powerpc): Prepend 'vs' when printing VSX registers.
(print_ppc_disassembler_options): Document -Mpower7 and -Mvsx.
* ppc-opc.c (insert_xt6): New static function.
(extract_xt6): Likewise.
(insert_xa6): Likewise.
(extract_xa6: Likewise.
(insert_xb6): Likewise.
(extract_xb6): Likewise.
(insert_xb6s): Likewise.
(extract_xb6s): Likewise.
(XS6, XT6, XA6, XB6, XB6S, DM, XX3, XX3DM, XX1_MASK, XX3_MASK,
XX3DM_MASK, PPCVSX): New.
(powerpc_opcodes): Add opcodes "lxvd2x", "lxvd2ux", "stxvd2x",
"stxvd2ux", "xxmrghd", "xxmrgld", "xxpermdi", "xvmovdp", "xvcpsgndp".
2008-08-02 04:38:51 +00:00
Andreas Schwab
Nick Clifton
xuepeng guo
H.J. Lu
Sandra Loosemore
Peter Bergner
Kai Tietz
Nagajyothi Eggone
Andreas Krebbel
James Lemke
Maciej W. Rozycki
Walter Lee
Matthew Gretton-Dann
Roland McGrath
DJ Delorie
David S. Miller
Maxim Kuvyrkov
Thomas Schwinge
Alan Modra
Paul Brook
Andrew Pinski
Joern Rennecke
Richard Sandiford
Hans-Peter Nilsson
Quentin Neill
Bernd Schmidt
Eric B. Weddington
Mike Frysinger
Nathan Sidwell
Sterling Augustine
Joseph Myers
David Daney
Jie Zhang
Cary Coutant
Tristan Gingold
Daniel Jacobowitz
Sebastian Pop
Dave Korn
Ralf Wildenhues
Daniel Gutson
Jakub Jelinek
Nick Hudson
Ben Elliston
Jan Beulich
Catherine Moore
Martin Schwidefsky
Andrew Stubbs
Thiemo Seufer
M R Swami Reddy
Bob Wilson
Steve Ellcey
Richard Henderson
Mark Mitchell