Commit Graph

855 Commits

Author SHA1 Message Date
Aldy Hernandez 914749f6ed 2002-12-04 Aldy Hernandez <aldyh@redhat.com>
* ppc-opc.c (PMRN): Remove.
	(RA): Set to NB + 1.
	(powerpc_opcodes): Change PMRN to SPR.
	Change all RD to RS.
	Change mftb to look like mftbl.
	Move mftb before mftbl.
	Add mfbbtar.
	Add mtbbtar.
	Change mfpmr to use PMR.
	Change mtpmr to use PMR.
	(RD): Remove.
	(insert_ev2): Fix mask and shift.
	(extract_ev2): Same.
	(insert_ev4): Same.
	(extract_ev4): Same.
	(PMR): Define.
	(extract_pmrn): Remove.
	(insert_pmrn): Remove.
2002-12-04 17:29:47 +00:00
Richard Henderson a823923bf6 include/opcode/
* ia64.h (enum ia64_opnd): Add IA64_OPND_LDXMOV.
bfd/
        * cpu-ia64-opc.c (elf64_ia64_operands): Add ldxmov entry.
opcodes/
        * ia64-opc-m.c: Add ld8.mov.
        * ia64-asmtab.c: Regenerate.
gas/
        * config/tc-ia64.c (operand_match): Add IA64_OPND_LDXMOV case.
gas/testsuite/
        * gas/ia64/ldxmov-1.[ds]: New.
        * gas/ia64/ldxmov-2.[ls]: New.
        * gas/ia64/ia64.exp: Run them.
2002-12-03 18:15:48 +00:00
Alan Modra 98f70fc4f0 * cgen-dis.in: Include libiberty.h.
* fr30-desc.c: Regenerate.
	* fr30-dis.c: Regenerate.
	* frv-desc.c: Regenerate.
	* frv-dis.c: Regenerate.
	* ip2k-asm.c: Regenerate.
	* ip2k-desc.c: Regenerate.
	* ip2k-dis.c: Regenerate.
	* ip2k-opc.c: Regenerate.
	* ip2k-opc.h: Regenerate.
	* m32r-desc.c: Regenerate.
	* m32r-dis.c: Regenerate.
	* openrisc-desc.c: Regenerate.
	* openrisc-dis.c: Regenerate.
	* xstormy16-asm.c: Regenerate.
	* xstormy16-desc.c: Regenerate.
	* xstormy16-dis.c: Regenerate.
2002-12-02 21:58:19 +00:00
Alan Modra 6a51a8a8d3 * arm-dis.c (print_insn_arm): Constify "insn". Formatting.
(print_insn_thumb): Likewise.
	* h8500-dis.c (print_insn_h8500): Constify "opcode".
	* mcore-dis.c (print_insn_mcore): Constify "op".  Formatting.
	* ns32k-dis.c (print_insn_arg <case 'F'>): Use a union to avoid
	type-punned pointer warnings.
	<case 'L'>: Likewise.  Fix error message too.
	* pdp11-dis.c (print_reg): Warning fix.
	* sh-dis.c (print_movxy): Constify "op" param.
	(print_insn_ddt): Constify sh_opcode_info vars.
	(print_insn_ppi): Likewise.
	(print_insn_sh): Likewise.
	* tic30-dis.c (cnvt_tmsfloat_ieee): Use a union to avoid
	type-punned pointer warnings.
	* w65-dis.c (print_insn_w65): Constify "op".
2002-12-02 13:13:37 +00:00
Stephane Carrez 2fd84db331 * m68hc11-dis.c (PC_REGNUM): Define.
(print_indexed_operand): Need an adjustment for some PC-relative
	operand modes; print the final address of PC-relative modes.
	(print_insn): Take into account movw/movb to adjust the PC-relative
	operand addresses.
2002-12-01 09:53:21 +00:00
Alan Modra b34976b65a s/boolean/bfd_boolean/ s/true/TRUE/ s/false/FALSE/. Simplify
comparisons of bfd_boolean vars with TRUE/FALSE.  Formatting.
2002-11-30 08:39:46 +00:00
DJ Delorie 9967baf0b2 * xstormy16-opc.c: Regenerate. 2002-11-25 21:15:04 +00:00
Jim Wilson 97dd3f1856 Patch from Kenneth Chen to fix brl disassembly.
* ia64-dis.c (print_insn_ia64): Correct handling of IA64_OPND_TGT64.
2002-11-25 19:59:29 +00:00
DJ Delorie 193eb15dba * xstormy16-desc.c: Regenerate.
* xstormy16-opc.c: Regenerate.
* xstormy16-opc.h: Regenerate.
2002-11-20 03:15:10 +00:00
Klee Dienes 11041102f2 2002-11-12 Klee Dienes <kdienes@apple.com>
* avr-dis.c: Include libiberty.h (for xmalloc).
	(struct avr_opcodes_s): Remove 'bin_mask' field (it's
	automatically computed in the init routine).
	(AVR_INSN): No longer provide bin_mask field in initializer.
	(avr_opcodes_s): Declare as const.
	(print_insn_avr): Store the bin_mask field in a separate table
	(allocated with xmalloc); iterate through it at the same time as
	we iterate through the opcodes.
2002-11-18 16:54:08 +00:00
Klee Dienes a3e64b75ca 2002-11-11 Klee Dienes <kdienes@apple.com>
* h8300.h (h8_opcode): Remove 'length' field.
	(h8_opcodes): Mark as 'const' (both the declaration and
	definition).  Modify initializer and initializer macros to no
	longer initialize the length field.

2002-11-11  Klee Dienes  <kdienes@apple.com>

	* h8300-dis.c: Include libiberty.h (for xmalloc).
	(struct h8_instruction): New type, used to wrap h8_opcodes with a
	length field (computed at run-time).
	(h8_instructions): New variable.
	(bfd_h8_disassemble_init): Allocate the storage for
	h8_instructions.  Fill h8_instructions with pointers to the
	appropriate opcode and the correct value for the length field.
	(bfd_h8_disassemble): Iterate through h8_instructions instead of
	h8_opcodes.
2002-11-18 16:52:46 +00:00
Klee Dienes 84037f8c66 2002-11-18 Klee Dienes <kdienes@apple.com>
* arc.h (arc_ext_opcodes): Declare as extern.
	(arc_ext_operands): Declare as extern.
	* i860.h (i860_opcodes): Declare as const.

2002-11-18  Klee Dienes  <kdienes@apple.com>

	* arc-opc.c (arc_ext_opcodes): Define.
	(arc_ext_operands): Define.
	* i386-dis.c (Suffix3DNow): Declare as const.
	* arm-opc.h (arm_opcodes): Declare as const.
	(thumb_opcodes): Declare as const.
	* h8500-opc.h (h8500_table): Declare as const.
	(h8500_table): Use a NULL for the opcode in the terminator, so
	that code testing (opcode->name) behaves correctly.
	* mcore-opc.h (mcore_table): Declare as const.
	* sh-opc.h (sh_table): Declare as const.
	* w65-opc.h (optable): Declare as const.
	* z8k-opc.h (z8k_table): Declare as const.
2002-11-18 16:50:05 +00:00
Svein Seldal 9c87d6c7e4 * gas/config/tc-tic4x.c: Fixed proper commandline
parameters. Added support for new opcode-list format. General
	error message fixups.
	(c4x_inst_add): Reject insn not for our CPU
	(md_begin): Added matrix for setting the proper opcode-level &
	device-flags according to cpu type and revision. Rewrite the
	opcode hasher.
	(c4x_operand_parse): Fix opcode bug
	(c4x_operands_match): New function argument. Added dry-run
	mechanism, that is optional error generation. Added constraint 'i'
	and 'j'.
	(c4x_insn_check): Added new function for post-verification of the
	generated insn.
	(md_assemble): Check all opcodes before croaking because of an
	argument mismatch. Need this to be able to fully support
	ortogonally arguments.
	(md_parse_options): Revised commandprompt swicthes and added new
	ones.
	(md_show_usage): Complete rewrite of printout.
	* gas/testsuite/gas/tic4x/addressing.s: Fix bug in one insn
	* gas/testsuite/gas/tic4x/addressing_c3x.d: Update thereafter
	* gas/testsuite/gas/tic4x/addressing_c4x.d: Update thereafter
	* gas/testsuite/gas/tic4x/allopcodes.S: Add support for new
	opclass.h changes
	* gas/testsuite/gas/tic4x/opclasses.h: Added testsuites for
	the new enhanced opcodes.
	* gas/testsuite/gas/tic4x/opcodes.s: Regenerate
	* gas/testsuite/gas/tic4x/opcodes_c3x.d: Update from above
	* gas/testsuite/gas/tic4x/opcodes_c4x.d: Update from above
	* gas/testsuite/gas/tic4x/opcodes_new.d: Added new testsuite for
	the enhanced and special insns.
	* gas/testsuite/gas/tic4x/tic4x.exp: Added the opcodes_new testsuite
	* include/opcode/tic4x.h: File reordering. Added enhanced opcodes.
	* opcodes/tic4x-dis.c: Added support for enhanced and special
	insn.
	(c4x_print_op): Added insn class 'i' and 'j'
	(c4x_hash_opcode_special): Add to support special insn
	(c4x_hash_opcode): Update to support the new opcode-list
	format. Add support for the new special insns.
	(c4x_disassemble): New opcode-list support.
2002-11-18 09:09:35 +00:00
Klee Dienes c444c2f661 2002-11-16 Klee Dienes <kdienes@apple.com>
* m88k-dis.c: Include libiberty.h (for xmalloc).
        (HASHTAB): New type, used to build instruction hash tables.
        Contains a pointer to an INSTAB and a pointer to the next hash
        chain entry.
        (instructions): Move definition from m88k.h; remove initialization
        of 'next' field.
        (hashtable): Now an aray of pointer-to-HASHTAB, not INSTAB.
        (printop): Mark pointer to OPSPEC as const.
        (install): Remove; fold into init_disasm.
        (m88kdis): Update to ihashtab_initialized to 1 after calling
        init_disasm.  entry_ptr now iterates through HASHTABs, not
        INSTABs.
        (init_disasm): Iterate through the instructions and add to
        hashtable[].
2002-11-16 18:42:12 +00:00
Svein Seldal 44287f6039 * gas/config/tc-tic4x.c: Remove c4x_pseudo_ignore function.
(c4x_operands_match): Added check for 8-bits LDF insn. Give
	  warning when using constant direct bigger than 2^16. Add the new
	  arguments.
	* include/opcode/tic4x.h: Major rewrite of entire file. Define
	  instruction classes, and put each instruction into a class.
	* opcodes/tic4x-dis.c: (c4x_print_op): Add support for the new
	  argument format. Fix bug in 'N' register printer.
2002-11-16 12:23:23 +00:00
Alan Modra 8b4fa15520 * ppc-dis.c (print_insn_powerpc): Correct condition register display. 2002-11-12 04:03:31 +00:00
Aldy Hernandez ced05688d4 2002-11-07 Aldy Hernandez <aldyh@redhat.com>
* ppc-opc.c (EVUIMM_4): Change bit size to 32.
	(EVUIMM_2): Same.
	(EVUIMM_8): Same.
2002-11-08 00:46:21 +00:00
Aldy Hernandez 95e172a508 2002-11-07 Aldy Hernandez <aldyh@redhat.com>
* ppc-opc.c (EVUIMM_4): Change bit size to 32.
	(EVUIMM_2): Same.
2002-11-07 23:43:50 +00:00
Nick Clifton bde78a07b9 Convert ia64-gen to use getopt(). Add standard GNU options plus --srcdir.
Convert Makefile.am to pass --srcdir to ia64-gen.  Fix compile time warnings.
2002-11-07 14:33:48 +00:00
Aldy Hernandez fe58797755 2002-11-06 Aldy Hernandez <aldyh@redhat.com>
* opcodes/ppc-opc.c: Change RD to RS for evmerge*.
2002-11-07 00:54:09 +00:00
Nick Clifton d3c866d1d8 Add conditional/unconditional branch classification. 2002-10-23 15:45:49 +00:00
Stephane Carrez ac8c616a59 * m68hc11-dis.c (print_insn): Treat bitmask and branch operands
at the end.
2002-10-13 09:01:54 +00:00
Richard Sandiford 9752cf1b67 [include/opcode/]
* mips.h: Update comment for new opcodes.
	(OP_MASK_VECBYTE, OP_SH_VECBYTE): New.
	(OP_MASK_VECALIGN, OP_SH_VECALIGN): New.
	(INSN_4111, INSN_4120, INSN_5400, INSN_5500): New.
	(CPU_VR4120, CPU_VR5400, CPU_VR5500): New.
	(OPCODE_IS_MEMBER): Handle the new CPU_* values and INSN_* flags.
	Don't match CPU_R4111 with INSN_4100.

[opcodes/]
	* mips-dis.c (print_insn_arg): Handle '[', ']', 'e' and '%'.
	(mips_isa_type): Handle bfd_mach_mips4120, bfd_mach_mips5400
	and bfd_mach_mips5500.
	* mips-opc.c (V1): Include INSN_4111 and INSN_4120.
	(N411, N412, N5, N54, N55): New convenience defines.
	(mips_builtin_opcodes): Add vr4120, vr5400 and vr5500 opcodes.
	Change dmadd16 and madd16 from V1 to N411.
2002-09-30 11:58:10 +00:00
Thiemo Seufer 3396de367a /gas/ChangeLog
* config/tc-mips.c (CPU_HAS_MIPS16): Add mips-lsi-elf as MIPS16
	capable configuration.
	(macro_build): Check for MIPS16 capability, not for actual MIPS16 code
	generation.
	(mips_ip): Likewise.

	/gas/testsuite/ChangeLog
	* gas/mips/mips-jalx.d: New file, check jalx assembly.
	* gas/mips/mips-jalx.s: Likewise.
	* gas/mips/mips-no-jalx.l: Likewise.
	* gas/mips/mips-no-jalx.s: Likewise.
	* gas/mips/mips16-jalx.d: Likewise.
	* gas/mips/mips16-jalx.s: Likewise.
	* gas/mips/mips.exp: Add new tests.

	/opcodes/ChangeLog:
	* mips-dis.c (print_insn_mips): Always allow disassembly of
	32-bit jalx opcode.
2002-09-26 09:56:35 +00:00
Nick Clifton 1a40396432 Updated German translation. 2002-09-24 13:00:33 +00:00
Alan Modra 2d2550d688 * Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
	* po/POTFILES.in: Regenerate.
2002-09-21 10:49:05 +00:00
Nick Clifton 0ec499f72c Allow CRFS and CRFD operands to accept CR register names 2002-09-20 15:44:23 +00:00
Alan Modra 4415b5c296 * tic4x-dis.c: Add function declarations and ATTRIBUTE_UNUSED.
Convert functions to K&R format.
2002-09-17 08:34:17 +00:00
Nick Clifton dde1b13223 Fix Book-E opcodes 2002-09-13 09:07:49 +00:00
Alan Modra 9ec878e367 * ppc-dis.c (powerpc_dialect): Add missing PPC_OPCODE_CLASSIC. 2002-09-12 03:58:37 +00:00
Nick Clifton e09f439535 Update translations 2002-09-11 13:52:17 +00:00
Nick Clifton 341026c1c1 Do not insert non-BookE32 instructions into the hash table if the target cpu
is the BookE32. (case 107575)
2002-09-04 12:37:30 +00:00
Nick Clifton 07dd56a969 Have objdump's --help switch document PPC -M options. 2002-09-04 10:08:08 +00:00
Nick Clifton 2e32aab953 The BookE implementations of the TLBWE and TLBRE instructions do not take any
arguments.
2002-09-04 09:59:48 +00:00
Nick Clifton bf5be08227 Remove redundant references to V850EA architecture. 2002-09-02 11:44:39 +00:00
Alan Modra d943fe33c6 * arc-opc.c: Include bfd.h.
(arc_get_opcode_mach): Subtract off base bfd_mach value.
2002-09-02 06:00:05 +00:00
Alan Modra 53f32ea5c6 * v850-dis.c (disassemble): Remove bfd_mach_v850ea case.
* mips-dis.c (_print_insn_mips): Don't use hard-coded mach constants.
2002-08-30 08:28:08 +00:00
Nick Clifton 026df7c5e6 Add TMS320C4x support 2002-08-28 10:38:51 +00:00
Nick Clifton 1489984027 opcodes: Fix definition of "in rd,imm16" opcode.
gas: Adjust ptr variable also in "case 0" case.
2002-08-22 19:22:35 +00:00
Elena Zannoni 2397604975 2002-08-19 Elena Zannoni <ezannoni@redhat.com>
From  matthew green  <mrg@redhat.com>

        * ppc-dis.c (powerpc_dialect): Support `-m500', `-m500x2' and
        `-mefs'. Turn off AltiVec for E500 and efs.
        (print_insn_powerpc): Don't print an AltiVec instruction if the
        dialect is not efs.

        * ppc-opc.c (insert_pmrn, extract_pmrn, insert_ev2, extract_ev2,
        insert_ev4, extract_ev4, insert_ev8, extract_ev8): New functions
        for extracting pmrn/evld/evstd/etc operands.
        (CRB, CRFD, CRFS, DC, RD): New instruction fields.
        (CT): Make this equal to RD + 1.
        (PMRN): New operand.
        (RA): Update.
        (EVUIMM, EVUIMM_2, EVUIMM_4, EVUIMM_8): New operands.
        (WS): Update.
        (EVSEL, EVSEL_MASK): New instruction form and mask for EVSEL.
        (ISEL, ISEL_MASK): New instruction form and mask for ISEL.
        (XISEL, XISEL_MASK): New instruction form and mask for ISEL.
        (CTX, CTX_MASK): New instruction form and mask for context cache
        instructions.
        (UCTX, UCTX_MASK): New instruction form and mask for user context
        cache instructions.
        (XC, XC_MASK, XUC, XUC_MASK): New instruction forms.
        (CLASSIC): New define.
        (PPCESPE): New define.
        (PPCISEL, , PPCBRLK, PPCPMR, PPCCHLK, PPCRFMI): New
        defines for integer select, cache control, branch
        locking, power management, cache locking and machine check
        APU instructions, respectively.
        (efsabs, efsnabs, efsneg, efsadd, efssub, efsmul,
        efsdiv, efscmpgt, efscmplt, efscmpeq, efststgt, efststlt,
        efststeq, efscfui, efsctuiz, efscfsi, efscfuf, efscfsf,
        efsctui, efsctsi, efsctsiz, efsctuf, efsctsf,
        evaddw, evaddiw, evsubfw, evsubifw, evabs, evneg, evextsb,
        evextsh, evrndw, evcntlzw, evcntlsw, brinc, evand, evandc, evor,
        evorc, evxor, eveqv, evnand, evnor, evrlw, evrlwi, evslw, evslwi,
        evsrws, evsrwu, evsrwis, evsrwiu, evsplati, evsplatfi, evmergehi,
        evmergelo, evmergehilo, evmergelohi, evcmpgts, evcmpgtu, evcmplts,
        evcmpltu, evcmpeq, evsel, evldd, evlddx, evldw, evldwx, evldh,
        evldhx, evlwhe, evlwhex, evlwhou, evlwhoux, evlwhos, evlwhosx,
        evlwwsplat, evlwwsplatx, evlwhsplat, evlwhsplatx, evlhhesplat,
        evlhhesplatx, evlhousplat, evlhousplatx, evlhossplat, evlhossplatx,
        evstdd, evstddx, evstdw, evstdwx, evstdh, evstdhx, evstwwe,
        evstwwex, evstwwo, evstwwox, evstwhe, evstwhex, evstwho, evstwhox,
        evfsabs, evfsnabs, evfsneg, evfsadd, evfssub, evfsmul, evfsdiv,
        evfscmpgt, evfscmplt, evfscmpeq, evfststgt, evfststlt, evfststeq,
        evfscfui, evfsctuiz, evfscfsi, evfscfuf, evfscfsf, evfsctui,
        evfsctsi, evfsctsiz, evfsctuf, evfsctsf, evsabs, evsnabs, evsneg,
        evsadd, evssub, evsmul, evsdiv, evscmpgt, evsgmplt, evsgmpeq,
        evststgt, evststlt, evststeq, evscfui, evscfsi, evscfuf, evscfsf,
        evsctui, evsctuiz, evsctsi, evsctsiz, evsctuf, evsctsf, evmhossf,
        evmhossfa, evmhosmf, evmhosmfa, evmhosmi, evmhosmia, evmhoumi,
        evmhoumia, evmhessf, evmhessfa, evmhesmf, evmhesmfa, evmhesmi,
        evmhesmia, evmheumi, evmheumia, evmhossfaaw, evmhossiaaw,
        evmhosmfaaw, evmhosmiaaw, evmhousiaaw, evmhoumiaaw, evmhessfaaw,
        evmhessiaaw, evmhesmfaaw, evmhesmiaaw, evmheusiaaw, evmheumiaaw,
        evmhossfanw, evmhossianw, evmhosmfanw, evmhosmianw, evmhousianw,
        evmhoumianw, evmhessfanw, evmhessianw, evmhesmfanw, evmhesmianw,
        evmheusianw, evmheumianw, evmhogsmfaa, evmhogsmiaa, evmhogumiaa,
        evmhegsmfaa, evmhegsmiaa, evmhegumiaa, evmhogsmfan, evmhogsmian,
        evmhogumian, evmhegsmfan, evmhegsmian, evmhegumian, evmwhssf,
        evmwhssfa, evmwhssfaa, evmwhssmaa, evmwhsmfaa, evmwhsmiaa,
        evmwhusiaa, evmwhumiaa, evmwhssfan, evmwhssian, evmwhsmfan,
        evmwhsmian, evmwhusian, evmwhumian, evmwhgssfaa, evmwhgsmfaa,
        evmwhgsmiaa, evmwhgumiaa, evmwhgssfan, evmwhgsmfan, evmwhgsmian,
        evmwhgumian, evmwhsmf, evmwhsmfa, evmshsmi, evmshsmia, evmshumi,
        evmshumia, evmmlssf, evmmlssfa, evmwlsmf, evmwlsmfa, evmwlumi,
        evmwlumia, evmwlssfaaw, evmwlssiaaw, evmwlsmfaaw, evmwlsmiaaw,
        evmwlusiaaw, evmwlumiaaw, evmwissfanw, evmwissianw, evmwlsmfanw,
        evmwlsmianw, evmwlusianw, evmwlumianw, evmwssf, evmwssfa,
        evmwsmf, evmwsmfa, evmwsmi, evmwsmia, evmwumi, evmwumia,
        evmwssfaa, evmwsmfaa, evmwsmiaa, evmwumiaa, evmwssfan, evmwsmfan,
        evmwsmian, evmwumian, evaddssiaaw, evaddsmiaaw, evaddusiaaw,
        evaddumiaaw, evsubfssiaaw, evsubfsmiaaw, evsubfusiaaw,
        evsubfumiaaw, evmra, evdivws, evdivws): New e500x2 Core Complex
        instructions.
        (rfmci): New machine check APU instruction.
        (isel): New integer select APU instructino.
        (icbtls, icbtlse, icblc, icblce, dcbtls, dcbtlse, dcbtstls,
        dcbtstlse, dcblc, dcblce): New cache control APU instructions.
        (mtspefscr, mfspefscr): New instructions.
        (mfpmr, mtpmr): New performance monitor APU instructions.
        (savecontext): New context cache APU instructions.
        (bblels, bbelr): New branch locking APU instructions.
        (bblels, bbelr): New instructions.
        (mftbl, mftbu, mftb): Set as CLASSIC instructions.  Add BOOKE alias.
2002-08-19 20:59:10 +00:00
Stephane Carrez 7eccd7f6f1 * m68hc11-opc.c: Update call operand to accept the page definition.
Identify instructions that are branches and calls to generate a
	RL_JUMP relocation.
2002-08-13 19:09:01 +00:00
Stephane Carrez f07534f64e * m68hc11-dis.c (print_insn): Take into account 68HC12 memory
banks and fix disassembling of call instruction.
	(print_indexed_operand): New param to tell whether
	it was an indirect addressing operand (for disassembling call).
2002-08-13 19:01:25 +00:00
Nick Clifton 2b692c5912 Updated Swedish translation 2002-08-09 15:07:57 +00:00
Maciej W. Rozycki 0c11417f42 * config/tc-mips.c (macro): Handle a register plus a 16-bit
immediate offset in "dla" and "la" expansions.
* gas/mips/empic.d: Treat "addiu" and "daddiu" as equivalent when
$0 is source.
* mips-opc.c (mips_builtin_opcodes): Remove "dla" and "la" as
aliases to "daddiu" and "addiu".
2002-08-09 11:07:24 +00:00
Nick Clifton 83e1617e06 Updated Translations 2002-07-30 15:53:18 +00:00
Nick Clifton 219576a4db New translations 2002-07-25 10:31:28 +00:00
Nick Clifton ff3063f557 Update Spanish and Swedish translations 2002-07-24 09:34:08 +00:00
Alan Modra 8c3bb577a6 * Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
	* po/POTFILES.in: Regenerate.
2002-07-23 12:42:32 +00:00
Nick Clifton 2c71db8993 oops - omitted from previous delta 2002-07-23 09:59:47 +00:00
Nick Clifton 0461a601af update translations. 2002-07-23 09:58:05 +00:00
Nick Clifton a40cbfa3c9 Add IP2k GAS and OPCODES support. 2002-07-19 07:52:40 +00:00
H.J. Lu ae66e5d720 2002-07-17 David Mosberger <davidm@hpl.hp.com>
* ia64-opc-b.c (bWhc): New macro.
	(mWhc): Ditto.
	(OpPaWhcD): Ditto.
	(ia64_opcodes_b): Correct patterns for indirect call
	instructions to use 3-bit "wh" field.
	* ia64-asmtab.c: Regnerate.
2002-07-17 07:27:40 +00:00
Thiemo Seufer aec421e08b * config/tc-mips.c (macro_build): Handle MIPS16 insns.
(mips_ip): Likewise.
	* mips.h (INSN_MIPS16): New define.
	* mips-dis.c (mips_isa_type): Add MIPS16 insn handling.
	* mips-opc.c (I16): New define.
	(mips_builtin_opcodes): Make jalx an I16 insn.
2002-07-09 14:21:40 +00:00
Dave Brolley fd3c93d5a7 2002-06-18 Dave Brolley <brolley@redhat.com>
* po/POTFILES.in: Add frv-*.[ch].
	* disassemble.c (ARCH_frv): New macro.
	(disassembler): Handle bfd_arch_frv.
	* configure.in: Support frv_bfd_arch.
	* Makefile.am (HFILES): Add frv-*.h.
	(CFILES): Add frv-*.c
	(ALL_MACHINES): Add frv-*.lo.
	(CLEANFILES): Add stamp-frv.
	(FRV_DEPS): New variable.
	(stamp-frv): New target.
	(frv-asm.lo): New target.
	(frv-desc.lo): New target.
	(frv-dis.lo): New target.
	(frv-ibld.lo): New target.
	(frv-opc.lo): New target.
	(frv-*.[ch]): New files.
2002-06-18 21:21:05 +00:00
Ben Elliston bc98a6310f * Makefile.am (CGENDEPS): Remove unnecessary stamp-cgen.
* Makefile.in: Regenerate.
2002-06-18 17:43:07 +00:00
Alan Modra 56da5fedc7 * a29k-dis.c: Replace CONST with const.
* h8300-dis.c: Likewise.
	* m68k-dis.c: Likewise.
	* or32-dis.c: Likewise.
	* sparc-dis.c: Likewise.
2002-06-08 07:29:27 +00:00
Jason Thorpe 5b0e55b627 bfd:
* Makefile.am (BFD32_BACKENDS): Add elf32-sh64-nbsd.lo.
(BFD32_BACKENDS_CFILES): Add elf32-sh64-nbsd.c.
(BFD64_BACKENDS): Add elf64-sh64-nbsd.lo.
(BFD64_BACKENDS_CFILES): Add elf64-sh64-nbsd.c.
(elf32-sh64-nbsd.lo, elf64-sh64-nbsd.lo): New rules.
* Makefile.in: Regenerate.
* config.bfd (sh5le-*-netbsd*, sh5-*-netbsd*, sh64le-*-netbsd*)
(sh64-*-netbsd*): New targets.
* configure.in: Add bfd_elf32_sh64nbsd_vec, bfd_elf32_sh64lnbsd_vec,
bfd_elf64_sh64nbsd_vec, and bfd_elf64_sh64lnbsd_vec.
* configure: Regenerate.
* elf32-sh64-nbsd.c: New file.
* elf64-sh64-nbsd.c: New file.
* targets.c: Add extern decls for bfd_elf32_sh64nbsd_vec,
bfd_elf32_sh64lnbsd_vec, bfd_elf64_sh64nbsd_vec, and
bfd_elf64_sh64lnbsd_vec.

gas:
* configure.in (sh5*): Set cpu_type to sh64 and endian to big.
(sh5le*, sh64le*): Set cpu_type to sh64 and endian to little.
(sh5*-*-netbsd*, sh64*-*-netbsd*): New targets.
* configure: Regenerate.
* config/tc-sh64.c (sh64_target_format): Add support for NetBSD
environment.

ld:
* Makefile.am (ALL_EMULATIONS): Add eshelf32_nbsd.o,
eshlelf32_nbsd.o, eshelf64_nbsd.o, and eshlelf64_nbsd.o.
(eshelf32_nbsd.c, eshelf64_nbsd.c, eshlelf32_nbsd.c)
(eshlelf64_nbsd.c): New rules.
* Makefile.in: Regenerate.
* configure.tgt (sh5le-*-netbsd*, sh5-*-netbsd*, sh64le-*-netbsd*)
(sh64-*-netbsd*): New targets.
* emulparams/shelf32_nbsd.sh: New file.
* emulparams/shelf64_nbsd.sh: New file.
* emulparams/shlelf32_nbsd.sh: New file.
* emulparams/shlelf64_nbsd.sh: New file.

opcodes:
* configure.in: Add "sh5*-*" to list of targets which include
sh64 support.
* configure: Regenerate.
2002-06-04 02:57:44 +00:00
Chris Demetriou 154bce22d5 2002-05-31 Chris G. Demetriou <cgd@broadcom.com>
* mips-opc.c: Clean up a few whitespace issues, and sort a
        few entries understanding that 'x' follows 'w' in the alphabet.
2002-05-31 20:46:07 +00:00
Chris Demetriou 107c6e1ad8 [ opcodes/ChangeLog ]
2002-05-31  Chris G. Demetriou  <cgd@broadcom.com>
            Ed Satterthwaite  <ehs@broadcom.com>

        * mips-opc.c: Add support for SB-1 MDMX subset and extensions.

[ gas/testsuite/ChangeLog ]
2002-05-31  Chris G. Demetriou  <cgd@broadcom.com>

        * gas/mips/sb1-ext-mdmx.s: New file.
        * gas/mips/sb1-ext-mdmx.d: Likewise.
        * gas/mips/mips.exp: Run new "sb1-ext-mdmx" test.
2002-05-31 18:27:03 +00:00
Alan Modra 194b521088 * Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
	* po/POTFILES.in: Regenerate.
2002-05-31 04:27:37 +00:00
Chris Demetriou deec17343c [ gas/ChangeLog ]
2002-05-30  Chris G. Demetriou  <cgd@broadcom.com>
            Ed Satterthwaite  <ehs@broadcom.com>

	* config/tc-mips.c (mips_set_options): New "ase_mdmx" member.
	(mips_opts): Initialize "ase_mdmx" member.
	(file_ase_mdmx): New variable.
	(CPU_HAS_MDMX): New macro.
	(md_begin): Initialize mips_opts.ase_mdmx and file_ase_mdmx
	based on command line options and configuration defaults.
	(macro_build): Note in comment that use of MDMX in macros is
	not currently allowed.
	(validate_mips_insn): Add support for the "O", "Q", "X", "Y", and
	"Z" MDMX operand types.
	(mips_ip): Accept MDMX instructions if mips_opts.ase_mdmx is set,
	and add support for the "O", "Q", "X", "Y", and "Z" MDMX operand
	types.
	(OPTION_MDMX, OPTION_NO_MDMX, md_longopts, md_parse_option):
	Add support for "-mdmx" and "-no-mdmx" options.
	(OPTION_ELF_BASE): Move to accomodate new options.
	(s_mipsset): Support ".set mdmx" and ".set nomdmx".
	(mips_elf_final_processing): Set MDMX ASE ELF header flag if
	file_ase_mdmx was set.
	* doc/as.texinfo: Document -mdmx and -no-mdmx options.
	* doc/c-mips.texi: Likewise, and document ".set mdmx" and ".set
	nomdmx" directives.

[ gas/testsuite/ChangeLog ]
2002-05-30  Chris G. Demetriou  <cgd@broadcom.com>

	* gas/mips/mips64-mdmx.s: New file.
	* gas/mips/mips64-mdmx.d: Likewise.
	* gas/mips/mips.exp: Run new "mips64-mdmx" test.

[ include/opcode/ChangeLog ]
2002-05-30  Chris G. Demetriou  <cgd@broadcom.com>

	* mips.h (OP_SH_ALN, OP_MASK_ALN, OP_SH_VSEL, OP_MASK_VSEL)
	(MDMX_FMTSEL_IMM_QH, MDMX_FMTSEL_IMM_OB, MDMX_FMTSEL_VEC_QH)
	(MDMX_FMTSEL_VEC_OB, INSN_READ_MDMX_ACC, INSN_WRITE_MDMX_ACC)
	(INSN_MDMX): New constants, for MDMX support.
	(opcode character list): Add "O", "Q", "X", "Y", and "Z" for MDMX.

[ opcodes/ChangeLog ]
2002-05-30  Chris G. Demetriou  <cgd@broadcom.com>
            Ed Satterthwaite  <ehs@broadcom.com>

	* mips-dis.c (print_insn_arg): Add support for 'O', 'Q', 'X', 'Y',
	and 'Z' formats, for MDMX.
        (mips_isa_type): Add MDMX instructions to the ISA
	bit mask for bfd_mach_mipsisa64.
	* mips-opc.c: Add support for MDMX instructions.
	(MX): New definition.

	* mips-dis.c: Update copyright years to include 2002.
2002-05-31 01:17:18 +00:00
Tom Rix c20129930b Fix for invalid conflict warning. 2002-05-30 15:25:37 +00:00
Nick Clifton d172d4ba03 Add DLX target 2002-05-28 14:08:47 +00:00
Alan Modra 19f33eeef5 * Makefile.am (sh-dis.lo): Don't put make commands in deps.
* Makefile.in: Regenerate.
	* arc-dis.c: Use #include "" instead of <> for local header files.
	* m68k-dis.c: Likewise.
2002-05-25 12:55:19 +00:00
Nick Clifton baf0cc5e96 Fix handling of BLX instruction to conform to Operations definition in the
ARM ARM.
2002-05-23 12:48:23 +00:00
Joern Rennecke 9ccc8931b8 * Makefile.am (sh-dis.lo): Compile with @archdefs@.
* Makefile.in: regenerate.
2002-05-22 19:18:16 +00:00
Joern Rennecke 4ee33023a0 Avoid dereferencing null pointer in:
* sh-dis.c (print_insn_sh): If coff and bfd_mach_sh, use arch_sh4
	for disassembly.
2002-05-22 18:16:45 +00:00
Joern Rennecke 426e6456c0 * sh-dis.c (print_insn_sh): If coff and bfd_mach_sh, use arch_sh4
for disassembly.
2002-05-22 13:17:27 +00:00
Thiemo Seufer 771c7ce4bc ? gas/testsuite/gas/mips/rol64.d
? gas/testsuite/gas/mips/rol64.s
Index: gas/ChangeLog
===================================================================
RCS file: /cvs/src/src/gas/ChangeLog,v
retrieving revision 1.1334
diff -u -p -r1.1334 ChangeLog
--- gas/ChangeLog	21 May 2002 20:01:51 -0000	1.1334
+++ gas/ChangeLog	21 May 2002 23:32:51 -0000
@@ -1,3 +1,8 @@
+2002-05-22  Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
+
+	* config/tc-mips.c (macro2): Add 64 bit drol, dror macros.
+	Optimize the rotate by zero case.
+
 2002-05-21  Nick Clifton  <nickc@cambridge.redhat.com>

 	* configure.in: Remove accidental enabling of bfd_gas=yes for
Index: gas/config/tc-mips.c
===================================================================
RCS file: /cvs/src/src/gas/config/tc-mips.c,v
retrieving revision 1.123
diff -u -p -r1.123 tc-mips.c
--- gas/config/tc-mips.c	14 May 2002 23:35:59 -0000	1.123
+++ gas/config/tc-mips.c	21 May 2002 23:32:52 -0000
@@ -6686,6 +6686,17 @@ macro2 (ip)
       --mips_opts.noreorder;
       break;

+    case M_DROL:
+      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsubu",
+		   "d,v,t", AT, 0, treg);
+      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsrlv",
+		   "d,t,s", AT, sreg, AT);
+      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsllv",
+		   "d,t,s", dreg, sreg, treg);
+      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or",
+		   "d,v,t", dreg, dreg, AT);
+      break;
+
     case M_ROL:
       macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "subu",
 		   "d,v,t", AT, 0, treg);
@@ -6697,15 +6708,55 @@ macro2 (ip)
 		   "d,v,t", dreg, dreg, AT);
       break;

+    case M_DROL_I:
+      {
+	unsigned int rot;
+	char *l, *r;
+
+	if (imm_expr.X_op != O_constant)
+	  as_bad (_("rotate count too large"));
+	rot = imm_expr.X_add_number & 0x3f;
+	if (! rot)
+	  break;
+	l = (rot < 0x20) ? "dsll" : "dsll32";
+	r = ((0x40 - rot) < 0x20) ? "dsrl" : "dsrl32";
+	rot &= 0x1f;
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, l,
+		     "d,w,<", AT, sreg, rot);
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, r,
+		     "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f);
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or",
+		     "d,v,t", dreg, dreg, AT);
+      }
+      break;
+
     case M_ROL_I:
-      if (imm_expr.X_op != O_constant)
-	as_bad (_("rotate count too large"));
-      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "sll", "d,w,<",
-		   AT, sreg, (int) (imm_expr.X_add_number & 0x1f));
-      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl", "d,w,<",
-		   dreg, sreg, (int) ((0 - imm_expr.X_add_number) & 0x1f));
-      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or", "d,v,t",
-		   dreg, dreg, AT);
+      {
+	unsigned int rot;
+
+	if (imm_expr.X_op != O_constant)
+	  as_bad (_("rotate count too large"));
+	rot = imm_expr.X_add_number & 0x1f;
+	if (! rot)
+	  break;
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "sll",
+		     "d,w,<", AT, sreg, rot);
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl",
+		     "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f);
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or",
+		     "d,v,t", dreg, dreg, AT);
+      }
+      break;
+
+    case M_DROR:
+      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsubu",
+		   "d,v,t", AT, 0, treg);
+      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsllv",
+		   "d,t,s", AT, sreg, AT);
+      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsrlv",
+		   "d,t,s", dreg, sreg, treg);
+      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or",
+		   "d,v,t", dreg, dreg, AT);
       break;

     case M_ROR:
@@ -6719,15 +6770,44 @@ macro2 (ip)
 		   "d,v,t", dreg, dreg, AT);
       break;

+    case M_DROR_I:
+      {
+	unsigned int rot;
+	char *l, *r;
+
+	if (imm_expr.X_op != O_constant)
+	  as_bad (_("rotate count too large"));
+	rot = imm_expr.X_add_number & 0x3f;
+	if (! rot)
+	  break;
+	r = (rot < 0x20) ? "dsrl" : "dsrl32";
+	l = ((0x40 - rot) < 0x20) ? "dsll" : "dsll32";
+	rot &= 0x1f;
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, r,
+		     "d,w,<", AT, sreg, rot);
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, l,
+		     "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f);
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or",
+		     "d,v,t", dreg, dreg, AT);
+      }
+      break;
+
     case M_ROR_I:
-      if (imm_expr.X_op != O_constant)
-	as_bad (_("rotate count too large"));
-      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl", "d,w,<",
-		   AT, sreg, (int) (imm_expr.X_add_number & 0x1f));
-      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "sll", "d,w,<",
-		   dreg, sreg, (int) ((0 - imm_expr.X_add_number) & 0x1f));
-      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or", "d,v,t",
-		   dreg, dreg, AT);
+      {
+	unsigned int rot;
+
+	if (imm_expr.X_op != O_constant)
+	  as_bad (_("rotate count too large"));
+	rot = imm_expr.X_add_number & 0x1f;
+	if (! rot)
+	  break;
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl",
+		     "d,w,<", AT, sreg, rot);
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "sll",
+		     "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f);
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or",
+		     "d,v,t", dreg, dreg, AT);
+      }
       break;

     case M_S_DOB:
Index: gas/testsuite/ChangeLog
===================================================================
RCS file: /cvs/src/src/gas/testsuite/ChangeLog,v
retrieving revision 1.315
diff -u -p -r1.315 ChangeLog
--- gas/testsuite/ChangeLog	20 May 2002 17:05:34 -0000	1.315
+++ gas/testsuite/ChangeLog	21 May 2002 23:32:54 -0000
@@ -1,3 +1,9 @@
+2002-05-22  Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
+
+	* gas/mips/rol64.s: New file, test of drol, dror macros.
+	* gas/mips/rol64.d: Likewise.
+	* gas/mips/mips.exp: Add new test.
+
 2002-05-20  Nick Clifton  <nickc@cambridge.redhat.com>

 	* gas/arm/arm.exp: Replace deprecated command line switches
Index: gas/testsuite/gas/mips/mips.exp
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/mips/mips.exp,v
retrieving revision 1.32
diff -u -p -r1.32 mips.exp
--- gas/testsuite/gas/mips/mips.exp	4 Apr 2002 08:23:30 -0000	1.32
+++ gas/testsuite/gas/mips/mips.exp	21 May 2002 23:32:54 -0000
@@ -122,6 +122,7 @@ if { [istarget mips*-*-*] } then {
 	run_dump_test "mul"
     }
     run_dump_test "rol"
+    run_dump_test "rol64"
     if !$aout { run_dump_test "sb" }
     run_dump_test "trunc"
     if !$aout { run_dump_test "ulh" }
Index: include/opcode/ChangeLog
===================================================================
RCS file: /cvs/src/src/include/opcode/ChangeLog,v
retrieving revision 1.167
diff -u -p -r1.167 ChangeLog
--- include/opcode/ChangeLog	17 May 2002 19:01:03 -0000	1.167
+++ include/opcode/ChangeLog	21 May 2002 23:32:57 -0000
@@ -1,3 +1,7 @@
+2002-05-22  Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
+
+	* mips.h: Add M_DROL, M_DROL_I, M_DROR, M_DROR_I macro cases.
+
 2002-05-17  Andrey Volkov  <avolkov@sources.redhat.com>

         * h8300.h: Corrected defs of all control regs
Index: include/opcode/mips.h
===================================================================
RCS file: /cvs/src/src/include/opcode/mips.h,v
retrieving revision 1.24
diff -u -p -r1.24 mips.h
--- include/opcode/mips.h	16 Mar 2002 03:09:18 -0000	1.24
+++ include/opcode/mips.h	21 May 2002 23:32:57 -0000
@@ -526,9 +526,13 @@ enum
   M_REM_3I,
   M_REMU_3,
   M_REMU_3I,
+  M_DROL,
   M_ROL,
+  M_DROL_I,
   M_ROL_I,
+  M_DROR,
   M_ROR,
+  M_DROR_I,
   M_ROR_I,
   M_S_DA,
   M_S_DOB,
Index: opcodes/ChangeLog
===================================================================
RCS file: /cvs/src/src/opcodes/ChangeLog,v
retrieving revision 1.447
diff -u -p -r1.447 ChangeLog
--- opcodes/ChangeLog	17 May 2002 14:36:45 -0000	1.447
+++ opcodes/ChangeLog	21 May 2002 23:33:00 -0000
@@ -1,3 +1,7 @@
+2002-05-22  Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
+
+	* mips-opc.c (mips_builtin_opcodes): Add drol, dror macros.
+
 Fri May 17 14:26:44 2002  J"orn Rennecke <joern.rennecke@superh.com>

 	* disassemble.c (disassembler): Just use print_insn_sh for bfd_arch_sh.
Index: opcodes/mips-opc.c
===================================================================
RCS file: /cvs/src/src/opcodes/mips-opc.c,v
retrieving revision 1.32
diff -u -p -r1.32 mips-opc.c
--- opcodes/mips-opc.c	17 Mar 2002 02:42:25 -0000	1.32
+++ opcodes/mips-opc.c	21 May 2002 23:33:00 -0000
@@ -492,6 +492,10 @@ const struct mips_opcode mips_builtin_op
 {"dremu",   "z,s,t",    0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HILO,      I3      },
 {"dremu",   "d,v,t",	3,    (int) M_DREMU_3,	INSN_MACRO,		I3	},
 {"dremu",   "d,v,I",	3,    (int) M_DREMU_3I,	INSN_MACRO,		I3	},
+{"drol",    "d,v,t",	0,    (int) M_DROL,	INSN_MACRO,		I3	},
+{"drol",    "d,v,I",	0,    (int) M_DROL_I,	INSN_MACRO,		I3	},
+{"dror",    "d,v,t",	0,    (int) M_DROR,	INSN_MACRO,		I3	},
+{"dror",    "d,v,I",	0,    (int) M_DROR_I,	INSN_MACRO,		I3	},
 {"dsllv",   "d,t,s",	0x00000014, 0xfc0007ff,	WR_d|RD_t|RD_s,		I3	},
 {"dsll32",  "d,w,<",	0x0000003c, 0xffe0003f, WR_d|RD_t,		I3	},
 {"dsll",    "d,w,s",	0x00000014, 0xfc0007ff,	WR_d|RD_t|RD_s,		I3	}, /* dsllv */
2002-05-21 23:54:48 +00:00
Joern Rennecke 1c509ca821 print_insn_sh cleanup:
include:
	* dis-asm.h (print_insn_shl, print_insn_sh64l): Remove prototype.
gdb:
	* sh-tdep.c (gdb_print_insn_sh64): Delete.
	(gdb_print_insn_sh): Just set info->endian and use print_insn_sh.
	(sh_gdbarch_init): Always use gdb_print_insn_sh.
opcodes:
	* disassemble.c (disassembler): Just use print_insn_sh for bfd_arch_sh.
	* sh-dis.c (LITTLE_BIT): Delete.
	(print_insn_sh, print_insn_shl): Deleted.
	(print_insn_shx): Renamed to
	(print_insn_sh).  No longer static.  Handle SHmedia instructions.
	Use info->endian to determine endianness.
	* sh64-dis.c (print_insn_sh64, print_insn_sh64l): Delete.
	(print_insn_sh64x): No longer static.  Renamed to
	(print_insn_sh64).  Removed pfun_compact and endian arguments.
	If we got an uneven address to indicate SHmedia, adjust it.
	Return -2 for SHcompact instructions.
sim/sh64:
	* sim-if.c (sh64_disassemble_insn): Use  print_insn_sh instead of
	print_insn_shl.
2002-05-17 14:36:46 +00:00
Alan Modra 81172ff2bd * acinclude.m4 (AM_INSTALL_LIBBFD): Fake to fool autotools.
* configure.in: Invoke AM_INSTALL_LIBBFD.
	* Makefile.am (install-data-local): Move to..
	(install_libopcodes): .. New target.
	(uninstall_libopcodes): Likewise.
	(install-bfdlibLTLIBRARIES): Likewise.
	(uninstall-bfdlibLTLIBRARIES): Likewise.
	(bfdlibdir): New.
	(bfdincludedir): New.
	(lib_LTLIBRARIES): Rename to bfdlib_LTLIBRARIES.
	* aclocal.m4: Regenerate.
	* configure: Regenerate.
	* Makefile.in: Regenerate.
2002-05-17 10:34:29 +00:00
Nick Clifton a978a3e5d8 Regernate cgen built files. 2002-05-15 20:54:50 +00:00
Thiemo Seufer 563773fe03 * mips-dis.c (is_newabi): EABI is not a NewABI. 2002-05-14 23:34:00 +00:00
Jason Thorpe 942e7dd911 * configure.in (shle-*-*elf*): Include sh64 support.
* configure: Regenerate.
2002-05-13 15:39:44 +00:00
Jason Thorpe d85cdfabd5 * vax-dis.c (print_insn_arg): Pass the insn info to print_insn_mode.
(print_insn_mode): Print some basic info about floating point values.
2002-05-09 23:11:30 +00:00
Alan Modra c1a34e6066 * ppc-opc.c: Add "tlbiel" for POWER4. 2002-05-09 11:15:47 +00:00
Graydon Hoare 748f46d42a [ cgen/ChangeLog ]
2002-05-01  Graydon Hoare  <graydon@redhat.com>

	* desc-cpu.scm (@arch@_cgen_cpu_close): Fix memory leaks.

[ opcodes/ChangeLog ]

2002-05-07  Graydon Hoare  <graydon@redhat.com>

	* cgen-dis.in: (print_insn_@arch@): Cache list of opened CPUs rather
	than just most-recently-opened.
2002-05-08 20:47:07 +00:00
Alan Modra 7d4a12d20f * ppc-opc.c: Add "tlbsx." and "tlbsxe." for booke. 2002-05-01 01:22:00 +00:00
Nick Clifton 3c25c5f6e8 The patch contains mostly fixes for the disassembler. It also fixes
a crash of the assembler with some malformed source input.
Long segmented addresses are now correctly relocated.
Finally it updates my email address in the MAINTAINERS file.
2002-04-25 10:59:24 +00:00
Nick Clifton c6ed57bdd2 Add Indonesian translation 2002-04-24 09:01:51 +00:00
Matthew Green eb0fdfed10 * gas/ppc/altivec.d: Fix dssall test.
* gas/ppc/altivec.s: Likewise.
	* gas/ppc/altivec_xcoff.d: Likewise.
	* gas/ppc/altivec_xcoff.s: Likewise.
	* gas/ppc/altivec_xcoff64.d: Likewise.
	* gas/ppc/altivec_xcoff64.s: Likewise.

	* ppc-opc.c (powerpc_opcode): Fix dssall operand list.
2002-04-17 14:43:28 +00:00
Matthew Green 0565ba9601 fix a typo in my name 2002-04-07 13:56:38 +00:00
Alan Modra 82674a1fec * dep-in.sed: Cope with absolute paths.
* Makefile.am (dep.sed): Subst TOPDIR.
	Run "make dep-am".
	* Makefile.in: Regenerate.
	* ppc-opc.c: Whitespace.
	* s390-dis.c: Fix copyright date.
2002-04-04 14:05:44 +00:00
Matthew Green 294b41b344 * ppc-opc.c (vmaddfp): Fix operand order. 2002-03-23 14:14:30 +00:00
Alan Modra 71b2105039 * Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
2002-03-21 09:23:41 +00:00
Alan Modra 5ae2e65e90 * ppc-opc.c: Add optional field to mtmsrd.
(MTMSRD_L, XRLARB_MASK): Define.
2002-03-21 09:01:49 +00:00
Jan Hubicka c1a64871f9 * i386-dis.c (prefix_name): Fix handling of 32bit address prefix
in 64bit mode.
	(print_insn) Likewise.
	(putop): Fix handling of 'E'
	(OP_E, OP_OFF): handle 32bit addressing mode in 64bit.
	(ptr_reg): Likewise.
2002-03-18 20:11:49 +00:00
Nick Clifton a1c259a138 Updated French translations 2002-03-18 09:44:22 +00:00
Chris Demetriou 444269101d 2002-03-16 Chris Demetriou <cgd@broadcom.com>
* mips-opc.c (M3D): Tweak comment.
        (mips_builtin_op): Add comment indicating that opcodes of the
        same name must be placed together in the table, and sort
        the "recip.fmt", "recip1.fmt", "recip2.fmt", "rsqrt.fmt",
        "rsqrt1.fmt", and "rsqrt2.fmt" opcodes by name.
2002-03-17 02:42:25 +00:00
Nick Clifton 43079f18a8 Tidy up sh64 rules 2002-03-16 08:55:53 +00:00
Chris Demetriou 82f6ea4af0 2002-03-15 Chris G. Demetriou <cgd@broadcom.com>
* mips-dis.c: Update copyright years.
2002-03-16 03:12:07 +00:00
Chris Demetriou 1f25f5d300 [ gas/ChangeLog ]
2002-03-15  Chris G. Demetriou  <cgd@broadcom.com>

	* config/tc-mips.c (mips_set_options): New "ase_mips3d" member.
	(mips_opts): Initialize "ase_mips3d" member.
	(file_ase_mips3d): New variable.
	(CPU_HAS_MIPS3D): New macro.
	(md_begin): Initialize mips_opts.ase_mips3d and file_ase_mips3d
	based on command line options and configuration defaults.
	(macro_build, mips_ip): Accept MIPS-3D instructions if
	mips_opts.ase_mips3d is set.
	(OPTION_MIPS3D, OPTION_NO_MIPS3D, md_longopts, md_parse_option):
	Add support for "-mips3d" and "-no-mips3d" options.
	(OPTION_ELF_BASE): Move to accomodate new options.
	(s_mipsset): Support ".set mips3d" and ".set nomips3d".
	(mips_elf_final_processing): Add a comment indicating that a
	MIPS-3D ASE ELF header flag should be set, when one exists.
	* doc/as.texinfo: Document -mips3d and -no-mips3d options.
	* doc/c-mips.texi: Likewise, and document ".set mips3d" and ".set
	nomips3d" directives.

[ gas/testsuite/ChangeLog ]
2002-03-15  Chris G. Demetriou  <cgd@broadcom.com>

	* gas/mips/mips64-mips3d.s: New file.
	* gas/mips/mips64-mips3d.d: Likewise.
	* gas/mips/mips.exp: Run new "mips64-mips3d" test.

[ include/opcode/ChangeLog ]
2002-03-15  Chris G. Demetriou  <cgd@broadcom.com>

	* mips.h (INSN_MIPS3D): New definition used to mark MIPS-3D
	instructions.
	(OPCODE_IS_MEMBER): Adjust comments to indicate that ASE bit masks
	may be passed along with the ISA bitmask.

[ opcodes/ChangeLog ]
2002-03-15  Chris G. Demetriou  <cgd@broadcom.com>

	* mips-dis.c (mips_isa_type): Add MIPS3D instructions to the ISA
	bit masks for bfd_mach_mips_sb1 and bfd_mach_mipsisa64.  Add
	comments for bfd_mach_mipsisa32 and bfd_mach_mipsisa64 that
	indicate that they should dissassemble all applicable
	MIPS-specified ASEs.
	* mips-opc.c: Add support for MIPS-3D instructions.
	(M3D): New definition.

	* mips-opc.c: Update copyright years.
2002-03-16 03:09:19 +00:00
Chris Demetriou ff8a5556c4 2002-03-15 Chris G. Demetriou <cgd@broadcom.com>
* mips-opc.c (mips_builtin_opcodes): Sort bc<N> opcodes by name.
2002-03-16 02:53:52 +00:00
Chris Demetriou 4c563ebfce 2002-03-15 Chris Demetriou <cgd@broadcom.com>
* mips-dis.c (is_newabi): Fix ABI decoding.
2002-03-15 17:32:05 +00:00
Chris Demetriou eb7b56d007 2002-03-14 Chris G. Demetriou <cgd@broadcom.com>
* mips-dis.c (mips_isa_type): Fix formatting of bfd_mach_mipsisa32
        and bfd_mach_mipsisa64 cases to match the rest.
2002-03-15 06:01:08 +00:00
Nick Clifton 9ce88e60f3 Updated French translations 2002-03-13 10:35:17 +00:00
Alan Modra 98acc1c518 * ppc-opc.c: Add optional `L' field to tlbie.
(XRTLRA_MASK): Define.
2002-03-13 08:34:04 +00:00
Chris Demetriou aa0842299a 2002-03-06 Chris Demetriou <cgd@broadcom.com>
* mips-opc.c (mips_builtin_opcodes): Mark "pref" as being
        present on I4.

        * mips-opc.c (mips_builtin_opcodes): Add "movn.ps" and "movz.ps".
2002-03-06 20:31:14 +00:00
Alan Modra 84dd1cffbf * pdp11-opc.c: Fix "mark" operand type. Fix operand types
for float opcodes that take float operands.  Add alternate
	names (xxxD vs. xxxF) for float opcodes.
	* pdp11-dis.c (print_operand): Clean up formatting for mode 67.
	(print_foperand): New function to handle float opcode operands.
	(print_insn_pdp11): Use print_foperand to disassemble float ops.
2002-03-05 03:09:53 +00:00
Nick Clifton ef412327e6 Update translation files. 2002-02-27 16:37:48 +00:00
Nick Clifton 263de0103e Export dis-asm.h as part of an install 2002-02-26 22:09:26 +00:00
Nick Clifton fe41178f92 Import new Spanish and German translations 2002-02-26 10:28:13 +00:00
Alan Modra 94efba1253 * ppc-dis.c (powerpc_dialect): Handle power4 option.
* ppc-opc.c (insert_bdm): Correct description of "at" branch
	hints.  Test PPC_OPCODE_POWER4 to determine branch hint flavour.
	(extract_bdm, insert_bdp, extract_bdp, valid_bo): Likewise.
	(BOFM64, BOFP64, BOTM64, BOFP64): Rename to BOFM4, BOFP4 etc.
	(BODNZM64, BODNZP64, BODZM64, BODZP64): Likewise.
	(PPCCOM32, PPCCOM64): Delete.
	(NOPOWER4, POWER4): Define.
	(powerpc_opcodes): Replace occurences of PPCCOM32 with NOPOWER4,
	and PPCCOM4 with POWER4 so that "at" style branch hint opcodes
	are enabled for power4 rather than ppc64.
2002-02-25 03:43:46 +00:00
Tom Rix ff3a6ee3fd XCOFF booke tests. Fix tlbre, tlbwe ppc WS field. 2002-02-21 03:57:36 +00:00
Martin Schwidefsky 45b38a80ad 2002-02-19 Martin Schwidefsky <schwidefsky@de.ibm.com>
* s390-dis.c (init_disasm): Use renamed architecture defines.
2002-02-19 18:59:49 +00:00
Matthew Green 9a0ccb2478 * ppc-opc.c (powerpc_dialect): Fix comment; BookE is not Motorola
specific.
2002-02-19 15:20:26 +00:00
Nick Clifton 6ad738c5d9 Updated translations 2002-02-18 08:40:03 +00:00
Richard Henderson 8bf7d691eb * alpha-opc.c (alpha_opcodes): Fix thinko in ret pseudo
disassembly mask.
2002-02-15 21:00:45 +00:00
Richard Henderson fa024f00d2 * alpha-opc.c (alpha_opcodes): Add simple pseudos for
lda, ldah, jmp, ret.
2002-02-15 09:43:16 +00:00
Nick Clifton 9694d6b2ea Updated translation 2002-02-14 15:06:41 +00:00
Graydon Hoare d7de8249f0 [ opcodes/ChangeLog ]
2002-02-12  Graydon Hoare  <graydon@redhat.com>

	* cgen-asm.in (parse_insn_normal): Change call from
	@arch@_cgen_parse_operand to cd->parse_operand, to
	facilitate CGEN_ASM_INIT_HOOK doing useful work.
2002-02-12 14:51:54 +00:00
Alexandre Oliva 56930d376b * sparc-dis.c (print_insn_sparc): Make sure 0xFFFFFFFF is not
sign-extended.
2002-02-11 13:24:51 +00:00
Alan Modra 2c73f9d861 * Makefile.am: "make dep-am".
* Makefile.in: Regenerate.
	* aclocal.m4: Regenerate.
	* config.in: Regenerate.
	* configure: Regenerate.
2002-02-11 05:05:09 +00:00
Hans-Peter Nilsson ca0f2ed6f8 * configure.in <bfd_sh_arc>: For sh-* and shl-*, enable sh64
support only for sh-*-*elf*, shl-*-*elf*, sh-*-linux* and
	shl-*-linux*.
	* configure: Regenerate.
2002-02-10 20:40:56 +00:00
Daniel Jacobowitz 34b0f91d24 2002-02-10 Daniel Jacobowitz <drow@mvista.com>
* cgen-dis.c: Add prototypes for count_decodable_bits
	and add_insn_to_hash_chain.
2002-02-10 19:03:14 +00:00
Alexandre Oliva e8b872bb02 * configure.in <bfd_sh_arc>: Enable sh64 support on sh-*.
* configure: Rebuilt.
2002-02-09 03:25:25 +00:00
Nick Clifton 5e37cc4676 Fix compile time warning messages 2002-02-08 12:12:15 +00:00
Alexandre Oliva d28847ce8e Contribute sh64-elf.
2001-10-08  Nick Clifton  <nickc@cambridge.redhat.com>
* sh64-opc.c: Regenerate.
2001-03-13  DJ Delorie  <dj@redhat.com>
* sh64-opc.h: Rename A_RESV_Fx to A_REUSE_PREV so that its
purpose is more obvious.
* sh64-opc.c (shmedia_table): Ditto.
* sh64-dis.c (initialize_shmedia_opcode_mask_table): Ditto.
(print_insn_shmedia): Ditto.
2001-03-12  DJ Delorie  <dj@redhat.com>
* sh64-opc.c: Adjust comments to reflect reality: replace bits
3:0 with zeros (not "reserved"), replace "rrrrrr" with
"gggggg" for two-operand floating point opcodes.  Remove
"fsina".
2001-01-08  Hans-Peter Nilsson  <hpn@cygnus.com>
* sh64-dis.c (print_insn_shmedia) <failing read_memory_func>:
Correct printing of .byte:s.  Return number of printed bytes or
-1; never 0.
(print_insn_sh64x) <not CRT_SH5_ISA16>: Ditto.  Print as .byte:s
to next four-byte-alignment if insn or data is not aligned.
2001-01-06  Hans-Peter Nilsson  <hpn@cygnus.com>
* sh64-dis.c: Update comments and fix comment formatting.
(initialize_shmedia_opcode_mask_table) <case A_IMMM>:
Abort instead of setting length to 0.
(crange_qsort_cmpb, crange_qsort_cmpl, crange_bsearch_cmpb,
crange_bsearch_cmpl, sh64_get_contents_type,
sh64_address_in_cranges): Move to bfd/elf32-sh64.c.
2001-01-05  Hans-Peter Nilsson  <hpn@cygnus.com>
* sh64-opc.c: Remove #if 0:d entries for instructions not found in
SH-5/ST50-023-04: fcosa.s, fsrra.s and prefo.
2000-12-30  Hans-Peter Nilsson  <hpn@cygnus.com>
* sh64-dis.c (print_insn_shmedia): Display MOVI/SHORI-formed
address with same prefix as SHcompact.
In the disassembler, use a .cranges section for linked executables.
* sh64-dis.c (SAVED_MOVI_R, SAVED_MOVI_IMM): Move to head of file
and update for using structure in info->private_data.
(struct sh64_disassemble_info): New.
(is_shmedia_p): Delete.
(crange_qsort_cmpb): New function.
(crange_qsort_cmpl, crange_bsearch_cmpb): New functions.
(crange_bsearch_cmpl, sh64_address_in_cranges): New functions.
(init_sh64_disasm_info, sh64_get_contents_type_disasm): New functions.
(sh64_get_contents_type, sh64_address_is_shmedia): New functions.
(print_insn_shmedia): Correct displaying of address after MOVI/SHORI
pair.  Display addresses for linked executables only.
(print_insn_sh64x_media): Initialize info->private_data by calling
init_sh64_disasm_info.
(print_insn_sh64x): Ditto.  Find out type of contents by calling
sh64_contents_type_disasm.  Display data regions using ".long" and
".byte" similar to unrecognized opcodes.
2000-12-19  Hans-Peter Nilsson  <hpn@cygnus.com>
* sh64-dis.c (is_shmedia_p): Check info->section and look for ISA
information in section flags before considering symbols.  Don't
assume an info->mach setting of bfd_mach_sh5 means SHmedia code.
* configure.in (bfd_sh_arch): Check presence of sh64 insns by
matching $target $canon_targets instead of looking at the
now-removed -DINCLUDE_SHMEDIA in $targ_cflags.
* configure: Regenerate.
2000-11-25  Hans-Peter Nilsson  <hpn@cygnus.com>
* sh64-opc.c (shmedia_creg_table): New.
* sh64-opc.h (shmedia_creg_info): New type.
(shmedia_creg_table): Declare.
* sh64-dis.c (creg_name): New function.
(print_insn_shmedia): Use it.
* disassemble.c (disassembler) [ARCH_sh, INCLUDE_SHMEDIA]: Map
bfd_mach_sh5 to print_insn_sh64 if big-endian and to
print_insn_sh64l if little-endian.
* sh64-dis.c (print_insn_shmedia): Make r unsigned.
(print_insn_sh64l): New.
(print_insn_sh64x): New.
(print_insn_sh64x_media): New.
(print_insn_sh64): Break out code to print_insn_sh64x and
print_insn_sh64x_media.
2000-11-24  Hans-Peter Nilsson  <hpn@cygnus.com>
* sh64-opc.h: New file
* sh64-opc.c: New file
* sh64-dis.c: New file
* Makefile.am: Add sh64 targets.
(HFILES): Add sh64-opc.h.
(CFILES): Add sh64-opc.c and sh64-dis.c.
(ALL_MACHINES): Add sh64 files.
* Makefile.in: Regenerate.
* configure.in: Add support for sh64 to bfd_sh_arch.
* configure: Regenerate.
* disassemble.c [ARCH_all] (INCLUDE_SHMEDIA): Define.
(disassembler) [ARCH_sh, INCLUDE_SHMEDIA]: Map bfd_mach_sh5 to
print_insn_sh64.
* sh-dis.c (print_insn_shx): Handle bfd_mach_sh5 as arch_sh4.
* po/POTFILES.in: Regenerate.
* po/opcodes.pot: Regenerate.
2002-02-08 05:51:04 +00:00
Frank Ch. Eigler cadaa5224a * opcodes disassembler extension
[includes]
2002-02-04  Frank Ch. Eigler  <fche@redhat.com>

	* dis-asm.h (disassemble_info): New field `insn_sets'.
	(INIT_DISASSEMBLE_INFO): Clear it.

[opcodes]
2002-02-04  Frank Ch. Eigler  <fche@redhat.com>

	* cgen-dis.in (print_insn_@arch@): Support disassemble_info.insn_sets.
2002-02-05 19:40:45 +00:00
Alexandre Oliva 0b3301c329 * sh-opc.h (sh_arg_type): Added A_DISP_PC_ABS. 2002-02-04 12:29:01 +00:00
Alan Modra ba323545dd Run "make dep-am" 2002-02-01 03:26:35 +00:00
Nick Clifton 3b16e843f2 Add support for OpenRISC 32-bit embedded processor 2002-01-31 17:33:08 +00:00
Daniel Jacobowitz 4867be4168 2002-01-27 Daniel Jacobowitz <drow@mvista.com>
From Steve Ellcey <sje@cup.hp.com>:
        * libtool.m4 (HPUX_IA64_MODE): Set to 32 or 64 based on ABI.
        (lt_cv_deplibs_check_method, lt_cv_file_magic_cmd,
        lt_cv_file_magic_test_file): Set to appropriate values for HP-UX
        IA64.
        * ltcf-c.sh (archive_cmds, hardcode_*): Ditto.
        * ltconfig (shlibpath_*, dynamic_linker, library_names_spec,
        soname_spec, sys_lib_search_path_spec): Ditto.


Various configure scripts regenerated.
2002-01-28 04:59:39 +00:00
Nick Clifton fdfd5c7a35 Updated French version 2002-01-26 08:52:51 +00:00
Nick Clifton 1ddbd15255 Updated Spanish translation 2002-01-25 14:25:03 +00:00
Alan Modra c46f0c34a6 Missing ChangeLog entries for 2002-01-22 Makefile updates 2002-01-25 12:01:12 +00:00
Nick Clifton 0e5aca4e54 New Danish translation file. 2002-01-24 15:20:00 +00:00
Nick Clifton d0de30261d Add Danish translation 2002-01-23 11:48:53 +00:00
Graydon Hoare 9a2e995d8a [ include/opcode/ChangeLog ]
2002-01-22  Graydon Hoare  <graydon@redhat.com>

	* cgen.h (CGEN_MAYBE_MULTI_IFLD): New structure.
	(CGEN_OPERAND): Add CGEN_MAYBE_MULTI_IFLD field.

[ opcodes/ChangeLog ]

2002-01-22  Graydon Hoare  <graydon@redhat.com>

	* fr30-asm.c: Regenerate.
	* fr30-desc.c: Likewise.
	* fr30-desc.h: Likewise.
	* fr30-dis.c: Likewise.
	* fr30-ibld.c: Likewise.
	* fr30-opc.c: Likewise.
	* fr30-opc.h: Likewise.
	* m32r-asm.c: Likewise.
	* m32r-desc.c: Likewise.
	* m32r-desc.h: Likewise.
	* m32r-dis.c: Likewise.
	* m32r-ibld.c: Likewise.
	* m32r-opc.c: Likewise.
	* m32r-opc.h: Likewise.
	* m32r-opinst.c: Likewise.
	* openrisc-asm.c: Likewise.
	* openrisc-desc.c: Likewise.
	* openrisc-desc.h: Likewise.
	* openrisc-dis.c: Likewise.
	* openrisc-ibld.c: Likewise.
	* openrisc-opc.c: Likewise.
	* openrisc-opc.h: Likewise.
	* xstormy16-desc.c: Likewise.

[ cgen/ChangeLog ]

2002-01-22  Graydon Hoare  <graydon@redhat.com>

	* desc-cpu.scm (ifld-number-cache): Add.
	(ifld-number): Add.
	(gen-maybe-multi-ifld-of-op): Add.
	(gen-maybe-multi-ifld): Add.
	(gen-multi-ifield-nodes): Add.
	(cgen-desc.c): Add call to gen-multi-ifield-nodes.
2002-01-22 21:45:36 +00:00
Richard Henderson 98c0272052 * alpha-dis.c (print_insn_alpha): Also mask the base opcode for
comparison.
2002-01-22 09:44:09 +00:00
Alan Modra c0ef99a773 run "make dep-am"; automake
regenerate po/POTFILES.in
2002-01-22 08:58:00 +00:00
Richard Earnshaw a2fc1b1f19 * arm-opc.h (arm_opcodes): Use generic rule %5?hb instead of %h.
* arm-dis.c (print_insn_arm): Don't handle 'h' case.
2002-01-19 12:27:24 +00:00
Richard Earnshaw 395213c846 2002-01-18 Keith Walker <keith.walker@arm.com>
* arm-opc.h (arm_opcodes): Add bxj instruction.
2002-01-18 17:33:49 +00:00
Nick Clifton 328577adeb Regenerate .pot and .po files 2002-01-17 14:12:08 +00:00
Nick Clifton af3ae48ddd Import new Turkish translations. 2002-01-16 10:17:48 +00:00
Richard Earnshaw a660f11eb1 * arm-opc.h (arm_opcodes): Add patterns for VFP instructions.
* arm-dis.c (print_insn_arm): Support new disassembly qualifiers for
VFP bitfields.
2002-01-15 15:41:23 +00:00
Matthew Green 1951c6f7f8 [cgen/ChangeLog]
* cpu/xstormy16.cpu (gr-Rbj-names): Rename this ...
	(gr-Rb-names): ... to this.
	(h-Rb): New hardware peice.
	(h-Rbj): Use gr-Rb-names.
	(Rb): Use h-Rb.

	(holdx): New instruction.

[opcodes/ChangeLog]
	* xstormy16-asm.c: Regenerate.
	* xstormy16-desc.c: Likewise.
	* xstormy16-desc.h: Likewise.
	* xstormy16-dis.c: Likewise.
	* xstormy16-opc.c: Likewise.
	* xstormy16-opc.h: Likewise.

[gas/testsuite/ChangeLog]
	* gas/xstormy16/allinsn.sh (movf, jmp, call, icall): Update.
	* gas/xstormy16/allinsn.d: Regenerate.
	* gas/xstormy16/allinsn.s: Regenerate.

[sid/component/cgen-cpu/xstormy16/ChangeLog]
	* xstormy16.cxx (do_holdx): Define.
	* xstormy16.h (do_holdx): Declare.
2002-01-11 07:24:59 +00:00
Nick Clifton be2d1673e4 Add spanish translation files 2002-01-07 17:37:59 +00:00
Jeff Law 8ef42b2959 * hppa-dis.c (print_insn_hppa): Handle new 'c' mode completers,
'X', 'M', and 'A'.  No longer emit a space after 'x' or 's'.
        Always emit a space after 'H'.
2001-12-31 23:44:08 +00:00
Matthew Green 1cbbfaf9a2 * ppc-opc.c (PPCVEC): Include PPC_OPCODE_ANY. 2001-12-18 14:07:03 +00:00
Richard Henderson c2274b2767 * alpha-opc.c (unop): Encode with RB as $sp. 2001-12-18 00:23:00 +00:00
Geoffrey Keating 93fbbb04b8 Index: bfd/ChangeLog
2001-12-07  Geoffrey Keating  <geoffk@redhat.com>
	    Richard Henderson  <rth@redhat.com>
	    Corinna Vinschen  <vinschen@redhat.com>

	* Makefile.am: Add support for xstormy16.
	* archures.c: Add support for xstormy16.
	* config.bfd: Add support for xstormy16.
	* configure.in: Add support for xstormy16.
	* reloc.c: Add support for xstormy16.
	* targets.c: Add support for xstormy16.
	* cpu-xstormy16.c: New file.
	* elf32-xstormy16.c: New file.
	* Makefile.in: Regenerated.
	* bfd-in2.h: Regenerated.
	* configure: Regenerated.
	* libbfd.h: Regenerated.

Index: binutils/ChangeLog
2001-12-07  Geoffrey Keating  <geoffk@redhat.com>

	* readelf.c (guess_is_rela): Add support for stormy16.
	(dump_relocations): Likewise.
	(get_machine_name): Likewise.

Index: gas/ChangeLog
2001-12-07  Geoffrey Keating  <geoffk@redhat.com>
	    Richard Henderson  <rth@redhat.com>

	* configure.in: Add support for xstormy16.
	* configure: Regenerated.
	* Makefile.am: Add support for xstormy16.
	* Makefile.in: Regenerated.
	* config/tc-xstormy16.c: New file.
	* config/tc-xstormy16.h: New file.

Index: gas/testsuite/ChangeLog
2001-12-07  Geoffrey Keating  <geoffk@redhat.com>
	    matthew green  <mrg@redhat.com>

	* gas/xstormy16/allinsn.d: New file.
	* gas/xstormy16/allinsn.exp: New file.
	* gas/xstormy16/allinsn.s: New file.
	* gas/xstormy16/allinsn.sh: New file.
	* gas/xstormy16/gcc.d: New file.
	* gas/xstormy16/gcc.s: New file.
	* gas/xstormy16/gcc.sh: New file.
	* gas/xstormy16/reloc-1.d: New file.
	* gas/xstormy16/reloc-1.s: New file.
	* gas/xstormy16/reloc-2.d: New file.
	* gas/xstormy16/reloc-2.s: New file.

Index: ld/ChangeLog
2001-12-07  Geoffrey Keating  <geoffk@redhat.com>
	    Richard Henderson  <rth@redhat.com>

	* Makefile.am: Add support for xstormy16.
	* configure.tgt: Add support for xstormy16.
	* Makefile.in: Regenerate.
	* emulparams/elf32xstormy16.sh: New file.
	* scripttempl/xstormy16.sc: New file.

Index: opcodes/ChangeLog
2001-12-07  Geoffrey Keating  <geoffk@redhat.com>

	* Makefile.am: Add support for xstormy16.
	* Makefile.in: Regenerate.
	* configure.in: Add support for xstormy16.
	* configure: Regenerate.
	* disassemble.c: Add support for xstormy16.
	* xstormy16-asm.c: New generated file.
	* xstormy16-desc.c: New generated file.
	* xstormy16-desc.h: New generated file.
	* xstormy16-dis.c: New generated file.
	* xstormy16-ibld.c: New generated file.
	* xstormy16-opc.c: New generated file.
	* xstormy16-opc.h: New generated file.

Index: include/ChangeLog
2001-12-07  Geoffrey Keating  <geoffk@redhat.com>

	* dis-asm.h (print_insn_xstormy16): Declare.

Index: include/elf/ChangeLog
2001-12-07  Geoffrey Keating  <geoffk@redhat.com>
	    Richard Henderson  <rth@redhat.com>

	* common.h (EM_XSTORMY16): Define.
	* xstormy16.h: New file.
2001-12-08 03:46:03 +00:00
Richard Henderson 3793abc306 * alpha-opc.c (alpha_opcodes): Add wh64en. 2001-12-06 18:29:22 +00:00
Alexandre Oliva 96f27b6cb5 * d10v-opc.c (d10v_predefined_registers): Remove warnings
introduced in Nov 29's patch.
2001-12-04 12:31:26 +00:00
Alexandre Oliva 373efcb309 * d10v-dis.c (print_operand): Apply REGISTER_MASK to `num' of
unmatched register.
2001-12-04 12:30:55 +00:00
Alexandre Oliva d126725049 * d10v-dis.c (print_operand): Disregard OPERAND_SP in register
predefined value.
2001-12-04 10:08:19 +00:00
Alexandre Oliva 41852a32f7 * d10v-opc.c (RSRC_NOSP): New macro.
(d10v_operands): Add it.
(d10v_opcodes): Use RSRC_NOSP in post-decrement "st" and "st2w".
2001-12-04 10:06:50 +00:00
Alexandre Oliva bf9043c5c7 Copyright 2001 2001-11-29 18:08:13 +00:00
Alexandre Oliva e21c4a1c1b * d10v-opc.c (d10v_predefined_registers): Mark `sp' as OPERAND_SP.
(RSRC_SP): New macro.
(d10v_operands): Add it.
(d10v_opcodes): Adjust "st" and "st2w" to use RSRC_SP.
2001-11-29 18:04:00 +00:00
Nick Clifton 607334a109 Add .cvsignore files to skip .gmo files 2001-11-28 18:57:14 +00:00
Alan Modra c6843df52b * pdp11-dis.c (print_insn_pdp11): Handle illegal instructions.
Also, break out of the loop as soon as an instruction has been
	printed.
2001-11-23 07:09:48 +00:00
Matthew Green 473d3293c6 * ppc-opc.c (mfvrsave, mtvrsave): New instructions. 2001-11-17 22:34:17 +00:00
Alan Modra c86380b586 * po/POTFILES.in: Regenerate. 2001-11-15 12:27:07 +00:00
Alan Modra 802a735ed9 binutils/ChangeLog
* doc/binutils.texi (objdump): Document ppc -M options.
gas/ChangeLog
	* config/tc-ppc.c (ppc_insert_operand): Pass (ppc_cpu | ppc_size)
	to operand->insert.
	(md_assemble): Likewise.
gas/testsuite/ChangeLog
	* gas/ppc/booke.d: Modify reloc and target matches for powerpc64.
include/opcode/ChangeLog
	* ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
opcodes/ChangeLog
	* ppc-opc.c (PPC64): Revert 2001-10-12. Do include PPC_OPCODE_PPC.
	(insert_bat, extract_bat, insert_bba, extract_bba,
	insert_bd, extract_bd, insert_bdm, extract_bdm,
	insert_bdp, extract_bdp, valid_bo,
	insert_bo, extract_bo, insert_boe, extract_boe,
	insert_ds, extract_ds, insert_de, extract_de,
	insert_des, extract_des, insert_li, extract_li,
	insert_mbe, extract_mbe, insert_mb6, extract_mb6,
	insert_nb, extract_nb, insert_nsi, extract_nsi,
	insert_ral, insert_ram, insert_ras,
	insert_rbs, extract_rbs, insert_sh6, extract_sh6,
	insert_spr, extract_spr, insert_tbr, extract_tbr): Add dialect param.
	(extract_bd, extract_bdm, extract_bdp,
	extract_ds, extract_des,
	extract_li, extract_nsi): Implement sign extension without conditional.
	(insert_bdm, extract_bdm,
	insert_bdp, extract_bdp, valid_bo): Handle 64 bit branch hints.
	(extract_bdm, extract_bdp): Correct 32 bit validation.
	(AT1_MASK, AT2_MASK): Define.
	(BBOAT_MASK): Define.
	(BBOATCB_MASK, BBOAT2CB_MASK, BBOATBI_MASK): Define.
	(BOFM64, BOFP64, BOTM64, BOTP64): Define.
	(BODNZM64, BODNZP64, BODZM64, BODZP64): Define.
	(PPCCOM32, PPCCOM64): Define.
	(powerpc_opcodes): Modify existing 32 bit insns with branch hints
	and add new patterns to implement 64 bit branches with hints.  Move
	booke instructions so they match before ppc64.
	* ppc-dis.c (powerpc_dialect): Set PPC_OPCODE_64 in dialect for
	64 bit default targets, and parse "32" and "64" in options.
	Formatting fixes.
	(print_insn_powerpc): Pass dialect to operand->extract.
2001-11-15 01:08:53 +00:00
Dave Brolley 1c00926451 2001-11-14 Dave Brolley <brolley@redhat.com>
* cgen-dis.c (count_decodable_bits): New function.
	(add_insn_to_hash_chain): New function.
	(hash_insn_array): Call add_insn_to_hash_chain.
	(hash_insn_list): Call add_insn_to_hash_chain.
2001-11-14 20:07:27 +00:00
Dave Brolley 2e1ef6b479 2001-11-14 Dave Brolley <brolley@redhat.com>
* m32r-dis.c: Regenerated.
	* fr30-dis.c: Regenerated.
2001-11-14 19:48:54 +00:00
Andreas Jaeger fa405d97a1 * i386-dis.c (print_insn): Use x86-64 as option. 2001-11-14 12:01:12 +00:00
Alan Modra e396998b18 binutils/ChangeLog
* doc/binutils.texi (objdump): Document x86 -M options.
include/ChangeLog
 	* dis-asm.h (print_insn_i386): Declare.
opcodes/ChangeLog
	* disassemble.c (disassembler): Call print_insn_i386.
	* i386-dis.c (SUFFIX_ALWAYS): Define.
	(struct dis_private): Add orig_sizeflag.
	(print_insn_i386): Make it a wrapper, calling..
	(print_insn): ..The old body of print_insn_i386.  Avoid longjmp
	warning without using volatile by moving orig_sizeflag to priv,
	and removing inbuf.  Parse disassembler_options.
	(print_insn_i386_att, print_insn_i386_intel): Move initialisation
	code to print_insn.
	(putop): Remove #ifdef SUFFIX_ALWAYS.
2001-11-14 03:15:28 +00:00
Timothy Wall 6e91790347 Fix tic54x testsuite failures and Lmem disassembly bugs. 2001-11-13 14:22:53 +00:00
Alan Modra e5470cdc92 * i386.h (i386_optab): Add entries for "sldr", "smsw" and "str" to
accept WordReg.
	* i386-dis.c (grps): Change "sldt", "str", and "smsw" entries
	to "sldtQ", "strQ", "smswQ" respectively; all with Ev operand
	category instead of Ew.
2001-11-13 01:03:55 +00:00
Nick Clifton 6c93a8fabc Fix definitions of wddata[bwl]. 2001-11-12 16:36:06 +00:00
Richard Sandiford b165b83891 * cgen-asm.c (cgen_parse_keyword): If the keyword is too big to
fit in the buffer, try to match the empty keyword.
2001-11-09 18:05:30 +00:00
Nick Clifton e333d2c401 Fix badly placed #if 0... 2001-11-09 10:21:22 +00:00
Chris Demetriou def7143b20 2001-11-04 Chris Demetriou <cgd@broadcom.com>
* mips-dis.c (print_insn_mips): Remove spaces at end of line.
2001-11-05 03:07:51 +00:00
Nick Clifton 3c62831e20 Add translations 2001-11-02 19:09:06 +00:00
Stephane Carrez 64e38312bc * m68hc11-dis.c (print_insn): Fix disassembly of movb with a
constant as source.
2001-11-01 09:48:57 +00:00
Hans-Peter Nilsson afd3097320 * mmix-dis.c, mmix-opc.c: New files. 2001-10-31 02:40:19 +00:00
Nick Clifton 3c3bdf30e4 Add MMIX support 2001-10-30 15:20:14 +00:00
Kazu Hirata d9a35582d0 * d30v-dis.c: Fix a comment typo. 2001-10-29 22:43:32 +00:00
Chris Demetriou 9bb28706c4 [opcodes/ChangeLog]
2001-10-21  Chris Demetriou  <cgd@broadcom.com>

        * mips-opc.c (mips_builtin_opcodes): Mark "bgezall" and
        "bltzall" as writing GPR 31 (since they do).

        * mips-dis.c (print_insn_arg): Calculate info->target
        where appropriate.
        (print_insn_mips): Fill in instruction info.
        (print_mips16_insn_arg): Remove unneded variable 'val'.
        Removed duplicated instruction target calculations,
        calculate once and print that result.  Use same idiom for
        masking the jump segment bits as is used in print_insn_arg.

[gas/testsuite/ChangeLog]

2001-10-21  Chris Demetriou  <cgd@broadcom.com>

        * gas/mips/beq.s: Add zero words at end of instructions so
        that objdump will print "..." when disassembling.
        * gas/mips/beq.d: Update for disassembler changes which force
        branch delay-slot nops to be printed.
        * gas/mips/bge.d: Ditto.
        * gas/mips/bgeu.d: Ditto.
        * gas/mips/blt.d: Ditto.
        * gas/mips/bltu.d: Ditto.
        * gas/mips/jal-svr4pic.d: Ditto.
        * gas/mips/jal-xgot.d: Ditto.
2001-10-23 19:20:28 +00:00
Alan Modra 1f613cde70 * ppc-opc.c (CT): Make it an optional operand. 2001-10-20 13:50:16 +00:00
Chris Demetriou 2228315b47 [gas/testsuite/ChangeLog]
2001-10-17  Chris Demetriou  <cgd@broadcom.com>

        * gas/mips/mips.exp (sb1-ext-ps): New test to test
        SB-1 core's paired-single extensions to the MIPS64 ISA.
        * gas/mips/sb1-ext-ps.d: New file.
        * gas/mips/sb1-ext-ps.s: New file.

[include/opcode/ChangeLog]
2001-10-17  Chris Demetriou  <cgd@broadcom.com>

        * mips.h (INSN_SB1): New cpu-specific instruction bit.
        (OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
        if cpu is CPU_SB1.

[opcodes/ChangeLog]
2001-10-17  Chris Demetriou  <cgd@broadcom.com>

        * mips-dis.c (mips_isa_type): Make the ISA used to disassemble
        SB-1 binaries include instructions specific to the SB-1.
        * mips-opc.c (SB1): New definition.
        (mips_builtin_opcodes): Add SB-1 extension opcodes "div.ps",
        "recip.ps", "rsqrt.ps", and "sqrt.ps".
2001-10-18 01:42:16 +00:00
Matthew Green f5c120c5dc [gas/ChangeLog]
* config/tc-ppc.c (md_show_usage): Add missing -maltivec, -m7400,
	-m7410, -m7450 and -m7455 options.

[gas/testsuite/ChangeLog]
	* gas/ppc/altivec.s: New test for AltiVec.
	* gas/ppc/altivec.d: New file.
	* gas/ppc/ppc.exp: Test altivec.s

[include/opcode/ChangeLog]
	* ppc.h (PPC_OPCODE_BOOKE64): Fix typo.

[opcodes/ChangeLog]
	* ppc-opc.c (STRM): New AltiVec operand.
	(XDSS): New AltiVec instruction form.
	(mtvscr): Correct operand list.
	(dst, dstt, dstst, dststt, dss, dssall): AltiVec instructions.
2001-10-17 13:13:16 +00:00
Alan Modra aa200fe8a3 * po/POTFILES.in: Regenerate. 2001-10-17 05:41:53 +00:00
Matthew Green 9fa87a061b [gas/testsuite/ChangeLog]
* gas/ppc/booke.s (rfci, wrtee, wrteei, mfdcrx, mfdcr, mtdcrx,
	mtdcr, msync, dcba, mbar): New BookE tests.
	* gas/ppc/booke.d: Update for new BookE tests.

[opcodes/ChangeLog]
	* ppc-opc.c (MO): New macro for MO field of mbar instruction.
	(powerpc_opcodes): Add rfci, wrtee, wrteei, mfdcrx, mfdcr,
	mtdcrx, mtdcr, msync, dcba and mbar as BookE instructions.
2001-10-14 01:19:09 +00:00
Nick Clifton 37111cc728 Use safe-ctype.h not ctype.h 2001-10-13 09:38:04 +00:00
Matthew Green 418c174284 [gas/ChangeLog]
* config/tc-ppc.c (md_parse_option): New -m7410, -m7450 and -m7455
	flags, equivalent to -m7400.  New -maltivec to enable AltiVec
	instructions.  New -mbook64 and -mbooke/-mbooke32 flags to enable
	64-bit and 32-bit BookE support, respectively.  Change -m403 and
	-m405 to set PPC403 option.
	(md_show_usage): Adjust for new options.
	* doc/all.texi: Set PPC.
	* doc/as.texinfo: Add PPC support and pull in c-ppc.texi.
	* doc/c-ppc.texi: New file.
	* doc/Makefile.am (CPU_DOCS): Add c-ppc.texi.
	* doc/Makefile.in: Regenerate.

[gas/testsuite/ChangeLog]
	* gas/ppc/booke.s: New test for Motorola BookE.
	* gas/ppc/booke.d: New file.
	* gas/ppc/ppc.exp: Test booke.s.

[include/opcode/ChangeLog]
	* ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_403): New opcode flags for
	BookE and PowerPC403 instructions.

[opcodes/ChangeLog]
	* ppc-opc.c (insert_de, extract_de, insert_des, extract_des): New
	instruction field instruction/extraction functions for new BookE
	DE form instructions.
	(CT): New macro for CT field in an X form instruction.
	(DE, DES, DEO, DE_MASK): New macros for DE/DES fields in DE form
	instructions.
	(PPC64): Don't include PPC_OPCODE_PPC.
	(403): New opcode macro for PPC403 processors.
	(BOOKE): New opcode macro for BookE processors.
	(bce, bcel, bcea, bcela, bclre, bclrel: New BookE instructions.
	(bcctre, bcctrel, be, bel, bea, bela, icbt, icbte, lwzxe): Likewise.
	(dcbste, lwzuxe, luxe, dcbfe, lbzxe, lwarxe, lbzuxe): Likewise.
	(stwcxe, stwxe, stxe, stwuxe, stuxe, stbxe, dcbtste, stbuxe): Likewise.
	(mfapidi, dcbte, lhzxe, lhzuxe, lhaxe, lhauxe, subfe64): Likewise.
	(subfeo64, adde64, addeo64, sthxe, sthuxe, subfze64): Likewise.
	(subfzeo64, addze64, addzeo64, dcbie, subfme64, subfmeo64): Likewise.
	(addme64, addmeo64, stdcxe., mcrxr64, lwbrxe, lfsxe, lfsuxe): Likewise.
	(lfdxe, lfduxe, stwbrxe, stfsxe, stfsuxe, stfdxe, dcbae): Likewise.
	(stfduxe, tlbivax, tlbivaxe, lhbrxe, ldxe, lduxe, tlbsx): Likewise.
	(tlbsxe, sthbrxe, stdxe, stduxe, icbie, stfiwxe, dcbze, lbze): Likewise.
	(lbzue, ldue, lhze, lhzue, lhae, lhaue, lwze, lwzue): Likewise.
	(stbe, stbue, sthe, sthue, stwe, stwue, lfse, lfsue, lfde): Likewise.
	(lfdue, stde, stdue, stfse, stfsue, stfde, stfdue): Likewise.

	* ppc-dis.c (print_insn_big_powerpc, print_insn_little_powerpc): Look
	for a disassembler option of `booke', `booke32' or `booke64' to enable
	BookE support in the disassembler.
2001-10-13 01:59:09 +00:00
John Healy 6e9a3f4d03 2001-10-12 John Healy <jhealy@redhat.com>
* cgen-dis.in (print_insn): Use min (cd->base_insn_bitsize, buflen*8)
        for the length when extracting the base part of the insn.
2001-10-12 18:28:57 +00:00
Nick Clifton f3a55c17eb work around locale problems for case insensitivity 2001-10-10 09:13:05 +00:00
Nick Clifton a5d2034ac0 fix z8k assembly and disassembly 2001-10-09 17:25:58 +00:00
Nick Clifton ddb682659b fix encoding & decoding of DSP single data transfer instructions 2001-10-09 12:25:22 +00:00
Nick Clifton 0e2ee3ca05 Fix compile time warnings in cgen-generated files 2001-10-09 08:54:58 +00:00
Aldy Hernandez b1ee46c5af * opcodess/arm-opc.h (arm_opcodes): Add cirrus insns.
* opcodes/arm-dis.c (print_insn_arm): Add 'I' case.
2001-10-08 18:50:37 +00:00
Alan Modra fcd8210c95 Regenerate configure to include the gettext.m4 change. Update
opcodes/po/POTFILES.in
2001-10-03 13:46:35 +00:00
Alan Modra 7997656ad8 * Makefile.am (Makefile): Depend on bfd/configure.in
Run "make dep-am"
	* Makefile.in: Regenerate.
2001-10-02 06:03:15 +00:00
John Healy 545ae5014f 2001-09-30 John Healy <jhealy@redhat.com>
* cgen-ibld.in (insert_1): Switched bfd_get_bits and bfd_set_bits
        calls to cgen_get_insn_value and cgen_put_insn_value calls.
        (extract_1): Switched bfd_get_bits call to cgen_get_insn_value call.
2001-09-30 20:06:37 +00:00
Hans-Peter Nilsson 8737c3eaee * Makefile.am: Update dependencies with "make dep-am".
* Makefile.in: Regenerate.
2001-09-30 18:54:18 +00:00
Alan Modra 86caa542b1 * arc-dis.c: Formatting fixes.
(my_sprintf): Define using VPARAMS, VA_OPEN, VA_FIXEDARG, VA_CLOSE.
2001-09-26 01:54:07 +00:00
Alan Modra 2ca0d95257 * arc-dis.c: Don't include <ctype.h>.
* openrisc-desc.c: Likewise.
	* openrisc-ibld.c: Likewise.
2001-09-21 12:36:56 +00:00
Nick Clifton 2c8721ecf3 oops - forgot to check for clean 64 bit build - fix compile time warning 2001-09-20 15:33:41 +00:00
Nick Clifton fc05c67f12 Fix compile time warnings 2001-09-20 15:28:25 +00:00
Nick Clifton d5b2f4d67c Fix compile time warning messages 2001-09-19 17:40:28 +00:00
H.J. Lu 3882b01078 Locale changes from Bruno Haible <haible@clisp.cons.org>. 2001-09-19 05:33:36 +00:00
Nick Clifton b6849f55b9 s390 assembler improvements and testsuite 2001-09-18 15:41:33 +00:00
Nick Clifton 2613489e4e Fix VXA mask bits 2001-09-14 10:52:26 +00:00
Alan Modra 8227b51f45 * i386-dis.c (grps): Don't print the implicit al/ax/eax register
for opcode 0xf6 or 0xf7 forms of mul, imul, div, idiv insns.
2001-09-04 01:58:07 +00:00
Eric Christopher 0823fbcae4 2001-08-31 Eric Christopher <echristo@redhat.com>
Jason Eckhardt    <jle@redhat.com>

	* mips-dis.c: Add support for bfd_mach_mipsisa32 and
	bfd_mach_mipsisa64. Remove bfd_mach_mips32, bfd_mach_mips32_4k,
	bfd_mach_mips64.
2001-08-31 21:15:00 +00:00
Andreas Jaeger 5bd67f350d * tic54x-opc.c: Add default initializers to avoid warnings.
* arc-opc.c: Include "sysdep.h" to get stdio.h as include file.
	* arc-ext.c: Likewise.
2001-08-31 20:05:24 +00:00
Andreas Jaeger b849bb4223 * m68hc11-dis.c: Add missing prototypes.
(forgotten in last checkin)
2001-08-28 16:27:55 +00:00
Matthew Green 0152a4c679 * ppc-opc.c (icbt): Order correctly. 2001-08-28 05:47:29 +00:00
Alan Modra 6ba045b129 * ppc-opc.c (DS): Add PPC_OPERAND_DS flag.
(LS): Define.
	(insert_ds): Complain if not a multiple of 4.
	(XSYNC): Define.
	(XSYNC_MASK): Define.
	(powerpc_opcodes): Add "slbmte", "lwsync", "ptesync", "slbmfev",
	"slbmfee".  Modify "sync" to use XSYNC_MASK and LS.
2001-08-27 10:27:48 +00:00
Andreas Jaeger 5b3fabc955 * h8500-opc.h: Add default initializers to h8500_table to shut up
GCC warnings.
2001-08-26 14:04:42 +00:00
Andreas Jaeger d83c654853 For include/opcode:
* d30v.h: Fix declaration of reg_name_cnt.

	* d10v.h: Fix declaration of d10v_reg_name_cnt.

	* arc.h: Add prototypes from opcodes/arc-opc.c.

For opcodes:
	* tic54x-dis.c: Add unused attributes where needed.

	* z8k-dis.c (output_instr): Add unused attribute.

	* h8300-dis.c: Add missing prototypes.
	(bfd_h8_disassemble): Make static.

	* cris-dis.c: Add missing prototype.
	* h8500-dis.c: Likewise.
	* m68hc11-dis.c: Likewise.
	* pj-dis.c: Likewise.
	* tic54x-dis.c: Likewise.
	* v850-dis.c: Likewise.
	* vax-dis.c: Likewise.
	* w65-dis.c: Likewise.
	* z8k-dis.c: Likewise.

	* d10v-dis.c: Add missing prototype.
	(dis_long): Remove unused variable.
	(dis_2_short): Likewise.

	* sh-dis.c: Add missing prototypes.
	* v850-opc.c: Likewise.
	Add unused attributes where needed.

	* ns32k-dis.c: Add missing prototypes.
	(bit_extract_simple): Remove unused variable.
2001-08-26 11:47:39 +00:00
Andreas Jaeger 355d475e91 * opcodes/s390-opc.c: Add "low or high" and "not low or high"
branch instructions for gcc 3.0.
	* opcodes/s390-opc.txt: Likewise.
2001-08-23 06:38:56 +00:00
Andreas Jaeger 279a96ca39 * mips-dis.c: Add missing prototypes.
* a29k-dis.c: Likewise.
	* arc-dis.c: Likewise.
	* ia64-opc.c: Likewise.
2001-08-21 08:51:12 +00:00
Andreas Jaeger 7fa108a4d5 * i960-dis.c: Add parameters for prototypes
(ctrl): Add unused attributes.
	(cobr): Likewise.
	(put_abs): Likewise.

	* mips-dis.c: Add missing prototypes.
	* a29k-dis.c: Likewise.
	* arc-dis.c: Likewise.
	* ia64-opc.c: Likewise.

	* s390-dis.c: Add missing prototypes.
	(init_disasm): Remove unused attribute since the parameter is
	used.
2001-08-21 08:42:28 +00:00
Thiemo Seufer 99c14723f3 Add support for MIPS R1[02]000 performance counter opcodes. 2001-08-16 19:24:33 +00:00
Jonathan Larmour 2cd8959083 * mips-opc.c: R3900s can support all branch likely INSN_MACROs where
the corresponding non-likely insn is in MIPS I.
2001-08-16 19:10:49 +00:00
Kazu Hirata 7f6621cdd7 * mcore-dis.c: Fix formatting.
* mips-dis.c: Likewise.
	* pj-dis.c: Likewise.
	* z8k-dis.c: Likewise.
2001-08-13 08:09:58 +00:00
Richard Henderson fc7bc88384 * cgen-ibld.in (extract_normal): Match type of VALUE and MASK
to *VALUEP.  Regenerate all cgen files.
2001-08-12 20:16:29 +00:00
Richard Sandiford d98bb281e8 * mips-dis.c (print_insn_mips): Remove OPCODE_IS_MEMBER's gp32
argument.
	* mips-opc.c (G6): Undefine.
	(mips_builtin_opcodes): Remove gp32 entry for "move".  Add macro
	as the first "move" alternative.
2001-08-10 16:22:08 +00:00
Andreas Jaeger 0218d1e4c2 * configure.in: Add -Wstrict-prototypes and -Wmissing-prototypes
to build warnings.
	* configure: Regenerate.
2001-08-10 10:56:47 +00:00
Alan Modra 11b37b7b84 Revert 2001-08-08 changes. 2001-08-10 01:34:47 +00:00
Alan Modra badaf34c72 * dis-buf.c (generic_strcat_address): Add missing prototype.
#if 0 the functions as it is unused.
2001-08-09 14:52:56 +00:00
Alan Modra 0f1bac05bb * ppc.h (struct powerpc_operand): New field `reloc'.
* ppc-opc.c: Include "bfd.h".
	(powerpc_operands): Add new field for reloc type.
2001-08-08 13:19:36 +00:00
Thiemo Seufer 21d34b1c68 * mips-dis.c (print_insn_arg): Don't use software integer registers
for coprocessor registers.
	(_print_insn_mips): Get distinction between old ABI and new ABI right.
2001-08-07 12:36:13 +00:00
Nick Clifton 28bab82b5a Cleanups for z8k target 2001-08-01 15:39:17 +00:00
Kazu Hirata 6608db5792 * i386-dis.c: Fix formatting. 2001-07-29 05:00:14 +00:00
Alan Modra d708bcbabb * i386-dis.c: Change formatting conventions for architecture
i386:intel to better match the format of various intel i386
	assemblers, like nasm, tasm or masm.
2001-07-28 07:13:34 +00:00
Kazu Hirata 2dcee5388a * d10v-dis.c: Fix formatting.
* d30v-dis.c: Likewise.
2001-07-25 01:42:14 +00:00
Alan Modra 8a5cc6beb1 Update dependencies with "make dep-am". 2001-07-24 10:02:00 +00:00
Kazu Hirata 33822a8e75 * alpha-dis.c: Fix formatting.
* cris-dis.c: Likewise.
	* m10300-dis.c: Likewise.
	* tic54x-dis.c: Likewise.
2001-07-24 04:10:19 +00:00
Kazu Hirata ec22bddae2 * m68k-dis.c: Fix formatting.
* pj-dis.c: Likewise.
	* z8k-dis.c: Likewise.
2001-07-24 00:48:04 +00:00
Kazu Hirata 44f2a95d95 * s390-dis.c: Fix formatting. 2001-07-23 13:41:14 +00:00
Chris Demetriou 209fd66729 2001-07-21 Chris Demetriou <cgd@broadcom.com>
* mips-opc.c (mips_builtin_opcodes): Sort c.le.s and c.lt.s
      into the rest of the surrounding definitions.
2001-07-21 20:46:51 +00:00
Alan Modra bcb5558b05 * i386-dis.c (grps): Print l or w suffix, and require mem modrm
for lgdt, lidt, sgdt, sidt.
2001-07-18 13:33:12 +00:00
Phil Blundell 4053649742 2001-07-13 Philip Blundell <philb@gnu.org>
* arm-dis.c (print_insn_arm): Use decimal for offsets in LDR/STR.
2001-07-16 19:04:31 +00:00
Jeff Johnston 23969580f6 2001-07-12 Jeff Johnston <jjohnstn@redhat.com>
* cgen-asm.in: Include "xregex.h" always to enable the libiberty
        regex support.
        (@arch@_cgen_build_insn_regex): New routine from Graydon.
        (@arch@_cgen_assemble_insn): Add Graydon's code to use regex
        to verify if it is worth parsing the insn as insn "x".  Also update
        error message when insn is not a recognized format of the insn vs
        when the insn is completely unrecognized.
2001-07-12 21:26:42 +00:00
Frank Ch. Eigler 81f6038f98 * some support for funny-endian 16/32-bit insn sets
[cgen/ChangeLog]
2001-07-11  Frank Ch. Eigler  <fche@redhat.com>

        * desc-cpu.scm (-gen-mach-table-defns): Emit fourth field: the
        mach->cpu insn-chunk-bitsize.
        (-gen-cpu-open): In @arch@_cgen_rebuild_tables, process above new
        field toward CGEN_CPU_TABLE->insn_chunk_bitsize.
        * mach.scm (<cpu>): New field insn-chunk-bitsize.
        (-cpu-parse, -cpu-read): Parse/initialize it.
        * doc/rtl.texi (define-cpu): Document it.

[opcodes/ChangeLog]
2001-07-11  Frank Ch. Eigler  <fche@redhat.com>

        * cgen-dis.in (print_insn): Use cgen_get_insn_value instead of
        bfd_get_bits.
        * cgen-opc.c (cgen_get_insn_value, cgen_put_insn_value): Respect
        non-zero CGEN_CPU_DESC->insn_chunk_bitsize.

[include/opcode/ChangeLog]
2001-07-11  Frank Ch. Eigler  <fche@redhat.com>

        * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
        (cgen_cpu_desc): Ditto.
2001-07-12 02:32:25 +00:00
Andreas Jaeger 7081ff0445 2001-07-09 Andreas Jaeger <aj@suse.de>, Karsten Keil <kkeil@suse.de>
* i386-dis.c (set_op): Handle 64 bit and 32 bit mode.
	(OP_J): Use bfd_vma for mask to work properly with 64 bits.
	(op_address,op_riprel): Use bfd_vma to handle 64 bits.
2001-07-09 14:22:11 +00:00
Ben Elliston 4a3264e6a1 2001-07-05 Ben Elliston <bje@redhat.com>
* Makefile.am (CPUDIR): Define.
	(stamp-m32r): Update dependencies.
	(stamp-fr30): Ditto.
	(stamp-openrisc): Ditto.
	* Makefile.in: Regenerate.
2001-07-05 13:12:23 +00:00
Nick Clifton 2dd46b8b52 Fix encoding of clf instruction 2001-07-03 18:37:39 +00:00
Geoffrey Keating 17f0ac8499 * cgen-ibld.in (insert_normal): Support CGEN_IFLD_SIGN_OPT. 2001-07-01 02:48:46 +00:00
Geoffrey Keating 5e91c3b431 * cgen-asm.c (cgen_parse_keyword): Allow any first character.
* cgen-opc.c (cgen_keyword_add): Ignore special first
	character when building nonalpha_chars field.
2001-06-29 00:09:16 +00:00
Ben Elliston 62d964d839 2001-06-24 Ben Elliston <bje@redhat.com>
* m88k-dis.c: Format to conform to GNU coding standards.
2001-06-24 01:04:16 +00:00
Andreas Jaeger 7f32bebcaa * disassemble.c (disassembler_usage): Add unused attribute. 2001-06-23 16:07:06 +00:00
Eric Christopher 564e8ad940 2001-06-22 Eric Christopher <echristo@redhat.com>
* mips-opc.c: Move prefx to start of the table.
2001-06-22 21:10:01 +00:00
Nick Clifton fe1f01309f Fix over-optimisation of ST instruction. 2001-06-22 08:55:05 +00:00
Nick Clifton 80febfb656 Add wdebug instruction 2001-06-22 08:21:14 +00:00
Aldy Hernandez cb87eaaf22 2001-06-15 Aldy Hernandez <aldyh@redhat.com>
* m10300-opc.c (mn10300_opcodes): Change opcode for AM33 subc.
2001-06-16 16:00:46 +00:00
Geoffrey Keating 3e89004774 Index: opcodes/ChangeLog
2001-06-13  Geoffrey Keating  <geoffk@redhat.com>

	* cgen-asm.c (cgen_parse_keyword): When looking for the
	boundaries of a keyword, allow any special characters
	that are actually in one of the allowed keyword.
	* cgen-opc.c (cgen_keyword_add): Add any special characters
	to the nonalpha_chars field.

Index: cgen/ChangeLog
2001-06-13  Geoffrey Keating  <geoffk@redhat.com>

	* desc.scm (<keyword> 'gen-defn): Add extra zero into
	CGEN_KEYWORD_ENTRY initializers.

Index: include/opcode/ChangeLog
2001-06-13  Geoffrey Keating  <geoffk@redhat.com>

	* cgen.h (cgen_keyword): Add nonalpha_chars field.
2001-06-14 20:38:42 +00:00
Nick Clifton 6fc1282450 Add lgh instruction. 2001-06-12 11:50:53 +00:00
Alan Modra 6439fc285d Merge insn decode tables, and generally tidy. 2001-06-11 13:25:07 +00:00
Alan Modra 5dd0794dca Branch hints for Pentium4 as insn modifiers, and some minor tweaks
to formatting.
2001-06-10 14:07:12 +00:00
Alexandre Oliva bda22bbf15 * sh-opc.h (sh_table): Don't use empty initializers. 2001-06-09 22:42:30 +00:00
Nick Clifton 879db8be1a Remove warnings building z8k port.
Fix ld -r behaviour
2001-06-06 17:01:35 +00:00
Nick Clifton 98b3248268 correct some 68k/ColdFire problems 2001-06-06 14:28:00 +00:00
Alan Modra 3ffd33cf59 * i386-dis.c (cond_jump_flag, loop_jcxz_flag): Define.
(cond_jump_mode, loop_jcxz_mode): Define.
	(dis386_att): Add cond_jump_flag and loop_jcxz_flag as
	appropriate, and 'F' suffix to loop insns.
	(disx86_64_att): Likewise.
	(dis386_twobyte_att): Likewise.
	(print_insn_i386): Don't output addr prefix for loop, jcxz insns.
	Output data size prefix for long conditional jumps.  Output cs and
	ds branch hints.
	(putop): Handle 'F', and mark PREFIX_ADDR used for case 'E'.
	(OP_J): Don't make PREFIX_DATA used.
2001-06-06 10:24:18 +00:00
Alexandre Oliva 9ab433aae8 * sh-opc.h (sh_table): Complete last element entry to avoid
compiler warning.
2001-06-04 04:10:38 +00:00
Nick Clifton d1cf510e5e Add MIPS r12k support 2001-05-23 17:26:40 +00:00
Alan Modra 2c32d9a41f More whitespace fixes. 2001-05-23 03:25:03 +00:00
Alan Modra cba24d7dbd * arc-opc.c: Whitespace changes. 2001-05-23 03:12:14 +00:00
Alexandre Oliva 6be7c12c05 * ltconfig, ltmain.sh, libtool.m4, ltcf-c.sh, ltcf-cxx.sh,
ltcf-gcj.sh: Upgraded to libtool 1.4a 1.641.2.254.  Rebuilt a number
of subdir/configure scripts to use the new libtool.m4.
2001-05-20 19:02:56 +00:00
Hans-Peter Nilsson 22f3fc4323 * cris-opc.c (cris_spec_regs): Add missing initializer field for
last element.
2001-05-18 15:21:59 +00:00
Frank Ch. Eigler 84fd0d38ae * cgen disasm bug fix
2001-05-15  Frank Ch. Eigler  <fche@redhat.com>

	* cgen-dis.in (extract_normal): Complete support for min<base case.
2001-05-15 18:10:05 +00:00
Nick Clifton aa5f19f2b9 Fix MIPS disassembler so that it produces reassemblable code. 2001-05-15 12:11:13 +00:00
J.T. Conklin 24a7a601e2 * ppc-opc.c (powerpc_opcodes): Fixed extended opcode field of
simplified mnemonics used for setting PPC750-specific special
purpose registers.
2001-05-14 17:20:13 +00:00
H.J. Lu 8d5ec59972 2001-05-12 H.J. Lu <hjl@gnu.org>
* i386-dis.c (print_insn_i386): Always set `mod', `reg' and
	`rm'.
2001-05-12 15:19:22 +00:00
Alan Modra bcee8eb8ca Peter Targett's backwards compatibility and other arc fixes. 2001-05-12 15:14:53 +00:00
Alan Modra 4bba68155d * i386-dis.c (twobyte_has_modrm): Update table.
(need_modrm): Give it file scope.
	(MODRM_CHECK): Define.
	(dofloat): Use MODRM_CHECK.
	(OP_E): Likewise.
	(OP_EM): Likewise.
	(OP_EX): Likewise.
and fix testsuite yet again now that we are getting correct disassembly.
2001-05-12 12:07:10 +00:00
Alan Modra 67d6227df7 Correct cvtps2dq, movdq2q, movq2dq, and movq problems. 2001-05-12 09:52:40 +00:00
Frank Ch. Eigler a00ad97d61 * cgen asm/disasm
[opcodes/ChangeLog]
2001-05-07  Frank Ch. Eigler  <fche@redhat.com>

        * cgen-dis.in (default_print_insn): Tolerate min<base instructions
        even at end of a section.
        * cgen-ibld.in (extract_normal): Tolerate min!=base!=max instructions
        by ignoring precariously-unpacked insn_value in favor of raw buffer.

[cgen/ChangeLog]
2001-05-07  Frank Ch. Eigler  <fche@redhat.com>

        * iformat.scm (compute-insn-base-mask-length): Rewrite to tolerate
        various-base-length instruction sets.
2001-05-07 17:55:21 +00:00
Alan Modra a28d0f3d9b * disassemble.c (disassembler_usage): Remove unused attribute. 2001-05-07 09:21:56 +00:00
Frank Ch. Eigler 714b578b87 * typo fix 2001-05-04 17:46:00 +00:00
Frank Ch. Eigler 5264623336 * m32r disasm bug fix
2001-05-04  Frank Ch. Eigler  <fche@redhat.com>

	* m32r-dis.c, -asm.c, -ibld.c: Regenerated with disassembler fixes.

2001-05-04  Frank Ch. Eigler  <fche@redhat.com>

	* cgen-dis.in (print_insn): Remove call to read_insn.  Instead,
	assume incoming buffer already has the base insn loaded.  Handle
	case of smaller-than-base instructions for variable-length case.
2001-05-04 17:45:19 +00:00
Alan Modra 992aaec9a9 Assorted fixes to pinsrw, pextrw, pmovmskb, movmskp, maskmovq. 2001-05-04 11:10:55 +00:00
Nick Clifton 87e6d78217 Add openRISC support in opcodes 2001-04-27 13:34:20 +00:00
Nick Clifton 6840198f93 z8k fixes 2001-04-24 15:22:25 +00:00
Andreas Jaeger c241941156 * i386-dis.c: Add ffreep instruction. 2001-04-06 09:27:33 +00:00
Alexandre Oliva 3eb9799d10 * ppc-opc.c (insert_mbe): Shift mask initializer as long. 2001-03-30 07:36:27 +00:00
Ben Elliston 0e70c820dd * Comment tweak. 2001-03-27 21:37:47 +00:00
Alan Modra 0f17484fd3 Small tweaks to sse2 instructions. 2001-03-24 06:29:16 +00:00
Nick Clifton e93d71992f Remove extraneous whitespace 2001-03-24 00:40:22 +00:00
Ben Elliston fca2040b45 2001-03-22 Ben Elliston <bje@redhat.com>
* cgen-asm.in (@arch@_cgen_assemble_insn): Move tmp_errmsg
	declaration inside CGEN_VERBOSE_ASSEMBLER_ERRORS conditional.
	* cgen-ibld.in (put_insn_int_value): Mark cd parameter as unused
	to allay a compiler warning.
2001-03-22 04:05:03 +00:00
Alan Modra 87890af05c paddq and psubq support. 2001-03-22 02:27:54 +00:00
Patrick Macdonald 27fca2d871 Add support for cgen machine determination.
* cgen-dis.in (print_insn_@arch@): Add support for target machine
        determination via CGEN_COMPUTE_MACH.
        * fr30-desc.c: Regenerate.
        * fr30-dis.c: Regenerate.
        * fr30-opc.h: Regenerate.
        * m32r-desc.c: Regenerate.
        * m32r-dis.c: Regenerate.
        * m32r-opc.h: Regenerate.
        * m32r-opinst.c: Regenerate.
2001-03-20 20:56:34 +00:00
H.J. Lu f4fbb4a3d1 2001-03-20 H.J. Lu <hjl@gnu.org>
* configure.in: Remove the redundent AC_ARG_PROGRAM.
	* configure: Rebuild.
2001-03-20 18:24:30 +00:00
Jim Wilson f4bc6bb0c2 Fix 2 bugs with parsing the resource dependency tables.
* ia64-gen.c (fetch_insn_class): If xsect, then ignore comment and
	notestr if larger than xsect.
	(in_class): Handle format M5.
	* ia64-asmtab.c: Regnerate.
2001-03-20 02:32:27 +00:00
Alan Modra bbe6d95f46 Don't try to read past end of info buffer, and correct test results. 2001-03-19 12:20:10 +00:00
Nick Clifton 82b66b2339 Add new opcodes 2001-03-16 18:42:26 +00:00
Nick Clifton 060d22b0d0 Fix typos in ChangeLogs; fix dates in copyright notices 2001-03-13 22:58:38 +00:00
Nick Clifton 5794c9d6cd fix typos 2001-03-13 06:14:01 +00:00
Nick Clifton 4f3c3dbb37 Fix BLX(1) for Thumb 2001-03-06 22:33:47 +00:00
Nick Clifton 9d29e1b3e2 est of the changes for Coldfire V4 2001-03-06 20:13:31 +00:00
Dave Brolley 2edda1bf34 Correct filenames from last commit. 2001-03-05 16:01:29 +00:00
Dave Brolley b3466c39bc 2001-03-05 Dave Brolley <brolley@redhat.co
* opcodes/fr30-asm.c: Regenerate.
        * opcodes/fr30-desc.c: Regenerate.
        * opcodes/fr30-desc.h: Regenerate.
        * opcodes/fr30-dis.c: Regenerate.
        * opcodes/fr30-ibld.c: Regenerate.
        * opcodes/fr30-opc.c: Regenerate.
        * opcodes/fr30-opc.h: Regenerate.
        * opcodes/m32r-asm.c: Regenerate.
        * opcodes/m32r-desc.c: Regenerate.
        * opcodes/m32r-desc.h: Regenerate.
        * opcodes/m32r-dis.c: Regenerate.
        * opcodes/m32r-ibld.c: Regenerate.
        * opcodes/m32r-opc.c: Regenerate.
        * opcodes/m32r-opc.h: Regenerate.
        * opcodes/m32r-opinst.c: Regenerate.
2001-03-05 15:55:01 +00:00
Nick Clifton 80a523c2e1 new defines for Coldfire V4. 2001-02-28 23:47:10 +00:00
Alan Modra 27b7e12d2d Bump version to 2.11.90, fix missing dependencies in bfd/,
and run "make dep-am".
2001-02-27 06:43:56 +00:00
H.J. Lu b8e0eda247 2001-02-23 David Mosberger <davidm@hpl.hp.com>
* ia64-opc-a.c: Add missing pseudo-ops for "cmp" and "cmp4".
	* ia64-asmtab.c: Regenerate.
2001-02-23 21:57:48 +00:00
Jim Wilson 87f8eb977e Improve gas error messages for invalid instructions.
* cpu-ia64-opc.c (elf64_ia64_operands}: Fix typo: error string for
	C8 said "1" instead of "8".  Clarify error string for IMM22:
	"signed integer" instead of just "integer".
	* config/tc-ia64.c (enum operand_match_result): New type.
	(operand_match): Change return type to operand_match_result.
	Fix all returns appropriately, adding support for returning the
	out-of-range result.
	(parse_operands): New locals result, error_pos, out_of_range_pos,
	curr_out_of_range_pos.  Rewrite operand matching loop to give better
	error messages.
	* ia64-opc-d.c (ia64_opcodes_d): Break the "add" pattern into two
	separate variants: one for IMM22 and the other for IMM14.
	* ia64-asmtab.c: Regenerate.
2001-02-22 03:16:21 +00:00
Greg McGary dd425adaa8 * cgen-opc.c (cgen_get_insn_value): Add missing `return'. 2001-02-21 21:54:31 +00:00
H.J. Lu b34fb0b488 2001-02-20 H.J. Lu <hjl@gnu.org>
* Makefile.am (ia64-ic.tbl): Remove the target.
	(ia64-raw.tbl): Likewise.
	(ia64-waw.tbl): Likewise.
	(ia64-war.tbl): Likewise.
	(ia64-asmtab.c): Generate it in the source directory.
	* Makefile.in: Regenerated.
2001-02-21 00:07:39 +00:00
Nick Clifton e135f41bc2 Add PDP-11 support 2001-02-18 23:33:11 +00:00
Jim Wilson 42dc96cab8 Fix DV bug reported by Intel against the setf instruction.
* ia64-ic.tbl: Update from Intel.  Add setf to fr-writers.
	* ia64-asmtab.c: Regenerate.
2001-02-14 20:30:26 +00:00
Jan Hubicka 76f227a511 * i386.h (i386_optab): SSE integer converison instructions have
64bit versions on x86-64.
	* i386-dis.c (prefix_user_t): Add 'Y' to SSE ineger converison
	instructions.
	(putop): Handle 'Y'
2001-02-12 16:42:49 +00:00
Nick Clifton 9117d2197e Apply several patches from Maciej W. Rozycki 2001-02-11 23:11:41 +00:00
Michael Sokolov 847ee773ea * Makefile.am (stamp-lib): ranlib the libopcodes.a in the build
directory.
	* Makefile.in: Regenerate.
2001-02-11 22:56:42 +00:00
Nick Clifton a85d7ed0f0 Add s390 support 2001-02-10 00:58:38 +00:00
Jim Wilson e594303548 Revert accidental breakage from Nick's 2000-12-16 checkin.
* ia64-asmtab.c: Revert 2000-12-16 change.
2001-02-06 02:42:20 +00:00
Patrick Macdonald 0715dc88cf Binutils portion of fix for syntax array elements when max
operands is greater than 127.

	2001-02-02  Patrick Macdonald  <patrickm@redhat.com>

	* cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
	(CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
	(CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.

	* fr30-desc.h: Regenerate with CGEN_MAX_SYNTAX_ELEMENTS.
	* m32r-desc.h: Regenerate.
2001-02-02 23:04:40 +00:00
Jan Hubicka 905308801e * (dis386_att, grps): Use 'T' for push/pop
(putop): Handle 'T', alphabetize order, fix 'I' handling in Intel syntax
2001-02-01 15:30:55 +00:00
Alan Modra 1328dc9844 Adds assembly and dis-assembly support for the HPPA wide
mode, 16 bit forms of ldi, ldo, ldw and stw instructions.
2001-01-14 05:14:45 +00:00
Nick Clifton b7ed8fad53 formatting fix 2001-01-13 19:45:52 +00:00
Jan Hubicka e2914f484e * i386.c (md_assemble): Check cpu_flags even for nullary instructions.
* i386.h (i386_optab): Fix pusha and ret templates.

	* i386-dis.c (dis386_att, disx86_64_att): Fix ret, lret and iret
	templates.
2001-01-13 09:05:55 +00:00
Nick Clifton 0d2bcfafbf Updated ARC assembler from arccores.com 2001-01-11 21:20:20 +00:00
Nick Clifton 2f6d2f8520 Rotate ChangeLogs 2001-01-11 19:01:42 +00:00
Jan Hubicka 041bd2e00c * i386-dis.c (PREGRP15 - PREGRP24): New.
(dis386_twobyt): Add SSE2 instructions.
	(twobyte_uses_SSE_prefix: Rename from ... ; add new SSE instructions.
	(twobyte_uses_f3_prefix): ... this one.
	(grps): Add SSE instructions.
	(prefix_user_table): Add two new slots; add SSE2 instructions.
	(print_insn_i386): Rename uses_f3_prefix to uses_SSE_prefix;
	Handle the REPNZ and Data16 prefixes as well; do proper lookup
	to prefix_user_table.
	(OP_E): Accept mfence and lfence as well.
	(OP_MMX): Data16 prefix turns MMX to SSE; support REX extensions.
	(OP_XMM): Support REX extensions.
	(OP_EM): Likewise.
	(OP_EX): Likewise.
2001-01-10 14:14:25 +00:00
Nick Clifton 6a56ec7ea3 Fix disassembly of arm-elf instructions with relocs associated with them. 2001-01-09 20:29:48 +00:00
Jeff Johnston 4a9f416d92 2001-01-09 Jeff Johnston <jjohnstn@redhat.com>
* cgen-asm.in (parse_insn_normal): Changed syn to be
        CGEN_SYNTAX_CHAR_TYPE.  Changed all references to *syn
        as character to use CGEN_SYNTAX_CHAR macro and all comparisons
        to '\0' to use 0 instead.
        * cgen-dis.in (print_insn_normal): Ditto.
        * cgen-ibld.in (insert_insn_normal, extract_insn_normal): Ditto.
2001-01-09 17:00:21 +00:00
Jan Hubicka 52b15da39a * i386-dis.c: Add x86_64 support.
(rex): New static variable.
	(REX_MODE64, REX_EXTX, REX_EXTY, REX_EXTZ): New constants.
	(USED_REX): New macro.
	(Ev, Ed, Rm, Iq, Iv64, Cm, Dm, Rm*, Ob64, Ov64): New macros.
	(OP_I64, OP_OFF64, OP_IMREG): New functions.
	(OP_REG, OP_OFF): Declare.
	(get64, get32, get32s): New functions.
	(r??_reg): New constants.
	(dis386_att): Change templates of instruction implicitly promoted
	to 64bit; change e?? to RMe?? for unwind RM byte instructions.
	(grps): Likewise.
	(dis386_intel): Likewise.
	(dixx86_64_att): New table based on dis386_att.
	(dixx86_64_intel): New table based on dis386_intel.
	(names64, names8rex): New global variable.
	(names32, names16): Add extended registers.
	(prefix_user_t): Recognize rex prefixes.
	(prefix_name): Print REX prefixes nicely.
	(op_riprel): New global variable.
	(start_pc): Set type to bfd_vma.
	(print_insn_i386): Detect the 64bit mode and use proper table;
	move ckprefix after initializing the buffer; output unused rex prefixes;
	output information about target of RIP relative addresses.
	(putop): Support 'O' and 'I'. Update handling of "P', 'Q', 'R' and 'S';
	(print_operand_value): New function.
	(OP_E, OP_G, OP_REG, OP_I, OP_J, OP_DIR, OP_OFF, OP_D): Add support for
	REX prefix and new modes.
	(get64, get32s): New.
	(get32): Return bfd_signed_vma type.
	(set_op): Initialize the op_riprel.
	* disassemble.c (disassembler): Recognize the x86-64 disassembly.
2001-01-05 11:11:54 +00:00
Frank Ch. Eigler 7e30bc3635 * generalization
2001-01-03  Richard Sandiford  <r.sandiford@redhat.com>

	 cgen-dis.in (read_insn): Use bfd_get_bits()
2001-01-03 15:10:26 +00:00
Frank Ch. Eigler aed80daedf * generalization
2001-01-02  Richard Sandiford  <rsandifo@redhat.com>

	* cgen-dis.c (hash_insn_array): Use bfd_put_bits().
	(hash_insn_list): Likewise
	* cgen-ibld.in (insert_1): Use bfd_put_bits() and bfd_get_bits().
	(extract_1): Use bfd_get_bits().
	(extract_normal): Apply sign extension to both extraction
	methods.
	* cgen-opc.c (cgen_get_insn_value): Use bfd_get_bits()
	(cgen_put_insn_value): Use bfd_put_bits()
2001-01-02 16:34:07 +00:00
Frank Ch. Eigler 149fe25ee9 * error msg tweak
2000-12-28  Frank Ch. Eigler  <fche@redhat.com>

	* cgen-asm.in (parse_insn_normal): Print better error message for
	instructions with missing operands.
2000-12-28 19:53:54 +00:00
Nick Clifton a6cff3e317 Fix for compiling under Solaris 2.8 2000-12-21 18:43:33 +00:00
Nick Clifton 099194551f Regenerate files 2000-12-16 22:01:44 +00:00
Frank Ch. Eigler 606d55bcee * error message improvements for cgen assemblers
2000-12-12  Frank Ch. Eigler  <fche@redhat.com>

        * cgen-asm.in (@arch@_cgen_assemble_insn): Prefer printing insert-time
        error messages over later parse-time ones.
2000-12-13 18:55:02 +00:00
Jim Wilson 514829c3af Eliminate ia64 compiler warnings. Fix ia64 gas testsuite again.
*  elfxx-ia64.c (get_dyn_sym_info): Cast %p argument to void *.
	* config/tc-ia64.h (ia64_init): Add prototype.
	* gas/ia64/dv-imply.d, gas/ia64/dv-mutex.d, gas/ia64/dv-safe.d,
	gas/ia64/dv-srlz.d, gas/ia64/opc-m.d: Update.
	* ia64-dis.c (print_insn_ia64): Cast away const on ia64_free_opcode
	argument.
	* ia64_gen.c (insert_deplist): Cast sizeof result to int.
	(print_dependency_table): Print NULL if semantics field not set.
	(insert_opcode_dependencies): Mark cmp parameter as unused.
	(print_main_table): Use fprintf_vma to print long long fields.
	(main): Mark argv paramter as unused.  Convert to old style definition.
	* ia64-opc.c (ia64_find_dependency): Cast sizeof result to int.
	* ia64-asmtab.c: Regnerate.
2000-12-12 22:56:36 +00:00
Nick Clifton 239f0c5ce5 Update copyright dates 2000-12-12 19:19:57 +00:00
Nick Clifton 54faae252f Prevent re-read of instruction from wrong address. 2000-12-09 23:20:59 +00:00
Nick Clifton 708b8a713d Regenerate fr30-dis.c 2000-12-09 22:22:33 +00:00
Nick Clifton 0808b8a9ca Add MIPS64 instructions and tests 2000-12-03 22:10:02 +00:00
Nick Clifton 15305553c3 Remove all uses of M1. 2000-12-03 21:58:27 +00:00
Nick Clifton 08fe7a7e60 Use the WR_HILO, RD_HILO, MOD_HILO, and MOD_LO macros. 2000-12-03 21:49:06 +00:00
Nick Clifton e70f259005 Finish off adding MIPS32 instructions. 2000-12-03 21:34:08 +00:00
Nick Clifton c6c98b3833 Add MIPS SB1 machine 2000-12-02 01:10:33 +00:00
Nick Clifton 84ea6cf2c5 Add MIPS V and MIPS 64 machine numbers 2000-12-02 00:55:22 +00:00
Nick Clifton e7af610e14 Add MIPS32 as a seperate MIPS architecture 2000-12-01 21:35:38 +00:00
Nick Clifton b23da31b1c Add initialiser for membership field 2000-12-01 20:06:36 +00:00
Nick Clifton 4372b67322 Improve MIPS32 support 2000-12-01 20:05:32 +00:00
Hans-Peter Nilsson caaaf822e9 * sh-dis.c (print_insn_ddt): Make insn_x, insn_y unsigned.
(print_insn_ppi): Make nib1, nib2, nib3 unsigned.
	Initialize variable dc to NULL.
	(print_insn_shx): Remove unused label d_reg_n.
2000-11-28 23:42:53 +00:00
Nick Clifton 077b8428ab Add ARM v5t, v5te and XScale support 2000-11-25 00:21:40 +00:00
Chris Demetriou 657e7cec5a * mips-opc.c: Fix file header comment. 2000-11-22 18:01:56 +00:00
Hans-Peter Nilsson b6b0b32c89 * cris-dis.c (cris_get_disassembler): If abfd is NULL, return
print_insn_cris_with_register_prefix.
2000-11-14 20:08:55 +00:00
Alexandre Oliva 54a4ca2e1d * sh-opc.h: The operand of `mov.w r0, (<disp>,GBR)' is IMM1, not 0. 2000-11-11 05:42:01 +00:00
Dave Brolley 025d2eabfc Last change was actually made by Matthew Green. 2000-11-07 17:25:30 +00:00
Dave Brolley 1ffd7d025c 2000-11-07 Dave Brolley <brolley@redhat.com>
* cgen-dis.in (print_insn): All insns which can fit into insn_value
	must be loaded there in their entirety.
2000-11-07 17:20:25 +00:00
Jakub Jelinek 19f7b01094 gas/
* config/tc-sparc.c (sparc_ip): Fix a bug which caused v9_arg_p
	instructions to loose any special insn->architecture mask.

	* config/tc-sparc.c (v9a_asr_table): Add v9b ASRs.
	(sparc_md_end, sparc_arch_types, sparc_arch,
	sparc_elf_final_processing): Handle v8plusb and v9b architectures.
	(sparc_ip): Handle siam mode operands. Support v9b ASRs (and
	request v9b architecture if they are used).

bfd/
	* elf32-sparc.c (elf32_sparc_merge_private_bfd_data,
	elf32_sparc_object_p, elf32_sparc_final_write_processing):
	Support v8plusb.
	* elf64-sparc.c (sparc64_elf_merge_private_bfd_data,
	sparc64_elf_object_p): Support v9b.
	* archures.c: Declare v8plusb and v9b machines.
	* bfd-in2.h: Ditto.
	* cpu-sparc.c: Ditto.

include/opcode/
	* sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
	Note that '3' is used for siam operand.

opcodes/
	* sparc-dis.c (v9a_asr_reg_names): Add v9b ASRs.
	(compute_arch_mask): Add v8plusb and v9b machines.
	(print_insn_sparc): siam mode decoding, accept ASRs up to 25.
	* opcodes/sparc-opc.c: Support for Cheetah instruction set.
	(prefetch_table): Add #invalidate.
2000-10-20 10:38:47 +00:00
Nick Clifton 710c2d976f Change mask for OC to 0xFE00 2000-10-16 18:18:47 +00:00
Dave Brolley f40c3ea3c7 2000-10-06 Dave Brolley <brolley@redhat.com>
* fr30-desc.h: Regenerate.
	* m32r-desc.h: Regenerate.
	* m32r-ibld.c: Regenerate.
2000-10-06 16:57:26 +00:00
Jim Wilson afa680f89a Minor DV table update, minor DV checking bug fix.
* config/tc-ia64.c (resources_match): Handle IA64_RS_PRr.
	* ia64-ic.tbl: Update from Intel.
	* ia64-asmtab.c: Regenerate.
2000-10-05 21:55:25 +00:00
Kazu Hirata d1e28e240d 2000-10-04 Kazu Hirata <kazu@hxi.com>
* ia64-gen.c: Convert C++-style comments to C-style comments.
	* tic54x-dis.c: Likewise.
2000-10-04 06:38:01 +00:00
Alexandre Oliva d64552c589 * ltconfig, ltmain.sh, libtool.m4: Updated from libtool
multi-language branch, to work around Solaris' /bin/sh bug.  Rebuilt
all affected `configure' scripts.
2000-09-30 06:07:00 +00:00
Hans-Peter Nilsson b4db717d67 Correct date of checkin 2000-09-29 18:23:26 +00:00
Hans-Peter Nilsson 78966507d6 Changes to add dollar prefix to registers for files where user symbols
don't have a leading underscore.  Fix formatting.
	* cris-dis.c (REGISTER_PREFIX_CHAR): New.
	(format_reg): Add parameter with_reg_prefix.  All callers changed.
	(print_with_operands): Ditto.
	(print_insn_cris_generic): Renamed from print_insn_cris, add
	parameter with_reg_prefix.
	(print_insn_cris_with_register_prefix,
	print_insn_cris_without_register_prefix, cris_get_disassembler):
	New.
	* disassemble.c (disassembler) [ARCH_cris]: Call cris_get_disassembler.
2000-09-29 18:17:25 +00:00
Jim Wilson d48ad4f3b6 Add missing fpcmp instructions, and add missing fcmp/fpcmp tests.
* gas/ia64/opc-f.pl: Add missing fcmp and fpcmp tests.
	* gas/ia64/opc-f.s, gas/ia64/opc-f.d: Regenerate.
	* ia64-opc-f.c (ia64_opcodes_f): Add fpcmp pseudo-ops for
	gt, ge, ngt, and nge.
	* ia64-asmtab.c: Regenerate.
2000-09-22 22:34:41 +00:00
Jim Wilson 139368c9f3 Fix ia64 gas testsuite. Update ia64 DV tables. Fix ia64 gas testsuite again.
gas/ChangeLog
	* config/tc-ia64.c (dv_sem): Add "stop".
	(specify_resource, case IA64_RS_PR): Only handles regs 1 to 15 now.
	(specify_resource, case IA64_RS_PRr): New for regs 16 to 62.
	(specify_resource, case IA64_RS_PR63): Reorder (note == 7) test to
	match above.
	(mark_resources): Check IA64_RS_PRr.
gas/testsuite/ChangeLog
	* gas/ia64/dv-raw-err.s: Add new testcases for PR%, 16 - 62.
	* gas/ia64/dv-waw-err.s: Likewise.
	* gas/ia64/dv-imply.d: Regenerate.
	* gas/ia64/dv-mutex.d, gas/ia64/dv-raw-err.l, gas/ia64/dv-safe.d,
	gas/ia64/dv-srlz.d, gas/ia64/dv-war-err.l, gas/ia64/dv-waw-err.l,
	gas/ia64/opc-f.d, gas/ia64/opc-i.d, gas/ia64/opc-m.d: Likewise.
include/opcode/ChangeLog
	* ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
opcodes/ChangeLog
	* ia64-dis.c (print_insn_ia64): Revert Aug 7 byte skip count change.
	* ia64-gen.c (parse_semantics): Handle IA64_DVS_STOP.
	(lookup_specifier): Handle "PR%, 1 to 15" and "PR%, 16 to 62".
	* ia64-ic.tbl, ia64-raw.tbl, ia64-war.tbl, ia64-waw.tbl: Update.
	* ia64-asmtab.c: Regnerate.
2000-09-22 19:43:50 +00:00
Nick Clifton 156c2f8bf7 Add support for the MIPS32 2000-09-14 01:47:38 +00:00
Catherine Moore de827f513e 2000-09-11 Catherine Moore <clm@redhat.com>
* d30v-opc.c (d30v_operand_t): New operand type Rb2.
      (d30v_format_tab): Use Rb2 for modinc and moddec.
2000-09-11 17:54:33 +00:00
Catherine Moore ea2aae66fe * d30v-opc.c (d30v_format_tab): Use format Ra for
modinc and moddec.
2000-09-07 18:23:36 +00:00
Alexandre Oliva 90f2472aa1 * configure: Rebuilt with new libtool.m4. 2000-09-06 13:42:23 +00:00