f98fa53424
2009-10-02 H.J. Lu <hongjiu.lu@intel.com>
...
* i386-opc.tbl: Drop Disp64 on jump and loop instructions.
* i386-tbl.h: Regenerated.
2009-10-02 19:03:40 +00:00
e0c483d688
typo fix
2009-10-02 15:35:01 +00:00
9fe54b1ca1
gas/
...
* config/tc-ppc.c (md_show_usage): Document -m476.
* doc/c-ppc.texi (PowerPC-Opts): Document -m476.
gas/testsuite/
* gas/ppc/476.s: New test.
* gas/ppc/476.d: Likewise.
* gas/ppc/ppc.exp: Run the 476 test.
include/opcode/
* ppc.h (PPC_OPCODE_476): Define.
opcodes/
* ppc-dis.c (ppc_opts): Add "476" entry.
* ppc-opc.c (PPC476): Define.
(powerpc_opcodes): Update mnemonics where required for 476.
2009-10-02 14:42:42 +00:00
634b50f2a6
gas/
...
* config/tc-ppc.c (md_show_usage): Rename "ppca2" to "a2".
* doc/c-ppc.texi (PowerPC-Opts): Likewise.
gas/testsuite/
* gas/ppc/a2.d: Rename "ppca2" to "a2".
include/opcode/
* ppc.h (PPC_OPCODE_A2): Rename from PPC_OPCODE_PPCA2.
opcodes/
* ppc-opc.c (PPCA2): Use renamed mask PPC_OPCODE_A2.
* ppc-dis.c (ppc_opts): Likewise.
Rename "ppca2" to "a2".
2009-10-01 19:24:48 +00:00
4ded9dda7c
2009-10-01 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
...
* crx-dis.c (match_opcode): Truncate mcode to 32-bit.
2009-10-01 08:19:55 +00:00
c7927a3c0e
bfd
...
* Makefile.am (ALL_MACHINES): Add cpu-rx.lo.
(ALL_MACHINES_CFILES): Add cpu-rx.c.
(BFD32_BACKENDS): Add elf32-rx.lo.
(BFD32_BACKENDS_CFILES): Add elf32-rx.c.
* archures.c (bfd_architecture): Add bfd_arch_rx and bfd_mach_rx.
Export bfd_rx_arch.
(bfd_archures_list): Add bfd_rx_arch.
* config.bfd: Add entry for rx-*-elf.
* configure.in: Add entries for bfd_elf32_rx_le_vec and
bfd_elf32_rx_be_vec.
* reloc.c: Add RX relocations.
* targets.c: Add RX target vectors.
* Makefile.in: Regenerate.
* bfd-in2.h: Regenerate.
* configure: Regenerate.
* libbfd.h: Regenerate.
* cpu-rx.c: New file.
* elf32-rx.c: New file.
binutils
* readelf.c: Add support for RX target.
* MAINTAINERS: Add DJ and NickC as maintainers for RX.
gas
* Makefile.am: Add RX target.
* configure.in: Likewise.
* configure.tgt: Likewise.
* read.c (do_repeat_with_expander): New function.
* read.h: Provide a prototype for do_repeat_with_expander.
* doc/Makefile.am: Add RX target documentation.
* doc/all.texi: Likewise.
* doc/as.texinfo: Likewise.
* Makefile.in: Regenerate.
* NEWS: Mention support for RX architecture.
* configure: Regenerate.
* doc/Makefile.in: Regenerate.
* config/rx-defs.h: New file.
* config/rx-parse.y: New file.
* config/tc-rx.h: New file.
* config/tc-rx.c: New file.
* doc/c-rx.texi: New file.
gas/testsuite
* gas/rx: New directory.
* gas/rx/*: New set of test cases.
* gas/elf/section2.e-rx: New expected output file.
* gas/all/gas.exp: Add support for RX target.
* gas/elf/elf.exp: Likewise.
* gas/lns/lns.exp: Likewise.
* gas/macros/macros.exp: Likewise.
include
* dis-asm.h: Add prototype for print_insn_rx.
include/elf
* rx.h: New file.
include/opcode
* rx.h: New file.
ld
* Makefile.am: Add rules to build RX emulation.
* configure.tgt: Likewise.
* NEWS: Mention support for RX architecture.
* Makefile.in: Regenerate.
* emulparams/elf32rx.sh: New file.
* emultempl/rxelf.em: New file.
opcodes
* Makefile.am: Add RX files.
* configure.in: Add support for RX target.
* disassemble.c: Likewise.
* Makefile.in: Regenerate.
* configure: Regenerate.
* opc2c.c: New file.
* rx-decode.c: New file.
* rx-decode.opc: New file.
* rx-dis.c: New file.
2009-09-29 14:17:19 +00:00
8765b55692
opcodes/
...
* ppc-opc.c (powerpc_opcodes): Remove support for the the "lxsdux",
"lxvd2ux", "lxvw4ux", "stxsdux", "stxvd2ux" and "stxvw4ux" opcodes.
gas/testsuite/
* gas/ppc/vsx.s ("lxsdux", "lxvd2ux", "lxvw4ux", "stxsdux",
"stxvd2ux", "stxvw4ux"): Remove tests.
* gas/ppc/vsx.d: Likewise.
* gas/ppc/power7.s: Likewise.
* gas/ppc/power7.d: Likewise.
2009-09-29 13:19:10 +00:00
fe2d172ccb
2009-09-25 Michael Eager <eager@eagercon.com>
...
* microblaze-dis.c (get_insn_microblaze, microblaze_get_target_address,
microblaze_decode_insn): Add declarations.
(get_delay_slots_microblaze): Remove.
2009-09-25 19:59:51 +00:00
21d799b5c4
Update soruces to make alpha, arc and arm targets compile cleanly
...
with -Wc++-compat:
* config/tc-alpha.c: Add casts.
(extended_bfd_reloc_code_real_type): New type. Used to avoid
enumeration conversion warnings.
(struct alpha_fixup, void assemble_insn, assemble_insn)
(assemble_tokens): Use new type.
* ecoff.c: Add casts. (mark_stabs): Use enumeration names.
* config/obj-elf.c: Add cast
* config/tc-arc.c: Add casts.
* config/obj-aout.h (text_section,data_section,bss_section):
Make extern.
* config/obj-elf.c: Add cast.
* config/tc-arm.c: Add casts.
(X, TxCE, TxCE, TxC3, TxC3w, TxCM_, TxCM, TUE, TUF, CE, CL, cCE)
(cCL, C3E, xCM_, nUF, nCE_tag): Change input format to avoid the
need for keywords as arguments.
* ecoff.c: Add casts.
* ecofflink.c: Add casts.
* elf64-alpha.c: Add casts.
(struct alpha_elf_got_entry, struct alpha_elf_reloc_entry): Move
to top level.
(SKIP_HOWTO): Use enum name.
* elf32-arm.c: Add casts.
(elf32_arm_vxworks_bed): Update code to avoid multiple
declarations.
(struct map_stub): Move to top level.
* arc-dis.c Fix casts.
* arc-ext.c: Add casts.
* arm-dis.c (enum opcode_sentinel_enum): Gave name to anonymous
enum.
* emultempl/armelf.em: Add casts.
2009-09-25 19:13:27 +00:00
2bf05e5730
gas/
...
2009-09-24 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (build_vex_prefix): Check vex == 2 instead
of vex256.
opcodes/
2009-09-24 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Remove Vex256.
(set_bitfield): Handle XXX=V.
* i386-opc.h (Vex): Update comments.
(Vex256): Removed.
(VexNDS): Updated.
(i386_opcode_modifier): Change vex to 2 bits. Remove vex256.
* i386-opc.tbl: Replace "Vex|Vex256" with Vex=2.
* i386-tbl.h: Regenerated.
2009-09-24 16:37:09 +00:00
8a00d39205
Updated French and Vietnamese translations.
2009-09-23 10:09:19 +00:00
e0d602ecff
gas/
...
* config/tc-ppc.c (md_show_usage): Document -mpcca2.
* doc/c-ppc.texi (PowerPC-Opts): Document -mppca2.
gas/testsuite/
* gas/ppc/a2.s: New.
* gas/ppc/a2.d: Likewise.
* gas/ppc/ppc.exp: Run the a2 dump test.
include/opcode/
* ppc.h (PPC_OPCODE_PPCA2): New.
opcodes/
* ppc-dis.c (ppc_opts): Add "ppca2" entry.
* ppc-opc.c (powerpc_opcodes): Add eratilx, eratsx, eratsx.,
eratre, wchkall, eratwe, ldawx., mdfcrx., mfdcr. mtdcrx., icswx,
icswx., mtdcr., dci, wclrone, wclrall, wclr, erativax, tlbsrx.,
ici mnemonics.
(ERAT_T): New operand.
(XWC_MASK): New mask.
(XOPL2): New macro.
(PPCA2): Define.
2009-09-21 10:29:07 +00:00
ca58b19f00
Updated Spanish and Vietnamese translations
2009-09-18 07:54:47 +00:00
0520304376
2009-09-15 H.J. Lu <hongjiu.lu@intel.com>
...
* i386-dis.c (OP_E_memory): Don't print '-' in Intel mode if
disp == -disp.
2009-09-15 17:53:40 +00:00
df58f7b0bf
Updated German, Dutch and Finnish translations.
2009-09-14 12:24:29 +00:00
1e9cc1c27b
* po/bfd.pot: Updated by the Translation project.
...
* po/binutils.pot: Updated by the Translation project.
* po/gold.pot: Updated by the Translation project.
* po/gold.pot: Updated by the Translation project.
* po/gprof.pot: Updated by the Translation project.
* po/sv.po: Updated Swedish translation.
* po/ld.pot: Updated by the Translation project.
* po/fi.po: Updated Finnish translation.
* po/ld.pot: Updated by the Translation project.
* po/fi.po: Updated Finnish translation.
Updated sources to compile cleanly with -Wc++-compat:
* basic_blocks.c: Add casts.
* cg_dfn.c: Add cast.
* corefile.c: Add casts.
* gmon_io.c: Add casts.
* hist.c: Add cast.
* source.c: Add cast.
* sym_ids.c (struct match): Moved to top level.
Updated soruces in ld/* to compile cleanly with -Wc++-compat:
* ld.h (enum endian_enum,enum symbolic_enum,enum dynamic_list_enum): Move to top level.
* ldcref.c: Add casts.
* ldctor.c: Add casts.
* ldexp.c
* ldexp.h (enum node_tree_enum,enum phase_enum): Move to top level.
* ldlang.c: Add casts. (lang_insert_orphan): Use enum name instead of integer.
* ldlang.h (enum statement_enum): Move to top level.
* ldmain.c: Add casts.
* ldwrite.c: Add casts.
* lexsup.c: Add casts. (enum control_enum): Move to top level.
* mri.c: Add casts. (mri_draw_tree): Use enum name instead of integer.
Updated sources to compile cleanly with -Wc++-compat:
* basic_blocks.c: Add casts.
* cg_dfn.c: Add cast.
* corefile.c: Add casts.
* gmon_io.c: Add casts.
* hist.c: Add cast.
* source.c: Add cast.
* sym_ids.c (struct match): Moved to top level.
* as.c (main): Call dwarf2_init.
* config/obj-elf.c (struct group_list): New field.
(build_group_lists): Use hash lookup.
(free_section_idx): New function.
(elf_frob_file): Adjust.
* dwarf2dbg.c (all_segs_hash, last_seg_ptr): New variables.
(get_line_subseg): Adjust.
(dwarf2_init): New function.
* dwarf2dbg.h (dwarf2_init): New declaration.
2009-09-11 15:27:38 +00:00
c8676ae452
2009-09-10 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
...
* s390-dis.c (print_insn_s390): Avoid 'long long'.
2009-09-10 09:04:06 +00:00
7330f9c3a4
2009-09-10 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
...
* s390-dis.c (s390_extract_operand): Remove the shift for pcrel operands.
(print_insn_s390): Signextend and shift pcrel operands before printing.
2009-09-10 08:47:20 +00:00
9daa0d29f5
2009-09-09 H.J. Lu <hongjiu.lu@intel.com>
...
* i386-dis.c (vex_len_table): Change VEX_LEN_AE_R_X_M0 to
VEX_LEN_AE_R_X_M_0 in comments.
2009-09-09 17:25:31 +00:00
495c5f871e
* cpu/mep.opc (mep_cgen_insn_supported_asm): Change the test to a
...
preprocessor macro, not an enum.
2009-09-08 23:51:11 +00:00
84c7196942
* z8kgen.c (struct op): Replace unused flavor with id.
...
(opt): Remove extra xorb entry.
(func): Use id field as fallback.
(sub): Return new string, caller changed.
(internal): Allocate end marker. Assign unique id before sorting.
(gas): Likewise. Fix loop end condition.
* z8k-opc.h: Regenerate.
2009-09-08 09:47:52 +00:00
bdc7fcfe59
* ppc-opc.c (powerpc_macros <extrdi>): Allow n+b of 64.
2009-09-08 09:00:47 +00:00
815c0482cb
* z8kgen.c (func): Fix thinko last patch.
2009-09-07 13:01:35 +00:00
eae14d64d1
* z8kgen.c (func): Stabilize qsort of identically named entries.
...
* z8k-opc.h: Regenerate.
2009-09-07 12:11:20 +00:00
23f938f12a
bfd
...
2009-09-07 Tristan Gingold <gingold@adacore.com>
* po/SRC-POTFILES.in: Regenerate.
* po/bfd.pot: Regenerate.
binutils
2009-09-07 Tristan Gingold <gingold@adacore.com>
* po/binutils.pot: Regenerate.
gas
2009-09-07 Tristan Gingold <gingold@adacore.com>
* po/POTFILES.in: Regenerate.
* po/gas.pot: Regenerate.
gprof
2009-09-07 Tristan Gingold <gingold@adacore.com>
* po/gprof.pot: Regenerate.
ld
2009-09-07 Tristan Gingold <gingold@adacore.com>
* po/ld.pot: Regenerate.
opcodes
2009-09-07 Tristan Gingold <gingold@adacore.com>
* po/opcodes.pot: Regenerate.
2009-09-07 11:29:56 +00:00
2eee559322
* configure.in (BUILD_LIBS, BUILD_LIB_DEPS): Define and subst.
...
* configure: Regenerate.
* Makefile.am (LIBIBERTY, BUILD_LIBIBERTY, BUILD_LIBINTL): Delete.
(BUILD_LIBS, BUILD_LIB_DEPS): Define. Use..
(i386-gen, ia64-gen, z8kgen): ..here.
* Makefile.in: Regenerate.
2009-09-07 10:54:25 +00:00
ae794f602d
2009-09-07 Tristan Gingold <gingold@adacore.com>
...
* z8k-opc.h: Regenerate.
2009-09-07 08:14:09 +00:00
96d56e9f91
* bfd/coff-arm.c (coff_arm_relocate_section)
...
(record_thumb_to_arm_glue, bfd_arm_process_before_allocation):
Change member name class to symbol_class.
* bfd/coff-i960.c (coff_i960_relocate_section) Rename variable
class to class_val. Change member name class to symbol_class.
* bfd/coff-rs6000.c (_bfd_xcoff_swap_aux_in)
(_bfd_xcoff_swap_aux_out): Rename arguments class to in_class.
* bfd/coff-stgo32.c (adjust_aux_in_post)
(adjust_aux_out_pre, adjust_aux_out_post): Rename arguments class
to in_class.
* bfd/coff64-rs6000.c (_bfd_xcoff64_swap_aux_in)
(_bfd_xcoff64_swap_aux_out): Rename arguments class to in_class.
* bfd/coffcode.h (coff_pointerize_aux_hook): Rename variable class
to n_sclass.
* bfd/coffgen.c (coff_write_symbol, coff_pointerize_aux): Rename
variables named class to n_sclass. (coff_write_symbols): Rename
variable class to sym_class. (bfd_coff_set_symbol_class): Rename
argument class to symbol_class.
* bfd/cofflink.c (_bfd_coff_link_hash_newfunc)
(coff_link_add_symbols, _bfd_coff_link_input_bfd)
(_bfd_coff_write_global_sym, _bfd_coff_generic_relocate_section):
Update code to use renamed members.
* bfd/coffswap.h (coff_swap_aux_in, coff_swap_aux_out): Rename
argument class to in_class.
* bfd/libcoff-in.h (struct coff_link_hash_entry, struct
coff_debug_merge_type) Renamed members class to symbol_class and
type_class.
* bfd/libcoff.h Regenerated.
* bfd/peXXigen.c: (_bfd_XXi_swap_aux_in, _bfd_XXi_swap_aux_out):
Rename argument class to in_class.
* bfd/pef.c (bfd_pef_parse_imported_symbol): Update code to use
renamed members.
* bfd/pef.h (struct bfd_pef_imported_symbol): Changed name of
member class to symbol_class.
* binutils/ieee.c (ieee_read_cxx_misc, ieee_read_cxx_class)
(ieee_read_reference): Rename variables named class to cxxclass.
* gas/config/tc-arc.c (struct syntax_classes): Rename member class
to s_class. (arc_extinst): Rename variable class to
s_class. Update code to use renamed members.
* gas/config/tc-mips.c (insn_uses_reg): Rename argument class to
regclass.
* gas/config/tc-ppc.c (ppc_csect, ppc_change_csect, ppc_function)
(ppc_tc, ppc_is_toc_sym, ppc_symbol_new_hook, ppc_frob_label)
(ppc_fix_adjustable, md_apply_fix): Update code to use renamed
members.
* gas/config/tc-ppc.h (struct ppc_tc_sy): Change name of member
from class to symbol_class. (OBJ_COPY_SYMBOL_ATTRIBUTES): Update
code to use renamed members.
* gas/config/tc-score.c (s3_adjust_paritybit): Rename argument
class to i_class.
* gas/config/tc-score7.c (s7_adjust_paritybit): Rename argument
class to i_class.
* gprof/corefile.c (core_create_function_syms): Rename variable
class to cxxclass.
* include/coff/ti.h (GET_LNSZ_SIZE, PUT_LNSZ_SIZE): Updated name
of class variable to in_class to match changes in function that
use this macro.
* include/opcode/ia64.h (struct ia64_operand): Renamed member
class to op_class
* ld/emultempl/elf32.em (gld${EMULATION_NAME}_load_symbols)
(gld${EMULATION_NAME}_try_needed): Rename variable class to
link_class
* opcodes/ia64-dis.c (print_insn_ia64): Update code to use renamed
member.
* opcodes/m88k-dis.c (m88kdis): Rename variable class to in_class.
* opcodes/tic80-opc.c (tic80_symbol_to_value)
(tic80_value_to_symbol): Rename argument class to symbol_class.
2009-09-05 07:56:26 +00:00
66a6900a09
gas/
...
* config/bfin-parse.y (asm_1): Implement HLT instruction.
Fix comments for DBGA, DBGAH and DBGAL.
* config/tc-bfin.c (bfin_gen_pseudodbg_assert): Change according
to the new encoding of DBGA, DBGAH, and DBGAL.
include/
* opcode/bfin.h (PseudoDbg_Assert): Add bits_grp and mask_grp.
(PseudoDbg_Assert_grp_bits, PseudoDbg_Assert_grp_mask): Define.
(PseudoDbg_Assert_dbgop_bits, PseudoDbg_Assert_dbgop_mask,
PseudoDbg_Assert_dontcare_bits, PseudoDbg_Assert_dontcare_mask):
Adjust accordingly.
(init_PseudoDbg_Assert): Add PseudoDbg_Assert_grp_bits and
PseudoDbg_Assert_grp_mask.
opcodes/
* bfin-dis.c (decode_pseudodbg_assert_0): Change according
to the new encoding of DBGA, DBGAH, and DBGAL.
(_print_insn_bfin): Likewise.
2009-09-04 04:29:42 +00:00
ad15c38ee6
gas/
...
* config/bfin-parse.y: Remove trailing whitespace.
(ccstat): Indent.
* config/tc-bfin.c (struct bfin_reg_entry): Remove.
(bfin_reg_info[]): Remove.
opcodes/
* bfin-dis.c (_print_insn_bfin): Don't declare.
(print_insn_bfin): Don't declare.
(dregs_pair): Remove.
(ignore_bits): Remove.
(ccstat): Remove.
2009-09-03 17:42:53 +00:00
c958a8a8fb
gas/
...
* config/bfin-defs.h (IS_GENREG): Define.
(IS_DAGREG): Define.
(IS_SYSREG): Define.
* config/bfin-parse.y (asm_1): Check illegal register move
instructions.
gas/testsuite/
* gas/bfin/expected_move_errors.s,
gas/bfin/expected_move_errors.l: Add "LC1 = I0;".
* gas/bfin/move.s, gas/bfin/move.d: Remove "CYCLES = A0.W".
opcodes/
* bfin-dis.c (IS_DREG): Define.
(IS_PREG): Define.
(IS_AREG): Define.
(IS_GENREG): Define.
(IS_DAGREG): Define.
(IS_SYSREG): Define.
(decode_REGMV_0): Check illegal register move instructions.
2009-09-03 16:17:36 +00:00
3df5879c31
* Makefile.am (BUILD_LIBINTL): New variable.
...
(i386-gen$(EXEEXT_FOR_BUILD)): Use it.
(ia64-gen$(EXEEXT_FOR_BUILD)): And here.
(z8kgen$(EXEEXT_FOR_BUILD)): And here.
* Makefile.in: Regenerate.
2009-09-03 04:47:46 +00:00
aa820537ea
update copyright dates
2009-09-02 07:25:43 +00:00
0531605226
[cgen]
...
* cpu/mep.opc (parse_signed16_range): Mark as potentially unused.
(parse_unsigned16_range): Likewise.
(mep_cgen_insn_supported_asm): Make BSR12 check dependent on VLIW
isa.
[opcodes]
* mep-asm.c: Regenerate.
* mep-desc.c: Regenerate.
* mep-opc.c: Regenerate.
2009-09-02 02:10:36 +00:00
e06ae0d430
2009-09-01 Tristan Gingold <gingold@adacore.com>
...
* makefile.vms: Ported to Itanium VMS. Remove useless targets and
dependencies. Remove unused FORMAT variable.
* configure.com: New file to create build.com DCL script for
Itanium VMS or Alpha VMS.
2009-09-01 13:16:53 +00:00
d3ce72d070
Updated sources to avoid using the identifier name "new", which is a
...
keyword in c++.
* bfd/aoutx.h (NAME (aout, make_empty_symbol)): Rename variable
new to new_symbol.
* bfd/coffgen.c (coff_make_empty_symbol)
(coff_bfd_make_debug_symbol): Rename variable new to new_symbol.
* bfd/cpu-ia64-opc.c (ext_reg, ins_imms_scaled): Rename variable
new to new_insn.
* bfd/doc/chew.c (newentry, add_intrinsic): Rename variable new to
new_d.
* bfd/ecoff.c (_bfd_ecoff_make_empty_symbol): Rename variable new
to new_symbol.
* bfd/elf32-m68k.c (elf_m68k_get_got_entry_type): Rename argument
new to new_reloc.
* bfd/hash.c (bfd_hash_lookup): Rename variable new to new_string.
* bfd/ieee.c (ieee_make_empty_symbol): Rename variable new to
new_symbol.
* bfd/linker.c (bfd_new_link_order): Rename variable new to
new_lo.
* bfd/mach-o.c (bfd_mach_o_sizeof_headers): Rename variable new to
symbol.
* bfd/oasys.c (oasys_make_empty_symbol): Rename variable new to
new_symbol_type.
* bfd/pdp11.c (NAME (aout, make_empty_symbol)): Rename variable
new to new_symbol_type.
* bfd/plugin.c (bfd_plugin_make_empty_symbol): Rename variable new
to new_symbol.
* bfd/rs6000-core.c (CoreHdr, VmInfo): Rename union member new to
new_dump.
(read_hdr, rs6000coff_core_p)
(rs6000coff_core_file_matches_executable_p)
(rs6000coff_core_file_failing_command)
(rs6000coff_core_file_failing_signal): Updated function to use new
union member name.
* bfd/som.c (som_make_empty_symbol): Rename variable new to
new_symbol_type.
* bfd/syms.c (_bfd_generic_make_empty_symbol): Rename variable new
to new_symbol.
* bfd/tekhex.c (first_phase, tekhex_make_empty_symbol): Rename
variable new to new_symbol.
* binutils/nlmconv.c (main): Rename variable new to new_name.
* gas/config/tc-arm.c (insert_reg_alias): Rename variable new to
new_reg.
* gas/config/tc-dlx.c (parse_operand): Rename variable new to
new_pos.
* gas/config/tc-ia64.c (ia64_gen_real_reloc_type): Rename variable
new to newr.
* gas/config/tc-mcore.c (parse_exp, parse_imm): Rename variable
new to new_pointer.
* gas/config/tc-microblaze.c (parse_exp, parse_imm, check_got):
Change name from new to new_pointer.
* gas/config/tc-or32.c (parse_operand): Rename variable new to
new_pointer.
* gas/config/tc-pdp11.c (md_assemble): Rename variable new to
new_pointer.
* gas/config/tc-pj.c (alias): Change argument new to new_name.
* gas/config/tc-score.c (s3_build_score_ops_hsh): Rename variable
new to new_opcode. (s3_build_dependency_insn_hsh) Rename variable
new to new_i2n. (s3_convert): Rename variables old and new to
r_old and r_new.
* gas/config/tc-score7.c (s7_build_score_ops_hsh): Rename variable
new to new_opcode. (s7_build_dependency_insn_hsh): Rename variable
new to new_i2d. (s7_b32_relax_to_b16, s7_convert_frag): Rename
variables old and new to r_old and r_new.
* gas/config/tc-sh.c (parse_exp): Rename variable new to
new_pointer.
* gas/config/tc-sh64.c (shmedia_parse_exp): Rename variable new to
new_pointer.
* gas/config/tc-tic4x.c (tic4x_operand_parse): Rename variable new
to new_pointer.
* gas/config/tc-z8k.c (parse_exp): Rename variable new to
new_pointer.
* gas/listing.c (listing_newline): Rename variable new to new_i.
* ld/ldexp.c (exp_intop, exp_bigintop, exp_relop, exp_binop)
(exp_trinop, exp_unop, exp_nameop, exp_assop): Rename variable new
to new_e.
* ld/ldfile.c (ldfile_add_library_path): Rename variable new to
new_dirs. (ldfile_add_arch): Rename variable new to new_arch.
* ld/ldlang.c (new_statement, lang_final, lang_add_wild)
(lang_target, lang_add_fill, lang_add_data, lang_add_assignment)
(lang_add_insert): Rename variable new to new_stmt. (new_afile):
Added missing cast. (lang_memory_region_lookup): Rename variable
new to new_region. (init_os): Rename variable new to
new_userdata. (lang_add_section): Rename variable new to
new_section. (ldlang_add_undef): Rename variable new to
new_undef. (realsymbol): Rename variable new to new_name.
* opcodes/z8kgen.c (internal, gas): Rename variable new to new_op.
Updated sources to avoid using the identifier name "template",
which is a keyword in c++.
* bfd/elf32-arm.c (struct stub_def): Rename member template to
template_sequence. (arm_build_one_stub,
find_stub_size_and_template, arm_size_one_stub, arm_map_one_stub):
Rename variable template to template_sequence.
* bfd/elfxx-ia64.c (elfNN_ia64_relax_br, elfNN_ia64_relax_brl):
Rename variable template to template_val.
* gas/config/tc-arm.c (struct asm_cond, struct asm_psr, struct
asm_barrier_opt): Change member template to
template_name. (md_begin): Update code to reflect new member
names.
* gas/config/tc-i386.c (struct templates, struct _i386_insn)
(match_template, cpu_flags_match, match_reg_size, match_mem_size)
(operand_size_match, md_begin, i386_print_statistics, pi)
(build_vex_prefix, md_assemble, parse_insn, optimize_imm)
(optimize_disp): Updated code to use new names. (parse_insn):
Added casts.
* gas/config/tc-ia64.c (dot_template, emit_one_bundle): Updated
code to use new names.
* gas/config/tc-score.c (struct s3_asm_opcode): Renamed member
template to template_name. (s3_parse_16_32_inst, s3_parse_48_inst,
s3_do_macro_ldst_label, s3_build_score_ops_hsh): Update code to
use new names.
* gas/config/tc-score7.c (struct s7_asm_opcode): Renamed member
template to template_name. (s7_parse_16_32_inst,
s7_do_macro_ldst_label, s7_build_score_ops_hsh): Update code to
use new names.
* gas/config/tc-tic30.c (md_begin, struct tic30_insn)
(md_assemble): Update code to use new names.
* gas/config/tc-tic54x.c (struct _tic54x_insn, md_begin)
(optimize_insn, tic54x_parse_insn, next_line_shows_parallel):
Update code to use new names.
* include/opcode/tic30.h (template): Rename type template to
insn_template. Updated code to use new name.
* include/opcode/tic54x.h (template): Rename type template to
insn_template.
* opcodes/cris-dis.c (bytes_to_skip): Update code to use new name.
* opcodes/i386-dis.c (putop): Update code to use new name.
* opcodes/i386-gen.c (process_i386_opcodes): Update code to use
new name.
* opcodes/i386-opc.h (struct template): Rename struct template to
insn_template. Update code accordingly.
* opcodes/i386-tbl.h (i386_optab): Update type to use new name.
* opcodes/ia64-dis.c (print_insn_ia64): Rename variable template
to template_val.
* opcodes/tic30-dis.c (struct instruction, get_tic30_instruction):
Update code to use new name.
* opcodes/tic54x-dis.c (has_lkaddr, get_insn_size)
(print_parallel_instruction, print_insn_tic54x, tic54x_get_insn):
Update code to use new name.
* opcodes/tic54x-opc.c (tic54x_unknown_opcode, tic54x_optab):
Update type to new name.
2009-08-29 22:11:02 +00:00
791f39718a
binutils/
...
2009-08-28 H.J. Lu <hongjiu.lu@intel.com>
* Makefile.am (sysinfo$(EXEEXT_FOR_BUILD)): Replace
CFLAGS/LDFLAGS with CFLAGS_FOR_BUILD/LDFLAGS_FOR_BUILD.
(syslex.o): Likewise.
(sysinfo.o): Likewise.
(bin2c$(EXEEXT_FOR_BUILD)): Likewise.
* Makefile.in: Regenerated.
opcodes/
2009-08-28 H.J. Lu <hongjiu.lu@intel.com>
* Makefile.am (COMPILE_FOR_BUILD): Remove BUILD_CPPFLAGS.
Replace BUILD_CFLAGS with CFLAGS_FOR_BUILD.
(LINK_FOR_BUILD): Replace BUILD_CFLAGS/BUILD_LDFLAGS with
CFLAGS_FOR_BUILD/LDFLAGS_FOR_BUILD.
* Makefile.in: Regenerated.
2009-08-29 00:41:25 +00:00
573e8a1cd2
Do not create $(bfdlibdir) and $(bfdincludedir) if !INSTALL_LIBBFD.
...
opcodes/:
* Makefile.am (bfdlibdir, bfdincludedir): Move definition ...
[INSTALL_LIBBFD]: ... here, ...
[INSTALL_LIBBFD]: ... and empty overrides here.
[!INSTALL_LIBBFD]: (rpath_bfdlibdir): New variable.
[!INSTALL_LIBBFD] (libbfd_la_LDFLAGS): Use it.
* Makefile.in: Regenerate.
* configure: Regenerate.
bfd/:
* acinclude.m4 (AM_INSTALL_LIBBFD): Call AM_SUBST_NOTMAKE for
bfdlibdir and bfdincludedir.
* Makefile.am (bfdlibdir, bfdincludedir): Move definition ...
[INSTALL_LIBBFD]: ... here, ...
[INSTALL_LIBBFD]: ... and empty overrides here.
[!INSTALL_LIBBFD]: (rpath_bfdlibdir): New variable.
[!INSTALL_LIBBFD] (libbfd_la_LDFLAGS): Use it.
* Makefile.in: Regenerate.
* configure: Regenerate.
bfd/doc/:
* Makefile.in: Regenerate.
2009-08-27 05:24:43 +00:00
f7922329bf
* m68k-dis.c (print_insn_arg): Add movecr register names for
...
coldfire v4e families.
2009-08-26 13:16:29 +00:00
ff13a42d5c
Build cleanups in opcodes: cross-compilation and generators.
...
opcodes/:
* Makefile.am (SUBDIRS): Build '.' before 'po'.
(COMPILE_FOR_BUILD, LINK_FOR_BUILD, BUILD_LIBIBERTY)
(MOSTLYCLEANFILES, MAINTAINERCLEANFILES): New variables.
(i386-gen$(EXEEXT_FOR_BUILD)): Renamed from i386-gen, rewrite
using *BUILD variables, depend upon $(BUILD_LIBIBERTY).
(i386-gen.o): New rule.
($(srcdir)/i386-init.h): Adjust.
(i386-opc.lo): Depend on $(srcdir)/i386-tbl.h.
(ia64-gen$(EXEEXT_FOR_BUILD)): Rename from ia64-gen, adjust likewise.
(ia64-gen.o): New rule.
(ia64_asmtab_deps): New variable.
($(srcdir)/ia64-asmtab.c): Use it; adjust likewise.
(ia64-opc.lo): Depend on $(srcdir)/ia64-asmtab.c.
(s390-mkopc$(EXEEXT_FOR_BUILD)): Rename from s390-mkopc, adjust
likewise.
(s390-opc.tab): Adjust.
(z8kgen$(EXEEXT_FOR_BUILD), z8kgen.o, $(srcdir)/z8k-opc.h): New
rules.
(z8k-dis.lo): Depend on $(srcdir)/z8k-opc.h.
* Makefile.in: Regenerate.
* z8kgen.c (gas): Avoid '/*' in comment.
* z8k-opc.h (func): Regenerate.
2009-08-25 03:13:44 +00:00
6f01793dbb
More build fixes in opcodes
...
opcodes/:
* Makefile.am (TARGET_LIBOPCODES_CFILES): New variable, taken
from $(CFILES), sorted, with dis-buf.c, dis-init.c, disassemble.c,
i386-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-f.c, ia64-opc-i.c,
ia64-opc-m.c, ia64-opc-d.c, ia64-gen.c, ia64-asmtab.c removed, and
msp430-dis.c added.
(LIBOPCODES_CFILES): New variable, adding to
TARGET_LIBOPCODES_CFILES also non-target library sources.
(CFILES): Factorize based on $(LIBOPCODES_CFILES), adding generator
files.
(ALL_MACHINES): Factorize based on $(TARGET_LIBOPCODES_CFILES).
(EXTRA_libopcodes_la_SOURCES): Use $(LIBOPCODES_CFILES).
* Makefile.in: Regenerate.
* po/POTFILES.in: Regenerate.
2009-08-24 19:05:01 +00:00
14ec8efdb1
Cleanups in binutils makefiles.
...
ld/:
* Makefile.am (bin_PROGRAMS): Renamed from ...
(noinst_PROGRAMS): ... this.
(transform): Override, including the renaming of ld-new to ld.
(install-exec-local): Installation of ld in $(bindir) not needed
here any more.
(AM_CPPFLAGS): Renamed from ...
(INCLUDES): ... this.
(MAINTAINERCLEANFILES): Add ld.1.
* Makefile.in: Regenerate.
gold/:
* Makefile.am (AM_CPPFLAGS): Renamed from ...
(INCLUDES): ... this.
* testsuite/Makefile.am (AUTOMAKE_OPTIONS): Add -Wno-portability.
(AM_CPPFLAGS): Renamed from ...
(INCLUDE): ... this.
* Makefile.in, testsuite/Makefile.in: Regenerate.
bfd/:
* Makefile.am (libbfd_la_LDFLAGS): Initialize early, to allow
appending.
[INSTALL_LIBBFD] (bfdlib_LTLIBRARIES, bfdinclude_HEADERS): Set
only in this condition.
[!INSTALL_LIBBFD] (noinst_LTLIBRARIES, libbfd_la_LDFLAGS): New,
to build but not install libbfd.la in this condition.
(install-bfdlibLTLIBRARIES, uninstall-bfdlibLTLIBRARIES)
(install_libbfd, install_libbfd): Remove.
* Makefile.in: Regenerate.
binutils/:
* Makefile.am (AM_CPPFLAGS): Renamed from ...
(INCLUDES): ... this.
(bin2c$(EXEEXT_FOR_BUILD): Adjust rule.
(installcheck-local): Renamed from ...
(installcheck): ... this.
* Makefile.in: Regenerate.
gas/:
* Makefile.am (YFLAGS): Remove, not needed any more.
(AM_CPPFLAGS): Renamed from ...
(INCLUDES): ... this.
* Makefile.in: Regenerate.
gprof/:
* Makefile.am (AM_CPPFLAGS): Renamed from ...
(INCLUDES): ... this.
* Makefile.in: Regenerate.
opcodes/:
* Makefile.am (libopcodes_la_LDFLAGS): Initialize early.
[INSTALL_LIBBFD] (bfdlib_LTLIBRARIES): Set only in this condition.
[INSTALL_LIBBFD] (bfdinclude_DATA): New.
[!INSTALL_LIBBFD] (noinst_LTLIBRARIES): New.
[!INSTALL_LIBBFD] (libopcodes_la_LDFLAGS): Ensure libopcodes.la
is built shared even if it is not to be installed.
(install-bfdlibLTLIBRARIES,uninstall-bfdlibLTLIBRARIES)
(install_libopcodes, uninstall_libopcodes): Remove.
(AM_CPPFLAGS): Renamed from ...
(INCLUDES): ... this.
* Makefile.in: Regenerate.
2009-08-22 19:02:57 +00:00
758227f0c5
dependency tracking in opcodes
...
opcodes/:
* Makefile.am (AUTOMAKE_OPTIONS): Remove 1.9 and cygnus, add
1.11, foreign, no-dist.
(MKDEP, m32c_opc_h): Remove variables.
(disassemble.lo): Rewrite using automake-style dependency
tracking rules; only list the dependency upon the primary source
file, but no included headers.
(m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo)
(i386-gen.o, ia64-gen.o): Remove dependency statements.
(EXTRA_libopcodes_la_SOURCES): New variable, list $(CFILES) to
ensure all dependency fragments are included in the Makefile.
(s390-opc.lo): Depend on s390-opc.tab.
(DEP, DEP1, dep.sed, dep, dep-in, dep-am): Remove rules.
(mkdep section): Remove.
* Makefile.in: Regenerate.
* po/POTFILES.in: Regenerate.
2009-08-22 18:44:58 +00:00
af542c2e31
Cleanups after the update to Autoconf 2.64, Automake 1.11.
...
/:
* README-maintainer-mode: Point directly to upstream locations
for autoconf, automake, libtool, gettext, instead of copies on
sources.redhat.com. Document required versions.
* configure.ac: Do not substitute datarootdir, htmldir,
pdfdir, docdir. Do not process --with-datarootdir,
--with-htmldir, --with-pdfdir, --with-docdir.
* configure: Regenerate.
gdb/:
* CONTRIBUTE: Bump documented Autoconf version.
* configure.ac: Do not substitute datarootdir, htmldir,
pdfdir, docdir. Do not process --with-datarootdir,
--with-htmldir, --with-pdfdir, --with-docdir.
* configure: Regenerate.
gdb/doc/:
* gdbint.texinfo (Releasing GDB): Point to
README-maintainer-mode file for required autoconf version.
* configure.ac: Do not substitute datarootdir, htmldir,
pdfdir, docdir. Do not process --with-datarootdir,
--with-htmldir, --with-pdfdir, --with-docdir.
* configure: Regenerate.
gprof/:
* Makefile.am (pdf__strip_dir, install-pdf, install-pdf-am)
(install-pdf-recursive, html__strip_dir, install-html)
(install-html-am, install-html-recursive): Remove.
* Makefile.in: Regenerate.
opcodes/:
* Makefile.am (install-pdf, install-html): Remove.
* Makefile.in: Regenerate.
gas/:
* Makefile.am (install-pdf, install-pdf-recursive, install-html)
(install-html-recursive): Remove.
* Makefile.in: Regenerate.
* doc/Makefile.am (pdf__strip_dir, install-pdf, install-pdf-am)
(html__strip_dir, install-html, install-html-am): Remove.
* doc/Makefile.in: Regenerate.
ld/:
* Makefile.am (pdf__strip_dir, install-pdf, install-pdf-am)
(install-pdf-recursive, html__strip_dir, install-html)
(install-html-am, install-html-recursive): Remove.
* Makefile.in: Regenerate.
binutils/:
* Makefile.am (install-pdf, install-pdf-recursive, install-html)
(install-html-recursive): Remove.
* Makefile.in: Regenerate.
* doc/Makefile.am (pdf__strip_dir, install-pdf, install-pdf-am)
(html__strip_dir, install-html, install-html-am): Remove.
* doc/Makefile.in: Regenerate.
bfd/:
* Makefile.am (datarootdir, docdir, htmldor, pdfdir)
(install-pdf, install-pdf-recursive, install-html)
(install-html-recursive): Remove.
* Makefile.in: Regenerate.
bfd/doc/:
* Makefile.am (pdf__strip_dir, install-pdf, install-pdf-am)
(html__strip_dir, install-html, install-html-am): Remove.
* Makefile.in: Regenerate.
2009-08-22 17:08:11 +00:00
81ecdfbb4d
Regenerate tree using Autoconf 2.64 and Automake 1.11.
...
config/:
* override.m4 (_GCC_AUTOCONF_VERSION): Bump to 2.64.
/:
* configure: Regenerate.
etc/:
* configure: Regenerate.
sim/common/:
* config.in: Regenerate.
* configure: Likewise.
sim/iq2000/:
* config.in: Regenerate.
* configure: Likewise.
sim/d10v/:
* config.in: Regenerate.
* configure: Likewise.
sim/igen/:
* config.in: Regenerate.
* configure: Likewise.
sim/m32r/:
* config.in: Regenerate.
* configure: Likewise.
sim/frv/:
* config.in: Regenerate.
* configure: Likewise.
sim/:
* avr/config.in: Regenerate.
* avr/configure: Likewise.
* configure: Likewise.
* cris/config.in: Likewise.
* cris/configure: Likewise.
sim/h8300/:
* config.in: Regenerate.
* configure: Likewise.
sim/mn10300/:
* config.in: Regenerate.
* configure: Likewise.
sim/ppc/:
* config.in: Regenerate.
* configure: Likewise.
sim/erc32/:
* config.in: Regenerate.
* configure: Likewise.
sim/arm/:
* config.in: Regenerate.
* configure: Likewise.
sim/m68hc11/:
* config.in: Regenerate.
* configure: Likewise.
sim/lm32/:
* config.in: Regenerate.
* configure: Likewise.
sim/sh64/:
* config.in: Regenerate.
* configure: Likewise.
sim/v850/:
* config.in: Regenerate.
* configure: Likewise.
sim/cr16/:
* config.in: Regenerate.
* configure: Likewise.
sim/moxie/:
* config.in: Regenerate.
* configure: Likewise.
sim/m32c/:
* config.in: Regenerate.
* configure: Likewise.
sim/mips/:
* config.in: Regenerate.
* configure: Likewise.
sim/mcore/:
* config.in: Regenerate.
* configure: Likewise.
sim/testsuite/d10v-elf/:
* configure: Regenerate.
sim/testsuite/:
* configure: Regenerate.
sim/testsuite/frv-elf/:
* configure: Regenerate.
sim/testsuite/m32r-elf/:
* configure: Regenerate.
sim/testsuite/mips64el-elf/:
* configure: Regenerate.
sim/sh/:
* config.in: Regenerate.
* configure: Likewise.
gold/:
* Makefile.in: Regenerate.
* aclocal.m4: Likewise.
* config.in: Likewise.
* configure: Likewise.
* testsuite/Makefile.in: Likewise.
gprof/:
* Makefile.in: Regenerate.
* aclocal.m4: Likewise.
* configure: Likewise.
* gconfig.in: Likewise.
opcodes/:
* Makefile.in: Regenerate.
* aclocal.m4: Likewise.
* config.in: Likewise.
* configure: Likewise.
gas/:
* Makefile.in: Regenerate.
* aclocal.m4: Likewise.
* config.in: Likewise.
* configure: Likewise.
* doc/Makefile.in: Likewise.
ld/:
* Makefile.in: Regenerate.
* aclocal.m4: Likewise.
* config.in: Likewise.
* configure: Likewise.
gdb/:
* aclocal.m4: Regenerate.
* config.in: Likewise.
* configure: Likewise.
* gnulib/Makefile.in: Likewise.
gdb/doc/:
* configure: Regenerate.
gdb/gdbserver/:
* aclocal.m4: Regenerate.
* config.in: Likewise.
* configure: Likewise.
gdb/testsuite/:
* configure: Regenerate.
* gdb.hp/configure: Likewise.
* gdb.hp/gdb.aCC/configure: Likewise.
* gdb.hp/gdb.base-hp/configure: Likewise.
* gdb.hp/gdb.compat/configure: Likewise.
* gdb.hp/gdb.defects/configure: Likewise.
* gdb.hp/gdb.objdbg/configure: Likewise.
* gdb.stabs/configure: Likewise.
binutils/:
* Makefile.in: Regenerate.
* aclocal.m4: Likewise.
* config.in: Likewise.
* configure: Likewise.
* doc/Makefile.in: Likewise.
bfd/:
* Makefile.in: Regenerate.
* aclocal.m4: Likewise.
* config.in: Likewise.
* configure: Likewise.
bfd/doc/:
* Makefile.in: Regenerate.
readline/:
* configure: Regenerate.
readline/examples/rlfe/:
* configure: Regenerate.
2009-08-22 16:56:56 +00:00
7ba29e2a41
Add support for Xilinx MicroBlaze processor.
...
* bfd/Makefile.am: Add cpu-microblaze.{lo,c}, elf32-microblaze.{lo,c}.
* bfd/Makefile.in: Same.
* bfd/archures.c: Add bfd_arch_microblaze.
* bfd/bfd-in2.h: Regenerate.
* bfd/config.bfd: Add microblaze target.
* bfd/configure: Add bfd_elf32_microblaze_vec target.
* bfd/configure.in: Same.
* bfd/cpu-microblaze.c: New.
* bfd/elf32-microblaze.c: New.
* bfd/libbfd-in.h: Add prototype _bfd_dwarf2_fixup_section_debug_loc().
* bfd/libbfd.h: Regenerate.
* bfd/reloc.c: Add MICROBLAZE relocations.
* bfd/section.c: Add struct relax_table and relax_count to section.
* bfd/targets.c: Add bfd_elf32_microblaze_vec.
* binutils/MAINTAINERS: Add self as maintainer.
* binutils/readelf.c: Include elf/microblaze.h, add EM_MICROBLAZE &
EM_MICROBLAZE_OLD to guess_is_rela(), dump_relocations(),
get_machine_name().
* config.sub: Add microblaze target.
* configure: Same.
* configure.ac: Same.
* gas/Makefile.am: add microblaze to CPU_TYPES, config/tc-microblaze.c to
TARGET_CPU_CFILES, config/tc-microblaze.h to TARGET_CPU_HFILES, add
DEP_microblaze_elf target.
* gas/Makefile.in: Same.
* gas/config/tc-microblaze.c: Add MicroBlaze assembler.
* gas/config/tc-microblaze.h: Add header for tc-microblaze.c.
* gas/configure: Add microblaze target.
* gas/configure.in: Same.
* gas/configure.tgt: Same.
* gas/doc/Makefile.am: Add c-microblaze.texi to CPU_DOCS.
* gas/doc/Makefile.in: Same.
* gas/doc/all.texi: Set MICROBLAZE.
* gas/doc/as.texinfo: Add MicroBlaze doc links.
* gas/doc/c-microblaze.texi: New MicroBlaze docs.
* include/dis-asm.h: Decl print_insn_microblaze().
* include/elf/common.h: Define EM_MICROBLAZE & EM_MICROBLAZE_OLD.
* include/elf/microblaze.h: New reloc definitions.
* ld/Makefile.am: Add eelf32mb_linux.o, eelf32microblaze.o to
ALL_EMULATIONS, targets.
* ld/Makefile.in: Same.
* ld/configure.tgt: Add microblaze*-linux*, microblaze* targets.
* ld/emulparams/elf32mb_linux.sh: New.
* ld/emulparams/elf32microblaze.sh. New.
* ld/scripttempl/elfmicroblaze.sc: New.
* opcodes/Makefile.am: Add microblaze-opc.h to HFILES, microblaze-dis.c to
CFILES, microblaze-dis.lo to ALL_MACHINES, targets.
* opcodes/Makefile.in: Same.
* opcodes/configure: Add bfd_microblaze_arch target.
* opcodes/configure.in: Same.
* opcodes/disassemble.c: Define ARCH_microblaze, return
print_insn_microblaze().
* opcodes/microblaze-dis.c: New MicroBlaze disassembler.
* opcodes/microblaze-opc.h: New MicroBlaze opcode definitions.
* opcodes/microblaze-opcm.h: New MicroBlaze opcode types.
2009-08-06 17:38:04 +00:00
8a9036a406
bfd/
...
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* archures.c (bfd_architecture): Add bfd_arch_l1om.
(bfd_l1om_arch): New.
(bfd_archures_list): Add &bfd_l1om_arch.
* bfd-in2.h: Regenerated.
* config.bfd (targ64_selvecs): Add bfd_elf64_l1om_vec if
bfd_elf64_x86_64_vec is supported. Add bfd_elf64_l1om_freebsd_vec
if bfd_elf64_x86_64_freebsd_vec is supported.
(targ_selvecs): Likewise.
* configure.in: Support bfd_elf64_l1om_vec and
bfd_elf64_l1om_freebsd_vec.
* configure: Regenerated.
* cpu-l1om.c: New.
* elf64-x86-64.c (elf64_l1om_elf_object_p): New.
(bfd_elf64_l1om_vec): Likewise.
(bfd_elf64_l1om_freebsd_vec): Likewise.
* Makefile.am (ALL_MACHINES): Add cpu-l1om.lo.
(ALL_MACHINES_CFILES): Add cpu-l1om.c.
* Makefile.in: Regenerated.
* targets.c (bfd_elf64_l1om_vec): New.
(bfd_elf64_l1om_freebsd_vec): Likewise.
(_bfd_target_vector): Add bfd_elf64_l1om_vec and
bfd_elf64_l1om_freebsd_vec.
binutils/
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* readelf.c (guess_is_rela): Handle EM_L1OM.
(dump_relocations): Likewise.
(get_machine_name): Likewise.
(get_section_type_name): Likewise.
(get_elf_section_flags): Likewise.
(get_symbol_index_type): Likewise.
(is_32bit_abs_reloc): Likewise.
(is_32bit_pcrel_reloc): Likewise.
(is_64bit_abs_reloc): Likewise.
(is_64bit_pcrel_reloc): Likewise.
(is_none_reloc): Likewise.
gas/
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (cpu_arch): Add l1om.
(check_cpu_arch_compatible): New.
(set_cpu_arch): Use it.
(i386_arch): New.
(i386_mach): Return bfd_mach_l1om for Intel L1OM.
(md_show_usage): Display l1om.
(i386_target_format): Return ELF_TARGET_L1OM_FORMAT if
cpu_arch_isa_flags.bitfield.cpul1om is set.
* config/tc-i386.h (TARGET_ARCH): Use (i386_arch ()).
(i386_arch): New.
(ELF_TARGET_L1OM_FORMAT): Likewise.
* doc/c-i386.texi: Document l1om.
gas/testsuite/
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/l1om.d: New.
* gas/i386/l1om-inval.l: Likewise.
* gas/i386/l1om-inval.s: Likewise.
* gas/i386/i386.exp: Run l1om-inval and l1om.
include/elf/
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* common.h (EM_L1OM): New.
ld/
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* configure.tgt (targ64_extra_emuls): Add elf_l1om if elf_x86_64
is supported. Add elf_l1om_fbsd if elf_x86_64_fbsd is supported.
(targ_extra_emuls): Likewise.
* Makefile.am (ALL_64_EMULATIONS): Add eelf_l1om.o and
eelf_l1om_fbsd.o
(eelf_l1om.c): New.
(eelf_l1om_fbsd.c): Likewise.
* Makefile.in: Regenerated.
* emulparams/elf_l1om.sh: New.
* emulparams/elf_l1om_fbsd.sh: Likewise.
ld/testsuite/
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* ld-x86-64/abs-l1om.d: New.
* ld-x86-64/protected2-l1om.d: Likewise.
* ld-x86-64/protected3-l1om.d: Likewise.
* ld-x86-64/x86-64.exp: Run abs-l1om, protected2-l1om and
protected3-l1om.
opcodes/
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* configure.in: Handle bfd_l1om_arch.
* disassemble.c (disassembler): Likewise.
* configure: Regenerated.
* i386-dis.c (print_insn): Handle bfd_mach_l1om and
bfd_mach_l1om_intel_syntax. Use 8 bytes per line for Intel L1OM.
* i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~CpuL1OM.
Add CPU_L1OM_FLAGS.
(cpu_flags): Add CpuL1OM.
(set_bitfield): Take an argument to set the value field.
(process_i386_cpu_flag): Support ~CpuXXX and ~(CpuXXX|CpuYYY).
(process_i386_opcode_modifier): Updated.
(process_i386_operand_type): Likewise.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
* i386-opc.h (CpuL1OM): New.
(CpuXsave): Updated.
(i386_cpu_flags): Add cpul1om.
2009-07-25 14:58:58 +00:00
309d33736f
gas/
...
2009-07-24 Jan Beulich <jbeulich@novell.com>
* tc-i386.c (cpu_arch): Add .8087, .287, .387, .no87, .nommx,
.nosse, and .noavx.
(cpu_flags_and_not): New.
(set_cpu_arch): Check whether sub-architecture specified is a
feature disable.
(md_parse_option): Likewise.
(parse_real_register): Don't return floating point register
when x87 functionality is disabled.
(md_show_usage): Add new sub-options.
* doc/c-i386.texi: Update with new command line sub-options.
gas/testsuite/
2009-07-24 Jan Beulich <jbeulich@novell.com>
* gas/i386/8087.[ds]: New.
* gas/i386/287.[ds]: New.
* gas/i386/387.[ds]: New.
* gas/i386/no87.[ls]: New.
* gas/i386/no87-2.[ls]: New.
* gas/i386/i386.exp: Run new tests.
* gas/i386/att-regs.s: Also check FPU register access.
* gas/i386/intel-regs.s: Likewise.
* gas/i386/att-regs.d: Adjust expectations.
* gas/i386/intel-regs.d: Likewise.
opcodes/
2009-07-24 Jan Beulich <jbeulich@novell.com>
* i386-dis.c (fgrps): Correct annotation for feni/fdisi. Add
frstpm.
* i386-gen.c (cpu_flag_init): Add FP enabling flags where needed.
(cpu_flags): Add Cpu8087, Cpu287, Cpu387, Cpu687, and CpuFISTTP.
(set_bitfield): Expand CpuFP to Cpu8087|Cpu287|Cpu387.
* i386-opc.h (Cpu8087, Cpu287, Cpu387, Cpu687, CpuFISTTP):
Define.
(union i386_cpu_flags): Add cpu8087, cpu287, cpu387, cpu687,
and cpufisttp.
* i386-opc.tbl: Qualify floating point instructions by their
respective CpuXXX flag. Fix fucom{,p,pp}, fprem1, fsin, fcos,
and fsincos to be avilable only on 387. Fix fstsw ax to be
available only on 287+. Add f{,n}eni, f{,n}disi, f{,n}setpm,
and frstpm.
* i386-init.h, i386-tbl.h: Regenerate.
2009-07-24 15:41:20 +00:00
7769efb28e
PR 10288
...
* arm-dis.c (arm_opcodes): Catch non-zero bits 8-11 in register
offset or indexed based addressing mode 3.
2009-07-20 12:11:18 +00:00
74bdfecf08
PR 10288
...
* arm-dis.c (arm_opcodes): Catch illegal Addressing Mode 1
patterns.
(arm_decode_shift): Catch illegal register based shifts.
(print_insn_arm): Properly handle negative register r0
post-indexed addressing.
2009-07-14 14:16:34 +00:00
d1aaab3c71
2009-07-10 Doug Kwan <dougkwan@google.com>
...
* arm-disc.c (print_insn_coprocessor, print_insn_arm): Print only
lower 32 bits of long types to make hexadecimal output consistent
on both 32-bit and 64-bit hosts.
2009-07-10 16:58:54 +00:00
87337981d9
Regenerate.
2009-07-10 14:20:41 +00:00
1103f72c0f
gas/
...
* config/tc-arm.c (insns): Fix encoding for torvsc.
gas/testsuite/
* gas/arm/iwmmxt2.d: Fix insn pattern for torvsc,
add patterns for waddsubhx.
* gas/arm/iwmmxt2.s: Add tests for waddsubhx.
opcodes/
* arm-dis.c (coprocessor_opcodes): Fix mask for waddbhus.
2009-07-07 16:15:32 +00:00
78c66db84c
PR 10288
...
* arm-dis.c (arm_opcodes): Be more strict about decoding scaled
addressing modes.
2009-07-07 14:46:14 +00:00
22102fb0d9
[cgen]
...
* cpu/mep-core.cpu (fsft, ssarb): Mark as VOLATILE.
* cpu/mep-ivc2.cpu (many): Add VOLATILE to more insns that make
unspecified accesses to control registers.
[sid/component/cgen-cpu/mep]
* mep-cop1-16-decode.cxx: Regenerate.
* mep-cop1-16-decode.h: Regenerate.
* mep-cop1-16-defs.h: Regenerate.
* mep-cop1-16-model.cxx: Regenerate.
* mep-cop1-16-model.h: Regenerate.
* mep-cop1-16-sem.cxx: Regenerate.
* mep-cop1-32-decode.cxx: Regenerate.
* mep-cop1-32-decode.h: Regenerate.
* mep-cop1-32-defs.h: Regenerate.
* mep-cop1-32-model.cxx: Regenerate.
* mep-cop1-32-model.h: Regenerate.
* mep-cop1-32-sem.cxx: Regenerate.
* mep-cop1-48-decode.cxx: Regenerate.
* mep-cop1-48-decode.h: Regenerate.
* mep-cop1-48-defs.h: Regenerate.
* mep-cop1-48-model.cxx: Regenerate.
* mep-cop1-48-model.h: Regenerate.
* mep-cop1-48-sem.cxx: Regenerate.
* mep-cop1-64-decode.cxx: Regenerate.
* mep-cop1-64-decode.h: Regenerate.
* mep-cop1-64-defs.h: Regenerate.
* mep-cop1-64-model.cxx: Regenerate.
* mep-cop1-64-model.h: Regenerate.
* mep-cop1-64-sem.cxx: Regenerate.
* mep-core1-decode.cxx: Regenerate.
* mep-core1-decode.h: Regenerate.
* mep-core1-defs.h: Regenerate.
* mep-core1-model.cxx: Regenerate.
* mep-core1-model.h: Regenerate.
* mep-core1-sem.cxx: Regenerate.
* mep-cpu.h: Regenerate.
* mep-decode.cxx: Regenerate.
* mep-decode.h: Regenerate.
* mep-defs.h: Regenerate.
* mep-desc.h: Regenerate.
* mep-model.cxx: Regenerate.
* mep-model.h: Regenerate.
* mep-sem.cxx: Regenerate.
[opcodes]
* mep-desc.c: Regenerate.
* mep-desc.h: Regenerate.
* mep-opc.c: Regenerate.
* mep-opc.h: Regenerate.
2009-07-07 01:56:05 +00:00
922d8de8c1
<gas changes>
...
2009-07-06 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
* config/tc-i386.c (cpu_arch): Add .fma4 and CPU_FMA4_FLAGS.
(build_modrm_byte): Add support to handle FMA4 instructions.
(md_show_usage): Add fma4.
<gas/testsuite changes>
2009-07-06 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
* gas/i386/i386.exp: Add FMA4 tests.
* gas/i386/x86-64-fma4.d: Ditto.
* gas/i386/fma4.d: Ditto.
* gas/i386/x86-64-fma4.s: Ditto.
* gas/i386/fma4.s: Ditto.
<opcodes changes>
2009-07-06 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
* i386-opc.h (CpuFMA4): Add CpuFMA4.
(i386_cpu_flags): New.
* i386-gen.c: Add CPU_FMA4_FLAGS.
* i386-opc.tbl: Add FMA4 instructions.
* i386-tbl.h: Regenerate.
* i386-init.h: Regenerate.
* i386-dis.c (OP_VEX_FMA): New. Handle FMA4.
(OP_XMM_VexW): Ditto.
(OP_EX_VexW): Ditto.
(VEXI4_Fixup): Ditto.
(VexI4, VexFMA, Vex128FMA, EXVexW, EXdVexW, XMVexW): New Macros.
(PREFIX_VEX_3A5C, PREFIX_VEX_3A5D, PREFIX_VEX_3A5E): New.
(PREFIX_VEX_3A5F, PREFIX_VEX_3A60): New.
(PREFIX_VEX_3A68, PREFIX_VEX_3A69, PREFIX_VEX_3A6A): New.
(PREFIX_VEX_3A6B, PREFIX_VEX_3A6C, PREFIX_VEX_3A6D): New.
(PREFIX_VEX_3A6E, PREFIX_VEX_3A6F, PREFIX_VEX_3A7A): New.
(PREFIX_VEX_3A7B, PREFIX_VEX_3A7C, PREFIX_VEX_3A7D): New.
(PREFIX_VEX_3A7E, PREFIX_VEX_3A7F): New.
(VEX_LEN_3A6A_P_2,VEX_LEN_3A6B_P_2, VEX_LEN_3A6E_P_2): New.
(VEX_LEN_3A6F_P_2,VEX_LEN_3A7A_P_2, VEX_LEN_3A7B_P_2): New.
(VEX_LEN_3A7E_P_2,VEX_LEN_3A7F_P_2): New.
(get_vex_imm8): New. handle FMA4.
(OP_EX_VexReg): Ditto.
2009-07-06 19:34:30 +00:00
fe56b6cece
PR 10288
...
* arm-dis.c (coprocessor): Print the LDC and STC versions of the
LFM and SFM instructions as comments,.
Improve consistency of formatting for instructions displayed as
comments and decimal values displayed with their hexadecimal
equivalents.
Formatting tidy ups.
Updated expected disassembler regexps.
2009-06-30 11:57:05 +00:00
05413229fd
PR 10288
...
* arm-dis.c (enum opcode_sentinels): New: Used to mark the
boundary between variaant and generic coprocessor instuctions.
(coprocessor): Use it.
Fix architecture version of MCRR and MRRC instructions.
(arm_opcdes): Fix patterns for STRB and STRH instructions.
(print_insn_coprocessor): Check architecture and extension masks.
Print a hexadecimal version of any decimal constant that is
outside of the range of -16 to +32.
(print_arm_address): Add a return value of the offset used in the
adress, if it is worth printing a hexadecimal version of it.
(print_insn_neon): Print a hexadecimal version of any decimal
constant that is outside of the range of -16 to +32.
(print_insn_arm): Likewise.
(print_insn_thumb16): Likewise.
(print_insn_thumb32): Likewise.
PR 10297
* arm-dis.c (UNDEFINED_INSTRUCTION): New macro for a description
of an undefined instruction.
(arm_opcodes): Use it.
(thumb_opcod): Use it.
(thumb32_opc): Use it.
Update expected disassembly regrexps in GAS and LD testsuites.
2009-06-29 08:08:15 +00:00
dab97f2471
[cgen]
...
* intrinsics.scm: Updates to support IVC2.
(belongs-to-group?): Check IVC2 slots.
(-slots-attribute): New.
(targets::attributes): Add SLOTS.
(target:add-well-known-intrinsics): Add CPMOV.
(md-insn): Add CPTYPE and CRET?.
(add-md-insn): Likewise.
(add-intrinsic-for-isa): Disable the duplicate tests, as IVC2 has
duplicate insns with different bit patterns.
(write-cgen-insn?): Add cret? support.
(intrinsics.h): Add vector types.
(runtime-op): Add vector support.
(intrinsic-protos.h): Let GCC define its types. Add cret? support.
* cpu/mep-core.cpu: Add CPTYPE and CRET attributes.
* cpu/mep-ivc2.cpu: Update all insns to include type information.
(h-cr-ivc2): Default to typeless.
(h-ccr-ivc2): Fix register width.
(SLOTS): Fix values and default.
(ivc2_*): Add control register names.
(crop, crqp, crpp, croc, crqc, crpc): Default to typeless.
[opcodes]
* mep-desc.c: Regenerate.
* mep-desc.h: Regenerate.
* mep-dis.c: Regenerate.
* mep-ibld.c: Regenerate.
* mep-opc.c: Regenerate.
[sid/component/cgen-cpu/mep]
* ivc2-cop.cxx (ivc2_cphadd_w): Change to return value.
(ivc2_cpsubaca0u_b): Remove debug line.
* ivc2-cpu.h (ivc2_cpccadd_b): Change to return value.
* mep-cop1-16-decode.cxx: Regenerate.
* mep-cop1-16-sem.cxx: Regenerate.
* mep-cop1-32-decode.cxx: Regenerate.
* mep-cop1-32-sem.cxx: Regenerate.
* mep-cop1-48-decode.cxx: Regenerate.
* mep-cop1-48-sem.cxx: Regenerate.
* mep-cop1-64-decode.cxx: Regenerate.
* mep-cop1-64-sem.cxx: Regenerate.
* mep-core1-decode.cxx: Regenerate.
* mep-cpu.h: Regenerate.
* mep-decode.cxx: Regenerate.
* mep-desc.h: Regenerate.
2009-06-24 03:06:42 +00:00
378a0c07ca
[cgen]
...
* cpu/mep.opc (mep_cgen_insn_supported_asm): New, skip the short
version of BSR when assembling VLIW bundles. Use it in mep-asm.c
[opcodes]
* mep-asm.c: Regenerate.
* mep-opc.c: Regenerate.
* mep-opc.h: Regenerate.
2009-06-24 01:44:53 +00:00
aece7d2e74
* po/fi.po: Updated Finish translation.
2009-06-22 11:32:21 +00:00
1998a8e033
cpu/
...
* m32c.opc (parse_lab_5_3): Use correct enum.
opcodes/
* m32c-asm.c: Regenerate.
2009-06-22 00:53:25 +00:00
b33bafa0d7
* score-dis.c (print_insn_score48, print_insn_score32): Move default
...
case label to proper lexical block.
* score7-dis.c (print_insn_score32): Likewise.
2009-06-22 00:01:57 +00:00
ce21feb4ba
* s390-opc.c (INSTR_RR_0R_OPT, INSTR_RX_0RRD_OPT, MASK_RR_0R_OPT,
...
MASK_RX_0RRD_OPT): New instruction formats with optional arguments.
* s390-opc.txt (nopr, nop): Use new instruction format.
2009-06-19 10:55:42 +00:00
0313a2b8d2
PR 10288
...
* arm-dis.c (print_insn_coprocessor): Check that a user specified
ARM architecture supports the matched instruction.
(print_insn_arm): Likewise.
(select_arm_features): New function. Fills in the fields of an
arm_feature_set structure based on a given arm machine number.
(print_insn): Initialise an arm_feature_set structure.
* objdump.c (disassemble_bytes): Set the
USER_SPECIFIED_MACHINE_TYPE flag in the disassemble_info structure
if the user has invoked the -m switch.
* doc/binutils.texi: Document the additional behaviour of
objdump's -m switch for ARM targets.
* dis-asm.h (USER_SPECIFIED_MACHINE_TYPE): New value for the flags
field of struct disassemble_info.
* gas/arm/align.s: Add labels so that COFF based targets can
correctly locate THUMB code.
* gas/arm/copro.d: Do not pass --architecture switch to objdump.
2009-06-18 10:31:21 +00:00
6db7e006e4
bfd/
...
* elf32-vax.c (elf_vax_plt_sym_val): New function.
(elf_backend_plt_sym_val): Define.
opcodes/
* vax-dis.c (is_function_entry): Return success for synthetic
symbols too.
(is_plt_tail): New function.
(print_insn_vax): Decode PLT entry offset longword.
2009-06-16 02:23:09 +00:00
fe2ceba101
PR 10186
...
* arm-dis.c (thumb32_opcodes): Fix binary value of SEV.W
instruction.
* gas/arm/thumb32.d: Fix expected binary value of SEV.W instruction.
* config/tc-arm.c (T16_32_TAB): Fix binary value of SEV.W
instruction.
2009-06-15 15:42:36 +00:00
522fe56177
PR 10173
...
* cr16-dis.c (print_arg): Avoid printing the 0x prefix twice.
2009-06-15 15:24:52 +00:00
1316c8b37f
PR 10263
...
* arm-dis.c (print_insn): Ignore is_data if the user has requested
the disassembly of data as well as instructions.
* objdump.c (disassemble_bytes): Set the DISASSEMBLE_DATA bit in
the flags field of the disassemble_info structure if the -D switch
is in operation.
* dis-asm.h (struct disassemble_info): New value for the flags
field.
2009-06-15 11:37:26 +00:00
f6475b4872
* cgen.sh: Handle multiple simultaneous runs for parallel makes.
2009-06-14 16:36:56 +00:00
f865a31d1e
Add PC-relative branch instructions to moxie port.
2009-06-11 11:27:58 +00:00
0e7c7f11f4
Print moxie addresses nicely.
2009-06-06 13:02:21 +00:00
67a648f17a
* dep-in.sed: Don't use \n in replacement part of s command.
...
* Makefile.am (DEP1): LC_ALL for uniq.
* Makefile.in: Regenerate.
2009-06-04 06:57:56 +00:00
06c582ac9d
* po/nl.po: Updated Dutch translation.
2009-06-02 16:31:59 +00:00
3164099e4f
2009-05-29 Tristan Gingold <gingold@adacore.com>
...
* ia64-gen.c (parse_resource_users, print_dependency_table,
add_dis_table_ent, finish_distable, insert_bit_table_ent,
add_dis_entry, compact_distree, gen_dis_table, completer_entries_eq,
get_prefix_len, compute_completer_bits, insert_opcode_dependencies,
insert_completer_entry, print_completer_entry, print_completer_table,
opcodes_eq, add_opcode_entry, shrink): Use ISO C syntax for functions.
2009-06-02 07:48:05 +00:00
d285268e48
[cgen]
...
* cpu/mep.opc (parse_signed16_range): New.
(parse_unsigned16_range): New.
* cpu/mep-ivc2.cpu (imm16p0, simm16p0): Use them.
[opcodes]
* mep-asm.c: Regenerate.
* mep-desc.c: Regenerate.
2009-05-28 22:53:08 +00:00
2f3565a392
[cgen/cpu]
...
* cpu/mep-ivc2.cpu (h-ccr-ivc2): Enable for C3 slots, fix
accumulator names.
(f-ivc2-ccrn-c3hi): New.
(f-ivc2-ccrn-c3lo): New.
(f-ivc2-ccrn-c3): New.
(ivc2c3ccrn): Use it.
[sid/component/cgen-cpu/mep]
* mep-cop1-32-decode.cxx: Regenerate.
* mep-cop1-32-decode.h: Regenerate.
* mep-cop1-32-sem.cxx: Regenerate.
* mep-cop1-48-sem.cxx: Regenerate.
[opcodes]
* mep-asm.c: Regenerate.
* mep-desc.c: Regenerate.
* mep-desc.h: Regenerate.
* mep-dis.c: Regenerate.
* mep-ibld.c: Regenerate.
* mep-opc.c: Regenerate.
* mep-opc.h: Regenerate.
2009-05-27 01:49:46 +00:00
f12e7348b2
Update Indonesian translations.
...
Update translation templates.
2009-05-26 16:49:41 +00:00
9e097a72c9
* dep-in.sed: Don't modify .o to .lo here. Output one filename
...
per line with all lines having continuation backslash. Prefix
first line with "A", following lines with "B".
* Makefile.am (DEP): Don't use dep.sed here.
(DEP1): Run $MKDEP on single files, modify .o to .lo here. Use
dep.sed here on dependencies, sort and uniq.
* Makefile.in: Regenerate.
2009-05-26 03:19:28 +00:00
4f8318f890
2009-05-25 Tristan Gingold <gingold@adacore.com>
...
* makefile.vms (OPT): New variable.
(CFLAGS): Update compilation flags.
2009-05-25 12:43:48 +00:00
1d74713bc6
[cgen]
...
* cpu/mep.opc (mep_examine_ivc2_insns): Fix bug in ivc2 decoder.
(mep_config_map): Regenerate.
* cpu/mep-ivc2.cpu (h-ccr-ivc2): Add generic names as well as
ivc2-specific names.
(simm8p20): New.
(cmovc): move to after field definitions, use ivc2-specific
register names.
(cpmovi_b_P0S_P1): New.
[utils/mep]
* mepcfgtool.c (do_cgen_config_opc): Propagate endianness and VLIW
size to default configuration.
[sid/component/cgen-cpu/mep]
* mep-cop1-16-decode.cxx: Regenerate.
* mep-cop1-16-decode.h: Regenerate.
* mep-cop1-16-model.cxx: Regenerate.
* mep-cop1-16-model.h: Regenerate.
* mep-cop1-16-sem.cxx: Regenerate.
* mep-cop1-64-decode.cxx: Regenerate.
* mep-cop1-64-decode.h: Regenerate.
* mep-cop1-64-model.cxx: Regenerate.
* mep-cop1-64-model.h: Regenerate.
* mep-cop1-64-sem.cxx: Regenerate.
[opcodes]
* mep-asm.c: Regenerate.
* mep-desc.c: Regenerate.
* mep-desc.h: Regenerate.
* mep-dis.c: Regenerate.
* mep-ibld.c: Regenerate.
* mep-opc.c: Regenerate.
* mep-opc.h: Regenerate.
2009-05-22 17:37:45 +00:00
c1e679ec0a
<gas changes>
...
2009-05-22 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
* config/tc-i386.c (process_drex): Delete. Remove SSE5 support.
(build_modrm_byte): Remove DREX handling support.
(DREX_*): Delete.
(drex_byte): Delete.
(md_assemble): Remove DREX handling support.
(process_operands): Remove DREX, SSE5 support.
(i386_insn): Remove DREX.
<gas/testsuite changes>
2009-05-22 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
* gas/i386/i386.exp: Remove SSE5 tests.
* gas/i386/x86-64-sse5.s: Delete. Remove SSE5 tests.
* gas/i386/x86-64-sse5.d: Ditto.
* gas/i386/arch-10-1.l: Remove SSE5 tests.
* gas/i386/arch-10-2.l: Ditto.
* gas/i386/arch-10-3.l: Ditto.
* gas/i386/arch-10-4.l: Ditto.
* gas/i386/arch-10.d: Ditto.
* gas/i386/arch-10.s: Ditto.
* gas/i386/arch-4.s: Delete. Remove SSE5 tests.
* gas/i386/arch-4.d: Ditto.
* gas/i386/arch-8.s: Ditto.
* gas/i386/arch-8.d: Ditto.
* gas/i386/arch-2.s: Remove SSE5 tests.
* gas/i386/arch-2.d: Remove SSE5 tests.
* gas/i386/x86-64-arch-2.s: Ditto.
<opcodes changes>
2009-05-22 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
* i386-opc.h (Cpusse5): Delete.
(i386_cpu_flags): Delete.
* i386-gen.c: Remove CpuSSE5, Drex, Drexv and Drexc.
* i386-opc.tbl: Remove SSE5 instructions.
* i386-tbl.h: Regenerate.
* i386-init.h: Regenerate.
* i386-dis.c (OP_E_memeory, OP_E_extended): Remove drex handling.
(print_drex_arg): Delete.
(OP_DREX4): Delete.
(OP_DREX3): Delete.
(OP_DREX_ICMP): Delete.
(OP_DREX_FCMP): Delete.
(DREX_*): Delete.
(THREE_BYTE_0F24, THREE_BYTE_0F25, THREE_BYTE_0f7B): Delete.
2009-05-22 15:57:25 +00:00
2b3decb5e1
Run "make dep-am" and regenerate
2009-05-22 09:33:16 +00:00
eb9568003a
* mep-asm.c: Regenerate.
...
* mep-opc.c: Regenerate.
2009-05-19 23:35:47 +00:00
3526b6802e
Index: opcodes
...
* mep-asm.c: Regenerate.
* mep-desc.c: Regenerate.
* mep-desc.h: Regenerate.
* mep-dis.c: Regenerate.
* mep-ibld.c: Regenerate.
* mep-opc.c: Regenerate.
* mep-opc.h: Regenerate.
Index: gas
* config/tc-mep.c (md_begin): Check coprocessor type.
(md_check_parallel64_scheduling): Use memset to initialize the buffer.
(md_check_parallel32_scheduling): Likewise.
(slot_ok): New.
(mep_check_ivc2_scheduling): New.
(mep_check_parallel_scheduling): Call it.
(mep_process_saved_insns): Add IVC2 slot support.
(md_assemble): Likewise.
2009-04-30 21:23:30 +00:00
59b1530d0b
Add missing disassembler patch for moxie.
2009-04-30 04:54:08 +00:00
45be3704c8
[cgen]
...
* cpu/mep-c5.cpu (f-12s20): Change to signed.
(lhucpm1): Limit to C5 mach.
(dsp0,dsp1): Rewrite as aliases so that intrinsics are generated.
* cpu/mep-core.cpu (extend-cdisp10): New.
(f-cdisp10): Change to signed, use extend-cdisp10 to sign extend.
[opcodes]
* mep-desc.c: Regenerate.
* mep-ibld.c: Regenerate.
* mep-opc.c: Regenerate.
* mep-opc.h: Regenerate.
[sid/component/cgen-cpu/mep]
* mep-core1-decode.cxx: Regenerate.
* mep-core1-decode.h: Regenerate.
* mep-decode.cxx: Regenerate.
* mep-decode.h: Regenerate.
2009-04-18 02:56:43 +00:00
52de720d5d
Add missing ChangeLog entry:
...
* mep-asm.c: Regenerate.
* mep-desc.c: Regenerate.
* mep-desc.h: Regenerate.
* mep-dis.c: Regenerate.
* mep-ibld.c: Regenerate.
* mep-opc.c: Regenerate.
* mep-opc.h: Regenerate.
2009-04-18 01:50:02 +00:00
20135e4cea
Add new binutils target: moxie
2009-04-16 15:39:48 +00:00
ac5c19e6ba
gas/testsuite/
...
2009-04-15 Jan Beulich <jbeulich@novell.com>
* gas/i386/x86-64-sse5.s: Add test of protd.
* gas/i386/x86-64-sse5.d: Adjust expectations to match input.
opcodes/
2009-04-15 Jan Beulich <jbeulich@novell.com>
* i386-opc.tbl (protb, protw, protd, protq): Set opcode
extension to None.
(pshab, pshaw, pshad, pshaq): Likewise.
* i386-tbl.h: Re-generate.
2009-04-15 13:31:28 +00:00
40493983ad
[cgen]
...
* cpu/mep-c5.cpu: New.
* cpu/mep-core.cpu: Add C5 support.
* cpu/mep.opc: Likewise.
[opcodes]
* mep-asm.c: Regenerate.
* mep-desc.c: Regenerate.
* mep-desc.h: Regenerate.
* mep-dis.c: Regenerate.
* mep-ibld.c: Regenerate.
* mep-opc.c: Regenerate.
* mep-opc.h: Regenerate.
[sid]
* component/cache/cache.cxx (cache_component::cache_component):
Add write_hint_pin(). Attach it to write-hint.
(cache_component::write_hint): New.
* component/cache/cache.h (write_hint_pin): New.
(write_hint): New.
* component/cgen-cpu/mep/Makefile.am: Regenerate.
* component/cgen-cpu/mep/Makefile.in: Regenerate.
* component/cgen-cpu/mep/mep-core1-decode.cxx: Regenerate.
* component/cgen-cpu/mep/mep-core1-decode.h: Regenerate.
* component/cgen-cpu/mep/mep-core1-defs.h: Regenerate.
* component/cgen-cpu/mep/mep-core1-model.cxx: Regenerate.
* component/cgen-cpu/mep/mep-core1-model.h: Regenerate.
* component/cgen-cpu/mep/mep-core1-sem.cxx: Regenerate.
* component/cgen-cpu/mep/mep-decode.cxx: Regenerate.
* component/cgen-cpu/mep/mep-decode.h: Regenerate.
* component/cgen-cpu/mep/mep-defs.h: Regenerate.
* component/cgen-cpu/mep/mep-desc.h: Regenerate.
* component/cgen-cpu/mep/mep-model.cxx: Regenerate.
* component/cgen-cpu/mep/mep-model.h: Regenerate.
* component/cgen-cpu/mep/mep-sem.cxx: Regenerate.
* component/cgen-cpu/mep/mep.cxx (mep_cpu): Connect
write-hint pin.
(do_cache): Add C5 support.
(do_cache_prefetch): Likewise.
(do_casb3, do_cash3, do_casw3): New.
* component/cgen-cpu/mep/mep.h: Add C5 support and write-hint pin.
(do_casb3, do_cash3, do_casw3): New.
* component/families/mep/Makefile.in: Regenerate.
* component/families/mep/dsu.in: Add C5 support.
* main/dynamic/mainDynamic.cxx: Add C5 support.
* main/dynamic/mepCfg.cxx: Connect write-hint pin.
* main/dynamic/mepCfg.h: Add C5 support.
2009-04-08 20:39:35 +00:00
858d7a6db2
opcodes/
...
* ppc-opc.c (powerpc_opcodes) <"tlbilxlpid", "tlbilxpid", "tlbilxva",
"tlbilx">: Use secondary opcode "18" as per the ISA 2.06 documentation.
Reorder entries so the extended mnemonics are listed before tlbilx.
gas/testsuite/
* gas/ppc/e500mc.d: Update to match extended mnemonics.
2009-04-07 18:28:02 +00:00
70dc4e324b
opcodes/
...
* ppc-dis.c (powerpc_init_dialect): Do not choose a default dialect
due to -many/-Many.
(print_insn_powerpc): Make sure we only deprecate instructions using
the original dialect and not a modified dialect due to -Many handling.
Move the handling of the condition register and default operands to
the end of the if/else if/else chain.
* ppc-opc.c (powerpc_opcodes): Reorder the opcode table so that
instructions from newer processors are listed before older ones.
<"icblce", "sync", "eieio", "tlbld">: Deprecate for processors
that have instructions with conflicting opcodes.
2009-04-02 13:30:56 +00:00
e401b04ca7
opcodes/
...
* ppc-opc.c (powerpc_opcodes) <"dcbzl">: Merge the POWER4 and
E500MC entries.
2009-04-02 00:42:29 +00:00
b8f9ee44f9
2009-04-01 Christophe Lyon <christophe.lyon@st.com>
...
opcodes/
* arm-dis.c (print_insn): Print BE8 opcodes in little endianness.
ld/testsuite/
* ld-arm/arm-elf.exp: BE8 tests expect the same output as the
default ones.
* ld-arm/arm-be8.d: Print opcodes in little endian.
* ld-arm/farcall-thumb-arm-be8.d: Removed useless expected result.
* ld-arm/farcall-arm-arm-be8.d: Likewise.
2009-04-01 15:45:13 +00:00
d460e92e41
gas/testsuite:
...
* gas/arm/mapsecs.d, gas/arm/mapsecs.s: New.
opcodes:
* arm-dis.c (print_insn): Also check section matches in backwards
search for mapping symbol.
2009-03-30 14:41:31 +00:00
d34b50065a
2009-03-26 H.J. Lu <hongjiu.lu@intel.com>
...
* i386-dis.c (get_valid_dis386): Abort on unhandled table.
2009-03-27 00:28:32 +00:00
02b1cb404a
* Makefile.am (BFD32_BACKENDS): Remove elf32-score and
...
elf32-score7 files.
(BFD32_BACKEND_CFILES): Likewise.
(BFD64_BACKENDS): Add elf32-score and elf32-score7 files.
(BFD64_BACKENDS_CFILES): Likewise.
* Makefile.in: Regenerate.
* config.bfd: More Score targets into BFD64 list.
* configure.in: Move score vectors to 64-bit list.
* targets.c: Likewise.
* score-dis.c: Only compile when 64-bit bfds are enabled.
2009-03-18 16:58:33 +00:00
3889c459bb
bfd/
...
* vms-hdr.c: Don't include alloca.h.
opcodes/
* cgen-opc.c: Include alloca-conf.h rather than alloca.h.
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
2009-03-18 11:47:18 +00:00
8d25cc3de0
include/
...
* alloca-conf.h: Revise based on autoconf-2.61, autoconf-2.13
documentation.
bfd/
* elf32-m68hc1x.c: Include alloca-conf.h.
* xsym.c: Likewise.
* elf64-hppa.c: Likewise. Remove existing #if's handling alloca.
* som.c: Likewise.
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
binutils/
* sysdep.h: Include alloca-conf.h instead of config.h and remove
existing #if's handling alloca.
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
gas/
* as.h: Include alloca-conf.h instead of config.h and remove
existing #if's handling alloca.
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
opcodes/
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
* openrisc-opc.c: Regenerate.
ld/
* ld.h: Remove alloca handling.
2009-03-18 11:27:18 +00:00
34dd024a28
Add Spanish translation to gold.
...
Update Indonesian translation for opcodes.
2009-03-10 09:21:01 +00:00
69fe9ce501
include/opcode/
...
* ppc.h (ppc_parse_cpu): Declare.
opcodes/
* ppc-dis.c: Include "opintl.h".
(struct ppc_mopt, ppc_opts): New.
(ppc_parse_cpu): New function.
(powerpc_init_dialect): Use it.
(print_ppc_disassembler_options): Dump options from ppc_opts.
Internationalize message.
gas/
* config/tc-ppc.c (parse_cpu): Delete.
(md_parse_option, ppc_machine): Use ppc_parse_cpu.
gas/testsuite/
* gas/ppc/altivec_and_spe.d (objdump): Add -Maltivec.
* gas/ppc/common.d: Adjust for -Mcom not including -Mppc.
2009-03-10 06:53:46 +00:00
d11fd24905
Updated Spanish translations.
2009-03-06 12:14:40 +00:00
51dec22749
bfd/
...
PR 6768
* configure.in: Test for ld --as-needed support. Link shared
libbfd against libm.
* configure: Regenerate.
opcodes/
PR 6768
* configure.in: Test for ld --as-needed support. Link shared
libopcodes against libm.
* configure: Regenerate.
2009-03-04 02:10:34 +00:00
a1f7ca36bf
missing from make dep-am commit
2009-03-04 01:16:15 +00:00
c72ab5f2c5
opcodes/
...
* ppc-opc.c (powerpc_opcodes): Reorder the opcode table so that
instructions from newer processors are listed before older ones.
2009-03-04 01:00:53 +00:00
500b1f4473
make dep-am and regen
...
opcodes/
* Makefile.am (HFILES): Move lm32-desc.h and lm32-opc.h from..
(CFILES): ..here.
2009-03-03 02:41:14 +00:00
c3b7224ae4
Add support for Score7 architecture.
2009-03-02 10:33:08 +00:00
58e2467181
Backport from git Libtool:
...
2009-01-19 Robert Millan <rmh@aybabtu.com>
Support GNU/kOpenSolaris.
* libltdl/m4/libtool.m4 (_LT_SYS_DYNAMIC_LINKER)
(_LT_CHECK_MAGIC_METHOD, _LT_COMPILER_PIC, _LT_LINKER_SHLIBS)
(_LT_LANG_CXX_CONFIG) [kopensolaris*-gnu]: Recognize
GNU/kOpenSolaris.
binutils/
* configure: Regenerate.
opcodes/
* configure: Regenerate.
bfd/
* configure: Regenerate.
gas/
* configure: Regenerate.
gprof/
* configure: Regenerate.
ld/
* configure: Regenerate.
2009-03-01 18:57:19 +00:00
d6f574e0ed
2009-02-27 H.J. Lu <hongjiu.lu@intel.com>
...
* i386-dis.c (OP_EX): Call OP_E_memory instead of OP_E.
2009-02-27 20:13:04 +00:00
066be9f7bd
gas/
...
* config/tc-ppc.c (pre_defined_registers): Add "f32" to "f63",
"f.32" to "f.63", "vs0" to "vs63" and "vs.0" to "vs.63".
(parse_cpu): Extend -mpower7 to accept power7 and isel instructions.
gas/testsuite/
* gas/ppc/e500mc.d ("wait", "waitsrv", "waitimpl"): Add tests.
* gas/ppc/e500mc.s: Likewise.
* gas/ppc/power6.d ("cdtbcd", "cbcdtd", "addg6s"): Add tests.
* gas/ppc/power6.s: Likewise.
* gas/ppc/power7.d ("lfdpx", "mffgpr", "mftgpr"): Remove invalid tests.
("wait", "waitsrv", "waitimpl", "divwe", "divwe.", "divweo", "divweo.",
"divweu", "divweu.", "divweuo", "divweuo.", "bpermd", "popcntw",
"popcntd", "ldbrx", "stdbrx", "lfiwzx", "lfiwzx", "fcfids", "fcfids.",
"fcfidus", "fcfidus.", "fctiwu", "fctiwu.", "fctiwuz", "fctiwuz.",
"fctidu", "fctidu.", "fctiduz", "fctiduz.", "fcfidu", "fcfidu.",
"ftdiv", "ftdiv", "ftsqrt", "ftsqrt", "dcbtt", "dcbtstt", "dcffix",
"dcffix.", "lbarx", "lbarx", "lbarx", "lharx", "lharx", "lharx",
"stbcx.", "sthcx.", "fre", "fre.", "fres", "fres.", "frsqrte",
"frsqrte.", "frsqrtes", "frsqrtes.", "isel"): Add tests.
* gas/ppc/power7.s: Likewise.
* gas/ppc/vsx.d: New test.
* gas/ppc/vsx.s: Likewise.
* gas/ppc/ppc.exp: Run it.
include/opcode/
* ppc.h (PPC_OPCODE_POWER7): New.
opcodes/
* ppc-dis.c (powerpc_init_dialect): Extend -Mpower7 to disassemble
the power7 and the isel instructions.
* ppc-opc.c (insert_xc6, extract_xc6): New static functions.
(insert_dm, extract_dm): Likewise.
(XB6): Update comment to include XX2 form.
(WC, XC6, SHW, DMEX, UIM, XX2, XX3RC, XX4, XX2_MASK, XX2UIM_MASK,
XX2BF_MASK, XX3BF_MASK, XX3SHW_MASK, XX4_MASK, XWC_MASK, POWER7): New.
(RemoveXX3DM): Delete.
(powerpc_opcodes): <"lfdp", "lfdpx", "mcrxr", "mftb", "mffgpr",
"mftgpr">: Deprecate for POWER7.
<"fres", "fres.", "frsqrtes", "frsqrtes.", "fre", "fre.", "frsqrte",
"frsqrte.">: Deprecate the three operand form and enable the two
operand form for POWER7 and later.
<"wait">: Extend to accept optional parameter. Enable for POWER7.
<"waitsrv", "waitimpl">: Add extended opcodes.
<"ldbrx", "stdbrx">: Enable for POWER7.
<"cdtbcd", "cbcdtd", "addg6s">: Add POWER6 opcodes.
<"bpermd", "dcbtstt", "dcbtt", "dcffix.", "dcffix", "divde.", "divde",
"divdeo.", "divdeo", "divdeu.", "divdeu", "divdeuo.", "divdeuo",
"divwe.", "divwe", "divweo.", "divweo", "divweu.", "divweu", "divweuo.",
"divweuo", "fcfids.", "fcfids", "fcfidu.", "fcfidu", "fcfidus.",
"fcfidus", "fctidu.", "fctidu", "fctiduz.", "fctiduz", "fctiwu.",
"fctiwu", "fctiwuz.", "fctiwuz", "ftdiv", "ftsqrt", "lbarx", "lfiwzx",
"lharx", "popcntd", "popcntw", "stbcx.", "sthcx.">: Add POWER7 opcodes.
<"lxsdux", "lxsdx", "lxvdsx", "lxvw4ux", "lxvw4x", "stxsdux", "stxsdx",
"stxvw4ux", "stxvw4x", "xsabsdp", "xsadddp", "xscmpodp", "xscmpudp",
"xscpsgndp", "xscvdpsp", "xscvdpsxds", "xscvdpsxws", "xscvdpuxds",
"xscvdpuxws", "xscvspdp", "xscvsxddp", "xscvuxddp", "xsdivdp",
"xsmaddadp", "xsmaddmdp", "xsmaxdp", "xsmindp", "xsmsubadp",
"xsmsubmdp", "xsmuldp", "xsnabsdp", "xsnegdp", "xsnmaddadp",
"xsnmaddmdp", "xsnmsubadp", "xsnmsubmdp", "xsrdpi", "xsrdpic",
"xsrdpim", "xsrdpip", "xsrdpiz", "xsredp", "xsrsqrtedp", "xssqrtdp",
"xssubdp", "xstdivdp", "xstsqrtdp", "xvabsdp", "xvabssp", "xvadddp",
"xvaddsp", "xvcmpeqdp.", "xvcmpeqdp", "xvcmpeqsp.", "xvcmpeqsp",
"xvcmpgedp.", "xvcmpgedp", "xvcmpgesp.", "xvcmpgesp", "xvcmpgtdp.",
"xvcmpgtdp", "xvcmpgtsp.", "xvcmpgtsp", "xvcpsgnsp", "xvcvdpsp",
"xvcvdpsxds", "xvcvdpsxws", "xvcvdpuxds", "xvcvdpuxws", "xvcvspdp",
"xvcvspsxds", "xvcvspsxws", "xvcvspuxds", "xvcvspuxws", "xvcvsxddp",
"xvcvsxdsp", "xvcvsxwdp", "xvcvsxwsp", "xvcvuxddp", "xvcvuxdsp",
"xvcvuxwdp", "xvcvuxwsp", "xvdivdp", "xvdivsp", "xvmaddadp",
"xvmaddasp", "xvmaddmdp", "xvmaddmsp", "xvmaxdp", "xvmaxsp",
"xvmindp", "xvminsp", "xvmovsp", "xvmsubadp", "xvmsubasp", "xvmsubmdp",
"xvmsubmsp", "xvmuldp", "xvmulsp", "xvnabsdp", "xvnabssp", "xvnegdp",
"xvnegsp", "xvnmaddadp", "xvnmaddasp", "xvnmaddmdp", "xvnmaddmsp",
"xvnmsubadp", "xvnmsubasp", "xvnmsubmdp", "xvnmsubmsp", "xvrdpi",
"xvrdpic", "xvrdpim", "xvrdpip", "xvrdpiz", "xvredp", "xvresp",
"xvrspi", "xvrspic", "xvrspim", "xvrspip", "xvrspiz", "xvrsqrtedp",
"xvrsqrtesp", "xvsqrtdp", "xvsqrtsp", "xvsubdp", "xvsubsp", "xvtdivdp",
"xvtdivsp", "xvtsqrtdp", "xvtsqrtsp", "xxland", "xxlandc", "xxlnor",
"xxlor", "xxlxor", "xxmrghw", "xxmrglw", "xxsel", "xxsldwi", "xxspltd",
"xxspltw", "xxswapd">: Add VSX opcodes.
2009-02-26 22:07:33 +00:00
4c664d7bf7
gas/
...
2009-02-23 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (vex_imm4): Removed.
(VEX_check_operands): Likewise.
(match_template): Updated.
opcodes/
2009-02-23 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (operand_type_init): Remove OPERAND_TYPE_VEX_IMM4.
(operand_types): Remove Vex_Imm4.
* i386-opc.h (Vex_Imm4): Removed.
(OTMax): Updated.
(i386_operand_type): Remove vex_imm4.
* i386-opc.tbl: Remove Vex_Imm4 comments.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2009-02-23 20:41:46 +00:00
4ce8808b2c
* arm-dis.c (neon_opcodes): Correct bit-mask and patterns for
...
vq{r}shr{u}n.s64 insnstructions.
2009-02-23 14:58:34 +00:00
0e55be1624
gas/testsuite/
...
* gas/ppc/e500mc.d ("lfdepx", "stfdepx"): Fix tests to expect a
floating point register.
opcodes/
* ppc-opc.c (powerpc_opcodes) <"lfdepx", "stfdepx">: Fix the first
operand to be a float point register (FRT/FRS).
2009-02-19 21:18:46 +00:00
b1c9882d1b
opcodes/
...
* mips-opc.c (mips_builtin_opcodes): Move the Octeon-specific
dmfc2 and dmtc2 before the architecture-level variants.
gas/testsuite/
* gas/mips/octeon.s: Add more tests for dmfc2 and dmtc2.
* gas/mips/octeon.d: Update.
* gas/mips/octeon-ill.l: Update error message.
2009-02-18 20:51:59 +00:00
137f2437e0
* fr30-opc.c: Regenerate.
...
* frv-opc.c: Regenerate.
* ip2k-opc.c: Regenerate.
* iq2000-opc.c: Regenerate.
* lm32-opc.c: Regenerate.
* m32c-opc.c: Regenerate.
* m32r-opc.c: Regenerate.
* mep-opc.c: Regenerate.
* mt-opc.c: Regenerate.
* xc16x-opc.c: Regenerate.
* xstormy16-opc.c: Regenerate.
* tic54x-dis.c (print_instruction): Avoid compiler warning on
sprintf call.
* opc-itab.scm (<>_cgen_init_opcode_table): Avoid compiler warning
about calling memset with a zero length.
2009-02-18 17:13:04 +00:00
872989673f
gas/
...
* config/tc-m68k.c (mcf51qe_ctrl): Add CPUCR.
(mcf52259_ctrl, mcf52277_ctrl, mcf53017_ctrl): New.
(mcf5307_ctrl): Add VBR.
(no_mac): New variable.
(m68k_extensions): Refer to no_mac mask.
(m68k_cpus): Add 51, 51ac, 51cn, 51em, 51jm, 52274, 52277,
52252..52259, 53011..53017.
(m68k_ip): Process CPUCR.
(init_table): Add cpucr entry.
(m68k_set_extension): Allow negated mask to refer to a variable.
(md_show_usage): Use '%s' to silence fprintf warning.
* config/m68k-parse.h (CPUCR): New control register.
gas/testsuite/
* m68k/br-isac.d, m68k/br-isac.s: Add stldsr test.
opcodes/
* m68k-opc.c (m68k_opcodes): Add stldsr instruction.
2009-02-12 08:31:03 +00:00
80890a619b
gas/testsuite/
...
* gas/ppc/booke.s ("dcbt", "dcbtst"): New tests.
* gas/ppc/booke.d: Likewise.
* gas/ppc/power4_32.s: Likewise.
* gas/ppc/power4_32.d: Likewise.
opcodes/
* ppc-opc.c: Update copyright year.
(powerpc_opcodes) <"dcbt", "dcbtst">: Deprecate the Embedded operand
ordering for POWER4 and later and use the correct Server ordering.
2009-02-06 01:50:54 +00:00
ce2f5b3ce7
gas/
...
2009-02-04 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (January, 2009)
* config/tc-i386.c (CPU_FLAGS_PCLMUL_MATCH): New.
(CPU_FLAGS_AVX_MATCH): Updated.
(CPU_FLAGS_32BIT_MATCH): Likewise.
(cpu_flags_match): Likewise.
gas/testsuite/
2009-02-04 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (January, 2009)
* gas/i386/arch-avx-1-3.l: New.
* gas/i386/arch-avx-1-3.s: Likewise.
* gas/i386/arch-avx-1-4.l: Likewise.
* gas/i386/arch-avx-1-4.s: Likewise.
* gas/i386/arch-avx-1-5.l: Likewise.
* gas/i386/arch-avx-1-5.s: Likewise.
* gas/i386/arch-avx-1-6.l: Likewise.
* gas/i386/arch-avx-1-6.s: Likewise.
* gas/i386/arch-10.s: Add vpclmul instructions.
* gas/i386/arch-avx-1.s: Likewise.
* gas/i386/avx.s: Likewise.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/x86-64-avx.s: Likewise.
* gas/i386/sse2avx.s: Add pclmul instructions.
* gas/i386/x86-64-sse2avx.s: Likewise.
* gas/i386/arch-10.d: Updated.
* gas/i386/arch-10-1.l: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/arch-avx-1.d: Likewise.
* gas/i386/arch-avx-1-1.l: Likewise.
* gas/i386/arch-avx-1-2.l: Likewise.
* gas/i386/avx.d: Likewise.
* gas/i386/avx-intel.d: Likewise.
* gas/i386/sse2avx.d: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
* gas/i386/x86-64-avx.d: Likewise.
* gas/i386/x86-64-avx-intel.d: Likewise.
* gas/i386/x86-64-sse2avx.d: Likewise.
* gas/i386/i386.exp: Run arch-avx-1-3, arch-avx-1-4,
arch-avx-1-5 and arch-avx-1-6.
opcodes/
2009-02-04 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (January, 2009)
* i386-dis.c (PREFIX_VEX_3A44): New.
(VEX_LEN_3A44_P_2): Likewise.
(PREFIX_VEX_3A48): Updated.
(VEX_LEN_3A4C_P_2): Likewise.
(prefix_table): Add PREFIX_VEX_3A44.
(vex_table): Likewise.
(vex_len_table): Add VEX_LEN_3A44_P_2.
* i386-opc.tbl: Add PCLMUL + AVX instructions.
* i386-tbl.h: Regenerated.
2009-02-04 16:03:31 +00:00
52b6b6b972
bfd:
...
2009-02-03 Sandip Matte <sandip@rmicorp.com>
* aoutx.h (NAME (aout, machine_type)): Handle bfd_mach_mips_xlr.
* archures.c (bfd_mach_mips_xlr): Define.
* bfd-in2.h: Regenerate.
* cpu-mips.c (I_xlr): Define.
(arch_info_struct): Add XLR entry.
* elfxx-mips.c (_bfd_elf_mips_mach): Handle E_MIPS_MACH_XLR.
(mips_set_isa_flags): Handle bfd_mach_mips_xlr
(mips_mach_extensions): Add XLR entry.
binutils:
2009-02-03 Sandip Matte <sandip@rmicorp.com>
* readelf.c (get_machine_flags): Handle E_MIPS_MACH_XLR.
gas:
2009-02-03 Sandip Matte <sandip@rmicorp.com>
* config/tc-mips.c (macro): Handle M_MSGSND, M_MSGLD, M_MSGLD_T,
M_MSGWAIT and M_MSGWAIT_T.
(mips_cpu_info_table): Add XLR entry.
* doc/c-mips.texi (-march): Document xlr.
gas/testsuite:
2009-02-03 Sandip Matte <sandip@rmicorp.com>
* gas/mips/mips.exp (xlr): New architecture.
(xlr-ext): Run test.
* gas/mips/xlr-ext.d, gas/mips/xlr-ext.s: New.
include/elf:
2009-02-03 Sandip Matte <sandip@rmicorp.com>
* mips.h (E_MIPS_MACH_XLR): Define.
include/opcode:
2009-02-03 Sandip Matte <sandip@rmicorp.com>
* mips.h (INSN_XLR): Define.
(INSN_CHIP_MASK): Update.
(CPU_XLR): Define.
(OPCODE_IS_MEMBER): Update.
(M_MSGSND, M_MSGLD, M_MSGLD_T, M_MSGWAIT, M_MSGWAIT_T): Define.
opcodes:
2009-02-03 Sandip Matte <sandip@rmicorp.com>
* mips-dis.c (mips_cp0_names_xlr, mips_cp0sel_names_xlr): Define.
(mips_arch_choices): Add XLR entry.
* mips-opc.c (XLR): Define.
(mips_builtin_opcodes): Add XLR instructions.
2009-02-03 18:16:04 +00:00
31dd3154f4
bfd:
...
2009-02-03 Carlos O'Donell <carlos@codesourcery.com>
* configure.in: AC_SUBST pdfdir.
* Makefile.am: Add install-pdf, install-pdf-am
and install-pdf-recursive targets. Define pdfdir.
* doc/Makefile.am: Define pdf__strip_dir. Add
install-pdf and install-pdf-am targets.
* po/Make-in: Add install-pdf target.
* configure: Regenerate.
* Makefile.in: Regenerate
* doc/Makefile.in: Regenerate.
binutils:
2009-02-03 Carlos O'Donell <carlos@codesourcery.com>
* configure.in: AC_SUBST pdfdir.
* Makefile.am: Add install-pdf, install-pdf-am,
and install-pdf-recursive targets.
* doc/Makefile.am: Define pdf__strip_dir. Add
install-pdf and install-pdf-am targets.
* po/Make-in: Add install-pdf target.
* configure: Regenerate.
* Makefile.in: Regenerate.
* doc/Makefile.in: Regenerate.
etc:
2009-02-03 Carlos O'Donell <carlos@codesourcery.com>
* configure.in: AC_SUBST pdfdir.
* configure: Regenerate.
gas:
2009-02-03 Carlos O'Donell <carlos@codesourcery.com>
* configure.in: AC_SUBST pdfdir.
* Makefile.am: Add install-pdf, install-pdf-am,
and install-pdf-recursive targets.
* doc/Makefile.am: Define pdf__strip_dir. Add
install-pdf and install-pdf-am targets.
* po/Make-in: Add install-pdf target.
* configure: Regenerate.
* Makefile.in: Regenerate.
* doc/Makefile.in: Regenerate.
gprof:
2009-02-03 Carlos O'Donell <carlos@codesourcery.com>
* configure.in: AC_SUBST pdfdir.
* Makefile.am: Add install-pdf, install-pdf-am,
and install-pdf-recursive targets. Define pdf__strip_dir.
* po/Make-in: Add install-pdf target.
* configure: Regenerate.
* Makefile.in: Regenerate.
ld:
2009-02-03 Carlos O'Donell <carlos@codesourcery.com>
* configure.in: AC_SUBST pdfdir.
* Makefile.am: Add install-pdf, install-pdf-am,
and install-pdf-recursive targets. Define pdf__strip_dir.
* po/Make-in: Add install-pdf target.
* configure: Regenerate.
* Makefile.in: Regenerate.
opcodes:
2009-02-03 Carlos O'Donell <carlos@codesourcery.com>
* Makefile.am: Add install-pdf target.
* po/Make-in: Add install-pdf target.
* Makefile.in: Regenerate.
2009-02-03 15:54:05 +00:00
c1a0a41faa
* elf32-mep.c (config_names): Regenerate configuration.
...
* mep-asm.c: Regenerate.
* mep-desc.c: Regenerate.
* mep-desc.h: Regenerate.
* mep-dis.c: Regenerate.
* mep-ibld.c: Regenerate.
* mep-opc.c: Regenerate.
* mep-opc.h: Regenerate.
2009-02-03 02:15:57 +00:00
087b80de6e
gas:
...
2009-01-29 Mark Mitchell <mark@codesourcery.com>
* config/tc-arm.c (insns): Correct encoding of qadd, qdadd, qsub,
qdsub in Thumb-2 mode.
gas/testsuite:
2009-01-29 Mark Mitchell <mark@codesourcery.com>
* gas/arm/thumb32.s (qadd): Add qadd, qdadd, qsub, and qdsub.
* gas/arm/thumb32.d: Likewise.
opcodes:
2009-01-29 Mark Mitchell <mark@codesourcery.com>
* arm-dis.c (thumb32_opcodes): Correct decoding for qadd, qdadd,
qsub, and qdsub.
2009-01-29 11:48:34 +00:00
159073e6aa
* mips-opc.c (suxc1): Add the flag of FP_D.
2009-01-28 08:45:47 +00:00
6f3b91a621
Regenerate for copyright date update.
2009-01-20 07:22:30 +00:00
29670fb929
bfd/
...
* Makefile.am (libbfd_la_LIBADD, libbfd_la_LDFLAGS): Substitute
SHARED_LIBADD and SHARED_LDFLAGS rather than WIN32LIBADD, WIN32LDFLAGS.
* configure.in (commonbfdlib): Delete.
(SHARED_LDFLAGS): Rename from WIN32LDFLAGS/
(SHARED_LIBADD): Rename from WIN32LIBADD. Add pic libiberty if such
is available, not just for linux.
* po/SRC-POTFILES.in: Regenerate.
* Makefile.in: Regenerate.
* configure: Regenerate.
opcodes/
* configure.in (commonbfdlib): Delete.
(SHARED_LIBADD): Add pic libiberty if such is available.
* configure: Regenerate.
* po/POTFILES.in: Regenerate.
binutils/
* configure.in (commonbfdlib): Delete.
* configure: Regenerate.
gas/
* configure.in (commonbfdlib): Delete.
* configure: Regenerate.
* po/POTFILES.in: Regenerate.
2009-01-16 08:02:29 +00:00
21169fcfad
opcodes/
...
* ppc-dis.c (print_insn_powerpc): Skip insn if it is deprecated.
* ppc-opc.c (powerpc_opcodes) <mtfsf, mtfsf.>: Deprecate the two
operand form and enable the four operand form for POWER6 and later.
<mtfsfi, mtfsfi.>: Deprecate the two operand form and enable the
three operand form for POWER6 and later.
gas/testsuite/
* gas/ppc/power6.s ("mtfsf", "mtfsf.", "mtfsfi", "mtfsfi."): Add tests.
* gas/ppc/power6.d: Likewise.
2009-01-15 04:27:28 +00:00
4ca47a519d
2009-01-14 Mike Frysinger <vapier@gentoo.org>
...
* bfin-dis.c (OUTS): Use "%s" as format string.
2009-01-14 19:35:12 +00:00
8acd537727
2009-01-13 H.J. Lu <hongjiu.lu@intel.com>
...
* i386-gen.c (cpu_flag_init): Remove a white space.
(operand_type_init): Likewise.
2009-01-14 00:42:07 +00:00
c1ec187589
gas/testsuite/
...
2009-01-12 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/sse-noavx.s: Add tests for lfence, mfence and movnti.
* gas/i386/x86-64-sse-noavx.s: Likewise.
* gas/i386/sse-noavx.d: Updated.
* gas/i386/x86-64-sse-noavx.d: Likewise.
opcodes/
2009-01-12 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.tbl: Add NoAVX to movnti, lfence and mfence.
* i386-tbl.h: Regenerated.
2009-01-13 00:00:35 +00:00
c7532693f2
gas/testsuite/
...
2009-01-12 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/opts.s: Add tests for add, adc, and, cmp, or, sbb,
sub and xor.
* gas/i386/x86-64-opts.s: Likewise.
* gas/i386/opts.d: Updated.
* gas/i386/opts-intel.d: Likewise.
* gas/i386/x86-64-opts.d: Likewise.
* gas/i386/x86-64-opts-intel.d: Likewise.
opcodes/
2009-01-12 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (dis386): Use EbS on addB, orB, adcB, sbbB, andB,
subB, xorB and cmpB. Use EvS on addS, orS, adcS, sbbS, andS,
subS, xorS and cmpS.
2009-01-12 16:04:11 +00:00
bd5295b282
gas/
...
2009-01-10 H.J. Lu <hongjiu.lu@intel.com>
* gas/config/tc-i386.c (cpu_arch): Add corei7, .clflush and
.syscall.
(i386_align_code): Handle PROCESSOR_COREI7.
(md_show_usage): Add corei7, clflush and syscall.
(i386_target_format): Replace cpup4 with cpuclflush.
* gas/config/tc-i386.h (processor_type): Add PROCESSOR_COREI7.
* doc/c-i386.texi: Document corei7, clflush and syscall.
gas/testsuite/
2009-01-10 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/arch-10.s: Add clflush and syscall.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/arch-10.d: Updated.
* gas/i386/arch-10-1.l: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
opcodes/
2009-01-10 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (cpu_flag_init): Replace CpuP4 and CpuK6 with
CpuClflush and CpuSYSCALL, respectively. Remove CpuK8. Add
CPU_COREI7_FLAGS, CPU_CLFLUSH_FLAGS and CPU_SYSCALL_FLAGS.
(cpu_flags): Remove CpuP4, CpuK6 and CpuK8. Add CpuClflush
and CpuSYSCALL.
(lineno): Removed.
(set_bitfield): Take an argument, lineno. Don't report lineno
on error if it is -1.
(process_i386_cpu_flag): Take an argument, lineno.
(process_i386_opcode_modifier): Likewise.
(process_i386_operand_type): Likewise.
(output_i386_opcode): Likewise.
(opcode_hash_entry): Add lineno.
(process_i386_opcodes): Updated.
(process_i386_registers): Likewise.
(process_i386_initializers): Likewise.
* i386-opc.h (CpuP4): Removed.
(CpuK6): Likewise.
(CpuK8): Likewise.
(CpuClflush): New.
(CpuSYSCALL): Likewise.
(CpuMMX): Updated.
(i386_cpu_flags): Remove cpup4, cpuk6 and cpuk8. Add
cpuclflush and cpusyscall.
* i386-opc.tbl: Update movnti, clflush, lfence, mfence, pause,
syscall and sysret.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2009-01-10 17:25:52 +00:00
1b7f3fb0dd
gas/
...
2009-01-09 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (cpu_arch): Add .rdtscp.
(md_show_usage): Display rdtscp.
* doc/c-i386.texi: Document rdtscp.
gas/testsuite/
2009-01-09 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/arch-10.s: Add rdtscp.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/arch-10.d: Updated.
* gas/i386/arch-10-1.l: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
opcodes/
2009-01-09 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (cpu_flag_init): Add CpuRdtscp to CPU_K8_FLAGS
and CPU_AMDFAM10_FLAGS. Add CPU_RDTSCP_FLAGS.
(cpu_flags): Add CpuRdtscp.
(set_bitfield): Remove CpuSledgehammer check.
* i386-opc.h (CpuRdtscp): New.
(CpuLM): Updated.
(i386_cpu_flags): Add cpurdtscp.
* i386-opc.tbl: Replace CpuSledgehammer with CpuRdtscp.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2009-01-09 20:32:32 +00:00
1cb0a76746
gas/
...
* config/tc-ppc.c (ppc_setup_opcodes): Remove PPC_OPCODE_NOPOWER4 test.
Test the new "deprecated" opcode field.
include/opcode/
* ppc.h (struct powerpc_opcode): New field "deprecated".
(PPC_OPCODE_NOPOWER4): Delete.
opcodes/
* ppc-opc.c (PPCNONE): Define.
(NOPOWER4): Delete.
(powerpc_opcodes): Initialize the new "deprecated" field.
2009-01-09 18:50:58 +00:00
168e309712
gas/testsuite/
...
2009-01-06 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (December, 2008)
* gas/i386/avx.s: Add tests for 256bit vmovntdq, vmovntpd and
vmovntps.
* gas/i386/x86-64-avx.s: Likewise.
* gas/i386/avx.d: Updated.
* gas/i386/avx-intel.d: Likewise.
* gas/i386/x86-64-avx.d: Likewise.
* gas/i386/x86-64-avx-intel.d: Likewise.
opcodes/
2009-01-06 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (December, 2008)
* i386-dis.c (VEX_LEN_2B_M_0): Removed.
(VEX_LEN_E7_P_2_M_0): Likewise.
(VEX_LEN_2C_P_1): Updated.
(VEX_LEN_E8_P_2): Likewise.
(vex_len_table): Remove VEX_LEN_2B_M_0 and VEX_LEN_E7_P_2_M_0.
(mod_table): Likewise.
* i386-opc.tbl: Add 256bit vmovntdq, vmovntpd and vmovntps.
* i386-tbl.h: Regenerated.
2009-01-06 17:15:28 +00:00
22da050bbf
2009-01-05 H.J. Lu <hongjiu.lu@intel.com>
...
* i386-gen.c (process_copyright): Update for 2009.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2009-01-06 01:14:45 +00:00
0bfee64967
gas/
...
2009-01-05 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (December, 2008)
* config/tc-i386.c (build_modrm_byte): Remove 5 operand instruction
support. Don't swap REG and NDS for FMA.
gas/testsuite/
2009-01-05 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (December, 2008)
* gas/i386/arch-10.s: Replace vfmaddpd with vfmadd132pd.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/arch-10.d: Updated.
* gas/i386/arch-10-1.l: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/avx.d: Likewise.
* gas/i386/avx-intel.d: Likewise.
* gas/i386/inval-avx.l: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
* gas/i386/x86-64-avx.d: Likewise.
* gas/i386/x86-64-avx-intel.d: Likewise.
* gas/i386/x86-64-inval-avx.l: Likewise.
* gas/i386/avx.s: Remove vpermil2ps/vpermil2pd and FMA
instructions. Update tests.
* gas/i386/inval-avx.s: Likewise.
* gas/i386/x86-64-avx.s: Likewise.
* gas/i386/x86-64-inval-avx.s: Likewise.
* gas/i386/fma.d: New.
* gas/i386/fma.s: Likewise.
* gas/i386/fma-intel.d: Likewise.
* gas/i386/x86-64-fma.d: Likewise.
* gas/i386/x86-64-fma.s: Likewise.
* gas/i386/x86-64-fma-intel.d: Likewise.
* gas/i386/i386.exp: Run fma, fma-intel, x86-64-fma and
x86-64-fma-intel.
opcodes/
2009-01-05 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (December, 2008)
* i386-dis.c (OP_VEX_FMA): Removed.
(OP_EX_VexW): Likewise.
(OP_EX_VexImmW): Likewise.
(OP_XMM_VexW): Likewise.
(VEXI4_Fixup): Likewise.
(VPERMIL2_Fixup): Likewise.
(VexI4): Likewise.
(VexFMA): Likewise.
(Vex128FMA): Likewise.
(EXVexW): Likewise.
(EXdVexW): Likewise.
(EXqVexW): Likewise.
(EXVexImmW): Likewise.
(XMVexW): Likewise.
(VPERMIL2): Likewise.
(PREFIX_VEX_3A48...PREFIX_VEX_3A4A): Likewise.
(PREFIX_VEX_3A5C...PREFIX_VEX_3A5F): Likewise.
(PREFIX_VEX_3A68...PREFIX_VEX_3A6F): Likewise.
(PREFIX_VEX_3A78...PREFIX_VEX_3A7F): Likewise.
(VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2): Likewise.
(VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2): Likewise.
(get_vex_imm8): Likewise.
(OP_EX_VexReg): Likewise.
vpermil2_op): Likewise.
(EXVexWdq): New.
(vex_w_dq_mode): Likewise.
(PREFIX_VEX_3896...PREFIX_VEX_389F): Likewise.
(PREFIX_VEX_38A6...PREFIX_VEX_38AF): Likewise.
(PREFIX_VEX_38B6...PREFIX_VEX_38BF): Likewise.
(es_reg): Updated.
(PREFIX_VEX_38DB): Likewise.
(PREFIX_VEX_3A4A): Likewise.
(PREFIX_VEX_3A60): Likewise.
(PREFIX_VEX_3ADF): Likewise.
(VEX_LEN_3ADF_P_2): Likewise.
(prefix_table): Remove PREFIX_VEX_3A48...PREFIX_VEX_3A4A,
PREFIX_VEX_3A5C...PREFIX_VEX_3A5F,
PREFIX_VEX_3A68...PREFIX_VEX_3A6F and
PREFIX_VEX_3A78...PREFIX_VEX_3A7F. Add
PREFIX_VEX_3896...PREFIX_VEX_389F,
PREFIX_VEX_38A6...PREFIX_VEX_38AF and
PREFIX_VEX_38B6...PREFIX_VEX_38BF.
(vex_table): Likewise.
(vex_len_table): Remove VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2
and VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2.
(putop): Support "%XW".
(intel_operand_size): Handle vex_w_dq_mode.
* i386-opc.h (VexNDS): Add a comment for VEX NDS and VEX DDS.
* i386-opc.tbl: Remove vpermil2pd/vpermil2ps and old FMA
instructions. Add new FMA instructions.
* i386-tbl.h: Regenerated.
2009-01-06 01:03:27 +00:00
4ef2cf8be8
* or32-opc.c (or32_print_register, or32_print_immediate,
...
disassemble_insn): Don't rely on undefined sprintf behaviour.
* itbl-ops.c (itbl_disassemble): Don't rely on undefined sprintf
behaviour.
2009-01-02 14:21:54 +00:00
03a9f008a5
2008-12-30 Martin Schwidefsky <schwidefskyy@de.ibm.com>
...
* s390-opc.txt: Add ptff instruction.
2008-12-30 10:00:47 +00:00
dffece59b8
Fix the LM32 port entry timestamp for the time of its application.
2008-12-24 10:06:43 +00:00
828c0124d0
opcodes/
...
* Makefile.am (CFILES, ALL_MACHINES): Add LM32 source and object files.
* Makefile.in: Regenerate.
2008-12-24 09:58:03 +00:00
84e94c9023
Add LM32 port.
2008-12-23 19:10:25 +00:00
fa99fab222
gas/
...
2008-12-23 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (match_template): Changed to return
const template *. Handle i.swap_operand for 3 operands.
(build_vex_prefix): Take const template *. Swap operand for
2-byte VEX prefix if possible.
(md_assemble): Updated.
(build_modrm_byte): Handle RegMem bit for SSE2AVX.
gas/testsuite/
2008-12-23 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run x86-64-avx-swap and x86-64-avx-swap-intel.
* gas/i386/opts.s: Add tests for movsd, movss, vmovsd and
vmovss.
* gas/i386/x86-64-opts.s: Likewise.
* gas/i386/opts.d: Updated.
* gas/i386/opts-intel.d: Likewise.
* gas/i386/sse2avx-opts.d: Likewise.
* gas/i386/sse2avx-opts-intel.d: Likewise.
* gas/i386/x86-64-opts.d: Likewise.
* gas/i386/x86-64-opts-intel.d: Likewise.
* gas/i386/x86-64-sse2avx-opts.d: Likewise.
* gas/i386/x86-64-sse2avx-opts-intel.d: Likewise.
* gas/i386/x86-64-avx-swap.d: New.
* gas/i386/x86-64-avx-swap.s: Likewise.
* gas/i386/x86-64-avx-swap-intel.d: Likewise.
opcodes/
2008-12-23 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (EXdS): New.
(EXdVexS): Likewise.
(EXqVexS): Likewise.
(d_swap_mode): Likewise.
(q_mode): Updated.
(prefix_table): Use EXdS on movss and EXqS on movsd.
(vex_len_table): Use EXdVexS on vmovss and EXqVexS on vmovsd.
(intel_operand_size): Handle d_swap_mode.
(OP_EX): Likewise.
* i386-opc.h (S): Update comments.
* i386-opc.tbl: Add S to movss, movsd, vmovss and vmovsd.
* i386-tbl.h: Regenerated.
2008-12-23 15:14:15 +00:00
b06f3b1b03
* po/ga.po: Updated Irish translation.
2008-12-23 09:54:26 +00:00
22e8c8e0c1
Add missing ChangeLog entries for my last commit.
2008-12-21 12:45:53 +00:00
b6169b206a
gas/
...
2008-12-20 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (_i386_insn): Add swap_operand.
(parse_insn): Handle ".s".
(match_template): Handle swap_operand.
* doc/c-i386.texi: Document .s suffix.
gas/testsuite/
2008-12-20 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run opts, opts-intel, sse2avx-opts,
sse2avx-opts-intel, x86-64-opts, x86-64-opts-intel,
x86-64-sse2avx-opts and x86-64-sse2avx-opts-intel.
* gas/i386/opts.d: New.
* gas/i386/opts-intel.d: Likewise.
* gas/i386/opts.s: Likewise.
* gas/i386/sse2avx-opts.d: Likewise.
* gas/i386/sse2avx-opts-intel.d: Likewise.
* gas/i386/x86-64-opts.d: Likewise.
* gas/i386/x86-64-opts-intel.d: Likewise.
* gas/i386/x86-64-opts.s: Likewise.
* gas/i386/x86-64-sse2avx-opts.d: Likewise.
* gas/i386/x86-64-sse2avx-opts-intel.d: Likewise.
opcodes/
2008-12-20 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (EbS): New.
(EvS): Likewise.
(EMS): Likewise.
(EXqS): Likewise.
(EXxS): Likewise.
(b_swap_mode): Likewise.
(v_swap_mode): Likewise.
(q_swap_mode): Likewise.
(x_swap_mode): Likewise.
(v_mode): Updated.
(w_mode): Likewise.
(t_mode): Likewise.
(xmm_mode): Likewise.
(swap_operand): Likewise.
(dis386): Use EbS on movB. Use EvS on moveS.
(dis386_twobyte): Use EXxS on movapX.
(prefix_table): Use EXxS on movups, movupd, movdqu, movdqa,
vmovups, vmovdqu, vmovdqa. Use EMS and EXqS on movq.
(vex_table): Use EXxS on vmovapX.
(vex_len_table): Use EXqS on vmovq.
(intel_operand_size): Handle b_swap_mode, v_swap_mode,
q_swap_mode and x_swap_mode.
(OP_E_register): Handle b_swap_mode and v_swap_mode.
(OP_EM): Handle v_swap_mode.
(OP_EX): x_swap_mode and q_swap_mode.
* i386-gen.c (opcode_modifiers): Add S.
* i386-opc.h (S): New.
(Modrm): Updated.
(i386_opcode_modifier): Add s.
* i386-opc.tbl: Add S to movapd, movaps, movdqa, movdqu, movq,
movupd, movups, vmovapd, vmovaps, vmovdqa, vmovdqu and vmovq.
* i386-tbl.h: Regenerated.
2008-12-20 17:40:51 +00:00
ea397f5b07
gas/testsuite/
...
2008-12-18 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/intel.d: Remove trailing white spaces after nop.
* gas/i386/intelpic.d: Likewise.
* gas/i386/nops16-1.d: Likewise.
* gas/i386/nops-1-i686.d: Likewise.
* gas/i386/nops-3.d: Likewise.
* gas/i386/nops-3-i386.d: Likewise.
* gas/i386/nops-3-i686.d: Likewise.
* gas/i386/nops-4.d: Likewise.
* gas/i386/nops-4-i386.d: Likewise.
* gas/i386/nops-4-i686.d: Likewise.
* gas/i386/opcode.d: Likewise.
* gas/i386/opcode-suffix.d: Likewise.
* gas/i386/reloc.d: Likewise.
* gas/i386/tlsnopic.d: Likewise.
* gas/i386/x86-64-nops-1.d: Likewise.
* gas/i386/x86-64-nops-1-nocona.d: Likewise.
* gas/i386/x86-64-nops-2.d: Likewise.
* gas/i386/x86-64-nops-3.d: Likewise.
* gas/i386/x86-64-nops-4-core2.d: Likewise.
* gas/i386/x86-64-nops-4.d: Likewise.
* gas/i386/x86-64-nops-4-k8.d: Likewise.
* gas/i386/x86-64-opcode.d: Likewise.
ld/testsuite/
2008-12-18 H.J. Lu <hongjiu.lu@intel.com>
* ld-i386/tlsld1.dd: Remove trailing white spaces after nop.
opcodes/
2008-12-18 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (mnemonicendp): New.
(op): Likewise.
(print_insn): Use mnemonicendp.
(OP_3DNowSuffix): Likewise.
(CMP_Fixup): Likewise.
(CMPXCHG8B_Fixup): Likewise.
(CRC32_Fixup): Likewise.
(OP_DREX_FCMP): Likewise.
(OP_DREX_ICMP): Likewise.
(VZERO_Fixup): Likewise.
(VCMP_Fixup): Likewise.
(PCLMUL_Fixup): Likewise.
(VPERMIL2_Fixup): Likewise.
(MOVBE_Fixup): Likewise.
(putop): Update mnemonicendp.
(oappend): Use stpcpy.
(simd_cmp_op): Changed to struct op.
(vex_cmp_op): Likewise.
(pclmul_op): Likewise.
(vpermil2_op): Likewise.
2008-12-18 22:47:32 +00:00
3914465446
Backport link test fix from upstream Libtool:
...
* libltdl.m4 (_LT_SYS_DYNAMIC_LINKER, _LT_LINKER_SHLIBS):
Add cache variables to tests that require the linker to work.
For shlibpath_overrides_runpath, this also changes the semantics
to let the result from the C compiler take precedence.
compiler take precedence.
binutils/
* configure: Regenerate.
opcodes/
* configure: Regenerate.
bfd/
* configure: Regenerate.
gas/
* configure: Regenerate.
gprof/
* configure: Regenerate.
ld/
* configure: Regenerate.
2008-12-18 21:36:47 +00:00
7df76b802e
opcodes:
...
* arm-dis.c (coprocessor_opcodes): Disassemble VFP instructions using
unified syntax.
gas/testsuite:
* gas/arm/group-reloc-ldc.d: Disassembly of VFP instructions now uses
unified syntax.
* gas/arm/vfp-non-overlap.d: Likewise.
* gas/arm/vfp-neon-syntax.d: Likewise.
* gas/arm/vfp-neon-syntax_t2.d: Likewise.
* gas/arm/vfp1.d: Likewise.
* gas/arm/vfp1_t2.d: Likewise.
* gas/arm/vfp1xD.d: Likewise.
* gas/arm/vfp1xD_t2.d: Likewise.
* gas/arm/vfp2.d: Likewise.
* gas/arm/vfp2_t2.d: Likewise.
* gas/arm/vfpv3-32drs.d: Likewise.
* gas/arm/vfpv3-const-conv.d: Likewise.
ld/testsuite:
* ld-arm/vfp11-fix-scalar.d: Disassembly of VFP instructions now uses
unified syntax.
* ld-arm/vfp11-fix-vector.d: Likewise.
2008-12-15 17:24:13 +00:00
035475035d
2008-12-08 H.J. Lu <hongjiu.lu@intel.com>
...
* i386-gen.c (opcode_modifiers): Move VexNDS before VexNDD.
2008-12-08 18:07:26 +00:00
efa7dee728
2008-12-08 H.J. Lu <hongjiu.lu@intel.com>
...
* i386-dis.c (putop): Remove strayed comments.
2008-12-08 17:43:06 +00:00
2f3bb96af7
opcodes/
...
* ppc-dis.c (powerpc_init_dialect): Do not set PPC_OPCODE_BOOKE
for -Mbooke.
(print_ppc_disassembler_options): Update usage.
* ppc-opc.c (DE, DES, DEO, DE_MASK): Remove.
(BOOKE64): Remove.
(PPCCHLK64): Likewise.
(powerpc_opcodes): Remove all BOOKE64 instructions.
gas/
* config/tc-ppc.c (parse_cpu): Remove booke64 support. Update
usage strings.
(ppc_setup_opcodes): Likewise, remove booke64 support.
* doc/c-ppc.texi (PowerPC-Opts): Remove -mbooke32 and -mbooke64.
* doc/as.texinfo (Overview): Likewise.
binutils/
* doc/binutils.texi (objdump): Update booke documentation.
* NEWS: Document user-visible changes to command line options.
2008-12-04 10:29:16 +00:00
3aa3176b2d
* aoutx.h (NAME): Add case statements for bfd_mach_mips14000,
...
bfd_mach_mips16000.
* archures.c (bfd_architecture): Add .#defines for bfd_mach_mips14000,
bfd_mach_mips16000.
* bfd-in2.h: Regenerate.
* cpu-mips.c: Add enums I_mips14000, I_mips16000.
(arch_info_struct): Add refs to R14000, R16000.
* elfxx-mips.c (mips_set_isa_flags): Handle bfd_mach_mips14000,
bfd_mach_mips16000.
(mips_mach_extensions): Map R14000, R16000 to R10000.
* config/tc-mips.c (hilo_interlocks): Handle CPU_R14000, CPU_R16000.
(mips_cpu_info_table): Add r14000, r16000.
* doc/c-mips.texi: Add entries for 14000, 16000.
* mips-dis.c (mips_arch_choices): Add r14000, r16000.
* mips.h: Define CPU_R14000, CPU_R16000.
(OPCODE_IS_MEMBER): Include R14000, R16000 in test.
2008-11-28 18:02:17 +00:00
59b098c970
* cr16-dis.c (match_opcode): Truncate mcode to 32 bit and
...
adjusted the mask for 32-bit branch instruction.
2008-11-27 11:30:33 +00:00
e1c93c699b
* ppc-opc.c (extract_sprg): Correct operand range check.
2008-11-27 10:47:23 +00:00
3c6528a8d8
Fix typo.
2008-11-26 10:49:06 +00:00
9f7678f6ca
(NEXTBYTE, NEXTWORD, NEXTLONG, NEXTULONG, NEXTSINGLE)
...
(NEXTDOUBLE, NEXTEXTEND, NEXTPACKED): Fix error handling.
(save_printer, save_print_address): Remove.
(fetch_data): Don't use them.
(match_insn_m68k): Always restore printing functions.
(print_insn_m68k): Don't save/restore printing functions.
2008-11-26 10:43:18 +00:00
62443ade10
* m68k-dis.c: Rewrite to remove use of setjmp/longjmp.
2008-11-25 10:33:06 +00:00
8e79c3df51
Add support for ARM half-precision conversion instructions.
2008-11-18 15:45:05 +00:00
d387240a63
bfd/
...
2008-11-14 Tristan Gingold <gingold@adacore.com>
* configure.com: Handle bfd_default_target_size, BFD_HOST_LONG_LONG,
BFD_HOST_64BIT_LONG_LONG, BFD_HOSTPTR_T, bfd_file_ptr.
Generate bfdver.h.
* vms-hdr.c (_bfd_vms_write_hdr): Use strdup/free instead of alloca.
* hosts/alphavms.h: Defines macros to bypass i18n.
* makefile.vms (OBJS): Update file list.
(DEFS): Remove VMS_DEBUG, const, add DEBUGDIR.
(CFLAGS): Update flags.
* bfdio.c (real_fopen): Add code specific to VMS: extract attributes
from modes.
binutils/
2008-11-14 Tristan Gingold <gingold@adacore.com>
* configure.com: Get version from configure.in of bfd.
* makefile.vms-in (DEBUG_OBJS): Add dwarf.obj.
(CFLAGS): Update flags.
include/
2008-11-14 Tristan Gingold <gingold@adacore.com>
* fopen-vms.h (FOPEN_RB): Use a single string to match the
standard prototype.
(FOPEN_WB): Ditto.
(FOPEN_AB): Ditto.
(FOPEN_RUB): Ditto.
(FOPEN_WUB): Ditto.
(FOPEN_AUB): Ditto.
libiberty/
2008-11-14 Tristan Gingold <gingold@adacore.com>
* makefile.vms (OBJS): Update objects list.
(CFLAGS): Update.
(libiberty.olb): Remove alloca-conf.h dependency.
* config.h-vms: Use new macro sets, use builtin alloca.
opcodes/
2008-11-14 Tristan Gingold <gingold@adacore.com>
* makefile.vms (OBJS): Update list of objects.
(DEFS): Update
(CFLAGS): Update.
2008-11-14 09:57:35 +00:00
4dc48ef654
2008-11-06 Chao-ying Fu <fu@mips.com>
...
* mips-opc.c (synciobdma, syncs, syncw, syncws): Move these
before sync.
(sync): New instruction with 5-bit sync type.
* mips-dis.c (print_insn_args: Add case '1' to print 5-bit values.
2008-11-06 19:40:10 +00:00
c8941035c5
* avr-dis.c: Replace uses of sprintf without a format string with
...
calls to strcpy.
2008-11-06 12:03:24 +00:00
a7bea99dc6
gas/testsuite/
...
2008-11-03 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/intel.s: Add tests for cmovpe and cmovpo.
* gas/i386/opcode.s: Likewise.
* gas/i386/intel.d: Updated.
* gas/i386/opcode.d: Likewise.
* gas/i386/opcode-intel.d: Likewise.
* gas/i386/opcode-suffix.d: Likewise.
opcodes/
2008-11-03 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.tbl: Add cmovpe and cmovpo.
* i386-tbl.h: Regenerated.
2008-11-03 19:38:09 +00:00
4267b19fc7
PR 6937
...
* configure.in (SHARED_LIBADD): Revert previous change.
Add a comment explaining why.
(SHARED_DEPENDENCIES): Revert previous change.
* configure: Regenerate.
2008-10-22 14:45:34 +00:00
8a9629d090
PR 6937
...
* configure.in (SHARED_LIBADD): Add libiberty.a.
(SHARED_DEPENDENCIES): Add libiberty.a.
2008-10-10 11:35:36 +00:00
c587b3f982
2008-09-30 H.J. Lu <hongjiu.lu@intel.com>
...
* i386-gen.c: Include "hashtab.h".
(next_field): Take a new argument, last. Check last.
(process_i386_cpu_flag): Updated.
(process_i386_opcode_modifier): Likewise.
(process_i386_operand_type): Likewise.
(process_i386_registers): Likewise.
(output_i386_opcode): New.
(opcode_hash_entry): Likewise.
(opcode_hash_table): Likewise.
(opcode_hash_hash): Likewise.
(opcode_hash_eq): Likewise.
(process_i386_opcodes): Use opcode hash table and opcode array.
2008-09-30 19:47:14 +00:00
34b23dab7e
2008-09-30 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
...
* s390-opc.txt (stdy, stey): Fix description
2008-09-30 08:49:54 +00:00
782e11fd41
run "make dep-am"
2008-09-30 07:49:32 +00:00
1927a18f31
2008-09-29 H.J. Lu <hongjiu.lu@intel.com>
...
* aclocal.m4: Regenerated.
* configure: Likewise.
* Makefile.in: Likewise.
2008-09-29 16:54:07 +00:00
afac680a76
* po/vi.po: Updated Vietnamese translation.
...
* po/fr.po: Updated French translation.
2008-09-29 09:48:31 +00:00
b40d5eb9ef
2008-09-26 Florian Krohm <fkrohm@us.ibm.com>
...
* s390-opc.txt (thder, thdr): Change RRE_RR to RRE_FF.
(cfxr, cfdr, cfer, clclu): Add esa flag.
(sqd): Instruction added.
(qadtr, qaxtr): Change RRF_FFFU to RRF_FUFF.
* s390-opc.c: (INSTR_RRF_FFFU, MASK_RRF_FFFU): Removed.
2008-09-26 Andreas Krebbel <krebbel1@de.ibm.com>
* gas/s390/esa-g5.d: Adjust according to the s390-opc changes.
* gas/s390/esa-g5.s: Likewise.
* gas/s390/esa-z990.d: Likewise.
* gas/s390/esa-z990.s: Likewise.
* gas/s390/zarch-z900.d: Likewise.
* gas/s390/zarch-z900.s: Likewise.
* gas/s390/zarch-z990.d: Likewise.
* gas/s390/zarch-z990.s: Likewise.
2008-09-26 13:44:33 +00:00
d04117369b
Fix bugs in the disassembly of some ld-instructions
2008-09-14 08:38:02 +00:00
3e12678445
gas/testsuite/
...
2008-09-11 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/sse2avx.s: Remove pclmulXXX tests. Add tests for
Intel syntax.
* gas/i386/x86-64-sse2avx.s: Likewise.
* gas/i386/sse2avx.d: Updated.
* gas/i386/x86-64-sse2avx.d: Likewise.
opcodes/
2008-09-11 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.tbl: Fix memory operand size for cmpXXXs[sd].
* i386-tbl.h: Regenerated.
2008-09-11 23:15:59 +00:00
ddab3d5917
gas/testsuite/
...
2008-08-28 Jan Beulich <jbeulich@novell.com>
* gas/i386/intel.s: Add retf.
* gas/i386/intel.{d,e}: Adjust.
* gas/i386/opcode-intel.d: Replace lret with retf.
opcodes/
2008-08-28 Jan Beulich <jbeulich@novell.com>
* i386-dis.c (dis386): Adjust far return mnemonics.
* i386-opc.tbl: Add retf.
* i386-tbl.h: Re-generate.
2008-08-28 15:59:32 +00:00
b19d538532
gas/testsuite/
...
2008-08-28 Jan Beulich <jbeulich@novell.com>
* gas/i386/gas/i386/opcode-suffix.d: Add suffixes to cmovXX.
opcodes/
2008-08-28 Jan Beulich <jbeulich@novell.com>
* i386-dis.c (dis386_twobyte): Adjust cmovXX mnemonics.
2008-08-28 15:30:30 +00:00
1ca35711f4
gas/
...
2008-08-28 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-ia64.c (CR_IIB0): New.
(CR_IIB1): Likewise.
(cr): Add cr.iib0 and cr.iib1.
(specify_resource): Handle IA64_RS_CR_IIB and CR_IIB0/CR_IIB1.
gas/testsuite/
2008-08-28 H.J. Lu <hongjiu.lu@intel.com>
* gas/ia64/dv-raw-err.s: Add tests for cr.iib0 and cr.iib1.
* gas/ia64/dv-waw-err.s: Likewise.
* gas/ia64/regs.s: Likewise.
* gas/ia64/dv-raw-err.l: Updated.
* gas/ia64/dv-waw-err.l: Likewise.
* gas/ia64/regs.d: Likewise.
include/opcode/
2008-08-28 H.J. Lu <hongjiu.lu@intel.com>
* ia64.h (ia64_resource_specifier): Add IA64_RS_CR_IIB. Update
IA64_RS_CR.
opcodes/
2008-08-28 H.J. Lu <hongjiu.lu@intel.com>
* ia64-dis.c (print_insn_ia64): Handle cr.iib0 and cr.iib1.
* ia64-gen.c (lookup_specifier): Likewise.
* ia64-ic.tbl: Add support for cr.iib0 and cr.iib1.
* ia64-raw.tbl: Likewise.
* ia64-waw.tbl: Likewise.
* ia64-asmtab.c: Regenerated.
2008-08-28 14:07:50 +00:00
515c56e780
gas/testsuite/
...
2008-08-27 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/intel.s: Add tests for fidivr.
* gas/i386/intel.d: Updated.
opcodes/
2008-08-27 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.tbl: Correct fidivr operand size.
* i386-tbl.h: Regenerated.
2008-08-27 17:53:42 +00:00
da594c4a29
Update a number of obsolete autoconf macros.
2008-08-24 03:13:05 +00:00
a5ff0eb22b
gas/
...
2008-08-20 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (August, 2008)
* config/tc-i386.c (CPU_FLAGS_AES_MATCH): New.
(CPU_FLAGS_AVX_MATCH): Likewise.
(CPU_FLAGS_32BIT_MATCH): Updated.
(cpu_flags_match): Likewise.
gas/testsuite/
2008-08-20 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (August, 2008)
* gas/i386/avx.s: Add AES + AVX tests.
* gas/i386/arch-10.s: Likewise.
* gas/i386/sse2avx.s: Likewise.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/x86-64-avx.s: Likewise.
* gas/i386/x86-64-sse2avx.s: Likewise.
* gas/i386/arch-10.d: Updated.
* gas/i386/arch-10-1.l: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/avx.d: Likewise.
* gas/i386/avx-intel.d: Likewise.
* gas/i386/sse2avx.d: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
* gas/i386/x86-64-avx.d: Likewise.
* gas/i386/x86-64-avx-intel.d: Likewise.
* gas/i386/x86-64-sse2avx.d: Likewise.
* gas/i386/i386.exp: Run arch-avx-1, arch-avx-1-1 and
arch-avx-1-2.
* gas/i386/arch-avx-1.d: New.
* gas/i386/arch-avx-1.s: Likewise.
* gas/i386/arch-avx-1-1.l: Likewise.
* gas/i386/arch-avx-1-1.s: Likewise.
* gas/i386/arch-avx-1-2.l: Likewise.
* gas/i386/arch-avx-1-2.s: Likewise.
opcodes/
2008-08-20 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (August, 2008)
* i386-dis.c (PREFIX_VEX_38DB): New.
(PREFIX_VEX_38DC): Likewise.
(PREFIX_VEX_38DD): Likewise.
(PREFIX_VEX_38DE): Likewise.
(PREFIX_VEX_38DF): Likewise.
(PREFIX_VEX_3ADF): Likewise.
(VEX_LEN_38DB_P_2): Likewise.
(VEX_LEN_38DC_P_2): Likewise.
(VEX_LEN_38DD_P_2): Likewise.
(VEX_LEN_38DE_P_2): Likewise.
(VEX_LEN_38DF_P_2): Likewise.
(VEX_LEN_3ADF_P_2): Likewise.
(PREFIX_VEX_3A04): Updated.
(VEX_LEN_3A06_P_2): Likewise.
(prefix_table): Add PREFIX_VEX_38DB, PREFIX_VEX_38DC,
PREFIX_VEX_38DD, PREFIX_VEX_38DE and PREFIX_VEX_3ADF.
(x86_64_table): Likewise.
(vex_len_table): Add VEX_LEN_38DB_P_2, VEX_LEN_38DC_P_2,
VEX_LEN_38DD_P_2, VEX_LEN_38DE_P_2, VEX_LEN_38DF_P_2 and
VEX_LEN_3ADF_P_2.
* i386-opc.tbl: Add AES + AVX instructions.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-08-20 18:38:40 +00:00
7dc6076f0c
2008-08-15 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
...
* s390-opc.c (INSTR_RRF_FFRU, MASK_RRF_FFRU): New instruction format.
* s390-opc.txt (lxr, rrdtr, rrxtr): Fix instruction format.
2008-08-15 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* gas/s390/esa-g5.d: lxr operands are floating point.
* gas/s390/esa-g5.s: Likewise.
* gas/testsuite/gas/s390/zarch-z9-ec.d: rrdtr, rrxtr third
operands is gpr.
* gas/testsuite/gas/s390/zarch-z9-ec.s: Likewise.
2008-08-15 12:10:21 +00:00
7357c5b6a6
PR 6526
...
* configure.in: Invoke AC_USE_SYSTEM_EXTENSIONS.
2008-08-15 08:31:52 +00:00
899d85bead
PR 6825
...
* ppc-opc.c (powerpc_opcodes): Enable rfci, mfpmr, mtpmr for e300.
2008-08-14 13:56:00 +00:00
dfb0759252
gas/testsuite/
...
2008-08-12 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/amd.s: Add syscall and sysret. Remove padding.
* gas/i386/amd.d: Updated.
* gas/i386/x86-64-opcode.d: Likewise.
* gas/i386/i386.exp: Run x86-64-intel64.
* gas/i386/x86-64-intel64.d: New.
* gas/i386/x86-64-intel64.s: Likewise.
* gas/i386/x86-64-opcode.s: Add syscall and sysret.
opcodes/
2008-08-12 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.tbl: Add syscall and sysret for Cpu64.
* i386-tbl.h: Regenerated.
2008-08-12 21:44:56 +00:00
323ee3f41c
Set LC_ALL=C rather than unsetting LC_COLLATE for sort.
2008-08-04 06:55:33 +00:00
9b4e57660d
gas/
...
* config/tc-ppc.c (parse_cpu): Rename altivec_or_spe to retain_flags.
Handle -mvsx and -mpower7.
(md_show_usage): Document -mpower7 and -mvsx.
* doc/as.texinfo (Target PowerPC): Document -mvsx.
* doc/c-ppc.texi (PowerPC-Opts): Document -mvsx and -mpower7.
gas/testsuite/
* gas/ppc/power7.d: New.
* gas/ppc/power7.s: Likewise.
* gas/ppc/ppc.exp: Run power7 test.
include/opcode/
* ppc.h (PPC_OPCODE_VSX, PPC_OPERAND_VSR): New.
opcodes/
* ppc-dis.c (powerpc_init_dialect): Handle power7 and vsx options.
(print_insn_powerpc): Prepend 'vs' when printing VSX registers.
(print_ppc_disassembler_options): Document -Mpower7 and -Mvsx.
* ppc-opc.c (insert_xt6): New static function.
(extract_xt6): Likewise.
(insert_xa6): Likewise.
(extract_xa6: Likewise.
(insert_xb6): Likewise.
(extract_xb6): Likewise.
(insert_xb6s): Likewise.
(extract_xb6s): Likewise.
(XS6, XT6, XA6, XB6, XB6S, DM, XX3, XX3DM, XX1_MASK, XX3_MASK,
XX3DM_MASK, PPCVSX): New.
(powerpc_opcodes): Add opcodes "lxvd2x", "lxvd2ux", "stxvd2x",
"stxvd2ux", "xxmrghd", "xxmrgld", "xxpermdi", "xvmovdp", "xvcpsgndp".
2008-08-02 04:38:51 +00:00
20fd6e2eb1
Missed ChangeLog entry for last change.
...
* Makefile.am ($(srcdir)/ia64-asmtab.c): Remove line continuation.
* Makefile.in: Regenerate.
2008-08-01 16:53:56 +00:00
e316cf6e3e
* Makefile.am ($(srcdir)/ia64-asmtab.c): Remove line continuation.
...
* Makefile.in: Regenerate.
2008-08-01 14:35:06 +00:00
a656ed5bea
binutils/
...
2008-08-01 H.J. Lu <hongjiu.lu@intel.com>
* dwarf.c (dwarf_regnames_i386): Remove AVX registers.
(dwarf_regnames_x86_64): Likewise.
gas/testsuite/
2008-08-01 H.J. Lu <hongjiu.lu@intel.com>
* gas/cfi/cfi-i386.s: Remove tests for AVX register maps.
* gas/cfi/cfi-x86_64.s: Likewise.
* gas/cfi/cfi-i386.d: Updated.
* gas/cfi/cfi-x86_64.d: Likewise.
opcodes/
2008-08-01 H.J. Lu <hongjiu.lu@intel.com>
* i386-reg.tbl: Use Dw2Inval on AVX registers.
* i386-tbl.h: Regenerated.
2008-08-01 14:21:30 +00:00
081ba1b3c0
include/opcode/
...
* ppc.h (PPC_OPCODE_405): Define.
(PPC_OPERAND_FSL, PPC_OPERAND_FCR, PPC_OPERAND_UDI): Define.
gas/
* config/tc-ppc.c (parse_cpu): Separate handling of -m403/405.
(md_show_usage): Likewise.
opcodes/
* ppc-dis.c (print_insn_powerpc): Disassemble FSL/FCR/UDI fields.
* ppc-opc.c (powerpc_operands): Add Xilinx APU related operands.
(insert_sprg, PPC405): Use PPC_OPCODE_405.
(powerpc_opcodes): Add Xilinx APU related opcodes.
2008-07-30 06:29:22 +00:00
0af1713e7c
Silence gcc printf warnings
2008-07-30 04:34:58 +00:00
30c0909079
include/elf/
...
* mips.h (ELF_ST_IS_MIPS16, ELF_ST_SET_MIPS16): New macros.
bfd/
* elfxx-mips.c (mips_elf_check_mips16_stubs): Use ELF_ST_IS_MIPS16.
(mips_elf_calculate_relocation): Likewise.
(_bfd_mips_elf_add_symbol_hook): Likewise.
(_bfd_mips_elf_finish_dynamic_symbol): Likewise.
(_bfd_mips_vxworks_finish_dynamic_symbol): Likewise.
opcodes/
* mips-dis.c (_print_insn_mips): Use ELF_ST_IS_MIPS16.
gas/
* config/tc-mips.c (mips16_mark_labels): Use ELF_ST_SET_MIPS16.
(mips_fix_adjustable): Likewise.
(mips_frob_file_after_relocs): Likewise.
gas/testsuite/
* gas/mips/mips16-vis-1.d, gas/mips/mips16-vis-1.s: New tests.
* gas/mips/mips.exp: Run them.
2008-07-10 19:05:29 +00:00
c27e721e3e
* mips-opc.c (CP): New macro.
...
(mips_builtin_opcodes): Mark c0, c2 and c3 as CP. Add Octeon to the
membership of di, dmfc0, dmtc0, ei, mfc0 and mtc0. Add dmfc2 and
dmtc2 Octeon instructions.
2008-07-07 19:11:15 +00:00
bd2e25575c
2008-07-07 Stan Shebs <stan@codesourcery.com>
...
* dis-init.c (init_disassemble_info): Init endian_code field.
* arm-dis.c (print_insn): Disassemble code according to
setting of endian_code.
(print_insn_big_arm): Detect when BE8 extension flag has been set.
2008-07-07 18:35:24 +00:00
6ba2a41553
bfd/
...
* syms.c (BSF_SYNTHETIC): New flag.
* elf.c (_bfd_elf_get_synthetic_symtab): Set it.
* elf32-ppc.c (ppc_elf_get_synthetic_symtab): Likewise.
* elf64-ppc.c (ppc64_elf_get_synthetic_symtab): Likewise.
* bfd-in.h (bfd_asymbol_flavour): Return bfd_target_unknown_flavour
for synthetic symbols.
* bfd-in2.h: Regenerate.
opcodes/
* mips-dis.c (_print_insn_mips): Use bfd_asymbol_flavour to check
for ELF symbols.
2008-06-30 20:51:58 +00:00
c8187e1509
gas/
...
* config/tc-ppc.c (parse_cpu): Handle -m464.
(md_show_usage): Likewise.
opcodes/
* ppc-dis.c (powerpc_init_dialect): Handle -M464.
(print_ppc_disassembler_options): Likewise.
* ppc-opc.c (PPC464): Define.
(powerpc_opcodes): Add mfdcrux and mtdcrux.
2008-06-25 16:49:03 +00:00
7a283e077b
* configure: Regenerate.
...
config/
* override.m4: Use m4_version_prereq throughout.
(_AC_ARG_VAR_VALIDATE, AC_MSG_FAILURE): Backport from git
Autoconf: output pwd along with fatal errors, so the right
config.log file is hinted at more prominently.
(PARSE_ARGS): Push setting of ac_pwd in this diversion.
(_GCC_AUTOCONF_VERSION): New, define to 2.59 if not defined.
(_GCC_AUTOCONF_VERSION_CHECK): New macro, require use of Autoconf
version _GCC_AUTOCONF_VERSION throughout the tree.
(m4_wrap): New override, fix for Posix semantics of m4wrap.
binutils/
* configure: Regenerate.
opcodes/
* configure: Regenerate.
bfd/
* configure: Regenerate.
gas/
* configure: Regenerate.
gprof/
* configure: Regenerate.
ld/
* config.in: Regenerate.
* configure: Regenerate.
2008-06-17 23:14:44 +00:00
fa452fa683
include/opcode/
...
* ppc.h (ppc_cpu_t): New typedef.
(struct powerpc_opcode <flags>): Use it.
(struct powerpc_operand <insert, extract>): Likewise.
(struct powerpc_macro <flags>): Likewise.
gas/
* config/tc-ppc.c (ppc_cpu): Use ppc_cpu_t typedef.
(ppc_insert_operand): Likewise.
(ppc_machine): Likewise.
* config/tc-ppc.h: #include "opcode/ppc.h"
(struct _ppc_fix_extra <ppc_cpu>): Use ppc_cpu_t typedef.
(ppc_cpu): Update extern decl.
opcodes/
* ppc-dis.c (print_insn_powerpc): Update prototye to use new
ppc_cpu_t typedef.
(struct dis_private): New.
(POWERPC_DIALECT): New define.
(powerpc_dialect): Renamed to...
(powerpc_init_dialect): This. Update to use ppc_cpu_t and
struct dis_private.
(print_insn_big_powerpc): Update for using structure in
info->private_data.
(print_insn_little_powerpc): Likewise.
(operand_value_powerpc): Change type of dialect param to ppc_cpu_t.
(skip_optional_operands): Likewise.
(print_insn_powerpc): Likewise. Remove initialization of dialect.
* ppc-opc.c (extract_bat, extract_bba, extract_bdm, extract_bdp,
extract_bo, extract_boe, extract_fxm, extract_mb6, extract_mbe,
extract_nb, extract_nsi, extract_rbs, extract_sh6, extract_spr,
extract_sprg, extract_tbr insert_bat, insert_bba, insert_bdm,
insert_bdp, insert_bo, insert_boe, insert_fxm, insert_mb6, insert_mbe,
insert_nsi, insert_ral, insert_ram, insert_raq, insert_ras, insert_rbs,
insert_sh6, insert_spr, insert_sprg, insert_tbr): Change the dialect
param to be of type ppc_cpu_t. Update prototype.
2008-06-13 20:16:00 +00:00
dd3cbb7ef7
* mips.h: Document new field descriptors +Q.
...
(OP_SH_SEQI, OP_MASK_SEQI): New bit mask and shift count for SEQI.
opcodes/
* mips-dis.c (print_insn_args): Handle field descriptor +Q.
* mips-opc.c (mips_builtin_opcodes): Add Octeon instructions seq,
seqi, sne and snei.
gas/
* config/tc-mips.c (validate_mips_insn): Handle field descriptor +Q.
(mips_ip): Likewise.
(macro_build): Likewise.
(CPU_HAS_SEQ): New macro.
(macro2) <M_SEQ_I, M_SNE_I>: Use it. Emit seq/sne and seqi/snei.
gas/testsuite/
* gas/mips/octeon.s, gas/mips/octeon.d: Add tests for seq* and sne*.
* gas/mips/octeon-ill.s, gas/mips/octeon-ill.s: Add tests for seqi
and snei.
2008-06-12 21:44:54 +00:00
bb35fb24c1
include/opcode/
...
* mips.h: Document new field descriptors +x, +X, +p, +P, +s, +S.
Update comment before MIPS16 field descriptors to mention MIPS16.
(OP_SH_BBITIND, OP_MASK_BBITIND): New bit mask and shift count for
BBIT.
(OP_SH_CINSPOS, OP_MASK_CINSPOS, OP_SH_CINSLM1, OP_MASK_CINSLM1):
New bit masks and shift counts for cins and exts.
gas/
* config/tc-mips.c (validate_mips_insn): Handle field descriptors
+x, +X, +p, +P, +s, +S.
(mips_ip): Likewise.
opcodes/
* mips-dis.c (print_insn_args): Handle field descriptors +x, +p,
+s, +S.
* mips-opc.c (mips_builtin_opcodes): Add Octeon instructions
baddu, bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs,
syncw, syncws, vm3mulu, vm0 and vmulu.
gas/testsuite/
* gas/mips/octeon.s, gas/mips/octeon.d: Add tests for baddu,
bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs, syncw,
syncws, vm3mulu, vm0 and vmulu.
* gas/mips/octeon-ill.s, gas/mips/octeon-ill.s: New test.
* gas/mips/mips.exp: Run it. Run octeon test with
run_dump_test_arches.
2008-06-12 16:14:52 +00:00
a5dabbb023
gas/testsuite/
...
2008-05-30 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/x86-64-avx.s: Add tests for vmovd on 64bit operands.
* gas/i386/x86-64-sse2avx.s: Add tests for movd on 64bit
operands.
* gas/testsuite/gas/i386/x86-64-avx.d: Updated.
* gas/testsuite/gas/i386/x86-64-avx-intel.d: Likewise.
* gas/testsuite/gas/i386/x86-64-sse2avx.d: Likewise.
opcodes/
2008-05-30 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.tbl: Add vmovd with 64bit operand.
* i386-tbl.h: Regenerated.
2008-05-30 19:49:18 +00:00
H.J. Lu
Alan Modra
Peter Bergner
M R Swami Reddy
Nick Clifton
Michael Eager
Ben Elliston
Andreas Krebbel
DJ Delorie
Andreas Schwab
Tristan Gingold
Jie Zhang
Dave Korn
Ralf Wildenhues
Jan Beulich
Doug Kwan
Dwarakanath Rajagopal
Martin Schwidefsky
Maciej W. Rozycki
Doug Evans
Anthony Green
Christophe Lyon
Joseph Myers
Richard Earnshaw
Adam Nemet
Nathan Sidwell
Mike Frysinger
Jan Kratochvil
Thiemo Seufer
Catherine Moore
Chao-ying Fu
Arnold Metselaar
Pedro Alves
Richard Sandiford
Stan Shebs