7ab9ffdd43
2009-06-29 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c: Reformat.
2009-06-29 17:44:37 +00:00
9c2799c243
* gas/app, gas/as.c, gas/as.h, gas/atof-generic.c, gas/cgen.c,
...
gas/config/atof-ieee.c, gas/config/obj-aout.c,
gas/config/obj-coff.c, gas/config/obj-ecoff.c,
gas/config/obj-elf.c, gas/config/obj-som.c, gas/config/tc-alpha.c,
gas/config/tc-arc.c, gas/config/tc-arm.c, gas/config/tc-cr16.c,
gas/config/tc-cris.c, gas/config/tc-crx.c, gas/config/tc-d30v.c,
gas/config/tc-dlx.c, gas/config/tc-hppa.c, gas/config/tc-i370.c,
gas/config/tc-i386-intel.c, gas/config/tc-i386.c,
gas/config/tc-i860.c, gas/config/tc-i960.c, gas/config/tc-ia64.c,
gas/config/tc-iq2000.c, gas/config/tc-m32c.c,
gas/config/tc-m32r.c, gas/config/tc-m68hc11.c,
gas/config/tc-m68k.c, gas/config/tc-maxq.c, gas/config/tc-mcore.c,
gas/config/tc-mep.c, gas/config/tc-mips.c, gas/config/tc-mmix.c,
gas/config/tc-mn10300.c, gas/config/tc-moxie.c,
gas/config/tc-ns32k.c, gas/config/tc-pj.c, gas/config/tc-ppc.c,
gas/config/tc-s390.c, gas/config/tc-score.c,
gas/config/tc-score7.c, gas/config/tc-sh.c, gas/config/tc-sparc.c,
gas/config/tc-spu.c, gas/config/tc-tic30.c, gas/config/tc-vax.c,
gas/config/tc-xtensa.c, gas/config/xtensa-relax.c,
gas/dw2gencfi.c, gas/dwarf2dbg.c, gas/ehopt.c, gas/expr.c,
gas/frags.c, gas/input-file.c, gas/read.c, gas/sb.c,
gas/subsegs.c, gas/symbols.c, gas/write.c: Change the name of the
gas macro `assert' to `gas_assert'.
2009-06-22 17:56:02 +00:00
c25bc9fc0d
bfd/
...
2009-06-13 H.J. Lu <hongjiu.lu@intel.com>
PR ld/10269
* elf32-i386.c: Include "objalloc.h" and "hashtab.h".
(elf_i386_link_hash_table): Add loc_hash_table and
loc_hash_memory.
(elf_i386_local_hash): New.
(elf_i386_local_htab_hash): Likewise.
(elf_i386_local_htab_eq): Likewise.
(elf_i386_get_local_sym_hash): Likewise.
(elf_i386_link_hash_table_free): Likewise.
(elf_i386_allocate_local_dynrelocs): Likewise.
(elf_i386_finish_local_dynamic_symbol): Likewise.
(bfd_elf64_bfd_link_hash_table_free): Likewise.
(elf_i386_link_hash_table_create): Create loc_hash_table and
loc_hash_memory.
(elf_i386_check_relocs): Handle local STT_GNU_IFUNC symbols.
(elf_i386_size_dynamic_sections): Likewise.
(elf_i386_relocate_section): Likewise.
(elf_i386_finish_dynamic_sections): Likewise.
(elf_i386_finish_dynamic_symbol): Check _DYNAMIC only if sym
isn't NULL.
* elf64-x86-64.c: Include "objalloc.h" and "hashtab.h".
(elf64_x86_64_link_hash_table): Add loc_hash_table and
loc_hash_memory.
(elf64_x86_64_local_hash): New.
(elf64_x86_64_local_htab_hash): Likewise.
(elf64_x86_64_local_htab_eq): Likewise.
(elf64_x86_64_get_local_sym_hash): Likewise.
(elf64_x86_64_link_hash_table_free): Likewise.
(elf64_x86_64_allocate_local_dynrelocs): Likewise.
(elf64_x86_64_finish_local_dynamic_symbol): Likewise.
(bfd_elf64_bfd_link_hash_table_free): Likewise.
(elf64_x86_64_link_hash_table_create): Create loc_hash_table
and loc_hash_memory.
(elf64_x86_64_check_relocs): Handle local STT_GNU_IFUNC
symbols.
(elf64_x86_64_size_dynamic_sections): Likewise.
(elf64_x86_64_relocate_section): Likewise.
(elf64_x86_64_finish_dynamic_sections): Likewise.
(elf64_x86_64_finish_dynamic_symbol): Check _DYNAMIC only if
sym isn't NULL.
gas/
2009-06-13 H.J. Lu <hongjiu.lu@intel.com>
PR ld/10269
* config/tc-i386.c (md_apply_fix): Use TC_FORCE_RELOCATION
instead of generic_force_reloc.
* config/tc-i386.h (TC_FORCE_RELOCATION): New.
ld/testsuite/
2009-06-13 H.J. Lu <hongjiu.lu@intel.com>
PR ld/10269
*: ld-ifunc/ifunc-1-local-x86.d: New.
*: ld-ifunc/ifunc-1-local-x86.s: Likewise.
*: ld-ifunc/ifunc-2-local-i386.d: Likewise.
*: ld-ifunc/ifunc-2-local-i386.s: Likewise.
*: ld-ifunc/ifunc-2-local-x86-64.d: Likewise.
*: ld-ifunc/ifunc-2-local-x86-64.s: Likewise.
*: ld-ifunc/ifunc-4-local-x86.d: Likewise.
*: ld-ifunc/ifunc-4-local-x86.s: Likewise.
*: ld-ifunc/ifunc-5-local-i386.s: Likewise.
*: ld-ifunc/ifunc-5-local-x86-64.s: Likewise.
*: ld-ifunc/ifunc-5a-local-i386.d: Likewise.
*: ld-ifunc/ifunc-5a-local-x86-64.d: Likewise.
*: ld-ifunc/ifunc-5b-local-i386.d: Likewise.
*: ld-ifunc/ifunc-5b-local-x86-64.d: Likewise.
2009-06-14 01:39:46 +00:00
fbeb56a4a5
PR gas/977
...
* config/tc-i386.c (md_estimate_size_before_relax): Don't relax
branches to weak symbols.
(md_apply_fix): Don't convert fixes against weak symbols to
section-relative offsets, but save addend for later reloc emission.
(tc_gen_reloc): When emitting reloc against weak symbol, adjust
addend to pre-compensate for bfd_install_relocation.
2009-06-08 16:06:24 +00:00
c1e679ec0a
<gas changes>
...
2009-05-22 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
* config/tc-i386.c (process_drex): Delete. Remove SSE5 support.
(build_modrm_byte): Remove DREX handling support.
(DREX_*): Delete.
(drex_byte): Delete.
(md_assemble): Remove DREX handling support.
(process_operands): Remove DREX, SSE5 support.
(i386_insn): Remove DREX.
<gas/testsuite changes>
2009-05-22 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
* gas/i386/i386.exp: Remove SSE5 tests.
* gas/i386/x86-64-sse5.s: Delete. Remove SSE5 tests.
* gas/i386/x86-64-sse5.d: Ditto.
* gas/i386/arch-10-1.l: Remove SSE5 tests.
* gas/i386/arch-10-2.l: Ditto.
* gas/i386/arch-10-3.l: Ditto.
* gas/i386/arch-10-4.l: Ditto.
* gas/i386/arch-10.d: Ditto.
* gas/i386/arch-10.s: Ditto.
* gas/i386/arch-4.s: Delete. Remove SSE5 tests.
* gas/i386/arch-4.d: Ditto.
* gas/i386/arch-8.s: Ditto.
* gas/i386/arch-8.d: Ditto.
* gas/i386/arch-2.s: Remove SSE5 tests.
* gas/i386/arch-2.d: Remove SSE5 tests.
* gas/i386/x86-64-arch-2.s: Ditto.
<opcodes changes>
2009-05-22 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
* i386-opc.h (Cpusse5): Delete.
(i386_cpu_flags): Delete.
* i386-gen.c: Remove CpuSSE5, Drex, Drexv and Drexc.
* i386-opc.tbl: Remove SSE5 instructions.
* i386-tbl.h: Regenerate.
* i386-init.h: Regenerate.
* i386-dis.c (OP_E_memeory, OP_E_extended): Remove drex handling.
(print_drex_arg): Delete.
(OP_DREX4): Delete.
(OP_DREX3): Delete.
(OP_DREX_ICMP): Delete.
(OP_DREX_FCMP): Delete.
(DREX_*): Delete.
(THREE_BYTE_0F24, THREE_BYTE_0F25, THREE_BYTE_0f7B): Delete.
2009-05-22 15:57:25 +00:00
321098a5ad
2009-05-20 Kai Tietz <kai.tietz@onevision.com>
...
H.J. Lu <hongjiu.lu@intel.com>
* config/obj-coff.h: Include "coff/x86_64.h" for x86 pe-coff.
(TARGET_FORMAT): Removed for x86 pe-coff.
(COFF_TARGET_FORMAT): Likewise.
* config/tc-i386.c (md_longopts): Allow --64 for x86 pe-coff.
(md_parse_option): Likewise.
(md_show_usage): Show option --32/--64 for x86 pe-coff.
(i386_target_format): Use also for x86 pe-coff.
* config/tc-i386.h (TARGET_FORMAT): Defined as i386_target_format
for x86 pe-coff.
2009-05-20 13:48:16 +00:00
d8045f234d
include/elf
...
2009-04-30 Nick Clifton <nickc@redhat.com>
* common.h (STT_GNU_IFUNC): Define.
elfcpp
2009-04-30 Nick Clifton <nickc@redhat.com>
* (enum STT): Add STT_GNU_IFUNC.
gas
2009-04-30 Nick Clifton <nickc@redhat.com>
* config/obj-elf.c (obj_elf_type): Add support for a
gnu_indirect_function type.
* config/tc-i386.c (tc_i386_fix_adjustable): Do not adjust fixups
against indirect function symbols.
* doc/as.texinfo (.type): Document the support for the
gnu_indirect_function symbol type.
* NEWS: Mention the new feature.
gas/testsuite
2009-04-30 Nick Clifton <nickc@redhat.com>
* gas/elf/elf.exp: Extend type test to include an ifunc symbol.
Provide an alternative test for targets which do not support ifunc
symbols.
(type.s): Add entry for an ifunc symbol.
(type.e): Add ifunc entry to expected symbol dump.
(section2.e-armelf): Add entry for ifunc symbol.
(type-noifunc.s): New file.
(type-noifunc.e): New file.
bfd/
2009-04-30 Nick Clifton <nickc@redhat.com>
* elf-bfd.h (struct bfd_elf_section_data): Add indirect_relocs
section pointer.
(struct elf_obj_data): Add has_ifunc_symbols boolean.
* elf.c (swap_out_syms): Convert BSF_GNU_INDIRECT_FUNCTION flags
into a STT_GNU_IFUNC symbol type.
(_bfd_elf_is_function_type): Accept STT_GNU_IFUNC as a function
type.
(_bfd_elf_set_osabi): Set the osasbi field to ELFOSABI_LINUX if
the binary contains ifunc symbols.
* elfcode.h (elf_slurp_symbol_table): Translate the STT_GNU_IFUNC
symbol type into a BSF_GNU_INDIRECT_FUNCTION flag.
* elf32-i386.c (is_indirect_function): New function.
(elf_i386_check_relocs): Create an ifunc output section.
(allocate_dynrelocs): Create dynamic relocs in the ifunc output
section if necessary.
(elf_i386_relocate_section): Emit a reloc against an ifunc symbol
if necessary.
(elf_i386_add_symbol_hook): New function. Set the
has_ifunc_symbols field of the elf_obj_data structure if an ifunc
symbol is encountered.
(elf_backend_post_process_headers): Define.
(elf_backend_add_symbol_hook): Define.
(elf_i386_post_process_headers): Rename to
elf_i388_fbsd_post_process_headers.
* elf64-x86_64.c (IS_X86_64_PCREL_TYPE): New macro.
(is_indirect_function): New function.
(elf64_x86_64_check_relocs): Create an ifunc output section.
(allocate_dynrelocs): Create dynamic relocs in the ifunc output
section if necessary.
(elf64_x86_64_relocate_section): Emit a reloc against an ifunc
symbol if necessary.
(elf_i386_add_symbol_hook): Set the has_ifunc_symbols field of the
elf_obj_data structure if an ifunc symbol is encountered.
(elf_backend_post_process_headers): Define.
* elflink.c (_bfd_elf_adjust_dynamic_symbol): Always create a PLT
if we have ifunc symbols to handle.
(get_ifunc_reloc_section_name): New function. Computes the name
for an ifunc section.
(_bfd_elf_make_ifunc_reloc_section): New function. Creates a
section to hold ifunc relocs.
* syms.c (BSF_GNU_INDIRECT_FUNCTION): Define.
(bfd_print_symbol_vandf): Handle ifunc symbols.
(bfd_decode_symclass): Likewise.
* bfd-in2.h: Regenerate.
binutils
2009-04-30 Nick Clifton <nickc@redhat.com>
* readelf.c (dump_relocations): Display a relocation against an
ifunc symbol as if it were a function invocation.
(get_symbol_type): Handle STT_GNU_IFUNC.
ld
2009-04-30 Nick Clifton <nickc@redhat.com>
* NEWS: Mention support for IFUNC symbols.
ld/testsuite
2009-04-30 Nick Clifton <nickc@redhat.com>
* ld-ifunc: New directory.
* ld-ifunc/ifunc.exp: New file: Run the IFUNC tests.
* ld-ifunc/prog.c: New file.
* ld-ifunc/lib.c: New file.
2009-04-30 15:47:13 +00:00
ee86248cee
gas/
...
2009-04-20 Jan Beulich <jbeulich@novell.com>
* Makefile.am: Add explicit dependency of tc-i386.o on
tc-i386-intel.c.
* Makefile.in: Likewise.
* config/tc-i386.c (i386_finalize_immediate): Declare, broken
out from i386_immediate.
(i386_immediate): Slightly re-arrange, call
i386_finalize_immediate.
(i386_finalize_displacement): Declare, broken out from
i386_displacement.
(i386_displacement): Slightly re-arrange, call
i386_finalize_displacement.
(i386_intel_simplify, i386_intel_parse_name): Declare.
(this_operand): Initialize to -1.
(set_intel_syntax): Set expression rank for O_full_ptr.
(md_assemble): Set this_operand back to -1 after parsing
operands.
(x86_cons): Negate intel_syntax to indicate state. Call
i386_intel_simplify.
(md_operand): Convert if to switch. Handle '[' for Intel
syntax.
(i386_intel_operand): Delete, including all helper functions
and data.
* config/tc-i386-intel.c: New file, all new code.
* config/tc-i386.h (i386_operator): Declare.
(md_operator): Define to i386_operator.
(i386_need_index_operator): Declare.
(md_need_index_operator): Define to i386_need_index_operator.
(O_full_ptr): Define.
gas/testsuite/
2009-04-20 Jan Beulich <jbeulich@novell.com>
* gas/i386/equ.s: Adjust.
* gas/i386/equ.d: Remove reference to equ.e.
* gas/i386/equ.e: Delete.
* gas/i386/intel-expr.s: New.
* gas/i386/intel-expr.d: New.
* gas/i386/i386.exp: Run new test.
* gas/i386/intel.s: Adjust.
* gas/i386/intel.e: Remove no longer valid warning messages.
* gas/i386/intel16.s: Adjust.
* gas/i386/intel16.d: Remove reference to intel16.e.
* gas/i386/intel16.e: Delete.
* gas/i386/intelbad.s: Add more tests.
* gas/i386/intelbad.l: Adjust.
* gas/i386/intelok.s: Remove now unneeded equates. Add more
tests.
* gas/i386/intelok.d: Remove reference to intelok.e. Adjust.
* gas/i386/intelok.e: Delete.
* gas/i386/x86_64.s: Adjust.
* gas/i386/x86_64.d: Remove reference to x86_64.e.
* gas/i386/x86_64.e: Delete.
2009-04-20 06:31:50 +00:00
d8a1b51e44
gas/
...
2009-04-15 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (process_operands): Print operands in
correct order depending on intel_syntax.
gas/testsuite/
2009-04-15 Jan Beulich <jbeulich@novell.com>
* gas/i386/intel.e: Adjust expectations.
2009-04-15 13:33:03 +00:00
0cc9e1d385
PR 10005
...
* config/tc-i386.c (reloc): Don't abort on lack of required
reloc type.
2009-03-26 02:41:12 +00:00
41aacd835d
2009-03-25 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (parse_insn): Use default_arch on unsupported
arch.
2009-03-25 19:49:25 +00:00
784788d2f7
2009-02-25 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (fits_in_imm4): Removed.
2009-02-25 18:59:52 +00:00
0349dc08b2
2009-02-23 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (type_names): Add OPERAND_TYPE_REGYMM.
(pt): Replace UINTS_ALL_ZERO with operand_type_all_zero.
2009-02-23 23:05:21 +00:00
c1b80a2afc
2009-02-23 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (type_names): Remove OPERAND_TYPE_VEX_IMM4.
2009-02-23 22:28:45 +00:00
4c664d7bf7
gas/
...
2009-02-23 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (vex_imm4): Removed.
(VEX_check_operands): Likewise.
(match_template): Updated.
opcodes/
2009-02-23 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (operand_type_init): Remove OPERAND_TYPE_VEX_IMM4.
(operand_types): Remove Vex_Imm4.
* i386-opc.h (Vex_Imm4): Removed.
(OTMax): Updated.
(i386_operand_type): Remove vex_imm4.
* i386-opc.tbl: Remove Vex_Imm4 comments.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2009-02-23 20:41:46 +00:00
ce2f5b3ce7
gas/
...
2009-02-04 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (January, 2009)
* config/tc-i386.c (CPU_FLAGS_PCLMUL_MATCH): New.
(CPU_FLAGS_AVX_MATCH): Updated.
(CPU_FLAGS_32BIT_MATCH): Likewise.
(cpu_flags_match): Likewise.
gas/testsuite/
2009-02-04 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (January, 2009)
* gas/i386/arch-avx-1-3.l: New.
* gas/i386/arch-avx-1-3.s: Likewise.
* gas/i386/arch-avx-1-4.l: Likewise.
* gas/i386/arch-avx-1-4.s: Likewise.
* gas/i386/arch-avx-1-5.l: Likewise.
* gas/i386/arch-avx-1-5.s: Likewise.
* gas/i386/arch-avx-1-6.l: Likewise.
* gas/i386/arch-avx-1-6.s: Likewise.
* gas/i386/arch-10.s: Add vpclmul instructions.
* gas/i386/arch-avx-1.s: Likewise.
* gas/i386/avx.s: Likewise.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/x86-64-avx.s: Likewise.
* gas/i386/sse2avx.s: Add pclmul instructions.
* gas/i386/x86-64-sse2avx.s: Likewise.
* gas/i386/arch-10.d: Updated.
* gas/i386/arch-10-1.l: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/arch-avx-1.d: Likewise.
* gas/i386/arch-avx-1-1.l: Likewise.
* gas/i386/arch-avx-1-2.l: Likewise.
* gas/i386/avx.d: Likewise.
* gas/i386/avx-intel.d: Likewise.
* gas/i386/sse2avx.d: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
* gas/i386/x86-64-avx.d: Likewise.
* gas/i386/x86-64-avx-intel.d: Likewise.
* gas/i386/x86-64-sse2avx.d: Likewise.
* gas/i386/i386.exp: Run arch-avx-1-3, arch-avx-1-4,
arch-avx-1-5 and arch-avx-1-6.
opcodes/
2009-02-04 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (January, 2009)
* i386-dis.c (PREFIX_VEX_3A44): New.
(VEX_LEN_3A44_P_2): Likewise.
(PREFIX_VEX_3A48): Updated.
(VEX_LEN_3A4C_P_2): Likewise.
(prefix_table): Add PREFIX_VEX_3A44.
(vex_table): Likewise.
(vex_len_table): Add VEX_LEN_3A44_P_2.
* i386-opc.tbl: Add PCLMUL + AVX instructions.
* i386-tbl.h: Regenerated.
2009-02-04 16:03:31 +00:00
01e1a5bc12
* include/elf/ia64.h (SHT_IA_64_VMS_DISPLAY_NAME_INFO,
...
EF_IA_64_ARCHVER_1): New macros. Minor reformatting.
* bfd/Makefile.am (BFD32_BACKENDS): Add new object vmsutil.lo
(BFD32_BACKENDS_CFILES): Add new file vmsutil.c
(vmsutil.lo): Add dependency rule
* bfd/Makefile.in: Regenerate
* bfd/config.bfd (ia64*-*-*vms*): Add case.
* bfd/configure.in (bfd_elf64_ia64_vms_vec): Add case.
* bfd/configure: Regenerate
* bfd/vmsutil.[ch]: New files
* bfd/elf-bfd.h (struct bfd_elf_special_section): Change type of
attr to bfd_vma.
* bfd/elfxx-ia64.c (elfNN_vms_post_process_headers,
elfNN_vms_section_processing, elfNN_vms_final_write_processing,
elfNN_vms_close_and_cleanup, elfNN_vms_section_from_shdr,
elfNN_vms_object_p): New functions
* bfd/targets.c (bfd_elf64_ia64_vms_vec): New target.
* gas/configure.tgt(ia64-*-*vms*): New target.
* gas/dwarf2dbg.h (dwarf2_loc_mark_labels): Make extern.
* gas/tc.h (md_number_to_chars): Declare iff undefined.
* gas/config/obj-elf.c (obj_elf_change_section): Change type of
arg attr to bfd_vma.
(obj_elf_parse_section_letters): Return a bfd_vma. Change type of
variables attr, md_attr to bfd_vma.
(obj_elf_section_word): Likewise.
(obj_elf_section): Change type of variable attr to bfd_vma
* gas/config/obj-elf.h (obj_elf_change_section): Change type of
arg attr to bfd_vma
* gas/config/tc-ia64.c (bfdver.h,time.h): Include.
(ia64_elf_section_letter): Now returns a bfd_vma.
Handle VMS specific attributes.
(ia64_elf_section_flags): Arg attr now a bfd_vma.
(ia64_init): Don't turn on dependency checking for VMS.
(ia64_target_format): Check for VMS flag bit.
(do_alias): Hande decc$ functions.
(get_vms_time): New function.
(ia64_vms_note): New function.
* gas/config/tc-ia64.h (ia64_elf_section_letter): Now returns a bfd_vma.
(ia64_elf_section_flags): Arg attr now a bfd_vma.
(tc_init_after_args): Define for VMS.
* gas/config/tc-alpha.c (alpha_elf_section_letter): Return a bfd_vma.
(alpha_elf_section_flags): Change type of arg attr to bfd_vma.
* gas/config/tc-alpha.h: Likewise.
* gas/config/tc-i386.c (x86_64_section_letter): Return a bfd_vma.
(x86_64_section_word): Return a bfd_vma.
* gas/config/tc-i386.h: Likewise.
* gas/config/tc-ip2k.c (ip2k_elf_section_flags): Change type of arg
attr to bfd_vma.
* gas/config/tc-ip2k.h: Likewise.
* gas/config/tc-mep.c (mep_elf_section_letter): Return a bfd_vma.
(mep_elf_section_flags): Change type of arg attr to bfd_vma.
* gas/config/tc-mep.h: Likewise.
* gas/config/tc-ppc.c (ppc_section_letter): Return a bfd_vma.
(ppc_section_word): Return a bfd_vma.
(ppc_section_flags): Change type of arg attr to bfd_vma.
* gas/config/tc-ppc.h: Likewise.
* gas/config/te-vms.h (DWARF2_DIR_SHOULD_END_WITH_SEPARATOR,
DWAR2_FILE_TIME_NAME, DWARF2_FILE_SIZE_NAME, DWARF2_FILEN_NAME):
New file with new macros
* gas/dwarf2dbg.c (get_filenum, out_file_list): Default and call new
macros.
2009-01-15 12:42:52 +00:00
bd5295b282
gas/
...
2009-01-10 H.J. Lu <hongjiu.lu@intel.com>
* gas/config/tc-i386.c (cpu_arch): Add corei7, .clflush and
.syscall.
(i386_align_code): Handle PROCESSOR_COREI7.
(md_show_usage): Add corei7, clflush and syscall.
(i386_target_format): Replace cpup4 with cpuclflush.
* gas/config/tc-i386.h (processor_type): Add PROCESSOR_COREI7.
* doc/c-i386.texi: Document corei7, clflush and syscall.
gas/testsuite/
2009-01-10 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/arch-10.s: Add clflush and syscall.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/arch-10.d: Updated.
* gas/i386/arch-10-1.l: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
opcodes/
2009-01-10 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (cpu_flag_init): Replace CpuP4 and CpuK6 with
CpuClflush and CpuSYSCALL, respectively. Remove CpuK8. Add
CPU_COREI7_FLAGS, CPU_CLFLUSH_FLAGS and CPU_SYSCALL_FLAGS.
(cpu_flags): Remove CpuP4, CpuK6 and CpuK8. Add CpuClflush
and CpuSYSCALL.
(lineno): Removed.
(set_bitfield): Take an argument, lineno. Don't report lineno
on error if it is -1.
(process_i386_cpu_flag): Take an argument, lineno.
(process_i386_opcode_modifier): Likewise.
(process_i386_operand_type): Likewise.
(output_i386_opcode): Likewise.
(opcode_hash_entry): Add lineno.
(process_i386_opcodes): Updated.
(process_i386_registers): Likewise.
(process_i386_initializers): Likewise.
* i386-opc.h (CpuP4): Removed.
(CpuK6): Likewise.
(CpuK8): Likewise.
(CpuClflush): New.
(CpuSYSCALL): Likewise.
(CpuMMX): Updated.
(i386_cpu_flags): Remove cpup4, cpuk6 and cpuk8. Add
cpuclflush and cpusyscall.
* i386-opc.tbl: Update movnti, clflush, lfence, mfence, pause,
syscall and sysret.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2009-01-10 17:25:52 +00:00
1b7f3fb0dd
gas/
...
2009-01-09 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (cpu_arch): Add .rdtscp.
(md_show_usage): Display rdtscp.
* doc/c-i386.texi: Document rdtscp.
gas/testsuite/
2009-01-09 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/arch-10.s: Add rdtscp.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/arch-10.d: Updated.
* gas/i386/arch-10-1.l: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
opcodes/
2009-01-09 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (cpu_flag_init): Add CpuRdtscp to CPU_K8_FLAGS
and CPU_AMDFAM10_FLAGS. Add CPU_RDTSCP_FLAGS.
(cpu_flags): Add CpuRdtscp.
(set_bitfield): Remove CpuSledgehammer check.
* i386-opc.h (CpuRdtscp): New.
(CpuLM): Updated.
(i386_cpu_flags): Add cpurdtscp.
* i386-opc.tbl: Replace CpuSledgehammer with CpuRdtscp.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2009-01-09 20:32:32 +00:00
0bfee64967
gas/
...
2009-01-05 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (December, 2008)
* config/tc-i386.c (build_modrm_byte): Remove 5 operand instruction
support. Don't swap REG and NDS for FMA.
gas/testsuite/
2009-01-05 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (December, 2008)
* gas/i386/arch-10.s: Replace vfmaddpd with vfmadd132pd.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/arch-10.d: Updated.
* gas/i386/arch-10-1.l: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/avx.d: Likewise.
* gas/i386/avx-intel.d: Likewise.
* gas/i386/inval-avx.l: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
* gas/i386/x86-64-avx.d: Likewise.
* gas/i386/x86-64-avx-intel.d: Likewise.
* gas/i386/x86-64-inval-avx.l: Likewise.
* gas/i386/avx.s: Remove vpermil2ps/vpermil2pd and FMA
instructions. Update tests.
* gas/i386/inval-avx.s: Likewise.
* gas/i386/x86-64-avx.s: Likewise.
* gas/i386/x86-64-inval-avx.s: Likewise.
* gas/i386/fma.d: New.
* gas/i386/fma.s: Likewise.
* gas/i386/fma-intel.d: Likewise.
* gas/i386/x86-64-fma.d: Likewise.
* gas/i386/x86-64-fma.s: Likewise.
* gas/i386/x86-64-fma-intel.d: Likewise.
* gas/i386/i386.exp: Run fma, fma-intel, x86-64-fma and
x86-64-fma-intel.
opcodes/
2009-01-05 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (December, 2008)
* i386-dis.c (OP_VEX_FMA): Removed.
(OP_EX_VexW): Likewise.
(OP_EX_VexImmW): Likewise.
(OP_XMM_VexW): Likewise.
(VEXI4_Fixup): Likewise.
(VPERMIL2_Fixup): Likewise.
(VexI4): Likewise.
(VexFMA): Likewise.
(Vex128FMA): Likewise.
(EXVexW): Likewise.
(EXdVexW): Likewise.
(EXqVexW): Likewise.
(EXVexImmW): Likewise.
(XMVexW): Likewise.
(VPERMIL2): Likewise.
(PREFIX_VEX_3A48...PREFIX_VEX_3A4A): Likewise.
(PREFIX_VEX_3A5C...PREFIX_VEX_3A5F): Likewise.
(PREFIX_VEX_3A68...PREFIX_VEX_3A6F): Likewise.
(PREFIX_VEX_3A78...PREFIX_VEX_3A7F): Likewise.
(VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2): Likewise.
(VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2): Likewise.
(get_vex_imm8): Likewise.
(OP_EX_VexReg): Likewise.
vpermil2_op): Likewise.
(EXVexWdq): New.
(vex_w_dq_mode): Likewise.
(PREFIX_VEX_3896...PREFIX_VEX_389F): Likewise.
(PREFIX_VEX_38A6...PREFIX_VEX_38AF): Likewise.
(PREFIX_VEX_38B6...PREFIX_VEX_38BF): Likewise.
(es_reg): Updated.
(PREFIX_VEX_38DB): Likewise.
(PREFIX_VEX_3A4A): Likewise.
(PREFIX_VEX_3A60): Likewise.
(PREFIX_VEX_3ADF): Likewise.
(VEX_LEN_3ADF_P_2): Likewise.
(prefix_table): Remove PREFIX_VEX_3A48...PREFIX_VEX_3A4A,
PREFIX_VEX_3A5C...PREFIX_VEX_3A5F,
PREFIX_VEX_3A68...PREFIX_VEX_3A6F and
PREFIX_VEX_3A78...PREFIX_VEX_3A7F. Add
PREFIX_VEX_3896...PREFIX_VEX_389F,
PREFIX_VEX_38A6...PREFIX_VEX_38AF and
PREFIX_VEX_38B6...PREFIX_VEX_38BF.
(vex_table): Likewise.
(vex_len_table): Remove VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2
and VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2.
(putop): Support "%XW".
(intel_operand_size): Handle vex_w_dq_mode.
* i386-opc.h (VexNDS): Add a comment for VEX NDS and VEX DDS.
* i386-opc.tbl: Remove vpermil2pd/vpermil2ps and old FMA
instructions. Add new FMA instructions.
* i386-tbl.h: Regenerated.
2009-01-06 01:03:27 +00:00
fa99fab222
gas/
...
2008-12-23 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (match_template): Changed to return
const template *. Handle i.swap_operand for 3 operands.
(build_vex_prefix): Take const template *. Swap operand for
2-byte VEX prefix if possible.
(md_assemble): Updated.
(build_modrm_byte): Handle RegMem bit for SSE2AVX.
gas/testsuite/
2008-12-23 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run x86-64-avx-swap and x86-64-avx-swap-intel.
* gas/i386/opts.s: Add tests for movsd, movss, vmovsd and
vmovss.
* gas/i386/x86-64-opts.s: Likewise.
* gas/i386/opts.d: Updated.
* gas/i386/opts-intel.d: Likewise.
* gas/i386/sse2avx-opts.d: Likewise.
* gas/i386/sse2avx-opts-intel.d: Likewise.
* gas/i386/x86-64-opts.d: Likewise.
* gas/i386/x86-64-opts-intel.d: Likewise.
* gas/i386/x86-64-sse2avx-opts.d: Likewise.
* gas/i386/x86-64-sse2avx-opts-intel.d: Likewise.
* gas/i386/x86-64-avx-swap.d: New.
* gas/i386/x86-64-avx-swap.s: Likewise.
* gas/i386/x86-64-avx-swap-intel.d: Likewise.
opcodes/
2008-12-23 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (EXdS): New.
(EXdVexS): Likewise.
(EXqVexS): Likewise.
(d_swap_mode): Likewise.
(q_mode): Updated.
(prefix_table): Use EXdS on movss and EXqS on movsd.
(vex_len_table): Use EXdVexS on vmovss and EXqVexS on vmovsd.
(intel_operand_size): Handle d_swap_mode.
(OP_EX): Likewise.
* i386-opc.h (S): Update comments.
* i386-opc.tbl: Add S to movss, movsd, vmovss and vmovsd.
* i386-tbl.h: Regenerated.
2008-12-23 15:14:15 +00:00
30a55f88b1
2008-12-20 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (parse_insn): Optimize ".s" handling.
2008-12-20 18:20:16 +00:00
b6169b206a
gas/
...
2008-12-20 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (_i386_insn): Add swap_operand.
(parse_insn): Handle ".s".
(match_template): Handle swap_operand.
* doc/c-i386.texi: Document .s suffix.
gas/testsuite/
2008-12-20 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run opts, opts-intel, sse2avx-opts,
sse2avx-opts-intel, x86-64-opts, x86-64-opts-intel,
x86-64-sse2avx-opts and x86-64-sse2avx-opts-intel.
* gas/i386/opts.d: New.
* gas/i386/opts-intel.d: Likewise.
* gas/i386/opts.s: Likewise.
* gas/i386/sse2avx-opts.d: Likewise.
* gas/i386/sse2avx-opts-intel.d: Likewise.
* gas/i386/x86-64-opts.d: Likewise.
* gas/i386/x86-64-opts-intel.d: Likewise.
* gas/i386/x86-64-opts.s: Likewise.
* gas/i386/x86-64-sse2avx-opts.d: Likewise.
* gas/i386/x86-64-sse2avx-opts-intel.d: Likewise.
opcodes/
2008-12-20 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (EbS): New.
(EvS): Likewise.
(EMS): Likewise.
(EXqS): Likewise.
(EXxS): Likewise.
(b_swap_mode): Likewise.
(v_swap_mode): Likewise.
(q_swap_mode): Likewise.
(x_swap_mode): Likewise.
(v_mode): Updated.
(w_mode): Likewise.
(t_mode): Likewise.
(xmm_mode): Likewise.
(swap_operand): Likewise.
(dis386): Use EbS on movB. Use EvS on moveS.
(dis386_twobyte): Use EXxS on movapX.
(prefix_table): Use EXxS on movups, movupd, movdqu, movdqa,
vmovups, vmovdqu, vmovdqa. Use EMS and EXqS on movq.
(vex_table): Use EXxS on vmovapX.
(vex_len_table): Use EXqS on vmovq.
(intel_operand_size): Handle b_swap_mode, v_swap_mode,
q_swap_mode and x_swap_mode.
(OP_E_register): Handle b_swap_mode and v_swap_mode.
(OP_EM): Handle v_swap_mode.
(OP_EX): x_swap_mode and q_swap_mode.
* i386-gen.c (opcode_modifiers): Add S.
* i386-opc.h (S): New.
(Modrm): Updated.
(i386_opcode_modifier): Add s.
* i386-opc.tbl: Add S to movapd, movaps, movdqa, movdqu, movq,
movupd, movups, vmovapd, vmovaps, vmovdqa, vmovdqu and vmovq.
* i386-tbl.h: Regenerated.
2008-12-20 17:40:51 +00:00
9bb97f002b
2008-12-08 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (build_modrm_byte): Remove an extra blank
line.
2008-12-08 17:59:00 +00:00
b01ee69ddc
2008-11-29 Kai Tietz <kai.tietz@onevision.com>
...
* config/tc-i386.c (i386_target_format): For coff flavour in TE_PEP
use "pe-i386" for 32-bit.
2008-11-29 09:35:52 +00:00
fbf3f58457
gas/
...
2008-10-12 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (processor_type): Moved to tc-i386.h.
(cpu_arch_tune): Make it global.
(cpu_arch_isa): Likewise.
(cpu_arch_isa_flags): Likewise.
(i386_align_code): Check fragP->tc_frag_data.isa,
fragP->tc_frag_data.isa_flags and cpu_arch_tune instead of
cpu_arch_isa, cpu_arch_isa_flags and cpu_arch_tune,
respectively.
* config/tc-i386.h (processor_type): Moved from tc-i386.c.
(cpu_arch_tune): New.
(cpu_arch_isa): Likewise.
(cpu_arch_isa_flags): Likewise.
(i386_tc_frag_data): Likewise.
(TC_FRAG_TYPE): Likewise.
(TC_FRAG_INIT): Likewise.
gas/testsuite/
2008-10-12 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run nops-5, nops-5-i686, x86-64-nops-5 and
x86-64-nops-5-k8.
* gas/i386/nops-5.d: New.
* gas/i386/nops-5.s: Likewise.
* gas/i386/nops-5-i686.d: Likewise.
* gas/i386/x86-64-nops-5.d: Likewise.
* gas/i386/x86-64-nops-5-k8.d: Likewise.
2008-10-12 12:37:09 +00:00
ad5fec3b3a
* dw2gencfi.c (cfi_finish): Deal with md_fix_up_eh_frame.
...
* config/tc-i386.h (md_fix_up_eh_frame): Define on Solaris.
(i386_solaris_fix_up_eh_frame): Declare.
* config/tc-i386.c (i386_solaris_fix_up_eh_frame): New function.
2008-10-09 17:31:43 +00:00
704209c00f
Make new functions static.
...
Rearrange wording of documentation.
2008-09-03 15:44:33 +00:00
a6c24e68b9
* config/tc-i386.c (pe_lcomm_internal): New function. Allows the
...
alignment field of the .lcomm directive to be optional.
(pe_lcomm): New function. Pass pe_lcomm_internal to
s_comm_internal.
(md_pseudo_table): Implement .lcomm directive for COFF based
targets.
* doc/c-i386.texi (i386-Directives): New node. Used to document
the .lcomm directive.
2008-09-03 14:02:30 +00:00
fc0763e65a
gas/
...
2008-08-28 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (md_assemble): Force number of displacement
operands to zero when processing string instruction.
(i386_index_check): Special-case string instruction operands. Don't
fudge address prefix if there already was a memory operand. Fix
error message to correctly reflect the addressing mode used.
(i386_att_operand): Fix comment.
(i386_intel_operand): Snapshot, clear, and restore base and index
reg for each operand processed. Increment count of memory operands
later.
gas/testsuite/
2008-08-28 Jan Beulich <jbeulich@novell.com>
* gas/i386/string-bad.{l,s}, gas/i386/string-ok.{d,e,s}: New.
* gas/i386/i386.exp: Run new tests.
2008-08-28 09:42:11 +00:00
a87af0274f
gas/
...
2008-08-27 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (check_string): Use register_prefix for error
message.
(process_operands): Likewise.
2008-08-27 16:24:32 +00:00
a5ff0eb22b
gas/
...
2008-08-20 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (August, 2008)
* config/tc-i386.c (CPU_FLAGS_AES_MATCH): New.
(CPU_FLAGS_AVX_MATCH): Likewise.
(CPU_FLAGS_32BIT_MATCH): Updated.
(cpu_flags_match): Likewise.
gas/testsuite/
2008-08-20 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (August, 2008)
* gas/i386/avx.s: Add AES + AVX tests.
* gas/i386/arch-10.s: Likewise.
* gas/i386/sse2avx.s: Likewise.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/x86-64-avx.s: Likewise.
* gas/i386/x86-64-sse2avx.s: Likewise.
* gas/i386/arch-10.d: Updated.
* gas/i386/arch-10-1.l: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/avx.d: Likewise.
* gas/i386/avx-intel.d: Likewise.
* gas/i386/sse2avx.d: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
* gas/i386/x86-64-avx.d: Likewise.
* gas/i386/x86-64-avx-intel.d: Likewise.
* gas/i386/x86-64-sse2avx.d: Likewise.
* gas/i386/i386.exp: Run arch-avx-1, arch-avx-1-1 and
arch-avx-1-2.
* gas/i386/arch-avx-1.d: New.
* gas/i386/arch-avx-1.s: Likewise.
* gas/i386/arch-avx-1-1.l: Likewise.
* gas/i386/arch-avx-1-1.s: Likewise.
* gas/i386/arch-avx-1-2.l: Likewise.
* gas/i386/arch-avx-1-2.s: Likewise.
opcodes/
2008-08-20 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (August, 2008)
* i386-dis.c (PREFIX_VEX_38DB): New.
(PREFIX_VEX_38DC): Likewise.
(PREFIX_VEX_38DD): Likewise.
(PREFIX_VEX_38DE): Likewise.
(PREFIX_VEX_38DF): Likewise.
(PREFIX_VEX_3ADF): Likewise.
(VEX_LEN_38DB_P_2): Likewise.
(VEX_LEN_38DC_P_2): Likewise.
(VEX_LEN_38DD_P_2): Likewise.
(VEX_LEN_38DE_P_2): Likewise.
(VEX_LEN_38DF_P_2): Likewise.
(VEX_LEN_3ADF_P_2): Likewise.
(PREFIX_VEX_3A04): Updated.
(VEX_LEN_3A06_P_2): Likewise.
(prefix_table): Add PREFIX_VEX_38DB, PREFIX_VEX_38DC,
PREFIX_VEX_38DD, PREFIX_VEX_38DE and PREFIX_VEX_3ADF.
(x86_64_table): Likewise.
(vex_len_table): Add VEX_LEN_38DB_P_2, VEX_LEN_38DC_P_2,
VEX_LEN_38DD_P_2, VEX_LEN_38DE_P_2, VEX_LEN_38DF_P_2 and
VEX_LEN_3ADF_P_2.
* i386-opc.tbl: Add AES + AVX instructions.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-08-20 18:38:40 +00:00
e6a1410132
2008-08-18 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (i386_align_code): Fix a comment typo.
2008-08-18 18:21:15 +00:00
5a49b8acf4
Banish PARAMS and PTR. Convert to ISO C.
...
Delete unnecessary forward declarations.
2008-08-12 23:39:31 +00:00
2cfe26b654
warning fix
2008-07-28 06:48:00 +00:00
cb19c0328d
gas/
...
2008-06-03 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (set_sse_check): New.
(md_pseudo_table): Add "sse_check".
gas/testsuite/
2008-06-03 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run sse-check-none and
x86-64-sse-check-none.
* gas/i386/sse-check-none.d: New.
* gas/i386/sse-check-none.s: Likewise.
* gas/i386/x86-64-sse-check-none.d: Likewise.
2008-06-03 17:31:52 +00:00
95f283e8f6
2008-05-23 H.J. Lu <hongjiu.lu@intel.com>
...
PR gas/6518
* config/tc-i386.c (match_template): Report ambiguous operand
size, not invalid suffix when there is no match in Intel
syntax.
2008-05-23 13:55:36 +00:00
f1f8f695c0
gas/
...
2008-05-02 H.J. Lu <hongjiu.lu@intel.com>
* NEWS: Mention XSAVE, EPT and MOVBE.
* config/tc-i386.c (cpu_arch): Add .movbe and .ept.
(md_show_usage): Add .movbe and .ept.
* doc/c-i386.texi: Add movbe and ept to -march=. Document
.movbe and .ept.
gas/testsuite/
2008-05-02 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run movbe, movbe-intel, inval-movbe, ept,
ept-intel, inval-ept, x86-64-movbe, x86-64-movbe-intel,
x86-64-inval-movbe. x86-64-ept, x86-64-ept-intel and
x86-64-inval-ept.
* gas/i386/arch-10.s: Add movbe and invept.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/ept.d: New file
* gas/i386/ept-intel.d: Likewise.
* gas/i386/ept.s: Likewise.
* gas/i386/inval-ept.l: Likewise.
* gas/i386/inval-ept.s: Likewise.
* gas/i386/inval-movbe.l: Likewise.
* gas/i386/inval-movbe.s: Likewise.
* gas/i386/movbe.d: Likewise.
* gas/i386/movbe-intel.d: Likewise.
* gas/i386/movbe.s: Likewise.
* gas/i386/x86-64-inval-ept.l: Likewise.
* gas/i386/x86-64-inval-ept.s: Likewise.
* gas/i386/x86-64-inval-movbe.l: Likewise.
* gas/i386/x86-64-inval-movbe.s: Likewise.
* gas/i386/x86-64-ept.d: Likewise.
* gas/i386/x86-64-ept-intel.d: Likewise.
* gas/i386/x86-64-ept.s: Likewise.
* gas/i386/x86-64-movbe.d: Likewise.
* gas/i386/x86-64-movbe-intel.d: Likewise.
* gas/i386/x86-64-movbe.s: Likewise.
* gas/i386/arch-10.d: Updated.
* gas/i386/arch-10-1.l: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
opcodes/
2008-05-02 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (MOVBE_Fixup): New.
(Mo): Likewise.
(PREFIX_0F3880): Likewise.
(PREFIX_0F3881): Likewise.
(PREFIX_0F38F0): Updated.
(prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881. Update
PREFIX_0F38F0 and PREFIX_0F38F1 for movbe.
(three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881.
* i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and
CPU_EPT_FLAGS.
(cpu_flags): Add CpuMovbe and CpuEPT.
* i386-opc.h (CpuMovbe): New.
(CpuEPT): Likewise.
(CpuLM): Updated.
(i386_cpu_flags): Add cpumovbe and cpuept.
* i386-opc.tbl: Add entries for movbe and EPT instructions.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-05-02 16:53:40 +00:00
81f8a9131a
gas/
...
2008-04-22 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (md_assemble): Don't check SSE instructions
if noavx is 0.
opcodes/
2008-04-22 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Add NoAVX.
* i386-opc.h (NoAVX): New.
(OldGcc): Updated.
(i386_opcode_modifier): Add noavx.
* i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3
instructions which don't have AVX equivalent.
* i386-tbl.h: Regenerated.
2008-04-22 22:27:13 +00:00
eff014d916
2008-04-18 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (build_modrm_byte): Don't check FMA to swap
REG and NDS for instructions with immediate operand.
2008-04-18 18:22:37 +00:00
dae39accc2
gas/
...
2008-04-18 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (build_modrm_byte): Swap REG and NDS for
FMA.
gas/testsuite/
2008-04-18 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/arch-10.d: Updated.
* gas/i386/avx.d: Likewise.
* gas/i386/avx-intel.d: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
* gas/i386/x86-64-avx.d: Likewise.
* gas/i386/x86-64-avx-intel.d: Likewise.
opcodes/
2008-04-18 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (OP_VEX_FMA): New.
(OP_EX_VexImmW): Likewise.
(VexFMA): Likewise.
(Vex128FMA): Likewise.
(EXVexImmW): Likewise.
(get_vex_imm8): Likewise.
(OP_EX_VexReg): Likewise.
(vex_i4_done): Renamed to ...
(vex_w_done): This.
(prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps
and vpermil2pd. Replace Vex/Vex128 with VexFMA/Vex128FMA on
FMA instructions.
(print_insn): Updated.
(OP_EX_VexW): Rewrite to swap register in VEX with EX.
(OP_REG_VexI4): Check invalid high registers.
2008-04-18 13:10:32 +00:00
daf50ae75d
gas/
...
2008-04-10 H.J. Lu <hongjiu.lu@intel.com>
* NEWS: Mention -msse-check=[none|error|warning].
* config/tc-i386.c (sse_check): New.
(OPTION_MSSE_CHECK): Likewise.
(md_assemble): Check SSE instructions if needed.
(md_longopts): Add -msse-check.
(md_parse_option): Handle OPTION_MSSE_CHECK.
(md_show_usage): Show -msse-check=[none|error|warning].
* doc/c-i386.texi: Document -msse-check=[none|error|warning].
gas/testsuite/
2008-04-10 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run sse-check, sse-check-warn,
sse-check-error, x86-64-sse-check, x86-64-sse-check-warn and
x86-64-sse-check-error.
* gas/i386/sse-check.d: New.
* gas/i386/sse-check.s: Likewise.
* gas/i386/sse-check-error.l: Likewise.
* gas/i386/sse-check-error.s: Likewise.
* gas/i386/sse-check-warn.d: Likewise.
* gas/i386/sse-check-warn.e: Likewise.
* gas/i386/x86-64-sse-check.d: Likewise.
* gas/i386/x86-64-sse-check-error.l: Likewise.
* gas/i386/x86-64-sse-check-error.s: Likewise.
* gas/i386/x86-64-sse-check-warn.d: Likewise.
2008-04-10 17:53:40 +00:00
40f1253383
gas/
...
2008-04-07 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (parse_real_register): Return AVX register
only if AVX is enabled.
gas/testsuite/
2008-04-07 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/att-regs.s: Add AVX register test.
* gas/i386/intel-regs.s: Likewise.
* gas/i386/att-regs.d: Updated.
* gas/i386/intel-regs.d: Likewise.
2008-04-07 13:07:16 +00:00
594ab6a333
gas/
...
2008-04-04 H.J. Lu <hongjiu.lu@intel.com>
* NEWS: Mention XSAVE. Change CLMUL to PCLMUL.
* config/tc-i386.c (cpu_arch): Add .pclmul.
(md_show_usage): Replace clmul with pclmul.
* doc/c-i386.texi: Likewise.
gas/testsuite/
2008-04-04 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/arch-10-1.l: Replace CLMUL with PCLMUL.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/arch-10.s: Likewise.
* gas/i386/clmul-intel.d: Likewise.
* gas/i386/clmul.d: Likewise.
* gas/i386/clmul.s: Likewise.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/x86-64-clmul-intel.d: Likewise.
* gas/i386/x86-64-clmul.d: Likewise.
* gas/i386/x86-64-clmul.s: Likewise.
* gas/i386/arch-10.d: Replace clmul with pclmul.
* gas/i386/x86-64-arch-2.d: Likewise.
opcodes/
2008-04-04 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
with CPU_PCLMUL_FLAGS/CpuPCLMUL.
(cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
* i386-opc.tbl: Likewise.
* i386-opc.h (CpuCLMUL): Renamed to ...
(CpuPCLMUL): This.
(CpuFMA): Updated.
(i386_cpu_flags): Replace cpuclmul with cpupclmul.
* i386-init.h: Regenerated.
2008-04-04 16:34:23 +00:00
c0f3af977b
binutils/
...
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* dwarf.c (dwarf_regnames_i386): Add AVX registers.
(dwarf_regnames_x86_64): Likewise.
gas/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* NEWS: Mention AES, CLMUL, AVX/FMA and -msse2avx.
* doc/c-i386.texi: Add avx, aes, clmul and fma to -march=.
Document -msse2avx, .avx, .aes, .clmul and .fma.
* config/tc-i386.c (YMMWORD_MNEM_SUFFIX): New.
(vex_prefix): Likewise.
(sse2avx): Likewise.
(CPU_FLAGS_ARCH_MATCH): Likewise.
(CPU_FLAGS_64BIT_MATCH): Likewise.
(CPU_FLAGS_32BIT_MATCH): Likewise.
(CPU_FLAGS_PERFECT_MATCH): Likewise.
(regymm): Likewise.
(vex_imm4): Likewise.
(fits_in_imm4): Likewise.
(build_vex_prefix): Likewise.
(VEX_check_operands): Likewise.
(bad_implicit_operand): Likewise.
(OPTION_MSSE2AVX): Likewise.
(T_YMMWORD): Likewise.
(_i386_insn): Add vex.
(cpu_arch): Add .avx, .aes, .clmul and .fma.
(cpu_flags_match): Changed to take a pointer to const template.
Enable encoding SSE instructions with VEX prefix for -msse2avx.
(match_mem_size): Also check ymmword.
(operand_type_match): Clear ymmword.
(md_begin): Allow '_' in mnemonic.
(type_names): Add OPERAND_TYPE_VEX_IMM4.
(process_immext): Update assert.
(md_assemble): Don't call process_immext if sse2avx and immext
are true. Call build_vex_prefix if vex is true.
(parse_insn): Updated for cpu_flags_match.
(swap_operands): Handle 5 operands.
(match_template): Handle 5 operands. Updated for cpu_flags_match.
Check regymm. Call VEX_check_operands. Handle YMMWORD_MNEM_SUFFIX.
(process_suffix): Handle YMMWORD_MNEM_SUFFIX.
(check_byte_reg): Check regymm.
(process_operands): Duplicate the destination register for
-msse2avx if needed.
(build_modrm_byte): Updated for instructions with VEX encoding.
(output_insn): Output VEX prefix if needed.
(md_longopts): Add msse2avx.
(md_parse_option): Handle OPTION_MSSE2AVX.
(md_show_usage): Add avx, aes, clmul, fma and -msse2avx.
(intel_e09): Support YMMWORD.
(intel_e11): Likewise.
(intel_get_token): Likewise.
gas/testsuite/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run aes, aes-intel, x86-64-aes,
x86-64-aes-intel, avx, avx-intel, inval-avx, x86-64-avx,
x86-64-avx-intel and x86-64-inval-avx.
* gas/cfi/cfi-i386.s: Add tests for AVX register maps.
* gas/cfi/cfi-x86_64.s: Likewise.
* gas/i386/aes.d: New.
* gas/i386/aes.s: Likewise.
* gas/i386/aes-intel.d: Likewise.
* gas/i386/avx.d: Likewise.
* gas/i386/avx.s: Likewise.
* gas/i386/avx-intel.d: Likewise.
* gas/i386/clmul.d: Likewise.
* gas/i386/clmul-intel.d: Likewise.
* gas/i386/clmul.s: Likewise.
* gas/i386/i386.exp: Likewise.
* gas/i386/inval-avx.l: Likewise.
* gas/i386/inval-avx.s: Likewise.
* gas/i386/sse2avx.d: Likewise.
* gas/i386/sse2avx.s: Likewise.
* gas/i386/x86-64-aes.d: Likewise.
* gas/i386/x86-64-aes.s: Likewise.
* gas/i386/x86-64-aes-intel.d: Likewise.
* gas/i386/x86-64-avx.d: Likewise.
* gas/i386/x86-64-avx.s: Likewise.
* gas/i386/x86-64-avx-intel.d: Likewise.
* gas/i386/x86-64-clmul.d: Likewise.
* gas/i386/x86-64-clmul-intel.d: Likewise.
* gas/i386/x86-64-clmul.s: Likewise.
* gas/i386/x86-64-inval-avx.l: Likewise.
* gas/i386/x86-64-inval-avx.s: Likewise.
* gas/i386/x86-64-sse2avx.d: Likewise.
* gas/i386/x86-64-sse2avx.s: Likewise.
* gas/i386/arch-10.s: Add tests for AVX, AES, CLMUL and FMA.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/rexw.s: Add AVX tests.
* gas/i386/x86-64-opcode-inval.s: Remove lds/les test.
* gas/cfi/cfi-i386.d: Updated.
* gas/cfi/cfi-x86_64.d: Likewise.
* gas/i386/arch-10.d: Likewise.
* gas/i386/arch-10-1.l: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/rexw.d: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
* gas/i386/x86-64-opcode-inval.d: Likewise.
* gas/i386/x86-64-opcode-inval-intel.d: Likewise.
include/opcode/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (MAX_OPERANDS): Set to 5.
(MAX_MNEM_SIZE): Changed to 20.
opcodes/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (OP_E_register): New.
(OP_E_memory): Likewise.
(OP_VEX): Likewise.
(OP_EX_Vex): Likewise.
(OP_EX_VexW): Likewise.
(OP_XMM_Vex): Likewise.
(OP_XMM_VexW): Likewise.
(OP_REG_VexI4): Likewise.
(PCLMUL_Fixup): Likewise.
(VEXI4_Fixup): Likewise.
(VZERO_Fixup): Likewise.
(VCMP_Fixup): Likewise.
(VPERMIL2_Fixup): Likewise.
(rex_original): Likewise.
(rex_ignored): Likewise.
(Mxmm): Likewise.
(XMM): Likewise.
(EXxmm): Likewise.
(EXxmmq): Likewise.
(EXymmq): Likewise.
(Vex): Likewise.
(Vex128): Likewise.
(Vex256): Likewise.
(VexI4): Likewise.
(EXdVex): Likewise.
(EXqVex): Likewise.
(EXVexW): Likewise.
(EXdVexW): Likewise.
(EXqVexW): Likewise.
(XMVex): Likewise.
(XMVexW): Likewise.
(XMVexI4): Likewise.
(PCLMUL): Likewise.
(VZERO): Likewise.
(VCMP): Likewise.
(VPERMIL2): Likewise.
(xmm_mode): Likewise.
(xmmq_mode): Likewise.
(ymmq_mode): Likewise.
(vex_mode): Likewise.
(vex128_mode): Likewise.
(vex256_mode): Likewise.
(USE_VEX_C4_TABLE): Likewise.
(USE_VEX_C5_TABLE): Likewise.
(USE_VEX_LEN_TABLE): Likewise.
(VEX_C4_TABLE): Likewise.
(VEX_C5_TABLE): Likewise.
(VEX_LEN_TABLE): Likewise.
(REG_VEX_XX): Likewise.
(MOD_VEX_XXX): Likewise.
(PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
(PREFIX_0F3A44): Likewise.
(PREFIX_0F3ADF): Likewise.
(PREFIX_VEX_XXX): Likewise.
(VEX_OF): Likewise.
(VEX_OF38): Likewise.
(VEX_OF3A): Likewise.
(VEX_LEN_XXX): Likewise.
(vex): Likewise.
(need_vex): Likewise.
(need_vex_reg): Likewise.
(vex_i4_done): Likewise.
(vex_table): Likewise.
(vex_len_table): Likewise.
(OP_REG_VexI4): Likewise.
(vex_cmp_op): Likewise.
(pclmul_op): Likewise.
(vpermil2_op): Likewise.
(m_mode): Updated.
(es_reg): Likewise.
(PREFIX_0F38F0): Likewise.
(PREFIX_0F3A60): Likewise.
(reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
(prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
and PREFIX_VEX_XXX entries.
(x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
(three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
PREFIX_0F3ADF.
(mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
Add MOD_VEX_XXX entries.
(ckprefix): Initialize rex_original and rex_ignored. Store the
REX byte in rex_original.
(get_valid_dis386): Handle the implicit prefix in VEX prefix
bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
(print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
calling get_valid_dis386. Use rex_original and rex_ignored when
printing out REX.
(putop): Handle "XY".
(intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
ymmq_mode.
(OP_E_extended): Updated to use OP_E_register and
OP_E_memory.
(OP_XMM): Handle VEX.
(OP_EX): Likewise.
(XMM_Fixup): Likewise.
(CMP_Fixup): Use ARRAY_SIZE.
* i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
CPU_FMA_FLAGS and CPU_AVX_FLAGS.
(operand_type_init): Add OPERAND_TYPE_REGYMM and
OPERAND_TYPE_VEX_IMM4.
(cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
(opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
VexImmExt and SSE2AVX.
(operand_types): Add RegYMM, Ymmword and Vex_Imm4.
* i386-opc.h (CpuAVX): New.
(CpuAES): Likewise.
(CpuCLMUL): Likewise.
(CpuFMA): Likewise.
(Vex): Likewise.
(Vex256): Likewise.
(VexNDS): Likewise.
(VexNDD): Likewise.
(VexW0): Likewise.
(VexW1): Likewise.
(Vex0F): Likewise.
(Vex0F38): Likewise.
(Vex0F3A): Likewise.
(Vex3Sources): Likewise.
(VexImmExt): Likewise.
(SSE2AVX): Likewise.
(RegYMM): Likewise.
(Ymmword): Likewise.
(Vex_Imm4): Likewise.
(Implicit1stXmm0): Likewise.
(CpuXsave): Updated.
(CpuLM): Likewise.
(ByteOkIntel): Likewise.
(OldGcc): Likewise.
(Control): Likewise.
(Unspecified): Likewise.
(OTMax): Likewise.
(i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
(i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
vex3sources, veximmext and sse2avx.
(i386_operand_type): Add regymm, ymmword and vex_imm4.
* i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
* i386-reg.tbl: Add AVX registers, ymm0..ymm15.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-04-03 14:03:21 +00:00
192dc9c6fd
gas/
...
2008-02-18 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (match_template): Disallow 'l' suffix when
currently selected CPU has no 32-bit support.
(parse_real_register): Do not return registers not available on
currently selected CPU.
gas/testsuite/
2008-02-18 Jan Beulich <jbeulich@novell.com>
* gas/i386/att-regs.s, gas/i386/att-regs.d,
gas/i386/intel-regs.s, gas/i386/intel-regs.d: New.
* gas/i386/i386.exp: Run new tests.
2008-02-18 08:44:38 +00:00
1fed0ba155
2008-02-16 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (process_immext): Fix format.
2008-02-17 00:26:19 +00:00
65da13b5e0
gas/
...
2008-02-16 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (inoutportreg): New.
(process_immext): New.
(md_assemble): Use it.
(update_imm): Use imm16 and imm32s.
(i386_att_operand): Use inoutportreg.
opcodes/
2008-02-16 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
* i386-init.h: Regenerated.
2008-02-16 16:16:48 +00:00
0dfbf9d7ce
2008-02-14 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (operand_type_all_zero): New.
(operand_type_set): Likewise.
(operand_type_equal): Likewise.
(cpu_flags_all_zero): Likewise.
(cpu_flags_set): Likewise.
(cpu_flags_equal): Likewise.
(UINTS_ALL_ZERO): Removed.
(UINTS_SET): Likewise.
(UINTS_CLEAR): Likewise.
(UINTS_EQUAL): Likewise.
(cpu_flags_match): Updated.
(smallest_imm_type): Likewise.
(set_cpu_arch): Likewise.
(md_assemble): Likewise.
(optimize_imm): Likewise.
(match_template): Likewise.
(process_suffix): Likewise.
(update_imm): Likewise.
(process_drex): Likewise.
(process_operands): Likewise.
(build_modrm_byte): Likewise.
(i386_immediate): Likewise.
(i386_displacement): Likewise.
(i386_att_operand): Likewise.
(parse_real_register): Likewise.
(md_parse_option): Likewise.
(i386_target_format): Likewise.
2008-02-14 22:54:02 +00:00
b7240065b3
gas/
...
2008-02-13 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (parse_real_register): Don't return 'FLAT'
if not in Intel mode.
(i386_intel_operand): Ignore segment overrides in immediate and
offset operands.
(intel_e11): Range-check i.mem_operands before use as array
index. Filter out FLAT for uses other than as segment override.
(intel_get_token): Remove broken promotion of "FLAT:" to mean
"offset FLAT:".
gas/testsuite/
2008-02-13 Jan Beulich <jbeulich@novell.com>
* gas/i386/intelok.s: Replace invalid offset expression with
valid ones.
* gas/i386/x86_64.s: Likewise.
opcodes/
2008-02-13 Jan Beulich <jbeulich@novell.com>
* i386-opc.h (RegFlat): New.
* i386-reg.tbl (flat): Add.
* i386-tbl.h: Re-generate.
2008-02-13 13:41:26 +00:00
34b772a651
gas/
...
2008-02-13 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (intel_e09): Also special-case 'bound'.
gas/testsuite/
2008-02-13 Jan Beulich <jbeulich@novell.com>
* gas/i386/intelbad.s, gas/i386/intelok.s: Add 'bound' tests.
* gas/i386/intelbad.l, gas/i386/intelok.l, gas/i386/intelok.e,
gas/i386/opcode-intel.d: Adjust.
opcodes/
2008-02-13 Jan Beulich <jbeulich@novell.com>
* i386-dis.c (a_mode): New.
(cond_jump_mode): Adjust.
(Ma): Change to a_mode.
(intel_operand_size): Handle a_mode.
* i386-opc.tbl: Allow Dword and Qword for bound.
* i386-tbl.h: Re-generate.
2008-02-13 13:29:31 +00:00
a60de03c61
gas/
...
2008-02-13 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (allow_pseudo_reg): New.
(parse_real_register): Check for NULL just once. Allow all
register table entries when allow_pseudo_reg is non-zero.
Don't allow any registers without type when allow_pseudo_reg
is zero.
(tc_x86_regname_to_dw2regnum): Replace with ...
(tc_x86_parse_to_dw2regnum): ... this.
(tc_x86_frame_initial_instructions): Adjust for above change.
* config/tc-i386.h (tc_regname_to_dw2regnum): Remove.
(tc_parse_to_dw2regnum): New.
(tc_x86_regname_to_dw2regnum): Replace with ...
(tc_x86_parse_to_dw2regnum): ... this.
* dw2gencfi.c (tc_parse_to_dw2regnum): New, broken out of ...
(cfi_parse_reg): ... this. Use tc_parse_to_dw2regnum. Adjust
error handling.
gas/testsuite/
2008-02-13 Jan Beulich <jbeulich@novell.com>
* gas/cfi/cfi-i386.s: Add code testing use of all registers.
Fix a few comments.
* gas/cfi/cfi-x86_64.s: Likewise.
* gas/cfi/cfi-i386.d, gas/cfi/cfi-x86_64.d: Adjust.
opcodes/
2008-02-13 Jan Beulich <jbeulich@novell.com>
* i386-gen.c (process_i386_registers): Process new fields.
* i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
unsigned char. Add dw2_regnum and Dw2Inval.
* i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
register names.
* i386-tbl.h: Re-generate.
2008-02-13 10:14:40 +00:00
f03fe4c110
gas/
...
2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (cpu_arch): Add .xsave.
(md_show_usage): Add .xsave.
* doc/c-i386.texi: Add xsave to -march=.
gas/testsuite/
2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/arch-10.s: Add xgetbv.
* gas/i386/arch-10.d: Updated.
* gas/i386/arch-10-1.l: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/x86-64-arch-10.d: Likewise.
opcodes/
2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
* i386-init.h: Updated.
2008-02-12 05:35:36 +00:00
1bf57e9fa3
* read.c (s_weakref): Don't pass unadorned NULL to concat.
...
* config/tc-i386.c (set_cpu_arch, md_parse_option): Likewise.
2008-02-07 08:40:29 +00:00
599121aa77
gas/
...
2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (md_show_usage): Replace tabs with spaces.
gas/testsuite/
2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp : Run x86-64-arch-1 and x86-64-arch-10.
* gas/i386/x86-64-arch-1.d: New.
* gas/i386/x86-64-arch-1.s: Likewise.
* gas/i386/x86-64-arch-10.d: Likewise.
opcodes/
2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
* i386-init.h: Regenerated.
2008-01-23 19:05:12 +00:00
2cb4f3d5a9
2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (md_show_usage): Show more processors for
-march=/-mtune=.
2008-01-23 14:13:08 +00:00
115c7c25fe
gas/
...
2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (i386_target_format): Remove cpummx2.
gas/testsuite/
2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/arch-10.d: New.
* gas/i386/arch-11.s: Likewise.
* gas/i386/arch-12.d: Likewise.
* gas/i386/arch-12.s: Likewise.
* gas/i386/i386.exp: Run arch-11 and arch-12.
opcodes/
2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (cpu_flag_init): Remove CpuMMX2.
(cpu_flags): Likewise.
* i386-opc.h (CpuMMX2): Removed.
(CpuSSE): Updated.
* i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-01-22 19:57:30 +00:00
6305a20382
gas/
...
2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (XXX_PREFIX): Moved from tc-i386.h.
(XXX_MNEM_SUFFIX): Likewise.
(END_OF_INSN): Likewise.
(templates): Likewise.
(modrm_byte): Likewise.
(rex_byte): Likewise.
(DREX_XXX): Likewise.
(drex_byte): Likewise.
(sib_byte): Likewise.
(processor_type): Likewise.
(arch_entry): Likewise.
(cpu_sub_arch_name): Remove const.
(cpu_arch): Add .vmx and .smx.
(set_cpu_arch): Append cpu_sub_arch_name.
(md_parse_option): Support -march=CPU[,+EXTENSION...].
(md_show_usage): Updated.
* config/tc-i386.h (XXX_PREFIX): Moved to tc-i386.c.
(XXX_MNEM_SUFFIX): Likewise.
(END_OF_INSN): Likewise.
(templates): Likewise.
(modrm_byte): Likewise.
(rex_byte): Likewise.
(DREX_XXX): Likewise.
(drex_byte): Likewise.
(sib_byte): Likewise.
(processor_type): Likewise.
(arch_entry): Likewise.
* doc/as.texinfo: Update i386 -march option.
* doc/c-i386.texi: Update -march= for ISA.
gas/testsuite/
2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/arch-10-1.l: New.
* gas/i386/arch-10-1.s: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-2.s: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-3.s: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/arch-10-4.s: Likewise.
* gas/i386/arch-10.d: Likewise.
* gas/i386/arch-10.s: Likewise.
* gas/i386/i386.exp: Run arch-10, arch-10-1, arch-10-2,
arch-10-3 and arch-10-4.
* gas/i386/nops-2.s: Use movsbl instead of cmove.
* gas/i386/nops-2-i386.d: Updated.
* gas/i386/nops-2-merom.d: Likewise.
* gas/i386/nops-2.d: Likewise.
* gas/i386/x86-64-nops-2.d: Likewise.
opcodes/
2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
CPU_SMX_FLAGS.
* i386-init.h: Regenerated.
2008-01-22 19:16:45 +00:00
321fd21e2f
gas/
...
2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (md_assemble): Also zap movzx and movsx
suffix for AT&T syntax.
gas/testsuite/
2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.s: Add more tests for movsx and movzx.
* gas/i386/x86_64.s: Likewise.
* gas/i386/inval.s: Remove tests for movsxw and movzxw.
* gas/i386/x86-64-inval.s: Remove tests for movsxb, movsxw,
movsxl, movzxb and movzxw.
* gas/i386/i386.d: Updated.
* gas/i386/inval.l: Likewise.
* gas/i386/x86_64.d: Likewise.
* gas/i386/x86-64-inval.l: Likewise.
opcodes/
2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
* i386-tbl.h: Regenerated.
2008-01-15 18:50:44 +00:00
5c07affcae
gas/
...
2008-01-14 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (match_reg_size): New.
(match_mem_size): Likewise.
(operand_size_match): Likewise.
(operand_type_match): Also clear all size fields.
(match_template): Skip Intel syntax when in AT&T syntax.
Call operand_size_match to check operand size.
(i386_att_operand): Set the mem field to 1 for memory
operand.
(i386_intel_operand): Likewise.
gas/testsuite/
2008-01-14 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.s: Add tests for movsx, movzx and movnti.
* gas/i386/inval.s: Likewise.
* gas/i386/x86_64.s: Likewise.
* gas/i386/x86-64-inval.s: Likewise.
* gas/i386/i386.d: Updated.
* gas/i386/inval.l: Likewise.
* gas/i386/x86_64.d: Likewise.
* gas/i386/x86-64-inval.l: Likewise.
opcodes/
2008-01-14 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Add IntelSyntax.
(operand_types): Add Mem.
* i386-opc.h (IntelSyntax): New.
* i386-opc.h (Mem): New.
(Byte): Updated.
(Opcode_Modifier_Max): Updated.
(i386_opcode_modifier): Add intelsyntax.
(i386_operand_type): Add mem.
* i386-opc.tbl: Remove Reg16 from movnti. Add sizes to more
instructions.
* i386-reg.tbl: Add size for accumulator.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-01-15 01:37:56 +00:00
7d5e4556a3
gas/testsuite/
...
2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* gas/i386/i386.s: Add tests for fnstsw and fstsw.
* gas/i386/inval.s: Likewise.
* gas/i386/x86_64.s: Likewise.
* gas/i386/intel.s: Use word instead of dword on ss.
* gas/i386/x86-64-inval.s: Add tests for fnstsw, fstsw, in
and out.
* gas/i386/prefix.s: Remove invalid fstsw.
* gas/i386/inval.l: Updated.
* gas/i386/intelbad.l: Likewise.
* gas/i386/i386.d: Likewise.
* gas/i386/x86_64.d: Likewise.
* gas/i386/x86-64-inval.l: Likewise.
* gas/i386/prefix.d: Updated.
gas/
2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* config/tc-i386.c (_i386_insn): Update comment.
(operand_type_match): Also clear unspecified.
(operand_type_register_match): Likewise.
(parse_operands): Initialize unspecified.
(i386_intel_operand): Likewise.
(match_template): Check memory and accumulator operand size.
(i386_att_operand): Clear unspecified on register operand.
(intel_e11): Likewise.
(intel_e09): Set operand size and clean unspecified for
"XXX PTR".
opcodes/
2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* i386-gen.c (operand_type_init): Add Dword to
OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64.
(opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
Qword and Xmmword.
(operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
Xmmword, Unspecified and Anysize.
(set_bitfield): Make Mmword an alias of Qword. Make Oword
an alias of Xmmword.
* i386-opc.h (CheckSize): Removed.
(Byte): Updated.
(Word): Likewise.
(Dword): Likewise.
(Qword): Likewise.
(Xmmword): Likewise.
(FWait): Updated.
(OTMax): Likewise.
(i386_opcode_modifier): Remove checksize, byte, word, dword,
qword and xmmword.
(Fword): New.
(TBYTE): Likewise.
(Unspecified): Likewise.
(Anysize): Likewise.
(i386_operand_type): Add byte, word, dword, fword, qword,
tbyte xmmword, unspecified and anysize.
* i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
Tbyte, Xmmword, Unspecified and Anysize.
* i386-reg.tbl: Add size for accumulator.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-01-12 16:05:42 +00:00
50aecf8c5f
2008-01-10 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (match_template): Check processor support
first.
2008-01-10 21:59:46 +00:00
2dbab7d572
2008-01-10 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (match_template): Continue if processor
doesn't match.
2008-01-10 20:53:27 +00:00
45664ddbb0
2008-01-09 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (match_template): Check register size
only when size of operands can be encoded the canonical way.
2008-01-09 16:55:14 +00:00
a761937534
2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (i386_operand): Renamed to ...
(i386_att_operand): This.
(parse_operands): Updated.
2008-01-08 19:51:24 +00:00
e1d4d8936f
gas/
...
2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
* doc/c-i386.texi: Update .att_mnemonic and .intel_mnemonic.
* config/tc-i386.c (set_intel_mnemonic): Set intel_mnemonic
only.
(md_assemble): Remove Intel mode workaround.
(match_template): Check support for old gcc, AT&T mnemonic
and Intel Syntax.
(md_parse_option): Don't set intel_mnemonic to 0 for
OPTION_MOLD_GCC.
gas/testsuite/
2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/intel.s: Add tests for fadd, faddp, fdiv, fdivp,
fdivr, fdivrp, fmul, fmulp, fsub, fsubp, fsubr and fsubrp.
* gas/i386/intel.d: Updated.
* gas/i386/intel.e: Likewise.
opcodes/
2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
ATTSyntax.
* i386-opc.h (IntelMnemonic): Renamed to ..
(ATTSyntax): This
(Opcode_Modifier_Max): Updated.
(i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
and intelsyntax.
* i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
* i386-tbl.h: Regenerated.
2008-01-05 17:07:25 +00:00
aacd03c3bb
2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (md_assemble): Use !intel_mnemonic instead
of SYSV386_COMPAT.
2008-01-04 01:27:01 +00:00
3629bb00a8
gas/
...
2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
* gas/config/tc-i386.c (cpu_arch_flags_not): Removed.
(cpu_flags_not): Likewise.
(cpu_flags_match): Updated to check 64bit and arch.
(set_code_flag): Remove cpu_arch_flags_not.
(set_16bit_gcc_code_flag): Likewise.
(set_cpu_arch): Likewise.
(md_begin): Likewise.
(parse_insn): Call cpu_flags_match to check 64bit and arch.
(match_template): Likewise.
gas/testsuite/
2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/arch-9.d: New file.
* gas/i386/arch-9.s: Likewise.
* gas/i386/i386.exp: Run arch-9.
opcodes/
2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
CpuSSE4_2_Or_ABM.
(cpu_flags): Likewise.
* i386-opc.h (CpuSSE4_1_Or_5): Removed.
(CpuSSE4_2_Or_ABM): Likewise.
(CpuLM): Updated.
(i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
* i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
and CpuPadLock, respectively.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-01-04 01:05:45 +00:00
5dd15031dd
* config/tc-i386.c (process_drex): Initialize modrm_reg and
...
modrm_regmem to 0 instead of None.
2008-01-03 20:19:29 +00:00
24995bd6e3
gas/
...
2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (match_template): Use the xmmword field
instead of no_xsuf.
opcodes/
2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Remove No_xSuf.
* i386-opc.h (No_xSuf): Removed.
(CheckSize): Updated.
* i386-tbl.h: Regenerated.
2008-01-03 20:09:38 +00:00
fc4adea1ba
2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (process_suffix): Fix a typo.
2008-01-02 23:55:45 +00:00
582d5eddfe
gas/
...
2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* config/tc-i386.c (match_template): Handle XMMWORD_MNEM_SUFFIX.
Check memory size in Intel mode.
(process_suffix): Handle XMMWORD_MNEM_SUFFIX.
(intel_e09): Likewise.
* config/tc-i386.h (XMMWORD_MNEM_SUFFIX): New.
gas/testsuite/
2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* gas/i386/intel.s: Use QWORD on movq instead of DWORD.
* gas/i386/inval.s: Add tests for movq.
* gas/i386/x86-64-inval.s: Likewise.
* gas/i386/inval.l: Updated.
* gas/i386/x86-64-inval.l: Likewise.
opcodes/
2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
Byte, Word, Dword, QWord and Xmmword.
* i386-opc.h (No_xSuf): New.
(CheckSize): Likewise.
(Byte): Likewise.
(Word): Likewise.
(Dword): Likewise.
(QWord): Likewise.
(Xmmword): Likewise.
(FWait): Updated.
(i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
Dword, QWord and Xmmword.
* i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
used.
* i386-tbl.h: Regenerated.
2008-01-02 21:43:34 +00:00
ba104c838a
2007-12-29 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (md_show_usage): Add -mmnemonic, -msyntax,
-mindex-reg, -mnaked-reg and -mold-gcc.
2007-12-29 14:15:20 +00:00
5209009a1b
Fix a typo in comment.
2007-12-24 06:10:17 +00:00
1efbbeb461
gas/
...
2007-12-23 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (set_intel_mnemonic): New.
(intel_mnemonic): Likewise.
(old_gcc): Likewise.
(OPTION_MMNEMONIC): Likewise.
(OPTION_MSYNTAX): Likewise.
(OPTION_MINDEX_REG): Likewise.
(OPTION_MNAKED_REG): Likewise.
(OPTION_MOLD_GCC): Likewise.
(md_pseudo_table): Add .intel_mnemonic and .att_mnemonic.
(match_template): Don't allow AT&T/Intel mnemonic if Intel/AT&T
mnemonic is specified. Don't allow old gcc support if old_gcc
is 0.
(md_longopts): Add -mmnemonic, -msyntax, -mindex-reg,
-mmnaked-reg and -mold-gcc.
(md_parse_option): Handle OPTION_MMNEMONIC, OPTION_MSYNTAX,
OPTION_MINDEX_REG, OPTION_MNAKED_REG and OPTION_MOLD_GCC.
* doc/c-i386.texi: Docoument -mmnemonic, -msyntax, --mnaked-reg
and AT&T mnemonic vs. Intel mnemonic.
gas/testsuite/
2007-12-23 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/compat-intel.d: Pass -mmnemonic=att to assembler.
* gas/i386/compat.d: Likewise.
* gas/i386/i386.exp: Pass -mmnemonic=att to assembler for
"float". Pass -mold-gcc to assembler for "general".
opcodes/
2007-12-23 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Add OldGcc, ATTMnemonic and
IntelMnemonic.
* i386-opc.h (OldGcc): New.
(ATTMnemonic): Likewise.
(IntelMnemonic): Likewise.
(Opcode_Modifier_Max): Updated.
(i386_opcode_modifier): Add oldgcc, attmnemonic and
intelmnemonic.
* i386-opc.tbl: Update fadd, fdiv, fdivp, fdivr, fdivrp, fmul,
fsub, fsubp, fsubr and fsubrp with OldGcc, ATTMnemonic and
IntelMnemonic.
* i386-tbl.h: Regeneratd.
2007-12-24 05:27:39 +00:00
4746505869
2007-12-17 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (output_insn): Use ARRAY_SIZE.
(lex_got): Likewise.
2007-12-17 19:41:57 +00:00
4a3523fa63
2007-12-17 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (output_insn): Use FRAG_APPEND_1_CHAR
instead of frag_more/md_number_to_chars.
(md_short_jump_size): Removed.
(md_long_jump_size): Likewise.
(md_create_short_jump): Likewise.
(md_create_long_jump): Likewise.
2007-12-17 18:53:06 +00:00
567e4e96bc
2007-11-09 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (match_template): Re-order suffix check.
2007-11-09 13:53:13 +00:00
7ce189b305
gas/
...
2007-11-01 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (md_assemble): Replace no_xsuf with
no_ldsuf.
(match_template): Likewise.
opcodes/
2007-11-01 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Replace No_xSuf with
No_ldSuf.
* i386-opc.tbl: Likewise.
* i386-opc.h (No_xSuf): Renamed to ...
(No_ldSuf): This.
(FWait): Updated.
2007-11-01 19:06:54 +00:00
ca61edf2ff
gas/
...
2007-11-01 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (process_suffix): Check addrprefixop0 to
see if the address size override prefix changes the size of the
first operand.
(check_byte_reg): Don't warn if byteokintel is set.
(check_long_reg): Set i.suffix to QWORD_MNEM_SUFFIX if toqword
is set.
(check_qword_reg): Set i.suffix to LONG_MNEM_SUFFIX if todword
is set.
gas/testsuite/
2007-11-01 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.d: New.
* gas/i386/i386.s: Likewise.
* gas/i386/i386.exp: Run i386.
* gas/i386/x86_64.s: Add tests for movsx, movsbl, movsbq,
movsbw, movswl, movswq, movzx, movzb, movzbl, movzbq,
movzbw, movzwl and movzwq.
* gas/i386/x86_64.d: Updated.
opcodes/
2007-11-01 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Add ByteOkIntel, ToDword,
ToQword and AddrPrefixOp0.
* i386-opc.h (ByteOkIntel): New.
(ToDword): Likewise.
(ToQword): Likewise.
(AddrPrefixOp0): Likewise.
(IsPrefix): Updated.
(i386_opcode_modifier): Add byteokintel, todword, toqword
and addrprefixop0.
* i386-opc.tbl (cvtss2si): Add ToQword.
(cvttss2si): Likewise.
(cvtsd2si): Add ToDword.
(cvttsd2si): Likewise.
(monitor): Add AddrPrefixOp0.
(invlpga): Likewise.
(vmload): Likewise.
(vmrun): Likewise.
(vmsave): Likewise.
(pextrb): Add ByteOkIntel.
(pinsrb): Likewise.
* i386-tbl.h: Regenerated.
2007-11-01 16:27:08 +00:00
499ac35361
Remove duplicate definitions of the md_atof() function
2007-10-17 16:45:56 +00:00
9fcfb3d73e
2007-10-12 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (process_operands): Simplify implicit xmm0
handling.
2007-10-12 22:26:55 +00:00
e2ec9d29b7
gas/
...
2007-10-12 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (process_operands): Check the firstxmm0
field in opcode_modifier for instruction with a implicit
xmm0 as the first operand.
opcodes/
2007-10-12 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Add FirstXmm0.
* i386-opc.h (FirstXmm0): New.
(IsPrefix): Updated.
(i386_opcode_modifier): Add firstxmm0.
* i386-opc.tbl (blendvpd): Replace RegKludge with FirstXmm0.
(blendvps): Likewise.
(pblendvb): Likewise.
* i386-tbl.h: Regenerated.
2007-10-12 21:40:38 +00:00
368d64cc37
2007-10-05 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (build_modrm_byte): Check the first 2 8bit
immediate operands directly for instructions with 4 operands.
2007-10-05 17:50:47 +00:00
955e1e6a77
gas/
...
2007-10-04 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5109
* config/tc-i386.c (process_suffix): Clear QWORD suffix if it
is ignored in Intel mode.
gas/testsuite/
2007-10-04 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5109
* gas/i386/simd-intel.d: Updated.
* gas/i386/simd.d: Likewise.
* gas/i386/x86-64-simd-intel.d: Likewise.
* gas/i386/x86-64-simd.d: Likewise.
* gas/i386/simd.s: Add more tests.
* gas/i386/x86-64-simd.s: Likewise.
2007-10-04 18:29:29 +00:00
07e8d93c1c
gas/
...
2007-09-30 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5080
* config/tc-i386.c (check_long_reg): Also handle cvttss2si.
(check_qword_reg): Also handle cvttsd2si.
gas/testsuite/
2007-09-30 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5080
* gas/i386/simd-intel.d: Updated.
* gas/i386/simd.d: Likewise.
* gas/i386/x86-64-simd-intel.d: Likewise.
* gas/i386/x86-64-simd.d: Likewise.
* gas/i386/simd.s: Add new tests for cvttsd2si and cvttss2si.
* gas/i386/x86-64-simd.s: Likewise.
2007-09-30 21:27:16 +00:00
9a04903eea
gas/
...
2007-09-26 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (build_modrm_byte): Also check for RegEip
when considering IP-relative addressing.
gas/testsuite/
2007-09-26 Jan Beulich <jbeulich@novell.com>
* gas/i386/reloc64.s: Adjust for %eip-relative addressing no
longer generating errors.
* gas/i386/reloc64.d, gas/i386/reloc64.l: Update.
* gas/i386/x86-64-addr32.s: Remove explicit addr32 prefix
for %eip-realtive addressing case.
opcodes/
2007-09-26 Jan Beulich <jbeulich@novell.com>
* i386-opc.h (RegEip): Define.
(RegEiz): Adjust.
* i386-reg.tbl: Add eip. Mark rip and eip with RegRex64.
* i386-tbl.h: Re-generate.
2007-09-26 13:40:59 +00:00
c15900ec36
gas/
...
2007-09-26 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (NUM_FLAG_CODE): Remove.
2007-09-26 06:55:57 +00:00
4dffcebc10
gas/
...
2007-09-25 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (output_insn): Use i.tm.opcode_length to
check opcode length.
opcodes/
2007-09-25 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (process_i386_opcodes): Process opcode_length.
* i386-opc.h (template): Add opcode_length.
* 386-opc.tbl: Likewise.
* i386-tbl.h: Regenerated.
2007-09-26 04:42:47 +00:00
db51cc60e2
gas/
...
2007-09-20 H.J. Lu <hongjiu.lu@intel.com>
PR 658
* config/tc-i386.c (SCALE1_WHEN_NO_INDEX): Removed.
(set_allow_index_reg): New.
(allow_index_reg): Likewise.
(md_pseudo_table): Add "allow_index_reg" and
"disallow_index_reg".
(build_modrm_byte): Set i.sib.index to NO_INDEX_REGISTER for
fake index registers.
(i386_scale): Updated.
(i386_index_check): Support fake index registers.
(parse_real_register): Return NULL on eiz/riz if fake index
registers aren't allowed.
gas/testsuite/
2007-09-20 H.J. Lu <hongjiu.lu@intel.com>
PR 658
* gas/i386/i386.exp: Run sib-intel, x86-64-sib and
x86-64-sib-intel.
* gas/i386/nops-1-i386-i686.d: Updated.
* gas/i386/nops-1-i386.d: Likewise.
* gas/i386/nops-1.d: Likewise.
* gas/i386/nops-2-i386.d: Likewise.
* gas/i386/nops-2-merom.d: Likewise.
* gas/i386/nops-2.d: Likewise.
* gas/i386/nops-3-i386.d: Likewise.
* gas/i386/nops-3.d : Likewise.
* gas/i386/sib.d: Likewise.
* gas/i386/sib.s: Use %eiz in testcases.
* gas/i386/sib-intel.d: New.
* gas/i386/x86-64-sib-intel.d: Likewise.
* gas/i386/x86-64-sib.d: Likewise.
* gas/i386/x86-64-sib.s: Likewise.
ld/testsuite/
2007-09-20 H.J. Lu <hongjiu.lu@intel.com>
PR 658
* ld-i386/tlsbin.dd: Updated.
* ld-i386/tlsld1.dd: Likewise.
opcodes/
2007-09-20 H.J. Lu <hongjiu.lu@intel.com>
PR 658
* 386-dis.c (index64): New.
(index32): Likewise.
(intel_index64): Likewise.
(intel_index32): Likewise.
(att_index64): Likewise.
(att_index32): Likewise.
(print_insn): Set index64 and index32.
(OP_E_extended): Use index64/index32 for index register for
SIB with INDEX == 4.
* i386-opc.h (RegEiz): New.
(RegRiz): Likewise.
* i386-reg.tbl: Add eiz and riz.
* i386-tbl.h: Regenerated.
2007-09-20 17:38:38 +00:00
20e192ab8d
gas/
...
2007-09-17 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (baseindex): Removed.
(build_modrm_byte): Check reg_num for RIP register instead of
reg_type.
(i386_index_check): Likewise.
opcodes/
2007-09-17 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.h (RegRip): New.
* i386-reg.tbl (rip): Use RegRip for reg_num.
* i386-tbl.h: Regenerated.
2007-09-18 00:56:54 +00:00
916af0488c
gas/
...
2007-09-17 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (intel_e04): Revert the last change.
gas/testsuite/
2007-09-17 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/x86-64-rip.s: Revert the last change.
* gas/i386/x86-64-rip-intel.d: Likewise.
* gas/i386/x86-64-rip.d: Likewise.
2007-09-17 14:46:12 +00:00
27ac72083b
gas/
...
2007-09-15 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5034
* config/tc-i386.c (intel_e04): Return 1 if cur_token.code is
T_NIL.
gas/testsuite/
2007-09-15 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5034
* gas/i386/x86-64-rip.s: Add Intel mode testcases.
* gas/i386/x86-64-rip-intel.d: Updated.
* gas/i386/x86-64-rip.d: Likewise.
2007-09-15 22:06:42 +00:00
8ed77a05dc
2007-09-14 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (build_modrm_byte): Adjust comment line
wrap.
2007-09-15 01:57:57 +00:00
b5016f899b
2007-09-14 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (build_modrm_byte): Use (A || B) instead
of (A || B) != 0.
2007-09-14 20:05:28 +00:00
c0209578ea
2007-09-14 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (build_modrm_byte): Adjust indentation.
2007-09-14 19:57:47 +00:00
85f10a010c
Add AMD SSE5 support
2007-09-14 18:21:09 +00:00
ec56d5c0f6
gas/
...
2007-09-12 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (md_assemble): Move handling of extrq/insertq
after generic operand swapping, and swap only the immediate operands.
gas/testsuite/
2007-09-12 Jan Beulich <jbeulich@novell.com>
* gas/i386/amdfam10.s, gas/i386/x86-64-amdfam10.s: Add Intel syntax
code.
* gas/i386/amdfam10.d, gas/i386/x86-64-amdfam10.d: Adjust.
2007-09-12 07:31:47 +00:00
cf557b5176
2007-09-09 H.J. Lu <hongjiu.lu@intel.com>
...
* tc-i386.c (output_insn): Only check SSE4.2 and ABM for 3
byte opcode.
2007-09-09 16:38:39 +00:00
c6fb90c8cd
2007-09-08 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (cpu_flags_check_x64): Renamed to ...
(cpu_flags_check_cpu64): This. Inline.
(uints_all_zero): New.
(uints_set): Likewise
(uints_equal): Likewise
(UINTS_ALL_ZERO): Likewise
(UINTS_SET): Likewise
(UINTS_CLEAR): Likewise
(UINTS_EQUAL): Likewise
(cpu_flags_and): Likewise.
(cpu_flags_or): Likewise.
(operand_type_and): Likewise.
(operand_type_or): Likewise.
(operand_type_xor): Likewise.
(cpu_flags_not): Inline and use switch instead of loop.
(cpu_flags_match): Updated.
(operand_type_match): Likewise.
(smallest_imm_type): Likewise.
(set_cpu_arch): Likewise.
(pt): Likewise.
(md_assemble): Likewise.
(parse_insn): Likewise.
(optimize_imm): Likewise.
(match_template): Likewise.
(process_suffix): Likewise.
(update_imm): Likewise.
(finalize_imm): Likewise.
(process_operands): Likewise.
(build_modrm_byte): Likewise.
(i386_immediate): Likewise.
(i386_displacement): Likewise.
(i386_index_check): Likewise.
(i386_operand): Likewise.
(i386_target_format): Likewise.
(intel_e11): Likewise.
(operand_type): Remove implicitregister.
(operand_type_check): Updated. Inline.
(cpu_flags_all_zero): Removed.
(operand_type_all_zero): Likewise.
(i386_array_biop): Likewise.
(cpu_flags_biop): Likewise.
(operand_type_biop): Likewise.
2007-09-09 02:49:25 +00:00
40fb982012
gas/
...
2007-09-08 H.J. Lu <hongjiu.lu@intel.com>
* configure.in (AC_CHECK_HEADERS): Add limits.h.
* configure: Regenerated.
* config.in: Likewise.
* config/tc-i386.c: Include "opcodes/i386-init.h".
(_i386_insn): Use i386_operand_type for types.
(cpu_arch_flags): Updated to new types with bitfield.
(cpu_arch_tune_flags): Likewise.
(cpu_arch_isa_flags): Likewise.
(cpu_arch): Likewise.
(i386_align_code): Likewise.
(set_code_flag): Likewise.
(set_16bit_gcc_code_flag): Likewise.
(set_cpu_arch): Likewise.
(md_assemble): Likewise.
(parse_insn): Likewise.
(process_operands): Likewise.
(output_branch): Likewise.
(output_jump): Likewise.
(parse_real_register): Likewise.
(mode_from_disp_size): Likewise.
(smallest_imm_type): Likewise.
(pi): Likewise.
(type_names): Likewise.
(pt): Likewise.
(pte): Likewise.
(swap_2_operands): Likewise.
(optimize_imm): Likewise.
(optimize_disp): Likewise.
(match_template): Likewise.
(check_string): Likewise.
(process_suffix): Likewise.
(check_byte_reg): Likewise.
(check_long_reg): Likewise.
(check_qword_reg): Likewise.
(check_word_reg): Likewise.
(finalize_imm): Likewise.
(build_modrm_byte): Likewise.
(output_insn): Likewise.
(disp_size): Likewise.
(imm_size): Likewise.
(output_disp): Likewise.
(output_imm): Likewise.
(gotrel): Likewise.
(i386_immediate): Likewise.
(i386_displacement): Likewise.
(i386_index_check): Likewise.
(i386_operand): Likewise.
(parse_real_register): Likewise.
(i386_intel_operand): Likewise.
(intel_e09): Likewise.
(intel_bracket_expr): Likewise.
(intel_e11): Likewise.
(cpu_arch_flags_not): New.
(cpu_flags_check_x64): Likewise.
(cpu_flags_all_zero): Likewise.
(cpu_flags_not): Likewise.
(i386_cpu_flags_biop): Likewise.
(cpu_flags_biop): Likewise.
(cpu_flags_match); Likewise.
(acc32): New.
(acc64): Likewise.
(control): Likewise.
(reg16_inoutportreg): Likewise.
(disp16): Likewise.
(disp32): Likewise.
(disp32s): Likewise.
(disp16_32): Likewise.
(anydisp): Likewise.
(baseindex): Likewise.
(regxmm): Likewise.
(imm8): Likewise.
(imm8s): Likewise.
(imm16): Likewise.
(imm32): Likewise.
(imm32s): Likewise.
(imm64): Likewise.
(imm16_32): Likewise.
(imm16_32s): Likewise.
(imm16_32_32s): Likewise.
(operand_type): Likewise.
(operand_type_check): Likewise.
(operand_type_match): Likewise.
(operand_type_register_match): Likewise.
(update_imm): Likewise.
(set_code_flag): Also update cpu_arch_flags_not.
(set_16bit_gcc_code_flag): Likewise.
(md_begin): Likewise.
(parse_insn): Use cpu_flags_check_x64 to check 64bit support.
Use cpu_flags_match to match instructions.
(i386_target_format): Update cpu_arch_isa_flags and
cpu_arch_tune_flags to i386_cpu_flags type with bitfield.
(smallest_imm_type): Check cpu_arch_tune to tune for i486.
(match_template): Don't initialize overlap0, overlap1,
overlap2, overlap3 and operand_types.
(process_suffix): Handle crc32 with 64bit register.
(MATCH): Removed.
(CONSISTENT_REGISTER_MATCH): Likewise.
* config/tc-i386.h (arch_entry): Updated to i386_cpu_flags
type.
opcodes/
2007-09-08 H.J. Lu <hongjiu.lu@intel.com>
* configure.in (AC_CHECK_HEADERS): Add limits.h.
* configure: Regenerated.
* config.in: Likewise.
* i386-gen.c: Include "sysdep.h" instead of <stdlib.h> and
<string.h>. Use xstrerror instead of strerror.
(initializer): New.
(cpu_flag_init): Likewise.
(bitfield): Likewise.
(BITFIELD): New.
(cpu_flags): Likewise.
(opcode_modifiers): Likewise.
(operand_types): Likewise.
(compare): Likewise.
(set_cpu_flags): Likewise.
(output_cpu_flags): Likewise.
(process_i386_cpu_flags): Likewise.
(output_opcode_modifier): Likewise.
(process_i386_opcode_modifier): Likewise.
(output_operand_type): Likewise.
(process_i386_operand_type): Likewise.
(set_bitfield): Likewise.
(operand_type_init): Likewise.
(process_i386_initializers): Likewise.
(process_i386_opcodes): Call process_i386_opcode_modifier to
process opcode_modifier. Call process_i386_operand_type to
process operand_types.
(process_i386_registers): Call process_i386_operand_type to
process reg_type.
(main): Check unused bits in i386_cpu_flags and i386_operand_type.
Sort cpu_flags, opcode_modifiers and operand_types. Call
process_i386_initializers.
* i386-init.h: New.
* i386-tbl.h: Regenerated.
* i386-opc.h: Include <limits.h>.
(CHAR_BIT): Define as 8 if not defined.
(Cpu186): Changed to position of bitfiled.
(Cpu286): Likewise.
(Cpu386): Likewise.
(Cpu486): Likewise.
(Cpu586): Likewise.
(Cpu686): Likewise.
(CpuP4): Likewise.
(CpuK6): Likewise.
(CpuK8): Likewise.
(CpuMMX): Likewise.
(CpuMMX2): Likewise.
(CpuSSE): Likewise.
(CpuSSE2): Likewise.
(Cpu3dnow): Likewise.
(Cpu3dnowA): Likewise.
(CpuSSE3): Likewise.
(CpuPadLock): Likewise.
(CpuSVME): Likewise.
(CpuVMX): Likewise.
(CpuSSSE3): Likewise.
(CpuSSE4a): Likewise.
(CpuABM): Likewise.
(CpuSSE4_1): Likewise.
(CpuSSE4_2): Likewise.
(Cpu64): Likewise.
(CpuNo64): Likewise.
(D): Likewise.
(W): Likewise.
(Modrm): Likewise.
(ShortForm): Likewise.
(Jump): Likewise.
(JumpDword): Likewise.
(JumpByte): Likewise.
(JumpInterSegment): Likewise.
(FloatMF): Likewise.
(FloatR): Likewise.
(FloatD): Likewise.
(Size16): Likewise.
(Size32): Likewise.
(Size64): Likewise.
(IgnoreSize): Likewise.
(DefaultSize): Likewise.
(No_bSuf): Likewise.
(No_wSuf): Likewise.
(No_lSuf): Likewise.
(No_sSuf): Likewise.
(No_qSuf): Likewise.
(No_xSuf): Likewise.
(FWait): Likewise.
(IsString): Likewise.
(RegKludge): Likewise.
(IsPrefix): Likewise.
(ImmExt): Likewise.
(NoRex64): Likewise.
(Rex64): Likewise.
(Ugh): Likewise.
(Reg8): Likewise.
(Reg16): Likewise.
(Reg32): Likewise.
(Reg64): Likewise.
(FloatReg): Likewise.
(RegMMX): Likewise.
(RegXMM): Likewise.
(Imm8): Likewise.
(Imm8S): Likewise.
(Imm16): Likewise.
(Imm32): Likewise.
(Imm32S): Likewise.
(Imm64): Likewise.
(Imm1): Likewise.
(BaseIndex): Likewise.
(Disp8): Likewise.
(Disp16): Likewise.
(Disp32): Likewise.
(Disp32S): Likewise.
(Disp64): Likewise.
(InOutPortReg): Likewise.
(ShiftCount): Likewise.
(Control): Likewise.
(Debug): Likewise.
(Test): Likewise.
(SReg2): Likewise.
(SReg3): Likewise.
(Acc): Likewise.
(FloatAcc): Likewise.
(JumpAbsolute): Likewise.
(EsSeg): Likewise.
(RegMem): Likewise.
(OTMax): Likewise.
(Reg): Commented out.
(WordReg): Likewise.
(ImplicitRegister): Likewise.
(Imm): Likewise.
(EncImm): Likewise.
(Disp): Likewise.
(AnyMem): Likewise.
(LLongMem): Likewise.
(LongMem): Likewise.
(ShortMem): Likewise.
(WordMem): Likewise.
(ByteMem): Likewise.
(CpuMax): New
(CpuLM): Likewise.
(CpuNumOfUints): Likewise.
(CpuNumOfBits): Likewise.
(CpuUnused): Likewise.
(OTNumOfUints): Likewise.
(OTNumOfBits): Likewise.
(OTUnused): Likewise.
(i386_cpu_flags): New type.
(i386_operand_type): Likewise.
(i386_opcode_modifier): Likewise.
(CpuSledgehammer): Removed.
(CpuSSE4): Likewise.
(CpuUnknownFlags): Likewise.
(Reg): Likewise.
(WordReg): Likewise.
(ImplicitRegister): Likewise.
(Imm): Likewise.
(EncImm): Likewise.
(Disp): Likewise.
(AnyMem): Likewise.
(LLongMem): Likewise.
(LongMem): Likewise.
(ShortMem): Likewise.
(WordMem): Likewise.
(ByteMem): Likewise.
(template): Use i386_cpu_flags for cpu_flags, use
i386_opcode_modifier for opcode_modifier, use
i386_operand_type for operand_types.
(reg_entry): Use i386_operand_type for reg_type.
* Makefile.am (HFILES): Add i386-init.h.
($(srcdir)/i386-init.h): New rule.
($(srcdir)/i386-tbl.h): Depend on $(srcdir)/i386-init.h
instead.
* Makefile.in: Regenerated.
2007-09-09 01:22:57 +00:00
26186d7440
gas/
...
2007-09-06 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (match_template): Handle invlpga, vmload,
vmrun and vmsave in SVME.
(process_suffix): Likewise.
gas/testsuite/
2007-09-06 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/svme.s: Updated to allow eax in 64bit.
* gas/i386/svme.d: Updated.
* gas/i386/svme64.d: Likewise.
opcodes/
2007-09-06 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.tbl: Correct SVME instructions to allow 32bit register
operand in 64bit mode.
* i386-tbl.h: Regenerated.
2007-09-06 12:28:12 +00:00
d946b91f67
2007-09-05 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (i386_index_check): Don't use RegRex
on the reg_type field.
(parse_real_register): Use `||' instead of `|'.
2007-09-05 13:36:14 +00:00
75178d9df6
2007-09-04 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (process_operands): Remove segment override
check on SVME instructions.
(i386_index_check): Remove memory operand check on SVME
instructions.
2007-09-04 14:44:35 +00:00
d9a5e5e5c9
gas/
...
2007-08-28 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (process_suffix): Handle cmpxchg8b in
Intel mode.
gas/testsuite/
2007-08-28 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/mem.s: New. Add tests for instructions with one
memory operand.
* gas/i386/x86-64-mem.s: Likewise.
* gas/i386/mem-intel.d: Updated.
* gas/i386/mem.d: Likewise.
* gas/i386/x86-64-mem-intel.d: Likewise.
* gas/i386/x86-64-mem.d: Likewise.
opcodes/
2007-08-28 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (Md): New.
(grps): Use 0 on invlpg. Use M on fxsave and fxrstor. Use
Md on ldmxcsr and stmxcsr. Use b_mode on clflush.
(OP_0fae): Clear bytemode for sfence.
2007-08-28 17:36:34 +00:00
67c11a9b99
* config/tc-i386.c (lex_got): Don't scan past a comma.
2007-08-24 04:18:37 +00:00
3992d3b7e2
PR gas/4079
...
* config/tc-i386.c (x86_cons): Complain about invalid @got etc.
expressions.
(i386_immediate): Detect and complain about more cases of
invalid immediate expressions. Return failure rather than
converting them to zero.
(i386_displacement): Likewise.
2007-08-17 14:12:43 +00:00
c3ad16c0cd
gas/
...
2007-08-09 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (check_byte_reg): Support pextrb and pinsrb.
gas/testsuite/
2007-08-09 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run sse4_1-intel, sse4_2-intel,
x86-64-sse4_1-intel and x86-64-sse4_2-intel.
* gas/i386/sse4_1-intel.d: New file.
* gas/i386/sse4_2-intel.d: Likewise.
* gas/i386/x86-64-sse4_1-intel.d: Likewise.
* gas/i386/x86-64-sse4_2-intel.d: Likewise.
* gas/i386/sse4_1.s: Add tests for Intel syntax.
* gas/i386/sse4_2.s: Likewise.
* gas/i386/x86-64-sse4_1.s: Likewise.
* gas/i386/x86-64-sse4_2.s: Likewise.
* gas/i386/sse4_1.d: Updated.
* gas/i386/sse4_2.d: Likewise.
* gas/i386/x86-64-sse4_1.d: Likewise.
* gas/i386/x86-64-sse4_2.d: Likewise.
opcodes/
2007-08-09 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.tbl: Add NoRex64 to pmovsxbw, pmovsxwd, pmovsxdq,
pmovzxbw, pmovzxwd, pmovzxdq and roundsd.
* i386-tbl.h: Regenerated.
2007-08-09 13:50:51 +00:00
34828aad95
gas/
...
2007-07-29 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (check_long_reg): Allow cvtss2si to convert
DWORD memory to Reg64 in Intel synax.
(check_qword_reg): Allow cvtsd2si to convert QWORD memory to
Reg32 in Intel syntax.
gas/testsuite/
2007-07-29 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/simd.s: Add tests for cvtss2si/cvtsd2si in Intel
mode.
* gas/i386/x86-64-simd.s: Likewise.
* gas/i386/simd-intel.d: Updated.
* gas/i386/simd.d: Likewise.
* gas/i386/x86-64-simd-intel.d: Likewise.
* gas/i386/x86-64-simd.d: Likewise.
2007-07-29 18:27:59 +00:00
76bc74dc40
gas/
...
2007-07-23 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (cpu_arch): Change i386 to PROCESSOR_I386.
(f32_15): Removed.
(jump_31): New.
(f32_patt): Remove f32_15.
(f16_patt): Likewise.
(i386_align_code): Updated to alt_long_patt for 64bit by
default.
* config/tc-i386.h (processor_type): Add PROCESSOR_I386.
2007-07-23 Evandro Menezes <evandro.menezes@amd.com>
* config/tc-i386.c (i386_align_code): Enable alignment up to
MAX_MEM_FOR_RS_ALIGN_CODE bytes. Remove special treatment
for K8.
* config/tc-i386.h (MAX_MEM_FOR_RS_ALIGN_CODE): Changed to
31.
gas/testsuite/
2007-07-23 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run nops16-1, nops-1-i386-i686, nops-1-k8,
nops-3-i386, nops-4, nops-4-i386, x86-64-nops-2, x86-64-nops-3,
x86-64-nops-4, x86-64-nops-4-core2 and x86-64-nops-4-k8.
* gas/i386/nops-1-i386-i686.d: New.
* gas/i386/nops-1-k8.d: Likewise.
* gas/i386/nops-3-i386.d : Likewise.
* gas/i386/nops-3-i686.d: Likewise.
* gas/i386/nops-4-i386.d: Likewise.
* gas/i386/nops-4.d: Likewise.
* gas/i386/nops16-1.d: Likewise.
* gas/i386/nops16-1.s: Likewise.
* gas/i386/x86-64-nops-1-k8.d: Likewise.
* gas/i386/x86-64-nops-2.d: Likewise.
* gas/i386/x86-64-nops-3.d: Likewise.
* gas/i386/x86-64-nops-4-core2.d: Likewise.
* gas/i386/x86-64-nops-4-k8.d: Likewise.
* gas/i386/x86-64-nops-4.d: Likewise.
* gas/i386/nops-1-i386.d: Updated.
* gas/i386/nops-1-i686.d: Likewise.
* gas/i386/nops-1.d: Likewise.
* gas/i386/nops-2-i386.d: Likewise.
* gas/i386/nops-2-merom.d : Likewise.
* gas/i386/nops-2.d: Likewise.
* gas/i386/nops-3.d: Likewise.
* gas/i386/x86-64-nops-1-merom.d: Likewise.
* gas/i386/x86-64-nops-1-nocona.d: Likewise.
* gas/i386/x86-64-nops-1.d: Likewise.
* gas/i386/x86-64-nops-1.s: Removed.
2007-07-23 Evandro Menezes <evandro.menezes@amd.com>
H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Don't run x86-64-nops-1-k8. Run
nops-3-i686 and nops-4-i686.
* gas/i386/nops-3-i686.d: New.
* gas/i386/nops-4-i686.d: Likewise.
* gas/i386/nops-4.s: Likewise.
* gas/i386/x86-64-nops-1-k8.d: Removed.
2007-07-23 20:03:23 +00:00
872ce6ff99
gas/
...
2007-07-04 H.J. Lu <hongjiu.lu@intel.com>
* config/obj-coff.h (x86_64_target_format): Renamed to ...
(i386_target_format): This
(TARGET_FORMAT): Use i386_target_format.
* config/tc-i386.c (x86_64_target_format): Removed.
(i386_target_format): Handle PE formats.
gas/testsuite/
2007-07-04 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run x86-64-nops-1 for x86_64-*-mingw*.
2007-07-04 15:32:46 +00:00
ec2655a6a7
Switch to GPLv3
2007-07-03 11:01:12 +00:00
5f15756d11
gas/
...
2007-06-25 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (process_operands): Replace regKludge
with RegKludge.
opcodes/
2007-06-25 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.h (regKludge): Renamed to ...
(RegKludge): This.
* i386-opc.c (i386_optab): Replace regKludge with RegKludge.
2007-06-25 21:20:20 +00:00
e205caa764
2007-06-22 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (disp_size): New.
(imm_size): Likewise.
(output_disp): Use disp_size and imm_size.
(output_imm): Use imm_size.
2007-06-22 14:15:51 +00:00
0787a12d29
PR gas/4460
...
* config/tc-i386.c (lex_got): Don't replace the reloc token with
a space if we already have a space.
2007-05-04 00:02:47 +00:00
20592a94ff
gas/
...
2007-05-03 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (match_template): Don't explicitly check
suffix for crc32 in Intel mode.
(process_suffix): Issue an error for crc32 if the operand size
is ambiguous.
gas/testsuite/
2007-05-03 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/crc32-intel.d: Updated.
* gas/i386/crc32.d: Likewise.
* gas/i386/sse4_2.d: Likewise.
* gas/i386/x86-64-crc32-intel.d: Likewise.
* gas/i386/x86-64-crc32.d: Likewise.
* gas/i386/x86-64-sse4_2.d: Likewise.
* gas/i386/crc32.s: Remove crc32 instructions with ambiguous
operand size and suffix in crc32 instructions in Intel mode.
* gas/i386/x86-64-crc32.s: Likewise.
* gas/i386/sse4_2.s: Remove crc32 instructions with ambiguous
operand size.
* gas/i386/x86-64-sse4_2.s: Likewise.
* gas/i386/i386.exp: Run inval-crc32 and x86-64-inval-crc32.
* gas/i386/inval-crc32.l: New.
* gas/i386/inval-crc32.s: Likewise.
* gas/i386/x86-64-inval-crc32.l: Likewise.
* gas/i386/x86-64-inval-crc32.s: Likewise.
opcodes/
2007-05-03 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (CRC32_Fixup): Don't print suffix in Intel mode.
* i386-opc.c (i386_optab): Remove IgnoreSize and correct operand
type for crc32.
2007-05-03 21:07:16 +00:00
9344ff2951
gas/config/
...
2007-05-01 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (match_template): Check suffix for crc32 in
Intel mdoe.
(process_suffix): Default the suffix of 8bit crc32 to
BYTE_MNEM_SUFFIX.
(check_byte_reg): Skip check for 8bit crc32.
gas/testsuite/
2007-05-01 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/crc32-intel.d: New file.
* gas/i386/crc32.d:Likewise.
* gas/i386/crc32.s:Likewise.
* gas/i386/x86-64-crc32-intel.d:Likewise.
* gas/i386/x86-64-crc32.d:Likewise.
* gas/i386/x86-64-crc32.s:Likewise.
* gas/i386/i386.exp: Run crc32, crc32-intel, x86-64-crc32
and x86-64-crc32-intel.
opcodes/
2007-05-01 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (CRC32_Fixup): Properly handle Intel mode and
check data size prefix in 16bit mode.
* i386-opc.c (i386_optab): Default crc32 to non-8bit and
support Intel mode.
2007-05-01 12:59:24 +00:00
a540244da6
2007-04-30 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (md_assemble): Use register_prefix in
error/warning message.
(check_byte_reg): Likewise.
(check_long_reg): Likewise.
(check_qword_reg): Likewise.
(check_word_reg): Likewise.
(process_operands): Likewise.
2007-04-30 13:42:40 +00:00
db55703487
gas/
...
* expr.c (expr): Assert on rankarg, not rank which can be unsigned.
* read.c (read_a_source_file): Remove buffer_limit[-1] assertion.
Don't skip over NUL char.
(pseudo_set): Set X_op for registers to O_register.
* symbols.c (symbol_clone): Remove assertion that sym is defined.
(resolve_symbol_value): Resolve O_register symbols.
* config/tc-i386.c (parse_real_register): Don't use i386_float_regtab.
Instead find st(0) by hash lookup.
* config/tc-ppc.c (ppc_macro): Warning fix.
opcodes/
* i386-opc.c (i386_float_regtab, i386_float_regtab_size): Delete.
Move contents to..
(i386_regtab): ..here.
* i386-opc.h (i386_float_regtab, i386_float_regtab_size): Delete.
2007-04-21 06:54:57 +00:00
381d071fc5
gas/
...
2007-04-18 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (cpu_arch): Add .sse4.2 and .sse4.
(match_template): Handle operand size for crc32 in SSE4.2.
(process_suffix): Handle operand type for crc32 in SSE4.2.
(output_insn): Support SSE4.2.
gas/testsuite/
2007-04-18 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Add sse4.2 and x86-64-sse4.2.
* gas/i386/sse4_2.d: New file.
* gas/i386/sse4_2.s: Likewise.
* gas/i386/x86-64-sse4_2.d: Likewise.
* gas/i386/x86-64-sse4_2.s: Likewise.
opcodes/
2007-04-18 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (CRC32_Fixup): New.
(PREGRP85, PREGRP86, PREGRP87, PREGRP88, PREGRP89, PREGRP90,
PREGRP91): New.
(threebyte_0x38_uses_DATA_prefix): Updated for SSE4.2.
(threebyte_0x3a_uses_DATA_prefix): Likewise.
(prefix_user_table): Add PREGRP85, PREGRP86, PREGRP87,
PREGRP88, PREGRP89, PREGRP90 and PREGRP91.
(three_byte_table): Likewise.
* i386-opc.c (i386_optab): Add SSE4.2 opcodes.
* gas/config/tc-i386.h (CpuSSE4_2): New.
(CpuSSE4): Likewise.
(CpuUnknownFlags): Add CpuSSE4_2.
2007-04-18 16:15:55 +00:00
42903f7f59
gas/
...
2007-04-18 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (cpu_arch): Add .sse4.1.
(process_operands): Adjust implicit operand for blendvpd,
blendvps and pblendvb in SSE4.1.
(output_insn): Support SSE4.1.
gas/testsuite/
2007-04-18 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Add sse4.1 and x86-64-sse4.1.
* gas/i386/sse4_1.d: New file.
* gas/i386/sse4_1.s: Likewise.
* gas/i386/x86-64-sse4_1.d: Likewise.
* gas/i386/x86-64-sse4_1.s: Likewise.
opcodes/
2007-04-18 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (XMM_Fixup): New.
(Edqb): New.
(Edqd): New.
(XMM0): New.
(dqb_mode): New.
(dqd_mode): New.
(PREGRP39 ... PREGRP85): New.
(threebyte_0x38_uses_DATA_prefix): Updated for SSE4.
(threebyte_0x3a_uses_DATA_prefix): Likewise.
(prefix_user_table): Add PREGRP39 ... PREGRP85.
(three_byte_table): Likewise.
(putop): Handle 'K'.
(intel_operand_size): Handle dqb_mode, dqd_mode):
(OP_E): Likewise.
(OP_G): Likewise.
* i386-opc.c (i386_optab): Add SSE4.1 opcodes.
* i386-opc.h (CpuSSE4_1): New.
(CpuUnknownFlags): Add CpuSSE4_1.
(regKludge): Update comment.
2007-04-18 16:13:15 +00:00
f6bee0627d
2007-03-30 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (process_suffix): Reindent a bit.
2007-03-30 16:28:33 +00:00
e72cf3ec8e
gas/
...
2007-03-28 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (build_modrm_byte): For instructions with 2
register operands, encode destination in i.rm.regmem if its
RegMem bit is set.
opcodes/
2007-03-28 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.c (i386_optab): Change InvMem to RegMem for mov and
movq. Remove InvMem from sldt, smsw and str.
* i386-opc.h (InvMem): Renamed to ...
(RegMem): Update comments.
(AnyMem): Remove InvMem.
2007-03-29 04:27:54 +00:00
0003779b5d
gas/
...
2003-03-23 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (md_begin): Allow '.' in mnemonic.
gas/testsuite/
2003-03-23 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/rex.s: Add tests for rex.WRXB.
* gas/i386/rex.d: Updated.
* gas/i386/rex.d: Replace rex64XYZ with rex.WRXB.
* gas/i386/x86-64-io-intel.d : Likewise.
* gas/i386/x86-64-io-suffix.d: Likewise.
* gas/i386/x86-64-io.d: Likewise.
* gas/i386/x86-64-opcode.d: Likewise.
opcodes/
2003-03-23 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (prefix_name): Replace rex64XYZ with rex.WRXB.
* i386-opc.c (i386_optab): Add rex.wrxb.
2007-03-23 16:17:21 +00:00
13a1e313c9
2003-03-21 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (process_suffix): Check 0x90 instead of
xchg for xchg %rax,%rax.
2007-03-22 00:27:14 +00:00
161a04f630
gas/
...
2003-03-21 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c: Replace REX_MODE64, REX_EXTX, REX_EXTY
and REX_EXTZ with REX_W, REX_R, REX_X and REX_B respectively.
include/opcode/
2003-03-21 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (REX_MODE64): Renamed to ...
(REX_W): This.
(REX_EXTX): Renamed to ...
(REX_R): This.
(REX_EXTY): Renamed to ...
(REX_X): This.
(REX_EXTZ): Renamed to ...
(REX_B): This.
opcodes/
2003-03-21 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (REX_MODE64): Remove definition.
(REX_EXTX): Likewise.
(REX_EXTY): Likewise.
(REX_EXTZ): Likewise.
(USED_REX): Use REX_OPCODE instead of 0x40.
Replace REX_MODE64, REX_EXTX, REX_EXTY and REX_EXTZ with REX_W,
REX_R, REX_X and REX_B respectively.
2007-03-21 21:23:44 +00:00
8b38ad713b
gas/
...
2003-03-21 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/4218
* config/tc-i386.c (match_template): Properly handle 64bit mode
"xchg %eax, %eax".
gas/testsuite/
2003-03-21 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/4218
* gas/i386/nops.s: Add testcases for nop r/m.
* gas/i386/x86-64-nops.s: Likewise.
* gas/i386/x86-64-opcode.s: Add testcases for xchg with %ax,
%eax and %rax.
* gas/i386/nops.d: Updated.
* gas/i386/x86-64-nops.d: Likewise.
* gas/i386/x86-64-opcode.d: Likewise.
opcodes/
2003-03-21 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/4218
* i386-dis.c (PREGRP38): New.
(dis386): Use PREGRP38 for 0x90.
(prefix_user_table): Add PREGRP38.
(print_insn): Set uses_REPZ_prefix to 1 for pause.
(NOP_Fixup1): Properly handle REX bits.
(NOP_Fixup2): Likewise.
* i386-opc.c (i386_optab): Allow %eax with xchg in 64bit.
Allow register with nop.
2007-03-21 20:45:14 +00:00
1d5f2fe90d
2007-03-21 H.J. Lu <hongjiu.lu@intel.com>
...
* Makefile.am: Run dep-am.
* Makefile.in: Regenerated.
* config/tc-i386.c: Don't include "opcodes/i386-opc.h".
* config/tc-i386.h: Include "opcodes/i386-opc.h".
(NOP_OPCODE): Removed.
(template): Likewise.
2007-03-21 15:37:21 +00:00
c3fe08facb
gas/
...
2007-03-15 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (md_begin): Use i386_regtab_size to scan
i386_regtab.
(parse_register): Use i386_regtab_size instead of ARRAY_SIZE
on i386_regtab.
opcodes/
2007-03-15 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.c: Include "libiberty.h".
(i386_regtab): Remove the last entry.
(i386_regtab_size): New.
(i386_float_regtab_size): Likewise.
* i386-opc.h (i386_regtab_size): New.
(i386_float_regtab_size): Likewise.
2007-03-15 17:30:31 +00:00
0b1cf022c8
gas/
...
2007-03-15 H.J. Lu <hongjiu.lu@intel.com>
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerated.
* config/tc-i386.c: Include "opcodes/i386-opc.h" instead of
"opcode/i386.h".
(md_begin): Check reg_name != NULL for the last entry in
i386_regtab.
* config/tc-i386.h: Move many entries to opcode/i386.h and
opcodes/i386-opc.h.
* configure.in (need_opcodes): Set true for i386.
* configure: Regenerated.
include/opcode/
2007-03-15 H.J. Lu <hongjiu.lu@intel.com>
* i386.h: Add entries from config/tc-i386.h and move tables
to opcodes/i386-opc.h.
opcodes/
2007-03-15 H.J. Lu <hongjiu.lu@intel.com>
* Makefile.am (CFILES): Add i386-opc.c.
(ALL_MACHINES): Add i386-opc.lo.
Run "make dep-am".
* Makefile.in: Regenerated.
* configure.in: Add i386-opc.lo for bfd_i386_arch.
* configure: Regenerated.
* i386-dis.c: Include "opcode/i386.h".
(MAXLEN): Renamed to MAX_MNEM_SIZE. Remove definition.
(FWAIT_OPCODE): Remove definition.
(UNIXWARE_COMPAT): Renamed to SYSV386_COMPAT. Remove definition.
(MAX_OPERANDS): Remove definition.
* i386-opc.c: New file.
* i386-opc.h: Likewise.
2007-03-15 14:31:24 +00:00
8a2ed48987
2007-03-12 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (md_assemble): Use Opcode_XXX instead of XXX
on i.tm.base_opcode.
(match_template): Likewise.
(process_operands): Use ~0x3 mask to match MOV_AX_DISP32.
* config/tc-i386.h (Opcode_D): New.
(Opcode_FloatR): Likewise.
(Opcode_FloatD): Likewise.
(D): Redefined.
(W): Likewise.
(FloatMF): Likewise.
(FloatR): Likewise.
(FloatD): Likewise.
2007-03-12 21:36:23 +00:00
4eed87de48
gas/
...
* config/tc-i386.h (Seg2ShortForm, Seg3ShortForm): Delete.
* config/tc-i386.c: Wrap overly long lines, whitespace fixes.
(process_operands): Move old Seg2ShortForm and Seg3ShortForm
code, and test for these insns using a combination of
opcode_modifier and operand_types.
include/opcode/
* i386.h (i386_optab): Replace all occurrences of Seg2ShortForm
and Seg3ShortFrom with Shortform.
2007-02-13 23:23:54 +00:00
4d456e3dc5
2076-01-28 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (swap_imm_operands): Renamed to ...
(swap_2_operands): This. Take 2 ints.
(md_assemble): Updated.
(swap_operands): Call swap_2_operands to swap 2 operands.
2007-01-28 16:14:33 +00:00
99018f420a
2007-01-13 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (build_modrm_byte): Check number of operands
when procssing memory/register operand.
2007-01-13 16:48:00 +00:00
e4a3b5a47e
2007-01-05 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (set_intel_syntax): Update set_intel_syntax
depending on allow_naked_reg.
2007-01-05 14:55:44 +00:00
2ca3ace5aa
2007-01-04 H.J. Lu <hongjiu.lu@intel.com>
...
PR gas/3826
* config/tc-i386.c (register_prefix): New.
(set_intel_syntax): Set set_intel_syntax to "" if register
prefix is needed.
(check_byte_reg): Use register_prefix for error message.
(check_long_reg): Likewise.
(check_qword_reg): Likewise.
(check_word_reg): Likewise.
2007-01-04 18:03:31 +00:00
b7c61d9abb
2007-01-03 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (swap_operands): Remove branches.
2007-01-04 05:35:52 +00:00
4dc856073a
2007-01-03 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c: Update copyright year.
* config/tc-i386.h: Likewise.
2007-01-03 22:54:45 +00:00
1509aa9a58
2007-01-03 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (smallest_imm_type): Return unsigned int
instead of int.
2007-01-03 22:48:52 +00:00
e3bb37b525
2007-01-03 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c: Convert to ISO C90 formatting
* config/tc-i386.h: Likewise.
2007-01-03 22:36:19 +00:00
751d281c74
2006-12-30 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (md_show_usage): Mention --32/--64.
2006-12-30 18:37:29 +00:00
c81128dcdf
gas/
...
2006-12-29 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (build_modrm_byte): Handle shift count
register with 3 operands.
gas/testsuite/
2006-12-29 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/intel.s: Add tests for "shrd %cl,%edx,%eax" and
"shld %cl,%edx,%eax".
* gas/i386/opcode.s: Likewise.
* gas/i386/intel.d: Updated.
* gas/i386/opcode-intel.d: Likewise.
* gas/i386/opcode-suffix.d: Likewise.
* gas/i386/opcode.d: Likewise.
2006-12-29 21:48:48 +00:00
cab737b91f
2006-12-28 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (process_operands): Check i.reg_operands
and increment i.operands when adding a register operand.
(build_modrm_byte): Fix 4 operand instruction handling.
2006-12-29 06:02:04 +00:00
31b2323cf7
2006-12-27 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (disp_expressions): Use MAX_MEMORY_OPERANDS
for array size instead of 2.
(im_expressions): Use MAX_IMMEDIATE_OPERANDS for for array size
instead of 2.
(i386_immediate): Update immediate operand overflow error
message.
(i386_displacement): Check displacement operand overflow.
2006-12-28 07:09:16 +00:00
b534c6d307
2006-12-27 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c: Document tc-i386.c, not i386.c.
2006-12-27 18:34:08 +00:00
70e41adeb3
2006-12-26 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (i386_immediate): Remove prototype.
2006-12-26 23:42:11 +00:00
2a962e6dd3
2006-12-15 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c: Add a blank line bewteen function bodies.
2006-12-15 19:43:59 +00:00
fc225355e8
2006-12-15 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (build_modrm_byte): Reformat to 72 columns.
2006-12-15 14:09:22 +00:00
d1cbb4db76
2006-12-14 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (match_template): Simplify 3 and 4 operand
match.
2006-12-14 13:28:24 +00:00
71903a11b9
2006-12-13 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (build_modrm_byte): Set the Operand_PCrel
bit only.
2006-12-13 19:39:12 +00:00
a5c311ca76
2006-12-13 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (match_template): Use a for loop to set
operand_types array.
2006-12-13 18:26:30 +00:00
f48ff2ae3d
gas/
...
2006-12-13 H.J. Lu <hongjiu.lu@intel.com>
PR gas/3712
* config/tc-i386.c (match_template): Use MAX_OPERANDS for the
number of operands. Issue an error if MAX_OPERANDS != 4. Add
the 4th operand check.
gas/testsuite/
2006-12-13 H.J. Lu <hongjiu.lu@intel.com>
PR gas/3712
* gas/i386/inval.s: Add invalid insertq.
* gas/i386/x86-64-inval.s: Likewise.
* gas/i386/inval.l: Updated.
* gas/i386/x86-64-inval.l: Likewise.
2006-12-13 18:00:00 +00:00
b7d9ef3748
gas/
...
2006-11-08 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.h (CpuPNI): Removed.
(CpuUnknownFlags): Replace CpuPNI with CpuSSE3.
* config/tc-i386.c (md_assemble): Likewise.
include/opcode/
2006-11-08 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (i386_optab): Replace CpuPNI with CpuSSE3.
2006-11-08 19:56:02 +00:00
8620418b9c
* config/tc-i386.c (md_parse_option): Use CONST_STRNEQ.
...
(x86_64_section_letter): Likewise.
2006-10-20 00:32:43 +00:00
ef05d49568
gas/
...
2006-09-28 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.h (CpuMNI): Renamed to ...
(CpuSSSE3): This.
(CpuUnknownFlags): Updated.
(processor_type): Replace PROCESSOR_YONAH with PROCESSOR_CORE
and PROCESSOR_MEROM with PROCESSOR_CORE2.
* config/tc-i386.c: Updated.
* doc/c-i386.texi: Likewise.
* config/tc-i386.c (cpu_arch): Add ".ssse3", "core" and "core2".
include/opcode/
2006-09-28 H.J. Lu <hongjiu.lu@intel.com>
* i386.h: Replace CpuMNI with CpuSSSE3.
2006-09-28 14:06:36 +00:00
539e75adb5
gas/
...
2006-09-23 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/3235
* config/tc-i386.c (match_template): Check address size prefix
to turn Disp64/Disp32/Disp16 operand into Disp32/Disp16/Disp32
operand.
gas/testsuite/
2006-09-23 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/3235
* gas/i386/addr16.d: New file.
* gas/i386/addr16.s: Likewise.
* gas/i386/addr32.d: Likewise.
* gas/i386/addr32.s: Likewise.
* gas/i386/i386.exp: Add "addr16" and "addr32".
* gas/i386/x86-64-addr32.s: Add tests for "add32 mov".
* gas/i386/x86-64-addr32.d: Updated.
opcodes/
2006-09-23 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/3235
* i386-dis.c (OP_OFF64): Get 32bit offset if there is an
address size prefix.
2006-09-23 23:10:14 +00:00
99ad839030
Add x86_64-mingw64 target
2006-09-20 11:35:11 +00:00
9d7cbccda0
PR binutils/2983
...
* bfd/elf64-x86-64.c: Add FreeBSD support.
(elf64_x86_64_fbsd_post_process_headers): New function.
* bfd/targets.c (_bfd_target_vector): Add bfd_elf64_x86_64_freebsd_vec.
* bfd/config.bfd (x64_64-*-freebsd*): Add bfd_elf64_x86_64_freebsd_vec to the targ_selvecs.
* bfd/configure.in: Add entry for bfd_elf64_x86_64_freebsd_vec.
* bfd/configure: Regenerate.
* gas/config/tc-i386.c (md_parse_option): Treat any target starting with elf64_x86_64 as a viable target for the -64 switch.
(i386_target_format): For 64-bit ELF flavoured output use ELF_TARGET_FORMAT64.
* gas/config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
* ld/emulparams/elf_x86_64_fbsd.sh (OUTPUT_FORMAT): Define as elf64-x86-64-freebsd.
2006-08-02 16:25:14 +00:00
cfde7f7078
gas/
...
2006-08-01 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (md_assemble): Don't update
cpu_arch_isa_flags.
gas/testsuite/
2006-08-01 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/nops-2-i386.d: Updated.
* gas/i386/nops-2-merom.d: Likewise.
* gas/i386/nops-2.d: Likewise.
2006-08-01 17:54:28 +00:00
d32cad6576
2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
CpuAmdFam10.
(smallest_imm_type): Remove Cpu086.
(i386_target_format): Likewise.
* config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
Update CpuXXX.
2006-07-15 16:32:48 +00:00
050dfa73de
Add amdfam10 instructions
2006-07-13 22:25:48 +00:00
ccc9c02779
gas/
...
2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (cpu_arch_tune_set): New.
(cpu_arch_isa): Likewise.
(i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
nops with short or long nop sequences based on -march=/.arch
and -mtune=.
(set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
set cpu_arch_tune and cpu_arch_tune_flags.
(md_parse_option): For -march=, set cpu_arch_isa and set
cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
0. Set cpu_arch_tune_set to 1 for -mtune=.
(i386_target_format): Don't set cpu_arch_tune.
gas/testsuite/
2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run nops-1, nops-1-i386, nops-1-i686,
nops-1-merom, nops-2, nops-2-i386, nops-2-merom, x86-64-nops-1,
x86-64-nops-1-k8, x86-64-nops-1-nocona and x86-64-nops-1-merom.
* gas/i386/nops-1.s: New file.
* gas/i386/nops-2.s: Likewise.
* gas/i386/nops-1-i386.d: Likewise.
* gas/i386/nops-1-i686.d: Likewise.
* gas/i386/nops-1-merom.d: Likewise.
* gas/i386/nops-1.d: Likewise.
* gas/i386/nops-2-i386.d: Likewise.
* gas/i386/nops-2-merom.d: Likewise.
* gas/i386/nops-2.d: Likewise.
* gas/i386/x86-64-nops-1.s: Likewise.
* gas/i386/x86-64-nops-1-k8.d: Likewise.
* gas/i386/x86-64-nops-1-merom.d: Likewise.
* gas/i386/x86-64-nops-1-nocona.d: Likewise.
* gas/i386/x86-64-nops-1.d: Likewise.
* gas/i386/sse2.d: Updated to expect xchg %ax,%ax as 2 byte
nop.
2006-06-23 21:47:36 +00:00
9103f4f44a
2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.h (processor_type): New.
(arch_entry): Add type.
* config/tc-i386.c (cpu_arch_tune): New.
(cpu_arch_tune_flags): Likewise.
(cpu_arch_isa_flags): Likewise.
(cpu_arch): Updated.
(set_cpu_arch): Also update cpu_arch_isa_flags.
(md_assemble): Update cpu_arch_isa_flags.
(OPTION_MARCH): New.
(OPTION_MTUNE): Likewise.
(md_longopts): Add -march= and -mtune=.
(md_parse_option): Support -march= and -mtune=.
(md_show_usage): Add -march=CPU/-mtune=CPU.
(i386_target_format): Also update cpu_arch_isa_flags,
cpu_arch_tune and cpu_arch_tune_flags.
* doc/as.texinfo: Add -march=CPU/-mtune=CPU.
* doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
2006-06-16 15:46:11 +00:00
46e883c5a9
gas/
...
2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (process_suffix): Don't add rex64 for
"xchg %rax,%rax".
gas/testsuite/
2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/opcode.s: Add "xchg %ax,%ax".
* gas/i386/opcode.d: Updated.
* gas/i386/x86-64-opcode.s: Add xchg %ax,%ax, xchg %eax,%eax,
xchg %rax,%rax, rex64 xchg %rax,%rax and xchg %rax,%r8.
* gas/i386/x86-64-opcode.d: Updated.
include/opcode/
2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (i386_optab): Update comment for 64bit NOP.
opcodes/
2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (NOP_Fixup): Removed.
(NOP_Fixup1): New.
(NOP_Fixup2): Likewise.
(dis386): Use NOP_Fixup1 and NOP_Fixup2 on 0x90.
2006-06-12 18:55:44 +00:00
1df69f4f6c
* config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
...
Un-constify string argument.
* config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
Likewise.
* config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
Likewise.
* config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
Likewise.
* config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
Likewise.
* config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
Likewise.
* config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
Likewise.
-------------------------------------------------------------------
2006-05-19 11:26:11 +00:00
2d545b822e
2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
...
Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (output_invalid_buf): Change size for
unsigned char.
* config/tc-tic30.c (output_invalid_buf): Likewise.
* config/tc-i386.c (output_invalid): Cast none-ascii char to
unsigned char.
* config/tc-tic30.c (output_invalid): Likewise.
2006-05-02 14:24:03 +00:00
f9f21a03c5
2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (output_invalid_buf): Change size to 16.
* config/tc-tic30.c (output_invalid_buf): Likewise.
* config/tc-i386.c (output_invalid): Use snprintf instead of
sprintf.
* config/tc-ia64.c (declare_register_set): Likewise.
(emit_one_bundle): Likewise.
(check_dependencies): Likewise.
* config/tc-tic30.c (output_invalid): Likewise.
2006-05-02 13:34:26 +00:00
708587a480
* config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
...
config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
2006-04-23 22:12:43 +00:00
bb8f592040
gas/
...
2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
PR gas/2533
* config/tc-i386.c (i386_immediate): Check illegal immediate
register operand.
gas/testsuite/
2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
PR gas/2533
* gas/i386/inval.s: Add test for illegal immediate register
operand.
* gas/i386/inval.l: Updated.
2006-04-18 17:52:37 +00:00
64e7447423
* config/tc-i386.c: Formatting.
...
(output_disp, output_imm): ISO C90 params.
2006-04-18 10:11:09 +00:00
45aa61fe2e
PR 2512.
...
* config/tc-i386.c (match_template): Move 64-bit operand tests
inside loop.
2006-04-07 06:40:57 +00:00
7b81dfbbf9
Patch by matz@suse.de:
...
bfd/ChangeLog:
* reloc.c: Add BFD_RELOC_X86_64_GOT64, BFD_RELOC_X86_64_GOTPCREL64,
BFD_RELOC_X86_64_GOTPC64, BFD_RELOC_X86_64_GOTPLT64,
BFD_RELOC_X86_64_PLTOFF64.
* bfd-in2.h: Regenerated.
* libbfd.h: Regenerated.
* elf64-x86-64.c (x86_64_elf_howto_table): Correct comment.
Add howtos for above relocs.
(x86_64_reloc_map): Add mappings for new relocs.
(elf64_x86_64_check_relocs): R_X86_64_GOT64, R_X86_64_GOTPCREL64,
R_X86_64_GOTPLT64 need a got entry. R_X86_64_GOTPLT64 also a PLT
entry. R_X86_64_GOTPC64 needs a .got section. R_X86_64_PLTOFF64
needs a PLT entry.
(elf64_x86_64_gc_sweep_hook): Reflect changes from
elf64_x86_64_check_relocs for the new relocs.
(elf64_x86_64_relocate_section): Handle new relocs.
gas/ChangeLog:
* config/tc-i386.c (type_names): Correct placement of 'static'.
(reloc): Map some more relocs to their 64 bit counterpart when
size is 8.
(output_insn): Work around breakage if DEBUG386 is defined.
(output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
different from i386.
(output_imm): Ditto.
(lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
Imm64.
(md_convert_frag): Jumps can now be larger than 2GB away, error
out in that case.
(tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
gas/testsuite/ChangeLog:
* gas/i386/reloc64.s: Accept 64-bit forms.
* gas/i386/reloc64.d: Adjust.
* gas/i386/reloc64.l: Adjust.
include/ChangeLog:
* elf/x86-64.h: Add the new relocations with their official
numbers.
2006-03-23 08:23:09 +00:00
331d2d0d9c
gas/
...
2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
* gas/config/tc-i386.c (output_insn): Support Intel Merom New
Instructions.
* gas/config/tc-i386.h (CpuMNI): New.
(CpuUnknownFlags): Add CpuMNI.
gas/testsuite/
2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Add merom and x86-64-merom.
* gas/i386/merom.d: New file.
* gas/i386/merom.s: Likewise.
* gas/i386/x86-64-merom.d: Likewise.
* gas/i386/x86-64-merom.s: Likewise.
include/opcode/
2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (i386_optab): Support Intel Merom New Instructions.
opcodes/
2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
Intel Merom New Instructions.
(THREE_BYTE_0): Likewise.
(THREE_BYTE_1): Likewise.
(three_byte_table): Likewise.
(dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
THREE_BYTE_1 for entry 0x3a.
(twobyte_has_modrm): Updated.
(twobyte_uses_SSE_prefix): Likewise.
(print_insn): Handle 3-byte opcodes used by Intel Merom New
Instructions.
2006-02-27 15:35:37 +00:00
67a4f2b710
include/elf/ChangeLog:
...
Introduce TLS descriptors for i386 and x86_64.
* common.h (DT_TLSDESC_GOT, DT_TLSDESC_PLT): New.
* i386.h (R_386_TLS_GOTDESC, R_386_TLS_DESC_CALL, R_386_TLS_DESC):
New.
* x86-64.h (R_X86_64_GOTPC32_TLSDESC, R_X86_64_TLSDESC_CALL,
R_X86_64_TLSDESC): New.
bfd/ChangeLog:
Introduce TLS descriptors for i386 and x86_64.
* reloc.c (BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC,
BFD_RELOC_386_TLS_DESC_CALL, BFD_RELOC_X86_64_GOTPC32_TLSDESC,
BFD_RELOC_X86_64_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL): New.
* libbfd.h, bfd-in2.h: Rebuilt.
* elf32-i386.c (elf_howto_table): New relocations.
(R_386_tls): Adjust.
(elf_i386_reloc_type_lookup): Map new relocations.
(GOT_TLS_GDESC, GOT_TLS_GD_BOTH_P): New macros.
(GOT_TLS_GD_P, GOT_TLS_GDESC_P, GOT_TLS_GD_ANY_P): New macros.
(struct elf_i386_link_hash_entry): Add tlsdesc_got field.
(struct elf_i386_obj_tdata): Add local_tlsdesc_gotent field.
(elf_i386_local_tlsdesc_gotent): New macro.
(struct elf_i386_link_hash_table): Add sgotplt_jump_table_size.
(elf_i386_compute_jump_table_size): New macro.
(link_hash_newfunc): Initialize tlsdesc_got.
(elf_i386_link_hash_table_create): Set sgotplt_jump_table_size.
(elf_i386_tls_transition): Handle R_386_TLS_GOTDESC and
R_386_TLS_DESC_CALL.
(elf_i386_check_relocs): Likewise. Allocate space for
local_tlsdesc_gotent.
(elf_i386_gc_sweep_hook): Handle R_386_TLS_GOTDESC and
R_386_TLS_DESC_CALL.
(allocate_dynrelocs): Count function PLT relocations. Reserve
space for TLS descriptors and relocations.
(elf_i386_size_dynamic_sections): Reserve space for TLS
descriptors and relocations. Set up sgotplt_jump_table_size.
Don't zero reloc_count in srelplt.
(elf_i386_always_size_sections): New. Set up _TLS_MODULE_BASE_.
(elf_i386_relocate_section): Handle R_386_TLS_GOTDESC and
R_386_TLS_DESC_CALL.
(elf_i386_finish_dynamic_symbol): Use GOT_TLS_GD_ANY_P.
(elf_backend_always_size_sections): Define.
* elf64-x86-64.c (x86_64_elf_howto): Add R_X86_64_GOTPC32_TLSDESC,
R_X86_64_TLSDESC, R_X86_64_TLSDESC_CALL.
(R_X86_64_standard): Adjust.
(x86_64_reloc_map): Map new relocs.
(elf64_x86_64_rtype_to_howto): New, split out of...
(elf64_x86_64_info_to_howto): ... this function, and...
(elf64_x86_64_reloc_type_lookup): ... use it to map elf_reloc_val.
(GOT_TLS_GDESC, GOT_TLS_GD_BOTH_P): New macros.
(GOT_TLS_GD_P, GOT_TLS_GDESC_P, GOT_TLS_GD_ANY_P): New macros.
(struct elf64_x86_64_link_hash_entry): Add tlsdesc_got field.
(struct elf64_x86_64_obj_tdata): Add local_tlsdesc_gotent field.
(elf64_x86_64_local_tlsdesc_gotent): New macro.
(struct elf64_x86_64_link_hash_table): Add tlsdesc_plt,
tlsdesc_got and sgotplt_jump_table_size fields.
(elf64_x86_64_compute_jump_table_size): New macro.
(link_hash_newfunc): Initialize tlsdesc_got.
(elf64_x86_64_link_hash_table_create): Initialize new fields.
(elf64_x86_64_tls_transition): Handle R_X86_64_GOTPC32_TLSDESC and
R_X86_64_TLSDESC_CALL.
(elf64_x86_64_check_relocs): Likewise. Allocate space for
local_tlsdesc_gotent.
(elf64_x86_64_gc_sweep_hook): Handle R_X86_64_GOTPC32_TLSDESC and
R_X86_64_TLSDESC_CALL.
(allocate_dynrelocs): Count function PLT relocations. Reserve
space for TLS descriptors and relocations.
(elf64_x86_64_size_dynamic_sections): Reserve space for TLS
descriptors and relocations. Set up sgotplt_jump_table_size,
tlsdesc_plt and tlsdesc_got. Make room for them. Don't zero
reloc_count in srelplt. Add dynamic entries for DT_TLSDESC_PLT
and DT_TLSDESC_GOT.
(elf64_x86_64_always_size_sections): New. Set up
_TLS_MODULE_BASE_.
(elf64_x86_64_relocate_section): Handle R_386_TLS_GOTDESC and
R_386_TLS_DESC_CALL.
(elf64_x86_64_finish_dynamic_symbol): Use GOT_TLS_GD_ANY_P.
(elf64_x86_64_finish_dynamic_sections): Set DT_TLSDESC_PLT and
DT_TLSDESC_GOT. Set up TLS descriptor lazy resolver PLT entry.
(elf_backend_always_size_sections): Define.
binutils/ChangeLog:
Introduce TLS descriptors for i386 and x86_64.
* readelf.c (get_dynamic_type): Handle DT_TLSDESC_GOT and
DT_TLSDESC_PLT.
gas/ChangeLog:
Introduce TLS descriptors for i386 and x86_64.
* config/tc-i386.c (tc_i386_fix_adjustable): Handle
BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
(optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
displacement bits.
(build_modrm_byte): Set up zero modrm for TLS desc calls.
(lex_got): Handle @tlsdesc and @tlscall.
(md_apply_fix, tc_gen_reloc): Handle the new relocations.
ld/testsuite/ChangeLog:
Introduce TLS descriptors for i386 and x86_64.
* ld-i386/i386.exp: Run on x86_64-*-linux* and amd64-*-linux*.
Add new tests.
* ld-i386/pcrel16.d: Add -melf_i386.
* ld-i386/pcrel8.d: Likewise.
* ld-i386/tlsbindesc.dd: New.
* ld-i386/tlsbindesc.rd: New.
* ld-i386/tlsbindesc.s: New.
* ld-i386/tlsbindesc.sd: New.
* ld-i386/tlsbindesc.td: New.
* ld-i386/tlsdesc.dd: New.
* ld-i386/tlsdesc.rd: New.
* ld-i386/tlsdesc.s: New.
* ld-i386/tlsdesc.sd: New.
* ld-i386/tlsdesc.td: New.
* ld-i386/tlsgdesc.dd: New.
* ld-i386/tlsgdesc.rd: New.
* ld-i386/tlsgdesc.s: New.
* ld-x86-64/x86-64.exp: Run new tests.
* ld-x86-64/tlsbindesc.dd: New.
* ld-x86-64/tlsbindesc.rd: New.
* ld-x86-64/tlsbindesc.s: New.
* ld-x86-64/tlsbindesc.sd: New.
* ld-x86-64/tlsbindesc.td: New.
* ld-x86-64/tlsdesc.dd: New.
* ld-x86-64/tlsdesc.pd: New.
* ld-x86-64/tlsdesc.rd: New.
* ld-x86-64/tlsdesc.s: New.
* ld-x86-64/tlsdesc.sd: New.
* ld-x86-64/tlsdesc.td: New.
* ld-x86-64/tlsgdesc.dd: New.
* ld-x86-64/tlsgdesc.rd: New.
* ld-x86-64/tlsgdesc.s: New.
2006-01-18 21:07:51 +00:00
b190548998
gas/
...
2005-12-14 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (add_prefix): More fine-grained handling of
REX prefixes. Or new prefix value into i.prefix instead of
assigning.
gas/testsuite/
2005-12-14 Jan Beulich <jbeulich@novell.com>
* gas/i386/rex.[sd]: New.
* gas/i386/i386.exp: Run new test.
2005-12-14 08:57:06 +00:00
cb712a9ecd
gas/
...
2005-12-06 H.J. Lu <hongjiu.lu@intel.com>
PR gas/1874
* config/tc-i386.c (match_template): Handle monitor.
(process_suffix): Likewise.
gas/testsuite/
2005-12-06 H.J. Lu <hongjiu.lu@intel.com>
PR gas/1874
* gas/i386/i386.exp: Add x86-64-prescott for 64bit.
* gas/i386/prescott.s: Test address size override for monitor.
* gas/i386/prescott.d: Updated.
* gas/i386/x86-64-prescott.d: New file.
* gas/i386/x86-64-prescott.s: Likewise.
include/opcode/
2005-12-06 H.J. Lu <hongjiu.lu@intel.com>
PR gas/1874
* i386.h (i386_optab): Add 64bit support for monitor and mwait.
opcodes/
2005-12-06 H.J. Lu <hongjiu.lu@intel.com>
PR gas/1874
* i386-dis.c (address_mode): New enum type.
(address_mode): New variable.
(mode_64bit): Removed.
(ckprefix): Updated to check address_mode instead of mode_64bit.
(prefix_name): Likewise.
(print_insn): Likewise.
(putop): Likewise.
(print_operand_value): Likewise.
(intel_operand_size): Likewise.
(OP_E): Likewise.
(OP_G): Likewise.
(set_op): Likewise.
(OP_REG): Likewise.
(OP_I): Likewise.
(OP_I64): Likewise.
(OP_OFF): Likewise.
(OP_OFF64): Likewise.
(ptr_reg): Likewise.
(OP_C): Likewise.
(SVME_Fixup): Likewise.
(print_insn): Set address_mode.
(PNI_Fixup): Add 64bit and address size override support for
monitor and mwait.
2005-12-06 12:40:57 +00:00
3896cfd563
* configure.tgt (i386-*-gnu*): Set em=gnu.
...
* config/te-gnu.h: New file.
* config/tc-i386.c: Don't use '/' as comment char for TE_GNU.
2005-11-16 03:44:10 +00:00
7b0441f6fd
gas/
...
2005-11-10 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (intel_e11): Don't special-case segment
registers in brackets.
gas/testsuite/
2005-11-10 Jan Beulich <jbeulich@novell.com>
* gas/i386/intelbad.d: Add tests for ill registers in brackets.
* gas/i386/intelbad.l: Adjust.
2005-11-10 16:06:28 +00:00
b3b91714e2
* config/tc-i386.h (tc_comment_chars): Define.
...
* config/tc-i386.c (line_comment_chars): Use '/' unconditionally.
(i386_comment_chars): Add.
(md_parse_options): Process OPTION_DIVIDE.
(md_show_usage): Describe --divide option.
* doc/c-i386.texi: Document --divide option.
2005-11-07 06:01:18 +00:00
4d1bb7955a
gas/
...
2005-10-26 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (i386_operand): Don't check register prefix here.
(parse_real_register): Rename from parse_register.
(parse_register): New.
(i386_parse_name): New.
(md_operand): New.
(intel_e11): Don't tolerate registers in offset expressions anymore.
(intel_get_token): Don't check register prefix here. Copy the actual
register token, not the canonical register name.
* config/tc-i386.h (md_operand): Delete.
(i386_parse_name): Declare.
(md_parse_name): Define.
gas/testsuite/
2005-10-26 Jan Beulich <jbeulich@novell.com>
* gas/i386/intel.s: Replace register used in offset expression.
* gas/i386/intel.e: Adjust.
* gas/i386/intelbad.l: Adjust.
* gas/i386/equ.[sed]: New.
* gas/i386/i386.exp: Run new test.
2005-10-26 12:29:44 +00:00
e05278afa3
gas/
...
2005-09-28 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (reloc): Disable signedness check for 4-byte
relocations in 16- and 32-bit modes.
(i386_displacement): Make pc-relative branch handling dependent
upon operand (rather than address) size.
gas/testsuite/
2005-09-28 Jan Beulich <jbeulich@novell.com>
* gas/i386/mixed-mode-reloc.s: Enable all insns.
* gas/i386/mixed-mode-reloc32.d: Adjust.
* gas/i386/mixed-mode-reloc64.d: Adjust.
2005-09-28 15:31:21 +00:00
d182319b09
gas/
...
2005-09-28 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.h (x86_cons_fix_new): Declare unconditionally.
(TC_CONS_FIX_NEW): Define unconditionally.
(x86_pe_cons_fix_new): Remove.
* config/tc-i386.c (signed_cons): New.
(md_pseudo_table): Add slong.
(x86_cons_fix_new): Declare unconditionally.
(x86_pe_cons_fix_new): Merge into x86_cons_fix_new.
(tc_gen_reloc): Also consider BFD_RELOC_X86_64_32S for gotpc
conversion.
gas/testsuite/
2005-09-28 Jan Beulich <jbeulich@novell.com>
* gas/i386/reloc64.s: Also test .slong.
* gas/i386/reloc64.l: Adjust.
* gas/i386/reloc64.d: Adjust.
2005-09-28 14:44:25 +00:00
07a53e5cdb
* dwarf2dbg.c (struct line_entry): Replace frag and frag_ofs
...
with label.
(dwarf2_loc_mark_labels): New.
(dwarf2_gen_line_info_1): Split out of ...
(dwarf2_gen_line_info): ... here. Create the temp symbol here.
(dwarf2_emit_label): New.
(dwarf2_directive_loc_mark_labels): New.
(out_set_addr): Take a symbol instead of frag+ofs.
(relax_inc_line_addr): Likewise.
(emit_inc_line_addr): Assert delta non-negative.
(process_entries): Remove dead code. Update to work with temp
symbols instead of frag+ofs.
* dwarf2dbg.h (dwarf2_directive_loc_mark_labels): Declare.
(dwarf2_emit_label, dwarf2_loc_mark_labels): Declare.
* config/obj-elf.c (elf_pseudo_tab): Add loc_mark_labels.
* config/obj-elf.h (obj_frob_label): New.
* config/tc-alpha.c (alpha_define_label): Call dwarf2_emit_label.
* config/tc-arm.c, config/tc-hppa.c, config/tc-m68k.c,
config/tc-mips.c, config/tc-ppc.c, config/tc-sh.c, config/tc-xtensa.c:
Similarly in the respective tc_frob_label implementation functions.
* config/tc-i386.c (md_pseudo_table): Move file and loc to
non-elf section; add loc_mark_labels.
* config/tc-ia64.c (struct label_fix): Add dw2_mark_labels.
(ia64_flush_insns): Check for marked labels; emit line entry if so.
(emit_one_bundle): Similarly.
(ia64_frob_label): Record marked labels.
* config/tc-m68hc11.h (tc_frob_label): Remove.
* config/tc-ms1.c (md_pseudo_table): Remove file and loc.
* config/tc-sh.h (tc_frob_label): Pass sym to sh_frob_label.
* config/tc-sh64.h (tc_frob_label): Likewise.
* doc/as.texinfo (LNS directives): Docuement .loc_mark_blocks.
2005-09-20 18:24:48 +00:00
43fd16e4a3
gas/
...
2005-09-14 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (tc_x86_regname_to_dw2regnum): Add selector
registers, floating point control and status words, and mxcsr as
well as (for 64-bit code) segment base registers and rflags.
2005-09-14 06:33:25 +00:00
435acd52e0
gas/
...
2005-08-26 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (intel_e09): Set JumpAbsolute when seeing a PTR-
qualified operand of a branch.
(intel_bracket_expr): Set JumpAbsolute here...
(intel_e11): ... rather than here.
gas/testsuite/
2005-08-26 Jan Beulich <jbeulich@novell.com>
* gas/i386/intel.s: Adjust.
* gas/i386/intelok.s: Add two more insns.
* gas/i386/intelok.d: Adjust.
2005-08-26 15:51:15 +00:00
4fa24527c9
gas/
...
2005-08-22 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (object_64bit): New.
(i386_target_format): Initialize it.
(output_disp): Use object_64bit for relocation type determination.
(output_imm): Likewise.
(i386_validate_fix): Likewise.
(tc_gen_reloc): Likewise.
(lex_got): Likewise. Remove static mode_name. Change array size
of gotrel's rel field, and adjust its initializer. Adjust diagnostic.
(x86_cons): Use object_64bit for deciding whether quad fields can
have relocations.
gas/testsuite/
2005-08-22 Jan Beulich <jbeulich@novell.com>
* gas/i386/mixed-mode-reloc.s, gas/i386/mixed-mode-reloc32.d,
gas/i386/mixed-mode-reloc64.d: New.
* gas/i386/i386.exp: Run new tests.
2005-08-22 12:37:37 +00:00
7be1c4891a
* README-vms: Delete.
...
* config-gas.com: Delete.
* makefile.vms: Delete.
* vmsconf.sh: Delete.
* config/atof-tahoe.c: Delete.
* config/m88k-opcode.h: Delete.
* config/obj-bout.c: Delete.
* config/obj-bout.h: Delete.
* config/obj-hp300.c: Delete.
* config/obj-hp300.h: Delete.
* config/tc-a29k.c: Delete.
* config/tc-a29k.h: Delete.
* config/tc-h8500.c: Delete.
* config/tc-h8500.h: Delete.
* config/tc-m88k.c: Delete.
* config/tc-m88k.h: Delete.
* config/tc-tahoe.c: Delete.
* config/tc-tahoe.h: Delete.
* config/tc-tic80.c: Delete.
* config/tc-tic80.h: Delete.
* config/tc-w65.c: Delete.
* config/tc-w65.h: Delete.
* config/te-aux.h: Delete.
* config/te-delt88.h: Delete.
* config/te-delta.h: Delete.
* config/te-dpx2.h: Delete.
* config/te-hp300.h: Delete.
* config/te-ic960.h: Delete.
* config/vms-a-conf.h: Delete.
* doc/c-a29k.texi: Delete.
* doc/c-h8500.texi: Delete.
* doc/c-m88k.texi: Delete.
* README: Remove obsolete examples, and list of supported targets.
* Makefile.am: Remove a29k, h8500, m88k, tahoe, tic80, w65,
bout and hp300 support.
(DEP_FLAGS): Don't define BFD_ASSEMBLER.
* configure.in: Remove --enable-bfd-assembler, need_bfd,
primary_bfd_gas.
* configure.tgt: Remove a29k, h8300-coff, h8500-*, i960 non-elf,
m68k non bfd, m88k, or32-coff, tic80-*, vax non-bfd, w65k-*, *-nindy.
* as.c: Remove all non-BFD_ASSEMBLER code, support for above targets.
* as.h: Likewise.
* dw2gencfi.c: Likewise.
* dwarf2dbg.c: Likewise.
* ehopt.c: Likewise.
* input-file.c: Likewise.
* listing.c: Likewise.
* literal.c: Likewise.
* messages.c: Likewise.
* obj.h: Likewise.
* output-file.c: Likewise.
* read.c: Likewise.
* stabs.c: Likewise.
* struc-symbol.h: Likewise.
* subsegs.c: Likewise.
* subsegs.h: Likewise.
* symbols.c: Likewise.
* symbols.h: Likewise.
* tc.h: Likewise.
* write.c: Likewise.
* write.h: Likewise.
* config/aout_gnu.h: Likewise.
* config/obj-aout.c: Likewise.
* config/obj-aout.h: Likewise.
* config/obj-coff.c: Likewise.
* config/obj-coff.h: Likewise.
* config/obj-evax.h: Likewise.
* config/obj-ieee.h: Likewise.
* config/tc-arm.c: Likewise.
* config/tc-arm.h: Likewise.
* config/tc-avr.c: Likewise.
* config/tc-avr.h: Likewise.
* config/tc-crx.h: Likewise.
* config/tc-d10v.h: Likewise.
* config/tc-d30v.h: Likewise.
* config/tc-dlx.h: Likewise.
* config/tc-fr30.h: Likewise.
* config/tc-frv.h: Likewise.
* config/tc-h8300.c: Likewise.
* config/tc-h8300.h: Likewise.
* config/tc-hppa.h: Likewise.
* config/tc-i370.h: Likewise.
* config/tc-i386.c: Likewise.
* config/tc-i386.h: Likewise.
* config/tc-i860.h: Likewise.
* config/tc-i960.c: Likewise.
* config/tc-i960.h: Likewise.
* config/tc-ip2k.h: Likewise.
* config/tc-iq2000.h: Likewise.
* config/tc-m32c.h: Likewise.
* config/tc-m32r.h: Likewise.
* config/tc-m68hc11.h: Likewise.
* config/tc-m68k.c: Likewise.
* config/tc-m68k.h: Likewise.
* config/tc-maxq.c: Likewise.
* config/tc-maxq.h: Likewise.
* config/tc-mcore.c: Likewise.
* config/tc-mcore.h: Likewise.
* config/tc-mn10200.h: Likewise.
* config/tc-mn10300.c: Likewise.
* config/tc-mn10300.h: Likewise.
* config/tc-ms1.h: Likewise.
* config/tc-msp430.c: Likewise.
* config/tc-msp430.h: Likewise.
* config/tc-ns32k.c: Likewise.
* config/tc-ns32k.h: Likewise.
* config/tc-openrisc.h: Likewise.
* config/tc-or32.c: Likewise.
* config/tc-or32.h: Likewise.
* config/tc-ppc.c: Likewise.
* config/tc-ppc.h: Likewise.
* config/tc-s390.h: Likewise.
* config/tc-sh.c: Likewise.
* config/tc-sh.h: Likewise.
* config/tc-sparc.c: Likewise.
* config/tc-tic30.c: Likewise.
* config/tc-tic30.h: Likewise.
* config/tc-tic4x.c: Likewise.
* config/tc-tic4x.h: Likewise.
* config/tc-tic54x.c: Likewise.
* config/tc-tic54x.h: Likewise.
* config/tc-v850.h: Likewise.
* config/tc-vax.c: Likewise.
* config/tc-vax.h: Likewise.
* config/tc-xstormy16.h: Likewise.
* config/tc-xtensa.h: Likewise.
* config/tc-z8k.c: Likewise.
* config/tc-z8k.h: Likewise.
* config/vms-a-conf.h
* doc/Makefile.am: Likewise.
* doc/all.texi: Likewise.
* doc/as.texinfo: Likewise.
* doc/Makefile.in: Regenerate.
* Makefile.in: Regenerate.
* configure: Regenerate.
* config.in: Regenerate.
* po/POTFILES.in: Regenerate.
2005-08-11 01:25:29 +00:00
17d4e2a2a8
2007-07-27 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (handle_large_common): Declare only for ELF.
2005-07-27 14:08:08 +00:00
9cd9699237
gas/
...
2005-07-26 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (optimize_imm): Calculate candidate immediates
mask from guessed suffix, but mask out other immediate types only
if at least on candidate is valid for the insn.
gas/testsuite/
2005-07-26 Jan Beulich <jbeulich@novell.com>
* gas/i386/immed32.[sd]: New.
* gas/i386/immed64.[sd]: New.
* gas/i386/i386.exp: Run new tests.
2005-07-26 15:34:11 +00:00
3b22753a67
bfd/
...
2005-07-25 Jan Hubicka <jh@suse.cz>
H.J. Lu <hongjiu.lu@intel.com>
* elf-bfd.h (_bfd_elf_large_com_section): New.
* elf.c (_bfd_elf_large_com_section): New. Defined.
* elf64-x86-64.c (elf64_x86_64_add_symbol_hook): New.
(elf64_x86_64_elf_section_from_bfd_section): New.
(elf64_x86_64_symbol_processing): New.
(elf64_x86_64_common_definition): New.
(elf64_x86_64_common_section_index): New.
(elf64_x86_64_common_section): New.
(elf64_x86_64_merge_symbol): New.
(elf64_x86_64_additional_program_headers): New.
(elf64_x86_64_special_sections): New.
(elf_backend_section_from_bfd_section): New. Defined.
(elf_backend_add_symbol_hook): Likewise.
(elf_backend_common_section_index): Likewise.
(elf_backend_common_section): Likewise.
(elf_backend_common_definition): Likewise.
(elf_backend_merge_symbol): Likewise.
(elf_backend_special_sections): Likewise.
(elf_backend_additional_program_headers): Likewise.
binutils/
2005-07-25 H.J. Lu <hongjiu.lu@intel.com>
* readelf.c (dump_relocations): Handle SHN_X86_64_LCOMMON.
(get_symbol_index_type): Likewise.
(get_elf_section_flags): Handle SHF_X86_64_LARGE.
gas/
2005-07-25 Jan Hubicka <jh@suse.cz>
H.J. Lu <hongjiu.lu@intel.com>
* config/obj-elf.c: Include "elf/x86-64.h" if TC_I386 is
defined.
(elf_com_section_ptr): New.
(elf_begin): Set elf_com_section_ptr to bfd_com_section_ptr.
(elf_common_parse): Make it global. Use elf_com_section_ptr
instead of bfd_com_section_ptr.
(obj_elf_change_section): Handle x86-64 large bss sections.
* config/obj-elf.h (elf_com_section_ptr): New.
(elf_common_parse): New.
* config/tc-i386.c (handle_large_common): New.
(md_pseudo_table): Add "largecomm".
(x86_64_section_letter): New.
(x86_64_section_word): New.
* config/tc-i386.h (x86_64_section_word): New.
(x86_64_section_letter): New.
(md_elf_section_letter): New. Defined.
(md_elf_section_word): Likewise.
include/elf/
2005-07-25 Jan Hubicka <jh@suse.cz>
* x86-64.h (SHN_X86_64_LCOMMON): New.
(SHF_X86_64_LARGE): New.
ld/
2005-07-25 Jan Hubicka <jh@suse.cz>
H.J. Lu <hongjiu.lu@intel.com>
* emulparams/elf_x86_64.sh (LARGE_SECTIONS): New.
* scripttempl/elf.sc: Updated for large section support.
2005-07-25 15:41:08 +00:00
718ddfc073
gas/
...
2005-07-18 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (md_begin): Use IS_ELF.
(tc_i386_fix_adjustable): Likewise.
(md_estimate_size_before_relax): Likewise.
(md_apply_fix): Likewise.
(i386_target_format): Likewise.
(lex_got): Define to NULL when not ELF or when LEX_AT. Check IS_ELF.
(i386_immediate): Remove #ifdef LEX_AT.
(i386_displacement): Likewise.
* config/tc-i386.h (x86_cons): Prototype only when ELF and when not
LEX_AT.
2005-07-18 15:24:41 +00:00
3956db082e
gas/
...
2005-07-18 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (reloc): Convert to ISO C90. Change first
parameter to unsigned. Parameter sign now is tristate - zero/
positive mean unsigned/signed, negative means signedness doesn't
matter. Check field size,
signedness, and pcrel-ness are in agreement between relocated field
and relocation type. Adjust diagnostics.
(optimize_imm): And type mask of operand instead of overwriting it.
(lex_got): Convert to ISO C90. Add third parameter. Add new field to
local structure and initialize gotrel accordingly. Pass caller as
mask of types that the operator can match.
(x86_cons_fix_new): Let reloc know that signedness of relocation
doesn't matter.
(x86_pe_cons_fix_new): Likewise.
(x86_cons): Pass additional argument to lex_got.
(i386_immediate): New local variable 'types'. Pass its address as
additional argument to lex_got. Mask out operand types not supported
befoe returning.
(i386_displacement): Likewise. Set bigdisp to all types supported in
64-bit mode, combining the previously split initialization.
gas/testsuite/
2005-07-18 Jan Beulich <jbeulich@novell.com>
* gas/i386/reloc32.[sdl]: New.
* gas/i386/reloc64.[sdl]: New.
* gas/i386/i386.exp: Run new tests.
2005-07-18 06:27:24 +00:00
2dd88dcacf
gas/
...
2005-07-18 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (parse_insn): Reject prefix if unavailable in
current mode.
2005-07-18 06:13:00 +00:00
28a9d8f5e4
gas/
...
2005-07-10 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (optimize_disp): Optimize signed 32bit
displacements.
testsuite/gas/
2005-07-10 H.J. Lu <hongjiu.lu@intel.com>
* i386/x86_64.s: Add absolute siged 32bit addressing tests for
mov.
* i386/x86_64.d: Updated.
2005-07-10 16:54:01 +00:00
bf50992e53
2005-07-06 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (cpu_arch): Add sse3.
* config/tc-i386.h (CpuSSE3): Renamed from ...
(CpuPNI): This. Defined as CpuSSE3.
* doc/c-i386.texi: Document .sse3.
2005-07-06 19:11:01 +00:00
3012383869
gas/
...
2005-07-05 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.h (CpuSVME): New.
(CpuUnknownFlags): Include CpuSVME.
* config/tc-i386.c (cpu_arch): Add .pacifica and .svme. Add opteron
as alias of sledgehammer.
(md_assemble): Include invlpga in the check for insns with two source
operands.
(process_operands): Include SVME insns in the check for ignored
segment overrides. Adjust diagnostic.
(i386_index_check): Special-case SVME insns with memory operands.
gas/testsuite/
2005-07-05 Jan Beulich <jbeulich@novell.com>
* gas/i386/svme.d: New.
* gas/i386/svme.s: New.
* gas/i386/svme64.d: New.
* gas/i386/i386.exp: Run new tests.
include/opcode/
2005-07-05 Jan Beulich <jbeulich@novell.com>
* i386.h (i386_optab): Add new insns.
opcodes/
2005-07-05 Jan Beulich <jbeulich@novell.com>
* i386-dis.c (SVME_Fixup): New.
(grps): Use it for the lidt entry.
(PNI_Fixup): Call OP_M rather than OP_E.
(INVLPG_Fixup): Likewise.
2005-07-05 07:16:54 +00:00
b300c311a0
gas/
...
2005-06-20 H.J. Lu <hongjiu.lu@intel.com>
PR 1013
* config/tc-i386.c (md_assemble): Don't call optimize_disp on
movabs.
(optimize_disp): Optimize only if possible. Don't use 64bit
displacement on non-constants and do same on constants if
possible.
gas/testsuite/
2005-06-20 H.J. Lu <hongjiu.lu@intel.com>
PR 1013
* i386/x86_64.s: Add absolute 64bit addressing tests for mov.
* i386/x86_64.s: Updated.
include/opcode/
2005-06-20 H.J. Lu <hongjiu.lu@intel.com>
PR 1013
* i386.h (i386_optab): Update comments for 64bit addressing on
mov. Allow 64bit addressing for mov and movq.
2005-06-20 23:18:39 +00:00
d6ab8113e3
bfd/
...
2005-06-17 Jan Beulich <jbeulich@novell.com>
* bfd-in2.h (elf_x86_64_reloc_type): Add BFD_RELOC_X86_64_GOTOFF64
and BFD_RELOC_X86_64_GOTPC32.
* libbfd.h (bfd_reloc_code_real_names): Likewise.
* elf64-x86-64.c (x86_64_elf_howto_table): Add entries for
R_X86_64_PC64, R_X86_64_GOTOFF64, and R_X86_64_GOTPC32.
(x86_64_reloc_map): Add entries for R_X86_64_PC64, R_X86_64_GOTOFF64,
and R_X86_64_GOTPC32.
(elf64_x86_64_info_to_howto): Adjust bounding relocation type.
(elf64_x86_64_check_relocs): Also handle R_X86_64_PC64,
R_X86_64_GOTOFF64, and R_X86_64_GOTPC32.
(elf64_x86_64_relocate_section): Likewise.
(elf64_x86_64_gc_sweep_hook): Also handle R_X86_64_PC64.
gas/
2005-06-17 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (reloc): Also handle BFD_RELOC_64_PCREL.
(tc_i386_fix_adjustable): Include BFD_RELOC_X86_64_GOTOFF64,
BFD_RELOC_X86_64_DTPOFF64, and BFD_RELOC_X86_64_TPOFF64.
(output_disp): Do GOTPC conversion also for BFD_RELOC_X86_64_32S
and BFD_RELOC_32_PCREL. Use BFD_RELOC_X86_64_GOTPC32 instead of
aborting.
(output_imm): Do GOTPC conversion also for BFD_RELOC_X86_64_32S.
Use BFD_RELOC_X86_64_GOTPC32 instead of aborting.
(tc_gen_reloc): Do GOTPC conversion also for BFD_RELOC_32_PCREL.
Use BFD_RELOC_X86_64_GOTPC32 instead of aborting. Also handle
BFD_RELOC_X86_64_GOTOFF64, BFD_RELOC_X86_64_GOTPC32,
BFD_RELOC_X86_64_DTPOFF64, and BFD_RELOC_X86_64_TPOFF64. Also
convert 8-byte pc-relative relocations.
(lex_got): Use BFD_RELOC_X86_64_GOTOFF64 for 64-bit @gotoff.
(i386_validate_fix): Likewise.
(x86_cons): Also handle quad values in 64-bit mode.
(i386_displacement): Also handle BFD_RELOC_X86_64_GOTOFF64.
(md_apply_fix): Include BFD_RELOC_X86_64_DTPOFF64 and
BFD_RELOC_X86_64_TPOFF64 in the TLS check. Also convert BFD_RELOC_64
to pc-relative variant. Also check for BFD_RELOC_64_PCREL.
gas/testsuite/
2005-06-17 Jan Beulich <jbeulich@novell.com>
* gas/i386/x86-64-pcrel.s: Add insn requiring 64-bit pc-relative
relocation. Add insns for all widths of non-pc-relative relocations.
* gas/i386/x86-64-pcrel.d: Adjust.
include/elf/
2005-06-17 Jan Beulich <jbeulich@novell.com>
* x86-64.h (elf_x86_64_reloc_type): Adjust comment for
R_X86_64_GOTPCREL. Add R_X86_64_PC64, R_X86_64_GOTOFF64, and
R_X86_64_GOTPC32.
2005-06-17 08:03:59 +00:00
55cf6793d8
gas:
...
* cgen.c, cgen.h, tc.h, write.c, config/obj-coff.c
* config/tc-a29k.c, config/tc-alpha.c, config/tc-alpha.h
* config/tc-arc.c, config/tc-arc.h, config/tc-arm.c
* config/tc-arm.h, config/tc-avr.c, config/tc-avr.h
* config/tc-cris.c, config/tc-crx.c, config/tc-d10v.c
* config/tc-d10v.h, config/tc-d30v.c, config/tc-d30v.h
* config/tc-dlx.c, config/tc-dlx.h, config/tc-fr30.h
* config/tc-frv.c, config/tc-frv.h, config/tc-h8300.c
* config/tc-h8500.c, config/tc-hppa.c, config/tc-hppa.h
* config/tc-i370.c, config/tc-i370.h, config/tc-i386.c
* config/tc-i386.h, config/tc-i860.c, config/tc-i860.h
* config/tc-i960.c, config/tc-i960.h, config/tc-ia64.c
* config/tc-ip2k.c, config/tc-ip2k.h, config/tc-iq2000.c
* config/tc-iq2000.h, config/tc-m32r.c, config/tc-m32r.h
* config/tc-m68hc11.c, config/tc-m68hc11.h, config/tc-m68k.c
* config/tc-m68k.h, config/tc-m88k.c, config/tc-maxq.c
* config/tc-mcore.c, config/tc-mcore.h, config/tc-mips.c
* config/tc-mips.h, config/tc-mmix.c, config/tc-mn10200.c
* config/tc-mn10300.c, config/tc-msp430.c, config/tc-ns32k.c
* config/tc-openrisc.h, config/tc-or32.c, config/tc-or32.h
* config/tc-pdp11.c, config/tc-pj.c, config/tc-pj.h
* config/tc-ppc.c, config/tc-ppc.h, config/tc-s390.c
* config/tc-s390.h, config/tc-sh64.c, config/tc-sh.c
* config/tc-sh.h, config/tc-sparc.c, config/tc-sparc.h
* config/tc-tahoe.c, config/tc-tic30.c, config/tc-tic4x.c
* config/tc-tic54x.c, config/tc-tic80.c, config/tc-v850.c
* config/tc-v850.h, config/tc-vax.c, config/tc-vax.h
* config/tc-w65.c, config/tc-xstormy16.c, config/tc-xstormy16.h
* config/tc-xtensa.c, config/tc-z8k.c:
Replace all instances of the string "_apply_fix3" with
"_apply_fix".
* po/POTFILES.in, po/gas.pot: Regenerate.
bfd:
* coff-i386.c: Change md_apply_fix3 to md_apply_fix in comment.
cgen:
* doc/porting.texi: Change all mention of md_apply_fix3 and
gas_cgen_md_apply_fix3 to md_apply_fix and gas_cgen_md_apply_fix
respectively.
2005-06-07 17:54:22 +00:00
34d9ee9e68
gas/
...
2005-05-09 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (optimize_disp): Discard displacement entirely when zero and
not required by encoding constraints.
gas/testsuite/
2005-05-09 Jan Beulich <jbeulich@novell.com>
* gas/i386/tlsd.[sd]: Adjust to not assume zero displacement will
actually be present in memory addressing.
* gas/i386/tlspic.[sd]: Likewise.
2005-05-09 15:41:47 +00:00
e44823cfe5
gas/
...
2005-05-09 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (parse_insn): Disallow use of prefix separator
and comma in Intel mode.
include/opcode/
2005-05-09 Jan Beulich <jbeulich@novell.com>
* i386.h (i386_optab): Add ht and hnt.
2005-05-09 06:49:01 +00:00
089dfecdde
gas/
...
2005-05-09 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (tc_x86_regname_to_dw2regnum): Correct 64-bit mode
names to match ABI. Add more registers for 32-bit and 64-bit modes.
Make name array static and const. Adjust lookup to account for NULL
entries (standing for unused register numbers).
2005-05-09 06:44:51 +00:00
f41bbced45
gas/
...
2005-05-09 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (parse_insn): Consider all matching instructions
when checking for string instruction after string-only prefix.
2005-05-09 06:38:45 +00:00
4b4da1607a
Update the address and phone number of the FSF
2005-05-05 09:13:19 +00:00
87c245cccc
* Makefile.am (GAS_CFILES): Remove bignum-copy.c.
...
(GENERIC_OBJS): Likewise, remove bignum-copy.o.
(bignum-copy.o): Remove.
* Makefile.in: Regenerate.
* makefile.vms (OBJS): Remove bignum-copy.obj.
* symbols.h (local_symbol_make): Remove declaration.
(verify_symbol_chain_2): Likewise.
* symbols.c (local_symbol_make): Make static.
(max_indent_level): Likewise.
(verify_symbol_chain_2): Remove.
* macro.c (macro_hash): Make static.
* messages.c (fprint_value): Remove.
* read.h (get_absolute_expr): Remove.
(emit_leb128_expr): Likewise.
(do_s_func): Likewise.
* read.c (do_s_func): Make static.
(emit_leb128_expr): Likewise.
(get_absolute_expr): Likewise.
* as.h (as_howmuch): Remove declaration.
(fprint_value): Likewise.
* as.c (myname): Make static.
* input-scrub.c (as_howmuch): Remove.
(as_1_char): Likewise.
* input-file.h (input_file_is_open): Remove.
* input-file.c (input_file_is_open): Likewise.
* expr.h (expr_build_unary): Remove declaration.
(expr_build_binary): Likewise.
* expr.c (expr_build_unary): Remove.
(expr_build_binary): Likewise.
* hash.h (hash_replace): Remove declaration.
(hash_delete): Likewise.
* hash.c (hash_replace): Remove.
(hash_delete): Likewise.
* bignum-copy.c (bignum_copy): Move from here ..
* config/tc-vax.c (bignum_copy): .. to here.
* bignum.h (LOG_TO_BASE_2_OF_10): Remove.
(bignum_copy): Remove extern declaration.
* sb.h (string_count): Remove extern declaration.
(sb_build, sb_add_buffer, sb_print, sb_print_at): Likewise.
(sb_name): Likewise.
* sb.c (dsize): Replace preprocessor macro with static int.
(string_count): Make static.
(sb_build, sb_add_buffer, sb_print, sb_print_at): Likewise.
(sb_name): Likewise.
* config/obj-coff.c (dim_index): Make static.
* config/tc-i386.c (GOT_symbol): Likewise.
(output_invalid_buf): Likewise.
* doc/internals.texi (Warning and error messages): Remove the
prototype for fprint_value.
2005-04-29 00:22:29 +00:00
791fe84908
gas/ChangeLog:
...
* config/tc-i386.c (md_begin): Allow hyphens in mnemonics.
include/opcode/ChangeLog:
* i386.h: Insert hyphens into selected VIA PadLock extensions.
Add xcrypt-ctr. Provide aliases without hyphens.
opcodes/ChangeLog:
* i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
Add xcrypt-ctr.
2005-04-18 20:59:20 +00:00
bc4bd9abb2
include/opcode/ChangeLog:
...
* i386.h (i386_optab): Mark VIA PadLock instructions as ImmExt and
adjust them accordingly.
gas/ChangeLog:
* config/tc-i386.c (output_insn): Handle VIA PadLock instructions
similar to other instructions now that they're marked as ImmExt.
2005-04-12 17:12:33 +00:00
dbbaec2634
gas/
...
2005-04-06 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (tc_gen_reloc): Don't turn
BFD_RELOC_X86_64_32S into BFD_RELOC_32.
gas/testsuite/
2005-04-06 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/x86-64-pcrel.s: Test R_X86_64_32S.
* gas/i386/x86-64-pcrel.d: Updated.
2005-04-07 00:53:22 +00:00
a7d61044b2
gas/
...
2005-04-01 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (output_imm): Also set sign flag for 64-bit push
immediates.
2005-04-01 15:58:31 +00:00
8a75718cb7
gas/
...
2005-04-01 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (s_bss): Call obj_elf_section_change_hook.
gas/testsuite/
2005-04-01 Jan Beulich <jbeulich@novell.com>
* gas/i386/bss.[sd]: New.
* gas/i386/i386.exp: Run new test.
2005-04-01 07:50:24 +00:00
ae8887b540
gas/
...
2005-04-01 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (md_apply_fix3): Also handle BFD_RELOC_X86_64_32S.
(tc_gen_reloc): Handle BFD_RELOC_X86_64_32S in the default case.
gas/testsuite/
2005-04-01 Jan Beulich <jbeulich@novell.com>
* gas/i386/x86-64-pcrel.[sd]: New.
* gas/i386/i386.exp: Run new test.
2005-04-01 07:46:07 +00:00
a724f0f4f5
gas/
...
2005-03-17 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (i386_scale): Beautify error message.
(Intel syntax comments): Update.
(struct intel_parser_s): Add fields in_offset, in_bracket, and
next_operand.
(intel_e04_1, intel_e05_1, intel_e05_1, intel_e09_1, intel_e10_1):
Remove declarations.
(intel_bracket_expr): Declare.
(i386_intel_operand): Initialize new intel_parser fields. Wrap most
of the function body in a loop allowing to split an operand into two.
Replace calls to malloc and checks of it returning non-NULL with
calls to xmalloc/xstrdup.
(intel_expr): SHORT no longer handled here. Add comment indicating
comparison ops need implementation.
(intel_e04, intel_e04_1): Combine, replace recursion with loop.
Check right operand of - does not specify a register when parsing
the address of a memory reference.
(intel_e05, intel_e05_1): Combine, replace recursion with loop.
Check operands do not specify a register when parsing the address of
a memory reference.
(intel_e06, intel_e06_1): Likewise.
(intel_e09, intel_e09_1): Combine, replace recursion with loop. Also
handle SHORT as well as unary + and -. Don't accept : except for
segment overrides or in direct far jump/call insns.
(intel_brack_expr): New.
(intel_e10, intel_e10_1): Combine, replace recursion with loop. Use
intel_brack_expr.
(intel_e11): Replace chain of if/else-if by switch, alloing fall-
through in certain cases. Use intel_brack_expr. Add new diagnostics.
Allow symbolic constants as register scale value.
(intel_get_token): Replace call to malloc and check of return value
with call to xmalloc. Change handling for FLAT to match MASM's.
(intel_putback_token): Don't try to back up/free current token if
that is T_NIL.
gas/testsuite/
2005-03-17 Jan Beulich <jbeulich@novell.com>
* gas/i386/intel.d: Add stderr directive.
* gas/i386/intel.e: New.
* gas/i386/intel16.d: Add stderr directive. Adjust for changed
source.
* gas/i386/intel16.e: New.
* gas/i386/intel16.s: Add instances of addressing forms with base
and index specified in reverse order.
* gas/i386/intelbad.l: Adjust for changed source.
* gas/i386/intelbad.s: Add more operand forms to check.
* gas/i386/intelok.d: Remove -r from objdump options. Add stderr
directive. Adjust for changed source.
* gas/i386/intelok.e: New.
* gas/i386/intelok.s: Define MASM constants byte, word, etc. Add
more operand forms to check.
* gas/i386/x86_64.d: Add stderr directive.
* gas/i386/x86_64.e: New.
* gas/i386/x86_64.s: Adjust for parser changes.
2005-03-17 12:05:24 +00:00
aef6203bd6
update copyright dates
2005-03-03 11:52:12 +00:00
c4a530c529
gas/
...
2005-03-02 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (build_modrm_byte): Add lock prefix for cr8...15
accesses.
(parse_register): Allow cr8...15 in all modes.
gas/testsuite/
2005-03-02 Jan Beulich <jbeulich@novell.com>
* gas/i386/cr-err.[ls]: New.
* gas/i386/crx.[ds]: New.
* gas/i386/i386.exp: Run new tests.
opcodes/
2005-03-02 Jan Beulich <jbeulich@novell.com>
* i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
accesses.
(OP_C): Consider lock prefix in non-64-bit modes.
2005-03-02 08:01:32 +00:00
167c3097b2
gas/
...
2005-03-02 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (intel_e11): If not followed by T_PTR, treat T_BYTE
etc. like normal symbol references (T_ID).
gas/testsuite/
2005-03-02 Jan Beulich <jbeulich@novell.com>
* gas/i386/intelok.d: Add -r to objdump options. Adjust expectations.
* gas/i386/intelok.s: Add checks for various special memory operands.
2005-03-02 07:55:01 +00:00
65ec77d245
* config/atof-ieee.c, config/obj-coff.c, config/obj-elf.c,
...
config/obj-ieee.c, config/obj-som.c, config/obj-vms.c,
config/tc-a29k.c, config/tc-alpha.c, config/tc-arc.c,
config/tc-arm.c, config/tc-d30v.c, config/tc-dlx.c,
config/tc-fr30.c, config/tc-h8300.c, config/tc-h8500.c,
config/tc-i370.c, config/tc-i386.c, config/tc-i960.c,
config/tc-ia64.c, config/tc-m32r.c, config/tc-m32r.h,
config/tc-m68hc11.c, config/tc-m68hc11.h, config/tc-mips.c,
config/tc-mn10200.c, config/tc-msp430.c, config/tc-ns32k.c,
config/tc-openrisc.c, config/tc-or32.c, config/tc-pdp11.c,
config/tc-pj.c, config/tc-sparc.h, config/tc-tic54x.c,
config/tc-tic80.c, config/tc-v850.c, config/tc-w65.c,
config/tc-xtensa.c, config/tc-z8k.c, config/xtensa-relax.c: Remove
#if 0'd code throughout.
2005-01-31 23:18:35 +00:00
df227444e2
2005-01-14 H.J. Lu <hongjiu.lu@intel.com>
...
PR 659
* config/tc-i386.c (i386_scale): Disallow 0 scale.
2005-01-14 22:10:55 +00:00
37edbb65ad
gas/
...
2004-11-25 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (optimize_imm): Adjust immediates to only those
permissible for the selected instruction suffix.
(process_suffix): For DefaultSize instructions, suppressing the
guessing of a 'q' suffix if the instruction doesn't support it is
pointless, because only an 'l' suffix can be guessed in this place.
gas/testsuite/
2004-11-25 Jan Beulich <jbeulich@novell.com>
* gas/i386/x86-64-inval.[sl]: Remove sahf/lahf.
include/opcode/
2004-11-25 Jan Beulich <jbeulich@novell.com>
* i386.h: CpuNo64 mov can't reasonably have a 'q' suffix. Moves
to/from test registers are illegal in 64-bit mode. Add missing
NoRex64 to sidt. fxsave/fxrstor now allow for a 'q' suffix
(previously one had to explicitly encode a rex64 prefix). Re-enable
lahf/sahf in 64-bit mode as at least some Athlon64/Opteron steppings
support it there. Add cmpxchg16b as per Intel's 64-bit documentation.
2004-11-25 08:42:54 +00:00
5c6af06e4c
gas/
...
2004-11-23 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.h (CpuMMX2): Declare. Artificial classifier to
indicate the MMX extensions added by both SSE and 3DNow!A.
(Cpu3dnowA): Declare.
(CpuUnknownFlags): Update.
* config/tc-i386.c (cpu_sub_arch_name): Declare.
(cpu_arch): i586 and pentium do not imply MMX. i686 and pentiumpro do
neither imply SSE nor MMX. k6 implies MMX. k6_2 additionally implies
3DNow!. Athlon additionally implies 3DNow!A. Several new
entries (those starting with a dot are for sub-arch specification).
(set_cpu_arch): Handle sub-arch specifications.
(parse_insn): Distinguish between instructions not supported because
of insufficient CPU features and because of 64-bit mode.
* doc/c-i386.texi: Describe enhanced .arch directive.
include/opcode/
2004-11-23 Jan Beulich <jbeulich@novell.com>
* i386.h (i386_optab): paddq and psubq, even in their MMX form, are
available only with SSE2. Change the MMX additions introduced by SSE
and 3DNow!A to CpuMMX2 (rather than CpuMMX). Indicate the 3DNow!A
instructions by their now designated identifier (since combining i686
and 3DNow! does not really imply 3DNow!A).
2004-11-23 07:55:12 +00:00
977cdf5aa7
Fix support for PECOFF weak symbols
2004-11-08 08:12:53 +00:00
9306ca4a20
gas/
...
2004-11-04 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (set_intel_syntax): Allow % in symbol names when
intel syntax and no register prefix, allow $ in symbol names when
intel syntax.
(set_16bit_gcc_code_flag): Replace literal 'l' by LONG_MNEM_SUFFIX.
(intel_float_operand): Add fourth return value indicating math control
operations. Make classification more precise.
(md_assemble): Complain if memory operand of mov[sz]x has no size
specified.
(parse_insn): Translate word operands to floating point instructions
operating on integers as well as control instructions to short ones
as expected by AT&T syntax. Translate 'd' suffix to short one only for
floating point instructions operating on non-integer operands.
(match_template): Remove fldcw special case. Adjust q-suffix handling
to permit it on fild/fistp/fisttp in AT&T mode.
(process_suffix): Don't guess DefaultSize insns' suffix from
stackop_size for certain floating point control instructions. Guess
suffix for branch and [ls][gi]dt based on flag_code. Split error
messages for Intel and AT&T syntax, and make the condition more strict
for the former. Adjust suppressing of generation of operand size
overrides.
(intel parser): Allow the full set of MASM operators. Add FWORD, TBYTE,
OWORD, and XMMWORD operand size specifiers (TBYTE replaces XWORD). Add
more error checking.
* config/tc-i386.h (BYTE_PTR WORD_PTR DWORD_PTR QWORD_PTR XWORD_PTR
SHORT OFFSET_FLAT FLAT NONE_FOUND): Remove unused defines.
gas/testsuite/
2004-11-04 Jan Beulich <jbeulich@novell.com>
* gas/i386/i386.exp: Execute new tests intelbad and intelok.
* gas/i386/intelbad.[sl]: New test to check for various things not
permitted in Intel mode.
* gas/i386/intel.d, gas/i386/opcode.d, gas/i386/x86-64-opcode.d:
Adjust for change to segment register store.
* gas/i386/intelok.[sd]: New test to check various Intel mode specific
things get handled correctly.
* gas/i386/x86_64.[sd]: Remove unsupported constructs referring to
'high' and 'low' parts of an operand, which the parser previously
accepted while neither telling that it's not supported nor that it
ignored the remainder of the line following these supposed keywords.
include/opcode/
2004-11-04 Jan Beulich <jbeulich@novell.com>
* i386.h (sldx_Suf): Remove.
(FP, l_FP, sl_FP, x_FP): Don't imply IgnoreSize.
(q_FP): Define, implying no REX64.
(x_FP, sl_FP): Imply FloatMF.
(i386_optab): Split reg and mem forms of moving from segment registers
so that the memory forms can ignore the 16-/32-bit operand size
distinction. Adjust a few others for Intel mode. Remove *FP uses from
all non-floating-point instructions. Unite 32- and 64-bit forms of
movsx, movzx, and movd. Adjust floating point operations for the above
changes to the *FP macros. Add DefaultSize to floating point control
insns operating on larger memory ranges. Remove left over comments
hinting at certain insns being Intel-syntax ones where the ones
actually meant are already gone.
opcodes/
2004-11-04 Jan Beulich <jbeulich@novell.com>
* i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
(indirEb): Remove.
(Mp): Use f_mode rather than none at all.
(t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
replaces what previously was x_mode; x_mode now means 128-bit SSE
operands.
(dis386): Make far jumps and calls have an 'l' prefix only in AT&T
mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
pinsrw's second operand is Edqw.
(grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
mode when an operand size override is present or always suffixing.
More instructions will need to be added to this group.
(putop): Handle new macro chars 'C' (short/long suffix selector),
'I' (Intel mode override for following macro char), and 'J' (for
adding the 'l' prefix to far branches in AT&T mode). When an
alternative was specified in the template, honor macro character when
specified for Intel mode.
(OP_E): Handle new *_mode values. Correct pointer specifications for
memory operands. Consolidate output of index register.
(OP_G): Handle new *_mode values.
(OP_I): Handle const_1_mode.
(OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
respective opcode prefix bits have been consumed.
(OP_EM, OP_EX): Provide some default handling for generating pointer
specifications.
2004-11-04 09:16:09 +00:00
bb41ade59e
* config/tc-i386.c (O_secrel): Delete.
...
(tc_pe_dwarf2_emit_offset): New function.
* config/tc-i386.h (O_secrel): Define as O_md1.
(TC_DWARF2_EMIT_OFFSET): Define.
2004-10-18 12:32:13 +00:00
d2b2c203e1
bfd/
...
* config.bfd: Include 64-bit support for i[3-7]86-*-solaris2*.
* elf64-x86-64.c (elf64_x86_64_section_from_shdr): New function.
(elf_backend_section_from_shdr): Define.
binutils/
* readelf.c (get_x86_64_section_type_name): New function.
(get_section_type_name): Use it.
gas/
* config/tc-i386.c: Include "elf/x86-64.h".
(i386_elf_section_type): New function.
* config/tc-i386.h (md_elf_section_type): Define.
(i386_elf_section_type): New prototype.
gas/testsuite/
* gas/i386/i386.exp: Don't run divide test for targets where '/'
is a comment. Run x86-64-unwind for 64-bit ELF targets.
* gas/i386/x86-64-unwind.d, gas/i386/x86-64-unwind.s: New.
include/
* elf/common.h (PT_SUNW_EH_FRAME): Define.
* elf/x86-64.h (SHT_X86_64_UNWIND): Define.
ld/
* configure.tgt: Include elf_x86_64 for i[3-7]86-*-solaris2*.
2004-10-08 13:55:11 +00:00
543613e933
For DefaultSize instructions, don't guess a 'q' suffix if the instruction
...
doesn't support it.
2004-07-21 18:18:04 +00:00
20f0a1fc7d
Corrections for x86_64 assembly.
2004-07-21 16:09:43 +00:00
0477af35bf
Add support for & | << >> ~ arithmetic operators in Intel mode
2004-07-13 17:31:15 +00:00
c87db184a7
2004-07-04 Aaron W. LaFramboise <aaron98wiridge9@aaronwl.com>
...
* bfd/cofflink.c (_bfd_coff_generic_relocate_section): Resolve PE weak
externals properly.
* src/gas/config/obj-coff.c (obj_coff_weak): New .weak syntax for PE weak
externals.
* binutils/doc/binutils.texi (nm): Clarify weak symbol description.
* gas/config/tc-i386.c (tc_gen_reloc): Use addend for weak symbols in TE_PE.
* gas/doc/as.texinfo (Weak): Document PE weak symbols.
* ld/ld.texinfo (WIN32): Document PE weak symbols.
2004-07-03 16:07:51 +00:00
32137342ec
* config/tc-i386.c: Deal with LEX_QM the same way as with LEX_AT.
...
* config/te-netware.h: New file.
* config/te-ppcnw.h: Delete: Obsolete.
* configure.in: Eliminate ill NetWare targets. Make generic
NetWare target use proper emulation.
* Makefile.am: Eliminate reference to obsolete te-ppcnw.h, add
reference to new te-netware.h.
* configure: Regenerate.
* Makefile.in: Regenerate.
2004-06-18 14:09:41 +00:00
6482c264f4
Add support for a .secrel32 x86 reloc to allow DWARF" debug information to used
...
with COFF based x86 ports.
2004-04-20 12:17:16 +00:00
0f10071e3d
2004-03-12 Michal Ludvig <mludvig@suse.cz>
...
* gas/config/tc-i386.c (output_insn): Handle PadLock instructions.
* gas/config/tc-i386.h (CpuPadLock): New define.
(CpuUnknownFlags): Added CpuPadLock.
* include/opcode/i386.h (i386_optab): Added xstore/xcrypt insns.
* opcodes/i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
(dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
(padlock_table): New struct with PadLock instructions.
(print_insn): Handle PADLOCK_SPECIAL.
2004-03-12 10:14:29 +00:00
67c1ffbec9
* config/tc-a29k.h: Fix comment typos.
...
* config/tc-arm.c: Likewise.
* config/tc-dlx.h: Likewise.
* config/tc-hppa.c: Likewise.
* config/tc-i386.c: Likewise.
* config/tc-m32r.c: Likewise.
* config/tc-m68hc11.c: Likewise.
* config/tc-m68k.c: Likewise.
* config/tc-m88k.c: Likewise.
* config/tc-mcore.c: Likewise.
* config/tc-mips.c: Likewise.
* config/tc-mmix.c: Likewise.
* config/tc-msp430.c: Likewise.
* config/tc-ns32k.c: Likewise.
* config/tc-or32.c: Likewise.
* config/tc-or32.h: Likewise.
* config/tc-pj.c: Likewise.
* config/tc-ppc.c: Likewise.
* config/tc-s390.c: Likewise.
* config/tc-sh64.c: Likewise.
* config/tc-sh.c: Likewise.
* config/tc-sparc.c: Likewise.
2003-11-22 02:35:31 +00:00
0234cb7c70
* config/tc-hppa.c: Fix comment typos.
...
* config/tc-i370.c: Likewise.
* config/tc-i386.c: Likewise.
* config/tc-i386.h: Likewise.
* config/tc-i960.c: Likewise.
* config/tc-ia64.c: Likewise.
* config/tc-iq2000.h: Likewise.
2003-11-21 14:38:06 +00:00
8d01d9a97d
2003-11-11 Jan Hubicka <jh@suse.cz>
...
* config/tc-i386.c (tc_i386_fix_adjustable):
2003-11-11 09:30:48 +00:00
f86103b730
* config/tc-i386.h: Remove BFD_ASSEMBLER tests and all !BFD_ASSEMBLER
...
code.
* config/tc-i386.c: Likewise.
(RELOC_ENUM): Don't define. Replace throughout with enum.
2003-08-14 08:05:44 +00:00
a4622f4072
* config/tc-i386.c (i386_intel_operand): Always call i386_index_check
...
for memory operands. Pass the full operand_string to i386_index_check.
2003-08-04 12:03:49 +00:00
0cea619061
* config/tc-i386.c (tc_x86_regname_to_dw2regnum): Use ARRAY_SIZE
...
macro to compute size of selected register name array.
2003-07-04 10:46:35 +00:00
02fc308916
2003-06-26 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (md_assemble): Declare "exp" before "if".
2003-06-26 17:50:41 +00:00
ca164297eb
gas/
...
2003-06-23 H.J. Lu <hongjiu.lu@intel.com>
* gas/config/tc-i386.c (md_assemble): Support Intel Precott New
Instructions.
* gas/config/tc-i386.h (CpuPNI): New.
(CpuUnknownFlags): Add CpuPNI.
gas/testsuite/
2003-06-23 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Add prescott.
* gas/i386/prescott.d: New file.
* gas/i386/prescott.s: Likewise.
include/opcode/
2003-06-23 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (i386_optab): Support Intel Precott New Instructions.
opcodes/
2003-06-23 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (PNI_Fixup): New. Fix up "mwait" and "monitor" in
Intel Precott New Instructions.
(PREGRP27): New. Added for "addsubpd" and "addsubps".
(PREGRP28): New. Added for "haddpd" and "haddps".
(PREGRP29): New. Added for "hsubpd" and "hsubps".
(PREGRP30): New. Added for "movsldup" and "movddup".
(PREGRP31): New. Added for "movshdup" and "movhpd".
(PREGRP32): New. Added for "lddqu".
(dis386_twobyte): Use PREGRP30 to replace the "movlpX" entry.
Use PREGRP31 to replace the "movhpX" entry. Use PREGRP28 for
entry 0x7c. Use PREGRP29 for entry 0x7d. Use PREGRP27 for
entry 0xd0. Use PREGRP32 for entry 0xf0.
(twobyte_has_modrm): Updated.
(twobyte_uses_SSE_prefix): Likewise.
(grps): Use PNI_Fixup in the "sidtQ" entry.
(prefix_user_table): Add PREGRP27, PREGRP28, PREGRP29, PREGRP30,
PREGRP31 and PREGRP32.
(float_mem): Use "fisttp{l||l|}" in entry 1 in opcode 0xdb.
Use "fisttpll" in entry 1 in opcode 0xdd.
Use "fisttp" in entry 1 in opcode 0xdf.
2003-06-23 20:15:34 +00:00
12b55ccc43
2003-06-09 H.J. Lu <hongjiu.lu@intel.com>
...
* NEWS: Updated for the new -n option for the i386 assembler.
* config/tc-i386.c (optimize_align_code): New.
(md_shortopts): Add 'n'.
(md_parse_option): Handle 'n'.
(md_show_usage): Add '-n'.
* config/tc-i386.h (optimize_align_code): Declared.
(md_do_align): Optimize code alignment only if optimize_align_code
is not 0.
* doc/as.texinfo: Add the new -n option.
* doc/c-i386.texi: Document the new -n option.
2003-06-10 06:46:34 +00:00
a4447b9378
* dw2gencfi.c, dw2gencfi.h: Rewrite from scratch.
...
* as.c (main): Always call cfi_finish.
* config/tc-i386.c (x86_dwarf2_return_column): New.
(x86_cie_data_alignment): New.
(md_begin): Set them.
(tc_x86_cfi_init): Remove.
(tc_x86_regname_to_dw2regnum): Fix 32-bit register numbers;
return int, not unsigned long; don't as_bad here.
(tc_x86_frame_initial_instructions): Streamline; use
updated api.
* config/tc-i386.h (tc_cfi_init): Remove.
(DWARF2_DEFAULT_RETURN_COLUMN): New.
(DWARF2_CIE_DATA_ALIGNMENT): New.
* gas/cfi/cfi-i386.d: Update for dw2gencfi rewrite.
* gas/cfi/cfi-x86_64.d: Likewise.
* gas/cfi/cfi-i386-2.d: New.
* gas/cfi/cfi-i386-2.s: New.
2003-05-27 16:52:49 +00:00
54cfded08e
* dw2gencfi.c, dw2gencfi.h: New files.
...
* config/tc-i386.c (tc_x86_cfi_init): New function.
* config/tc-i386.h (TARGET_USE_CFIPOP, tc_cfi_init): New defines.
* as.c (parse_args): Set verbose flag on --verbose.
(main): Call tc_cfi_init()/cfi_finish().
* as.h (verbose): New external variable.
* read.c (pobegin): Insert CFI pops to the list.
* symbols.c (local_symbol_make): Make symbol external.
* symbols.h (local_symbol_make): New prototype.
* Makefile.am: Add dw2gencfi.[ch] files. Run "make dep-am".
* Makefile.in: Regenerate.
* doc/as.texinfo: Added node "CFI directives" with description of
all implemented .cfi_* directives.
* doc/Makefile.in: Regenerate.
* po/POTFILES.in: Regenerate.
2003-05-20 07:58:07 +00:00
0d9f6d04b2
line_comment_chars: Add '#'. This makes the assembler's handling of
...
# <linenum> "<filename>" directives work.
2003-01-29 10:05:52 +00:00
ae6063d440
* symbols.c (S_FORCE_RELOC): Add "strict" param.
...
* symbols.h (S_FORCE_RELOC): Likewise.
* config/obj-aout.h (S_FORCE_RELOC): Likewise.
* config/obj-bout.h (S_FORCE_RELOC): Likewise.
* config/obj-coff.h (S_FORCE_RELOC): Likewise.
* config/obj-ieee.h (S_FORCE_RELOC): Likewise.
* config/obj-vms.h (S_FORCE_RELOC): Likewise.
* write.c (generic_force_reloc): New function.
(TC_FORCE_RELOCATION): Use it here instead of S_FORCE_RELOC.
(TC_FORCE_RELOCATION_SUB_SAME): Test TC_FORCE_RELOCATION too.
(adjust_reloc_syms): Adjust S_FORCE_RELOC call.
* as.h (generic_force_reloc): Declare.
* doc/internals.texi (S_FORCE_RELOC): Update.
(TC_FORCE_RELOCATION_SUB_SAME): Update.
* config/tc-alpha.c (alpha_force_relocation): Adjust to use
generic_force_reloc.
(alpha_fix_adjustable): Likewise.
* config/tc-arm.c (arm_force_relocation): Likewise.
* config/tc-cris.c (md_cris_force_relocation): Likewise.
* config/tc-frv.c (frv_force_relocation): Likewise.
* config/tc-i386.c (md_apply_fix3): Likewise.
* config/tc-ia64.c (ia64_force_relocation): Likewise.
* config/tc-ip2k.c (ip2k_force_relocation): Likewise.
* config/tc-m32r.c (m32r_force_relocation): Likewise.
* config/tc-m68hc11.c (tc_m68hc11_force_relocation): Likewise.
* config/tc-mcore.c (mcore_force_relocation): Likewise.
* config/tc-mips.c (mips_force_relocation): Likewise.
* config/tc-mmix.c (mmix_force_relocation): Likewise.
* config/tc-ppc.c (ppc_force_relocation): Likewise.
* config/tc-s390.c (tc_s390_force_relocation): Likewise.
* config/tc-sh.c (sh_force_relocation): Likewise.
(md_pcrel_from_section): Likewise.
* config/tc-sparc.c (tc_gen_reloc): Likewise.
* config/tc-v850.c (v850_force_relocation): Likewise.
* config/tc-xstormy16.c (xstormy16_force_relocation): Likewise.
* config/tc-i386.h (TC_FORCE_RELOCATION): Likewise.
* config/tc-mcore.h (TC_FORCE_RELOCATION): Likewise.
* config/tc-sparc.h (tc_fix_adjustable): Likewise.
* config/tc-d10v.c (d10v_force_relocation): Delete.
* config/tc-d10v.h (TC_FORCE_RELOCATION): Don't define.
* config/tc-dlx.c (md_dlx_force_relocation): Delete.
* config/tc-dlx.h (TC_FORCE_RELOCATION): Don't define.
* config/tc-fr30.c (fr30_force_relocation): Delete.
* config/tc-fr30.h (TC_FORCE_RELOCATION): Don't define.
* config/tc-mn10300.c (mn10300_force_relocation): Delete.
* config/tc-mn10300.h (TC_FORCE_RELOCATION): Don't define.
(TC_FORCE_RELOCATION_SUB_SAME): Test TC_FORCE_RELOCATION too.
* config/tc-i960.h (TC_FORCE_RELOCATION_SUB_SAME): Likewise.
* config/tc-hppa.c (hppa_force_relocation): Adjust S_FORCE_RELOC call.
* config/tc-mips.c (RELAX_BRANCH_TOOFAR): Warning fix.
* config/tc-mips.h (TC_FORCE_RELOCATION_SUB_SAME): Don't define.
* config/tc-openrisc.c (openrisc_force_relocation): Delete.
* config/tc-openrisc.h (TC_FORCE_RELOCATION): Don't define.
* config/tc-sparc.c (elf32_sparc_force_relocation): Delete.
* config/tc-sparc.h (TC_FORCE_RELOCATION): Don't define for ELF.
* config/tc-i386.c (i386_force_relocation): Delete.
* config/tc-i386.h (TC_FORCE_RELOCATION): Don't define for
BFD_ASSEMBLER.
(EXTERN_FORCE_RELOC): Fix TE_PE and STRICT_PE_FORMAT nesting.
* config/tc-m68k.h (TC_FORCE_RELOCATION): Don't define.
* config/tc-pj.h (TC_FORCE_RELOCATION): Don't define.
* config/tc-sh.h (TC_FORCE_RELOCATION_SUB_ABS): Don't call
S_FORCE_RELOC.
(TC_FORCE_RELOCATION_SUB_SAME): Test TC_FORCE_RELOCATION too.
* config/tc-sh64.h (TC_FORCE_RELOCATION_SUB_SAME): Likewise.
2003-01-23 12:51:05 +00:00
b34976b65a
s/boolean/bfd_boolean/ s/true/TRUE/ s/false/FALSE/. Simplify
...
comparisons of bfd_boolean vars with TRUE/FALSE. Formatting.
2002-11-30 08:39:46 +00:00
00f7efb6cc
* symbols.c (S_SET_THREAD_LOCAL): New function.
...
* symbols.h (S_SET_THREAD_LOCAL): New prototype.
* config/tc-i386.c (md_apply_fix3): Call S_SET_THREAD_LOCAL
for TLS relocations.
* config/tc-ia64.c (md_apply_fix3): Likewise.
* config/tc-alpha.c (md_apply_fix3): Likewise.
* ld-i386/tlsnopic.rd: Change NOTYPE to TLS for UND sg* symbols.
2002-11-28 14:15:55 +00:00
3e02c1cc58
* config/tc-i386.c (output_jump): Set fx_signed for loop/jcxz.
...
(md_estimate_size_before_relax): Likewise for 8 bit branches.
2002-10-11 00:25:32 +00:00
bffbf9406f
bfd/
...
* reloc.c: Add x86-64 TLS relocs.
* bfd-in2.h, libbfd.h: Rebuilt.
* elf64-x86-64.c (x86_64_elf_howto): Fix size fields for 32-bit
relocs. Add TLS relocs.
(x86_64_reloc_map): Add TLS relocs.
(elf64_x86_64_info_to_howto): Adjust for added TLS relocs.
(struct elf64_x86_64_link_hash_entry): Add tls_type field.
(GOT_UNKNOWN, GOT_NORMAL, GOT_TLS_GD, GOT_TLS_IE): Define.
(elf64_x86_64_hash_entry): Define.
(struct elf64_x86_64_obj_tdata): New.
(elf64_x86_64_tdata, elf64_x86_64_local_got_tls_type): Define.
(struct elf64_x86_64_link_hash_table): Add tls_ld_got.
(link_hash_newfunc): Initialize tls_type.
(elf64_x86_64_link_hash_table_create): Initialize tls_ld_got.
(elf64_x86_64_copy_indirect_symbol): Swap tls_type if necessary.
(elf64_x86_64_mkobject): New.
(elf64_x86_64_elf_object_p): Allocate struct elf64_x86_64_obj_tdata.
(elf64_x86_64_tls_transition): New.
(elf64_x86_64_check_relocs): Add r_type variable and use it.
Handle TLS relocs.
(elf64_x86_64_gc_sweep_hook): Handle TLS relocs.
(allocate_dynrelocs): Allocate GOT space for TLS relocs.
(elf64_x86_64_size_dynamic_sections): Likewise.
(dtpoff_base, tpoff): New.
(elf64_x86_64_relocate_section): Handle TLS relocs.
(elf64_x86_64_finish_dynamic_symbol): Only handle non-TLS GOT
entries.
(bfd_elf64_mkobject): Define.
* elf32-i386.c (elf_i386_check_relocs) [R_386_TLS_LE]: Set
DF_STATIC_TLS if shared.
gas/
* config/tc-i386.c (tc_i386_fix_adjustable): Add x86-64 TLS relocs.
Define them if not BFD_ASSEMBLER.
(lex_got): Handle @tlsgd, @dtpoff and @tpoff in 64-bit mode, add
@tlsld.
(md_apply_fix3): No addend for BFD_RELOC_X86_64_TLSGD,
BFD_RELOC_X86_64_TLSLD and BFD_RELOC_X86_64_GOTTPOFF.
(tc_gen_reloc): Handle x86-64 TLS relocs.
include/
* elf/x86-64.h: Add TLS relocs.
ld/testsuite/
* lib/ld-lib.exp (run_ld_link_tests): Add.
* ld-sh/sh64/sh64.exp (run_ld_link_tests, regexp_diff,
file_contents): Remove.
(sh64tests): Add 6th field to the tests array.
* ld-i386/i386.exp (run_ld_link_tests): Remove.
* ld-x86-64/x86-64.exp: New.
* ld-x86-64/tlsbin.dd: New test.
* ld-x86-64/tlsbinpic.s: New test.
* ld-x86-64/tlsbin.rd: New test.
* ld-x86-64/tlsbin.s: New test.
* ld-x86-64/tlsbin.sd: New test.
* ld-x86-64/tlsbin.td: New test.
* ld-x86-64/tlslib.s: New test.
* ld-x86-64/tlspic1.s: New test.
* ld-x86-64/tlspic2.s: New test.
* ld-x86-64/tlspic.dd: New test.
* ld-x86-64/tlspic.rd: New test.
* ld-x86-64/tlspic.sd: New test.
* ld-x86-64/tlspic.td: New test.
2002-09-27 19:29:18 +00:00
52271982a7
* config/tc-i386.c (process_operands): Warn about "lea" segment
...
overrides.
2002-09-24 01:46:42 +00:00
6539b54baf
* config/tc-i386.c (md_apply_fix3): Replace S_IS_EXTERNAL,
...
S_IS_WEAK etc. with S_FORCE_RELOC call. Correct comment.
Rename "fseg" to "sym_seg".
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
* doc/Makefile.in: Regenerate.
2002-09-21 10:39:17 +00:00
37e55690c4
bfd/
...
* reloc.c (BFD_RELOC_386_TLS_TPOFF, BFD_RELOC_386_TLS_IE,
BFD_RELOC_386_TLS_GOTIE): Add.
* bfd-in2.h, libbfd.h: Rebuilt.
* elf32-i386.c (elf_howto_table): Add R_386_TLS_TPOFF, R_386_TLS_IE
and R_386_TLS_GOTIE.
(elf_i386_reloc_type_lookup): Handle it.
(struct elf_i386_link_hash_entry): Change tls_type type to unsigned
char instead of enum, change GOT_* into defines.
(GOT_TLS_IE_POS, GOT_TLS_IE_NEG, GOT_TLS_IE_BOTH): Define.
(elf_i386_tls_transition): Handle R_386_TLS_IE and R_386_TLS_GOTIE.
(elf_i386_check_relocs): Likewise. Avoid crash if local symbol is
accessed both as normal and TLS symbol. Move R_386_TLS_LDM and
R_386_PLT32 cases so that R_386_TLS_IE can fall through.
Handle R_386_TLS_LE_32 and R_386_TLS_LE in shared libs.
(elf_i386_gc_sweep_hook): Handle R_386_TLS_IE and R_386_TLS_GOTIE.
Handle R_386_TLS_LE_32 and R_386_TLS_LE in shared libs.
(allocate_dynrelocs): Allocate 2 .got and 2 .rel.got entries if
tls_type is GOT_TLS_IE_BOTH.
(elf_i386_size_dynamic_sections): Likewise.
(elf_i386_relocate_section): Handle R_386_TLS_IE and R_386_TLS_GOTIE.
Handle R_386_TLS_LE_32 and R_386_TLS_LE in shared libs.
(elf_i386_finish_dynamic_symbol): Use tls_type & GOT_TLS_IE to catch
all 4 GOT_TLS_* TLS types.
gas/
* config/tc-i386.c (tc_i386_fix_adjustable): Handle
BFD_RELOC_386_TLS_IE and BFD_RELOC_386_TLS_GOTIE.
(BFD_RELOC_386_TLS_IE, BFD_RELOC_386_TLS_GOTIE): Define to 0
if not defined.
(lex_got): Handle @GOTNTPOFF and @INDNTPOFF.
(md_apply_fix3, tc_gen_reloc): Handle BFD_RELOC_386_TLS_IE and
BFD_RELOC_386_TLS_GOTIE.
gas/testsuite/
* gas/i386/tlspic.s: Add tests.
* gas/i386/tlspic.d: Regenerated.
* gas/i386/tlsnopic.s: Add tests.
* gas/i386/tlsnopic.d: Regenerated.
include/
* elf/i386.h (R_386_TLS_TPOFF, R_386_TLS_IE, R_386_TLS_GOTIE):
Define.
ld/testsuite/
* ld-i386/i386.exp: New.
* ld-i386/tlsbin.dd: New test.
* ld-i386/tlsbinpic.s: New test.
* ld-i386/tlsbin.rd: New test.
* ld-i386/tlsbin.s: New test.
* ld-i386/tlsbin.sd: New test.
* ld-i386/tlsbin.td: New test.
* ld-i386/tlslib.s: New test.
* ld-i386/tlsnopic1.s: New test.
* ld-i386/tlsnopic2.s: New test.
* ld-i386/tlsnopic.dd: New test.
* ld-i386/tlsnopic.rd: New test.
* ld-i386/tlsnopic.sd: New test.
* ld-i386/tlspic1.s: New test.
* ld-i386/tlspic2.s: New test.
* ld-i386/tlspic.dd: New test.
* ld-i386/tlspic.rd: New test.
* ld-i386/tlspic.sd: New test.
* ld-i386/tlspic.td: New test.
2002-09-19 19:01:18 +00:00
H.J. Lu
Nick Clifton
Dave Korn
Dwarakanath Rajagopal
Jan Beulich
Alan Modra
Kai Tietz
Eric Botcazou
Jakub Jelinek
Michael Meissner
Mike Frysinger
Thiemo Seufer
Kazu Hirata
Andreas Jaeger
Alexandre Oliva
Richard Henderson
Zack Weinberg
Ben Elliston
Mark Kettenis
Daniel Jacobowitz
Christopher Faylor
Michal Ludvig